diff --git a/README.md b/README.md index 18771927e1..d099c334a1 100644 --- a/README.md +++ b/README.md @@ -1,7 +1,7 @@ # NVIDIA Linux Open GPU Kernel Module Source This is the source release of the NVIDIA Linux open GPU kernel modules, -version 560.35.03. +version 565.57.01. ## How to Build @@ -17,7 +17,7 @@ as root: Note that the kernel modules built here must be used with GSP firmware and user-space NVIDIA GPU driver components from a corresponding -560.35.03 driver release. This can be achieved by installing +565.57.01 driver release. This can be achieved by installing the NVIDIA GPU driver from the .run file using the `--no-kernel-modules` option. E.g., @@ -185,7 +185,7 @@ table below). For details on feature support and limitations, see the NVIDIA GPU driver end user README here: -https://us.download.nvidia.com/XFree86/Linux-x86_64/560.35.03/README/kernel_open.html +https://us.download.nvidia.com/XFree86/Linux-x86_64/565.57.01/README/kernel_open.html For vGPU support, please refer to the README.vgpu packaged in the vGPU Host Package for more details. @@ -199,6 +199,7 @@ Subsystem Device ID. | NVIDIA TITAN RTX | 1E02 | | NVIDIA GeForce RTX 2080 Ti | 1E04 | | NVIDIA GeForce RTX 2080 Ti | 1E07 | +| NVIDIA CMP 50HX | 1E09 | | Quadro RTX 6000 | 1E30 | | Quadro RTX 8000 | 1E30 1028 129E | | Quadro RTX 8000 | 1E30 103C 129E | @@ -391,6 +392,7 @@ Subsystem Device ID. | NVIDIA GeForce RTX 2070 | 1F07 | | NVIDIA GeForce RTX 2060 | 1F08 | | NVIDIA GeForce GTX 1650 | 1F0A | +| NVIDIA CMP 40HX | 1F0B | | NVIDIA GeForce RTX 2070 | 1F10 | | NVIDIA GeForce RTX 2070 with Max-Q Design | 1F10 1025 132D | | NVIDIA GeForce RTX 2070 with Max-Q Design | 1F10 1025 1342 | @@ -691,6 +693,7 @@ Subsystem Device ID. | NVIDIA GeForce GTX 1660 | 2184 | | NVIDIA GeForce GTX 1650 SUPER | 2187 | | NVIDIA GeForce GTX 1650 | 2188 | +| NVIDIA CMP 30HX | 2189 | | NVIDIA GeForce GTX 1660 Ti | 2191 | | NVIDIA GeForce GTX 1660 Ti with Max-Q Design | 2191 1028 0949 | | NVIDIA GeForce GTX 1660 Ti with Max-Q Design | 2191 103C 85FB | @@ -758,9 +761,11 @@ Subsystem Device ID. | NVIDIA H200 | 2335 10DE 18BF | | NVIDIA H100 | 2339 10DE 17FC | | NVIDIA H800 NVL | 233A 10DE 183A | +| NVIDIA H200 NVL | 233B 10DE 1996 | | NVIDIA GH200 120GB | 2342 10DE 16EB | | NVIDIA GH200 120GB | 2342 10DE 1805 | | NVIDIA GH200 480GB | 2342 10DE 1809 | +| NVIDIA GH200 144G HBM3e | 2348 10DE 18D2 | | NVIDIA GeForce RTX 3060 Ti | 2414 | | NVIDIA GeForce RTX 3080 Ti Laptop GPU | 2420 | | NVIDIA RTX A5500 Laptop GPU | 2438 | @@ -831,12 +836,10 @@ Subsystem Device ID. | NVIDIA GeForce RTX 2050 | 25AD | | NVIDIA RTX A1000 | 25B0 1028 1878 | | NVIDIA RTX A1000 | 25B0 103C 1878 | -| NVIDIA RTX A1000 | 25B0 103C 8D96 | | NVIDIA RTX A1000 | 25B0 10DE 1878 | | NVIDIA RTX A1000 | 25B0 17AA 1878 | | NVIDIA RTX A400 | 25B2 1028 1879 | | NVIDIA RTX A400 | 25B2 103C 1879 | -| NVIDIA RTX A400 | 25B2 103C 8D95 | | NVIDIA RTX A400 | 25B2 10DE 1879 | | NVIDIA RTX A400 | 25B2 17AA 1879 | | NVIDIA A16 | 25B6 10DE 14A9 | diff --git a/kernel-open/Kbuild b/kernel-open/Kbuild index 8e9e17daf5..3c1ac69cc4 100644 --- a/kernel-open/Kbuild +++ b/kernel-open/Kbuild @@ -72,7 +72,7 @@ EXTRA_CFLAGS += -I$(src)/common/inc EXTRA_CFLAGS += -I$(src) EXTRA_CFLAGS += -Wall $(DEFINES) $(INCLUDES) -Wno-cast-qual -Wno-format-extra-args EXTRA_CFLAGS += -D__KERNEL__ -DMODULE -DNVRM -EXTRA_CFLAGS += -DNV_VERSION_STRING=\"560.35.03\" +EXTRA_CFLAGS += -DNV_VERSION_STRING=\"565.57.01\" ifneq ($(SYSSRCHOST1X),) EXTRA_CFLAGS += -I$(SYSSRCHOST1X) diff --git a/kernel-open/common/inc/nv-kthread-q-os.h b/kernel-open/common/inc/nv-kthread-q-os.h index 3ab3f5623d..4d7decfa6a 100644 --- a/kernel-open/common/inc/nv-kthread-q-os.h +++ b/kernel-open/common/inc/nv-kthread-q-os.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2016 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -43,6 +43,8 @@ struct nv_kthread_q atomic_t main_loop_should_exit; struct task_struct *q_kthread; + + bool is_unload_flush_ongoing; }; struct nv_kthread_q_item diff --git a/kernel-open/common/inc/nv-linux.h b/kernel-open/common/inc/nv-linux.h index 9662f1db44..c4fdd20027 100644 --- a/kernel-open/common/inc/nv-linux.h +++ b/kernel-open/common/inc/nv-linux.h @@ -724,6 +724,7 @@ static inline dma_addr_t nv_phys_to_dma(struct device *dev, NvU64 pa) #endif } +#define NV_GET_OFFSET_IN_PAGE(phys_page) offset_in_page(phys_page) #define NV_GET_PAGE_STRUCT(phys_page) virt_to_page(__va(phys_page)) #define NV_VMA_PGOFF(vma) ((vma)->vm_pgoff) #define NV_VMA_SIZE(vma) ((vma)->vm_end - (vma)->vm_start) @@ -951,14 +952,14 @@ static inline int nv_remap_page_range(struct vm_area_struct *vma, } static inline int nv_io_remap_page_range(struct vm_area_struct *vma, - NvU64 phys_addr, NvU64 size, NvU32 extra_prot) + NvU64 phys_addr, NvU64 size, NvU32 extra_prot, NvU64 start) { int ret = -1; #if !defined(NV_XEN_SUPPORT_FULLY_VIRTUALIZED_KERNEL) - ret = nv_remap_page_range(vma, vma->vm_start, phys_addr, size, + ret = nv_remap_page_range(vma, start, phys_addr, size, nv_adjust_pgprot(vma->vm_page_prot, extra_prot)); #else - ret = io_remap_pfn_range(vma, vma->vm_start, (phys_addr >> PAGE_SHIFT), + ret = io_remap_pfn_range(vma, start, (phys_addr >> PAGE_SHIFT), size, nv_adjust_pgprot(vma->vm_page_prot, extra_prot)); #endif return ret; @@ -1207,6 +1208,7 @@ typedef struct nv_alloc_s { NvBool physical : 1; NvBool unencrypted : 1; NvBool coherent : 1; + NvBool carveout : 1; } flags; unsigned int cache_type; unsigned int num_pages; @@ -1840,20 +1842,6 @@ static inline int nv_is_control_device(struct inode *inode) #endif #endif -static inline NvU64 nv_pci_bus_address(struct pci_dev *dev, NvU8 bar_index) -{ - NvU64 bus_addr = 0; -#if defined(NV_PCI_BUS_ADDRESS_PRESENT) - bus_addr = pci_bus_address(dev, bar_index); -#elif defined(CONFIG_PCI) - struct pci_bus_region region; - - pcibios_resource_to_bus(dev, ®ion, &dev->resource[bar_index]); - bus_addr = region.start; -#endif - return bus_addr; -} - /* * Decrements the usage count of the allocation, and moves the allocation to * the given nvlfp's free list if the usage count drops to zero. diff --git a/kernel-open/common/inc/nv-proto.h b/kernel-open/common/inc/nv-proto.h index 353e8a5b8d..f732458945 100644 --- a/kernel-open/common/inc/nv-proto.h +++ b/kernel-open/common/inc/nv-proto.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1999-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1999-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -59,6 +59,8 @@ NV_STATUS nv_uvm_resume (void); void nv_uvm_notify_start_device (const NvU8 *uuid); void nv_uvm_notify_stop_device (const NvU8 *uuid); NV_STATUS nv_uvm_event_interrupt (const NvU8 *uuid); +NV_STATUS nv_uvm_drain_P2P (const NvU8 *uuid); +NV_STATUS nv_uvm_resume_P2P (const NvU8 *uuid); /* Move these to nv.h once implemented by other UNIX platforms */ NvBool nvidia_get_gpuid_list (NvU32 *gpu_ids, NvU32 *gpu_count); diff --git a/kernel-open/common/inc/nv.h b/kernel-open/common/inc/nv.h index 77ecd0b4e1..424ecb2345 100644 --- a/kernel-open/common/inc/nv.h +++ b/kernel-open/common/inc/nv.h @@ -44,6 +44,7 @@ #include #include #include +#include extern nv_cap_t *nvidia_caps_root; @@ -279,8 +280,7 @@ typedef struct nv_usermap_access_params_s NvU64 offset; NvU64 *page_array; NvU64 num_pages; - NvU64 mmap_start; - NvU64 mmap_size; + MemoryArea memArea; NvU64 access_start; NvU64 access_size; NvU64 remap_prot_extra; @@ -296,8 +296,7 @@ typedef struct nv_alloc_mapping_context_s { NvU64 page_index; NvU64 *page_array; NvU64 num_pages; - NvU64 mmap_start; - NvU64 mmap_size; + MemoryArea memArea; NvU64 access_start; NvU64 access_size; NvU64 remap_prot_extra; @@ -330,7 +329,7 @@ typedef struct nv_soc_irq_info_s { NvS32 ref_count; } nv_soc_irq_info_t; -#define NV_MAX_SOC_IRQS 6 +#define NV_MAX_SOC_IRQS 10 #define NV_MAX_DPAUX_NUM_DEVICES 4 #define NV_MAX_SOC_DPAUX_NUM_DEVICES 2 @@ -535,6 +534,7 @@ typedef struct UvmGpuAddressSpaceInfo_tag *nvgpuAddressSpaceInfo_t; typedef struct UvmGpuAllocInfo_tag *nvgpuAllocInfo_t; typedef struct UvmGpuP2PCapsParams_tag *nvgpuP2PCapsParams_t; typedef struct UvmGpuFbInfo_tag *nvgpuFbInfo_t; +typedef struct UvmGpuNvlinkInfo_tag *nvgpuNvlinkInfo_t; typedef struct UvmGpuEccInfo_tag *nvgpuEccInfo_t; typedef struct UvmGpuFaultInfo_tag *nvgpuFaultInfo_t; typedef struct UvmGpuAccessCntrInfo_tag *nvgpuAccessCntrInfo_t; @@ -545,6 +545,7 @@ typedef struct UvmPmaAllocationOptions_tag *nvgpuPmaAllocationOptions_t typedef struct UvmPmaStatistics_tag *nvgpuPmaStatistics_t; typedef struct UvmGpuMemoryInfo_tag *nvgpuMemoryInfo_t; typedef struct UvmGpuExternalMappingInfo_tag *nvgpuExternalMappingInfo_t; +typedef struct UvmGpuExternalPhysAddrInfo_tag *nvgpuExternalPhysAddrInfo_t; typedef struct UvmGpuChannelResourceInfo_tag *nvgpuChannelResourceInfo_t; typedef struct UvmGpuChannelInstanceInfo_tag *nvgpuChannelInstanceInfo_t; typedef struct UvmGpuChannelResourceBindParams_tag *nvgpuChannelResourceBindParams_t; @@ -783,7 +784,7 @@ nv_state_t* NV_API_CALL nv_get_ctl_state (void); void NV_API_CALL nv_set_dma_address_size (nv_state_t *, NvU32 ); -NV_STATUS NV_API_CALL nv_alias_pages (nv_state_t *, NvU32, NvU64, NvU32, NvU32, NvU64, NvU64 *, void **); +NV_STATUS NV_API_CALL nv_alias_pages (nv_state_t *, NvU32, NvU64, NvU32, NvU32, NvU64, NvU64 *, NvBool, void **); NV_STATUS NV_API_CALL nv_alloc_pages (nv_state_t *, NvU32, NvU64, NvBool, NvU32, NvBool, NvBool, NvS32, NvU64 *, void **); NV_STATUS NV_API_CALL nv_free_pages (nv_state_t *, NvU32, NvBool, NvU32, void *); @@ -904,6 +905,9 @@ void NV_API_CALL nv_dma_release_dma_buf (nv_dma_buf_t *); void NV_API_CALL nv_schedule_uvm_isr (nv_state_t *); +NV_STATUS NV_API_CALL nv_schedule_uvm_drain_p2p (NvU8 *); +void NV_API_CALL nv_schedule_uvm_resume_p2p (NvU8 *); + NvBool NV_API_CALL nv_platform_supports_s0ix (void); NvBool NV_API_CALL nv_s2idle_pm_configured (void); @@ -1001,8 +1005,8 @@ NV_STATUS NV_API_CALL rm_p2p_put_pages_persistent(nvidia_stack_t *, void *, vo NV_STATUS NV_API_CALL rm_p2p_dma_map_pages (nvidia_stack_t *, nv_dma_device_t *, NvU8 *, NvU64, NvU32, NvU64 *, void **); NV_STATUS NV_API_CALL rm_dma_buf_dup_mem_handle (nvidia_stack_t *, nv_state_t *, NvHandle, NvHandle, NvHandle, NvHandle, void *, NvHandle, NvU64, NvU64, NvHandle *, void **); void NV_API_CALL rm_dma_buf_undup_mem_handle(nvidia_stack_t *, nv_state_t *, NvHandle, NvHandle); -NV_STATUS NV_API_CALL rm_dma_buf_map_mem_handle (nvidia_stack_t *, nv_state_t *, NvHandle, NvHandle, NvU64, NvU64, void *, nv_phys_addr_range_t **, NvU32 *); -void NV_API_CALL rm_dma_buf_unmap_mem_handle(nvidia_stack_t *, nv_state_t *, NvHandle, NvHandle, NvU64, nv_phys_addr_range_t **, NvU32); +NV_STATUS NV_API_CALL rm_dma_buf_map_mem_handle (nvidia_stack_t *, nv_state_t *, NvHandle, NvHandle, MemoryRange, void *, NvBool, MemoryArea *); +void NV_API_CALL rm_dma_buf_unmap_mem_handle(nvidia_stack_t *, nv_state_t *, NvHandle, NvHandle, void *, NvBool, MemoryArea); NV_STATUS NV_API_CALL rm_dma_buf_get_client_and_device(nvidia_stack_t *, nv_state_t *, NvHandle, NvHandle, NvHandle *, NvHandle *, NvHandle *, void **, NvBool *); void NV_API_CALL rm_dma_buf_put_client_and_device(nvidia_stack_t *, nv_state_t *, NvHandle, NvHandle, NvHandle, void *); NV_STATUS NV_API_CALL rm_log_gpu_crash (nv_stack_t *, nv_state_t *); diff --git a/kernel-open/common/inc/nv_uvm_interface.h b/kernel-open/common/inc/nv_uvm_interface.h index 0374103452..d84a496a5e 100644 --- a/kernel-open/common/inc/nv_uvm_interface.h +++ b/kernel-open/common/inc/nv_uvm_interface.h @@ -1085,6 +1085,22 @@ NV_STATUS nvUvmInterfaceRegisterUvmCallbacks(struct UvmOpsUvmEvents *importedUvm // void nvUvmInterfaceDeRegisterUvmOps(void); +/******************************************************************************* + nvUvmInterfaceGetNvlinkInfo + + Gets NVLINK information from RM. + + Arguments: + device[IN] - GPU device handle + nvlinkInfo [OUT] - Pointer to NvlinkInfo structure + + Error codes: + NV_ERROR + NV_ERR_INVALID_ARGUMENT +*/ +NV_STATUS nvUvmInterfaceGetNvlinkInfo(uvmGpuDeviceHandle device, + UvmGpuNvlinkInfo *nvlinkInfo); + /******************************************************************************* nvUvmInterfaceP2pObjectCreate @@ -1161,6 +1177,48 @@ NV_STATUS nvUvmInterfaceGetExternalAllocPtes(uvmGpuAddressSpaceHandle vaSpace, NvU64 size, UvmGpuExternalMappingInfo *gpuExternalMappingInfo); +/******************************************************************************* + nvUvmInterfaceGetExternalAllocPhysAddrs + + The interface builds the RM physical addrs using the provided input parameters. + + Arguments: + vaSpace[IN] - vaSpace handle. + hMemory[IN] - Memory handle. + offset [IN] - Offset from the beginning of the allocation + where PTE mappings should begin. + Should be aligned with mappingPagesize + in gpuExternalMappingInfo associated + with the allocation. + size [IN] - Length of the allocation for which PhysAddrs + should be built. + Should be aligned with mappingPagesize + in gpuExternalMappingInfo associated + with the allocation. + size = 0 will be interpreted as the total size + of the allocation. + gpuExternalMappingInfo[IN/OUT] - See nv_uvm_types.h for more information. + + Error codes: + NV_ERR_INVALID_ARGUMENT - Invalid parameter/s is passed. + NV_ERR_INVALID_OBJECT_HANDLE - Invalid memory handle is passed. + NV_ERR_NOT_SUPPORTED - Functionality is not supported (see comments in nv_gpu_ops.c) + NV_ERR_INVALID_BASE - offset is beyond the allocation size + NV_ERR_INVALID_LIMIT - (offset + size) is beyond the allocation size. + NV_ERR_BUFFER_TOO_SMALL - gpuExternalMappingInfo.physAddrBufferSize is insufficient to + store single physAddr. + NV_ERR_NOT_READY - Returned when querying the physAddrs requires a deferred setup + which has not yet completed. It is expected that the caller + will reattempt the call until a different code is returned. + As an example, multi-node systems which require querying + physAddrs from the Fabric Manager may return this code. +*/ +NV_STATUS nvUvmInterfaceGetExternalAllocPhysAddrs(uvmGpuAddressSpaceHandle vaSpace, + NvHandle hMemory, + NvU64 offset, + NvU64 size, + UvmGpuExternalPhysAddrInfo *gpuExternalPhysAddrsInfo); + /******************************************************************************* nvUvmInterfaceRetainChannel @@ -1462,6 +1520,16 @@ NV_STATUS nvUvmInterfacePagingChannelPushStream(UvmGpuPagingChannelHandle channe char *methodStream, NvU32 methodStreamSize); +/******************************************************************************* + nvUvmInterfaceReportFatalError + + Reports a global fatal error so RM can inform the clients that a node reboot + is necessary to recover from this error. This function can be called from + any lock environment, bottom half or non-interrupt context. + +*/ +void nvUvmInterfaceReportFatalError(NV_STATUS error); + /******************************************************************************* Cryptography Services Library (CSL) Interface */ diff --git a/kernel-open/common/inc/nv_uvm_types.h b/kernel-open/common/inc/nv_uvm_types.h index aceb7cf4b5..be3164d1a5 100644 --- a/kernel-open/common/inc/nv_uvm_types.h +++ b/kernel-open/common/inc/nv_uvm_types.h @@ -543,6 +543,36 @@ typedef struct UvmGpuExternalMappingInfo_tag NvU32 pteSize; } UvmGpuExternalMappingInfo; +typedef struct UvmGpuExternalPhysAddrInfo_tag +{ + // In: Virtual permissions. Returns + // NV_ERR_INVALID_ACCESS_TYPE if input is + // inaccurate + UvmRmGpuMappingType mappingType; + + // In: Size of the buffer to store PhysAddrs (in bytes). + NvU64 physAddrBufferSize; + + // In: Page size for mapping + // If this field is passed as 0, the page size + // of the allocation is used for mapping. + // nvUvmInterfaceGetExternalAllocPtes must pass + // this field as zero. + NvU64 mappingPageSize; + + // In: Pointer to a buffer to store PhysAddrs. + // Out: The interface will fill the buffer with PhysAddrs + NvU64 *physAddrBuffer; + + // Out: Number of PhysAddrs filled in to the buffer. + NvU64 numWrittenPhysAddrs; + + // Out: Number of PhysAddrs remaining to be filled + // if the buffer is not sufficient to accommodate + // requested PhysAddrs. + NvU64 numRemainingPhysAddrs; +} UvmGpuExternalPhysAddrInfo; + typedef struct UvmGpuP2PCapsParams_tag { // Out: peerId[i] contains gpu[i]'s peer id of gpu[1 - i]. Only defined if @@ -660,6 +690,9 @@ typedef struct UvmGpuInfo_tag // Maximum number of TPCs per GPC NvU32 maxTpcPerGpcCount; + // Number of access counter buffers. + NvU32 accessCntrBufferCount; + // NV_TRUE if SMC is enabled on this GPU. NvBool smcEnabled; @@ -721,10 +754,12 @@ typedef struct UvmGpuFbInfo_tag // RM regions that are not registered with PMA either. NvU64 maxAllocatableAddress; - NvU32 heapSize; // RAM in KB available for user allocations - NvU32 reservedHeapSize; // RAM in KB reserved for internal RM allocation - NvBool bZeroFb; // Zero FB mode enabled. - NvU64 maxVidmemPageSize; // Largest GPU page size to access vidmem. + NvU32 heapSize; // RAM in KB available for user allocations + NvU32 reservedHeapSize; // RAM in KB reserved for internal RM allocation + NvBool bZeroFb; // Zero FB mode enabled. + NvU64 maxVidmemPageSize; // Largest GPU page size to access vidmem. + NvBool bStaticBar1Enabled; // Static BAR1 mode is enabled + NvU64 staticBar1Size; // The size of the static mapping } UvmGpuFbInfo; typedef struct UvmGpuEccInfo_tag @@ -736,6 +771,15 @@ typedef struct UvmGpuEccInfo_tag NvBool bEccEnabled; } UvmGpuEccInfo; +typedef struct UvmGpuNvlinkInfo_tag +{ + unsigned nvlinkMask; + unsigned nvlinkOffset; + void *nvlinkReadLocation; + NvBool *nvlinkErrorNotifier; + NvBool bNvlinkRecoveryEnabled; +} UvmGpuNvlinkInfo; + typedef struct UvmPmaAllocationOptions_tag { NvU32 flags; @@ -852,6 +896,41 @@ typedef NV_STATUS (*uvmEventIsrTopHalf_t) (const NvProcessorUuid *pGpuUuidStruct typedef void (*uvmEventIsrTopHalf_t) (void); #endif +/******************************************************************************* + uvmEventDrainP2P + This function will be called by the GPU driver to signal to UVM that the + GPU has encountered an uncontained error, and all peer work must be drained + to recover. When it is called, the following assumptions/guarantees are + valid/made: + + * Impacted user channels have been preempted and disabled + * UVM channels are still running normally and will continue to do + so unless an unrecoverable error is hit on said channels + * UVM must not return from this function until all enqueued work on + * peer channels has drained + * In the context of this function call, RM will still service faults + * UVM must prevent new peer work from being enqueued until the + uvmEventResumeP2P callback is issued + + Returns: + NV_OK if UVM has idled peer work and will prevent new peer workloads. + NV_ERR_TIMEOUT if peer work was unable to be drained within a timeout + XXX NV_ERR_* for any other failure (TBD) + +*/ +typedef NV_STATUS (*uvmEventDrainP2P_t) (const NvProcessorUuid *pGpuUuidStruct); + +/******************************************************************************* + uvmEventResumeP2P + This function will be called by the GPU driver to signal to UVM that the + GPU has recovered from the previously reported uncontained NVLINK error. + When it is called, the following assumptions/guarantees are valid/made: + + * UVM is again allowed to enqueue peer work + * UVM channels are still running normally +*/ +typedef NV_STATUS (*uvmEventResumeP2P_t) (const NvProcessorUuid *pGpuUuidStruct); + struct UvmOpsUvmEvents { uvmEventSuspend_t suspend; @@ -864,6 +943,8 @@ struct UvmOpsUvmEvents uvmEventWddmRestartAfterTimeout_t wddmRestartAfterTimeout; uvmEventServiceInterrupt_t serviceInterrupt; #endif + uvmEventDrainP2P_t drainP2P; + uvmEventResumeP2P_t resumeP2P; }; #define UVM_CSL_SIGN_AUTH_TAG_SIZE_BYTES 32 @@ -1071,11 +1152,13 @@ typedef UvmGpuAccessCntrConfig gpuAccessCntrConfig; typedef UvmGpuFaultInfo gpuFaultInfo; typedef UvmGpuMemoryInfo gpuMemoryInfo; typedef UvmGpuExternalMappingInfo gpuExternalMappingInfo; +typedef UvmGpuExternalPhysAddrInfo gpuExternalPhysAddrInfo; typedef UvmGpuChannelResourceInfo gpuChannelResourceInfo; typedef UvmGpuChannelInstanceInfo gpuChannelInstanceInfo; typedef UvmGpuChannelResourceBindParams gpuChannelResourceBindParams; typedef UvmGpuFbInfo gpuFbInfo; typedef UvmGpuEccInfo gpuEccInfo; +typedef UvmGpuNvlinkInfo gpuNvlinkInfo; typedef UvmGpuPagingChannel *gpuPagingChannelHandle; typedef UvmGpuPagingChannelInfo gpuPagingChannelInfo; typedef UvmGpuPagingChannelAllocParams gpuPagingChannelAllocParams; diff --git a/kernel-open/common/inc/nvkms-api-types.h b/kernel-open/common/inc/nvkms-api-types.h index 4f5bd787b2..34e4ab2350 100644 --- a/kernel-open/common/inc/nvkms-api-types.h +++ b/kernel-open/common/inc/nvkms-api-types.h @@ -50,6 +50,8 @@ #define NVKMS_LOG2_LUT_ARRAY_SIZE 10 #define NVKMS_LUT_ARRAY_SIZE (1 << NVKMS_LOG2_LUT_ARRAY_SIZE) +#define NVKMS_OLUT_FP_NORM_SCALE_DEFAULT 0xffffffff + typedef NvU32 NvKmsDeviceHandle; typedef NvU32 NvKmsDispHandle; typedef NvU32 NvKmsConnectorHandle; @@ -245,6 +247,80 @@ struct NvKmsLutRamps { NvU16 blue[NVKMS_LUT_ARRAY_SIZE]; /*! in */ }; +/* Datatypes for LUT capabilities */ +enum NvKmsLUTFormat { + /* + * Normalized fixed-point format mapping [0, 1] to [0x0, 0xFFFF]. + */ + NVKMS_LUT_FORMAT_UNORM16, + + /* + * Half-precision floating point. + */ + NVKMS_LUT_FORMAT_FP16, + + /* + * 14-bit fixed-point format required to work around hardware bug 813188. + * + * To convert from UNORM16 to UNORM14_WAR_813188: + * unorm14_war_813188 = ((unorm16 >> 2) & ~7) + 0x6000 + */ + NVKMS_LUT_FORMAT_UNORM14_WAR_813188 +}; + +enum NvKmsLUTVssSupport { + NVKMS_LUT_VSS_NOT_SUPPORTED, + NVKMS_LUT_VSS_SUPPORTED, + NVKMS_LUT_VSS_REQUIRED, +}; + +enum NvKmsLUTVssType { + NVKMS_LUT_VSS_TYPE_NONE, + NVKMS_LUT_VSS_TYPE_LINEAR, + NVKMS_LUT_VSS_TYPE_LOGARITHMIC, +}; + +struct NvKmsLUTCaps { + /*! Whether this layer or head on this device supports this LUT stage. */ + NvBool supported; + + /*! Whether this LUT supports VSS. */ + enum NvKmsLUTVssSupport vssSupport; + + /*! + * The type of VSS segmenting this LUT uses. + */ + enum NvKmsLUTVssType vssType; + + /*! + * Expected number of VSS segments. + */ + NvU32 vssSegments; + + /*! + * Expected number of LUT entries. + */ + NvU32 lutEntries; + + /*! + * Format for each of the LUT entries. + */ + enum NvKmsLUTFormat entryFormat; +}; + +/* each LUT entry uses this many bytes */ +#define NVKMS_LUT_CAPS_LUT_ENTRY_SIZE (4 * sizeof(NvU16)) + +/* if the LUT surface uses VSS, size of the VSS header */ +#define NVKMS_LUT_VSS_HEADER_SIZE (4 * NVKMS_LUT_CAPS_LUT_ENTRY_SIZE) + +struct NvKmsLUTSurfaceParams { + NvKmsSurfaceHandle surfaceHandle; + NvU64 offset NV_ALIGN_BYTES(8); + NvU32 vssSegments; + NvU32 lutEntries; +}; + /* * A 3x4 row-major colorspace conversion matrix. * @@ -463,6 +539,10 @@ struct NvKmsLayerCapabilities { * still expected to honor the NvKmsUsageBounds for each head. */ NvU64 supportedSurfaceMemoryFormats NV_ALIGN_BYTES(8); + + /* Capabilities for each LUT stage in the EVO3 precomp pipeline. */ + struct NvKmsLUTCaps ilut; + struct NvKmsLUTCaps tmo; }; /*! @@ -683,4 +763,20 @@ struct NvKmsSuperframeInfo { } view[NVKMS_MAX_SUPERFRAME_VIEWS]; }; +/* Fields within NvKmsVblankSemControlDataOneHead::flags */ +#define NVKMS_VBLANK_SEM_CONTROL_SWAP_INTERVAL 15:0 + +struct NvKmsVblankSemControlDataOneHead { + NvU32 requestCounterAccel; + NvU32 requestCounter; + NvU32 flags; + + NvU32 semaphore; + NvU64 vblankCount NV_ALIGN_BYTES(8); +}; + +struct NvKmsVblankSemControlData { + struct NvKmsVblankSemControlDataOneHead head[NV_MAX_HEADS]; +}; + #endif /* NVKMS_API_TYPES_H */ diff --git a/kernel-open/common/inc/nvkms-kapi.h b/kernel-open/common/inc/nvkms-kapi.h index 4d740bbe4e..309d60699a 100644 --- a/kernel-open/common/inc/nvkms-kapi.h +++ b/kernel-open/common/inc/nvkms-kapi.h @@ -124,6 +124,14 @@ struct NvKmsKapiDisplayMode { #define NVKMS_KAPI_LAYER_INVALID_IDX 0xff #define NVKMS_KAPI_LAYER_PRIMARY_IDX 0 +struct NvKmsKapiLutCaps { + struct { + struct NvKmsLUTCaps ilut; + struct NvKmsLUTCaps tmo; + } layer[NVKMS_KAPI_LAYER_MAX]; + struct NvKmsLUTCaps olut; +}; + struct NvKmsKapiDeviceResourcesInfo { NvU32 numHeads; @@ -169,6 +177,8 @@ struct NvKmsKapiDeviceResourcesInfo { NvU64 supportedSurfaceMemoryFormats[NVKMS_KAPI_LAYER_MAX]; NvBool supportsICtCp[NVKMS_KAPI_LAYER_MAX]; + + struct NvKmsKapiLutCaps lutCaps; }; #define NVKMS_KAPI_LAYER_MASK(layerType) (1 << (layerType)) @@ -262,21 +272,54 @@ struct NvKmsKapiLayerConfig { NvU16 dstWidth, dstHeight; enum NvKmsInputColorSpace inputColorSpace; + + struct { + NvBool enabled; + struct NvKmsKapiSurface *lutSurface; + NvU64 offset; + NvU32 vssSegments; + NvU32 lutEntries; + } ilut; + + struct { + NvBool enabled; + struct NvKmsKapiSurface *lutSurface; + NvU64 offset; + NvU32 vssSegments; + NvU32 lutEntries; + } tmo; + struct NvKmsCscMatrix csc; NvBool cscUseMain; + + struct { + struct NvKmsCscMatrix lmsCtm; + struct NvKmsCscMatrix lmsToItpCtm; + struct NvKmsCscMatrix itpToLmsCtm; + struct NvKmsCscMatrix blendCtm; + struct { + NvBool lmsCtm : 1; + NvBool lmsToItpCtm : 1; + NvBool itpToLmsCtm : 1; + NvBool blendCtm : 1; + } enabled; + } matrixOverrides; }; struct NvKmsKapiLayerRequestedConfig { struct NvKmsKapiLayerConfig config; struct { - NvBool surfaceChanged : 1; - NvBool srcXYChanged : 1; - NvBool srcWHChanged : 1; - NvBool dstXYChanged : 1; - NvBool dstWHChanged : 1; - NvBool cscChanged : 1; - NvBool tfChanged : 1; - NvBool hdrMetadataChanged : 1; + NvBool surfaceChanged : 1; + NvBool srcXYChanged : 1; + NvBool srcWHChanged : 1; + NvBool dstXYChanged : 1; + NvBool dstWHChanged : 1; + NvBool cscChanged : 1; + NvBool tfChanged : 1; + NvBool hdrMetadataChanged : 1; + NvBool matrixOverridesChanged : 1; + NvBool ilutChanged : 1; + NvBool tmoChanged : 1; } flags; }; @@ -342,18 +385,30 @@ struct NvKmsKapiHeadModeSetConfig { struct NvKmsLutRamps *pRamps; } output; } lut; + + struct { + NvBool enabled; + struct NvKmsKapiSurface *lutSurface; + NvU64 offset; + NvU32 vssSegments; + NvU32 lutEntries; + } olut; + + NvU32 olutFpNormScale; }; struct NvKmsKapiHeadRequestedConfig { struct NvKmsKapiHeadModeSetConfig modeSetConfig; struct { - NvBool activeChanged : 1; - NvBool displaysChanged : 1; - NvBool modeChanged : 1; - NvBool hdrInfoFrameChanged : 1; - NvBool colorimetryChanged : 1; - NvBool ilutChanged : 1; - NvBool olutChanged : 1; + NvBool activeChanged : 1; + NvBool displaysChanged : 1; + NvBool modeChanged : 1; + NvBool hdrInfoFrameChanged : 1; + NvBool colorimetryChanged : 1; + NvBool legacyIlutChanged : 1; + NvBool legacyOlutChanged : 1; + NvBool olutChanged : 1; + NvBool olutFpNormScaleChanged : 1; } flags; struct NvKmsKapiCursorRequestedConfig cursorRequestedConfig; @@ -1172,21 +1227,6 @@ struct NvKmsKapiFunctionsTable { NvU64 *pPages ); - /*! - * Check if this memory object can be scanned out for display. - * - * \param [in] device A device allocated using allocateDevice(). - * - * \param [in] memory The memory object to check for display support. - * - * \return NV_TRUE if this memory can be displayed, NV_FALSE if not. - */ - NvBool (*isMemoryValidForDisplay) - ( - const struct NvKmsKapiDevice *device, - const struct NvKmsKapiMemory *memory - ); - /* * Import SGT as a memory handle. * @@ -1504,6 +1544,16 @@ struct NvKmsKapiFunctionsTable { struct NvKmsKapiDevice *device, NvS32 index ); + + /* + * Notify NVKMS that the system's framebuffer console has been disabled and + * the reserved allocation for the old framebuffer console can be unmapped. + */ + void + (*framebufferConsoleDisabled) + ( + struct NvKmsKapiDevice *device + ); }; /** @} */ @@ -1518,6 +1568,20 @@ NvBool nvKmsKapiGetFunctionsTable struct NvKmsKapiFunctionsTable *funcsTable ); +NvU32 nvKmsKapiF16ToF32(NvU16 a); + +NvU16 nvKmsKapiF32ToF16(NvU32 a); + +NvU32 nvKmsKapiF32Mul(NvU32 a, NvU32 b); + +NvU32 nvKmsKapiF32Div(NvU32 a, NvU32 b); + +NvU32 nvKmsKapiF32Add(NvU32 a, NvU32 b); + +NvU32 nvKmsKapiF32ToUI32RMinMag(NvU32 a, NvBool exact); + +NvU32 nvKmsKapiUI32ToF32(NvU32 a); + /** @} */ #endif /* defined(__NVKMS_KAPI_H__) */ diff --git a/kernel-open/common/inc/nvlimits.h b/kernel-open/common/inc/nvlimits.h index 619c749c7e..e7fad3f30c 100644 --- a/kernel-open/common/inc/nvlimits.h +++ b/kernel-open/common/inc/nvlimits.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2017 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2017-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -34,19 +34,25 @@ /* * This is the maximum number of GPUs supported in a single system. */ -#define NV_MAX_DEVICES 32 +#define NV_MAX_DEVICES 32 /* * This is the maximum number of subdevices within a single device. */ -#define NV_MAX_SUBDEVICES 8 +#define NV_MAX_SUBDEVICES 8 /* * This is the maximum length of the process name string. */ -#define NV_PROC_NAME_MAX_LENGTH 100U +#define NV_PROC_NAME_MAX_LENGTH 100U /* * This is the maximum number of heads per GPU. */ -#define NV_MAX_HEADS 4 +#define NV_MAX_HEADS 4 + +/* + * Maximum length of a MIG device UUID. It is a 36-byte UUID string plus a + * 4-byte prefix and NUL terminator: 'M' 'I' 'G' '-' UUID '\0x0' + */ +#define NV_MIG_DEVICE_UUID_STR_LENGTH 41U diff --git a/kernel-open/common/inc/nvmisc.h b/kernel-open/common/inc/nvmisc.h index 1c93d75794..ffaa7cea81 100644 --- a/kernel-open/common/inc/nvmisc.h +++ b/kernel-open/common/inc/nvmisc.h @@ -721,6 +721,42 @@ nvPrevPow2_U64(const NvU64 x ) } \ } +// +// Bug 4851259: Newly added functions must be hidden from certain HS-signed +// ucode compilers to avoid signature mismatch. +// +#ifndef NVDEC_1_0 +/*! + * Returns the position of nth set bit in the given mask. + * + * Returns -1 if mask has fewer than n bits set. + * + * n is 0 indexed and has valid values 0..31 inclusive, so "zeroth" set bit is + * the first set LSB. + * + * Example, if mask = 0x000000F0u and n = 1, the return value will be 5. + * Example, if mask = 0x000000F0u and n = 4, the return value will be -1. + */ +static NV_FORCEINLINE NvS32 +nvGetNthSetBitIndex32(NvU32 mask, NvU32 n) +{ + NvU32 seenSetBitsCount = 0; + NvS32 index; + FOR_EACH_INDEX_IN_MASK(32, index, mask) + { + if (seenSetBitsCount == n) + { + return index; + } + ++seenSetBitsCount; + } + FOR_EACH_INDEX_IN_MASK_END; + + return -1; +} + +#endif // NVDEC_1_0 + // // Size to use when declaring variable-sized arrays // diff --git a/kernel-open/common/inc/os-interface.h b/kernel-open/common/inc/os-interface.h index a2bbcab80a..9d5ac0a466 100644 --- a/kernel-open/common/inc/os-interface.h +++ b/kernel-open/common/inc/os-interface.h @@ -40,8 +40,11 @@ #include "nv_stdarg.h" #include #include +#include #include +#include "rs_access.h" + typedef struct @@ -102,8 +105,10 @@ NvBool NV_API_CALL os_pci_remove_supported (void); void NV_API_CALL os_pci_remove (void *); void* NV_API_CALL os_map_kernel_space (NvU64, NvU64, NvU32); void NV_API_CALL os_unmap_kernel_space (void *, NvU64); -void* NV_API_CALL os_map_user_space (NvU64, NvU64, NvU32, NvU32, void **); +#if defined(NV_VMWARE) +void* NV_API_CALL os_map_user_space (MemoryArea *, NvU32, NvU32, void **); void NV_API_CALL os_unmap_user_space (void *, NvU64, void *); +#endif NV_STATUS NV_API_CALL os_flush_cpu_cache_all (void); NV_STATUS NV_API_CALL os_flush_user_cache (void); void NV_API_CALL os_flush_cpu_write_combine_buffer(void); @@ -114,7 +119,7 @@ void NV_API_CALL os_io_write_byte (NvU32, NvU8); void NV_API_CALL os_io_write_word (NvU32, NvU16); void NV_API_CALL os_io_write_dword (NvU32, NvU32); NvBool NV_API_CALL os_is_administrator (void); -NvBool NV_API_CALL os_allow_priority_override (void); +NvBool NV_API_CALL os_check_access (RsAccessRight accessRight); void NV_API_CALL os_dbg_init (void); void NV_API_CALL os_dbg_breakpoint (void); void NV_API_CALL os_dbg_set_level (NvU32); @@ -130,7 +135,8 @@ void NV_API_CALL os_free_spinlock (void *); NvU64 NV_API_CALL os_acquire_spinlock (void *); void NV_API_CALL os_release_spinlock (void *, NvU64); NV_STATUS NV_API_CALL os_queue_work_item (struct os_work_queue *, void *); -NV_STATUS NV_API_CALL os_flush_work_queue (struct os_work_queue *); +NV_STATUS NV_API_CALL os_flush_work_queue (struct os_work_queue *, NvBool); +NvBool NV_API_CALL os_is_queue_flush_ongoing (struct os_work_queue *); NV_STATUS NV_API_CALL os_alloc_mutex (void **); void NV_API_CALL os_free_mutex (void *); NV_STATUS NV_API_CALL os_acquire_mutex (void *); @@ -219,6 +225,8 @@ extern NvU32 os_page_size; extern NvU64 os_page_mask; extern NvU8 os_page_shift; extern NvBool os_cc_enabled; +extern NvBool os_cc_sev_snp_enabled; +extern NvBool os_cc_snp_vtom_enabled; extern NvBool os_cc_tdx_enabled; extern NvBool os_dma_buf_enabled; extern NvBool os_imex_channel_is_supported; diff --git a/kernel-open/common/inc/os/nv_memory_area.h b/kernel-open/common/inc/os/nv_memory_area.h index 1d55366356..55d7fb0920 100644 --- a/kernel-open/common/inc/os/nv_memory_area.h +++ b/kernel-open/common/inc/os/nv_memory_area.h @@ -36,4 +36,69 @@ typedef struct MemoryArea NvU64 numRanges; } MemoryArea; +static inline NvU64 memareaSize(MemoryArea memArea) +{ + NvU64 size = 0; + NvU64 idx = 0; + for (idx = 0; idx < memArea.numRanges; idx++) + { + size += memArea.pRanges[idx].size; + } + return size; +} + +static inline MemoryRange +mrangeMake +( + NvU64 start, + NvU64 size +) +{ + MemoryRange range; + range.start = start; + range.size = size; + return range; +} + +static inline NvU64 +mrangeLimit +( + MemoryRange a +) +{ + return a.start + a.size; +} + +static inline NvBool +mrangeIntersects +( + MemoryRange a, + MemoryRange b +) +{ + return ((a.start >= b.start) && (a.start < mrangeLimit(b))) || + ((b.start >= a.start) && (b.start < mrangeLimit(a))); +} + +static inline NvBool +mrangeContains +( + MemoryRange outer, + MemoryRange inner +) +{ + return (inner.start >= outer.start) && (mrangeLimit(inner) <= mrangeLimit(outer)); +} + +static inline MemoryRange +mrangeOffset +( + MemoryRange range, + NvU64 amt +) +{ + range.start += amt; + return range; +} + #endif /* NV_MEMORY_AREA_H */ diff --git a/kernel-open/common/inc/rm-gpu-ops.h b/kernel-open/common/inc/rm-gpu-ops.h index 69cc57dd09..2a9d6e595c 100644 --- a/kernel-open/common/inc/rm-gpu-ops.h +++ b/kernel-open/common/inc/rm-gpu-ops.h @@ -85,9 +85,11 @@ NV_STATUS NV_API_CALL rm_gpu_ops_enable_access_cntr(nvidia_stack_t *, nvgpuDevi NV_STATUS NV_API_CALL rm_gpu_ops_disable_access_cntr(nvidia_stack_t *, nvgpuDeviceHandle_t, nvgpuAccessCntrInfo_t); NV_STATUS NV_API_CALL rm_gpu_ops_set_page_directory (nvidia_stack_t *, nvgpuAddressSpaceHandle_t, NvU64, unsigned, NvBool, NvU32); NV_STATUS NV_API_CALL rm_gpu_ops_unset_page_directory (nvidia_stack_t *, nvgpuAddressSpaceHandle_t); +NV_STATUS NV_API_CALL rm_gpu_ops_get_nvlink_info(nvidia_stack_t *, nvgpuDeviceHandle_t, nvgpuNvlinkInfo_t); NV_STATUS NV_API_CALL rm_gpu_ops_p2p_object_create(nvidia_stack_t *, nvgpuDeviceHandle_t, nvgpuDeviceHandle_t, NvHandle *); void NV_API_CALL rm_gpu_ops_p2p_object_destroy(nvidia_stack_t *, nvgpuSessionHandle_t, NvHandle); NV_STATUS NV_API_CALL rm_gpu_ops_get_external_alloc_ptes(nvidia_stack_t*, nvgpuAddressSpaceHandle_t, NvHandle, NvU64, NvU64, nvgpuExternalMappingInfo_t); +NV_STATUS NV_API_CALL rm_gpu_ops_get_external_alloc_phys_addrs(nvidia_stack_t*, nvgpuAddressSpaceHandle_t, NvHandle, NvU64, NvU64, nvgpuExternalPhysAddrInfo_t); NV_STATUS NV_API_CALL rm_gpu_ops_retain_channel(nvidia_stack_t *, nvgpuAddressSpaceHandle_t, NvHandle, NvHandle, void **, nvgpuChannelInstanceInfo_t); NV_STATUS NV_API_CALL rm_gpu_ops_bind_channel_resources(nvidia_stack_t *, void *, nvgpuChannelResourceBindParams_t); void NV_API_CALL rm_gpu_ops_release_channel(nvidia_stack_t *, void *); @@ -100,6 +102,7 @@ void NV_API_CALL rm_gpu_ops_paging_channel_destroy(nvidia_stack_t *, nvgpu NV_STATUS NV_API_CALL rm_gpu_ops_paging_channels_map(nvidia_stack_t *, nvgpuAddressSpaceHandle_t, NvU64, nvgpuDeviceHandle_t, NvU64 *); void NV_API_CALL rm_gpu_ops_paging_channels_unmap(nvidia_stack_t *, nvgpuAddressSpaceHandle_t, NvU64, nvgpuDeviceHandle_t); NV_STATUS NV_API_CALL rm_gpu_ops_paging_channel_push_stream(nvidia_stack_t *, nvgpuPagingChannelHandle_t, char *, NvU32); +void NV_API_CALL rm_gpu_ops_report_fatal_error(nvidia_stack_t *, NV_STATUS error); NV_STATUS NV_API_CALL rm_gpu_ops_ccsl_context_init(nvidia_stack_t *, struct ccslContext_t **, nvgpuChannelHandle_t); NV_STATUS NV_API_CALL rm_gpu_ops_ccsl_context_clear(nvidia_stack_t *, struct ccslContext_t *); diff --git a/kernel-open/common/inc/rs_access.h b/kernel-open/common/inc/rs_access.h new file mode 100644 index 0000000000..221fd1ed44 --- /dev/null +++ b/kernel-open/common/inc/rs_access.h @@ -0,0 +1,276 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#pragma once + +#include +#if defined(_MSC_VER) +#pragma warning(disable:4324) +#endif + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: rs_access.finn +// + + + + +#include "nvtypes.h" +#include "nvmisc.h" + + +/****************************************************************************/ +/* Access right definitions */ +/****************************************************************************/ + +// +// The meaning of each access right is documented in +// resman/docs/rmapi/resource_server/rm_capabilities.adoc +// +// RS_ACCESS_COUNT is the number of access rights that have been defined +// and are in use. All integers in the range [0, RS_ACCESS_COUNT) should +// represent valid access rights. +// +// When adding a new access right, don't forget to update +// 1) The descriptions in the resman/docs/rmapi/resource_server/rm_capabilities.adoc +// 2) RS_ACCESS_COUNT, defined below +// 3) The declaration of g_rsAccessMetadata in rs_access_rights.c +// 4) The list of access rights in drivers/common/chip-config/Chipcontrols.pm +// 5) Any relevant access right callbacks +// + +#define RS_ACCESS_DUP_OBJECT 0U +#define RS_ACCESS_NICE 1U +#define RS_ACCESS_DEBUG 2U +#define RS_ACCESS_PERFMON 3U +#define RS_ACCESS_COUNT 4U + + +/****************************************************************************/ +/* Access right data structures */ +/****************************************************************************/ + +/*! + * @brief A type that can be used to represent any access right. + */ +typedef NvU16 RsAccessRight; + +/*! + * @brief An internal type used to represent one limb in an access right mask. + */ +typedef NvU32 RsAccessLimb; +#define SDK_RS_ACCESS_LIMB_BITS 32 + +/*! + * @brief The number of limbs in the RS_ACCESS_MASK struct. + */ +#define SDK_RS_ACCESS_MAX_LIMBS 1 + +/*! + * @brief The maximum number of possible access rights supported by the + * current data structure definition. + * + * You probably want RS_ACCESS_COUNT instead, which is the number of actual + * access rights defined. + */ +#define SDK_RS_ACCESS_MAX_COUNT (0x20) /* finn: Evaluated from "(SDK_RS_ACCESS_LIMB_BITS * SDK_RS_ACCESS_MAX_LIMBS)" */ + +/** + * @brief A struct representing a set of access rights. + * + * Note that the values of bit positions larger than RS_ACCESS_COUNT is + * undefined, and should not be assumed to be 0 (see RS_ACCESS_MASK_FILL). + */ +typedef struct RS_ACCESS_MASK { + RsAccessLimb limbs[SDK_RS_ACCESS_MAX_LIMBS]; +} RS_ACCESS_MASK; + +/** + * @brief A struct representing auxiliary information about each access right. + */ +typedef struct RS_ACCESS_INFO { + NvU32 flags; +} RS_ACCESS_INFO; + + +/****************************************************************************/ +/* Access right macros */ +/****************************************************************************/ + +#define SDK_RS_ACCESS_LIMB_INDEX(index) ((index) / SDK_RS_ACCESS_LIMB_BITS) +#define SDK_RS_ACCESS_LIMB_POS(index) ((index) % SDK_RS_ACCESS_LIMB_BITS) + +#define SDK_RS_ACCESS_LIMB_ELT(pAccessMask, index) \ + ((pAccessMask)->limbs[SDK_RS_ACCESS_LIMB_INDEX(index)]) +#define SDK_RS_ACCESS_OFFSET_MASK(index) \ + NVBIT_TYPE(SDK_RS_ACCESS_LIMB_POS(index), RsAccessLimb) + +/*! + * @brief Checks that accessRight represents a valid access right. + * + * The valid range of access rights is [0, RS_ACCESS_COUNT). + * + * @param[in] accessRight The access right value to check + * + * @return true if accessRight is valid + * @return false otherwise + */ +#define RS_ACCESS_BOUNDS_CHECK(accessRight) \ + (accessRight < RS_ACCESS_COUNT) + +/*! + * @brief Test whether an access right is present in a set + * + * @param[in] pAccessMask The set of access rights to read + * @param[in] index The access right to examine + * + * @return NV_TRUE if the access right specified by index was present in the set, + * and NV_FALSE otherwise + */ +#define RS_ACCESS_MASK_TEST(pAccessMask, index) \ + (RS_ACCESS_BOUNDS_CHECK(index) && \ + (SDK_RS_ACCESS_LIMB_ELT(pAccessMask, index) & SDK_RS_ACCESS_OFFSET_MASK(index)) != 0) + +/*! + * @brief Add an access right to a mask + * + * @param[in] pAccessMask The set of access rights to modify + * @param[in] index The access right to set + */ +#define RS_ACCESS_MASK_ADD(pAccessMask, index) \ + do \ + { \ + if (RS_ACCESS_BOUNDS_CHECK(index)) { \ + SDK_RS_ACCESS_LIMB_ELT(pAccessMask, index) |= SDK_RS_ACCESS_OFFSET_MASK(index); \ + } \ + } while (NV_FALSE) + +/*! + * @brief Remove an access right from a mask + * + * @param[in] pAccessMask The set of access rights to modify + * @param[in] index The access right to unset + */ +#define RS_ACCESS_MASK_REMOVE(pAccessMask, index) \ + do \ + { \ + if (RS_ACCESS_BOUNDS_CHECK(index)) { \ + SDK_RS_ACCESS_LIMB_ELT(pAccessMask, index) &= ~SDK_RS_ACCESS_OFFSET_MASK(index); \ + } \ + } while (NV_FALSE) + +/*! + * @brief Performs an in-place union between two access right masks + * + * @param[in,out] pMaskOut The access rights mask to be updated + * @param[in] pMaskIn The set of access rights to be added to pMaskOut + */ +#define RS_ACCESS_MASK_UNION(pMaskOut, pMaskIn) \ + do \ + { \ + NvLength limb; \ + for (limb = 0; limb < SDK_RS_ACCESS_MAX_LIMBS; limb++) \ + { \ + SDK_RS_ACCESS_LIMB_ELT(pMaskOut, limb) |= SDK_RS_ACCESS_LIMB_ELT(pMaskIn, limb); \ + } \ + } while (NV_FALSE) + +/*! + * @brief Performs an in-place subtract of one mask's rights from another + * + * @param[in,out] pMaskOut The access rights mask to be updated + * @param[in] pMaskIn The set of access rights to be removed from pMaskOut + */ +#define RS_ACCESS_MASK_SUBTRACT(pMaskOut, pMaskIn) \ + do \ + { \ + NvLength limb; \ + for (limb = 0; limb < SDK_RS_ACCESS_MAX_LIMBS; limb++) \ + { \ + SDK_RS_ACCESS_LIMB_ELT(pMaskOut, limb) &= ~SDK_RS_ACCESS_LIMB_ELT(pMaskIn, limb); \ + } \ + } while (NV_FALSE) + +/*! + * @brief Removes all rights from an access rights mask + * + * @param[in,out] pAccessMask The access rights mask to be updated + */ +#define RS_ACCESS_MASK_CLEAR(pAccessMask) \ + do \ + { \ + portMemSet(pAccessMask, 0, sizeof(*pAccessMask)); \ + } while (NV_FALSE) + +/*! + * @brief Adds all rights to an access rights mask + * + * @param[in,out] pAccessMask The access rights mask to be updated + */ +#define RS_ACCESS_MASK_FILL(pAccessMask) \ + do \ + { \ + portMemSet(pAccessMask, 0xff, sizeof(*pAccessMask)); \ + } while (NV_FALSE) + + +/****************************************************************************/ +/* Share definitions */ +/****************************************************************************/ + +// +// The usage of Share Policy and the meaning of each share type is documented in +// resman/docs/rmapi/resource_server/rm_capabilities.adoc +// +#define RS_SHARE_TYPE_NONE (0U) +#define RS_SHARE_TYPE_ALL (1U) +#define RS_SHARE_TYPE_OS_SECURITY_TOKEN (2U) +#define RS_SHARE_TYPE_CLIENT (3U) +#define RS_SHARE_TYPE_PID (4U) +#define RS_SHARE_TYPE_SMC_PARTITION (5U) +#define RS_SHARE_TYPE_GPU (6U) +#define RS_SHARE_TYPE_FM_CLIENT (7U) +// Must be last. Update when a new SHARE_TYPE is added +#define RS_SHARE_TYPE_MAX (8U) + + +// +// Use Revoke to remove an existing policy from the list. +// Allow is based on OR logic, Require is based on AND logic. +// To share a right, at least one Allow (non-Require) must match, and all Require must pass. +// If Compose is specified, policies will be added to the list. Otherwise, they will replace the list. +// +#define RS_SHARE_ACTION_FLAG_REVOKE NVBIT(0) +#define RS_SHARE_ACTION_FLAG_REQUIRE NVBIT(1) +#define RS_SHARE_ACTION_FLAG_COMPOSE NVBIT(2) + +/****************************************************************************/ +/* Share flag data structures */ +/****************************************************************************/ + +typedef struct RS_SHARE_POLICY { + NvU32 target; + RS_ACCESS_MASK accessMask; + NvU16 type; ///< RS_SHARE_TYPE_ + NvU8 action; ///< RS_SHARE_ACTION_ +} RS_SHARE_POLICY; diff --git a/kernel-open/conftest.sh b/kernel-open/conftest.sh index 1226cea2bb..bbf3d7fc79 100755 --- a/kernel-open/conftest.sh +++ b/kernel-open/conftest.sh @@ -661,23 +661,6 @@ compile_test() { compile_check_conftest "$CODE" "NV_PCI_GET_DOMAIN_BUS_AND_SLOT_PRESENT" "" "functions" ;; - pci_bus_address) - # - # Determine if the pci_bus_address() function is - # present. - # - # Added by commit 06cf56e497c8 ("PCI: Add pci_bus_address() to - # get bus address of a BAR") in v3.14 - # - CODE=" - #include - void conftest_pci_bus_address(void) { - pci_bus_address(); - }" - - compile_check_conftest "$CODE" "NV_PCI_BUS_ADDRESS_PRESENT" "" "functions" - ;; - hash__remap_4k_pfn) # # Determine if the hash__remap_4k_pfn() function is @@ -1538,23 +1521,6 @@ compile_test() { compile_check_conftest "$CODE" "NV_GET_NUM_PHYSPAGES_PRESENT" "" "functions" ;; - backing_dev_info) - # - # Determine if the 'address_space' structure has - # a 'backing_dev_info' field. - # - # Removed by commit b83ae6d42143 ("fs: remove - # mapping->backing_dev_info") in v4.0 - # - CODE=" - #include - int conftest_backing_dev_info(void) { - return offsetof(struct address_space, backing_dev_info); - }" - - compile_check_conftest "$CODE" "NV_ADDRESS_SPACE_HAS_BACKING_DEV_INFO" "" "types" - ;; - xen_ioemu_inject_msi) # Determine if the xen_ioemu_inject_msi() function is present. CODE=" @@ -2409,45 +2375,6 @@ compile_test() { compile_check_conftest "$CODE" "NV_DRM_ATOMIC_HELPER_LEGACY_GAMMA_SET_PRESENT" "" "functions" ;; - wait_on_bit_lock_argument_count) - # - # Determine how many arguments wait_on_bit_lock takes. - # - # Changed by commit 743162013d40 ("sched: Remove proliferation - # of wait_on_bit() action functions") in v3.17 (2014-07-07) - # - echo "$CONFTEST_PREAMBLE - #include - void conftest_wait_on_bit_lock(void) { - wait_on_bit_lock(NULL, 0, 0); - }" > conftest$$.c - - $CC $CFLAGS -c conftest$$.c > /dev/null 2>&1 - rm -f conftest$$.c - - if [ -f conftest$$.o ]; then - rm -f conftest$$.o - echo "#define NV_WAIT_ON_BIT_LOCK_ARGUMENT_COUNT 3" | append_conftest "functions" - return - fi - - echo "$CONFTEST_PREAMBLE - #include - void conftest_wait_on_bit_lock(void) { - wait_on_bit_lock(NULL, 0, NULL, 0); - }" > conftest$$.c - - $CC $CFLAGS -c conftest$$.c > /dev/null 2>&1 - rm -f conftest$$.c - - if [ -f conftest$$.o ]; then - rm -f conftest$$.o - echo "#define NV_WAIT_ON_BIT_LOCK_ARGUMENT_COUNT 4" | append_conftest "functions" - return - fi - echo "#error wait_on_bit_lock() conftest failed!" | append_conftest "functions" - ;; - pci_stop_and_remove_bus_device) # # Determine if the pci_stop_and_remove_bus_device() function is present. @@ -2523,31 +2450,6 @@ compile_test() { fi ;; - mm_context_t) - # - # Determine if the 'mm_context_t' data type is present - # and if it has an 'id' member. - # It does not exist on all architectures. - # - echo "$CONFTEST_PREAMBLE - #include - int conftest_mm_context_t(void) { - return offsetof(mm_context_t, id); - }" > conftest$$.c - - $CC $CFLAGS -c conftest$$.c > /dev/null 2>&1 - rm -f conftest$$.c - - if [ -f conftest$$.o ]; then - echo "#define NV_MM_CONTEXT_T_HAS_ID" | append_conftest "types" - rm -f conftest$$.o - return - else - echo "#undef NV_MM_CONTEXT_T_HAS_ID" | append_conftest "types" - return - fi - ;; - pci_dev_has_ats_enabled) # # Determine if the 'pci_dev' data type has a 'ats_enabled' member. @@ -5102,6 +5004,42 @@ compile_test() { compile_check_conftest "$CODE" "NV_CC_PLATFORM_PRESENT" "" "functions" ;; + cc_attr_guest_sev_snp) + # + # Determine if 'CC_ATTR_GUEST_SEV_SNP' is present. + # + # Added by commit aa5a461171f9 ("x86/mm: Extend cc_attr to + # include AMD SEV-SNP") in v5.19. + # + CODE=" + #if defined(NV_LINUX_CC_PLATFORM_H_PRESENT) + #include + #endif + + enum cc_attr cc_attributes = CC_ATTR_GUEST_SEV_SNP; + " + + compile_check_conftest "$CODE" "NV_CC_ATTR_SEV_SNP" "" "types" + ;; + + hv_get_isolation_type) + # + # Determine if 'hv_get_isolation_type()' is present. + # Added by commit faff44069ff5 ("x86/hyperv: Add Write/Read MSR + # registers via ghcb page") in v5.16. + # + CODE=" + #if defined(NV_ASM_MSHYPERV_H_PRESENT) + #include + #endif + void conftest_hv_get_isolation_type(void) { + int i; + hv_get_isolation_type(i); + }" + + compile_check_conftest "$CODE" "NV_HV_GET_ISOLATION_TYPE" "" "functions" + ;; + drm_prime_pages_to_sg_has_drm_device_arg) # # Determine if drm_prime_pages_to_sg() has 'dev' argument. @@ -6596,7 +6534,9 @@ compile_test() { # Determine whether drm_fbdev_generic_setup is present. # # Added by commit 9060d7f49376 ("drm/fb-helper: Finish the - # generic fbdev emulation") in v4.19. + # generic fbdev emulation") in v4.19. Removed by commit + # aae4682e5d66 ("drm/fbdev-generic: Convert to fbdev-ttm") + # in v6.11. # CODE=" #include @@ -6608,6 +6548,48 @@ compile_test() { }" compile_check_conftest "$CODE" "NV_DRM_FBDEV_GENERIC_SETUP_PRESENT" "" "functions" + ;; + + drm_fbdev_ttm_setup) + # + # Determine whether drm_fbdev_ttm_setup is present. + # + # Added by commit aae4682e5d66 ("drm/fbdev-generic: + # Convert to fbdev-ttm") in v6.11. + # + CODE=" + #include + #if defined(NV_DRM_DRM_FBDEV_TTM_H_PRESENT) + #include + #endif + void conftest_drm_fbdev_ttm_setup(void) { + drm_fbdev_ttm_setup(); + }" + + compile_check_conftest "$CODE" "NV_DRM_FBDEV_TTM_SETUP_PRESENT" "" "functions" + ;; + + drm_output_poll_changed) + # + # Determine whether drm_mode_config_funcs.output_poll_changed + # callback is present + # + # Removed by commit 446d0f4849b1 ("drm: Remove struct + # drm_mode_config_funcs.output_poll_changed") in v6.12. Hotplug + # event support is handled through the fbdev emulation interface + # going forward. + # + CODE=" + #if defined(NV_DRM_DRM_MODE_CONFIG_H_PRESENT) + #include + #else + #include + #endif + int conftest_drm_output_poll_changed_available(void) { + return offsetof(struct drm_mode_config_funcs, output_poll_changed); + }" + + compile_check_conftest "$CODE" "NV_DRM_OUTPUT_POLL_CHANGED_PRESENT" "" "types" ;; drm_aperture_remove_conflicting_pci_framebuffers) @@ -6990,6 +6972,192 @@ compile_test() { compile_check_conftest "$CODE" "NV_DRM_PROPERTY_BLOB_PUT_PRESENT" "" "functions" ;; + drm_driver_has_gem_prime_mmap) + # + # Determine if the 'drm_driver' structure has a 'gem_prime_mmap' + # function pointer. + # + # Removed by commit 0adec22702d4 ("drm: Remove struct + # drm_driver.gem_prime_mmap") in v6.6. + # + CODE=" + #if defined(NV_DRM_DRMP_H_PRESENT) + #include + #endif + + #if defined(NV_DRM_DRM_DRV_H_PRESENT) + #include + #endif + + int conftest_drm_driver_has_gem_prime_mmap(void) { + return offsetof(struct drm_driver, gem_prime_mmap); + }" + + compile_check_conftest "$CODE" "NV_DRM_DRIVER_HAS_GEM_PRIME_MMAP" "" "types" + ;; + + drm_gem_prime_mmap) + # + # Determine if the function drm_gem_prime_mmap() is present. + # + # Added by commit 7698799f95 ("drm/prime: Add drm_gem_prime_mmap() + # in v5.0 + # + CODE=" + #if defined(NV_DRM_DRMP_H_PRESENT) + #include + #endif + #if defined(NV_DRM_DRM_PRIME_H_PRESENT) + #include + #endif + void conftest_drm_gem_prime_mmap(void) { + drm_gem_prime_mmap(); + }" + + compile_check_conftest "$CODE" "NV_DRM_GEM_PRIME_MMAP_PRESENT" "" "functions" + ;; + + vmf_insert_mixed) + # + # Determine if the function vmf_insert_mixed() is present. + # + # Added by commit 1c8f422059ae ("mm: change return type to + # vm_fault_t") in v4.17. + # + CODE=" + #include + void conftest_vmf_insert_mixed() { + vmf_insert_mixed(); + }" + + compile_check_conftest "$CODE" "NV_VMF_INSERT_MIXED_PRESENT" "" "functions" + ;; + + pfn_to_pfn_t) + # + # Determine if the function pfn_to_pfn_t() is present. + # + # Added by commit 34c0fd540e79 ("mm, dax, pmem: introduce pfn_t") in + # v4.5. + # + CODE=" + #if defined(NV_LINUX_PFN_T_H_PRESENT) + #include + #endif + void conftest_pfn_to_pfn_t() { + pfn_to_pfn_t(); + }" + + compile_check_conftest "$CODE" "NV_PFN_TO_PFN_T_PRESENT" "" "functions" + ;; + + drm_gem_dmabuf_mmap) + # + # Determine if the drm_gem_dmabuf_mmap() function is present. + # + # drm_gem_dmabuf_mmap() was exported by commit c308279f8798 ("drm: + # export gem dmabuf_ops for drivers to reuse") in v4.17. + # + CODE=" + #if defined(NV_DRM_DRM_PRIME_H_PRESENT) + #include + #endif + void conftest_drm_gem_dmabuf_mmap(void) { + drm_gem_dmabuf_mmap(); + }" + + compile_check_conftest "$CODE" "NV_DRM_GEM_DMABUF_MMAP_PRESENT" "" "functions" + ;; + + drm_gem_prime_export_has_dev_arg) + # + # Determine if drm_gem_prime_export() function has a 'dev' argument. + # + # This argument was removed by commit e4fa8457b219 ("drm/prime: + # Align gem_prime_export with obj_funcs.export") in v5.4. + # + CODE=" + #if defined(NV_DRM_DRMP_H_PRESENT) + #include + #endif + #if defined(NV_DRM_DRM_PRIME_H_PRESENT) + #include + #endif + + void conftest_drm_gem_prime_export_has_dev_arg( + struct drm_device *dev, + struct drm_gem_object *obj) { + (void) drm_gem_prime_export(dev, obj, 0); + }" + + compile_check_conftest "$CODE" "NV_DRM_GEM_PRIME_EXPORT_HAS_DEV_ARG" "" "types" + ;; + + dma_buf_ops_has_cache_sgt_mapping) + # + # Determine if dma_buf_ops structure has a 'cache_sgt_mapping' + # member. + # + # dma_buf_ops::cache_sgt_mapping was added by commit f13e143e7444 + # ("dma-buf: start caching of sg_table objects v2") in v5.3. + # + CODE=" + #include + int conftest_dma_ops_has_cache_sgt_mapping(void) { + return offsetof(struct dma_buf_ops, cache_sgt_mapping); + }" + + compile_check_conftest "$CODE" "NV_DMA_BUF_OPS_HAS_CACHE_SGT_MAPPING" "" "types" + ;; + + drm_gem_object_funcs) + # + # Determine if the 'struct drm_gem_object_funcs' type is present. + # + # Added by commit b39b5394fabc ("drm/gem: Add drm_gem_object_funcs") + # in v5.0. + # + CODE=" + #if defined(NV_DRM_DRM_GEM_H_PRESENT) + #include + #endif + struct drm_gem_object_funcs funcs;" + + compile_check_conftest "$CODE" "NV_DRM_GEM_OBJECT_FUNCS_PRESENT" "" "types" + ;; + + struct_page_has_zone_device_data) + # + # Determine if struct page has a 'zone_device_data' field. + # + # Added by commit 8a164fef9c4c ("mm: simplify ZONE_DEVICE page + # private data") in v5.3. + # + CODE=" + #include + int conftest_struct_page_has_zone_device_data(void) { + return offsetof(struct page, zone_device_data); + }" + + compile_check_conftest "$CODE" "NV_STRUCT_PAGE_HAS_ZONE_DEVICE_DATA" "" "types" + ;; + + folio_test_swapcache) + # + # Determine if the folio_test_swapcache() function is present. + # + # folio_test_swapcache() was exported by commit d389a4a811551 ("mm: + # Add folio flag manipulation functions") in v5.16. + # + CODE=" + #include + void conftest_folio_test_swapcache(void) { + folio_test_swapcache(); + }" + + compile_check_conftest "$CODE" "NV_FOLIO_TEST_SWAPCACHE_PRESENT" "" "functions" + ;; + # When adding a new conftest entry, please use the correct format for # specifying the relevant upstream Linux kernel commit. Please # avoid specifying -rc kernels, and only use SHAs that actually exist diff --git a/kernel-open/header-presence-tests.mk b/kernel-open/header-presence-tests.mk index e8d2e02b37..9d5217a9f8 100644 --- a/kernel-open/header-presence-tests.mk +++ b/kernel-open/header-presence-tests.mk @@ -15,6 +15,7 @@ NV_HEADER_PRESENCE_TESTS = \ drm/drm_atomic_uapi.h \ drm/drm_drv.h \ drm/drm_fbdev_generic.h \ + drm/drm_fbdev_ttm.h \ drm/drm_framebuffer.h \ drm/drm_connector.h \ drm/drm_probe_helper.h \ @@ -99,5 +100,7 @@ NV_HEADER_PRESENCE_TESTS = \ linux/sync_file.h \ linux/cc_platform.h \ asm/cpufeature.h \ - linux/mpi.h + linux/mpi.h \ + asm/mshyperv.h \ + linux/pfn_t.h diff --git a/kernel-open/nvidia-drm/nv-kthread-q.c b/kernel-open/nvidia-drm/nv-kthread-q.c index 7f3c4cabc9..28d17d82cf 100644 --- a/kernel-open/nvidia-drm/nv-kthread-q.c +++ b/kernel-open/nvidia-drm/nv-kthread-q.c @@ -201,7 +201,7 @@ static struct task_struct *thread_create_on_node(int (*threadfn)(void *data), // Ran out of attempts - return thread even if its stack may not be // allocated on the preferred node - if ((i == (attempts - 1))) + if (i == (attempts - 1)) break; // Get the NUMA node where the first page of the stack is resident. If diff --git a/kernel-open/nvidia-drm/nv_common_utils.h b/kernel-open/nvidia-drm/nv_common_utils.h new file mode 100644 index 0000000000..6b10e76982 --- /dev/null +++ b/kernel-open/nvidia-drm/nv_common_utils.h @@ -0,0 +1,120 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __NV_COMMON_UTILS_H__ +#define __NV_COMMON_UTILS_H__ + +#include "nvtypes.h" +#include "nvmisc.h" + +#if !defined(TRUE) +#define TRUE NV_TRUE +#endif + +#if !defined(FALSE) +#define FALSE NV_FALSE +#endif + +#define NV_IS_UNSIGNED(x) ((__typeof__(x))-1 > 0) + +/* Get the length of a statically-sized array. */ +#define ARRAY_LEN(_arr) (sizeof(_arr) / sizeof(_arr[0])) + +#define NV_INVALID_HEAD 0xFFFFFFFF + +#define NV_INVALID_CONNECTOR_PHYSICAL_INFORMATION (~0) + +#if !defined(NV_MIN) +# define NV_MIN(a,b) (((a)<(b))?(a):(b)) +#endif + +#define NV_MIN3(a,b,c) NV_MIN(NV_MIN(a, b), c) +#define NV_MIN4(a,b,c,d) NV_MIN3(NV_MIN(a,b),c,d) + +#if !defined(NV_MAX) +# define NV_MAX(a,b) (((a)>(b))?(a):(b)) +#endif + +#define NV_MAX3(a,b,c) NV_MAX(NV_MAX(a, b), c) +#define NV_MAX4(a,b,c,d) NV_MAX3(NV_MAX(a,b),c,d) + +static inline int NV_LIMIT_VAL_TO_MIN_MAX(int val, int min, int max) +{ + if (val < min) { + return min; + } + if (val > max) { + return max; + } + return val; +} + +#define NV_ROUNDUP_DIV(x,y) ((x) / (y) + (((x) % (y)) ? 1 : 0)) + +/* + * Macros used for computing palette entries: + * + * NV_UNDER_REPLICATE(val, source_size, result_size) expands a value + * of source_size bits into a value of target_size bits by shifting + * the source value into the high bits and replicating the high bits + * of the value into the low bits of the result. + * + * PALETTE_DEPTH_SHIFT(val, w) maps a colormap entry for a component + * that has w bits to an appropriate entry in a LUT of 256 entries. + */ +static inline unsigned int NV_UNDER_REPLICATE(unsigned short val, + int source_size, + int result_size) +{ + return (val << (result_size - source_size)) | + (val >> ((source_size << 1) - result_size)); +} + + +static inline unsigned short PALETTE_DEPTH_SHIFT(unsigned short val, int depth) +{ + return NV_UNDER_REPLICATE(val, depth, 8); +} + +/* + * Use __builtin_ffs where it is supported, or provide an equivalent + * implementation for platforms like riscv where it is not. + */ +#if defined(__GNUC__) && !NVCPU_IS_RISCV64 +static inline int nv_ffs(int x) +{ + return __builtin_ffs(x); +} +#else +static inline int nv_ffs(int x) +{ + if (x == 0) + return 0; + + LOWESTBITIDX_32(x); + + return 1 + x; +} +#endif + +#endif /* __NV_COMMON_UTILS_H__ */ diff --git a/kernel-open/nvidia-drm/nvidia-drm-conftest.h b/kernel-open/nvidia-drm/nvidia-drm-conftest.h index 552c2c9709..c097013024 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-conftest.h +++ b/kernel-open/nvidia-drm/nvidia-drm-conftest.h @@ -85,7 +85,11 @@ /* For nv_drm_gem_prime_force_fence_signal */ #ifndef spin_is_locked +#if ((__FreeBSD_version >= 1500000) && (__FreeBSD_version < 1500018)) || (__FreeBSD_version < 1401501) #define spin_is_locked(lock) mtx_owned(lock.m) +#else +#define spin_is_locked(lock) mtx_owned(lock) +#endif #endif #ifndef rwsem_is_locked diff --git a/kernel-open/nvidia-drm/nvidia-drm-crtc.c b/kernel-open/nvidia-drm/nvidia-drm-crtc.c index 5670fd6a29..f2f61c6189 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-crtc.c +++ b/kernel-open/nvidia-drm/nvidia-drm-crtc.c @@ -35,6 +35,7 @@ #include "nvidia-drm-format.h" #include "nvmisc.h" +#include "nv_common_utils.h" #include #include @@ -46,14 +47,99 @@ #include #endif +/* + * The two arrays below specify the PQ EOTF transfer function that's used to + * convert from PQ encoded L'M'S' fixed-point to linear LMS FP16. This transfer + * function is the inverse of the OETF curve. + * + * TODO: Generate table with max number of entries for ILUT. + */ +static const NvU32 __eotf_pq_512_seg_sizes_log2[] = { + 6, 6, 4, 4, 4, 3, 4, 3, 3, 3, 2, 2, 2, 3, 3, 2, + 2, 2, 2, 2, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 6, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 2, 2, 1, 2, + 2, 1, 1, 2, 2, 2, 2, 1, 2, 1, 1, 2, 1, 4, 2, 2, +}; +static const NvU16 __eotf_pq_512_entries[] = { + 0x0000, 0x0001, 0x0003, 0x0005, 0x0008, 0x000C, 0x0011, 0x0016, 0x001B, 0x0022, 0x0028, 0x002F, 0x0037, 0x003F, 0x0048, 0x0051, + 0x005A, 0x0064, 0x006F, 0x007A, 0x0085, 0x0091, 0x009E, 0x00AB, 0x00B8, 0x00C6, 0x00D4, 0x00E3, 0x00F3, 0x0102, 0x0113, 0x0123, + 0x0135, 0x0146, 0x0158, 0x016B, 0x017E, 0x0192, 0x01A6, 0x01BB, 0x01D0, 0x01E5, 0x01FC, 0x0212, 0x0229, 0x0241, 0x0259, 0x0272, + 0x028B, 0x02A4, 0x02BE, 0x02D9, 0x02F4, 0x0310, 0x032C, 0x0349, 0x0366, 0x0384, 0x03A2, 0x03C1, 0x03E0, 0x0400, 0x0421, 0x0442, + 0x0463, 0x0485, 0x04A8, 0x04CB, 0x04EF, 0x0513, 0x0538, 0x055D, 0x0583, 0x05AA, 0x05D1, 0x05F9, 0x0621, 0x064A, 0x0673, 0x069D, + 0x06C7, 0x06F3, 0x071E, 0x074B, 0x0777, 0x07A5, 0x07D3, 0x0801, 0x0819, 0x0830, 0x0849, 0x0861, 0x087A, 0x0893, 0x08AD, 0x08C7, + 0x08E1, 0x08FB, 0x0916, 0x0931, 0x094C, 0x0968, 0x0984, 0x09A0, 0x09BD, 0x09DA, 0x09F7, 0x0A15, 0x0A33, 0x0A51, 0x0A70, 0x0A8F, + 0x0AAE, 0x0ACE, 0x0AEE, 0x0B0E, 0x0B2F, 0x0B50, 0x0B71, 0x0B93, 0x0BB5, 0x0BD7, 0x0BFA, 0x0C0F, 0x0C20, 0x0C32, 0x0C44, 0x0C56, + 0x0C69, 0x0CB5, 0x0D03, 0x0D55, 0x0DA9, 0x0E01, 0x0E5B, 0x0EB9, 0x0F1B, 0x0F7F, 0x0FE7, 0x1029, 0x1061, 0x109A, 0x10D5, 0x1111, + 0x1150, 0x1190, 0x11D3, 0x1217, 0x125E, 0x12A6, 0x12F0, 0x133D, 0x138B, 0x13DC, 0x1417, 0x1442, 0x146D, 0x149A, 0x14C8, 0x14F7, + 0x1527, 0x1558, 0x158B, 0x15BF, 0x15F4, 0x162A, 0x1662, 0x169B, 0x16D5, 0x1711, 0x174E, 0x178C, 0x17CC, 0x1806, 0x1828, 0x184A, + 0x186D, 0x18B4, 0x18FF, 0x194D, 0x199E, 0x19F3, 0x1A4B, 0x1AA7, 0x1B06, 0x1B37, 0x1B69, 0x1B9B, 0x1BCF, 0x1C02, 0x1C1D, 0x1C38, + 0x1C54, 0x1C70, 0x1C8D, 0x1CAB, 0x1CC9, 0x1CE7, 0x1D06, 0x1D26, 0x1D46, 0x1D88, 0x1DCC, 0x1E13, 0x1E5C, 0x1EA8, 0x1EF6, 0x1F47, + 0x1F9A, 0x1FF1, 0x2025, 0x2053, 0x2082, 0x20B3, 0x20E6, 0x211A, 0x214F, 0x2187, 0x21C0, 0x21FA, 0x2237, 0x2275, 0x22B5, 0x22F7, + 0x233B, 0x23C9, 0x2430, 0x247F, 0x24D3, 0x252B, 0x2589, 0x25EB, 0x2653, 0x26C1, 0x2734, 0x27AD, 0x2817, 0x2838, 0x285A, 0x287C, + 0x28A0, 0x28C5, 0x28EA, 0x2911, 0x2938, 0x2960, 0x298A, 0x29B4, 0x29DF, 0x2A0C, 0x2A39, 0x2A68, 0x2A98, 0x2AFA, 0x2B62, 0x2BCE, + 0x2C20, 0x2C5B, 0x2C99, 0x2CDA, 0x2D1E, 0x2D65, 0x2DB0, 0x2DFD, 0x2E4E, 0x2EA3, 0x2EFC, 0x2F58, 0x2FB8, 0x300E, 0x3043, 0x307A, + 0x30B3, 0x30D0, 0x30EE, 0x310D, 0x312C, 0x314C, 0x316D, 0x318E, 0x31B0, 0x31D3, 0x31F6, 0x321A, 0x323F, 0x3265, 0x328B, 0x32B2, + 0x32DA, 0x332D, 0x3383, 0x33DC, 0x341D, 0x344D, 0x347F, 0x34B4, 0x34EA, 0x3523, 0x355E, 0x359B, 0x35DB, 0x361D, 0x3662, 0x36A9, + 0x36F3, 0x3740, 0x3791, 0x37E4, 0x381D, 0x384A, 0x3879, 0x38A9, 0x38DB, 0x3910, 0x3946, 0x397E, 0x39B8, 0x39F5, 0x3A34, 0x3A75, + 0x3AB9, 0x3AFF, 0x3B48, 0x3B94, 0x3BE2, 0x3C1A, 0x3C44, 0x3C70, 0x3C9D, 0x3CA0, 0x3CA3, 0x3CA6, 0x3CA9, 0x3CAC, 0x3CAF, 0x3CB1, + 0x3CB4, 0x3CB7, 0x3CBA, 0x3CBD, 0x3CC0, 0x3CC3, 0x3CC6, 0x3CC9, 0x3CCC, 0x3CCF, 0x3CD2, 0x3CD5, 0x3CD8, 0x3CDB, 0x3CDE, 0x3CE1, + 0x3CE4, 0x3CE7, 0x3CEA, 0x3CEE, 0x3CF1, 0x3CF4, 0x3CF7, 0x3CFA, 0x3CFD, 0x3D00, 0x3D03, 0x3D06, 0x3D09, 0x3D0D, 0x3D10, 0x3D13, + 0x3D16, 0x3D19, 0x3D1C, 0x3D20, 0x3D23, 0x3D26, 0x3D29, 0x3D2C, 0x3D30, 0x3D33, 0x3D36, 0x3D39, 0x3D3D, 0x3D40, 0x3D43, 0x3D46, + 0x3D4A, 0x3D4D, 0x3D50, 0x3D54, 0x3D57, 0x3D5A, 0x3D5D, 0x3D61, 0x3D64, 0x3D9B, 0x3DD3, 0x3E0D, 0x3E4A, 0x3E89, 0x3ECA, 0x3F0E, + 0x3F54, 0x3F9C, 0x3FE8, 0x401B, 0x4043, 0x406D, 0x4099, 0x40C6, 0x40F4, 0x4124, 0x4156, 0x418A, 0x41C0, 0x41F8, 0x4232, 0x426D, + 0x42AB, 0x42EB, 0x432E, 0x4373, 0x43BA, 0x4428, 0x4479, 0x44D0, 0x452D, 0x4591, 0x45FC, 0x466F, 0x46EB, 0x472C, 0x476F, 0x47B5, + 0x47FE, 0x4824, 0x484B, 0x4874, 0x489D, 0x48F5, 0x4954, 0x4986, 0x49B9, 0x49EF, 0x4A26, 0x4A5F, 0x4A9B, 0x4AD9, 0x4B19, 0x4B9F, + 0x4C18, 0x4C66, 0x4CBA, 0x4CE6, 0x4D13, 0x4D43, 0x4D74, 0x4DA7, 0x4DDC, 0x4E12, 0x4E4B, 0x4E86, 0x4EC3, 0x4F02, 0x4F44, 0x4F88, + 0x4FCE, 0x500C, 0x5032, 0x5082, 0x50D8, 0x5106, 0x5135, 0x5166, 0x5199, 0x5205, 0x5278, 0x52F5, 0x537C, 0x53C3, 0x5406, 0x542D, + 0x5454, 0x54A9, 0x5503, 0x550F, 0x551B, 0x5527, 0x5533, 0x5540, 0x554C, 0x5559, 0x5565, 0x5572, 0x557F, 0x558C, 0x5599, 0x55A7, + 0x55B4, 0x55C1, 0x55CF, 0x5607, 0x5641, 0x567E, 0x56BC, 0x56FE, 0x5741, 0x5788, 0x57D0, +}; + +/* + * The two arrays below specify the PQ OETF transfer function that's used to + * convert from linear LMS FP16 to PQ encoded L'M'S' fixed-point. + * + * TODO: Generate table with max number of entries for ILUT. + */ +static const NvU32 __oetf_pq_512_seg_sizes_log2[] = { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 2, 2, 3, 3, + 3, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, + 5, +}; +static const NvU16 __oetf_pq_512_entries[] = { + 0x0000, 0x000C, 0x0014, 0x001C, 0x0028, 0x003C, 0x005C, 0x008C, 0x00D0, 0x0134, 0x0184, 0x01C8, 0x0238, 0x029C, 0x033C, 0x03C4, + 0x043C, 0x04A4, 0x0504, 0x0560, 0x0600, 0x0690, 0x0714, 0x078C, 0x07FC, 0x0864, 0x08C8, 0x0924, 0x0980, 0x09D4, 0x0A24, 0x0A70, + 0x0B04, 0x0B90, 0x0C10, 0x0C88, 0x0CFC, 0x0D68, 0x0DD4, 0x0E38, 0x0EF4, 0x0FA4, 0x1048, 0x10E4, 0x1174, 0x1200, 0x1284, 0x1304, + 0x13F4, 0x14D0, 0x159C, 0x165C, 0x1714, 0x17C0, 0x1864, 0x1900, 0x1A28, 0x1B34, 0x1C30, 0x1D1C, 0x1DFC, 0x1ECC, 0x1F94, 0x2050, + 0x2104, 0x21B0, 0x2258, 0x22F8, 0x2390, 0x2424, 0x24B4, 0x2540, 0x25C4, 0x2648, 0x26C4, 0x2740, 0x27B8, 0x282C, 0x289C, 0x290C, + 0x29E0, 0x2AAC, 0x2B70, 0x2C2C, 0x2CE0, 0x2D90, 0x2E38, 0x2ED8, 0x2F74, 0x300C, 0x30A0, 0x3130, 0x31BC, 0x3244, 0x32C8, 0x3348, + 0x3440, 0x352C, 0x360C, 0x36E4, 0x37B4, 0x387C, 0x393C, 0x39F8, 0x3AA8, 0x3B58, 0x3C00, 0x3CA4, 0x3D44, 0x3DDC, 0x3E74, 0x3F04, + 0x401C, 0x4128, 0x4228, 0x431C, 0x4408, 0x44E8, 0x45C4, 0x4694, 0x475C, 0x4820, 0x48DC, 0x4994, 0x4A48, 0x4AF4, 0x4B9C, 0x4C3C, + 0x4D78, 0x4EA0, 0x4FBC, 0x50CC, 0x51D0, 0x52CC, 0x53BC, 0x54A0, 0x5580, 0x5658, 0x5728, 0x57F0, 0x58B4, 0x5974, 0x5A2C, 0x5ADC, + 0x5C34, 0x5D7C, 0x5EB4, 0x5FDC, 0x60F4, 0x6204, 0x630C, 0x6404, 0x64F8, 0x65E0, 0x66C4, 0x679C, 0x6870, 0x693C, 0x6A04, 0x6AC4, + 0x6C38, 0x6D94, 0x6EE4, 0x7020, 0x7150, 0x7274, 0x738C, 0x7498, 0x7598, 0x7694, 0x7784, 0x786C, 0x794C, 0x7A24, 0x7AF8, 0x7BC4, + 0x7D50, 0x7EC4, 0x8024, 0x8174, 0x82B4, 0x83E8, 0x850C, 0x8628, 0x8738, 0x883C, 0x8938, 0x8A2C, 0x8B18, 0x8BFC, 0x8CD8, 0x8DB0, + 0x8F4C, 0x90D0, 0x9240, 0x939C, 0x94EC, 0x962C, 0x975C, 0x9880, 0x999C, 0x9AAC, 0x9BB0, 0x9CAC, 0x9DA0, 0x9E8C, 0x9F70, 0xA04C, + 0xA1F4, 0xA384, 0xA500, 0xA664, 0xA7BC, 0xA904, 0xAA3C, 0xAB6C, 0xAC8C, 0xADA0, 0xAEAC, 0xAFAC, 0xB0A4, 0xB194, 0xB27C, 0xB360, + 0xB510, 0xB6A4, 0xB824, 0xB994, 0xBAF0, 0xBC3C, 0xBD78, 0xBEA8, 0xBFCC, 0xC0E4, 0xC1F0, 0xC2F4, 0xC3F0, 0xC4E4, 0xC5CC, 0xC6B0, + 0xC78C, 0xC860, 0xC930, 0xC9F8, 0xCABC, 0xCB7C, 0xCC38, 0xCCEC, 0xCD9C, 0xCE48, 0xCEF0, 0xCF94, 0xD034, 0xD0D4, 0xD16C, 0xD200, + 0xD294, 0xD324, 0xD3B4, 0xD43C, 0xD4C4, 0xD54C, 0xD5CC, 0xD650, 0xD6CC, 0xD748, 0xD7C4, 0xD83C, 0xD8B0, 0xD924, 0xD994, 0xDA08, + 0xDAE0, 0xDBB4, 0xDC84, 0xDD4C, 0xDE10, 0xDECC, 0xDF84, 0xE038, 0xE0E8, 0xE194, 0xE238, 0xE2DC, 0xE37C, 0xE418, 0xE4B0, 0xE544, + 0xE5D4, 0xE664, 0xE6F0, 0xE778, 0xE800, 0xE884, 0xE904, 0xE984, 0xEA00, 0xEA7C, 0xEAF4, 0xEB68, 0xEBDC, 0xEC50, 0xECC0, 0xED30, + 0xEE08, 0xEED8, 0xEFA4, 0xF068, 0xF128, 0xF1E4, 0xF298, 0xF348, 0xF3F4, 0xF49C, 0xF540, 0xF5E0, 0xF67C, 0xF714, 0xF7A8, 0xF83C, + 0xF8CC, 0xF958, 0xF9E0, 0xFA68, 0xFAEC, 0xFB6C, 0xFBE8, 0xFC64, 0xFCE0, 0xFD58, 0xFDCC, 0xFE40, 0xFEB4, 0xFF24, 0xFF90, 0xFFFF, +}; + +#define NUM_VSS_HEADER_ENTRIES (NVKMS_LUT_VSS_HEADER_SIZE / NVKMS_LUT_CAPS_LUT_ENTRY_SIZE) -#if defined(NV_DRM_HAS_HDR_OUTPUT_METADATA) static int nv_drm_atomic_replace_property_blob_from_id(struct drm_device *dev, struct drm_property_blob **blob, uint64_t blob_id, - ssize_t expected_size) + ssize_t expected_size, + NvBool *replaced) { + struct drm_property_blob *old_blob = *blob; struct drm_property_blob *new_blob = NULL; if (blob_id != 0) { @@ -64,17 +150,26 @@ nv_drm_atomic_replace_property_blob_from_id(struct drm_device *dev, if ((expected_size > 0) && (new_blob->length != expected_size)) { - drm_property_blob_put(new_blob); + nv_drm_property_blob_put(new_blob); return -EINVAL; } } - drm_property_replace_blob(blob, new_blob); - drm_property_blob_put(new_blob); + if (old_blob != new_blob) { + nv_drm_property_blob_put(old_blob); + if (new_blob) { + nv_drm_property_blob_get(new_blob); + } + *blob = new_blob; + *replaced = true; + } else { + *replaced = false; + } + + nv_drm_property_blob_put(new_blob); return 0; } -#endif static void nv_drm_plane_destroy(struct drm_plane *plane) { @@ -118,9 +213,40 @@ cursor_req_config_disable(struct NvKmsKapiCursorRequestedConfig *req_config) req_config->flags.surfaceChanged = NV_TRUE; } +static NvU64 ctm_val_to_csc_val(NvU64 ctm_val) +{ + /* + * Values in the CTM are encoded in S31.32 sign-magnitude fixed- + * point format, while NvKms CSC values are signed 2's-complement + * S15.16 (Ssign-extend12-3.16?) fixed-point format. + */ + NvU64 sign_bit = ctm_val & (1ULL << 63); + NvU64 magnitude = ctm_val & ~sign_bit; + + /* + * Drop the low 16 bits of the fractional part and the high 17 bits + * of the integral part. Drop 17 bits to avoid corner cases where + * the highest resulting bit is a 1, causing the `cscVal = -cscVal` + * line to result in a positive number. + * + * NOTE: Upstream precedent is to clamp to the range supported by hardware. + * Here, we truncate the integral part to 14 bits, and will later truncate + * further to the 3-5 bits supported by hardware within the display HAL. + * + * TODO: Clamping would be better, in the rare event that we receive + * coefficients that are large enough for it to matter. + */ + NvS32 csc_val = (magnitude >> 16) & ((1ULL << 31) - 1); + if (sign_bit) { + csc_val = -csc_val; + } + + return csc_val; +} + #if defined(NV_DRM_COLOR_MGMT_AVAILABLE) -static void color_mgmt_config_ctm_to_csc(struct NvKmsCscMatrix *nvkms_csc, - struct drm_color_ctm *drm_ctm) +static void ctm_to_csc(struct NvKmsCscMatrix *nvkms_csc, + struct drm_color_ctm *drm_ctm) { int y; @@ -131,31 +257,26 @@ static void color_mgmt_config_ctm_to_csc(struct NvKmsCscMatrix *nvkms_csc, int x; for (x = 0; x < 3; x++) { - /* - * Values in the CTM are encoded in S31.32 sign-magnitude fixed- - * point format, while NvKms CSC values are signed 2's-complement - * S15.16 (Ssign-extend12-3.16?) fixed-point format. - */ - NvU64 ctmVal = drm_ctm->matrix[y*3 + x]; - NvU64 signBit = ctmVal & (1ULL << 63); - NvU64 magnitude = ctmVal & ~signBit; + nvkms_csc->m[y][x] = ctm_val_to_csc_val(drm_ctm->matrix[y*3 + x]); + } + } +} +#endif /* NV_DRM_COLOR_MGMT_AVAILABLE */ - /* - * Drop the low 16 bits of the fractional part and the high 17 bits - * of the integral part. Drop 17 bits to avoid corner cases where - * the highest resulting bit is a 1, causing the `cscVal = -cscVal` - * line to result in a positive number. - */ - NvS32 cscVal = (magnitude >> 16) & ((1ULL << 31) - 1); - if (signBit) { - cscVal = -cscVal; - } +static void ctm_3x4_to_csc(struct NvKmsCscMatrix *nvkms_csc, + struct drm_color_ctm_3x4 *drm_ctm_3x4) +{ + int y; + + for (y = 0; y < 3; y++) { + int x; - nvkms_csc->m[y][x] = cscVal; + for (x = 0; x < 4; x++) { + nvkms_csc->m[y][x] = + ctm_val_to_csc_val(drm_ctm_3x4->matrix[y*4 + x]); } } } -#endif /* NV_DRM_COLOR_MGMT_AVAILABLE */ static void cursor_plane_req_config_update(struct drm_plane *plane, @@ -251,15 +372,702 @@ cursor_plane_req_config_update(struct drm_plane *plane, old_config.dstY != req_config->dstY; } +static void free_drm_lut_surface(struct kref *ref) +{ + struct nv_drm_lut_surface *drm_lut_surface = + container_of(ref, struct nv_drm_lut_surface, refcount); + struct NvKmsKapiDevice *pDevice = drm_lut_surface->pDevice; + + BUG_ON(drm_lut_surface->nvkms_surface == NULL); + BUG_ON(drm_lut_surface->nvkms_memory == NULL); + BUG_ON(drm_lut_surface->buffer == NULL); + + nvKms->destroySurface(pDevice, drm_lut_surface->nvkms_surface); + nvKms->unmapMemory(pDevice, drm_lut_surface->nvkms_memory, + NVKMS_KAPI_MAPPING_TYPE_KERNEL, + drm_lut_surface->buffer); + nvKms->freeMemory(pDevice, drm_lut_surface->nvkms_memory); + + nv_drm_free(drm_lut_surface); +} + +static struct nv_drm_lut_surface *alloc_drm_lut_surface( + struct nv_drm_device *nv_dev, + enum NvKmsLUTFormat entry_format, + enum NvKmsLUTVssType vss_type, + NvU32 num_vss_header_segments, + NvU32 num_vss_header_entries, + NvU32 num_entries) +{ + struct NvKmsKapiDevice *pDevice = nv_dev->pDevice; + struct nv_drm_lut_surface *drm_lut_surface; + NvU8 compressible = 0; // No compression + size_t size = + (((num_vss_header_entries + num_entries) * + NVKMS_LUT_CAPS_LUT_ENTRY_SIZE) + 255) & ~255; // 256-byte aligned + + struct NvKmsKapiMemory *surface_mem; + struct NvKmsKapiSurface *surface; + struct NvKmsKapiCreateSurfaceParams params = {}; + NvU16 *lut_data; + + /* Allocate displayable memory. */ + if (nv_dev->hasVideoMemory) { + surface_mem = + nvKms->allocateVideoMemory(pDevice, + NvKmsSurfaceMemoryLayoutPitch, + NVKMS_KAPI_ALLOCATION_TYPE_SCANOUT, + size, + &compressible); + } else { + surface_mem = + nvKms->allocateSystemMemory(pDevice, + NvKmsSurfaceMemoryLayoutPitch, + NVKMS_KAPI_ALLOCATION_TYPE_SCANOUT, + size, + &compressible); + } + if (surface_mem == NULL) { + return NULL; + } + + /* Map memory in order to populate it. */ + if (!nvKms->mapMemory(pDevice, surface_mem, + NVKMS_KAPI_MAPPING_TYPE_KERNEL, + (void **) &lut_data)) { + nvKms->freeMemory(pDevice, surface_mem); + return NULL; + } + + /* Create surface. */ + params.format = NvKmsSurfaceMemoryFormatR16G16B16A16; + params.width = num_vss_header_entries + num_entries; + params.height = 1; + params.planes[0].memory = surface_mem; + params.planes[0].offset = 0; + params.planes[0].pitch = size; + + surface = nvKms->createSurface(pDevice, ¶ms); + if (surface == NULL) { + nvKms->unmapMemory(pDevice, surface_mem, + NVKMS_KAPI_MAPPING_TYPE_KERNEL, (void *) lut_data); + nvKms->freeMemory(pDevice, surface_mem); + return NULL; + } + + /* Pack into struct nv_drm_lut_surface. */ + drm_lut_surface = nv_drm_calloc(1, sizeof(struct nv_drm_lut_surface)); + if (drm_lut_surface == NULL) { + nvKms->destroySurface(pDevice, surface); + nvKms->unmapMemory(pDevice, surface_mem, + NVKMS_KAPI_MAPPING_TYPE_KERNEL, (void *) lut_data); + nvKms->freeMemory(pDevice, surface_mem); + return NULL; + } + drm_lut_surface->pDevice = pDevice; + drm_lut_surface->nvkms_memory = surface_mem; + drm_lut_surface->nvkms_surface = surface; + drm_lut_surface->buffer = lut_data; + drm_lut_surface->properties.vssSegments = num_vss_header_segments; + drm_lut_surface->properties.vssType = vss_type; + drm_lut_surface->properties.lutEntries = num_entries; + drm_lut_surface->properties.entryFormat = entry_format; + + /* Init refcount. */ + kref_init(&drm_lut_surface->refcount); + + return drm_lut_surface; +} + +static NvU32 fp32_lut_interp( + NvU16 entry0, + NvU16 entry1, + NvU32 interp, + NvU32 interp_max) +{ + NvU32 fp32_entry0 = nvKmsKapiUI32ToF32((NvU32) entry0); + NvU32 fp32_entry1 = nvKmsKapiUI32ToF32((NvU32) entry1); + + NvU32 fp32_num0 = nvKmsKapiUI32ToF32(interp_max - interp); + NvU32 fp32_num1 = nvKmsKapiUI32ToF32(interp); + NvU32 fp32_denom = nvKmsKapiUI32ToF32(interp_max); + + fp32_entry0 = nvKmsKapiF32Mul(fp32_entry0, fp32_num0); + fp32_entry0 = nvKmsKapiF32Div(fp32_entry0, fp32_denom); + + fp32_entry1 = nvKmsKapiF32Mul(fp32_entry1, fp32_num1); + fp32_entry1 = nvKmsKapiF32Div(fp32_entry1, fp32_denom); + + return nvKmsKapiF32Add(fp32_entry0, fp32_entry1); +} + +static struct nv_drm_lut_surface *create_drm_ilut_surface_vss( + struct nv_drm_device *nv_dev, + struct nv_drm_plane *nv_plane, + struct nv_drm_plane_state *nv_drm_plane_state) +{ + static const NvU32 fp_norm = 0x42FA0000; // FP32 125.0 + static const NvU32 u10_norm = 0x447FC000; // FP32 1023.0 + static const NvU32 u16_norm = 0x477FFF00; // FP32 UINT16_MAX + // FP32 UINT32_MAX (Precision limited to 2^32) + static const NvU32 u32_norm = 0x4F800000; + + struct nv_drm_lut_surface *drm_lut_surface; + + NvU32 entry_idx; + NvU32 num_entries; + NvU16 *lut_data; + + const NvU32 *vss_header_seg_sizes = NULL; + NvU32 num_vss_header_segments = 0; + const NvU16 *vss_entries = NULL; + enum NvKmsLUTVssType vss_type = NVKMS_LUT_VSS_TYPE_NONE; + + NvBool multiply = false; + NvU32 fp32_multiplier; + + WARN_ON(!nv_plane->ilut_caps.supported); + WARN_ON(nv_plane->ilut_caps.entryFormat != NVKMS_LUT_FORMAT_FP16); + WARN_ON(nv_plane->ilut_caps.vssSupport != NVKMS_LUT_VSS_SUPPORTED); + WARN_ON(nv_plane->ilut_caps.vssType != NVKMS_LUT_VSS_TYPE_LINEAR); + + /* Convert multiplier from S31.32 Sign-Magnitude format to FP32. */ + if (nv_drm_plane_state->degamma_multiplier != (((NvU64) 1) << 32)) { + NvU32 upper = (NvU32) (nv_drm_plane_state->degamma_multiplier >> 32); + NvU32 lower = (NvU32) nv_drm_plane_state->degamma_multiplier; + + /* Range property is configured to ensure sign bit = 0. */ + WARN_ON(nv_drm_plane_state->degamma_multiplier & (((NvU64) 1) << 63)); + + fp32_multiplier = + nvKmsKapiF32Add( + nvKmsKapiUI32ToF32(upper), + nvKmsKapiF32Div(nvKmsKapiUI32ToF32(lower), u32_norm)); + + multiply = true; + } + + /* Determine configuration based on specified EOTF. */ + if (nv_drm_plane_state->degamma_tf == NV_DRM_TRANSFER_FUNCTION_PQ) { + /* Need VSS for PQ. */ + vss_header_seg_sizes = __eotf_pq_512_seg_sizes_log2; + num_vss_header_segments = ARRAY_LEN(__eotf_pq_512_seg_sizes_log2); + vss_type = NVKMS_LUT_VSS_TYPE_LINEAR; + + vss_entries = __eotf_pq_512_entries; + num_entries = ARRAY_LEN(__eotf_pq_512_entries) + 1; + } else { + WARN_ON((nv_drm_plane_state->degamma_tf != NV_DRM_TRANSFER_FUNCTION_DEFAULT) && + (nv_drm_plane_state->degamma_tf != NV_DRM_TRANSFER_FUNCTION_LINEAR)); + + num_entries = NVKMS_LUT_ARRAY_SIZE + 1; + } + WARN_ON((vss_entries != NULL) && + (num_vss_header_segments != nv_plane->ilut_caps.vssSegments)); + WARN_ON((vss_entries != NULL) && (num_entries > nv_plane->ilut_caps.lutEntries)); + WARN_ON((vss_entries == NULL) && (num_entries != nv_plane->ilut_caps.lutEntries)); + + /* + * Allocate displayable LUT surface. + * Space for the VSS header must be included even for non-VSS LUTs. + */ + drm_lut_surface = + alloc_drm_lut_surface(nv_dev, + NVKMS_LUT_FORMAT_FP16, + vss_type, + num_vss_header_segments, + NUM_VSS_HEADER_ENTRIES, + num_entries); + if (!drm_lut_surface) { + return NULL; + } + + lut_data = (NvU16 *) drm_lut_surface->buffer; + + /* Calculate VSS header. */ + if (vss_header_seg_sizes != NULL) { + for (entry_idx = 0; entry_idx < NUM_VSS_HEADER_ENTRIES; entry_idx++) { + int i; + NvU64 vss_header_entry = 0; + for (i = 0; (i < 16) && + (((entry_idx * 16) + i) < num_vss_header_segments); i++) { + vss_header_entry |= + ((NvU64) vss_header_seg_sizes[(entry_idx * 16) + i]) << (i * 3); + } + ((NvU64 *) lut_data)[entry_idx] = vss_header_entry; + } + } + + /* Calculate LUT content. */ + for (entry_idx = 0; + entry_idx < num_entries - 1; entry_idx++) { + NvU32 fp32_r, fp32_g, fp32_b; + NvU32 data_idx = entry_idx + NUM_VSS_HEADER_ENTRIES; + + if (nv_drm_plane_state->degamma_lut != NULL) { + /* Use provided Degamma LUT. */ + static const NvU32 interp_max = (((NvU32) 1) << (32 - 10)) - 1; + + const struct drm_color_lut *degamma_lut = + (struct drm_color_lut *) nv_drm_plane_state->degamma_lut->data; + + NvU16 lut_idx; + NvU32 interp = 0; + + if (vss_entries != NULL) { + /* Merge with provided VSS LUT. */ + NvU16 fp16_entry = vss_entries[entry_idx]; + + /* Convert from FP16 to UNORM32. */ + // TODO: Use pre-UNORM32-normalized VSS LUT table? + NvU32 unorm32_entry = + nvKmsKapiF32ToUI32RMinMag( + nvKmsKapiF32Mul( + nvKmsKapiF32Div(nvKmsKapiF16ToF32(fp16_entry), + fp_norm), + u32_norm), + false); + + /* Index using upper 10 bits from UNORM32 VSS LUT. */ + lut_idx = unorm32_entry >> (32 - 10); + /* Interpolate using lower 22 bits from UNORM32 VSS LUT. */ + interp = unorm32_entry & interp_max; + } else { + /* Direct index. */ + lut_idx = entry_idx; + } + + BUG_ON(lut_idx >= NVKMS_LUT_ARRAY_SIZE); + + /* Perform interpolation or direct indexing. */ + if (interp > 0 && ((lut_idx + 1) < NVKMS_LUT_ARRAY_SIZE)) { + fp32_r = + fp32_lut_interp(degamma_lut[lut_idx].red, + degamma_lut[lut_idx + 1].red, + interp, + interp_max); + fp32_g = + fp32_lut_interp(degamma_lut[lut_idx].green, + degamma_lut[lut_idx + 1].green, + interp, + interp_max); + fp32_b = + fp32_lut_interp(degamma_lut[lut_idx].blue, + degamma_lut[lut_idx + 1].blue, + interp, + interp_max); + } else { + fp32_r = nvKmsKapiUI32ToF32((NvU32) degamma_lut[lut_idx].red); + fp32_g = nvKmsKapiUI32ToF32((NvU32) degamma_lut[lut_idx].green); + fp32_b = nvKmsKapiUI32ToF32((NvU32) degamma_lut[lut_idx].blue); + } + + /* Convert UNORM16 to 1.0-normalized FP32. */ + fp32_r = nvKmsKapiF32Div(fp32_r, u16_norm); + fp32_g = nvKmsKapiF32Div(fp32_g, u16_norm); + fp32_b = nvKmsKapiF32Div(fp32_b, u16_norm); + } else if (vss_entries != NULL) { + /* Use VSS LUT directly, but normalized to 1.0. */ + // TODO: Use pre-1.0-normalized VSS LUT table? + NvU16 fp16_entry = vss_entries[entry_idx]; + NvU32 fp32_entry = nvKmsKapiF16ToF32(fp16_entry); + + fp32_r = fp32_g = fp32_b = nvKmsKapiF32Div(fp32_entry, fp_norm); + } else { + /* Use implicit identity. */ + // TODO: Use LUT table? + fp32_r = fp32_g = fp32_b = + nvKmsKapiF32Div(nvKmsKapiUI32ToF32(entry_idx), u10_norm); + } + + /* Apply multiplier. */ + if (multiply) { + fp32_r = nvKmsKapiF32Mul(fp32_r, fp32_multiplier); + fp32_g = nvKmsKapiF32Mul(fp32_g, fp32_multiplier); + fp32_b = nvKmsKapiF32Mul(fp32_b, fp32_multiplier); + } + + /* Convert from FP32 to FP16 to populate LUT. */ + lut_data[(data_idx * 4) + 0] = nvKmsKapiF32ToF16(fp32_r); + lut_data[(data_idx * 4) + 1] = nvKmsKapiF32ToF16(fp32_g); + lut_data[(data_idx * 4) + 2] = nvKmsKapiF32ToF16(fp32_b); + } + ((NvU64 *) lut_data)[NUM_VSS_HEADER_ENTRIES + num_entries - 1] = + ((NvU64 *) lut_data)[NUM_VSS_HEADER_ENTRIES + num_entries - 2]; + + return drm_lut_surface; +} + +#define UNORM16_TO_UNORM14_WAR_813188(u16) ((u16 >> 2) & ~7) + 0x6000 + +static struct nv_drm_lut_surface *create_drm_ilut_surface_legacy( + struct nv_drm_device *nv_dev, + struct nv_drm_plane *nv_plane, + struct nv_drm_plane_state *nv_drm_plane_state) + +{ + struct nv_drm_lut_surface *drm_lut_surface; + NvU16 *lut_data; + NvU32 entry_idx; + + const struct drm_color_lut *degamma_lut; + + WARN_ON(!nv_plane->ilut_caps.supported); + WARN_ON(nv_plane->ilut_caps.entryFormat != NVKMS_LUT_FORMAT_UNORM14_WAR_813188); + WARN_ON(nv_plane->ilut_caps.vssSupport == NVKMS_LUT_VSS_REQUIRED); + WARN_ON((NVKMS_LUT_ARRAY_SIZE + 1) > nv_plane->ilut_caps.lutEntries); + + BUG_ON(nv_drm_plane_state->degamma_lut == NULL); + + degamma_lut = + (struct drm_color_lut *) nv_drm_plane_state->degamma_lut->data; + + /* Allocate displayable LUT surface. */ + drm_lut_surface = + alloc_drm_lut_surface(nv_dev, + NVKMS_LUT_FORMAT_UNORM14_WAR_813188, + NVKMS_LUT_VSS_TYPE_NONE, + 0, 0, + NVKMS_LUT_ARRAY_SIZE + 1); + if (drm_lut_surface == NULL) { + return NULL; + } + + lut_data = (NvU16 *) drm_lut_surface->buffer; + + /* Fill LUT surface. */ + for (entry_idx = 0; entry_idx < NVKMS_LUT_ARRAY_SIZE; entry_idx++) { + lut_data[(entry_idx * 4) + 0] = + UNORM16_TO_UNORM14_WAR_813188(degamma_lut[entry_idx].red); + lut_data[(entry_idx * 4) + 1] = + UNORM16_TO_UNORM14_WAR_813188(degamma_lut[entry_idx].green); + lut_data[(entry_idx * 4) + 2] = + UNORM16_TO_UNORM14_WAR_813188(degamma_lut[entry_idx].blue); + } + ((NvU64 *) lut_data)[NVKMS_LUT_ARRAY_SIZE] = + ((NvU64 *) lut_data)[NVKMS_LUT_ARRAY_SIZE - 1]; + + return drm_lut_surface; +} + +static struct nv_drm_lut_surface *create_drm_tmo_surface( + struct nv_drm_device *nv_dev, + struct nv_drm_plane *nv_plane, + struct nv_drm_plane_state *nv_drm_plane_state) + +{ + struct nv_drm_lut_surface *drm_lut_surface; + NvU16 *lut_data; + NvU32 entry_idx; + + const struct drm_color_lut *tmo_lut; + + const NvU32 num_vss_header_segments = 64; + const NvU32 tmo_seg_size_log2 = 4; + + WARN_ON(!nv_plane->tmo_caps.supported); + WARN_ON(nv_plane->tmo_caps.entryFormat != NVKMS_LUT_FORMAT_UNORM16); + WARN_ON(nv_plane->tmo_caps.vssSupport != NVKMS_LUT_VSS_REQUIRED); + WARN_ON(nv_plane->tmo_caps.vssType != NVKMS_LUT_VSS_TYPE_LINEAR); + WARN_ON(num_vss_header_segments != nv_plane->tmo_caps.vssSegments); + WARN_ON((NVKMS_LUT_ARRAY_SIZE + 1) > nv_plane->tmo_caps.lutEntries); + + BUG_ON(nv_drm_plane_state->tmo_lut == NULL); + + tmo_lut = (struct drm_color_lut *) nv_drm_plane_state->tmo_lut->data; + + /* Verify that all channels are equal. */ + for (entry_idx = 0; entry_idx < NVKMS_LUT_ARRAY_SIZE; entry_idx++) { + if ((tmo_lut[entry_idx].red != tmo_lut[entry_idx].green) || + (tmo_lut[entry_idx].red != tmo_lut[entry_idx].blue)) { + return NULL; + } + } + + /* + * Allocate displayable LUT surface. + * The TMO LUT always uses VSS. + */ + drm_lut_surface = + alloc_drm_lut_surface(nv_dev, + NVKMS_LUT_FORMAT_UNORM16, + NVKMS_LUT_VSS_TYPE_LINEAR, + num_vss_header_segments, + NUM_VSS_HEADER_ENTRIES, + NVKMS_LUT_ARRAY_SIZE + 1); + if (drm_lut_surface == NULL) { + return NULL; + } + + lut_data = (NvU16 *) drm_lut_surface->buffer; + + /* Calculate linear VSS header. */ + for (entry_idx = 0; entry_idx < NUM_VSS_HEADER_ENTRIES; entry_idx++) { + int i; + NvU64 vss_header_entry = 0; + for (i = 0; (i < 16) && + (((entry_idx * 16) + i) < num_vss_header_segments); i++) { + vss_header_entry |= + ((NvU64) tmo_seg_size_log2) << (i * 3); + } + ((NvU64 *) lut_data)[entry_idx] = vss_header_entry; + } + + /* Fill LUT surface. */ + for (entry_idx = 0; entry_idx < NVKMS_LUT_ARRAY_SIZE; entry_idx++) { + NvU32 data_idx = entry_idx + NUM_VSS_HEADER_ENTRIES; + + lut_data[(data_idx * 4) + 0] = tmo_lut[entry_idx].red; + lut_data[(data_idx * 4) + 1] = tmo_lut[entry_idx].green; + lut_data[(data_idx * 4) + 2] = tmo_lut[entry_idx].blue; + } + ((NvU64 *) lut_data)[NUM_VSS_HEADER_ENTRIES + NVKMS_LUT_ARRAY_SIZE] = + ((NvU64 *) lut_data)[NUM_VSS_HEADER_ENTRIES + NVKMS_LUT_ARRAY_SIZE - 1]; + + return drm_lut_surface; +} + +static NvU16 unorm16_lut_interp( + NvU16 entry0, + NvU16 entry1, + NvU16 interp, + NvU16 interp_max) +{ + NvU64 u64_entry0 = (NvU64) entry0; + NvU64 u64_entry1 = (NvU64) entry1; + + u64_entry0 *= (NvU64) (interp_max - interp); + u64_entry0 /= (NvU64) interp_max; + + u64_entry1 *= (NvU64) interp; + u64_entry1 /= (NvU64) interp_max; + + return (NvU16) (u64_entry0 + u64_entry1); +} + +static struct nv_drm_lut_surface *create_drm_olut_surface_vss( + struct nv_drm_device *nv_dev, + struct nv_drm_crtc *nv_crtc, + struct nv_drm_crtc_state *nv_drm_crtc_state) +{ + struct nv_drm_lut_surface *drm_lut_surface; + + NvU32 entry_idx; + NvU32 num_entries; + NvU16 *lut_data; + + const NvU32 *vss_header_seg_sizes = NULL; + NvU32 num_vss_header_segments = 0; + const NvU16 *vss_entries = NULL; + enum NvKmsLUTVssType vss_type = NVKMS_LUT_VSS_TYPE_NONE; + + WARN_ON(!nv_crtc->olut_caps.supported); + WARN_ON(nv_crtc->olut_caps.entryFormat != NVKMS_LUT_FORMAT_UNORM16); + WARN_ON(nv_crtc->olut_caps.vssSupport != NVKMS_LUT_VSS_SUPPORTED); + WARN_ON(nv_crtc->olut_caps.vssType != NVKMS_LUT_VSS_TYPE_LOGARITHMIC); + + /* Determine configuration based on specified OETF. */ + if (nv_drm_crtc_state->regamma_tf == NV_DRM_TRANSFER_FUNCTION_PQ) { + /* Need VSS for PQ. */ + vss_header_seg_sizes = __oetf_pq_512_seg_sizes_log2; + num_vss_header_segments = ARRAY_LEN(__oetf_pq_512_seg_sizes_log2); + vss_type = NVKMS_LUT_VSS_TYPE_LOGARITHMIC; + + vss_entries = __oetf_pq_512_entries; + num_entries = ARRAY_LEN(__oetf_pq_512_entries) + 1; + } else { + WARN_ON((nv_drm_crtc_state->regamma_tf != NV_DRM_TRANSFER_FUNCTION_DEFAULT) && + (nv_drm_crtc_state->regamma_tf != NV_DRM_TRANSFER_FUNCTION_LINEAR)); + + num_entries = NVKMS_LUT_ARRAY_SIZE + 1; + } + WARN_ON((vss_entries != NULL) && + (num_vss_header_segments != nv_crtc->olut_caps.vssSegments)); + WARN_ON((vss_entries != NULL) && (num_entries > nv_crtc->olut_caps.lutEntries)); + WARN_ON((vss_entries == NULL) && (num_entries != nv_crtc->olut_caps.lutEntries)); + + /* + * Allocate displayable LUT surface. + * Space for the VSS header must be included even for non-VSS LUTs. + */ + drm_lut_surface = + alloc_drm_lut_surface(nv_dev, + NVKMS_LUT_FORMAT_UNORM16, + vss_type, + num_vss_header_segments, + NUM_VSS_HEADER_ENTRIES, + num_entries); + if (!drm_lut_surface) { + return NULL; + } + + lut_data = (NvU16 *) drm_lut_surface->buffer; + + /* Calculate VSS header. */ + if (vss_header_seg_sizes != NULL) { + for (entry_idx = 0; entry_idx < NUM_VSS_HEADER_ENTRIES; entry_idx++) { + int i; + NvU64 vss_header_entry = 0; + for (i = 0; (i < 16) && + (((entry_idx * 16) + i) < num_vss_header_segments); i++) { + vss_header_entry |= + ((NvU64) vss_header_seg_sizes[(entry_idx * 16) + i]) << (i * 3); + } + ((NvU64 *) lut_data)[entry_idx] = vss_header_entry; + } + } + + /* Calculate LUT content. */ + for (entry_idx = 0; + entry_idx < num_entries - 1; entry_idx++) { + NvU32 data_idx = entry_idx + NUM_VSS_HEADER_ENTRIES; + + NvU16 r, g, b = 0; + + if (nv_drm_crtc_state->regamma_lut != NULL) { + /* Use provided Regamma LUT. */ + static const NvU16 interp_max = (((NvU16) 1) << (16 - 10)) - 1; + + const struct drm_color_lut *regamma_lut = + (struct drm_color_lut *) nv_drm_crtc_state->regamma_lut->data; + + NvU16 lut_idx; + NvU16 interp = 0; + + if (vss_entries != NULL) { + /* Merge with provided VSS LUT. */ + NvU16 unorm16_entry = vss_entries[entry_idx]; + + /* Index using upper 10 bits from UNORM16 VSS LUT. */ + lut_idx = unorm16_entry >> (16 - 10); + /* Interpolate using lower 6 bits from UNORM16 VSS LUT. */ + interp = unorm16_entry & interp_max; + } else { + /* Direct index. */ + lut_idx = entry_idx; + } + + BUG_ON(lut_idx >= NVKMS_LUT_ARRAY_SIZE); + + /* Perform interpolation or direct indexing. */ + if (interp > 0 && ((lut_idx + 1) < NVKMS_LUT_ARRAY_SIZE)) { + r = unorm16_lut_interp(regamma_lut[lut_idx].red, + regamma_lut[lut_idx + 1].red, + interp, + interp_max); + g = unorm16_lut_interp(regamma_lut[lut_idx].green, + regamma_lut[lut_idx + 1].green, + interp, + interp_max); + b = unorm16_lut_interp(regamma_lut[lut_idx].blue, + regamma_lut[lut_idx + 1].blue, + interp, + interp_max); + } else { + r = regamma_lut[lut_idx].red; + g = regamma_lut[lut_idx].green; + b = regamma_lut[lut_idx].blue; + } + } else if (vss_entries != NULL) { + /* Use VSS LUT directly. */ + r = g = b = vss_entries[entry_idx]; + } else { + /* Use implicit identity. */ + WARN_ON_ONCE(num_entries != (NVKMS_LUT_ARRAY_SIZE + 1)); + r = g = b = entry_idx << (16 - 10); + } + + /* Populate LUT. */ + lut_data[(data_idx * 4) + 0] = r; + lut_data[(data_idx * 4) + 1] = g; + lut_data[(data_idx * 4) + 2] = b; + } + ((NvU64 *) lut_data)[NUM_VSS_HEADER_ENTRIES + num_entries - 1] = + ((NvU64 *) lut_data)[NUM_VSS_HEADER_ENTRIES + num_entries - 2]; + + return drm_lut_surface; +} + +static struct nv_drm_lut_surface *create_drm_olut_surface_legacy( + struct nv_drm_device *nv_dev, + struct nv_drm_crtc *nv_crtc, + struct nv_drm_crtc_state *nv_drm_crtc_state) + +{ + struct nv_drm_lut_surface *drm_lut_surface; + NvU16 *lut_data; + NvU32 entry_idx; + + const struct drm_color_lut *regamma_lut; + + WARN_ON(!nv_crtc->olut_caps.supported); + WARN_ON(nv_crtc->olut_caps.entryFormat != NVKMS_LUT_FORMAT_UNORM14_WAR_813188); + WARN_ON(nv_crtc->olut_caps.vssSupport == NVKMS_LUT_VSS_REQUIRED); + WARN_ON((NVKMS_LUT_ARRAY_SIZE + 1) > nv_crtc->olut_caps.lutEntries); + + BUG_ON(nv_drm_crtc_state->regamma_lut == NULL); + + regamma_lut = + (struct drm_color_lut *) nv_drm_crtc_state->regamma_lut->data; + + /* Allocate displayable LUT surface. */ + drm_lut_surface = + alloc_drm_lut_surface(nv_dev, + NVKMS_LUT_FORMAT_UNORM14_WAR_813188, + NVKMS_LUT_VSS_TYPE_NONE, + 0, 0, + NVKMS_LUT_ARRAY_SIZE + 1); + if (drm_lut_surface == NULL) { + return NULL; + } + + lut_data = (NvU16 *) drm_lut_surface->buffer; + + /* Fill LUT surface. */ + for (entry_idx = 0; entry_idx < NVKMS_LUT_ARRAY_SIZE; entry_idx++) { + lut_data[(entry_idx * 4) + 0] = + UNORM16_TO_UNORM14_WAR_813188(regamma_lut[entry_idx].red); + lut_data[(entry_idx * 4) + 1] = + UNORM16_TO_UNORM14_WAR_813188(regamma_lut[entry_idx].green); + lut_data[(entry_idx * 4) + 2] = + UNORM16_TO_UNORM14_WAR_813188(regamma_lut[entry_idx].blue); + } + ((NvU64 *) lut_data)[NVKMS_LUT_ARRAY_SIZE] = + ((NvU64 *) lut_data)[NVKMS_LUT_ARRAY_SIZE - 1]; + + return drm_lut_surface; +} + +static bool +update_matrix_override(struct drm_property_blob *blob, + struct NvKmsCscMatrix *new_matrix, + const struct NvKmsCscMatrix *old_matrix, + bool old_enabled, + bool *changed) +{ + bool enabled; + if (blob != NULL) { + ctm_3x4_to_csc(new_matrix, (struct drm_color_ctm_3x4 *) blob->data); + enabled = true; + } else { + enabled = false; + } + *changed |= (enabled != old_enabled) || + memcmp(new_matrix, old_matrix, sizeof(*old_matrix)); + return enabled; +} + static int plane_req_config_update(struct drm_plane *plane, struct drm_plane_state *plane_state, struct NvKmsKapiLayerRequestedConfig *req_config) { + struct nv_drm_device *nv_dev = to_nv_device(plane->dev); struct nv_drm_plane *nv_plane = to_nv_plane(plane); struct NvKmsKapiLayerConfig old_config = req_config->config; struct nv_drm_plane_state *nv_drm_plane_state = to_nv_drm_plane_state(plane_state); + bool matrix_overrides_changed = 0; if (plane_state->fb == NULL) { plane_req_config_disable(req_config); @@ -390,7 +1198,7 @@ plane_req_config_update(struct drm_plane *plane, req_config->config.syncParams.semaphoreSpecified = false; if (nv_drm_plane_state->fd_user_ptr) { - if (to_nv_device(plane->dev)->supportsSyncpts) { + if (nv_dev->supportsSyncpts) { req_config->config.syncParams.postSyncptRequested = true; } else { return -1; @@ -403,7 +1211,6 @@ plane_req_config_update(struct drm_plane *plane, nv_drm_plane_state->hdr_output_metadata->data; struct hdr_metadata_infoframe *info_frame = &hdr_metadata->hdmi_metadata_type1; - struct nv_drm_device *nv_dev = to_nv_device(plane->dev); uint32_t i; if (hdr_metadata->metadata_type != HDMI_STATIC_METADATA_TYPE1) { @@ -460,6 +1267,118 @@ plane_req_config_update(struct drm_plane *plane, req_config->flags.tfChanged = (old_config.tf != req_config->config.tf); #endif + req_config->config.matrixOverrides.enabled.lmsCtm = + update_matrix_override(nv_drm_plane_state->lms_ctm, + &req_config->config.matrixOverrides.lmsCtm, + &old_config.matrixOverrides.lmsCtm, + old_config.matrixOverrides.enabled.lmsCtm, + &matrix_overrides_changed); + req_config->config.matrixOverrides.enabled.lmsToItpCtm = + update_matrix_override(nv_drm_plane_state->lms_to_itp_ctm, + &req_config->config.matrixOverrides.lmsToItpCtm, + &old_config.matrixOverrides.lmsToItpCtm, + old_config.matrixOverrides.enabled.lmsToItpCtm, + &matrix_overrides_changed); + req_config->config.matrixOverrides.enabled.itpToLmsCtm = + update_matrix_override(nv_drm_plane_state->itp_to_lms_ctm, + &req_config->config.matrixOverrides.itpToLmsCtm, + &old_config.matrixOverrides.itpToLmsCtm, + old_config.matrixOverrides.enabled.itpToLmsCtm, + &matrix_overrides_changed); + req_config->config.matrixOverrides.enabled.blendCtm = + update_matrix_override(nv_drm_plane_state->blend_ctm, + &req_config->config.matrixOverrides.blendCtm, + &old_config.matrixOverrides.blendCtm, + old_config.matrixOverrides.enabled.blendCtm, + &matrix_overrides_changed); + req_config->flags.matrixOverridesChanged = matrix_overrides_changed; + + if (nv_drm_plane_state->degamma_changed) { + if (nv_drm_plane_state->degamma_drm_lut_surface != NULL) { + kref_put(&nv_drm_plane_state->degamma_drm_lut_surface->refcount, + free_drm_lut_surface); + nv_drm_plane_state->degamma_drm_lut_surface = NULL; + } + + if (nv_plane->ilut_caps.vssSupport == NVKMS_LUT_VSS_SUPPORTED) { + if ((nv_drm_plane_state->degamma_tf != NV_DRM_TRANSFER_FUNCTION_DEFAULT) || + (nv_drm_plane_state->degamma_lut != NULL) || + (nv_drm_plane_state->degamma_multiplier != ((uint64_t) 1) << 32)) { + + nv_drm_plane_state->degamma_drm_lut_surface = + create_drm_ilut_surface_vss(nv_dev, nv_plane, + nv_drm_plane_state); + if (nv_drm_plane_state->degamma_drm_lut_surface == NULL) { + return -1; + } + } + } else { + WARN_ON(nv_plane->ilut_caps.vssSupport != NVKMS_LUT_VSS_NOT_SUPPORTED); + if (nv_drm_plane_state->degamma_lut != NULL) { + nv_drm_plane_state->degamma_drm_lut_surface = + create_drm_ilut_surface_legacy(nv_dev, nv_plane, + nv_drm_plane_state); + if (nv_drm_plane_state->degamma_drm_lut_surface == NULL) { + return -1; + } + } + } + + if (nv_drm_plane_state->degamma_drm_lut_surface != NULL) { + req_config->config.ilut.enabled = NV_TRUE; + req_config->config.ilut.lutSurface = + nv_drm_plane_state->degamma_drm_lut_surface->nvkms_surface; + req_config->config.ilut.offset = 0; + req_config->config.ilut.vssSegments = + nv_drm_plane_state->degamma_drm_lut_surface->properties.vssSegments; + req_config->config.ilut.lutEntries = + nv_drm_plane_state->degamma_drm_lut_surface->properties.lutEntries; + } else { + req_config->config.ilut.enabled = NV_FALSE; + req_config->config.ilut.lutSurface = NULL; + req_config->config.ilut.offset = 0; + req_config->config.ilut.vssSegments = 0; + req_config->config.ilut.lutEntries = 0; + + } + req_config->flags.ilutChanged = NV_TRUE; + } + + if (nv_drm_plane_state->tmo_changed) { + if (nv_drm_plane_state->tmo_drm_lut_surface != NULL) { + kref_put(&nv_drm_plane_state->tmo_drm_lut_surface->refcount, + free_drm_lut_surface); + nv_drm_plane_state->tmo_drm_lut_surface = NULL; + } + + if (nv_drm_plane_state->tmo_lut != NULL) { + nv_drm_plane_state->tmo_drm_lut_surface = + create_drm_tmo_surface(nv_dev, nv_plane, + nv_drm_plane_state); + if (nv_drm_plane_state->tmo_drm_lut_surface == NULL) { + return -1; + } + } + + if (nv_drm_plane_state->tmo_drm_lut_surface != NULL) { + req_config->config.tmo.enabled = NV_TRUE; + req_config->config.tmo.lutSurface = + nv_drm_plane_state->tmo_drm_lut_surface->nvkms_surface; + req_config->config.tmo.offset = 0; + req_config->config.tmo.vssSegments = + nv_drm_plane_state->tmo_drm_lut_surface->properties.vssSegments; + req_config->config.tmo.lutEntries = + nv_drm_plane_state->tmo_drm_lut_surface->properties.lutEntries; + } else { + req_config->config.tmo.enabled = NV_FALSE; + req_config->config.tmo.lutSurface = NULL; + req_config->config.tmo.offset = 0; + req_config->config.tmo.vssSegments = 0; + req_config->config.tmo.lutEntries = 0; + } + req_config->flags.tmoChanged = NV_TRUE; + } + /* * Unconditionally mark the surface as changed, even if nothing changed, * so that we always get a flip event: a DRM client may flip with @@ -594,8 +1513,8 @@ static int nv_drm_plane_atomic_check(struct drm_plane *plane, * the CTM needs to be changed to the identity matrix */ if (crtc_state->ctm) { - color_mgmt_config_ctm_to_csc(&plane_requested_config->config.csc, - (struct drm_color_ctm *)crtc_state->ctm->data); + ctm_to_csc(&plane_requested_config->config.csc, + (struct drm_color_ctm *)crtc_state->ctm->data); } else { plane_requested_config->config.csc = NVKMS_IDENTITY_CSC_MATRIX; } @@ -632,6 +1551,77 @@ static bool nv_drm_plane_format_mod_supported(struct drm_plane *plane, } #endif +static int nv_drm_atomic_crtc_get_property( + struct drm_crtc *crtc, + const struct drm_crtc_state *state, + struct drm_property *property, + uint64_t *val) +{ + struct nv_drm_device *nv_dev = to_nv_device(crtc->dev); + const struct nv_drm_crtc_state *nv_drm_crtc_state = + to_nv_crtc_state_const(state); + + if (property == nv_dev->nv_crtc_regamma_tf_property) { + *val = nv_drm_crtc_state->regamma_tf; + return 0; + } else if (property == nv_dev->nv_crtc_regamma_lut_property) { + *val = nv_drm_crtc_state->regamma_lut ? + nv_drm_crtc_state->regamma_lut->base.id : 0; + return 0; + } else if (property == nv_dev->nv_crtc_regamma_divisor_property) { + *val = nv_drm_crtc_state->regamma_divisor; + return 0; + } else if (property == nv_dev->nv_crtc_regamma_lut_size_property) { + /* + * This shouldn't be necessary, because read-only properties are stored + * in obj->properties->values[]. To be safe, check for it anyway. + */ + *val = NVKMS_LUT_ARRAY_SIZE; + return 0; + } + + return -EINVAL; + +} + +static int nv_drm_atomic_crtc_set_property( + struct drm_crtc *crtc, + struct drm_crtc_state *state, + struct drm_property *property, + uint64_t val) +{ + struct nv_drm_device *nv_dev = to_nv_device(crtc->dev); + struct nv_drm_crtc_state *nv_drm_crtc_state = + to_nv_crtc_state(state); + NvBool replaced = false; + + if (property == nv_dev->nv_crtc_regamma_tf_property) { + if (val != nv_drm_crtc_state->regamma_tf) { + nv_drm_crtc_state->regamma_tf = val; + nv_drm_crtc_state->regamma_changed = true; + } + return 0; + } else if (property == nv_dev->nv_crtc_regamma_lut_property) { + int ret = nv_drm_atomic_replace_property_blob_from_id( + nv_dev->dev, + &nv_drm_crtc_state->regamma_lut, + val, + sizeof(struct drm_color_lut) * NVKMS_LUT_ARRAY_SIZE, + &replaced); + if (replaced) { + nv_drm_crtc_state->regamma_changed = true; + } + return ret; + } else if (property == nv_dev->nv_crtc_regamma_divisor_property) { + if (val != nv_drm_crtc_state->regamma_divisor) { + nv_drm_crtc_state->regamma_divisor = val; + nv_drm_crtc_state->regamma_changed = true; + } + return 0; + } + + return -EINVAL; +} static int nv_drm_plane_atomic_set_property( struct drm_plane *plane, @@ -642,6 +1632,7 @@ static int nv_drm_plane_atomic_set_property( struct nv_drm_device *nv_dev = to_nv_device(plane->dev); struct nv_drm_plane_state *nv_drm_plane_state = to_nv_drm_plane_state(state); + NvBool replaced = false; if (property == nv_dev->nv_out_fence_property) { nv_drm_plane_state->fd_user_ptr = (void __user *)(uintptr_t)(val); @@ -656,9 +1647,73 @@ static int nv_drm_plane_atomic_set_property( nv_dev->dev, &nv_drm_plane_state->hdr_output_metadata, val, - sizeof(struct hdr_output_metadata)); + sizeof(struct hdr_output_metadata), + &replaced); } #endif + else if (property == nv_dev->nv_plane_lms_ctm_property) { + return nv_drm_atomic_replace_property_blob_from_id( + nv_dev->dev, + &nv_drm_plane_state->lms_ctm, + val, + sizeof(struct drm_color_ctm_3x4), + &replaced); + } else if (property == nv_dev->nv_plane_lms_to_itp_ctm_property) { + return nv_drm_atomic_replace_property_blob_from_id( + nv_dev->dev, + &nv_drm_plane_state->lms_to_itp_ctm, + val, + sizeof(struct drm_color_ctm_3x4), + &replaced); + } else if (property == nv_dev->nv_plane_itp_to_lms_ctm_property) { + return nv_drm_atomic_replace_property_blob_from_id( + nv_dev->dev, + &nv_drm_plane_state->itp_to_lms_ctm, + val, + sizeof(struct drm_color_ctm_3x4), + &replaced); + } else if (property == nv_dev->nv_plane_blend_ctm_property) { + return nv_drm_atomic_replace_property_blob_from_id( + nv_dev->dev, + &nv_drm_plane_state->blend_ctm, + val, + sizeof(struct drm_color_ctm_3x4), + &replaced); + } else if (property == nv_dev->nv_plane_degamma_tf_property) { + if (val != nv_drm_plane_state->degamma_tf) { + nv_drm_plane_state->degamma_tf = val; + nv_drm_plane_state->degamma_changed = true; + } + return 0; + } else if (property == nv_dev->nv_plane_degamma_lut_property) { + int ret = nv_drm_atomic_replace_property_blob_from_id( + nv_dev->dev, + &nv_drm_plane_state->degamma_lut, + val, + sizeof(struct drm_color_lut) * NVKMS_LUT_ARRAY_SIZE, + &replaced); + if (replaced) { + nv_drm_plane_state->degamma_changed = true; + } + return ret; + } else if (property == nv_dev->nv_plane_degamma_multiplier_property) { + if (val != nv_drm_plane_state->degamma_multiplier) { + nv_drm_plane_state->degamma_multiplier = val; + nv_drm_plane_state->degamma_changed = true; + } + return 0; + } else if (property == nv_dev->nv_plane_tmo_lut_property) { + int ret = nv_drm_atomic_replace_property_blob_from_id( + nv_dev->dev, + &nv_drm_plane_state->tmo_lut, + val, + sizeof(struct drm_color_lut) * NVKMS_LUT_ARRAY_SIZE, + &replaced); + if (replaced) { + nv_drm_plane_state->tmo_changed = true; + } + return ret; + } return -EINVAL; } @@ -681,13 +1736,50 @@ static int nv_drm_plane_atomic_get_property( } #if defined(NV_DRM_HAS_HDR_OUTPUT_METADATA) else if (property == nv_dev->nv_hdr_output_metadata_property) { - const struct nv_drm_plane_state *nv_drm_plane_state = - to_nv_drm_plane_state_const(state); *val = nv_drm_plane_state->hdr_output_metadata ? nv_drm_plane_state->hdr_output_metadata->base.id : 0; return 0; } #endif + else if (property == nv_dev->nv_plane_lms_ctm_property) { + *val = nv_drm_plane_state->lms_ctm ? + nv_drm_plane_state->lms_ctm->base.id : 0; + return 0; + } else if (property == nv_dev->nv_plane_lms_to_itp_ctm_property) { + *val = nv_drm_plane_state->lms_to_itp_ctm ? + nv_drm_plane_state->lms_to_itp_ctm->base.id : 0; + return 0; + } else if (property == nv_dev->nv_plane_itp_to_lms_ctm_property) { + *val = nv_drm_plane_state->itp_to_lms_ctm ? + nv_drm_plane_state->itp_to_lms_ctm->base.id : 0; + return 0; + } else if (property == nv_dev->nv_plane_blend_ctm_property) { + *val = nv_drm_plane_state->blend_ctm ? + nv_drm_plane_state->blend_ctm->base.id : 0; + return 0; + } else if (property == nv_dev->nv_plane_degamma_tf_property) { + *val = nv_drm_plane_state->degamma_tf; + return 0; + } else if (property == nv_dev->nv_plane_degamma_lut_property) { + *val = nv_drm_plane_state->degamma_lut ? + nv_drm_plane_state->degamma_lut->base.id : 0; + return 0; + } else if (property == nv_dev->nv_plane_degamma_multiplier_property) { + *val = nv_drm_plane_state->degamma_multiplier; + return 0; + } else if (property == nv_dev->nv_plane_tmo_lut_property) { + *val = nv_drm_plane_state->tmo_lut ? + nv_drm_plane_state->tmo_lut->base.id : 0; + return 0; + } else if ((property == nv_dev->nv_plane_degamma_lut_size_property) || + (property == nv_dev->nv_plane_tmo_lut_size_property)) { + /* + * This shouldn't be necessary, because read-only properties are stored + * in obj->properties->values[]. To be safe, check for it anyway. + */ + *val = NVKMS_LUT_ARRAY_SIZE; + return 0; + } return -EINVAL; } @@ -744,10 +1836,54 @@ nv_drm_plane_atomic_duplicate_state(struct drm_plane *plane) #if defined(NV_DRM_HAS_HDR_OUTPUT_METADATA) nv_plane_state->hdr_output_metadata = nv_old_plane_state->hdr_output_metadata; if (nv_plane_state->hdr_output_metadata) { - drm_property_blob_get(nv_plane_state->hdr_output_metadata); + nv_drm_property_blob_get(nv_plane_state->hdr_output_metadata); } #endif + nv_plane_state->lms_ctm = nv_old_plane_state->lms_ctm; + if (nv_plane_state->lms_ctm) { + nv_drm_property_blob_get(nv_plane_state->lms_ctm); + } + + nv_plane_state->lms_to_itp_ctm = nv_old_plane_state->lms_to_itp_ctm; + if (nv_plane_state->lms_to_itp_ctm) { + nv_drm_property_blob_get(nv_plane_state->lms_to_itp_ctm); + } + + nv_plane_state->itp_to_lms_ctm = nv_old_plane_state->itp_to_lms_ctm; + if (nv_plane_state->itp_to_lms_ctm) { + nv_drm_property_blob_get(nv_plane_state->itp_to_lms_ctm); + } + + nv_plane_state->blend_ctm = nv_old_plane_state->blend_ctm; + if (nv_plane_state->blend_ctm) { + nv_drm_property_blob_get(nv_plane_state->blend_ctm); + } + + nv_plane_state->degamma_tf = nv_old_plane_state->degamma_tf; + nv_plane_state->degamma_lut = nv_old_plane_state->degamma_lut; + if (nv_plane_state->degamma_lut) { + nv_drm_property_blob_get(nv_plane_state->degamma_lut); + } + nv_plane_state->degamma_multiplier = nv_old_plane_state->degamma_multiplier; + nv_plane_state->degamma_changed = false; + nv_plane_state->degamma_drm_lut_surface = + nv_old_plane_state->degamma_drm_lut_surface; + if (nv_plane_state->degamma_drm_lut_surface) { + kref_get(&nv_plane_state->degamma_drm_lut_surface->refcount); + } + + nv_plane_state->tmo_lut = nv_old_plane_state->tmo_lut; + if (nv_plane_state->tmo_lut) { + nv_drm_property_blob_get(nv_plane_state->tmo_lut); + } + nv_plane_state->tmo_changed = false; + nv_plane_state->tmo_drm_lut_surface = + nv_old_plane_state->tmo_drm_lut_surface; + if (nv_plane_state->tmo_drm_lut_surface) { + kref_get(&nv_plane_state->tmo_drm_lut_surface->refcount); + } + return &nv_plane_state->base; } @@ -755,6 +1891,8 @@ static inline void __nv_drm_plane_atomic_destroy_state( struct drm_plane *plane, struct drm_plane_state *state) { + struct nv_drm_plane_state *nv_drm_plane_state = + to_nv_drm_plane_state(state); #if defined(NV_DRM_ATOMIC_HELPER_PLANE_DESTROY_STATE_HAS_PLANE_ARG) __drm_atomic_helper_plane_destroy_state(plane, state); #else @@ -762,12 +1900,24 @@ static inline void __nv_drm_plane_atomic_destroy_state( #endif #if defined(NV_DRM_HAS_HDR_OUTPUT_METADATA) - { - struct nv_drm_plane_state *nv_drm_plane_state = - to_nv_drm_plane_state(state); - drm_property_blob_put(nv_drm_plane_state->hdr_output_metadata); - } + nv_drm_property_blob_put(nv_drm_plane_state->hdr_output_metadata); #endif + nv_drm_property_blob_put(nv_drm_plane_state->lms_ctm); + nv_drm_property_blob_put(nv_drm_plane_state->lms_to_itp_ctm); + nv_drm_property_blob_put(nv_drm_plane_state->itp_to_lms_ctm); + nv_drm_property_blob_put(nv_drm_plane_state->blend_ctm); + + nv_drm_property_blob_put(nv_drm_plane_state->degamma_lut); + if (nv_drm_plane_state->degamma_drm_lut_surface != NULL) { + kref_put(&nv_drm_plane_state->degamma_drm_lut_surface->refcount, + free_drm_lut_surface); + } + + nv_drm_property_blob_put(nv_drm_plane_state->tmo_lut); + if (nv_drm_plane_state->tmo_drm_lut_surface != NULL) { + kref_put(&nv_drm_plane_state->tmo_drm_lut_surface->refcount, + free_drm_lut_surface); + } } static void nv_drm_plane_atomic_destroy_state( @@ -875,6 +2025,7 @@ static inline struct nv_drm_crtc_state *nv_drm_crtc_state_alloc(void) return NULL; } + nv_state->req_config.modeSetConfig.olutFpNormScale = NVKMS_OLUT_FP_NORM_SCALE_DEFAULT; for (i = 0; i < ARRAY_SIZE(nv_state->req_config.layerRequestedConfig); i++) { plane_config_clear(&nv_state->req_config.layerRequestedConfig[i].config); } @@ -923,6 +2074,7 @@ static void nv_drm_atomic_crtc_reset(struct drm_crtc *crtc) static struct drm_crtc_state* nv_drm_atomic_crtc_duplicate_state(struct drm_crtc *crtc) { + struct nv_drm_crtc_state *nv_old_state = to_nv_crtc_state(crtc->state); struct nv_drm_crtc_state *nv_state = nv_drm_crtc_state_alloc(); if (nv_state == NULL) { @@ -944,7 +2096,7 @@ nv_drm_atomic_crtc_duplicate_state(struct drm_crtc *crtc) * be freed in any following failure paths. */ if (!nv_drm_crtc_duplicate_req_head_modeset_config( - &(to_nv_crtc_state(crtc->state)->req_config), + &nv_old_state->req_config, &nv_state->req_config)) { nv_drm_free(nv_state->nv_flip); @@ -954,6 +2106,17 @@ nv_drm_atomic_crtc_duplicate_state(struct drm_crtc *crtc) __drm_atomic_helper_crtc_duplicate_state(crtc, &nv_state->base); + nv_state->regamma_tf = nv_old_state->regamma_tf; + nv_state->regamma_lut = nv_old_state->regamma_lut; + if (nv_state->regamma_lut) { + nv_drm_property_blob_get(nv_state->regamma_lut); + } + nv_state->regamma_divisor = nv_old_state->regamma_divisor; + if (nv_state->regamma_drm_lut_surface) { + kref_get(&nv_state->regamma_drm_lut_surface->refcount); + } + nv_state->regamma_changed = false; + return &nv_state->base; } @@ -977,6 +2140,12 @@ static void nv_drm_atomic_crtc_destroy_state(struct drm_crtc *crtc, __nv_drm_atomic_helper_crtc_destroy_state(crtc, &nv_state->base); + nv_drm_property_blob_put(nv_state->regamma_lut); + if (nv_state->regamma_drm_lut_surface != NULL) { + kref_put(&nv_state->regamma_drm_lut_surface->refcount, + free_drm_lut_surface); + } + nv_drm_free(nv_state->req_config.modeSetConfig.lut.input.pRamps); nv_drm_free(nv_state->req_config.modeSetConfig.lut.output.pRamps); @@ -988,6 +2157,8 @@ static struct drm_crtc_funcs nv_crtc_funcs = { .page_flip = drm_atomic_helper_page_flip, .reset = nv_drm_atomic_crtc_reset, .destroy = nv_drm_crtc_destroy, + .atomic_get_property = nv_drm_atomic_crtc_get_property, + .atomic_set_property = nv_drm_atomic_crtc_set_property, .atomic_duplicate_state = nv_drm_atomic_crtc_duplicate_state, .atomic_destroy_state = nv_drm_atomic_crtc_destroy_state, #if defined(NV_DRM_ATOMIC_HELPER_LEGACY_GAMMA_SET_PRESENT) @@ -1101,7 +2272,7 @@ static int color_mgmt_config_set_luts(struct nv_drm_crtc_state *nv_crtc_state, nv_drm_free(modeset_config->lut.input.pRamps); modeset_config->lut.input.pRamps = NULL; } - req_config->flags.ilutChanged = NV_TRUE; + req_config->flags.legacyIlutChanged = NV_TRUE; if (crtc_state->gamma_lut) { struct drm_color_lut *gamma_lut = NULL; @@ -1134,7 +2305,7 @@ static int color_mgmt_config_set_luts(struct nv_drm_crtc_state *nv_crtc_state, nv_drm_free(modeset_config->lut.output.pRamps); modeset_config->lut.output.pRamps = NULL; } - req_config->flags.olutChanged = NV_TRUE; + req_config->flags.legacyOlutChanged = NV_TRUE; return 0; } @@ -1157,6 +2328,8 @@ static int nv_drm_crtc_atomic_check(struct drm_crtc *crtc, struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); #endif + struct nv_drm_crtc *nv_crtc = to_nv_crtc(crtc); + struct nv_drm_device *nv_dev = to_nv_device(crtc->dev); struct nv_drm_crtc_state *nv_crtc_state = to_nv_crtc_state(crtc_state); struct NvKmsKapiHeadRequestedConfig *req_config = &nv_crtc_state->req_config; @@ -1211,6 +2384,76 @@ static int nv_drm_crtc_atomic_check(struct drm_crtc *crtc, } #endif + if (nv_crtc_state->regamma_changed) { + if (nv_crtc_state->regamma_drm_lut_surface != NULL) { + kref_put(&nv_crtc_state->regamma_drm_lut_surface->refcount, + free_drm_lut_surface); + nv_crtc_state->regamma_drm_lut_surface = NULL; + } + + if (nv_crtc->olut_caps.vssSupport == NVKMS_LUT_VSS_SUPPORTED) { + if ((nv_crtc_state->regamma_tf != NV_DRM_TRANSFER_FUNCTION_DEFAULT) || + (nv_crtc_state->regamma_lut != NULL)) { + + nv_crtc_state->regamma_drm_lut_surface = + create_drm_olut_surface_vss(nv_dev, nv_crtc, + nv_crtc_state); + if (nv_crtc_state->regamma_drm_lut_surface == NULL) { + return -1; + } + } + } else { + WARN_ON(nv_crtc->olut_caps.vssSupport != NVKMS_LUT_VSS_NOT_SUPPORTED); + if (nv_crtc_state->regamma_lut != NULL) { + nv_crtc_state->regamma_drm_lut_surface = + create_drm_olut_surface_legacy(nv_dev, nv_crtc, + nv_crtc_state); + if (nv_crtc_state->regamma_drm_lut_surface == NULL) { + return -1; + } + } + } + + if (nv_crtc_state->regamma_drm_lut_surface != NULL) { + req_config->modeSetConfig.olut.enabled = NV_TRUE; + req_config->modeSetConfig.olut.lutSurface = + nv_crtc_state->regamma_drm_lut_surface->nvkms_surface; + req_config->modeSetConfig.olut.offset = 0; + req_config->modeSetConfig.olut.vssSegments = + nv_crtc_state->regamma_drm_lut_surface->properties.vssSegments; + req_config->modeSetConfig.olut.lutEntries = + nv_crtc_state->regamma_drm_lut_surface->properties.lutEntries; + } else { + req_config->modeSetConfig.olut.enabled = NV_FALSE; + req_config->modeSetConfig.olut.lutSurface = NULL; + req_config->modeSetConfig.olut.offset = 0; + req_config->modeSetConfig.olut.vssSegments = 0; + req_config->modeSetConfig.olut.lutEntries = 0; + } + req_config->flags.olutChanged = NV_TRUE; + + /* + * Range property is configured to ensure sign bit = 0 and + * value is >= 1, but it may still default to 0 if it's unsupported. + */ + WARN_ON(nv_crtc_state->regamma_divisor & (((NvU64) 1) << 63)); + + req_config->flags.olutFpNormScaleChanged = NV_TRUE; + if (nv_crtc_state->regamma_divisor < (((NvU64) 1) << 32)) { + req_config->modeSetConfig.olutFpNormScale = + NVKMS_OLUT_FP_NORM_SCALE_DEFAULT; + } else { + /* + * Since the sign bit of the regamma_divisor is unset, we treat it as + * unsigned and do 32.32 unsigned fixed-point division to get the + * fpNormScale. + */ + req_config->modeSetConfig.olutFpNormScale = + (NvU32)(((NvU64)NVKMS_OLUT_FP_NORM_SCALE_DEFAULT << 32) / + nv_crtc_state->regamma_divisor); + } + } + return ret; } @@ -1227,11 +2470,48 @@ static const struct drm_crtc_helper_funcs nv_crtc_helper_funcs = { .mode_fixup = nv_drm_crtc_mode_fixup, }; +static void nv_drm_crtc_install_properties( + struct drm_crtc *crtc) +{ + struct nv_drm_device *nv_dev = to_nv_device(crtc->dev); + struct nv_drm_crtc *nv_crtc = to_nv_crtc(crtc); + struct nv_drm_crtc_state *nv_crtc_state = to_nv_crtc_state(crtc->state); + + if (nv_crtc->olut_caps.supported) { + if (nv_crtc->olut_caps.vssSupport == NVKMS_LUT_VSS_SUPPORTED) { + if (nv_dev->nv_crtc_regamma_tf_property) { + drm_object_attach_property( + &crtc->base, nv_dev->nv_crtc_regamma_tf_property, + NV_DRM_TRANSFER_FUNCTION_DEFAULT); + } + if (nv_dev->nv_crtc_regamma_divisor_property) { + /* Default to 1 */ + nv_crtc_state->regamma_divisor = (((NvU64) 1) << 32); + drm_object_attach_property( + &crtc->base, nv_dev->nv_crtc_regamma_divisor_property, + nv_crtc_state->regamma_divisor); + } + } + if (nv_dev->nv_crtc_regamma_lut_property) { + drm_object_attach_property( + &crtc->base, nv_dev->nv_crtc_regamma_lut_property, 0); + } + if (nv_dev->nv_crtc_regamma_lut_size_property) { + drm_object_attach_property( + &crtc->base, nv_dev->nv_crtc_regamma_lut_size_property, + NVKMS_LUT_ARRAY_SIZE); + } + } +} + static void nv_drm_plane_install_properties( struct drm_plane *plane, NvBool supportsICtCp) { struct nv_drm_device *nv_dev = to_nv_device(plane->dev); + struct nv_drm_plane *nv_plane = to_nv_plane(plane); + struct nv_drm_plane_state *nv_plane_state = + to_nv_drm_plane_state(plane->state); if (nv_dev->nv_out_fence_property) { drm_object_attach_property( @@ -1244,12 +2524,82 @@ static void nv_drm_plane_install_properties( NVKMS_INPUT_COLORSPACE_NONE); } + if (supportsICtCp) { #if defined(NV_DRM_HAS_HDR_OUTPUT_METADATA) - if (supportsICtCp && nv_dev->nv_hdr_output_metadata_property) { + if (nv_dev->nv_hdr_output_metadata_property) { + drm_object_attach_property( + &plane->base, nv_dev->nv_hdr_output_metadata_property, 0); + } +#endif + + /* + * The old DRM_OBJECT_MAX_PROPERTY limit of 24 is too small to + * accomodate all of the properties for the ICtCp pipeline. + * + * Commit 1e13c5644c44 ("drm/drm_mode_object: increase max objects to + * accommodate new color props") in Linux v6.8 increased the limit to + * 64. To be safe, require this before attaching any properties for the + * ICtCp pipeline. + */ + if (DRM_OBJECT_MAX_PROPERTY >= 64) { + if (nv_dev->nv_plane_lms_ctm_property) { + drm_object_attach_property( + &plane->base, nv_dev->nv_plane_lms_ctm_property, 0); + } + + if (nv_dev->nv_plane_lms_to_itp_ctm_property) { + drm_object_attach_property( + &plane->base, nv_dev->nv_plane_lms_to_itp_ctm_property, 0); + } + + if (nv_dev->nv_plane_itp_to_lms_ctm_property) { + drm_object_attach_property( + &plane->base, nv_dev->nv_plane_itp_to_lms_ctm_property, 0); + } + + WARN_ON(!nv_plane->tmo_caps.supported); + if (nv_dev->nv_plane_tmo_lut_property) { + drm_object_attach_property( + &plane->base, nv_dev->nv_plane_tmo_lut_property, 0); + } + if (nv_dev->nv_plane_tmo_lut_size_property) { + drm_object_attach_property( + &plane->base, nv_dev->nv_plane_tmo_lut_size_property, + NVKMS_LUT_ARRAY_SIZE); + } + } + } + + if (nv_dev->nv_plane_blend_ctm_property) { drm_object_attach_property( - &plane->base, nv_dev->nv_hdr_output_metadata_property, 0); + &plane->base, nv_dev->nv_plane_blend_ctm_property, 0); + } + + if (nv_plane->ilut_caps.supported) { + if (nv_plane->ilut_caps.vssSupport == NVKMS_LUT_VSS_SUPPORTED) { + if (nv_dev->nv_plane_degamma_tf_property) { + drm_object_attach_property( + &plane->base, nv_dev->nv_plane_degamma_tf_property, + NV_DRM_TRANSFER_FUNCTION_DEFAULT); + } + if (nv_dev->nv_plane_degamma_multiplier_property) { + /* Default to 1 in S31.32 Sign-Magnitude Format */ + nv_plane_state->degamma_multiplier = ((uint64_t) 1) << 32; + drm_object_attach_property( + &plane->base, nv_dev->nv_plane_degamma_multiplier_property, + nv_plane_state->degamma_multiplier); + } + } + if (nv_dev->nv_plane_degamma_lut_property) { + drm_object_attach_property( + &plane->base, nv_dev->nv_plane_degamma_lut_property, 0); + } + if (nv_dev->nv_plane_degamma_lut_size_property) { + drm_object_attach_property( + &plane->base, nv_dev->nv_plane_degamma_lut_size_property, + NVKMS_LUT_ARRAY_SIZE); + } } -#endif } static void @@ -1429,6 +2779,9 @@ nv_drm_plane_create(struct drm_device *dev, drm_plane_helper_add(plane, &nv_plane_helper_funcs); if (plane_type != DRM_PLANE_TYPE_CURSOR) { + nv_plane->ilut_caps = pResInfo->lutCaps.layer[layer_idx].ilut; + nv_plane->tmo_caps = pResInfo->lutCaps.layer[layer_idx].tmo; + nv_drm_plane_install_properties( plane, pResInfo->supportsICtCp[layer_idx]); @@ -1465,7 +2818,8 @@ nv_drm_plane_create(struct drm_device *dev, static struct drm_crtc *__nv_drm_crtc_create(struct nv_drm_device *nv_dev, struct drm_plane *primary_plane, struct drm_plane *cursor_plane, - unsigned int head) + unsigned int head, + const struct NvKmsKapiDeviceResourcesInfo *pResInfo) { struct nv_drm_crtc *nv_crtc = NULL; struct nv_drm_crtc_state *nv_state = NULL; @@ -1508,6 +2862,10 @@ static struct drm_crtc *__nv_drm_crtc_create(struct nv_drm_device *nv_dev, drm_crtc_helper_add(&nv_crtc->base, &nv_crtc_helper_funcs); + nv_crtc->olut_caps = pResInfo->lutCaps.olut; + + nv_drm_crtc_install_properties(&nv_crtc->base); + #if defined(NV_DRM_COLOR_MGMT_AVAILABLE) #if defined(NV_DRM_CRTC_ENABLE_COLOR_MGMT_PRESENT) drm_crtc_enable_color_mgmt(&nv_crtc->base, NVKMS_LUT_ARRAY_SIZE, true, @@ -1584,7 +2942,7 @@ void nv_drm_enumerate_crtcs_and_planes( struct drm_crtc *crtc = __nv_drm_crtc_create(nv_dev, primary_plane, cursor_plane, - i); + i, pResInfo); if (IS_ERR(crtc)) { nv_drm_plane_destroy(primary_plane); diff --git a/kernel-open/nvidia-drm/nvidia-drm-crtc.h b/kernel-open/nvidia-drm/nvidia-drm-crtc.h index 2562e87c69..663f4e0875 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-crtc.h +++ b/kernel-open/nvidia-drm/nvidia-drm-crtc.h @@ -38,6 +38,13 @@ #include "nvtypes.h" #include "nvkms-kapi.h" +enum nv_drm_transfer_function { + NV_DRM_TRANSFER_FUNCTION_DEFAULT, + NV_DRM_TRANSFER_FUNCTION_LINEAR, + NV_DRM_TRANSFER_FUNCTION_PQ, + NV_DRM_TRANSFER_FUNCTION_MAX, +}; + struct nv_drm_crtc { NvU32 head; @@ -63,6 +70,8 @@ struct nv_drm_crtc { */ struct drm_file *modeset_permission_filep; + struct NvKmsLUTCaps olut_caps; + struct drm_crtc base; }; @@ -142,6 +151,12 @@ struct nv_drm_crtc_state { * nv_drm_atomic_crtc_destroy_state(). */ struct nv_drm_flip *nv_flip; + + enum nv_drm_transfer_function regamma_tf; + struct drm_property_blob *regamma_lut; + uint64_t regamma_divisor; + struct nv_drm_lut_surface *regamma_drm_lut_surface; + NvBool regamma_changed; }; static inline struct nv_drm_crtc_state *to_nv_crtc_state(struct drm_crtc_state *state) @@ -149,6 +164,11 @@ static inline struct nv_drm_crtc_state *to_nv_crtc_state(struct drm_crtc_state * return container_of(state, struct nv_drm_crtc_state, base); } +static inline const struct nv_drm_crtc_state *to_nv_crtc_state_const(const struct drm_crtc_state *state) +{ + return container_of(state, struct nv_drm_crtc_state, base); +} + struct nv_drm_plane { /** * @base: @@ -170,6 +190,9 @@ struct nv_drm_plane { * Index of this plane in the per head array of layers. */ uint32_t layer_idx; + + struct NvKmsLUTCaps ilut_caps; + struct NvKmsLUTCaps tmo_caps; }; static inline struct nv_drm_plane *to_nv_plane(struct drm_plane *plane) @@ -180,6 +203,22 @@ static inline struct nv_drm_plane *to_nv_plane(struct drm_plane *plane) return container_of(plane, struct nv_drm_plane, base); } +struct nv_drm_lut_surface { + struct NvKmsKapiDevice *pDevice; + struct NvKmsKapiMemory *nvkms_memory; + struct NvKmsKapiSurface *nvkms_surface; + struct { + NvU32 vssSegments; + enum NvKmsLUTVssType vssType; + + NvU32 lutEntries; + enum NvKmsLUTFormat entryFormat; + + } properties; + void *buffer; + struct kref refcount; +}; + struct nv_drm_plane_state { struct drm_plane_state base; s32 __user *fd_user_ptr; @@ -187,6 +226,20 @@ struct nv_drm_plane_state { #if defined(NV_DRM_HAS_HDR_OUTPUT_METADATA) struct drm_property_blob *hdr_output_metadata; #endif + struct drm_property_blob *lms_ctm; + struct drm_property_blob *lms_to_itp_ctm; + struct drm_property_blob *itp_to_lms_ctm; + struct drm_property_blob *blend_ctm; + + enum nv_drm_transfer_function degamma_tf; + struct drm_property_blob *degamma_lut; + uint64_t degamma_multiplier; /* S31.32 Sign-Magnitude Format */ + struct nv_drm_lut_surface *degamma_drm_lut_surface; + NvBool degamma_changed; + + struct drm_property_blob *tmo_lut; + struct nv_drm_lut_surface *tmo_drm_lut_surface; + NvBool tmo_changed; }; static inline struct nv_drm_plane_state *to_nv_drm_plane_state(struct drm_plane_state *state) diff --git a/kernel-open/nvidia-drm/nvidia-drm-drv.c b/kernel-open/nvidia-drm/nvidia-drm-drv.c index 359ff0c470..8cb9421930 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-drv.c +++ b/kernel-open/nvidia-drm/nvidia-drm-drv.c @@ -64,12 +64,14 @@ #include #endif -#if defined(NV_DRM_FBDEV_GENERIC_AVAILABLE) +#if defined(NV_DRM_FBDEV_AVAILABLE) #include #include #endif -#if defined(NV_DRM_DRM_FBDEV_GENERIC_H_PRESENT) +#if defined(NV_DRM_DRM_FBDEV_TTM_H_PRESENT) +#include +#elif defined(NV_DRM_DRM_FBDEV_GENERIC_H_PRESENT) #include #endif @@ -105,16 +107,16 @@ static int nv_drm_revoke_sub_ownership(struct drm_device *dev); static struct nv_drm_device *dev_list = NULL; -static const char* nv_get_input_colorspace_name( +static char* nv_get_input_colorspace_name( enum NvKmsInputColorSpace colorSpace) { switch (colorSpace) { case NVKMS_INPUT_COLORSPACE_NONE: return "None"; case NVKMS_INPUT_COLORSPACE_SCRGB_LINEAR: - return "IEC 61966-2-2 linear FP"; + return "scRGB Linear FP16"; case NVKMS_INPUT_COLORSPACE_BT2100_PQ: - return "ITU-R BT.2100-PQ YCbCr"; + return "BT.2100 PQ"; default: /* We shoudn't hit this */ WARN_ON("Unsupported input colorspace"); @@ -122,8 +124,30 @@ static const char* nv_get_input_colorspace_name( } }; +static char* nv_get_transfer_function_name( + enum nv_drm_transfer_function tf) +{ + switch (tf) { + case NV_DRM_TRANSFER_FUNCTION_LINEAR: + return "Linear"; + case NV_DRM_TRANSFER_FUNCTION_PQ: + return "PQ (Perceptual Quantizer)"; + default: + /* We shoudn't hit this */ + WARN_ON("Unsupported transfer function"); +#if defined(fallthrough) + fallthrough; +#else + /* Fallthrough */ +#endif + case NV_DRM_TRANSFER_FUNCTION_DEFAULT: + return "Default"; + } +}; + #if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE) +#if defined(NV_DRM_OUTPUT_POLL_CHANGED_PRESENT) static void nv_drm_output_poll_changed(struct drm_device *dev) { struct drm_connector *connector = NULL; @@ -167,6 +191,7 @@ static void nv_drm_output_poll_changed(struct drm_device *dev) nv_drm_connector_list_iter_end(&conn_iter); #endif } +#endif /* NV_DRM_OUTPUT_POLL_CHANGED_PRESENT */ static struct drm_framebuffer *nv_drm_framebuffer_create( struct drm_device *dev, @@ -204,7 +229,9 @@ static const struct drm_mode_config_funcs nv_mode_config_funcs = { .atomic_check = nv_drm_atomic_check, .atomic_commit = nv_drm_atomic_commit, + #if defined(NV_DRM_OUTPUT_POLL_CHANGED_PRESENT) .output_poll_changed = nv_drm_output_poll_changed, + #endif }; static void nv_drm_event_callback(const struct NvKmsKapiEvent *event) @@ -364,15 +391,21 @@ static void nv_drm_enumerate_encoders_and_connectors */ static int nv_drm_create_properties(struct nv_drm_device *nv_dev) { - struct drm_prop_enum_list enum_list[3] = { }; + struct drm_prop_enum_list colorspace_enum_list[3] = { }; + struct drm_prop_enum_list tf_enum_list[NV_DRM_TRANSFER_FUNCTION_MAX] = { }; int i, len = 0; for (i = 0; i < 3; i++) { - enum_list[len].type = i; - enum_list[len].name = nv_get_input_colorspace_name(i); + colorspace_enum_list[len].type = i; + colorspace_enum_list[len].name = nv_get_input_colorspace_name(i); len++; } + for (i = 0; i < NV_DRM_TRANSFER_FUNCTION_MAX; i++) { + tf_enum_list[i].type = i; + tf_enum_list[i].name = nv_get_transfer_function_name(i); + } + if (nv_dev->supportsSyncpts) { nv_dev->nv_out_fence_property = drm_property_create_range(nv_dev->dev, DRM_MODE_PROP_ATOMIC, @@ -384,7 +417,7 @@ static int nv_drm_create_properties(struct nv_drm_device *nv_dev) nv_dev->nv_input_colorspace_property = drm_property_create_enum(nv_dev->dev, 0, "NV_INPUT_COLORSPACE", - enum_list, len); + colorspace_enum_list, len); if (nv_dev->nv_input_colorspace_property == NULL) { NV_DRM_LOG_ERR("Failed to create NV_INPUT_COLORSPACE property"); return -ENOMEM; @@ -399,6 +432,109 @@ static int nv_drm_create_properties(struct nv_drm_device *nv_dev) } #endif + nv_dev->nv_plane_lms_ctm_property = + drm_property_create(nv_dev->dev, DRM_MODE_PROP_BLOB, + "NV_PLANE_LMS_CTM", 0); + if (nv_dev->nv_plane_lms_ctm_property == NULL) { + return -ENOMEM; + } + + nv_dev->nv_plane_lms_to_itp_ctm_property = + drm_property_create(nv_dev->dev, DRM_MODE_PROP_BLOB, + "NV_PLANE_LMS_TO_ITP_CTM", 0); + if (nv_dev->nv_plane_lms_to_itp_ctm_property == NULL) { + return -ENOMEM; + } + + nv_dev->nv_plane_itp_to_lms_ctm_property = + drm_property_create(nv_dev->dev, DRM_MODE_PROP_BLOB, + "NV_PLANE_ITP_TO_LMS_CTM", 0); + if (nv_dev->nv_plane_itp_to_lms_ctm_property == NULL) { + return -ENOMEM; + } + + nv_dev->nv_plane_blend_ctm_property = + drm_property_create(nv_dev->dev, DRM_MODE_PROP_BLOB, + "NV_PLANE_BLEND_CTM", 0); + if (nv_dev->nv_plane_blend_ctm_property == NULL) { + return -ENOMEM; + } + + // Degamma TF + LUT + LUT Size + Multiplier + + nv_dev->nv_plane_degamma_tf_property = + drm_property_create_enum(nv_dev->dev, 0, + "NV_PLANE_DEGAMMA_TF", tf_enum_list, + NV_DRM_TRANSFER_FUNCTION_MAX); + if (nv_dev->nv_plane_degamma_tf_property == NULL) { + return -ENOMEM; + } + nv_dev->nv_plane_degamma_lut_property = + drm_property_create(nv_dev->dev, DRM_MODE_PROP_BLOB, + "NV_PLANE_DEGAMMA_LUT", 0); + if (nv_dev->nv_plane_degamma_lut_property == NULL) { + return -ENOMEM; + } + nv_dev->nv_plane_degamma_lut_size_property = + drm_property_create_range(nv_dev->dev, DRM_MODE_PROP_IMMUTABLE, + "NV_PLANE_DEGAMMA_LUT_SIZE", 0, UINT_MAX); + if (nv_dev->nv_plane_degamma_lut_size_property == NULL) { + return -ENOMEM; + } + nv_dev->nv_plane_degamma_multiplier_property = + drm_property_create_range(nv_dev->dev, 0, + "NV_PLANE_DEGAMMA_MULTIPLIER", 0, + U64_MAX & ~(((NvU64) 1) << 63)); // No negative values + if (nv_dev->nv_plane_degamma_multiplier_property == NULL) { + return -ENOMEM; + } + + // TMO LUT + LUT Size + + nv_dev->nv_plane_tmo_lut_property = + drm_property_create(nv_dev->dev, DRM_MODE_PROP_BLOB, + "NV_PLANE_TMO_LUT", 0); + if (nv_dev->nv_plane_tmo_lut_property == NULL) { + return -ENOMEM; + } + nv_dev->nv_plane_tmo_lut_size_property = + drm_property_create_range(nv_dev->dev, DRM_MODE_PROP_IMMUTABLE, + "NV_PLANE_TMO_LUT_SIZE", 0, UINT_MAX); + if (nv_dev->nv_plane_tmo_lut_size_property == NULL) { + return -ENOMEM; + } + + // REGAMMA TF + LUT + LUT Size + Divisor + + nv_dev->nv_crtc_regamma_tf_property = + drm_property_create_enum(nv_dev->dev, 0, + "NV_CRTC_REGAMMA_TF", tf_enum_list, + NV_DRM_TRANSFER_FUNCTION_MAX); + if (nv_dev->nv_crtc_regamma_tf_property == NULL) { + return -ENOMEM; + } + nv_dev->nv_crtc_regamma_lut_property = + drm_property_create(nv_dev->dev, DRM_MODE_PROP_BLOB, + "NV_CRTC_REGAMMA_LUT", 0); + if (nv_dev->nv_crtc_regamma_lut_property == NULL) { + return -ENOMEM; + } + nv_dev->nv_crtc_regamma_lut_size_property = + drm_property_create_range(nv_dev->dev, DRM_MODE_PROP_IMMUTABLE, + "NV_CRTC_REGAMMA_LUT_SIZE", 0, UINT_MAX); + if (nv_dev->nv_crtc_regamma_lut_size_property == NULL) { + return -ENOMEM; + } + // S31.32 + nv_dev->nv_crtc_regamma_divisor_property = + drm_property_create_range(nv_dev->dev, 0, + "NV_CRTC_REGAMMA_DIVISOR", + (((NvU64) 1) << 32), // No values between 0 and 1 + U64_MAX & ~(((NvU64) 1) << 63)); // No negative values + if (nv_dev->nv_crtc_regamma_divisor_property == NULL) { + return -ENOMEM; + } + return 0; } @@ -476,7 +612,7 @@ static int nv_drm_load(struct drm_device *dev, unsigned long flags) return -ENODEV; } -#if defined(NV_DRM_FBDEV_GENERIC_AVAILABLE) +#if defined(NV_DRM_FBDEV_AVAILABLE) /* * If fbdev is enabled, take modeset ownership now before other DRM clients * can take master (and thus NVKMS ownership). @@ -548,6 +684,13 @@ static int nv_drm_load(struct drm_device *dev, unsigned long flags) ret = nv_drm_create_properties(nv_dev); if (ret < 0) { + drm_mode_config_cleanup(dev); +#if defined(NV_DRM_FBDEV_AVAILABLE) + if (nv_dev->hasFramebufferConsole) { + nvKms->releaseOwnership(nv_dev->pDevice); + } +#endif + nvKms->freeDevice(nv_dev->pDevice); return -ENODEV; } @@ -610,7 +753,7 @@ static void __nv_drm_unload(struct drm_device *dev) /* Release modeset ownership if fbdev is enabled */ -#if defined(NV_DRM_FBDEV_GENERIC_AVAILABLE) +#if defined(NV_DRM_FBDEV_AVAILABLE) if (nv_dev->hasFramebufferConsole) { drm_atomic_helper_shutdown(dev); nvKms->releaseOwnership(nv_dev->pDevice); @@ -710,36 +853,37 @@ void nv_drm_master_drop(struct drm_device *dev, struct drm_file *file_priv) #endif { struct nv_drm_device *nv_dev = to_nv_device(dev); - int err; nv_drm_revoke_modeset_permission(dev, file_priv, 0); nv_drm_revoke_sub_ownership(dev); - /* - * After dropping nvkms modeset onwership, it is not guaranteed that - * drm and nvkms modeset state will remain in sync. Therefore, disable - * all outputs and crtcs before dropping nvkms modeset ownership. - * - * First disable all active outputs atomically and then disable each crtc one - * by one, there is not helper function available to disable all crtcs - * atomically. - */ + if (!nv_dev->hasFramebufferConsole) { + int err; - drm_modeset_lock_all(dev); + /* + * After dropping nvkms modeset onwership, it is not guaranteed that drm + * and nvkms modeset state will remain in sync. Therefore, disable all + * outputs and crtcs before dropping nvkms modeset ownership. + * + * First disable all active outputs atomically and then disable each + * crtc one by one, there is not helper function available to disable + * all crtcs atomically. + */ - if ((err = nv_drm_atomic_helper_disable_all( - dev, - dev->mode_config.acquire_ctx)) != 0) { + drm_modeset_lock_all(dev); - NV_DRM_DEV_LOG_ERR( - nv_dev, - "nv_drm_atomic_helper_disable_all failed with error code %d !", - err); - } + if ((err = nv_drm_atomic_helper_disable_all( + dev, + dev->mode_config.acquire_ctx)) != 0) { + + NV_DRM_DEV_LOG_ERR( + nv_dev, + "nv_drm_atomic_helper_disable_all failed with error code %d !", + err); + } - drm_modeset_unlock_all(dev); + drm_modeset_unlock_all(dev); - if (!nv_dev->hasFramebufferConsole) { nvKms->releaseOwnership(nv_dev->pDevice); } } @@ -1684,14 +1828,19 @@ static struct drm_driver nv_drm_driver = { .num_ioctls = ARRAY_SIZE(nv_drm_ioctls), /* - * Linux kernel v6.6 commit 71a7974ac701 ("drm/prime: Unexport helpers - * for fd/handle conversion") unexports drm_gem_prime_handle_to_fd() and - * drm_gem_prime_fd_to_handle(). + * Linux kernel v6.6 commit 6b85aa68d9d5 ("drm: Enable PRIME import/export for + * all drivers") made drm_gem_prime_handle_to_fd() / + * drm_gem_prime_fd_to_handle() the default when .prime_handle_to_fd / + * .prime_fd_to_handle are unspecified, respectively. * - * Prior Linux kernel v6.6 commit 6b85aa68d9d5 ("drm: Enable PRIME - * import/export for all drivers") made these helpers the default when - * .prime_handle_to_fd / .prime_fd_to_handle are unspecified, so it's fine - * to just skip specifying them if the helpers aren't present. + * Linux kernel v6.6 commit 71a7974ac701 ("drm/prime: Unexport helpers for + * fd/handle conversion") unexports drm_gem_prime_handle_to_fd() and + * drm_gem_prime_fd_to_handle(). However, because of the aforementioned commit, + * it's fine to just skip specifying them in this case. + * + * Linux kernel v6.7 commit 0514f63cfff3 ("Revert "drm/prime: Unexport helpers + * for fd/handle conversion"") exported the helpers again, but left the default + * behavior intact. Nonetheless, it does not hurt to specify them. */ #if NV_IS_EXPORT_SYMBOL_PRESENT_drm_gem_prime_handle_to_fd .prime_handle_to_fd = drm_gem_prime_handle_to_fd, @@ -1703,6 +1852,21 @@ static struct drm_driver nv_drm_driver = { .gem_prime_import = nv_drm_gem_prime_import, .gem_prime_import_sg_table = nv_drm_gem_prime_import_sg_table, +/* + * Linux kernel v5.0 commit 7698799f95 ("drm/prime: Add drm_gem_prime_mmap()") + * added drm_gem_prime_mmap(). + * + * Linux kernel v6.6 commit 0adec22702d4 ("drm: Remove struct + * drm_driver.gem_prime_mmap") removed .gem_prime_mmap, but replaced it with a + * direct call to drm_gem_prime_mmap(). + * + * TODO: Support .gem_prime_mmap on Linux < v5.0 using internal implementation. + */ +#if defined(NV_DRM_GEM_PRIME_MMAP_PRESENT) && \ + defined(NV_DRM_DRIVER_HAS_GEM_PRIME_MMAP) + .gem_prime_mmap = drm_gem_prime_mmap, +#endif + #if defined(NV_DRM_DRIVER_HAS_GEM_PRIME_CALLBACKS) .gem_prime_export = drm_gem_prime_export, .gem_prime_get_sg_table = nv_drm_gem_prime_get_sg_table, @@ -1838,7 +2002,7 @@ void nv_drm_register_drm_device(const nv_gpu_info_t *gpu_info) goto failed_drm_register; } -#if defined(NV_DRM_FBDEV_GENERIC_AVAILABLE) +#if defined(NV_DRM_FBDEV_AVAILABLE) if (nv_drm_fbdev_module_param && drm_core_check_feature(dev, DRIVER_MODESET)) { @@ -1850,10 +2014,15 @@ void nv_drm_register_drm_device(const nv_gpu_info_t *gpu_info) #else drm_aperture_remove_conflicting_pci_framebuffers(pdev, nv_drm_driver.name); #endif + nvKms->framebufferConsoleDisabled(nv_dev->pDevice); } + #if defined(NV_DRM_FBDEV_TTM_AVAILABLE) + drm_fbdev_ttm_setup(dev, 32); + #elif defined(NV_DRM_FBDEV_GENERIC_AVAILABLE) drm_fbdev_generic_setup(dev, 32); + #endif } -#endif /* defined(NV_DRM_FBDEV_GENERIC_AVAILABLE) */ +#endif /* defined(NV_DRM_FBDEV_AVAILABLE) */ /* Add NVIDIA-DRM device into list */ @@ -1995,12 +2164,12 @@ void nv_drm_suspend_resume(NvBool suspend) if (suspend) { drm_kms_helper_poll_disable(dev); -#if defined(NV_DRM_FBDEV_GENERIC_AVAILABLE) +#if defined(NV_DRM_FBDEV_AVAILABLE) drm_fb_helper_set_suspend_unlocked(dev->fb_helper, 1); #endif drm_mode_config_reset(dev); } else { -#if defined(NV_DRM_FBDEV_GENERIC_AVAILABLE) +#if defined(NV_DRM_FBDEV_AVAILABLE) drm_fb_helper_set_suspend_unlocked(dev->fb_helper, 0); #endif drm_kms_helper_poll_enable(dev); diff --git a/kernel-open/nvidia-drm/nvidia-drm-fb.c b/kernel-open/nvidia-drm/nvidia-drm-fb.c index 1c84201552..6b3d45f172 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-fb.c +++ b/kernel-open/nvidia-drm/nvidia-drm-fb.c @@ -36,12 +36,15 @@ static void __nv_drm_framebuffer_free(struct nv_drm_framebuffer *nv_fb) { + struct drm_framebuffer *fb = &nv_fb->base; uint32_t i; /* Unreference gem object */ - for (i = 0; i < ARRAY_SIZE(nv_fb->nv_gem); i++) { - if (nv_fb->nv_gem[i] != NULL) { - nv_drm_gem_object_unreference_unlocked(nv_fb->nv_gem[i]); + for (i = 0; i < NVKMS_MAX_PLANES_PER_SURFACE; i++) { + struct drm_gem_object *gem = nv_fb_get_gem_obj(fb, i); + if (gem != NULL) { + struct nv_drm_gem_object *nv_gem = to_nv_gem_object(gem); + nv_drm_gem_object_unreference_unlocked(nv_gem); } } @@ -69,10 +72,8 @@ static int nv_drm_framebuffer_create_handle(struct drm_framebuffer *fb, struct drm_file *file, unsigned int *handle) { - struct nv_drm_framebuffer *nv_fb = to_nv_framebuffer(fb); - return nv_drm_gem_handle_create(file, - nv_fb->nv_gem[0], + to_nv_gem_object(nv_fb_get_gem_obj(fb, 0)), handle); } @@ -88,6 +89,7 @@ static struct nv_drm_framebuffer *nv_drm_framebuffer_alloc( { struct nv_drm_device *nv_dev = to_nv_device(dev); struct nv_drm_framebuffer *nv_fb; + struct nv_drm_gem_object *nv_gem; const int num_planes = nv_drm_format_num_planes(cmd->pixel_format); uint32_t i; @@ -101,21 +103,22 @@ static struct nv_drm_framebuffer *nv_drm_framebuffer_alloc( return ERR_PTR(-ENOMEM); } - if (num_planes > ARRAY_SIZE(nv_fb->nv_gem)) { + if (num_planes > NVKMS_MAX_PLANES_PER_SURFACE) { NV_DRM_DEV_DEBUG_DRIVER(nv_dev, "Unsupported number of planes"); goto failed; } for (i = 0; i < num_planes; i++) { - if ((nv_fb->nv_gem[i] = nv_drm_gem_object_lookup( - dev, - file, - cmd->handles[i])) == NULL) { + nv_gem = nv_drm_gem_object_lookup(dev, file, cmd->handles[i]); + + if (nv_gem == NULL) { NV_DRM_DEV_DEBUG_DRIVER( nv_dev, "Failed to find gem object of type nvkms memory"); goto failed; } + + nv_fb_set_gem_obj(&nv_fb->base, i, &nv_gem->base); } return nv_fb; @@ -135,12 +138,14 @@ static int nv_drm_framebuffer_init(struct drm_device *dev, { struct nv_drm_device *nv_dev = to_nv_device(dev); struct NvKmsKapiCreateSurfaceParams params = { }; + struct nv_drm_gem_object *nv_gem; + struct drm_framebuffer *fb = &nv_fb->base; uint32_t i; int ret; /* Initialize the base framebuffer object and add it to drm subsystem */ - ret = drm_framebuffer_init(dev, &nv_fb->base, &nv_framebuffer_funcs); + ret = drm_framebuffer_init(dev, fb, &nv_framebuffer_funcs); if (ret != 0) { NV_DRM_DEV_DEBUG_DRIVER( nv_dev, @@ -148,23 +153,18 @@ static int nv_drm_framebuffer_init(struct drm_device *dev, return ret; } - for (i = 0; i < ARRAY_SIZE(nv_fb->nv_gem); i++) { - if (nv_fb->nv_gem[i] != NULL) { - if (!nvKms->isMemoryValidForDisplay(nv_dev->pDevice, - nv_fb->nv_gem[i]->pMemory)) { - NV_DRM_DEV_LOG_INFO( - nv_dev, - "Framebuffer memory not appropriate for scanout"); - goto fail; - } + for (i = 0; i < NVKMS_MAX_PLANES_PER_SURFACE; i++) { + struct drm_gem_object *gem = nv_fb_get_gem_obj(fb, i); + if (gem != NULL) { + nv_gem = to_nv_gem_object(gem); - params.planes[i].memory = nv_fb->nv_gem[i]->pMemory; - params.planes[i].offset = nv_fb->base.offsets[i]; - params.planes[i].pitch = nv_fb->base.pitches[i]; + params.planes[i].memory = nv_gem->pMemory; + params.planes[i].offset = fb->offsets[i]; + params.planes[i].pitch = fb->pitches[i]; } } - params.height = nv_fb->base.height; - params.width = nv_fb->base.width; + params.height = fb->height; + params.width = fb->width; params.format = format; if (have_modifier) { @@ -199,7 +199,7 @@ static int nv_drm_framebuffer_init(struct drm_device *dev, return 0; fail: - drm_framebuffer_cleanup(&nv_fb->base); + drm_framebuffer_cleanup(fb); return -EINVAL; } diff --git a/kernel-open/nvidia-drm/nvidia-drm-fb.h b/kernel-open/nvidia-drm/nvidia-drm-fb.h index cf477cc734..40445665e8 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-fb.h +++ b/kernel-open/nvidia-drm/nvidia-drm-fb.h @@ -41,8 +41,10 @@ struct nv_drm_framebuffer { struct NvKmsKapiSurface *pSurface; - struct nv_drm_gem_object* - nv_gem[NVKMS_MAX_PLANES_PER_SURFACE]; +#if !defined(NV_DRM_FRAMEBUFFER_OBJ_PRESENT) + struct drm_gem_object* + obj[NVKMS_MAX_PLANES_PER_SURFACE]; +#endif struct drm_framebuffer base; }; @@ -56,6 +58,29 @@ static inline struct nv_drm_framebuffer *to_nv_framebuffer( return container_of(fb, struct nv_drm_framebuffer, base); } +static inline struct drm_gem_object *nv_fb_get_gem_obj( + struct drm_framebuffer *fb, + uint32_t plane) +{ +#if defined(NV_DRM_FRAMEBUFFER_OBJ_PRESENT) + return fb->obj[plane]; +#else + return to_nv_framebuffer(fb)->obj[plane]; +#endif +} + +static inline void nv_fb_set_gem_obj( + struct drm_framebuffer *fb, + uint32_t plane, + struct drm_gem_object *obj) +{ +#if defined(NV_DRM_FRAMEBUFFER_OBJ_PRESENT) + fb->obj[plane] = obj; +#else + to_nv_framebuffer(fb)->obj[plane] = obj; +#endif +} + struct drm_framebuffer *nv_drm_internal_framebuffer_create( struct drm_device *dev, struct drm_file *file, diff --git a/kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.c b/kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.c index bb26d17995..f65d0fe8ba 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.c +++ b/kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.c @@ -71,9 +71,20 @@ static void __nv_drm_gem_nvkms_memory_free(struct nv_drm_gem_object *nv_gem) nv_drm_free(nv_nvkms_memory); } +static int __nv_drm_gem_nvkms_map( + struct nv_drm_gem_nvkms_memory *nv_nvkms_memory); + static int __nv_drm_gem_nvkms_mmap(struct nv_drm_gem_object *nv_gem, struct vm_area_struct *vma) { + struct nv_drm_gem_nvkms_memory *nv_nvkms_memory = + to_nv_nvkms_memory(nv_gem); + + int ret = __nv_drm_gem_nvkms_map(nv_nvkms_memory); + if (ret) { + return ret; + } + return drm_gem_mmap_obj(&nv_gem->base, drm_vma_node_size(&nv_gem->base.vma_node) << PAGE_SHIFT, vma); } @@ -146,11 +157,18 @@ static struct drm_gem_object *__nv_drm_gem_nvkms_prime_dup( static int __nv_drm_gem_nvkms_map( struct nv_drm_gem_nvkms_memory *nv_nvkms_memory) { + int ret = 0; struct nv_drm_device *nv_dev = nv_nvkms_memory->base.nv_dev; struct NvKmsKapiMemory *pMemory = nv_nvkms_memory->base.pMemory; + mutex_lock(&nv_nvkms_memory->map_lock); + + if (nv_nvkms_memory->physically_mapped) { + goto done; + } + if (!nv_dev->hasVideoMemory) { - return 0; + goto done; } if (!nvKms->mapMemory(nv_dev->pDevice, @@ -161,7 +179,8 @@ static int __nv_drm_gem_nvkms_map( nv_dev, "Failed to map NvKmsKapiMemory 0x%p", pMemory); - return -ENOMEM; + ret = -ENOMEM; + goto done; } nv_nvkms_memory->pWriteCombinedIORemapAddress = ioremap_wc( @@ -177,7 +196,9 @@ static int __nv_drm_gem_nvkms_map( nv_nvkms_memory->physically_mapped = true; - return 0; +done: + mutex_unlock(&nv_nvkms_memory->map_lock); + return ret; } static void *__nv_drm_gem_nvkms_prime_vmap( @@ -186,32 +207,46 @@ static void *__nv_drm_gem_nvkms_prime_vmap( struct nv_drm_gem_nvkms_memory *nv_nvkms_memory = to_nv_nvkms_memory(nv_gem); - if (!nv_nvkms_memory->physically_mapped) { - int ret = __nv_drm_gem_nvkms_map(nv_nvkms_memory); - if (ret) { - return ERR_PTR(ret); - } + int ret = __nv_drm_gem_nvkms_map(nv_nvkms_memory); + if (ret) { + return ERR_PTR(ret); + } + + if (nv_nvkms_memory->physically_mapped) { + return nv_nvkms_memory->pWriteCombinedIORemapAddress; } - return nv_nvkms_memory->pWriteCombinedIORemapAddress; + /* + * If this buffer isn't physically mapped, it might be backed by struct + * pages. Use vmap in that case. + */ + if (nv_nvkms_memory->pages_count > 0) { + return nv_drm_vmap(nv_nvkms_memory->pages, + nv_nvkms_memory->pages_count); + } + + return ERR_PTR(-ENOMEM); } -static int __nv_drm_gem_map_nvkms_memory_offset( - struct nv_drm_device *nv_dev, +static void __nv_drm_gem_nvkms_prime_vunmap( struct nv_drm_gem_object *nv_gem, - uint64_t *offset) + void *address) { struct nv_drm_gem_nvkms_memory *nv_nvkms_memory = to_nv_nvkms_memory(nv_gem); - if (!nv_nvkms_memory->physically_mapped) { - int ret = __nv_drm_gem_nvkms_map(nv_nvkms_memory); - if (ret) { - return ret; - } + if (!nv_nvkms_memory->physically_mapped && + nv_nvkms_memory->pages_count > 0) { + nv_drm_vunmap(address); } +} - return nv_drm_gem_create_mmap_offset(&nv_nvkms_memory->base, offset); +static int __nv_drm_gem_map_nvkms_memory_offset( + struct nv_drm_device *nv_dev, + struct nv_drm_gem_object *nv_gem, + uint64_t *offset) +{ + return nv_drm_gem_create_mmap_offset(nv_gem, offset); } static struct sg_table *__nv_drm_gem_nvkms_memory_prime_get_sg_table( @@ -223,7 +258,7 @@ static struct sg_table *__nv_drm_gem_nvkms_memory_prime_get_sg_table( struct sg_table *sg_table; if (nv_nvkms_memory->pages_count == 0) { - NV_DRM_DEV_LOG_ERR( + NV_DRM_DEV_DEBUG_DRIVER( nv_dev, "Cannot create sg_table for NvKmsKapiMemory 0x%p", nv_gem->pMemory); @@ -241,6 +276,7 @@ const struct nv_drm_gem_object_funcs nv_gem_nvkms_memory_ops = { .free = __nv_drm_gem_nvkms_memory_free, .prime_dup = __nv_drm_gem_nvkms_prime_dup, .prime_vmap = __nv_drm_gem_nvkms_prime_vmap, + .prime_vunmap = __nv_drm_gem_nvkms_prime_vunmap, .mmap = __nv_drm_gem_nvkms_mmap, .handle_vma_fault = __nv_drm_gem_nvkms_handle_vma_fault, .create_mmap_offset = __nv_drm_gem_map_nvkms_memory_offset, @@ -265,6 +301,7 @@ static int __nv_drm_nvkms_gem_obj_init( return -EINVAL; } + mutex_init(&nv_nvkms_memory->map_lock); nv_nvkms_memory->pPhysicalAddress = NULL; nv_nvkms_memory->pWriteCombinedIORemapAddress = NULL; nv_nvkms_memory->physically_mapped = false; diff --git a/kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.h b/kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.h index ea218a058d..1af8c2a7b2 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.h +++ b/kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.h @@ -32,8 +32,15 @@ struct nv_drm_gem_nvkms_memory { struct nv_drm_gem_object base; + /* + * Lock to protect concurrent writes to physically_mapped, pPhysicalAddress, + * and pWriteCombinedIORemapAddress. + * + * __nv_drm_gem_nvkms_map(), the sole writer, is structured such that + * readers are not required to hold the lock. + */ + struct mutex map_lock; bool physically_mapped; - void *pPhysicalAddress; void *pWriteCombinedIORemapAddress; diff --git a/kernel-open/nvidia-drm/nvidia-drm-gem-user-memory.c b/kernel-open/nvidia-drm/nvidia-drm-gem-user-memory.c index 9d2a0512ac..4e989d3d29 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-gem-user-memory.c +++ b/kernel-open/nvidia-drm/nvidia-drm-gem-user-memory.c @@ -36,6 +36,10 @@ #include "linux/mm.h" #include "nv-mm.h" +#if defined(NV_LINUX_PFN_T_H_PRESENT) +#include "linux/pfn_t.h" +#endif + #if defined(NV_BSD) #include #endif @@ -103,25 +107,20 @@ static int __nv_drm_gem_user_memory_mmap(struct nv_drm_gem_object *nv_gem, return 0; } -static vm_fault_t __nv_drm_gem_user_memory_handle_vma_fault( - struct nv_drm_gem_object *nv_gem, +#if defined(NV_LINUX) && !defined(NV_VMF_INSERT_MIXED_PRESENT) +static vm_fault_t __nv_vm_insert_mixed_helper( struct vm_area_struct *vma, - struct vm_fault *vmf) + unsigned long address, + unsigned long pfn) { - struct nv_drm_gem_user_memory *nv_user_memory = to_nv_user_memory(nv_gem); - unsigned long address = nv_page_fault_va(vmf); - struct drm_gem_object *gem = vma->vm_private_data; - unsigned long page_offset; - vm_fault_t ret; - - page_offset = vmf->pgoff - drm_vma_node_start(&gem->vma_node); + int ret; - BUG_ON(page_offset >= nv_user_memory->pages_count); +#if defined(NV_PFN_TO_PFN_T_PRESENT) + ret = vm_insert_mixed(vma, address, pfn_to_pfn_t(pfn)); +#else + ret = vm_insert_mixed(vma, address, pfn); +#endif -#if !defined(NV_LINUX) - ret = vmf_insert_pfn(vma, address, page_to_pfn(nv_user_memory->pages[page_offset])); -#else /* !defined(NV_LINUX) */ - ret = vm_insert_page(vma, address, nv_user_memory->pages[page_offset]); switch (ret) { case 0: case -EBUSY: @@ -129,19 +128,38 @@ static vm_fault_t __nv_drm_gem_user_memory_handle_vma_fault( * EBUSY indicates that another thread already handled * the faulted range. */ - ret = VM_FAULT_NOPAGE; - break; + return VM_FAULT_NOPAGE; case -ENOMEM: - ret = VM_FAULT_OOM; - break; + return VM_FAULT_OOM; default: WARN_ONCE(1, "Unhandled error in %s: %d\n", __FUNCTION__, ret); - ret = VM_FAULT_SIGBUS; - break; + return VM_FAULT_SIGBUS; } -#endif /* !defined(NV_LINUX) */ +} +#endif - return ret; +static vm_fault_t __nv_drm_gem_user_memory_handle_vma_fault( + struct nv_drm_gem_object *nv_gem, + struct vm_area_struct *vma, + struct vm_fault *vmf) +{ + struct nv_drm_gem_user_memory *nv_user_memory = to_nv_user_memory(nv_gem); + unsigned long address = nv_page_fault_va(vmf); + struct drm_gem_object *gem = vma->vm_private_data; + unsigned long page_offset; + unsigned long pfn; + + page_offset = vmf->pgoff - drm_vma_node_start(&gem->vma_node); + BUG_ON(page_offset >= nv_user_memory->pages_count); + pfn = page_to_pfn(nv_user_memory->pages[page_offset]); + +#if !defined(NV_LINUX) + return vmf_insert_pfn(vma, address, pfn); +#elif defined(NV_VMF_INSERT_MIXED_PRESENT) + return vmf_insert_mixed(vma, address, pfn_to_pfn_t(pfn)); +#else + return __nv_vm_insert_mixed_helper(vma, address, pfn); +#endif } static int __nv_drm_gem_user_create_mmap_offset( diff --git a/kernel-open/nvidia-drm/nvidia-drm-gem.c b/kernel-open/nvidia-drm/nvidia-drm-gem.c index ef0e0f83b7..54efbab95e 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-gem.c +++ b/kernel-open/nvidia-drm/nvidia-drm-gem.c @@ -144,6 +144,12 @@ void nv_drm_gem_object_init(struct nv_drm_device *nv_dev, #endif drm_gem_private_object_init(dev, &nv_gem->base, size); + + /* Create mmap offset early for drm_gem_prime_mmap(), if possible. */ + if (nv_gem->ops->create_mmap_offset) { + uint64_t offset; + nv_gem->ops->create_mmap_offset(nv_dev, nv_gem, &offset); + } } struct drm_gem_object *nv_drm_gem_prime_import(struct drm_device *dev, @@ -232,6 +238,7 @@ int nv_drm_gem_map_offset_ioctl(struct drm_device *dev, return -EINVAL; } + /* mmap offset creation is idempotent, fetch it by creating it again. */ if (nv_gem->ops->create_mmap_offset) { ret = nv_gem->ops->create_mmap_offset(nv_dev, nv_gem, ¶ms->offset); } else { diff --git a/kernel-open/nvidia-drm/nvidia-drm-helper.h b/kernel-open/nvidia-drm/nvidia-drm-helper.h index f6fdfd74e3..b96e1433e1 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-helper.h +++ b/kernel-open/nvidia-drm/nvidia-drm-helper.h @@ -40,8 +40,13 @@ #include #endif -#if defined(NV_DRM_ROTATION_AVAILABLE) -/* For DRM_MODE_ROTATE_* and DRM_MODE_REFLECT_* */ +#if defined(NV_DRM_ROTATION_AVAILABLE) || \ + defined(NV_DRM_COLOR_CTM_3X4_PRESENT) || \ + defined(NV_DRM_COLOR_LUT_PRESENT) +/* + * For DRM_MODE_ROTATE_*, DRM_MODE_REFLECT_*, struct drm_color_ctm_3x4, and + * struct drm_color_lut. + */ #include #endif @@ -358,6 +363,24 @@ static inline void nv_drm_connector_put(struct drm_connector *connector) #endif } +static inline void nv_drm_property_blob_put(struct drm_property_blob *blob) +{ +#if defined(NV_DRM_PROPERTY_BLOB_PUT_PRESENT) + drm_property_blob_put(blob); +#else + drm_property_unreference_blob(blob); +#endif +} + +static inline void nv_drm_property_blob_get(struct drm_property_blob *blob) +{ +#if defined(NV_DRM_PROPERTY_BLOB_PUT_PRESENT) + drm_property_blob_get(blob); +#else + drm_property_reference_blob(blob); +#endif +} + static inline struct drm_crtc * nv_drm_crtc_find(struct drm_device *dev, struct drm_file *filep, uint32_t id) { @@ -625,6 +648,31 @@ static inline int nv_drm_format_num_planes(uint32_t format) #define DRM_UNLOCKED 0 #endif +/* + * struct drm_color_ctm_3x4 was added by commit 6872a189be50 ("drm/amd/display: + * Add 3x4 CTM support for plane CTM") in v6.8. For backwards compatibility, + * define it when not present. + */ +#if !defined(NV_DRM_COLOR_CTM_3X4_PRESENT) +struct drm_color_ctm_3x4 { + __u64 matrix[12]; +}; +#endif + +/* + * struct drm_color_lut was added by commit 5488dc16fde7 ("drm: introduce pipe + * color correction properties") in v4.6. For backwards compatibility, define it + * when not present. + */ +#if !defined(NV_DRM_COLOR_LUT_PRESENT) +struct drm_color_lut { + __u16 red; + __u16 green; + __u16 blue; + __u16 reserved; +}; +#endif + /* * drm_vma_offset_exact_lookup_locked() were added * by kernel commit 2225cfe46bcc which was Signed-off-by: diff --git a/kernel-open/nvidia-drm/nvidia-drm-linux.c b/kernel-open/nvidia-drm/nvidia-drm-linux.c index 8c59b7cb2e..78429510c8 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-linux.c +++ b/kernel-open/nvidia-drm/nvidia-drm-linux.c @@ -34,7 +34,7 @@ MODULE_PARM_DESC( "Enable atomic kernel modesetting (1 = enable, 0 = disable (default))"); module_param_named(modeset, nv_drm_modeset_module_param, bool, 0400); -#if defined(NV_DRM_FBDEV_GENERIC_AVAILABLE) +#if defined(NV_DRM_FBDEV_AVAILABLE) MODULE_PARM_DESC( fbdev, "Create a framebuffer device (1 = enable, 0 = disable (default)) (EXPERIMENTAL)"); diff --git a/kernel-open/nvidia-drm/nvidia-drm-modeset.c b/kernel-open/nvidia-drm/nvidia-drm-modeset.c index 1199b4d184..6ed769615c 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-modeset.c +++ b/kernel-open/nvidia-drm/nvidia-drm-modeset.c @@ -414,6 +414,31 @@ nv_drm_atomic_apply_modeset_config(struct drm_device *dev, return -EINVAL; } +#if defined(NV_DRM_FRAMEBUFFER_OBJ_PRESENT) + if (commit) { + /* + * This function does what is necessary to prepare the framebuffers + * attached to each new plane in the state for scan out, mostly by + * calling back into driver callbacks the NVIDIA driver does not + * provide. The end result is that all it does on the NVIDIA driver + * is populate the plane state's dma fence pointers with any implicit + * sync fences attached to the GEM objects associated with those planes + * in the new state, prefering explicit sync fences when appropriate. + * This must be done prior to converting the per-plane fences to + * semaphore waits below. + * + * Note this only works when the drm_framebuffer:obj[] field is present + * and populated, so skip calling this function on kernels where that + * field is not present. + */ + ret = drm_atomic_helper_prepare_planes(dev, state); + + if (ret) { + return ret; + } + } +#endif /* defined(NV_DRM_FRAMEBUFFER_OBJ_PRESENT) */ + memset(requested_config, 0, sizeof(*requested_config)); /* Loop over affected crtcs and construct NvKmsKapiRequestedModeSetConfig */ diff --git a/kernel-open/nvidia-drm/nvidia-drm-os-interface.h b/kernel-open/nvidia-drm/nvidia-drm-os-interface.h index 6f8cfea917..a6b0f947e0 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-os-interface.h +++ b/kernel-open/nvidia-drm/nvidia-drm-os-interface.h @@ -59,14 +59,20 @@ typedef struct nv_timer nv_drm_timer; #endif #if defined(NV_DRM_FBDEV_GENERIC_SETUP_PRESENT) && defined(NV_DRM_APERTURE_REMOVE_CONFLICTING_PCI_FRAMEBUFFERS_PRESENT) +#define NV_DRM_FBDEV_AVAILABLE #define NV_DRM_FBDEV_GENERIC_AVAILABLE #endif +#if defined(NV_DRM_FBDEV_TTM_SETUP_PRESENT) && defined(NV_DRM_APERTURE_REMOVE_CONFLICTING_PCI_FRAMEBUFFERS_PRESENT) +#define NV_DRM_FBDEV_AVAILABLE +#define NV_DRM_FBDEV_TTM_AVAILABLE +#endif + struct page; /* Set to true when the atomic modeset feature is enabled. */ extern bool nv_drm_modeset_module_param; -#if defined(NV_DRM_FBDEV_GENERIC_AVAILABLE) +#if defined(NV_DRM_FBDEV_AVAILABLE) /* Set to true when the nvidia-drm driver should install a framebuffer device */ extern bool nv_drm_fbdev_module_param; #endif diff --git a/kernel-open/nvidia-drm/nvidia-drm-priv.h b/kernel-open/nvidia-drm/nvidia-drm-priv.h index f6b58d3a40..bf4db6276e 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-priv.h +++ b/kernel-open/nvidia-drm/nvidia-drm-priv.h @@ -163,6 +163,24 @@ struct nv_drm_device { struct drm_property *nv_hdr_output_metadata_property; #endif + struct drm_property *nv_plane_lms_ctm_property; + struct drm_property *nv_plane_lms_to_itp_ctm_property; + struct drm_property *nv_plane_itp_to_lms_ctm_property; + struct drm_property *nv_plane_blend_ctm_property; + + struct drm_property *nv_plane_degamma_tf_property; + struct drm_property *nv_plane_degamma_lut_property; + struct drm_property *nv_plane_degamma_lut_size_property; + struct drm_property *nv_plane_degamma_multiplier_property; + + struct drm_property *nv_plane_tmo_lut_property; + struct drm_property *nv_plane_tmo_lut_size_property; + + struct drm_property *nv_crtc_regamma_tf_property; + struct drm_property *nv_crtc_regamma_lut_property; + struct drm_property *nv_crtc_regamma_lut_size_property; + struct drm_property *nv_crtc_regamma_divisor_property; + struct nv_drm_device *next; }; diff --git a/kernel-open/nvidia-drm/nvidia-drm-sources.mk b/kernel-open/nvidia-drm/nvidia-drm-sources.mk index 7ef0c5b8fd..dfc1213143 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-sources.mk +++ b/kernel-open/nvidia-drm/nvidia-drm-sources.mk @@ -67,10 +67,14 @@ NV_CONFTEST_FUNCTION_COMPILE_TESTS += fence_set_error NV_CONFTEST_FUNCTION_COMPILE_TESTS += sync_file_get_fence NV_CONFTEST_FUNCTION_COMPILE_TESTS += drm_aperture_remove_conflicting_pci_framebuffers NV_CONFTEST_FUNCTION_COMPILE_TESTS += drm_fbdev_generic_setup +NV_CONFTEST_FUNCTION_COMPILE_TESTS += drm_fbdev_ttm_setup NV_CONFTEST_FUNCTION_COMPILE_TESTS += drm_connector_attach_hdr_output_metadata_property NV_CONFTEST_FUNCTION_COMPILE_TESTS += drm_helper_crtc_enable_color_mgmt NV_CONFTEST_FUNCTION_COMPILE_TESTS += drm_crtc_enable_color_mgmt NV_CONFTEST_FUNCTION_COMPILE_TESTS += drm_atomic_helper_legacy_gamma_set +NV_CONFTEST_FUNCTION_COMPILE_TESTS += vmf_insert_mixed +NV_CONFTEST_FUNCTION_COMPILE_TESTS += pfn_to_pfn_t +NV_CONFTEST_FUNCTION_COMPILE_TESTS += drm_gem_prime_mmap NV_CONFTEST_TYPE_COMPILE_TESTS += drm_bus_present NV_CONFTEST_TYPE_COMPILE_TESTS += drm_bus_has_bus_type @@ -130,3 +134,9 @@ NV_CONFTEST_TYPE_COMPILE_TESTS += drm_aperture_remove_conflicting_pci_framebuffe NV_CONFTEST_TYPE_COMPILE_TESTS += drm_mode_create_dp_colorspace_property_has_supported_colorspaces_arg NV_CONFTEST_TYPE_COMPILE_TESTS += drm_syncobj_features_present NV_CONFTEST_TYPE_COMPILE_TESTS += drm_unlocked_ioctl_flag_present +NV_CONFTEST_TYPE_COMPILE_TESTS += drm_framebuffer_obj_present +NV_CONFTEST_TYPE_COMPILE_TESTS += drm_color_ctm_3x4_present +NV_CONFTEST_TYPE_COMPILE_TESTS += drm_color_lut +NV_CONFTEST_TYPE_COMPILE_TESTS += drm_property_blob_put +NV_CONFTEST_TYPE_COMPILE_TESTS += drm_driver_has_gem_prime_mmap +NV_CONFTEST_TYPE_COMPILE_TESTS += drm_output_poll_changed diff --git a/kernel-open/nvidia-modeset/nv-kthread-q.c b/kernel-open/nvidia-modeset/nv-kthread-q.c index 7f3c4cabc9..28d17d82cf 100644 --- a/kernel-open/nvidia-modeset/nv-kthread-q.c +++ b/kernel-open/nvidia-modeset/nv-kthread-q.c @@ -201,7 +201,7 @@ static struct task_struct *thread_create_on_node(int (*threadfn)(void *data), // Ran out of attempts - return thread even if its stack may not be // allocated on the preferred node - if ((i == (attempts - 1))) + if (i == (attempts - 1)) break; // Get the NUMA node where the first page of the stack is resident. If diff --git a/kernel-open/nvidia-modeset/nvidia-modeset-linux.c b/kernel-open/nvidia-modeset/nvidia-modeset-linux.c index dc242f5713..da58bb2b39 100644 --- a/kernel-open/nvidia-modeset/nvidia-modeset-linux.c +++ b/kernel-open/nvidia-modeset/nvidia-modeset-linux.c @@ -86,6 +86,9 @@ module_param_named(vblank_sem_control, vblank_sem_control, bool, 0400); static bool opportunistic_display_sync = true; module_param_named(opportunistic_display_sync, opportunistic_display_sync, bool, 0400); +static enum NvKmsDebugForceColorSpace debug_force_color_space = NVKMS_DEBUG_FORCE_COLOR_SPACE_NONE; +module_param_named(debug_force_color_space, debug_force_color_space, uint, 0400); + /* These parameters are used for fault injection tests. Normally the defaults * should be used. */ MODULE_PARM_DESC(fail_malloc, "Fail the Nth call to nvkms_alloc"); @@ -139,6 +142,14 @@ NvBool nvkms_opportunistic_display_sync(void) return opportunistic_display_sync; } +enum NvKmsDebugForceColorSpace nvkms_debug_force_color_space(void) +{ + if (debug_force_color_space >= NVKMS_DEBUG_FORCE_COLOR_SPACE_MAX) { + return NVKMS_DEBUG_FORCE_COLOR_SPACE_NONE; + } + return debug_force_color_space; +} + NvBool nvkms_kernel_supports_syncpts(void) { /* @@ -1084,7 +1095,7 @@ static void nvkms_kapi_event_kthread_q_callback(void *arg) nvKmsKapiHandleEventQueueChange(device); } -struct nvkms_per_open *nvkms_open_common(enum NvKmsClientType type, +static struct nvkms_per_open *nvkms_open_common(enum NvKmsClientType type, struct NvKmsKapiDevice *device, int *status) { @@ -1136,7 +1147,7 @@ struct nvkms_per_open *nvkms_open_common(enum NvKmsClientType type, return NULL; } -void nvkms_close_pm_locked(struct nvkms_per_open *popen) +static void nvkms_close_pm_locked(struct nvkms_per_open *popen) { /* * Don't use down_interruptible(): we need to free resources @@ -1199,7 +1210,7 @@ static void nvkms_close_popen(struct nvkms_per_open *popen) } } -int nvkms_ioctl_common +static int nvkms_ioctl_common ( struct nvkms_per_open *popen, NvU32 cmd, NvU64 address, const size_t size @@ -1558,6 +1569,48 @@ NvBool nvKmsKapiGetFunctionsTable } EXPORT_SYMBOL(nvKmsKapiGetFunctionsTable); +NvU32 nvKmsKapiF16ToF32(NvU16 a) +{ + return nvKmsKapiF16ToF32Internal(a); +} +EXPORT_SYMBOL(nvKmsKapiF16ToF32); + +NvU16 nvKmsKapiF32ToF16(NvU32 a) +{ + return nvKmsKapiF32ToF16Internal(a); +} +EXPORT_SYMBOL(nvKmsKapiF32ToF16); + +NvU32 nvKmsKapiF32Mul(NvU32 a, NvU32 b) +{ + return nvKmsKapiF32MulInternal(a, b); +} +EXPORT_SYMBOL(nvKmsKapiF32Mul); + +NvU32 nvKmsKapiF32Div(NvU32 a, NvU32 b) +{ + return nvKmsKapiF32DivInternal(a, b); +} +EXPORT_SYMBOL(nvKmsKapiF32Div); + +NvU32 nvKmsKapiF32Add(NvU32 a, NvU32 b) +{ + return nvKmsKapiF32AddInternal(a, b); +} +EXPORT_SYMBOL(nvKmsKapiF32Add); + +NvU32 nvKmsKapiF32ToUI32RMinMag(NvU32 a, NvBool exact) +{ + return nvKmsKapiF32ToUI32RMinMagInternal(a, exact); +} +EXPORT_SYMBOL(nvKmsKapiF32ToUI32RMinMag); + +NvU32 nvKmsKapiUI32ToF32(NvU32 a) +{ + return nvKmsKapiUI32ToF32Internal(a); +} +EXPORT_SYMBOL(nvKmsKapiUI32ToF32); + /************************************************************************* * File operation callback functions. *************************************************************************/ diff --git a/kernel-open/nvidia-modeset/nvidia-modeset-os-interface.h b/kernel-open/nvidia-modeset/nvidia-modeset-os-interface.h index 82309a8d6b..a2ee2067f0 100644 --- a/kernel-open/nvidia-modeset/nvidia-modeset-os-interface.h +++ b/kernel-open/nvidia-modeset/nvidia-modeset-os-interface.h @@ -67,6 +67,14 @@ enum NvKmsSyncPtOp { NVKMS_SYNCPT_OP_READ_MINVAL, }; +enum NvKmsDebugForceColorSpace { + NVKMS_DEBUG_FORCE_COLOR_SPACE_NONE, + NVKMS_DEBUG_FORCE_COLOR_SPACE_RGB, + NVKMS_DEBUG_FORCE_COLOR_SPACE_YUV444, + NVKMS_DEBUG_FORCE_COLOR_SPACE_YUV422, + NVKMS_DEBUG_FORCE_COLOR_SPACE_MAX, +}; + typedef struct { struct { @@ -102,6 +110,7 @@ NvBool nvkms_disable_vrr_memclk_switch(void); NvBool nvkms_hdmi_deepcolor(void); NvBool nvkms_vblank_sem_control(void); NvBool nvkms_opportunistic_display_sync(void); +enum NvKmsDebugForceColorSpace nvkms_debug_force_color_space(void); void nvkms_call_rm (void *ops); void* nvkms_alloc (size_t size, diff --git a/kernel-open/nvidia-modeset/nvkms.h b/kernel-open/nvidia-modeset/nvkms.h index 25e4923b63..0ac3f7913c 100644 --- a/kernel-open/nvidia-modeset/nvkms.h +++ b/kernel-open/nvidia-modeset/nvkms.h @@ -110,4 +110,18 @@ NvBool nvKmsSetBacklight(NvU32 display_id, void *drv_priv, NvU32 brightness); NvBool nvKmsOpenDevHasSubOwnerPermissionOrBetter(const struct NvKmsPerOpenDev *pOpenDev); +NvU32 nvKmsKapiF16ToF32Internal(NvU16 a); + +NvU16 nvKmsKapiF32ToF16Internal(NvU32 a); + +NvU32 nvKmsKapiF32MulInternal(NvU32 a, NvU32 b); + +NvU32 nvKmsKapiF32DivInternal(NvU32 a, NvU32 b); + +NvU32 nvKmsKapiF32AddInternal(NvU32 a, NvU32 b); + +NvU32 nvKmsKapiF32ToUI32RMinMagInternal(NvU32 a, NvBool exact); + +NvU32 nvKmsKapiUI32ToF32Internal(NvU32 a); + #endif /* __NV_KMS_H__ */ diff --git a/kernel-open/nvidia-uvm/clc365.h b/kernel-open/nvidia-uvm/clc365.h index 807238c2f5..49312e3ea9 100644 --- a/kernel-open/nvidia-uvm/clc365.h +++ b/kernel-open/nvidia-uvm/clc365.h @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2023 NVIDIA Corporation + Copyright (c) 2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to diff --git a/kernel-open/nvidia-uvm/clc369.h b/kernel-open/nvidia-uvm/clc369.h index 37473f8883..b9b0896cad 100644 --- a/kernel-open/nvidia-uvm/clc369.h +++ b/kernel-open/nvidia-uvm/clc369.h @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2023 NVIDIA Corporation + Copyright (c) 2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to diff --git a/kernel-open/nvidia-uvm/ctrl2080mc.h b/kernel-open/nvidia-uvm/ctrl2080mc.h index 8ebf42b877..e2a9da119f 100644 --- a/kernel-open/nvidia-uvm/ctrl2080mc.h +++ b/kernel-open/nvidia-uvm/ctrl2080mc.h @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2013-2023 NVIDIA Corporation + Copyright (c) 2013-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to diff --git a/kernel-open/nvidia-uvm/hwref/blackwell/gb100/dev_fault.h b/kernel-open/nvidia-uvm/hwref/blackwell/gb100/dev_fault.h index b50fcc4e4b..8f8e1dcd2d 100644 --- a/kernel-open/nvidia-uvm/hwref/blackwell/gb100/dev_fault.h +++ b/kernel-open/nvidia-uvm/hwref/blackwell/gb100/dev_fault.h @@ -462,6 +462,7 @@ #define NV_PFAULT_CLIENT_HUB_SCC3 0x00000044 /* */ #define NV_PFAULT_CLIENT_HUB_SCC_NB3 0x00000045 /* */ #define NV_PFAULT_CLIENT_HUB_RASTERTWOD1 0x00000046 /* */ +#define NV_PFAULT_CLIENT_HUB_PTP_X8 0x00000046 /* */ #define NV_PFAULT_CLIENT_HUB_RASTERTWOD2 0x00000047 /* */ #define NV_PFAULT_CLIENT_HUB_RASTERTWOD3 0x00000048 /* */ #define NV_PFAULT_CLIENT_HUB_GSPLITE1 0x00000049 /* */ diff --git a/kernel-open/nvidia-uvm/nv-kthread-q-selftest.c b/kernel-open/nvidia-uvm/nv-kthread-q-selftest.c index 88b70a4e85..83be19b18c 100644 --- a/kernel-open/nvidia-uvm/nv-kthread-q-selftest.c +++ b/kernel-open/nvidia-uvm/nv-kthread-q-selftest.c @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2016 NVIDIA Corporation + Copyright (c) 2016-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -81,7 +81,7 @@ #define NUM_Q_ITEMS_IN_MULTITHREAD_TEST (NUM_TEST_Q_ITEMS * NUM_TEST_KTHREADS) // This exists in order to have a function to place a breakpoint on: -void on_nvq_assert(void) +static void on_nvq_assert(void) { (void)NULL; } diff --git a/kernel-open/nvidia-uvm/nv-kthread-q.c b/kernel-open/nvidia-uvm/nv-kthread-q.c index 7f3c4cabc9..28d17d82cf 100644 --- a/kernel-open/nvidia-uvm/nv-kthread-q.c +++ b/kernel-open/nvidia-uvm/nv-kthread-q.c @@ -201,7 +201,7 @@ static struct task_struct *thread_create_on_node(int (*threadfn)(void *data), // Ran out of attempts - return thread even if its stack may not be // allocated on the preferred node - if ((i == (attempts - 1))) + if (i == (attempts - 1)) break; // Get the NUMA node where the first page of the stack is resident. If diff --git a/kernel-open/nvidia-uvm/nvidia-uvm-sources.Kbuild b/kernel-open/nvidia-uvm/nvidia-uvm-sources.Kbuild index f64cd2b6fa..9e5ad2c9e4 100644 --- a/kernel-open/nvidia-uvm/nvidia-uvm-sources.Kbuild +++ b/kernel-open/nvidia-uvm/nvidia-uvm-sources.Kbuild @@ -1,7 +1,6 @@ NVIDIA_UVM_SOURCES ?= NVIDIA_UVM_SOURCES_CXX ?= -NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_ats_sva.c NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_conf_computing.c NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_sec2_test.c NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_maxwell_sec2.c @@ -12,7 +11,6 @@ NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_blackwell_mmu.c NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_blackwell_host.c NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_common.c NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_linux.c -NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_debug_optimized.c NVIDIA_UVM_SOURCES += nvidia-uvm/nvstatus.c NVIDIA_UVM_SOURCES += nvidia-uvm/nvCpuUuid.c NVIDIA_UVM_SOURCES += nvidia-uvm/nv-kthread-q.c @@ -36,6 +34,7 @@ NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_range_tree.c NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_rb_tree.c NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_range_allocator.c NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_va_range.c +NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_va_range_device_p2p.c NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_va_policy.c NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_va_block.c NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_range_group.c @@ -101,6 +100,7 @@ NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_perf_prefetch.c NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_ats.c NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_ats_ibm.c NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_ats_faults.c +NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_ats_sva.c NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_test.c NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_test_rng.c NVIDIA_UVM_SOURCES += nvidia-uvm/uvm_range_tree_test.c diff --git a/kernel-open/nvidia-uvm/nvidia-uvm.Kbuild b/kernel-open/nvidia-uvm/nvidia-uvm.Kbuild index 6c7ac9a40f..a7fcfc2864 100644 --- a/kernel-open/nvidia-uvm/nvidia-uvm.Kbuild +++ b/kernel-open/nvidia-uvm/nvidia-uvm.Kbuild @@ -13,19 +13,6 @@ NVIDIA_UVM_OBJECTS = include $(src)/nvidia-uvm/nvidia-uvm-sources.Kbuild NVIDIA_UVM_OBJECTS += $(patsubst %.c,%.o,$(NVIDIA_UVM_SOURCES)) -# Some linux kernel functions rely on being built with optimizations on and -# to work around this we put wrappers for them in a separate file that's built -# with optimizations on in debug builds and skipped in other builds. -# Notably gcc 4.4 supports per function optimization attributes that would be -# easier to use, but is too recent to rely on for now. -NVIDIA_UVM_DEBUG_OPTIMIZED_SOURCE := nvidia-uvm/uvm_debug_optimized.c -NVIDIA_UVM_DEBUG_OPTIMIZED_OBJECT := $(patsubst %.c,%.o,$(NVIDIA_UVM_DEBUG_OPTIMIZED_SOURCE)) - -ifneq ($(UVM_BUILD_TYPE),debug) - # Only build the wrappers on debug builds - NVIDIA_UVM_OBJECTS := $(filter-out $(NVIDIA_UVM_DEBUG_OPTIMIZED_OBJECT), $(NVIDIA_UVM_OBJECTS)) -endif - obj-m += nvidia-uvm.o nvidia-uvm-y := $(NVIDIA_UVM_OBJECTS) @@ -36,15 +23,14 @@ NVIDIA_UVM_KO = nvidia-uvm/nvidia-uvm.ko # ifeq ($(UVM_BUILD_TYPE),debug) - NVIDIA_UVM_CFLAGS += -DDEBUG -O1 -g -else - ifeq ($(UVM_BUILD_TYPE),develop) - # -DDEBUG is required, in order to allow pr_devel() print statements to - # work: - NVIDIA_UVM_CFLAGS += -DDEBUG - NVIDIA_UVM_CFLAGS += -DNVIDIA_UVM_DEVELOP - endif - NVIDIA_UVM_CFLAGS += -O2 + NVIDIA_UVM_CFLAGS += -DDEBUG -g +endif + +ifeq ($(UVM_BUILD_TYPE),develop) + # -DDEBUG is required, in order to allow pr_devel() print statements to + # work: + NVIDIA_UVM_CFLAGS += -DDEBUG + NVIDIA_UVM_CFLAGS += -DNVIDIA_UVM_DEVELOP endif NVIDIA_UVM_CFLAGS += -DNVIDIA_UVM_ENABLED @@ -56,30 +42,17 @@ NVIDIA_UVM_CFLAGS += -I$(src)/nvidia-uvm $(call ASSIGN_PER_OBJ_CFLAGS, $(NVIDIA_UVM_OBJECTS), $(NVIDIA_UVM_CFLAGS)) -ifeq ($(UVM_BUILD_TYPE),debug) - # Force optimizations on for the wrappers - $(call ASSIGN_PER_OBJ_CFLAGS, $(NVIDIA_UVM_DEBUG_OPTIMIZED_OBJECT), $(NVIDIA_UVM_CFLAGS) -O2) -endif - # # Register the conftests needed by nvidia-uvm.ko # NV_OBJECTS_DEPEND_ON_CONFTEST += $(NVIDIA_UVM_OBJECTS) -NV_CONFTEST_FUNCTION_COMPILE_TESTS += wait_on_bit_lock_argument_count -NV_CONFTEST_FUNCTION_COMPILE_TESTS += pde_data NV_CONFTEST_FUNCTION_COMPILE_TESTS += radix_tree_empty NV_CONFTEST_FUNCTION_COMPILE_TESTS += radix_tree_replace_slot NV_CONFTEST_FUNCTION_COMPILE_TESTS += pnv_npu2_init_context -NV_CONFTEST_FUNCTION_COMPILE_TESTS += vmf_insert_pfn NV_CONFTEST_FUNCTION_COMPILE_TESTS += cpumask_of_node NV_CONFTEST_FUNCTION_COMPILE_TESTS += list_is_first -NV_CONFTEST_FUNCTION_COMPILE_TESTS += timer_setup -NV_CONFTEST_FUNCTION_COMPILE_TESTS += pci_bus_address -NV_CONFTEST_FUNCTION_COMPILE_TESTS += set_memory_uc -NV_CONFTEST_FUNCTION_COMPILE_TESTS += set_pages_uc -NV_CONFTEST_FUNCTION_COMPILE_TESTS += ktime_get_raw_ts64 NV_CONFTEST_FUNCTION_COMPILE_TESTS += ioasid_get NV_CONFTEST_FUNCTION_COMPILE_TESTS += mm_pasid_drop NV_CONFTEST_FUNCTION_COMPILE_TESTS += mmget_not_zero @@ -88,26 +61,13 @@ NV_CONFTEST_FUNCTION_COMPILE_TESTS += iommu_sva_bind_device_has_drvdata_arg NV_CONFTEST_FUNCTION_COMPILE_TESTS += vm_fault_to_errno NV_CONFTEST_FUNCTION_COMPILE_TESTS += find_next_bit_wrap NV_CONFTEST_FUNCTION_COMPILE_TESTS += iommu_is_dma_domain +NV_CONFTEST_FUNCTION_COMPILE_TESTS += folio_test_swapcache -NV_CONFTEST_TYPE_COMPILE_TESTS += backing_dev_info -NV_CONFTEST_TYPE_COMPILE_TESTS += mm_context_t -NV_CONFTEST_TYPE_COMPILE_TESTS += get_user_pages_remote -NV_CONFTEST_TYPE_COMPILE_TESTS += get_user_pages -NV_CONFTEST_TYPE_COMPILE_TESTS += pin_user_pages_remote -NV_CONFTEST_TYPE_COMPILE_TESTS += pin_user_pages -NV_CONFTEST_TYPE_COMPILE_TESTS += vm_fault_has_address NV_CONFTEST_TYPE_COMPILE_TESTS += vm_ops_fault_removed_vma_arg -NV_CONFTEST_TYPE_COMPILE_TESTS += kmem_cache_has_kobj_remove_work -NV_CONFTEST_TYPE_COMPILE_TESTS += sysfs_slab_unlink -NV_CONFTEST_TYPE_COMPILE_TESTS += vm_fault_t NV_CONFTEST_TYPE_COMPILE_TESTS += mmu_notifier_ops_invalidate_range NV_CONFTEST_TYPE_COMPILE_TESTS += mmu_notifier_ops_arch_invalidate_secondary_tlbs -NV_CONFTEST_TYPE_COMPILE_TESTS += proc_ops -NV_CONFTEST_TYPE_COMPILE_TESTS += timespec64 -NV_CONFTEST_TYPE_COMPILE_TESTS += mm_has_mmap_lock NV_CONFTEST_TYPE_COMPILE_TESTS += migrate_vma_added_flags NV_CONFTEST_TYPE_COMPILE_TESTS += migrate_device_range -NV_CONFTEST_TYPE_COMPILE_TESTS += vm_area_struct_has_const_vm_flags NV_CONFTEST_TYPE_COMPILE_TESTS += handle_mm_fault_has_mm_arg NV_CONFTEST_TYPE_COMPILE_TESTS += handle_mm_fault_has_pt_regs_arg NV_CONFTEST_TYPE_COMPILE_TESTS += mempolicy_has_unified_nodes @@ -115,6 +75,7 @@ NV_CONFTEST_TYPE_COMPILE_TESTS += mempolicy_has_home_node NV_CONFTEST_TYPE_COMPILE_TESTS += mpol_preferred_many_present NV_CONFTEST_TYPE_COMPILE_TESTS += mmu_interval_notifier NV_CONFTEST_TYPE_COMPILE_TESTS += fault_flag_remote_present +NV_CONFTEST_TYPE_COMPILE_TESTS += struct_page_has_zone_device_data NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_int_active_memcg NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_migrate_vma_setup diff --git a/kernel-open/nvidia-uvm/uvm.c b/kernel-open/nvidia-uvm/uvm.c index f0f70e39c1..49337e5b08 100644 --- a/kernel-open/nvidia-uvm/uvm.c +++ b/kernel-open/nvidia-uvm/uvm.c @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2015-2023 NVIDIA Corporation + Copyright (c) 2015-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -127,9 +127,9 @@ static NV_STATUS uvm_api_mm_initialize(UVM_MM_INITIALIZE_PARAMS *params, struct goto err; } - old_fd_type = nv_atomic_long_cmpxchg((atomic_long_t *)&filp->private_data, - UVM_FD_UNINITIALIZED, - UVM_FD_INITIALIZING); + old_fd_type = atomic_long_cmpxchg((atomic_long_t *)&filp->private_data, + UVM_FD_UNINITIALIZED, + UVM_FD_INITIALIZING); old_fd_type &= UVM_FD_TYPE_MASK; if (old_fd_type != UVM_FD_UNINITIALIZED) { status = NV_ERR_IN_USE; @@ -222,10 +222,6 @@ static int uvm_open(struct inode *inode, struct file *filp) // assigning f_mapping. mapping->a_ops = inode->i_mapping->a_ops; -#if defined(NV_ADDRESS_SPACE_HAS_BACKING_DEV_INFO) - mapping->backing_dev_info = inode->i_mapping->backing_dev_info; -#endif - filp->private_data = NULL; filp->f_mapping = mapping; @@ -325,21 +321,21 @@ static int uvm_release_entry(struct inode *inode, struct file *filp) static void uvm_destroy_vma_managed(struct vm_area_struct *vma, bool make_zombie) { - uvm_va_range_t *va_range, *va_range_next; + uvm_va_range_managed_t *managed_range, *managed_range_next; NvU64 size = 0; uvm_assert_rwsem_locked_write(&uvm_va_space_get(vma->vm_file)->lock); - uvm_for_each_va_range_in_vma_safe(va_range, va_range_next, vma) { + uvm_for_each_va_range_managed_in_vma_safe(managed_range, managed_range_next, vma) { // On exit_mmap (process teardown), current->mm is cleared so // uvm_va_range_vma_current would return NULL. - UVM_ASSERT(uvm_va_range_vma(va_range) == vma); - UVM_ASSERT(va_range->node.start >= vma->vm_start); - UVM_ASSERT(va_range->node.end < vma->vm_end); - size += uvm_va_range_size(va_range); + UVM_ASSERT(uvm_va_range_vma(managed_range) == vma); + UVM_ASSERT(managed_range->va_range.node.start >= vma->vm_start); + UVM_ASSERT(managed_range->va_range.node.end < vma->vm_end); + size += uvm_va_range_size(&managed_range->va_range); if (make_zombie) - uvm_va_range_zombify(va_range); + uvm_va_range_zombify(managed_range); else - uvm_va_range_destroy(va_range, NULL); + uvm_va_range_destroy(&managed_range->va_range, NULL); } if (vma->vm_private_data) { @@ -351,18 +347,17 @@ static void uvm_destroy_vma_managed(struct vm_area_struct *vma, bool make_zombie static void uvm_destroy_vma_semaphore_pool(struct vm_area_struct *vma) { + uvm_va_range_semaphore_pool_t *semaphore_pool_range; uvm_va_space_t *va_space; - uvm_va_range_t *va_range; va_space = uvm_va_space_get(vma->vm_file); uvm_assert_rwsem_locked(&va_space->lock); - va_range = uvm_va_range_find(va_space, vma->vm_start); - UVM_ASSERT(va_range && - va_range->node.start == vma->vm_start && - va_range->node.end + 1 == vma->vm_end && - va_range->type == UVM_VA_RANGE_TYPE_SEMAPHORE_POOL); + semaphore_pool_range = uvm_va_range_semaphore_pool_find(va_space, vma->vm_start); + UVM_ASSERT(semaphore_pool_range && + semaphore_pool_range->va_range.node.start == vma->vm_start && + semaphore_pool_range->va_range.node.end + 1 == vma->vm_end); - uvm_mem_unmap_cpu_user(va_range->semaphore_pool.mem); + uvm_mem_unmap_cpu_user(semaphore_pool_range->mem); } // If a fault handler is not set, paths like handle_pte_fault in older kernels @@ -478,7 +473,7 @@ static void uvm_vm_open_failure(struct vm_area_struct *original, static void uvm_vm_open_managed(struct vm_area_struct *vma) { uvm_va_space_t *va_space = uvm_va_space_get(vma->vm_file); - uvm_va_range_t *va_range; + uvm_va_range_managed_t *managed_range; struct vm_area_struct *original; NV_STATUS status; NvU64 new_end; @@ -534,13 +529,13 @@ static void uvm_vm_open_managed(struct vm_area_struct *vma) goto out; } - // There can be multiple va_ranges under the vma already. Check if one spans + // There can be multiple ranges under the vma already. Check if one spans // the new split boundary. If so, split it. - va_range = uvm_va_range_find(va_space, new_end); - UVM_ASSERT(va_range); - UVM_ASSERT(uvm_va_range_vma_current(va_range) == original); - if (va_range->node.end != new_end) { - status = uvm_va_range_split(va_range, new_end, NULL); + managed_range = uvm_va_range_managed_find(va_space, new_end); + UVM_ASSERT(managed_range); + UVM_ASSERT(uvm_va_range_vma_current(managed_range) == original); + if (managed_range->va_range.node.end != new_end) { + status = uvm_va_range_split(managed_range, new_end, NULL); if (status != NV_OK) { UVM_DBG_PRINT("Failed to split VA range, destroying both: %s. " "original vma [0x%lx, 0x%lx) new vma [0x%lx, 0x%lx)\n", @@ -552,10 +547,10 @@ static void uvm_vm_open_managed(struct vm_area_struct *vma) } } - // Point va_ranges to the new vma - uvm_for_each_va_range_in_vma(va_range, vma) { - UVM_ASSERT(uvm_va_range_vma_current(va_range) == original); - va_range->managed.vma_wrapper = vma->vm_private_data; + // Point managed_ranges to the new vma + uvm_for_each_va_range_managed_in_vma(managed_range, vma) { + UVM_ASSERT(uvm_va_range_vma_current(managed_range) == original); + managed_range->vma_wrapper = vma->vm_private_data; } out: @@ -657,12 +652,12 @@ static struct vm_operations_struct uvm_vm_ops_managed = }; // vm operations on semaphore pool allocations only control CPU mappings. Unmapping GPUs, -// freeing the allocation, and destroying the va_range are handled by UVM_FREE. +// freeing the allocation, and destroying the range are handled by UVM_FREE. static void uvm_vm_open_semaphore_pool(struct vm_area_struct *vma) { struct vm_area_struct *origin_vma = (struct vm_area_struct *)vma->vm_private_data; uvm_va_space_t *va_space = uvm_va_space_get(origin_vma->vm_file); - uvm_va_range_t *va_range; + uvm_va_range_semaphore_pool_t *semaphore_pool_range; bool is_fork = (vma->vm_mm != origin_vma->vm_mm); NV_STATUS status; @@ -670,14 +665,17 @@ static void uvm_vm_open_semaphore_pool(struct vm_area_struct *vma) uvm_va_space_down_write(va_space); - va_range = uvm_va_range_find(va_space, origin_vma->vm_start); - UVM_ASSERT(va_range); - UVM_ASSERT_MSG(va_range->type == UVM_VA_RANGE_TYPE_SEMAPHORE_POOL && - va_range->node.start == origin_vma->vm_start && - va_range->node.end + 1 == origin_vma->vm_end, + semaphore_pool_range = uvm_va_range_semaphore_pool_find(va_space, origin_vma->vm_start); + UVM_ASSERT(semaphore_pool_range); + UVM_ASSERT_MSG(semaphore_pool_range && + semaphore_pool_range->va_range.node.start == origin_vma->vm_start && + semaphore_pool_range->va_range.node.end + 1 == origin_vma->vm_end, "origin vma [0x%llx, 0x%llx); va_range [0x%llx, 0x%llx) type %d\n", - (NvU64)origin_vma->vm_start, (NvU64)origin_vma->vm_end, va_range->node.start, - va_range->node.end + 1, va_range->type); + (NvU64)origin_vma->vm_start, + (NvU64)origin_vma->vm_end, + semaphore_pool_range->va_range.node.start, + semaphore_pool_range->va_range.node.end + 1, + semaphore_pool_range->va_range.type); // Semaphore pool vmas do not have vma wrappers, but some functions will // assume vm_private_data is a wrapper. @@ -689,9 +687,9 @@ static void uvm_vm_open_semaphore_pool(struct vm_area_struct *vma) // uvm_disable_vma unmaps in the parent as well; clear the uvm_mem CPU // user mapping metadata and then remap. - uvm_mem_unmap_cpu_user(va_range->semaphore_pool.mem); + uvm_mem_unmap_cpu_user(semaphore_pool_range->mem); - status = uvm_mem_map_cpu_user(va_range->semaphore_pool.mem, va_range->va_space, origin_vma); + status = uvm_mem_map_cpu_user(semaphore_pool_range->mem, semaphore_pool_range->va_range.va_space, origin_vma); if (status != NV_OK) { UVM_DBG_PRINT("Failed to remap semaphore pool to CPU for parent after fork; status = %d (%s)", status, nvstatusToString(status)); @@ -702,7 +700,7 @@ static void uvm_vm_open_semaphore_pool(struct vm_area_struct *vma) origin_vma->vm_private_data = NULL; origin_vma->vm_ops = &uvm_vm_ops_disabled; vma->vm_ops = &uvm_vm_ops_disabled; - uvm_mem_unmap_cpu_user(va_range->semaphore_pool.mem); + uvm_mem_unmap_cpu_user(semaphore_pool_range->mem); } uvm_va_space_up_write(va_space); @@ -751,10 +749,81 @@ static struct vm_operations_struct uvm_vm_ops_semaphore_pool = #endif }; +static void uvm_vm_open_device_p2p(struct vm_area_struct *vma) +{ + struct vm_area_struct *origin_vma = (struct vm_area_struct *)vma->vm_private_data; + uvm_va_space_t *va_space = uvm_va_space_get(origin_vma->vm_file); + uvm_va_range_t *va_range; + bool is_fork = (vma->vm_mm != origin_vma->vm_mm); + + uvm_record_lock_mmap_lock_write(current->mm); + + uvm_va_space_down_write(va_space); + + va_range = uvm_va_range_find(va_space, origin_vma->vm_start); + UVM_ASSERT(va_range); + UVM_ASSERT_MSG(va_range->type == UVM_VA_RANGE_TYPE_DEVICE_P2P && + va_range->node.start == origin_vma->vm_start && + va_range->node.end + 1 == origin_vma->vm_end, + "origin vma [0x%llx, 0x%llx); va_range [0x%llx, 0x%llx) type %d\n", + (NvU64)origin_vma->vm_start, (NvU64)origin_vma->vm_end, va_range->node.start, + va_range->node.end + 1, va_range->type); + + // Device P2P vmas do not have vma wrappers, but some functions will + // assume vm_private_data is a wrapper. + vma->vm_private_data = NULL; + + if (is_fork) { + // If we forked, leave the parent vma alone. + uvm_disable_vma(vma); + + // uvm_disable_vma unmaps in the parent as well so remap the parent + uvm_va_range_device_p2p_map_cpu(va_range->va_space, origin_vma, uvm_va_range_to_device_p2p(va_range)); + } + else { + // mremap will free the backing pages via unmap so we can't support it. + origin_vma->vm_private_data = NULL; + origin_vma->vm_ops = &uvm_vm_ops_disabled; + vma->vm_ops = &uvm_vm_ops_disabled; + unmap_mapping_range(va_space->mapping, va_range->node.start, va_range->node.end - va_range->node.start + 1, 1); + } + + uvm_va_space_up_write(va_space); + + uvm_record_unlock_mmap_lock_write(current->mm); +} + +static void uvm_vm_open_device_p2p_entry(struct vm_area_struct *vma) +{ + UVM_ENTRY_VOID(uvm_vm_open_device_p2p(vma)); +} + +// Device P2P pages are only mapped on the CPU. Pages are allocated externally +// to UVM but destroying the range must unpin the RM object. +static void uvm_vm_close_device_p2p(struct vm_area_struct *vma) +{ +} + +static void uvm_vm_close_device_p2p_entry(struct vm_area_struct *vma) +{ + UVM_ENTRY_VOID(uvm_vm_close_device_p2p(vma)); +} + +static struct vm_operations_struct uvm_vm_ops_device_p2p = +{ + .open = uvm_vm_open_device_p2p_entry, + .close = uvm_vm_close_device_p2p_entry, + +#if defined(NV_VM_OPS_FAULT_REMOVED_VMA_ARG) + .fault = uvm_vm_fault_sigbus_wrapper_entry, +#else + .fault = uvm_vm_fault_sigbus_entry, +#endif +}; + static int uvm_mmap(struct file *filp, struct vm_area_struct *vma) { uvm_va_space_t *va_space; - uvm_va_range_t *va_range; NV_STATUS status = uvm_global_get_status(); int ret = 0; bool vma_wrapper_allocated = false; @@ -845,18 +914,28 @@ static int uvm_mmap(struct file *filp, struct vm_area_struct *vma) status = uvm_va_range_create_mmap(va_space, current->mm, vma->vm_private_data, NULL); if (status == NV_ERR_UVM_ADDRESS_IN_USE) { + uvm_va_range_semaphore_pool_t *semaphore_pool_range; + uvm_va_range_device_p2p_t *device_p2p_range; // If the mmap is for a semaphore pool, the VA range will have been // allocated by a previous ioctl, and the mmap just creates the CPU // mapping. - va_range = uvm_va_range_find(va_space, vma->vm_start); - if (va_range && va_range->node.start == vma->vm_start && - va_range->node.end + 1 == vma->vm_end && - va_range->type == UVM_VA_RANGE_TYPE_SEMAPHORE_POOL) { + semaphore_pool_range = uvm_va_range_semaphore_pool_find(va_space, vma->vm_start); + device_p2p_range = uvm_va_range_device_p2p_find(va_space, vma->vm_start); + if (semaphore_pool_range && semaphore_pool_range->va_range.node.start == vma->vm_start && + semaphore_pool_range->va_range.node.end + 1 == vma->vm_end) { uvm_vma_wrapper_destroy(vma->vm_private_data); vma_wrapper_allocated = false; vma->vm_private_data = vma; vma->vm_ops = &uvm_vm_ops_semaphore_pool; - status = uvm_mem_map_cpu_user(va_range->semaphore_pool.mem, va_range->va_space, vma); + status = uvm_mem_map_cpu_user(semaphore_pool_range->mem, semaphore_pool_range->va_range.va_space, vma); + } + else if (device_p2p_range && device_p2p_range->va_range.node.start == vma->vm_start && + device_p2p_range->va_range.node.end + 1 == vma->vm_end) { + uvm_vma_wrapper_destroy(vma->vm_private_data); + vma_wrapper_allocated = false; + vma->vm_private_data = vma; + vma->vm_ops = &uvm_vm_ops_device_p2p; + status = uvm_va_range_device_p2p_map_cpu(va_space, vma, device_p2p_range); } } @@ -914,8 +993,9 @@ static NV_STATUS uvm_api_initialize(UVM_INITIALIZE_PARAMS *params, struct file * // attempt to be made. This is safe because other threads will have only had // a chance to observe UVM_FD_INITIALIZING and not UVM_FD_VA_SPACE in this // case. - old_fd_type = nv_atomic_long_cmpxchg((atomic_long_t *)&filp->private_data, - UVM_FD_UNINITIALIZED, UVM_FD_INITIALIZING); + old_fd_type = atomic_long_cmpxchg((atomic_long_t *)&filp->private_data, + UVM_FD_UNINITIALIZED, + UVM_FD_INITIALIZING); old_fd_type &= UVM_FD_TYPE_MASK; if (old_fd_type == UVM_FD_UNINITIALIZED) { status = uvm_va_space_create(filp->f_mapping, &va_space, params->flags); @@ -1001,6 +1081,9 @@ static long uvm_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) UVM_ROUTE_CMD_STACK_INIT_CHECK(UVM_CLEAN_UP_ZOMBIE_RESOURCES, uvm_api_clean_up_zombie_resources); UVM_ROUTE_CMD_STACK_INIT_CHECK(UVM_POPULATE_PAGEABLE, uvm_api_populate_pageable); UVM_ROUTE_CMD_STACK_INIT_CHECK(UVM_VALIDATE_VA_RANGE, uvm_api_validate_va_range); + UVM_ROUTE_CMD_STACK_INIT_CHECK(UVM_TOOLS_GET_PROCESSOR_UUID_TABLE_V2,uvm_api_tools_get_processor_uuid_table_v2); + UVM_ROUTE_CMD_STACK_INIT_CHECK(UVM_ALLOC_DEVICE_P2P, uvm_api_alloc_device_p2p); + UVM_ROUTE_CMD_STACK_INIT_CHECK(UVM_CLEAR_ALL_ACCESS_COUNTERS, uvm_api_clear_all_access_counters); } // Try the test ioctls if none of the above matched diff --git a/kernel-open/nvidia-uvm/uvm.h b/kernel-open/nvidia-uvm/uvm.h index 105f3f7645..a878a83644 100644 --- a/kernel-open/nvidia-uvm/uvm.h +++ b/kernel-open/nvidia-uvm/uvm.h @@ -45,20 +45,20 @@ // #endif // 3) Do the same thing for the function definition, and for any structs that // are taken as arguments to these functions. -// 4) Let this change propagate over to cuda_a and dev_a, so that the CUDA and -// nvidia-cfg libraries can start using the new API by bumping up the API +// 4) Let this change propagate over to cuda_a and bugfix_main, so that the CUDA +// and nvidia-cfg libraries can start using the new API by bumping up the API // version number it's using. // Places where UVM_API_REVISION is defined are: // drivers/gpgpu/cuda/cuda.nvmk (cuda_a) -// drivers/setup/linux/nvidia-cfg/makefile.nvmk (dev_a) -// 5) Once the dev_a and cuda_a changes have made it back into chips_a, +// drivers/setup/linux/nvidia-cfg/makefile.nvmk (bugfix_main) +// 5) Once the bugfix_main and cuda_a changes have made it back into chips_a, // remove the old API declaration, definition, and any old structs that were // in use. #ifndef _UVM_H_ #define _UVM_H_ -#define UVM_API_LATEST_REVISION 12 +#define UVM_API_LATEST_REVISION 13 #if !defined(UVM_API_REVISION) #error "please define UVM_API_REVISION macro to a desired version number or UVM_API_LATEST_REVISION macro" @@ -384,36 +384,8 @@ NV_STATUS UvmIsPageableMemoryAccessSupportedOnGpu(const NvProcessorUuid *gpuUuid // because it is not very informative. // //------------------------------------------------------------------------------ -#if UVM_API_REV_IS_AT_MOST(8) -NV_STATUS UvmRegisterGpu(const NvProcessorUuid *gpuUuid); -#else NV_STATUS UvmRegisterGpu(const NvProcessorUuid *gpuUuid, const UvmGpuPlatformParams *platformParams); -#endif - -#if UVM_API_REV_IS_AT_MOST(8) -//------------------------------------------------------------------------------ -// UvmRegisterGpuSmc -// -// The same as UvmRegisterGpu, but takes additional parameters to specify the -// GPU partition being registered if SMC is enabled. -// -// Arguments: -// gpuUuid: (INPUT) -// UUID of the physical GPU of the SMC partition to register. -// -// platformParams: (INPUT) -// User handles identifying the partition to register. -// -// Error codes (see UvmRegisterGpu also): -// -// NV_ERR_INVALID_STATE: -// SMC was not enabled, or the partition identified by the user -// handles or its configuration changed. -// -NV_STATUS UvmRegisterGpuSmc(const NvProcessorUuid *gpuUuid, - const UvmGpuPlatformParams *platformParams); -#endif //------------------------------------------------------------------------------ // UvmUnregisterGpu @@ -1364,6 +1336,86 @@ NV_STATUS UvmAllocSemaphorePool(void *base, const UvmGpuMappingAttributes *perGpuAttribs, NvLength gpuAttribsCount); +//------------------------------------------------------------------------------ +// UvmAllocDeviceP2P +// +// Create a VA range within the process's address space reserved for use by +// other devices to directly access GPU memory. The memory associated with the +// RM handle is mapped into the user address space associated with the range for +// direct access from the CPU. +// +// The VA range must not overlap with an existing VA range, irrespective of +// whether the existing range corresponds to a UVM allocation or an external +// allocation. +// +// Multiple VA ranges may be created mapping the same physical memory associated +// with the RM handle. The associated GPU memory will not be freed until all VA +// ranges have been destroyed either explicitly or implicitly and all non-UVM +// users (eg. third party device drivers) have stopped using the associated +// GPU memory. +// +// The VA range can be unmapped and freed by calling UvmFree. +// +// Destroying the final range mapping the RM handle may block until all third +// party device drivers and other kernel users have stopped using the memory. +// +// These VA ranges are only associated with a single GPU. +// +// Arguments: +// gpuUuid: (INPUT) +// UUID of the physical GPU if the GPU is not SMC capable or SMC +// enabled, or the GPU instance UUID of the partition containing the +// memory to be mapped on the CPU. +// +// base: (INPUT) +// Base address of the virtual address range. +// +// length: (INPUT) +// Length, in bytes, of the range. +// +// offset: (INPUT) +// Offset, in bytes, from the start of the externally allocated memory +// to map from. +// +// platformParams: (INPUT) +// Platform specific parameters that identify the allocation. +// On Linux: RM ctrl fd, hClient and the handle (hMemory) of the +// externally allocated memory to map. +// +// Errors: +// +// NV_ERR_INVALID_ADDRESS: +// base is NULL or length is zero or at least one of base and length is +// not aligned to 4K. +// +// NV_ERR_INVALID_DEVICE: +// The gpuUuid was either not registered or has no GPU VA space +// registered for it. +// +// NV_ERR_INVALID_ARGUMENT: +// base + offset + length exceeeds the end of the externally allocated +// memory handle or the externally allocated handle is not valid. +// +// NV_ERR_UVM_ADDRESS_IN_USE: +// The requested virtual address range overlaps with an existing +// allocation. +// +// NV_ERR_NO_MEMORY: +// Internal memory allocation failed. +// +// NV_ERR_NOT_SUPPORTED: +// The device peer-to-peer feature is not supported by the current +// system configuration. This may be because the GPU doesn't support +// the peer-to-peer feature or the kernel was not built with the correct +// configuration options. +// +//------------------------------------------------------------------------------ +NV_STATUS UvmAllocDeviceP2P(NvProcessorUuid gpuUuid, + void *base, + NvLength length, + NvLength offset, + const UvmDeviceP2PPlatformParams *platformParams); + //------------------------------------------------------------------------------ // UvmMigrate // @@ -3276,7 +3328,7 @@ NV_STATUS UvmEventGetGpuUuidTable(NvProcessorUuid *gpuUuidTable, //------------------------------------------------------------------------------ NV_STATUS UvmEventFetch(UvmDebugSession sessionHandle, UvmEventQueueHandle queueHandle, - UvmEventEntry_V1 *pBuffer, + UvmEventEntry *pBuffer, NvU64 *nEntries); //------------------------------------------------------------------------------ @@ -3472,32 +3524,21 @@ NV_STATUS UvmToolsDestroySession(UvmToolsSessionHandle session); // 4. Destroy event Queue using UvmToolsDestroyEventQueue // -#if UVM_API_REV_IS_AT_MOST(10) -// This is deprecated and replaced by sizeof(UvmToolsEventControlData). -NvLength UvmToolsGetEventControlSize(void); - -// This is deprecated and replaced by sizeof(UvmEventEntry_V1) or -// sizeof(UvmEventEntry_V2). -NvLength UvmToolsGetEventEntrySize(void); -#endif - NvLength UvmToolsGetNumberOfCounters(void); //------------------------------------------------------------------------------ // UvmToolsCreateEventQueue // -// This call creates an event queue that can hold the given number of events. -// All events are disabled by default. Event queue data persists lifetime of the -// target process. +// This function is deprecated. See UvmToolsCreateEventQueue_V2. +// +// This call creates an event queue that can hold the given number of +// UvmEventEntry events. All events are disabled by default. Event queue data +// persists lifetime of the target process. // // Arguments: // session: (INPUT) // Handle to the tools session. // -// version: (INPUT) -// Requested version for events or counters. -// See UvmToolsEventQueueVersion. -// // event_buffer: (INPUT) // User allocated buffer. Must be page-aligned. Must be large enough to // hold at least event_buffer_size events. Gets pinned until queue is @@ -3520,8 +3561,55 @@ NvLength UvmToolsGetNumberOfCounters(void); // Session handle does not refer to a valid session // // NV_ERR_INVALID_ARGUMENT: -// The version is not UvmToolsEventQueueVersion_V1 or -// UvmToolsEventQueueVersion_V2. +// One of the parameters: event_buffer, event_buffer_size, event_control +// is not valid +// +// NV_ERR_INSUFFICIENT_RESOURCES: +// There could be multiple reasons for this error. One would be that +// it's not possible to allocate a queue of requested size. Another +// would be either event_buffer or event_control memory couldn't be +// pinned (e.g. because of OS limitation of pinnable memory). Also it +// could not have been possible to create UvmToolsEventQueueDescriptor. +// +NV_STATUS UvmToolsCreateEventQueue(UvmToolsSessionHandle session, + void *event_buffer, + NvLength event_buffer_size, + void *event_control, + UvmToolsEventQueueHandle *queue); + +//------------------------------------------------------------------------------ +// UvmToolsCreateEventQueue_V2 +// +// This call creates an event queue that can hold the given number of +// UvmEventEntry_V2 events. All events are disabled by default. Event queue data +// persists beyond the lifetime of the target process. +// +// Arguments: +// session: (INPUT) +// Handle to the tools session. +// +// event_buffer: (INPUT) +// User allocated buffer. Must be page-aligned. Must be large enough to +// hold at least event_buffer_size events. Gets pinned until queue is +// destroyed. +// +// event_buffer_size: (INPUT) +// Size of the event queue buffer in units of UvmEventEntry_V2's. Must +// be a power of two, and greater than 1. +// +// event_control (INPUT) +// User allocated buffer. Must be page-aligned. Must be large enough to +// hold UvmToolsEventControlData (although single page-size allocation +// should be more than enough). Gets pinned until queue is destroyed. +// +// queue: (OUTPUT) +// Handle to the created queue. +// +// Error codes: +// NV_ERR_INSUFFICIENT_PERMISSIONS: +// Session handle does not refer to a valid session +// +// NV_ERR_INVALID_ARGUMENT: // One of the parameters: event_buffer, event_buffer_size, event_control // is not valid // @@ -3538,20 +3626,11 @@ NvLength UvmToolsGetNumberOfCounters(void); // could not have been possible to create UvmToolsEventQueueDescriptor. // //------------------------------------------------------------------------------ -#if UVM_API_REV_IS_AT_MOST(10) -NV_STATUS UvmToolsCreateEventQueue(UvmToolsSessionHandle session, - void *event_buffer, - NvLength event_buffer_size, - void *event_control, - UvmToolsEventQueueHandle *queue); -#else -NV_STATUS UvmToolsCreateEventQueue(UvmToolsSessionHandle session, - UvmToolsEventQueueVersion version, - void *event_buffer, - NvLength event_buffer_size, - void *event_control, - UvmToolsEventQueueHandle *queue); -#endif +NV_STATUS UvmToolsCreateEventQueue_V2(UvmToolsSessionHandle session, + void *event_buffer, + NvLength event_buffer_size, + void *event_control, + UvmToolsEventQueueHandle *queue); UvmToolsEventQueueDescriptor UvmToolsGetEventQueueDescriptor(UvmToolsEventQueueHandle queue); @@ -3967,6 +4046,8 @@ NV_STATUS UvmToolsWriteProcessMemory(UvmToolsSessionHandle session, //------------------------------------------------------------------------------ // UvmToolsGetProcessorUuidTable // +// This function is deprecated. See UvmToolsGetProcessorUuidTable_V2. +// // Populate a table with the UUIDs of all the currently registered processors // in the target process. When a GPU is registered, it is added to the table. // When a GPU is unregistered, it is removed. As long as a GPU remains @@ -3979,55 +4060,63 @@ NV_STATUS UvmToolsWriteProcessMemory(UvmToolsSessionHandle session, // session: (INPUT) // Handle to the tools session. // -// version: (INPUT) -// Requested version for the UUID table returned. The version must -// match the requested version of the event queue created with -// UvmToolsCreateEventQueue(). See UvmToolsEventQueueVersion. -// If the version of the event queue does not match the version of the -// UUID table, the behavior is undefined. -// // table: (OUTPUT) // Array of processor UUIDs, including the CPU's UUID which is always // at index zero. The number of elements in the array must be greater -// or equal to UVM_MAX_PROCESSORS_V1 if the version is -// UvmToolsEventQueueVersion_V1 and UVM_MAX_PROCESSORS if the version is -// UvmToolsEventQueueVersion_V2. +// or equal to UVM_MAX_PROCESSORS_V1. // The srcIndex and dstIndex fields of the UvmEventMigrationInfo struct // index this array. Unused indices will have a UUID of zero. -// If version is UvmToolsEventQueueVersion_V1 then the reported UUID -// will be that of the corresponding physical GPU, even if multiple SMC -// partitions are registered under that physical GPU. If version is -// UvmToolsEventQueueVersion_V2 then the reported UUID will be the GPU -// instance UUID if SMC is enabled, otherwise it will be the UUID of -// the physical GPU. +// The reported UUID will be that of the corresponding physical GPU, +// even if multiple SMC partitions are registered under that physical +// GPU. // // Error codes: // NV_ERR_INVALID_ADDRESS: // writing to table failed. // -// NV_ERR_INVALID_ARGUMENT: -// The version is not UvmToolsEventQueueVersion_V1 or -// UvmToolsEventQueueVersion_V2. +// NV_ERR_NO_MEMORY: +// Internal memory allocation failed. +//------------------------------------------------------------------------------ +NV_STATUS UvmToolsGetProcessorUuidTable(UvmToolsSessionHandle session, + NvProcessorUuid *table); + +//------------------------------------------------------------------------------ +// UvmToolsGetProcessorUuidTable_V2 +// +// Populate a table with the UUIDs of all the currently registered processors +// in the target process. When a GPU is registered, it is added to the table. +// When a GPU is unregistered, it is removed. As long as a GPU remains +// registered, its index in the table does not change. +// Note that the index in the table corresponds to the processor ID reported +// in UvmEventEntry event records and that the table is not contiguously packed +// with non-zero UUIDs even with no GPU unregistrations. +// +// Arguments: +// session: (INPUT) +// Handle to the tools session. +// +// table: (OUTPUT) +// Array of processor UUIDs, including the CPU's UUID which is always +// at index zero. The number of elements in the array must be greater +// or equal to UVM_MAX_PROCESSORS. +// The srcIndex and dstIndex fields of the UvmEventMigrationInfo struct +// index this array. Unused indices will have a UUID of zero. +// The reported UUID will be the GPU instance UUID if SMC is enabled, +// otherwise it will be the UUID of the physical GPU. +// +// Error codes: +// NV_ERR_INVALID_ADDRESS: +// writing to table failed. // // NV_ERR_NOT_SUPPORTED: -// The kernel is not able to support the requested version -// (i.e., the UVM kernel driver is older and doesn't support -// UvmToolsEventQueueVersion_V2). +// The UVM kernel driver is older and doesn't support +// UvmToolsGetProcessorUuidTable_V2. // // NV_ERR_NO_MEMORY: // Internal memory allocation failed. //------------------------------------------------------------------------------ -#if UVM_API_REV_IS_AT_MOST(11) -NV_STATUS UvmToolsGetProcessorUuidTable(UvmToolsSessionHandle session, - UvmToolsEventQueueVersion version, - NvProcessorUuid *table, - NvLength table_size, - NvLength *count); -#else -NV_STATUS UvmToolsGetProcessorUuidTable(UvmToolsSessionHandle session, - UvmToolsEventQueueVersion version, - NvProcessorUuid *table); -#endif +NV_STATUS UvmToolsGetProcessorUuidTable_V2(UvmToolsSessionHandle session, + NvProcessorUuid *table); //------------------------------------------------------------------------------ // UvmToolsFlushEvents diff --git a/kernel-open/nvidia-uvm/uvm_api.h b/kernel-open/nvidia-uvm/uvm_api.h index a63d163bb7..6b67ae8f67 100644 --- a/kernel-open/nvidia-uvm/uvm_api.h +++ b/kernel-open/nvidia-uvm/uvm_api.h @@ -47,7 +47,7 @@ { \ params_type params; \ BUILD_BUG_ON(sizeof(params) > UVM_MAX_IOCTL_PARAM_STACK_SIZE); \ - if (nv_copy_from_user(¶ms, (void __user*)arg, sizeof(params))) \ + if (copy_from_user(¶ms, (void __user*)arg, sizeof(params))) \ return -EFAULT; \ \ params.rmStatus = uvm_global_get_status(); \ @@ -60,7 +60,7 @@ params.rmStatus = function_name(¶ms, filp); \ } \ \ - if (nv_copy_to_user((void __user*)arg, ¶ms, sizeof(params))) \ + if (copy_to_user((void __user*)arg, ¶ms, sizeof(params))) \ return -EFAULT; \ \ return 0; \ @@ -84,7 +84,7 @@ if (!params) \ return -ENOMEM; \ BUILD_BUG_ON(sizeof(*params) <= UVM_MAX_IOCTL_PARAM_STACK_SIZE); \ - if (nv_copy_from_user(params, (void __user*)arg, sizeof(*params))) { \ + if (copy_from_user(params, (void __user*)arg, sizeof(*params))) { \ uvm_kvfree(params); \ return -EFAULT; \ } \ @@ -99,7 +99,7 @@ params->rmStatus = function_name(params, filp); \ } \ \ - if (nv_copy_to_user((void __user*)arg, params, sizeof(*params))) \ + if (copy_to_user((void __user*)arg, params, sizeof(*params))) \ ret = -EFAULT; \ \ uvm_kvfree(params); \ @@ -244,6 +244,7 @@ NV_STATUS uvm_api_migrate(UVM_MIGRATE_PARAMS *params, struct file *filp); NV_STATUS uvm_api_enable_system_wide_atomics(UVM_ENABLE_SYSTEM_WIDE_ATOMICS_PARAMS *params, struct file *filp); NV_STATUS uvm_api_disable_system_wide_atomics(UVM_DISABLE_SYSTEM_WIDE_ATOMICS_PARAMS *params, struct file *filp); NV_STATUS uvm_api_tools_init_event_tracker(UVM_TOOLS_INIT_EVENT_TRACKER_PARAMS *params, struct file *filp); +NV_STATUS uvm_api_tools_init_event_tracker_v2(UVM_TOOLS_INIT_EVENT_TRACKER_V2_PARAMS *params, struct file *filp); NV_STATUS uvm_api_tools_set_notification_threshold(UVM_TOOLS_SET_NOTIFICATION_THRESHOLD_PARAMS *params, struct file *filp); NV_STATUS uvm_api_tools_event_queue_enable_events(UVM_TOOLS_EVENT_QUEUE_ENABLE_EVENTS_PARAMS *params, struct file *filp); NV_STATUS uvm_api_tools_event_queue_disable_events(UVM_TOOLS_EVENT_QUEUE_DISABLE_EVENTS_PARAMS *params, struct file *filp); @@ -256,5 +257,7 @@ NV_STATUS uvm_api_unmap_external(UVM_UNMAP_EXTERNAL_PARAMS *params, struct file NV_STATUS uvm_api_migrate_range_group(UVM_MIGRATE_RANGE_GROUP_PARAMS *params, struct file *filp); NV_STATUS uvm_api_alloc_semaphore_pool(UVM_ALLOC_SEMAPHORE_POOL_PARAMS *params, struct file *filp); NV_STATUS uvm_api_populate_pageable(const UVM_POPULATE_PAGEABLE_PARAMS *params, struct file *filp); +NV_STATUS uvm_api_alloc_device_p2p(UVM_ALLOC_DEVICE_P2P_PARAMS *params, struct file *filp); +NV_STATUS uvm_api_clear_all_access_counters(UVM_CLEAR_ALL_ACCESS_COUNTERS_PARAMS *params, struct file *filp); #endif // __UVM_API_H__ diff --git a/kernel-open/nvidia-uvm/uvm_ats_faults.c b/kernel-open/nvidia-uvm/uvm_ats_faults.c index 9847d57e76..ef4902e828 100644 --- a/kernel-open/nvidia-uvm/uvm_ats_faults.c +++ b/kernel-open/nvidia-uvm/uvm_ats_faults.c @@ -90,18 +90,19 @@ static NV_STATUS service_ats_requests(uvm_gpu_va_space_t *gpu_va_space, uvm_migrate_args_t uvm_migrate_args = { - .va_space = va_space, - .mm = mm, - .dst_id = ats_context->residency_id, - .dst_node_id = ats_context->residency_node, - .start = start, - .length = length, - .populate_permissions = populate_permissions, - .touch = fault_service_type, - .skip_mapped = fault_service_type, - .populate_on_cpu_alloc_failures = fault_service_type, - .user_space_start = &user_space_start, - .user_space_length = &user_space_length, + .va_space = va_space, + .mm = mm, + .dst_id = ats_context->residency_id, + .dst_node_id = ats_context->residency_node, + .start = start, + .length = length, + .populate_permissions = populate_permissions, + .touch = fault_service_type, + .skip_mapped = fault_service_type, + .populate_on_cpu_alloc_failures = fault_service_type, + .populate_on_migrate_vma_failures = fault_service_type, + .user_space_start = &user_space_start, + .user_space_length = &user_space_length, }; UVM_ASSERT(uvm_ats_can_service_faults(gpu_va_space, mm)); @@ -112,7 +113,7 @@ static NV_STATUS service_ats_requests(uvm_gpu_va_space_t *gpu_va_space, // set skip_mapped to true. For pages already mapped, this will only handle // PTE upgrades if needed. status = uvm_migrate_pageable(&uvm_migrate_args); - if (status == NV_WARN_NOTHING_TO_DO) + if (fault_service_type && (status == NV_WARN_NOTHING_TO_DO)) status = NV_OK; UVM_ASSERT(status != NV_ERR_MORE_PROCESSING_REQUIRED); @@ -379,14 +380,20 @@ static NV_STATUS ats_compute_residency_mask(uvm_gpu_va_space_t *gpu_va_space, static void ats_compute_prefetch_mask(uvm_gpu_va_space_t *gpu_va_space, struct vm_area_struct *vma, + uvm_ats_service_type_t service_type, uvm_ats_fault_context_t *ats_context, uvm_va_block_region_t max_prefetch_region) { - uvm_page_mask_t *accessed_mask = &ats_context->accessed_mask; + uvm_page_mask_t *accessed_mask; uvm_page_mask_t *residency_mask = &ats_context->prefetch_state.residency_mask; uvm_page_mask_t *prefetch_mask = &ats_context->prefetch_state.prefetch_pages_mask; uvm_perf_prefetch_bitmap_tree_t *bitmap_tree = &ats_context->prefetch_state.bitmap_tree; + if (service_type == UVM_ATS_SERVICE_TYPE_FAULTS) + accessed_mask = &ats_context->faults.accessed_mask; + else + accessed_mask = &ats_context->access_counters.accessed_mask; + if (uvm_page_mask_empty(accessed_mask)) return; @@ -406,7 +413,7 @@ static NV_STATUS ats_compute_prefetch(uvm_gpu_va_space_t *gpu_va_space, uvm_ats_fault_context_t *ats_context) { NV_STATUS status; - uvm_page_mask_t *accessed_mask = &ats_context->accessed_mask; + uvm_page_mask_t *accessed_mask; uvm_page_mask_t *prefetch_mask = &ats_context->prefetch_state.prefetch_pages_mask; uvm_va_block_region_t max_prefetch_region = uvm_ats_region_from_vma(vma, base); @@ -420,6 +427,11 @@ static NV_STATUS ats_compute_prefetch(uvm_gpu_va_space_t *gpu_va_space, if (!uvm_perf_prefetch_enabled(gpu_va_space->va_space)) return status; + if (service_type == UVM_ATS_SERVICE_TYPE_FAULTS) + accessed_mask = &ats_context->faults.accessed_mask; + else + accessed_mask = &ats_context->access_counters.accessed_mask; + if (uvm_page_mask_empty(accessed_mask)) return status; @@ -432,12 +444,12 @@ static NV_STATUS ats_compute_prefetch(uvm_gpu_va_space_t *gpu_va_space, uvm_page_mask_init_from_region(prefetch_mask, max_prefetch_region, NULL); } else { - ats_compute_prefetch_mask(gpu_va_space, vma, ats_context, max_prefetch_region); + ats_compute_prefetch_mask(gpu_va_space, vma, service_type, ats_context, max_prefetch_region); } if (service_type == UVM_ATS_SERVICE_TYPE_FAULTS) { - uvm_page_mask_t *read_fault_mask = &ats_context->read_fault_mask; - uvm_page_mask_t *write_fault_mask = &ats_context->write_fault_mask; + uvm_page_mask_t *read_fault_mask = &ats_context->faults.read_fault_mask; + uvm_page_mask_t *write_fault_mask = &ats_context->faults.write_fault_mask; uvm_page_mask_or(read_fault_mask, read_fault_mask, prefetch_mask); @@ -459,10 +471,10 @@ NV_STATUS uvm_ats_service_faults(uvm_gpu_va_space_t *gpu_va_space, NV_STATUS status = NV_OK; uvm_va_block_region_t subregion; uvm_va_block_region_t region = uvm_va_block_region(0, PAGES_PER_UVM_VA_BLOCK); - uvm_page_mask_t *read_fault_mask = &ats_context->read_fault_mask; - uvm_page_mask_t *write_fault_mask = &ats_context->write_fault_mask; - uvm_page_mask_t *faults_serviced_mask = &ats_context->faults_serviced_mask; - uvm_page_mask_t *reads_serviced_mask = &ats_context->reads_serviced_mask; + uvm_page_mask_t *read_fault_mask = &ats_context->faults.read_fault_mask; + uvm_page_mask_t *write_fault_mask = &ats_context->faults.write_fault_mask; + uvm_page_mask_t *faults_serviced_mask = &ats_context->faults.faults_serviced_mask; + uvm_page_mask_t *reads_serviced_mask = &ats_context->faults.reads_serviced_mask; uvm_fault_client_type_t client_type = ats_context->client_type; uvm_ats_service_type_t service_type = UVM_ATS_SERVICE_TYPE_FAULTS; @@ -637,6 +649,8 @@ NV_STATUS uvm_ats_service_access_counters(uvm_gpu_va_space_t *gpu_va_space, UVM_ASSERT(gpu_va_space->ats.enabled); UVM_ASSERT(uvm_gpu_va_space_state(gpu_va_space) == UVM_GPU_VA_SPACE_STATE_ACTIVE); + uvm_page_mask_zero(&ats_context->access_counters.migrated_mask); + uvm_assert_mmap_lock_locked(vma->vm_mm); uvm_assert_rwsem_locked(&gpu_va_space->va_space->lock); @@ -650,21 +664,24 @@ NV_STATUS uvm_ats_service_access_counters(uvm_gpu_va_space_t *gpu_va_space, // Remove pages which are already resident at the intended destination from // the accessed_mask. - uvm_page_mask_andnot(&ats_context->accessed_mask, - &ats_context->accessed_mask, + uvm_page_mask_andnot(&ats_context->access_counters.accessed_mask, + &ats_context->access_counters.accessed_mask, &ats_context->prefetch_state.residency_mask); - for_each_va_block_subregion_in_mask(subregion, &ats_context->accessed_mask, region) { + for_each_va_block_subregion_in_mask(subregion, &ats_context->access_counters.accessed_mask, region) { NV_STATUS status; NvU64 start = base + (subregion.first * PAGE_SIZE); size_t length = uvm_va_block_region_num_pages(subregion) * PAGE_SIZE; uvm_fault_access_type_t access_type = UVM_FAULT_ACCESS_TYPE_COUNT; + uvm_page_mask_t *migrated_mask = &ats_context->access_counters.migrated_mask; UVM_ASSERT(start >= vma->vm_start); UVM_ASSERT((start + length) <= vma->vm_end); status = service_ats_requests(gpu_va_space, vma, start, length, access_type, service_type, ats_context); - if (status != NV_OK) + if (status == NV_OK) + uvm_page_mask_region_fill(migrated_mask, subregion); + else if (status != NV_WARN_NOTHING_TO_DO) return status; } diff --git a/kernel-open/nvidia-uvm/uvm_ats_faults.h b/kernel-open/nvidia-uvm/uvm_ats_faults.h index 71f109a8f1..8268680bc2 100644 --- a/kernel-open/nvidia-uvm/uvm_ats_faults.h +++ b/kernel-open/nvidia-uvm/uvm_ats_faults.h @@ -29,18 +29,18 @@ // Service ATS faults in the range (base, base + UVM_VA_BLOCK_SIZE) with service // type for individual pages in the range requested by page masks set in -// ats_context->read_fault_mask/write_fault_mask. base must be aligned to +// ats_context->fault.read_fault_mask/write_fault_mask. base must be aligned to // UVM_VA_BLOCK_SIZE. The caller is responsible for ensuring that faulting // addresses fall completely within the VMA. The caller is also responsible for // ensuring that the faulting addresses don't overlap a GMMU region. (See // uvm_ats_check_in_gmmu_region). The caller is also responsible for handling // any errors returned by this function (fault cancellations etc.). // -// Returns the fault service status in ats_context->faults_serviced_mask. In -// addition, ats_context->reads_serviced_mask returns whether read servicing -// worked on write faults iff the read service was also requested in the -// corresponding bit in read_fault_mask. These returned masks are only valid if -// the return status is NV_OK. Status other than NV_OK indicate system global +// Returns the fault service status in ats_context->fault.faults_serviced_mask. +// In addition, ats_context->fault.reads_serviced_mask returns whether read +// servicing worked on write faults iff the read service was also requested in +// the corresponding bit in read_fault_mask. These returned masks are only valid +// if the return status is NV_OK. Status other than NV_OK indicate system global // fault servicing failures. // // LOCKING: The caller must retain and hold the mmap_lock and hold the va_space @@ -52,9 +52,9 @@ NV_STATUS uvm_ats_service_faults(uvm_gpu_va_space_t *gpu_va_space, // Service access counter notifications on ATS regions in the range (base, base // + UVM_VA_BLOCK_SIZE) for individual pages in the range requested by page_mask -// set in ats_context->accessed_mask. base must be aligned to UVM_VA_BLOCK_SIZE. -// The caller is responsible for ensuring that the addresses in the -// accessed_mask is completely covered by the VMA. The caller is also +// set in ats_context->access_counters.accessed_mask. base must be aligned to +// UVM_VA_BLOCK_SIZE. The caller is responsible for ensuring that the addresses +// in the accessed_mask is completely covered by the VMA. The caller is also // responsible for handling any errors returned by this function. // // Returns NV_OK if servicing was successful. Any other error indicates an error diff --git a/kernel-open/nvidia-uvm/uvm_ats_sva.c b/kernel-open/nvidia-uvm/uvm_ats_sva.c index d4b9e2c4e9..a1256f265e 100644 --- a/kernel-open/nvidia-uvm/uvm_ats_sva.c +++ b/kernel-open/nvidia-uvm/uvm_ats_sva.c @@ -127,12 +127,12 @@ static NvU32 smmu_vintf_read32(void __iomem *smmu_cmdqv_base, int reg) // We always use VCMDQ127 for the WAR #define VCMDQ 127 -void smmu_vcmdq_write32(void __iomem *smmu_cmdqv_base, int reg, NvU32 val) +static void smmu_vcmdq_write32(void __iomem *smmu_cmdqv_base, int reg, NvU32 val) { iowrite32(val, SMMU_VCMDQ_BASE_ADDR(smmu_cmdqv_base, VCMDQ) + reg); } -NvU32 smmu_vcmdq_read32(void __iomem *smmu_cmdqv_base, int reg) +static NvU32 smmu_vcmdq_read32(void __iomem *smmu_cmdqv_base, int reg) { return ioread32(SMMU_VCMDQ_BASE_ADDR(smmu_cmdqv_base, VCMDQ) + reg); } diff --git a/kernel-open/nvidia-uvm/uvm_ce_test.c b/kernel-open/nvidia-uvm/uvm_ce_test.c index 735edc0626..f3b1d2a12c 100644 --- a/kernel-open/nvidia-uvm/uvm_ce_test.c +++ b/kernel-open/nvidia-uvm/uvm_ce_test.c @@ -855,6 +855,7 @@ static NV_STATUS cpu_decrypt_in_order(uvm_channel_t *channel, uvm_mem_t *dst_mem, uvm_mem_t *src_mem, const UvmCslIv *decrypt_iv, + NvU32 key_version, uvm_mem_t *auth_tag_mem, size_t size, NvU32 copy_size) @@ -869,6 +870,7 @@ static NV_STATUS cpu_decrypt_in_order(uvm_channel_t *channel, dst_plain + i * copy_size, src_cipher + i * copy_size, decrypt_iv + i, + key_version, copy_size, auth_tag_buffer + i * UVM_CONF_COMPUTING_AUTH_TAG_SIZE)); } @@ -879,6 +881,7 @@ static NV_STATUS cpu_decrypt_out_of_order(uvm_channel_t *channel, uvm_mem_t *dst_mem, uvm_mem_t *src_mem, const UvmCslIv *decrypt_iv, + NvU32 key_version, uvm_mem_t *auth_tag_mem, size_t size, NvU32 copy_size) @@ -896,6 +899,7 @@ static NV_STATUS cpu_decrypt_out_of_order(uvm_channel_t *channel, dst_plain + i * copy_size, src_cipher + i * copy_size, decrypt_iv + i, + key_version, copy_size, auth_tag_buffer + i * UVM_CONF_COMPUTING_AUTH_TAG_SIZE)); } @@ -959,7 +963,7 @@ static void gpu_encrypt(uvm_push_t *push, i * UVM_CONF_COMPUTING_AUTH_TAG_SIZE, dst_cipher); - uvm_conf_computing_log_gpu_encryption(push->channel, decrypt_iv); + uvm_conf_computing_log_gpu_encryption(push->channel, copy_size, decrypt_iv); if (i > 0) uvm_push_set_flag(push, UVM_PUSH_FLAG_CE_NEXT_PIPELINED); @@ -1020,6 +1024,7 @@ static NV_STATUS test_cpu_to_gpu_roundtrip(uvm_gpu_t *gpu, size_t auth_tag_buffer_size = (size / copy_size) * UVM_CONF_COMPUTING_AUTH_TAG_SIZE; UvmCslIv *decrypt_iv = NULL; UvmCslIv *encrypt_iv = NULL; + NvU32 key_version; uvm_tracker_t tracker; size_t src_plain_size; @@ -1089,6 +1094,11 @@ static NV_STATUS test_cpu_to_gpu_roundtrip(uvm_gpu_t *gpu, gpu_encrypt(&push, dst_cipher, dst_plain_gpu, auth_tag_mem, decrypt_iv, size, copy_size); + // There shouldn't be any key rotation between the end of the push and the + // CPU decryption(s), but it is more robust against test changes to force + // decryption to use the saved key. + key_version = uvm_channel_pool_key_version(push.channel->pool); + TEST_NV_CHECK_GOTO(uvm_push_end_and_wait(&push), out); TEST_CHECK_GOTO(!mem_match(src_plain, src_cipher, size), out); @@ -1101,6 +1111,7 @@ static NV_STATUS test_cpu_to_gpu_roundtrip(uvm_gpu_t *gpu, dst_plain, dst_cipher, decrypt_iv, + key_version, auth_tag_mem, size, copy_size), @@ -1111,6 +1122,7 @@ static NV_STATUS test_cpu_to_gpu_roundtrip(uvm_gpu_t *gpu, dst_plain, dst_cipher, decrypt_iv, + key_version, auth_tag_mem, size, copy_size), diff --git a/kernel-open/nvidia-uvm/uvm_channel.c b/kernel-open/nvidia-uvm/uvm_channel.c index 8fe11398e2..b8f2c2588f 100644 --- a/kernel-open/nvidia-uvm/uvm_channel.c +++ b/kernel-open/nvidia-uvm/uvm_channel.c @@ -38,6 +38,32 @@ #include "clb06f.h" #include "uvm_conf_computing.h" +// WLC push is decrypted by SEC2 or CE (in WLC schedule). +// In sysmem it's followed by auth tag. +#define WLC_PUSHBUFFER_ALIGNMENT max3(UVM_CONF_COMPUTING_AUTH_TAG_ALIGNMENT, \ + UVM_CONF_COMPUTING_SEC2_BUF_ALIGNMENT, \ + UVM_CONF_COMPUTING_BUF_ALIGNMENT) +#define WLC_ALIGNED_MAX_PUSH_SIZE UVM_ALIGN_UP(UVM_MAX_WLC_PUSH_SIZE, WLC_PUSHBUFFER_ALIGNMENT) + +// WLC uses the following structures in unprotected sysmem: +// * Encrypted pushbuffer location. This gets populated via cpu_encrypt to +// launch work on a WLC channel. +// * Auth tag associated with the above encrypted (push)buffer +// * Another auth tag used to encrypt another channel's pushbuffer during +// indirect work launch. This can be allocated with the launched work +// but since WLC can oly launch one pushbuffer at a time it's easier +// to include it here. +#define WLC_SYSMEM_TOTAL_SIZE UVM_ALIGN_UP(WLC_ALIGNED_MAX_PUSH_SIZE + 2 * UVM_CONF_COMPUTING_AUTH_TAG_SIZE, \ + WLC_PUSHBUFFER_ALIGNMENT) + +#define WLC_SYSMEM_PUSHBUFFER_OFFSET 0 +#define WLC_SYSMEM_PUSHBUFFER_AUTH_TAG_OFFSET (WLC_SYSMEM_PUSHBUFFER_OFFSET + WLC_ALIGNED_MAX_PUSH_SIZE) +#define WLC_SYSMEM_LAUNCH_AUTH_TAG_OFFSET (WLC_SYSMEM_PUSHBUFFER_AUTH_TAG_OFFSET + UVM_CONF_COMPUTING_AUTH_TAG_SIZE) + +// LCIC pushbuffer is populated by SEC2 +#define LCIC_PUSHBUFFER_ALIGNMENT UVM_CONF_COMPUTING_SEC2_BUF_ALIGNMENT +#define LCIC_ALIGNED_PUSH_SIZE UVM_ALIGN_UP(UVM_LCIC_PUSH_SIZE, LCIC_PUSHBUFFER_ALIGNMENT) + static unsigned uvm_channel_num_gpfifo_entries = UVM_CHANNEL_NUM_GPFIFO_ENTRIES_DEFAULT; #define UVM_CHANNEL_GPFIFO_LOC_DEFAULT "auto" @@ -132,6 +158,12 @@ static NvU32 uvm_channel_update_progress_with_max(uvm_channel_t *channel, NvU64 completed_value = uvm_channel_update_completed_value(channel); + // LCIC channels don't use gpfifo entries after the static schedule is up. + // They can only have one entry active at a time so use the state of the + // tracking semaphore to represent progress. + if (uvm_channel_is_lcic(channel) && uvm_channel_manager_is_wlc_ready(channel->pool->manager)) + return uvm_gpu_tracking_semaphore_is_completed(&channel->tracking_sem) ? 0 : 1; + channel_pool_lock(channel->pool); // Completed value should never exceed the queued value @@ -280,16 +312,16 @@ static void unlock_channel_for_push(uvm_channel_t *channel) index = uvm_channel_index_in_pool(channel); uvm_channel_pool_assert_locked(channel->pool); - UVM_ASSERT(test_bit(index, channel->pool->push_locks)); + UVM_ASSERT(test_bit(index, channel->pool->conf_computing.push_locks)); - __clear_bit(index, channel->pool->push_locks); - uvm_up_out_of_order(&channel->pool->push_sem); + __clear_bit(index, channel->pool->conf_computing.push_locks); + uvm_up_out_of_order(&channel->pool->conf_computing.push_sem); } bool uvm_channel_is_locked_for_push(uvm_channel_t *channel) { if (g_uvm_global.conf_computing_enabled) - return test_bit(uvm_channel_index_in_pool(channel), channel->pool->push_locks); + return test_bit(uvm_channel_index_in_pool(channel), channel->pool->conf_computing.push_locks); // For CE and proxy channels, we always return that the channel is locked, // which has no functional impact in the UVM channel code-flow, this is only @@ -303,19 +335,21 @@ static void lock_channel_for_push(uvm_channel_t *channel) UVM_ASSERT(g_uvm_global.conf_computing_enabled); uvm_channel_pool_assert_locked(channel->pool); - UVM_ASSERT(!test_bit(index, channel->pool->push_locks)); + UVM_ASSERT(!test_bit(index, channel->pool->conf_computing.push_locks)); - __set_bit(index, channel->pool->push_locks); + __set_bit(index, channel->pool->conf_computing.push_locks); } static bool test_claim_and_lock_channel(uvm_channel_t *channel, NvU32 num_gpfifo_entries) { - NvU32 index = uvm_channel_index_in_pool(channel); - UVM_ASSERT(g_uvm_global.conf_computing_enabled); uvm_channel_pool_assert_locked(channel->pool); - if (!test_bit(index, channel->pool->push_locks) && try_claim_channel_locked(channel, num_gpfifo_entries)) { + // Already locked by someone else + if (uvm_channel_is_locked_for_push(channel)) + return false; + + if (try_claim_channel_locked(channel, num_gpfifo_entries)) { lock_channel_for_push(channel); return true; } @@ -323,6 +357,109 @@ static bool test_claim_and_lock_channel(uvm_channel_t *channel, NvU32 num_gpfifo return false; } +// Reserve, or release, all channels in the given pool. +// +// One scenario where reservation of the entire pool is useful is key rotation, +// because the reservation blocks addition of new work to the pool while +// rotation is in progress. +static void channel_pool_reserve_release_all_channels(uvm_channel_pool_t *pool, bool reserve) +{ + NvU32 i; + + UVM_ASSERT(g_uvm_global.conf_computing_enabled); + + // Disable lock tracking: a single thread is acquiring multiple locks of + // the same order + uvm_thread_context_lock_disable_tracking(); + + for (i = 0; i < pool->num_channels; i++) { + if (reserve) + uvm_down(&pool->conf_computing.push_sem); + else + uvm_up(&pool->conf_computing.push_sem); + } + + uvm_thread_context_lock_enable_tracking(); +} + +static void channel_pool_reserve_all_channels(uvm_channel_pool_t *pool) +{ + channel_pool_reserve_release_all_channels(pool, true); +} + +static void channel_pool_release_all_channels(uvm_channel_pool_t *pool) +{ + channel_pool_reserve_release_all_channels(pool, false); +} + +static NV_STATUS channel_pool_rotate_key_locked(uvm_channel_pool_t *pool) +{ + uvm_channel_t *channel; + + // A rotation is not necessarily pending, because UVM can trigger rotations + // at will. + UVM_ASSERT(uvm_conf_computing_is_key_rotation_enabled_in_pool(pool)); + + uvm_assert_mutex_locked(&pool->conf_computing.key_rotation.mutex); + + uvm_for_each_channel_in_pool(channel, pool) { + // WLC channels share CE with LCIC pushes and LCIC waits for + // WLC work to complete using WFI, so it's enough to wait + // for the latter one. + uvm_channel_t *wait_channel = uvm_channel_is_wlc(channel) ? uvm_channel_wlc_get_paired_lcic(channel) : channel; + + NV_STATUS status = uvm_channel_wait(wait_channel); + if (status != NV_OK) + return status; + + } + + return uvm_conf_computing_rotate_pool_key(pool); +} + +static NV_STATUS channel_pool_rotate_key(uvm_channel_pool_t *pool, bool force_rotation) +{ + NV_STATUS status = NV_OK; + + uvm_mutex_lock(&pool->conf_computing.key_rotation.mutex); + + if (force_rotation || uvm_conf_computing_is_key_rotation_pending_in_pool(pool)) { + channel_pool_reserve_all_channels(pool); + + status = channel_pool_rotate_key_locked(pool); + + channel_pool_release_all_channels(pool); + } + + uvm_mutex_unlock(&pool->conf_computing.key_rotation.mutex); + + return status; +} + +static NV_STATUS channel_pool_rotate_key_if_pending(uvm_channel_pool_t *pool) +{ + NV_STATUS status; + bool force_rotation = false; + + if (!uvm_conf_computing_is_key_rotation_enabled_in_pool(pool)) + return NV_OK; + + status = channel_pool_rotate_key(pool, force_rotation); + + // RM couldn't acquire the locks it needed, so UVM will try again later. + if (status == NV_ERR_STATE_IN_USE) + status = NV_OK; + + return status; +} + +NV_STATUS uvm_channel_pool_rotate_key(uvm_channel_pool_t *pool) +{ + bool force_rotation = true; + + return channel_pool_rotate_key(pool, force_rotation); +} + // Reserve a channel in the specified pool. The channel is locked until the push // ends static NV_STATUS channel_reserve_and_lock_in_pool(uvm_channel_pool_t *pool, uvm_channel_t **channel_out) @@ -330,20 +467,28 @@ static NV_STATUS channel_reserve_and_lock_in_pool(uvm_channel_pool_t *pool, uvm_ uvm_channel_t *channel; uvm_spin_loop_t spin; NvU32 index; + NV_STATUS status; UVM_ASSERT(pool); UVM_ASSERT(g_uvm_global.conf_computing_enabled); + // LCIC channels are reserved directly during GPU initialization. + UVM_ASSERT(!uvm_channel_pool_is_lcic(pool)); + + status = channel_pool_rotate_key_if_pending(pool); + if (status != NV_OK) + return status; + // This semaphore is uvm_up() in unlock_channel_for_push() as part of the // uvm_channel_end_push() routine. - uvm_down(&pool->push_sem); + uvm_down(&pool->conf_computing.push_sem); // At least one channel is unlocked. We check if any unlocked channel is // available, i.e., if it has free GPFIFO entries. channel_pool_lock(pool); - for_each_clear_bit(index, pool->push_locks, pool->num_channels) { + for_each_clear_bit(index, pool->conf_computing.push_locks, pool->num_channels) { channel = &pool->channels[index]; if (try_claim_channel_locked(channel, 1)) { lock_channel_for_push(channel); @@ -358,8 +503,6 @@ static NV_STATUS channel_reserve_and_lock_in_pool(uvm_channel_pool_t *pool, uvm_ uvm_spin_loop_init(&spin); while (1) { uvm_for_each_channel_in_pool(channel, pool) { - NV_STATUS status; - uvm_channel_update_progress(channel); channel_pool_lock(pool); @@ -371,7 +514,7 @@ static NV_STATUS channel_reserve_and_lock_in_pool(uvm_channel_pool_t *pool, uvm_ status = uvm_channel_check_errors(channel); if (status != NV_OK) { - uvm_up(&pool->push_sem); + uvm_up(&pool->conf_computing.push_sem); return status; } @@ -489,6 +632,27 @@ static NvU32 channel_get_available_push_info_index(uvm_channel_t *channel) return push_info - channel->push_infos; } +static unsigned channel_pool_num_gpfifo_entries(uvm_channel_pool_t *pool) +{ + UVM_ASSERT(uvm_pool_type_is_valid(pool->pool_type)); + + // WLC benefits from larger number of entries since more available entries + // result in less frequent calls to uvm_channel_update_progress. 16 is the + // maximum size that can re-use static pb preallocated memory when uploading + // the WLC schedule. + if (uvm_channel_pool_is_wlc(pool)) + return 16; + + // Every channel needs at least 3 entries; 1 for sentinel and 2 for + // submitting GPFIFO control entries. The number also has to be power of 2, + // as the HW stores the size as log2 value. LCIC does not accept external + // pushes, uvm_channel_update_progress is not a concern. + if (uvm_channel_pool_is_lcic(pool)) + return 4; + + return pool->manager->conf.num_gpfifo_entries; +} + static void channel_semaphore_gpu_encrypt_payload(uvm_push_t *push, NvU64 semaphore_va) { NvU32 iv_index; @@ -501,14 +665,14 @@ static void channel_semaphore_gpu_encrypt_payload(uvm_push_t *push, NvU64 semaph uvm_gpu_address_t semaphore_gpu_va = uvm_gpu_address_virtual(semaphore_va); UvmCslIv *iv_cpu_addr = semaphore->conf_computing.ivs; NvU32 payload_size = sizeof(*uvm_gpu_semaphore_get_encrypted_payload_cpu_va(semaphore)); - NvU32 *last_pushed_notifier = &semaphore->conf_computing.last_pushed_notifier; + uvm_gpu_semaphore_notifier_t *last_pushed_notifier = &semaphore->conf_computing.last_pushed_notifier; UVM_ASSERT(g_uvm_global.conf_computing_enabled); UVM_ASSERT(uvm_channel_is_ce(channel)); iv_index = ((*last_pushed_notifier + 2) / 2) % channel->num_gpfifo_entries; - uvm_conf_computing_log_gpu_encryption(channel, &iv_cpu_addr[iv_index]); + uvm_conf_computing_log_gpu_encryption(channel, payload_size, &iv_cpu_addr[iv_index]); gpu->parent->ce_hal->memset_4(push, notifier_gpu_va, ++(*last_pushed_notifier), sizeof(*last_pushed_notifier)); gpu->parent->ce_hal->encrypt(push, encrypted_payload_gpu_va, semaphore_gpu_va, payload_size, auth_tag_gpu_va); @@ -529,18 +693,69 @@ static void push_reserve_csl_sign_buf(uvm_push_t *push) UVM_ASSERT((buf - UVM_METHOD_SIZE / sizeof(*buf)) == push->begin); } +// Reserve space for a single authentication tag and return addresses to unprotected sysmem +static void *push_reserve_auth_tag(uvm_push_t *push, uvm_gpu_address_t *gpu_address_out) +{ + void *cpu_address; + uvm_gpu_address_t gpu_address; + + UVM_ASSERT(push->channel); + + cpu_address = uvm_push_get_single_inline_buffer(push, + UVM_CONF_COMPUTING_AUTH_TAG_SIZE, + UVM_CONF_COMPUTING_AUTH_TAG_ALIGNMENT, + &gpu_address); + + // SEC2 channel uses unprotected sysmem for pushes + if (uvm_channel_is_sec2(push->channel)) { + *gpu_address_out = gpu_address; + return cpu_address; + } + else { + uvm_pushbuffer_t *pushbuffer = uvm_channel_get_pushbuffer(push->channel); + NvU64 unprotected_gpu_va_for_push = uvm_pushbuffer_get_unprotected_gpu_va_for_push(pushbuffer, push); + char *unprotected_cpu_va_for_push = uvm_pushbuffer_get_unprotected_cpu_va_for_push(pushbuffer, push); + const size_t offset = (char*)cpu_address - (char*)push->begin; + + UVM_ASSERT(offset == gpu_address.address - uvm_pushbuffer_get_gpu_va_for_push(pushbuffer, push)); + UVM_ASSERT(!uvm_channel_is_wlc(push->channel)); + UVM_ASSERT(!uvm_channel_is_lcic(push->channel)); + UVM_ASSERT(uvm_channel_is_ce(push->channel)); + + *gpu_address_out = uvm_gpu_address_virtual_unprotected(unprotected_gpu_va_for_push + offset); + return unprotected_cpu_va_for_push + offset; + } +} + +static uvm_channel_pool_t *get_paired_pool(uvm_channel_pool_t *pool) +{ + uvm_channel_type_t paired_channel_type; + uvm_channel_pool_t *paired_pool; + + UVM_ASSERT(pool); + UVM_ASSERT(uvm_channel_pool_is_wlc(pool) || uvm_channel_pool_is_lcic(pool)); + + paired_channel_type = uvm_channel_pool_is_wlc(pool) ? UVM_CHANNEL_TYPE_LCIC : UVM_CHANNEL_TYPE_WLC; + paired_pool = pool->manager->pool_to_use.default_for_type[paired_channel_type]; + + // Prevent accessing a non-existing paired pool. This can happen if, for + // example, the function is invoked when the WLC pool exists, but the LCIC + // doesn't (it hasn't been created yet, or it has been already destroyed). + UVM_ASSERT(paired_pool); + + return paired_pool; +} + static uvm_channel_t *get_paired_channel(uvm_channel_t *channel) { - unsigned index; uvm_channel_pool_t *paired_pool; - uvm_channel_type_t paired_channel_type; + unsigned index; UVM_ASSERT(channel); - UVM_ASSERT(uvm_channel_is_wlc(channel) || uvm_channel_is_lcic(channel)); + paired_pool = get_paired_pool(channel->pool); index = uvm_channel_index_in_pool(channel); - paired_channel_type = uvm_channel_is_wlc(channel) ? UVM_CHANNEL_TYPE_LCIC : UVM_CHANNEL_TYPE_WLC; - paired_pool = channel->pool->manager->pool_to_use.default_for_type[paired_channel_type]; + return paired_pool->channels + index; } @@ -560,6 +775,63 @@ uvm_channel_t *uvm_channel_wlc_get_paired_lcic(uvm_channel_t *wlc_channel) return get_paired_channel(wlc_channel); } +NvU64 uvm_channel_get_static_pb_protected_vidmem_gpu_va(uvm_channel_t *channel) +{ + unsigned channel_index; + NvU64 pool_vidmem_base; + + UVM_ASSERT(channel); + UVM_ASSERT(uvm_channel_is_wlc(channel) || uvm_channel_is_lcic(channel)); + + channel_index = uvm_channel_index_in_pool(channel); + pool_vidmem_base = uvm_rm_mem_get_gpu_uvm_va(channel->pool->conf_computing.pool_vidmem, + uvm_channel_get_gpu(channel)); + + if (uvm_channel_is_lcic(channel)) + return pool_vidmem_base + channel_index * LCIC_ALIGNED_PUSH_SIZE; + + return pool_vidmem_base + 2 * channel_index * WLC_ALIGNED_MAX_PUSH_SIZE; +} + +static NvU64 get_channel_unprotected_sysmem_gpu_va(uvm_channel_t *channel) +{ + unsigned channel_index; + NvU64 pool_sysmem_base; + + UVM_ASSERT(channel); + UVM_ASSERT(uvm_channel_is_wlc(channel)); + + channel_index = uvm_channel_index_in_pool(channel); + pool_sysmem_base = uvm_rm_mem_get_gpu_uvm_va(channel->pool->conf_computing.pool_sysmem, + uvm_channel_get_gpu(channel)); + + return pool_sysmem_base + (channel_index * WLC_SYSMEM_TOTAL_SIZE); +} + +NvU64 uvm_channel_get_static_pb_unprotected_sysmem_gpu_va(uvm_channel_t *channel) +{ + return get_channel_unprotected_sysmem_gpu_va(channel) + WLC_SYSMEM_PUSHBUFFER_OFFSET; +} + +static char* get_channel_unprotected_sysmem_cpu(uvm_channel_t *channel) +{ + unsigned channel_index; + char* pool_sysmem_base; + + UVM_ASSERT(channel); + UVM_ASSERT(uvm_channel_is_wlc(channel)); + + channel_index = uvm_channel_index_in_pool(channel); + pool_sysmem_base = uvm_rm_mem_get_cpu_va(channel->pool->conf_computing.pool_sysmem); + + return pool_sysmem_base + (channel_index * WLC_SYSMEM_TOTAL_SIZE); +} + +char* uvm_channel_get_static_pb_unprotected_sysmem_cpu(uvm_channel_t *channel) +{ + return get_channel_unprotected_sysmem_cpu(channel) + WLC_SYSMEM_PUSHBUFFER_OFFSET; +} + static NV_STATUS channel_rotate_and_reserve_launch_channel(uvm_channel_t *channel, uvm_channel_t **launch_channel) { uvm_channel_manager_t *manager = channel->pool->manager; @@ -735,20 +1007,64 @@ static void uvm_channel_tracking_semaphore_release(uvm_push_t *push, NvU64 semap channel_semaphore_gpu_encrypt_payload(push, semaphore_va); } +static uvm_gpu_semaphore_notifier_t *lcic_static_entry_notifier_cpu_va(uvm_channel_t *lcic) +{ + uvm_gpu_semaphore_notifier_t *notifier_base; + + UVM_ASSERT(uvm_channel_is_lcic(lcic)); + + notifier_base = uvm_rm_mem_get_cpu_va(lcic->pool->conf_computing.pool_sysmem); + return notifier_base + uvm_channel_index_in_pool(lcic) * 2; +} + +static uvm_gpu_semaphore_notifier_t *lcic_static_exit_notifier_cpu_va(uvm_channel_t *lcic) +{ + return lcic_static_entry_notifier_cpu_va(lcic) + 1; +} + +static uvm_gpu_address_t lcic_static_entry_notifier_gpu_va(uvm_channel_t *lcic) +{ + NvU64 notifier_base; + const NvU64 offset = uvm_channel_index_in_pool(lcic) * 2 * sizeof(uvm_gpu_semaphore_notifier_t); + + UVM_ASSERT(uvm_channel_is_lcic(lcic)); + + notifier_base = uvm_rm_mem_get_gpu_uvm_va(lcic->pool->conf_computing.pool_sysmem, uvm_channel_get_gpu(lcic)); + return uvm_gpu_address_virtual_unprotected(notifier_base + offset); +} + +static uvm_gpu_address_t lcic_static_exit_notifier_gpu_va(uvm_channel_t *lcic) +{ + uvm_gpu_address_t notifier_address = lcic_static_entry_notifier_gpu_va(lcic); + + notifier_address.address += sizeof(uvm_gpu_semaphore_notifier_t); + return notifier_address; +} + static void internal_channel_submit_work_wlc(uvm_push_t *push) { + size_t payload_size; uvm_channel_t *wlc_channel = push->channel; uvm_channel_t *lcic_channel = uvm_channel_wlc_get_paired_lcic(wlc_channel); - UvmCslIv *iv_cpu_addr = lcic_channel->tracking_sem.semaphore.conf_computing.ivs; - NvU32 *last_pushed_notifier; + uvm_gpu_semaphore_t *lcic_semaphore = &lcic_channel->tracking_sem.semaphore; + UvmCslIv *iv_cpu_addr = lcic_semaphore->conf_computing.ivs; + uvm_gpu_semaphore_notifier_t *last_pushed_notifier; NvU32 iv_index; - uvm_spin_loop_t spin; + NV_STATUS status; + void* auth_tag_cpu = get_channel_unprotected_sysmem_cpu(wlc_channel) + WLC_SYSMEM_PUSHBUFFER_AUTH_TAG_OFFSET; - UVM_ASSERT(lcic_channel); // Wait for the WLC/LCIC to be primed. This means that PUT == GET + 2 // and a WLC doorbell ring is enough to start work. - UVM_SPIN_WHILE(!uvm_gpu_tracking_semaphore_is_completed(&lcic_channel->tracking_sem), &spin); + status = uvm_channel_wait(lcic_channel); + if (status != NV_OK) { + UVM_ASSERT(uvm_global_get_status() != NV_OK); + + // If there's a global fatal error we can't communicate with the GPU + // and the below launch sequence doesn't work. + UVM_ERR_PRINT_NV_STATUS("Failed to wait for LCIC channel (%s) completion.", status, lcic_channel->name); + return; + } // Executing WLC adds an extra job to LCIC ++lcic_channel->tracking_sem.queued_value; @@ -760,19 +1076,21 @@ static void internal_channel_submit_work_wlc(uvm_push_t *push) // Handles the CPU part of the setup for the LCIC to be able to do GPU // encryption of its tracking semaphore value. See setup_lcic_schedule(). - last_pushed_notifier = &lcic_channel->tracking_sem.semaphore.conf_computing.last_pushed_notifier; - *lcic_channel->conf_computing.static_notifier_entry_unprotected_sysmem_cpu = ++(*last_pushed_notifier); - *lcic_channel->conf_computing.static_notifier_exit_unprotected_sysmem_cpu = ++(*last_pushed_notifier); + last_pushed_notifier = &lcic_semaphore->conf_computing.last_pushed_notifier; + *lcic_static_entry_notifier_cpu_va(lcic_channel) = ++(*last_pushed_notifier); + *lcic_static_exit_notifier_cpu_va(lcic_channel) = ++(*last_pushed_notifier); iv_index = (*last_pushed_notifier / 2) % lcic_channel->num_gpfifo_entries; - uvm_conf_computing_log_gpu_encryption(lcic_channel, &iv_cpu_addr[iv_index]); + + payload_size = sizeof(*uvm_gpu_semaphore_get_encrypted_payload_cpu_va(lcic_semaphore)); + uvm_conf_computing_log_gpu_encryption(lcic_channel, payload_size, &iv_cpu_addr[iv_index]); // Move push data uvm_conf_computing_cpu_encrypt(wlc_channel, - wlc_channel->conf_computing.static_pb_unprotected_sysmem_cpu, + uvm_channel_get_static_pb_unprotected_sysmem_cpu(wlc_channel), push->begin, &push->launch_iv, UVM_MAX_WLC_PUSH_SIZE, - wlc_channel->conf_computing.static_pb_unprotected_sysmem_auth_tag_cpu); + auth_tag_cpu); // Make sure all encrypted data is observable before ringing the doorbell. wmb(); @@ -792,7 +1110,7 @@ static void internal_channel_submit_work_indirect_wlc(uvm_push_t *push, NvU32 ol void *push_enc_cpu = uvm_pushbuffer_get_unprotected_cpu_va_for_push(pushbuffer, push); NvU64 push_enc_gpu = uvm_pushbuffer_get_unprotected_gpu_va_for_push(pushbuffer, push); - void *push_enc_auth_tag; + void *push_enc_auth_tag_cpu; uvm_gpu_address_t push_enc_auth_tag_gpu; NvU64 gpfifo_gpu_va = push->channel->channel_info.gpFifoGpuVa + old_cpu_put * sizeof(gpfifo_entry); @@ -816,15 +1134,16 @@ static void internal_channel_submit_work_indirect_wlc(uvm_push_t *push, NvU32 ol // Move over the pushbuffer data // WLC channels use a static preallocated space for launch auth tags - push_enc_auth_tag = indirect_push.channel->conf_computing.launch_auth_tag_cpu; - push_enc_auth_tag_gpu = uvm_gpu_address_virtual(indirect_push.channel->conf_computing.launch_auth_tag_gpu_va); + push_enc_auth_tag_cpu = get_channel_unprotected_sysmem_cpu(indirect_push.channel) + WLC_SYSMEM_LAUNCH_AUTH_TAG_OFFSET; + push_enc_auth_tag_gpu = uvm_gpu_address_virtual_unprotected( + get_channel_unprotected_sysmem_gpu_va(indirect_push.channel) + WLC_SYSMEM_LAUNCH_AUTH_TAG_OFFSET); uvm_conf_computing_cpu_encrypt(indirect_push.channel, push_enc_cpu, push->begin, NULL, uvm_push_get_size(push), - push_enc_auth_tag); + push_enc_auth_tag_cpu); uvm_push_set_flag(&indirect_push, UVM_PUSH_FLAG_NEXT_MEMBAR_NONE); @@ -872,10 +1191,7 @@ static void update_gpput_via_sec2(uvm_push_t *sec2_push, uvm_channel_t *channel, UVM_CONF_COMPUTING_SEC2_BUF_ALIGNMENT, UVM_CONF_COMPUTING_SEC2_BUF_ALIGNMENT, &gpput_enc_gpu); - gpput_auth_tag_cpu = uvm_push_get_single_inline_buffer(sec2_push, - UVM_CONF_COMPUTING_AUTH_TAG_SIZE, - UVM_CONF_COMPUTING_AUTH_TAG_ALIGNMENT, - &gpput_auth_tag_gpu); + gpput_auth_tag_cpu = push_reserve_auth_tag(sec2_push, &gpput_auth_tag_gpu); // Update GPPUT. The update needs 4B write to specific offset, // however we can only do 16B aligned decrypt writes. @@ -926,10 +1242,7 @@ static void set_gpfifo_via_sec2(uvm_push_t *sec2_push, uvm_channel_t *channel, N sizeof(gpfifo_scratchpad), UVM_CONF_COMPUTING_SEC2_BUF_ALIGNMENT, &gpfifo_enc_gpu); - gpfifo_auth_tag_cpu = uvm_push_get_single_inline_buffer(sec2_push, - UVM_CONF_COMPUTING_AUTH_TAG_SIZE, - UVM_CONF_COMPUTING_AUTH_TAG_ALIGNMENT, - &gpfifo_auth_tag_gpu); + gpfifo_auth_tag_cpu = push_reserve_auth_tag(sec2_push, &gpfifo_auth_tag_gpu); if (IS_ALIGNED(gpfifo_gpu, UVM_CONF_COMPUTING_SEC2_BUF_ALIGNMENT)) { gpfifo_scratchpad[0] = value; @@ -1016,10 +1329,7 @@ static NV_STATUS internal_channel_submit_work_indirect_sec2(uvm_push_t *push, Nv // Move over the pushbuffer data - push_auth_tag_cpu = uvm_push_get_single_inline_buffer(&indirect_push, - UVM_CONF_COMPUTING_AUTH_TAG_SIZE, - UVM_CONF_COMPUTING_AUTH_TAG_ALIGNMENT, - &push_auth_tag_gpu); + push_auth_tag_cpu = push_reserve_auth_tag(&indirect_push, &push_auth_tag_gpu); uvm_conf_computing_cpu_encrypt(indirect_push.channel, push_enc_cpu, @@ -1077,7 +1387,6 @@ static void encrypt_push(uvm_push_t *push) NvU32 push_size = uvm_push_get_size(push); uvm_push_info_t *push_info = uvm_push_info_from_push(push); uvm_pushbuffer_t *pushbuffer = uvm_channel_get_pushbuffer(channel); - unsigned auth_tag_offset = UVM_CONF_COMPUTING_AUTH_TAG_SIZE * push->push_info_index; if (!g_uvm_global.conf_computing_enabled) return; @@ -1096,14 +1405,20 @@ static void encrypt_push(uvm_push_t *push) UVM_ASSERT(channel->conf_computing.push_crypto_bundles != NULL); crypto_bundle = channel->conf_computing.push_crypto_bundles + push->push_info_index; - auth_tag_gpu_va = uvm_rm_mem_get_gpu_va(channel->conf_computing.push_crypto_bundle_auth_tags, gpu, false); - auth_tag_gpu_va.address += auth_tag_offset; + // Auth tag is reserved after 'push_size' was queried above so it won't be + // overwritten during the encryption below. It will be overwritten by the + // launch encryption though. This is OK as it doesn't store any useful + // value at launch time. + crypto_bundle->auth_tag = push_reserve_auth_tag(push, &auth_tag_gpu_va); crypto_bundle->push_size = push_size; + push_protected_gpu_va = uvm_pushbuffer_get_gpu_va_for_push(pushbuffer, push); push_unprotected_gpu_va = uvm_pushbuffer_get_unprotected_gpu_va_for_push(pushbuffer, push); - uvm_conf_computing_log_gpu_encryption(channel, &crypto_bundle->iv); + uvm_conf_computing_log_gpu_encryption(channel, push_size, &crypto_bundle->iv); + crypto_bundle->key_version = uvm_channel_pool_key_version(channel->pool); + gpu->parent->ce_hal->encrypt(push, uvm_gpu_address_virtual_unprotected(push_unprotected_gpu_va), uvm_gpu_address_virtual(push_protected_gpu_va), @@ -1123,7 +1438,6 @@ void uvm_channel_end_push(uvm_push_t *push) NvU32 push_size; NvU32 cpu_put; NvU32 new_cpu_put; - uvm_gpu_t *gpu = uvm_channel_get_gpu(channel); bool needs_sec2_work_submit = false; channel_pool_lock(channel->pool); @@ -1137,6 +1451,7 @@ void uvm_channel_end_push(uvm_push_t *push) uvm_channel_tracking_semaphore_release(push, semaphore_va, new_payload); if (uvm_channel_is_wlc(channel) && uvm_channel_manager_is_wlc_ready(channel_manager)) { + uvm_gpu_t *gpu = uvm_channel_get_gpu(channel); uvm_channel_t *paired_lcic = uvm_channel_wlc_get_paired_lcic(channel); gpu->parent->ce_hal->semaphore_reduction_inc(push, @@ -1431,9 +1746,16 @@ NV_STATUS uvm_channel_write_ctrl_gpfifo(uvm_channel_t *channel, NvU64 ctrl_fifo_ static NV_STATUS channel_reserve_and_lock(uvm_channel_t *channel, NvU32 num_gpfifo_entries) { + NV_STATUS status; uvm_spin_loop_t spin; uvm_channel_pool_t *pool = channel->pool; + UVM_ASSERT(g_uvm_global.conf_computing_enabled); + + status = channel_pool_rotate_key_if_pending(pool); + if (status != NV_OK) + return status; + // This semaphore is uvm_up() in unlock_channel_for_push() as part of the // uvm_channel_end_push() routine. Note that different than in // channel_reserve_and_lock_in_pool, we cannot pick an unlocked channel from @@ -1441,7 +1763,7 @@ static NV_STATUS channel_reserve_and_lock(uvm_channel_t *channel, NvU32 num_gpfi // Not a concern given that uvm_channel_reserve() is not the common-case for // channel reservation, and only used for channel initialization, GPFIFO // control work submission, and testing. - uvm_down(&pool->push_sem); + uvm_down(&pool->conf_computing.push_sem); channel_pool_lock(pool); @@ -1452,8 +1774,6 @@ static NV_STATUS channel_reserve_and_lock(uvm_channel_t *channel, NvU32 num_gpfi uvm_spin_loop_init(&spin); while (1) { - NV_STATUS status; - uvm_channel_update_progress(channel); channel_pool_lock(pool); @@ -1465,7 +1785,7 @@ static NV_STATUS channel_reserve_and_lock(uvm_channel_t *channel, NvU32 num_gpfi status = uvm_channel_check_errors(channel); if (status != NV_OK) { - uvm_up(&pool->push_sem); + uvm_up(&pool->conf_computing.push_sem); return status; } @@ -1655,6 +1975,8 @@ NV_STATUS uvm_channel_wait(uvm_channel_t *channel) static NV_STATUS csl_init(uvm_channel_t *channel) { NV_STATUS status; + unsigned context_index = uvm_channel_index_in_pool(channel); + uvm_channel_pool_t *pool = channel->pool; UVM_ASSERT(g_uvm_global.conf_computing_enabled); @@ -1671,17 +1993,38 @@ static NV_STATUS csl_init(uvm_channel_t *channel) uvm_mutex_init(&channel->csl.ctx_lock, UVM_LOCK_ORDER_CSL_CTX); channel->csl.is_ctx_initialized = true; + if (uvm_channel_is_lcic(channel)) { + pool = get_paired_pool(pool); + context_index += pool->num_channels; + } + + UVM_ASSERT(pool->conf_computing.key_rotation.csl_contexts != NULL); + + pool->conf_computing.key_rotation.csl_contexts[context_index] = &channel->csl.ctx; + return NV_OK; } static void csl_destroy(uvm_channel_t *channel) { + uvm_channel_pool_t *pool = channel->pool; + unsigned context_index = uvm_channel_index_in_pool(channel); + if (!channel->csl.is_ctx_initialized) return; uvm_assert_mutex_unlocked(&channel->csl.ctx_lock); UVM_ASSERT(!uvm_channel_is_locked_for_push(channel)); + if (uvm_channel_is_lcic(channel)) { + pool = get_paired_pool(pool); + context_index += pool->num_channels; + } + + UVM_ASSERT(pool->conf_computing.key_rotation.csl_contexts != NULL); + + pool->conf_computing.key_rotation.csl_contexts[context_index] = NULL; + uvm_rm_locked_call_void(nvUvmInterfaceDeinitCslContext(&channel->csl.ctx)); channel->csl.is_ctx_initialized = false; } @@ -1691,152 +2034,45 @@ static void free_conf_computing_buffers(uvm_channel_t *channel) UVM_ASSERT(g_uvm_global.conf_computing_enabled); UVM_ASSERT(uvm_channel_is_ce(channel)); - uvm_rm_mem_free(channel->conf_computing.static_pb_protected_vidmem); - uvm_rm_mem_free(channel->conf_computing.static_pb_unprotected_sysmem); - uvm_rm_mem_free(channel->conf_computing.static_notifier_unprotected_sysmem); - uvm_rm_mem_free(channel->conf_computing.push_crypto_bundle_auth_tags); uvm_kvfree(channel->conf_computing.static_pb_protected_sysmem); - uvm_kvfree(channel->conf_computing.push_crypto_bundles); - channel->conf_computing.static_pb_protected_vidmem = NULL; - channel->conf_computing.static_pb_unprotected_sysmem = NULL; - channel->conf_computing.static_notifier_unprotected_sysmem = NULL; - channel->conf_computing.push_crypto_bundle_auth_tags = NULL; channel->conf_computing.static_pb_protected_sysmem = NULL; + + uvm_kvfree(channel->conf_computing.push_crypto_bundles); channel->conf_computing.push_crypto_bundles = NULL; uvm_kvfree(channel->tracking_sem.semaphore.conf_computing.ivs); channel->tracking_sem.semaphore.conf_computing.ivs = NULL; } -static NV_STATUS alloc_conf_computing_buffers_semaphore(uvm_channel_t *channel) +static NV_STATUS alloc_conf_computing_buffers(uvm_channel_t *channel) { uvm_gpu_semaphore_t *semaphore = &channel->tracking_sem.semaphore; UVM_ASSERT(g_uvm_global.conf_computing_enabled); UVM_ASSERT(uvm_channel_is_ce(channel)); - semaphore->conf_computing.ivs = uvm_kvmalloc_zero(sizeof(*semaphore->conf_computing.ivs) - * channel->num_gpfifo_entries); + semaphore->conf_computing.ivs = + uvm_kvmalloc(sizeof(*semaphore->conf_computing.ivs) * channel->num_gpfifo_entries); if (!semaphore->conf_computing.ivs) return NV_ERR_NO_MEMORY; - return NV_OK; -} - -static NV_STATUS alloc_conf_computing_buffers_wlc(uvm_channel_t *channel) -{ - uvm_gpu_t *gpu = uvm_channel_get_gpu(channel); - size_t aligned_wlc_push_size = UVM_ALIGN_UP(UVM_MAX_WLC_PUSH_SIZE, UVM_CONF_COMPUTING_AUTH_TAG_ALIGNMENT); - NV_STATUS status = uvm_rm_mem_alloc_and_map_cpu(gpu, - UVM_RM_MEM_TYPE_SYS, - aligned_wlc_push_size + UVM_CONF_COMPUTING_AUTH_TAG_SIZE * 2, - PAGE_SIZE, - &channel->conf_computing.static_pb_unprotected_sysmem); - if (status != NV_OK) - return status; - - // Both pushes will be targets for SEC2 decrypt operations and have to - // be aligned for SEC2. The first push location will also be a target - // for CE decrypt operation and has to be aligned for CE decrypt. - status = uvm_rm_mem_alloc(gpu, - UVM_RM_MEM_TYPE_GPU, - UVM_ALIGN_UP(UVM_MAX_WLC_PUSH_SIZE, UVM_CONF_COMPUTING_SEC2_BUF_ALIGNMENT) * 2, - UVM_CONF_COMPUTING_BUF_ALIGNMENT, - &channel->conf_computing.static_pb_protected_vidmem); - if (status != NV_OK) - return status; - - channel->conf_computing.static_pb_unprotected_sysmem_cpu = - uvm_rm_mem_get_cpu_va(channel->conf_computing.static_pb_unprotected_sysmem); - channel->conf_computing.static_pb_unprotected_sysmem_auth_tag_cpu = - (char*)channel->conf_computing.static_pb_unprotected_sysmem_cpu + aligned_wlc_push_size; - - // The location below is only used for launch pushes but reuses - // the same sysmem allocation - channel->conf_computing.launch_auth_tag_cpu = - (char*)channel->conf_computing.static_pb_unprotected_sysmem_cpu + - aligned_wlc_push_size + UVM_CONF_COMPUTING_AUTH_TAG_SIZE; - channel->conf_computing.launch_auth_tag_gpu_va = - uvm_rm_mem_get_gpu_uvm_va(channel->conf_computing.static_pb_unprotected_sysmem, gpu) + - aligned_wlc_push_size + UVM_CONF_COMPUTING_AUTH_TAG_SIZE; - - channel->conf_computing.static_pb_protected_sysmem = uvm_kvmalloc(UVM_MAX_WLC_PUSH_SIZE + UVM_PAGE_SIZE_4K); - if (!channel->conf_computing.static_pb_protected_sysmem) - return NV_ERR_NO_MEMORY; - - return status; -} - -static NV_STATUS alloc_conf_computing_buffers_lcic(uvm_channel_t *channel) -{ - uvm_gpu_t *gpu = uvm_channel_get_gpu(channel); - const size_t notifier_size = sizeof(*channel->conf_computing.static_notifier_entry_unprotected_sysmem_cpu); - NV_STATUS status = uvm_rm_mem_alloc_and_map_cpu(gpu, - UVM_RM_MEM_TYPE_SYS, - notifier_size * 2, - UVM_CONF_COMPUTING_BUF_ALIGNMENT, - &channel->conf_computing.static_notifier_unprotected_sysmem); - if (status != NV_OK) - return status; - - status = uvm_rm_mem_alloc(gpu, - UVM_RM_MEM_TYPE_GPU, - UVM_LCIC_PUSH_SIZE, - UVM_CONF_COMPUTING_BUF_ALIGNMENT, - &channel->conf_computing.static_pb_protected_vidmem); - if (status != NV_OK) - return status; - - channel->conf_computing.static_notifier_entry_unprotected_sysmem_cpu = - uvm_rm_mem_get_cpu_va(channel->conf_computing.static_notifier_unprotected_sysmem); - channel->conf_computing.static_notifier_exit_unprotected_sysmem_cpu = - channel->conf_computing.static_notifier_entry_unprotected_sysmem_cpu + 1; - - channel->conf_computing.static_notifier_entry_unprotected_sysmem_gpu_va = - uvm_rm_mem_get_gpu_va(channel->conf_computing.static_notifier_unprotected_sysmem, gpu, false); - channel->conf_computing.static_notifier_exit_unprotected_sysmem_gpu_va = - channel->conf_computing.static_notifier_entry_unprotected_sysmem_gpu_va; - channel->conf_computing.static_notifier_exit_unprotected_sysmem_gpu_va.address += notifier_size; - - return status; -} - -static NV_STATUS alloc_conf_computing_buffers(uvm_channel_t *channel) -{ - NV_STATUS status; - - UVM_ASSERT(g_uvm_global.conf_computing_enabled); - UVM_ASSERT(uvm_channel_is_ce(channel)); - - status = alloc_conf_computing_buffers_semaphore(channel); - if (status != NV_OK) - return status; - if (uvm_channel_is_wlc(channel)) { - status = alloc_conf_computing_buffers_wlc(channel); - } - else if (uvm_channel_is_lcic(channel)) { - status = alloc_conf_computing_buffers_lcic(channel); - } - else { - uvm_gpu_t *gpu = uvm_channel_get_gpu(channel); - void *push_crypto_bundles = uvm_kvmalloc_zero(sizeof(*channel->conf_computing.push_crypto_bundles) * - channel->num_gpfifo_entries); + channel->conf_computing.static_pb_protected_sysmem = + uvm_kvmalloc(UVM_ALIGN_UP(UVM_MAX_WLC_PUSH_SIZE, UVM_PAGE_SIZE_4K)); - if (push_crypto_bundles == NULL) + if (!channel->conf_computing.static_pb_protected_sysmem) return NV_ERR_NO_MEMORY; + } + else if (!uvm_channel_is_lcic(channel)) { + channel->conf_computing.push_crypto_bundles = + uvm_kvmalloc(sizeof(*channel->conf_computing.push_crypto_bundles) * channel->num_gpfifo_entries); - channel->conf_computing.push_crypto_bundles = push_crypto_bundles; - - status = uvm_rm_mem_alloc_and_map_cpu(gpu, - UVM_RM_MEM_TYPE_SYS, - channel->num_gpfifo_entries * UVM_CONF_COMPUTING_AUTH_TAG_SIZE, - UVM_CONF_COMPUTING_BUF_ALIGNMENT, - &channel->conf_computing.push_crypto_bundle_auth_tags); + if (!channel->conf_computing.push_crypto_bundles) + return NV_ERR_NO_MEMORY; } - return status; + return NV_OK; } static void channel_destroy(uvm_channel_pool_t *pool, uvm_channel_t *channel) @@ -1884,36 +2120,6 @@ static void channel_destroy(uvm_channel_pool_t *pool, uvm_channel_t *channel) pool->num_channels--; } -static unsigned channel_pool_type_num_gpfifo_entries(uvm_channel_manager_t *manager, uvm_channel_pool_type_t pool_type) -{ - switch (pool_type) { - case UVM_CHANNEL_POOL_TYPE_CE: - case UVM_CHANNEL_POOL_TYPE_CE_PROXY: - return manager->conf.num_gpfifo_entries; - case UVM_CHANNEL_POOL_TYPE_SEC2: - return manager->conf.num_gpfifo_entries; - case UVM_CHANNEL_POOL_TYPE_WLC: { - // WLC benefits from larger number of entries since more available - // entries result in less frequent calls to - // uvm_channel_update_progress 16 is the maximum size that can - // re-use static pb preallocated memory when uploading the WLC - // schedule. - return 16; - } - case UVM_CHANNEL_POOL_TYPE_LCIC: { - // Every channel needs at least 3 entries; 1 for sentinel and 2 more - // for submitting GPFIFO control entries. The number also has to be - // power of 2, as the HW stores the size as log2 value. - // LCIC does not accept external pushes, uvm_channel_update_progress - // is not a concern. - return 4; - } - default: - UVM_ASSERT_MSG(0, "Unhandled pool type: %d", pool_type); - return 0; - } -} - // Returns the TSG for a given channel. static uvmGpuTsgHandle channel_get_tsg(uvm_channel_t *channel) { @@ -1941,7 +2147,7 @@ static NV_STATUS internal_channel_create(uvm_channel_t *channel) uvm_channel_manager_t *manager = channel->pool->manager; memset(&channel_alloc_params, 0, sizeof(channel_alloc_params)); - channel_alloc_params.numGpFifoEntries = channel_pool_type_num_gpfifo_entries(manager, channel->pool->pool_type); + channel_alloc_params.numGpFifoEntries = channel_pool_num_gpfifo_entries(channel->pool); channel_alloc_params.gpFifoLoc = manager->conf.gpfifo_loc; channel_alloc_params.gpPutLoc = manager->conf.gpput_loc; @@ -2045,7 +2251,7 @@ static NV_STATUS channel_create(uvm_channel_pool_t *pool, uvm_channel_t *channel if (status != NV_OK) goto error; - channel->num_gpfifo_entries = channel_pool_type_num_gpfifo_entries(manager, pool->pool_type); + channel->num_gpfifo_entries = channel_pool_num_gpfifo_entries(pool); channel->gpfifo_entries = uvm_kvmalloc_zero(sizeof(*channel->gpfifo_entries) * channel->num_gpfifo_entries); if (channel->gpfifo_entries == NULL) { status = NV_ERR_NO_MEMORY; @@ -2125,8 +2331,8 @@ static NV_STATUS channel_init(uvm_channel_t *channel) if (uvm_channel_is_sec2(channel)) pb_base = uvm_pushbuffer_get_sec2_gpu_va_base(pushbuffer); - else if (channel->conf_computing.static_pb_protected_vidmem) - pb_base = uvm_rm_mem_get_gpu_uvm_va(channel->conf_computing.static_pb_protected_vidmem, gpu); + else if (uvm_channel_is_wlc(channel) || uvm_channel_is_lcic(channel)) + pb_base = uvm_channel_get_static_pb_protected_vidmem_gpu_va(channel); gpu->parent->host_hal->set_gpfifo_pushbuffer_segment_base(&gpfifo_entry, pb_base); write_ctrl_gpfifo(channel, gpfifo_entry); @@ -2166,34 +2372,68 @@ static bool channel_manager_uses_proxy_pool(uvm_channel_manager_t *manager) } // Number of channels to create in a pool of the given type. -// -// TODO: Bug 1764958: Tweak this function after benchmarking real workloads. -static unsigned channel_pool_type_num_channels(uvm_channel_pool_type_t pool_type) +static unsigned channel_manager_num_channels(uvm_channel_manager_t *manager, uvm_channel_pool_type_t pool_type) { - // TODO: Bug 3387454: The vGPU plugin implementation supports a single - // proxy channel per GPU - if (pool_type == UVM_CHANNEL_POOL_TYPE_CE_PROXY) - return 1; + unsigned num_channels; + + // In the common case, create two channels per pool. + // + // TODO: Bug 1764958: Tweak this number after benchmarking real workloads. + const unsigned channel_pool_type_ce_num_channels = 2; + + UVM_ASSERT(uvm_pool_type_is_valid(pool_type)); + + if (pool_type == UVM_CHANNEL_POOL_TYPE_CE_PROXY) { + + // TODO: Bug 3387454: The vGPU plugin implementation supports a single + // proxy channel per GPU + num_channels = 1; + } + else if (pool_type == UVM_CHANNEL_POOL_TYPE_SEC2) { - // Not all GPU architectures support more than 1 channel per TSG. Since SEC2 - // is not in UVM critical path for performance, we conservatively create a - // pool/TSG with a single channel. - if (pool_type == UVM_CHANNEL_POOL_TYPE_SEC2) - return 1; + // Not all GPU architectures support more than 1 channel per TSG. Since + // SEC2 is not in UVM critical path for performance, conservatively + // create a pool/TSG with a single channel. + num_channels = 1; + } + else if ((pool_type == UVM_CHANNEL_POOL_TYPE_WLC) || (pool_type == UVM_CHANNEL_POOL_TYPE_LCIC)) { + unsigned max_concurrent_ce_pushes; + unsigned num_used_ces = bitmap_weight(manager->ce_mask, UVM_COPY_ENGINE_COUNT_MAX); + + // CE selection should happen before this function is invoked. + UVM_ASSERT(num_used_ces > 0); + + // Create as many WLC and LCIC channels as concurrent, ongoing, pushes + // of interest are allowed. In the general case, this number of pushes + // is capped by UVM_PUSH_MAX_CONCURRENT_PUSHES. But in Confidential + // Computing there is at most one ongoing push per channel, so the + // number of WLC/LCIC channels is also limited by the number of CE + // channels. + // + // The calculation only considers channels mapped to the + // UVM_CHANNEL_POOL_TYPE_CE type, because WLC and LCIC channels are + // created to enable work launch exclusively in those other channels. + max_concurrent_ce_pushes = num_used_ces * channel_pool_type_ce_num_channels; + num_channels = min(max_concurrent_ce_pushes, (unsigned) UVM_PUSH_MAX_CONCURRENT_PUSHES); + } + else { + UVM_ASSERT(pool_type == UVM_CHANNEL_POOL_TYPE_CE); + + num_channels = channel_pool_type_ce_num_channels; + } - if (pool_type == UVM_CHANNEL_POOL_TYPE_WLC || pool_type == UVM_CHANNEL_POOL_TYPE_LCIC) - return UVM_PUSH_MAX_CONCURRENT_PUSHES; + UVM_ASSERT(num_channels <= UVM_CHANNEL_MAX_NUM_CHANNELS_PER_POOL); - return 2; + return num_channels; } // Number of TSGs to create in a pool of a given type. -static unsigned channel_pool_type_num_tsgs(uvm_channel_pool_type_t pool_type) +static unsigned channel_manager_num_tsgs(uvm_channel_manager_t *manager, uvm_channel_pool_type_t pool_type) { // For WLC and LCIC channels, we create one TSG per WLC/LCIC channel pair. // The TSG is stored in the WLC pool. if (pool_type == UVM_CHANNEL_POOL_TYPE_WLC) - return channel_pool_type_num_channels(pool_type); + return channel_manager_num_channels(manager, pool_type); else if (pool_type == UVM_CHANNEL_POOL_TYPE_LCIC) return 0; @@ -2249,17 +2489,150 @@ static void channel_pool_destroy(uvm_channel_pool_t *pool) while (pool->num_channels > 0) channel_destroy(pool, pool->channels + pool->num_channels - 1); + uvm_kvfree(pool->channels); pool->channels = NULL; while (pool->num_tsgs > 0) tsg_destroy(pool, *(pool->tsg_handles + pool->num_tsgs - 1)); + uvm_kvfree(pool->tsg_handles); pool->tsg_handles = NULL; + uvm_kvfree(pool->conf_computing.key_rotation.csl_contexts); + pool->conf_computing.key_rotation.csl_contexts = NULL; + + uvm_rm_mem_free(pool->conf_computing.pool_sysmem); + uvm_rm_mem_free(pool->conf_computing.pool_vidmem); + pool->manager->num_channel_pools--; } +static void channel_pool_initialize_locks(uvm_channel_pool_t *pool, unsigned num_channels) +{ + uvm_lock_order_t order; + + channel_pool_lock_init(pool); + + if (!g_uvm_global.conf_computing_enabled) + return; + + // Use different order lock for SEC2 and WLC channels. + // This allows reserving a SEC2 or WLC channel for indirect work + // submission while holding a reservation for a channel. + if (uvm_channel_pool_is_sec2(pool)) + order = UVM_LOCK_ORDER_CSL_SEC2_PUSH; + else if (uvm_channel_pool_is_wlc(pool)) + order = UVM_LOCK_ORDER_CSL_WLC_PUSH; + else + order = UVM_LOCK_ORDER_CSL_PUSH; + + uvm_sema_init(&pool->conf_computing.push_sem, num_channels, order); + + if (uvm_channel_pool_is_wlc(pool)) + order = UVM_LOCK_ORDER_KEY_ROTATION_WLC; + else + order = UVM_LOCK_ORDER_KEY_ROTATION; + + uvm_mutex_init(&pool->conf_computing.key_rotation.mutex, order); +} + +static NV_STATUS channel_pool_alloc_key_rotation_data(uvm_channel_pool_t *pool, unsigned num_channels) +{ + size_t csl_contexts_size; + + // uvm_conf_computing_is_key_rotation_enabled_in_pool cannot be used to + // skip key rotation data initialization, because during GPU initialization + // the function always returns false. + if (!g_uvm_global.conf_computing_enabled) + return NV_OK; + + // CSL contexts associated with LCIC channels are saved in the WLC context + // array, not in the LCIC context array, so all the underlying engine + // contexts are stored contiguously. + if (uvm_channel_pool_is_lcic(pool)) + return NV_OK; + + if (uvm_channel_pool_is_wlc(pool)) { + UVM_ASSERT(channel_manager_num_channels(pool->manager, UVM_CHANNEL_POOL_TYPE_WLC) == num_channels); + UVM_ASSERT(channel_manager_num_channels(pool->manager, UVM_CHANNEL_POOL_TYPE_LCIC) == num_channels); + + num_channels *= 2; + } + + csl_contexts_size = sizeof(*pool->conf_computing.key_rotation.csl_contexts) * num_channels; + pool->conf_computing.key_rotation.csl_contexts = uvm_kvmalloc_zero(csl_contexts_size); + + if (pool->conf_computing.key_rotation.csl_contexts == NULL) + return NV_ERR_NO_MEMORY; + + pool->conf_computing.key_rotation.num_csl_contexts = num_channels; + + return NV_OK; +} + +static NV_STATUS channel_pool_alloc_conf_computing_buffers(uvm_channel_pool_t *pool, unsigned num_channels) +{ + uvm_gpu_t *gpu = pool->manager->gpu; + NV_STATUS status = NV_OK; + + if (!g_uvm_global.conf_computing_enabled) + return NV_OK; + + if (uvm_channel_pool_is_wlc(pool)) { + + // Allocate unprotected sysmem buffers for WLC channels. + // The use/substructures are described by WLC_SYSMEM_TOTAL_SIZE + status = uvm_rm_mem_alloc_and_map_cpu(gpu, + UVM_RM_MEM_TYPE_SYS, + WLC_SYSMEM_TOTAL_SIZE * num_channels, + WLC_PUSHBUFFER_ALIGNMENT, + &pool->conf_computing.pool_sysmem); + if (status != NV_OK) + return status; + + // WLC stores two pushbuffers used by its static schedule in vidmem. + // See setup_wlc_schedule for the expected use of each of the static + // pushbuffers. + status = uvm_rm_mem_alloc(gpu, + UVM_RM_MEM_TYPE_GPU, + WLC_ALIGNED_MAX_PUSH_SIZE * 2 * num_channels, + WLC_PUSHBUFFER_ALIGNMENT, + &pool->conf_computing.pool_vidmem); + if (status != NV_OK) + return status; + } + else if (uvm_channel_pool_is_lcic(pool)) { + + // LCIC uses only static schedule so in order to use dynamic values + // for entry/exit notifiers for its tracking semaphore they need + // to be populated in a pre-defined sysmem location, before invoking + // the LCIC schedule. + status = uvm_rm_mem_alloc_and_map_cpu(gpu, + UVM_RM_MEM_TYPE_SYS, + sizeof(uvm_gpu_semaphore_notifier_t) * 2 * num_channels, + 0, + &pool->conf_computing.pool_sysmem); + if (status != NV_OK) + return status; + + // LCIC static schedule pushbuffer is in vidmem + status = uvm_rm_mem_alloc(gpu, + UVM_RM_MEM_TYPE_GPU, + LCIC_ALIGNED_PUSH_SIZE * num_channels, + LCIC_PUSHBUFFER_ALIGNMENT, + &pool->conf_computing.pool_vidmem); + if (status != NV_OK) + return status; + } + + status = channel_pool_alloc_key_rotation_data(pool, num_channels); + if (status != NV_OK) + return status; + + return NV_OK; +} + static NV_STATUS channel_pool_add(uvm_channel_manager_t *channel_manager, uvm_channel_pool_type_t pool_type, unsigned engine_index, @@ -2280,7 +2653,7 @@ static NV_STATUS channel_pool_add(uvm_channel_manager_t *channel_manager, pool->engine_index = engine_index; pool->pool_type = pool_type; - num_tsgs = channel_pool_type_num_tsgs(pool_type); + num_tsgs = channel_manager_num_tsgs(channel_manager, pool_type); if (num_tsgs != 0) { pool->tsg_handles = uvm_kvmalloc_zero(sizeof(*pool->tsg_handles) * num_tsgs); if (!pool->tsg_handles) { @@ -2297,21 +2670,13 @@ static NV_STATUS channel_pool_add(uvm_channel_manager_t *channel_manager, } } - channel_pool_lock_init(pool); - - num_channels = channel_pool_type_num_channels(pool_type); - UVM_ASSERT(num_channels <= UVM_CHANNEL_MAX_NUM_CHANNELS_PER_POOL); + num_channels = channel_manager_num_channels(channel_manager, pool_type); - if (g_uvm_global.conf_computing_enabled) { - // Use different order lock for SEC2 and WLC channels. - // This allows reserving a SEC2 or WLC channel for indirect work - // submission while holding a reservation for a channel. - uvm_lock_order_t order = uvm_channel_pool_is_sec2(pool) ? UVM_LOCK_ORDER_CSL_SEC2_PUSH : - (uvm_channel_pool_is_wlc(pool) ? UVM_LOCK_ORDER_CSL_WLC_PUSH : - UVM_LOCK_ORDER_CSL_PUSH); + channel_pool_initialize_locks(pool, num_channels); - uvm_sema_init(&pool->push_sem, num_channels, order); - } + status = channel_pool_alloc_conf_computing_buffers(pool, num_channels); + if (status != NV_OK) + goto error; pool->channels = uvm_kvmalloc_zero(sizeof(*pool->channels) * num_channels); if (!pool->channels) { @@ -2871,11 +3236,8 @@ static NV_STATUS channel_manager_create_ce_pools(uvm_channel_manager_t *manager, static NV_STATUS setup_wlc_schedule(uvm_channel_t *wlc) { uvm_gpu_t *gpu = uvm_channel_get_gpu(wlc); - NvU64 protected_vidmem = uvm_rm_mem_get_gpu_uvm_va(wlc->conf_computing.static_pb_protected_vidmem, gpu); - NvU64 unprotected_sysmem_gpu = uvm_rm_mem_get_gpu_uvm_va(wlc->conf_computing.static_pb_unprotected_sysmem, gpu); - void *unprotected_sysmem_cpu = wlc->conf_computing.static_pb_unprotected_sysmem_cpu; - NvU64 tag_offset = (uintptr_t)wlc->conf_computing.static_pb_unprotected_sysmem_auth_tag_cpu - - (uintptr_t)wlc->conf_computing.static_pb_unprotected_sysmem_cpu; + NvU64 protected_vidmem_gpu_va = uvm_channel_get_static_pb_protected_vidmem_gpu_va(wlc); + NvU64 unprotected_sysmem_gpu_va = get_channel_unprotected_sysmem_gpu_va(wlc); NvU64 *wlc_gpfifo_entries; uvm_push_t wlc_decrypt_push, sec2_push; @@ -2883,31 +3245,39 @@ static NV_STATUS setup_wlc_schedule(uvm_channel_t *wlc) int i; NV_STATUS status = NV_OK; - // "gpfifo" is the representation of GPFIFO copied to gpFifoGpu + // "gpfifo" is the representation of GPFIFO copied to gpFifoGpuVa. + // Resuse static pushbuffer sysmem location for uploading GPFIFO schedule const size_t gpfifo_size = wlc->num_gpfifo_entries * sizeof(*wlc_gpfifo_entries); - void *gpfifo_unprotected_cpu = unprotected_sysmem_cpu; - NvU64 gpfifo_unprotected_gpu = unprotected_sysmem_gpu; - - // "run_push" represents mutable push location used by WLC - uvm_gpu_address_t run_push_protected_gpu = uvm_gpu_address_virtual(protected_vidmem); - uvm_gpu_address_t run_push_unprotected_gpu = uvm_gpu_address_virtual(unprotected_sysmem_gpu); - uvm_gpu_address_t run_push_unprotected_auth_tag_gpu = uvm_gpu_address_virtual(unprotected_sysmem_gpu + tag_offset); + NvU64 gpfifo_unprotected_gpu_va = unprotected_sysmem_gpu_va; + void *gpfifo_unprotected_cpu = get_channel_unprotected_sysmem_cpu(wlc); + + // "run_push" represents mutable push location used by WLC. This is the + // first part of the WLC schedule, commands are decrypted as part of the + // launch sequence to protected_vidmem_gpu_va + 0. + // These locations are used in the static part ("decrypt_push") of the WLC schedule. + uvm_gpu_address_t run_push_protected_gpu = uvm_gpu_address_virtual(protected_vidmem_gpu_va); + uvm_gpu_address_t run_push_unprotected_gpu = + uvm_gpu_address_virtual_unprotected(unprotected_sysmem_gpu_va + WLC_SYSMEM_PUSHBUFFER_OFFSET); + uvm_gpu_address_t run_push_unprotected_auth_tag_gpu = + uvm_gpu_address_virtual_unprotected(unprotected_sysmem_gpu_va + WLC_SYSMEM_PUSHBUFFER_AUTH_TAG_OFFSET); // "decrypt_push" represents WLC decrypt push, constructed using fake_push. - // Copied to wlc_pb_base + UVM_MAX_WLC_PUSH_SIZE, as the second of the two + // Copied to protected_vidmem_gpu_va + UVM_MAX_WLC_PUSH_SIZE, as the second of the two // pushes that make the WLC fixed schedule. - NvU64 decrypt_push_protected_gpu = UVM_ALIGN_UP(protected_vidmem + UVM_MAX_WLC_PUSH_SIZE, UVM_CONF_COMPUTING_SEC2_BUF_ALIGNMENT); - NvU64 decrypt_push_unprotected_gpu = unprotected_sysmem_gpu + gpfifo_size; + NvU64 decrypt_push_protected_gpu_va = protected_vidmem_gpu_va + WLC_ALIGNED_MAX_PUSH_SIZE; + + // Similar to gpfifo, uploading the "decrypt_push" reuses static sysmem + // locations later used for "run_push" when the WLC/LCIC schedule is active + NvU64 decrypt_push_unprotected_gpu_va = gpfifo_unprotected_gpu_va + gpfifo_size; void *decrypt_push_unprotected_cpu = (char*)gpfifo_unprotected_cpu + gpfifo_size; // Tags for upload via SEC2 - void *decrypt_push_auth_tag, *gpfifo_auth_tag; + void *decrypt_push_auth_tag_cpu, *gpfifo_auth_tag_cpu; uvm_gpu_address_t decrypt_push_auth_tag_gpu, gpfifo_auth_tag_gpu; BUILD_BUG_ON(sizeof(*wlc_gpfifo_entries) != sizeof(*wlc->channel_info.gpFifoEntries)); UVM_ASSERT(uvm_channel_is_wlc(wlc)); - UVM_ASSERT(tag_offset == UVM_ALIGN_UP(UVM_MAX_WLC_PUSH_SIZE, UVM_CONF_COMPUTING_AUTH_TAG_ALIGNMENT)); // WLC schedule consists of two parts, the number of entries needs to be even. // This also guarantees that the size is 16B aligned @@ -2954,7 +3324,7 @@ static NV_STATUS setup_wlc_schedule(uvm_channel_t *wlc) for (i = 0; i < wlc->num_gpfifo_entries; ++i) { if (i % 2 == wlc->cpu_put % 2) { gpu->parent->host_hal->set_gpfifo_entry(wlc_gpfifo_entries + i, - decrypt_push_protected_gpu, + decrypt_push_protected_gpu_va, decrypt_push_size, UVM_GPFIFO_SYNC_PROCEED); } @@ -2974,15 +3344,8 @@ static NV_STATUS setup_wlc_schedule(uvm_channel_t *wlc) if (status != NV_OK) goto end_wlc_dec_push; - decrypt_push_auth_tag = uvm_push_get_single_inline_buffer(&sec2_push, - UVM_CONF_COMPUTING_AUTH_TAG_SIZE, - UVM_CONF_COMPUTING_AUTH_TAG_ALIGNMENT, - &decrypt_push_auth_tag_gpu); - - gpfifo_auth_tag = uvm_push_get_single_inline_buffer(&sec2_push, - UVM_CONF_COMPUTING_AUTH_TAG_SIZE, - UVM_CONF_COMPUTING_AUTH_TAG_ALIGNMENT, - &gpfifo_auth_tag_gpu); + decrypt_push_auth_tag_cpu = push_reserve_auth_tag(&sec2_push, &decrypt_push_auth_tag_gpu); + gpfifo_auth_tag_cpu = push_reserve_auth_tag(&sec2_push, &gpfifo_auth_tag_gpu); // Upload WLC pushbuffer uvm_conf_computing_cpu_encrypt(sec2_push.channel, @@ -2990,10 +3353,10 @@ static NV_STATUS setup_wlc_schedule(uvm_channel_t *wlc) wlc_decrypt_push.begin, NULL, decrypt_push_size, - decrypt_push_auth_tag); + decrypt_push_auth_tag_cpu); gpu->parent->sec2_hal->decrypt(&sec2_push, - decrypt_push_protected_gpu, - decrypt_push_unprotected_gpu, + decrypt_push_protected_gpu_va, + decrypt_push_unprotected_gpu_va, decrypt_push_size, decrypt_push_auth_tag_gpu.address); @@ -3003,10 +3366,10 @@ static NV_STATUS setup_wlc_schedule(uvm_channel_t *wlc) wlc_gpfifo_entries, NULL, gpfifo_size, - gpfifo_auth_tag); + gpfifo_auth_tag_cpu); gpu->parent->sec2_hal->decrypt(&sec2_push, wlc->channel_info.gpFifoGpuVa, - gpfifo_unprotected_gpu, + gpfifo_unprotected_gpu_va, gpfifo_size, gpfifo_auth_tag_gpu.address); @@ -3028,21 +3391,22 @@ static NV_STATUS setup_wlc_schedule(uvm_channel_t *wlc) static NV_STATUS setup_lcic_schedule(uvm_channel_t *paired_wlc, uvm_channel_t *lcic) { uvm_gpu_t *gpu = uvm_channel_get_gpu(lcic); - NvU64 lcic_pb_base = uvm_rm_mem_get_gpu_uvm_va(lcic->conf_computing.static_pb_protected_vidmem, gpu); + NvU64 lcic_pb_base = uvm_channel_get_static_pb_protected_vidmem_gpu_va(lcic); // Reuse WLC sysmem allocation - NvU64 gpu_unprotected = uvm_rm_mem_get_gpu_uvm_va(paired_wlc->conf_computing.static_pb_unprotected_sysmem, gpu); - char *cpu_unprotected = paired_wlc->conf_computing.static_pb_unprotected_sysmem_cpu; + NvU64 gpu_unprotected = get_channel_unprotected_sysmem_gpu_va(paired_wlc); + char *cpu_unprotected = get_channel_unprotected_sysmem_cpu(paired_wlc); uvm_gpu_semaphore_t *lcic_semaphore = &lcic->tracking_sem.semaphore; - uvm_gpu_address_t notifier_src_entry_addr = lcic->conf_computing.static_notifier_entry_unprotected_sysmem_gpu_va; - uvm_gpu_address_t notifier_src_exit_addr = lcic->conf_computing.static_notifier_exit_unprotected_sysmem_gpu_va; + + uvm_gpu_address_t notifier_src_entry_addr = lcic_static_entry_notifier_gpu_va(lcic); + uvm_gpu_address_t notifier_src_exit_addr = lcic_static_exit_notifier_gpu_va(lcic); uvm_gpu_address_t notifier_dst_addr = uvm_gpu_semaphore_get_notifier_gpu_va(lcic_semaphore); uvm_gpu_address_t encrypted_payload_gpu_va = uvm_gpu_semaphore_get_encrypted_payload_gpu_va(lcic_semaphore); uvm_gpu_address_t auth_tag_gpu_va = uvm_gpu_semaphore_get_auth_tag_gpu_va(lcic_semaphore); uvm_gpu_address_t semaphore_gpu_va = uvm_gpu_address_virtual(uvm_channel_tracking_semaphore_get_gpu_va(lcic)); NvU32 payload_size = sizeof(*uvm_gpu_semaphore_get_encrypted_payload_cpu_va(lcic_semaphore)); - NvU32 notifier_size = sizeof(*lcic->conf_computing.static_notifier_entry_unprotected_sysmem_cpu); + NvU32 notifier_size = sizeof(uvm_gpu_semaphore_notifier_t); NvU64 *lcic_gpfifo_entries; uvm_push_t lcic_push, sec2_push; @@ -3057,7 +3421,7 @@ static NV_STATUS setup_lcic_schedule(uvm_channel_t *paired_wlc, uvm_channel_t *l NvU64 lcic_push_unprotected_gpu = gpfifo_unprotected_gpu + gpfifo_size; NvU64 lcic_push_protected_gpu = lcic_pb_base; - char *lcic_push_enc_tag, *gpfifo_enc_tag; + char *lcic_push_enc_tag_cpu, *gpfifo_enc_tag_cpu; uvm_gpu_address_t lcic_push_enc_tag_gpu, gpfifo_enc_tag_gpu; BUILD_BUG_ON(sizeof(*lcic_gpfifo_entries) != sizeof(*lcic->channel_info.gpFifoEntries)); @@ -3098,7 +3462,11 @@ static NV_STATUS setup_lcic_schedule(uvm_channel_t *paired_wlc, uvm_channel_t *l 0xffffffff); gpu->parent->ce_hal->memcopy(&lcic_push, notifier_dst_addr, notifier_src_entry_addr, notifier_size); + + // This CE encryption does not need to be logged, it will be logged on every + // push_end instead gpu->parent->ce_hal->encrypt(&lcic_push, encrypted_payload_gpu_va, semaphore_gpu_va, payload_size, auth_tag_gpu_va); + gpu->parent->ce_hal->memcopy(&lcic_push, notifier_dst_addr, notifier_src_exit_addr, notifier_size); // End LCIC push @@ -3123,15 +3491,8 @@ static NV_STATUS setup_lcic_schedule(uvm_channel_t *paired_wlc, uvm_channel_t *l if (status != NV_OK) goto end_lcic_push; - lcic_push_enc_tag = uvm_push_get_single_inline_buffer(&sec2_push, - UVM_CONF_COMPUTING_AUTH_TAG_SIZE, - UVM_CONF_COMPUTING_AUTH_TAG_ALIGNMENT, - &lcic_push_enc_tag_gpu); - - gpfifo_enc_tag = uvm_push_get_single_inline_buffer(&sec2_push, - UVM_CONF_COMPUTING_AUTH_TAG_SIZE, - UVM_CONF_COMPUTING_AUTH_TAG_ALIGNMENT, - &gpfifo_enc_tag_gpu); + lcic_push_enc_tag_cpu = push_reserve_auth_tag(&sec2_push, &lcic_push_enc_tag_gpu); + gpfifo_enc_tag_cpu = push_reserve_auth_tag(&sec2_push, &gpfifo_enc_tag_gpu); // Upload LCIC pushbuffer uvm_conf_computing_cpu_encrypt(sec2_push.channel, @@ -3139,7 +3500,7 @@ static NV_STATUS setup_lcic_schedule(uvm_channel_t *paired_wlc, uvm_channel_t *l lcic_push.begin, NULL, lcic_push_size, - lcic_push_enc_tag); + lcic_push_enc_tag_cpu); gpu->parent->sec2_hal->decrypt(&sec2_push, lcic_push_protected_gpu, lcic_push_unprotected_gpu, @@ -3152,7 +3513,7 @@ static NV_STATUS setup_lcic_schedule(uvm_channel_t *paired_wlc, uvm_channel_t *l lcic_gpfifo_entries, NULL, gpfifo_size, - gpfifo_enc_tag); + gpfifo_enc_tag_cpu); gpu->parent->sec2_hal->decrypt(&sec2_push, lcic->channel_info.gpFifoGpuVa, gpfifo_unprotected_gpu, @@ -3172,6 +3533,7 @@ static NV_STATUS channel_manager_setup_wlc_lcic(uvm_channel_pool_t *wlc_pool, uv NvU32 i; UVM_ASSERT(wlc_pool->manager == lcic_pool->manager); + UVM_ASSERT(!uvm_channel_manager_is_wlc_ready(wlc_pool->manager)); UVM_ASSERT(wlc_pool->manager->pool_to_use.default_for_type[UVM_CHANNEL_TYPE_WLC] != NULL); UVM_ASSERT(lcic_pool->manager->pool_to_use.default_for_type[UVM_CHANNEL_TYPE_LCIC] == NULL); UVM_ASSERT(wlc_pool->num_channels == lcic_pool->num_channels); @@ -3244,6 +3606,9 @@ static NV_STATUS channel_manager_create_conf_computing_pools(uvm_channel_manager // are ready to be used for secure work submission. manager->pool_to_use.default_for_type[UVM_CHANNEL_TYPE_LCIC] = lcic_pool; + // WLC and LCIC pools are ready + manager->conf_computing.wlc_ready = true; + return NV_OK; } @@ -3296,6 +3661,8 @@ NV_STATUS uvm_channel_manager_create(uvm_gpu_t *gpu, uvm_channel_manager_t **cha if (!channel_manager) return NV_ERR_NO_MEMORY; + *channel_manager_out = channel_manager; + channel_manager->gpu = gpu; init_channel_manager_conf(channel_manager); status = uvm_pushbuffer_create(channel_manager, &channel_manager->pushbuffer); @@ -3314,12 +3681,18 @@ NV_STATUS uvm_channel_manager_create(uvm_gpu_t *gpu, uvm_channel_manager_t **cha if (status != NV_OK) goto error; - *channel_manager_out = channel_manager; + // Key rotation is enabled only after all the channels have been created: + // RM does not support channel allocation on an engine if key rotation is + // pending on that engine. This can become a problem during testing if + // key rotation thresholds are very low. + uvm_conf_computing_enable_key_rotation(gpu); - return status; + return NV_OK; error: + *channel_manager_out = NULL; uvm_channel_manager_destroy(channel_manager); + return status; } @@ -3346,11 +3719,15 @@ static void channel_manager_stop_wlc(uvm_channel_manager_t *manager) NV_STATUS status; uvm_for_each_channel_in_pool(channel, lcic_pool) { - uvm_spin_loop_t spin; - // Wait for the WLC/LCIC to be primed. This means that PUT == GET + 2 // and a WLC doorbell ring is enough to start work. - UVM_SPIN_WHILE(!uvm_gpu_tracking_semaphore_is_completed(&channel->tracking_sem), &spin); + status = uvm_channel_wait(channel); + if (status != NV_OK) + UVM_ERR_PRINT_NV_STATUS("Failed to wait for LCIC channel (%s) completion", status, channel->name); + + // Continue on error and attempt to stop WLC below. This can lead to + // channel destruction with mismatched GET and PUT pointers. RM will + // print errors if that's the case, but channel destruction succeeeds. } status = uvm_push_begin(manager, UVM_CHANNEL_TYPE_SEC2, &push, "Stop WLC channels"); @@ -3370,8 +3747,7 @@ static void channel_manager_stop_wlc(uvm_channel_manager_t *manager) if (status != NV_OK) UVM_ERR_PRINT_NV_STATUS("Failed to end stop push for WLC", status); - manager->pool_to_use.default_for_type[UVM_CHANNEL_TYPE_WLC] = NULL; - manager->pool_to_use.default_for_type[UVM_CHANNEL_TYPE_LCIC] = NULL; + manager->conf_computing.wlc_ready = false; } void uvm_channel_manager_destroy(uvm_channel_manager_t *channel_manager) @@ -3393,6 +3769,14 @@ void uvm_channel_manager_destroy(uvm_channel_manager_t *channel_manager) uvm_kvfree(channel_manager); } +NvU32 uvm_channel_pool_key_version(uvm_channel_pool_t *pool) +{ + if (uvm_channel_pool_is_lcic(pool)) + pool = get_paired_pool(pool); + + return pool->conf_computing.key_rotation.version; +} + bool uvm_channel_is_privileged(uvm_channel_t *channel) { if (uvm_parent_gpu_is_virt_mode_sriov_heavy(uvm_channel_get_gpu(channel)->parent)) diff --git a/kernel-open/nvidia-uvm/uvm_channel.h b/kernel-open/nvidia-uvm/uvm_channel.h index e474645b7b..3153bc3a23 100644 --- a/kernel-open/nvidia-uvm/uvm_channel.h +++ b/kernel-open/nvidia-uvm/uvm_channel.h @@ -228,21 +228,65 @@ typedef struct // variant is required when the thread holding the pool lock must sleep // (ex: acquire another mutex) deeper in the call stack, either in UVM or // RM. - union { + union + { uvm_spinlock_t spinlock; uvm_mutex_t mutex; }; - // Secure operations require that uvm_push_begin order matches - // uvm_push_end order, because the engine's state is used in its internal - // operation and each push may modify this state. push_locks is protected by - // the channel pool lock. - DECLARE_BITMAP(push_locks, UVM_CHANNEL_MAX_NUM_CHANNELS_PER_POOL); + struct + { + // Secure operations require that uvm_push_begin order matches + // uvm_push_end order, because the engine's state is used in its + // internal operation and each push may modify this state. + // push_locks is protected by the channel pool lock. + DECLARE_BITMAP(push_locks, UVM_CHANNEL_MAX_NUM_CHANNELS_PER_POOL); + + // Counting semaphore for available and unlocked channels, it must be + // acquired before submitting work to a channel when the Confidential + // Computing feature is enabled. + uvm_semaphore_t push_sem; + + // Per channel buffers in unprotected sysmem. + uvm_rm_mem_t *pool_sysmem; + + // Per channel buffers in protected vidmem. + uvm_rm_mem_t *pool_vidmem; + + struct + { + // Current encryption key version, incremented upon key rotation. + // While there are separate keys for encryption and decryption, the + // two keys are rotated at once, so the versioning applies to both. + NvU32 version; + + // Lock used to ensure mutual exclusion during key rotation. + uvm_mutex_t mutex; + + // CSL contexts passed to RM for key rotation. This is usually an + // array containing the CSL contexts associated with the channels in + // the pool. In the case of the WLC pool, the array also includes + // CSL contexts associated with LCIC channels. + UvmCslContext **csl_contexts; + + // Number of elements in the CSL context array. + unsigned num_csl_contexts; + + // Number of bytes encrypted, or decrypted, on the engine associated + // with the pool since the last key rotation. Only used during + // testing, to force key rotations after a certain encryption size, + // see UVM_CONF_COMPUTING_KEY_ROTATION_LOWER_THRESHOLD. + // + // Encryptions on a LCIC pool are accounted for in the paired WLC + // pool. + // + // TODO: Bug 4612912: these accounting variables can be removed once + // RM exposes an API to set the key rotation lower threshold. + atomic64_t encrypted; + atomic64_t decrypted; + } key_rotation; - // Counting semaphore for available and unlocked channels, it must be - // acquired before submitting work to a channel when the Confidential - // Computing feature is enabled. - uvm_semaphore_t push_sem; + } conf_computing; } uvm_channel_pool_t; struct uvm_channel_struct @@ -322,43 +366,14 @@ struct uvm_channel_struct // work launches to match the order of push end-s that triggered them. volatile NvU32 gpu_put; - // Static pushbuffer for channels with static schedule (WLC/LCIC) - uvm_rm_mem_t *static_pb_protected_vidmem; - - // Static pushbuffer staging buffer for WLC - uvm_rm_mem_t *static_pb_unprotected_sysmem; - void *static_pb_unprotected_sysmem_cpu; - void *static_pb_unprotected_sysmem_auth_tag_cpu; - - // The above static locations are required by the WLC (and LCIC) - // schedule. Protected sysmem location completes WLC's independence - // from the pushbuffer allocator. + // Protected sysmem location makes WLC independent from the pushbuffer + // allocator. Unprotected sysmem and protected vidmem counterparts + // are allocated from the channel pool (sysmem, vidmem). void *static_pb_protected_sysmem; - // Static tracking semaphore notifier values - // Because of LCIC's fixed schedule, the secure semaphore release - // mechanism uses two additional static locations for incrementing the - // notifier values. See: - // . channel_semaphore_secure_release() - // . setup_lcic_schedule() - // . internal_channel_submit_work_wlc() - uvm_rm_mem_t *static_notifier_unprotected_sysmem; - NvU32 *static_notifier_entry_unprotected_sysmem_cpu; - NvU32 *static_notifier_exit_unprotected_sysmem_cpu; - uvm_gpu_address_t static_notifier_entry_unprotected_sysmem_gpu_va; - uvm_gpu_address_t static_notifier_exit_unprotected_sysmem_gpu_va; - - // Explicit location for push launch tag used by WLC. - // Encryption auth tags have to be located in unprotected sysmem. - void *launch_auth_tag_cpu; - NvU64 launch_auth_tag_gpu_va; - // Used to decrypt the push back to protected sysmem. // This happens when profilers register callbacks for migration data. uvm_push_crypto_bundle_t *push_crypto_bundles; - - // Accompanying authentication tags for the crypto bundles - uvm_rm_mem_t *push_crypto_bundle_auth_tags; } conf_computing; // RM channel information @@ -451,6 +466,16 @@ struct uvm_channel_manager_struct UVM_BUFFER_LOCATION gpput_loc; UVM_BUFFER_LOCATION pushbuffer_loc; } conf; + + struct + { + // Flag indicating that the WLC/LCIC mechanism is ready/setup; should + // only be false during (de)initialization. + bool wlc_ready; + + // True indicates that key rotation is enabled (UVM-wise). + bool key_rotation_enabled; + } conf_computing; }; // Create a channel manager for the GPU @@ -501,6 +526,12 @@ uvm_channel_t *uvm_channel_lcic_get_paired_wlc(uvm_channel_t *lcic_channel); uvm_channel_t *uvm_channel_wlc_get_paired_lcic(uvm_channel_t *wlc_channel); +NvU64 uvm_channel_get_static_pb_protected_vidmem_gpu_va(uvm_channel_t *channel); + +NvU64 uvm_channel_get_static_pb_unprotected_sysmem_gpu_va(uvm_channel_t *channel); + +char* uvm_channel_get_static_pb_unprotected_sysmem_cpu(uvm_channel_t *channel); + static bool uvm_channel_pool_is_proxy(uvm_channel_pool_t *pool) { UVM_ASSERT(uvm_pool_type_is_valid(pool->pool_type)); @@ -532,6 +563,17 @@ static uvm_channel_type_t uvm_channel_proxy_channel_type(void) return UVM_CHANNEL_TYPE_MEMOPS; } +// Force key rotation in the engine associated with the given channel pool. +// Rotation may still not happen if RM cannot acquire the necessary locks (in +// which case the function returns NV_ERR_STATE_IN_USE). +// +// This function should be only invoked in pools in which key rotation is +// enabled. +NV_STATUS uvm_channel_pool_rotate_key(uvm_channel_pool_t *pool); + +// Retrieve the current encryption key version associated with the channel pool. +NvU32 uvm_channel_pool_key_version(uvm_channel_pool_t *pool); + // Privileged channels support all the Host and engine methods, while // non-privileged channels don't support privileged methods. // @@ -579,12 +621,9 @@ NvU32 uvm_channel_manager_update_progress(uvm_channel_manager_t *channel_manager // beginning. NV_STATUS uvm_channel_manager_wait(uvm_channel_manager_t *manager); -// Check if WLC/LCIC mechanism is ready/setup -// Should only return false during initialization static bool uvm_channel_manager_is_wlc_ready(uvm_channel_manager_t *manager) { - return (manager->pool_to_use.default_for_type[UVM_CHANNEL_TYPE_WLC] != NULL) && - (manager->pool_to_use.default_for_type[UVM_CHANNEL_TYPE_LCIC] != NULL); + return manager->conf_computing.wlc_ready; } // Get the GPU VA of semaphore_channel's tracking semaphore within the VA space // associated with access_channel. diff --git a/kernel-open/nvidia-uvm/uvm_channel_test.c b/kernel-open/nvidia-uvm/uvm_channel_test.c index a321ae332f..90230ac666 100644 --- a/kernel-open/nvidia-uvm/uvm_channel_test.c +++ b/kernel-open/nvidia-uvm/uvm_channel_test.c @@ -796,11 +796,8 @@ static NV_STATUS stress_test_all_gpus_in_va(uvm_va_space_t *va_space, static NV_STATUS test_conf_computing_channel_selection(uvm_va_space_t *va_space) { NV_STATUS status = NV_OK; - uvm_channel_pool_t *pool; - uvm_push_t *pushes; - uvm_gpu_t *gpu; - NvU32 i; - NvU32 num_pushes; + uvm_push_t *pushes = NULL; + uvm_gpu_t *gpu = NULL; if (!g_uvm_global.conf_computing_enabled) return NV_OK; @@ -810,9 +807,19 @@ static NV_STATUS test_conf_computing_channel_selection(uvm_va_space_t *va_space) for_each_va_space_gpu(gpu, va_space) { uvm_channel_type_t channel_type; + // Key rotation is disabled because this test relies on nested pushes, + // which is illegal. If any push other than the first one triggers key + // rotation, the test won't complete. This is because key rotation + // depends on waiting for ongoing pushes to end, which doesn't happen + // if those pushes are ended after the current one begins. + uvm_conf_computing_disable_key_rotation(gpu); + for (channel_type = 0; channel_type < UVM_CHANNEL_TYPE_COUNT; channel_type++) { - pool = gpu->channel_manager->pool_to_use.default_for_type[channel_type]; - TEST_CHECK_RET(pool != NULL); + NvU32 i; + NvU32 num_pushes; + uvm_channel_pool_t *pool = gpu->channel_manager->pool_to_use.default_for_type[channel_type]; + + TEST_CHECK_GOTO(pool != NULL, error); // Skip LCIC channels as those can't accept any pushes if (uvm_channel_pool_is_lcic(pool)) @@ -824,7 +831,7 @@ static NV_STATUS test_conf_computing_channel_selection(uvm_va_space_t *va_space) num_pushes = min(pool->num_channels, (NvU32)UVM_PUSH_MAX_CONCURRENT_PUSHES); pushes = uvm_kvmalloc_zero(sizeof(*pushes) * num_pushes); - TEST_CHECK_RET(pushes != NULL); + TEST_CHECK_GOTO(pushes != NULL, error); for (i = 0; i < num_pushes; i++) { uvm_push_t *push = &pushes[i]; @@ -841,12 +848,18 @@ static NV_STATUS test_conf_computing_channel_selection(uvm_va_space_t *va_space) uvm_kvfree(pushes); } + + uvm_conf_computing_enable_key_rotation(gpu); } uvm_thread_context_lock_enable_tracking(); return status; + error: + if (gpu != NULL) + uvm_conf_computing_enable_key_rotation(gpu); + uvm_thread_context_lock_enable_tracking(); uvm_kvfree(pushes); @@ -948,6 +961,318 @@ static NV_STATUS test_channel_iv_rotation(uvm_va_space_t *va_space) return NV_OK; } +static NV_STATUS force_key_rotations(uvm_channel_pool_t *pool, unsigned num_rotations) +{ + unsigned num_tries; + unsigned max_num_tries = 20; + unsigned num_rotations_completed = 0; + + if (num_rotations == 0) + return NV_OK; + + // The number of accepted rotations is kept low, so failed rotation + // invocations due to RM not acquiring the necessary locks (which imply a + // sleep in the test) do not balloon the test execution time. + UVM_ASSERT(num_rotations <= 10); + + for (num_tries = 0; (num_tries < max_num_tries) && (num_rotations_completed < num_rotations); num_tries++) { + // Force key rotation, irrespective of encryption usage. + NV_STATUS status = uvm_channel_pool_rotate_key(pool); + + // Key rotation may not be able to complete due to RM failing to acquire + // the necessary locks. Detect the situation, sleep for a bit, and then + // try again + // + // The maximum time spent sleeping in a single rotation call is + // (max_num_tries * max_sleep_us) + if (status == NV_ERR_STATE_IN_USE) { + NvU32 min_sleep_us = 1000; + NvU32 max_sleep_us = 10000; + + usleep_range(min_sleep_us, max_sleep_us); + continue; + } + + TEST_NV_CHECK_RET(status); + + num_rotations_completed++; + } + + // If not a single key rotation occurred, the dependent tests still pass, + // but there is no much value to them. Instead, return an error so the + // maximum number of tries, or the maximum sleep time, are adjusted to + // ensure that at least one rotation completes. + if (num_rotations_completed > 0) + return NV_OK; + else + return NV_ERR_STATE_IN_USE; +} + +static NV_STATUS force_key_rotation(uvm_channel_pool_t *pool) +{ + return force_key_rotations(pool, 1); +} + +// Test key rotation in all pools. This is useful because key rotation may not +// happen otherwise on certain engines during UVM test execution. For example, +// if the MEMOPS channel type is mapped to a CE not shared with any other +// channel type, then the only encryption taking place in the engine is due to +// semaphore releases (4 bytes each). This small encryption size makes it +// unlikely to exceed even small rotation thresholds. +static NV_STATUS test_channel_key_rotation_basic(uvm_gpu_t *gpu) +{ + uvm_channel_pool_t *pool; + + uvm_for_each_pool(pool, gpu->channel_manager) { + if (!uvm_conf_computing_is_key_rotation_enabled_in_pool(pool)) + continue; + + TEST_NV_CHECK_RET(force_key_rotation(pool)); + } + + return NV_OK; +} + +// Interleave GPU encryptions and decryptions, and their CPU counterparts, with +// key rotations. +static NV_STATUS test_channel_key_rotation_interleave(uvm_gpu_t *gpu) +{ + int i; + uvm_channel_pool_t *gpu_to_cpu_pool; + uvm_channel_pool_t *cpu_to_gpu_pool; + NV_STATUS status = NV_OK; + size_t size = UVM_CONF_COMPUTING_DMA_BUFFER_SIZE; + void *initial_plain_cpu = NULL; + void *final_plain_cpu = NULL; + uvm_mem_t *plain_gpu = NULL; + uvm_gpu_address_t plain_gpu_address; + + cpu_to_gpu_pool = gpu->channel_manager->pool_to_use.default_for_type[UVM_CHANNEL_TYPE_CPU_TO_GPU]; + TEST_CHECK_RET(uvm_conf_computing_is_key_rotation_enabled_in_pool(cpu_to_gpu_pool)); + + gpu_to_cpu_pool = gpu->channel_manager->pool_to_use.default_for_type[UVM_CHANNEL_TYPE_GPU_TO_CPU]; + TEST_CHECK_RET(uvm_conf_computing_is_key_rotation_enabled_in_pool(gpu_to_cpu_pool)); + + initial_plain_cpu = uvm_kvmalloc_zero(size); + if (initial_plain_cpu == NULL) { + status = NV_ERR_NO_MEMORY; + goto out; + } + + final_plain_cpu = uvm_kvmalloc_zero(size); + if (final_plain_cpu == NULL) { + status = NV_ERR_NO_MEMORY; + goto out; + } + + TEST_NV_CHECK_GOTO(uvm_mem_alloc_vidmem(size, gpu, &plain_gpu), out); + TEST_NV_CHECK_GOTO(uvm_mem_map_gpu_kernel(plain_gpu, gpu), out); + plain_gpu_address = uvm_mem_gpu_address_virtual_kernel(plain_gpu, gpu); + + memset(initial_plain_cpu, 1, size); + + for (i = 0; i < 5; i++) { + TEST_NV_CHECK_GOTO(force_key_rotation(gpu_to_cpu_pool), out); + TEST_NV_CHECK_GOTO(force_key_rotation(cpu_to_gpu_pool), out); + + TEST_NV_CHECK_GOTO(uvm_conf_computing_util_memcopy_cpu_to_gpu(gpu, + plain_gpu_address, + initial_plain_cpu, + size, + NULL, + "CPU > GPU"), + out); + + TEST_NV_CHECK_GOTO(force_key_rotation(gpu_to_cpu_pool), out); + TEST_NV_CHECK_GOTO(force_key_rotation(cpu_to_gpu_pool), out); + + TEST_NV_CHECK_GOTO(uvm_conf_computing_util_memcopy_gpu_to_cpu(gpu, + final_plain_cpu, + plain_gpu_address, + size, + NULL, + "GPU > CPU"), + out); + + TEST_CHECK_GOTO(!memcmp(initial_plain_cpu, final_plain_cpu, size), out); + + memset(final_plain_cpu, 0, size); + } + +out: + uvm_mem_free(plain_gpu); + uvm_kvfree(final_plain_cpu); + uvm_kvfree(initial_plain_cpu); + + return status; +} + +static NV_STATUS memset_vidmem(uvm_mem_t *mem, NvU8 val) +{ + uvm_push_t push; + uvm_gpu_address_t gpu_address; + uvm_gpu_t *gpu = mem->backing_gpu; + + UVM_ASSERT(uvm_mem_is_vidmem(mem)); + + TEST_NV_CHECK_RET(uvm_push_begin(gpu->channel_manager, UVM_CHANNEL_TYPE_GPU_INTERNAL, &push, "zero vidmem")); + + gpu_address = uvm_mem_gpu_address_virtual_kernel(mem, gpu); + gpu->parent->ce_hal->memset_1(&push, gpu_address, val, mem->size); + + TEST_NV_CHECK_RET(uvm_push_end_and_wait(&push)); + + return NV_OK; +} + +// Custom version of uvm_conf_computing_util_memcopy_gpu_to_cpu that allows +// testing to insert key rotations in between the push end, and the CPU +// decryption +static NV_STATUS encrypted_memcopy_gpu_to_cpu(uvm_gpu_t *gpu, + void *dst_plain, + uvm_gpu_address_t src_gpu_address, + size_t size, + unsigned num_rotations_to_insert) +{ + NV_STATUS status; + uvm_push_t push; + uvm_conf_computing_dma_buffer_t *dma_buffer; + uvm_gpu_address_t dst_gpu_address, auth_tag_gpu_address; + void *src_cipher, *auth_tag; + uvm_channel_t *channel; + + UVM_ASSERT(g_uvm_global.conf_computing_enabled); + UVM_ASSERT(size <= UVM_CONF_COMPUTING_DMA_BUFFER_SIZE); + + status = uvm_conf_computing_dma_buffer_alloc(&gpu->conf_computing.dma_buffer_pool, &dma_buffer, NULL); + if (status != NV_OK) + return status; + + status = uvm_push_begin(gpu->channel_manager, UVM_CHANNEL_TYPE_GPU_TO_CPU, &push, "Small GPU > CPU encryption"); + if (status != NV_OK) + goto out; + + channel = push.channel; + uvm_conf_computing_log_gpu_encryption(channel, size, dma_buffer->decrypt_iv); + dma_buffer->key_version[0] = uvm_channel_pool_key_version(channel->pool); + + dst_gpu_address = uvm_mem_gpu_address_virtual_kernel(dma_buffer->alloc, gpu); + auth_tag_gpu_address = uvm_mem_gpu_address_virtual_kernel(dma_buffer->auth_tag, gpu); + gpu->parent->ce_hal->encrypt(&push, dst_gpu_address, src_gpu_address, size, auth_tag_gpu_address); + + status = uvm_push_end_and_wait(&push); + if (status != NV_OK) + goto out; + + TEST_NV_CHECK_GOTO(force_key_rotations(channel->pool, num_rotations_to_insert), out); + + // If num_rotations_to_insert is not zero, the current encryption key will + // be different from the one used during CE encryption. + + src_cipher = uvm_mem_get_cpu_addr_kernel(dma_buffer->alloc); + auth_tag = uvm_mem_get_cpu_addr_kernel(dma_buffer->auth_tag); + status = uvm_conf_computing_cpu_decrypt(channel, + dst_plain, + src_cipher, + dma_buffer->decrypt_iv, + dma_buffer->key_version[0], + size, + auth_tag); + + out: + uvm_conf_computing_dma_buffer_free(&gpu->conf_computing.dma_buffer_pool, dma_buffer, NULL); + return status; +} + +static NV_STATUS test_channel_key_rotation_cpu_decryption(uvm_gpu_t *gpu, + unsigned num_repetitions, + unsigned num_rotations_to_insert) +{ + unsigned i; + uvm_channel_pool_t *gpu_to_cpu_pool; + NV_STATUS status = NV_OK; + size_t size = UVM_CONF_COMPUTING_DMA_BUFFER_SIZE; + NvU8 *plain_cpu = NULL; + uvm_mem_t *plain_gpu = NULL; + uvm_gpu_address_t plain_gpu_address; + + if (!uvm_conf_computing_is_key_rotation_enabled(gpu)) + return NV_OK; + + gpu_to_cpu_pool = gpu->channel_manager->pool_to_use.default_for_type[UVM_CHANNEL_TYPE_GPU_TO_CPU]; + TEST_CHECK_RET(uvm_conf_computing_is_key_rotation_enabled_in_pool(gpu_to_cpu_pool)); + + plain_cpu = (NvU8 *) uvm_kvmalloc_zero(size); + if (plain_cpu == NULL) { + status = NV_ERR_NO_MEMORY; + goto out; + } + + TEST_NV_CHECK_GOTO(uvm_mem_alloc_vidmem(size, gpu, &plain_gpu), out); + TEST_NV_CHECK_GOTO(uvm_mem_map_gpu_kernel(plain_gpu, gpu), out); + TEST_NV_CHECK_GOTO(memset_vidmem(plain_gpu, 1), out); + + plain_gpu_address = uvm_mem_gpu_address_virtual_kernel(plain_gpu, gpu); + + for (i = 0; i < num_repetitions; i++) { + unsigned j; + + TEST_NV_CHECK_GOTO(encrypted_memcopy_gpu_to_cpu(gpu, + plain_cpu, + plain_gpu_address, + size, + num_rotations_to_insert), + out); + + for (j = 0; j < size; j++) + TEST_CHECK_GOTO(plain_cpu[j] == 1, out); + + memset(plain_cpu, 0, size); + + } +out: + uvm_mem_free(plain_gpu); + uvm_kvfree(plain_cpu); + + return status; +} + +// Test that CPU decryptions can use old keys i.e. previous versions of the keys +// that are no longer the current key, due to key rotation. Given that SEC2 +// does not expose encryption capabilities, the "decrypt-after-rotation" problem +// is exclusive of CE encryptions. +static NV_STATUS test_channel_key_rotation_decrypt_after_key_rotation(uvm_gpu_t *gpu) +{ + // Instruct encrypted_memcopy_gpu_to_cpu to insert several key rotations + // between the GPU encryption, and the associated CPU decryption. + unsigned num_rotations_to_insert = 8; + + TEST_NV_CHECK_RET(test_channel_key_rotation_cpu_decryption(gpu, 1, num_rotations_to_insert)); + + return NV_OK; +} + +static NV_STATUS test_channel_key_rotation(uvm_va_space_t *va_space) +{ + uvm_gpu_t *gpu; + + if (!g_uvm_global.conf_computing_enabled) + return NV_OK; + + for_each_va_space_gpu(gpu, va_space) { + if (!uvm_conf_computing_is_key_rotation_enabled(gpu)) + break; + + TEST_NV_CHECK_RET(test_channel_key_rotation_basic(gpu)); + + TEST_NV_CHECK_RET(test_channel_key_rotation_interleave(gpu)); + + TEST_NV_CHECK_RET(test_channel_key_rotation_decrypt_after_key_rotation(gpu)); + } + + return NV_OK; +} + static NV_STATUS test_write_ctrl_gpfifo_noop(uvm_va_space_t *va_space) { uvm_gpu_t *gpu; @@ -1094,7 +1419,7 @@ static NV_STATUS test_write_ctrl_gpfifo_tight(uvm_va_space_t *va_space) TEST_NV_CHECK_GOTO(uvm_channel_write_ctrl_gpfifo(channel, entry), error); // Release the semaphore. - UVM_WRITE_ONCE(*cpu_ptr, 1); + WRITE_ONCE(*cpu_ptr, 1); TEST_NV_CHECK_GOTO(uvm_push_wait(&push), error); @@ -1203,6 +1528,10 @@ NV_STATUS uvm_test_channel_sanity(UVM_TEST_CHANNEL_SANITY_PARAMS *params, struct if (status != NV_OK) goto done; + status = test_channel_key_rotation(va_space); + if (status != NV_OK) + goto done; + // The following tests have side effects, they reset the GPU's // channel_manager. status = test_channel_pushbuffer_extension_base(va_space); @@ -1338,6 +1667,126 @@ static NV_STATUS uvm_test_channel_noop_push(uvm_va_space_t *va_space, return status; } +static NV_STATUS channel_stress_key_rotation_cpu_encryption(uvm_gpu_t *gpu, UVM_TEST_CHANNEL_STRESS_PARAMS *params) +{ + int i; + uvm_channel_pool_t *cpu_to_gpu_pool; + NV_STATUS status = NV_OK; + size_t size = UVM_CONF_COMPUTING_DMA_BUFFER_SIZE; + void *initial_plain_cpu = NULL; + uvm_mem_t *plain_gpu = NULL; + uvm_gpu_address_t plain_gpu_address; + + UVM_ASSERT(params->key_rotation_operation == UVM_TEST_CHANNEL_STRESS_KEY_ROTATION_OPERATION_CPU_TO_GPU); + + cpu_to_gpu_pool = gpu->channel_manager->pool_to_use.default_for_type[UVM_CHANNEL_TYPE_CPU_TO_GPU]; + TEST_CHECK_RET(uvm_conf_computing_is_key_rotation_enabled_in_pool(cpu_to_gpu_pool)); + + initial_plain_cpu = uvm_kvmalloc_zero(size); + if (initial_plain_cpu == NULL) { + status = NV_ERR_NO_MEMORY; + goto out; + } + + TEST_NV_CHECK_GOTO(uvm_mem_alloc_vidmem(size, gpu, &plain_gpu), out); + TEST_NV_CHECK_GOTO(uvm_mem_map_gpu_kernel(plain_gpu, gpu), out); + plain_gpu_address = uvm_mem_gpu_address_virtual_kernel(plain_gpu, gpu); + + memset(initial_plain_cpu, 1, size); + + for (i = 0; i < params->iterations; i++) { + TEST_NV_CHECK_GOTO(uvm_conf_computing_util_memcopy_cpu_to_gpu(gpu, + plain_gpu_address, + initial_plain_cpu, + size, + NULL, + "CPU > GPU"), + out); + } + +out: + uvm_mem_free(plain_gpu); + uvm_kvfree(initial_plain_cpu); + + return status; +} + +static NV_STATUS channel_stress_key_rotation_cpu_decryption(uvm_gpu_t *gpu, UVM_TEST_CHANNEL_STRESS_PARAMS *params) +{ + unsigned num_rotations_to_insert = 0; + + UVM_ASSERT(params->key_rotation_operation == UVM_TEST_CHANNEL_STRESS_KEY_ROTATION_OPERATION_GPU_TO_CPU); + + return test_channel_key_rotation_cpu_decryption(gpu, params->iterations, num_rotations_to_insert); +} + +static NV_STATUS channel_stress_key_rotation_rotate(uvm_gpu_t *gpu, UVM_TEST_CHANNEL_STRESS_PARAMS *params) +{ + NvU32 i; + + UVM_ASSERT(params->key_rotation_operation == UVM_TEST_CHANNEL_STRESS_KEY_ROTATION_OPERATION_ROTATE); + + for (i = 0; i < params->iterations; ++i) { + NV_STATUS status; + uvm_channel_pool_t *pool; + uvm_channel_type_t type; + + if ((i % 3) == 0) + type = UVM_CHANNEL_TYPE_CPU_TO_GPU; + else if ((i % 3) == 1) + type = UVM_CHANNEL_TYPE_GPU_TO_CPU; + else + type = UVM_CHANNEL_TYPE_WLC; + + pool = gpu->channel_manager->pool_to_use.default_for_type[type]; + + if (!uvm_conf_computing_is_key_rotation_enabled_in_pool(pool)) + return NV_ERR_INVALID_STATE; + + status = force_key_rotation(pool); + if (status != NV_OK) + return status; + } + + return NV_OK; +} + +// The objective of this test is documented in the user-level function +static NV_STATUS uvm_test_channel_stress_key_rotation(uvm_va_space_t *va_space, UVM_TEST_CHANNEL_STRESS_PARAMS *params) +{ + uvm_test_rng_t rng; + uvm_gpu_t *gpu; + NV_STATUS status = NV_OK; + + if (!g_uvm_global.conf_computing_enabled) + return NV_OK; + + uvm_test_rng_init(&rng, params->seed); + + uvm_va_space_down_read(va_space); + + // Key rotation should be enabled, or disabled, in all GPUs. Pick a random + // one. + gpu = random_va_space_gpu(&rng, va_space); + + if (!uvm_conf_computing_is_key_rotation_enabled(gpu)) + goto out; + + if (params->key_rotation_operation == UVM_TEST_CHANNEL_STRESS_KEY_ROTATION_OPERATION_CPU_TO_GPU) + status = channel_stress_key_rotation_cpu_encryption(gpu, params); + else if (params->key_rotation_operation == UVM_TEST_CHANNEL_STRESS_KEY_ROTATION_OPERATION_GPU_TO_CPU) + status = channel_stress_key_rotation_cpu_decryption(gpu, params); + else if (params->key_rotation_operation == UVM_TEST_CHANNEL_STRESS_KEY_ROTATION_OPERATION_ROTATE) + status = channel_stress_key_rotation_rotate(gpu, params); + else + status = NV_ERR_INVALID_PARAMETER; + +out: + uvm_va_space_up_read(va_space); + + return status; +} + NV_STATUS uvm_test_channel_stress(UVM_TEST_CHANNEL_STRESS_PARAMS *params, struct file *filp) { uvm_va_space_t *va_space = uvm_va_space_get(filp); @@ -1349,6 +1798,8 @@ NV_STATUS uvm_test_channel_stress(UVM_TEST_CHANNEL_STRESS_PARAMS *params, struct return uvm_test_channel_stress_update_channels(va_space, params); case UVM_TEST_CHANNEL_STRESS_MODE_NOOP_PUSH: return uvm_test_channel_noop_push(va_space, params); + case UVM_TEST_CHANNEL_STRESS_MODE_KEY_ROTATION: + return uvm_test_channel_stress_key_rotation(va_space, params); default: return NV_ERR_INVALID_PARAMETER; } diff --git a/kernel-open/nvidia-uvm/uvm_common.c b/kernel-open/nvidia-uvm/uvm_common.c index e44503c28b..5f84200415 100644 --- a/kernel-open/nvidia-uvm/uvm_common.c +++ b/kernel-open/nvidia-uvm/uvm_common.c @@ -281,29 +281,6 @@ NV_STATUS uvm_spin_loop(uvm_spin_loop_t *spin) return NV_OK; } -// This formats a GPU UUID, in a UVM-friendly way. That is, nearly the same as -// what nvidia-smi reports. It will always prefix the UUID with UVM-GPU so -// that we know that we have a real, binary formatted UUID that will work in -// the UVM APIs. -// -// It comes out like this: -// -// UVM-GPU-d802726c-df8d-a3c3-ec53-48bdec201c27 -// -// This routine will always null-terminate the string for you. This is true -// even if the buffer was too small! -// -// Return value is the number of non-null characters written. -// -// Note that if you were to let the NV2080_CTRL_CMD_GPU_GET_GID_INFO command -// return it's default format, which is ascii, not binary, then you would get -// this back: -// -// GPU-d802726c-df8d-a3c3-ec53-48bdec201c27 -// -// ...which is actually a character string, and won't work for UVM API calls. -// So it's very important to be able to see the difference. -// static char uvm_digit_to_hex(unsigned value) { if (value >= 10) @@ -312,27 +289,19 @@ static char uvm_digit_to_hex(unsigned value) return value + '0'; } -int format_uuid_to_buffer(char *buffer, unsigned bufferLength, const NvProcessorUuid *pUuidStruct) +void uvm_uuid_string(char *buffer, const NvProcessorUuid *pUuidStruct) { - char *str = buffer+8; + char *str = buffer; unsigned i; unsigned dashMask = 1 << 4 | 1 << 6 | 1 << 8 | 1 << 10; - if (bufferLength < (8 /*prefix*/+ 16 * 2 /*digits*/ + 4 * 1 /*dashes*/ + 1 /*null*/)) - return *buffer = 0; - - memcpy(buffer, "UVM-GPU-", 8); - for (i = 0; i < 16; i++) { *str++ = uvm_digit_to_hex(pUuidStruct->uuid[i] >> 4); *str++ = uvm_digit_to_hex(pUuidStruct->uuid[i] & 0xF); - if (dashMask & (1 << (i+1))) + if (dashMask & (1 << (i + 1))) *str++ = '-'; } *str = 0; - - return (int)(str-buffer); } - diff --git a/kernel-open/nvidia-uvm/uvm_common.h b/kernel-open/nvidia-uvm/uvm_common.h index 4568f68588..7aeaf3d799 100644 --- a/kernel-open/nvidia-uvm/uvm_common.h +++ b/kernel-open/nvidia-uvm/uvm_common.h @@ -50,9 +50,12 @@ enum { NVIDIA_UVM_NUM_MINOR_DEVICES }; -#define UVM_GPU_UUID_TEXT_BUFFER_LENGTH (8+16*2+4+1) +// UUID has the format: xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx +#define UVM_UUID_STRING_LENGTH ((8 + 1) + 3 * (4 + 1) + 12 + 1) -int format_uuid_to_buffer(char *buffer, unsigned bufferLength, const NvProcessorUuid *pGpuUuid); +// Writes UVM_UUID_STRING_LENGTH characters into buffer, including a terminating +// NULL. +void uvm_uuid_string(char *buffer, const NvProcessorUuid *uuid); #define UVM_PRINT_FUNC_PREFIX(func, prefix, fmt, ...) \ func(prefix "%s:%u %s[pid:%d]" fmt, \ @@ -98,27 +101,9 @@ bool uvm_debug_prints_enabled(void); #define UVM_INFO_PRINT(fmt, ...) \ UVM_PRINT_FUNC_PREFIX_CHECK(printk, KERN_INFO NVIDIA_UVM_PRETTY_PRINTING_PREFIX, " " fmt, ##__VA_ARGS__) -// -// Please see the documentation of format_uuid_to_buffer, for details on what -// this routine prints for you. -// -#define UVM_DBG_PRINT_UUID(msg, uuidPtr) \ - do { \ - char uuidBuffer[UVM_GPU_UUID_TEXT_BUFFER_LENGTH]; \ - format_uuid_to_buffer(uuidBuffer, sizeof(uuidBuffer), uuidPtr); \ - UVM_DBG_PRINT("%s: %s\n", msg, uuidBuffer); \ - } while (0) - #define UVM_ERR_PRINT_NV_STATUS(msg, rmStatus, ...) \ UVM_ERR_PRINT("ERROR: %s : " msg "\n", nvstatusToString(rmStatus), ##__VA_ARGS__) -#define UVM_ERR_PRINT_UUID(msg, uuidPtr, ...) \ - do { \ - char uuidBuffer[UVM_GPU_UUID_TEXT_BUFFER_LENGTH]; \ - format_uuid_to_buffer(uuidBuffer, sizeof(uuidBuffer), uuidPtr); \ - UVM_ERR_PRINT("ERROR: %s : " msg "\n", uuidBuffer, ##__VA_ARGS__); \ - } while (0) - #define UVM_PANIC() UVM_PRINT_FUNC(panic, "\n") #define UVM_PANIC_MSG(fmt, ...) UVM_PRINT_FUNC(panic, ": " fmt, ##__VA_ARGS__) @@ -395,7 +380,7 @@ static inline void uvm_touch_page(struct page *page) UVM_ASSERT(page); mapping = (char *) kmap(page); - (void)UVM_READ_ONCE(*mapping); + (void)READ_ONCE(*mapping); kunmap(page); } diff --git a/kernel-open/nvidia-uvm/uvm_conf_computing.c b/kernel-open/nvidia-uvm/uvm_conf_computing.c index bd30f4650d..b2d165249d 100644 --- a/kernel-open/nvidia-uvm/uvm_conf_computing.c +++ b/kernel-open/nvidia-uvm/uvm_conf_computing.c @@ -33,6 +33,15 @@ #include "nv_uvm_interface.h" #include "uvm_va_block.h" +// Amount of encrypted data on a given engine that triggers key rotation. This +// is a UVM internal threshold, different from that of RM, and used only during +// testing. +// +// Key rotation is triggered when the total encryption size, or the total +// decryption size (whatever comes first) reaches this lower threshold on the +// engine. +#define UVM_CONF_COMPUTING_KEY_ROTATION_LOWER_THRESHOLD (UVM_SIZE_1MB * 8) + // The maximum number of secure operations per push is: // UVM_MAX_PUSH_SIZE / min(CE encryption size, CE decryption size) // + 1 (tracking semaphore) = 128 * 1024 / 56 + 1 = 2342 @@ -352,6 +361,19 @@ static NV_STATUS dummy_iv_mem_init(uvm_gpu_t *gpu) return status; } +// The production key rotation defaults are such that key rotations rarely +// happen. During UVM testing more frequent rotations are triggering by relying +// on internal encryption usage accounting. When key rotations are triggered by +// UVM, the driver does not rely on channel key rotation notifiers. +// +// TODO: Bug 4612912: UVM should be able to programmatically set the rotation +// lower threshold. This function, and all the metadata associated with it +// (per-pool encryption accounting, for example) can be removed at that point. +static bool key_rotation_is_notifier_driven(void) +{ + return !uvm_enable_builtin_tests; +} + NV_STATUS uvm_conf_computing_gpu_init(uvm_gpu_t *gpu) { NV_STATUS status; @@ -394,17 +416,35 @@ void uvm_conf_computing_gpu_deinit(uvm_gpu_t *gpu) conf_computing_dma_buffer_pool_deinit(&gpu->conf_computing.dma_buffer_pool); } -void uvm_conf_computing_log_gpu_encryption(uvm_channel_t *channel, UvmCslIv *iv) +void uvm_conf_computing_log_gpu_encryption(uvm_channel_t *channel, size_t size, UvmCslIv *iv) { NV_STATUS status; + uvm_channel_pool_t *pool; + + if (uvm_channel_is_lcic(channel)) + pool = uvm_channel_lcic_get_paired_wlc(channel)->pool; + else + pool = channel->pool; uvm_mutex_lock(&channel->csl.ctx_lock); + + if (uvm_conf_computing_is_key_rotation_enabled_in_pool(pool)) { + status = nvUvmInterfaceCslLogEncryption(&channel->csl.ctx, UVM_CSL_OPERATION_DECRYPT, size); + + // Informing RM of an encryption/decryption should not fail + UVM_ASSERT(status == NV_OK); + + if (!key_rotation_is_notifier_driven()) + atomic64_add(size, &pool->conf_computing.key_rotation.encrypted); + } + status = nvUvmInterfaceCslIncrementIv(&channel->csl.ctx, UVM_CSL_OPERATION_DECRYPT, 1, iv); - uvm_mutex_unlock(&channel->csl.ctx_lock); // IV rotation is done preemptively as needed, so the above // call cannot return failure. UVM_ASSERT(status == NV_OK); + + uvm_mutex_unlock(&channel->csl.ctx_lock); } void uvm_conf_computing_acquire_encryption_iv(uvm_channel_t *channel, UvmCslIv *iv) @@ -428,27 +468,46 @@ void uvm_conf_computing_cpu_encrypt(uvm_channel_t *channel, void *auth_tag_buffer) { NV_STATUS status; + uvm_channel_pool_t *pool; UVM_ASSERT(size); + if (uvm_channel_is_lcic(channel)) + pool = uvm_channel_lcic_get_paired_wlc(channel)->pool; + else + pool = channel->pool; + uvm_mutex_lock(&channel->csl.ctx_lock); + status = nvUvmInterfaceCslEncrypt(&channel->csl.ctx, size, (NvU8 const *) src_plain, encrypt_iv, (NvU8 *) dst_cipher, (NvU8 *) auth_tag_buffer); - uvm_mutex_unlock(&channel->csl.ctx_lock); // IV rotation is done preemptively as needed, so the above // call cannot return failure. UVM_ASSERT(status == NV_OK); + + if (uvm_conf_computing_is_key_rotation_enabled_in_pool(pool)) { + status = nvUvmInterfaceCslLogEncryption(&channel->csl.ctx, UVM_CSL_OPERATION_ENCRYPT, size); + + // Informing RM of an encryption/decryption should not fail + UVM_ASSERT(status == NV_OK); + + if (!key_rotation_is_notifier_driven()) + atomic64_add(size, &pool->conf_computing.key_rotation.decrypted); + } + + uvm_mutex_unlock(&channel->csl.ctx_lock); } NV_STATUS uvm_conf_computing_cpu_decrypt(uvm_channel_t *channel, void *dst_plain, const void *src_cipher, const UvmCslIv *src_iv, + NvU32 key_version, size_t size, const void *auth_tag_buffer) { @@ -469,11 +528,19 @@ NV_STATUS uvm_conf_computing_cpu_decrypt(uvm_channel_t *channel, size, (const NvU8 *) src_cipher, src_iv, - NV_U32_MAX, + key_version, (NvU8 *) dst_plain, NULL, 0, (const NvU8 *) auth_tag_buffer); + + if (status != NV_OK) { + UVM_ERR_PRINT("nvUvmInterfaceCslDecrypt() failed: %s, channel %s, GPU %s\n", + nvstatusToString(status), + channel->name, + uvm_gpu_name(uvm_channel_get_gpu(channel))); + } + uvm_mutex_unlock(&channel->csl.ctx_lock); return status; @@ -640,3 +707,231 @@ NV_STATUS uvm_conf_computing_maybe_rotate_channel_ivs_retry_busy(uvm_channel_t * { return uvm_conf_computing_rotate_channel_ivs_below_limit(channel, uvm_conf_computing_channel_iv_rotation_limit, true); } + +void uvm_conf_computing_enable_key_rotation(uvm_gpu_t *gpu) +{ + if (!g_uvm_global.conf_computing_enabled) + return; + + // Key rotation cannot be enabled on UVM if it is disabled on RM + if (!gpu->parent->rm_info.gpuConfComputeCaps.bKeyRotationEnabled) + return; + + gpu->channel_manager->conf_computing.key_rotation_enabled = true; +} + +void uvm_conf_computing_disable_key_rotation(uvm_gpu_t *gpu) +{ + if (!g_uvm_global.conf_computing_enabled) + return; + + gpu->channel_manager->conf_computing.key_rotation_enabled = false; +} + +bool uvm_conf_computing_is_key_rotation_enabled(uvm_gpu_t *gpu) +{ + return gpu->channel_manager->conf_computing.key_rotation_enabled; +} + +bool uvm_conf_computing_is_key_rotation_enabled_in_pool(uvm_channel_pool_t *pool) +{ + if (!uvm_conf_computing_is_key_rotation_enabled(pool->manager->gpu)) + return false; + + // TODO: Bug 4586447: key rotation must be disabled in the SEC2 engine, + // because currently the encryption key is shared between UVM and RM, but + // UVM is not able to idle SEC2 channels owned by RM. + if (uvm_channel_pool_is_sec2(pool)) + return false; + + // Key rotation happens as part of channel reservation, and LCIC channels + // are never reserved directly. Rotation of keys in LCIC channels happens + // as the result of key rotation in WLC channels. + // + // Return false even if there is nothing fundamental prohibiting direct key + // rotation on LCIC pools + if (uvm_channel_pool_is_lcic(pool)) + return false; + + return true; +} + +static bool conf_computing_is_key_rotation_pending_use_stats(uvm_channel_pool_t *pool) +{ + NvU64 decrypted, encrypted; + + UVM_ASSERT(!key_rotation_is_notifier_driven()); + + decrypted = atomic64_read(&pool->conf_computing.key_rotation.decrypted); + + if (decrypted > UVM_CONF_COMPUTING_KEY_ROTATION_LOWER_THRESHOLD) + return true; + + encrypted = atomic64_read(&pool->conf_computing.key_rotation.encrypted); + + if (encrypted > UVM_CONF_COMPUTING_KEY_ROTATION_LOWER_THRESHOLD) + return true; + + return false; +} + +static bool conf_computing_is_key_rotation_pending_use_notifier(uvm_channel_pool_t *pool) +{ + // If key rotation is pending for the pool's engine, then the key rotation + // notifier in any of the engine channels can be used by UVM to detect the + // situation. Note that RM doesn't update all the notifiers in a single + // atomic operation, so it is possible that the channel read by UVM (the + // first one in the pool) indicates that a key rotation is pending, but + // another channel in the pool (temporarily) indicates the opposite, or vice + // versa. + uvm_channel_t *first_channel = pool->channels; + + UVM_ASSERT(key_rotation_is_notifier_driven()); + UVM_ASSERT(first_channel != NULL); + + return first_channel->channel_info.keyRotationNotifier->status == UVM_KEY_ROTATION_STATUS_PENDING; +} + +bool uvm_conf_computing_is_key_rotation_pending_in_pool(uvm_channel_pool_t *pool) +{ + if (!uvm_conf_computing_is_key_rotation_enabled_in_pool(pool)) + return false; + + if (key_rotation_is_notifier_driven()) + return conf_computing_is_key_rotation_pending_use_notifier(pool); + else + return conf_computing_is_key_rotation_pending_use_stats(pool); +} + +NV_STATUS uvm_conf_computing_rotate_pool_key(uvm_channel_pool_t *pool) +{ + NV_STATUS status; + + UVM_ASSERT(uvm_conf_computing_is_key_rotation_enabled_in_pool(pool)); + UVM_ASSERT(pool->conf_computing.key_rotation.csl_contexts != NULL); + UVM_ASSERT(pool->conf_computing.key_rotation.num_csl_contexts > 0); + + // NV_ERR_STATE_IN_USE indicates that RM was not able to acquire the + // required locks at this time. This status is not interpreted as an error, + // but as a sign for UVM to try again later. This is the same "protocol" + // used in IV rotation. + status = nvUvmInterfaceCslRotateKey(pool->conf_computing.key_rotation.csl_contexts, + pool->conf_computing.key_rotation.num_csl_contexts); + + if (status == NV_OK) { + pool->conf_computing.key_rotation.version++; + + if (!key_rotation_is_notifier_driven()) { + atomic64_set(&pool->conf_computing.key_rotation.decrypted, 0); + atomic64_set(&pool->conf_computing.key_rotation.encrypted, 0); + } + } + else if (status != NV_ERR_STATE_IN_USE) { + UVM_DBG_PRINT("nvUvmInterfaceCslRotateKey() failed in engine %u: %s\n", + pool->engine_index, + nvstatusToString(status)); + } + + return status; +} + +__attribute__ ((format(printf, 6, 7))) +NV_STATUS uvm_conf_computing_util_memcopy_cpu_to_gpu(uvm_gpu_t *gpu, + uvm_gpu_address_t dst_gpu_address, + void *src_plain, + size_t size, + uvm_tracker_t *tracker, + const char *format, + ...) +{ + NV_STATUS status; + uvm_push_t push; + uvm_conf_computing_dma_buffer_t *dma_buffer; + uvm_gpu_address_t src_gpu_address, auth_tag_gpu_address; + void *dst_cipher, *auth_tag; + va_list args; + + UVM_ASSERT(g_uvm_global.conf_computing_enabled); + UVM_ASSERT(size <= UVM_CONF_COMPUTING_DMA_BUFFER_SIZE); + + status = uvm_conf_computing_dma_buffer_alloc(&gpu->conf_computing.dma_buffer_pool, &dma_buffer, NULL); + if (status != NV_OK) + return status; + + va_start(args, format); + status = uvm_push_begin_acquire(gpu->channel_manager, UVM_CHANNEL_TYPE_CPU_TO_GPU, tracker, &push, format, args); + va_end(args); + + if (status != NV_OK) + goto out; + + dst_cipher = uvm_mem_get_cpu_addr_kernel(dma_buffer->alloc); + auth_tag = uvm_mem_get_cpu_addr_kernel(dma_buffer->auth_tag); + uvm_conf_computing_cpu_encrypt(push.channel, dst_cipher, src_plain, NULL, size, auth_tag); + + src_gpu_address = uvm_mem_gpu_address_virtual_kernel(dma_buffer->alloc, gpu); + auth_tag_gpu_address = uvm_mem_gpu_address_virtual_kernel(dma_buffer->auth_tag, gpu); + gpu->parent->ce_hal->decrypt(&push, dst_gpu_address, src_gpu_address, size, auth_tag_gpu_address); + + status = uvm_push_end_and_wait(&push); + +out: + uvm_conf_computing_dma_buffer_free(&gpu->conf_computing.dma_buffer_pool, dma_buffer, NULL); + return status; +} + +__attribute__ ((format(printf, 6, 7))) +NV_STATUS uvm_conf_computing_util_memcopy_gpu_to_cpu(uvm_gpu_t *gpu, + void *dst_plain, + uvm_gpu_address_t src_gpu_address, + size_t size, + uvm_tracker_t *tracker, + const char *format, + ...) +{ + NV_STATUS status; + uvm_push_t push; + uvm_conf_computing_dma_buffer_t *dma_buffer; + uvm_gpu_address_t dst_gpu_address, auth_tag_gpu_address; + void *src_cipher, *auth_tag; + va_list args; + + UVM_ASSERT(g_uvm_global.conf_computing_enabled); + UVM_ASSERT(size <= UVM_CONF_COMPUTING_DMA_BUFFER_SIZE); + + status = uvm_conf_computing_dma_buffer_alloc(&gpu->conf_computing.dma_buffer_pool, &dma_buffer, NULL); + if (status != NV_OK) + return status; + + va_start(args, format); + status = uvm_push_begin_acquire(gpu->channel_manager, UVM_CHANNEL_TYPE_GPU_TO_CPU, tracker, &push, format, args); + va_end(args); + + if (status != NV_OK) + goto out; + + uvm_conf_computing_log_gpu_encryption(push.channel, size, dma_buffer->decrypt_iv); + dma_buffer->key_version[0] = uvm_channel_pool_key_version(push.channel->pool); + + dst_gpu_address = uvm_mem_gpu_address_virtual_kernel(dma_buffer->alloc, gpu); + auth_tag_gpu_address = uvm_mem_gpu_address_virtual_kernel(dma_buffer->auth_tag, gpu); + gpu->parent->ce_hal->encrypt(&push, dst_gpu_address, src_gpu_address, size, auth_tag_gpu_address); + + status = uvm_push_end_and_wait(&push); + if (status != NV_OK) + goto out; + + src_cipher = uvm_mem_get_cpu_addr_kernel(dma_buffer->alloc); + auth_tag = uvm_mem_get_cpu_addr_kernel(dma_buffer->auth_tag); + status = uvm_conf_computing_cpu_decrypt(push.channel, + dst_plain, + src_cipher, + dma_buffer->decrypt_iv, + dma_buffer->key_version[0], + size, + auth_tag); + + out: + uvm_conf_computing_dma_buffer_free(&gpu->conf_computing.dma_buffer_pool, dma_buffer, NULL); + return status; +} diff --git a/kernel-open/nvidia-uvm/uvm_conf_computing.h b/kernel-open/nvidia-uvm/uvm_conf_computing.h index 0bac7a811e..5b5f30cae7 100644 --- a/kernel-open/nvidia-uvm/uvm_conf_computing.h +++ b/kernel-open/nvidia-uvm/uvm_conf_computing.h @@ -87,9 +87,9 @@ typedef struct // a free buffer. uvm_tracker_t tracker; - // When the DMA buffer is used as the destination of a GPU encryption, SEC2 - // writes the authentication tag here. Later when the buffer is decrypted - // on the CPU the authentication tag is used again (read) for CSL to verify + // When the DMA buffer is used as the destination of a GPU encryption, the + // engine (CE or SEC2) writes the authentication tag here. When the buffer + // is decrypted on the CPU the authentication tag is used by CSL to verify // the authenticity. The allocation is big enough for one authentication // tag per PAGE_SIZE page in the alloc buffer. uvm_mem_t *auth_tag; @@ -98,7 +98,12 @@ typedef struct // to the authentication tag. The allocation is big enough for one IV per // PAGE_SIZE page in the alloc buffer. The granularity between the decrypt // IV and authentication tag must match. - UvmCslIv decrypt_iv[(UVM_CONF_COMPUTING_DMA_BUFFER_SIZE / PAGE_SIZE)]; + UvmCslIv decrypt_iv[UVM_CONF_COMPUTING_DMA_BUFFER_SIZE / PAGE_SIZE]; + + // When the DMA buffer is used as the destination of a GPU encryption, the + // key version used during GPU encryption of each PAGE_SIZE page can be + // saved here, so CPU decryption uses the correct decryption key. + NvU32 key_version[UVM_CONF_COMPUTING_DMA_BUFFER_SIZE / PAGE_SIZE]; // Bitmap of the encrypted pages in the backing allocation uvm_page_mask_t encrypted_page_mask; @@ -147,7 +152,7 @@ NV_STATUS uvm_conf_computing_gpu_init(uvm_gpu_t *gpu); void uvm_conf_computing_gpu_deinit(uvm_gpu_t *gpu); // Logs encryption information from the GPU and returns the IV. -void uvm_conf_computing_log_gpu_encryption(uvm_channel_t *channel, UvmCslIv *iv); +void uvm_conf_computing_log_gpu_encryption(uvm_channel_t *channel, size_t size, UvmCslIv *iv); // Acquires next CPU encryption IV and returns it. void uvm_conf_computing_acquire_encryption_iv(uvm_channel_t *channel, UvmCslIv *iv); @@ -167,10 +172,14 @@ void uvm_conf_computing_cpu_encrypt(uvm_channel_t *channel, // CPU side decryption helper. Decrypts data from src_cipher and writes the // plain text in dst_plain. src_cipher and dst_plain can't overlap. IV obtained // from uvm_conf_computing_log_gpu_encryption() needs to be be passed to src_iv. +// +// The caller must indicate which key to use for decryption by passing the +// appropiate key version number. NV_STATUS uvm_conf_computing_cpu_decrypt(uvm_channel_t *channel, void *dst_plain, const void *src_cipher, const UvmCslIv *src_iv, + NvU32 key_version, size_t size, const void *auth_tag_buffer); @@ -214,4 +223,71 @@ NV_STATUS uvm_conf_computing_maybe_rotate_channel_ivs_retry_busy(uvm_channel_t * // Check if there are fewer than 'limit' messages available in either direction // and rotate if not. NV_STATUS uvm_conf_computing_rotate_channel_ivs_below_limit(uvm_channel_t *channel, NvU64 limit, bool retry_if_busy); + +// Rotate the engine key associated with the given channel pool. +NV_STATUS uvm_conf_computing_rotate_pool_key(uvm_channel_pool_t *pool); + +// Returns true if key rotation is allowed in the channel pool. +bool uvm_conf_computing_is_key_rotation_enabled_in_pool(uvm_channel_pool_t *pool); + +// Returns true if key rotation is pending in the channel pool. +bool uvm_conf_computing_is_key_rotation_pending_in_pool(uvm_channel_pool_t *pool); + +// Enable/disable key rotation in the passed GPU. Note that UVM enablement is +// dependent on RM enablement: key rotation may still be disabled upon calling +// this function, if it is disabled in RM. On the other hand, key rotation can +// be disabled in UVM, even if it is enabled in RM. +// +// Enablement/Disablement affects only kernel key rotation in keys owned by UVM. +// It doesn't affect user key rotation (CUDA, Video...), nor it affects RM +// kernel key rotation. +void uvm_conf_computing_enable_key_rotation(uvm_gpu_t *gpu); +void uvm_conf_computing_disable_key_rotation(uvm_gpu_t *gpu); + +// Returns true if key rotation is enabled on UVM in the given GPU. Key rotation +// can be enabled on the GPU but disabled on some of GPU engines (LCEs or SEC2), +// see uvm_conf_computing_is_key_rotation_enabled_in_pool. +bool uvm_conf_computing_is_key_rotation_enabled(uvm_gpu_t *gpu); + +// Launch a synchronous, encrypted copy between CPU and GPU. +// +// The maximum copy size allowed is UVM_CONF_COMPUTING_DMA_BUFFER_SIZE. +// +// The source CPU buffer pointed by src_plain contains the unencrypted (plain +// text) contents; the function internally performs a CPU-side encryption step +// before launching the GPU-side CE decryption. The source buffer can be in +// protected or unprotected sysmem, while the destination buffer must be in +// protected vidmem. +// +// The input tracker, if not NULL, is internally acquired by the push +// responsible for the encrypted copy. +__attribute__ ((format(printf, 6, 7))) +NV_STATUS uvm_conf_computing_util_memcopy_cpu_to_gpu(uvm_gpu_t *gpu, + uvm_gpu_address_t dst_gpu_address, + void *src_plain, + size_t size, + uvm_tracker_t *tracker, + const char *format, + ...); + +// Launch a synchronous, encrypted copy between CPU and GPU. +// +// The maximum copy size allowed is UVM_CONF_COMPUTING_DMA_BUFFER_SIZE. +// +// The source CPU buffer pointed by src_plain contains the unencrypted (plain +// text) contents; the function internally performs a CPU-side encryption step +// before launching the GPU-side CE decryption. The source buffer can be in +// protected or unprotected sysmem, while the destination buffer must be in +// protected vidmem. +// +// The input tracker, if not NULL, is internally acquired by the push +// responsible for the encrypted copy. +__attribute__ ((format(printf, 6, 7))) +NV_STATUS uvm_conf_computing_util_memcopy_gpu_to_cpu(uvm_gpu_t *gpu, + void *dst_plain, + uvm_gpu_address_t src_gpu_address, + size_t size, + uvm_tracker_t *tracker, + const char *format, + ...); #endif // __UVM_CONF_COMPUTING_H__ diff --git a/kernel-open/nvidia-uvm/uvm_debug_optimized.c b/kernel-open/nvidia-uvm/uvm_debug_optimized.c deleted file mode 100644 index af4a4cfbc1..0000000000 --- a/kernel-open/nvidia-uvm/uvm_debug_optimized.c +++ /dev/null @@ -1,53 +0,0 @@ -/******************************************************************************* - Copyright (c) 2015 NVIDIA Corporation - - Permission is hereby granted, free of charge, to any person obtaining a copy - of this software and associated documentation files (the "Software"), to - deal in the Software without restriction, including without limitation the - rights to use, copy, modify, merge, publish, distribute, sublicense, and/or - sell copies of the Software, and to permit persons to whom the Software is - furnished to do so, subject to the following conditions: - - The above copyright notice and this permission notice shall be - included in all copies or substantial portions of the Software. - - THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - DEALINGS IN THE SOFTWARE. - -*******************************************************************************/ - -// This file provides simple wrappers that are always built with optimizations -// turned on to WAR issues with functions that don't build correctly otherwise. - -#include "uvm_linux.h" - -int nv_atomic_xchg(atomic_t *val, int new) -{ - return atomic_xchg(val, new); -} - -int nv_atomic_cmpxchg(atomic_t *val, int old, int new) -{ - return atomic_cmpxchg(val, old, new); -} - -long nv_atomic_long_cmpxchg(atomic_long_t *val, long old, long new) -{ - return atomic_long_cmpxchg(val, old, new); -} - -unsigned long nv_copy_from_user(void *to, const void __user *from, unsigned long n) -{ - return copy_from_user(to, from, n); -} - -unsigned long nv_copy_to_user(void __user *to, const void *from, unsigned long n) -{ - return copy_to_user(to, from, n); -} - diff --git a/kernel-open/nvidia-uvm/uvm_forward_decl.h b/kernel-open/nvidia-uvm/uvm_forward_decl.h index c9db6a79d8..a719fd600b 100644 --- a/kernel-open/nvidia-uvm/uvm_forward_decl.h +++ b/kernel-open/nvidia-uvm/uvm_forward_decl.h @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2015-2022 NVIDIA Corporation + Copyright (c) 2015-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -42,7 +42,6 @@ typedef struct uvm_gpu_semaphore_struct uvm_gpu_semaphore_t; typedef struct uvm_gpu_tracking_semaphore_struct uvm_gpu_tracking_semaphore_t; typedef struct uvm_gpu_semaphore_pool_struct uvm_gpu_semaphore_pool_t; typedef struct uvm_gpu_semaphore_pool_page_struct uvm_gpu_semaphore_pool_page_t; -typedef struct uvm_gpu_peer_struct uvm_gpu_peer_t; typedef struct uvm_mmu_mode_hal_struct uvm_mmu_mode_hal_t; typedef struct uvm_channel_manager_struct uvm_channel_manager_t; @@ -57,6 +56,12 @@ typedef struct uvm_gpfifo_entry_struct uvm_gpfifo_entry_t; typedef struct uvm_va_policy_struct uvm_va_policy_t; typedef struct uvm_va_range_struct uvm_va_range_t; +typedef struct uvm_va_range_managed_struct uvm_va_range_managed_t; +typedef struct uvm_va_range_external_struct uvm_va_range_external_t; +typedef struct uvm_va_range_channel_struct uvm_va_range_channel_t; +typedef struct uvm_va_range_sked_reflected_struct uvm_va_range_sked_reflected_t; +typedef struct uvm_va_range_semaphore_pool_struct uvm_va_range_semaphore_pool_t; +typedef struct uvm_va_range_device_p2p_struct uvm_va_range_device_p2p_t; typedef struct uvm_va_block_struct uvm_va_block_t; typedef struct uvm_va_block_test_struct uvm_va_block_test_t; typedef struct uvm_va_block_wrapper_struct uvm_va_block_wrapper_t; diff --git a/kernel-open/nvidia-uvm/uvm_get_rm_ptes_test.c b/kernel-open/nvidia-uvm/uvm_get_rm_ptes_test.c index 43cbf5f55f..2b91a4af99 100644 --- a/kernel-open/nvidia-uvm/uvm_get_rm_ptes_test.c +++ b/kernel-open/nvidia-uvm/uvm_get_rm_ptes_test.c @@ -115,8 +115,8 @@ static NV_STATUS verify_mapping_info(uvm_va_space_t *va_space, TEST_CHECK_RET(skip); - memory_owning_gpu = uvm_va_space_get_gpu_by_uuid(va_space, &memory_info->uuid); - if (memory_owning_gpu == NULL) + memory_owning_gpu = uvm_va_space_get_gpu_by_mem_info(va_space, memory_info); + if (!memory_owning_gpu) return NV_ERR_INVALID_DEVICE; aperture = get_aperture(va_space, memory_owning_gpu, memory_mapping_gpu, memory_info, sli_supported); @@ -129,7 +129,8 @@ static NV_STATUS verify_mapping_info(uvm_va_space_t *va_space, phys_offset = mapping_offset; // Add the physical offset for nvswitch connected peer mappings - if (uvm_aperture_is_peer(aperture) && uvm_gpus_are_nvswitch_connected(memory_mapping_gpu, memory_owning_gpu)) + if (uvm_aperture_is_peer(aperture) && + uvm_parent_gpus_are_nvswitch_connected(memory_mapping_gpu->parent, memory_owning_gpu->parent)) phys_offset += memory_owning_gpu->parent->nvswitch_info.fabric_memory_window_start; for (index = 0; index < ext_mapping_info->numWrittenPtes; index++) { diff --git a/kernel-open/nvidia-uvm/uvm_global.c b/kernel-open/nvidia-uvm/uvm_global.c index 8bd16542f7..106458d289 100644 --- a/kernel-open/nvidia-uvm/uvm_global.c +++ b/kernel-open/nvidia-uvm/uvm_global.c @@ -412,7 +412,7 @@ void uvm_global_set_fatal_error_impl(NV_STATUS error) UVM_ASSERT(error != NV_OK); - previous_error = nv_atomic_cmpxchg(&g_uvm_global.fatal_error, NV_OK, error); + previous_error = atomic_cmpxchg(&g_uvm_global.fatal_error, NV_OK, error); if (previous_error == NV_OK) { UVM_ERR_PRINT("Encountered a global fatal error: %s\n", nvstatusToString(error)); @@ -421,6 +421,8 @@ void uvm_global_set_fatal_error_impl(NV_STATUS error) UVM_ERR_PRINT("Encountered a global fatal error: %s after a global error has been already set: %s\n", nvstatusToString(error), nvstatusToString(previous_error)); } + + nvUvmInterfaceReportFatalError(error); } NV_STATUS uvm_global_reset_fatal_error(void) @@ -430,7 +432,7 @@ NV_STATUS uvm_global_reset_fatal_error(void) return NV_ERR_INVALID_STATE; } - return nv_atomic_xchg(&g_uvm_global.fatal_error, NV_OK); + return atomic_xchg(&g_uvm_global.fatal_error, NV_OK); } void uvm_global_gpu_retain(const uvm_processor_mask_t *mask) diff --git a/kernel-open/nvidia-uvm/uvm_global.h b/kernel-open/nvidia-uvm/uvm_global.h index 810fc297e0..e5da0f2fbc 100644 --- a/kernel-open/nvidia-uvm/uvm_global.h +++ b/kernel-open/nvidia-uvm/uvm_global.h @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2015-2023 NVIDIA Corporation + Copyright (c) 2015-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -52,19 +52,23 @@ struct uvm_global_struct // Created on module load and destroyed on module unload uvmGpuSessionHandle rm_session_handle; - // peer-to-peer table - // peer info is added and removed from this table when usermode - // driver calls UvmEnablePeerAccess and UvmDisablePeerAccess - // respectively. - uvm_gpu_peer_t peers[UVM_MAX_UNIQUE_GPU_PAIRS]; + // Peer-to-peer table for storing parent GPU and MIG instance peer info. + // Note that MIG instances can be peers within a single parent GPU or + // be peers in different parent GPUs if NVLINK or PCIe peers is enabled. + // PCIe and MIG peer info is added and removed from this table when + // usermode driver calls UvmEnablePeerAccess() and UvmDisablePeerAccess() + // respectively. NvLink and MIG peers are updated when UvmRegisterGpu() and + // UvmUnregisterGpu() are called. Peer to peer state for MIG instances + // within the same parent GPU are not stored here. + uvm_parent_gpu_peer_t parent_gpu_peers[UVM_MAX_UNIQUE_PARENT_GPU_PAIRS]; // peer-to-peer copy mode // Pascal+ GPUs support virtual addresses in p2p copies. // Ampere+ GPUs add support for physical addresses in p2p copies. uvm_gpu_peer_copy_mode_t peer_copy_mode; - // Stores an NV_STATUS, once it becomes != NV_OK, the driver should refuse to - // do most anything other than try and clean up as much as possible. + // Stores an NV_STATUS, once it becomes != NV_OK, the driver should refuse + // to do most anything other than try and clean up as much as possible. // An example of a fatal error is an unrecoverable ECC error on one of the // GPUs. atomic_t fatal_error; @@ -232,12 +236,12 @@ static uvmGpuSessionHandle uvm_global_session_handle(void) // suspended. #define UVM_GPU_WRITE_ONCE(x, val) do { \ UVM_ASSERT(!uvm_global_is_suspended()); \ - UVM_WRITE_ONCE(x, val); \ + WRITE_ONCE(x, val); \ } while (0) #define UVM_GPU_READ_ONCE(x) ({ \ UVM_ASSERT(!uvm_global_is_suspended()); \ - UVM_READ_ONCE(x); \ + READ_ONCE(x); \ }) static bool global_is_fatal_error_assert_disabled(void) @@ -384,7 +388,7 @@ static uvm_gpu_t *uvm_gpu_find_next_valid_gpu_in_parent(uvm_parent_gpu_t *parent (parent_gpu) = uvm_global_find_next_parent_gpu((parent_gpu))) // LOCKING: Must hold the global_lock -#define for_each_gpu_in_parent(parent_gpu, gpu) \ +#define for_each_gpu_in_parent(gpu, parent_gpu) \ for (({uvm_assert_mutex_locked(&g_uvm_global.global_lock); \ (gpu) = uvm_gpu_find_next_valid_gpu_in_parent((parent_gpu), NULL);}); \ (gpu) != NULL; \ diff --git a/kernel-open/nvidia-uvm/uvm_gpu.c b/kernel-open/nvidia-uvm/uvm_gpu.c index 8a8eef5838..2d7add310d 100644 --- a/kernel-open/nvidia-uvm/uvm_gpu.c +++ b/kernel-open/nvidia-uvm/uvm_gpu.c @@ -57,12 +57,6 @@ MODULE_PARM_DESC(uvm_peer_copy, "Choose the addressing mode for peer copying, op UVM_PARAM_PEER_COPY_PHYSICAL " [default] or " UVM_PARAM_PEER_COPY_VIRTUAL ". " "Valid for Ampere+ GPUs."); -static void remove_gpu(uvm_gpu_t *gpu); -static void disable_peer_access(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1); -static NV_STATUS discover_smc_peers(uvm_gpu_t *gpu); -static NV_STATUS discover_nvlink_peers(uvm_gpu_t *gpu); -static void destroy_nvlink_peers(uvm_gpu_t *gpu); - static uvm_user_channel_t *get_user_channel(uvm_rb_tree_node_t *node) { return container_of(node, uvm_user_channel_t, instance_ptr.node); @@ -92,7 +86,7 @@ static uvm_gpu_link_type_t get_gpu_link_type(UVM_LINK_TYPE link_type) static void fill_parent_gpu_info(uvm_parent_gpu_t *parent_gpu, const UvmGpuInfo *gpu_info) { - char uuid_buffer[UVM_GPU_UUID_TEXT_BUFFER_LENGTH]; + char uuid_buffer[UVM_UUID_STRING_LENGTH]; parent_gpu->rm_info = *gpu_info; @@ -118,10 +112,10 @@ static void fill_parent_gpu_info(uvm_parent_gpu_t *parent_gpu, const UvmGpuInfo if (parent_gpu->nvswitch_info.is_nvswitch_connected) parent_gpu->nvswitch_info.fabric_memory_window_start = gpu_info->nvswitchMemoryWindowStart; - format_uuid_to_buffer(uuid_buffer, sizeof(uuid_buffer), &parent_gpu->uuid); + uvm_uuid_string(uuid_buffer, &parent_gpu->uuid); snprintf(parent_gpu->name, sizeof(parent_gpu->name), - "ID %u: %s: %s", + "ID %u: %s: " UVM_PARENT_GPU_UUID_PREFIX "%s", uvm_parent_id_value(parent_gpu->id), parent_gpu->rm_info.name, uuid_buffer); @@ -150,7 +144,6 @@ static NV_STATUS get_gpu_caps(uvm_gpu_t *gpu) return NV_OK; } - // Return a PASID to use with the internal address space (AS), or -1 if not // supported. This PASID is needed to enable ATS in the internal AS, but it is // not used in address translation requests, which only translate GPA->SPA. @@ -231,10 +224,16 @@ static NV_STATUS alloc_and_init_address_space(uvm_gpu_t *gpu) return NV_OK; } +int uvm_device_p2p_static_bar(uvm_gpu_t *gpu) +{ + return nv_bar_index_to_os_bar_index(gpu->parent->pci_dev, NV_GPU_BAR_INDEX_FB); +} + static NV_STATUS get_gpu_fb_info(uvm_gpu_t *gpu) { NV_STATUS status; UvmGpuFbInfo fb_info = {0}; + unsigned long pci_bar1_addr = pci_resource_start(gpu->parent->pci_dev, uvm_device_p2p_static_bar(gpu)); status = uvm_rm_locked_call(nvUvmInterfaceGetFbInfo(uvm_gpu_device_handle(gpu), &fb_info)); if (status != NV_OK) @@ -246,6 +245,8 @@ static NV_STATUS get_gpu_fb_info(uvm_gpu_t *gpu) } gpu->mem_info.max_vidmem_page_size = fb_info.maxVidmemPageSize; + gpu->mem_info.static_bar1_start = pci_bar1_addr; + gpu->mem_info.static_bar1_size = fb_info.staticBar1Size; return NV_OK; } @@ -696,31 +697,136 @@ static void gpu_access_counters_print_common(uvm_parent_gpu_t *parent_gpu, struc (num_pages_out * (NvU64)PAGE_SIZE) / (1024u * 1024u)); } -void uvm_gpu_print(uvm_gpu_t *gpu) +// This function converts an index of 2D array of size [N x N] into an index +// of upper triangular array of size [((N - 1) * ((N - 1) + 1)) / 2] which +// does not include diagonal elements. +static NvU32 peer_table_index(NvU32 index0, NvU32 index1, NvU32 N) +{ + NvU32 square_index, triangular_index, min_index; + + UVM_ASSERT(index0 != index1); + UVM_ASSERT(index0 < N); + UVM_ASSERT(index1 < N); + + // Calculate an index of 2D array by re-ordering indices to always point + // to the same entry. + min_index = min(index0, index1); + square_index = min_index * N + max(index0, index1); + + // Calculate and subtract number of lower triangular matrix elements till + // the current row (which includes diagonal elements) to get the correct + // index in an upper triangular matrix. + triangular_index = square_index - SUM_FROM_0_TO_N(min_index + 1); + + return triangular_index; +} + +// This function converts an index of 2D array of size [N x N] into an index +// of upper triangular array of size [(N * (N + 1)) / 2] which does include +// diagonal elements. +static NvU32 sub_processor_peer_table_index(NvU32 index0, NvU32 index1) +{ + NvU32 square_index, triangular_index, min_index; + + UVM_ASSERT(index0 < UVM_PARENT_ID_MAX_SUB_PROCESSORS); + UVM_ASSERT(index1 < UVM_PARENT_ID_MAX_SUB_PROCESSORS); + + // Calculate an index of 2D array by re-ordering indices to always point + // to the same entry. + min_index = min(index0, index1); + square_index = min_index * UVM_PARENT_ID_MAX_SUB_PROCESSORS + max(index0, index1); + + // Calculate and subtract number of lower triangular matrix elements till + // the current row (which doesn't include diagonal elements) to get the + // correct index in an upper triangular matrix. + triangular_index = square_index - SUM_FROM_0_TO_N(min_index); + + return triangular_index; +} + +NvU32 uvm_gpu_pair_index(const uvm_gpu_id_t id0, const uvm_gpu_id_t id1) +{ + NvU32 index = peer_table_index(uvm_id_gpu_index(id0), uvm_id_gpu_index(id1), UVM_ID_MAX_GPUS); + + UVM_ASSERT(index < UVM_MAX_UNIQUE_GPU_PAIRS); + + return index; +} + +static NvU32 parent_gpu_peer_table_index(const uvm_parent_gpu_id_t id0, const uvm_parent_gpu_id_t id1) +{ + NvU32 index = peer_table_index(uvm_parent_id_gpu_index(id0), uvm_parent_id_gpu_index(id1), UVM_PARENT_ID_MAX_GPUS); + + UVM_ASSERT(index < UVM_MAX_UNIQUE_PARENT_GPU_PAIRS); + + return index; +} + +static NvU32 sub_processor_pair_index(const uvm_gpu_id_t id0, const uvm_gpu_id_t id1) +{ + NvU32 index = sub_processor_peer_table_index(uvm_id_sub_processor_index(id0), uvm_id_sub_processor_index(id1)); + + UVM_ASSERT(index < UVM_MAX_UNIQUE_SUB_PROCESSOR_PAIRS); + + return index; +} + +// Get the parent P2P capabilities between the given parent gpus. +static uvm_parent_gpu_peer_t *parent_gpu_peer_caps(const uvm_parent_gpu_t *parent_gpu0, + const uvm_parent_gpu_t *parent_gpu1) { - gpu_info_print_common(gpu, NULL); + return &g_uvm_global.parent_gpu_peers[parent_gpu_peer_table_index(parent_gpu0->id, parent_gpu1->id)]; } -static void gpu_peer_caps_print(uvm_gpu_t **gpu_pair, struct seq_file *s) +// Get the P2P capabilities between the given gpus. +static uvm_gpu_peer_t *gpu_peer_caps(const uvm_gpu_t *gpu0, const uvm_gpu_t *gpu1) { + uvm_parent_gpu_peer_t *parent_peer_caps = parent_gpu_peer_caps(gpu0->parent, gpu1->parent); + + return &parent_peer_caps->gpu_peers[sub_processor_pair_index(gpu0->id, gpu1->id)]; +} + +static uvm_aperture_t parent_gpu_peer_aperture(uvm_parent_gpu_t *local, + uvm_parent_gpu_t *remote, + uvm_parent_gpu_peer_t *parent_peer_caps) +{ + size_t peer_index; + + UVM_ASSERT(parent_peer_caps->ref_count); + UVM_ASSERT(parent_peer_caps->link_type != UVM_GPU_LINK_INVALID); + + if (uvm_parent_id_value(local->id) < uvm_parent_id_value(remote->id)) + peer_index = 0; + else + peer_index = 1; + + return UVM_APERTURE_PEER(parent_peer_caps->peer_ids[peer_index]); +} + +static void parent_gpu_peer_caps_print(uvm_parent_gpu_t **parent_gpu_pair, struct seq_file *s) +{ + uvm_parent_gpu_peer_t *parent_peer_caps; bool nvswitch_connected; uvm_aperture_t aperture; - uvm_gpu_peer_t *peer_caps; - uvm_gpu_t *local; - uvm_gpu_t *remote; + uvm_parent_gpu_t *local; + uvm_parent_gpu_t *remote; + const char *link_type; + NvU32 bandwidth; UVM_ASSERT(uvm_procfs_is_debug_enabled()); - local = gpu_pair[0]; - remote = gpu_pair[1]; - peer_caps = uvm_gpu_peer_caps(local, remote); - aperture = uvm_gpu_peer_aperture(local, remote); - nvswitch_connected = uvm_gpus_are_nvswitch_connected(local, remote); - UVM_SEQ_OR_DBG_PRINT(s, "Link type %s\n", uvm_gpu_link_type_string(peer_caps->link_type)); - UVM_SEQ_OR_DBG_PRINT(s, "Bandwidth %uMBps\n", peer_caps->total_link_line_rate_mbyte_per_s); + local = parent_gpu_pair[0]; + remote = parent_gpu_pair[1]; + parent_peer_caps = parent_gpu_peer_caps(local, remote); + link_type = uvm_gpu_link_type_string(parent_peer_caps->link_type); + bandwidth = parent_peer_caps->total_link_line_rate_mbyte_per_s; + aperture = parent_gpu_peer_aperture(local, remote, parent_peer_caps); + nvswitch_connected = uvm_parent_gpus_are_nvswitch_connected(local, remote); + UVM_SEQ_OR_DBG_PRINT(s, "Link type %s\n", link_type); + UVM_SEQ_OR_DBG_PRINT(s, "Bandwidth %uMBps\n", bandwidth); UVM_SEQ_OR_DBG_PRINT(s, "Aperture %s\n", uvm_aperture_string(aperture)); UVM_SEQ_OR_DBG_PRINT(s, "Connected through NVSWITCH %s\n", nvswitch_connected ? "True" : "False"); - UVM_SEQ_OR_DBG_PRINT(s, "Refcount %llu\n", UVM_READ_ONCE(peer_caps->ref_count)); + UVM_SEQ_OR_DBG_PRINT(s, "Refcount %llu\n", READ_ONCE(parent_peer_caps->ref_count)); } static int nv_procfs_read_gpu_info(struct seq_file *s, void *v) @@ -784,31 +890,49 @@ UVM_DEFINE_SINGLE_PROCFS_FILE(gpu_info_entry); UVM_DEFINE_SINGLE_PROCFS_FILE(gpu_fault_stats_entry); UVM_DEFINE_SINGLE_PROCFS_FILE(gpu_access_counters_entry); +static void uvm_parent_gpu_uuid_string(char *buffer, const NvProcessorUuid *uuid) +{ + memcpy(buffer, UVM_PARENT_GPU_UUID_PREFIX, sizeof(UVM_PARENT_GPU_UUID_PREFIX) - 1); + uvm_uuid_string(buffer + sizeof(UVM_PARENT_GPU_UUID_PREFIX) - 1, uuid); +} + +static void uvm_gpu_uuid_string(char *buffer, const NvProcessorUuid *uuid) +{ + memcpy(buffer, UVM_GPU_UUID_PREFIX, sizeof(UVM_GPU_UUID_PREFIX) - 1); + uvm_uuid_string(buffer + sizeof(UVM_GPU_UUID_PREFIX) - 1, uuid); +} + static NV_STATUS init_parent_procfs_dir(uvm_parent_gpu_t *parent_gpu) { struct proc_dir_entry *gpu_base_dir_entry; - char uuid_text_buffer[UVM_GPU_UUID_TEXT_BUFFER_LENGTH]; - char gpu_dir_name[sizeof(uuid_text_buffer) + 1]; + char gpu_dir_name[UVM_PARENT_GPU_UUID_STRING_LENGTH]; if (!uvm_procfs_is_enabled()) return NV_OK; gpu_base_dir_entry = uvm_procfs_get_gpu_base_dir(); - format_uuid_to_buffer(uuid_text_buffer, sizeof(uuid_text_buffer), &parent_gpu->uuid); - - // Create UVM-GPU-${UUID} directory - snprintf(gpu_dir_name, sizeof(gpu_dir_name), "%s", uuid_text_buffer); + // Create GPU-${physical-UUID} directory. + uvm_parent_gpu_uuid_string(gpu_dir_name, &parent_gpu->uuid); parent_gpu->procfs.dir = NV_CREATE_PROC_DIR(gpu_dir_name, gpu_base_dir_entry); if (parent_gpu->procfs.dir == NULL) return NV_ERR_OPERATING_SYSTEM; + // GPU peer files are debug only. + if (!uvm_procfs_is_debug_enabled()) + return NV_OK; + + parent_gpu->procfs.dir_peers = NV_CREATE_PROC_DIR(UVM_PROC_GPUS_PEER_DIR_NAME, parent_gpu->procfs.dir); + if (parent_gpu->procfs.dir_peers == NULL) + return NV_ERR_OPERATING_SYSTEM; + return NV_OK; } static void deinit_parent_procfs_dir(uvm_parent_gpu_t *parent_gpu) { + proc_remove(parent_gpu->procfs.dir_peers); proc_remove(parent_gpu->procfs.dir); } @@ -845,17 +969,17 @@ static NV_STATUS init_procfs_dirs(uvm_gpu_t *gpu) { struct proc_dir_entry *gpu_base_dir_entry; char symlink_name[16]; // Hold a uvm_gpu_id_t value in decimal. - char uuid_text_buffer[UVM_GPU_UUID_TEXT_BUFFER_LENGTH]; - char gpu_dir_name[sizeof(symlink_name) + sizeof(uuid_text_buffer) + 1]; + char uuid_buffer[max(UVM_PARENT_GPU_UUID_STRING_LENGTH, UVM_GPU_UUID_STRING_LENGTH)]; + char gpu_dir_name[sizeof(symlink_name) + sizeof(uuid_buffer) + 1]; if (!uvm_procfs_is_enabled()) return NV_OK; - format_uuid_to_buffer(uuid_text_buffer, sizeof(uuid_text_buffer), &gpu->parent->uuid); + uvm_parent_gpu_uuid_string(uuid_buffer, &gpu->parent->uuid); gpu_base_dir_entry = uvm_procfs_get_gpu_base_dir(); - // Create UVM-GPU-${physical-UUID}/${sub_processor_index} directory + // Create GPU-${physical-UUID}/${sub_processor_index} directory snprintf(gpu_dir_name, sizeof(gpu_dir_name), "%u", uvm_id_sub_processor_index(gpu->id)); gpu->procfs.dir = NV_CREATE_PROC_DIR(gpu_dir_name, gpu->parent->procfs.dir); @@ -863,34 +987,24 @@ static NV_STATUS init_procfs_dirs(uvm_gpu_t *gpu) return NV_ERR_OPERATING_SYSTEM; // Create symlink from ${gpu_id} to - // UVM-GPU-${physical-UUID}/${sub_processor_index} + // GPU-${physical-UUID}/${sub_processor_index} snprintf(symlink_name, sizeof(symlink_name), "%u", uvm_id_value(gpu->id)); snprintf(gpu_dir_name, sizeof(gpu_dir_name), "%s/%u", - uuid_text_buffer, + uuid_buffer, uvm_id_sub_processor_index(gpu->id)); gpu->procfs.dir_symlink = proc_symlink(symlink_name, gpu_base_dir_entry, gpu_dir_name); if (gpu->procfs.dir_symlink == NULL) return NV_ERR_OPERATING_SYSTEM; - if (gpu->parent->smc.enabled) { - // Create symlink from UVM-GPU-${GI-UUID} to - // UVM-GPU-${physical-UUID}/${sub_processor_index} - format_uuid_to_buffer(uuid_text_buffer, sizeof(uuid_text_buffer), &gpu->uuid); - - gpu->procfs.gpu_instance_uuid_symlink = proc_symlink(uuid_text_buffer, gpu_base_dir_entry, gpu_dir_name); - if (gpu->procfs.gpu_instance_uuid_symlink == NULL) - return NV_ERR_OPERATING_SYSTEM; - } - - // GPU peer files are debug only - if (!uvm_procfs_is_debug_enabled()) - return NV_OK; + // Create symlink from GI-${GI-UUID} to + // GPU-${physical-UUID}/${sub_processor_index} + uvm_gpu_uuid_string(uuid_buffer, &gpu->uuid); - gpu->procfs.dir_peers = NV_CREATE_PROC_DIR(UVM_PROC_GPUS_PEER_DIR_NAME, gpu->procfs.dir); - if (gpu->procfs.dir_peers == NULL) + gpu->procfs.gpu_instance_uuid_symlink = proc_symlink(uuid_buffer, gpu_base_dir_entry, gpu_dir_name); + if (gpu->procfs.gpu_instance_uuid_symlink == NULL) return NV_ERR_OPERATING_SYSTEM; return NV_OK; @@ -899,7 +1013,6 @@ static NV_STATUS init_procfs_dirs(uvm_gpu_t *gpu) // The kernel waits on readers to finish before returning from those calls static void deinit_procfs_dirs(uvm_gpu_t *gpu) { - proc_remove(gpu->procfs.dir_peers); proc_remove(gpu->procfs.gpu_instance_uuid_symlink); proc_remove(gpu->procfs.dir_symlink); proc_remove(gpu->procfs.dir); @@ -919,12 +1032,12 @@ static void deinit_procfs_files(uvm_gpu_t *gpu) proc_remove(gpu->procfs.info_file); } -static void deinit_procfs_peer_cap_files(uvm_gpu_peer_t *peer_caps) +static void deinit_procfs_parent_peer_cap_files(uvm_parent_gpu_peer_t *parent_peer_caps) { - proc_remove(peer_caps->procfs.peer_symlink_file[0]); - proc_remove(peer_caps->procfs.peer_symlink_file[1]); - proc_remove(peer_caps->procfs.peer_file[0]); - proc_remove(peer_caps->procfs.peer_file[1]); + proc_remove(parent_peer_caps->procfs.peer_symlink_file[0]); + proc_remove(parent_peer_caps->procfs.peer_symlink_file[1]); + proc_remove(parent_peer_caps->procfs.peer_file[0]); + proc_remove(parent_peer_caps->procfs.peer_file[1]); } static NV_STATUS init_semaphore_pools(uvm_gpu_t *gpu) @@ -1019,11 +1132,18 @@ static NV_STATUS alloc_parent_gpu(const NvProcessorUuid *gpu_uuid, // TODO: Bug 3881835: revisit whether to use nv_kthread_q_t or workqueue. status = errno_to_nv_status(nv_kthread_q_init(&parent_gpu->lazy_free_q, "vidmem lazy free")); + if (status != NV_OK) + goto cleanup; nv_kref_init(&parent_gpu->gpu_kref); *parent_gpu_out = parent_gpu; + return NV_OK; + +cleanup: + uvm_kvfree(parent_gpu); + return status; } @@ -1239,8 +1359,8 @@ static NV_STATUS init_parent_gpu(uvm_parent_gpu_t *parent_gpu, static NV_STATUS init_gpu(uvm_gpu_t *gpu, const UvmGpuInfo *gpu_info) { - char uuid_buffer[UVM_GPU_UUID_TEXT_BUFFER_LENGTH]; - size_t len; + char parent_uuid_buffer[UVM_UUID_STRING_LENGTH]; + char gi_uuid_buffer[UVM_UUID_STRING_LENGTH]; NV_STATUS status; if (gpu->parent->smc.enabled) { @@ -1258,19 +1378,14 @@ static NV_STATUS init_gpu(uvm_gpu_t *gpu, const UvmGpuInfo *gpu_info) uvm_uuid_copy(&gpu->uuid, &gpu_info->uuid); gpu->smc.swizz_id = gpu_info->smcSwizzId; - format_uuid_to_buffer(uuid_buffer, sizeof(uuid_buffer), &gpu->parent->uuid); + uvm_uuid_string(parent_uuid_buffer, &gpu->parent->uuid); + uvm_uuid_string(gi_uuid_buffer, &gpu->uuid); snprintf(gpu->name, sizeof(gpu->name), - "ID %u: %s", + "ID %u: " UVM_PARENT_GPU_UUID_PREFIX "%s " UVM_GPU_UUID_PREFIX "%s", uvm_id_value(gpu->id), - uuid_buffer + 4); - - format_uuid_to_buffer(uuid_buffer, sizeof(uuid_buffer), &gpu->uuid); - len = strlen(gpu->name); - snprintf(gpu->name + len, - sizeof(gpu->name) - len, - " UVM-GI-%s", - uuid_buffer + 8); + parent_uuid_buffer, + gi_uuid_buffer); // Initialize the per-GPU procfs dirs as early as possible so that other // parts of the driver can add files in them as part of their per-GPU init. @@ -1318,6 +1433,8 @@ static NV_STATUS init_gpu(uvm_gpu_t *gpu, const UvmGpuInfo *gpu_info) return status; } + uvm_pmm_gpu_device_p2p_init(gpu); + status = init_semaphore_pools(gpu); if (status != NV_OK) { UVM_ERR_PRINT("Failed to initialize the semaphore pool: %s, GPU %s\n", @@ -1371,137 +1488,6 @@ static NV_STATUS init_gpu(uvm_gpu_t *gpu, const UvmGpuInfo *gpu_info) return NV_OK; } -// Add a new gpu and register it with RM -// TODO: Bug 2844714: Split parent-specific parts of this function out into a -// separate add_parent_gpu() function. -static NV_STATUS add_gpu(const NvProcessorUuid *gpu_uuid, - const uvm_gpu_id_t gpu_id, - const UvmGpuInfo *gpu_info, - const UvmGpuPlatformInfo *gpu_platform_info, - uvm_parent_gpu_t *parent_gpu, - uvm_gpu_t **gpu_out) -{ - NV_STATUS status; - bool alloc_parent = (parent_gpu == NULL); - uvm_gpu_t *gpu = NULL; - - uvm_assert_mutex_locked(&g_uvm_global.global_lock); - - if (alloc_parent) { - status = alloc_parent_gpu(gpu_uuid, uvm_parent_gpu_id_from_gpu_id(gpu_id), &parent_gpu); - if (status != NV_OK) - return status; - } - - gpu = alloc_gpu(parent_gpu, gpu_id); - if (!gpu) { - if (alloc_parent) - uvm_parent_gpu_kref_put(parent_gpu); - - return NV_ERR_NO_MEMORY; - } - - parent_gpu->num_retained_gpus++; - - if (alloc_parent) - fill_parent_gpu_info(parent_gpu, gpu_info); - - // After this point all error clean up should be handled by remove_gpu() - - if (!gpu_supports_uvm(parent_gpu)) { - UVM_DBG_PRINT("Registration of non-UVM-capable GPU attempted: GPU %s\n", uvm_gpu_name(gpu)); - status = NV_ERR_NOT_SUPPORTED; - goto error; - } - - if (alloc_parent) { - status = init_parent_gpu(parent_gpu, gpu_uuid, gpu_info, gpu_platform_info); - if (status != NV_OK) - goto error; - } - - status = init_gpu(gpu, gpu_info); - if (status != NV_OK) - goto error; - - status = uvm_gpu_check_ecc_error(gpu); - if (status != NV_OK) - goto error; - - atomic64_set(&gpu->retained_count, 1); - uvm_processor_mask_set(&g_uvm_global.retained_gpus, gpu->id); - - uvm_spin_lock_irqsave(&g_uvm_global.gpu_table_lock); - - if (alloc_parent) - uvm_global_add_parent_gpu(parent_gpu); - - // Mark the GPU as valid in the parent GPU's GPU table. - UVM_ASSERT(!test_bit(uvm_id_sub_processor_index(gpu->id), parent_gpu->valid_gpus)); - __set_bit(uvm_id_sub_processor_index(gpu->id), parent_gpu->valid_gpus); - - // Although locking correctness does not, at this early point (before the - // GPU is visible in the table) strictly require holding the gpu_table_lock - // in order to read gpu->isr.replayable_faults.handling, nor to enable page - // fault interrupts (this could have been done earlier), it is best to do it - // here, in order to avoid an interrupt storm. That way, we take advantage - // of the spinlock_irqsave side effect of turning off local CPU interrupts, - // part of holding the gpu_table_lock. That means that the local CPU won't - // receive any of these interrupts, until the GPU is safely added to the - // table (where the top half ISR can find it). - // - // As usual with spinlock_irqsave behavior, *other* CPUs can still handle - // these interrupts, but the local CPU will not be slowed down (interrupted) - // by such handling, and can quickly release the gpu_table_lock, thus - // unblocking any other CPU's top half (which waits for the gpu_table_lock). - if (alloc_parent && parent_gpu->isr.replayable_faults.handling) { - parent_gpu->fault_buffer_hal->enable_replayable_faults(parent_gpu); - - // Clear the interrupt bit and force the re-evaluation of the interrupt - // condition to ensure that we don't miss any pending interrupt - parent_gpu->fault_buffer_hal->clear_replayable_faults(parent_gpu, - parent_gpu->fault_buffer_info.replayable.cached_get); - } - - // Access counters are enabled on demand - - uvm_spin_unlock_irqrestore(&g_uvm_global.gpu_table_lock); - - if (gpu->parent->smc.enabled) { - status = discover_smc_peers(gpu); - if (status != NV_OK) { - // Nobody can have retained the GPU yet, since we still hold the - // global lock. - UVM_ASSERT(uvm_gpu_retained_count(gpu) == 1); - atomic64_set(&gpu->retained_count, 0); - goto error; - } - } - else if (alloc_parent) { - status = discover_nvlink_peers(gpu); - if (status != NV_OK) { - UVM_ERR_PRINT("Failed to discover NVLINK peers: %s, GPU %s\n", - nvstatusToString(status), - uvm_gpu_name(gpu)); - - // Nobody can have retained the GPU yet, since we still hold the - // global lock. - UVM_ASSERT(uvm_gpu_retained_count(gpu) == 1); - atomic64_set(&gpu->retained_count, 0); - goto error; - } - } - - *gpu_out = gpu; - - return NV_OK; - -error: - remove_gpu(gpu); - - return status; -} - static void sync_parent_gpu_trackers(uvm_parent_gpu_t *parent_gpu, bool sync_replay_tracker, bool sync_clear_faulted_tracker) @@ -1529,6 +1515,16 @@ static void sync_parent_gpu_trackers(uvm_parent_gpu_t *parent_gpu, if (status != NV_OK) UVM_ASSERT(status == uvm_global_get_status()); } + + // Sync the access counter clear tracker too. + if (parent_gpu->access_counters_supported) { + uvm_parent_gpu_access_counters_isr_lock(parent_gpu); + status = uvm_tracker_wait(&parent_gpu->access_counter_buffer_info.clear_tracker); + uvm_parent_gpu_access_counters_isr_unlock(parent_gpu); + + if (status != NV_OK) + UVM_ASSERT(status == uvm_global_get_status()); + } } // Remove all references the given GPU has to other GPUs, since one of those @@ -1629,6 +1625,8 @@ static void deinit_gpu(uvm_gpu_t *gpu) deinit_semaphore_pools(gpu); + uvm_pmm_gpu_device_p2p_deinit(gpu); + uvm_pmm_sysmem_mappings_deinit(&gpu->pmm_reverse_sysmem_mappings); uvm_pmm_gpu_deinit(&gpu->pmm); @@ -1646,100 +1644,28 @@ static void deinit_gpu(uvm_gpu_t *gpu) gpu->magic = 0; } -// Remove a gpu and unregister it from RM -// Note that this is also used in most error paths in add_gpu() -static void remove_gpu(uvm_gpu_t *gpu) +// Do not not call this directly. It is called by nv_kref_put, when the +// GPU's ref count drops to zero. +static void uvm_parent_gpu_destroy(nv_kref_t *nv_kref) { + uvm_parent_gpu_t *parent_gpu = container_of(nv_kref, uvm_parent_gpu_t, gpu_kref); NvU32 sub_processor_index; - uvm_parent_gpu_t *parent_gpu; - bool free_parent; - - uvm_assert_mutex_locked(&g_uvm_global.global_lock); - - sub_processor_index = uvm_id_sub_processor_index(gpu->id); - parent_gpu = gpu->parent; - - UVM_ASSERT_MSG(uvm_gpu_retained_count(gpu) == 0, - "gpu_id %u retained_count %llu\n", - uvm_id_value(gpu->id), - uvm_gpu_retained_count(gpu)); - UVM_ASSERT(parent_gpu->num_retained_gpus > 0); - parent_gpu->num_retained_gpus--; + UVM_ASSERT(parent_gpu->num_retained_gpus == 0); + UVM_ASSERT(bitmap_empty(parent_gpu->valid_gpus, UVM_PARENT_ID_MAX_SUB_PROCESSORS)); - free_parent = (parent_gpu->num_retained_gpus == 0); + nv_kthread_q_stop(&parent_gpu->lazy_free_q); - // NVLINK peers must be removed and the relevant access counter buffers must - // be flushed before removing this GPU from the global table. See the - // comment on discover_nvlink_peers in add_gpu. - if (free_parent) - destroy_nvlink_peers(gpu); + for_each_sub_processor_index(sub_processor_index) + UVM_ASSERT(!parent_gpu->gpus[sub_processor_index]); - // uvm_mem_free and other uvm_mem APIs invoked by the Confidential Compute - // deinitialization must be called before the GPU is removed from the global - // table. - // - // TODO: Bug 2008200: Add and remove the GPU in a more reasonable spot. - uvm_conf_computing_gpu_deinit(gpu); + uvm_kvfree(parent_gpu); +} - // If the parent is not being freed, the following gpu_table_lock is only - // needed to protect concurrent uvm_parent_gpu_find_first_valid_gpu() in BH - // from the __clear_bit here. - // In the free_parent case, gpu_table_lock protects the top half from the - // uvm_global_remove_parent_gpu() - uvm_spin_lock_irqsave(&g_uvm_global.gpu_table_lock); - - // Mark the GPU as invalid in the parent GPU's GPU table. - __clear_bit(sub_processor_index, parent_gpu->valid_gpus); - - // Remove the GPU from the table. - if (free_parent) - uvm_global_remove_parent_gpu(parent_gpu); - - uvm_spin_unlock_irqrestore(&g_uvm_global.gpu_table_lock); - - uvm_processor_mask_clear(&g_uvm_global.retained_gpus, gpu->id); - - // If the parent is being freed, stop scheduling new bottom halves and - // update relevant software state. Else flush any pending bottom halves - // before continuing. - if (free_parent) - uvm_parent_gpu_disable_isr(parent_gpu); - else - uvm_parent_gpu_flush_bottom_halves(parent_gpu); - - deinit_gpu(gpu); - - UVM_ASSERT(parent_gpu->gpus[sub_processor_index] == gpu); - parent_gpu->gpus[sub_processor_index] = NULL; - uvm_kvfree(gpu); - - if (free_parent) - deinit_parent_gpu(parent_gpu); -} - -// Do not not call this directly. It is called by nv_kref_put, when the -// GPU's ref count drops to zero. -static void uvm_parent_gpu_destroy(nv_kref_t *nv_kref) -{ - uvm_parent_gpu_t *parent_gpu = container_of(nv_kref, uvm_parent_gpu_t, gpu_kref); - NvU32 sub_processor_index; - - UVM_ASSERT(parent_gpu->num_retained_gpus == 0); - UVM_ASSERT(bitmap_empty(parent_gpu->valid_gpus, UVM_PARENT_ID_MAX_SUB_PROCESSORS)); - - nv_kthread_q_stop(&parent_gpu->lazy_free_q); - - for_each_sub_processor_index(sub_processor_index) - UVM_ASSERT(!parent_gpu->gpus[sub_processor_index]); - - uvm_kvfree(parent_gpu); -} - -void uvm_parent_gpu_kref_put(uvm_parent_gpu_t *parent_gpu) -{ - nv_kref_put(&parent_gpu->gpu_kref, uvm_parent_gpu_destroy); -} +void uvm_parent_gpu_kref_put(uvm_parent_gpu_t *parent_gpu) +{ + nv_kref_put(&parent_gpu->gpu_kref, uvm_parent_gpu_destroy); +} static void update_stats_parent_gpu_fault_instance(uvm_parent_gpu_t *parent_gpu, const uvm_fault_buffer_entry_t *fault_entry, @@ -1810,7 +1736,7 @@ static void update_stats_fault_cb(uvm_perf_event_t event_id, uvm_perf_event_data // The reported fault entry must be the "representative" fault entry UVM_ASSERT(!event_data->fault.gpu.buffer_entry->filtered); - parent_gpu = uvm_va_space_get_gpu(event_data->fault.space, event_data->fault.proc_id)->parent; + parent_gpu = uvm_gpu_get(event_data->fault.proc_id)->parent; fault_entry = event_data->fault.gpu.buffer_entry; @@ -1830,15 +1756,14 @@ static void update_stats_migration_cb(uvm_perf_event_t event_id, uvm_perf_event_ bool is_replayable_fault; bool is_non_replayable_fault; bool is_access_counter; - uvm_va_space_t *va_space = uvm_va_block_get_va_space(event_data->migration.block); UVM_ASSERT(event_id == UVM_PERF_EVENT_MIGRATION); if (UVM_ID_IS_GPU(event_data->migration.dst)) - gpu_dst = uvm_va_space_get_gpu(va_space, event_data->migration.dst); + gpu_dst = uvm_gpu_get(event_data->migration.dst); if (UVM_ID_IS_GPU(event_data->migration.src)) - gpu_src = uvm_va_space_get_gpu(va_space, event_data->migration.src); + gpu_src = uvm_gpu_get(event_data->migration.src); if (!gpu_dst && !gpu_src) return; @@ -1984,7 +1909,7 @@ static uvm_gpu_t *uvm_gpu_get_by_parent_and_swizz_id(uvm_parent_gpu_t *parent_gp UVM_ASSERT(parent_gpu); uvm_assert_mutex_locked(&g_uvm_global.global_lock); - for_each_gpu_in_parent(parent_gpu, gpu) { + for_each_gpu_in_parent(gpu, parent_gpu) { if (gpu->smc.swizz_id == swizz_id) return gpu; } @@ -1992,156 +1917,22 @@ static uvm_gpu_t *uvm_gpu_get_by_parent_and_swizz_id(uvm_parent_gpu_t *parent_gp return NULL; } -// Increment the refcount for the GPU with the given UUID. If this is the first -// time that this UUID is retained, the GPU is added to UVM. -// When SMC partitioning is enabled, user_rm_device contains the user handles -// that were created by the caller, and that can be used to identify and -// obtain information about the partition. nvUvmInterfaceGetGpuInfo returns, in -// gpu_info, whether SMC is enabled, the swizzId, and GI UUID corresponding to -// the partition. -static NV_STATUS gpu_retain_by_uuid_locked(const NvProcessorUuid *gpu_uuid, - const uvm_rm_user_object_t *user_rm_device, - uvm_gpu_t **gpu_out) -{ - NV_STATUS status = NV_OK; - uvm_gpu_t *gpu = NULL; - uvm_parent_gpu_t *parent_gpu; - UvmGpuInfo *gpu_info = NULL; - UvmGpuClientInfo client_info = {0}; - UvmGpuPlatformInfo gpu_platform_info = {0}; - uvm_gpu_id_t gpu_id; - - client_info.hClient = user_rm_device->user_client; - client_info.hSmcPartRef = user_rm_device->user_object; - - gpu_info = uvm_kvmalloc_zero(sizeof(*gpu_info)); - if (!gpu_info) - return NV_ERR_NO_MEMORY; - - uvm_assert_mutex_locked(&g_uvm_global.global_lock); - - parent_gpu = uvm_parent_gpu_get_by_uuid_locked(gpu_uuid); - - if (parent_gpu == NULL) { - // If this is the first time the UUID is seen, register it on RM - status = uvm_rm_locked_call(nvUvmInterfaceRegisterGpu(gpu_uuid, &gpu_platform_info)); - if (status != NV_OK) - goto error_free_gpu_info; - } - - status = uvm_rm_locked_call(nvUvmInterfaceGetGpuInfo(gpu_uuid, &client_info, gpu_info)); - if (status != NV_OK) - goto error_unregister; - - if (parent_gpu != NULL) { - // If the UUID has been seen before, and if SMC is enabled, then check - // if this specific partition has been seen previously. The UUID-based - // look-up above may have succeeded for a different partition with the - // same parent GPU. - if (gpu_info->smcEnabled) { - gpu = uvm_gpu_get_by_parent_and_swizz_id(parent_gpu, gpu_info->smcSwizzId); - } - else { - gpu = parent_gpu->gpus[0]; - UVM_ASSERT(gpu != NULL); - } - } - - if (gpu == NULL) { - status = find_unused_gpu_id(parent_gpu, &gpu_id); - if (status != NV_OK) - goto error_unregister; - - status = add_gpu(gpu_uuid, gpu_id, gpu_info, &gpu_platform_info, parent_gpu, &gpu); - if (status != NV_OK) - goto error_unregister; - } - else { - atomic64_inc(&gpu->retained_count); - } - - *gpu_out = gpu; - - uvm_kvfree(gpu_info); - - return status; - -error_unregister: - if (parent_gpu == NULL) - uvm_rm_locked_call_void(nvUvmInterfaceUnregisterGpu(gpu_uuid)); -error_free_gpu_info: - uvm_kvfree(gpu_info); - - return status; -} - -NV_STATUS uvm_gpu_retain_by_uuid(const NvProcessorUuid *gpu_uuid, - const uvm_rm_user_object_t *user_rm_device, - uvm_gpu_t **gpu_out) -{ - NV_STATUS status; - uvm_mutex_lock(&g_uvm_global.global_lock); - status = gpu_retain_by_uuid_locked(gpu_uuid, user_rm_device, gpu_out); - uvm_mutex_unlock(&g_uvm_global.global_lock); - return status; -} - void uvm_gpu_retain(uvm_gpu_t *gpu) { UVM_ASSERT(uvm_gpu_retained_count(gpu) > 0); atomic64_inc(&gpu->retained_count); } -void uvm_gpu_release_locked(uvm_gpu_t *gpu) +bool uvm_parent_gpus_are_nvswitch_connected(const uvm_parent_gpu_t *parent_gpu0, const uvm_parent_gpu_t *parent_gpu1) { - uvm_parent_gpu_t *parent_gpu = gpu->parent; - - uvm_assert_mutex_locked(&g_uvm_global.global_lock); - UVM_ASSERT(uvm_gpu_retained_count(gpu) > 0); - - if (atomic64_dec_and_test(&gpu->retained_count)) { - nv_kref_get(&parent_gpu->gpu_kref); - remove_gpu(gpu); - if (parent_gpu->num_retained_gpus == 0) - uvm_rm_locked_call_void(nvUvmInterfaceUnregisterGpu(&parent_gpu->uuid)); - uvm_parent_gpu_kref_put(parent_gpu); + if (parent_gpu0 != parent_gpu1 && + parent_gpu0->nvswitch_info.is_nvswitch_connected && + parent_gpu1->nvswitch_info.is_nvswitch_connected) { + UVM_ASSERT(parent_gpu_peer_caps(parent_gpu0, parent_gpu1)->link_type >= UVM_GPU_LINK_NVLINK_2); + return true; } -} - -void uvm_gpu_release(uvm_gpu_t *gpu) -{ - uvm_mutex_lock(&g_uvm_global.global_lock); - uvm_gpu_release_locked(gpu); - uvm_mutex_unlock(&g_uvm_global.global_lock); -} - -// Note: Peer table is an upper triangular matrix packed into a flat array. -// This function converts an index of 2D array of size [N x N] into an index -// of upper triangular array of size [((N - 1) * ((N - 1) + 1)) / 2] which -// does not include diagonal elements. -NvU32 uvm_gpu_peer_table_index(const uvm_gpu_id_t gpu_id0, const uvm_gpu_id_t gpu_id1) -{ - NvU32 square_index, triangular_index; - NvU32 gpu_index0 = uvm_id_gpu_index(gpu_id0); - NvU32 gpu_index1 = uvm_id_gpu_index(gpu_id1); - - UVM_ASSERT(!uvm_id_equal(gpu_id0, gpu_id1)); - - // Calculate an index of 2D array by re-ordering indices to always point - // to the same entry. - square_index = min(gpu_index0, gpu_index1) * UVM_ID_MAX_GPUS + - max(gpu_index0, gpu_index1); - - // Calculate and subtract number of lower triangular matrix elements till - // the current row (which includes diagonal elements) to get the correct - // index in an upper triangular matrix. - // Note: As gpu_id can be [1, N), no extra logic is needed to calculate - // diagonal elements. - triangular_index = square_index - SUM_FROM_0_TO_N(min(uvm_id_value(gpu_id0), uvm_id_value(gpu_id1))); - - UVM_ASSERT(triangular_index < UVM_MAX_UNIQUE_GPU_PAIRS); - return triangular_index; + return false; } NV_STATUS uvm_gpu_check_ecc_error_no_rm(uvm_gpu_t *gpu) @@ -2183,20 +1974,20 @@ NV_STATUS uvm_gpu_check_ecc_error_no_rm(uvm_gpu_t *gpu) return NV_WARN_MORE_PROCESSING_REQUIRED; } -static NV_STATUS get_p2p_caps(uvm_gpu_t *gpu0, - uvm_gpu_t *gpu1, - UvmGpuP2PCapsParams *p2p_caps_params) +static NV_STATUS get_parent_p2p_caps(uvm_parent_gpu_t *parent_gpu0, + uvm_parent_gpu_t *parent_gpu1, + UvmGpuP2PCapsParams *p2p_caps_params) { NV_STATUS status; uvmGpuDeviceHandle rm_device0, rm_device1; - if (uvm_id_value(gpu0->id) < uvm_id_value(gpu1->id)) { - rm_device0 = uvm_gpu_device_handle(gpu0); - rm_device1 = uvm_gpu_device_handle(gpu1); + if (uvm_parent_id_value(parent_gpu0->id) < uvm_parent_id_value(parent_gpu1->id)) { + rm_device0 = parent_gpu0->rm_device; + rm_device1 = parent_gpu1->rm_device; } else { - rm_device0 = uvm_gpu_device_handle(gpu1); - rm_device1 = uvm_gpu_device_handle(gpu0); + rm_device0 = parent_gpu1->rm_device; + rm_device1 = parent_gpu0->rm_device; } memset(p2p_caps_params, 0, sizeof(*p2p_caps_params)); @@ -2204,32 +1995,28 @@ static NV_STATUS get_p2p_caps(uvm_gpu_t *gpu0, if (status != NV_OK) { UVM_ERR_PRINT("nvUvmInterfaceGetP2PCaps() failed with error: %s, for GPU0:%s and GPU1:%s\n", nvstatusToString(status), - uvm_gpu_name(gpu0), - uvm_gpu_name(gpu1)); + uvm_parent_gpu_name(parent_gpu0), + uvm_parent_gpu_name(parent_gpu1)); return status; } - if (p2p_caps_params->p2pLink != UVM_LINK_TYPE_NONE) { - // P2P is not supported under SMC partitioning - UVM_ASSERT(!gpu0->parent->smc.enabled); - UVM_ASSERT(!gpu1->parent->smc.enabled); - } - return NV_OK; } -static NV_STATUS create_p2p_object(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1, NvHandle *p2p_handle) +static NV_STATUS create_parent_p2p_object(uvm_parent_gpu_t *parent_gpu0, + uvm_parent_gpu_t *parent_gpu1, + NvHandle *p2p_handle) { NV_STATUS status; uvmGpuDeviceHandle rm_device0, rm_device1; - if (uvm_id_value(gpu0->id) < uvm_id_value(gpu1->id)) { - rm_device0 = uvm_gpu_device_handle(gpu0); - rm_device1 = uvm_gpu_device_handle(gpu1); + if (uvm_parent_id_value(parent_gpu0->id) < uvm_parent_id_value(parent_gpu1->id)) { + rm_device0 = parent_gpu0->rm_device; + rm_device1 = parent_gpu1->rm_device; } else { - rm_device0 = uvm_gpu_device_handle(gpu1); - rm_device1 = uvm_gpu_device_handle(gpu0); + rm_device0 = parent_gpu1->rm_device; + rm_device1 = parent_gpu0->rm_device; } *p2p_handle = 0; @@ -2238,8 +2025,8 @@ static NV_STATUS create_p2p_object(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1, NvHandle *p if (status != NV_OK) { UVM_ERR_PRINT("nvUvmInterfaceP2pObjectCreate() failed with error: %s, for GPU0:%s and GPU1:%s\n", nvstatusToString(status), - uvm_gpu_name(gpu0), - uvm_gpu_name(gpu1)); + uvm_parent_gpu_name(parent_gpu0), + uvm_parent_gpu_name(parent_gpu1)); return status; } @@ -2247,132 +2034,209 @@ static NV_STATUS create_p2p_object(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1, NvHandle *p return NV_OK; } -static void set_optimal_p2p_write_ces(const UvmGpuP2PCapsParams *p2p_caps_params, - const uvm_gpu_peer_t *peer_caps, - uvm_gpu_t *gpu0, - uvm_gpu_t *gpu1) +static void set_optimal_p2p_write_ces(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1) { + uvm_parent_gpu_peer_t *parent_peer_caps = parent_gpu_peer_caps(gpu0->parent, gpu1->parent); bool sorted; NvU32 ce0, ce1; - if (peer_caps->link_type < UVM_GPU_LINK_NVLINK_1) + UVM_ASSERT(parent_peer_caps->ref_count); + + if (parent_peer_caps->link_type < UVM_GPU_LINK_NVLINK_1) return; sorted = uvm_id_value(gpu0->id) < uvm_id_value(gpu1->id); - ce0 = p2p_caps_params->optimalNvlinkWriteCEs[sorted ? 0 : 1]; - ce1 = p2p_caps_params->optimalNvlinkWriteCEs[sorted ? 1 : 0]; + ce0 = parent_peer_caps->optimalNvlinkWriteCEs[sorted ? 0 : 1]; + ce1 = parent_peer_caps->optimalNvlinkWriteCEs[sorted ? 1 : 0]; uvm_channel_manager_set_p2p_ce(gpu0->channel_manager, gpu1, ce0); uvm_channel_manager_set_p2p_ce(gpu1->channel_manager, gpu0, ce1); } -static int nv_procfs_read_gpu_peer_caps(struct seq_file *s, void *v) +static int nv_procfs_read_parent_gpu_peer_caps(struct seq_file *s, void *v) { if (!uvm_down_read_trylock(&g_uvm_global.pm.lock)) return -EAGAIN; - gpu_peer_caps_print((uvm_gpu_t **)s->private, s); + parent_gpu_peer_caps_print((uvm_parent_gpu_t **)s->private, s); uvm_up_read(&g_uvm_global.pm.lock); return 0; } -static int nv_procfs_read_gpu_peer_caps_entry(struct seq_file *s, void *v) +static int nv_procfs_read_parent_gpu_peer_caps_entry(struct seq_file *s, void *v) { - UVM_ENTRY_RET(nv_procfs_read_gpu_peer_caps(s, v)); + UVM_ENTRY_RET(nv_procfs_read_parent_gpu_peer_caps(s, v)); } -UVM_DEFINE_SINGLE_PROCFS_FILE(gpu_peer_caps_entry); +UVM_DEFINE_SINGLE_PROCFS_FILE(parent_gpu_peer_caps_entry); -static NV_STATUS init_procfs_peer_cap_files(uvm_gpu_t *local, uvm_gpu_t *remote, size_t local_idx) +static NV_STATUS init_procfs_parent_peer_cap_files(uvm_parent_gpu_t *local, uvm_parent_gpu_t *remote, size_t local_idx) { - // This needs to hold a gpu_id_t in decimal + // This needs to hold a uvm_parent_gpu_id_t in decimal char gpu_dir_name[16]; // This needs to hold a GPU UUID - char symlink_name[UVM_GPU_UUID_TEXT_BUFFER_LENGTH]; - uvm_gpu_peer_t *peer_caps; + char symlink_name[UVM_GPU_UUID_STRING_LENGTH]; + uvm_parent_gpu_peer_t *parent_peer_caps; - if (!uvm_procfs_is_enabled()) - return NV_OK; + UVM_ASSERT(uvm_procfs_is_debug_enabled()); - peer_caps = uvm_gpu_peer_caps(local, remote); - peer_caps->procfs.pairs[local_idx][0] = local; - peer_caps->procfs.pairs[local_idx][1] = remote; + parent_peer_caps = parent_gpu_peer_caps(local, remote); + parent_peer_caps->procfs.pairs[local_idx][0] = local; + parent_peer_caps->procfs.pairs[local_idx][1] = remote; // Create gpus/gpuA/peers/gpuB - snprintf(gpu_dir_name, sizeof(gpu_dir_name), "%u", uvm_id_value(remote->id)); - peer_caps->procfs.peer_file[local_idx] = NV_CREATE_PROC_FILE(gpu_dir_name, - local->procfs.dir_peers, - gpu_peer_caps_entry, - &peer_caps->procfs.pairs[local_idx]); + snprintf(gpu_dir_name, sizeof(gpu_dir_name), "%u", uvm_parent_id_value(remote->id)); + parent_peer_caps->procfs.peer_file[local_idx] = NV_CREATE_PROC_FILE(gpu_dir_name, + local->procfs.dir_peers, + parent_gpu_peer_caps_entry, + &parent_peer_caps->procfs.pairs[local_idx]); - if (peer_caps->procfs.peer_file[local_idx] == NULL) + if (parent_peer_caps->procfs.peer_file[local_idx] == NULL) return NV_ERR_OPERATING_SYSTEM; - // Create a symlink from UVM GPU UUID (UVM-GPU-...) to the UVM GPU ID gpuB - format_uuid_to_buffer(symlink_name, sizeof(symlink_name), &remote->uuid); - peer_caps->procfs.peer_symlink_file[local_idx] = proc_symlink(symlink_name, - local->procfs.dir_peers, - gpu_dir_name); - if (peer_caps->procfs.peer_symlink_file[local_idx] == NULL) + // Create a symlink from UVM GPU UUID (GPU-...) to the UVM GPU ID gpuB + uvm_parent_gpu_uuid_string(symlink_name, &remote->uuid); + parent_peer_caps->procfs.peer_symlink_file[local_idx] = proc_symlink(symlink_name, + local->procfs.dir_peers, + gpu_dir_name); + if (parent_peer_caps->procfs.peer_symlink_file[local_idx] == NULL) return NV_ERR_OPERATING_SYSTEM; return NV_OK; } -static NV_STATUS init_procfs_peer_files(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1) +static NV_STATUS init_procfs_parent_peer_files(uvm_parent_gpu_t *parent_gpu0, uvm_parent_gpu_t *parent_gpu1) { NV_STATUS status; if (!uvm_procfs_is_debug_enabled()) return NV_OK; - status = init_procfs_peer_cap_files(gpu0, gpu1, 0); + status = init_procfs_parent_peer_cap_files(parent_gpu0, parent_gpu1, 0); if (status != NV_OK) return status; - status = init_procfs_peer_cap_files(gpu1, gpu0, 1); + status = init_procfs_parent_peer_cap_files(parent_gpu1, parent_gpu0, 1); if (status != NV_OK) return status; return NV_OK; } -static NV_STATUS init_peer_access(uvm_gpu_t *gpu0, - uvm_gpu_t *gpu1, - const UvmGpuP2PCapsParams *p2p_caps_params, - uvm_gpu_peer_t *peer_caps) +static NV_STATUS parent_peers_init(uvm_parent_gpu_t *parent_gpu0, + uvm_parent_gpu_t *parent_gpu1, + uvm_parent_gpu_peer_t *parent_peer_caps) { + UvmGpuP2PCapsParams p2p_caps_params; + uvm_gpu_link_type_t link_type; + NvHandle p2p_handle; NV_STATUS status; - UVM_ASSERT(p2p_caps_params->p2pLink != UVM_LINK_TYPE_C2C); + UVM_ASSERT(parent_peer_caps->ref_count == 0); + + status = create_parent_p2p_object(parent_gpu0, parent_gpu1, &p2p_handle); + if (status != NV_OK) + return status; + + status = get_parent_p2p_caps(parent_gpu0, parent_gpu1, &p2p_caps_params); + if (status != NV_OK) + goto cleanup; // check for peer-to-peer compatibility (PCI-E or NvLink). - peer_caps->link_type = get_gpu_link_type(p2p_caps_params->p2pLink); - if (peer_caps->link_type == UVM_GPU_LINK_INVALID || peer_caps->link_type == UVM_GPU_LINK_C2C) - return NV_ERR_NOT_SUPPORTED; + link_type = get_gpu_link_type(p2p_caps_params.p2pLink); + if (link_type == UVM_GPU_LINK_INVALID || link_type == UVM_GPU_LINK_C2C) { + status = NV_ERR_NOT_SUPPORTED; + goto cleanup; + } + + status = init_procfs_parent_peer_files(parent_gpu0, parent_gpu1); + if (status != NV_OK) + goto cleanup; - peer_caps->total_link_line_rate_mbyte_per_s = p2p_caps_params->totalLinkLineRateMBps; + parent_peer_caps->ref_count = 1; + parent_peer_caps->p2p_handle = p2p_handle; + parent_peer_caps->link_type = link_type; + parent_peer_caps->total_link_line_rate_mbyte_per_s = p2p_caps_params.totalLinkLineRateMBps; // Initialize peer ids and establish peer mappings // Peer id from min(gpu_id0, gpu_id1) -> max(gpu_id0, gpu_id1) - peer_caps->peer_ids[0] = p2p_caps_params->peerIds[0]; + parent_peer_caps->peer_ids[0] = p2p_caps_params.peerIds[0]; // Peer id from max(gpu_id0, gpu_id1) -> min(gpu_id0, gpu_id1) - peer_caps->peer_ids[1] = p2p_caps_params->peerIds[1]; + parent_peer_caps->peer_ids[1] = p2p_caps_params.peerIds[1]; + + parent_peer_caps->optimalNvlinkWriteCEs[0] = p2p_caps_params.optimalNvlinkWriteCEs[0]; + parent_peer_caps->optimalNvlinkWriteCEs[1] = p2p_caps_params.optimalNvlinkWriteCEs[1]; + + return NV_OK; + +cleanup: + uvm_rm_locked_call_void(nvUvmInterfaceP2pObjectDestroy(uvm_global_session_handle(), p2p_handle)); + + return status; +} + +static NV_STATUS parent_peers_retain(uvm_parent_gpu_t *parent_gpu0, uvm_parent_gpu_t *parent_gpu1) +{ + uvm_parent_gpu_peer_t *parent_peer_caps = parent_gpu_peer_caps(parent_gpu0, parent_gpu1); + NV_STATUS status = NV_OK; + + if (parent_peer_caps->ref_count == 0) + status = parent_peers_init(parent_gpu0, parent_gpu1, parent_peer_caps); + else + parent_peer_caps->ref_count++; + + return status; +} + +static void parent_peers_destroy(uvm_parent_gpu_t *parent_gpu0, + uvm_parent_gpu_t *parent_gpu1, + uvm_parent_gpu_peer_t *parent_peer_caps) +{ + UVM_ASSERT(parent_peer_caps->p2p_handle); + + deinit_procfs_parent_peer_cap_files(parent_peer_caps); + + uvm_rm_locked_call_void(nvUvmInterfaceP2pObjectDestroy(uvm_global_session_handle(), parent_peer_caps->p2p_handle)); + + memset(parent_peer_caps, 0, sizeof(*parent_peer_caps)); +} + +static void parent_peers_release(uvm_parent_gpu_t *parent_gpu0, uvm_parent_gpu_t *parent_gpu1) +{ + uvm_parent_gpu_peer_t *parent_peer_caps = parent_gpu_peer_caps(parent_gpu0, parent_gpu1); + + UVM_ASSERT(parent_peer_caps->ref_count); + + if (--parent_peer_caps->ref_count == 0) + parent_peers_destroy(parent_gpu0, parent_gpu1, parent_peer_caps); +} + +static NV_STATUS peers_init(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1, uvm_gpu_peer_t *peer_caps) +{ + NV_STATUS status; + + UVM_ASSERT(peer_caps->ref_count == 0); + + status = parent_peers_retain(gpu0->parent, gpu1->parent); + if (status != NV_OK) + return status; // Establish peer mappings from each GPU to the other. status = uvm_mmu_create_peer_identity_mappings(gpu0, gpu1); if (status != NV_OK) - return status; + goto cleanup_parent; status = uvm_mmu_create_peer_identity_mappings(gpu1, gpu0); if (status != NV_OK) - return status; + goto cleanup_mappings; - set_optimal_p2p_write_ces(p2p_caps_params, peer_caps, gpu0, gpu1); + peer_caps->ref_count = 1; + + set_optimal_p2p_write_ces(gpu0, gpu1); UVM_ASSERT(uvm_gpu_get(gpu0->id) == gpu0); UVM_ASSERT(uvm_gpu_get(gpu1->id) == gpu1); @@ -2397,148 +2261,108 @@ static NV_STATUS init_peer_access(uvm_gpu_t *gpu0, uvm_spin_unlock(&gpu1->peer_info.peer_gpus_lock); - return init_procfs_peer_files(gpu0, gpu1); -} + return NV_OK; -static NV_STATUS discover_smc_peers(uvm_gpu_t *gpu) -{ - NvU32 sub_processor_index; - uvm_gpu_t *other_gpu; - NV_STATUS status; +cleanup_mappings: + uvm_mmu_destroy_peer_identity_mappings(gpu0, gpu1); - UVM_ASSERT(gpu); - uvm_assert_mutex_locked(&g_uvm_global.global_lock); - UVM_ASSERT(gpu->parent->smc.enabled); +cleanup_parent: + parent_peers_release(gpu0->parent, gpu1->parent); - for_each_sub_processor_index(sub_processor_index) { - uvm_gpu_peer_t *peer_caps; + return status; +} - other_gpu = gpu->parent->gpus[sub_processor_index]; - if (!other_gpu || other_gpu == gpu) - continue; +static NV_STATUS peers_retain(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1) +{ + uvm_gpu_peer_t *peer_caps = gpu_peer_caps(gpu0, gpu1); + NV_STATUS status = NV_OK; - peer_caps = uvm_gpu_peer_caps(gpu, other_gpu); - if (peer_caps->ref_count == 1) - continue; - - UVM_ASSERT(peer_caps->ref_count == 0); - - memset(peer_caps, 0, sizeof(*peer_caps)); - peer_caps->ref_count = 1; - - status = init_procfs_peer_files(gpu, other_gpu); - if (status != NV_OK) { - peer_caps->ref_count = 0; - return status; - } - } + if (peer_caps->ref_count == 0) + status = peers_init(gpu0, gpu1, peer_caps); + else + peer_caps->ref_count++; - return NV_OK; + return status; } -static NV_STATUS enable_pcie_peer_access(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1) +static void peers_destroy(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1, uvm_gpu_peer_t *peer_caps) { - NV_STATUS status = NV_OK; - UvmGpuP2PCapsParams p2p_caps_params; - uvm_gpu_peer_t *peer_caps; - NvHandle p2p_handle; - - UVM_ASSERT(gpu0); - UVM_ASSERT(gpu1); - uvm_assert_mutex_locked(&g_uvm_global.global_lock); + uvm_mmu_destroy_peer_identity_mappings(gpu0, gpu1); + uvm_mmu_destroy_peer_identity_mappings(gpu1, gpu0); - peer_caps = uvm_gpu_peer_caps(gpu0, gpu1); - UVM_ASSERT(peer_caps->link_type == UVM_GPU_LINK_INVALID); - UVM_ASSERT(peer_caps->ref_count == 0); + uvm_spin_lock(&gpu0->peer_info.peer_gpus_lock); + uvm_processor_mask_clear(&gpu0->peer_info.peer_gpu_mask, gpu1->id); + gpu0->peer_info.peer_gpus[uvm_id_gpu_index(gpu1->id)] = NULL; + uvm_spin_unlock(&gpu0->peer_info.peer_gpus_lock); - status = create_p2p_object(gpu0, gpu1, &p2p_handle); - if (status != NV_OK) - return status; + uvm_spin_lock(&gpu1->peer_info.peer_gpus_lock); + uvm_processor_mask_clear(&gpu1->peer_info.peer_gpu_mask, gpu0->id); + gpu1->peer_info.peer_gpus[uvm_id_gpu_index(gpu0->id)] = NULL; + uvm_spin_unlock(&gpu1->peer_info.peer_gpus_lock); - // Store the handle in the global table. - peer_caps->p2p_handle = p2p_handle; + // Flush the access counter buffer to avoid getting stale notifications for + // accesses to GPUs to which peer access is being disabled. This is also + // needed in the case of disabling automatic (NVLINK) peers on GPU + // unregister, because access counter processing might still be using GPU + // IDs queried from the peer table above which are about to be removed from + // the global table. + if (gpu0->parent->access_counters_supported) + uvm_parent_gpu_access_counter_buffer_flush(gpu0->parent); + if (gpu1->parent->access_counters_supported) + uvm_parent_gpu_access_counter_buffer_flush(gpu1->parent); - status = get_p2p_caps(gpu0, gpu1, &p2p_caps_params); - if (status != NV_OK) - goto cleanup; + parent_peers_release(gpu0->parent, gpu1->parent); - // Sanity checks - UVM_ASSERT(p2p_caps_params.p2pLink == UVM_LINK_TYPE_PCIE); + memset(peer_caps, 0, sizeof(*peer_caps)); +} - status = init_peer_access(gpu0, gpu1, &p2p_caps_params, peer_caps); - if (status != NV_OK) - goto cleanup; +static void peers_release(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1) +{ + uvm_gpu_peer_t *peer_caps = gpu_peer_caps(gpu0, gpu1); - return NV_OK; + UVM_ASSERT(peer_caps->ref_count); -cleanup: - disable_peer_access(gpu0, gpu1); - return status; + if (--peer_caps->ref_count == 0) + peers_destroy(gpu0, gpu1, peer_caps); } -static NV_STATUS enable_nvlink_peer_access(uvm_gpu_t *gpu0, - uvm_gpu_t *gpu1, - UvmGpuP2PCapsParams *p2p_caps_params) +static void parent_peers_destroy_nvlink(uvm_parent_gpu_t *parent_gpu) { - NV_STATUS status = NV_OK; - NvHandle p2p_handle; - uvm_gpu_peer_t *peer_caps; + uvm_parent_gpu_t *other_parent_gpu; - UVM_ASSERT(gpu0); - UVM_ASSERT(gpu1); uvm_assert_mutex_locked(&g_uvm_global.global_lock); - peer_caps = uvm_gpu_peer_caps(gpu0, gpu1); - UVM_ASSERT(peer_caps->ref_count == 0); - peer_caps->ref_count = 1; - - // Create P2P object for direct NVLink peers - status = create_p2p_object(gpu0, gpu1, &p2p_handle); - if (status != NV_OK) { - UVM_ERR_PRINT("failed to create a P2P object with error: %s, for GPU1:%s and GPU2:%s \n", - nvstatusToString(status), - uvm_gpu_name(gpu0), - uvm_gpu_name(gpu1)); - return status; - } - - UVM_ASSERT(p2p_handle != 0); - - // Store the handle in the global table. - peer_caps->p2p_handle = p2p_handle; + for_each_parent_gpu(other_parent_gpu) { + uvm_parent_gpu_peer_t *parent_peer_caps; - // Update p2p caps after p2p object creation as it generates the peer ids. - status = get_p2p_caps(gpu0, gpu1, p2p_caps_params); - if (status != NV_OK) - goto cleanup; + if (other_parent_gpu == parent_gpu) + continue; - status = init_peer_access(gpu0, gpu1, p2p_caps_params, peer_caps); - if (status != NV_OK) - goto cleanup; + parent_peer_caps = parent_gpu_peer_caps(parent_gpu, other_parent_gpu); - return NV_OK; + // PCIe peers need to be explicitly destroyed via UvmDisablePeerAccess + if (parent_peer_caps->ref_count == 0 || parent_peer_caps->link_type == UVM_GPU_LINK_PCIE) + continue; -cleanup: - disable_peer_access(gpu0, gpu1); - return status; + parent_peers_release(parent_gpu, other_parent_gpu); + } } -static NV_STATUS discover_nvlink_peers(uvm_gpu_t *gpu) +static NV_STATUS parent_peers_discover_nvlink(uvm_parent_gpu_t *parent_gpu) { - NV_STATUS status = NV_OK; - uvm_gpu_t *other_gpu; + uvm_parent_gpu_t *other_parent_gpu; + NV_STATUS status; - UVM_ASSERT(gpu); uvm_assert_mutex_locked(&g_uvm_global.global_lock); - UVM_ASSERT(!gpu->parent->smc.enabled); - for_each_gpu(other_gpu) { + for_each_parent_gpu(other_parent_gpu) { + uvm_parent_gpu_peer_t *parent_peer_caps; UvmGpuP2PCapsParams p2p_caps_params; - if ((other_gpu == gpu) || other_gpu->parent->smc.enabled) + if (other_parent_gpu == parent_gpu) continue; - status = get_p2p_caps(gpu, other_gpu, &p2p_caps_params); + status = get_parent_p2p_caps(parent_gpu, other_parent_gpu, &p2p_caps_params); if (status != NV_OK) goto cleanup; @@ -2546,7 +2370,9 @@ static NV_STATUS discover_nvlink_peers(uvm_gpu_t *gpu) if (p2p_caps_params.p2pLink == UVM_LINK_TYPE_NONE || p2p_caps_params.p2pLink == UVM_LINK_TYPE_PCIE) continue; - status = enable_nvlink_peer_access(gpu, other_gpu, &p2p_caps_params); + parent_peer_caps = parent_gpu_peer_caps(parent_gpu, other_parent_gpu); + UVM_ASSERT(parent_peer_caps->ref_count == 0); + status = parent_peers_init(parent_gpu, other_parent_gpu, parent_peer_caps); if (status != NV_OK) goto cleanup; } @@ -2554,162 +2380,462 @@ static NV_STATUS discover_nvlink_peers(uvm_gpu_t *gpu) return NV_OK; cleanup: - destroy_nvlink_peers(gpu); + parent_peers_destroy_nvlink(parent_gpu); return status; } -static void destroy_nvlink_peers(uvm_gpu_t *gpu) +static void peers_destroy_nvlink(uvm_gpu_t *gpu) { - uvm_gpu_t *other_gpu; + uvm_parent_gpu_t *other_parent_gpu; + uvm_parent_gpu_t *parent_gpu; UVM_ASSERT(gpu); uvm_assert_mutex_locked(&g_uvm_global.global_lock); - if (gpu->parent->smc.enabled) - return; + parent_gpu = gpu->parent; - for_each_gpu(other_gpu) { - uvm_gpu_peer_t *peer_caps; + for_each_parent_gpu(other_parent_gpu) { + uvm_parent_gpu_peer_t *parent_peer_caps; + uvm_gpu_t *other_gpu; - if ((other_gpu == gpu) || other_gpu->parent->smc.enabled) + if (other_parent_gpu == parent_gpu) continue; - peer_caps = uvm_gpu_peer_caps(gpu, other_gpu); + parent_peer_caps = parent_gpu_peer_caps(parent_gpu, other_parent_gpu); // PCIe peers need to be explicitly destroyed via UvmDisablePeerAccess - if (peer_caps->link_type == UVM_GPU_LINK_INVALID || peer_caps->link_type == UVM_GPU_LINK_PCIE) + if (parent_peer_caps->ref_count == 0 || parent_peer_caps->link_type == UVM_GPU_LINK_PCIE) continue; - disable_peer_access(gpu, other_gpu); + for_each_gpu_in_parent(other_gpu, other_parent_gpu) { + uvm_gpu_peer_t *peer_caps = gpu_peer_caps(gpu, other_gpu); + + if (peer_caps->ref_count == 0) + continue; + + peers_release(gpu, other_gpu); + } } } -NV_STATUS uvm_gpu_retain_pcie_peer_access(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1) +static NV_STATUS peers_discover_nvlink(uvm_gpu_t *gpu) { - NV_STATUS status = NV_OK; - uvm_gpu_peer_t *peer_caps; + uvm_parent_gpu_t *parent_gpu = gpu->parent; + uvm_parent_gpu_t *other_parent_gpu; + uvm_gpu_t *other_gpu; + NV_STATUS status; + + uvm_assert_mutex_locked(&g_uvm_global.global_lock); + + for_each_parent_gpu(other_parent_gpu) { + uvm_parent_gpu_peer_t *parent_peer_caps; + + if (other_parent_gpu == parent_gpu) + continue; + + parent_peer_caps = parent_gpu_peer_caps(parent_gpu, other_parent_gpu); + if (parent_peer_caps->ref_count == 0 || parent_peer_caps->link_type == UVM_GPU_LINK_PCIE) + continue; + + for_each_gpu_in_parent(other_gpu, other_parent_gpu) { + uvm_gpu_peer_t *peer_caps = gpu_peer_caps(gpu, other_gpu); + + UVM_ASSERT(peer_caps->ref_count == 0); + status = peers_init(gpu, other_gpu, peer_caps); + if (status != NV_OK) + goto cleanup; + } + } + + return NV_OK; + +cleanup: + peers_destroy_nvlink(gpu); + + return status; +} + +// Remove a gpu and unregister it from RM +// Note that this is also used in most error paths in add_gpu() +static void remove_gpu(uvm_gpu_t *gpu) +{ + NvU32 sub_processor_index; + uvm_parent_gpu_t *parent_gpu; + bool free_parent; - UVM_ASSERT(gpu0); - UVM_ASSERT(gpu1); uvm_assert_mutex_locked(&g_uvm_global.global_lock); - peer_caps = uvm_gpu_peer_caps(gpu0, gpu1); + sub_processor_index = uvm_id_sub_processor_index(gpu->id); + parent_gpu = gpu->parent; + + UVM_ASSERT_MSG(uvm_gpu_retained_count(gpu) == 0, + "gpu_id %u retained_count %llu\n", + uvm_id_value(gpu->id), + uvm_gpu_retained_count(gpu)); + + UVM_ASSERT(parent_gpu->num_retained_gpus > 0); + parent_gpu->num_retained_gpus--; + + free_parent = (parent_gpu->num_retained_gpus == 0); + + // NVLINK peers must be removed and the relevant access counter buffers must + // be flushed before removing this GPU from the global table. + peers_destroy_nvlink(gpu); + + if (free_parent) + parent_peers_destroy_nvlink(parent_gpu); + + // uvm_mem_free and other uvm_mem APIs invoked by the Confidential Compute + // deinitialization must be called before the GPU is removed from the global + // table. + // + // TODO: Bug 2008200: Add and remove the GPU in a more reasonable spot. + uvm_conf_computing_gpu_deinit(gpu); + + // If the parent is not being freed, the following gpu_table_lock is only + // needed to protect concurrent uvm_parent_gpu_find_first_valid_gpu() in BH + // from the __clear_bit here. + // In the free_parent case, gpu_table_lock protects the top half from the + // uvm_global_remove_parent_gpu() + uvm_spin_lock_irqsave(&g_uvm_global.gpu_table_lock); + + // Mark the GPU as invalid in the parent GPU's GPU table. + __clear_bit(sub_processor_index, parent_gpu->valid_gpus); + + // Remove the GPU from the table. + if (free_parent) + uvm_global_remove_parent_gpu(parent_gpu); + + uvm_spin_unlock_irqrestore(&g_uvm_global.gpu_table_lock); + + uvm_processor_mask_clear(&g_uvm_global.retained_gpus, gpu->id); + + // If the parent is being freed, stop scheduling new bottom halves and + // update relevant software state. Else flush any pending bottom halves + // before continuing. + if (free_parent) + uvm_parent_gpu_disable_isr(parent_gpu); + else + uvm_parent_gpu_flush_bottom_halves(parent_gpu); + + deinit_gpu(gpu); - // Insert an entry into global peer table, if not present. - if (peer_caps->link_type == UVM_GPU_LINK_INVALID) { - UVM_ASSERT(peer_caps->ref_count == 0); + UVM_ASSERT(parent_gpu->gpus[sub_processor_index] == gpu); + parent_gpu->gpus[sub_processor_index] = NULL; + uvm_kvfree(gpu); - status = enable_pcie_peer_access(gpu0, gpu1); + if (free_parent) + deinit_parent_gpu(parent_gpu); +} + +// Add a new gpu and register it with RM +static NV_STATUS add_gpu(const NvProcessorUuid *gpu_uuid, + const uvm_gpu_id_t gpu_id, + const UvmGpuInfo *gpu_info, + const UvmGpuPlatformInfo *gpu_platform_info, + uvm_parent_gpu_t *parent_gpu, + uvm_gpu_t **gpu_out) +{ + NV_STATUS status; + bool alloc_parent = (parent_gpu == NULL); + uvm_gpu_t *gpu = NULL; + + uvm_assert_mutex_locked(&g_uvm_global.global_lock); + + if (alloc_parent) { + status = alloc_parent_gpu(gpu_uuid, uvm_parent_gpu_id_from_gpu_id(gpu_id), &parent_gpu); if (status != NV_OK) return status; } - else if (peer_caps->link_type != UVM_GPU_LINK_PCIE) { - return NV_ERR_INVALID_DEVICE; + + gpu = alloc_gpu(parent_gpu, gpu_id); + if (!gpu) { + if (alloc_parent) + uvm_parent_gpu_kref_put(parent_gpu); + + return NV_ERR_NO_MEMORY; } - // GPUs can't be destroyed until their peer pairings have also been - // destroyed. - uvm_gpu_retain(gpu0); - uvm_gpu_retain(gpu1); + parent_gpu->num_retained_gpus++; + + if (alloc_parent) + fill_parent_gpu_info(parent_gpu, gpu_info); + + // After this point all error clean up should be handled by remove_gpu() - peer_caps->ref_count++; + if (!gpu_supports_uvm(parent_gpu)) { + UVM_DBG_PRINT("Registration of non-UVM-capable GPU attempted: GPU %s\n", uvm_gpu_name(gpu)); + status = NV_ERR_NOT_SUPPORTED; + goto error; + } + + if (alloc_parent) { + status = init_parent_gpu(parent_gpu, gpu_uuid, gpu_info, gpu_platform_info); + if (status != NV_OK) + goto error; + } + + status = init_gpu(gpu, gpu_info); + if (status != NV_OK) + goto error; + + status = uvm_gpu_check_ecc_error(gpu); + if (status != NV_OK) + goto error; + + atomic64_set(&gpu->retained_count, 1); + uvm_processor_mask_set(&g_uvm_global.retained_gpus, gpu->id); + + uvm_spin_lock_irqsave(&g_uvm_global.gpu_table_lock); + + if (alloc_parent) + uvm_global_add_parent_gpu(parent_gpu); + + // Mark the GPU as valid in the parent GPU's GPU table. + UVM_ASSERT(!test_bit(uvm_id_sub_processor_index(gpu->id), parent_gpu->valid_gpus)); + __set_bit(uvm_id_sub_processor_index(gpu->id), parent_gpu->valid_gpus); + + // Although locking correctness does not, at this early point (before the + // GPU is visible in the table) strictly require holding the gpu_table_lock + // in order to read gpu->isr.replayable_faults.handling, nor to enable page + // fault interrupts (this could have been done earlier), it is best to do it + // here, in order to avoid an interrupt storm. That way, we take advantage + // of the spinlock_irqsave side effect of turning off local CPU interrupts, + // part of holding the gpu_table_lock. That means that the local CPU won't + // receive any of these interrupts, until the GPU is safely added to the + // table (where the top half ISR can find it). + // + // As usual with spinlock_irqsave behavior, *other* CPUs can still handle + // these interrupts, but the local CPU will not be slowed down (interrupted) + // by such handling, and can quickly release the gpu_table_lock, thus + // unblocking any other CPU's top half (which waits for the gpu_table_lock). + if (alloc_parent && parent_gpu->isr.replayable_faults.handling) { + parent_gpu->fault_buffer_hal->enable_replayable_faults(parent_gpu); + + // Clear the interrupt bit and force the re-evaluation of the interrupt + // condition to ensure that we don't miss any pending interrupt + parent_gpu->fault_buffer_hal->clear_replayable_faults(parent_gpu, + parent_gpu->fault_buffer_info.replayable.cached_get); + } + + // Access counters are enabled on demand + + uvm_spin_unlock_irqrestore(&g_uvm_global.gpu_table_lock); + + if (alloc_parent) { + status = parent_peers_discover_nvlink(parent_gpu); + if (status != NV_OK) + goto error_retained; + } + + status = peers_discover_nvlink(gpu); + if (status != NV_OK) + goto error_retained; + + *gpu_out = gpu; + + return NV_OK; + +error_retained: + UVM_ERR_PRINT("Failed to discover NVLINK peers: %s, GPU %s\n", nvstatusToString(status), uvm_gpu_name(gpu)); + + // Nobody can have retained the GPU yet, since we still hold the + // global lock. + UVM_ASSERT(uvm_gpu_retained_count(gpu) == 1); + atomic64_set(&gpu->retained_count, 0); +error: + remove_gpu(gpu); return status; } -static void disable_peer_access(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1) +// Increment the refcount for the GPU with the given UUID. If this is the first +// time that this UUID is retained, the GPU is added to UVM. +// When SMC partitioning is enabled, user_rm_device contains the user handles +// that were created by the caller, and that can be used to identify and +// obtain information about the partition. nvUvmInterfaceGetGpuInfo returns, in +// gpu_info, whether SMC is enabled, the swizzId, and GI UUID corresponding to +// the partition. +static NV_STATUS gpu_retain_by_uuid_locked(const NvProcessorUuid *gpu_uuid, + const uvm_rm_user_object_t *user_rm_device, + uvm_gpu_t **gpu_out) { - uvm_gpu_peer_t *peer_caps; - NvHandle p2p_handle = 0; + NV_STATUS status = NV_OK; + uvm_gpu_t *gpu = NULL; + uvm_parent_gpu_t *parent_gpu; + UvmGpuInfo *gpu_info = NULL; + UvmGpuClientInfo client_info = {0}; + UvmGpuPlatformInfo gpu_platform_info = {0}; + uvm_gpu_id_t gpu_id; - UVM_ASSERT(gpu0); - UVM_ASSERT(gpu1); + client_info.hClient = user_rm_device->user_client; + client_info.hSmcPartRef = user_rm_device->user_object; + + gpu_info = uvm_kvmalloc_zero(sizeof(*gpu_info)); + if (!gpu_info) + return NV_ERR_NO_MEMORY; uvm_assert_mutex_locked(&g_uvm_global.global_lock); - peer_caps = uvm_gpu_peer_caps(gpu0, gpu1); + parent_gpu = uvm_parent_gpu_get_by_uuid_locked(gpu_uuid); - if (uvm_procfs_is_debug_enabled()) - deinit_procfs_peer_cap_files(peer_caps); + if (parent_gpu == NULL) { + // If this is the first time the UUID is seen, register it on RM + status = uvm_rm_locked_call(nvUvmInterfaceRegisterGpu(gpu_uuid, &gpu_platform_info)); + if (status != NV_OK) + goto error_free_gpu_info; + } - p2p_handle = peer_caps->p2p_handle; - UVM_ASSERT(p2p_handle); + status = uvm_rm_locked_call(nvUvmInterfaceGetGpuInfo(gpu_uuid, &client_info, gpu_info)); + if (status != NV_OK) + goto error_unregister; - uvm_mmu_destroy_peer_identity_mappings(gpu0, gpu1); - uvm_mmu_destroy_peer_identity_mappings(gpu1, gpu0); + if (parent_gpu != NULL) { + // If the UUID has been seen before, and if SMC is enabled, then check + // if this specific partition has been seen previously. The UUID-based + // look-up above may have succeeded for a different partition with the + // same parent GPU. + if (gpu_info->smcEnabled) { + gpu = uvm_gpu_get_by_parent_and_swizz_id(parent_gpu, gpu_info->smcSwizzId); + } + else { + gpu = parent_gpu->gpus[0]; + UVM_ASSERT(gpu != NULL); + } + } - uvm_rm_locked_call_void(nvUvmInterfaceP2pObjectDestroy(uvm_global_session_handle(), p2p_handle)); + if (gpu == NULL) { + status = find_unused_gpu_id(parent_gpu, &gpu_id); + if (status != NV_OK) + goto error_unregister; - UVM_ASSERT(uvm_gpu_get(gpu0->id) == gpu0); - UVM_ASSERT(uvm_gpu_get(gpu1->id) == gpu1); + status = add_gpu(gpu_uuid, gpu_id, gpu_info, &gpu_platform_info, parent_gpu, &gpu); + if (status != NV_OK) + goto error_unregister; + } + else { + atomic64_inc(&gpu->retained_count); + } - uvm_spin_lock(&gpu0->peer_info.peer_gpus_lock); - uvm_processor_mask_clear(&gpu0->peer_info.peer_gpu_mask, gpu1->id); - gpu0->peer_info.peer_gpus[uvm_id_gpu_index(gpu1->id)] = NULL; - uvm_spin_unlock(&gpu0->peer_info.peer_gpus_lock); + *gpu_out = gpu; - uvm_spin_lock(&gpu1->peer_info.peer_gpus_lock); - uvm_processor_mask_clear(&gpu1->peer_info.peer_gpu_mask, gpu0->id); - gpu1->peer_info.peer_gpus[uvm_id_gpu_index(gpu0->id)] = NULL; - uvm_spin_unlock(&gpu1->peer_info.peer_gpus_lock); + uvm_kvfree(gpu_info); - // Flush the access counter buffer to avoid getting stale notifications for - // accesses to GPUs to which peer access is being disabled. This is also - // needed in the case of disabling automatic (NVLINK) peers on GPU - // unregister, because access counter processing might still be using GPU - // IDs queried from the peer table above which are about to be removed from - // the global table. - if (gpu0->parent->access_counters_supported) - uvm_parent_gpu_access_counter_buffer_flush(gpu0->parent); - if (gpu1->parent->access_counters_supported) - uvm_parent_gpu_access_counter_buffer_flush(gpu1->parent); + return status; - memset(peer_caps, 0, sizeof(*peer_caps)); +error_unregister: + if (parent_gpu == NULL) + uvm_rm_locked_call_void(nvUvmInterfaceUnregisterGpu(gpu_uuid)); +error_free_gpu_info: + uvm_kvfree(gpu_info); + + return status; } -void uvm_gpu_release_pcie_peer_access(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1) +NV_STATUS uvm_gpu_retain_by_uuid(const NvProcessorUuid *gpu_uuid, + const uvm_rm_user_object_t *user_rm_device, + uvm_gpu_t **gpu_out) +{ + NV_STATUS status; + uvm_mutex_lock(&g_uvm_global.global_lock); + status = gpu_retain_by_uuid_locked(gpu_uuid, user_rm_device, gpu_out); + uvm_mutex_unlock(&g_uvm_global.global_lock); + return status; +} + +void uvm_gpu_release_locked(uvm_gpu_t *gpu) { - uvm_gpu_peer_t *peer_caps; + uvm_parent_gpu_t *parent_gpu = gpu->parent; + + uvm_assert_mutex_locked(&g_uvm_global.global_lock); + UVM_ASSERT(uvm_gpu_retained_count(gpu) > 0); + + if (atomic64_dec_and_test(&gpu->retained_count)) { + nv_kref_get(&parent_gpu->gpu_kref); + remove_gpu(gpu); + if (parent_gpu->num_retained_gpus == 0) + uvm_rm_locked_call_void(nvUvmInterfaceUnregisterGpu(&parent_gpu->uuid)); + uvm_parent_gpu_kref_put(parent_gpu); + } +} + +void uvm_gpu_release(uvm_gpu_t *gpu) +{ + uvm_mutex_lock(&g_uvm_global.global_lock); + uvm_gpu_release_locked(gpu); + uvm_mutex_unlock(&g_uvm_global.global_lock); +} + +NV_STATUS uvm_gpu_retain_pcie_peer_access(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1) +{ + NV_STATUS status; + UVM_ASSERT(gpu0); UVM_ASSERT(gpu1); uvm_assert_mutex_locked(&g_uvm_global.global_lock); - peer_caps = uvm_gpu_peer_caps(gpu0, gpu1); + status = peers_retain(gpu0, gpu1); + if (status != NV_OK) + return status; + + if (uvm_parent_gpu_peer_link_type(gpu0->parent, gpu1->parent) != UVM_GPU_LINK_PCIE) { + peers_release(gpu0, gpu1); + return NV_ERR_INVALID_DEVICE; + } - UVM_ASSERT(peer_caps->ref_count > 0); - UVM_ASSERT(peer_caps->link_type == UVM_GPU_LINK_PCIE); - peer_caps->ref_count--; + // GPUs can't be destroyed until their peer pairings have also been + // destroyed. + uvm_gpu_retain(gpu0); + uvm_gpu_retain(gpu1); - if (peer_caps->ref_count == 0) - disable_peer_access(gpu0, gpu1); + return NV_OK; +} + +void uvm_gpu_release_pcie_peer_access(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1) +{ + UVM_ASSERT(gpu0); + UVM_ASSERT(gpu1); + uvm_assert_mutex_locked(&g_uvm_global.global_lock); + UVM_ASSERT(uvm_parent_gpu_peer_link_type(gpu0->parent, gpu1->parent) == UVM_GPU_LINK_PCIE); + + peers_release(gpu0, gpu1); uvm_gpu_release_locked(gpu0); uvm_gpu_release_locked(gpu1); } -static uvm_aperture_t uvm_gpu_peer_caps_aperture(uvm_gpu_peer_t *peer_caps, uvm_gpu_t *local_gpu, uvm_gpu_t *remote_gpu) +uvm_gpu_link_type_t uvm_parent_gpu_peer_link_type(uvm_parent_gpu_t *parent_gpu0, uvm_parent_gpu_t *parent_gpu1) { - size_t peer_index; + uvm_parent_gpu_peer_t *parent_peer_caps; - // MIG instances in the same physical GPU have vidmem addresses - if (local_gpu->parent == remote_gpu->parent) - return UVM_APERTURE_VID; - - UVM_ASSERT(peer_caps->link_type != UVM_GPU_LINK_INVALID); + if (parent_gpu0 == parent_gpu1) + return UVM_GPU_LINK_INVALID; - if (uvm_id_value(local_gpu->id) < uvm_id_value(remote_gpu->id)) - peer_index = 0; - else - peer_index = 1; + parent_peer_caps = parent_gpu_peer_caps(parent_gpu0, parent_gpu1); + if (parent_peer_caps->ref_count == 0) + return UVM_GPU_LINK_INVALID; - return UVM_APERTURE_PEER(peer_caps->peer_ids[peer_index]); + return parent_peer_caps->link_type; } uvm_aperture_t uvm_gpu_peer_aperture(uvm_gpu_t *local_gpu, uvm_gpu_t *remote_gpu) { - uvm_gpu_peer_t *peer_caps = uvm_gpu_peer_caps(local_gpu, remote_gpu); - return uvm_gpu_peer_caps_aperture(peer_caps, local_gpu, remote_gpu); + uvm_parent_gpu_peer_t *parent_peer_caps; + + // MIG instances in the same physical GPU have vidmem addresses + if (uvm_gpus_are_smc_peers(local_gpu, remote_gpu)) + return UVM_APERTURE_VID; + + parent_peer_caps = parent_gpu_peer_caps(local_gpu->parent, remote_gpu->parent); + return parent_gpu_peer_aperture(local_gpu->parent, remote_gpu->parent, parent_peer_caps); +} + +NvU64 uvm_gpu_peer_ref_count(const uvm_gpu_t *gpu0, const uvm_gpu_t *gpu1) +{ + UVM_ASSERT(!uvm_gpus_are_smc_peers(gpu0, gpu1)); + + return gpu_peer_caps(gpu0, gpu1)->ref_count; } uvm_aperture_t uvm_get_page_tree_location(const uvm_parent_gpu_t *parent_gpu) @@ -2741,10 +2867,11 @@ uvm_processor_id_t uvm_gpu_get_processor_id_by_address(uvm_gpu_t *gpu, uvm_gpu_p for_each_gpu_id_in_mask(id, &gpu->peer_info.peer_gpu_mask) { uvm_gpu_t *other_gpu = gpu->peer_info.peer_gpus[uvm_id_gpu_index(id)]; + UVM_ASSERT(other_gpu); UVM_ASSERT(!uvm_gpus_are_smc_peers(gpu, other_gpu)); - if (uvm_gpus_are_nvswitch_connected(gpu, other_gpu)) { + if (uvm_parent_gpus_are_nvswitch_connected(gpu->parent, other_gpu->parent)) { // NVSWITCH connected systems use an extended physical address to // map to peers. Find the physical memory 'slot' containing the // given physical address to find the peer gpu that owns the @@ -2766,12 +2893,6 @@ uvm_processor_id_t uvm_gpu_get_processor_id_by_address(uvm_gpu_t *gpu, uvm_gpu_p return id; } -uvm_gpu_peer_t *uvm_gpu_index_peer_caps(const uvm_gpu_id_t gpu_id0, const uvm_gpu_id_t gpu_id1) -{ - NvU32 table_index = uvm_gpu_peer_table_index(gpu_id0, gpu_id1); - return &g_uvm_global.peers[table_index]; -} - static NvU64 instance_ptr_to_key(uvm_gpu_phys_address_t instance_ptr) { NvU64 key; diff --git a/kernel-open/nvidia-uvm/uvm_gpu.h b/kernel-open/nvidia-uvm/uvm_gpu.h index f6b319b73e..439f19eca3 100644 --- a/kernel-open/nvidia-uvm/uvm_gpu.h +++ b/kernel-open/nvidia-uvm/uvm_gpu.h @@ -49,9 +49,13 @@ #include #include "uvm_conf_computing.h" -// Buffer length to store uvm gpu id, RM device name and gpu uuid. -#define UVM_GPU_NICE_NAME_BUFFER_LENGTH (sizeof("ID 999: : ") + \ - UVM_GPU_NAME_LENGTH + UVM_GPU_UUID_TEXT_BUFFER_LENGTH) +#define UVM_PARENT_GPU_UUID_PREFIX "GPU-" +#define UVM_GPU_UUID_PREFIX "GI-" + +// UVM_UUID_STRING_LENGTH already includes NULL, don't double-count it with +// sizeof() +#define UVM_PARENT_GPU_UUID_STRING_LENGTH (sizeof(UVM_PARENT_GPU_UUID_PREFIX) - 1 + UVM_UUID_STRING_LENGTH) +#define UVM_GPU_UUID_STRING_LENGTH (sizeof(UVM_GPU_UUID_PREFIX) - 1 + UVM_UUID_STRING_LENGTH) #define UVM_GPU_MAGIC_VALUE 0xc001d00d12341993ULL @@ -184,29 +188,45 @@ struct uvm_service_block_context_struct typedef struct { - // Mask of read faulted pages in a UVM_VA_BLOCK_SIZE aligned region of a SAM - // VMA. Used for batching ATS faults in a vma. This is unused for access - // counter service requests. - uvm_page_mask_t read_fault_mask; - - // Mask of write faulted pages in a UVM_VA_BLOCK_SIZE aligned region of a - // SAM VMA. Used for batching ATS faults in a vma. This is unused for access - // counter service requests. - uvm_page_mask_t write_fault_mask; - - // Mask of successfully serviced pages in a UVM_VA_BLOCK_SIZE aligned region - // of a SAM VMA. Used to return ATS fault status. This is unused for access - // counter service requests. - uvm_page_mask_t faults_serviced_mask; - - // Mask of successfully serviced read faults on pages in write_fault_mask. - // This is unused for access counter service requests. - uvm_page_mask_t reads_serviced_mask; - - // Mask of all accessed pages in a UVM_VA_BLOCK_SIZE aligned region of a SAM - // VMA. This is used as input for access counter service requests and output - // of fault service requests. - uvm_page_mask_t accessed_mask; + union + { + struct + { + // Mask of read faulted pages in a UVM_VA_BLOCK_SIZE aligned region + // of a SAM VMA. Used for batching ATS faults in a vma. + uvm_page_mask_t read_fault_mask; + + // Mask of write faulted pages in a UVM_VA_BLOCK_SIZE aligned region + // of a SAM VMA. Used for batching ATS faults in a vma. + uvm_page_mask_t write_fault_mask; + + // Mask of all faulted pages in a UVM_VA_BLOCK_SIZE aligned region + // of a SAM VMA. This is a logical or of read_fault_mask and + // write_mask. + uvm_page_mask_t accessed_mask; + + // Mask of successfully serviced pages in a UVM_VA_BLOCK_SIZE + // aligned region of a SAM VMA. Used to return ATS fault status. + uvm_page_mask_t faults_serviced_mask; + + // Mask of successfully serviced read faults on pages in + // write_fault_mask. + uvm_page_mask_t reads_serviced_mask; + + } faults; + + struct + { + // Mask of all accessed pages in a UVM_VA_BLOCK_SIZE aligned region + // of a SAM VMA. + uvm_page_mask_t accessed_mask; + + // Mask of successfully migrated pages in a UVM_VA_BLOCK_SIZE + // aligned region of a SAM VMA. + uvm_page_mask_t migrated_mask; + + } access_counters; + }; // Client type of the service requestor. uvm_fault_client_type_t client_type; @@ -633,9 +653,10 @@ struct uvm_gpu_struct NvProcessorUuid uuid; // Nice printable name in the format: - // ID: 999: GPU- UVM-GI-. - // UVM_GPU_UUID_TEXT_BUFFER_LENGTH includes the null character. - char name[9 + 2 * UVM_GPU_UUID_TEXT_BUFFER_LENGTH]; + // ID: 999: GPU- GI- + // UVM_PARENT_GPU_UUID_STRING_LENGTH includes a NULL character but will be + // used for a space instead. + char name[sizeof("ID: 999: ") - 1 + UVM_PARENT_GPU_UUID_STRING_LENGTH - 1 + 1 + UVM_GPU_UUID_STRING_LENGTH]; // Refcount of the gpu, i.e. how many times it has been retained. This is // roughly a count of how many times it has been registered with a VA space, @@ -682,6 +703,12 @@ struct uvm_gpu_struct bool enabled; unsigned int node_id; } numa; + + // Physical address of the start of statically mapped fb memory in BAR1 + NvU64 static_bar1_start; + + // Size of statically mapped fb memory in BAR1. + NvU64 static_bar1_size; } mem_info; struct @@ -706,9 +733,6 @@ struct uvm_gpu_struct struct { // Mask of peer_gpus set - // - // We can use a regular processor id because P2P is not allowed between - // partitioned GPUs when SMC is enabled uvm_processor_mask_t peer_gpu_mask; // lazily-populated array of peer GPUs, indexed by the peer's GPU index @@ -859,16 +883,19 @@ struct uvm_gpu_struct struct { + // "gpus/UVM-GPU-${physical-UUID}/${sub_processor_index}/" struct proc_dir_entry *dir; + // "gpus/${gpu_id}" -> "UVM-GPU-${physical-UUID}/${sub_processor_index}" struct proc_dir_entry *dir_symlink; - // The GPU instance UUID symlink if SMC is enabled. + // The GPU instance UUID symlink. + // "gpus/UVM-GI-${GI-UUID}" -> + // "UVM-GPU-${physical-UUID}/${sub_processor_index}" struct proc_dir_entry *gpu_instance_uuid_symlink; + // "gpus/UVM-GPU-${physical-UUID}/${sub_processor_index}/info" struct proc_dir_entry *info_file; - - struct proc_dir_entry *dir_peers; } procfs; // Placeholder for per-GPU performance heuristics information @@ -876,6 +903,13 @@ struct uvm_gpu_struct // Force pushbuffer's GPU VA to be >= 1TB; used only for testing purposes. bool uvm_test_force_upper_pushbuffer_segment; + + // Have we initialised device p2p pages. + bool device_p2p_initialised; + + // Used to protect allocation of p2p_mem and assignment of the page + // zone_device_data fields. + uvm_mutex_t device_p2p_lock; }; // In order to support SMC/MIG GPU partitions, we split UVM GPUs into two @@ -905,7 +939,7 @@ struct uvm_parent_gpu_struct NvProcessorUuid uuid; // Nice printable name including the uvm gpu id, ascii name from RM and uuid - char name[UVM_GPU_NICE_NAME_BUFFER_LENGTH]; + char name[sizeof("ID 999: : ") - 1 + UVM_GPU_NAME_LENGTH + UVM_PARENT_GPU_UUID_STRING_LENGTH]; // GPU information and provided by RM (architecture, implementation, // hardware classes, etc.). @@ -1087,11 +1121,17 @@ struct uvm_parent_gpu_struct struct { + // "gpus/UVM-GPU-${physical-UUID}/" struct proc_dir_entry *dir; + // "gpus/UVM-GPU-${physical-UUID}/fault_stats" struct proc_dir_entry *fault_stats_file; + // "gpus/UVM-GPU-${physical-UUID}/access_counters" struct proc_dir_entry *access_counters_file; + + // "gpus/UVM-GPU-${physical-UUID}/peers/" + struct proc_dir_entry *dir_peers; } procfs; // Interrupt handling state and locks @@ -1239,42 +1279,59 @@ static uvmGpuDeviceHandle uvm_gpu_device_handle(uvm_gpu_t *gpu) return gpu->parent->rm_device; } -struct uvm_gpu_peer_struct +typedef struct +{ + // ref_count also controls state maintained in each GPU instance + // (uvm_gpu_t). See init_peer_access(). + NvU64 ref_count; +} uvm_gpu_peer_t; + +typedef struct { // The fields in this global structure can only be inspected under one of // the following conditions: // - // - The VA space lock is held for either read or write, both GPUs are - // registered in the VA space, and the corresponding bit in the + // - The VA space lock is held for either read or write, both parent GPUs + // are registered in the VA space, and the corresponding bit in the // va_space.enabled_peers bitmap is set. // // - The global lock is held. // - // - While the global lock was held in the past, the two GPUs were detected - // to be SMC peers and were both retained. + // - While the global lock was held in the past, the two parent GPUs were + // both retained. // - // - While the global lock was held in the past, the two GPUs were detected - // to be NVLINK peers and were both retained. + // - While the global lock was held in the past, the two parent GPUs were + // detected to be NVLINK peers and were both retained. // - // - While the global lock was held in the past, the two GPUs were detected - // to be PCIe peers and uvm_gpu_retain_pcie_peer_access() was called. + // - While the global lock was held in the past, the two parent GPUs were + // detected to be PCIe peers and uvm_gpu_retain_pcie_peer_access() was + // called. // // - The peer_gpus_lock is held on one of the GPUs. In this case, the other // GPU must be read from the original GPU's peer_gpus table. The fields // will not change while the lock is held, but they may no longer be valid // because the other GPU might be in teardown. - // Peer Id associated with this device w.r.t. to a peer GPU. + // This field is used to determine when this struct has been initialized + // (ref_count != 0). NVLink peers are initialized at GPU registration time. + // PCIe peers are initialized when retain_pcie_peers_from_uuids() is called. + NvU64 ref_count; + + // Saved values from UvmGpuP2PCapsParams to be used after GPU instance + // creation. This should be per GPU instance since LCEs are associated with + // GPU instances, not parent GPUs, but for now MIG is not supported for + // NVLINK peers so RM associates this state with the parent GPUs. This will + // need to be revisited if that NVLINK MIG peer support is added. + NvU8 optimalNvlinkWriteCEs[2]; + + // Peer Id associated with this device with respect to a peer parent GPU. // Note: peerId (A -> B) != peerId (B -> A) // peer_id[0] from min(gpu_id_1, gpu_id_2) -> max(gpu_id_1, gpu_id_2) // peer_id[1] from max(gpu_id_1, gpu_id_2) -> min(gpu_id_1, gpu_id_2) NvU8 peer_ids[2]; - // The link type between the peer GPUs, currently either PCIe or NVLINK. - // This field is used to determine the when this peer struct has been - // initialized (link_type != UVM_GPU_LINK_INVALID). NVLink peers are - // initialized at GPU registration time. PCIe peers are initialized when - // the refcount below goes from 0 to 1. + // The link type between the peer parent GPUs, currently either PCIe or + // NVLINK. uvm_gpu_link_type_t link_type; // Maximum unidirectional bandwidth between the peers in megabytes per @@ -1282,10 +1339,6 @@ struct uvm_gpu_peer_struct // See UvmGpuP2PCapsParams. NvU32 total_link_line_rate_mbyte_per_s; - // For PCIe, the number of times that this has been retained by a VA space. - // For NVLINK this will always be 1. - NvU64 ref_count; - // This handle gets populated when enable_peer_access successfully creates // an NV50_P2P object. disable_peer_access resets the same on the object // deletion. @@ -1299,9 +1352,13 @@ struct uvm_gpu_peer_struct // GPU-A <-> GPU-B link is bidirectional, pairs[x][0] is always the // local GPU, while pairs[x][1] is the remote GPU. The table shall be // filled like so: [[GPU-A, GPU-B], [GPU-B, GPU-A]]. - uvm_gpu_t *pairs[2][2]; + uvm_parent_gpu_t *pairs[2][2]; } procfs; -}; + + // Peer-to-peer state for MIG instance pairs between two different parent + // GPUs. + uvm_gpu_peer_t gpu_peers[UVM_MAX_UNIQUE_SUB_PROCESSOR_PAIRS]; +} uvm_parent_gpu_peer_t; // Initialize global gpu state NV_STATUS uvm_gpu_init(void); @@ -1380,12 +1437,12 @@ static NvU64 uvm_gpu_retained_count(uvm_gpu_t *gpu) return atomic64_read(&gpu->retained_count); } -// Decrease the refcount on the parent GPU object, and actually delete the object -// if the refcount hits zero. +// Decrease the refcount on the parent GPU object, and actually delete the +// object if the refcount hits zero. void uvm_parent_gpu_kref_put(uvm_parent_gpu_t *gpu); -// Calculates peer table index using GPU ids. -NvU32 uvm_gpu_peer_table_index(const uvm_gpu_id_t gpu_id0, const uvm_gpu_id_t gpu_id1); +// Returns a GPU peer pair index in the range [0 .. UVM_MAX_UNIQUE_GPU_PAIRS). +NvU32 uvm_gpu_pair_index(const uvm_gpu_id_t id0, const uvm_gpu_id_t id1); // Either retains an existing PCIe peer entry or creates a new one. In both // cases the two GPUs are also each retained. @@ -1396,35 +1453,26 @@ NV_STATUS uvm_gpu_retain_pcie_peer_access(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1); // LOCKING: requires the global lock to be held void uvm_gpu_release_pcie_peer_access(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1); +uvm_gpu_link_type_t uvm_parent_gpu_peer_link_type(uvm_parent_gpu_t *parent_gpu0, uvm_parent_gpu_t *parent_gpu1); + // Get the aperture for local_gpu to use to map memory resident on remote_gpu. // They must not be the same gpu. uvm_aperture_t uvm_gpu_peer_aperture(uvm_gpu_t *local_gpu, uvm_gpu_t *remote_gpu); +// Return the reference count for the P2P state between the given GPUs. +// The two GPUs must have different parents. +NvU64 uvm_gpu_peer_ref_count(const uvm_gpu_t *gpu0, const uvm_gpu_t *gpu1); + // Get the processor id accessible by the given GPU for the given physical // address. uvm_processor_id_t uvm_gpu_get_processor_id_by_address(uvm_gpu_t *gpu, uvm_gpu_phys_address_t addr); -// Get the P2P capabilities between the gpus with the given indexes -uvm_gpu_peer_t *uvm_gpu_index_peer_caps(const uvm_gpu_id_t gpu_id0, const uvm_gpu_id_t gpu_id1); - -// Get the P2P capabilities between the given gpus -static uvm_gpu_peer_t *uvm_gpu_peer_caps(const uvm_gpu_t *gpu0, const uvm_gpu_t *gpu1) -{ - return uvm_gpu_index_peer_caps(gpu0->id, gpu1->id); -} +bool uvm_parent_gpus_are_nvswitch_connected(const uvm_parent_gpu_t *parent_gpu0, const uvm_parent_gpu_t *parent_gpu1); -static bool uvm_gpus_are_nvswitch_connected(const uvm_gpu_t *gpu0, const uvm_gpu_t *gpu1) +static bool uvm_gpus_are_smc_peers(const uvm_gpu_t *gpu0, const uvm_gpu_t *gpu1) { - if (gpu0->parent->nvswitch_info.is_nvswitch_connected && gpu1->parent->nvswitch_info.is_nvswitch_connected) { - UVM_ASSERT(uvm_gpu_peer_caps(gpu0, gpu1)->link_type >= UVM_GPU_LINK_NVLINK_2); - return true; - } - - return false; -} + UVM_ASSERT(gpu0 != gpu1); -static bool uvm_gpus_are_smc_peers(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1) -{ return gpu0->parent == gpu1->parent; } @@ -1595,9 +1643,6 @@ static bool uvm_parent_gpu_needs_proxy_channel_pool(const uvm_parent_gpu_t *pare uvm_aperture_t uvm_get_page_tree_location(const uvm_parent_gpu_t *parent_gpu); -// Debug print of GPU properties -void uvm_gpu_print(uvm_gpu_t *gpu); - // Add the given instance pointer -> user_channel mapping to this GPU. The // bottom half GPU page fault handler uses this to look up the VA space for GPU // faults. @@ -1637,4 +1682,7 @@ typedef enum UVM_GPU_BUFFER_FLUSH_MODE_WAIT_UPDATE_PUT, } uvm_gpu_buffer_flush_mode_t; +// PCIe BAR containing static framebuffer memory mappings for PCIe P2P +int uvm_device_p2p_static_bar(uvm_gpu_t *gpu); + #endif // __UVM_GPU_H__ diff --git a/kernel-open/nvidia-uvm/uvm_gpu_access_counters.c b/kernel-open/nvidia-uvm/uvm_gpu_access_counters.c index 40e49ca61d..595f9cddc8 100644 --- a/kernel-open/nvidia-uvm/uvm_gpu_access_counters.c +++ b/kernel-open/nvidia-uvm/uvm_gpu_access_counters.c @@ -24,6 +24,7 @@ #include "nv_uvm_interface.h" #include "uvm_gpu_access_counters.h" #include "uvm_global.h" +#include "uvm_api.h" #include "uvm_gpu.h" #include "uvm_hal.h" #include "uvm_kvmalloc.h" @@ -43,8 +44,9 @@ #define UVM_PERF_ACCESS_COUNTER_THRESHOLD_MAX ((1 << 16) - 1) #define UVM_PERF_ACCESS_COUNTER_THRESHOLD_DEFAULT 256 -#define UVM_ACCESS_COUNTER_ACTION_CLEAR 0x1 -#define UVM_ACCESS_COUNTER_PHYS_ON_MANAGED 0x2 +#define UVM_ACCESS_COUNTER_ACTION_BATCH_CLEAR 0x1 +#define UVM_ACCESS_COUNTER_ACTION_TARGETED_CLEAR 0x2 +#define UVM_ACCESS_COUNTER_PHYS_ON_MANAGED 0x4 // Each page in a tracked physical range may belong to a different VA Block. We // preallocate an array of reverse map translations. However, access counter @@ -600,7 +602,7 @@ NV_STATUS uvm_gpu_access_counters_enable(uvm_gpu_t *gpu, uvm_va_space_t *va_spac uvm_parent_gpu_access_counters_isr_lock(gpu->parent); if (uvm_parent_processor_mask_test(&va_space->access_counters_enabled_processors, gpu->parent->id)) { - status = NV_ERR_INVALID_DEVICE; + status = NV_OK; } else { UvmGpuAccessCntrConfig default_config = @@ -684,7 +686,10 @@ static void access_counter_buffer_flush_locked(uvm_parent_gpu_t *parent_gpu, while (get != put) { // Wait until valid bit is set - UVM_SPIN_WHILE(!parent_gpu->access_counter_buffer_hal->entry_is_valid(parent_gpu, get), &spin); + UVM_SPIN_WHILE(!parent_gpu->access_counter_buffer_hal->entry_is_valid(parent_gpu, get), &spin) { + if (uvm_global_get_status() != NV_OK) + goto done; + } parent_gpu->access_counter_buffer_hal->entry_clear_valid(parent_gpu, get); ++get; @@ -692,6 +697,7 @@ static void access_counter_buffer_flush_locked(uvm_parent_gpu_t *parent_gpu, get = 0; } +done: write_get(parent_gpu, get); } @@ -830,12 +836,18 @@ static NvU32 fetch_access_counter_buffer_entries(uvm_parent_gpu_t *parent_gpu, (fetch_mode == NOTIFICATION_FETCH_MODE_ALL || notification_index < access_counters->max_batch_size)) { uvm_access_counter_buffer_entry_t *current_entry = ¬ification_cache[notification_index]; - // We cannot just wait for the last entry (the one pointed by put) to become valid, we have to do it - // individually since entries can be written out of order + // We cannot just wait for the last entry (the one pointed by put) to + // become valid, we have to do it individually since entries can be + // written out of order UVM_SPIN_WHILE(!parent_gpu->access_counter_buffer_hal->entry_is_valid(parent_gpu, get), &spin) { // We have some entry to work on. Let's do the rest later. if (fetch_mode != NOTIFICATION_FETCH_MODE_ALL && notification_index > 0) goto done; + + // There's no entry to work on and something has gone wrong. Ignore + // the rest. + if (uvm_global_get_status() != NV_OK) + goto done; } // Prevent later accesses being moved above the read of the valid bit @@ -991,7 +1003,9 @@ static NV_STATUS notify_tools_broadcast_and_process_flags(uvm_parent_gpu_t *pare uvm_tools_broadcast_access_counter(gpu, notification_start[i], flags & UVM_ACCESS_COUNTER_PHYS_ON_MANAGED); } - if (flags & UVM_ACCESS_COUNTER_ACTION_CLEAR) + UVM_ASSERT(!(flags & UVM_ACCESS_COUNTER_ACTION_TARGETED_CLEAR)); + + if (flags & UVM_ACCESS_COUNTER_ACTION_BATCH_CLEAR) status = access_counter_clear_notifications(gpu, notification_start, num_entries); return status; @@ -999,9 +1013,11 @@ static NV_STATUS notify_tools_broadcast_and_process_flags(uvm_parent_gpu_t *pare static NV_STATUS notify_tools_and_process_flags(uvm_va_space_t *va_space, uvm_gpu_t *gpu, + NvU64 base, uvm_access_counter_buffer_entry_t **notification_start, NvU32 num_entries, - NvU32 flags) + NvU32 flags, + uvm_page_mask_t *migrated_mask) { NV_STATUS status = NV_OK; @@ -1016,8 +1032,39 @@ static NV_STATUS notify_tools_and_process_flags(uvm_va_space_t *va_space, } } - if (flags & UVM_ACCESS_COUNTER_ACTION_CLEAR) + if (flags & UVM_ACCESS_COUNTER_ACTION_TARGETED_CLEAR) { + NvU32 i; + + UVM_ASSERT(base); + UVM_ASSERT(migrated_mask); + + for (i = 0; i < num_entries; i++) { + NvU32 start_index = i; + NvU32 end_index; + + for (end_index = i; end_index < num_entries; end_index++) { + NvU32 mask_index = (notification_start[end_index]->address.address - base) / PAGE_SIZE; + + if (!uvm_page_mask_test(migrated_mask, mask_index)) + break; + } + + if (end_index > start_index) { + status = access_counter_clear_notifications(gpu, + ¬ification_start[start_index], + end_index - start_index); + if (status != NV_OK) + return status; + } + + i = end_index; + } + } + else if (flags & UVM_ACCESS_COUNTER_ACTION_BATCH_CLEAR) { + UVM_ASSERT(!base); + UVM_ASSERT(!migrated_mask); status = access_counter_clear_notifications(gpu, notification_start, num_entries); + } return status; } @@ -1242,7 +1289,7 @@ static NV_STATUS service_phys_single_va_block(uvm_access_counter_service_batch_c const uvm_processor_id_t processor = current_entry->counter_type == UVM_ACCESS_COUNTER_TYPE_MIMC? gpu->id: UVM_ID_CPU; - *out_flags &= ~UVM_ACCESS_COUNTER_ACTION_CLEAR; + *out_flags &= ~UVM_ACCESS_COUNTER_ACTION_BATCH_CLEAR; UVM_ASSERT(num_reverse_mappings > 0); @@ -1304,7 +1351,7 @@ static NV_STATUS service_phys_single_va_block(uvm_access_counter_service_batch_c } if (status == NV_OK) - *out_flags |= UVM_ACCESS_COUNTER_ACTION_CLEAR; + *out_flags |= UVM_ACCESS_COUNTER_ACTION_BATCH_CLEAR; } done: @@ -1329,7 +1376,7 @@ static NV_STATUS service_phys_va_blocks(uvm_access_counter_service_batch_context NV_STATUS status = NV_OK; size_t index; - *out_flags &= ~UVM_ACCESS_COUNTER_ACTION_CLEAR; + *out_flags &= ~UVM_ACCESS_COUNTER_ACTION_BATCH_CLEAR; for (index = 0; index < num_reverse_mappings; ++index) { NvU32 out_flags_local = 0; @@ -1341,7 +1388,7 @@ static NV_STATUS service_phys_va_blocks(uvm_access_counter_service_batch_context if (status != NV_OK) break; - UVM_ASSERT((out_flags_local & ~UVM_ACCESS_COUNTER_ACTION_CLEAR) == 0); + UVM_ASSERT((out_flags_local & ~UVM_ACCESS_COUNTER_ACTION_BATCH_CLEAR) == 0); *out_flags |= out_flags_local; } @@ -1473,7 +1520,7 @@ static NV_STATUS service_phys_notification(uvm_access_counter_service_batch_cont resident_gpu = uvm_gpu_get(current_entry->physical_info.resident_id); UVM_ASSERT(resident_gpu != NULL); - if (gpu != resident_gpu && uvm_gpus_are_nvswitch_connected(gpu, resident_gpu)) { + if (gpu != resident_gpu && uvm_parent_gpus_are_nvswitch_connected(gpu->parent, resident_gpu->parent)) { UVM_ASSERT(address >= resident_gpu->parent->nvswitch_info.fabric_memory_window_start); address -= resident_gpu->parent->nvswitch_info.fabric_memory_window_start; } @@ -1499,7 +1546,7 @@ static NV_STATUS service_phys_notification(uvm_access_counter_service_batch_cont &out_flags_local); total_reverse_mappings += num_reverse_mappings; - UVM_ASSERT((out_flags_local & ~UVM_ACCESS_COUNTER_ACTION_CLEAR) == 0); + UVM_ASSERT((out_flags_local & ~UVM_ACCESS_COUNTER_ACTION_BATCH_CLEAR) == 0); flags |= out_flags_local; if (status != NV_OK) @@ -1610,7 +1657,7 @@ static void expand_notification_block(uvm_gpu_va_space_t *gpu_va_space, return; if (UVM_ID_IS_GPU(resident_id)) - resident_gpu = uvm_va_space_get_gpu(gpu_va_space->va_space, resident_id); + resident_gpu = uvm_gpu_get(resident_id); if (uvm_va_block_get_physical_size(va_block, resident_id, page_index) != granularity) { uvm_page_mask_set(accessed_pages, page_index); @@ -1692,9 +1739,15 @@ static NV_STATUS service_virt_notifications_in_block(uvm_gpu_va_space_t *gpu_va_ uvm_mutex_unlock(&va_block->lock); if (status == NV_OK) - flags |= UVM_ACCESS_COUNTER_ACTION_CLEAR; + flags |= UVM_ACCESS_COUNTER_ACTION_BATCH_CLEAR; - flags_status = notify_tools_and_process_flags(va_space, gpu, ¬ifications[index], *out_index - index, flags); + flags_status = notify_tools_and_process_flags(va_space, + gpu, + 0, + ¬ifications[index], + *out_index - index, + flags, + NULL); if ((status == NV_OK) && (flags_status != NV_OK)) status = flags_status; @@ -1713,7 +1766,6 @@ static NV_STATUS service_virt_notification_ats(uvm_gpu_va_space_t *gpu_va_space, NvU64 base; NvU64 end; NvU64 address; - NvU32 flags = UVM_ACCESS_COUNTER_ACTION_CLEAR; NV_STATUS status = NV_OK; NV_STATUS flags_status; struct vm_area_struct *vma = NULL; @@ -1733,7 +1785,13 @@ static NV_STATUS service_virt_notification_ats(uvm_gpu_va_space_t *gpu_va_space, if (!vma) { // Clear the notification entry to continue receiving access counter // notifications when a new VMA is allocated in this range. - status = notify_tools_and_process_flags(va_space, gpu, ¬ifications[index], 1, flags); + status = notify_tools_and_process_flags(va_space, + gpu, + 0, + ¬ifications[index], + 1, + UVM_ACCESS_COUNTER_ACTION_BATCH_CLEAR, + NULL); *out_index = index + 1; return status; } @@ -1741,7 +1799,7 @@ static NV_STATUS service_virt_notification_ats(uvm_gpu_va_space_t *gpu_va_space, base = UVM_VA_BLOCK_ALIGN_DOWN(address); end = min(base + UVM_VA_BLOCK_SIZE, (NvU64)vma->vm_end); - uvm_page_mask_zero(&ats_context->accessed_mask); + uvm_page_mask_zero(&ats_context->access_counters.accessed_mask); for (i = index; i < batch_context->virt.num_notifications; i++) { uvm_access_counter_buffer_entry_t *current_entry = notifications[i]; @@ -1750,7 +1808,7 @@ static NV_STATUS service_virt_notification_ats(uvm_gpu_va_space_t *gpu_va_space, if (current_entry->virtual_info.va_space != va_space || current_entry->gpu != gpu || address >= end) break; - uvm_page_mask_set(&ats_context->accessed_mask, (address - base) / PAGE_SIZE); + uvm_page_mask_set(&ats_context->access_counters.accessed_mask, (address - base) / PAGE_SIZE); } *out_index = i; @@ -1762,10 +1820,15 @@ static NV_STATUS service_virt_notification_ats(uvm_gpu_va_space_t *gpu_va_space, // location is set // If no pages were actually migrated, don't clear the access counters. status = uvm_ats_service_access_counters(gpu_va_space, vma, base, ats_context); - if (status != NV_OK) - flags &= ~UVM_ACCESS_COUNTER_ACTION_CLEAR; - flags_status = notify_tools_and_process_flags(va_space, gpu, ¬ifications[index], *out_index - index, flags); + flags_status = notify_tools_and_process_flags(va_space, + gpu, + base, + ¬ifications[index], + *out_index - index, + UVM_ACCESS_COUNTER_ACTION_TARGETED_CLEAR, + &ats_context->access_counters.migrated_mask); + if ((status == NV_OK) && (flags_status != NV_OK)) status = flags_status; @@ -1799,25 +1862,32 @@ static NV_STATUS service_virt_notifications_batch(uvm_gpu_va_space_t *gpu_va_spa // Avoid clearing the entry by default. NvU32 flags = 0; uvm_va_block_t *va_block = NULL; + uvm_va_range_managed_t *managed_range = uvm_va_range_to_managed_or_null(va_range); - if (va_range->type == UVM_VA_RANGE_TYPE_MANAGED) { - size_t index = uvm_va_range_block_index(va_range, address); + if (managed_range) { + size_t index = uvm_va_range_block_index(managed_range, address); - va_block = uvm_va_range_block(va_range, index); + va_block = uvm_va_range_block(managed_range, index); // If the va_range is a managed range, the notification belongs to a // recently freed va_range if va_block is NULL. If va_block is not // NULL, service_virt_notifications_in_block will process flags. // Clear the notification entry to continue receiving notifications // when a new va_range is allocated in that region. - flags = UVM_ACCESS_COUNTER_ACTION_CLEAR; + flags = UVM_ACCESS_COUNTER_ACTION_BATCH_CLEAR; } if (va_block) { status = service_virt_notifications_in_block(gpu_va_space, mm, va_block, batch_context, index, out_index); } else { - status = notify_tools_and_process_flags(va_space, gpu_va_space->gpu, batch_context->virt.notifications, 1, flags); + status = notify_tools_and_process_flags(va_space, + gpu_va_space->gpu, + 0, + batch_context->virt.notifications, + 1, + flags, + NULL); *out_index = index + 1; } } @@ -1839,7 +1909,7 @@ static NV_STATUS service_virt_notifications_batch(uvm_gpu_va_space_t *gpu_va_spa // - If the va_block isn't HMM, the notification belongs to a recently // freed va_range. Clear the notification entry to continue receiving // notifications when a new va_range is allocated in this region. - flags = va_block ? 0 : UVM_ACCESS_COUNTER_ACTION_CLEAR; + flags = va_block ? 0 : UVM_ACCESS_COUNTER_ACTION_BATCH_CLEAR; UVM_ASSERT((status == NV_ERR_OBJECT_NOT_FOUND) || (status == NV_ERR_INVALID_ADDRESS) || @@ -1849,9 +1919,11 @@ static NV_STATUS service_virt_notifications_batch(uvm_gpu_va_space_t *gpu_va_spa // in the batch. status = notify_tools_and_process_flags(va_space, gpu_va_space->gpu, + 0, batch_context->virt.notifications, 1, - flags); + flags, + NULL); *out_index = index + 1; } @@ -1917,9 +1989,11 @@ static NV_STATUS service_virt_notifications(uvm_parent_gpu_t *parent_gpu, else { status = notify_tools_and_process_flags(va_space, current_entry->gpu, + 0, &batch_context->virt.notifications[i], 1, - 0); + 0, + NULL); i++; } } @@ -1979,6 +2053,64 @@ void uvm_parent_gpu_service_access_counters(uvm_parent_gpu_t *parent_gpu) } } +NV_STATUS uvm_api_clear_all_access_counters(UVM_CLEAR_ALL_ACCESS_COUNTERS_PARAMS *params, struct file *filp) +{ + uvm_gpu_t *gpu; + uvm_parent_gpu_t *parent_gpu = NULL; + NV_STATUS status = NV_OK; + uvm_va_space_t *va_space = uvm_va_space_get(filp); + uvm_processor_mask_t *retained_gpus; + + retained_gpus = uvm_processor_mask_cache_alloc(); + if (!retained_gpus) + return NV_ERR_NO_MEMORY; + + uvm_processor_mask_zero(retained_gpus); + + uvm_va_space_down_read(va_space); + + for_each_va_space_gpu(gpu, va_space) { + + if (gpu->parent == parent_gpu) + continue; + + uvm_gpu_retain(gpu); + uvm_processor_mask_set(retained_gpus, gpu->id); + parent_gpu = gpu->parent; + } + + uvm_va_space_up_read(va_space); + + for_each_gpu_in_mask(gpu, retained_gpus) { + + if (!gpu->parent->access_counters_supported) + continue; + + uvm_parent_gpu_access_counters_isr_lock(gpu->parent); + + // Access counters not enabled. Nothing to clear + if (gpu->parent->isr.access_counters.handling_ref_count) { + uvm_access_counter_buffer_info_t *access_counters = &gpu->parent->access_counter_buffer_info; + + status = access_counter_clear_all(gpu); + if (status == NV_OK) + status = uvm_tracker_wait(&access_counters->clear_tracker); + } + + uvm_parent_gpu_access_counters_isr_unlock(gpu->parent); + + if (status != NV_OK) + break; + } + + for_each_gpu_in_mask(gpu, retained_gpus) + uvm_gpu_release(gpu); + + uvm_processor_mask_cache_free(retained_gpus); + + return status; +} + static const NvU32 g_uvm_access_counters_threshold_max = (1 << 15) - 1; static NV_STATUS access_counters_config_from_test_params(const UVM_TEST_RECONFIGURE_ACCESS_COUNTERS_PARAMS *params, diff --git a/kernel-open/nvidia-uvm/uvm_gpu_non_replayable_faults.c b/kernel-open/nvidia-uvm/uvm_gpu_non_replayable_faults.c index 4308a281ba..a32e5b3527 100644 --- a/kernel-open/nvidia-uvm/uvm_gpu_non_replayable_faults.c +++ b/kernel-open/nvidia-uvm/uvm_gpu_non_replayable_faults.c @@ -579,8 +579,9 @@ static NV_STATUS service_non_managed_fault(uvm_gpu_va_space_t *gpu_va_space, uvm_fault_access_type_t fault_access_type = fault_entry->fault_access_type; uvm_ats_fault_context_t *ats_context = &non_replayable_faults->ats_context; - uvm_page_mask_zero(&ats_context->read_fault_mask); - uvm_page_mask_zero(&ats_context->write_fault_mask); + uvm_page_mask_zero(&ats_context->faults.read_fault_mask); + uvm_page_mask_zero(&ats_context->faults.write_fault_mask); + uvm_page_mask_zero(&ats_context->faults.accessed_mask); ats_context->client_type = UVM_FAULT_CLIENT_TYPE_HUB; @@ -597,14 +598,17 @@ static NV_STATUS service_non_managed_fault(uvm_gpu_va_space_t *gpu_va_space, } else { NvU64 base = UVM_VA_BLOCK_ALIGN_DOWN(fault_address); - uvm_page_mask_t *faults_serviced_mask = &ats_context->faults_serviced_mask; + uvm_page_mask_t *faults_serviced_mask = &ats_context->faults.faults_serviced_mask; + uvm_page_mask_t *accessed_mask = &ats_context->faults.accessed_mask; uvm_page_index_t page_index = (fault_address - base) / PAGE_SIZE; uvm_page_mask_t *fault_mask = (fault_access_type >= UVM_FAULT_ACCESS_TYPE_WRITE) ? - &ats_context->write_fault_mask : - &ats_context->read_fault_mask; + &ats_context->faults.write_fault_mask : + &ats_context->faults.read_fault_mask; uvm_page_mask_set(fault_mask, page_index); + uvm_page_mask_set(accessed_mask, page_index); + status = uvm_ats_service_faults(gpu_va_space, vma, base, ats_context); if (status == NV_OK) { // Invalidate ATS TLB entries if needed diff --git a/kernel-open/nvidia-uvm/uvm_gpu_replayable_faults.c b/kernel-open/nvidia-uvm/uvm_gpu_replayable_faults.c index 96f21c70e5..1039e94464 100644 --- a/kernel-open/nvidia-uvm/uvm_gpu_replayable_faults.c +++ b/kernel-open/nvidia-uvm/uvm_gpu_replayable_faults.c @@ -644,7 +644,15 @@ static NV_STATUS fault_buffer_flush_locked(uvm_parent_gpu_t *parent_gpu, while (get != put) { // Wait until valid bit is set - UVM_SPIN_WHILE(!parent_gpu->fault_buffer_hal->entry_is_valid(parent_gpu, get), &spin); + UVM_SPIN_WHILE(!parent_gpu->fault_buffer_hal->entry_is_valid(parent_gpu, get), &spin) { + // Channels might be idle (e.g. in teardown) so check for errors + // actively. In that case the gpu pointer is valid. + status = gpu ? uvm_channel_manager_check_errors(gpu->channel_manager) : uvm_global_get_status(); + if (status != NV_OK) { + write_get(parent_gpu, get); + return status; + } + } fault_buffer_skip_replayable_entry(parent_gpu, get); ++get; @@ -890,6 +898,10 @@ static NV_STATUS fetch_fault_buffer_entries(uvm_parent_gpu_t *parent_gpu, // We have some entry to work on. Let's do the rest later. if (fetch_mode == FAULT_FETCH_MODE_BATCH_READY && fault_index > 0) goto done; + + status = uvm_global_get_status(); + if (status != NV_OK) + goto done; } // Prevent later accesses being moved above the read of the valid bit @@ -1410,7 +1422,7 @@ static NV_STATUS service_fault_batch_block_locked(uvm_gpu_t *gpu, &end); } else { - policy = uvm_va_range_get_policy(va_block->va_range); + policy = &va_block->managed_range->policy; end = va_block->end; } @@ -1689,11 +1701,11 @@ static NV_STATUS service_fault_batch_ats_sub_vma(uvm_gpu_va_space_t *gpu_va_spac NvU32 i; NV_STATUS status = NV_OK; uvm_ats_fault_context_t *ats_context = &batch_context->ats_context; - const uvm_page_mask_t *read_fault_mask = &ats_context->read_fault_mask; - const uvm_page_mask_t *write_fault_mask = &ats_context->write_fault_mask; - const uvm_page_mask_t *reads_serviced_mask = &ats_context->reads_serviced_mask; - uvm_page_mask_t *faults_serviced_mask = &ats_context->faults_serviced_mask; - uvm_page_mask_t *accessed_mask = &ats_context->accessed_mask; + const uvm_page_mask_t *read_fault_mask = &ats_context->faults.read_fault_mask; + const uvm_page_mask_t *write_fault_mask = &ats_context->faults.write_fault_mask; + const uvm_page_mask_t *reads_serviced_mask = &ats_context->faults.reads_serviced_mask; + uvm_page_mask_t *faults_serviced_mask = &ats_context->faults.faults_serviced_mask; + uvm_page_mask_t *accessed_mask = &ats_context->faults.accessed_mask; UVM_ASSERT(vma); @@ -1763,8 +1775,8 @@ static void start_new_sub_batch(NvU64 *sub_batch_base, NvU32 fault_index, uvm_ats_fault_context_t *ats_context) { - uvm_page_mask_zero(&ats_context->read_fault_mask); - uvm_page_mask_zero(&ats_context->write_fault_mask); + uvm_page_mask_zero(&ats_context->faults.read_fault_mask); + uvm_page_mask_zero(&ats_context->faults.write_fault_mask); *sub_batch_fault_index = fault_index; *sub_batch_base = UVM_VA_BLOCK_ALIGN_DOWN(address); @@ -1784,8 +1796,8 @@ static NV_STATUS service_fault_batch_ats_sub(uvm_gpu_va_space_t *gpu_va_space, uvm_fault_buffer_entry_t *previous_entry = NULL; uvm_fault_buffer_entry_t *current_entry = batch_context->ordered_fault_cache[i]; uvm_ats_fault_context_t *ats_context = &batch_context->ats_context; - uvm_page_mask_t *read_fault_mask = &ats_context->read_fault_mask; - uvm_page_mask_t *write_fault_mask = &ats_context->write_fault_mask; + uvm_page_mask_t *read_fault_mask = &ats_context->faults.read_fault_mask; + uvm_page_mask_t *write_fault_mask = &ats_context->faults.write_fault_mask; uvm_gpu_t *gpu = gpu_va_space->gpu; bool replay_per_va_block = (gpu->parent->fault_buffer_info.replayable.replay_policy == UVM_PERF_FAULT_REPLAY_POLICY_BLOCK); diff --git a/kernel-open/nvidia-uvm/uvm_gpu_semaphore.c b/kernel-open/nvidia-uvm/uvm_gpu_semaphore.c index 43f0ad916e..7d4d4d3045 100644 --- a/kernel-open/nvidia-uvm/uvm_gpu_semaphore.c +++ b/kernel-open/nvidia-uvm/uvm_gpu_semaphore.c @@ -507,11 +507,12 @@ uvm_gpu_address_t uvm_gpu_semaphore_get_encrypted_payload_gpu_va(uvm_gpu_semapho return uvm_gpu_address_virtual_unprotected(encrypted_base_va + semaphore->index * UVM_SEMAPHORE_SIZE); } -NvU32 *uvm_gpu_semaphore_get_notifier_cpu_va(uvm_gpu_semaphore_t *semaphore) +uvm_gpu_semaphore_notifier_t *uvm_gpu_semaphore_get_notifier_cpu_va(uvm_gpu_semaphore_t *semaphore) { - char *notifier_base_va = uvm_rm_mem_get_cpu_va(semaphore->page->conf_computing.notifier_memory); + uvm_gpu_semaphore_notifier_t *notifier_base_va = + uvm_rm_mem_get_cpu_va(semaphore->page->conf_computing.notifier_memory); - return (NvU32*)(notifier_base_va + semaphore->index * sizeof(NvU32)); + return notifier_base_va + semaphore->index; } uvm_gpu_address_t uvm_gpu_semaphore_get_notifier_gpu_va(uvm_gpu_semaphore_t *semaphore) @@ -519,7 +520,8 @@ uvm_gpu_address_t uvm_gpu_semaphore_get_notifier_gpu_va(uvm_gpu_semaphore_t *sem NvU64 notifier_base_va = uvm_rm_mem_get_gpu_uvm_va(semaphore->page->conf_computing.notifier_memory, semaphore->page->pool->gpu); - return uvm_gpu_address_virtual_unprotected(notifier_base_va + semaphore->index * sizeof(NvU32)); + return uvm_gpu_address_virtual_unprotected(notifier_base_va + + semaphore->index * sizeof(uvm_gpu_semaphore_notifier_t)); } void *uvm_gpu_semaphore_get_auth_tag_cpu_va(uvm_gpu_semaphore_t *semaphore) @@ -622,22 +624,11 @@ void uvm_gpu_tracking_semaphore_free(uvm_gpu_tracking_semaphore_t *tracking_sem) uvm_gpu_semaphore_free(&tracking_sem->semaphore); } -static bool should_skip_secure_semaphore_update(NvU32 last_observed_notifier, NvU32 gpu_notifier) +static void gpu_semaphore_encrypted_payload_update(uvm_channel_t *channel, uvm_gpu_semaphore_t *semaphore) { - // No new value, or the GPU is currently writing the new encrypted material - // and no change in value would still result in corrupted data. - return (last_observed_notifier == gpu_notifier) || (gpu_notifier % 2); -} - -static void uvm_gpu_semaphore_encrypted_payload_update(uvm_channel_t *channel, uvm_gpu_semaphore_t *semaphore) -{ - UvmCslIv local_iv; NvU32 local_payload; - NvU32 new_sem_value; - NvU32 gpu_notifier; - NvU32 last_observed_notifier; - NvU32 new_gpu_notifier = 0; - NvU32 iv_index = 0; + uvm_gpu_semaphore_notifier_t gpu_notifier; + uvm_gpu_semaphore_notifier_t new_gpu_notifier = 0; // A channel can have multiple entries pending and the tracking semaphore // update of each entry can race with this function. Since the semaphore @@ -646,62 +637,72 @@ static void uvm_gpu_semaphore_encrypted_payload_update(uvm_channel_t *channel, u unsigned tries_left = channel->num_gpfifo_entries; NV_STATUS status = NV_OK; NvU8 local_auth_tag[UVM_CONF_COMPUTING_AUTH_TAG_SIZE]; - UvmCslIv *ivs_cpu_addr = semaphore->conf_computing.ivs; - NvU32 *gpu_notifier_cpu_addr = uvm_gpu_semaphore_get_notifier_cpu_va(semaphore); + uvm_gpu_semaphore_notifier_t *semaphore_notifier_cpu_addr = uvm_gpu_semaphore_get_notifier_cpu_va(semaphore); UVM_ASSERT(g_uvm_global.conf_computing_enabled); UVM_ASSERT(uvm_channel_is_ce(channel)); - last_observed_notifier = semaphore->conf_computing.last_observed_notifier; - gpu_notifier = UVM_READ_ONCE(*gpu_notifier_cpu_addr); - UVM_ASSERT(last_observed_notifier <= gpu_notifier); - - if (should_skip_secure_semaphore_update(last_observed_notifier, gpu_notifier)) - return; - do { - gpu_notifier = UVM_READ_ONCE(*gpu_notifier_cpu_addr); + gpu_notifier = READ_ONCE(*semaphore_notifier_cpu_addr); + + UVM_ASSERT(gpu_notifier >= semaphore->conf_computing.last_observed_notifier); // Odd notifier value means there's an update in progress. if (gpu_notifier % 2) continue; + // There's no change since last time + if (gpu_notifier == semaphore->conf_computing.last_observed_notifier) + return; + // Make sure no memory accesses happen before we read the notifier smp_mb__after_atomic(); - iv_index = (gpu_notifier / 2) % channel->num_gpfifo_entries; memcpy(local_auth_tag, uvm_gpu_semaphore_get_auth_tag_cpu_va(semaphore), sizeof(local_auth_tag)); - local_payload = UVM_READ_ONCE(*uvm_gpu_semaphore_get_encrypted_payload_cpu_va(semaphore)); - memcpy(&local_iv, &ivs_cpu_addr[iv_index], sizeof(local_iv)); + local_payload = READ_ONCE(*uvm_gpu_semaphore_get_encrypted_payload_cpu_va(semaphore)); // Make sure the second read of notifier happens after // all memory accesses. smp_mb__before_atomic(); - new_gpu_notifier = UVM_READ_ONCE(*gpu_notifier_cpu_addr); + new_gpu_notifier = READ_ONCE(*semaphore_notifier_cpu_addr); tries_left--; } while ((tries_left > 0) && ((gpu_notifier != new_gpu_notifier) || (gpu_notifier % 2))); if (!tries_left) { status = NV_ERR_INVALID_STATE; - goto error; } + else { + NvU32 key_version; + const NvU32 iv_index = (gpu_notifier / 2) % channel->num_gpfifo_entries; + NvU32 new_semaphore_value; + + UVM_ASSERT(gpu_notifier == new_gpu_notifier); + UVM_ASSERT(gpu_notifier % 2 == 0); + + // CPU decryption is guaranteed to use the same key version as the + // associated GPU encryption, because if there was any key rotation in + // between, then key rotation waited for all channels to complete before + // proceeding. The wait implies that the semaphore value matches the + // last one encrypted on the GPU, so this CPU decryption should happen + // before the key is rotated. + key_version = uvm_channel_pool_key_version(channel->pool); - if (gpu_notifier == new_gpu_notifier) { status = uvm_conf_computing_cpu_decrypt(channel, - &new_sem_value, + &new_semaphore_value, &local_payload, - &local_iv, - sizeof(new_sem_value), + &semaphore->conf_computing.ivs[iv_index], + key_version, + sizeof(new_semaphore_value), &local_auth_tag); if (status != NV_OK) goto error; - uvm_gpu_semaphore_set_payload(semaphore, new_sem_value); - UVM_WRITE_ONCE(semaphore->conf_computing.last_observed_notifier, new_gpu_notifier); - } + uvm_gpu_semaphore_set_payload(semaphore, new_semaphore_value); + WRITE_ONCE(semaphore->conf_computing.last_observed_notifier, new_gpu_notifier); - return; + return; + } error: // Decryption failure is a fatal error as well as running out of try left. @@ -728,7 +729,7 @@ static NvU64 update_completed_value_locked(uvm_gpu_tracking_semaphore_t *trackin // TODO: Bug 4008734: [UVM][HCC] Extend secure tracking semaphore // mechanism to all semaphore uvm_channel_t *channel = container_of(tracking_semaphore, uvm_channel_t, tracking_sem); - uvm_gpu_semaphore_encrypted_payload_update(channel, &tracking_semaphore->semaphore); + gpu_semaphore_encrypted_payload_update(channel, &tracking_semaphore->semaphore); } new_sem_value = uvm_gpu_semaphore_get_payload(&tracking_semaphore->semaphore); diff --git a/kernel-open/nvidia-uvm/uvm_gpu_semaphore.h b/kernel-open/nvidia-uvm/uvm_gpu_semaphore.h index 2d8eccc32a..c2dbc2a595 100644 --- a/kernel-open/nvidia-uvm/uvm_gpu_semaphore.h +++ b/kernel-open/nvidia-uvm/uvm_gpu_semaphore.h @@ -29,6 +29,8 @@ #include "uvm_rm_mem.h" #include "uvm_linux.h" +typedef NvU32 uvm_gpu_semaphore_notifier_t; + // A GPU semaphore is a memory location accessible by the GPUs and the CPU // that's used for synchronization among them. // The GPU has primitives to acquire (wait for) and release (set) 4-byte memory @@ -52,8 +54,8 @@ struct uvm_gpu_semaphore_struct UvmCslIv *ivs; NvU32 cached_payload; - NvU32 last_pushed_notifier; - NvU32 last_observed_notifier; + uvm_gpu_semaphore_notifier_t last_pushed_notifier; + uvm_gpu_semaphore_notifier_t last_observed_notifier; } conf_computing; }; @@ -154,7 +156,7 @@ NvU32 *uvm_gpu_semaphore_get_cpu_va(uvm_gpu_semaphore_t *semaphore); NvU32 *uvm_gpu_semaphore_get_encrypted_payload_cpu_va(uvm_gpu_semaphore_t *semaphore); uvm_gpu_address_t uvm_gpu_semaphore_get_encrypted_payload_gpu_va(uvm_gpu_semaphore_t *semaphore); -NvU32 *uvm_gpu_semaphore_get_notifier_cpu_va(uvm_gpu_semaphore_t *semaphore); +uvm_gpu_semaphore_notifier_t *uvm_gpu_semaphore_get_notifier_cpu_va(uvm_gpu_semaphore_t *semaphore); uvm_gpu_address_t uvm_gpu_semaphore_get_notifier_gpu_va(uvm_gpu_semaphore_t *semaphore); void *uvm_gpu_semaphore_get_auth_tag_cpu_va(uvm_gpu_semaphore_t *semaphore); diff --git a/kernel-open/nvidia-uvm/uvm_hmm.c b/kernel-open/nvidia-uvm/uvm_hmm.c index 93e6442405..d421291908 100644 --- a/kernel-open/nvidia-uvm/uvm_hmm.c +++ b/kernel-open/nvidia-uvm/uvm_hmm.c @@ -73,6 +73,24 @@ module_param(uvm_disable_hmm, bool, 0444); #include "uvm_va_policy.h" #include "uvm_tools.h" +// The function nv_PageSwapCache() wraps the check for page swap cache flag in +// order to support a wide variety of kernel versions. +// The function PageSwapCache() is removed after 32f51ead3d77 ("mm: remove +// PageSwapCache") in v6.12-rc1. +// The function folio_test_swapcache() was added in Linux 5.16 (d389a4a811551 +// "mm: Add folio flag manipulation functions") +// Systems with HMM patches backported to 5.14 are possible, but those systems +// do not include folio_test_swapcache() +// TODO: Bug 4050579: Remove this when migration of swap cached pages is updated +static __always_inline bool nv_PageSwapCache(struct page *page) +{ +#if defined(NV_FOLIO_TEST_SWAPCACHE_PRESENT) + return folio_test_swapcache(page_folio(page)); +#else + return PageSwapCache(page); +#endif +} + static NV_STATUS gpu_chunk_add(uvm_va_block_t *va_block, uvm_page_index_t page_index, struct page *page); @@ -853,7 +871,7 @@ static NV_STATUS hmm_split_block(uvm_va_block_t *va_block, uvm_mutex_lock(&va_block->lock); - status = uvm_va_block_split_locked(va_block, new_end, new_va_block, NULL); + status = uvm_va_block_split_locked(va_block, new_end, new_va_block); if (status != NV_OK) goto err; @@ -1351,7 +1369,7 @@ void uvm_hmm_block_add_eviction_mappings(uvm_va_space_t *va_space, uvm_processor_mask_andnot(map_processors, &va_block->evicted_gpus, &node->policy.accessed_by); for_each_gpu_id_in_mask(id, map_processors) { - uvm_gpu_t *gpu = uvm_va_space_get_gpu(va_space, id); + uvm_gpu_t *gpu = uvm_gpu_get(id); uvm_va_block_gpu_state_t *gpu_state; if (!gpu->parent->access_counters_supported) @@ -1981,7 +1999,7 @@ static void fill_dst_pfns(uvm_va_block_t *va_block, uvm_page_mask_t *same_devmem_page_mask, uvm_processor_id_t dest_id) { - uvm_gpu_t *gpu = uvm_va_space_get_gpu(va_block->hmm.va_space, dest_id); + uvm_gpu_t *gpu = uvm_gpu_get(dest_id); uvm_page_index_t page_index; uvm_page_mask_zero(same_devmem_page_mask); @@ -2694,7 +2712,7 @@ static NV_STATUS dmamap_src_sysmem_pages(uvm_va_block_t *va_block, continue; } - if (PageSwapCache(src_page)) { + if (nv_PageSwapCache(src_page)) { // TODO: Bug 4050579: Remove this when swap cached pages can be // migrated. status = NV_WARN_MISMATCHED_TARGET; @@ -3512,17 +3530,17 @@ NV_STATUS uvm_hmm_va_block_range_bounds(uvm_va_space_t *va_space, *endp = end; if (params) { - uvm_va_space_processor_uuid(va_space, ¶ms->resident_on[0], UVM_ID_CPU); + uvm_processor_get_uuid(UVM_ID_CPU, ¶ms->resident_on[0]); params->resident_physical_size[0] = PAGE_SIZE; params->resident_on_count = 1; - uvm_va_space_processor_uuid(va_space, ¶ms->mapped_on[0], UVM_ID_CPU); + uvm_processor_get_uuid(UVM_ID_CPU, ¶ms->mapped_on[0]); params->mapping_type[0] = (vma->vm_flags & VM_WRITE) ? UVM_PROT_READ_WRITE_ATOMIC : UVM_PROT_READ_ONLY; params->page_size[0] = PAGE_SIZE; params->mapped_on_count = 1; - uvm_va_space_processor_uuid(va_space, ¶ms->populated_on[0], UVM_ID_CPU); + uvm_processor_get_uuid(UVM_ID_CPU, ¶ms->populated_on[0]); params->populated_on_count = 1; } @@ -3676,12 +3694,12 @@ NV_STATUS uvm_hmm_va_range_info(uvm_va_space_t *va_space, params->read_duplication = node->policy.read_duplication; if (!UVM_ID_IS_INVALID(node->policy.preferred_location)) { - uvm_va_space_processor_uuid(va_space, ¶ms->preferred_location, node->policy.preferred_location); + uvm_processor_get_uuid(node->policy.preferred_location, ¶ms->preferred_location); params->preferred_cpu_nid = node->policy.preferred_nid; } for_each_id_in_mask(processor_id, &node->policy.accessed_by) - uvm_va_space_processor_uuid(va_space, ¶ms->accessed_by[params->accessed_by_count++], processor_id); + uvm_processor_get_uuid(processor_id, ¶ms->accessed_by[params->accessed_by_count++]); } else { uvm_range_tree_find_hole_in(&va_block->hmm.va_policy_tree, params->lookup_address, diff --git a/kernel-open/nvidia-uvm/uvm_host_test.c b/kernel-open/nvidia-uvm/uvm_host_test.c index 4c4a65b0d2..1a58b06416 100644 --- a/kernel-open/nvidia-uvm/uvm_host_test.c +++ b/kernel-open/nvidia-uvm/uvm_host_test.c @@ -186,19 +186,19 @@ static NV_STATUS test_semaphore_acquire(uvm_gpu_t *gpu) uvm_push_end(&push); // Wait for sema_A release. - UVM_SPIN_WHILE(UVM_READ_ONCE(*cpu_sema_A) != 1, &spin); + UVM_SPIN_WHILE(READ_ONCE(*cpu_sema_A) != 1, &spin); // Sleep for 10ms, the GPU waits while sema_B is held by us. msleep(10); - check_sema_C = UVM_READ_ONCE(*cpu_sema_C) == 0; + check_sema_C = READ_ONCE(*cpu_sema_C) == 0; // memory fence/barrier, check comment in // uvm_gpu_semaphore.c:uvm_gpu_semaphore_set_payload() for details. mb(); // Release sema_B. - UVM_WRITE_ONCE(*cpu_sema_B, 1); + WRITE_ONCE(*cpu_sema_B, 1); // Wait for the GPU to release sema_C, i.e., the end of the push. status = uvm_push_wait(&push); @@ -207,7 +207,7 @@ static NV_STATUS test_semaphore_acquire(uvm_gpu_t *gpu) // check_sema_C is validated here to ensure the push has ended and was not // interrupted in the middle, had the check failed. TEST_CHECK_GOTO(check_sema_C, done); - TEST_CHECK_GOTO(UVM_READ_ONCE(*cpu_sema_C) == 1, done); + TEST_CHECK_GOTO(READ_ONCE(*cpu_sema_C) == 1, done); done: test_semaphore_free_sem(gpu, &mem); diff --git a/kernel-open/nvidia-uvm/uvm_ioctl.h b/kernel-open/nvidia-uvm/uvm_ioctl.h index 15e3b92b97..8f02b38add 100644 --- a/kernel-open/nvidia-uvm/uvm_ioctl.h +++ b/kernel-open/nvidia-uvm/uvm_ioctl.h @@ -847,7 +847,6 @@ typedef struct NvProcessorUuid processor; // IN NvU32 allProcessors; // IN NvU32 uvmFd; // IN - NvU32 version; // IN (UvmToolsEventQueueVersion) NV_STATUS rmStatus; // OUT } UVM_TOOLS_INIT_EVENT_TRACKER_PARAMS; @@ -934,7 +933,6 @@ typedef struct typedef struct { NvU64 tablePtr NV_ALIGN_BYTES(8); // IN - NvU32 version; // IN (UvmToolsEventQueueVersion) NV_STATUS rmStatus; // OUT } UVM_TOOLS_GET_PROCESSOR_UUID_TABLE_PARAMS; @@ -1097,6 +1095,36 @@ typedef struct NV_STATUS rmStatus; // OUT } UVM_MM_INITIALIZE_PARAMS; +#define UVM_TOOLS_INIT_EVENT_TRACKER_V2 UVM_IOCTL_BASE(76) +typedef UVM_TOOLS_INIT_EVENT_TRACKER_PARAMS UVM_TOOLS_INIT_EVENT_TRACKER_V2_PARAMS; + +#define UVM_TOOLS_GET_PROCESSOR_UUID_TABLE_V2 UVM_IOCTL_BASE(77) +typedef UVM_TOOLS_GET_PROCESSOR_UUID_TABLE_PARAMS UVM_TOOLS_GET_PROCESSOR_UUID_TABLE_V2_PARAMS; + +// +// UvmAllocDeviceP2P +// +#define UVM_ALLOC_DEVICE_P2P UVM_IOCTL_BASE(78) +typedef struct +{ + NvU64 base NV_ALIGN_BYTES(8); // IN + NvU64 length NV_ALIGN_BYTES(8); // IN + NvU64 offset NV_ALIGN_BYTES(8); // IN + NvProcessorUuid gpuUuid; // IN + NvS32 rmCtrlFd; // IN + NvU32 hClient; // IN + NvU32 hMemory; // IN + + NV_STATUS rmStatus; // OUT +} UVM_ALLOC_DEVICE_P2P_PARAMS; + +#define UVM_CLEAR_ALL_ACCESS_COUNTERS UVM_IOCTL_BASE(79) + +typedef struct +{ + NV_STATUS rmStatus; // OUT +} UVM_CLEAR_ALL_ACCESS_COUNTERS_PARAMS; + // // Temporary ioctls which should be removed before UVM 8 release // Number backwards from 2047 - highest custom ioctl function number diff --git a/kernel-open/nvidia-uvm/uvm_linux.h b/kernel-open/nvidia-uvm/uvm_linux.h index 61a0964cfb..3502e1110c 100644 --- a/kernel-open/nvidia-uvm/uvm_linux.h +++ b/kernel-open/nvidia-uvm/uvm_linux.h @@ -49,6 +49,7 @@ #include #include #include +#include #if defined(NV_ASM_BARRIER_H_PRESENT) #include @@ -147,21 +148,8 @@ static inline const struct cpumask *uvm_cpumask_of_node(int node) #endif // See bug 1707453 for further details about setting the minimum kernel version. -#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0) -# error This driver does not support kernels older than 3.10! -#endif - -#if !defined(VM_RESERVED) -#define VM_RESERVED 0x00000000 -#endif -#if !defined(VM_DONTEXPAND) -#define VM_DONTEXPAND 0x00000000 -#endif -#if !defined(VM_DONTDUMP) -#define VM_DONTDUMP 0x00000000 -#endif -#if !defined(VM_MIXEDMAP) -#define VM_MIXEDMAP 0x00000000 +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0) +# error This driver does not support kernels older than 4.4! #endif // @@ -185,94 +173,8 @@ static inline const struct cpumask *uvm_cpumask_of_node(int node) printk(fmt, ##__VA_ARGS__); \ } while (0) -// printk_ratelimited was added in 2.6.33 via commit -// 8a64f336bc1d4aa203b138d29d5a9c414a9fbb47. If not available, we prefer not -// printing anything since it's supposed to be rate-limited. -#if !defined(printk_ratelimited) - #define printk_ratelimited UVM_NO_PRINT -#endif - -#if LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0) - // Just too much compilation trouble with the rate-limiting printk feature - // until about k3.8. Because the non-rate-limited printing will cause - // surprises and problems, just turn it off entirely in this situation. - // - #undef pr_debug_ratelimited - #define pr_debug_ratelimited UVM_NO_PRINT -#endif - -#if defined(NVCPU_X86) || defined(NVCPU_X86_64) -#if !defined(pmd_large) -#define pmd_large(_pmd) \ - ((pmd_val(_pmd) & (_PAGE_PSE|_PAGE_PRESENT)) == (_PAGE_PSE|_PAGE_PRESENT)) -#endif -#endif /* defined(NVCPU_X86) || defined(NVCPU_X86_64) */ - -#if !defined(GFP_DMA32) -/* - * GFP_DMA32 is similar to GFP_DMA, but instructs the Linux zone - * allocator to allocate memory from the first 4GB on platforms - * such as Linux/x86-64; the alternative is to use an IOMMU such - * as the one implemented with the K8 GART, if available. - */ -#define GFP_DMA32 0 -#endif - -#if !defined(__GFP_NOWARN) -#define __GFP_NOWARN 0 -#endif - -#if !defined(__GFP_NORETRY) -#define __GFP_NORETRY 0 -#endif - #define NV_UVM_GFP_FLAGS (GFP_KERNEL) -// Develop builds define DEBUG but enable optimization -#if defined(DEBUG) && !defined(NVIDIA_UVM_DEVELOP) - // Wrappers for functions not building correctly without optimizations on, - // implemented in uvm_debug_optimized.c. Notably the file is only built for - // debug builds, not develop or release builds. - - // Unoptimized builds of atomic_xchg() hit a BUILD_BUG() on arm64 as it relies - // on __xchg being completely inlined: - // /usr/src/linux-3.12.19/arch/arm64/include/asm/cmpxchg.h:67:3: note: in expansion of macro 'BUILD_BUG' - // - // Powerppc hits a similar issue, but ends up with an undefined symbol: - // WARNING: "__xchg_called_with_bad_pointer" [...] undefined! - int nv_atomic_xchg(atomic_t *val, int new); - - // Same problem as atomic_xchg() on powerppc: - // WARNING: "__cmpxchg_called_with_bad_pointer" [...] undefined! - int nv_atomic_cmpxchg(atomic_t *val, int old, int new); - - // Same problem as atomic_xchg() on powerppc: - // WARNING: "__cmpxchg_called_with_bad_pointer" [...] undefined! - long nv_atomic_long_cmpxchg(atomic_long_t *val, long old, long new); - - // This Linux kernel commit: - // 2016-08-30 0d025d271e55f3de21f0aaaf54b42d20404d2b23 - // leads to build failures on x86_64, when compiling without optimization. Avoid - // that problem, by providing our own builds of copy_from_user / copy_to_user, - // for debug (non-optimized) UVM builds. Those are accessed via these - // nv_copy_to/from_user wrapper functions. - // - // Bug 1849583 has further details. - unsigned long nv_copy_from_user(void *to, const void __user *from, unsigned long n); - unsigned long nv_copy_to_user(void __user *to, const void *from, unsigned long n); - -#else - #define nv_atomic_xchg atomic_xchg - #define nv_atomic_cmpxchg atomic_cmpxchg - #define nv_atomic_long_cmpxchg atomic_long_cmpxchg - #define nv_copy_to_user copy_to_user - #define nv_copy_from_user copy_from_user -#endif - -#ifndef NV_ALIGN_DOWN -#define NV_ALIGN_DOWN(v,g) ((v) & ~((g) - 1)) -#endif - #if defined(NVCPU_X86) /* Some old IA32 kernels don't have 64/64 division routines, * they only support 64/32 division with do_div(). */ @@ -295,7 +197,6 @@ static inline uint64_t NV_DIV64(uint64_t dividend, uint64_t divisor, uint64_t *r } #endif -#if defined(CLOCK_MONOTONIC_RAW) /* Return a nanosecond-precise value */ static inline NvU64 NV_GETTIME(void) { @@ -304,60 +205,6 @@ static inline NvU64 NV_GETTIME(void) ktime_get_raw_ts64(&tm); return (NvU64) timespec64_to_ns(&tm); } -#else -/* We can only return a microsecond-precise value with the - * available non-GPL symbols. */ -static inline NvU64 NV_GETTIME(void) -{ - struct timespec64 tm; - - ktime_get_real_ts64(&tm); - return (NvU64) timespec64_to_ns(&tm); -} -#endif - -#if !defined(ilog2) - static inline int NV_ILOG2_U32(u32 n) - { - return fls(n) - 1; - } - static inline int NV_ILOG2_U64(u64 n) - { - return fls64(n) - 1; - } - #define ilog2(n) (sizeof(n) <= 4 ? NV_ILOG2_U32(n) : NV_ILOG2_U64(n)) -#endif - -// for_each_bit added in 2.6.24 via commit 3e037454bcfa4b187e8293d2121bd8c0f5a5c31c -// later renamed in 2.6.34 via commit 984b3f5746ed2cde3d184651dabf26980f2b66e5 -#if !defined(for_each_set_bit) - #define for_each_set_bit(bit, addr, size) for_each_bit((bit), (addr), (size)) -#endif - -// for_each_set_bit_cont was added in 3.2 via 1e2ad28f80b4e155678259238f51edebc19e4014 -// It was renamed to for_each_set_bit_from in 3.3 via 307b1cd7ecd7f3dc5ce3d3860957f034f0abe4df -#if !defined(for_each_set_bit_from) - #define for_each_set_bit_from(bit, addr, size) \ - for ((bit) = find_next_bit((addr), (size), (bit)); \ - (bit) < (size); \ - (bit) = find_next_bit((addr), (size), (bit) + 1)) -#endif - -// for_each_clear_bit and for_each_clear_bit_from were added in 3.10 via -// 03f4a8226c2f9c14361f75848d1e93139bab90c4 -#if !defined(for_each_clear_bit) - #define for_each_clear_bit(bit, addr, size) \ - for ((bit) = find_first_zero_bit((addr), (size)); \ - (bit) < (size); \ - (bit) = find_next_zero_bit((addr), (size), (bit) + 1)) -#endif - -#if !defined(for_each_clear_bit_from) - #define for_each_clear_bit_from(bit, addr, size) \ - for ((bit) = find_next_zero_bit((addr), (size), (bit)); \ - (bit) < (size); \ - (bit) = find_next_zero_bit((addr), (size), (bit) + 1)) -#endif #if !defined(NV_FIND_NEXT_BIT_WRAP_PRESENT) static inline unsigned long find_next_bit_wrap(const unsigned long *addr, unsigned long size, unsigned long offset) @@ -400,71 +247,6 @@ static inline unsigned long __for_each_wrap(const unsigned long *bitmap, (bit) = __for_each_wrap((addr), (size), (start), (bit) + 1)) #endif -// Added in 2.6.24 -#ifndef ACCESS_ONCE - #define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x)) -#endif - -// WRITE_ONCE/READ_ONCE have incompatible definitions across versions, which produces warnings. -// Therefore, we define our own macros -#define UVM_WRITE_ONCE(x, val) (ACCESS_ONCE(x) = (val)) -#define UVM_READ_ONCE(x) ACCESS_ONCE(x) - -// smp_mb__before_atomic was added in 3.16, provide a fallback -#ifndef smp_mb__before_atomic - #if NVCPU_IS_X86 || NVCPU_IS_X86_64 - // That's what the kernel does for x86 - #define smp_mb__before_atomic() barrier() - #else - // That's what the kernel does for at least arm32, arm64 and powerpc as of 4.3 - #define smp_mb__before_atomic() smp_mb() - #endif -#endif - -// smp_mb__after_atomic was added in 3.16, provide a fallback -#ifndef smp_mb__after_atomic - #if NVCPU_IS_X86 || NVCPU_IS_X86_64 - // That's what the kernel does for x86 - #define smp_mb__after_atomic() barrier() - #else - // That's what the kernel does for at least arm32, arm64 and powerpc as of 4.3 - #define smp_mb__after_atomic() smp_mb() - #endif -#endif - -// smp_load_acquire and smp_store_release were added in commit -// 47933ad41a86a4a9b50bed7c9b9bd2ba242aac63 ("arch: Introduce -// smp_load_acquire(), smp_store_release()") in v3.14 (2013-11-06). -#ifndef smp_load_acquire - #define smp_load_acquire(p) \ - ({ \ - typeof(*(p)) __v = UVM_READ_ONCE(*(p)); \ - smp_mb(); \ - __v; \ - }) -#endif - -#ifndef smp_store_release - #define smp_store_release(p, v) \ - do { \ - smp_mb(); \ - UVM_WRITE_ONCE(*(p), v); \ - } while (0) -#endif - -// atomic_read_acquire and atomic_set_release were added in commit -// 654672d4ba1a6001c365833be895f9477c4d5eab ("locking/atomics: -// Add _{acquire|release|relaxed}() variants of some atomic operations") in v4.3 -// (2015-08-06). -// TODO: Bug 3849079: We always use this definition on newer kernels. -#ifndef atomic_read_acquire - #define atomic_read_acquire(p) smp_load_acquire(&(p)->counter) -#endif - -#ifndef atomic_set_release - #define atomic_set_release(p, v) smp_store_release(&(p)->counter, v) -#endif - // atomic_long_read_acquire and atomic_long_set_release were added in commit // b5d47ef9ea5c5fe31d7eabeb79f697629bd9e2cb ("locking/atomics: Switch to // generated atomic-long") in v5.1 (2019-05-05). @@ -484,29 +266,6 @@ static inline void uvm_atomic_long_set_release(atomic_long_t *p, long v) atomic_long_set(p, v); } -// Added in 3.11 -#ifndef PAGE_ALIGNED - #define PAGE_ALIGNED(addr) (((addr) & (PAGE_SIZE - 1)) == 0) -#endif - -// Changed in 3.17 via commit 743162013d40ca612b4cb53d3a200dff2d9ab26e -#if (NV_WAIT_ON_BIT_LOCK_ARGUMENT_COUNT == 3) - #define UVM_WAIT_ON_BIT_LOCK(word, bit, mode) \ - wait_on_bit_lock(word, bit, mode) -#elif (NV_WAIT_ON_BIT_LOCK_ARGUMENT_COUNT == 4) - static __sched int uvm_bit_wait(void *word) - { - if (signal_pending_state(current->state, current)) - return 1; - schedule(); - return 0; - } - #define UVM_WAIT_ON_BIT_LOCK(word, bit, mode) \ - wait_on_bit_lock(word, bit, uvm_bit_wait, mode) -#else -#error "Unknown number of arguments" -#endif - static void uvm_init_radix_tree_preloadable(struct radix_tree_root *tree) { // GFP_NOWAIT, or some combination of flags that avoids setting @@ -596,6 +355,8 @@ typedef struct #include #endif +// Added in 57bd1905b228f (acpi, x86/mm: Remove encryption mask from ACPI page +// protection type), v4.13 #if !defined(PAGE_KERNEL_NOENC) #define PAGE_KERNEL_NOENC PAGE_KERNEL #endif @@ -621,15 +382,4 @@ static inline pgprot_t uvm_pgprot_decrypted(pgprot_t prot) return prot; } -// Commit 1dff8083a024650c75a9c961c38082473ceae8cf (v4.7). -// -// Archs with CONFIG_MMU should have their own page.h, and can't include -// asm-generic/page.h. However, x86, powerpc, arm64 don't define page_to_virt() -// macro in their version of page.h. -#include -#ifndef page_to_virt - #include - #define page_to_virt(x) __va(PFN_PHYS(page_to_pfn(x))) -#endif - #endif // _UVM_LINUX_H diff --git a/kernel-open/nvidia-uvm/uvm_lock.c b/kernel-open/nvidia-uvm/uvm_lock.c index 1ecca816cc..518ddd6308 100644 --- a/kernel-open/nvidia-uvm/uvm_lock.c +++ b/kernel-open/nvidia-uvm/uvm_lock.c @@ -27,7 +27,7 @@ const char *uvm_lock_order_to_string(uvm_lock_order_t lock_order) { - BUILD_BUG_ON(UVM_LOCK_ORDER_COUNT != 34); + BUILD_BUG_ON(UVM_LOCK_ORDER_COUNT != 36); switch (lock_order) { UVM_ENUM_STRING_CASE(UVM_LOCK_ORDER_INVALID); @@ -48,7 +48,9 @@ const char *uvm_lock_order_to_string(uvm_lock_order_t lock_order) UVM_ENUM_STRING_CASE(UVM_LOCK_ORDER_CONF_COMPUTING_DMA_BUFFER_POOL); UVM_ENUM_STRING_CASE(UVM_LOCK_ORDER_CHUNK_MAPPING); UVM_ENUM_STRING_CASE(UVM_LOCK_ORDER_PAGE_TREE); + UVM_ENUM_STRING_CASE(UVM_LOCK_ORDER_KEY_ROTATION); UVM_ENUM_STRING_CASE(UVM_LOCK_ORDER_CSL_PUSH); + UVM_ENUM_STRING_CASE(UVM_LOCK_ORDER_KEY_ROTATION_WLC); UVM_ENUM_STRING_CASE(UVM_LOCK_ORDER_CSL_WLC_PUSH); UVM_ENUM_STRING_CASE(UVM_LOCK_ORDER_CSL_SEC2_PUSH); UVM_ENUM_STRING_CASE(UVM_LOCK_ORDER_PUSH); diff --git a/kernel-open/nvidia-uvm/uvm_lock.h b/kernel-open/nvidia-uvm/uvm_lock.h index b1a6164cdf..7608ad0224 100644 --- a/kernel-open/nvidia-uvm/uvm_lock.h +++ b/kernel-open/nvidia-uvm/uvm_lock.h @@ -322,6 +322,15 @@ // Operations not allowed while holding this lock // - GPU memory allocation which can evict // +// - Channel pool key rotation lock +// Order: UVM_LOCK_ORDER_KEY_ROTATION +// Condition: Confidential Computing is enabled +// Mutex per channel pool +// +// The lock ensures mutual exclusion during key rotation affecting all the +// channels in the associated pool. Key rotation in WLC pools is handled +// using a separate lock order, see UVM_LOCK_ORDER_KEY_ROTATION_WLC below. +// // - CE channel CSL channel pool semaphore // Order: UVM_LOCK_ORDER_CSL_PUSH // Condition: The Confidential Computing feature is enabled @@ -338,6 +347,15 @@ // Operations allowed while holding this lock // - Pushing work to CE channels (except for WLC channels) // +// - WLC channel pool key rotation lock +// Order: UVM_LOCK_ORDER_KEY_ROTATION_WLC +// Condition: Confidential Computing is enabled +// Mutex of WLC channel pool +// +// The lock has the same purpose as the regular channel pool key rotation +// lock. Using a different order lock for WLC channels allows key rotation +// on those channels during indirect work submission. +// // - WLC CSL channel pool semaphore // Order: UVM_LOCK_ORDER_CSL_WLC_PUSH // Condition: The Confidential Computing feature is enabled @@ -484,7 +502,9 @@ typedef enum UVM_LOCK_ORDER_CONF_COMPUTING_DMA_BUFFER_POOL, UVM_LOCK_ORDER_CHUNK_MAPPING, UVM_LOCK_ORDER_PAGE_TREE, + UVM_LOCK_ORDER_KEY_ROTATION, UVM_LOCK_ORDER_CSL_PUSH, + UVM_LOCK_ORDER_KEY_ROTATION_WLC, UVM_LOCK_ORDER_CSL_WLC_PUSH, UVM_LOCK_ORDER_CSL_SEC2_PUSH, UVM_LOCK_ORDER_PUSH, @@ -1208,7 +1228,7 @@ static void __uvm_bit_lock(uvm_bit_locks_t *bit_locks, unsigned long bit) { int res; - res = UVM_WAIT_ON_BIT_LOCK(bit_locks->bits, bit, TASK_UNINTERRUPTIBLE); + res = wait_on_bit_lock(bit_locks->bits, bit, TASK_UNINTERRUPTIBLE); UVM_ASSERT_MSG(res == 0, "Uninterruptible task interrupted: %d\n", res); uvm_assert_bit_locked(bit_locks, bit); } diff --git a/kernel-open/nvidia-uvm/uvm_map_external.c b/kernel-open/nvidia-uvm/uvm_map_external.c index a57c98997b..6bf8f0f4e0 100644 --- a/kernel-open/nvidia-uvm/uvm_map_external.c +++ b/kernel-open/nvidia-uvm/uvm_map_external.c @@ -171,8 +171,11 @@ static NV_STATUS uvm_pte_buffer_get(uvm_pte_buffer_t *pte_buffer, pte_buffer->mapping_info.pteBufferSize = pte_buffer->num_ptes * pte_buffer->pte_size; if (va_range->type == UVM_VA_RANGE_TYPE_CHANNEL) { + uvm_va_range_channel_t *channel_range; + + channel_range = uvm_va_range_to_channel(va_range); status = uvm_rm_locked_call(nvUvmInterfaceGetChannelResourcePtes(gpu_va_space->duped_gpu_va_space, - va_range->channel.rm_descriptor, + channel_range->rm_descriptor, map_offset, pte_buffer->num_ptes * pte_buffer->page_size, &pte_buffer->mapping_info)); @@ -345,8 +348,8 @@ static NV_STATUS map_rm_pt_range(uvm_page_tree_t *tree, static uvm_membar_t va_range_downgrade_membar(uvm_va_range_t *va_range, uvm_ext_gpu_map_t *ext_gpu_map) { if (va_range->type == UVM_VA_RANGE_TYPE_CHANNEL) { - return uvm_hal_downgrade_membar_type(va_range->channel.gpu_va_space->gpu, - va_range->channel.aperture == UVM_APERTURE_VID); + return uvm_hal_downgrade_membar_type(uvm_va_range_to_channel(va_range)->gpu_va_space->gpu, + uvm_va_range_to_channel(va_range)->aperture == UVM_APERTURE_VID); } // If there is no mem_handle, this is a sparse mapping. @@ -412,7 +415,7 @@ NV_STATUS uvm_va_range_map_rm_allocation(uvm_va_range_t *va_range, } else { node = &va_range->node; - pt_range_vec = &va_range->channel.pt_range_vec; + pt_range_vec = &uvm_va_range_to_channel(va_range)->pt_range_vec; } if (map_offset + uvm_range_tree_node_size(node) > mem_info->size) @@ -593,7 +596,7 @@ static void uvm_release_rm_handle(struct nv_kref *ref) static NV_STATUS uvm_create_external_range(uvm_va_space_t *va_space, UVM_CREATE_EXTERNAL_RANGE_PARAMS *params) { - uvm_va_range_t *va_range = NULL; + uvm_va_range_external_t *external_range = NULL; struct mm_struct *mm; NV_STATUS status = NV_OK; @@ -611,7 +614,7 @@ static NV_STATUS uvm_create_external_range(uvm_va_space_t *va_space, UVM_CREATE_ // Create the new external VA range. // uvm_va_range_create_external handles any collisions when it attempts to // insert the new range into the va_space range tree. - status = uvm_va_range_create_external(va_space, mm, params->base, params->length, &va_range); + status = uvm_va_range_create_external(va_space, mm, params->base, params->length, &external_range); if (status != NV_OK) { UVM_DBG_PRINT_RL("Failed to create external VA range [0x%llx, 0x%llx)\n", params->base, @@ -651,7 +654,7 @@ static NV_STATUS set_ext_gpu_map_location(uvm_ext_gpu_map_t *ext_gpu_map, } // This is a local or peer allocation, so the owning GPU must have been // registered. This also checks for if EGM owning GPU is registered. - owning_gpu = uvm_va_space_get_gpu_by_uuid(va_space, &mem_info->uuid); + owning_gpu = uvm_va_space_get_gpu_by_mem_info(va_space, mem_info); if (!owning_gpu) return NV_ERR_INVALID_DEVICE; @@ -678,18 +681,19 @@ static NV_STATUS set_ext_gpu_map_location(uvm_ext_gpu_map_t *ext_gpu_map, return NV_OK; } -static uvm_ext_gpu_map_t *uvm_va_range_ext_gpu_map(uvm_va_range_t *va_range, uvm_gpu_t *mapping_gpu, NvU64 addr) +static uvm_ext_gpu_map_t *uvm_va_range_ext_gpu_map(uvm_va_range_external_t *external_range, + uvm_gpu_t *mapping_gpu, + NvU64 addr) { uvm_ext_gpu_map_t *ext_gpu_map = NULL; uvm_range_tree_node_t *node; uvm_ext_gpu_range_tree_t *range_tree; - UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_EXTERNAL); - uvm_assert_rwsem_locked(&va_range->va_space->lock); + uvm_assert_rwsem_locked(&external_range->va_range.va_space->lock); - range_tree = uvm_ext_gpu_range_tree(va_range, mapping_gpu); + range_tree = uvm_ext_gpu_range_tree(external_range, mapping_gpu); - if (uvm_processor_mask_test(&va_range->external.mapped_gpus, mapping_gpu->id)) { + if (uvm_processor_mask_test(&external_range->mapped_gpus, mapping_gpu->id)) { UVM_ASSERT(!uvm_range_tree_empty(&range_tree->tree)); node = uvm_range_tree_find(&range_tree->tree, addr); if (node) { @@ -759,13 +763,13 @@ static NV_STATUS uvm_ext_gpu_map_split(uvm_range_tree_t *tree, return NV_OK; } -static NV_STATUS uvm_unmap_external_in_range(uvm_va_range_t *va_range, +static NV_STATUS uvm_unmap_external_in_range(uvm_va_range_external_t *external_range, uvm_gpu_t *gpu, NvU64 start, NvU64 end, struct list_head *deferred_list) { - uvm_ext_gpu_range_tree_t *range_tree = uvm_ext_gpu_range_tree(va_range, gpu); + uvm_ext_gpu_range_tree_t *range_tree = uvm_ext_gpu_range_tree(external_range, gpu); uvm_ext_gpu_map_t *ext_map, *ext_map_next = NULL; NV_STATUS status = NV_OK; @@ -813,7 +817,7 @@ static NV_STATUS uvm_unmap_external_in_range(uvm_va_range_t *va_range, // 2. It needs to visit newly created uvm_ext_gpu_map_t, as a result of // splits. This means it can't use safe iterators as they will skip the // newly created uvm_ext_gpu_map_t. - ext_map = uvm_ext_gpu_map_iter_first(va_range, gpu, start, end); + ext_map = uvm_ext_gpu_map_iter_first(external_range, gpu, start, end); while (ext_map) { if (start > ext_map->node.start) { status = uvm_ext_gpu_map_split(&range_tree->tree, ext_map, start - 1, &ext_map_next); @@ -828,10 +832,10 @@ static NV_STATUS uvm_unmap_external_in_range(uvm_va_range_t *va_range, ext_map_next = NULL; } else { - ext_map_next = uvm_ext_gpu_map_iter_next(va_range, ext_map, end); + ext_map_next = uvm_ext_gpu_map_iter_next(external_range, ext_map, end); } - uvm_ext_gpu_map_destroy(va_range, ext_map, deferred_list); + uvm_ext_gpu_map_destroy(external_range, ext_map, deferred_list); } ext_map = ext_map_next; @@ -840,7 +844,7 @@ static NV_STATUS uvm_unmap_external_in_range(uvm_va_range_t *va_range, return status; } -static NV_STATUS uvm_map_external_allocation_on_gpu(uvm_va_range_t *va_range, +static NV_STATUS uvm_map_external_allocation_on_gpu(uvm_va_range_external_t *external_range, uvm_gpu_t *mapping_gpu, const uvm_rm_user_object_t *user_rm_mem, const uvm_map_rm_params_t *map_rm_params, @@ -848,9 +852,9 @@ static NV_STATUS uvm_map_external_allocation_on_gpu(uvm_va_range_t *va_range, NvU64 length, uvm_tracker_t *out_tracker) { - uvm_va_space_t *va_space = va_range->va_space; + uvm_va_space_t *va_space = external_range->va_range.va_space; uvm_ext_gpu_map_t *ext_gpu_map = NULL; - uvm_ext_gpu_range_tree_t *range_tree = uvm_ext_gpu_range_tree(va_range, mapping_gpu); + uvm_ext_gpu_range_tree_t *range_tree = uvm_ext_gpu_range_tree(external_range, mapping_gpu); UvmGpuMemoryInfo mem_info; uvm_gpu_va_space_t *gpu_va_space = uvm_gpu_va_space_get(va_space, mapping_gpu); NvU64 mapping_page_size; @@ -870,7 +874,7 @@ static NV_STATUS uvm_map_external_allocation_on_gpu(uvm_va_range_t *va_range, uvm_mutex_lock(&range_tree->lock); - status = uvm_unmap_external_in_range(va_range, mapping_gpu, base, base + length - 1, NULL); + status = uvm_unmap_external_in_range(external_range, mapping_gpu, base, base + length - 1, NULL); if (status != NV_OK) goto error; @@ -880,8 +884,8 @@ static NV_STATUS uvm_map_external_allocation_on_gpu(uvm_va_range_t *va_range, goto error; } - // Insert the ext_gpu_map into the VA range immediately since some of the - // below calls require it to be there. + // Insert the ext_gpu_map into the external range immediately since some of + // the below calls require it to be there. ext_gpu_map->node.start = base; ext_gpu_map->node.end = base + length - 1; RB_CLEAR_NODE(&ext_gpu_map->node.rb_node); @@ -897,14 +901,14 @@ static NV_STATUS uvm_map_external_allocation_on_gpu(uvm_va_range_t *va_range, status = uvm_range_tree_add(&range_tree->tree, &ext_gpu_map->node); UVM_ASSERT(status == NV_OK); - uvm_processor_mask_set_atomic(&va_range->external.mapped_gpus, mapping_gpu->id); + uvm_processor_mask_set_atomic(&external_range->mapped_gpus, mapping_gpu->id); ext_gpu_map->gpu = mapping_gpu; ext_gpu_map->mem_handle->gpu = mapping_gpu; nv_kref_init(&ext_gpu_map->mem_handle->ref_count); // Error paths after this point may call uvm_va_range_ext_gpu_map, so do a // sanity check now to make sure it doesn't trigger any asserts. - UVM_ASSERT(uvm_va_range_ext_gpu_map(va_range, mapping_gpu, base) == ext_gpu_map); + UVM_ASSERT(uvm_va_range_ext_gpu_map(external_range, mapping_gpu, base) == ext_gpu_map); // Dup the memory. This verifies the input handles, takes a ref count on the // physical allocation so it can't go away under us, and returns us the @@ -953,7 +957,12 @@ static NV_STATUS uvm_map_external_allocation_on_gpu(uvm_va_range_t *va_range, mem_info.pageSize = mapping_page_size; - status = uvm_va_range_map_rm_allocation(va_range, mapping_gpu, &mem_info, map_rm_params, ext_gpu_map, out_tracker); + status = uvm_va_range_map_rm_allocation(&external_range->va_range, + mapping_gpu, + &mem_info, + map_rm_params, + ext_gpu_map, + out_tracker); if (status != NV_OK) goto error; @@ -961,7 +970,7 @@ static NV_STATUS uvm_map_external_allocation_on_gpu(uvm_va_range_t *va_range, return NV_OK; error: - uvm_ext_gpu_map_destroy(va_range, ext_gpu_map, NULL); + uvm_ext_gpu_map_destroy(external_range, ext_gpu_map, NULL); uvm_mutex_unlock(&range_tree->lock); return status; } @@ -969,7 +978,7 @@ static NV_STATUS uvm_map_external_allocation_on_gpu(uvm_va_range_t *va_range, // Actual implementation of UvmMapExternalAllocation static NV_STATUS uvm_map_external_allocation(uvm_va_space_t *va_space, UVM_MAP_EXTERNAL_ALLOCATION_PARAMS *params) { - uvm_va_range_t *va_range = NULL; + uvm_va_range_external_t *external_range = NULL; uvm_gpu_t *mapping_gpu; uvm_processor_mask_t *mapped_gpus; NV_STATUS status = NV_OK; @@ -994,11 +1003,10 @@ static NV_STATUS uvm_map_external_allocation(uvm_va_space_t *va_space, UVM_MAP_E return NV_ERR_NO_MEMORY; uvm_va_space_down_read_rm(va_space); - va_range = uvm_va_range_find(va_space, params->base); + external_range = uvm_va_range_external_find(va_space, params->base); - if (!va_range || - va_range->type != UVM_VA_RANGE_TYPE_EXTERNAL || - va_range->node.end < params->base + params->length - 1) { + if (!external_range || + external_range->va_range.node.end < params->base + params->length - 1) { uvm_va_space_up_read_rm(va_space); uvm_processor_mask_cache_free(mapped_gpus); return NV_ERR_INVALID_ADDRESS; @@ -1030,7 +1038,7 @@ static NV_STATUS uvm_map_external_allocation(uvm_va_space_t *va_space, UVM_MAP_E map_rm_params.format_type = params->perGpuAttributes[i].gpuFormatType; map_rm_params.element_bits = params->perGpuAttributes[i].gpuElementBits; map_rm_params.compression_type = params->perGpuAttributes[i].gpuCompressionType; - status = uvm_map_external_allocation_on_gpu(va_range, + status = uvm_map_external_allocation_on_gpu(external_range, mapping_gpu, &user_rm_mem, &map_rm_params, @@ -1060,17 +1068,17 @@ static NV_STATUS uvm_map_external_allocation(uvm_va_space_t *va_space, UVM_MAP_E // Tear down only those mappings we created during this call for_each_va_space_gpu_in_mask(mapping_gpu, va_space, mapped_gpus) { - uvm_ext_gpu_range_tree_t *range_tree = uvm_ext_gpu_range_tree(va_range, mapping_gpu); + uvm_ext_gpu_range_tree_t *range_tree = uvm_ext_gpu_range_tree(external_range, mapping_gpu); uvm_ext_gpu_map_t *ext_map, *ext_map_next; uvm_mutex_lock(&range_tree->lock); uvm_ext_gpu_map_for_each_in_safe(ext_map, ext_map_next, - va_range, + external_range, mapping_gpu, params->base, params->base + params->length - 1) - uvm_ext_gpu_map_destroy(va_range, ext_map, NULL); + uvm_ext_gpu_map_destroy(external_range, ext_map, NULL); uvm_mutex_unlock(&range_tree->lock); } @@ -1091,15 +1099,15 @@ static NvU64 external_sparse_pte_maker(uvm_page_table_range_vec_t *range_vec, Nv return range_vec->tree->hal->make_sparse_pte(); } -static NV_STATUS uvm_map_external_sparse_on_gpu(uvm_va_range_t *va_range, +static NV_STATUS uvm_map_external_sparse_on_gpu(uvm_va_range_external_t *external_range, uvm_gpu_t *mapping_gpu, NvU64 base, NvU64 length, struct list_head *deferred_free_list) { - uvm_va_space_t *va_space = va_range->va_space; + uvm_va_space_t *va_space = external_range->va_range.va_space; uvm_ext_gpu_map_t *ext_gpu_map = NULL; - uvm_ext_gpu_range_tree_t *range_tree = uvm_ext_gpu_range_tree(va_range, mapping_gpu); + uvm_ext_gpu_range_tree_t *range_tree = uvm_ext_gpu_range_tree(external_range, mapping_gpu); uvm_gpu_va_space_t *gpu_va_space = uvm_gpu_va_space_get(va_space, mapping_gpu); uvm_page_tree_t *page_tree; NV_STATUS status; @@ -1115,7 +1123,7 @@ static NV_STATUS uvm_map_external_sparse_on_gpu(uvm_va_range_t *va_range, uvm_mutex_lock(&range_tree->lock); - status = uvm_unmap_external_in_range(va_range, mapping_gpu, base, base + length - 1, deferred_free_list); + status = uvm_unmap_external_in_range(external_range, mapping_gpu, base, base + length - 1, deferred_free_list); if (status != NV_OK) goto error; @@ -1135,10 +1143,10 @@ static NV_STATUS uvm_map_external_sparse_on_gpu(uvm_va_range_t *va_range, status = uvm_range_tree_add(&range_tree->tree, &ext_gpu_map->node); UVM_ASSERT(status == NV_OK); - uvm_processor_mask_set_atomic(&va_range->external.mapped_gpus, mapping_gpu->id); + uvm_processor_mask_set_atomic(&external_range->mapped_gpus, mapping_gpu->id); ext_gpu_map->gpu = mapping_gpu; - UVM_ASSERT(uvm_va_range_ext_gpu_map(va_range, mapping_gpu, base) == ext_gpu_map); + UVM_ASSERT(uvm_va_range_ext_gpu_map(external_range, mapping_gpu, base) == ext_gpu_map); status = uvm_page_table_range_vec_init(page_tree, ext_gpu_map->node.start, @@ -1160,14 +1168,14 @@ static NV_STATUS uvm_map_external_sparse_on_gpu(uvm_va_range_t *va_range, return NV_OK; error: - uvm_ext_gpu_map_destroy(va_range, ext_gpu_map, NULL); + uvm_ext_gpu_map_destroy(external_range, ext_gpu_map, NULL); uvm_mutex_unlock(&range_tree->lock); return status; } static NV_STATUS uvm_map_external_sparse(uvm_va_space_t *va_space, UVM_MAP_EXTERNAL_SPARSE_PARAMS *params) { - uvm_va_range_t *va_range = NULL; + uvm_va_range_external_t *external_range = NULL; uvm_gpu_t *mapping_gpu = NULL; NV_STATUS status = NV_OK; LIST_HEAD(deferred_free_list); @@ -1176,10 +1184,9 @@ static NV_STATUS uvm_map_external_sparse(uvm_va_space_t *va_space, UVM_MAP_EXTER return NV_ERR_INVALID_ADDRESS; uvm_va_space_down_read(va_space); - va_range = uvm_va_range_find(va_space, params->base); - if (!va_range || - va_range->type != UVM_VA_RANGE_TYPE_EXTERNAL || - va_range->node.end < params->base + params->length - 1) { + external_range = uvm_va_range_external_find(va_space, params->base); + if (!external_range || + external_range->va_range.node.end < params->base + params->length - 1) { status = NV_ERR_INVALID_ADDRESS; goto out; } @@ -1196,7 +1203,11 @@ static NV_STATUS uvm_map_external_sparse(uvm_va_space_t *va_space, UVM_MAP_EXTER goto out; } - status = uvm_map_external_sparse_on_gpu(va_range, mapping_gpu, params->base, params->length, &deferred_free_list); + status = uvm_map_external_sparse_on_gpu(external_range, + mapping_gpu, + params->base, + params->length, + &deferred_free_list); if (!list_empty(&deferred_free_list)) uvm_gpu_retain(mapping_gpu); @@ -1244,7 +1255,7 @@ void uvm_ext_gpu_map_free(uvm_ext_gpu_map_t *ext_gpu_map) uvm_gpu_release(owning_gpu); } -void uvm_ext_gpu_map_destroy(uvm_va_range_t *va_range, +void uvm_ext_gpu_map_destroy(uvm_va_range_external_t *external_range, uvm_ext_gpu_map_t *ext_gpu_map, struct list_head *deferred_free_list) { @@ -1268,16 +1279,16 @@ void uvm_ext_gpu_map_destroy(uvm_va_range_t *va_range, mapped_gpu = ext_gpu_map->gpu; - range_tree = uvm_ext_gpu_range_tree(va_range, mapped_gpu); + range_tree = uvm_ext_gpu_range_tree(external_range, mapped_gpu); uvm_assert_mutex_locked(&range_tree->lock); - UVM_ASSERT(uvm_gpu_va_space_get(va_range->va_space, mapped_gpu)); + UVM_ASSERT(uvm_gpu_va_space_get(external_range->va_range.va_space, mapped_gpu)); uvm_range_tree_remove(&range_tree->tree, &ext_gpu_map->node); // Unmap the PTEs if (ext_gpu_map->pt_range_vec.ranges) { - membar = va_range_downgrade_membar(va_range, ext_gpu_map); + membar = va_range_downgrade_membar(&external_range->va_range, ext_gpu_map); uvm_page_table_range_vec_clear_ptes(&ext_gpu_map->pt_range_vec, membar); uvm_page_table_range_vec_deinit(&ext_gpu_map->pt_range_vec); } @@ -1299,7 +1310,7 @@ void uvm_ext_gpu_map_destroy(uvm_va_range_t *va_range, // Check if the sub-range tree is empty. Only then can the GPU be removed from // the mapped_gpus bitmap. if (uvm_range_tree_empty(&range_tree->tree)) - uvm_processor_mask_clear_atomic(&va_range->external.mapped_gpus, mapped_gpu->id); + uvm_processor_mask_clear_atomic(&external_range->mapped_gpus, mapped_gpu->id); } static NV_STATUS uvm_unmap_external(uvm_va_space_t *va_space, @@ -1307,7 +1318,7 @@ static NV_STATUS uvm_unmap_external(uvm_va_space_t *va_space, NvU64 length, const NvProcessorUuid *gpu_uuid) { - uvm_va_range_t *va_range; + uvm_va_range_external_t *external_range; uvm_gpu_t *gpu = NULL; NV_STATUS status = NV_OK; uvm_ext_gpu_range_tree_t *range_tree; @@ -1318,8 +1329,8 @@ static NV_STATUS uvm_unmap_external(uvm_va_space_t *va_space, uvm_va_space_down_read(va_space); - va_range = uvm_va_range_find(va_space, base); - if (!va_range || va_range->type != UVM_VA_RANGE_TYPE_EXTERNAL || base + length - 1 > va_range->node.end) { + external_range = uvm_va_range_external_find(va_space, base); + if (!external_range || base + length - 1 > external_range->va_range.node.end) { status = NV_ERR_INVALID_ADDRESS; goto out; } @@ -1330,9 +1341,9 @@ static NV_STATUS uvm_unmap_external(uvm_va_space_t *va_space, goto out; } - range_tree = uvm_ext_gpu_range_tree(va_range, gpu); + range_tree = uvm_ext_gpu_range_tree(external_range, gpu); uvm_mutex_lock(&range_tree->lock); - status = uvm_unmap_external_in_range(va_range, gpu, base, base + length - 1, &deferred_free_list); + status = uvm_unmap_external_in_range(external_range, gpu, base, base + length - 1, &deferred_free_list); uvm_mutex_unlock(&range_tree->lock); // If the deferred_free_list is not empty, retain the GPU which maps the @@ -1359,13 +1370,14 @@ NV_STATUS uvm_api_unmap_external(UVM_UNMAP_EXTERNAL_PARAMS *params, struct file } // This destroys VA ranges created by UvmMapExternalAllocation, -// UvmMapDynamicParallelismRegion, and UvmAllocSemaphorePool *only*. VA ranges -// created by UvmMemMap and UvmAlloc go through mmap/munmap. +// UvmMapDynamicParallelismRegion, UvmAllocDeviceP2P and UvmAllocSemaphorePool +// *only*. VA ranges created by UvmMemMap and UvmAlloc go through mmap/munmap. static NV_STATUS uvm_free(uvm_va_space_t *va_space, NvU64 base, NvU64 length) { uvm_va_range_t *va_range; NV_STATUS status = NV_OK; uvm_processor_mask_t *retained_mask = NULL; + uvm_gpu_t *retained_gpu = NULL; LIST_HEAD(deferred_free_list); if (uvm_api_range_invalid_4k(base, length)) @@ -1382,6 +1394,7 @@ static NV_STATUS uvm_free(uvm_va_space_t *va_space, NvU64 base, NvU64 length) if (!va_range || (va_range->type != UVM_VA_RANGE_TYPE_EXTERNAL && va_range->type != UVM_VA_RANGE_TYPE_SKED_REFLECTED && + va_range->type != UVM_VA_RANGE_TYPE_DEVICE_P2P && va_range->type != UVM_VA_RANGE_TYPE_SEMAPHORE_POOL) || va_range->node.start != base || va_range->node.end != base + length - 1) { @@ -1390,7 +1403,7 @@ static NV_STATUS uvm_free(uvm_va_space_t *va_space, NvU64 base, NvU64 length) } if ((va_range->type == UVM_VA_RANGE_TYPE_SEMAPHORE_POOL) && - uvm_mem_mapped_on_cpu_user(va_range->semaphore_pool.mem)) { + uvm_mem_mapped_on_cpu_user(uvm_va_range_to_semaphore_pool(va_range)->mem)) { // Semaphore pools must be first unmapped from the CPU with munmap to // invalidate the vma. status = NV_ERR_INVALID_ARGUMENT; @@ -1398,25 +1411,37 @@ static NV_STATUS uvm_free(uvm_va_space_t *va_space, NvU64 base, NvU64 length) } if (va_range->type == UVM_VA_RANGE_TYPE_EXTERNAL) { - retained_mask = va_range->external.retained_mask; + uvm_va_range_external_t *external_range = uvm_va_range_to_external(va_range); + + retained_mask = external_range->retained_mask; // Set the retained_mask to NULL to prevent // uvm_va_range_destroy_external() from freeing the mask. - va_range->external.retained_mask = NULL; + external_range->retained_mask = NULL; UVM_ASSERT(retained_mask); // External ranges may have deferred free work, so the GPUs may have to // be retained. Construct the mask of all the GPUs that need to be // retained. - uvm_processor_mask_and(retained_mask, &va_range->external.mapped_gpus, &va_space->registered_gpus); + uvm_processor_mask_and(retained_mask, &external_range->mapped_gpus, &va_space->registered_gpus); + } + + if (va_range->type == UVM_VA_RANGE_TYPE_DEVICE_P2P) { + uvm_va_range_device_p2p_t *device_p2p_range = uvm_va_range_to_device_p2p(va_range); + + retained_gpu = device_p2p_range->gpu; } uvm_va_range_destroy(va_range, &deferred_free_list); // If there is deferred work, retain the required GPUs. - if (!list_empty(&deferred_free_list)) - uvm_global_gpu_retain(retained_mask); + if (!list_empty(&deferred_free_list)) { + if (retained_mask) + uvm_global_gpu_retain(retained_mask); + else + uvm_gpu_retain(retained_gpu); + } out: uvm_va_space_up_write(va_space); @@ -1424,7 +1449,10 @@ static NV_STATUS uvm_free(uvm_va_space_t *va_space, NvU64 base, NvU64 length) if (!list_empty(&deferred_free_list)) { UVM_ASSERT(status == NV_OK); uvm_deferred_free_object_list(&deferred_free_list); - uvm_global_gpu_release(retained_mask); + if (retained_mask) + uvm_global_gpu_release(retained_mask); + else + uvm_gpu_release(retained_gpu); } // Free the mask allocated in uvm_va_range_create_external() since diff --git a/kernel-open/nvidia-uvm/uvm_map_external.h b/kernel-open/nvidia-uvm/uvm_map_external.h index 5f2181470e..9584ef049c 100644 --- a/kernel-open/nvidia-uvm/uvm_map_external.h +++ b/kernel-open/nvidia-uvm/uvm_map_external.h @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2016 NVIDIA Corporation + Copyright (c) 2016-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -40,33 +40,35 @@ typedef struct UvmGpuCompressionType compression_type; } uvm_map_rm_params_t; -static uvm_ext_gpu_range_tree_t *uvm_ext_gpu_range_tree(uvm_va_range_t *va_range, uvm_gpu_t *gpu) +static uvm_ext_gpu_range_tree_t *uvm_ext_gpu_range_tree(uvm_va_range_external_t *external_range, uvm_gpu_t *gpu) { - UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_EXTERNAL); - - return &va_range->external.gpu_ranges[uvm_id_gpu_index(gpu->id)]; + return &external_range->gpu_ranges[uvm_id_gpu_index(gpu->id)]; } // Returns the first external map (if any) in the gpu's range tree. -// va_range should be of type UVM_VA_RANGE_TYPE_EXTERNAL. // The caller must hold the range tree lock. -static uvm_ext_gpu_map_t *uvm_ext_gpu_map_iter_first(uvm_va_range_t *va_range, uvm_gpu_t *gpu, NvU64 start, NvU64 end) +static uvm_ext_gpu_map_t *uvm_ext_gpu_map_iter_first(uvm_va_range_external_t *external_range, + uvm_gpu_t *gpu, + NvU64 start, + NvU64 end) { uvm_ext_gpu_range_tree_t *range_tree; uvm_range_tree_node_t *node; - UVM_ASSERT(start >= va_range->node.start); - UVM_ASSERT(end <= va_range->node.end); + UVM_ASSERT(start >= external_range->va_range.node.start); + UVM_ASSERT(end <= external_range->va_range.node.end); - range_tree = uvm_ext_gpu_range_tree(va_range, gpu); + range_tree = uvm_ext_gpu_range_tree(external_range, gpu); node = uvm_range_tree_iter_first(&range_tree->tree, start, end); return uvm_ext_gpu_map_container(node); } // Returns the external map following the provided map (if any) in address order from -// the gpu's range tree. va_range should be of type UVM_VA_RANGE_TYPE_EXTERNAL. +// the gpu's range tree. // The caller must hold the range tree lock. -static uvm_ext_gpu_map_t *uvm_ext_gpu_map_iter_next(uvm_va_range_t *va_range, uvm_ext_gpu_map_t *ext_gpu_map, NvU64 end) +static uvm_ext_gpu_map_t *uvm_ext_gpu_map_iter_next(uvm_va_range_external_t *external_range, + uvm_ext_gpu_map_t *ext_gpu_map, + NvU64 end) { uvm_ext_gpu_range_tree_t *range_tree; uvm_range_tree_node_t *node; @@ -74,37 +76,41 @@ static uvm_ext_gpu_map_t *uvm_ext_gpu_map_iter_next(uvm_va_range_t *va_range, uv if (!ext_gpu_map) return NULL; - UVM_ASSERT(end <= va_range->node.end); + UVM_ASSERT(end <= external_range->va_range.node.end); - range_tree = uvm_ext_gpu_range_tree(va_range, ext_gpu_map->gpu); + range_tree = uvm_ext_gpu_range_tree(external_range, ext_gpu_map->gpu); node = uvm_range_tree_iter_next(&range_tree->tree, &ext_gpu_map->node, end); return uvm_ext_gpu_map_container(node); } // The four iterators below require that the caller hold the gpu's range tree // lock. -#define uvm_ext_gpu_map_for_each_in(ext_gpu_map, va_range, gpu, start, end) \ - for ((ext_gpu_map) = uvm_ext_gpu_map_iter_first((va_range), (gpu), (start), (end)); \ - (ext_gpu_map); \ - (ext_gpu_map) = uvm_ext_gpu_map_iter_next((va_range), (ext_gpu_map), (end))) - -#define uvm_ext_gpu_map_for_each_in_safe(ext_gpu_map, ext_gpu_map_next, va_range, gpu, start, end) \ - for ((ext_gpu_map) = uvm_ext_gpu_map_iter_first((va_range), (gpu), (start), (end)), \ - (ext_gpu_map_next) = uvm_ext_gpu_map_iter_next((va_range), (ext_gpu_map), (end)); \ - (ext_gpu_map); \ - (ext_gpu_map) = (ext_gpu_map_next), \ - (ext_gpu_map_next) = uvm_ext_gpu_map_iter_next((va_range), (ext_gpu_map), (end))) - -#define uvm_ext_gpu_map_for_each(ext_gpu_map, va_range, gpu) \ - uvm_ext_gpu_map_for_each_in(ext_gpu_map, va_range, gpu, (va_range)->node.start, (va_range)->node.end) - -#define uvm_ext_gpu_map_for_each_safe(ext_gpu_map, ext_gpu_map_next, va_range, gpu) \ - uvm_ext_gpu_map_for_each_in_safe(ext_gpu_map, \ - ext_gpu_map_next, \ - va_range, \ - gpu, \ - (va_range)->node.start, \ - (va_range)->node.end) +#define uvm_ext_gpu_map_for_each_in(ext_gpu_map, external_range, gpu, start, end) \ + for ((ext_gpu_map) = uvm_ext_gpu_map_iter_first((external_range), (gpu), (start), (end)); \ + (ext_gpu_map); \ + (ext_gpu_map) = uvm_ext_gpu_map_iter_next((external_range), (ext_gpu_map), (end))) + +#define uvm_ext_gpu_map_for_each_in_safe(ext_gpu_map, ext_gpu_map_next, external_range, gpu, start, end) \ + for ((ext_gpu_map) = uvm_ext_gpu_map_iter_first((external_range), (gpu), (start), (end)), \ + (ext_gpu_map_next) = uvm_ext_gpu_map_iter_next((external_range), (ext_gpu_map), (end)); \ + (ext_gpu_map); \ + (ext_gpu_map) = (ext_gpu_map_next), \ + (ext_gpu_map_next) = uvm_ext_gpu_map_iter_next((external_range), (ext_gpu_map), (end))) + +#define uvm_ext_gpu_map_for_each(ext_gpu_map, external_range, gpu) \ + uvm_ext_gpu_map_for_each_in(ext_gpu_map, \ + external_range, \ + gpu, \ + (external_range)->va_range.node.start, \ + (external_range)->va_range.node.end) + +#define uvm_ext_gpu_map_for_each_safe(ext_gpu_map, ext_gpu_map_next, external_range, gpu) \ + uvm_ext_gpu_map_for_each_in_safe(ext_gpu_map, \ + ext_gpu_map_next, \ + external_range, \ + gpu, \ + (external_range)->va_range.node.start, \ + (external_range)->va_range.node.end) // User-facing APIs (uvm_api_map_external_allocation, uvm_api_free) are declared // uvm_api.h. @@ -141,7 +147,7 @@ NV_STATUS uvm_va_range_map_rm_allocation(uvm_va_range_t *va_range, // // The caller must hold the range tree lock for the mapping gpu and is // responsible for making sure that mapping gpu is retained across those calls. -void uvm_ext_gpu_map_destroy(uvm_va_range_t *va_range, +void uvm_ext_gpu_map_destroy(uvm_va_range_external_t *external_range, uvm_ext_gpu_map_t *ext_gpu_map, struct list_head *deferred_free_list); diff --git a/kernel-open/nvidia-uvm/uvm_mem.c b/kernel-open/nvidia-uvm/uvm_mem.c index e85b30d4d1..008daa50f0 100644 --- a/kernel-open/nvidia-uvm/uvm_mem.c +++ b/kernel-open/nvidia-uvm/uvm_mem.c @@ -1051,8 +1051,6 @@ static NV_STATUS mem_map_gpu(uvm_mem_t *mem, // (uvm_conf_computing_dma_buffer_pool_t). Because we would typically // already hold the DMA_BUFFER_POOL lock at this time, we cannot hold // the block lock. Allocate PTEs without eviction in this context. - // - // See uvm_pmm_gpu_alloc() if (uvm_mem_is_sysmem_dma(mem)) pmm_flags = UVM_PMM_ALLOC_FLAGS_NONE; diff --git a/kernel-open/nvidia-uvm/uvm_mem_test.c b/kernel-open/nvidia-uvm/uvm_mem_test.c index 755e729b89..bcd8d3b21b 100644 --- a/kernel-open/nvidia-uvm/uvm_mem_test.c +++ b/kernel-open/nvidia-uvm/uvm_mem_test.c @@ -97,7 +97,8 @@ static NV_STATUS check_accessible_from_gpu(uvm_gpu_t *gpu, uvm_mem_t *mem) } uvm_push_set_description(&push, - "Memcopy %zd bytes from virtual sys_mem 0x%llx to %s mem 0x%llx [mem loc: %s, page size: %u]", + "Memcopy %zu bytes from virtual sys_mem 0x%llx to %s mem 0x%llx [mem loc: %s, page " + "size: %llu]", size_this_time, sys_mem_gpu_address.address, mem_gpu_address.is_virtual ? "virtual" : "physical", diff --git a/kernel-open/nvidia-uvm/uvm_migrate.c b/kernel-open/nvidia-uvm/uvm_migrate.c index 659523efd0..c7acdb2ed9 100644 --- a/kernel-open/nvidia-uvm/uvm_migrate.c +++ b/kernel-open/nvidia-uvm/uvm_migrate.c @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2016-2023 NVIDIA Corporation + Copyright (c) 2016-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -60,14 +60,14 @@ module_param(uvm_perf_migrate_cpu_preunmap_block_order, uint, S_IRUGO); static bool g_uvm_perf_migrate_cpu_preunmap_enable __read_mostly; static NvU64 g_uvm_perf_migrate_cpu_preunmap_size __read_mostly; -static bool is_migration_single_block(uvm_va_range_t *first_va_range, NvU64 base, NvU64 length) +static bool is_migration_single_block(uvm_va_range_managed_t *first_managed_range, NvU64 base, NvU64 length) { NvU64 end = base + length - 1; - if (end > first_va_range->node.end) + if (end > first_managed_range->va_range.node.end) return false; - return uvm_va_range_block_index(first_va_range, base) == uvm_va_range_block_index(first_va_range, end); + return uvm_va_range_block_index(first_managed_range, base) == uvm_va_range_block_index(first_managed_range, end); } static NV_STATUS block_migrate_map_mapped_pages(uvm_va_block_t *va_block, @@ -236,7 +236,7 @@ NV_STATUS uvm_va_block_migrate_locked(uvm_va_block_t *va_block, UVM_MAKE_RESIDENT_CAUSE_API_MIGRATE); } else { - uvm_va_policy_t *policy = uvm_va_range_get_policy(va_block->va_range); + uvm_va_policy_t *policy = &va_block->managed_range->policy; if (uvm_va_policy_is_read_duplicate(policy, va_space)) { status = uvm_va_block_make_resident_read_duplicate(va_block, @@ -401,28 +401,27 @@ static bool va_block_should_do_cpu_preunmap(uvm_va_block_t *va_block, return num_cpu_unchanged_pages == 0; } -static void preunmap_multi_block(uvm_va_range_t *va_range, +static void preunmap_multi_block(uvm_va_range_managed_t *managed_range, uvm_va_block_context_t *va_block_context, NvU64 start, NvU64 end, uvm_processor_id_t dest_id) { size_t i; - const size_t first_block_index = uvm_va_range_block_index(va_range, start); - const size_t last_block_index = uvm_va_range_block_index(va_range, end); + const size_t first_block_index = uvm_va_range_block_index(managed_range, start); + const size_t last_block_index = uvm_va_range_block_index(managed_range, end); NvU32 num_unmap_pages = 0; - UVM_ASSERT(start >= va_range->node.start); - UVM_ASSERT(end <= va_range->node.end); - UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_MANAGED); - uvm_assert_rwsem_locked(&va_range->va_space->lock); + UVM_ASSERT(start >= managed_range->va_range.node.start); + UVM_ASSERT(end <= managed_range->va_range.node.end); + uvm_assert_rwsem_locked(&managed_range->va_range.va_space->lock); - UVM_ASSERT(uvm_range_group_all_migratable(va_range->va_space, start, end)); + UVM_ASSERT(uvm_range_group_all_migratable(managed_range->va_range.va_space, start, end)); for (i = first_block_index; i <= last_block_index; i++) { NvU32 num_block_unmap_pages; - if (!va_block_should_do_cpu_preunmap(uvm_va_range_block(va_range, i), + if (!va_block_should_do_cpu_preunmap(uvm_va_range_block(managed_range, i), va_block_context, start, end, @@ -435,10 +434,10 @@ static void preunmap_multi_block(uvm_va_range_t *va_range, } if (num_unmap_pages > 0) - unmap_mapping_range(va_range->va_space->mapping, start, end - start + 1, 1); + unmap_mapping_range(managed_range->va_range.va_space->mapping, start, end - start + 1, 1); } -static NV_STATUS uvm_va_range_migrate_multi_block(uvm_va_range_t *va_range, +static NV_STATUS uvm_va_range_migrate_multi_block(uvm_va_range_managed_t *managed_range, uvm_service_block_context_t *service_context, NvU64 start, NvU64 end, @@ -447,22 +446,21 @@ static NV_STATUS uvm_va_range_migrate_multi_block(uvm_va_range_t *va_range, uvm_tracker_t *out_tracker) { size_t i; - const size_t first_block_index = uvm_va_range_block_index(va_range, start); - const size_t last_block_index = uvm_va_range_block_index(va_range, end); + const size_t first_block_index = uvm_va_range_block_index(managed_range, start); + const size_t last_block_index = uvm_va_range_block_index(managed_range, end); - UVM_ASSERT(start >= va_range->node.start); - UVM_ASSERT(end <= va_range->node.end); - UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_MANAGED); - uvm_assert_rwsem_locked(&va_range->va_space->lock); + UVM_ASSERT(start >= managed_range->va_range.node.start); + UVM_ASSERT(end <= managed_range->va_range.node.end); + uvm_assert_rwsem_locked(&managed_range->va_range.va_space->lock); - UVM_ASSERT(uvm_range_group_all_migratable(va_range->va_space, start, end)); + UVM_ASSERT(uvm_range_group_all_migratable(managed_range->va_range.va_space, start, end)); // Iterate over blocks, populating them if necessary for (i = first_block_index; i <= last_block_index; i++) { uvm_va_block_retry_t va_block_retry; uvm_va_block_region_t region; uvm_va_block_t *va_block; - NV_STATUS status = uvm_va_range_block_create(va_range, i, &va_block); + NV_STATUS status = uvm_va_range_block_create(managed_range, i, &va_block); if (status != NV_OK) return status; @@ -487,7 +485,7 @@ static NV_STATUS uvm_va_range_migrate_multi_block(uvm_va_range_t *va_range, return NV_OK; } -static NV_STATUS uvm_va_range_migrate(uvm_va_range_t *va_range, +static NV_STATUS uvm_va_range_migrate(uvm_va_range_managed_t *managed_range, uvm_service_block_context_t *service_context, NvU64 start, NvU64 end, @@ -497,9 +495,10 @@ static NV_STATUS uvm_va_range_migrate(uvm_va_range_t *va_range, uvm_tracker_t *out_tracker) { NvU64 preunmap_range_start = start; - uvm_va_policy_t *policy = uvm_va_range_get_policy(va_range); + uvm_va_policy_t *policy = &managed_range->policy; - should_do_cpu_preunmap = should_do_cpu_preunmap && va_range_should_do_cpu_preunmap(policy, va_range->va_space); + should_do_cpu_preunmap = should_do_cpu_preunmap && + va_range_should_do_cpu_preunmap(policy, managed_range->va_range.va_space); // Divide migrations into groups of contiguous VA blocks. This is to trigger // CPU unmaps for that region before the migration starts. @@ -511,7 +510,7 @@ static NV_STATUS uvm_va_range_migrate(uvm_va_range_t *va_range, preunmap_range_end = UVM_ALIGN_UP(preunmap_range_start + 1, g_uvm_perf_migrate_cpu_preunmap_size); preunmap_range_end = min(preunmap_range_end - 1, end); - preunmap_multi_block(va_range, + preunmap_multi_block(managed_range, service_context->block_context, preunmap_range_start, preunmap_range_end, @@ -521,7 +520,7 @@ static NV_STATUS uvm_va_range_migrate(uvm_va_range_t *va_range, preunmap_range_end = end; } - status = uvm_va_range_migrate_multi_block(va_range, + status = uvm_va_range_migrate_multi_block(managed_range, service_context, preunmap_range_start, preunmap_range_end, @@ -539,7 +538,7 @@ static NV_STATUS uvm_va_range_migrate(uvm_va_range_t *va_range, static NV_STATUS uvm_migrate_ranges(uvm_va_space_t *va_space, uvm_service_block_context_t *service_context, - uvm_va_range_t *first_va_range, + uvm_va_range_managed_t *first_managed_range, NvU64 base, NvU64 length, uvm_processor_id_t dest_id, @@ -547,39 +546,33 @@ static NV_STATUS uvm_migrate_ranges(uvm_va_space_t *va_space, bool should_do_cpu_preunmap, uvm_tracker_t *out_tracker) { - uvm_va_range_t *va_range, *va_range_last; + uvm_va_range_managed_t *managed_range, *managed_range_last; NvU64 end = base + length - 1; NV_STATUS status = NV_OK; bool skipped_migrate = false; - if (!first_va_range) { - // For HMM, we iterate over va_blocks since there is no va_range. + if (!first_managed_range) { + // For HMM, we iterate over va_blocks since there is no managed_range. return uvm_hmm_migrate_ranges(va_space, service_context, base, length, dest_id, mode, out_tracker); } - UVM_ASSERT(first_va_range == uvm_va_space_iter_first(va_space, base, base)); + UVM_ASSERT(first_managed_range == uvm_va_space_iter_managed_first(va_space, base, base)); - va_range_last = NULL; - uvm_for_each_va_range_in_contig_from(va_range, va_space, first_va_range, end) { + managed_range_last = NULL; + uvm_for_each_va_range_managed_in_contig_from(managed_range, va_space, first_managed_range, end) { uvm_range_group_range_iter_t iter; - uvm_va_policy_t *policy = uvm_va_range_get_policy(va_range); + uvm_va_policy_t *policy = &managed_range->policy; - va_range_last = va_range; + managed_range_last = managed_range; - // Only managed ranges can be migrated - if (va_range->type != UVM_VA_RANGE_TYPE_MANAGED) { - status = NV_ERR_INVALID_ADDRESS; - break; - } - - // For UVM-Lite GPUs, the CUDA driver may suballocate a single va_range - // into many range groups. For this reason, we iterate over each va_range first - // then through the range groups within. + // For UVM-Lite GPUs, the CUDA driver may suballocate a single + // managed_range into many range groups. For this reason, we iterate + // over each managed_range first then through the range groups within. uvm_range_group_for_each_migratability_in(&iter, va_space, - max(base, va_range->node.start), - min(end, va_range->node.end)) { - // Skip non-migratable VA ranges + max(base, managed_range->va_range.node.start), + min(end, managed_range->va_range.node.end)) { + // Skip non-migratable ranges if (!iter.migratable) { // Only return NV_WARN_MORE_PROCESSING_REQUIRED if the pages aren't // already resident at dest_id. @@ -588,7 +581,7 @@ static NV_STATUS uvm_migrate_ranges(uvm_va_space_t *va_space, service_context->block_context->make_resident.dest_nid)) skipped_migrate = true; } - else if (uvm_processor_mask_test(&va_range->uvm_lite_gpus, dest_id) && + else if (uvm_processor_mask_test(&managed_range->va_range.uvm_lite_gpus, dest_id) && !uvm_va_policy_preferred_location_equal(policy, dest_id, NUMA_NO_NODE)) { // Don't migrate to a non-faultable GPU that is in UVM-Lite mode, // unless it's the preferred location @@ -596,7 +589,7 @@ static NV_STATUS uvm_migrate_ranges(uvm_va_space_t *va_space, break; } else { - status = uvm_va_range_migrate(va_range, + status = uvm_va_range_migrate(managed_range, service_context, iter.start, iter.end, @@ -614,7 +607,7 @@ static NV_STATUS uvm_migrate_ranges(uvm_va_space_t *va_space, return status; // Check that we were able to iterate over the entire range without any gaps - if (!va_range_last || va_range_last->node.end < end) + if (!managed_range_last || managed_range_last->va_range.node.end < end) return NV_ERR_INVALID_ADDRESS; if (skipped_migrate) @@ -630,7 +623,7 @@ static NV_STATUS uvm_migrate(uvm_va_space_t *va_space, uvm_processor_id_t dest_id, int dest_nid, NvU32 migrate_flags, - uvm_va_range_t *first_va_range, + uvm_va_range_managed_t *first_managed_range, uvm_tracker_t *out_tracker) { NV_STATUS status = NV_OK; @@ -644,12 +637,12 @@ static NV_STATUS uvm_migrate(uvm_va_space_t *va_space, // If the GPU has its memory disabled, just skip the migration and let // faults take care of things. - if (!uvm_va_space_processor_has_memory(va_space, dest_id)) + if (!uvm_processor_has_memory(dest_id)) return NV_OK; if (mm) uvm_assert_mmap_lock_locked(mm); - else if (!first_va_range) + else if (!first_managed_range) return NV_ERR_INVALID_ADDRESS; service_context = uvm_service_block_context_alloc(mm); @@ -677,8 +670,8 @@ static NV_STATUS uvm_migrate(uvm_va_space_t *va_space, // 2- Go block by block reexecuting the transfer (in case someone moved it // since the first pass), and adding the mappings. // - // For HMM (!first_va_range), we always do a single pass. - is_single_block = !first_va_range || is_migration_single_block(first_va_range, base, length); + // For HMM (!first_managed_range), we always do a single pass. + is_single_block = !first_managed_range || is_migration_single_block(first_managed_range, base, length); do_mappings = UVM_ID_IS_GPU(dest_id) || !(migrate_flags & UVM_MIGRATE_FLAG_SKIP_CPU_MAP); do_two_passes = do_mappings && !is_single_block; @@ -687,7 +680,7 @@ static NV_STATUS uvm_migrate(uvm_va_space_t *va_space, status = uvm_migrate_ranges(va_space, service_context, - first_va_range, + first_managed_range, base, length, dest_id, @@ -705,7 +698,7 @@ static NV_STATUS uvm_migrate(uvm_va_space_t *va_space, status = uvm_migrate_ranges(va_space, service_context, - first_va_range, + first_managed_range, base, length, dest_id, @@ -792,7 +785,7 @@ static void semaphore_release_from_cpu(uvm_mem_t *semaphore_mem, NvU64 semaphore semaphore_cpu_va = (char *) uvm_mem_get_cpu_addr_kernel(semaphore_mem) + semaphore_offset; - UVM_WRITE_ONCE(*(NvU32 *)semaphore_cpu_va, semaphore_payload); + WRITE_ONCE(*(NvU32 *)semaphore_cpu_va, semaphore_payload); } static NV_STATUS semaphore_release(NvU64 semaphore_address, @@ -872,7 +865,7 @@ NV_STATUS uvm_api_migrate(UVM_MIGRATE_PARAMS *params, struct file *filp) uvm_tracker_t tracker = UVM_TRACKER_INIT(); uvm_tracker_t *tracker_ptr = NULL; uvm_gpu_t *dest_gpu = NULL; - uvm_va_range_t *sema_va_range = NULL; + uvm_va_range_semaphore_pool_t *sema_va_range = NULL; struct mm_struct *mm; NV_STATUS status = NV_OK; bool flush_events = false; @@ -917,9 +910,9 @@ NV_STATUS uvm_api_migrate(UVM_MIGRATE_PARAMS *params, struct file *filp) } } else { - sema_va_range = uvm_va_range_find(va_space, params->semaphoreAddress); + sema_va_range = uvm_va_range_semaphore_pool_find(va_space, params->semaphoreAddress); if (!IS_ALIGNED(params->semaphoreAddress, sizeof(params->semaphorePayload)) || - !sema_va_range || sema_va_range->type != UVM_VA_RANGE_TYPE_SEMAPHORE_POOL) { + !sema_va_range) { status = NV_ERR_INVALID_ADDRESS; goto done; } @@ -980,18 +973,19 @@ NV_STATUS uvm_api_migrate(UVM_MIGRATE_PARAMS *params, struct file *filp) if (type == UVM_API_RANGE_TYPE_ATS) { uvm_migrate_args_t uvm_migrate_args = { - .va_space = va_space, - .mm = mm, - .start = params->base, - .length = params->length, - .dst_id = dest_id, - .dst_node_id = cpu_numa_node, - .populate_permissions = UVM_POPULATE_PERMISSIONS_INHERIT, - .touch = false, - .skip_mapped = false, - .populate_on_cpu_alloc_failures = false, - .user_space_start = ¶ms->userSpaceStart, - .user_space_length = ¶ms->userSpaceLength, + .va_space = va_space, + .mm = mm, + .start = params->base, + .length = params->length, + .dst_id = dest_id, + .dst_node_id = cpu_numa_node, + .populate_permissions = UVM_POPULATE_PERMISSIONS_INHERIT, + .touch = false, + .skip_mapped = false, + .populate_on_cpu_alloc_failures = false, + .populate_on_migrate_vma_failures = true, + .user_space_start = ¶ms->userSpaceStart, + .user_space_length = ¶ms->userSpaceLength, }; status = uvm_migrate_pageable(&uvm_migrate_args); @@ -1004,7 +998,7 @@ NV_STATUS uvm_api_migrate(UVM_MIGRATE_PARAMS *params, struct file *filp) dest_id, (UVM_ID_IS_CPU(dest_id) ? cpu_numa_node : NUMA_NO_NODE), params->flags, - uvm_va_space_iter_first(va_space, params->base, params->base), + uvm_va_space_iter_managed_first(va_space, params->base, params->base), tracker_ptr); } } @@ -1025,7 +1019,7 @@ NV_STATUS uvm_api_migrate(UVM_MIGRATE_PARAMS *params, struct file *filp) if (params->semaphoreAddress && (status == NV_OK)) { status = semaphore_release(params->semaphoreAddress, params->semaphorePayload, - &sema_va_range->semaphore_pool, + sema_va_range, dest_gpu, tracker_ptr); } @@ -1104,9 +1098,9 @@ NV_STATUS uvm_api_migrate_range_group(UVM_MIGRATE_RANGE_GROUP_PARAMS *params, st status = NV_ERR_OUT_OF_RANGE; } else { - uvm_va_range_t *first_va_range = uvm_va_space_iter_first(va_space, start, start); + uvm_va_range_managed_t *first_managed_range = uvm_va_space_iter_managed_first(va_space, start, start); - if (!first_va_range || first_va_range->type != UVM_VA_RANGE_TYPE_MANAGED) { + if (!first_managed_range) { status = NV_ERR_INVALID_ADDRESS; goto done; } @@ -1118,7 +1112,7 @@ NV_STATUS uvm_api_migrate_range_group(UVM_MIGRATE_RANGE_GROUP_PARAMS *params, st dest_id, NUMA_NO_NODE, migrate_flags, - first_va_range, + first_managed_range, &local_tracker); } diff --git a/kernel-open/nvidia-uvm/uvm_migrate_pageable.c b/kernel-open/nvidia-uvm/uvm_migrate_pageable.c index 9990e3b59a..d9eccbd955 100644 --- a/kernel-open/nvidia-uvm/uvm_migrate_pageable.c +++ b/kernel-open/nvidia-uvm/uvm_migrate_pageable.c @@ -49,7 +49,7 @@ static NV_STATUS migrate_vma_page_copy_address(struct page *page, uvm_gpu_address_t *gpu_addr) { uvm_va_space_t *va_space = state->uvm_migrate_args->va_space; - uvm_gpu_t *owning_gpu = UVM_ID_IS_CPU(resident_id)? NULL: uvm_va_space_get_gpu(va_space, resident_id); + uvm_gpu_t *owning_gpu = UVM_ID_IS_CPU(resident_id)? NULL: uvm_gpu_get(resident_id); const bool can_copy_from = uvm_processor_mask_test(&va_space->can_copy_from[uvm_id_value(copying_gpu->id)], resident_id); @@ -111,8 +111,8 @@ static NV_STATUS migrate_vma_zero_begin_push(uvm_va_space_t *va_space, channel_type, push, "Zero %s from %s VMA region [0x%lx, 0x%lx]", - uvm_va_space_processor_name(va_space, dst_id), - uvm_va_space_processor_name(va_space, gpu->id), + uvm_processor_get_name(dst_id), + uvm_processor_get_name(gpu->id), start, outer); } @@ -130,20 +130,20 @@ static NV_STATUS migrate_vma_copy_begin_push(uvm_va_space_t *va_space, UVM_ASSERT_MSG(!uvm_id_equal(src_id, dst_id), "Unexpected copy to self, processor %s\n", - uvm_va_space_processor_name(va_space, src_id)); + uvm_processor_get_name(src_id)); if (UVM_ID_IS_CPU(src_id)) { - gpu = uvm_va_space_get_gpu(va_space, dst_id); + gpu = uvm_gpu_get(dst_id); channel_type = UVM_CHANNEL_TYPE_CPU_TO_GPU; } else if (UVM_ID_IS_CPU(dst_id)) { - gpu = uvm_va_space_get_gpu(va_space, src_id); + gpu = uvm_gpu_get(src_id); channel_type = UVM_CHANNEL_TYPE_GPU_TO_CPU; } else { // For GPU to GPU copies, prefer to "push" the data from the source as // that works better - gpu = uvm_va_space_get_gpu(va_space, src_id); + gpu = uvm_gpu_get(src_id); channel_type = UVM_CHANNEL_TYPE_GPU_TO_GPU; } @@ -154,24 +154,24 @@ static NV_STATUS migrate_vma_copy_begin_push(uvm_va_space_t *va_space, if (!gpu->mem_info.numa.enabled) { UVM_ASSERT_MSG(uvm_processor_mask_test(&va_space->can_copy_from[uvm_id_value(gpu->id)], dst_id), "GPU %s dst %s src %s\n", - uvm_va_space_processor_name(va_space, gpu->id), - uvm_va_space_processor_name(va_space, dst_id), - uvm_va_space_processor_name(va_space, src_id)); + uvm_processor_get_name(gpu->id), + uvm_processor_get_name(dst_id), + uvm_processor_get_name(src_id)); UVM_ASSERT_MSG(uvm_processor_mask_test(&va_space->can_copy_from[uvm_id_value(gpu->id)], src_id), "GPU %s dst %s src %s\n", - uvm_va_space_processor_name(va_space, gpu->id), - uvm_va_space_processor_name(va_space, dst_id), - uvm_va_space_processor_name(va_space, src_id)); + uvm_processor_get_name(gpu->id), + uvm_processor_get_name(dst_id), + uvm_processor_get_name(src_id)); } if (channel_type == UVM_CHANNEL_TYPE_GPU_TO_GPU) { - uvm_gpu_t *dst_gpu = uvm_va_space_get_gpu(va_space, dst_id); + uvm_gpu_t *dst_gpu = uvm_gpu_get(dst_id); return uvm_push_begin_gpu_to_gpu(gpu->channel_manager, dst_gpu, push, "Copy from %s to %s for VMA region [0x%lx, 0x%lx]", - uvm_va_space_processor_name(va_space, src_id), - uvm_va_space_processor_name(va_space, dst_id), + uvm_processor_get_name(src_id), + uvm_processor_get_name(dst_id), start, outer); } @@ -180,8 +180,8 @@ static NV_STATUS migrate_vma_copy_begin_push(uvm_va_space_t *va_space, channel_type, push, "Copy from %s to %s for VMA region [0x%lx, 0x%lx]", - uvm_va_space_processor_name(va_space, src_id), - uvm_va_space_processor_name(va_space, dst_id), + uvm_processor_get_name(src_id), + uvm_processor_get_name(dst_id), start, outer); } @@ -356,7 +356,7 @@ static NV_STATUS migrate_vma_populate_anon_pages(struct vm_area_struct *vma, copying_gpu = uvm_va_space_find_first_gpu(va_space); } else { - copying_gpu = uvm_va_space_get_gpu(va_space, dst_id); + copying_gpu = uvm_gpu_get(dst_id); } UVM_ASSERT(copying_gpu); @@ -928,7 +928,7 @@ static NV_STATUS migrate_pageable(migrate_vma_state_t *state) status = migrate_pageable_vma(vma, start, outer, state, &next_addr); if (status == NV_WARN_NOTHING_TO_DO) { - NV_STATUS populate_status = NV_OK; + NV_STATUS populate_status; bool touch = uvm_migrate_args->touch; uvm_populate_permissions_t populate_permissions = uvm_migrate_args->populate_permissions; @@ -948,8 +948,16 @@ static NV_STATUS migrate_pageable(migrate_vma_state_t *state) if (current->mm != mm && !(current->flags & PF_KTHREAD)) return NV_ERR_NOT_SUPPORTED; - // Populate pages with uvm_populate_pageable - populate_status = uvm_populate_pageable_vma(vma, start, length, 0, touch, populate_permissions); + // Populate pages with uvm_populate_pageable if requested. + if (uvm_migrate_args->populate_on_migrate_vma_failures) { + populate_status = uvm_populate_pageable_vma(vma, start, length, 0, touch, populate_permissions); + } + else { + *user_space_start = start; + *user_space_length = outer - start; + populate_status = NV_WARN_NOTHING_TO_DO; + } + if (populate_status == NV_OK) { *user_space_start = max(vma->vm_start, start); *user_space_length = min(vma->vm_end, outer) - *user_space_start; @@ -983,7 +991,6 @@ NV_STATUS uvm_migrate_pageable(uvm_migrate_args_t *uvm_migrate_args) { migrate_vma_state_t *state = NULL; NV_STATUS status; - uvm_va_space_t *va_space = uvm_migrate_args->va_space; uvm_processor_id_t dst_id = uvm_migrate_args->dst_id; UVM_ASSERT(PAGE_ALIGNED(uvm_migrate_args->start)); @@ -997,7 +1004,7 @@ NV_STATUS uvm_migrate_pageable(uvm_migrate_args_t *uvm_migrate_args) else { // Incoming dst_node_id is only valid if dst_id belongs to the CPU. Use // dst_node_id as the GPU node id if dst_id doesn't belong to the CPU. - uvm_migrate_args->dst_node_id = uvm_gpu_numa_node(uvm_va_space_get_gpu(va_space, dst_id)); + uvm_migrate_args->dst_node_id = uvm_gpu_numa_node(uvm_gpu_get(dst_id)); } state = kmem_cache_alloc(g_uvm_migrate_vma_state_cache, NV_UVM_GFP_FLAGS); diff --git a/kernel-open/nvidia-uvm/uvm_migrate_pageable.h b/kernel-open/nvidia-uvm/uvm_migrate_pageable.h index 4b5fbd3dfd..49efad2991 100644 --- a/kernel-open/nvidia-uvm/uvm_migrate_pageable.h +++ b/kernel-open/nvidia-uvm/uvm_migrate_pageable.h @@ -44,6 +44,7 @@ typedef struct bool touch : 1; bool skip_mapped : 1; bool populate_on_cpu_alloc_failures : 1; + bool populate_on_migrate_vma_failures : 1; NvU64 *user_space_start; NvU64 *user_space_length; } uvm_migrate_args_t; diff --git a/kernel-open/nvidia-uvm/uvm_mmu.c b/kernel-open/nvidia-uvm/uvm_mmu.c index 6efca72ed6..2410c78299 100644 --- a/kernel-open/nvidia-uvm/uvm_mmu.c +++ b/kernel-open/nvidia-uvm/uvm_mmu.c @@ -50,18 +50,18 @@ // because that type is normally associated with the LCE mapped to the most // PCEs. The higher bandwidth is beneficial when doing bulk operations such as // clearing PTEs, or initializing a page directory/table. -#define page_tree_begin_acquire(tree, tracker, push, format, ...) ({ \ - NV_STATUS status; \ - uvm_channel_manager_t *manager = (tree)->gpu->channel_manager; \ - \ - if (manager == NULL) \ - status = uvm_push_begin_fake((tree)->gpu, (push)); \ - else if (uvm_parent_gpu_is_virt_mode_sriov_heavy((tree)->gpu->parent)) \ - status = uvm_push_begin_acquire(manager, UVM_CHANNEL_TYPE_MEMOPS, (tracker), (push), (format), ##__VA_ARGS__); \ - else \ - status = uvm_push_begin_acquire(manager, UVM_CHANNEL_TYPE_GPU_INTERNAL, (tracker), (push), (format), ##__VA_ARGS__);\ - \ - status; \ +#define page_tree_begin_acquire(tree, tracker, push, format, ...) ({ \ + NV_STATUS __status; \ + uvm_channel_manager_t *__manager = (tree)->gpu->channel_manager; \ + \ + if (__manager == NULL) \ + __status = uvm_push_begin_fake((tree)->gpu, (push)); \ + else if (uvm_parent_gpu_is_virt_mode_sriov_heavy((tree)->gpu->parent)) \ + __status = uvm_push_begin_acquire(__manager, UVM_CHANNEL_TYPE_MEMOPS, (tracker), (push), (format), ##__VA_ARGS__); \ + else \ + __status = uvm_push_begin_acquire(__manager, UVM_CHANNEL_TYPE_GPU_INTERNAL, (tracker), (push), (format), ##__VA_ARGS__);\ + \ + __status; \ }) // Default location of page table allocations @@ -2368,7 +2368,7 @@ NV_STATUS uvm_mmu_create_peer_identity_mappings(uvm_gpu_t *gpu, uvm_gpu_t *peer) peer_mapping = uvm_gpu_get_peer_mapping(gpu, peer->id); phys_offset = 0ULL; - if (uvm_gpus_are_nvswitch_connected(gpu, peer)) { + if (uvm_parent_gpus_are_nvswitch_connected(gpu->parent, peer->parent)) { // Add the 47-bit physical address routing bits for this peer to the // generated PTEs phys_offset = peer->parent->nvswitch_info.fabric_memory_window_start; @@ -2658,7 +2658,7 @@ NV_STATUS uvm_mmu_chunk_map(uvm_gpu_chunk_t *chunk) // mappings are reference counted as multiples of PAGE_SIZE. User chunk // sizes are guaranteed to be a multiple of that page size, but kernel chunk // sizes can be smaller. - UVM_ASSERT(uvm_pmm_gpu_memory_type_is_user(chunk->type)); + UVM_ASSERT(uvm_gpu_chunk_is_user(chunk)); UVM_ASSERT(PAGE_ALIGNED(chunk_size)); @@ -2705,7 +2705,7 @@ void uvm_mmu_chunk_unmap(uvm_gpu_chunk_t *chunk, uvm_tracker_t *tracker) chunk_size = uvm_gpu_chunk_get_size(chunk); num_unmapped_pages = chunk_size / PAGE_SIZE; - UVM_ASSERT(uvm_pmm_gpu_memory_type_is_user(chunk->type)); + UVM_ASSERT(uvm_gpu_chunk_is_user(chunk)); UVM_ASSERT(PAGE_ALIGNED(chunk_size)); root_chunk_mapping = root_chunk_mapping_from_chunk(gpu, chunk); diff --git a/kernel-open/nvidia-uvm/uvm_perf_events.h b/kernel-open/nvidia-uvm/uvm_perf_events.h index 0d46192277..2094f345f2 100644 --- a/kernel-open/nvidia-uvm/uvm_perf_events.h +++ b/kernel-open/nvidia-uvm/uvm_perf_events.h @@ -114,7 +114,7 @@ typedef union // Only one of these two can be set. The other one must be NULL uvm_va_block_t *block; - uvm_va_range_t *range; + uvm_va_range_managed_t *range; } module_unload; struct @@ -151,6 +151,8 @@ typedef union { NvU64 fault_va; + NvU32 cpu_num; + bool is_write; NvU64 pc; @@ -181,8 +183,8 @@ typedef union // For CPU-to-CPU migrations, these two fields indicate the source // and destination NUMA node IDs. - NvU16 dst_nid; - NvU16 src_nid; + NvS16 dst_nid; + NvS16 src_nid; // Start address of the memory range being migrated NvU64 address; @@ -336,8 +338,8 @@ static inline void uvm_perf_event_notify_migration_cpu(uvm_perf_va_space_events_ .block = va_block, .dst = UVM_ID_CPU, .src = UVM_ID_CPU, - .src_nid = (NvU16)src_nid, - .dst_nid = (NvU16)dst_nid, + .src_nid = (NvS16)src_nid, + .dst_nid = (NvS16)dst_nid, .address = address, .bytes = bytes, .transfer_mode = transfer_mode, @@ -384,6 +386,7 @@ static inline void uvm_perf_event_notify_cpu_fault(uvm_perf_va_space_events_t *v uvm_processor_id_t preferred_location, NvU64 fault_va, bool is_write, + NvU32 cpu_num, NvU64 pc) { uvm_perf_event_data_t event_data = @@ -397,9 +400,10 @@ static inline void uvm_perf_event_notify_cpu_fault(uvm_perf_va_space_events_t *v } }; - event_data.fault.cpu.fault_va = fault_va, - event_data.fault.cpu.is_write = is_write, - event_data.fault.cpu.pc = pc, + event_data.fault.cpu.fault_va = fault_va; + event_data.fault.cpu.is_write = is_write; + event_data.fault.cpu.pc = pc; + event_data.fault.cpu.cpu_num = cpu_num; uvm_perf_event_notify(va_space_events, UVM_PERF_EVENT_FAULT, &event_data); } diff --git a/kernel-open/nvidia-uvm/uvm_perf_module.c b/kernel-open/nvidia-uvm/uvm_perf_module.c index 7f1e06111f..170d46437a 100644 --- a/kernel-open/nvidia-uvm/uvm_perf_module.c +++ b/kernel-open/nvidia-uvm/uvm_perf_module.c @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2016 NVIDIA Corporation + Copyright (c) 2016-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -78,7 +78,7 @@ NV_STATUS uvm_perf_module_load(uvm_perf_module_t *module, uvm_va_space_t *va_spa void uvm_perf_module_unload(uvm_perf_module_t *module, uvm_va_space_t *va_space) { uvm_perf_event_data_t event_data; - uvm_va_range_t *va_range; + uvm_va_range_managed_t *managed_range; uvm_va_block_t *block; size_t i; @@ -89,12 +89,10 @@ void uvm_perf_module_unload(uvm_perf_module_t *module, uvm_va_space_t *va_space) event_data.module_unload.module = module; - // Iterate over all va_range/va_blocks in the va_space - uvm_for_each_va_range(va_range, va_space) { - if (va_range->type != UVM_VA_RANGE_TYPE_MANAGED) - continue; + // Iterate over all managed ranges/va_blocks in the va_space + uvm_for_each_va_range_managed(managed_range, va_space) { - for_each_va_block_in_va_range(va_range, block) { + for_each_va_block_in_va_range(managed_range, block) { uvm_mutex_lock(&block->lock); // Notify a fake va_block destruction to destroy the module-allocated data @@ -106,7 +104,7 @@ void uvm_perf_module_unload(uvm_perf_module_t *module, uvm_va_space_t *va_space) } // Notify a fake va_range destruction to destroy the module-allocated data event_data.module_unload.block = NULL; - event_data.module_unload.range = va_range; + event_data.module_unload.range = managed_range; uvm_perf_event_notify(&va_space->perf_events, UVM_PERF_EVENT_MODULE_UNLOAD, &event_data); } diff --git a/kernel-open/nvidia-uvm/uvm_perf_prefetch.c b/kernel-open/nvidia-uvm/uvm_perf_prefetch.c index 76a9795d75..a928490ee9 100644 --- a/kernel-open/nvidia-uvm/uvm_perf_prefetch.c +++ b/kernel-open/nvidia-uvm/uvm_perf_prefetch.c @@ -260,7 +260,7 @@ static void update_bitmap_tree_from_va_block(uvm_perf_prefetch_bitmap_tree_t *bi // registered in the current process for this GPU. if (UVM_ID_IS_GPU(new_residency) && uvm_processor_mask_test(&va_space->registered_gpu_va_spaces, new_residency)) { - uvm_gpu_t *gpu = uvm_va_space_get_gpu(va_space, new_residency); + uvm_gpu_t *gpu = uvm_gpu_get(new_residency); big_page_size = uvm_va_block_gpu_big_page_size(va_block, gpu); } diff --git a/kernel-open/nvidia-uvm/uvm_perf_thrashing.c b/kernel-open/nvidia-uvm/uvm_perf_thrashing.c index d0be3ebd52..cd9a825cd5 100644 --- a/kernel-open/nvidia-uvm/uvm_perf_thrashing.c +++ b/kernel-open/nvidia-uvm/uvm_perf_thrashing.c @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2016-2023 NVIDIA Corporation + Copyright (c) 2016-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -223,9 +223,9 @@ typedef struct // uvm_procfs_is_debug_enabled() returns true. static processor_thrashing_stats_t g_cpu_thrashing_stats; -#define PROCESSOR_THRASHING_STATS_INC(va_space, proc, field) \ +#define PROCESSOR_THRASHING_STATS_INC(proc, field) \ do { \ - processor_thrashing_stats_t *_processor_stats = thrashing_stats_get_or_null(va_space, proc); \ + processor_thrashing_stats_t *_processor_stats = thrashing_stats_get_or_null(proc); \ if (_processor_stats) \ atomic64_inc(&_processor_stats->field); \ } while (0) @@ -474,7 +474,7 @@ static processor_thrashing_stats_t *gpu_thrashing_stats_get_or_null(uvm_gpu_t *g return uvm_perf_module_type_data(gpu->perf_modules_data, UVM_PERF_MODULE_TYPE_THRASHING); } -static processor_thrashing_stats_t *thrashing_stats_get_or_null(uvm_va_space_t *va_space, uvm_processor_id_t id) +static processor_thrashing_stats_t *thrashing_stats_get_or_null(uvm_processor_id_t id) { if (UVM_ID_IS_CPU(id)) { if (g_cpu_thrashing_stats.procfs_file) @@ -483,7 +483,7 @@ static processor_thrashing_stats_t *thrashing_stats_get_or_null(uvm_va_space_t * return NULL; } - return gpu_thrashing_stats_get_or_null(uvm_va_space_get_gpu(va_space, id)); + return gpu_thrashing_stats_get_or_null(uvm_gpu_get(id)); } // Create the thrashing stats struct for the given GPU @@ -1034,7 +1034,7 @@ static void thrashing_detected(uvm_va_block_t *va_block, if (!uvm_page_mask_test_and_set(&block_thrashing->thrashing_pages, page_index)) ++block_thrashing->num_thrashing_pages; - PROCESSOR_THRASHING_STATS_INC(va_space, processor_id, num_thrashing); + PROCESSOR_THRASHING_STATS_INC(processor_id, num_thrashing); UVM_ASSERT(thrashing_state_checks(va_block, block_thrashing, page_thrashing, page_index)); } @@ -1269,7 +1269,7 @@ void thrashing_event_cb(uvm_perf_event_t event_id, uvm_perf_event_data_t *event_ // read duplication is supported. read_duplication = uvm_va_block_is_hmm(va_block) ? UVM_READ_DUPLICATION_UNSET : - uvm_va_range_get_policy(va_block->va_range)->read_duplication; + va_block->managed_range->policy.read_duplication; // We only care about migrations due to replayable faults, access // counters and page prefetching. For non-replayable faults, UVM will @@ -1405,7 +1405,16 @@ static bool thrashing_processors_have_fast_access_to(uvm_va_space_t *va_space, uvm_processor_mask_and(fast_to, &va_space->has_nvlink[uvm_id_value(to)], &va_space->has_native_atomics[uvm_id_value(to)]); - uvm_processor_mask_set(fast_to, to); + if (UVM_ID_IS_CPU(to)) { + uvm_processor_mask_set(fast_to, to); + } + else { + // Include registered SMC peers and the processor 'to'. + uvm_processor_mask_range_fill(fast_to, + uvm_gpu_id_from_sub_processor(uvm_parent_gpu_id_from_gpu_id(to), 0), + UVM_PARENT_ID_MAX_SUB_PROCESSORS); + uvm_processor_mask_and(fast_to, fast_to, &va_space->registered_gpu_va_spaces); + } return uvm_processor_mask_subset(&page_thrashing->processors, fast_to); } @@ -1491,10 +1500,10 @@ static uvm_perf_thrashing_hint_t get_hint_for_migration_thrashing(va_space_thras else if (!preferred_location_is_thrashing(preferred_location, page_thrashing) && thrashing_processors_have_fast_access_to(va_space, va_block_context, page_thrashing, closest_resident_id)){ // This is a fast path for those scenarios in which all thrashing - // processors have fast (NVLINK + native atomics) access to the current - // residency. This is skipped if the preferred location is thrashing and - // not accessible by the rest of thrashing processors. Otherwise, we - // would be in the condition above. + // processors have fast access (NVLINK + native atomics or SMC peers) + // to the current residency. This is skipped if the preferred location + // is thrashing and not accessible by the rest of thrashing processors. + // Otherwise, we would be in the condition above. if (UVM_ID_IS_CPU(closest_resident_id)) { // On P9 systems, we prefer the CPU to map vidmem (since it can // cache it), so don't map the GPU to sysmem. @@ -1577,8 +1586,7 @@ static uvm_perf_thrashing_hint_t get_hint_for_migration_thrashing(va_space_thras hint.pin.residency = requester; } - if (hint.type == UVM_PERF_THRASHING_HINT_TYPE_PIN && - !uvm_va_space_processor_has_memory(va_space, hint.pin.residency)) + if (hint.type == UVM_PERF_THRASHING_HINT_TYPE_PIN && !uvm_processor_has_memory(hint.pin.residency)) hint.pin.residency = UVM_ID_CPU; return hint; @@ -1741,9 +1749,9 @@ uvm_perf_thrashing_hint_t uvm_perf_thrashing_get_hint(uvm_va_block_t *va_block, } else { if (uvm_id_equal(hint.pin.residency, requester)) - PROCESSOR_THRASHING_STATS_INC(va_space, requester, num_pin_local); + PROCESSOR_THRASHING_STATS_INC(requester, num_pin_local); else - PROCESSOR_THRASHING_STATS_INC(va_space, requester, num_pin_remote); + PROCESSOR_THRASHING_STATS_INC(requester, num_pin_remote); uvm_processor_mask_copy(&hint.pin.processors, &page_thrashing->processors); } @@ -1756,7 +1764,7 @@ uvm_perf_thrashing_hint_t uvm_perf_thrashing_get_hint(uvm_va_block_t *va_block, page_index, requester); - PROCESSOR_THRASHING_STATS_INC(va_space, requester, num_throttle); + PROCESSOR_THRASHING_STATS_INC(requester, num_throttle); hint.throttle.end_time_stamp = page_thrashing_get_throttling_end_time_stamp(page_thrashing); } @@ -2102,15 +2110,12 @@ NV_STATUS uvm_test_set_page_thrashing_policy(UVM_TEST_SET_PAGE_THRASHING_POLICY_ // When disabling thrashing detection, destroy the thrashing tracking // information for all VA blocks and unpin pages if (!va_space_thrashing->params.enable) { - uvm_va_range_t *va_range; + uvm_va_range_managed_t *managed_range; - uvm_for_each_va_range(va_range, va_space) { + uvm_for_each_va_range_managed(managed_range, va_space) { uvm_va_block_t *va_block; - if (va_range->type != UVM_VA_RANGE_TYPE_MANAGED) - continue; - - for_each_va_block_in_va_range(va_range, va_block) { + for_each_va_block_in_va_range(managed_range, va_block) { uvm_va_block_region_t va_block_region = uvm_va_block_region_from_block(va_block); uvm_va_block_context_t *block_context = uvm_va_space_block_context(va_space, NULL); diff --git a/kernel-open/nvidia-uvm/uvm_pmm_gpu.c b/kernel-open/nvidia-uvm/uvm_pmm_gpu.c index 3fb7274d1b..1560fab9b8 100644 --- a/kernel-open/nvidia-uvm/uvm_pmm_gpu.c +++ b/kernel-open/nvidia-uvm/uvm_pmm_gpu.c @@ -50,7 +50,7 @@ // root_chunk_lock()) as synchronizing any pending operations might take a long // time and it would be undesirable for that to block other operations of PMM. // Notably some synchronization is required as part of allocation to handle GPU -// lifetime issues across VA spaces (see comments in uvm_pmm_gpu_alloc()). Bit +// lifetime issues across VA spaces (see comments in pmm_gpu_alloc()). Bit // locks (instead of a mutex in each root chunk) are used to save space. // // All free chunks (UVM_PMM_GPU_CHUNK_STATE_FREE) are kept on free lists, with @@ -87,8 +87,9 @@ // chunk become free, they are merged into one bigger chunk. See // free_chunk_with_merges(). // -// Splitting and merging already allocated chunks is also exposed to the users of -// allocated chunks. See uvm_pmm_gpu_split_chunk() and uvm_pmm_gpu_merge_chunk(). +// Splitting and merging already allocated chunks is also exposed to the users +// of allocated chunks. See uvm_pmm_gpu_split_chunk() and +// uvm_pmm_gpu_merge_chunk(). // // As splits and merges are protected by a single PMM mutex, they are only // performed when really necessary. See alloc_chunk() that falls back to split @@ -170,6 +171,7 @@ #include "uvm_kvmalloc.h" #include "uvm_va_space.h" #include "uvm_va_block.h" +#include "uvm_va_range.h" #include "uvm_test.h" #include "uvm_linux.h" @@ -464,7 +466,7 @@ bool uvm_pmm_gpu_memory_type_is_user(uvm_pmm_gpu_memory_type_t type) } } -static bool memory_type_is_protected(uvm_pmm_gpu_memory_type_t type) +bool uvm_pmm_gpu_memory_type_is_protected(uvm_pmm_gpu_memory_type_t type) { switch (type) { case UVM_PMM_GPU_MEMORY_TYPE_USER: // Alias UVM_PMM_GPU_MEMORY_TYPE_USER_PROTECTED @@ -477,8 +479,9 @@ static bool memory_type_is_protected(uvm_pmm_gpu_memory_type_t type) static void uvm_gpu_chunk_set_in_eviction(uvm_gpu_chunk_t *chunk, bool in_eviction) { - UVM_ASSERT(uvm_pmm_gpu_memory_type_is_user(chunk->type)); + UVM_ASSERT(uvm_gpu_chunk_is_user(chunk)); UVM_ASSERT(uvm_gpu_chunk_get_size(chunk) == UVM_CHUNK_SIZE_MAX); + chunk->in_eviction = in_eviction; } @@ -546,13 +549,13 @@ static uvm_pmm_gpu_memory_type_t pmm_squash_memory_type(uvm_pmm_gpu_memory_type_ return UVM_PMM_GPU_MEMORY_TYPE_KERNEL; } -NV_STATUS uvm_pmm_gpu_alloc(uvm_pmm_gpu_t *pmm, - size_t num_chunks, - uvm_chunk_size_t chunk_size, - uvm_pmm_gpu_memory_type_t mem_type, - uvm_pmm_alloc_flags_t flags, - uvm_gpu_chunk_t **chunks, - uvm_tracker_t *out_tracker) +static NV_STATUS pmm_gpu_alloc(uvm_pmm_gpu_t *pmm, + size_t num_chunks, + uvm_chunk_size_t chunk_size, + uvm_pmm_gpu_memory_type_t mem_type, + uvm_pmm_alloc_flags_t flags, + uvm_gpu_chunk_t **chunks, + uvm_tracker_t *out_tracker) { uvm_gpu_t *gpu = uvm_pmm_to_gpu(pmm); NV_STATUS status; @@ -620,16 +623,17 @@ NV_STATUS uvm_pmm_gpu_alloc(uvm_pmm_gpu_t *pmm, return status; } -static NV_STATUS pmm_gpu_alloc_kernel(uvm_pmm_gpu_t *pmm, - size_t num_chunks, - uvm_chunk_size_t chunk_size, - uvm_pmm_gpu_memory_type_t memory_type, - uvm_pmm_alloc_flags_t flags, - uvm_gpu_chunk_t **chunks, - uvm_tracker_t *out_tracker) +NV_STATUS uvm_pmm_gpu_alloc_kernel(uvm_pmm_gpu_t *pmm, + size_t num_chunks, + uvm_chunk_size_t chunk_size, + uvm_pmm_alloc_flags_t flags, + uvm_gpu_chunk_t **chunks, + uvm_tracker_t *out_tracker) { + NV_STATUS status; size_t i; - NV_STATUS status = uvm_pmm_gpu_alloc(pmm, num_chunks, chunk_size, memory_type, flags, chunks, out_tracker); + + status = pmm_gpu_alloc(pmm, num_chunks, chunk_size, UVM_PMM_GPU_MEMORY_TYPE_KERNEL, flags, chunks, out_tracker); if (status != NV_OK) return status; @@ -645,13 +649,23 @@ static NV_STATUS pmm_gpu_alloc_kernel(uvm_pmm_gpu_t *pmm, return NV_OK; } +NV_STATUS uvm_pmm_gpu_alloc_user(uvm_pmm_gpu_t *pmm, + size_t num_chunks, + uvm_chunk_size_t chunk_size, + uvm_pmm_alloc_flags_t flags, + uvm_gpu_chunk_t **chunks, + uvm_tracker_t *out_tracker) +{ + return pmm_gpu_alloc(pmm, num_chunks, chunk_size, UVM_PMM_GPU_MEMORY_TYPE_USER, flags, chunks, out_tracker); +} + static void chunk_update_lists_locked(uvm_pmm_gpu_t *pmm, uvm_gpu_chunk_t *chunk) { uvm_gpu_root_chunk_t *root_chunk = root_chunk_from_chunk(pmm, chunk); uvm_assert_spinlock_locked(&pmm->list_lock); - if (uvm_pmm_gpu_memory_type_is_user(chunk->type)) { + if (uvm_gpu_chunk_is_user(chunk)) { if (chunk_is_root_chunk_pinned(pmm, chunk)) { UVM_ASSERT(root_chunk->chunk.state == UVM_PMM_GPU_CHUNK_STATE_IS_SPLIT || root_chunk->chunk.state == UVM_PMM_GPU_CHUNK_STATE_TEMP_PINNED); @@ -677,7 +691,7 @@ static void gpu_unpin_temp(uvm_pmm_gpu_t *pmm, bool is_referenced) { UVM_ASSERT(chunk->state == UVM_PMM_GPU_CHUNK_STATE_TEMP_PINNED); - UVM_ASSERT(uvm_pmm_gpu_memory_type_is_user(chunk->type)); + UVM_ASSERT(uvm_gpu_chunk_is_user(chunk)); INIT_LIST_HEAD(&chunk->list); @@ -782,7 +796,8 @@ static bool assert_chunk_mergeable(uvm_pmm_gpu_t *pmm, uvm_gpu_chunk_t *chunk) uvm_gpu_chunk_t *child = chunk->suballoc->subchunks[i]; UVM_ASSERT(child->state == first_child->state); - if (first_child->state == UVM_PMM_GPU_CHUNK_STATE_ALLOCATED) { + + if ((first_child->state == UVM_PMM_GPU_CHUNK_STATE_ALLOCATED) && uvm_gpu_chunk_is_user(first_child)) { uvm_gpu_chunk_t *prev_child = chunk->suballoc->subchunks[i-1]; UVM_ASSERT(child->va_block == child_va_block); @@ -825,11 +840,12 @@ static void merge_gpu_chunk(uvm_pmm_gpu_t *pmm, uvm_gpu_chunk_t *chunk) // the subchunk state. uvm_spin_lock(&pmm->list_lock); - child_state = chunk->suballoc->subchunks[0]->state; + subchunk = chunk->suballoc->subchunks[0]; + child_state = subchunk->state; - if (child_state == UVM_PMM_GPU_CHUNK_STATE_ALLOCATED) { - subchunk = chunk->suballoc->subchunks[0]; + if ((child_state == UVM_PMM_GPU_CHUNK_STATE_ALLOCATED) && uvm_gpu_chunk_is_user(subchunk)) { UVM_ASSERT(subchunk->va_block); + chunk->va_block = subchunk->va_block; chunk->va_block_page_index = subchunk->va_block_page_index; chunk->is_referenced = subchunk->is_referenced; @@ -845,7 +861,7 @@ static void merge_gpu_chunk(uvm_pmm_gpu_t *pmm, uvm_gpu_chunk_t *chunk) // The resulting chunk is assumed to be non-zero as a simplification, // instead of checking that all the subchunks are zero, since callers of - // uvm_pmm_gpu_alloc are not required to clear it. However, we think that + // pmm_gpu_alloc are not required to clear it. However, we think that // this covers all relevant cases since it is uncommon to split a chunk and // not to use any of the subchunks later on. chunk->is_zero = false; @@ -859,7 +875,7 @@ static void merge_gpu_chunk(uvm_pmm_gpu_t *pmm, uvm_gpu_chunk_t *chunk) // merge. UVM_ASSERT(list_empty(&subchunk->list)); - if (child_state == UVM_PMM_GPU_CHUNK_STATE_ALLOCATED) + if ((child_state == UVM_PMM_GPU_CHUNK_STATE_ALLOCATED) && uvm_gpu_chunk_is_user(subchunk)) UVM_ASSERT(subchunk->va_block != NULL); kmem_cache_free(CHUNK_CACHE, subchunk); @@ -1191,7 +1207,7 @@ uvm_gpu_phys_address_t uvm_pmm_gpu_peer_phys_address(uvm_pmm_gpu_t *pmm, uvm_aperture_t aperture = uvm_gpu_peer_aperture(accessing_gpu, gpu); NvU64 addr; - if (uvm_gpus_are_nvswitch_connected(accessing_gpu, gpu)) + if (uvm_parent_gpus_are_nvswitch_connected(accessing_gpu->parent, gpu->parent)) addr = chunk->address + gpu->parent->nvswitch_info.fabric_memory_window_start; else addr = chunk->address; @@ -1215,7 +1231,9 @@ uvm_gpu_address_t uvm_pmm_gpu_peer_copy_address(uvm_pmm_gpu_t *pmm, return uvm_gpu_address_virtual(gpu_peer_mapping->base + chunk->address); } -static NV_STATUS evict_root_chunk_from_va_block(uvm_pmm_gpu_t *pmm, uvm_gpu_root_chunk_t *root_chunk, uvm_va_block_t *va_block) +static NV_STATUS evict_root_chunk_from_va_block(uvm_pmm_gpu_t *pmm, + uvm_gpu_root_chunk_t *root_chunk, + uvm_va_block_t *va_block) { uvm_gpu_t *gpu = uvm_pmm_to_gpu(pmm); NV_STATUS status; @@ -1477,7 +1495,7 @@ static void root_chunk_update_eviction_list(uvm_pmm_gpu_t *pmm, uvm_gpu_chunk_t uvm_spin_lock(&pmm->list_lock); UVM_ASSERT(uvm_gpu_chunk_get_size(chunk) == UVM_CHUNK_SIZE_MAX); - UVM_ASSERT(uvm_pmm_gpu_memory_type_is_user(chunk->type)); + UVM_ASSERT(uvm_gpu_chunk_is_user(chunk)); UVM_ASSERT(chunk->state == UVM_PMM_GPU_CHUNK_STATE_ALLOCATED || chunk->state == UVM_PMM_GPU_CHUNK_STATE_TEMP_PINNED); @@ -1797,8 +1815,8 @@ static NV_STATUS alloc_chunk_with_splits(uvm_pmm_gpu_t *pmm, NvU32 i; uvm_gpu_chunk_t *parent; - UVM_ASSERT(uvm_gpu_chunk_get_size(chunk) == cur_size); - UVM_ASSERT(chunk->type == type); + UVM_ASSERT(uvm_gpu_chunk_get_size(chunk) == cur_size); + UVM_ASSERT(chunk->type == type); UVM_ASSERT(chunk->state == UVM_PMM_GPU_CHUNK_STATE_TEMP_PINNED); if (chunk->parent) { @@ -1953,8 +1971,7 @@ NV_STATUS alloc_root_chunk(uvm_pmm_gpu_t *pmm, // // TODO: Bug 2446832: Most (all?) kernel chunks don't require scrubbing. // Also, user pages that are about to be overwritten, don't need to be - // zeroed, either. Add an interface to uvm_pmm_gpu_alloc for callers to - // specify when they don't need zeroed pages. + // zeroed, either. Add a flag to uvm_pmm_gpu_alloc_* to skip scrubbing. const bool skip_pma_scrubbing = gpu->mem_info.numa.enabled; UVM_ASSERT(uvm_pmm_gpu_memory_type_is_user(type) || uvm_pmm_gpu_memory_type_is_kernel(type)); @@ -1973,7 +1990,7 @@ NV_STATUS alloc_root_chunk(uvm_pmm_gpu_t *pmm, // When the Confidential Computing feature is enabled, allocate GPU memory // in the protected region, unless specified otherwise. - if (g_uvm_global.conf_computing_enabled && memory_type_is_protected(type)) + if (g_uvm_global.conf_computing_enabled && uvm_pmm_gpu_memory_type_is_protected(type)) options.flags |= UVM_PMA_ALLOCATE_PROTECTED_REGION; if (!gpu->parent->rm_info.isSimulated && @@ -2063,7 +2080,8 @@ void free_root_chunk(uvm_pmm_gpu_t *pmm, uvm_gpu_root_chunk_t *root_chunk, free_ status = uvm_tracker_wait_deinit(&root_chunk->tracker); if (status != NV_OK) { - // TODO: Bug 1766184: Handle RC/ECC. For now just go ahead and free the chunk anyway. + // TODO: Bug 1766184: Handle RC/ECC. For now just go ahead and free the + // chunk anyway. UVM_ASSERT(uvm_global_get_status() != NV_OK); } @@ -2161,9 +2179,10 @@ NV_STATUS split_gpu_chunk(uvm_pmm_gpu_t *pmm, uvm_gpu_chunk_t *chunk) // The child inherits the parent's state. subchunk->state = chunk->state; - if (chunk->state == UVM_PMM_GPU_CHUNK_STATE_ALLOCATED) { + if ((chunk->state == UVM_PMM_GPU_CHUNK_STATE_ALLOCATED) && uvm_gpu_chunk_is_user(chunk)) { UVM_ASSERT(chunk->va_block); uvm_assert_mutex_locked(&chunk->va_block->lock); + subchunk->va_block = chunk->va_block; subchunk->va_block_page_index = chunk->va_block_page_index + (i * subchunk_size) / PAGE_SIZE; subchunk->is_referenced = chunk->is_referenced; @@ -2185,7 +2204,8 @@ NV_STATUS split_gpu_chunk(uvm_pmm_gpu_t *pmm, uvm_gpu_chunk_t *chunk) chunk->is_referenced = false; } else if (chunk->state == UVM_PMM_GPU_CHUNK_STATE_TEMP_PINNED) { - // -1 for the parent chunk that is going to transition into the split state. + // -1 for the parent chunk that is going to transition into the split + // state. root_chunk->chunk.suballoc->pinned_leaf_chunks += num_sub - 1; // When a pinned root chunk gets split, the count starts at 0 not @@ -2680,9 +2700,9 @@ static NV_STATUS uvm_pmm_gpu_pma_evict_range(void *void_pmm, // Make sure that all pending allocations, that could have started before // the eviction callback was called, are done. This is required to guarantee - // that any address that, PMA thinks, is owned by UVM has been indeed recorded - // in PMM's state. Taking the pma_lock in write mode will make sure all - // readers (pending allocations and frees) are done, but will also + // that any address that, PMA thinks, is owned by UVM has been indeed + // recorded in PMM's state. Taking the pma_lock in write mode will make sure + // all readers (pending allocations and frees) are done, but will also // unnecessarily stop new allocations from starting until it's released. // TODO: Bug 1795559: SRCU would likely be better for this type of // synchronization, but that's GPL. Figure out whether we can do anything @@ -2704,7 +2724,7 @@ static NV_STATUS uvm_pmm_gpu_pma_evict_range(void *void_pmm, uvm_spin_lock(&pmm->list_lock); if (chunk->state != UVM_PMM_GPU_CHUNK_STATE_PMA_OWNED) { - UVM_ASSERT(uvm_pmm_gpu_memory_type_is_user(chunk->type)); + UVM_ASSERT(uvm_gpu_chunk_is_user(chunk)); if (chunk_is_evictable(pmm, chunk)) { chunk_start_eviction(pmm, chunk); @@ -2722,7 +2742,7 @@ static NV_STATUS uvm_pmm_gpu_pma_evict_range(void *void_pmm, } while (!eviction_started && chunk->state != UVM_PMM_GPU_CHUNK_STATE_PMA_OWNED); // The eviction callback gets called with a physical range that might be - // only partially allocated by UVM. Skip the chunks that UVM doesn't own. + // only partially allocated by UVM. Skip the chunks that UVM doesn't own if (chunk->state == UVM_PMM_GPU_CHUNK_STATE_PMA_OWNED) continue; @@ -2998,9 +3018,9 @@ static NV_STATUS get_chunk_mappings_in_range(uvm_pmm_gpu_t *pmm, uvm_gpu_chunk_t reverse_map = &get_chunk_mappings_data->mappings[get_chunk_mappings_data->num_mappings]; reverse_map->va_block = chunk->va_block; - reverse_map->region = uvm_va_block_region(chunk->va_block_page_index, - chunk->va_block_page_index + uvm_gpu_chunk_get_size(chunk) / PAGE_SIZE); - reverse_map->owner = gpu->id; + reverse_map->region = uvm_va_block_region(chunk->va_block_page_index, + chunk->va_block_page_index + uvm_gpu_chunk_get_size(chunk) / PAGE_SIZE); + reverse_map->owner = gpu->id; // If we land in the middle of a chunk, adjust the offset if (get_chunk_mappings_data->phys_start > chunk->address) { @@ -3039,9 +3059,9 @@ NvU32 uvm_pmm_gpu_phys_to_virt(uvm_pmm_gpu_t *pmm, NvU64 phys_addr, NvU64 region uvm_gpu_chunk_t *chunk = &root_chunk->chunk; get_chunk_mappings_data_t get_chunk_mappings_data; - get_chunk_mappings_data.phys_start = phys_addr; - get_chunk_mappings_data.phys_end = phys_addr + size_in_chunk - 1; - get_chunk_mappings_data.mappings = out_mappings + num_mappings; + get_chunk_mappings_data.phys_start = phys_addr; + get_chunk_mappings_data.phys_end = phys_addr + size_in_chunk - 1; + get_chunk_mappings_data.mappings = out_mappings + num_mappings; get_chunk_mappings_data.num_mappings = 0; // Walk the chunks for the current root chunk @@ -3305,6 +3325,83 @@ static bool uvm_pmm_gpu_check_orphan_pages(uvm_pmm_gpu_t *pmm) } #endif // UVM_IS_CONFIG_HMM() +#if defined(CONFIG_PCI_P2PDMA) && defined(NV_STRUCT_PAGE_HAS_ZONE_DEVICE_DATA) +static void device_p2p_page_free_wake(struct nv_kref *ref) +{ + uvm_device_p2p_mem_t *p2p_mem = container_of(ref, uvm_device_p2p_mem_t, refcount); + wake_up(&p2p_mem->waitq); +} + +static void device_p2p_page_free(struct page *page) +{ + uvm_device_p2p_mem_t *p2p_mem = page->zone_device_data; + + page->zone_device_data = NULL; + nv_kref_put(&p2p_mem->refcount, device_p2p_page_free_wake); +} + +static const struct dev_pagemap_ops uvm_device_p2p_pgmap_ops = +{ + .page_free = device_p2p_page_free, +}; + +void uvm_pmm_gpu_device_p2p_init(uvm_gpu_t *gpu) +{ + unsigned long pci_start_pfn = pci_resource_start(gpu->parent->pci_dev, + uvm_device_p2p_static_bar(gpu)) >> PAGE_SHIFT; + unsigned long pci_end_pfn = pci_start_pfn + (gpu->mem_info.static_bar1_size >> PAGE_SHIFT); + struct page *p2p_page; + + gpu->device_p2p_initialised = false; + uvm_mutex_init(&gpu->device_p2p_lock, UVM_LOCK_ORDER_GLOBAL); + + if (uvm_parent_gpu_is_coherent(gpu->parent)) { + // A coherent system uses normal struct pages. + gpu->device_p2p_initialised = true; + return; + } + + // RM sets this when it has created a contiguous BAR mapping large enough to + // cover all of GPU memory that will be allocated to userspace buffers. This + // is required to support the P2PDMA feature to ensure we have a P2PDMA page + // available for every mapping. + if (!gpu->mem_info.static_bar1_size) + return; + + if (pci_p2pdma_add_resource(gpu->parent->pci_dev, uvm_device_p2p_static_bar(gpu), 0, 0)) { + UVM_ERR_PRINT("Unable to initialse PCI P2PDMA pages\n"); + return; + } + + // The current upstream PCIe P2PDMA architecture does not allow drivers to + // specify a page_free callback. We plan to work with upstream maintainers + // to resolve this but in the mean time we can work around the issue by + // overwriting the existing dev_pagemap_ops struct with our own. + // TODO: Bug 4672502: [Linux Upstream][UVM] Allow drivers to manage and + // allocate PCI P2PDMA pages directly + p2p_page = pfn_to_page(pci_start_pfn); + p2p_page->pgmap->ops = &uvm_device_p2p_pgmap_ops; + for (; page_to_pfn(p2p_page) < pci_end_pfn; p2p_page++) + p2p_page->zone_device_data = NULL; + + gpu->device_p2p_initialised = true; +} + +void uvm_pmm_gpu_device_p2p_deinit(uvm_gpu_t *gpu) +{ + unsigned long pci_start_pfn = pci_resource_start(gpu->parent->pci_dev, + uvm_device_p2p_static_bar(gpu)) >> PAGE_SHIFT; + struct page *p2p_page; + + if (gpu->device_p2p_initialised && !uvm_parent_gpu_is_coherent(gpu->parent)) { + p2p_page = pfn_to_page(pci_start_pfn); + devm_memunmap_pages(&gpu->parent->pci_dev->dev, p2p_page->pgmap); + } + + gpu->device_p2p_initialised = false; +} +#endif // CONFIG_PCI_P2PDMA + static void process_lazy_free(uvm_pmm_gpu_t *pmm) { uvm_gpu_chunk_t *chunk; @@ -3346,8 +3443,8 @@ NV_STATUS uvm_pmm_gpu_init(uvm_pmm_gpu_t *pmm) NV_STATUS status = NV_OK; size_t i, j, k; - // UVM_CHUNK_SIZE_INVALID is UVM_CHUNK_SIZE_MAX shifted left by 1. This protects - // UVM_CHUNK_SIZE_INVALID from being negative + // UVM_CHUNK_SIZE_INVALID is UVM_CHUNK_SIZE_MAX shifted left by 1. This + // protects UVM_CHUNK_SIZE_INVALID from being negative BUILD_BUG_ON(UVM_CHUNK_SIZE_MAX >= UVM_CHUNK_SIZE_INVALID); uvm_assert_mutex_locked(&g_uvm_global.global_lock); @@ -3637,7 +3734,8 @@ NV_STATUS uvm_test_evict_chunk(UVM_TEST_EVICT_CHUNK_PARAMS *params, struct file if (!root_chunk) { // Not finding a chunk to evict is not considered an error, the caller - // can inspect the targeted_chunk_size to see whether anything was evicted. + // can inspect the targeted_chunk_size to see whether anything was + // evicted. goto out; } @@ -3860,8 +3958,8 @@ NV_STATUS uvm_test_pmm_query_pma_stats(UVM_TEST_PMM_QUERY_PMA_STATS_PARAMS *para if (!gpu) return NV_ERR_INVALID_DEVICE; - params->pma_stats.numFreePages64k = UVM_READ_ONCE(gpu->pmm.pma_stats->numFreePages64k); - params->pma_stats.numFreePages2m = UVM_READ_ONCE(gpu->pmm.pma_stats->numFreePages2m); + params->pma_stats.numFreePages64k = READ_ONCE(gpu->pmm.pma_stats->numFreePages64k); + params->pma_stats.numFreePages2m = READ_ONCE(gpu->pmm.pma_stats->numFreePages2m); uvm_gpu_release(gpu); return NV_OK; diff --git a/kernel-open/nvidia-uvm/uvm_pmm_gpu.h b/kernel-open/nvidia-uvm/uvm_pmm_gpu.h index ee458b5ede..d967670ff1 100644 --- a/kernel-open/nvidia-uvm/uvm_pmm_gpu.h +++ b/kernel-open/nvidia-uvm/uvm_pmm_gpu.h @@ -59,7 +59,7 @@ #include "uvm_linux.h" #include "uvm_types.h" #include "nv_uvm_types.h" -#if UVM_IS_CONFIG_HMM() +#if UVM_IS_CONFIG_HMM() || defined(CONFIG_PCI_P2PDMA) #include #endif @@ -126,6 +126,8 @@ static bool uvm_pmm_gpu_memory_type_is_kernel(uvm_pmm_gpu_memory_type_t type) return !uvm_pmm_gpu_memory_type_is_user(type); } +bool uvm_pmm_gpu_memory_type_is_protected(uvm_pmm_gpu_memory_type_t type); + typedef enum { // Chunk belongs to PMA. Code outside PMM should not have access to @@ -144,11 +146,13 @@ typedef enum // Chunk is temporarily pinned. // - // This state is used for user memory chunks that have been allocated, but haven't - // been unpinned yet and also internally when a chunk is about to be split. + // This state is used for user memory chunks that have been allocated, but + // haven't been unpinned yet and also internally when a chunk is about to be + // split. UVM_PMM_GPU_CHUNK_STATE_TEMP_PINNED, - // Chunk is allocated. That is it is backing some VA block + // Chunk is allocated. In the case of a user chunk, this state implies that + // the chunk is backing a VA block. UVM_PMM_GPU_CHUNK_STATE_ALLOCATED, // Number of states - MUST BE LAST @@ -173,7 +177,6 @@ typedef enum UVM_PMM_ALLOC_FLAGS_MASK = (1 << 2) - 1 } uvm_pmm_alloc_flags_t; - typedef enum { // Identifier for lists with zeroed chunks @@ -227,6 +230,16 @@ unsigned long uvm_pmm_gpu_devmem_get_pfn(uvm_pmm_gpu_t *pmm, uvm_gpu_chunk_t *ch #endif +#if defined(CONFIG_PCI_P2PDMA) && defined(NV_STRUCT_PAGE_HAS_ZONE_DEVICE_DATA) +#include + +void uvm_pmm_gpu_device_p2p_init(uvm_gpu_t *gpu); +void uvm_pmm_gpu_device_p2p_deinit(uvm_gpu_t *gpu); +#else +static inline void uvm_pmm_gpu_device_p2p_init(uvm_gpu_t *gpu) {} +static inline void uvm_pmm_gpu_device_p2p_deinit(uvm_gpu_t *gpu) {} +#endif + struct uvm_gpu_chunk_struct { // Physical address of GPU chunk. This may be removed to save memory @@ -251,14 +264,16 @@ struct uvm_gpu_chunk_struct // This flag is initalized when allocating a new root chunk from PMA. // It is set to true, if PMA already scrubbed the chunk. The flag is - // only valid at allocation time (after uvm_pmm_gpu_alloc call), and + // only valid at allocation time (after uvm_pmm_gpu_alloc_* call), and // the caller is not required to clear it before freeing the chunk. The // VA block chunk population code can query it to skip zeroing the // chunk. bool is_zero : 1; - // This flag indicates an allocated chunk is referenced by a device + // This flag indicates an allocated user chunk is referenced by a device // private struct page PTE and therefore expects a page_free() callback. + // + // This field is always false in kernel chunks. bool is_referenced : 1; uvm_pmm_gpu_chunk_state_t state : order_base_2(UVM_PMM_GPU_CHUNK_STATE_COUNT + 1); @@ -286,6 +301,8 @@ struct uvm_gpu_chunk_struct // The VA block using the chunk, if any. // User chunks that are not backed by a VA block are considered to be // temporarily pinned and cannot be evicted. + // + // This field is always NULL in kernel chunks. uvm_va_block_t *va_block; // If this is subchunk it points to the parent - in other words @@ -403,6 +420,12 @@ static void uvm_gpu_chunk_set_size(uvm_gpu_chunk_t *chunk, uvm_chunk_size_t size // use it if the owning GPU is retained. uvm_gpu_t *uvm_gpu_chunk_get_gpu(const uvm_gpu_chunk_t *chunk); +// Returns true if the memory type of the chunk is a user type. +static bool uvm_gpu_chunk_is_user(const uvm_gpu_chunk_t *chunk) +{ + return uvm_pmm_gpu_memory_type_is_user(chunk->type); +} + // Return the first struct page corresponding to the physical address range // of the given chunk. // @@ -412,7 +435,10 @@ uvm_gpu_t *uvm_gpu_chunk_get_gpu(const uvm_gpu_chunk_t *chunk); // page containing the chunk's starting address. struct page *uvm_gpu_chunk_to_page(uvm_pmm_gpu_t *pmm, uvm_gpu_chunk_t *chunk); -// Allocates num_chunks chunks of size chunk_size in caller-supplied array (chunks). +// User memory allocator. +// +// Allocates num_chunks chunks of size chunk_size in caller-supplied array +// (chunks). // // Returned chunks are in the TEMP_PINNED state, requiring a call to either // uvm_pmm_gpu_unpin_allocated, uvm_pmm_gpu_unpin_referenced, or @@ -432,47 +458,24 @@ struct page *uvm_gpu_chunk_to_page(uvm_pmm_gpu_t *pmm, uvm_gpu_chunk_t *chunk); // If the memory returned by the PMM allocator cannot be physically addressed, // the MMU interface provides user chunk mapping and unmapping functions // (uvm_mmu_chunk_map/unmap) that enable virtual addressing. -NV_STATUS uvm_pmm_gpu_alloc(uvm_pmm_gpu_t *pmm, - size_t num_chunks, - uvm_chunk_size_t chunk_size, - uvm_pmm_gpu_memory_type_t mem_type, - uvm_pmm_alloc_flags_t flags, - uvm_gpu_chunk_t **chunks, - uvm_tracker_t *out_tracker); - -// Helper for allocating kernel memory -// -// Internally calls uvm_pmm_gpu_alloc() and sets the state of all chunks to -// allocated on success. +NV_STATUS uvm_pmm_gpu_alloc_user(uvm_pmm_gpu_t *pmm, + size_t num_chunks, + uvm_chunk_size_t chunk_size, + uvm_pmm_alloc_flags_t flags, + uvm_gpu_chunk_t **chunks, + uvm_tracker_t *out_tracker); + +// Kernel memory allocator. // -// If Confidential Computing is enabled, this helper allocates protected kernel -// memory. -static NV_STATUS uvm_pmm_gpu_alloc_kernel(uvm_pmm_gpu_t *pmm, - size_t num_chunks, - uvm_chunk_size_t chunk_size, - uvm_pmm_alloc_flags_t flags, - uvm_gpu_chunk_t **chunks, - uvm_tracker_t *out_tracker) -{ - return uvm_pmm_gpu_alloc(pmm, num_chunks, chunk_size, UVM_PMM_GPU_MEMORY_TYPE_KERNEL, flags, chunks, out_tracker); -} - -// Helper for allocating user memory -// -// Simple wrapper that just uses UVM_PMM_GPU_MEMORY_TYPE_USER for the memory -// type. -// -// If Confidential Computing is enabled, this helper allocates protected user -// memory. -static NV_STATUS uvm_pmm_gpu_alloc_user(uvm_pmm_gpu_t *pmm, - size_t num_chunks, - uvm_chunk_size_t chunk_size, - uvm_pmm_alloc_flags_t flags, - uvm_gpu_chunk_t **chunks, - uvm_tracker_t *out_tracker) -{ - return uvm_pmm_gpu_alloc(pmm, num_chunks, chunk_size, UVM_PMM_GPU_MEMORY_TYPE_USER, flags, chunks, out_tracker); -} +// See uvm_pmm_gpu_alloc_user documentation for details on the behavior of this +// function, with one exception: the returned kernel chunks are in the ALLOCATED +// state. +NV_STATUS uvm_pmm_gpu_alloc_kernel(uvm_pmm_gpu_t *pmm, + size_t num_chunks, + uvm_chunk_size_t chunk_size, + uvm_pmm_alloc_flags_t flags, + uvm_gpu_chunk_t **chunks, + uvm_tracker_t *out_tracker); // Unpin a temporarily pinned chunk, set its reverse map to a VA block, and // mark it as allocated. @@ -486,7 +489,7 @@ void uvm_pmm_gpu_unpin_allocated(uvm_pmm_gpu_t *pmm, uvm_gpu_chunk_t *chunk, uvm // Can only be used on user memory. void uvm_pmm_gpu_unpin_referenced(uvm_pmm_gpu_t *pmm, uvm_gpu_chunk_t *chunk, uvm_va_block_t *va_block); -// Frees the chunk. This also unpins the chunk if it is temporarily pinned. +// Free a user or kernel chunk. Temporarily pinned chunks are unpinned. // // The tracker is optional and a NULL tracker indicates that no new operation // has been pushed for the chunk, but the tracker returned as part of @@ -542,7 +545,8 @@ size_t uvm_pmm_gpu_get_subchunks(uvm_pmm_gpu_t *pmm, // leaf children must be allocated. void uvm_pmm_gpu_merge_chunk(uvm_pmm_gpu_t *pmm, uvm_gpu_chunk_t *chunk); -// Waits for all free chunk trackers (removing their completed entries) to complete. +// Waits for all free chunk trackers (removing their completed entries) to +// complete. // // This inherently races with any chunks being freed to this PMM. The assumption // is that the caller doesn't care about preventing new chunks from being freed, diff --git a/kernel-open/nvidia-uvm/uvm_pmm_sysmem.c b/kernel-open/nvidia-uvm/uvm_pmm_sysmem.c index eafa04430a..3954ae09d9 100644 --- a/kernel-open/nvidia-uvm/uvm_pmm_sysmem.c +++ b/kernel-open/nvidia-uvm/uvm_pmm_sysmem.c @@ -126,7 +126,7 @@ NV_STATUS uvm_pmm_sysmem_mappings_add_gpu_mapping(uvm_pmm_sysmem_mappings_t *sys NvU64 remove_key; for (remove_key = base_key; remove_key < key; ++remove_key) - (void *)radix_tree_delete(&sysmem_mappings->reverse_map_tree, remove_key); + (void)radix_tree_delete(&sysmem_mappings->reverse_map_tree, remove_key); kmem_cache_free(g_reverse_page_map_cache, new_reverse_map); status = errno_to_nv_status(ret); @@ -455,7 +455,7 @@ static NvU32 compute_gpu_mappings_entry_index(uvm_parent_processor_mask_t *dma_a // above and including the id and then counting the number of bits // remaining. uvm_parent_processor_mask_zero(&subset_mask); - bitmap_set(subset_mask.bitmap, UVM_PARENT_ID_GPU0_VALUE, uvm_parent_id_gpu_index(id)); + uvm_parent_processor_mask_range_fill(&subset_mask, uvm_parent_gpu_id_from_index(0), uvm_parent_id_gpu_index(id)); uvm_parent_processor_mask_and(&subset_mask, dma_addrs_mask, &subset_mask); return uvm_parent_processor_mask_get_gpu_count(&subset_mask); diff --git a/kernel-open/nvidia-uvm/uvm_pmm_sysmem_test.c b/kernel-open/nvidia-uvm/uvm_pmm_sysmem_test.c index 2bae1df402..1e08f48fe8 100644 --- a/kernel-open/nvidia-uvm/uvm_pmm_sysmem_test.c +++ b/kernel-open/nvidia-uvm/uvm_pmm_sysmem_test.c @@ -771,7 +771,7 @@ static NV_STATUS test_cpu_chunk_mig(uvm_gpu_t *gpu0, uvm_gpu_t *gpu1) uvm_cpu_physical_chunk_t *phys_chunk; NvU64 dma_addr_gpu0; - UVM_ASSERT(gpu0->parent == gpu1->parent); + UVM_ASSERT(uvm_gpus_are_smc_peers(gpu0, gpu1)); TEST_NV_CHECK_RET(test_cpu_chunk_alloc(PAGE_SIZE, UVM_CPU_CHUNK_ALLOC_FLAGS_NONE, NUMA_NO_NODE, &chunk)); phys_chunk = uvm_cpu_chunk_to_physical(chunk); @@ -1379,7 +1379,7 @@ static void find_shared_gpu_pair(const uvm_processor_mask_t *test_gpus, uvm_gpu_t *gpu1 = uvm_processor_mask_find_next_va_space_gpu(test_gpus, va_space, gpu0); while (gpu1) { - if (gpu0->parent == gpu1->parent) { + if (uvm_gpus_are_smc_peers(gpu0, gpu1)) { *out_gpu0 = gpu0; *out_gpu1 = gpu1; return; diff --git a/kernel-open/nvidia-uvm/uvm_pmm_test.c b/kernel-open/nvidia-uvm/uvm_pmm_test.c index d863eb39ab..a05ab54370 100644 --- a/kernel-open/nvidia-uvm/uvm_pmm_test.c +++ b/kernel-open/nvidia-uvm/uvm_pmm_test.c @@ -112,6 +112,15 @@ static uvm_pmm_gpu_memory_type_t pmm_squash_memory_type(uvm_pmm_gpu_memory_type_ return UVM_PMM_GPU_MEMORY_TYPE_KERNEL; } +// Validate the chunk state upon allocation. +static bool gpu_chunk_allocation_state_is_valid(uvm_gpu_chunk_t *chunk) +{ + if (uvm_gpu_chunk_is_user(chunk)) + return chunk->state == UVM_PMM_GPU_CHUNK_STATE_TEMP_PINNED; + else + return chunk->state == UVM_PMM_GPU_CHUNK_STATE_ALLOCATED; +} + // Verify that the input chunks are in the correct state following alloc static NV_STATUS check_chunks(uvm_gpu_chunk_t **chunks, size_t num_chunks, @@ -121,12 +130,13 @@ static NV_STATUS check_chunks(uvm_gpu_chunk_t **chunks, size_t i; mem_type = pmm_squash_memory_type(mem_type); + for (i = 0; i < num_chunks; i++) { TEST_CHECK_RET(chunks[i]); TEST_CHECK_RET(chunks[i]->suballoc == NULL); - TEST_CHECK_RET(chunks[i]->type == mem_type); - TEST_CHECK_RET(chunks[i]->state == UVM_PMM_GPU_CHUNK_STATE_TEMP_PINNED); - TEST_CHECK_RET(uvm_gpu_chunk_get_size(chunks[i]) == chunk_size); + TEST_CHECK_RET(chunks[i]->type == mem_type); + TEST_CHECK_RET(gpu_chunk_allocation_state_is_valid(chunks[i])); + TEST_CHECK_RET(uvm_gpu_chunk_get_size(chunks[i]) == chunk_size); TEST_CHECK_RET(IS_ALIGNED(chunks[i]->address, chunk_size)); } @@ -198,7 +208,18 @@ static NV_STATUS chunk_alloc_check(uvm_pmm_gpu_t *pmm, if (gpu->mem_info.size == 0) return NV_ERR_NO_MEMORY; - status = uvm_pmm_gpu_alloc(pmm, num_chunks, chunk_size, mem_type, flags, chunks, &local_tracker); + // TODO: Bug 4287430: the calls to uvm_pmm_gpu_alloc_* request protected + // memory, ignoring the protection type in mem_type. But unprotected memory + // is currently not used in UVM, so the default protection (protected) is + // correct. + mem_type = pmm_squash_memory_type(mem_type); + TEST_CHECK_RET(uvm_pmm_gpu_memory_type_is_protected(mem_type)); + + if (uvm_pmm_gpu_memory_type_is_user(mem_type)) + status = uvm_pmm_gpu_alloc_user(pmm, num_chunks, chunk_size, flags, chunks, &local_tracker); + else + status = uvm_pmm_gpu_alloc_kernel(pmm, num_chunks, chunk_size, flags, chunks, &local_tracker); + if (status != NV_OK) return status; @@ -216,14 +237,25 @@ static NV_STATUS chunk_alloc_user_check(uvm_pmm_gpu_t *pmm, NV_STATUS status; uvm_tracker_t local_tracker = UVM_TRACKER_INIT(); - status = uvm_pmm_gpu_alloc(pmm, num_chunks, chunk_size, mem_type, flags, chunks, &local_tracker); + // TODO: Bug 4287430: the call to uvm_pmm_gpu_alloc_user requests protected + // memory, ignoring the protection type in mem_type. But unprotected memory + // is currently not used in UVM, so the default protection (protected) is + // correct. + mem_type = pmm_squash_memory_type(mem_type); + TEST_CHECK_RET(uvm_pmm_gpu_memory_type_is_protected(mem_type)); + + status = uvm_pmm_gpu_alloc_user(pmm, num_chunks, chunk_size, flags, chunks, &local_tracker); if (status != NV_OK) return status; return chunk_alloc_check_common(pmm, num_chunks, chunk_size, mem_type, flags, chunks, &local_tracker, tracker); } -static NV_STATUS check_leak(uvm_gpu_t *gpu, uvm_chunk_size_t chunk_size, uvm_pmm_gpu_memory_type_t type, NvS64 limit, NvU64 *chunks) +static NV_STATUS check_leak(uvm_gpu_t *gpu, + uvm_chunk_size_t chunk_size, + uvm_pmm_gpu_memory_type_t type, + NvS64 limit, + NvU64 *chunks) { NV_STATUS status = NV_OK; pmm_leak_bucket_t *bucket, *next; @@ -702,9 +734,9 @@ static NV_STATUS split_test_single(uvm_pmm_gpu_t *pmm, TEST_CHECK_GOTO(split_chunks[i], error); TEST_CHECK_GOTO(split_chunks[i]->address == parent_addr + i * child_size, error); TEST_CHECK_GOTO(split_chunks[i]->suballoc == NULL, error); - TEST_CHECK_GOTO(split_chunks[i]->type == parent_type, error); - TEST_CHECK_GOTO(split_chunks[i]->state == UVM_PMM_GPU_CHUNK_STATE_TEMP_PINNED, error); - TEST_CHECK_GOTO(uvm_gpu_chunk_get_size(split_chunks[i]) == child_size, error); + TEST_CHECK_GOTO(split_chunks[i]->type == parent_type, error); + TEST_CHECK_GOTO(gpu_chunk_allocation_state_is_valid(split_chunks[i]), error); + TEST_CHECK_GOTO(uvm_gpu_chunk_get_size(split_chunks[i]) == child_size, error); } status = get_subchunks_test(pmm, temp_chunk, split_chunks, num_children); @@ -714,9 +746,11 @@ static NV_STATUS split_test_single(uvm_pmm_gpu_t *pmm, if (mode == SPLIT_TEST_MODE_MERGE) { parent->chunk = temp_chunk; uvm_pmm_gpu_merge_chunk(pmm, parent->chunk); + TEST_CHECK_GOTO(parent->chunk->address == parent_addr, error); TEST_CHECK_GOTO(parent->chunk->suballoc == NULL, error); - TEST_CHECK_GOTO(parent->chunk->state == UVM_PMM_GPU_CHUNK_STATE_TEMP_PINNED, error); + TEST_CHECK_GOTO(gpu_chunk_allocation_state_is_valid(parent->chunk), error); + status = destroy_test_chunk(pmm, parent, verif_mem); } else { @@ -1080,7 +1114,7 @@ static NV_STATUS test_pmm_reverse_map_single(uvm_gpu_t *gpu, uvm_va_space_t *va_ static NV_STATUS test_pmm_reverse_map_many_blocks(uvm_gpu_t *gpu, uvm_va_space_t *va_space, NvU64 addr, NvU64 size) { - uvm_va_range_t *va_range; + uvm_va_range_managed_t *managed_range; uvm_va_block_t *va_block = NULL; uvm_va_block_context_t *va_block_context = NULL; NvU32 num_blocks; @@ -1089,12 +1123,12 @@ static NV_STATUS test_pmm_reverse_map_many_blocks(uvm_gpu_t *gpu, uvm_va_space_t bool is_resident; // In this test, the [addr:addr + size) VA region contains - // several VA ranges with different sizes. + // several managed ranges with different sizes. // Find the first block to compute the base physical address of the root // chunk - uvm_for_each_va_range_in(va_range, va_space, addr, addr + size - 1) { - va_block = uvm_va_range_block(va_range, 0); + uvm_for_each_va_range_managed_in(managed_range, va_space, addr, addr + size - 1) { + va_block = uvm_va_range_block(managed_range, 0); if (va_block) break; } @@ -1121,15 +1155,13 @@ static NV_STATUS test_pmm_reverse_map_many_blocks(uvm_gpu_t *gpu, uvm_va_space_t num_blocks = uvm_pmm_gpu_phys_to_virt(&gpu->pmm, phys_addr.address, size, g_reverse_map_entries); TEST_CHECK_RET(num_blocks != 0); - // Iterate over all VA ranges and their VA blocks within the 2MB VA region. - // Some blocks are not populated. However, we assume that blocks have been - // populated in order so they have been assigned physical addresses - // incrementally. Therefore, the reverse translations will show them in - // order. - uvm_for_each_va_range_in(va_range, va_space, addr, addr + size - 1) { - uvm_va_block_t *va_block; - - for_each_va_block_in_va_range(va_range, va_block) { + // Iterate over all managed ranges and their VA blocks within the 2MB VA + // region. Some blocks are not populated. However, we assume that blocks + // have been populated in order so they have been assigned physical + // addresses incrementally. Therefore, the reverse translations will show + // them in order. + uvm_for_each_va_range_managed_in(managed_range, va_space, addr, addr + size - 1) { + for_each_va_block_in_va_range(managed_range, va_block) { NvU32 num_va_block_pages = 0; // Iterate over all the translations for the current VA block. One diff --git a/kernel-open/nvidia-uvm/uvm_policy.c b/kernel-open/nvidia-uvm/uvm_policy.c index 6dccc8f5e3..3358216668 100644 --- a/kernel-open/nvidia-uvm/uvm_policy.c +++ b/kernel-open/nvidia-uvm/uvm_policy.c @@ -53,7 +53,7 @@ static bool uvm_is_valid_vma_range(struct mm_struct *mm, NvU64 start, NvU64 leng uvm_api_range_type_t uvm_api_range_type_check(uvm_va_space_t *va_space, struct mm_struct *mm, NvU64 base, NvU64 length) { - uvm_va_range_t *va_range, *va_range_last; + uvm_va_range_managed_t *managed_range, *managed_range_last; const NvU64 last_address = base + length - 1; if (mm) @@ -81,17 +81,17 @@ uvm_api_range_type_t uvm_api_range_type_check(uvm_va_space_t *va_space, struct m } } - va_range_last = NULL; + managed_range_last = NULL; - uvm_for_each_managed_va_range_in_contig(va_range, va_space, base, last_address) - va_range_last = va_range; + uvm_for_each_va_range_managed_in_contig(managed_range, va_space, base, last_address) + managed_range_last = managed_range; // Check if passed interval overlaps with an unmanaged VA range, or a - // sub-interval not tracked by a VA range - if (!va_range_last || va_range_last->node.end < last_address) + // sub-interval not tracked by a managed range + if (!managed_range_last || managed_range_last->va_range.node.end < last_address) return UVM_API_RANGE_TYPE_INVALID; - // Passed interval is fully covered by managed VA ranges + // Passed interval is fully covered by managed ranges return UVM_API_RANGE_TYPE_MANAGED; } @@ -100,6 +100,7 @@ static NV_STATUS split_as_needed(uvm_va_space_t *va_space, uvm_va_policy_is_split_needed_t split_needed_cb, void *data) { + uvm_va_range_managed_t *managed_range; uvm_va_range_t *va_range; UVM_ASSERT(PAGE_ALIGNED(addr)); @@ -113,12 +114,14 @@ static NV_STATUS split_as_needed(uvm_va_space_t *va_space, if (addr == va_range->node.start) return NV_OK; + managed_range = uvm_va_range_to_managed_or_null(va_range); + // Only managed ranges can be split. - if (va_range->type != UVM_VA_RANGE_TYPE_MANAGED) + if (!managed_range) return NV_ERR_INVALID_ADDRESS; - if (split_needed_cb(uvm_va_range_get_policy(va_range), data)) - return uvm_va_range_split(va_range, addr - 1, NULL); + if (split_needed_cb(&managed_range->policy, data)) + return uvm_va_range_split(managed_range, addr - 1, NULL); return NV_OK; } @@ -228,10 +231,10 @@ static NV_STATUS preferred_location_set(uvm_va_space_t *va_space, NvU64 length, uvm_processor_id_t preferred_location, int preferred_cpu_nid, - uvm_va_range_t **first_va_range_to_migrate, + uvm_va_range_managed_t **first_managed_range_to_migrate, uvm_tracker_t *out_tracker) { - uvm_va_range_t *va_range, *va_range_last; + uvm_va_range_managed_t *managed_range, *managed_range_last; const NvU64 last_address = base + length - 1; bool preferred_location_is_faultable_gpu = false; preferred_location_split_params_t split_params; @@ -240,7 +243,7 @@ static NV_STATUS preferred_location_set(uvm_va_space_t *va_space, uvm_assert_rwsem_locked_write(&va_space->lock); if (UVM_ID_IS_VALID(preferred_location)) { - *first_va_range_to_migrate = NULL; + *first_managed_range_to_migrate = NULL; preferred_location_is_faultable_gpu = UVM_ID_IS_GPU(preferred_location) && uvm_processor_mask_test(&va_space->faultable_processors, preferred_location); @@ -256,19 +259,19 @@ static NV_STATUS preferred_location_set(uvm_va_space_t *va_space, if (status != NV_OK) return status; - va_range_last = NULL; - uvm_for_each_managed_va_range_in_contig(va_range, va_space, base, last_address) { + managed_range_last = NULL; + uvm_for_each_va_range_managed_in_contig(managed_range, va_space, base, last_address) { bool found_non_migratable_interval = false; - va_range_last = va_range; + managed_range_last = managed_range; // If we didn't split the ends, check that they match - if (va_range->node.start < base || va_range->node.end > last_address) - UVM_ASSERT(uvm_id_equal(uvm_va_range_get_policy(va_range)->preferred_location, preferred_location)); + if (managed_range->va_range.node.start < base || managed_range->va_range.node.end > last_address) + UVM_ASSERT(uvm_id_equal(managed_range->policy.preferred_location, preferred_location)); if (UVM_ID_IS_VALID(preferred_location)) { - const NvU64 start = max(base, va_range->node.start); - const NvU64 end = min(last_address, va_range->node.end); + const NvU64 start = max(base, managed_range->va_range.node.start); + const NvU64 end = min(last_address, managed_range->va_range.node.end); found_non_migratable_interval = !uvm_range_group_all_migratable(va_space, start, end); @@ -276,18 +279,22 @@ static NV_STATUS preferred_location_set(uvm_va_space_t *va_space, return NV_ERR_INVALID_DEVICE; } - status = uvm_va_range_set_preferred_location(va_range, preferred_location, preferred_cpu_nid, mm, out_tracker); + status = uvm_va_range_set_preferred_location(managed_range, + preferred_location, + preferred_cpu_nid, + mm, + out_tracker); if (status != NV_OK) return status; - // Return the first VA range that needs to be migrated so the caller - // function doesn't need to traverse the tree again - if (found_non_migratable_interval && (*first_va_range_to_migrate == NULL)) - *first_va_range_to_migrate = va_range; + // Return the first managed range that needs to be migrated so the + // caller function doesn't need to traverse the tree again + if (found_non_migratable_interval && (*first_managed_range_to_migrate == NULL)) + *first_managed_range_to_migrate = managed_range; } - if (va_range_last) { - UVM_ASSERT(va_range_last->node.end >= last_address); + if (managed_range_last) { + UVM_ASSERT(managed_range_last->va_range.node.end >= last_address); return NV_OK; } @@ -308,8 +315,8 @@ NV_STATUS uvm_api_set_preferred_location(const UVM_SET_PREFERRED_LOCATION_PARAMS NV_STATUS tracker_status; uvm_tracker_t local_tracker = UVM_TRACKER_INIT(); uvm_va_space_t *va_space = uvm_va_space_get(filp); - uvm_va_range_t *va_range = NULL; - uvm_va_range_t *first_va_range_to_migrate = NULL; + uvm_va_range_managed_t *managed_range = NULL; + uvm_va_range_managed_t *first_managed_range_to_migrate = NULL; struct mm_struct *mm; uvm_processor_id_t preferred_location_id; int preferred_cpu_nid = NUMA_NO_NODE; @@ -386,27 +393,30 @@ NV_STATUS uvm_api_set_preferred_location(const UVM_SET_PREFERRED_LOCATION_PARAMS length, preferred_location_id, preferred_cpu_nid, - &first_va_range_to_migrate, + &first_managed_range_to_migrate, &local_tracker); if (status != NV_OK) goto done; - // No VA range to migrate, early exit - if (!first_va_range_to_migrate) + // No managed range to migrate, early exit + if (!first_managed_range_to_migrate) goto done; uvm_va_space_downgrade_write(va_space); has_va_space_write_lock = false; - // No need to check for holes in the VA ranges span here, this was checked by preferred_location_set - for (va_range = first_va_range_to_migrate; va_range; va_range = uvm_va_space_iter_next(va_range, end)) { + // No need to check for holes in the managed ranges span here, this was + // checked by preferred_location_set + for (managed_range = first_managed_range_to_migrate; + managed_range; + managed_range = uvm_va_space_iter_managed_next(managed_range, end)) { uvm_range_group_range_iter_t iter; - NvU64 cur_start = max(start, va_range->node.start); - NvU64 cur_end = min(end, va_range->node.end); + NvU64 cur_start = max(start, managed_range->va_range.node.start); + NvU64 cur_end = min(end, managed_range->va_range.node.end); uvm_range_group_for_each_migratability_in(&iter, va_space, cur_start, cur_end) { if (!iter.migratable) { - status = uvm_range_group_va_range_migrate(va_range, iter.start, iter.end, &local_tracker); + status = uvm_range_group_va_range_migrate(managed_range, iter.start, iter.end, &local_tracker); if (status != NV_OK) goto done; } @@ -504,7 +514,7 @@ NV_STATUS uvm_va_block_set_accessed_by(uvm_va_block_t *va_block, uvm_va_block_region_t region = uvm_va_block_region_from_block(va_block); NV_STATUS status; uvm_tracker_t local_tracker = UVM_TRACKER_INIT(); - uvm_va_policy_t *policy = uvm_va_range_get_policy(va_block->va_range); + uvm_va_policy_t *policy = &va_block->managed_range->policy; UVM_ASSERT(!uvm_va_block_is_hmm(va_block)); @@ -604,29 +614,29 @@ static NV_STATUS accessed_by_set(uvm_va_space_t *va_space, goto done; if (type == UVM_API_RANGE_TYPE_MANAGED) { - uvm_va_range_t *va_range; - uvm_va_range_t *va_range_last = NULL; + uvm_va_range_managed_t *managed_range; + uvm_va_range_managed_t *managed_range_last = NULL; - uvm_for_each_managed_va_range_in_contig(va_range, va_space, base, last_address) { - va_range_last = va_range; + uvm_for_each_va_range_managed_in_contig(managed_range, va_space, base, last_address) { + managed_range_last = managed_range; // If we didn't split the ends, check that they match - if (va_range->node.start < base || va_range->node.end > last_address) - UVM_ASSERT(uvm_processor_mask_test(&uvm_va_range_get_policy(va_range)->accessed_by, + if (managed_range->va_range.node.start < base || managed_range->va_range.node.end > last_address) + UVM_ASSERT(uvm_processor_mask_test(&managed_range->policy.accessed_by, processor_id) == set_bit); if (set_bit) { - status = uvm_va_range_set_accessed_by(va_range, processor_id, mm, &local_tracker); + status = uvm_va_range_set_accessed_by(managed_range, processor_id, mm, &local_tracker); if (status != NV_OK) goto done; } else { - uvm_va_range_unset_accessed_by(va_range, processor_id, &local_tracker); + uvm_va_range_unset_accessed_by(managed_range, processor_id, &local_tracker); } } - UVM_ASSERT(va_range_last); - UVM_ASSERT(va_range_last->node.end >= last_address); + UVM_ASSERT(managed_range_last); + UVM_ASSERT(managed_range_last->va_range.node.end >= last_address); } else { // NULL mm case already filtered by uvm_api_range_type_check() @@ -672,7 +682,7 @@ static NV_STATUS va_block_set_read_duplication_locked(uvm_va_block_t *va_block, uvm_assert_mutex_locked(&va_block->lock); // Force CPU page residency to be on the preferred NUMA node. - va_block_context->make_resident.dest_nid = uvm_va_range_get_policy(va_block->va_range)->preferred_nid; + va_block_context->make_resident.dest_nid = va_block->managed_range->policy.preferred_nid; for_each_id_in_mask(src_id, &va_block->resident) { NV_STATUS status; @@ -721,7 +731,7 @@ static NV_STATUS va_block_unset_read_duplication_locked(uvm_va_block_t *va_block uvm_processor_id_t processor_id; uvm_va_block_region_t block_region = uvm_va_block_region_from_block(va_block); uvm_page_mask_t *break_read_duplication_pages = &va_block_context->caller_page_mask; - const uvm_va_policy_t *policy = uvm_va_range_get_policy(va_block->va_range); + const uvm_va_policy_t *policy = &va_block->managed_range->policy; uvm_processor_id_t preferred_location = policy->preferred_location; uvm_assert_mutex_locked(&va_block->lock); @@ -863,15 +873,15 @@ static NV_STATUS read_duplication_set(uvm_va_space_t *va_space, NvU64 base, NvU6 goto done; if (type == UVM_API_RANGE_TYPE_MANAGED) { - uvm_va_range_t *va_range; - uvm_va_range_t *va_range_last = NULL; + uvm_va_range_managed_t *managed_range; + uvm_va_range_managed_t *managed_range_last = NULL; - uvm_for_each_managed_va_range_in_contig(va_range, va_space, base, last_address) { - va_range_last = va_range; + uvm_for_each_va_range_managed_in_contig(managed_range, va_space, base, last_address) { + managed_range_last = managed_range; // If we didn't split the ends, check that they match - if (va_range->node.start < base || va_range->node.end > last_address) - UVM_ASSERT(uvm_va_range_get_policy(va_range)->read_duplication == new_policy); + if (managed_range->va_range.node.start < base || managed_range->va_range.node.end > last_address) + UVM_ASSERT(managed_range->policy.read_duplication == new_policy); // If the va_space cannot currently read duplicate, only change the user // state. All memory should already have read duplication unset. @@ -879,22 +889,22 @@ static NV_STATUS read_duplication_set(uvm_va_space_t *va_space, NvU64 base, NvU6 // Handle SetAccessedBy mappings if (new_policy == UVM_READ_DUPLICATION_ENABLED) { - status = uvm_va_range_set_read_duplication(va_range, mm); + status = uvm_va_range_set_read_duplication(managed_range, mm); if (status != NV_OK) goto done; } else { // If unsetting read duplication fails, the return status is // not propagated back to the caller - (void)uvm_va_range_unset_read_duplication(va_range, mm); + (void)uvm_va_range_unset_read_duplication(managed_range, mm); } } - uvm_va_range_get_policy(va_range)->read_duplication = new_policy; + managed_range->policy.read_duplication = new_policy; } - UVM_ASSERT(va_range_last); - UVM_ASSERT(va_range_last->node.end >= last_address); + UVM_ASSERT(managed_range_last); + UVM_ASSERT(managed_range_last->va_range.node.end >= last_address); } else { UVM_ASSERT(type == UVM_API_RANGE_TYPE_HMM); @@ -947,19 +957,16 @@ static NV_STATUS system_wide_atomics_set(uvm_va_space_t *va_space, const NvProce already_enabled = uvm_processor_mask_test(&va_space->system_wide_atomics_enabled_processors, gpu->id); if (enable && !already_enabled) { - uvm_va_range_t *va_range; + uvm_va_range_managed_t *managed_range; uvm_tracker_t local_tracker = UVM_TRACKER_INIT(); uvm_va_block_context_t *va_block_context = uvm_va_space_block_context(va_space, NULL); NV_STATUS tracker_status; // Revoke atomic mappings from the calling GPU - uvm_for_each_va_range(va_range, va_space) { + uvm_for_each_va_range_managed(managed_range, va_space) { uvm_va_block_t *va_block; - if (va_range->type != UVM_VA_RANGE_TYPE_MANAGED) - continue; - - for_each_va_block_in_va_range(va_range, va_block) { + for_each_va_block_in_va_range(managed_range, va_block) { uvm_page_mask_t *non_resident_pages = &va_block_context->caller_page_mask; uvm_mutex_lock(&va_block->lock); diff --git a/kernel-open/nvidia-uvm/uvm_processors.c b/kernel-open/nvidia-uvm/uvm_processors.c index 8308151473..55b647e8af 100644 --- a/kernel-open/nvidia-uvm/uvm_processors.c +++ b/kernel-open/nvidia-uvm/uvm_processors.c @@ -23,6 +23,8 @@ #include "uvm_linux.h" #include "uvm_processors.h" +#include "uvm_global.h" +#include "uvm_gpu.h" static struct kmem_cache *g_uvm_processor_mask_cache __read_mostly; const uvm_processor_mask_t g_uvm_processor_mask_cpu = { .bitmap = { 1 << UVM_PARENT_ID_CPU_VALUE }}; @@ -107,3 +109,31 @@ bool uvm_numa_id_eq(int nid0, int nid1) return nid0 == nid1; } + +const char *uvm_processor_get_name(uvm_processor_id_t id) +{ + if (UVM_ID_IS_CPU(id)) + return "0: CPU"; + else + return uvm_gpu_name(uvm_gpu_get(id)); +} + +void uvm_processor_get_uuid(uvm_processor_id_t id, NvProcessorUuid *out_uuid) +{ + if (UVM_ID_IS_CPU(id)) { + memcpy(out_uuid, &NV_PROCESSOR_UUID_CPU_DEFAULT, sizeof(*out_uuid)); + } + else { + uvm_gpu_t *gpu = uvm_gpu_get(id); + UVM_ASSERT(gpu); + memcpy(out_uuid, &gpu->uuid, sizeof(*out_uuid)); + } +} + +bool uvm_processor_has_memory(uvm_processor_id_t id) +{ + if (UVM_ID_IS_CPU(id)) + return true; + + return uvm_gpu_get(id)->mem_info.size > 0; +} diff --git a/kernel-open/nvidia-uvm/uvm_processors.h b/kernel-open/nvidia-uvm/uvm_processors.h index beb8a2e44b..31f319fa2f 100644 --- a/kernel-open/nvidia-uvm/uvm_processors.h +++ b/kernel-open/nvidia-uvm/uvm_processors.h @@ -176,6 +176,13 @@ static void prefix_fn_mask##_copy(mask_t *dst, const mask_t *src) bitmap_copy(dst->bitmap, src->bitmap, (maxval)); \ } \ \ +static void prefix_fn_mask##_range_fill(mask_t *mask, proc_id_t start, NvU32 nbits) \ +{ \ + UVM_ASSERT_MSG(start.val + nbits <= (maxval), "start %u nbits %u\n", start.val, nbits); \ + \ + bitmap_set(mask->bitmap, start.val, nbits); \ +} \ + \ static bool prefix_fn_mask##_and(mask_t *dst, const mask_t *src1, const mask_t *src2) \ { \ return bitmap_and(dst->bitmap, src1->bitmap, src2->bitmap, (maxval)) != 0; \ @@ -276,6 +283,12 @@ typedef uvm_processor_id_t uvm_gpu_id_t; // Maximum number of GPUs/processors that can be represented with the id types #define UVM_PARENT_ID_MAX_GPUS NV_MAX_DEVICES #define UVM_PARENT_ID_MAX_PROCESSORS (UVM_PARENT_ID_MAX_GPUS + 1) +#define UVM_MAX_UNIQUE_PARENT_GPU_PAIRS SUM_FROM_0_TO_N(UVM_PARENT_ID_MAX_GPUS - 1) + +// Note that this is the number of MIG instance pairs between two different +// parent GPUs so parent A sub-processor ID 0 to parent B sub-processor ID 0 +// is valid. +#define UVM_MAX_UNIQUE_SUB_PROCESSOR_PAIRS SUM_FROM_0_TO_N(UVM_PARENT_ID_MAX_SUB_PROCESSORS) #define UVM_ID_MAX_GPUS (UVM_PARENT_ID_MAX_GPUS * UVM_PARENT_ID_MAX_SUB_PROCESSORS) #define UVM_ID_MAX_PROCESSORS (UVM_ID_MAX_GPUS + 1) @@ -711,4 +724,16 @@ void uvm_processor_mask_cache_exit(void); uvm_processor_mask_t *uvm_processor_mask_cache_alloc(void); void uvm_processor_mask_cache_free(uvm_processor_mask_t *mask); +// Return the name of the given processor ID. +// Locking: This should only be called when the ID is the CPU or the GPU is +// retained (such as the va_space lock being held). +const char *uvm_processor_get_name(uvm_processor_id_t id); + +// Return the UUID in 'out_uuid' for the given processor ID 'id'. +// Locking: This should only be called when the ID is the CPU or the GPU is +// retained (such as the va_space lock being held). +void uvm_processor_get_uuid(uvm_processor_id_t id, NvProcessorUuid *out_uuid); + +bool uvm_processor_has_memory(uvm_processor_id_t id); + #endif diff --git a/kernel-open/nvidia-uvm/uvm_push.h b/kernel-open/nvidia-uvm/uvm_push.h index e246cbe127..d5035944ef 100644 --- a/kernel-open/nvidia-uvm/uvm_push.h +++ b/kernel-open/nvidia-uvm/uvm_push.h @@ -65,11 +65,17 @@ typedef enum } uvm_push_flag_t; struct uvm_push_crypto_bundle_struct { - // Initialization vector used to decrypt the push + // Initialization vector used to decrypt the push on the CPU UvmCslIv iv; + // Key version used to decrypt the push on the CPU + NvU32 key_version; + // Size of the pushbuffer that is encrypted/decrypted NvU32 push_size; + + // Auth tag location for push decryption of updated push + void *auth_tag; }; struct uvm_push_struct diff --git a/kernel-open/nvidia-uvm/uvm_pushbuffer.c b/kernel-open/nvidia-uvm/uvm_pushbuffer.c index 01abcdd110..73ad458f94 100644 --- a/kernel-open/nvidia-uvm/uvm_pushbuffer.c +++ b/kernel-open/nvidia-uvm/uvm_pushbuffer.c @@ -451,8 +451,6 @@ static uvm_pushbuffer_chunk_t *gpfifo_to_chunk(uvm_pushbuffer_t *pushbuffer, uvm static void decrypt_push(uvm_channel_t *channel, uvm_gpfifo_entry_t *gpfifo) { NV_STATUS status; - NvU32 auth_tag_offset; - void *auth_tag_cpu_va; void *push_protected_cpu_va; void *push_unprotected_cpu_va; NvU32 pushbuffer_offset = gpfifo->pushbuffer_offset; @@ -470,18 +468,16 @@ static void decrypt_push(uvm_channel_t *channel, uvm_gpfifo_entry_t *gpfifo) UVM_ASSERT(!uvm_channel_is_wlc(channel)); UVM_ASSERT(!uvm_channel_is_lcic(channel)); - push_protected_cpu_va = (char *)get_base_cpu_va(pushbuffer) + pushbuffer_offset; + push_protected_cpu_va = get_base_cpu_va(pushbuffer) + pushbuffer_offset; push_unprotected_cpu_va = (char *)uvm_rm_mem_get_cpu_va(pushbuffer->memory_unprotected_sysmem) + pushbuffer_offset; - auth_tag_offset = push_info_index * UVM_CONF_COMPUTING_AUTH_TAG_SIZE; - auth_tag_cpu_va = (char *)uvm_rm_mem_get_cpu_va(channel->conf_computing.push_crypto_bundle_auth_tags) + - auth_tag_offset; status = uvm_conf_computing_cpu_decrypt(channel, push_protected_cpu_va, push_unprotected_cpu_va, &crypto_bundle->iv, + crypto_bundle->key_version, crypto_bundle->push_size, - auth_tag_cpu_va); + crypto_bundle->auth_tag); // A decryption failure here is not fatal because it does not // prevent UVM from running fine in the future and cannot be used @@ -558,7 +554,7 @@ NvU64 uvm_pushbuffer_get_gpu_va_for_push(uvm_pushbuffer_t *pushbuffer, uvm_push_ if (uvm_channel_is_wlc(push->channel) || uvm_channel_is_lcic(push->channel)) { // We need to use the same static locations for PB as the fixed // schedule because that's what the channels are initialized to use. - return uvm_rm_mem_get_gpu_uvm_va(push->channel->conf_computing.static_pb_protected_vidmem, gpu); + return uvm_channel_get_static_pb_protected_vidmem_gpu_va(push->channel); } else if (uvm_channel_is_sec2(push->channel)) { // SEC2 PBs are in unprotected sysmem @@ -575,7 +571,7 @@ void *uvm_pushbuffer_get_unprotected_cpu_va_for_push(uvm_pushbuffer_t *pushbuffe if (uvm_channel_is_wlc(push->channel)) { // Reuse existing WLC static pb for initialization UVM_ASSERT(!uvm_channel_manager_is_wlc_ready(push->channel->pool->manager)); - return push->channel->conf_computing.static_pb_unprotected_sysmem_cpu; + return uvm_channel_get_static_pb_unprotected_sysmem_cpu(push->channel); } pushbuffer_base = uvm_rm_mem_get_cpu_va(pushbuffer->memory_unprotected_sysmem); @@ -590,8 +586,8 @@ NvU64 uvm_pushbuffer_get_unprotected_gpu_va_for_push(uvm_pushbuffer_t *pushbuffe if (uvm_channel_is_wlc(push->channel)) { // Reuse existing WLC static pb for initialization UVM_ASSERT(!uvm_channel_manager_is_wlc_ready(push->channel->pool->manager)); - return uvm_rm_mem_get_gpu_uvm_va(push->channel->conf_computing.static_pb_unprotected_sysmem, - uvm_push_get_gpu(push)); + + return uvm_channel_get_static_pb_unprotected_sysmem_gpu_va(push->channel); } pushbuffer_base = uvm_rm_mem_get_gpu_uvm_va(pushbuffer->memory_unprotected_sysmem, uvm_push_get_gpu(push)); diff --git a/kernel-open/nvidia-uvm/uvm_range_group.c b/kernel-open/nvidia-uvm/uvm_range_group.c index 3458b778f9..68281f693e 100644 --- a/kernel-open/nvidia-uvm/uvm_range_group.c +++ b/kernel-open/nvidia-uvm/uvm_range_group.c @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2015-2022 NVIDIA Corporation + Copyright (c) 2015-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -172,7 +172,7 @@ void uvm_range_group_radix_tree_destroy(uvm_va_space_t *va_space) } } -static NV_STATUS uvm_range_group_va_range_migrate_block_locked(uvm_va_range_t *va_range, +static NV_STATUS uvm_range_group_va_range_migrate_block_locked(uvm_va_range_managed_t *managed_range, uvm_va_block_t *va_block, uvm_va_block_retry_t *va_block_retry, uvm_va_block_context_t *va_block_context, @@ -183,8 +183,7 @@ static NV_STATUS uvm_range_group_va_range_migrate_block_locked(uvm_va_range_t *v NV_STATUS tracker_status; uvm_gpu_id_t gpu_id; uvm_processor_mask_t *map_mask = &va_block_context->caller_processor_mask; - uvm_va_policy_t *policy = uvm_va_range_get_policy(va_range); - + uvm_va_policy_t *policy = &managed_range->policy; // Set the migration CPU NUMA node from the policy. va_block_context->make_resident.dest_nid = policy->preferred_nid; @@ -192,7 +191,7 @@ static NV_STATUS uvm_range_group_va_range_migrate_block_locked(uvm_va_range_t *v status = uvm_va_block_unmap(va_block, va_block_context, UVM_ID_CPU, region, NULL, NULL); UVM_ASSERT(status == NV_OK); - if (uvm_va_policy_is_read_duplicate(uvm_va_range_get_policy(va_range), va_range->va_space)) { + if (uvm_va_policy_is_read_duplicate(&managed_range->policy, managed_range->va_range.va_space)) { status = uvm_va_block_make_resident_read_duplicate(va_block, va_block_retry, va_block_context, @@ -220,7 +219,7 @@ static NV_STATUS uvm_range_group_va_range_migrate_block_locked(uvm_va_range_t *v // RWA permission status = uvm_va_block_map_mask(va_block, va_block_context, - &va_range->uvm_lite_gpus, + &managed_range->va_range.uvm_lite_gpus, region, NULL, UVM_PROT_READ_WRITE_ATOMIC, @@ -230,9 +229,9 @@ static NV_STATUS uvm_range_group_va_range_migrate_block_locked(uvm_va_range_t *v // 2- Map faultable SetAccessedBy GPUs. uvm_processor_mask_and(map_mask, - &uvm_va_range_get_policy(va_range)->accessed_by, - &va_range->va_space->can_access[uvm_id_value(policy->preferred_location)]); - uvm_processor_mask_andnot(map_mask, map_mask, &va_range->uvm_lite_gpus); + &managed_range->policy.accessed_by, + &managed_range->va_range.va_space->can_access[uvm_id_value(policy->preferred_location)]); + uvm_processor_mask_andnot(map_mask, map_mask, &managed_range->va_range.uvm_lite_gpus); for_each_gpu_id_in_mask(gpu_id, map_mask) { status = uvm_va_block_add_mappings(va_block, @@ -251,7 +250,7 @@ static NV_STATUS uvm_range_group_va_range_migrate_block_locked(uvm_va_range_t *v return status == NV_OK ? tracker_status : status; } -NV_STATUS uvm_range_group_va_range_migrate(uvm_va_range_t *va_range, +NV_STATUS uvm_range_group_va_range_migrate(uvm_va_range_managed_t *managed_range, NvU64 start, NvU64 end, uvm_tracker_t *out_tracker) @@ -268,12 +267,12 @@ NV_STATUS uvm_range_group_va_range_migrate(uvm_va_range_t *va_range, if (!va_block_context) return NV_ERR_NO_MEMORY; - uvm_assert_rwsem_locked(&va_range->va_space->lock); + uvm_assert_rwsem_locked(&managed_range->va_range.va_space->lock); // Iterate over blocks, populating them if necessary - for (i = uvm_va_range_block_index(va_range, start); i <= uvm_va_range_block_index(va_range, end); ++i) { + for (i = uvm_va_range_block_index(managed_range, start); i <= uvm_va_range_block_index(managed_range, end); ++i) { uvm_va_block_region_t region; - status = uvm_va_range_block_create(va_range, i, &va_block); + status = uvm_va_range_block_create(managed_range, i, &va_block); if (status != NV_OK) break; @@ -282,7 +281,7 @@ NV_STATUS uvm_range_group_va_range_migrate(uvm_va_range_t *va_range, min(end, va_block->end)); status = UVM_VA_BLOCK_LOCK_RETRY(va_block, &va_block_retry, - uvm_range_group_va_range_migrate_block_locked(va_range, + uvm_range_group_va_range_migrate_block_locked(managed_range, va_block, &va_block_retry, va_block_context, @@ -301,7 +300,7 @@ NV_STATUS uvm_api_set_range_group(UVM_SET_RANGE_GROUP_PARAMS *params, struct fil { uvm_va_space_t *va_space = uvm_va_space_get(filp); uvm_range_group_t *range_group = NULL; - uvm_va_range_t *va_range, *va_range_last; + uvm_va_range_managed_t *managed_range, *managed_range_last; unsigned long long last_address = params->requestedBase + params->length - 1; uvm_tracker_t local_tracker; NV_STATUS tracker_status; @@ -327,20 +326,20 @@ NV_STATUS uvm_api_set_range_group(UVM_SET_RANGE_GROUP_PARAMS *params, struct fil goto done; } - // If the desired range group is not migratable, any overlapping va_ranges - // must have a preferred location + // If the desired range group is not migratable, any overlapping managed + // ranges must have a preferred location migratable = uvm_range_group_migratable(range_group); - va_range_last = NULL; - uvm_for_each_managed_va_range_in_contig(va_range, va_space, params->requestedBase, last_address) { - va_range_last = va_range; - if (!migratable && UVM_ID_IS_INVALID(uvm_va_range_get_policy(va_range)->preferred_location)) { + managed_range_last = NULL; + uvm_for_each_va_range_managed_in_contig(managed_range, va_space, params->requestedBase, last_address) { + managed_range_last = managed_range; + if (!migratable && UVM_ID_IS_INVALID(managed_range->policy.preferred_location)) { status = NV_ERR_INVALID_ADDRESS; goto done; } } // Check that we were able to iterate over the entire range without any gaps - if (!va_range_last || va_range_last->node.end < last_address) { + if (!managed_range_last || managed_range_last->va_range.node.end < last_address) { status = NV_ERR_INVALID_ADDRESS; goto done; } @@ -357,10 +356,10 @@ NV_STATUS uvm_api_set_range_group(UVM_SET_RANGE_GROUP_PARAMS *params, struct fil has_va_space_write_lock = false; // Already checked for gaps above - uvm_for_each_va_range_in(va_range, va_space, params->requestedBase, last_address) { - status = uvm_range_group_va_range_migrate(va_range, - max(va_range->node.start, params->requestedBase), - min(va_range->node.end, last_address), + uvm_for_each_va_range_managed_in(managed_range, va_space, params->requestedBase, last_address) { + status = uvm_range_group_va_range_migrate(managed_range, + max(managed_range->va_range.node.start, params->requestedBase), + min(managed_range->va_range.node.end, last_address), &local_tracker); if (status != NV_OK) goto done; @@ -381,7 +380,7 @@ static NV_STATUS uvm_range_group_prevent_migration(uvm_range_group_t *range_grou uvm_va_space_t *va_space) { uvm_range_group_range_t *rgr = NULL; - uvm_va_range_t *va_range; + uvm_va_range_managed_t *managed_range; uvm_processor_id_t preferred_location; uvm_tracker_t local_tracker = UVM_TRACKER_INIT(); NV_STATUS tracker_status; @@ -413,10 +412,10 @@ static NV_STATUS uvm_range_group_prevent_migration(uvm_range_group_t *range_grou if (!rgr) break; - uvm_for_each_va_range_in(va_range, va_space, rgr->node.start, rgr->node.end) { - // VA ranges need to have a preferred location set in order for their - // range group to be set to non-migratable. - preferred_location = uvm_va_range_get_policy(va_range)->preferred_location; + uvm_for_each_va_range_managed_in(managed_range, va_space, rgr->node.start, rgr->node.end) { + // Managed ranges need to have a preferred location set in order for + // their range group to be set to non-migratable. + preferred_location = managed_range->policy.preferred_location; if (UVM_ID_IS_INVALID(preferred_location)) { status = NV_ERR_INVALID_ARGUMENT; goto done; @@ -432,16 +431,16 @@ static NV_STATUS uvm_range_group_prevent_migration(uvm_range_group_t *range_grou // Check that all UVM-Lite GPUs are able to access the // preferred location - if (!uvm_processor_mask_subset(&va_range->uvm_lite_gpus, + if (!uvm_processor_mask_subset(&managed_range->va_range.uvm_lite_gpus, &va_space->accessible_from[uvm_id_value(preferred_location)])) { status = NV_ERR_INVALID_DEVICE; goto done; } - // Perform the migration of the VA range. - status = uvm_range_group_va_range_migrate(va_range, - max(va_range->node.start, rgr->node.start), - min(va_range->node.end, rgr->node.end), + // Perform the migration of the managed range. + status = uvm_range_group_va_range_migrate(managed_range, + max(managed_range->va_range.node.start, rgr->node.start), + min(managed_range->va_range.node.end, rgr->node.end), &local_tracker); if (status != NV_OK) goto done; diff --git a/kernel-open/nvidia-uvm/uvm_range_group.h b/kernel-open/nvidia-uvm/uvm_range_group.h index 4a053ec37c..fcdba2266d 100644 --- a/kernel-open/nvidia-uvm/uvm_range_group.h +++ b/kernel-open/nvidia-uvm/uvm_range_group.h @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2015 NVIDIA Corporation + Copyright (c) 2015-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -173,7 +173,7 @@ void uvm_range_group_radix_tree_destroy(uvm_va_space_t *va_space); // // This does not wait for the migration to complete. The work is added to the // output tracker. -NV_STATUS uvm_range_group_va_range_migrate(uvm_va_range_t *va_range, +NV_STATUS uvm_range_group_va_range_migrate(uvm_va_range_managed_t *managed_range, NvU64 start, NvU64 end, uvm_tracker_t *out_tracker); diff --git a/kernel-open/nvidia-uvm/uvm_sec2_test.c b/kernel-open/nvidia-uvm/uvm_sec2_test.c index 3ed075729d..c610dd961c 100644 --- a/kernel-open/nvidia-uvm/uvm_sec2_test.c +++ b/kernel-open/nvidia-uvm/uvm_sec2_test.c @@ -322,6 +322,7 @@ static NV_STATUS cpu_decrypt(uvm_channel_t *channel, uvm_mem_t *dst_mem, uvm_mem_t *src_mem, UvmCslIv *decrypt_iv, + NvU32 key_version, uvm_mem_t *auth_tag_mem, size_t size, size_t copy_size) @@ -338,6 +339,7 @@ static NV_STATUS cpu_decrypt(uvm_channel_t *channel, dst_plain, src_cipher, &decrypt_iv[i], + key_version, copy_size, auth_tag_buffer)); @@ -368,7 +370,7 @@ static void gpu_encrypt(uvm_push_t *push, uvm_gpu_address_t auth_tag_address = uvm_mem_gpu_address_virtual_kernel(auth_tag_mem, gpu); for (i = 0; i < num_iterations; i++) { - uvm_conf_computing_log_gpu_encryption(push->channel, decrypt_iv); + uvm_conf_computing_log_gpu_encryption(push->channel, copy_size, decrypt_iv); if (i > 0) uvm_push_set_flag(push, UVM_PUSH_FLAG_CE_NEXT_PIPELINED); @@ -427,6 +429,7 @@ static NV_STATUS test_cpu_to_gpu_roundtrip(uvm_gpu_t *gpu, size_t copy_size, siz size_t auth_tag_buffer_size = (size / copy_size) * UVM_CONF_COMPUTING_AUTH_TAG_SIZE; uvm_push_t push; UvmCslIv *decrypt_iv; + NvU32 key_version; decrypt_iv = uvm_kvmalloc_zero((size / copy_size) * sizeof(UvmCslIv)); if (!decrypt_iv) @@ -456,6 +459,11 @@ static NV_STATUS test_cpu_to_gpu_roundtrip(uvm_gpu_t *gpu, size_t copy_size, siz gpu_encrypt(&push, dst_cipher, dst_plain, decrypt_iv, auth_tag_mem, size, copy_size); + // There shouldn't be any key rotation between the end of the push and the + // CPU decryption(s), but it is more robust against test changes to force + // decryption to use the saved key. + key_version = uvm_channel_pool_key_version(push.channel->pool); + TEST_NV_CHECK_GOTO(uvm_push_end_and_wait(&push), out); TEST_CHECK_GOTO(!mem_match(src_plain, src_cipher), out); @@ -465,6 +473,7 @@ static NV_STATUS test_cpu_to_gpu_roundtrip(uvm_gpu_t *gpu, size_t copy_size, siz dst_plain_cpu, dst_cipher, decrypt_iv, + key_version, auth_tag_mem, size, copy_size), diff --git a/kernel-open/nvidia-uvm/uvm_test.c b/kernel-open/nvidia-uvm/uvm_test.c index 50e0b22c58..e6f25209ab 100644 --- a/kernel-open/nvidia-uvm/uvm_test.c +++ b/kernel-open/nvidia-uvm/uvm_test.c @@ -67,9 +67,8 @@ static NV_STATUS uvm_test_peer_ref_count(UVM_TEST_PEER_REF_COUNT_PARAMS *params, gpu0 = uvm_gpu_get_by_uuid(¶ms->gpu_uuid_1); gpu1 = uvm_gpu_get_by_uuid(¶ms->gpu_uuid_2); - if (gpu0 != NULL && gpu1 != NULL) { - uvm_gpu_peer_t *peer_caps = uvm_gpu_peer_caps(gpu0, gpu1); - registered_ref_count = peer_caps->ref_count; + if (gpu0 && gpu1 && !uvm_gpus_are_smc_peers(gpu0, gpu1)) { + registered_ref_count = uvm_gpu_peer_ref_count(gpu0, gpu1); } else { status = NV_ERR_INVALID_DEVICE; @@ -309,6 +308,7 @@ long uvm_test_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) UVM_ROUTE_CMD_STACK_INIT_CHECK(UVM_TEST_VA_SPACE_ALLOW_MOVABLE_ALLOCATIONS, uvm_test_va_space_allow_movable_allocations); UVM_ROUTE_CMD_STACK_INIT_CHECK(UVM_TEST_SKIP_MIGRATE_VMA, uvm_test_skip_migrate_vma); + UVM_ROUTE_CMD_STACK_INIT_CHECK(UVM_TEST_INJECT_TOOLS_EVENT_V2, uvm_test_inject_tools_event_v2); } return -EINVAL; diff --git a/kernel-open/nvidia-uvm/uvm_test_ioctl.h b/kernel-open/nvidia-uvm/uvm_test_ioctl.h index b79b815ca8..c31cc564b1 100644 --- a/kernel-open/nvidia-uvm/uvm_test_ioctl.h +++ b/kernel-open/nvidia-uvm/uvm_test_ioctl.h @@ -145,6 +145,7 @@ typedef enum UVM_TEST_VA_RANGE_TYPE_CHANNEL, UVM_TEST_VA_RANGE_TYPE_SKED_REFLECTED, UVM_TEST_VA_RANGE_TYPE_SEMAPHORE_POOL, + UVM_TEST_VA_RANGE_TYPE_DEVICE_P2P, UVM_TEST_VA_RANGE_TYPE_MAX } UVM_TEST_VA_RANGE_TYPE; @@ -347,20 +348,30 @@ typedef enum UVM_TEST_CHANNEL_STRESS_MODE_NOOP_PUSH = 0, UVM_TEST_CHANNEL_STRESS_MODE_UPDATE_CHANNELS, UVM_TEST_CHANNEL_STRESS_MODE_STREAM, + UVM_TEST_CHANNEL_STRESS_MODE_KEY_ROTATION, } UVM_TEST_CHANNEL_STRESS_MODE; +typedef enum +{ + UVM_TEST_CHANNEL_STRESS_KEY_ROTATION_OPERATION_CPU_TO_GPU, + UVM_TEST_CHANNEL_STRESS_KEY_ROTATION_OPERATION_GPU_TO_CPU, + UVM_TEST_CHANNEL_STRESS_KEY_ROTATION_OPERATION_ROTATE, +} UVM_TEST_CHANNEL_STRESS_KEY_ROTATION_OPERATION; + #define UVM_TEST_CHANNEL_STRESS UVM_TEST_IOCTL_BASE(15) typedef struct { - NvU32 mode; // In + NvU32 mode; // In, one of UVM_TEST_CHANNEL_STRESS_MODE // Number of iterations: // mode == NOOP_PUSH: number of noop pushes // mode == UPDATE_CHANNELS: number of updates // mode == STREAM: number of iterations per stream + // mode == ROTATION: number of operations NvU32 iterations; - NvU32 num_streams; // In, used only for mode == UVM_TEST_CHANNEL_STRESS_MODE_STREAM + NvU32 num_streams; // In, used only if mode == STREAM + NvU32 key_rotation_operation; // In, used only if mode == ROTATION NvU32 seed; // In NvU32 verbose; // In NV_STATUS rmStatus; // Out @@ -504,12 +515,7 @@ typedef struct typedef struct { // In params - union - { - UvmEventEntry_V1 entry_v1; // contains only NvUxx types - UvmEventEntry_V2 entry_v2; // contains only NvUxx types - }; - NvU32 version; + UvmEventEntry entry; // contains only NvUxx types NvU32 count; // Out param @@ -1462,6 +1468,17 @@ typedef struct NV_STATUS rmStatus; // Out } UVM_TEST_SKIP_MIGRATE_VMA_PARAMS; +#define UVM_TEST_INJECT_TOOLS_EVENT_V2 UVM_TEST_IOCTL_BASE(104) +typedef struct +{ + // In params + UvmEventEntry_V2 entry_v2; // contains only NvUxx types + NvU32 count; + + // Out param + NV_STATUS rmStatus; +} UVM_TEST_INJECT_TOOLS_EVENT_V2_PARAMS; + #ifdef __cplusplus } #endif diff --git a/kernel-open/nvidia-uvm/uvm_tools.c b/kernel-open/nvidia-uvm/uvm_tools.c index 00042debaf..46441e1f28 100644 --- a/kernel-open/nvidia-uvm/uvm_tools.c +++ b/kernel-open/nvidia-uvm/uvm_tools.c @@ -85,7 +85,7 @@ typedef struct // private_data for /dev/nvidia-uvm-tools typedef struct { - NvU32 version; + size_t entry_size; bool is_queue; struct file *uvm_file; union @@ -113,7 +113,9 @@ typedef struct { nv_kthread_q_item_t queue_item; uvm_processor_id_t dst; + NvS16 dst_nid; uvm_processor_id_t src; + NvS16 src_nid; uvm_va_space_t *va_space; uvm_channel_t *channel; @@ -393,10 +395,7 @@ static void destroy_event_tracker(uvm_tools_event_tracker_t *event_tracker) uvm_tools_queue_t *queue = &event_tracker->queue; NvU64 buffer_size; - if (event_tracker->version == UvmToolsEventQueueVersion_V1) - buffer_size = queue->queue_buffer_count * sizeof(UvmEventEntry_V1); - else - buffer_size = queue->queue_buffer_count * sizeof(UvmEventEntry_V2); + buffer_size = queue->queue_buffer_count * event_tracker->entry_size; remove_event_tracker(va_space, queue->queue_nodes, @@ -442,6 +441,7 @@ static void destroy_event_tracker(uvm_tools_event_tracker_t *event_tracker) fput(event_tracker->uvm_file); } + kmem_cache_free(g_tools_event_tracker_cache, event_tracker); } @@ -498,20 +498,7 @@ static void enqueue_event(const void *entry, size_t entry_size, NvU8 eventType, uvm_spin_unlock(&queue->lock); } -static void enqueue_event_v1(const UvmEventEntry_V1 *entry, uvm_tools_queue_t *queue) -{ - enqueue_event(entry, sizeof(*entry), entry->eventData.eventType, queue); -} - -static void enqueue_event_v2(const UvmEventEntry_V2 *entry, uvm_tools_queue_t *queue) -{ - enqueue_event(entry, sizeof(*entry), entry->eventData.eventType, queue); -} - -static void uvm_tools_record_event(struct list_head *head, - const void *entry, - size_t entry_size, - NvU8 eventType) +static void uvm_tools_enqueue_event(struct list_head *head, const void *entry, size_t entry_size, NvU8 eventType) { uvm_tools_queue_t *queue; @@ -521,13 +508,13 @@ static void uvm_tools_record_event(struct list_head *head, enqueue_event(entry, entry_size, eventType, queue); } -static void uvm_tools_record_event_v1(uvm_va_space_t *va_space, const UvmEventEntry_V1 *entry) +static void uvm_tools_record_event(uvm_va_space_t *va_space, const UvmEventEntry *entry) { NvU8 eventType = entry->eventData.eventType; uvm_assert_rwsem_locked(&va_space->tools.lock); - uvm_tools_record_event(va_space->tools.queues_v1, entry, sizeof(*entry), eventType); + uvm_tools_enqueue_event(va_space->tools.queues, entry, sizeof(*entry), eventType); } static void uvm_tools_record_event_v2(uvm_va_space_t *va_space, const UvmEventEntry_V2 *entry) @@ -536,7 +523,7 @@ static void uvm_tools_record_event_v2(uvm_va_space_t *va_space, const UvmEventEn uvm_assert_rwsem_locked(&va_space->tools.lock); - uvm_tools_record_event(va_space->tools.queues_v2, entry, sizeof(*entry), eventType); + uvm_tools_enqueue_event(va_space->tools.queues_v2, entry, sizeof(*entry), eventType); } static bool counter_matches_processor(UvmCounterName counter, const NvProcessorUuid *processor) @@ -583,31 +570,31 @@ static bool tools_is_counter_enabled(uvm_va_space_t *va_space, UvmCounterName co uvm_assert_rwsem_locked(&va_space->tools.lock); UVM_ASSERT(counter < UVM_TOTAL_COUNTERS); + return !list_empty(va_space->tools.counters + counter); } -static bool tools_is_event_enabled_version(uvm_va_space_t *va_space, - UvmEventType event, - UvmToolsEventQueueVersion version) +static bool tools_is_event_enabled_v1(uvm_va_space_t *va_space, UvmEventType event) { uvm_assert_rwsem_locked(&va_space->tools.lock); UVM_ASSERT(event < UvmEventNumTypesAll); - if (version == UvmToolsEventQueueVersion_V1) - return !list_empty(va_space->tools.queues_v1 + event); - else - return !list_empty(va_space->tools.queues_v2 + event); + return !list_empty(va_space->tools.queues + event); } -static bool tools_is_event_enabled(uvm_va_space_t *va_space, UvmEventType event) +static bool tools_is_event_enabled_v2(uvm_va_space_t *va_space, UvmEventType event) { uvm_assert_rwsem_locked(&va_space->tools.lock); UVM_ASSERT(event < UvmEventNumTypesAll); - return !list_empty(va_space->tools.queues_v1 + event) || - !list_empty(va_space->tools.queues_v2 + event); + return !list_empty(va_space->tools.queues_v2 + event); +} + +static bool tools_is_event_enabled(uvm_va_space_t *va_space, UvmEventType event) +{ + return tools_is_event_enabled_v1(va_space, event) || tools_is_event_enabled_v2(va_space, event); } static bool tools_is_event_enabled_in_any_va_space(UvmEventType event) @@ -689,6 +676,7 @@ static long uvm_tools_unlocked_ioctl(struct file *filp, unsigned int cmd, unsign UVM_ROUTE_CMD_STACK_NO_INIT_CHECK(UVM_TOOLS_EVENT_QUEUE_DISABLE_EVENTS, uvm_api_tools_event_queue_disable_events); UVM_ROUTE_CMD_STACK_NO_INIT_CHECK(UVM_TOOLS_ENABLE_COUNTERS, uvm_api_tools_enable_counters); UVM_ROUTE_CMD_STACK_NO_INIT_CHECK(UVM_TOOLS_DISABLE_COUNTERS, uvm_api_tools_disable_counters); + UVM_ROUTE_CMD_STACK_NO_INIT_CHECK(UVM_TOOLS_INIT_EVENT_TRACKER_V2, uvm_api_tools_init_event_tracker_v2); } uvm_thread_assert_all_unlocked(); @@ -788,9 +776,9 @@ static void record_gpu_fault_instance(uvm_gpu_t *gpu, NvU64 batch_id, NvU64 timestamp) { - if (tools_is_event_enabled_version(va_space, UvmEventTypeGpuFault, UvmToolsEventQueueVersion_V1)) { - UvmEventEntry_V1 entry; - UvmEventGpuFaultInfo_V1 *info = &entry.eventData.gpuFault; + if (tools_is_event_enabled_v1(va_space, UvmEventTypeGpuFault)) { + UvmEventEntry entry; + UvmEventGpuFaultInfo *info = &entry.eventData.gpuFault; memset(&entry, 0, sizeof(entry)); info->eventType = UvmEventTypeGpuFault; @@ -808,9 +796,9 @@ static void record_gpu_fault_instance(uvm_gpu_t *gpu, info->timeStampGpu = fault_entry->timestamp; info->batchId = batch_id; - uvm_tools_record_event_v1(va_space, &entry); + uvm_tools_record_event(va_space, &entry); } - if (tools_is_event_enabled_version(va_space, UvmEventTypeGpuFault, UvmToolsEventQueueVersion_V2)) { + if (tools_is_event_enabled_v2(va_space, UvmEventTypeGpuFault)) { UvmEventEntry_V2 entry; UvmEventGpuFaultInfo_V2 *info = &entry.eventData.gpuFault; memset(&entry, 0, sizeof(entry)); @@ -848,8 +836,7 @@ static void record_cpu_fault(UvmEventCpuFaultInfo *info, uvm_perf_event_data_t * info->pid = uvm_get_stale_process_id(); info->threadId = uvm_get_stale_thread_id(); info->pc = event_data->fault.cpu.pc; - // TODO: Bug 4515381: set info->nid when we decide if it's NUMA node ID or - // CPU ID. + info->cpuId = event_data->fault.cpu.cpu_num; } static void uvm_tools_record_fault(uvm_perf_event_t event_id, uvm_perf_event_data_t *event_data) @@ -867,15 +854,15 @@ static void uvm_tools_record_fault(uvm_perf_event_t event_id, uvm_perf_event_dat UVM_ASSERT(tools_is_fault_callback_needed(va_space)); if (UVM_ID_IS_CPU(event_data->fault.proc_id)) { - if (tools_is_event_enabled_version(va_space, UvmEventTypeCpuFault, UvmToolsEventQueueVersion_V1)) { - UvmEventEntry_V1 entry; + if (tools_is_event_enabled_v1(va_space, UvmEventTypeCpuFault)) { + UvmEventEntry entry; memset(&entry, 0, sizeof(entry)); record_cpu_fault(&entry.eventData.cpuFault, event_data); - uvm_tools_record_event_v1(va_space, &entry); + uvm_tools_record_event(va_space, &entry); } - if (tools_is_event_enabled_version(va_space, UvmEventTypeCpuFault, UvmToolsEventQueueVersion_V2)) { + if (tools_is_event_enabled_v2(va_space, UvmEventTypeCpuFault)) { UvmEventEntry_V2 entry; memset(&entry, 0, sizeof(entry)); @@ -896,13 +883,13 @@ static void uvm_tools_record_fault(uvm_perf_event_t event_id, uvm_perf_event_dat preferred_location = event_data->fault.preferred_location; if (UVM_ID_IS_GPU(preferred_location)) { - uvm_gpu_t *gpu = uvm_va_space_get_gpu(va_space, preferred_location); + uvm_gpu_t *gpu = uvm_gpu_get(preferred_location); uvm_tools_inc_counter(va_space, UvmCounterNameCpuPageFaultCount, 1, &gpu->uuid); } } } else { - uvm_gpu_t *gpu = uvm_va_space_get_gpu(va_space, event_data->fault.proc_id); + uvm_gpu_t *gpu = uvm_gpu_get(event_data->fault.proc_id); UVM_ASSERT(gpu); if (tools_is_event_enabled(va_space, UvmEventTypeGpuFault)) { @@ -951,9 +938,9 @@ static void record_migration_events(void *args) UVM_ASSERT(mig->bytes > 0); list_del(&mig->events_node); - if (tools_is_event_enabled_version(va_space, UvmEventTypeMigration, UvmToolsEventQueueVersion_V1)) { - UvmEventEntry_V1 entry; - UvmEventMigrationInfo_V1 *info = &entry.eventData.migration; + if (tools_is_event_enabled_v1(va_space, UvmEventTypeMigration)) { + UvmEventEntry entry; + UvmEventMigrationInfo *info = &entry.eventData.migration; // Initialize fields that are constant throughout the whole block memset(&entry, 0, sizeof(entry)); @@ -969,10 +956,10 @@ static void record_migration_events(void *args) info->endTimeStampGpu = mig->end_timestamp_gpu; info->migrationCause = mig->cause; - uvm_tools_record_event_v1(va_space, &entry); + uvm_tools_record_event(va_space, &entry); } - if (tools_is_event_enabled_version(va_space, UvmEventTypeMigration, UvmToolsEventQueueVersion_V2)) { + if (tools_is_event_enabled_v2(va_space, UvmEventTypeMigration)) { UvmEventEntry_V2 entry; UvmEventMigrationInfo_V2 *info = &entry.eventData.migration; @@ -980,7 +967,9 @@ static void record_migration_events(void *args) memset(&entry, 0, sizeof(entry)); info->eventType = UvmEventTypeMigration; info->srcIndex = uvm_id_value(block_mig->src); + info->srcNid = block_mig->src_nid; info->dstIndex = uvm_id_value(block_mig->dst); + info->dstNid = block_mig->dst_nid; info->beginTimeStamp = block_mig->start_timestamp_cpu; info->endTimeStamp = block_mig->end_timestamp_cpu; info->rangeGroupId = block_mig->range_group_id; @@ -1039,8 +1028,8 @@ static void record_replay_event_helper(uvm_va_space_t *va_space, { uvm_down_read(&va_space->tools.lock); - if (tools_is_event_enabled_version(va_space, UvmEventTypeGpuFaultReplay, UvmToolsEventQueueVersion_V1)) { - UvmEventEntry_V1 entry; + if (tools_is_event_enabled_v1(va_space, UvmEventTypeGpuFaultReplay)) { + UvmEventEntry entry; memset(&entry, 0, sizeof(entry)); entry.eventData.gpuFaultReplay.eventType = UvmEventTypeGpuFaultReplay; @@ -1050,9 +1039,9 @@ static void record_replay_event_helper(uvm_va_space_t *va_space, entry.eventData.gpuFaultReplay.timeStamp = timestamp; entry.eventData.gpuFaultReplay.timeStampGpu = timestamp_gpu; - uvm_tools_record_event_v1(va_space, &entry); + uvm_tools_record_event(va_space, &entry); } - if (tools_is_event_enabled_version(va_space, UvmEventTypeGpuFaultReplay, UvmToolsEventQueueVersion_V2)) { + if (tools_is_event_enabled_v2(va_space, UvmEventTypeGpuFaultReplay)) { UvmEventEntry_V2 entry; memset(&entry, 0, sizeof(entry)); @@ -1138,9 +1127,9 @@ static UvmEventMigrationCause g_make_resident_to_tools_migration_cause[UVM_MAKE_ static void uvm_tools_record_migration_cpu_to_cpu(uvm_va_space_t *va_space, uvm_perf_event_data_t *event_data) { - if (tools_is_event_enabled_version(va_space, UvmEventTypeMigration, UvmToolsEventQueueVersion_V1)) { - UvmEventEntry_V1 entry; - UvmEventMigrationInfo_V1 *info = &entry.eventData.migration; + if (tools_is_event_enabled_v1(va_space, UvmEventTypeMigration)) { + UvmEventEntry entry; + UvmEventMigrationInfo *info = &entry.eventData.migration; // CPU-to-CPU migration events can be added directly to the queue. memset(&entry, 0, sizeof(entry)); @@ -1162,9 +1151,9 @@ static void uvm_tools_record_migration_cpu_to_cpu(uvm_va_space_t *va_space, info->rangeGroupId = range->range_group->id; } - uvm_tools_record_event_v1(va_space, &entry); + uvm_tools_record_event(va_space, &entry); } - if (tools_is_event_enabled_version(va_space, UvmEventTypeMigration, UvmToolsEventQueueVersion_V2)) { + if (tools_is_event_enabled_v2(va_space, UvmEventTypeMigration)) { UvmEventEntry_V2 entry; UvmEventMigrationInfo_V2 *info = &entry.eventData.migration; @@ -1245,7 +1234,7 @@ static void uvm_tools_record_migration(uvm_perf_event_t event_id, uvm_perf_event // Increment counters if (UVM_ID_IS_CPU(event_data->migration.src) && tools_is_counter_enabled(va_space, UvmCounterNameBytesXferHtD)) { - uvm_gpu_t *gpu = uvm_va_space_get_gpu(va_space, event_data->migration.dst); + uvm_gpu_t *gpu = uvm_gpu_get(event_data->migration.dst); uvm_tools_inc_counter(va_space, UvmCounterNameBytesXferHtD, event_data->migration.bytes, @@ -1253,7 +1242,7 @@ static void uvm_tools_record_migration(uvm_perf_event_t event_id, uvm_perf_event } if (UVM_ID_IS_CPU(event_data->migration.dst) && tools_is_counter_enabled(va_space, UvmCounterNameBytesXferDtH)) { - uvm_gpu_t *gpu = uvm_va_space_get_gpu(va_space, event_data->migration.src); + uvm_gpu_t *gpu = uvm_gpu_get(event_data->migration.src); uvm_tools_inc_counter(va_space, UvmCounterNameBytesXferDtH, event_data->migration.bytes, @@ -1321,9 +1310,9 @@ void uvm_tools_record_access_counter(uvm_va_space_t *va_space, { uvm_down_read(&va_space->tools.lock); - if (tools_is_event_enabled_version(va_space, UvmEventTypeTestAccessCounter, UvmToolsEventQueueVersion_V1)) { - UvmEventEntry_V1 entry; - UvmEventTestAccessCounterInfo_V1 *info = &entry.testEventData.accessCounter; + if (tools_is_event_enabled_v1(va_space, UvmEventTypeTestAccessCounter)) { + UvmEventEntry entry; + UvmEventTestAccessCounterInfo *info = &entry.testEventData.accessCounter; memset(&entry, 0, sizeof(entry)); @@ -1346,9 +1335,9 @@ void uvm_tools_record_access_counter(uvm_va_space_t *va_space, info->bank = buffer_entry->bank; info->tag = buffer_entry->tag; - uvm_tools_record_event_v1(va_space, &entry); + uvm_tools_record_event(va_space, &entry); } - if (tools_is_event_enabled_version(va_space, UvmEventTypeTestAccessCounter, UvmToolsEventQueueVersion_V2)) { + if (tools_is_event_enabled_v2(va_space, UvmEventTypeTestAccessCounter)) { UvmEventEntry_V2 entry; UvmEventTestAccessCounterInfo_V2 *info = &entry.testEventData.accessCounter; @@ -1415,7 +1404,9 @@ void uvm_tools_test_hmm_split_invalidate(uvm_va_space_t *va_space) void uvm_tools_record_block_migration_begin(uvm_va_block_t *va_block, uvm_push_t *push, uvm_processor_id_t dst_id, + int dst_nid, uvm_processor_id_t src_id, + int src_nid, NvU64 start, uvm_make_resident_cause_t cause) { @@ -1451,7 +1442,9 @@ void uvm_tools_record_block_migration_begin(uvm_va_block_t *va_block, block_mig->channel = push->channel; block_mig->start_timestamp_cpu = NV_GETTIME(); block_mig->dst = dst_id; + block_mig->dst_nid = dst_nid; block_mig->src = src_id; + block_mig->src_nid = src_nid; block_mig->range_group_id = UVM_RANGE_GROUP_ID_NONE; // During evictions, it is not safe to uvm_range_group_range_find() because the va_space lock is not held. @@ -1492,9 +1485,9 @@ void uvm_tools_record_read_duplicate(uvm_va_block_t *va_block, uvm_down_read(&va_space->tools.lock); - if (tools_is_event_enabled_version(va_space, UvmEventTypeReadDuplicate, UvmToolsEventQueueVersion_V1)) { - UvmEventEntry_V1 entry; - UvmEventReadDuplicateInfo_V1 *info_read_duplicate = &entry.eventData.readDuplicate; + if (tools_is_event_enabled_v1(va_space, UvmEventTypeReadDuplicate)) { + UvmEventEntry entry; + UvmEventReadDuplicateInfo *info_read_duplicate = &entry.eventData.readDuplicate; uvm_page_index_t page_index; memset(&entry, 0, sizeof(entry)); @@ -1514,11 +1507,11 @@ void uvm_tools_record_read_duplicate(uvm_va_block_t *va_block, for_each_id_in_mask(id, resident_processors) __set_bit(uvm_parent_id_value_from_processor_id(id), (unsigned long *)&info_read_duplicate->processors); - uvm_tools_record_event_v1(va_space, &entry); + uvm_tools_record_event(va_space, &entry); } } - if (tools_is_event_enabled_version(va_space, UvmEventTypeReadDuplicate, UvmToolsEventQueueVersion_V2)) { + if (tools_is_event_enabled_v2(va_space, UvmEventTypeReadDuplicate)) { UvmEventEntry_V2 entry; UvmEventReadDuplicateInfo_V2 *info_read_duplicate = &entry.eventData.readDuplicate; uvm_page_index_t page_index; @@ -1560,10 +1553,10 @@ void uvm_tools_record_read_duplicate_invalidate(uvm_va_block_t *va_block, return; uvm_down_read(&va_space->tools.lock); - if (tools_is_event_enabled_version(va_space, UvmEventTypeReadDuplicateInvalidate, UvmToolsEventQueueVersion_V1)) { - UvmEventEntry_V1 entry; + if (tools_is_event_enabled_v1(va_space, UvmEventTypeReadDuplicateInvalidate)) { + UvmEventEntry entry; uvm_page_index_t page_index; - UvmEventReadDuplicateInvalidateInfo_V1 *info = &entry.eventData.readDuplicateInvalidate; + UvmEventReadDuplicateInvalidateInfo *info = &entry.eventData.readDuplicateInvalidate; memset(&entry, 0, sizeof(entry)); @@ -1576,10 +1569,10 @@ void uvm_tools_record_read_duplicate_invalidate(uvm_va_block_t *va_block, UVM_ASSERT(uvm_page_mask_test(&va_block->read_duplicated_pages, page_index)); info->address = uvm_va_block_cpu_page_address(va_block, page_index); - uvm_tools_record_event_v1(va_space, &entry); + uvm_tools_record_event(va_space, &entry); } } - if (tools_is_event_enabled_version(va_space, UvmEventTypeReadDuplicateInvalidate, UvmToolsEventQueueVersion_V2)) { + if (tools_is_event_enabled_v2(va_space, UvmEventTypeReadDuplicateInvalidate)) { UvmEventEntry_V2 entry; uvm_page_index_t page_index; UvmEventReadDuplicateInvalidateInfo_V2 *info = &entry.eventData.readDuplicateInvalidate; @@ -1651,9 +1644,9 @@ void uvm_tools_record_cpu_fatal_fault(uvm_va_space_t *va_space, return; uvm_down_read(&va_space->tools.lock); - if (tools_is_event_enabled_version(va_space, UvmEventTypeFatalFault, UvmToolsEventQueueVersion_V1)) { - UvmEventEntry_V1 entry; - UvmEventFatalFaultInfo_V1 *info = &entry.eventData.fatalFault; + if (tools_is_event_enabled_v1(va_space, UvmEventTypeFatalFault)) { + UvmEventEntry entry; + UvmEventFatalFaultInfo *info = &entry.eventData.fatalFault; memset(&entry, 0, sizeof(entry)); @@ -1665,9 +1658,9 @@ void uvm_tools_record_cpu_fatal_fault(uvm_va_space_t *va_space, // info->faultType is not valid for cpu faults info->reason = reason; - uvm_tools_record_event_v1(va_space, &entry); + uvm_tools_record_event(va_space, &entry); } - if (tools_is_event_enabled_version(va_space, UvmEventTypeFatalFault, UvmToolsEventQueueVersion_V2)) { + if (tools_is_event_enabled_v2(va_space, UvmEventTypeFatalFault)) { UvmEventEntry_V2 entry; UvmEventFatalFaultInfo_V2 *info = &entry.eventData.fatalFault; @@ -1697,9 +1690,9 @@ void uvm_tools_record_gpu_fatal_fault(uvm_gpu_id_t gpu_id, return; uvm_down_read(&va_space->tools.lock); - if (tools_is_event_enabled_version(va_space, UvmEventTypeFatalFault, UvmToolsEventQueueVersion_V1)) { - UvmEventEntry_V1 entry; - UvmEventFatalFaultInfo_V1 *info = &entry.eventData.fatalFault; + if (tools_is_event_enabled_v1(va_space, UvmEventTypeFatalFault)) { + UvmEventEntry entry; + UvmEventFatalFaultInfo *info = &entry.eventData.fatalFault; memset(&entry, 0, sizeof(entry)); @@ -1711,9 +1704,9 @@ void uvm_tools_record_gpu_fatal_fault(uvm_gpu_id_t gpu_id, info->faultType = g_hal_to_tools_fault_type_table[buffer_entry->fault_type]; info->reason = reason; - uvm_tools_record_event_v1(va_space, &entry); + uvm_tools_record_event(va_space, &entry); } - if (tools_is_event_enabled_version(va_space, UvmEventTypeFatalFault, UvmToolsEventQueueVersion_V2)) { + if (tools_is_event_enabled_v2(va_space, UvmEventTypeFatalFault)) { UvmEventEntry_V2 entry; UvmEventFatalFaultInfo_V2 *info = &entry.eventData.fatalFault; @@ -1747,9 +1740,9 @@ void uvm_tools_record_thrashing(uvm_va_space_t *va_space, return; uvm_down_read(&va_space->tools.lock); - if (tools_is_event_enabled_version(va_space, UvmEventTypeThrashingDetected, UvmToolsEventQueueVersion_V1)) { - UvmEventEntry_V1 entry; - UvmEventThrashingDetectedInfo_V1 *info = &entry.eventData.thrashing; + if (tools_is_event_enabled_v1(va_space, UvmEventTypeThrashingDetected)) { + UvmEventEntry entry; + UvmEventThrashingDetectedInfo *info = &entry.eventData.thrashing; uvm_processor_id_t id; memset(&entry, 0, sizeof(entry)); @@ -1763,9 +1756,9 @@ void uvm_tools_record_thrashing(uvm_va_space_t *va_space, __set_bit(uvm_parent_id_value_from_processor_id(id), (unsigned long *)&info->processors); - uvm_tools_record_event_v1(va_space, &entry); + uvm_tools_record_event(va_space, &entry); } - if (tools_is_event_enabled_version(va_space, UvmEventTypeThrashingDetected, UvmToolsEventQueueVersion_V2)) { + if (tools_is_event_enabled_v2(va_space, UvmEventTypeThrashingDetected)) { UvmEventEntry_V2 entry; UvmEventThrashingDetectedInfo_V2 *info = &entry.eventData.thrashing; @@ -1796,9 +1789,9 @@ void uvm_tools_record_throttling_start(uvm_va_space_t *va_space, NvU64 address, return; uvm_down_read(&va_space->tools.lock); - if (tools_is_event_enabled_version(va_space, UvmEventTypeThrottlingStart, UvmToolsEventQueueVersion_V1)) { - UvmEventEntry_V1 entry; - UvmEventThrottlingStartInfo_V1 *info = &entry.eventData.throttlingStart; + if (tools_is_event_enabled_v1(va_space, UvmEventTypeThrottlingStart)) { + UvmEventEntry entry; + UvmEventThrottlingStartInfo *info = &entry.eventData.throttlingStart; memset(&entry, 0, sizeof(entry)); @@ -1807,9 +1800,9 @@ void uvm_tools_record_throttling_start(uvm_va_space_t *va_space, NvU64 address, info->address = address; info->timeStamp = NV_GETTIME(); - uvm_tools_record_event_v1(va_space, &entry); + uvm_tools_record_event(va_space, &entry); } - if (tools_is_event_enabled_version(va_space, UvmEventTypeThrottlingStart, UvmToolsEventQueueVersion_V2)) { + if (tools_is_event_enabled_v2(va_space, UvmEventTypeThrottlingStart)) { UvmEventEntry_V2 entry; UvmEventThrottlingStartInfo_V2 *info = &entry.eventData.throttlingStart; @@ -1837,9 +1830,9 @@ void uvm_tools_record_throttling_end(uvm_va_space_t *va_space, NvU64 address, uv return; uvm_down_read(&va_space->tools.lock); - if (tools_is_event_enabled_version(va_space, UvmEventTypeThrottlingEnd, UvmToolsEventQueueVersion_V1)) { - UvmEventEntry_V1 entry; - UvmEventThrottlingEndInfo_V1 *info = &entry.eventData.throttlingEnd; + if (tools_is_event_enabled_v1(va_space, UvmEventTypeThrottlingEnd)) { + UvmEventEntry entry; + UvmEventThrottlingEndInfo *info = &entry.eventData.throttlingEnd; memset(&entry, 0, sizeof(entry)); @@ -1848,9 +1841,9 @@ void uvm_tools_record_throttling_end(uvm_va_space_t *va_space, NvU64 address, uv info->address = address; info->timeStamp = NV_GETTIME(); - uvm_tools_record_event_v1(va_space, &entry); + uvm_tools_record_event(va_space, &entry); } - if (tools_is_event_enabled_version(va_space, UvmEventTypeThrottlingEnd, UvmToolsEventQueueVersion_V2)) { + if (tools_is_event_enabled_v2(va_space, UvmEventTypeThrottlingEnd)) { UvmEventEntry_V2 entry; UvmEventThrottlingEndInfo_V2 *info = &entry.eventData.throttlingEnd; @@ -1876,8 +1869,8 @@ static void record_map_remote_events(void *args) list_for_each_entry_safe(map_remote, next, &block_map_remote->events, events_node) { list_del(&map_remote->events_node); - if (tools_is_event_enabled_version(va_space, UvmEventTypeMapRemote, UvmToolsEventQueueVersion_V1)) { - UvmEventEntry_V1 entry; + if (tools_is_event_enabled_v1(va_space, UvmEventTypeMapRemote)) { + UvmEventEntry entry; memset(&entry, 0, sizeof(entry)); @@ -1890,10 +1883,10 @@ static void record_map_remote_events(void *args) entry.eventData.mapRemote.size = map_remote->size; entry.eventData.mapRemote.timeStampGpu = map_remote->timestamp_gpu; - uvm_tools_record_event_v1(va_space, &entry); + uvm_tools_record_event(va_space, &entry); } - if (tools_is_event_enabled_version(va_space, UvmEventTypeMapRemote, UvmToolsEventQueueVersion_V2)) { + if (tools_is_event_enabled_v2(va_space, UvmEventTypeMapRemote)) { UvmEventEntry_V2 entry; memset(&entry, 0, sizeof(entry)); @@ -1963,8 +1956,8 @@ void uvm_tools_record_map_remote(uvm_va_block_t *va_block, uvm_down_read(&va_space->tools.lock); if (UVM_ID_IS_CPU(processor)) { - if (tools_is_event_enabled_version(va_space, UvmEventTypeMapRemote, UvmToolsEventQueueVersion_V1)) { - UvmEventEntry_V1 entry; + if (tools_is_event_enabled_v1(va_space, UvmEventTypeMapRemote)) { + UvmEventEntry entry; memset(&entry, 0, sizeof(entry)); @@ -1979,9 +1972,9 @@ void uvm_tools_record_map_remote(uvm_va_block_t *va_block, UVM_ASSERT(entry.eventData.mapRemote.mapRemoteCause != UvmEventMapRemoteCauseInvalid); - uvm_tools_record_event_v1(va_space, &entry); + uvm_tools_record_event(va_space, &entry); } - if (tools_is_event_enabled_version(va_space, UvmEventTypeMapRemote, UvmToolsEventQueueVersion_V2)) { + if (tools_is_event_enabled_v2(va_space, UvmEventTypeMapRemote)) { UvmEventEntry_V2 entry; memset(&entry, 0, sizeof(entry)); @@ -2048,20 +2041,18 @@ void uvm_tools_record_map_remote(uvm_va_block_t *va_block, uvm_up_read(&va_space->tools.lock); } -NV_STATUS uvm_api_tools_init_event_tracker(UVM_TOOLS_INIT_EVENT_TRACKER_PARAMS *params, struct file *filp) +static NV_STATUS create_event_tracker(UVM_TOOLS_INIT_EVENT_TRACKER_V2_PARAMS *params, + size_t entry_size, + struct file *filp) { NV_STATUS status = NV_OK; uvm_tools_event_tracker_t *event_tracker; - if (params->version != UvmToolsEventQueueVersion_V1 && - params->version != UvmToolsEventQueueVersion_V2) - return NV_ERR_INVALID_ARGUMENT; - event_tracker = nv_kmem_cache_zalloc(g_tools_event_tracker_cache, NV_UVM_GFP_FLAGS); if (event_tracker == NULL) return NV_ERR_NO_MEMORY; - event_tracker->version = params->version; + event_tracker->entry_size = entry_size; event_tracker->uvm_file = fget(params->uvmFd); if (event_tracker->uvm_file == NULL) { @@ -2107,10 +2098,7 @@ NV_STATUS uvm_api_tools_init_event_tracker(UVM_TOOLS_INIT_EVENT_TRACKER_PARAMS * goto fail; } - if (event_tracker->version == UvmToolsEventQueueVersion_V1) - buffer_size = queue->queue_buffer_count * sizeof(UvmEventEntry_V1); - else - buffer_size = queue->queue_buffer_count * sizeof(UvmEventEntry_V2); + buffer_size = queue->queue_buffer_count * entry_size; status = map_user_pages(params->queueBuffer, buffer_size, @@ -2139,7 +2127,7 @@ NV_STATUS uvm_api_tools_init_event_tracker(UVM_TOOLS_INIT_EVENT_TRACKER_PARAMS * goto fail; } - if (nv_atomic_long_cmpxchg((atomic_long_t *)&filp->private_data, 0, (long)event_tracker) != 0) { + if (atomic_long_cmpxchg((atomic_long_t *)&filp->private_data, 0, (long) event_tracker) != 0) { status = NV_ERR_INVALID_ARGUMENT; goto fail; } @@ -2151,6 +2139,20 @@ NV_STATUS uvm_api_tools_init_event_tracker(UVM_TOOLS_INIT_EVENT_TRACKER_PARAMS * return status; } +NV_STATUS uvm_api_tools_init_event_tracker(UVM_TOOLS_INIT_EVENT_TRACKER_PARAMS *params, struct file *filp) +{ + UVM_TOOLS_INIT_EVENT_TRACKER_V2_PARAMS *params_v2 = (UVM_TOOLS_INIT_EVENT_TRACKER_V2_PARAMS *) params; + + BUILD_BUG_ON(!__same_type(params, params_v2)); + + return create_event_tracker(params_v2, sizeof(UvmEventEntry), filp); +} + +NV_STATUS uvm_api_tools_init_event_tracker_v2(UVM_TOOLS_INIT_EVENT_TRACKER_V2_PARAMS *params, struct file *filp) +{ + return create_event_tracker(params, sizeof(UvmEventEntry_V2), filp); +} + NV_STATUS uvm_api_tools_set_notification_threshold(UVM_TOOLS_SET_NOTIFICATION_THRESHOLD_PARAMS *params, struct file *filp) { uvm_tools_queue_snapshot_t sn; @@ -2310,8 +2312,8 @@ NV_STATUS uvm_api_tools_event_queue_enable_events(UVM_TOOLS_EVENT_QUEUE_ENABLE_E UvmEventNumTypesAll, params->eventTypeFlags, &event_tracker->queue.subscribed_queues, - event_tracker->version == UvmToolsEventQueueVersion_V1 ? - va_space->tools.queues_v1 : va_space->tools.queues_v2, + event_tracker->entry_size == sizeof(UvmEventEntry) ? + va_space->tools.queues : va_space->tools.queues_v2, &inserted_lists); // perform any necessary registration @@ -2500,7 +2502,7 @@ static NV_STATUS tools_access_process_memory(uvm_va_space_t *va_space, bool map_stage_mem_on_gpus = true; if (is_write) { - NvU64 remaining = nv_copy_from_user(stage_addr, user_va_start, bytes_now); + NvU64 remaining = copy_from_user(stage_addr, user_va_start, bytes_now); if (remaining != 0) { status = NV_ERR_INVALID_ARGUMENT; goto exit; @@ -2583,7 +2585,7 @@ static NV_STATUS tools_access_process_memory(uvm_va_space_t *va_space, // point where the data is copied out. nv_speculation_barrier(); - remaining = nv_copy_to_user(user_va_start, stage_addr, bytes_now); + remaining = copy_to_user(user_va_start, stage_addr, bytes_now); if (remaining > 0) { status = NV_ERR_INVALID_ARGUMENT; goto exit; @@ -2639,20 +2641,34 @@ NV_STATUS uvm_test_inject_tools_event(UVM_TEST_INJECT_TOOLS_EVENT_PARAMS *params NvU32 i; uvm_va_space_t *va_space = uvm_va_space_get(filp); - if (params->version != UvmToolsEventQueueVersion_V1 && params->version != UvmToolsEventQueueVersion_V2) + if (params->entry.eventData.eventType >= UvmEventNumTypesAll) return NV_ERR_INVALID_ARGUMENT; - if (params->entry_v1.eventData.eventType >= UvmEventNumTypesAll) + uvm_down_read(&va_space->tools.lock); + + for (i = 0; i < params->count; i++) + uvm_tools_record_event(va_space, ¶ms->entry); + + uvm_up_read(&va_space->tools.lock); + + return NV_OK; +} + +NV_STATUS uvm_test_inject_tools_event_v2(UVM_TEST_INJECT_TOOLS_EVENT_V2_PARAMS *params, struct file *filp) +{ + NvU32 i; + uvm_va_space_t *va_space = uvm_va_space_get(filp); + + if (params->entry_v2.eventData.eventType >= UvmEventNumTypesAll) return NV_ERR_INVALID_ARGUMENT; uvm_down_read(&va_space->tools.lock); - for (i = 0; i < params->count; i++) { - if (params->version == UvmToolsEventQueueVersion_V1) - uvm_tools_record_event_v1(va_space, ¶ms->entry_v1); - else - uvm_tools_record_event_v2(va_space, ¶ms->entry_v2); - } + + for (i = 0; i < params->count; i++) + uvm_tools_record_event_v2(va_space, ¶ms->entry_v2); + uvm_up_read(&va_space->tools.lock); + return NV_OK; } @@ -2672,36 +2688,29 @@ NV_STATUS uvm_test_increment_tools_counter(UVM_TEST_INCREMENT_TOOLS_COUNTER_PARA return NV_OK; } -NV_STATUS uvm_api_tools_get_processor_uuid_table(UVM_TOOLS_GET_PROCESSOR_UUID_TABLE_PARAMS *params, struct file *filp) +static NV_STATUS uvm_tools_get_processor_uuid_table_common(UVM_TOOLS_GET_PROCESSOR_UUID_TABLE_V2_PARAMS *params, + uvm_va_space_t *va_space, + NvU32 max_processors_count) { NvProcessorUuid *uuids; NvU64 remaining; uvm_gpu_t *gpu; - uvm_va_space_t *va_space = uvm_va_space_get(filp); - NvU32 version = params->version; - NvU32 count; - if (version == UvmToolsEventQueueVersion_V1) - count = UVM_MAX_PROCESSORS_V1; - else if (version == UvmToolsEventQueueVersion_V2) - count = UVM_ID_MAX_PROCESSORS; - else - return NV_ERR_INVALID_ARGUMENT; - - uuids = uvm_kvmalloc_zero(sizeof(NvProcessorUuid) * count); + uuids = uvm_kvmalloc_zero(sizeof(NvProcessorUuid) * max_processors_count); if (uuids == NULL) return NV_ERR_NO_MEMORY; uvm_uuid_copy(&uuids[UVM_ID_CPU_VALUE], &NV_PROCESSOR_UUID_CPU_DEFAULT); uvm_va_space_down_read(va_space); + for_each_va_space_gpu(gpu, va_space) { NvU32 id_value; const NvProcessorUuid *uuid; // Version 1 only supports processors 0..32 and uses the parent // GPU UUID. - if (version == UvmToolsEventQueueVersion_V1) { + if (max_processors_count == UVM_MAX_PROCESSORS_V1) { id_value = uvm_parent_id_value(gpu->parent->id); uuid = &gpu->parent->uuid; } @@ -2712,9 +2721,11 @@ NV_STATUS uvm_api_tools_get_processor_uuid_table(UVM_TOOLS_GET_PROCESSOR_UUID_TA uvm_uuid_copy(&uuids[id_value], uuid); } + uvm_va_space_up_read(va_space); - remaining = nv_copy_to_user((void *)params->tablePtr, uuids, sizeof(NvProcessorUuid) * count); + remaining = copy_to_user((void *)params->tablePtr, uuids, sizeof(NvProcessorUuid) * max_processors_count); + uvm_kvfree(uuids); if (remaining != 0) @@ -2723,6 +2734,21 @@ NV_STATUS uvm_api_tools_get_processor_uuid_table(UVM_TOOLS_GET_PROCESSOR_UUID_TA return NV_OK; } +NV_STATUS uvm_api_tools_get_processor_uuid_table(UVM_TOOLS_GET_PROCESSOR_UUID_TABLE_PARAMS *params, struct file *filp) +{ + UVM_TOOLS_GET_PROCESSOR_UUID_TABLE_V2_PARAMS *params_v2 = (UVM_TOOLS_GET_PROCESSOR_UUID_TABLE_V2_PARAMS *) params; + + BUILD_BUG_ON(!__same_type(params, params_v2)); + + return uvm_tools_get_processor_uuid_table_common(params_v2, uvm_va_space_get(filp), UVM_MAX_PROCESSORS_V1); +} + +NV_STATUS uvm_api_tools_get_processor_uuid_table_v2(UVM_TOOLS_GET_PROCESSOR_UUID_TABLE_V2_PARAMS *params, + struct file *filp) +{ + return uvm_tools_get_processor_uuid_table_common(params, uvm_va_space_get(filp), UVM_ID_MAX_PROCESSORS); +} + void uvm_tools_flush_events(void) { tools_schedule_completed_events(); diff --git a/kernel-open/nvidia-uvm/uvm_tools.h b/kernel-open/nvidia-uvm/uvm_tools.h index fd274e32a6..c328ca8e8b 100644 --- a/kernel-open/nvidia-uvm/uvm_tools.h +++ b/kernel-open/nvidia-uvm/uvm_tools.h @@ -32,12 +32,15 @@ #include "uvm_va_block_types.h" NV_STATUS uvm_test_inject_tools_event(UVM_TEST_INJECT_TOOLS_EVENT_PARAMS *params, struct file *filp); +NV_STATUS uvm_test_inject_tools_event_v2(UVM_TEST_INJECT_TOOLS_EVENT_V2_PARAMS *params, struct file *filp); NV_STATUS uvm_test_increment_tools_counter(UVM_TEST_INCREMENT_TOOLS_COUNTER_PARAMS *params, struct file *filp); NV_STATUS uvm_test_tools_flush_replay_events(UVM_TEST_TOOLS_FLUSH_REPLAY_EVENTS_PARAMS *params, struct file *filp); NV_STATUS uvm_api_tools_read_process_memory(UVM_TOOLS_READ_PROCESS_MEMORY_PARAMS *params, struct file *filp); NV_STATUS uvm_api_tools_write_process_memory(UVM_TOOLS_WRITE_PROCESS_MEMORY_PARAMS *params, struct file *filp); NV_STATUS uvm_api_tools_get_processor_uuid_table(UVM_TOOLS_GET_PROCESSOR_UUID_TABLE_PARAMS *params, struct file *filp); +NV_STATUS uvm_api_tools_get_processor_uuid_table_v2(UVM_TOOLS_GET_PROCESSOR_UUID_TABLE_V2_PARAMS *params, + struct file *filp); NV_STATUS uvm_api_tools_flush_events(UVM_TOOLS_FLUSH_EVENTS_PARAMS *params, struct file *filp); static UvmEventFatalReason uvm_tools_status_to_fatal_fault_reason(NV_STATUS status) @@ -88,7 +91,9 @@ void uvm_tools_record_map_remote(uvm_va_block_t *va_block, void uvm_tools_record_block_migration_begin(uvm_va_block_t *va_block, uvm_push_t *push, uvm_processor_id_t dst_id, + int dst_nid, uvm_processor_id_t src_id, + int src_nid, NvU64 start, uvm_make_resident_cause_t cause); diff --git a/kernel-open/nvidia-uvm/uvm_tracker_test.c b/kernel-open/nvidia-uvm/uvm_tracker_test.c index af490efa28..fd1d374c41 100644 --- a/kernel-open/nvidia-uvm/uvm_tracker_test.c +++ b/kernel-open/nvidia-uvm/uvm_tracker_test.c @@ -149,7 +149,7 @@ static NV_STATUS test_tracker_completion(uvm_va_space_t *va_space) static NV_STATUS test_tracker_basic(uvm_va_space_t *va_space) { uvm_gpu_t *gpu; - uvm_channel_t *channel; + uvm_channel_t *any_channel; uvm_tracker_t tracker; uvm_tracker_entry_t entry; NvU32 count = 0; @@ -159,15 +159,15 @@ static NV_STATUS test_tracker_basic(uvm_va_space_t *va_space) if (gpu == NULL) return NV_ERR_INVALID_STATE; - channel = uvm_channel_any(gpu->channel_manager); - if (channel == NULL) + any_channel = uvm_channel_any(gpu->channel_manager); + if (any_channel == NULL) return NV_ERR_INVALID_STATE; uvm_tracker_init(&tracker); TEST_CHECK_GOTO(assert_tracker_is_completed(&tracker) == NV_OK, done); // Some channel - entry.channel = channel; + entry.channel = any_channel; entry.value = 1; status = uvm_tracker_add_entry(&tracker, &entry); @@ -258,7 +258,7 @@ static NV_STATUS test_tracker_basic(uvm_va_space_t *va_space) static NV_STATUS test_tracker_overwrite(uvm_va_space_t *va_space) { uvm_gpu_t *gpu; - uvm_channel_t *channel; + uvm_channel_t *any_channel; uvm_tracker_t tracker, dup_tracker; uvm_tracker_entry_t entry; uvm_tracker_entry_t *entry_iter, *dup_entry_iter; @@ -270,15 +270,15 @@ static NV_STATUS test_tracker_overwrite(uvm_va_space_t *va_space) if (gpu == NULL) return NV_ERR_INVALID_STATE; - channel = uvm_channel_any(gpu->channel_manager); - if (channel == NULL) + any_channel = uvm_channel_any(gpu->channel_manager); + if (any_channel == NULL) return NV_ERR_INVALID_STATE; uvm_tracker_init(&tracker); TEST_CHECK_GOTO(assert_tracker_is_completed(&tracker) == NV_OK, done); // Some channel - entry.channel = channel; + entry.channel = any_channel; entry.value = 1; status = uvm_tracker_add_entry(&tracker, &entry); @@ -351,7 +351,7 @@ static NV_STATUS test_tracker_overwrite(uvm_va_space_t *va_space) static NV_STATUS test_tracker_add_tracker(uvm_va_space_t *va_space) { uvm_gpu_t *gpu; - uvm_channel_t *channel; + uvm_channel_t *any_channel; uvm_tracker_t tracker, dup_tracker; uvm_tracker_entry_t entry; uvm_tracker_entry_t *entry_iter, *dup_entry_iter; @@ -362,8 +362,8 @@ static NV_STATUS test_tracker_add_tracker(uvm_va_space_t *va_space) if (gpu == NULL) return NV_ERR_INVALID_STATE; - channel = uvm_channel_any(gpu->channel_manager); - if (channel == NULL) + any_channel = uvm_channel_any(gpu->channel_manager); + if (any_channel == NULL) return NV_ERR_INVALID_STATE; uvm_tracker_init(&tracker); @@ -371,7 +371,7 @@ static NV_STATUS test_tracker_add_tracker(uvm_va_space_t *va_space) TEST_CHECK_GOTO(assert_tracker_is_completed(&tracker) == NV_OK, done); // Some channel - entry.channel = channel; + entry.channel = any_channel; entry.value = 1; status = uvm_tracker_add_entry(&tracker, &entry); diff --git a/kernel-open/nvidia-uvm/uvm_types.h b/kernel-open/nvidia-uvm/uvm_types.h index 6e0383afc1..868eb64111 100644 --- a/kernel-open/nvidia-uvm/uvm_types.h +++ b/kernel-open/nvidia-uvm/uvm_types.h @@ -233,6 +233,19 @@ typedef union } rm_linux; } UvmAllocationPlatformParams; +// Platform specific parameters for UvmAllocDeviceP2P +typedef union +{ + struct { + // File descriptor for RM's control file + int ctrlFd; + // RM client handle + NvHandle hClient; + // RM allocation handle + NvHandle hMemory; + } rm_linux; +} UvmDeviceP2PPlatformParams; + //------------------------------------------------------------------------------ // Tools API types //------------------------------------------------------------------------------ @@ -416,7 +429,7 @@ typedef struct // or malign-double will have no effect on the field offsets. // NvU16 padding16Bits; - NvU32 padding32Bits; + NvU32 cpuId; // CPU number of the faulting thread NvU64 address; // faulting address NvU64 timeStamp; // cpu time when the fault occurred NvU32 pid; // process id causing the fault @@ -580,7 +593,7 @@ typedef struct // on the gpu NvU64 endTimeStampGpu; // time stamp when the migration finished // on the gpu -} UvmEventMigrationInfo_V1; +} UvmEventMigrationInfo; typedef struct { @@ -688,7 +701,7 @@ typedef struct // NvU8 padding8Bits; NvU16 padding16Bits; -} UvmEventGpuFaultInfo_V1; +} UvmEventGpuFaultInfo; typedef struct { @@ -771,7 +784,7 @@ typedef struct // accesses is queued on the gpu NvU64 timeStampGpu; // gpu time stamp when the replay operation finished // executing on the gpu -} UvmEventGpuFaultReplayInfo_V1; +} UvmEventGpuFaultReplayInfo; typedef struct { @@ -812,7 +825,7 @@ typedef struct NvU16 padding16bits; NvU64 address; // virtual address at which the processor faulted NvU64 timeStamp; // CPU time when the fault is detected to be fatal -} UvmEventFatalFaultInfo_V1; +} UvmEventFatalFaultInfo; typedef struct { @@ -860,7 +873,7 @@ typedef struct // participate in read-duplicate this is time stamp // when all the operations have been pushed to all // the processors. -} UvmEventReadDuplicateInfo_V1; +} UvmEventReadDuplicateInfo; typedef struct { @@ -919,7 +932,7 @@ typedef struct // participate in read-duplicate this is time stamp // when all the operations have been pushed to all // the processors. -} UvmEventReadDuplicateInvalidateInfo_V1; +} UvmEventReadDuplicateInvalidateInfo; typedef struct { @@ -969,7 +982,7 @@ typedef struct // changed NvU64 timeStamp; // cpu time stamp when the new page size is // queued on the gpu -} UvmEventPageSizeChangeInfo_V1; +} UvmEventPageSizeChangeInfo; typedef struct { @@ -1016,7 +1029,7 @@ typedef struct // thrashing NvU64 size; // size of the memory region that is thrashing NvU64 timeStamp; // cpu time stamp when thrashing is detected -} UvmEventThrashingDetectedInfo_V1; +} UvmEventThrashingDetectedInfo; typedef struct { @@ -1063,7 +1076,7 @@ typedef struct NvU64 address; // address of the page whose servicing is being // throttled NvU64 timeStamp; // cpu start time stamp for the throttling operation -} UvmEventThrottlingStartInfo_V1; +} UvmEventThrottlingStartInfo; typedef struct { @@ -1105,7 +1118,7 @@ typedef struct NvU64 address; // address of the page whose servicing is being // throttled NvU64 timeStamp; // cpu end time stamp for the throttling operation -} UvmEventThrottlingEndInfo_V1; +} UvmEventThrottlingEndInfo; typedef struct { @@ -1182,7 +1195,7 @@ typedef struct NvU64 timeStampGpu; // time stamp when the new mapping is effective in // the processor specified by srcIndex. If srcIndex // is a cpu, this field will be zero. -} UvmEventMapRemoteInfo_V1; +} UvmEventMapRemoteInfo; typedef struct { @@ -1237,7 +1250,7 @@ typedef struct NvU64 addressIn; // virtual address that caused the eviction NvU64 size; // size of the memory region that being evicted NvU64 timeStamp; // cpu time stamp when eviction starts on the cpu -} UvmEventEvictionInfo_V1; +} UvmEventEvictionInfo; typedef struct { @@ -1323,7 +1336,7 @@ typedef struct NvU32 bank; NvU64 address; NvU64 instancePtr; -} UvmEventTestAccessCounterInfo_V1; +} UvmEventTestAccessCounterInfo; typedef struct { @@ -1381,29 +1394,29 @@ typedef struct UvmEventMigrationInfo_Lite migration_Lite; UvmEventCpuFaultInfo cpuFault; - UvmEventMigrationInfo_V1 migration; - UvmEventGpuFaultInfo_V1 gpuFault; - UvmEventGpuFaultReplayInfo_V1 gpuFaultReplay; - UvmEventFatalFaultInfo_V1 fatalFault; - UvmEventReadDuplicateInfo_V1 readDuplicate; - UvmEventReadDuplicateInvalidateInfo_V1 readDuplicateInvalidate; - UvmEventPageSizeChangeInfo_V1 pageSizeChange; - UvmEventThrashingDetectedInfo_V1 thrashing; - UvmEventThrottlingStartInfo_V1 throttlingStart; - UvmEventThrottlingEndInfo_V1 throttlingEnd; - UvmEventMapRemoteInfo_V1 mapRemote; - UvmEventEvictionInfo_V1 eviction; + UvmEventMigrationInfo migration; + UvmEventGpuFaultInfo gpuFault; + UvmEventGpuFaultReplayInfo gpuFaultReplay; + UvmEventFatalFaultInfo fatalFault; + UvmEventReadDuplicateInfo readDuplicate; + UvmEventReadDuplicateInvalidateInfo readDuplicateInvalidate; + UvmEventPageSizeChangeInfo pageSizeChange; + UvmEventThrashingDetectedInfo thrashing; + UvmEventThrottlingStartInfo throttlingStart; + UvmEventThrottlingEndInfo throttlingEnd; + UvmEventMapRemoteInfo mapRemote; + UvmEventEvictionInfo eviction; } eventData; union { NvU8 eventType; - UvmEventTestAccessCounterInfo_V1 accessCounter; + UvmEventTestAccessCounterInfo accessCounter; UvmEventTestSplitInvalidateInfo splitInvalidate; } testEventData; }; -} UvmEventEntry_V1; +} UvmEventEntry; typedef struct { @@ -1476,11 +1489,6 @@ typedef enum UvmDebugAccessTypeWrite = 1, } UvmDebugAccessType; -typedef enum { - UvmToolsEventQueueVersion_V1 = 1, - UvmToolsEventQueueVersion_V2 = 2, -} UvmToolsEventQueueVersion; - typedef struct UvmEventControlData_tag { // entries between get_ahead and get_behind are currently being read volatile NvU32 get_ahead; @@ -1494,9 +1502,6 @@ typedef struct UvmEventControlData_tag { NvU64 dropped[UvmEventNumTypesAll]; } UvmToolsEventControlData; -// TODO: Bug 4465348: remove this after replacing old references. -typedef UvmToolsEventControlData UvmToolsEventControlData_V1; - //------------------------------------------------------------------------------ // UVM Tools forward types (handles) definitions //------------------------------------------------------------------------------ diff --git a/kernel-open/nvidia-uvm/uvm_user_channel.c b/kernel-open/nvidia-uvm/uvm_user_channel.c index cde60a1179..5c55b5d3b7 100644 --- a/kernel-open/nvidia-uvm/uvm_user_channel.c +++ b/kernel-open/nvidia-uvm/uvm_user_channel.c @@ -237,23 +237,22 @@ static uvm_user_channel_t *find_user_channel(uvm_va_space_t *va_space, uvm_rm_us // 1) gpu_va_space must match // 2) rm_descriptor must match // 3) new_user_channel's TSG matches existing mappings -static uvm_va_range_t *find_va_range(uvm_user_channel_t *new_user_channel, NvP64 rm_descriptor) +static uvm_va_range_channel_t *find_va_range(uvm_user_channel_t *new_user_channel, NvP64 rm_descriptor) { uvm_gpu_va_space_t *gpu_va_space = new_user_channel->gpu_va_space; - uvm_va_range_t *range; + uvm_va_range_channel_t *channel_range; // We can only allow sharing within a TSG if (!new_user_channel->tsg.valid) return NULL; - list_for_each_entry(range, &gpu_va_space->channel_va_ranges, channel.list_node) { - UVM_ASSERT(range->type == UVM_VA_RANGE_TYPE_CHANNEL); - UVM_ASSERT(range->channel.ref_count > 0); + list_for_each_entry(channel_range, &gpu_va_space->channel_va_ranges, list_node) { + UVM_ASSERT(channel_range->ref_count > 0); - if (range->channel.tsg.valid && - range->channel.tsg.id == new_user_channel->tsg.id && - range->channel.rm_descriptor == rm_descriptor) - return range; + if (channel_range->tsg.valid && + channel_range->tsg.id == new_user_channel->tsg.id && + channel_range->rm_descriptor == rm_descriptor) + return channel_range; } return NULL; @@ -290,8 +289,8 @@ static NvU64 find_va_in_range(uvm_va_space_t *va_space, NvU64 base, NvU64 end, N } } -// Allocate or reuse a VA range for the given channel resource, but don't map -// it. If a new VA range is allocated, the VA used is the first unallocated VA +// Allocate or reuse a range for the given channel resource, but don't map +// it. If a new range is allocated, the VA used is the first unallocated VA // in the range [base, end] which has the appropriate alignment and size for the // given resource. static NV_STATUS create_va_range(struct mm_struct *mm, @@ -303,7 +302,7 @@ static NV_STATUS create_va_range(struct mm_struct *mm, uvm_gpu_va_space_t *gpu_va_space = user_channel->gpu_va_space; UvmGpuChannelResourceInfo *resource = &user_channel->resources[resource_index]; UvmGpuMemoryInfo *mem_info = &resource->resourceInfo; - uvm_va_range_t *range = NULL; + uvm_va_range_channel_t *channel_range = NULL; NvU64 start; uvm_aperture_t aperture; NV_STATUS status; @@ -316,19 +315,19 @@ static NV_STATUS create_va_range(struct mm_struct *mm, aperture = UVM_APERTURE_VID; // See if we've already mapped this resource - range = find_va_range(user_channel, resource->resourceDescriptor); - if (range) { + channel_range = find_va_range(user_channel, resource->resourceDescriptor); + if (channel_range) { // We've already mapped this resource, so just bump the ref count - UVM_ASSERT(IS_ALIGNED(range->node.start, resource->alignment)); - UVM_ASSERT(uvm_va_range_size(range) >= mem_info->size); - UVM_ASSERT(range->channel.aperture == aperture); + UVM_ASSERT(IS_ALIGNED(channel_range->va_range.node.start, resource->alignment)); + UVM_ASSERT(uvm_va_range_size(&channel_range->va_range) >= mem_info->size); + UVM_ASSERT(channel_range->aperture == aperture); - ++range->channel.ref_count; - user_channel->va_ranges[resource_index] = range; + ++channel_range->ref_count; + user_channel->channel_ranges[resource_index] = channel_range; return NV_OK; } - // This is a new VA range. Find an available VA in the input region and + // This is a new channel range. Find an available VA in the input region and // allocate it there. start = find_va_in_range(gpu_va_space->va_space, base, end, mem_info->size, resource->alignment); if (!start) { @@ -346,28 +345,28 @@ static NV_STATUS create_va_range(struct mm_struct *mm, mm, start, start + mem_info->size - 1, - &range); + &channel_range); if (status != NV_OK) { UVM_ASSERT(status != NV_ERR_UVM_ADDRESS_IN_USE); goto error; } - range->channel.gpu_va_space = gpu_va_space; - range->channel.aperture = aperture; - range->channel.rm_descriptor = resource->resourceDescriptor; - range->channel.rm_id = resource->resourceId; - range->channel.tsg.valid = user_channel->tsg.valid; - range->channel.tsg.id = user_channel->tsg.id; - range->channel.ref_count = 1; - list_add(&range->channel.list_node, &gpu_va_space->channel_va_ranges); + channel_range->gpu_va_space = gpu_va_space; + channel_range->aperture = aperture; + channel_range->rm_descriptor = resource->resourceDescriptor; + channel_range->rm_id = resource->resourceId; + channel_range->tsg.valid = user_channel->tsg.valid; + channel_range->tsg.id = user_channel->tsg.id; + channel_range->ref_count = 1; + list_add(&channel_range->list_node, &gpu_va_space->channel_va_ranges); - user_channel->va_ranges[resource_index] = range; + user_channel->channel_ranges[resource_index] = channel_range; return NV_OK; error: - if (range) { - range->channel.ref_count = 0; // Destroy assumes this - uvm_va_range_destroy(range, NULL); + if (channel_range) { + channel_range->ref_count = 0; // Destroy assumes this + uvm_va_range_destroy(&channel_range->va_range, NULL); } return status; } @@ -376,32 +375,31 @@ static void destroy_va_ranges(uvm_user_channel_t *user_channel) { size_t i; - if (!user_channel || !user_channel->va_ranges) + if (!user_channel || !user_channel->channel_ranges) return; for (i = 0; i < user_channel->num_resources; i++) { - uvm_va_range_t *resource_range = user_channel->va_ranges[i]; + uvm_va_range_channel_t *resource_range = user_channel->channel_ranges[i]; if (!resource_range) continue; - UVM_ASSERT(resource_range->type == UVM_VA_RANGE_TYPE_CHANNEL); - UVM_ASSERT(resource_range->channel.rm_descriptor == user_channel->resources[i].resourceDescriptor); - UVM_ASSERT(resource_range->channel.rm_id == user_channel->resources[i].resourceId); - UVM_ASSERT(resource_range->channel.tsg.valid == user_channel->tsg.valid); - UVM_ASSERT(resource_range->channel.tsg.id == user_channel->tsg.id); + UVM_ASSERT(resource_range->rm_descriptor == user_channel->resources[i].resourceDescriptor); + UVM_ASSERT(resource_range->rm_id == user_channel->resources[i].resourceId); + UVM_ASSERT(resource_range->tsg.valid == user_channel->tsg.valid); + UVM_ASSERT(resource_range->tsg.id == user_channel->tsg.id); // Drop the ref count on each each range - UVM_ASSERT(resource_range->channel.ref_count > 0); - if (!resource_range->channel.tsg.valid) - UVM_ASSERT(resource_range->channel.ref_count == 1); + UVM_ASSERT(resource_range->ref_count > 0); + if (!resource_range->tsg.valid) + UVM_ASSERT(resource_range->ref_count == 1); - --resource_range->channel.ref_count; - if (resource_range->channel.ref_count == 0) - uvm_va_range_destroy(resource_range, NULL); + --resource_range->ref_count; + if (resource_range->ref_count == 0) + uvm_va_range_destroy(&resource_range->va_range, NULL); } - uvm_kvfree(user_channel->va_ranges); - user_channel->va_ranges = NULL; + uvm_kvfree(user_channel->channel_ranges); + user_channel->channel_ranges = NULL; } // Channels need virtual allocations to operate, but we don't know about them. @@ -415,8 +413,9 @@ static NV_STATUS create_va_ranges(struct mm_struct *mm, NvU32 i; NV_STATUS status; - user_channel->va_ranges = uvm_kvmalloc_zero(user_channel->num_resources * sizeof(user_channel->va_ranges[0])); - if (!user_channel->va_ranges) + user_channel->channel_ranges = uvm_kvmalloc_zero(user_channel->num_resources * + sizeof(user_channel->channel_ranges[0])); + if (!user_channel->channel_ranges) return NV_ERR_NO_MEMORY; for (i = 0; i < user_channel->num_resources; i++) { @@ -447,17 +446,17 @@ static NV_STATUS bind_channel_resources(uvm_user_channel_t *user_channel) } for (i = 0; i < user_channel->num_resources; i++) { - uvm_va_range_t *resource_range = user_channel->va_ranges[i]; + uvm_va_range_channel_t *resource_range = user_channel->channel_ranges[i]; UVM_ASSERT(resource_range); - UVM_ASSERT(resource_range->type == UVM_VA_RANGE_TYPE_CHANNEL); - UVM_ASSERT(resource_range->channel.rm_descriptor == user_channel->resources[i].resourceDescriptor); - UVM_ASSERT(resource_range->channel.rm_id == user_channel->resources[i].resourceId); - UVM_ASSERT(resource_range->channel.tsg.valid == user_channel->tsg.valid); - UVM_ASSERT(resource_range->channel.tsg.id == user_channel->tsg.id); - - resource_va_list[i].resourceId = resource_range->channel.rm_id; - resource_va_list[i].resourceVa = resource_range->node.start; + UVM_ASSERT(resource_range->va_range.type == UVM_VA_RANGE_TYPE_CHANNEL); + UVM_ASSERT(resource_range->rm_descriptor == user_channel->resources[i].resourceDescriptor); + UVM_ASSERT(resource_range->rm_id == user_channel->resources[i].resourceId); + UVM_ASSERT(resource_range->tsg.valid == user_channel->tsg.valid); + UVM_ASSERT(resource_range->tsg.id == user_channel->tsg.id); + + resource_va_list[i].resourceId = resource_range->rm_id; + resource_va_list[i].resourceVa = resource_range->va_range.node.start; } status = uvm_rm_locked_call(nvUvmInterfaceBindChannelResources(user_channel->rm_retained_channel, @@ -500,23 +499,28 @@ static NV_STATUS uvm_user_channel_map_resources(uvm_user_channel_t *user_channel for (i = 0; i < user_channel->num_resources; i++) { UvmGpuMemoryInfo *mem_info; - uvm_va_range_t *range = user_channel->va_ranges[i]; + uvm_va_range_channel_t *range = user_channel->channel_ranges[i]; - // Skip already-mapped VA ranges. Note that the ref count might not be + // Skip already-mapped ranges. Note that the ref count might not be // 1 even if the range is unmapped, because a thread which fails to map // will drop and re-take the VA space lock in uvm_register_channel - // leaving a shareable VA range in the list unmapped. This thread could + // leaving a shareable range in the list unmapped. This thread could // have attached to it during that window, so we'll do the mapping // instead. - if (range->channel.pt_range_vec.ranges) { - UVM_ASSERT(range->channel.ref_count >= 1); + if (range->pt_range_vec.ranges) { + UVM_ASSERT(range->ref_count >= 1); continue; } mem_info = &user_channel->resources[i].resourceInfo; - status = uvm_va_range_map_rm_allocation(range, user_channel->gpu, mem_info, &map_rm_params, NULL, &tracker); + status = uvm_va_range_map_rm_allocation(&range->va_range, + user_channel->gpu, + mem_info, + &map_rm_params, + NULL, + &tracker); if (status != NV_OK) { - // We can't destroy the VA ranges here since we only have the VA + // We can't destroy the ranges here since we only have the VA // space lock in read mode, so let the caller handle it. break; } @@ -742,7 +746,7 @@ static void free_user_channel(nv_kref_t *nv_kref) { uvm_user_channel_t *user_channel = container_of(nv_kref, uvm_user_channel_t, kref); UVM_ASSERT(!user_channel->gpu_va_space); - UVM_ASSERT(!user_channel->va_ranges); + UVM_ASSERT(!user_channel->channel_ranges); UVM_ASSERT(!atomic_read(&user_channel->is_bound)); uvm_kvfree(user_channel); } @@ -839,7 +843,7 @@ void uvm_user_channel_destroy_detached(uvm_user_channel_t *user_channel) uvm_tracker_wait_deinit(&user_channel->clear_faulted_tracker); if (user_channel->resources) { - UVM_ASSERT(!user_channel->va_ranges); + UVM_ASSERT(!user_channel->channel_ranges); uvm_kvfree(user_channel->resources); } diff --git a/kernel-open/nvidia-uvm/uvm_user_channel.h b/kernel-open/nvidia-uvm/uvm_user_channel.h index 88b85265b3..b97ed678c1 100644 --- a/kernel-open/nvidia-uvm/uvm_user_channel.h +++ b/kernel-open/nvidia-uvm/uvm_user_channel.h @@ -135,7 +135,7 @@ struct uvm_user_channel_struct uvm_user_channel_subctx_info_t *subctx_info; // Number of resources reported by RM. This is the size of both the - // resources and va_ranges arrays. + // resources and channel_ranges arrays. size_t num_resources; // Array of all resources for this channel, shared or not. Virtual mappings @@ -146,11 +146,11 @@ struct uvm_user_channel_struct // the corresponding VA ranges. UvmGpuChannelResourceInfo *resources; - // Array of all VA ranges associated with this channel. Entry i in this + // Array of all channel ranges associated with this channel. Entry i in this // array corresponds to resource i in the resources array above and has the // same descriptor. uvm_user_channel_detach will drop the ref counts for - // these VA ranges, potentially destroying them. - uvm_va_range_t **va_ranges; + // these channel ranges, potentially destroying them. + uvm_va_range_channel_t **channel_ranges; // Physical instance pointer. There is a 1:1 mapping between instance // pointer and channel. GPU faults report an instance pointer, and the GPU diff --git a/kernel-open/nvidia-uvm/uvm_va_block.c b/kernel-open/nvidia-uvm/uvm_va_block.c index 9595f6e43c..0254b82b06 100644 --- a/kernel-open/nvidia-uvm/uvm_va_block.c +++ b/kernel-open/nvidia-uvm/uvm_va_block.c @@ -41,6 +41,7 @@ #include "uvm_gpu_access_counters.h" #include "uvm_va_space_mm.h" #include "uvm_test_ioctl.h" +#include "uvm_va_policy.h" #include "uvm_conf_computing.h" typedef enum @@ -95,8 +96,8 @@ uvm_va_space_t *uvm_va_block_get_va_space_maybe_dead(uvm_va_block_t *va_block) return va_block->hmm.va_space; #endif - if (va_block->va_range) - return va_block->va_range->va_space; + if (va_block->managed_range) + return va_block->managed_range->va_range.va_space; return NULL; } @@ -131,27 +132,6 @@ static NvU64 block_gpu_pte_flag_cacheable(uvm_va_block_t *block, uvm_gpu_t *gpu, return uvm_exp_gpu_cache_peermem == 0 ? UVM_MMU_PTE_FLAGS_NONE : UVM_MMU_PTE_FLAGS_CACHED; } -static uvm_gpu_t *block_get_gpu(uvm_va_block_t *block, uvm_gpu_id_t gpu_id) -{ - uvm_va_space_t *va_space = uvm_va_block_get_va_space(block); - - return uvm_va_space_get_gpu(va_space, gpu_id); -} - -static const char *block_processor_name(uvm_va_block_t *block, uvm_processor_id_t id) -{ - uvm_va_space_t *va_space = uvm_va_block_get_va_space(block); - - return uvm_va_space_processor_name(va_space, id); -} - -static bool block_processor_has_memory(uvm_va_block_t *block, uvm_processor_id_t id) -{ - uvm_va_space_t *va_space = uvm_va_block_get_va_space(block); - - return uvm_va_space_processor_has_memory(va_space, id); -} - static bool is_uvm_fault_force_sysmem_set(void) { // Only enforce this during testing @@ -171,7 +151,7 @@ static const uvm_processor_mask_t *block_get_uvm_lite_gpus(uvm_va_block_t *va_bl if (uvm_va_block_is_hmm(va_block)) return &g_uvm_processor_mask_empty; else - return &va_block->va_range->uvm_lite_gpus; + return &va_block->managed_range->va_range.uvm_lite_gpus; } void uvm_va_block_retry_init(uvm_va_block_retry_t *retry) @@ -728,11 +708,18 @@ bool uvm_va_block_cpu_is_region_resident_on(uvm_va_block_t *va_block, int nid, u // If the preferred node ID is NUMA_NO_NODE, the nearest NUMA node ID // with memory is returned. In most cases, this should be the current // NUMA node. -static int uvm_va_block_context_get_node(uvm_va_block_context_t *va_block_context) +static int uvm_va_block_context_get_node(uvm_va_block_t *block, + uvm_va_block_region_t region, + uvm_va_block_context_t *va_block_context) { + const uvm_va_policy_t *policy = uvm_va_policy_get_region(block, region); + if (va_block_context->make_resident.dest_nid != NUMA_NO_NODE) return va_block_context->make_resident.dest_nid; + if (policy->preferred_nid != NUMA_NO_NODE) + return policy->preferred_nid; + return numa_mem_id(); } @@ -1244,7 +1231,7 @@ static void uvm_va_block_free(uvm_va_block_t *block) } } -NV_STATUS uvm_va_block_create(uvm_va_range_t *va_range, +NV_STATUS uvm_va_block_create(uvm_va_range_managed_t *managed_range, NvU64 start, NvU64 end, uvm_va_block_t **out_block) @@ -1259,11 +1246,10 @@ NV_STATUS uvm_va_block_create(uvm_va_range_t *va_range, UVM_ASSERT(size > 0); UVM_ASSERT(size <= UVM_VA_BLOCK_SIZE); - if (va_range) { + if (managed_range) { // Create a managed va_block. - UVM_ASSERT(start >= va_range->node.start); - UVM_ASSERT(end <= va_range->node.end); - UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_MANAGED); + UVM_ASSERT(start >= managed_range->va_range.node.start); + UVM_ASSERT(end <= managed_range->va_range.node.end); } // Blocks can't span a block alignment boundary @@ -1301,7 +1287,7 @@ NV_STATUS uvm_va_block_create(uvm_va_range_t *va_range, uvm_mutex_init(&block->lock, UVM_LOCK_ORDER_VA_BLOCK); block->start = start; block->end = end; - block->va_range = va_range; + block->managed_range = managed_range; uvm_tracker_init(&block->tracker); block->prefetch_info.last_migration_proc_id = UVM_ID_INVALID; @@ -1455,7 +1441,7 @@ NV_STATUS uvm_va_block_gpu_state_alloc(uvm_va_block_t *va_block) uvm_assert_mutex_locked(&va_block->lock); for_each_gpu_id_in_mask(gpu_id, &va_space->registered_gpus) { - if (!block_gpu_state_get_alloc(va_block, uvm_va_space_get_gpu(va_space, gpu_id))) + if (!block_gpu_state_get_alloc(va_block, uvm_gpu_get(gpu_id))) return NV_ERR_NO_MEMORY; } @@ -1469,7 +1455,7 @@ void uvm_va_block_unmap_cpu_chunk_on_gpus(uvm_va_block_t *block, for_each_gpu_id(id) { if (uvm_va_block_gpu_state_get(block, id)) - cpu_chunk_remove_sysmem_gpu_mapping(chunk, block_get_gpu(block, id)); + cpu_chunk_remove_sysmem_gpu_mapping(chunk, uvm_gpu_get(id)); } } @@ -1493,7 +1479,7 @@ NV_STATUS uvm_va_block_map_cpu_chunk_on_gpus(uvm_va_block_t *block, if (!uvm_va_block_gpu_state_get(block, id)) continue; - gpu = block_get_gpu(block, id); + gpu = uvm_gpu_get(id); status = cpu_chunk_add_sysmem_gpu_mapping(chunk, block, chunk_region.first, gpu); if (status != NV_OK) goto error; @@ -2025,10 +2011,36 @@ static NV_STATUS block_populate_pages_cpu(uvm_va_block_t *block, NV_STATUS uvm_va_block_populate_page_cpu(uvm_va_block_t *va_block, uvm_page_index_t page_index, uvm_va_block_context_t *block_context) { uvm_page_mask_t *page_mask = &block_context->caller_page_mask; + NV_STATUS status = NV_OK; uvm_page_mask_zero(page_mask); uvm_page_mask_set(page_mask, page_index); - return block_populate_pages_cpu(va_block, page_mask, uvm_va_block_region_from_block(va_block), block_context, false); + + if (uvm_va_block_is_hmm(va_block)) { + const uvm_va_policy_t *policy; + uvm_va_block_region_t region; + uvm_va_policy_node_t *node; + + uvm_for_each_va_policy_in(policy, va_block, va_block->start, va_block->end, node, region) { + status = block_populate_pages_cpu(va_block, + page_mask, + region, + block_context, + false); + + if (status != NV_OK) + break; + } + } + else { + status = block_populate_pages_cpu(va_block, + page_mask, + uvm_va_block_region_from_block(va_block), + block_context, + false); + } + + return status; } // Try allocating a chunk. If eviction was required, @@ -2291,7 +2303,7 @@ NvU64 uvm_va_block_page_size_gpu(uvm_va_block_t *va_block, uvm_gpu_id_t gpu_id, if (gpu_state->pte_is_2m) return UVM_PAGE_SIZE_2M; - big_page_size = uvm_va_block_gpu_big_page_size(va_block, block_get_gpu(va_block, gpu_id)); + big_page_size = uvm_va_block_gpu_big_page_size(va_block, uvm_gpu_get(gpu_id)); big_page_index = uvm_va_block_big_page_index(va_block, page_index, big_page_size); if (big_page_index != MAX_BIG_PAGES_PER_UVM_VA_BLOCK && test_bit(big_page_index, gpu_state->big_ptes)) return big_page_size; @@ -2324,7 +2336,7 @@ static NvU64 block_phys_page_size(uvm_va_block_t *block, block_phys_page_t page) return 0; UVM_ASSERT(uvm_processor_mask_test(&block->resident, page.processor)); - block_gpu_chunk_index(block, block_get_gpu(block, page.processor), page.page_index, &chunk_size); + block_gpu_chunk_index(block, uvm_gpu_get(page.processor), page.page_index, &chunk_size); return chunk_size; } @@ -2417,7 +2429,7 @@ static uvm_page_mask_t *block_resident_mask_get_alloc(uvm_va_block_t *block, uvm if (UVM_ID_IS_CPU(processor)) return uvm_va_block_resident_mask_get(block, processor, nid); - gpu_state = block_gpu_state_get_alloc(block, block_get_gpu(block, processor)); + gpu_state = block_gpu_state_get_alloc(block, uvm_gpu_get(processor)); if (!gpu_state) return NULL; @@ -2495,7 +2507,7 @@ static bool block_processor_page_is_populated(uvm_va_block_t *block, uvm_process if (!gpu_state) return false; - chunk_index = block_gpu_chunk_index(block, block_get_gpu(block, proc), page_index, NULL); + chunk_index = block_gpu_chunk_index(block, uvm_gpu_get(proc), page_index, NULL); return gpu_state->chunks[chunk_index] != NULL; } @@ -2705,7 +2717,7 @@ static uvm_processor_id_t block_gpu_get_processor_to_map(uvm_va_block_t *block, // UVM-Lite GPUs can only map pages on the preferred location if (uvm_processor_mask_test(block_get_uvm_lite_gpus(block), gpu->id)) - return uvm_va_range_get_policy(block->va_range)->preferred_location; + return block->managed_range->policy.preferred_location; // Otherwise we always map the closest resident processor dest_id = uvm_va_block_page_get_closest_resident(block, block_context, page_index, gpu->id); @@ -2723,7 +2735,7 @@ static uvm_processor_id_t block_get_processor_to_map(uvm_va_block_t *block, if (UVM_ID_IS_CPU(mapping_id)) return uvm_va_block_page_get_closest_resident(block, block_context, page_index, mapping_id); - return block_gpu_get_processor_to_map(block, block_context, block_get_gpu(block, mapping_id), page_index); + return block_gpu_get_processor_to_map(block, block_context, uvm_gpu_get(mapping_id), page_index); } static void block_get_mapped_processors(uvm_va_block_t *block, @@ -2764,8 +2776,8 @@ static bool block_check_mapping_residency_region(uvm_va_block_t *block, "VA 0x%llx on %s: mapping %s, supposed to map %s", va, uvm_gpu_name(gpu), - block_processor_name(block, mapping_dest), - block_processor_name(block, proc_to_map)); + uvm_processor_get_name(mapping_dest), + uvm_processor_get_name(proc_to_map)); } return true; } @@ -3079,7 +3091,7 @@ static NV_STATUS block_populate_pages(uvm_va_block_t *block, if (!tmp_processor_mask) return NV_ERR_NO_MEMORY; - status = block_populate_pages_gpu(block, retry, block_get_gpu(block, dest_id), region, populate_page_mask); + status = block_populate_pages_gpu(block, retry, uvm_gpu_get(dest_id), region, populate_page_mask); if (status != NV_OK) { uvm_processor_mask_cache_free(tmp_processor_mask); return status; @@ -3138,7 +3150,7 @@ static bool block_can_copy_from(uvm_va_block_t *va_block, uvm_processor_id_t fro // within the chunk. static uvm_gpu_chunk_t *block_phys_page_chunk(uvm_va_block_t *block, block_phys_page_t block_page, size_t *chunk_offset) { - uvm_gpu_t *gpu = block_get_gpu(block, block_page.processor); + uvm_gpu_t *gpu = uvm_gpu_get(block_page.processor); uvm_va_block_gpu_state_t *gpu_state = uvm_va_block_gpu_state_get(block, block_page.processor); size_t chunk_index; uvm_gpu_chunk_t *chunk; @@ -3194,7 +3206,7 @@ static uvm_gpu_phys_address_t block_phys_page_address(uvm_va_block_t *block, } else { uvm_gpu_phys_address_t phys_addr; - uvm_gpu_t *owning_gpu = block_get_gpu(block, block_page.processor); + uvm_gpu_t *owning_gpu = uvm_gpu_get(block_page.processor); uvm_va_space_t *va_space = uvm_va_block_get_va_space(block); UVM_ASSERT(uvm_va_space_peer_enabled(va_space, gpu, owning_gpu)); @@ -3221,8 +3233,8 @@ static uvm_gpu_address_t block_phys_page_copy_address(uvm_va_block_t *block, UVM_ASSERT_MSG(block_can_copy_from(block, gpu->id, block_page.processor), "from %s to %s\n", - block_processor_name(block, gpu->id), - block_processor_name(block, block_page.processor)); + uvm_processor_get_name(gpu->id), + uvm_processor_get_name(block_page.processor)); // CPU and local GPU accesses can rely on block_phys_page_address, but the // resulting physical address may need to be converted into virtual. @@ -3233,7 +3245,7 @@ static uvm_gpu_address_t block_phys_page_copy_address(uvm_va_block_t *block, // See the comments on the peer_identity_mappings_supported assignments in // the HAL for why we disable direct copies between peers. - owning_gpu = block_get_gpu(block, block_page.processor); + owning_gpu = uvm_gpu_get(block_page.processor); UVM_ASSERT(uvm_va_space_peer_enabled(va_space, gpu, owning_gpu)); @@ -3314,12 +3326,10 @@ static NV_STATUS block_copy_begin_push(uvm_va_block_t *va_block, UVM_ID_IS_GPU(dst_id)) { UVM_ASSERT_MSG(!uvm_id_equal(src_id, dst_id), "Unexpected copy to self, processor %s\n", - block_processor_name(va_block, src_id)); + uvm_processor_get_name(src_id)); } if (UVM_ID_IS_CPU(src_id) && UVM_ID_IS_CPU(dst_id)) { - uvm_va_space_t *va_space = uvm_va_block_get_va_space(va_block); - gpu = uvm_va_space_find_first_gpu_attached_to_cpu_node(va_space, copy_state->src.nid); if (!gpu) gpu = uvm_va_space_find_first_gpu(va_space); @@ -3327,41 +3337,41 @@ static NV_STATUS block_copy_begin_push(uvm_va_block_t *va_block, channel_type = UVM_CHANNEL_TYPE_CPU_TO_GPU; } else if (UVM_ID_IS_CPU(src_id)) { - gpu = block_get_gpu(va_block, dst_id); + gpu = uvm_gpu_get(dst_id); channel_type = UVM_CHANNEL_TYPE_CPU_TO_GPU; } else if (UVM_ID_IS_CPU(dst_id)) { - gpu = block_get_gpu(va_block, src_id); + gpu = uvm_gpu_get(src_id); channel_type = UVM_CHANNEL_TYPE_GPU_TO_CPU; } else { // For GPU to GPU copies, prefer to "push" the data from the source as // that works better at least for P2P over PCI-E. - gpu = block_get_gpu(va_block, src_id); + gpu = uvm_gpu_get(src_id); channel_type = UVM_CHANNEL_TYPE_GPU_TO_GPU; } UVM_ASSERT_MSG(block_can_copy_from(va_block, gpu->id, dst_id), "GPU %s dst %s src %s\n", - block_processor_name(va_block, gpu->id), - block_processor_name(va_block, dst_id), - block_processor_name(va_block, src_id)); + uvm_processor_get_name(gpu->id), + uvm_processor_get_name(dst_id), + uvm_processor_get_name(src_id)); UVM_ASSERT_MSG(block_can_copy_from(va_block, gpu->id, src_id), "GPU %s dst %s src %s\n", - block_processor_name(va_block, gpu->id), - block_processor_name(va_block, dst_id), - block_processor_name(va_block, src_id)); + uvm_processor_get_name(gpu->id), + uvm_processor_get_name(dst_id), + uvm_processor_get_name(src_id)); if (channel_type == UVM_CHANNEL_TYPE_GPU_TO_GPU) { - uvm_gpu_t *dst_gpu = block_get_gpu(va_block, dst_id); + uvm_gpu_t *dst_gpu = uvm_gpu_get(dst_id); return uvm_push_begin_acquire_gpu_to_gpu(gpu->channel_manager, dst_gpu, tracker, push, "Copy from %s to %s for block [0x%llx, 0x%llx]", - block_processor_name(va_block, src_id), - block_processor_name(va_block, dst_id), + uvm_processor_get_name(src_id), + uvm_processor_get_name(dst_id), va_block->start, va_block->end); } @@ -3401,8 +3411,8 @@ static NV_STATUS block_copy_begin_push(uvm_va_block_t *va_block, tracker_ptr, push, "Copy from %s to %s for block [0x%llx, 0x%llx]", - block_processor_name(va_block, src_id), - block_processor_name(va_block, dst_id), + uvm_processor_get_name(src_id), + uvm_processor_get_name(dst_id), va_block->start, va_block->end); @@ -3426,10 +3436,10 @@ static bool block_page_is_clean(uvm_va_block_t *block, uvm_page_index_t page_index) { return !uvm_va_block_is_hmm(block) && - uvm_va_policy_preferred_location_equal(uvm_va_range_get_policy(block->va_range), dst_id, dst_nid) && + uvm_va_policy_preferred_location_equal(&block->managed_range->policy, dst_id, dst_nid) && UVM_ID_IS_CPU(src_id) && !UVM_ID_IS_CPU(dst_id) && - !block_get_gpu(block, dst_id)->parent->isr.replayable_faults.handling && + !uvm_gpu_get(dst_id)->parent->isr.replayable_faults.handling && !block_cpu_page_is_dirty(block, page_index, src_nid); } @@ -3448,7 +3458,7 @@ static void block_update_page_dirty_state(uvm_va_block_t *block, if (UVM_ID_IS_GPU(dst_id)) return; - policy = uvm_va_range_get_policy(block->va_range); + policy = &block->managed_range->policy; if (uvm_va_policy_preferred_location_equal(policy, src_id, src_nid)) block_mark_cpu_page_clean(block, page_index, dst_nid); else @@ -3462,7 +3472,7 @@ static void block_mark_memory_used(uvm_va_block_t *block, uvm_processor_id_t id) if (UVM_ID_IS_CPU(id)) return; - gpu = block_get_gpu(block, id); + gpu = uvm_gpu_get(id); // If the block is of the max size and the GPU supports eviction, mark the // root chunk as used in PMM. @@ -3498,7 +3508,7 @@ static void block_clear_resident_processor(uvm_va_block_t *block, uvm_processor_ if (UVM_ID_IS_CPU(id)) return; - gpu = block_get_gpu(block, id); + gpu = uvm_gpu_get(id); // If the block is of the max size and the GPU supports eviction, mark the // root chunk as unused in PMM. @@ -3535,7 +3545,7 @@ static bool is_block_phys_contig(uvm_va_block_t *block, uvm_processor_id_t id, i uvm_cpu_chunk_t *chunk; if (UVM_ID_IS_GPU(id)) - return uvm_va_block_size(block) == block_gpu_chunk_size(block, block_get_gpu(block, id), 0); + return uvm_va_block_size(block) == block_gpu_chunk_size(block, uvm_gpu_get(id), 0); UVM_ASSERT(nid != NUMA_NO_NODE); chunk = uvm_cpu_chunk_first_in_region(block, uvm_va_block_region_from_block(block), nid, NULL); @@ -3555,7 +3565,7 @@ static uvm_va_block_region_t block_phys_contig_region(uvm_va_block_t *block, } else { uvm_chunk_size_t chunk_size; - (void)block_gpu_chunk_index(block, block_get_gpu(block, resident_id), page_index, &chunk_size); + (void)block_gpu_chunk_index(block, uvm_gpu_get(resident_id), page_index, &chunk_size); return uvm_va_block_chunk_region(block, chunk_size, page_index); } } @@ -3673,6 +3683,7 @@ static void conf_computing_block_copy_push_gpu_to_cpu(uvm_va_block_t *block, uvm_gpu_address_t staging_buffer = uvm_mem_gpu_address_virtual_kernel(dma_buffer->alloc, gpu); uvm_gpu_address_t auth_tag_buffer = uvm_mem_gpu_address_virtual_kernel(dma_buffer->auth_tag, gpu); uvm_gpu_address_t src_address = block_copy_get_address(block, ©_state->src, page_index, gpu); + NvU32 key_version = uvm_channel_pool_key_version(push->channel->pool); UVM_ASSERT(UVM_ID_IS_GPU(copy_state->src.id)); UVM_ASSERT(UVM_ID_IS_CPU(copy_state->dst.id)); @@ -3690,7 +3701,8 @@ static void conf_computing_block_copy_push_gpu_to_cpu(uvm_va_block_t *block, // crypto-operations and it only guarantees PAGE_SIZE contiguity, all // encryptions and decryptions must happen on a PAGE_SIZE basis. for_each_va_block_page_in_region(page_index, region) { - uvm_conf_computing_log_gpu_encryption(push->channel, &dma_buffer->decrypt_iv[page_index]); + uvm_conf_computing_log_gpu_encryption(push->channel, PAGE_SIZE, &dma_buffer->decrypt_iv[page_index]); + dma_buffer->key_version[page_index] = key_version; // All but the first encryption can be pipelined. The first encryption // uses the caller's pipelining settings. @@ -3749,7 +3761,8 @@ static NV_STATUS conf_computing_copy_pages_finish(uvm_va_block_t *block, status = uvm_conf_computing_cpu_decrypt(push->channel, cpu_page_address, staging_buffer, - &dma_buffer->decrypt_iv[page_index], + dma_buffer->decrypt_iv + page_index, + dma_buffer->key_version[page_index], PAGE_SIZE, auth_tag_buffer); kunmap(dst_page); @@ -3933,7 +3946,7 @@ static NV_STATUS block_copy_resident_pages_between(uvm_va_block_t *block, cause == UVM_MAKE_RESIDENT_CAUSE_NON_REPLAYABLE_FAULT || cause == UVM_MAKE_RESIDENT_CAUSE_ACCESS_COUNTER) && !!prefetch_page_mask; block_copy_state_t copy_state = {0}; - uvm_va_range_t *va_range = block->va_range; + uvm_va_range_managed_t *managed_range = block->managed_range; uvm_va_space_t *va_space = uvm_va_block_get_va_space(block); uvm_va_block_region_t contig_region = {0}; NvU64 cpu_migration_begin_timestamp = 0; @@ -3987,7 +4000,7 @@ static NV_STATUS block_copy_resident_pages_between(uvm_va_block_t *block, // the use of range_group's migrated_ranges list is a UVM-Lite // optimization - eviction is not supported on UVM-Lite GPUs. if (cause != UVM_MAKE_RESIDENT_CAUSE_EVICTION && !uvm_va_block_is_hmm(block) && - uvm_va_policy_preferred_location_equal(uvm_va_range_get_policy(va_range), src_id, src_nid)) { + uvm_va_policy_preferred_location_equal(&managed_range->policy, src_id, src_nid)) { // rgr_has_changed is used to minimize the number of times the // migrated_ranges_lock is taken. It is set to false when the range // group range pointed by rgr is added to the migrated_ranges list, @@ -4052,7 +4065,14 @@ static NV_STATUS block_copy_resident_pages_between(uvm_va_block_t *block, // receive the "main" cause for the migration (it mainly checks if // we are in the eviction path). Therefore, we pass cause instead // of contig_cause - uvm_tools_record_block_migration_begin(block, &push, dst_id, src_id, page_start, cause); + uvm_tools_record_block_migration_begin(block, + &push, + dst_id, + copy_state.dst.nid, + src_id, + copy_state.src.nid, + page_start, + cause); } } else { @@ -4308,8 +4328,6 @@ static NV_STATUS block_copy_resident_pages_mask(uvm_va_block_t *block, uvm_processor_mask_copy(search_mask, src_processor_mask); for_each_closest_id(src_id, search_mask, dst_id, va_space) { - NV_STATUS status; - if (UVM_ID_IS_CPU(src_id)) { int nid; @@ -4465,7 +4483,9 @@ static void block_select_cpu_node_pages(uvm_va_block_t *block, block_context->scratch_node_mask = node_possible_map; uvm_page_mask_init_from_region(scratch_page_mask, region, page_mask); - for_each_closest_uvm_node(nid, uvm_va_block_context_get_node(block_context), block_context->scratch_node_mask) { + for_each_closest_uvm_node(nid, + uvm_va_block_context_get_node(block, region, block_context), + block_context->scratch_node_mask) { node_state = block_node_state_get(block, nid); node_mask = block_tracking_node_mask_get(block_context, nid); if (uvm_page_mask_and(node_mask, scratch_page_mask, &node_state->allocated)) { @@ -4695,7 +4715,7 @@ NV_STATUS uvm_va_block_make_resident_copy(uvm_va_block_t *va_block, } uvm_assert_mutex_locked(&va_block->lock); - UVM_ASSERT(uvm_va_block_is_hmm(va_block) || va_block->va_range->type == UVM_VA_RANGE_TYPE_MANAGED); + UVM_ASSERT(uvm_va_block_is_hmm(va_block) || va_block->managed_range); unmap_processor_mask = uvm_processor_mask_cache_alloc(); if (!unmap_processor_mask) { @@ -5142,7 +5162,7 @@ static uvm_prot_t block_page_prot(uvm_va_block_t *block, uvm_processor_id_t id, if (UVM_ID_IS_CPU(id)) return block_page_prot_cpu(block, page_index); else - return block_page_prot_gpu(block, block_get_gpu(block, id), page_index); + return block_page_prot_gpu(block, uvm_gpu_get(id), page_index); } // Returns true if the block has any valid CPU PTE mapping in the block region. @@ -5181,7 +5201,7 @@ static bool block_check_gpu_chunks(uvm_va_block_t *block, uvm_gpu_id_t id) if (!gpu_state) return true; - gpu = block_get_gpu(block, id); + gpu = uvm_gpu_get(id); num_chunks = block_num_gpu_chunks(block, gpu); for (page_index = 0, i = 0; i < num_chunks; i++) { @@ -5275,10 +5295,10 @@ static bool block_check_mappings_page(uvm_va_block_t *block, uvm_processor_mask_t *residency_accessible_from; uvm_processor_mask_t *residency_has_native_atomics; uvm_processor_id_t residency, id; - uvm_va_range_t *va_range = block->va_range; + uvm_va_range_managed_t *managed_range = block->managed_range; uvm_va_space_t *va_space = uvm_va_block_get_va_space(block); - uvm_processor_id_t preferred_location = va_range ? - uvm_va_range_get_policy(va_range)->preferred_location : + uvm_processor_id_t preferred_location = managed_range ? + managed_range->policy.preferred_location : UVM_ID_INVALID; const uvm_processor_mask_t *uvm_lite_gpus = block_get_uvm_lite_gpus(block); mapping_masks_t *mapping_masks = uvm_kvmalloc(sizeof(*mapping_masks)); @@ -5421,7 +5441,7 @@ static bool block_check_mappings_page(uvm_va_block_t *block, "Not all processors have access to %s\n" "Resident: 0x%lx - Mappings R: 0x%lx W: 0x%lx A: 0x%lx -" "Access: 0x%lx - Native Atomics: 0x%lx - SWA: 0x%lx\n", - uvm_va_space_processor_name(va_space, residency), + uvm_processor_get_name(residency), *resident_processors->bitmap, *read_mappings->bitmap, *write_mappings->bitmap, @@ -5463,7 +5483,7 @@ static bool block_check_mappings_page(uvm_va_block_t *block, "Too many write mappings to %s from processors with non-native atomics\n" "Resident: 0x%lx - Mappings R: 0x%lx W: 0x%lx A: 0x%lx -" "Access: 0x%lx - Native Atomics: 0x%lx - SWA: 0x%lx\n", - uvm_va_space_processor_name(va_space, residency), + uvm_processor_get_name(residency), *resident_processors->bitmap, *read_mappings->bitmap, *write_mappings->bitmap, @@ -5477,7 +5497,7 @@ static bool block_check_mappings_page(uvm_va_block_t *block, "Too many atomics mappings to %s from processors with non-native atomics\n" "Resident: 0x%lx - Mappings R: 0x%lx W: 0x%lx A: 0x%lx -" "Access: 0x%lx - Native Atomics: 0x%lx - SWA: 0x%lx\n", - uvm_va_space_processor_name(va_space, residency), + uvm_processor_get_name(residency), *resident_processors->bitmap, *read_mappings->bitmap, *write_mappings->bitmap, @@ -5499,7 +5519,7 @@ static bool block_check_mappings_page(uvm_va_block_t *block, "atomic mappings to %s from processors native and non-native\n" "Resident: 0x%lx - Mappings R: 0x%lx W: 0x%lx A: 0x%lx -" "Access: 0x%lx - Native Atomics: 0x%lx - SWA: 0x%lx\n", - uvm_va_space_processor_name(va_space, residency), + uvm_processor_get_name(residency), *resident_processors->bitmap, *read_mappings->bitmap, *write_mappings->bitmap, @@ -5719,7 +5739,7 @@ static bool block_check_mappings(uvm_va_block_t *block, uvm_va_block_context_t * UVM_ASSERT(!uvm_page_mask_intersects(evicted_mask, resident_mask)); // Pages cannot be resident on a GPU with no memory - if (!block_processor_has_memory(block, id)) + if (!uvm_processor_has_memory(id)) UVM_ASSERT(!uvm_processor_mask_test(&block->resident, id)); } } @@ -5730,7 +5750,7 @@ static bool block_check_mappings(uvm_va_block_t *block, uvm_va_block_context_t * for_each_gpu_id(id) { if (uvm_va_block_gpu_state_get(block, id)) { - uvm_gpu_t *gpu = block_get_gpu(block, id); + uvm_gpu_t *gpu = uvm_gpu_get(id); // Check big and/or 2M PTE state block_check_mappings_ptes(block, block_context, gpu); @@ -5825,7 +5845,9 @@ static bool block_has_remote_mapping_gpu(uvm_va_block_t *block, if (uvm_page_mask_empty(mapped_pages)) return false; - return !uvm_va_policy_preferred_location_equal(uvm_va_range_get_policy(block->va_range), gpu_id, NUMA_NO_NODE); + return !uvm_va_policy_preferred_location_equal(&block->managed_range->policy, + gpu_id, + NUMA_NO_NODE); } // Remote pages are pages which are mapped but not resident locally @@ -7832,7 +7854,7 @@ NV_STATUS uvm_va_block_unmap(uvm_va_block_t *va_block, uvm_page_mask_init_from_region(region_page_mask, region, unmap_page_mask); - return block_unmap_gpu(va_block, va_block_context, block_get_gpu(va_block, id), region_page_mask, out_tracker); + return block_unmap_gpu(va_block, va_block_context, uvm_gpu_get(id), region_page_mask, out_tracker); } // This function essentially works as a wrapper around vm_insert_page (hence @@ -7901,18 +7923,16 @@ static uvm_prot_t compute_logical_prot(uvm_va_block_t *va_block, logical_prot = uvm_hmm_compute_logical_prot(va_block, hmm_vma, addr); } else { - uvm_va_range_t *va_range = va_block->va_range; - - UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_MANAGED); + uvm_va_range_managed_t *managed_range = va_block->managed_range; // Zombified VA ranges no longer have a vma, so they have no permissions - if (uvm_va_range_is_managed_zombie(va_range)) { + if (uvm_va_range_is_managed_zombie(&managed_range->va_range)) { logical_prot = UVM_PROT_NONE; } else { struct vm_area_struct *vma; - vma = uvm_va_range_vma(va_range); + vma = uvm_va_range_vma(managed_range); if (!(vma->vm_flags & VM_READ)) logical_prot = UVM_PROT_NONE; @@ -7934,11 +7954,12 @@ static struct page *block_page_get(uvm_va_block_t *block, block_phys_page_t bloc page = uvm_va_block_get_cpu_page(block, block_page.page_index); } else { - uvm_va_space_t *va_space = uvm_va_block_get_va_space(block); - uvm_gpu_t *gpu = uvm_va_space_get_gpu(va_space, block_page.processor); + uvm_gpu_t *gpu = uvm_gpu_get(block_page.processor); size_t chunk_offset; uvm_gpu_chunk_t *chunk = block_phys_page_chunk(block, block_page, &chunk_offset); + UVM_ASSERT(gpu); + UVM_ASSERT(uvm_id_equal(gpu->id, block_page.processor)); UVM_ASSERT(gpu->mem_info.numa.enabled); page = uvm_gpu_chunk_to_page(&gpu->pmm, chunk) + chunk_offset / PAGE_SIZE; } @@ -7975,7 +7996,7 @@ static NV_STATUS block_map_cpu_page_to(uvm_va_block_t *block, uvm_prot_t new_prot) { uvm_prot_t curr_prot = block_page_prot_cpu(block, page_index); - uvm_va_range_t *va_range = block->va_range; + uvm_va_range_managed_t *managed_range = block->managed_range; uvm_va_space_t *va_space = uvm_va_block_get_va_space(block); struct vm_area_struct *vma; NV_STATUS status; @@ -7983,7 +8004,7 @@ static NV_STATUS block_map_cpu_page_to(uvm_va_block_t *block, struct page *page; int nid = NUMA_NO_NODE; - UVM_ASSERT((uvm_va_block_is_hmm(block) && hmm_vma) || va_range->type == UVM_VA_RANGE_TYPE_MANAGED); + UVM_ASSERT((uvm_va_block_is_hmm(block) && hmm_vma) || managed_range); UVM_ASSERT(new_prot != UVM_PROT_NONE); UVM_ASSERT(new_prot < UVM_PROT_MAX); UVM_ASSERT(uvm_processor_mask_test(&va_space->accessible_from[uvm_id_value(resident_id)], UVM_ID_CPU)); @@ -8012,10 +8033,10 @@ static NV_STATUS block_map_cpu_page_to(uvm_va_block_t *block, return NV_OK; } - UVM_ASSERT(va_range); + UVM_ASSERT(managed_range); if (UVM_ID_IS_CPU(resident_id)) { - if (UVM_ID_IS_CPU(uvm_va_range_get_policy(va_range)->preferred_location)) { + if (UVM_ID_IS_CPU(managed_range->policy.preferred_location)) { // Add the page's range group range to the range group's migrated list. uvm_range_group_range_t *rgr = uvm_range_group_range_find(va_space, uvm_va_block_cpu_page_address(block, page_index)); @@ -8038,7 +8059,7 @@ static NV_STATUS block_map_cpu_page_to(uvm_va_block_t *block, // In such cases the caller has taken care of ref counting vma->vm_mm for // us, so we can safely operate on the vma but we can't use // uvm_va_range_vma_current. - vma = uvm_va_range_vma(va_range); + vma = uvm_va_range_vma(managed_range); uvm_assert_mmap_lock_locked(vma->vm_mm); UVM_ASSERT(!uvm_va_space_mm_enabled(va_space) || va_space->va_space_mm.mm == vma->vm_mm); @@ -8188,7 +8209,7 @@ static NV_STATUS block_map_gpu_to(uvm_va_block_t *va_block, UVM_ASSERT(uvm_processor_mask_test(&va_space->accessible_from[uvm_id_value(resident_id)], gpu->id)); if (uvm_processor_mask_test(block_get_uvm_lite_gpus(va_block), gpu->id)) { - uvm_va_policy_t *policy = uvm_va_range_get_policy(va_block->va_range); + uvm_va_policy_t *policy = &va_block->managed_range->policy; UVM_ASSERT(uvm_va_policy_preferred_location_equal(policy, resident_id, policy->preferred_nid)); } @@ -8318,7 +8339,7 @@ static void map_get_allowed_destinations(uvm_va_block_t *block, (uvm_id_equal(policy->preferred_location, id) && !is_uvm_fault_force_sysmem_set() && !uvm_hmm_must_use_sysmem(block, va_block_context->hmm.vma))) && - uvm_va_space_processor_has_memory(va_space, id)) { + uvm_processor_has_memory(id)) { // When operating under read-duplication we should only map the local // processor to cause fault-and-duplicate of remote pages. // @@ -8371,7 +8392,7 @@ NV_STATUS uvm_va_block_map(uvm_va_block_t *va_block, uvm_pte_bits_cpu_t prot_pte_bit; // Check if the current thread is allowed to call vm_insert_page - if (!uvm_va_block_is_hmm(va_block) && !uvm_va_range_vma_check(va_block->va_range, va_block_context->mm)) + if (!uvm_va_block_is_hmm(va_block) && !uvm_va_range_vma_check(va_block->managed_range, va_block_context->mm)) return NV_OK; prot_pte_bit = get_cpu_pte_bit_index(new_prot); @@ -8381,7 +8402,7 @@ NV_STATUS uvm_va_block_map(uvm_va_block_t *va_block, uvm_va_block_gpu_state_t *gpu_state; uvm_pte_bits_gpu_t prot_pte_bit; - gpu = uvm_va_space_get_gpu(va_space, id); + gpu = uvm_gpu_get(id); // Although this GPU UUID is registered in the VA space, it might not have a // GPU VA space registered. @@ -8692,7 +8713,7 @@ NV_STATUS uvm_va_block_revoke_prot(uvm_va_block_t *va_block, return NV_OK; } - gpu = uvm_va_space_get_gpu(va_space, id); + gpu = uvm_gpu_get(id); // UVM-Lite GPUs should never have access revoked UVM_ASSERT_MSG(!uvm_processor_mask_test(block_get_uvm_lite_gpus(va_block), gpu->id), @@ -8719,13 +8740,13 @@ NV_STATUS uvm_va_block_revoke_prot(uvm_va_block_t *va_block, uvm_processor_mask_copy(resident_procs, &va_block->resident); for_each_closest_id(resident_id, resident_procs, gpu->id, va_space) { - NV_STATUS status = block_revoke_prot_gpu_to(va_block, - va_block_context, - gpu, - resident_id, - running_page_mask, - prot_to_revoke, - out_tracker); + status = block_revoke_prot_gpu_to(va_block, + va_block_context, + gpu, + resident_id, + running_page_mask, + prot_to_revoke, + out_tracker); if (status != NV_OK) break; @@ -8889,7 +8910,7 @@ static void block_destroy_gpu_state(uvm_va_block_t *block, uvm_va_block_context_ uvm_assert_mutex_locked(&block->lock); // Unmap PTEs and free page tables - gpu = uvm_va_space_get_gpu(va_space, id); + gpu = uvm_gpu_get(id); gpu_va_space = uvm_gpu_va_space_get(va_space, gpu); if (gpu_va_space) uvm_va_block_remove_gpu_va_space(block, gpu_va_space, block_context); @@ -9101,13 +9122,13 @@ void uvm_va_block_disable_peer(uvm_va_block_t *va_block, uvm_gpu_t *gpu0, uvm_gp void uvm_va_block_unmap_preferred_location_uvm_lite(uvm_va_block_t *va_block, uvm_gpu_t *gpu) { NV_STATUS status; - uvm_va_range_t *va_range = va_block->va_range; + uvm_va_range_managed_t *managed_range = va_block->managed_range; uvm_va_space_t *va_space = uvm_va_block_get_va_space(va_block); uvm_va_block_context_t *block_context = uvm_va_space_block_context(va_space, NULL); uvm_va_block_region_t region = uvm_va_block_region_from_block(va_block); uvm_assert_mutex_locked(&va_block->lock); - UVM_ASSERT(uvm_processor_mask_test(&va_range->uvm_lite_gpus, gpu->id)); + UVM_ASSERT(uvm_processor_mask_test(&managed_range->va_range.uvm_lite_gpus, gpu->id)); // If the GPU doesn't have GPU state then nothing could be mapped. if (!uvm_va_block_gpu_state_get(va_block, gpu->id)) @@ -9343,7 +9364,7 @@ static void block_kill(uvm_va_block_t *block) if (uvm_va_block_is_hmm(block)) uvm_va_policy_clear(block, block->start, block->end); - block->va_range = NULL; + block->managed_range = NULL; #if UVM_IS_CONFIG_HMM() block->hmm.va_space = NULL; #endif @@ -9537,7 +9558,7 @@ static NV_STATUS block_split_presplit_ptes(uvm_va_block_t *existing, uvm_va_bloc if (!uvm_va_block_gpu_state_get(existing, id)) continue; - gpu = block_get_gpu(existing, id); + gpu = uvm_gpu_get(id); if (block_gpu_has_page_tables(existing, gpu)) { status = block_split_presplit_ptes_gpu(existing, new, gpu); @@ -9757,7 +9778,7 @@ static NV_STATUS block_split_cpu_chunk_one(uvm_va_block_t *block, uvm_page_index if (!uvm_va_block_gpu_state_get(block, id)) continue; - gpu = block_get_gpu(block, id); + gpu = uvm_gpu_get(id); // If the parent chunk has not been mapped, there is nothing to split. gpu_mapping_addr = uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu); @@ -9781,7 +9802,7 @@ static NV_STATUS block_split_cpu_chunk_one(uvm_va_block_t *block, uvm_page_index if (status != NV_OK) { merge: for_each_gpu_id_in_mask(id, gpu_split_mask) { - gpu = block_get_gpu(block, id); + gpu = uvm_gpu_get(id); gpu_mapping_addr = uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu); uvm_pmm_sysmem_mappings_merge_gpu_mappings(&gpu->pmm_reverse_sysmem_mappings, gpu_mapping_addr, @@ -9967,7 +9988,7 @@ static void block_merge_cpu_chunks_one(uvm_va_block_t *block, uvm_page_index_t p if (!uvm_va_block_gpu_state_get(block, id)) continue; - gpu = block_get_gpu(block, id); + gpu = uvm_gpu_get(id); gpu_mapping_addr = uvm_cpu_chunk_get_gpu_phys_addr(chunk, gpu); if (gpu_mapping_addr == 0) continue; @@ -10052,7 +10073,7 @@ static NV_STATUS block_split_preallocate_no_retry(uvm_va_block_t *existing, uvm_ if (!uvm_va_block_gpu_state_get(existing, id)) continue; - gpu = block_get_gpu(existing, id); + gpu = uvm_gpu_get(id); status = block_presplit_gpu_chunks(existing, new, gpu); if (status != NV_OK) @@ -10068,8 +10089,8 @@ static NV_STATUS block_split_preallocate_no_retry(uvm_va_block_t *existing, uvm_ if (block_test && block_test->inject_split_error) { block_test->inject_split_error = false; if (!uvm_va_block_is_hmm(existing)) { - UVM_ASSERT(existing->va_range->inject_split_error); - existing->va_range->inject_split_error = false; + UVM_ASSERT(existing->managed_range->va_range.inject_split_error); + existing->managed_range->va_range.inject_split_error = false; } status = NV_ERR_NO_MEMORY; goto error; @@ -10100,7 +10121,7 @@ static NV_STATUS block_split_preallocate_no_retry(uvm_va_block_t *existing, uvm_ continue; // If the chunk spanning the split point was split, merge it back - gpu = block_get_gpu(existing, id); + gpu = uvm_gpu_get(id); chunk_index = block_gpu_chunk_index(existing, gpu, split_page_index, NULL); chunk = existing_gpu_state->chunks[chunk_index]; if (!chunk || chunk->state != UVM_PMM_GPU_CHUNK_STATE_IS_SPLIT) @@ -10206,14 +10227,8 @@ static void block_split_cpu(uvm_va_block_t *existing, uvm_va_block_t *new) uvm_page_index_t page_index; uvm_page_index_t next_page_index; uvm_cpu_chunk_t *chunk; - uvm_va_range_t *existing_va_range = existing->va_range; int nid; - if (existing_va_range) { - UVM_ASSERT(existing->va_range->type == UVM_VA_RANGE_TYPE_MANAGED); - UVM_ASSERT(existing->va_range->type == new->va_range->type); - } - UVM_ASSERT(existing->start < new->start); UVM_ASSERT(existing->end == new->end); @@ -10406,7 +10421,7 @@ static void block_split_gpu(uvm_va_block_t *existing, uvm_va_block_t *new, uvm_g if (!existing_gpu_state) return; - gpu = uvm_va_space_get_gpu(va_space, gpu_id); + gpu = uvm_gpu_get(gpu_id); UVM_ASSERT(new_gpu_state); new_gpu_state->force_4k_ptes = existing_gpu_state->force_4k_ptes; @@ -10519,27 +10534,24 @@ static void block_split_gpu(uvm_va_block_t *existing, uvm_va_block_t *new, uvm_g NV_STATUS uvm_va_block_split(uvm_va_block_t *existing_va_block, NvU64 new_end, uvm_va_block_t **new_va_block, - uvm_va_range_t *new_va_range) + uvm_va_range_managed_t *new_managed_range) { uvm_va_space_t *va_space; uvm_va_block_t *new_block = NULL; NV_STATUS status; - va_space = new_va_range->va_space; - UVM_ASSERT(existing_va_block->va_range); - UVM_ASSERT(existing_va_block->va_range->va_space == va_space); + va_space = new_managed_range->va_range.va_space; + UVM_ASSERT(existing_va_block->managed_range); + UVM_ASSERT(existing_va_block->managed_range->va_range.va_space == va_space); UVM_ASSERT(!uvm_va_block_is_hmm(existing_va_block)); - // External range types can't be split - UVM_ASSERT(existing_va_block->va_range->type == UVM_VA_RANGE_TYPE_MANAGED); - UVM_ASSERT(new_va_range->type == UVM_VA_RANGE_TYPE_MANAGED); uvm_assert_rwsem_locked_write(&va_space->lock); UVM_ASSERT(new_end > existing_va_block->start); UVM_ASSERT(new_end < existing_va_block->end); UVM_ASSERT(PAGE_ALIGNED(new_end + 1)); - status = uvm_va_block_create(new_va_range, new_end + 1, existing_va_block->end, &new_block); + status = uvm_va_block_create(new_managed_range, new_end + 1, existing_va_block->end, &new_block); if (status != NV_OK) return status; @@ -10551,7 +10563,7 @@ NV_STATUS uvm_va_block_split(uvm_va_block_t *existing_va_block, // that it should use the newly-split block instead. uvm_mutex_lock(&existing_va_block->lock); - status = uvm_va_block_split_locked(existing_va_block, new_end, new_block, new_va_range); + status = uvm_va_block_split_locked(existing_va_block, new_end, new_block); uvm_mutex_unlock(&existing_va_block->lock); @@ -10565,8 +10577,7 @@ NV_STATUS uvm_va_block_split(uvm_va_block_t *existing_va_block, NV_STATUS uvm_va_block_split_locked(uvm_va_block_t *existing_va_block, NvU64 new_end, - uvm_va_block_t *new_block, - uvm_va_range_t *new_va_range) + uvm_va_block_t *new_block) { uvm_va_space_t *va_space = uvm_va_block_get_va_space(existing_va_block); uvm_gpu_id_t id; @@ -10679,17 +10690,17 @@ static bool block_region_might_read_duplicate(uvm_va_block_t *va_block, uvm_va_block_region_t region) { uvm_va_space_t *va_space = uvm_va_block_get_va_space(va_block); - uvm_va_range_t *va_range = va_block->va_range; + uvm_va_range_managed_t *managed_range = va_block->managed_range; if (!uvm_va_space_can_read_duplicate(va_space, NULL)) return false; // TODO: Bug 3660922: need to implement HMM read duplication support. if (uvm_va_block_is_hmm(va_block) || - uvm_va_range_get_policy(va_range)->read_duplication == UVM_READ_DUPLICATION_DISABLED) + managed_range->policy.read_duplication == UVM_READ_DUPLICATION_DISABLED) return false; - if (uvm_va_range_get_policy(va_range)->read_duplication == UVM_READ_DUPLICATION_UNSET + if (managed_range->policy.read_duplication == UVM_READ_DUPLICATION_UNSET && uvm_page_mask_region_weight(&va_block->read_duplicated_pages, region) == 0) return false; @@ -10920,7 +10931,7 @@ NV_STATUS uvm_va_block_add_mappings_after_migration(uvm_va_block_t *va_block, preferred_location = policy->preferred_location; if (UVM_ID_IS_VALID(preferred_location) && !uvm_id_equal(new_residency, preferred_location) && - uvm_va_space_processor_has_memory(va_space, preferred_location)) { + uvm_processor_has_memory(preferred_location)) { uvm_processor_mask_clear(map_other_processors, preferred_location); } @@ -11101,7 +11112,7 @@ NV_STATUS uvm_va_block_add_mappings(uvm_va_block_t *va_block, const uvm_page_mask_t *page_mask, UvmEventMapRemoteCause cause) { - uvm_va_range_t *va_range = va_block->va_range; + uvm_va_range_managed_t *managed_range = va_block->managed_range; uvm_va_space_t *va_space = uvm_va_block_get_va_space(va_block); NV_STATUS status = NV_OK; uvm_page_index_t page_index; @@ -11109,7 +11120,7 @@ NV_STATUS uvm_va_block_add_mappings(uvm_va_block_t *va_block, uvm_prot_t prot_to_map; if (UVM_ID_IS_CPU(processor_id) && !uvm_va_block_is_hmm(va_block)) { - if (!uvm_va_range_vma_check(va_range, va_block_context->mm)) + if (!uvm_va_range_vma_check(managed_range, va_block_context->mm)) return NV_OK; uvm_range_group_range_migratability_iter_first(va_space, @@ -11280,7 +11291,7 @@ static uvm_processor_id_t block_select_processor_residency(uvm_va_block_t *va_bl if (uvm_id_equal(processor_id, preferred_location)) { if (thrashing_hint->type != UVM_PERF_THRASHING_HINT_TYPE_NONE) { UVM_ASSERT(thrashing_hint->type == UVM_PERF_THRASHING_HINT_TYPE_PIN); - if (uvm_va_space_processor_has_memory(va_space, processor_id)) + if (uvm_processor_has_memory(processor_id)) UVM_ASSERT(uvm_id_equal(thrashing_hint->pin.residency, processor_id)); } @@ -11459,7 +11470,7 @@ uvm_processor_id_t uvm_va_block_select_residency(uvm_va_block_t *va_block, read_duplicate); // If the intended residency doesn't have memory, fall back to the CPU. - if (!block_processor_has_memory(va_block, id)) { + if (!uvm_processor_has_memory(id)) { *read_duplicate = false; id = UVM_ID_CPU; } @@ -11896,16 +11907,16 @@ NV_STATUS uvm_va_block_service_finish(uvm_processor_id_t processor_id, // Map pages that are thrashing if (service_context->thrashing_pin_count > 0) { - uvm_page_index_t page_index; + uvm_page_index_t pinned_page_index; - for_each_va_block_page_in_region_mask(page_index, + for_each_va_block_page_in_region_mask(pinned_page_index, &service_context->thrashing_pin_mask, service_context->region) { uvm_processor_mask_t *map_thrashing_processors = NULL; - NvU64 page_addr = uvm_va_block_cpu_page_address(va_block, page_index); + NvU64 page_addr = uvm_va_block_cpu_page_address(va_block, pinned_page_index); // Check protection type - if (!uvm_page_mask_test(caller_page_mask, page_index)) + if (!uvm_page_mask_test(caller_page_mask, pinned_page_index)) continue; map_thrashing_processors = uvm_perf_thrashing_get_thrashing_processors(va_block, page_addr); @@ -11914,7 +11925,7 @@ NV_STATUS uvm_va_block_service_finish(uvm_processor_id_t processor_id, service_context->block_context, new_residency, processor_id, - uvm_va_block_region_for_page(page_index), + uvm_va_block_region_for_page(pinned_page_index), caller_page_mask, new_prot, map_thrashing_processors); @@ -12006,7 +12017,7 @@ NV_STATUS uvm_va_block_check_logical_permissions(uvm_va_block_t *va_block, uvm_fault_access_type_t access_type, bool allow_migration) { - uvm_va_range_t *va_range = va_block->va_range; + uvm_va_range_managed_t *managed_range = va_block->managed_range; uvm_prot_t access_prot = uvm_fault_access_type_to_prot(access_type); UVM_ASSERT(uvm_hmm_check_context_vma_is_valid(va_block, @@ -12019,7 +12030,7 @@ NV_STATUS uvm_va_block_check_logical_permissions(uvm_va_block_t *va_block, // it can also be called from change_pte. Make change_pte call this // function and only check CPU permissions here. if (UVM_ID_IS_GPU(processor_id)) { - if (va_range && uvm_va_range_is_managed_zombie(va_range)) + if (managed_range && uvm_va_range_is_managed_zombie(&managed_range->va_range)) return NV_ERR_INVALID_ADDRESS; // GPU faults only check vma permissions if a mm is registered with the @@ -12044,9 +12055,10 @@ NV_STATUS uvm_va_block_check_logical_permissions(uvm_va_block_t *va_block, } else { uvm_va_space_t *va_space = uvm_va_block_get_va_space(va_block); + uvm_processor_id_t preferred_location = managed_range->policy.preferred_location; return uvm_processor_mask_test( - &va_space->accessible_from[uvm_id_value(uvm_va_range_get_policy(va_range)->preferred_location)], + &va_space->accessible_from[uvm_id_value(preferred_location)], processor_id)? NV_OK : NV_ERR_INVALID_ACCESS_TYPE; } @@ -12128,12 +12140,21 @@ static NV_STATUS block_cpu_fault_locked(uvm_va_block_t *va_block, policy = uvm_va_policy_get(va_block, fault_addr); if (service_context->num_retries == 0) { + unsigned int cpu = get_cpu(); + + put_cpu(); // notify event to tools/performance heuristics + // Note that the CPU number is not guaranteed to be accurate since it + // is only a snapshot and Linux is free to change which CPU this thread + // is running on unless CPU affinity has been set to limit which CPUs + // this thread is allowed to to run on. + // TODO: Bug 4748153: UVM: avoid using incorrect CPU ID. uvm_perf_event_notify_cpu_fault(&va_space->perf_events, va_block, policy->preferred_location, fault_addr, fault_access_type > UVM_FAULT_ACCESS_TYPE_READ, + cpu, KSTK_EIP(current)); } @@ -12252,22 +12273,24 @@ NV_STATUS uvm_va_block_cpu_fault(uvm_va_block_t *va_block, NV_STATUS uvm_va_block_find(uvm_va_space_t *va_space, NvU64 addr, uvm_va_block_t **out_block) { + uvm_va_range_managed_t *managed_range; uvm_va_range_t *va_range; uvm_va_block_t *block; size_t index; va_range = uvm_va_range_find(va_space, addr); + managed_range = uvm_va_range_to_managed_or_null(va_range); if (!va_range) return uvm_hmm_va_block_find(va_space, addr, out_block); UVM_ASSERT(uvm_hmm_va_block_find(va_space, addr, out_block) == NV_ERR_INVALID_ADDRESS || uvm_hmm_va_block_find(va_space, addr, out_block) == NV_ERR_OBJECT_NOT_FOUND); - if (va_range->type != UVM_VA_RANGE_TYPE_MANAGED) + if (!managed_range) return NV_ERR_INVALID_ADDRESS; - index = uvm_va_range_block_index(va_range, addr); - block = uvm_va_range_block(va_range, index); + index = uvm_va_range_block_index(managed_range, addr); + block = uvm_va_range_block(managed_range, index); if (!block) return NV_ERR_OBJECT_NOT_FOUND; @@ -12280,6 +12303,7 @@ NV_STATUS uvm_va_block_find_create_in_range(uvm_va_space_t *va_space, NvU64 addr, uvm_va_block_t **out_block) { + uvm_va_range_managed_t *managed_range = uvm_va_range_to_managed_or_null(va_range); size_t index; if (uvm_enable_builtin_tests && atomic_dec_if_positive(&va_space->test.va_block_allocation_fail_nth) == 0) @@ -12292,11 +12316,11 @@ NV_STATUS uvm_va_block_find_create_in_range(uvm_va_space_t *va_space, UVM_ASSERT(uvm_hmm_va_block_find(va_space, addr, out_block) == NV_ERR_INVALID_ADDRESS || uvm_hmm_va_block_find(va_space, addr, out_block) == NV_ERR_OBJECT_NOT_FOUND); - if (va_range->type != UVM_VA_RANGE_TYPE_MANAGED) + if (!managed_range) return NV_ERR_INVALID_ADDRESS; - index = uvm_va_range_block_index(va_range, addr); - return uvm_va_range_block_create(va_range, index, out_block); + index = uvm_va_range_block_index(managed_range, addr); + return uvm_va_range_block_create(managed_range, index, out_block); } NV_STATUS uvm_va_block_find_create_managed(uvm_va_space_t *va_space, @@ -12327,125 +12351,6 @@ NV_STATUS uvm_va_block_find_create(uvm_va_space_t *va_space, return uvm_hmm_va_block_find_create(va_space, addr, hmm_vma, out_block); } -// Launch a synchronous, encrypted copy between GPU and CPU. -// -// The copy entails a GPU-side encryption (relying on the Copy Engine), and a -// CPU-side decryption step, such that the destination CPU buffer pointed by -// dst_plain will contain the unencrypted (plain text) contents. The destination -// buffer can be in protected or unprotected sysmem, while the source buffer -// must be in protected vidmem. -// -// The maximum copy size allowed is UVM_CONF_COMPUTING_DMA_BUFFER_SIZE. -// -// The input tracker, if not NULL, is internally acquired by the push -// responsible for the encrypted copy. -__attribute__ ((format(printf, 6, 7))) -static NV_STATUS encrypted_memcopy_gpu_to_cpu(uvm_gpu_t *gpu, - void *dst_plain, - uvm_gpu_address_t src_gpu_address, - size_t size, - uvm_tracker_t *tracker, - const char *format, - ...) -{ - NV_STATUS status; - UvmCslIv decrypt_iv; - uvm_push_t push; - uvm_conf_computing_dma_buffer_t *dma_buffer; - uvm_gpu_address_t dst_gpu_address, auth_tag_gpu_address; - void *src_cipher, *auth_tag; - va_list args; - - UVM_ASSERT(g_uvm_global.conf_computing_enabled); - UVM_ASSERT(size <= UVM_CONF_COMPUTING_DMA_BUFFER_SIZE); - - status = uvm_conf_computing_dma_buffer_alloc(&gpu->conf_computing.dma_buffer_pool, &dma_buffer, NULL); - if (status != NV_OK) - return status; - - va_start(args, format); - status = uvm_push_begin_acquire(gpu->channel_manager, UVM_CHANNEL_TYPE_GPU_TO_CPU, tracker, &push, format, args); - va_end(args); - - if (status != NV_OK) - goto out; - - uvm_conf_computing_log_gpu_encryption(push.channel, &decrypt_iv); - - dst_gpu_address = uvm_mem_gpu_address_virtual_kernel(dma_buffer->alloc, gpu); - auth_tag_gpu_address = uvm_mem_gpu_address_virtual_kernel(dma_buffer->auth_tag, gpu); - gpu->parent->ce_hal->encrypt(&push, dst_gpu_address, src_gpu_address, size, auth_tag_gpu_address); - - status = uvm_push_end_and_wait(&push); - if (status != NV_OK) - goto out; - - src_cipher = uvm_mem_get_cpu_addr_kernel(dma_buffer->alloc); - auth_tag = uvm_mem_get_cpu_addr_kernel(dma_buffer->auth_tag); - status = uvm_conf_computing_cpu_decrypt(push.channel, dst_plain, src_cipher, &decrypt_iv, size, auth_tag); - - out: - uvm_conf_computing_dma_buffer_free(&gpu->conf_computing.dma_buffer_pool, dma_buffer, NULL); - return status; -} - -// Launch a synchronous, encrypted copy between CPU and GPU. -// -// The source CPU buffer pointed by src_plain contains the unencrypted (plain -// text) contents; the function internally performs a CPU-side encryption step -// before launching the GPU-side CE decryption. The source buffer can be in -// protected or unprotected sysmem, while the destination buffer must be in -// protected vidmem. -// -// The maximum copy size allowed is UVM_CONF_COMPUTING_DMA_BUFFER_SIZE. -// -// The input tracker, if not NULL, is internally acquired by the push -// responsible for the encrypted copy. -__attribute__ ((format(printf, 6, 7))) -static NV_STATUS encrypted_memcopy_cpu_to_gpu(uvm_gpu_t *gpu, - uvm_gpu_address_t dst_gpu_address, - void *src_plain, - size_t size, - uvm_tracker_t *tracker, - const char *format, - ...) -{ - NV_STATUS status; - uvm_push_t push; - uvm_conf_computing_dma_buffer_t *dma_buffer; - uvm_gpu_address_t src_gpu_address, auth_tag_gpu_address; - void *dst_cipher, *auth_tag; - va_list args; - - UVM_ASSERT(g_uvm_global.conf_computing_enabled); - UVM_ASSERT(size <= UVM_CONF_COMPUTING_DMA_BUFFER_SIZE); - - status = uvm_conf_computing_dma_buffer_alloc(&gpu->conf_computing.dma_buffer_pool, &dma_buffer, NULL); - if (status != NV_OK) - return status; - - va_start(args, format); - status = uvm_push_begin_acquire(gpu->channel_manager, UVM_CHANNEL_TYPE_CPU_TO_GPU, tracker, &push, format, args); - va_end(args); - - if (status != NV_OK) - goto out; - - dst_cipher = uvm_mem_get_cpu_addr_kernel(dma_buffer->alloc); - auth_tag = uvm_mem_get_cpu_addr_kernel(dma_buffer->auth_tag); - uvm_conf_computing_cpu_encrypt(push.channel, dst_cipher, src_plain, NULL, size, auth_tag); - - src_gpu_address = uvm_mem_gpu_address_virtual_kernel(dma_buffer->alloc, gpu); - auth_tag_gpu_address = uvm_mem_gpu_address_virtual_kernel(dma_buffer->auth_tag, gpu); - gpu->parent->ce_hal->decrypt(&push, dst_gpu_address, src_gpu_address, size, auth_tag_gpu_address); - - status = uvm_push_end_and_wait(&push); - -out: - uvm_conf_computing_dma_buffer_free(&gpu->conf_computing.dma_buffer_pool, dma_buffer, NULL); - return status; -} - static NV_STATUS va_block_write_cpu_to_gpu(uvm_va_block_t *va_block, uvm_gpu_t *gpu, uvm_gpu_address_t dst_gpu_address, @@ -12458,14 +12363,14 @@ static NV_STATUS va_block_write_cpu_to_gpu(uvm_va_block_t *va_block, uvm_gpu_address_t src_gpu_address; if (g_uvm_global.conf_computing_enabled) { - return encrypted_memcopy_cpu_to_gpu(gpu, - dst_gpu_address, - uvm_mem_get_cpu_addr_kernel(src_mem), - size, - &va_block->tracker, - "Encrypted write to [0x%llx, 0x%llx)", - dst, - dst + size); + return uvm_conf_computing_util_memcopy_cpu_to_gpu(gpu, + dst_gpu_address, + uvm_mem_get_cpu_addr_kernel(src_mem), + size, + &va_block->tracker, + "Encrypted write to [0x%llx, 0x%llx)", + dst, + dst + size); } status = uvm_push_begin_acquire(gpu->channel_manager, @@ -12539,7 +12444,7 @@ NV_STATUS uvm_va_block_write_from_cpu(uvm_va_block_t *va_block, UVM_ASSERT(UVM_ID_IS_GPU(proc)); - dst_gpu = block_get_gpu(va_block, proc); + dst_gpu = uvm_gpu_get(proc); dst_gpu_address = block_phys_page_copy_address(va_block, block_phys_page(proc, NUMA_NO_NODE, page_index), @@ -12562,14 +12467,14 @@ static NV_STATUS va_block_read_gpu_to_cpu(uvm_va_block_t *va_block, uvm_gpu_address_t dst_gpu_address; if (g_uvm_global.conf_computing_enabled) { - return encrypted_memcopy_gpu_to_cpu(gpu, - uvm_mem_get_cpu_addr_kernel(dst_mem), - src_gpu_address, - size, - &va_block->tracker, - "Encrypted read from [0x%llx, 0x%llx)", - src, - src + size); + return uvm_conf_computing_util_memcopy_gpu_to_cpu(gpu, + uvm_mem_get_cpu_addr_kernel(dst_mem), + src_gpu_address, + size, + &va_block->tracker, + "Encrypted read from [0x%llx, 0x%llx)", + src, + src + size); } status = uvm_push_begin_acquire(gpu->channel_manager, @@ -12623,7 +12528,7 @@ NV_STATUS uvm_va_block_read_to_cpu(uvm_va_block_t *va_block, } else { uvm_gpu_address_t src_gpu_address; - uvm_gpu_t *gpu = block_get_gpu(va_block, proc); + uvm_gpu_t *gpu = uvm_gpu_get(proc); src_gpu_address = block_phys_page_copy_address(va_block, block_phys_page(proc, NUMA_NO_NODE, page_index), @@ -12675,10 +12580,10 @@ static void block_add_eviction_mappings(void *args) uvm_hmm_block_add_eviction_mappings(va_space, va_block, block_context); } else { - uvm_va_range_t *va_range = va_block->va_range; + uvm_va_range_managed_t *managed_range = va_block->managed_range; NV_STATUS status = NV_OK; - for_each_id_in_mask(id, &uvm_va_range_get_policy(va_range)->accessed_by) { + for_each_id_in_mask(id, &managed_range->policy.accessed_by) { status = uvm_va_block_set_accessed_by(va_block, block_context, id); if (status != NV_OK) break; @@ -12691,10 +12596,10 @@ static void block_add_eviction_mappings(void *args) // AccessedBy uvm_processor_mask_andnot(map_processors, &va_block->evicted_gpus, - &uvm_va_range_get_policy(va_range)->accessed_by); + &managed_range->policy.accessed_by); for_each_gpu_id_in_mask(id, map_processors) { - uvm_gpu_t *gpu = uvm_va_space_get_gpu(va_space, id); + uvm_gpu_t *gpu = uvm_gpu_get(id); uvm_va_block_gpu_state_t *gpu_state; if (!gpu->parent->access_counters_supported) @@ -12723,7 +12628,7 @@ static void block_add_eviction_mappings(void *args) va_block->start, va_block->end, nvstatusToString(status), - uvm_va_space_processor_name(va_space, id)); + uvm_processor_get_name(id)); } } @@ -12833,7 +12738,7 @@ NV_STATUS uvm_va_block_evict_chunks(uvm_va_block_t *va_block, &accessed_by_set); } else { - const uvm_va_policy_t *policy = uvm_va_range_get_policy(va_block->va_range); + const uvm_va_policy_t *policy = &va_block->managed_range->policy; accessed_by_set = uvm_processor_mask_get_count(&policy->accessed_by) > 0; // TODO: Bug 1765193: make_resident() breaks read-duplication, but it's @@ -13150,7 +13055,7 @@ NV_STATUS uvm_test_change_pte_mapping(UVM_TEST_CHANGE_PTE_MAPPING_PARAMS *params // Revoking CPU mappings performs a combination of unmap + map. The map // portion requires a valid mm. - if (UVM_ID_IS_CPU(id) && !uvm_va_range_vma_check(block->va_range, mm)) { + if (UVM_ID_IS_CPU(id) && !uvm_va_range_vma_check(block->managed_range, mm)) { status = NV_ERR_INVALID_STATE; } else { @@ -13185,6 +13090,7 @@ NV_STATUS uvm_test_change_pte_mapping(UVM_TEST_CHANGE_PTE_MAPPING_PARAMS *params NV_STATUS uvm_test_va_block_info(UVM_TEST_VA_BLOCK_INFO_PARAMS *params, struct file *filp) { uvm_va_space_t *va_space = uvm_va_space_get(filp); + uvm_va_range_managed_t *managed_range; uvm_va_block_t *va_block; uvm_va_range_t *va_range; struct mm_struct *mm; @@ -13197,6 +13103,7 @@ NV_STATUS uvm_test_va_block_info(UVM_TEST_VA_BLOCK_INFO_PARAMS *params, struct f uvm_va_space_down_read(va_space); va_range = uvm_va_range_find(va_space, params->lookup_address); + managed_range = uvm_va_range_to_managed_or_null(va_range); if (!va_range) { status = uvm_hmm_va_block_find(va_space, params->lookup_address, &va_block); if (status == NV_ERR_OBJECT_NOT_FOUND) { @@ -13212,14 +13119,19 @@ NV_STATUS uvm_test_va_block_info(UVM_TEST_VA_BLOCK_INFO_PARAMS *params, struct f goto out; } } - else { - index = uvm_va_range_block_index(va_range, params->lookup_address); - va_block = uvm_va_range_block(va_range, index); + else if (managed_range) { + index = uvm_va_range_block_index(managed_range, params->lookup_address); + va_block = uvm_va_range_block(managed_range, index); + if (!va_block) { status = NV_ERR_OBJECT_NOT_FOUND; goto out; } } + else { + status = NV_ERR_INVALID_ADDRESS; + goto out; + } params->va_block_start = va_block->start; params->va_block_end = va_block->end; @@ -13234,6 +13146,7 @@ NV_STATUS uvm_test_va_residency_info(UVM_TEST_VA_RESIDENCY_INFO_PARAMS *params, { NV_STATUS status = NV_OK; uvm_va_space_t *va_space = uvm_va_space_get(filp); + uvm_va_range_managed_t *managed_range; uvm_va_range_t *va_range; uvm_va_block_t *block = NULL; uvm_va_block_context_t *block_context = NULL; @@ -13262,6 +13175,7 @@ NV_STATUS uvm_test_va_residency_info(UVM_TEST_VA_RESIDENCY_INFO_PARAMS *params, // Inline uvm_va_block_find() to get the va_range. va_range = uvm_va_range_find(va_space, addr); + managed_range = uvm_va_range_to_managed_or_null(va_range); if (!va_range) { NvU64 start, end; @@ -13279,13 +13193,13 @@ NV_STATUS uvm_test_va_residency_info(UVM_TEST_VA_RESIDENCY_INFO_PARAMS *params, goto out; } } - else if (va_range->type != UVM_VA_RANGE_TYPE_MANAGED) { + else if (!managed_range) { status = NV_ERR_INVALID_ADDRESS; goto out; } else { - index = uvm_va_range_block_index(va_range, addr); - block = uvm_va_range_block(va_range, index); + index = uvm_va_range_block_index(managed_range, addr); + block = uvm_va_range_block(managed_range, index); if (!block) { params->resident_on_count = 0; params->populated_on_count = 0; @@ -13309,7 +13223,7 @@ NV_STATUS uvm_test_va_residency_info(UVM_TEST_VA_RESIDENCY_INFO_PARAMS *params, int nid = block_get_page_node_residency(block, page_index); block_page = block_phys_page(id, nid, page_index); - uvm_va_space_processor_uuid(va_space, ¶ms->resident_on[count], id); + uvm_processor_get_uuid(id, ¶ms->resident_on[count]); params->resident_physical_size[count] = block_phys_page_size(block, block_page); if (UVM_ID_IS_CPU(id)) { params->resident_physical_address[count] = page_to_phys(uvm_va_block_get_cpu_page(block, page_index)); @@ -13325,7 +13239,7 @@ NV_STATUS uvm_test_va_residency_info(UVM_TEST_VA_RESIDENCY_INFO_PARAMS *params, } else { params->resident_physical_address[count] = - block_phys_page_address(block, block_page, uvm_va_space_get_gpu(va_space, id)).address; + block_phys_page_address(block, block_page, uvm_gpu_get(id)).address; } ++count; @@ -13343,7 +13257,7 @@ NV_STATUS uvm_test_va_residency_info(UVM_TEST_VA_RESIDENCY_INFO_PARAMS *params, if (page_size == 0) continue; - uvm_va_space_processor_uuid(va_space, ¶ms->mapped_on[count], id); + uvm_processor_get_uuid(id, ¶ms->mapped_on[count]); params->mapping_type[count] = g_uvm_prot_to_test_pte_mapping[block_page_prot(block, id, page_index)]; UVM_ASSERT(params->mapping_type[count] != UVM_TEST_PTE_MAPPING_INVALID); @@ -13354,9 +13268,8 @@ NV_STATUS uvm_test_va_residency_info(UVM_TEST_VA_RESIDENCY_INFO_PARAMS *params, block_page = block_phys_page(processor_to_map, nid, page_index); if (!UVM_ID_IS_CPU(id)) { - uvm_gpu_phys_address_t gpu_phys_addr = block_phys_page_address(block, - block_page, - uvm_va_space_get_gpu(va_space, id)); + uvm_gpu_phys_address_t gpu_phys_addr = block_phys_page_address(block, block_page, uvm_gpu_get(id)); + params->mapping_physical_address[count] = gpu_phys_addr.address; } else { @@ -13370,10 +13283,9 @@ NV_STATUS uvm_test_va_residency_info(UVM_TEST_VA_RESIDENCY_INFO_PARAMS *params, } if (params->resident_on_count == 1 && !uvm_processor_mask_test(resident_on_mask, UVM_ID_CPU)) { - uvm_gpu_id_t id = uvm_processor_mask_find_first_id(resident_on_mask); uvm_reverse_map_t gpu_mapping; size_t num_pages; - uvm_gpu_t *gpu = uvm_va_space_get_gpu(va_space, id); + uvm_gpu_t *gpu = uvm_gpu_get(uvm_processor_mask_find_first_id(resident_on_mask)); uvm_gpu_phys_address_t phys_addr; phys_addr = uvm_va_block_gpu_phys_page_address(block, page_index, gpu); @@ -13397,7 +13309,7 @@ NV_STATUS uvm_test_va_residency_info(UVM_TEST_VA_RESIDENCY_INFO_PARAMS *params, if (!block_processor_page_is_populated(block, id, page_index)) continue; - uvm_va_space_processor_uuid(va_space, ¶ms->populated_on[count], id); + uvm_processor_get_uuid(id, ¶ms->populated_on[count]); ++count; } diff --git a/kernel-open/nvidia-uvm/uvm_va_block.h b/kernel-open/nvidia-uvm/uvm_va_block.h index 3a97de8e38..63ad3877a9 100644 --- a/kernel-open/nvidia-uvm/uvm_va_block.h +++ b/kernel-open/nvidia-uvm/uvm_va_block.h @@ -46,7 +46,7 @@ #include // VA blocks are the leaf nodes in the uvm_va_space tree for managed allocations -// (VA ranges with type == UVM_VA_RANGE_TYPE_MANAGED): +// (VA ranges of type uvm_va_range_managed_t): // // UVM: uvm_va_space -> uvm_va_range -> uvm_va_block // HMM: uvm_va_space -> uvm_va_block @@ -272,7 +272,7 @@ typedef struct struct uvm_va_block_struct { // Reference count for this block. References are held by: - // - The parent VA range for managed blocks or VA space for HMM blocks + // - The parent managed range for managed blocks or VA space for HMM blocks // - The reverse map // - The eviction path temporarily when attempting to evict a GPU page under // this block @@ -284,15 +284,15 @@ struct uvm_va_block_struct // Lock protecting the block. See the comment at the top of uvm.c. uvm_mutex_t lock; - // Parent VA range. Managed blocks have this set. HMM blocks will have - // va_range set to NULL and hmm.va_space set instead. Dead blocks that are - // waiting for the last ref count to be removed have va_range and + // Parent managed range. Managed blocks have this set. HMM blocks will have + // managed_range set to NULL and hmm.va_space set instead. Dead blocks that + // are waiting for the last ref count to be removed have managed_range and // hmm.va_space set to NULL (could be either type of block). // // This field can be read while holding either the block lock or just the VA // space lock in read mode, since it can only change when the VA space lock // is held in write mode. - uvm_va_range_t *va_range; + uvm_va_range_managed_t *managed_range; // Virtual address [start, end] covered by this block. These fields can be // read while holding either the block lock or just the VA space lock in @@ -501,7 +501,7 @@ struct uvm_va_block_struct // Parent VA space pointer. It is NULL for managed blocks or if // the HMM block is dead. This field can be read while holding the // block lock and is only modified while holding the va_space write - // lock and va_block lock (same as the va_range pointer). + // lock and va_block lock (same as the managed_range pointer). uvm_va_space_t *va_space; // Tree of uvm_va_policy_node_t. The policy node ranges always cover @@ -597,12 +597,10 @@ void uvm_va_block_exit(void); // Allocates and initializes the block. The block's ref count is initialized to // 1. The caller is responsible for inserting the block into its parent -// va_range. +// managed range. // // The caller must be holding the VA space lock in at least read mode. -// -// The va_range must have type UVM_VA_RANGE_TYPE_MANAGED. -NV_STATUS uvm_va_block_create(uvm_va_range_t *va_range, +NV_STATUS uvm_va_block_create(uvm_va_range_managed_t *managed_range, NvU64 start, NvU64 end, uvm_va_block_t **out_block); @@ -658,7 +656,7 @@ static inline bool uvm_va_block_is_hmm(uvm_va_block_t *va_block) // is held in write mode. static inline bool uvm_va_block_is_dead(uvm_va_block_t *va_block) { - if (va_block->va_range) + if (va_block->managed_range) return false; #if UVM_IS_CONFIG_HMM() @@ -1192,10 +1190,11 @@ void uvm_va_block_unregister_gpu_locked(uvm_va_block_t *va_block, uvm_gpu_t *gpu // VA covered by this block to be immediately available for other page table // mappings upon return. // -// This clears block->va_range, so only the VA range destroy path should call -// it. Other paths with references on this block, specifically the eviction path -// which temporarily takes a reference to the block, must always check the block -// state after taking the block lock to see if their mapping is still in place. +// This clears block->managed_range, so only the managed range destroy path +// should call it. Other paths with references on this block, specifically the +// eviction path which temporarily takes a reference to the block, must always +// check the block state after taking the block lock to see if their mapping is +// still in place. // // All of the unmap and state destruction steps are also performed when the ref // count goes to 0, so this function only needs to be called if the block's @@ -1209,13 +1208,13 @@ void uvm_va_block_kill(uvm_va_block_t *va_block); // Exactly the same split semantics as uvm_va_range_split, including error // handling. See that function's comments for details. // -// new_va_block's va_range is set to new_va_range before any reverse mapping is -// established to the new block, but the caller is responsible for inserting the -// new block into the range. +// new_va_block's managed range is set to new_managed_range before any reverse +// mapping is established to the new block, but the caller is responsible for +// inserting the new block into the range. NV_STATUS uvm_va_block_split(uvm_va_block_t *existing_va_block, NvU64 new_end, uvm_va_block_t **new_va_block, - uvm_va_range_t *new_va_range); + uvm_va_range_managed_t *new_managed_range); // Exactly the same split semantics as uvm_va_block_split, including error // handling except the existing_va_block block lock needs to be held and @@ -1223,8 +1222,7 @@ NV_STATUS uvm_va_block_split(uvm_va_block_t *existing_va_block, // Also note that the existing_va_block lock may be dropped and re-acquired. NV_STATUS uvm_va_block_split_locked(uvm_va_block_t *existing_va_block, NvU64 new_end, - uvm_va_block_t *new_va_block, - uvm_va_range_t *new_va_range); + uvm_va_block_t *new_va_block); // Handles a CPU fault in the given VA block, performing any operations // necessary to establish a coherent CPU mapping (migrations, cache invalidates, @@ -2266,7 +2264,7 @@ NV_STATUS uvm_va_block_populate_page_cpu(uvm_va_block_t *va_block, // returns NV_ERR_MORE_PROCESSING_REQUIRED and this makes it clear that the // block's state is not locked across these calls. #define UVM_VA_BLOCK_LOCK_RETRY(va_block, block_retry, call) ({ \ - NV_STATUS status; \ + NV_STATUS __status; \ uvm_va_block_t *__block = (va_block); \ uvm_va_block_retry_t *__retry = (block_retry); \ \ @@ -2275,14 +2273,14 @@ NV_STATUS uvm_va_block_populate_page_cpu(uvm_va_block_t *va_block, uvm_mutex_lock(&__block->lock); \ \ do { \ - status = (call); \ - } while (status == NV_ERR_MORE_PROCESSING_REQUIRED); \ + __status = (call); \ + } while (__status == NV_ERR_MORE_PROCESSING_REQUIRED); \ \ uvm_mutex_unlock(&__block->lock); \ \ uvm_va_block_retry_deinit(__retry, __block); \ \ - status; \ + __status; \ }) // A helper macro for handling allocation-retry @@ -2297,7 +2295,7 @@ NV_STATUS uvm_va_block_populate_page_cpu(uvm_va_block_t *va_block, // to be already taken. Notably the block's lock might be unlocked and relocked // as part of the call. #define UVM_VA_BLOCK_RETRY_LOCKED(va_block, block_retry, call) ({ \ - NV_STATUS status; \ + NV_STATUS __status; \ uvm_va_block_t *__block = (va_block); \ uvm_va_block_retry_t *__retry = (block_retry); \ \ @@ -2306,12 +2304,12 @@ NV_STATUS uvm_va_block_populate_page_cpu(uvm_va_block_t *va_block, uvm_assert_mutex_locked(&__block->lock); \ \ do { \ - status = (call); \ - } while (status == NV_ERR_MORE_PROCESSING_REQUIRED); \ + __status = (call); \ + } while (__status == NV_ERR_MORE_PROCESSING_REQUIRED); \ \ uvm_va_block_retry_deinit(__retry, __block); \ \ - status; \ + __status; \ }) #endif // __UVM_VA_BLOCK_H__ diff --git a/kernel-open/nvidia-uvm/uvm_va_policy.c b/kernel-open/nvidia-uvm/uvm_va_policy.c index 0dc22ede8f..fe840e4629 100644 --- a/kernel-open/nvidia-uvm/uvm_va_policy.c +++ b/kernel-open/nvidia-uvm/uvm_va_policy.c @@ -1,5 +1,5 @@ /******************************************************************************* - Copyright (c) 2022 NVIDIA Corporation + Copyright (c) 2022-2024 NVIDIA Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to @@ -51,7 +51,7 @@ const uvm_va_policy_t *uvm_va_policy_get(uvm_va_block_t *va_block, NvU64 addr) return node ? &node->policy : &uvm_va_policy_default; } else { - return uvm_va_range_get_policy(va_block->va_range); + return &va_block->managed_range->policy; } } @@ -97,7 +97,7 @@ const uvm_va_policy_t *uvm_va_policy_get_region(uvm_va_block_t *va_block, uvm_va return policy; } else { - return uvm_va_range_get_policy(va_block->va_range); + return &va_block->managed_range->policy; } } diff --git a/kernel-open/nvidia-uvm/uvm_va_policy.h b/kernel-open/nvidia-uvm/uvm_va_policy.h index 3337efb279..23037079bf 100644 --- a/kernel-open/nvidia-uvm/uvm_va_policy.h +++ b/kernel-open/nvidia-uvm/uvm_va_policy.h @@ -292,6 +292,31 @@ static uvm_va_policy_node_t *uvm_va_policy_node_iter_first(uvm_va_block_t *va_bl return NULL; } +static const uvm_va_policy_t *uvm_va_policy_iter_first(uvm_va_block_t *va_block, + NvU64 start, + NvU64 end, + uvm_va_policy_node_t **out_node, + uvm_va_block_region_t *out_region) +{ + UVM_ASSERT(0); + return NULL; +} + +static const uvm_va_policy_t *uvm_va_policy_iter_next(uvm_va_block_t *va_block, + const uvm_va_policy_t *policy, + NvU64 end, + uvm_va_policy_node_t **inout_node, + uvm_va_block_region_t *inout_region) +{ + UVM_ASSERT(0); + return NULL; +} + +#define uvm_for_each_va_policy_in(policy, va_block, start, end, node, region) \ + for ((policy) = uvm_va_policy_iter_first((va_block), (start), (end), &(node), &(region)); \ + (policy); \ + (policy) = uvm_va_policy_iter_next((va_block), (policy), (end), &(node), &(region))) + #endif // UVM_IS_CONFIG_HMM() #endif // __UVM_VA_POLICY_H__ diff --git a/kernel-open/nvidia-uvm/uvm_va_range.c b/kernel-open/nvidia-uvm/uvm_va_range.c index d1b7055f1b..afce6a2a91 100644 --- a/kernel-open/nvidia-uvm/uvm_va_range.c +++ b/kernel-open/nvidia-uvm/uvm_va_range.c @@ -34,87 +34,121 @@ #include "uvm_perf_thrashing.h" #include "nv_uvm_interface.h" -static struct kmem_cache *g_uvm_va_range_cache __read_mostly; +static struct kmem_cache *g_uvm_va_range_managed_cache __read_mostly; +static struct kmem_cache *g_uvm_va_range_external_cache __read_mostly; +static struct kmem_cache *g_uvm_va_range_channel_cache __read_mostly; +static struct kmem_cache *g_uvm_va_range_sked_reflected_cache __read_mostly; +static struct kmem_cache *g_uvm_va_range_semaphore_pool_cache __read_mostly; static struct kmem_cache *g_uvm_vma_wrapper_cache __read_mostly; NV_STATUS uvm_va_range_init(void) { - g_uvm_va_range_cache = NV_KMEM_CACHE_CREATE("uvm_va_range_t", uvm_va_range_t); - if (!g_uvm_va_range_cache) + NV_STATUS status; + + g_uvm_va_range_managed_cache = NV_KMEM_CACHE_CREATE("uvm_va_range_managed_t", uvm_va_range_managed_t); + if (!g_uvm_va_range_managed_cache) + return NV_ERR_NO_MEMORY; + + g_uvm_va_range_external_cache = NV_KMEM_CACHE_CREATE("uvm_va_range_external_t", uvm_va_range_external_t); + if (!g_uvm_va_range_external_cache) + return NV_ERR_NO_MEMORY; + + g_uvm_va_range_channel_cache = NV_KMEM_CACHE_CREATE("uvm_va_range_channel_t", uvm_va_range_channel_t); + if (!g_uvm_va_range_channel_cache) + return NV_ERR_NO_MEMORY; + + g_uvm_va_range_sked_reflected_cache = NV_KMEM_CACHE_CREATE("uvm_va_range_sked_reflected_t", + uvm_va_range_sked_reflected_t); + if (!g_uvm_va_range_sked_reflected_cache) + return NV_ERR_NO_MEMORY; + + g_uvm_va_range_semaphore_pool_cache = NV_KMEM_CACHE_CREATE("uvm_va_range_semaphore_pool_t", + uvm_va_range_semaphore_pool_t); + if (!g_uvm_va_range_semaphore_pool_cache) return NV_ERR_NO_MEMORY; g_uvm_vma_wrapper_cache = NV_KMEM_CACHE_CREATE("uvm_vma_wrapper_t", uvm_vma_wrapper_t); if (!g_uvm_vma_wrapper_cache) return NV_ERR_NO_MEMORY; + status = uvm_va_range_device_p2p_init(); + if (status != NV_OK) + return status; + return uvm_va_block_init(); } void uvm_va_range_exit(void) { uvm_va_block_exit(); - kmem_cache_destroy_safe(&g_uvm_va_range_cache); + kmem_cache_destroy_safe(&g_uvm_va_range_managed_cache); + kmem_cache_destroy_safe(&g_uvm_va_range_external_cache); + kmem_cache_destroy_safe(&g_uvm_va_range_channel_cache); + kmem_cache_destroy_safe(&g_uvm_va_range_sked_reflected_cache); + kmem_cache_destroy_safe(&g_uvm_va_range_semaphore_pool_cache); kmem_cache_destroy_safe(&g_uvm_vma_wrapper_cache); + uvm_va_range_device_p2p_exit(); } -static NvU64 block_calc_start(uvm_va_range_t *va_range, size_t index) +static NvU64 block_calc_start(uvm_va_range_managed_t *managed_range, size_t index) { - NvU64 range_start = UVM_VA_BLOCK_ALIGN_DOWN(va_range->node.start); + NvU64 range_start = UVM_VA_BLOCK_ALIGN_DOWN(managed_range->va_range.node.start); NvU64 block_start = range_start + index * UVM_VA_BLOCK_SIZE; - NvU64 start = max(va_range->node.start, block_start); - UVM_ASSERT(start < va_range->node.end); + NvU64 start = max(managed_range->va_range.node.start, block_start); + UVM_ASSERT(start < managed_range->va_range.node.end); return start; } -static NvU64 block_calc_end(uvm_va_range_t *va_range, size_t index) +static NvU64 block_calc_end(uvm_va_range_managed_t *managed_range, size_t index) { - NvU64 start = block_calc_start(va_range, index); + NvU64 start = block_calc_start(managed_range, index); NvU64 block_end = UVM_VA_BLOCK_ALIGN_UP(start + 1) - 1; // Inclusive end - NvU64 end = min(va_range->node.end, block_end); - UVM_ASSERT(end > va_range->node.start); + NvU64 end = min(managed_range->va_range.node.end, block_end); + UVM_ASSERT(end > managed_range->va_range.node.start); return end; } // Called before the range's bounds have been adjusted. This may not actually // shrink the blocks array. For example, if the shrink attempt fails then -// va_range's old array is left intact. This may waste memory, but it means this -// function cannot fail. -static void blocks_array_shrink(uvm_va_range_t *va_range, size_t new_num_blocks) +// managed_range's old array is left intact. This may waste memory, but it means +// this function cannot fail. +static void blocks_array_shrink(uvm_va_range_managed_t *managed_range, size_t new_num_blocks) { - size_t new_size = new_num_blocks * sizeof(va_range->blocks[0]); + size_t new_size = new_num_blocks * sizeof(managed_range->va_range.blocks[0]); atomic_long_t *new_blocks; - UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_MANAGED); - UVM_ASSERT(va_range->blocks); - UVM_ASSERT(uvm_kvsize(va_range->blocks) >= uvm_va_range_num_blocks(va_range) * sizeof(va_range->blocks[0])); + UVM_ASSERT(managed_range->va_range.blocks); + UVM_ASSERT(uvm_kvsize(managed_range->va_range.blocks) >= uvm_va_range_num_blocks(managed_range) * + sizeof(managed_range->va_range.blocks[0])); UVM_ASSERT(new_num_blocks); - UVM_ASSERT(new_num_blocks <= uvm_va_range_num_blocks(va_range)); + UVM_ASSERT(new_num_blocks <= uvm_va_range_num_blocks(managed_range)); // TODO: Bug 1766579: This could be optimized by only shrinking the array // when the new size is half of the old size or some similar // threshold. Need to profile this on real apps to see if that's worth // doing. - new_blocks = uvm_kvrealloc(va_range->blocks, new_size); + new_blocks = uvm_kvrealloc(managed_range->va_range.blocks, new_size); if (!new_blocks) { // If we failed to allocate a smaller array, just leave the old one as-is UVM_DBG_PRINT("Failed to shrink range [0x%llx, 0x%llx] from %zu blocks to %zu blocks\n", - va_range->node.start, - va_range->node.end, - uvm_kvsize(va_range->blocks) / sizeof(va_range->blocks[0]), + managed_range->va_range.node.start, + managed_range->va_range.node.end, + uvm_kvsize(managed_range->va_range.blocks) / sizeof(managed_range->va_range.blocks[0]), new_num_blocks); return; } - va_range->blocks = new_blocks; + managed_range->va_range.blocks = new_blocks; } -static uvm_va_range_t *uvm_va_range_alloc(uvm_va_space_t *va_space, NvU64 start, NvU64 end) +// va_range must already be zeroed. +static void uvm_va_range_initialize(uvm_va_range_t *va_range, + uvm_va_range_type_t type, + uvm_va_space_t *va_space, + NvU64 start, + NvU64 end) { - uvm_va_range_t *va_range = nv_kmem_cache_zalloc(g_uvm_va_range_cache, NV_UVM_GFP_FLAGS); - if (!va_range) - return NULL; - uvm_assert_rwsem_locked_write(&va_space->lock); va_range->va_space = va_space; @@ -125,17 +159,16 @@ static uvm_va_range_t *uvm_va_range_alloc(uvm_va_space_t *va_space, NvU64 start, // so clear the node so the destroy path knows whether to remove it. RB_CLEAR_NODE(&va_range->node.rb_node); - return va_range; + va_range->type = type; } -static NV_STATUS uvm_va_range_alloc_reclaim(uvm_va_space_t *va_space, - struct mm_struct *mm, - uvm_va_range_type_t type, - NvU64 start, - NvU64 end, - uvm_va_range_t **out_va_range) +NV_STATUS uvm_va_range_initialize_reclaim(uvm_va_range_t *va_range, + struct mm_struct *mm, + uvm_va_range_type_t type, + uvm_va_space_t *va_space, + NvU64 start, + NvU64 end) { - uvm_va_range_t *va_range; NV_STATUS status; // Check for no overlap with HMM blocks. @@ -143,74 +176,65 @@ static NV_STATUS uvm_va_range_alloc_reclaim(uvm_va_space_t *va_space, if (status != NV_OK) return status; - va_range = uvm_va_range_alloc(va_space, start, end); - if (!va_range) - return NV_ERR_NO_MEMORY; - - va_range->type = type; - - *out_va_range = va_range; + uvm_va_range_initialize(va_range, type, va_space, start, end); return NV_OK; } -static uvm_va_range_t *uvm_va_range_alloc_managed(uvm_va_space_t *va_space, NvU64 start, NvU64 end) +static uvm_va_range_managed_t *uvm_va_range_alloc_managed(uvm_va_space_t *va_space, NvU64 start, NvU64 end) { - uvm_va_range_t *va_range = NULL; + uvm_va_range_managed_t *managed_range = NULL; - va_range = uvm_va_range_alloc(va_space, start, end); - if (!va_range) - goto error; + managed_range = nv_kmem_cache_zalloc(g_uvm_va_range_managed_cache, NV_UVM_GFP_FLAGS); + if (!managed_range) + return NULL; - va_range->type = UVM_VA_RANGE_TYPE_MANAGED; - va_range->managed.policy = uvm_va_policy_default; + uvm_va_range_initialize(&managed_range->va_range, UVM_VA_RANGE_TYPE_MANAGED, va_space, start, end); - va_range->blocks = uvm_kvmalloc_zero(uvm_va_range_num_blocks(va_range) * sizeof(va_range->blocks[0])); - if (!va_range->blocks) { - UVM_DBG_PRINT("Failed to allocate %zu blocks\n", uvm_va_range_num_blocks(va_range)); - goto error; - } + managed_range->policy = uvm_va_policy_default; - return va_range; + managed_range->va_range.blocks = uvm_kvmalloc_zero(uvm_va_range_num_blocks(managed_range) * + sizeof(managed_range->va_range.blocks[0])); + if (!managed_range->va_range.blocks) { + UVM_DBG_PRINT("Failed to allocate %zu blocks\n", uvm_va_range_num_blocks(managed_range)); + uvm_va_range_destroy(&managed_range->va_range, NULL); + return NULL; + } -error: - uvm_va_range_destroy(va_range, NULL); - return NULL; + return managed_range; } NV_STATUS uvm_va_range_create_mmap(uvm_va_space_t *va_space, struct mm_struct *mm, uvm_vma_wrapper_t *vma_wrapper, - uvm_va_range_t **out_va_range) + uvm_va_range_managed_t **out_managed_range) { NV_STATUS status; struct vm_area_struct *vma = vma_wrapper->vma; - uvm_va_range_t *va_range = NULL; + uvm_va_range_managed_t *managed_range = NULL; // Check for no overlap with HMM blocks. status = uvm_hmm_va_block_reclaim(va_space, mm, vma->vm_start, vma->vm_end - 1); if (status != NV_OK) return status; - // vma->vm_end is exclusive but va_range end is inclusive - va_range = uvm_va_range_alloc_managed(va_space, vma->vm_start, vma->vm_end - 1); - if (!va_range) { - status = NV_ERR_NO_MEMORY; - goto error; - } + // vma->vm_end is exclusive but managed_range end is inclusive + managed_range = uvm_va_range_alloc_managed(va_space, vma->vm_start, vma->vm_end - 1); + if (!managed_range) + return NV_ERR_NO_MEMORY; - va_range->managed.vma_wrapper = vma_wrapper; + managed_range->vma_wrapper = vma_wrapper; - status = uvm_range_tree_add(&va_space->va_range_tree, &va_range->node); + status = uvm_range_tree_add(&va_space->va_range_tree, &managed_range->va_range.node); if (status != NV_OK) goto error; - if (out_va_range) - *out_va_range = va_range; + if (out_managed_range) + *out_managed_range = managed_range; return NV_OK; error: - uvm_va_range_destroy(va_range, NULL); + uvm_va_range_destroy(&managed_range->va_range, NULL); return status; } @@ -218,23 +242,29 @@ NV_STATUS uvm_va_range_create_external(uvm_va_space_t *va_space, struct mm_struct *mm, NvU64 start, NvU64 length, - uvm_va_range_t **out_va_range) + uvm_va_range_external_t **out_external_range) { NV_STATUS status; - uvm_va_range_t *va_range = NULL; + uvm_va_range_external_t *external_range = NULL; uvm_processor_mask_t *retained_mask = NULL; NvU32 i; - status = uvm_va_range_alloc_reclaim(va_space, - mm, - UVM_VA_RANGE_TYPE_EXTERNAL, - start, - start + length - 1, - &va_range); - if (status != NV_OK) + external_range = nv_kmem_cache_zalloc(g_uvm_va_range_external_cache, NV_UVM_GFP_FLAGS); + if (!external_range) + return NV_ERR_NO_MEMORY; + + status = uvm_va_range_initialize_reclaim(&external_range->va_range, + mm, + UVM_VA_RANGE_TYPE_EXTERNAL, + va_space, + start, + start + length - 1); + if (status != NV_OK) { + kmem_cache_free(g_uvm_va_range_external_cache, external_range); return status; + } - UVM_ASSERT(!va_range->external.retained_mask); + UVM_ASSERT(!external_range->retained_mask); retained_mask = uvm_processor_mask_cache_alloc(); if (!retained_mask) { @@ -242,24 +272,24 @@ NV_STATUS uvm_va_range_create_external(uvm_va_space_t *va_space, goto error; } - va_range->external.retained_mask = retained_mask; + external_range->retained_mask = retained_mask; - for (i = 0; i < ARRAY_SIZE(va_range->external.gpu_ranges); i++) { - uvm_mutex_init(&va_range->external.gpu_ranges[i].lock, UVM_LOCK_ORDER_EXT_RANGE_TREE); - uvm_range_tree_init(&va_range->external.gpu_ranges[i].tree); + for (i = 0; i < ARRAY_SIZE(external_range->gpu_ranges); i++) { + uvm_mutex_init(&external_range->gpu_ranges[i].lock, UVM_LOCK_ORDER_EXT_RANGE_TREE); + uvm_range_tree_init(&external_range->gpu_ranges[i].tree); } - status = uvm_range_tree_add(&va_space->va_range_tree, &va_range->node); + status = uvm_range_tree_add(&va_space->va_range_tree, &external_range->va_range.node); if (status != NV_OK) goto error; - if (out_va_range) - *out_va_range = va_range; + if (out_external_range) + *out_external_range = external_range; return NV_OK; error: - uvm_va_range_destroy(va_range, NULL); + uvm_va_range_destroy(&external_range->va_range, NULL); return status; } @@ -268,33 +298,39 @@ NV_STATUS uvm_va_range_create_channel(uvm_va_space_t *va_space, struct mm_struct *mm, NvU64 start, NvU64 end, - uvm_va_range_t **out_va_range) + uvm_va_range_channel_t **out_channel_range) { NV_STATUS status; - uvm_va_range_t *va_range = NULL; - - status = uvm_va_range_alloc_reclaim(va_space, - mm, - UVM_VA_RANGE_TYPE_CHANNEL, - start, - end, - &va_range); - if (status != NV_OK) + uvm_va_range_channel_t *channel_range = NULL; + + channel_range = nv_kmem_cache_zalloc(g_uvm_va_range_channel_cache, NV_UVM_GFP_FLAGS); + if (!channel_range) + return NV_ERR_NO_MEMORY; + + status = uvm_va_range_initialize_reclaim(&channel_range->va_range, + mm, + UVM_VA_RANGE_TYPE_CHANNEL, + va_space, + start, + end); + if (status != NV_OK) { + kmem_cache_free(g_uvm_va_range_channel_cache, channel_range); return status; + } - INIT_LIST_HEAD(&va_range->channel.list_node); + INIT_LIST_HEAD(&channel_range->list_node); - status = uvm_range_tree_add(&va_space->va_range_tree, &va_range->node); + status = uvm_range_tree_add(&va_space->va_range_tree, &channel_range->va_range.node); if (status != NV_OK) goto error; - if (out_va_range) - *out_va_range = va_range; + if (out_channel_range) + *out_channel_range = channel_range; return NV_OK; error: - uvm_va_range_destroy(va_range, NULL); + uvm_va_range_destroy(&channel_range->va_range, NULL); return status; } @@ -302,31 +338,37 @@ NV_STATUS uvm_va_range_create_sked_reflected(uvm_va_space_t *va_space, struct mm_struct *mm, NvU64 start, NvU64 length, - uvm_va_range_t **out_va_range) + uvm_va_range_sked_reflected_t **out_sked_reflected_range) { NV_STATUS status; - uvm_va_range_t *va_range = NULL; - - status = uvm_va_range_alloc_reclaim(va_space, - mm, - UVM_VA_RANGE_TYPE_SKED_REFLECTED, - start, - start + length - 1, - &va_range); - if (status != NV_OK) + uvm_va_range_sked_reflected_t *sked_reflected_range = NULL; + + sked_reflected_range = nv_kmem_cache_zalloc(g_uvm_va_range_sked_reflected_cache, NV_UVM_GFP_FLAGS); + if (!sked_reflected_range) + return NV_ERR_NO_MEMORY; + + status = uvm_va_range_initialize_reclaim(&sked_reflected_range->va_range, + mm, + UVM_VA_RANGE_TYPE_SKED_REFLECTED, + va_space, + start, + start + length - 1); + if (status != NV_OK) { + kmem_cache_free(g_uvm_va_range_sked_reflected_cache, sked_reflected_range); return status; + } - status = uvm_range_tree_add(&va_space->va_range_tree, &va_range->node); + status = uvm_range_tree_add(&va_space->va_range_tree, &sked_reflected_range->va_range.node); if (status != NV_OK) goto error; - if (out_va_range) - *out_va_range = va_range; + if (out_sked_reflected_range) + *out_sked_reflected_range = sked_reflected_range; return NV_OK; error: - uvm_va_range_destroy(va_range, NULL); + uvm_va_range_destroy(&sked_reflected_range->va_range, NULL); return status; } @@ -336,7 +378,7 @@ NV_STATUS uvm_va_range_create_semaphore_pool(uvm_va_space_t *va_space, NvU64 length, const UvmGpuMappingAttributes *per_gpu_attrs, NvU32 per_gpu_attrs_count, - uvm_va_range_t **out_va_range) + uvm_va_range_semaphore_pool_t **out_semaphore_pool_range) { static const uvm_mem_gpu_mapping_attrs_t default_attrs = { .protection = UVM_PROT_READ_WRITE_ATOMIC, @@ -344,24 +386,30 @@ NV_STATUS uvm_va_range_create_semaphore_pool(uvm_va_space_t *va_space, }; NV_STATUS status; - uvm_va_range_t *va_range = NULL; + uvm_va_range_semaphore_pool_t *semaphore_pool_range = NULL; uvm_mem_alloc_params_t mem_alloc_params = { 0 }; NvU32 i; uvm_gpu_id_t gpu_id; - status = uvm_va_range_alloc_reclaim(va_space, - mm, - UVM_VA_RANGE_TYPE_SEMAPHORE_POOL, - start, - start + length - 1, - &va_range); - if (status != NV_OK) + semaphore_pool_range = nv_kmem_cache_zalloc(g_uvm_va_range_semaphore_pool_cache, NV_UVM_GFP_FLAGS); + if (!semaphore_pool_range) + return NV_ERR_NO_MEMORY; + + status = uvm_va_range_initialize_reclaim(&semaphore_pool_range->va_range, + mm, + UVM_VA_RANGE_TYPE_SEMAPHORE_POOL, + va_space, + start, + start + length - 1); + if (status != NV_OK) { + kmem_cache_free(g_uvm_va_range_semaphore_pool_cache, semaphore_pool_range); return status; + } - uvm_tracker_init(&va_range->semaphore_pool.tracker); - uvm_mutex_init(&va_range->semaphore_pool.tracker_lock, UVM_LOCK_ORDER_SEMA_POOL_TRACKER); + uvm_tracker_init(&semaphore_pool_range->tracker); + uvm_mutex_init(&semaphore_pool_range->tracker_lock, UVM_LOCK_ORDER_SEMA_POOL_TRACKER); - status = uvm_range_tree_add(&va_space->va_range_tree, &va_range->node); + status = uvm_range_tree_add(&va_space->va_range_tree, &semaphore_pool_range->va_range.node); if (status != NV_OK) goto error; @@ -372,11 +420,11 @@ NV_STATUS uvm_va_range_create_semaphore_pool(uvm_va_space_t *va_space, mem_alloc_params.zero = true; mem_alloc_params.mm = mm; - va_range->semaphore_pool.default_gpu_attrs = default_attrs; - va_range->semaphore_pool.owner = NULL; + semaphore_pool_range->default_gpu_attrs = default_attrs; + semaphore_pool_range->owner = NULL; for_each_gpu_id(gpu_id) - va_range->semaphore_pool.gpu_attrs[uvm_id_gpu_index(gpu_id)] = default_attrs; + semaphore_pool_range->gpu_attrs[uvm_id_gpu_index(gpu_id)] = default_attrs; for (i = 0; i < per_gpu_attrs_count; i++) { uvm_gpu_t *gpu; @@ -392,136 +440,149 @@ NV_STATUS uvm_va_range_create_semaphore_pool(uvm_va_space_t *va_space, if (attrs.is_cacheable) { // At most 1 GPU can have this memory cached, in which case it is // the 'owner' GPU. - if (va_range->semaphore_pool.owner != NULL) { + if (semaphore_pool_range->owner != NULL) { UVM_DBG_PRINT("Caching of semaphore pool requested on >1 GPU."); status = NV_ERR_INVALID_ARGUMENT; goto error; } - va_range->semaphore_pool.owner = gpu; + semaphore_pool_range->owner = gpu; } - va_range->semaphore_pool.gpu_attrs[uvm_id_gpu_index(gpu->id)] = attrs; + semaphore_pool_range->gpu_attrs[uvm_id_gpu_index(gpu->id)] = attrs; } - status = uvm_mem_alloc(&mem_alloc_params, &va_range->semaphore_pool.mem); + status = uvm_mem_alloc(&mem_alloc_params, &semaphore_pool_range->mem); if (status != NV_OK) goto error; - status = uvm_mem_map_cpu_kernel(va_range->semaphore_pool.mem); + status = uvm_mem_map_cpu_kernel(semaphore_pool_range->mem); if (status != NV_OK) goto error; - if (out_va_range) - *out_va_range = va_range; + if (out_semaphore_pool_range) + *out_semaphore_pool_range = semaphore_pool_range; return NV_OK; error: - uvm_va_range_destroy(va_range, NULL); + uvm_va_range_destroy(&semaphore_pool_range->va_range, NULL); return status; } -static void uvm_va_range_destroy_managed(uvm_va_range_t *va_range) +static void uvm_va_range_destroy_managed(uvm_va_range_managed_t *managed_range) { uvm_va_block_t *block; uvm_va_block_t *block_tmp; uvm_perf_event_data_t event_data; NV_STATUS status; - UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_MANAGED); - - if (va_range->blocks) { + if (managed_range->va_range.blocks) { // Unmap and drop our ref count on each block - for_each_va_block_in_va_range_safe(va_range, block, block_tmp) + for_each_va_block_in_va_range_safe(managed_range, block, block_tmp) uvm_va_block_kill(block); - uvm_kvfree(va_range->blocks); + uvm_kvfree(managed_range->va_range.blocks); } - event_data.range_destroy.range = va_range; - uvm_perf_event_notify(&va_range->va_space->perf_events, UVM_PERF_EVENT_RANGE_DESTROY, &event_data); + event_data.range_destroy.range = &managed_range->va_range; + uvm_perf_event_notify(&managed_range->va_range.va_space->perf_events, UVM_PERF_EVENT_RANGE_DESTROY, &event_data); - status = uvm_range_group_assign_range(va_range->va_space, NULL, va_range->node.start, va_range->node.end); + status = uvm_range_group_assign_range(managed_range->va_range.va_space, + NULL, + managed_range->va_range.node.start, + managed_range->va_range.node.end); UVM_ASSERT(status == NV_OK); + kmem_cache_free(g_uvm_va_range_managed_cache, managed_range); } -static void uvm_va_range_destroy_external(uvm_va_range_t *va_range, struct list_head *deferred_free_list) +static void uvm_va_range_destroy_external(uvm_va_range_external_t *external_range, struct list_head *deferred_free_list) { uvm_gpu_t *gpu; - uvm_processor_mask_cache_free(va_range->external.retained_mask); + uvm_processor_mask_cache_free(external_range->retained_mask); - if (uvm_processor_mask_empty(&va_range->external.mapped_gpus)) - return; + if (uvm_processor_mask_empty(&external_range->mapped_gpus)) + goto out; UVM_ASSERT(deferred_free_list); - for_each_va_space_gpu_in_mask(gpu, va_range->va_space, &va_range->external.mapped_gpus) { - uvm_ext_gpu_range_tree_t *range_tree = uvm_ext_gpu_range_tree(va_range, gpu); + for_each_va_space_gpu_in_mask(gpu, external_range->va_range.va_space, &external_range->mapped_gpus) { + uvm_ext_gpu_range_tree_t *range_tree = uvm_ext_gpu_range_tree(external_range, gpu); uvm_ext_gpu_map_t *ext_map, *ext_map_next; uvm_mutex_lock(&range_tree->lock); - uvm_ext_gpu_map_for_each_safe(ext_map, ext_map_next, va_range, gpu) - uvm_ext_gpu_map_destroy(va_range, ext_map, deferred_free_list); + uvm_ext_gpu_map_for_each_safe(ext_map, ext_map_next, external_range, gpu) + uvm_ext_gpu_map_destroy(external_range, ext_map, deferred_free_list); uvm_mutex_unlock(&range_tree->lock); } - UVM_ASSERT(uvm_processor_mask_empty(&va_range->external.mapped_gpus)); + UVM_ASSERT(uvm_processor_mask_empty(&external_range->mapped_gpus)); + +out: + kmem_cache_free(g_uvm_va_range_external_cache, external_range); } -static void uvm_va_range_destroy_channel(uvm_va_range_t *va_range) +static void uvm_va_range_destroy_channel(uvm_va_range_channel_t *channel_range) { - uvm_gpu_va_space_t *gpu_va_space = va_range->channel.gpu_va_space; + uvm_gpu_va_space_t *gpu_va_space = channel_range->gpu_va_space; uvm_membar_t membar; - UVM_ASSERT(va_range->channel.ref_count == 0); + UVM_ASSERT(channel_range->ref_count == 0); // Unmap the buffer - if (gpu_va_space && va_range->channel.pt_range_vec.ranges) { - membar = uvm_hal_downgrade_membar_type(gpu_va_space->gpu, va_range->channel.aperture == UVM_APERTURE_VID); - uvm_page_table_range_vec_clear_ptes(&va_range->channel.pt_range_vec, membar); - uvm_page_table_range_vec_deinit(&va_range->channel.pt_range_vec); + if (gpu_va_space && channel_range->pt_range_vec.ranges) { + membar = uvm_hal_downgrade_membar_type(gpu_va_space->gpu, channel_range->aperture == UVM_APERTURE_VID); + uvm_page_table_range_vec_clear_ptes(&channel_range->pt_range_vec, membar); + uvm_page_table_range_vec_deinit(&channel_range->pt_range_vec); } - list_del(&va_range->channel.list_node); + list_del(&channel_range->list_node); // Channel unregister handles releasing this descriptor back to RM - va_range->channel.rm_descriptor = 0; + channel_range->rm_descriptor = 0; + kmem_cache_free(g_uvm_va_range_channel_cache, channel_range); } -static void uvm_va_range_destroy_sked_reflected(uvm_va_range_t *va_range) +static void uvm_va_range_deinit_sked_reflected(uvm_va_range_sked_reflected_t *sked_reflected_range) { - uvm_gpu_va_space_t *gpu_va_space = va_range->sked_reflected.gpu_va_space; + uvm_gpu_va_space_t *gpu_va_space = sked_reflected_range->gpu_va_space; - if (!gpu_va_space || !va_range->sked_reflected.pt_range_vec.ranges) + if (!gpu_va_space || !sked_reflected_range->pt_range_vec.ranges) return; // The SKED reflected mapping has no physical backing and hence no physical // accesses can be pending to it and no membar is needed. - uvm_page_table_range_vec_clear_ptes(&va_range->sked_reflected.pt_range_vec, UVM_MEMBAR_NONE); - uvm_page_table_range_vec_deinit(&va_range->sked_reflected.pt_range_vec); + uvm_page_table_range_vec_clear_ptes(&sked_reflected_range->pt_range_vec, UVM_MEMBAR_NONE); + uvm_page_table_range_vec_deinit(&sked_reflected_range->pt_range_vec); - va_range->sked_reflected.gpu_va_space = NULL; + sked_reflected_range->gpu_va_space = NULL; + +} + +static void uvm_va_range_destroy_sked_reflected(uvm_va_range_sked_reflected_t *sked_reflected_range) +{ + uvm_va_range_deinit_sked_reflected(sked_reflected_range); + kmem_cache_free(g_uvm_va_range_sked_reflected_cache, sked_reflected_range); } -static void uvm_va_range_destroy_semaphore_pool(uvm_va_range_t *va_range) +static void uvm_va_range_destroy_semaphore_pool(uvm_va_range_semaphore_pool_t *semaphore_pool_range) { - NV_STATUS status = uvm_tracker_wait_deinit(&va_range->semaphore_pool.tracker); + NV_STATUS status = uvm_tracker_wait_deinit(&semaphore_pool_range->tracker); if (status != NV_OK) { UVM_ASSERT_MSG(status == uvm_global_get_status(), "uvm_tracker_wait() returned %d (%s) in uvm_va_range_destroy_semaphore_pool()\n", status, nvstatusToString(status)); } - uvm_mem_free(va_range->semaphore_pool.mem); - va_range->semaphore_pool.mem = NULL; + uvm_mem_free(semaphore_pool_range->mem); + semaphore_pool_range->mem = NULL; + kmem_cache_free(g_uvm_va_range_semaphore_pool_cache, semaphore_pool_range); } void uvm_va_range_destroy(uvm_va_range_t *va_range, struct list_head *deferred_free_list) { - if (!va_range) - return; + UVM_ASSERT(va_range); if (!RB_EMPTY_NODE(&va_range->node.rb_node)) uvm_range_tree_remove(&va_range->va_space->va_range_tree, &va_range->node); @@ -531,38 +592,38 @@ void uvm_va_range_destroy(uvm_va_range_t *va_range, struct list_head *deferred_f // Skip partially-created ranges with unset types break; case UVM_VA_RANGE_TYPE_MANAGED: - uvm_va_range_destroy_managed(va_range); - break; + uvm_va_range_destroy_managed(uvm_va_range_to_managed(va_range)); + return; case UVM_VA_RANGE_TYPE_EXTERNAL: - uvm_va_range_destroy_external(va_range, deferred_free_list); - break; + uvm_va_range_destroy_external(uvm_va_range_to_external(va_range), deferred_free_list); + return; case UVM_VA_RANGE_TYPE_CHANNEL: - uvm_va_range_destroy_channel(va_range); - break; + uvm_va_range_destroy_channel(uvm_va_range_to_channel(va_range)); + return; case UVM_VA_RANGE_TYPE_SKED_REFLECTED: - uvm_va_range_destroy_sked_reflected(va_range); - break; + uvm_va_range_destroy_sked_reflected(uvm_va_range_to_sked_reflected(va_range)); + return; case UVM_VA_RANGE_TYPE_SEMAPHORE_POOL: - uvm_va_range_destroy_semaphore_pool(va_range); - break; + uvm_va_range_destroy_semaphore_pool(uvm_va_range_to_semaphore_pool(va_range)); + return; + case UVM_VA_RANGE_TYPE_DEVICE_P2P: + uvm_va_range_destroy_device_p2p(uvm_va_range_to_device_p2p(va_range), deferred_free_list); + return; default: UVM_ASSERT_MSG(0, "[0x%llx, 0x%llx] has type %d\n", va_range->node.start, va_range->node.end, va_range->type); } - - kmem_cache_free(g_uvm_va_range_cache, va_range); } -void uvm_va_range_zombify(uvm_va_range_t *va_range) +void uvm_va_range_zombify(uvm_va_range_managed_t *managed_range) { - if (!va_range) + if (!managed_range) return; - UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_MANAGED); - UVM_ASSERT(va_range->managed.vma_wrapper); + UVM_ASSERT(managed_range->vma_wrapper); // Destroy will be done by uvm_destroy_vma_managed - va_range->managed.vma_wrapper = NULL; + managed_range->vma_wrapper = NULL; } NV_STATUS uvm_api_clean_up_zombie_resources(UVM_CLEAN_UP_ZOMBIE_RESOURCES_PARAMS *params, struct file *filp) @@ -599,20 +660,20 @@ NV_STATUS uvm_api_validate_va_range(UVM_VALIDATE_VA_RANGE_PARAMS *params, struct return status; } -static NV_STATUS va_range_add_gpu_va_space_managed(uvm_va_range_t *va_range, +static NV_STATUS va_range_add_gpu_va_space_managed(uvm_va_range_managed_t *managed_range, uvm_gpu_va_space_t *gpu_va_space, struct mm_struct *mm) { - uvm_va_space_t *va_space = va_range->va_space; + uvm_va_space_t *va_space = managed_range->va_range.va_space; uvm_gpu_t *gpu = gpu_va_space->gpu; NV_STATUS status = NV_OK; const bool should_add_remote_mappings = - uvm_processor_mask_test(&uvm_va_range_get_policy(va_range)->accessed_by, gpu->id) || - uvm_processor_mask_test(&va_range->uvm_lite_gpus, gpu->id); + uvm_processor_mask_test(&managed_range->policy.accessed_by, gpu->id) || + uvm_processor_mask_test(&managed_range->va_range.uvm_lite_gpus, gpu->id); // By this time, the gpu is already in the registration mask. const bool should_disable_read_duplication = - uvm_va_range_get_policy(va_range)->read_duplication == UVM_READ_DUPLICATION_ENABLED && + managed_range->policy.read_duplication == UVM_READ_DUPLICATION_ENABLED && (uvm_va_space_can_read_duplicate(va_space, NULL) != uvm_va_space_can_read_duplicate(va_space, gpu)); // Combine conditions to perform a single VA block traversal @@ -624,7 +685,7 @@ static NV_STATUS va_range_add_gpu_va_space_managed(uvm_va_range_t *va_range, // TODO: Bug 2090378. Consolidate all per-VA block operations within // uvm_va_block_add_gpu_va_space so we only need to take the VA block // once. - for_each_va_block_in_va_range(va_range, va_block) { + for_each_va_block_in_va_range(managed_range, va_block) { if (gpu_va_space->ats.enabled) { // Notify that a new GPU VA space has been created. This is only // currently used for PDE1 pre-population on ATS systems. @@ -652,19 +713,19 @@ static NV_STATUS va_range_add_gpu_va_space_managed(uvm_va_range_t *va_range, return status; } -static NV_STATUS va_range_add_gpu_va_space_semaphore_pool(uvm_va_range_t *va_range, uvm_gpu_t *gpu) +static NV_STATUS va_range_add_gpu_va_space_semaphore_pool(uvm_va_range_semaphore_pool_t *semaphore_pool_range, + uvm_gpu_t *gpu) { uvm_mem_gpu_mapping_attrs_t *attrs; - UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_SEMAPHORE_POOL); - UVM_ASSERT(uvm_mem_mapped_on_gpu_kernel(va_range->semaphore_pool.mem, gpu)); + UVM_ASSERT(uvm_mem_mapped_on_gpu_kernel(semaphore_pool_range->mem, gpu)); - attrs = &va_range->semaphore_pool.gpu_attrs[uvm_id_gpu_index(gpu->id)]; + attrs = &semaphore_pool_range->gpu_attrs[uvm_id_gpu_index(gpu->id)]; - return uvm_mem_map_gpu_user(va_range->semaphore_pool.mem, + return uvm_mem_map_gpu_user(semaphore_pool_range->mem, gpu, - va_range->va_space, - (void *)va_range->node.start, + semaphore_pool_range->va_range.va_space, + (void *)semaphore_pool_range->va_range.node.start, attrs); } @@ -681,28 +742,29 @@ NV_STATUS uvm_va_range_add_gpu_va_space(uvm_va_range_t *va_range, switch (va_range->type) { case UVM_VA_RANGE_TYPE_MANAGED: - return va_range_add_gpu_va_space_managed(va_range, gpu_va_space, mm); + return va_range_add_gpu_va_space_managed(uvm_va_range_to_managed(va_range), gpu_va_space, mm); case UVM_VA_RANGE_TYPE_SEMAPHORE_POOL: - return va_range_add_gpu_va_space_semaphore_pool(va_range, gpu_va_space->gpu); + return va_range_add_gpu_va_space_semaphore_pool(uvm_va_range_to_semaphore_pool(va_range), + gpu_va_space->gpu); default: return NV_OK; } } -static void va_range_remove_gpu_va_space_managed(uvm_va_range_t *va_range, +static void va_range_remove_gpu_va_space_managed(uvm_va_range_managed_t *managed_range, uvm_gpu_va_space_t *gpu_va_space, struct mm_struct *mm) { uvm_va_block_t *va_block; - uvm_va_space_t *va_space = va_range->va_space; + uvm_va_space_t *va_space = managed_range->va_range.va_space; bool should_enable_read_duplicate; uvm_va_block_context_t *va_block_context = uvm_va_space_block_context(va_space, mm); should_enable_read_duplicate = - uvm_va_range_get_policy(va_range)->read_duplication == UVM_READ_DUPLICATION_ENABLED && + managed_range->policy.read_duplication == UVM_READ_DUPLICATION_ENABLED && uvm_va_space_can_read_duplicate(va_space, NULL) != uvm_va_space_can_read_duplicate(va_space, gpu_va_space->gpu); - for_each_va_block_in_va_range(va_range, va_block) { + for_each_va_block_in_va_range(managed_range, va_block) { uvm_mutex_lock(&va_block->lock); uvm_va_block_remove_gpu_va_space(va_block, gpu_va_space, va_block_context); uvm_mutex_unlock(&va_block->lock); @@ -712,7 +774,7 @@ static void va_range_remove_gpu_va_space_managed(uvm_va_range_t *va_range, } } -static void va_range_remove_gpu_va_space_external(uvm_va_range_t *va_range, +static void va_range_remove_gpu_va_space_external(uvm_va_range_external_t *external_range, uvm_gpu_t *gpu, struct list_head *deferred_free_list) { @@ -721,23 +783,23 @@ static void va_range_remove_gpu_va_space_external(uvm_va_range_t *va_range, UVM_ASSERT(deferred_free_list); - range_tree = uvm_ext_gpu_range_tree(va_range, gpu); + range_tree = uvm_ext_gpu_range_tree(external_range, gpu); uvm_mutex_lock(&range_tree->lock); - uvm_ext_gpu_map_for_each_safe(ext_map, ext_map_next, va_range, gpu) - uvm_ext_gpu_map_destroy(va_range, ext_map, deferred_free_list); + uvm_ext_gpu_map_for_each_safe(ext_map, ext_map_next, external_range, gpu) + uvm_ext_gpu_map_destroy(external_range, ext_map, deferred_free_list); uvm_mutex_unlock(&range_tree->lock); } -static void va_range_remove_gpu_va_space_semaphore_pool(uvm_va_range_t *va_range, uvm_gpu_t *gpu) +static void va_range_remove_gpu_va_space_semaphore_pool(uvm_va_range_semaphore_pool_t *semaphore_pool_range, + uvm_gpu_t *gpu) { - UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_SEMAPHORE_POOL); - if (g_uvm_global.conf_computing_enabled && (va_range->semaphore_pool.mem->dma_owner == gpu)) - uvm_va_range_destroy(va_range, NULL); + if (g_uvm_global.conf_computing_enabled && (semaphore_pool_range->mem->dma_owner == gpu)) + uvm_va_range_destroy(&semaphore_pool_range->va_range, NULL); else - uvm_mem_unmap_gpu_user(va_range->semaphore_pool.mem, gpu); + uvm_mem_unmap_gpu_user(semaphore_pool_range->mem, gpu); } void uvm_va_range_remove_gpu_va_space(uvm_va_range_t *va_range, @@ -747,22 +809,28 @@ void uvm_va_range_remove_gpu_va_space(uvm_va_range_t *va_range, { switch (va_range->type) { case UVM_VA_RANGE_TYPE_MANAGED: - va_range_remove_gpu_va_space_managed(va_range, gpu_va_space, mm); + va_range_remove_gpu_va_space_managed(uvm_va_range_to_managed(va_range), gpu_va_space, mm); break; case UVM_VA_RANGE_TYPE_EXTERNAL: - va_range_remove_gpu_va_space_external(va_range, gpu_va_space->gpu, deferred_free_list); + va_range_remove_gpu_va_space_external(uvm_va_range_to_external(va_range), + gpu_va_space->gpu, + deferred_free_list); break; case UVM_VA_RANGE_TYPE_CHANNEL: // All channels under this GPU VA space should've been removed before // removing the GPU VA space. - UVM_ASSERT(va_range->channel.gpu_va_space != gpu_va_space); + UVM_ASSERT(uvm_va_range_to_channel(va_range)->gpu_va_space != gpu_va_space); break; case UVM_VA_RANGE_TYPE_SKED_REFLECTED: - if (va_range->sked_reflected.gpu_va_space == gpu_va_space) - uvm_va_range_destroy_sked_reflected(va_range); + if (uvm_va_range_to_sked_reflected(va_range)->gpu_va_space == gpu_va_space) + uvm_va_range_deinit_sked_reflected(uvm_va_range_to_sked_reflected(va_range)); break; case UVM_VA_RANGE_TYPE_SEMAPHORE_POOL: - va_range_remove_gpu_va_space_semaphore_pool(va_range, gpu_va_space->gpu); + va_range_remove_gpu_va_space_semaphore_pool(uvm_va_range_to_semaphore_pool(va_range), + gpu_va_space->gpu); + break; + case UVM_VA_RANGE_TYPE_DEVICE_P2P: + uvm_va_range_deinit_device_p2p(uvm_va_range_to_device_p2p(va_range), deferred_free_list); break; default: UVM_ASSERT_MSG(0, "[0x%llx, 0x%llx] has type %d\n", @@ -770,17 +838,19 @@ void uvm_va_range_remove_gpu_va_space(uvm_va_range_t *va_range, } } -static NV_STATUS uvm_va_range_enable_peer_managed(uvm_va_range_t *va_range, uvm_gpu_t *gpu0, uvm_gpu_t *gpu1) +static NV_STATUS uvm_va_range_enable_peer_managed(uvm_va_range_managed_t *managed_range, + uvm_gpu_t *gpu0, + uvm_gpu_t *gpu1) { NV_STATUS status; uvm_va_block_t *va_block; - bool gpu0_accessed_by = uvm_processor_mask_test(&uvm_va_range_get_policy(va_range)->accessed_by, gpu0->id); - bool gpu1_accessed_by = uvm_processor_mask_test(&uvm_va_range_get_policy(va_range)->accessed_by, gpu1->id); - uvm_va_space_t *va_space = va_range->va_space; + bool gpu0_accessed_by = uvm_processor_mask_test(&managed_range->policy.accessed_by, gpu0->id); + bool gpu1_accessed_by = uvm_processor_mask_test(&managed_range->policy.accessed_by, gpu1->id); + uvm_va_space_t *va_space = managed_range->va_range.va_space; uvm_va_block_context_t *va_block_context = uvm_va_space_block_context(va_space, NULL); - for_each_va_block_in_va_range(va_range, va_block) { + for_each_va_block_in_va_range(managed_range, va_block) { // For UVM-Lite at most one GPU needs to map the peer GPU if it's the // preferred location, but it doesn't hurt to just try mapping both. if (gpu0_accessed_by) { @@ -807,7 +877,7 @@ NV_STATUS uvm_va_range_enable_peer(uvm_va_range_t *va_range, uvm_gpu_t *gpu0, uv { switch (va_range->type) { case UVM_VA_RANGE_TYPE_MANAGED: - return uvm_va_range_enable_peer_managed(va_range, gpu0, gpu1); + return uvm_va_range_enable_peer_managed(uvm_va_range_to_managed(va_range), gpu0, gpu1); case UVM_VA_RANGE_TYPE_EXTERNAL: // UVM_VA_RANGE_TYPE_EXTERNAL doesn't create new mappings when enabling peer access return NV_OK; @@ -827,7 +897,7 @@ NV_STATUS uvm_va_range_enable_peer(uvm_va_range_t *va_range, uvm_gpu_t *gpu0, uv } } -static void uvm_va_range_disable_peer_external(uvm_va_range_t *va_range, +static void uvm_va_range_disable_peer_external(uvm_va_range_external_t *external_range, uvm_gpu_t *mapping_gpu, uvm_gpu_t *owning_gpu, struct list_head *deferred_free_list) @@ -835,39 +905,39 @@ static void uvm_va_range_disable_peer_external(uvm_va_range_t *va_range, uvm_ext_gpu_range_tree_t *range_tree; uvm_ext_gpu_map_t *ext_map, *ext_map_next; - range_tree = uvm_ext_gpu_range_tree(va_range, mapping_gpu); + range_tree = uvm_ext_gpu_range_tree(external_range, mapping_gpu); uvm_mutex_lock(&range_tree->lock); - uvm_ext_gpu_map_for_each_safe(ext_map, ext_map_next, va_range, mapping_gpu) { + uvm_ext_gpu_map_for_each_safe(ext_map, ext_map_next, external_range, mapping_gpu) { if (ext_map->owning_gpu == owning_gpu && (!ext_map->is_sysmem || ext_map->is_egm)) { UVM_ASSERT(deferred_free_list); - uvm_ext_gpu_map_destroy(va_range, ext_map, deferred_free_list); + uvm_ext_gpu_map_destroy(external_range, ext_map, deferred_free_list); } } uvm_mutex_unlock(&range_tree->lock); } -static void uvm_va_range_disable_peer_managed(uvm_va_range_t *va_range, uvm_gpu_t *gpu0, uvm_gpu_t *gpu1) +static void uvm_va_range_disable_peer_managed(uvm_va_range_managed_t *managed_range, uvm_gpu_t *gpu0, uvm_gpu_t *gpu1) { uvm_va_block_t *va_block; uvm_gpu_t *uvm_lite_gpu_to_unmap = NULL; - bool uvm_lite_mode = uvm_processor_mask_test(&va_range->uvm_lite_gpus, gpu0->id) && - uvm_processor_mask_test(&va_range->uvm_lite_gpus, gpu1->id); + bool uvm_lite_mode = uvm_processor_mask_test(&managed_range->va_range.uvm_lite_gpus, gpu0->id) && + uvm_processor_mask_test(&managed_range->va_range.uvm_lite_gpus, gpu1->id); if (uvm_lite_mode) { // In UVM-Lite mode, the UVM-Lite GPUs can only have mappings to the the // preferred location. If peer mappings are being disabled to the // preferred location, then unmap the other GPU. // Nothing to do otherwise. - if (uvm_va_policy_preferred_location_equal(uvm_va_range_get_policy(va_range), gpu0->id, NUMA_NO_NODE)) + if (uvm_va_policy_preferred_location_equal(&managed_range->policy, gpu0->id, NUMA_NO_NODE)) uvm_lite_gpu_to_unmap = gpu1; - else if (uvm_va_policy_preferred_location_equal(uvm_va_range_get_policy(va_range), gpu1->id, NUMA_NO_NODE)) + else if (uvm_va_policy_preferred_location_equal(&managed_range->policy, gpu1->id, NUMA_NO_NODE)) uvm_lite_gpu_to_unmap = gpu0; else return; } - for_each_va_block_in_va_range(va_range, va_block) { + for_each_va_block_in_va_range(managed_range, va_block) { uvm_mutex_lock(&va_block->lock); if (uvm_lite_mode) uvm_va_block_unmap_preferred_location_uvm_lite(va_block, uvm_lite_gpu_to_unmap); @@ -876,13 +946,15 @@ static void uvm_va_range_disable_peer_managed(uvm_va_range_t *va_range, uvm_gpu_ uvm_mutex_unlock(&va_block->lock); } - if (uvm_lite_mode && !uvm_range_group_all_migratable(va_range->va_space, va_range->node.start, va_range->node.end)) { + if (uvm_lite_mode && !uvm_range_group_all_migratable(managed_range->va_range.va_space, + managed_range->va_range.node.start, + managed_range->va_range.node.end)) { UVM_ASSERT(uvm_lite_gpu_to_unmap); // Migration is prevented, but we had to unmap a UVM-Lite GPU. Update // the accessed by and UVM-Lite GPUs masks as it cannot be considered a // UVM-Lite GPU any more. - uvm_va_range_unset_accessed_by(va_range, uvm_lite_gpu_to_unmap->id, NULL); + uvm_va_range_unset_accessed_by(managed_range, uvm_lite_gpu_to_unmap->id, NULL); } } @@ -894,13 +966,13 @@ void uvm_va_range_disable_peer(uvm_va_range_t *va_range, switch (va_range->type) { case UVM_VA_RANGE_TYPE_MANAGED: - uvm_va_range_disable_peer_managed(va_range, gpu0, gpu1); + uvm_va_range_disable_peer_managed(uvm_va_range_to_managed(va_range), gpu0, gpu1); break; case UVM_VA_RANGE_TYPE_EXTERNAL: // If GPU 0 has a mapping to GPU 1, remove GPU 0's mapping - uvm_va_range_disable_peer_external(va_range, gpu0, gpu1, deferred_free_list); + uvm_va_range_disable_peer_external(uvm_va_range_to_external(va_range), gpu0, gpu1, deferred_free_list); // If GPU 1 has a mapping to GPU 0, remove GPU 1's mapping - uvm_va_range_disable_peer_external(va_range, gpu1, gpu0, deferred_free_list); + uvm_va_range_disable_peer_external(uvm_va_range_to_external(va_range), gpu1, gpu0, deferred_free_list); break; case UVM_VA_RANGE_TYPE_CHANNEL: // UVM_VA_RANGE_TYPE_CHANNEL should never have peer mappings @@ -911,17 +983,21 @@ void uvm_va_range_disable_peer(uvm_va_range_t *va_range, case UVM_VA_RANGE_TYPE_SEMAPHORE_POOL: // UVM_VA_RANGE_TYPE_SEMAPHORE_POOL should never have peer mappings break; + case UVM_VA_RANGE_TYPE_DEVICE_P2P: + // UVM_VA_RANGE_TYPE_DEVICE_P2P should never have peer mappings + break; default: UVM_ASSERT_MSG(0, "[0x%llx, 0x%llx] has type %d\n", va_range->node.start, va_range->node.end, va_range->type); } } -static NV_STATUS va_range_register_gpu_semaphore_pool(uvm_va_range_t *va_range, uvm_gpu_t *gpu) +static NV_STATUS va_range_register_gpu_semaphore_pool(uvm_va_range_semaphore_pool_t *semaphore_pool_range, + uvm_gpu_t *gpu) { // TODO: Bug 1812419: pass GPU mapping attributes to uvm_mem_map_gpu_kernel // once that function accepts them. - return uvm_mem_map_gpu_kernel(va_range->semaphore_pool.mem, gpu); + return uvm_mem_map_gpu_kernel(semaphore_pool_range->mem, gpu); } NV_STATUS uvm_va_range_register_gpu(uvm_va_range_t *va_range, uvm_gpu_t *gpu) @@ -930,25 +1006,25 @@ NV_STATUS uvm_va_range_register_gpu(uvm_va_range_t *va_range, uvm_gpu_t *gpu) uvm_assert_rwsem_locked_write(&va_range->va_space->lock); if (va_range->type == UVM_VA_RANGE_TYPE_SEMAPHORE_POOL) - return va_range_register_gpu_semaphore_pool(va_range, gpu); + return va_range_register_gpu_semaphore_pool(uvm_va_range_to_semaphore_pool(va_range), gpu); return NV_OK; } -static void va_range_unregister_gpu_managed(uvm_va_range_t *va_range, uvm_gpu_t *gpu, struct mm_struct *mm) +static void va_range_unregister_gpu_managed(uvm_va_range_managed_t *managed_range, uvm_gpu_t *gpu, struct mm_struct *mm) { uvm_va_block_t *va_block; - // Reset preferred location and accessed-by of VA ranges if needed + // Reset preferred location and accessed-by of managed ranges if needed // Note: ignoring the return code of uvm_va_range_set_preferred_location since this // will only return on error when setting a preferred location, not on a reset - if (uvm_va_policy_preferred_location_equal(uvm_va_range_get_policy(va_range), gpu->id, NUMA_NO_NODE)) - (void)uvm_va_range_set_preferred_location(va_range, UVM_ID_INVALID, NUMA_NO_NODE, mm, NULL); + if (uvm_va_policy_preferred_location_equal(&managed_range->policy, gpu->id, NUMA_NO_NODE)) + (void)uvm_va_range_set_preferred_location(managed_range, UVM_ID_INVALID, NUMA_NO_NODE, mm, NULL); - uvm_va_range_unset_accessed_by(va_range, gpu->id, NULL); + uvm_va_range_unset_accessed_by(managed_range, gpu->id, NULL); // Migrate and free any remaining resident allocations on this GPU - for_each_va_block_in_va_range(va_range, va_block) + for_each_va_block_in_va_range(managed_range, va_block) uvm_va_block_unregister_gpu(va_block, gpu, mm); } @@ -956,48 +1032,49 @@ static void va_range_unregister_gpu_managed(uvm_va_range_t *va_range, uvm_gpu_t // were removed when the corresponding GPU VA space was removed. However, other // GPUs could still have mappings to memory resident on this GPU, so we have to // unmap those. -static void va_range_unregister_gpu_external(uvm_va_range_t *va_range, +static void va_range_unregister_gpu_external(uvm_va_range_external_t *external_range, uvm_gpu_t *gpu, struct list_head *deferred_free_list) { uvm_ext_gpu_map_t *ext_map, *ext_map_next; uvm_gpu_t *other_gpu; - for_each_va_space_gpu_in_mask(other_gpu, va_range->va_space, &va_range->external.mapped_gpus) { - uvm_ext_gpu_range_tree_t *range_tree = uvm_ext_gpu_range_tree(va_range, other_gpu); + for_each_va_space_gpu_in_mask(other_gpu, external_range->va_range.va_space, &external_range->mapped_gpus) { + uvm_ext_gpu_range_tree_t *range_tree = uvm_ext_gpu_range_tree(external_range, other_gpu); UVM_ASSERT(other_gpu != gpu); uvm_mutex_lock(&range_tree->lock); - uvm_ext_gpu_map_for_each_safe(ext_map, ext_map_next, va_range, other_gpu) { + uvm_ext_gpu_map_for_each_safe(ext_map, ext_map_next, external_range, other_gpu) { if (ext_map->owning_gpu == gpu) { UVM_ASSERT(deferred_free_list); - uvm_ext_gpu_map_destroy(va_range, ext_map, deferred_free_list); + uvm_ext_gpu_map_destroy(external_range, ext_map, deferred_free_list); } } uvm_mutex_unlock(&range_tree->lock); } } -static void va_range_unregister_gpu_semaphore_pool(uvm_va_range_t *va_range, uvm_gpu_t *gpu) +static void va_range_unregister_gpu_semaphore_pool(uvm_va_range_semaphore_pool_t *semaphore_pool_range, + uvm_gpu_t *gpu) { NV_STATUS status; // Ranges for this GPU should have been previously unmapped from the user VA // space during GPU VA space unregister, which should have already happened. - UVM_ASSERT(!uvm_mem_mapped_on_gpu_user(va_range->semaphore_pool.mem, gpu)); - UVM_ASSERT(uvm_mem_mapped_on_gpu_kernel(va_range->semaphore_pool.mem, gpu)); + UVM_ASSERT(!uvm_mem_mapped_on_gpu_user(semaphore_pool_range->mem, gpu)); + UVM_ASSERT(uvm_mem_mapped_on_gpu_kernel(semaphore_pool_range->mem, gpu)); - uvm_mutex_lock(&va_range->semaphore_pool.tracker_lock); - status = uvm_tracker_wait(&va_range->semaphore_pool.tracker); - uvm_mutex_unlock(&va_range->semaphore_pool.tracker_lock); + uvm_mutex_lock(&semaphore_pool_range->tracker_lock); + status = uvm_tracker_wait(&semaphore_pool_range->tracker); + uvm_mutex_unlock(&semaphore_pool_range->tracker_lock); if (status != NV_OK) UVM_ASSERT(status == uvm_global_get_status()); - uvm_mem_unmap_gpu_phys(va_range->semaphore_pool.mem, gpu); + uvm_mem_unmap_gpu_phys(semaphore_pool_range->mem, gpu); - va_range->semaphore_pool.gpu_attrs[uvm_id_gpu_index(gpu->id)] = va_range->semaphore_pool.default_gpu_attrs; - if (va_range->semaphore_pool.owner == gpu) - va_range->semaphore_pool.owner = NULL; + semaphore_pool_range->gpu_attrs[uvm_id_gpu_index(gpu->id)] = semaphore_pool_range->default_gpu_attrs; + if (semaphore_pool_range->owner == gpu) + semaphore_pool_range->owner = NULL; } void uvm_va_range_unregister_gpu(uvm_va_range_t *va_range, @@ -1007,25 +1084,30 @@ void uvm_va_range_unregister_gpu(uvm_va_range_t *va_range, { switch (va_range->type) { case UVM_VA_RANGE_TYPE_MANAGED: - va_range_unregister_gpu_managed(va_range, gpu, mm); + va_range_unregister_gpu_managed(uvm_va_range_to_managed(va_range), gpu, mm); break; case UVM_VA_RANGE_TYPE_EXTERNAL: - va_range_unregister_gpu_external(va_range, gpu, deferred_free_list); + va_range_unregister_gpu_external(uvm_va_range_to_external(va_range), gpu, deferred_free_list); break; case UVM_VA_RANGE_TYPE_CHANNEL: // All ranges should have been destroyed by GPU VA space unregister, // which should have already happened. - UVM_ASSERT(va_range->channel.gpu_va_space->gpu != gpu); + UVM_ASSERT(uvm_va_range_to_channel(va_range)->gpu_va_space->gpu != gpu); break; case UVM_VA_RANGE_TYPE_SKED_REFLECTED: // All ranges for this GPU should have been unmapped by GPU VA space - // unregister (uvm_va_range_destroy_sked_reflected), which should + // unregister (uvm_va_range_deinit_sked_reflected), which should // have already happened. - if (va_range->sked_reflected.gpu_va_space != NULL) - UVM_ASSERT(va_range->sked_reflected.gpu_va_space->gpu != gpu); + if (uvm_va_range_to_sked_reflected(va_range)->gpu_va_space != NULL) + UVM_ASSERT(uvm_va_range_to_sked_reflected(va_range)->gpu_va_space->gpu != gpu); break; case UVM_VA_RANGE_TYPE_SEMAPHORE_POOL: - va_range_unregister_gpu_semaphore_pool(va_range, gpu); + va_range_unregister_gpu_semaphore_pool(uvm_va_range_to_semaphore_pool(va_range), gpu); + break; + case UVM_VA_RANGE_TYPE_DEVICE_P2P: + // All ranges should have been deinited by GPU VA space unregister, + // which should have already happened. + UVM_ASSERT(!uvm_va_range_to_device_p2p(va_range)->p2p_mem); break; default: UVM_ASSERT_MSG(0, "[0x%llx, 0x%llx] has type %d\n", @@ -1040,31 +1122,31 @@ void uvm_va_range_unregister_gpu(uvm_va_range_t *va_range, // The caller will do the range tree split. // // If this fails it leaves existing unchanged. -static NV_STATUS uvm_va_range_split_blocks(uvm_va_range_t *existing, uvm_va_range_t *new) +static NV_STATUS uvm_va_range_split_blocks(uvm_va_range_managed_t *existing, uvm_va_range_managed_t *new) { uvm_va_block_t *old_block, *block = NULL; size_t existing_blocks, split_index, new_index = 0; NV_STATUS status; - UVM_ASSERT(new->node.start > existing->node.start); - UVM_ASSERT(new->node.end <= existing->node.end); + UVM_ASSERT(new->va_range.node.start > existing->va_range.node.start); + UVM_ASSERT(new->va_range.node.end <= existing->va_range.node.end); - split_index = uvm_va_range_block_index(existing, new->node.start); + split_index = uvm_va_range_block_index(existing, new->va_range.node.start); // Handle a block spanning the split point - if (block_calc_start(existing, split_index) != new->node.start) { + if (block_calc_start(existing, split_index) != new->va_range.node.start) { // If a populated block actually spans the split point, we have to split // the block. Otherwise just account for the extra entry in the arrays. old_block = uvm_va_range_block(existing, split_index); if (old_block) { - UVM_ASSERT(old_block->start < new->node.start); - status = uvm_va_block_split(old_block, new->node.start - 1, &block, new); + UVM_ASSERT(old_block->start < new->va_range.node.start); + status = uvm_va_block_split(old_block, new->va_range.node.start - 1, &block, new); if (status != NV_OK) return status; // No memory barrier is needed since we're holding the va_space lock in // write mode, so no other thread can access the blocks array. - atomic_long_set(&new->blocks[0], (long)block); + atomic_long_set(&new->va_range.blocks[0], (long)block); } new_index = 1; @@ -1080,9 +1162,9 @@ static NV_STATUS uvm_va_range_split_blocks(uvm_va_range_t *existing, uvm_va_rang // of our blocks doesn't have the 'inject_split_error' flag set. We clear // that here to prevent multiple errors caused by one // 'uvm_test_va_range_inject_split_error' call. - if (existing->inject_split_error) { + if (existing->va_range.inject_split_error) { UVM_ASSERT(!block); - existing->inject_split_error = false; + existing->va_range.inject_split_error = false; for_each_va_block_in_va_range(existing, block) { uvm_va_block_test_t *block_test = uvm_va_block_get_test(block); @@ -1112,7 +1194,7 @@ static NV_STATUS uvm_va_range_split_blocks(uvm_va_range_t *existing, uvm_va_rang // existing (before) [----- A ----][----- B ----][----- C ----] // existing (after [----- A ----][- B -] // new [- N -][----- C ----] - // ^new->blocks[0] + // ^new->va_range.blocks[0] // Note, if we split the last block of existing, this won't iterate at all. for (; new_index < uvm_va_range_num_blocks(new); new_index++) { @@ -1126,14 +1208,14 @@ static NV_STATUS uvm_va_range_split_blocks(uvm_va_range_t *existing, uvm_va_rang // As soon as we make this assignment and drop the lock, the reverse // mapping code can start looking at new, so new must be ready to go. uvm_mutex_lock(&block->lock); - UVM_ASSERT(block->va_range == existing); - block->va_range = new; + UVM_ASSERT(block->managed_range == existing); + block->managed_range = new; uvm_mutex_unlock(&block->lock); // No memory barrier is needed since we're holding the va_space lock in // write mode, so no other thread can access the blocks array. - atomic_long_set(&new->blocks[new_index], (long)block); - atomic_long_set(&existing->blocks[split_index + new_index], (long)NULL); + atomic_long_set(&new->va_range.blocks[new_index], (long)block); + atomic_long_set(&existing->va_range.blocks[split_index + new_index], (long)NULL); } blocks_array_shrink(existing, existing_blocks); @@ -1141,60 +1223,55 @@ static NV_STATUS uvm_va_range_split_blocks(uvm_va_range_t *existing, uvm_va_rang return NV_OK; } -NV_STATUS uvm_va_range_split(uvm_va_range_t *existing_va_range, +NV_STATUS uvm_va_range_split(uvm_va_range_managed_t *existing_managed_range, NvU64 new_end, - uvm_va_range_t **new_va_range) + uvm_va_range_managed_t **new_managed_range_out) { - uvm_va_space_t *va_space = existing_va_range->va_space; - uvm_va_range_t *new = NULL; + uvm_va_space_t *va_space = existing_managed_range->va_range.va_space; + uvm_va_policy_t *new_policy, *existing_policy; + uvm_va_range_managed_t *new = NULL; uvm_perf_event_data_t event_data; NV_STATUS status; - UVM_ASSERT(existing_va_range->type == UVM_VA_RANGE_TYPE_MANAGED); - UVM_ASSERT(new_end > existing_va_range->node.start); - UVM_ASSERT(new_end < existing_va_range->node.end); + UVM_ASSERT(new_end > existing_managed_range->va_range.node.start); + UVM_ASSERT(new_end < existing_managed_range->va_range.node.end); UVM_ASSERT(PAGE_ALIGNED(new_end + 1)); uvm_assert_rwsem_locked_write(&va_space->lock); - new = uvm_va_range_alloc_managed(va_space, new_end + 1, existing_va_range->node.end); - if (!new) { - status = NV_ERR_NO_MEMORY; - goto error; - } + new = uvm_va_range_alloc_managed(va_space, new_end + 1, existing_managed_range->va_range.node.end); + if (!new) + return NV_ERR_NO_MEMORY; - // The new va_range is under the same vma. If this is a uvm_vm_open, the - // caller takes care of updating existing's vma_wrapper for us. - new->managed.vma_wrapper = existing_va_range->managed.vma_wrapper; + // The new managed_range is under the same vma. If this is a uvm_vm_open, + // the caller takes care of updating existing's vma_wrapper for us. + new->vma_wrapper = existing_managed_range->vma_wrapper; // Copy over state before splitting blocks so any block lookups happening // concurrently on the eviction path will see the new range's data. - uvm_va_range_get_policy(new)->read_duplication = uvm_va_range_get_policy(existing_va_range)->read_duplication; - uvm_va_range_get_policy(new)->preferred_location = uvm_va_range_get_policy(existing_va_range)->preferred_location; - uvm_va_range_get_policy(new)->preferred_nid = uvm_va_range_get_policy(existing_va_range)->preferred_nid; - uvm_processor_mask_copy(&uvm_va_range_get_policy(new)->accessed_by, - &uvm_va_range_get_policy(existing_va_range)->accessed_by); - uvm_processor_mask_copy(&new->uvm_lite_gpus, &existing_va_range->uvm_lite_gpus); - - status = uvm_va_range_split_blocks(existing_va_range, new); - if (status != NV_OK) - goto error; + new_policy = &new->policy; + existing_policy = &existing_managed_range->policy; + new_policy->read_duplication = existing_policy->read_duplication; + new_policy->preferred_location = existing_policy->preferred_location; + new_policy->preferred_nid = existing_policy->preferred_nid; + uvm_processor_mask_copy(&new_policy->accessed_by, + &existing_policy->accessed_by); + uvm_processor_mask_copy(&new->va_range.uvm_lite_gpus, &existing_managed_range->va_range.uvm_lite_gpus); + + status = uvm_va_range_split_blocks(existing_managed_range, new); + if (status != NV_OK) { + uvm_va_range_destroy(&new->va_range, NULL); + return status; + } // Finally, update the VA range tree - uvm_range_tree_split(&va_space->va_range_tree, &existing_va_range->node, &new->node); + uvm_range_tree_split(&va_space->va_range_tree, &existing_managed_range->va_range.node, &new->va_range.node); - if (new->type == UVM_VA_RANGE_TYPE_MANAGED) { - event_data.range_shrink.range = new; - uvm_perf_event_notify(&va_space->perf_events, UVM_PERF_EVENT_RANGE_SHRINK, &event_data); - } + event_data.range_shrink.range = &new->va_range; + uvm_perf_event_notify(&va_space->perf_events, UVM_PERF_EVENT_RANGE_SHRINK, &event_data); - if (new_va_range) - *new_va_range = new; + if (new_managed_range_out) + *new_managed_range_out = new; return NV_OK; - -error: - uvm_va_range_destroy(new, NULL); - return status; - } uvm_va_range_t *uvm_va_range_find(uvm_va_space_t *va_space, NvU64 addr) @@ -1222,20 +1299,19 @@ uvm_va_range_t *uvm_va_space_iter_next(uvm_va_range_t *va_range, NvU64 end) return uvm_va_range_container(node); } -size_t uvm_va_range_num_blocks(uvm_va_range_t *va_range) +size_t uvm_va_range_num_blocks(uvm_va_range_managed_t *managed_range) { - NvU64 start = UVM_VA_BLOCK_ALIGN_DOWN(va_range->node.start); - NvU64 end = UVM_VA_BLOCK_ALIGN_UP(va_range->node.end); // End is inclusive + NvU64 start = UVM_VA_BLOCK_ALIGN_DOWN(managed_range->va_range.node.start); + NvU64 end = UVM_VA_BLOCK_ALIGN_UP(managed_range->va_range.node.end); // End is inclusive return (end - start) / UVM_VA_BLOCK_SIZE; } -size_t uvm_va_range_block_index(uvm_va_range_t *va_range, NvU64 addr) +size_t uvm_va_range_block_index(uvm_va_range_managed_t *managed_range, NvU64 addr) { size_t addr_index, start_index, index; - UVM_ASSERT(addr >= va_range->node.start); - UVM_ASSERT(addr <= va_range->node.end); - UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_MANAGED); + UVM_ASSERT(addr >= managed_range->va_range.node.start); + UVM_ASSERT(addr <= managed_range->va_range.node.end); // Each block will cover as much space as possible within the aligned // UVM_VA_BLOCK_SIZE, up to the parent VA range boundaries. In other words, @@ -1244,19 +1320,19 @@ size_t uvm_va_range_block_index(uvm_va_range_t *va_range, NvU64 addr) // UVM_VA_BLOCK_SIZE chunk, none of those will have more than 1 block unless // they span a UVM_VA_BLOCK_SIZE alignment boundary. addr_index = (size_t)(addr / UVM_VA_BLOCK_SIZE); - start_index = (size_t)(va_range->node.start / UVM_VA_BLOCK_SIZE); + start_index = (size_t)(managed_range->va_range.node.start / UVM_VA_BLOCK_SIZE); index = addr_index - start_index; - UVM_ASSERT(index < uvm_va_range_num_blocks(va_range)); + UVM_ASSERT(index < uvm_va_range_num_blocks(managed_range)); return index; } -NV_STATUS uvm_va_range_block_create(uvm_va_range_t *va_range, size_t index, uvm_va_block_t **out_block) +NV_STATUS uvm_va_range_block_create(uvm_va_range_managed_t *managed_range, size_t index, uvm_va_block_t **out_block) { uvm_va_block_t *block, *old; NV_STATUS status; - block = uvm_va_range_block(va_range, index); + block = uvm_va_range_block(managed_range, index); if (!block) { // No block has been created here yet, so allocate one and attempt to // insert it. Note that this runs the risk of an out-of-memory error @@ -1264,17 +1340,17 @@ NV_STATUS uvm_va_range_block_create(uvm_va_range_t *va_range, size_t index, uvm_ // the same address. This should be extremely rare. There is also // precedent in the Linux kernel, which does the same thing for demand- // allocation of anonymous pages. - status = uvm_va_block_create(va_range, - block_calc_start(va_range, index), - block_calc_end(va_range, index), + status = uvm_va_block_create(managed_range, + block_calc_start(managed_range, index), + block_calc_end(managed_range, index), &block); if (status != NV_OK) return status; // Try to insert it - old = (uvm_va_block_t *)nv_atomic_long_cmpxchg(&va_range->blocks[index], - (long)NULL, - (long)block); + old = (uvm_va_block_t *)atomic_long_cmpxchg(&managed_range->va_range.blocks[index], + (long)NULL, + (long)block); if (old) { // Someone else beat us on the insert uvm_va_block_release(block); @@ -1286,23 +1362,21 @@ NV_STATUS uvm_va_range_block_create(uvm_va_range_t *va_range, size_t index, uvm_ return NV_OK; } -uvm_va_block_t *uvm_va_range_block_next(uvm_va_range_t *va_range, uvm_va_block_t *va_block) +uvm_va_block_t *uvm_va_range_block_next(uvm_va_range_managed_t *managed_range, uvm_va_block_t *va_block) { - uvm_va_space_t *va_space = va_range->va_space; + uvm_va_space_t *va_space = managed_range->va_range.va_space; size_t i = 0; uvm_assert_rwsem_locked(&va_space->lock); - UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_MANAGED); - if (va_block) - i = uvm_va_range_block_index(va_range, va_block->start) + 1; + i = uvm_va_range_block_index(managed_range, va_block->start) + 1; - for (; i < uvm_va_range_num_blocks(va_range); i++) { - va_block = uvm_va_range_block(va_range, i); + for (; i < uvm_va_range_num_blocks(managed_range); i++) { + va_block = uvm_va_range_block(managed_range, i); if (va_block) { - UVM_ASSERT(va_block->va_range == va_range); - UVM_ASSERT(uvm_va_range_block_index(va_range, va_block->start) == i); + UVM_ASSERT(va_block->managed_range == managed_range); + UVM_ASSERT(uvm_va_range_block_index(managed_range, va_block->start) == i); return va_block; } } @@ -1310,20 +1384,18 @@ uvm_va_block_t *uvm_va_range_block_next(uvm_va_range_t *va_range, uvm_va_block_t return NULL; } -static NV_STATUS range_unmap_mask(uvm_va_range_t *va_range, +static NV_STATUS range_unmap_mask(uvm_va_range_managed_t *managed_range, const uvm_processor_mask_t *mask, uvm_tracker_t *out_tracker) { - uvm_va_space_t *va_space = va_range->va_space; + uvm_va_space_t *va_space = managed_range->va_range.va_space; uvm_va_block_context_t *block_context = uvm_va_space_block_context(va_space, NULL); uvm_va_block_t *block; - UVM_ASSERT_MSG(va_range->type == UVM_VA_RANGE_TYPE_MANAGED, "type 0x%x\n", va_range->type); - if (uvm_processor_mask_empty(mask)) return NV_OK; - for_each_va_block_in_va_range(va_range, block) { + for_each_va_block_in_va_range(managed_range, block) { NV_STATUS status; uvm_va_block_region_t region = uvm_va_block_region_from_block(block); @@ -1340,42 +1412,40 @@ static NV_STATUS range_unmap_mask(uvm_va_range_t *va_range, return NV_OK; } -static NV_STATUS range_unmap(uvm_va_range_t *va_range, uvm_processor_id_t processor, uvm_tracker_t *out_tracker) +static NV_STATUS range_unmap(uvm_va_range_managed_t *managed_range, + uvm_processor_id_t processor, + uvm_tracker_t *out_tracker) { uvm_processor_mask_t *mask; - uvm_va_space_t *va_space = va_range->va_space; + uvm_va_space_t *va_space = managed_range->va_range.va_space; uvm_assert_rwsem_locked_write(&va_space->lock); mask = &va_space->unmap_mask; - UVM_ASSERT_MSG(va_range->type == UVM_VA_RANGE_TYPE_MANAGED, "type 0x%x\n", va_range->type); - uvm_processor_mask_zero(mask); uvm_processor_mask_set(mask, processor); - return range_unmap_mask(va_range, mask, out_tracker); + return range_unmap_mask(managed_range, mask, out_tracker); } -static NV_STATUS range_map_uvm_lite_gpus(uvm_va_range_t *va_range, uvm_tracker_t *out_tracker) +static NV_STATUS range_map_uvm_lite_gpus(uvm_va_range_managed_t *managed_range, uvm_tracker_t *out_tracker) { NV_STATUS status = NV_OK; uvm_va_block_t *va_block; - uvm_va_block_context_t *va_block_context = uvm_va_space_block_context(va_range->va_space, NULL); - - UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_MANAGED); + uvm_va_block_context_t *va_block_context = uvm_va_space_block_context(managed_range->va_range.va_space, NULL); - if (uvm_processor_mask_empty(&va_range->uvm_lite_gpus)) + if (uvm_processor_mask_empty(&managed_range->va_range.uvm_lite_gpus)) return NV_OK; - for_each_va_block_in_va_range(va_range, va_block) { + for_each_va_block_in_va_range(managed_range, va_block) { // UVM-Lite GPUs always map with RWA uvm_mutex_lock(&va_block->lock); status = UVM_VA_BLOCK_RETRY_LOCKED(va_block, NULL, uvm_va_block_map_mask(va_block, va_block_context, - &va_range->uvm_lite_gpus, + &managed_range->va_range.uvm_lite_gpus, uvm_va_block_region_from_block(va_block), NULL, UVM_PROT_READ_WRITE_ATOMIC, @@ -1428,16 +1498,15 @@ static void calc_uvm_lite_gpus_mask(uvm_va_space_t *va_space, } // Update the mask of GPUs that follow the UVM-Lite behaviour -static void range_update_uvm_lite_gpus_mask(uvm_va_range_t *va_range) +static void range_update_uvm_lite_gpus_mask(uvm_va_range_managed_t *managed_range) { - UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_MANAGED); - calc_uvm_lite_gpus_mask(va_range->va_space, - uvm_va_range_get_policy(va_range)->preferred_location, - &uvm_va_range_get_policy(va_range)->accessed_by, - &va_range->uvm_lite_gpus); + calc_uvm_lite_gpus_mask(managed_range->va_range.va_space, + managed_range->policy.preferred_location, + &managed_range->policy.accessed_by, + &managed_range->va_range.uvm_lite_gpus); } -NV_STATUS uvm_va_range_set_preferred_location(uvm_va_range_t *va_range, +NV_STATUS uvm_va_range_set_preferred_location(uvm_va_range_managed_t *managed_range, uvm_processor_id_t preferred_location, int preferred_cpu_nid, struct mm_struct *mm, @@ -1449,13 +1518,13 @@ NV_STATUS uvm_va_range_set_preferred_location(uvm_va_range_t *va_range, uvm_processor_mask_t *set_accessed_by_processors = NULL; uvm_range_group_range_iter_t iter; uvm_range_group_range_t *rgr = NULL; - uvm_va_space_t *va_space = va_range->va_space; + uvm_va_space_t *va_space = managed_range->va_range.va_space; uvm_va_block_t *va_block; uvm_va_block_context_t *va_block_context; uvm_va_policy_t *va_range_policy; + NvU64 start, end; uvm_assert_rwsem_locked_write(&va_space->lock); - UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_MANAGED); all_uvm_lite_gpus = uvm_processor_mask_cache_alloc(); if (!all_uvm_lite_gpus) { @@ -1475,26 +1544,29 @@ NV_STATUS uvm_va_range_set_preferred_location(uvm_va_range_t *va_range, goto out; } - va_range_policy = uvm_va_range_get_policy(va_range); + va_range_policy = &managed_range->policy; if (uvm_va_policy_preferred_location_equal(va_range_policy, preferred_location, preferred_cpu_nid)) goto out; - // Mark all range group ranges within this VA range as migrated since the preferred location has changed. - uvm_range_group_for_each_range_in(rgr, va_space, va_range->node.start, va_range->node.end) { + // Mark all range group ranges within this managed range as migrated since + // the preferred location has changed. + start = managed_range->va_range.node.start; + end = managed_range->va_range.node.end; + uvm_range_group_for_each_range_in(rgr, va_space, start, end) { uvm_spin_lock(&rgr->range_group->migrated_ranges_lock); if (list_empty(&rgr->range_group_migrated_list_node)) list_move_tail(&rgr->range_group_migrated_list_node, &rgr->range_group->migrated_ranges); uvm_spin_unlock(&rgr->range_group->migrated_ranges_lock); } - // Calculate the new UVM-Lite GPUs mask, but don't update va_range state so - // that we can keep block_page_check_mappings() happy while updating the - // mappings. + // Calculate the new UVM-Lite GPUs mask, but don't update managed_range + // state so that we can keep block_page_check_mappings() happy while + // updating the mappings. calc_uvm_lite_gpus_mask(va_space, preferred_location, &va_range_policy->accessed_by, new_uvm_lite_gpus); - // If the range contains non-migratable range groups, check that new UVM-Lite GPUs - // can all map the new preferred location. - if (!uvm_range_group_all_migratable(va_space, va_range->node.start, va_range->node.end) && + // If the range contains non-migratable range groups, check that new + // UVM-Lite GPUs can all map the new preferred location. + if (!uvm_range_group_all_migratable(va_space, start, end) && UVM_ID_IS_VALID(preferred_location) && !uvm_processor_mask_subset(new_uvm_lite_gpus, &va_space->accessible_from[uvm_id_value(preferred_location)])) { status = NV_ERR_INVALID_DEVICE; @@ -1502,9 +1574,10 @@ NV_STATUS uvm_va_range_set_preferred_location(uvm_va_range_t *va_range, } if (UVM_ID_IS_INVALID(preferred_location)) { - uvm_range_group_for_each_migratability_in_safe(&iter, va_space, va_range->node.start, va_range->node.end) { + uvm_range_group_for_each_migratability_in_safe(&iter, va_space, start, end) { if (!iter.migratable) { - // Clear the range group assocation for any unmigratable ranges if there is no preferred location + // Clear the range group assocation for any unmigratable ranges + // if there is no preferred location status = uvm_range_group_assign_range(va_space, NULL, iter.start, iter.end); if (status != NV_OK) goto out; @@ -1517,14 +1590,14 @@ NV_STATUS uvm_va_range_set_preferred_location(uvm_va_range_t *va_range, // have stale mappings to the old preferred location. // - GPUs that will continue to be UVM-Lite GPUs or are new UVM-Lite GPUs // need to be unmapped so that the new preferred location can be mapped. - uvm_processor_mask_or(all_uvm_lite_gpus, &va_range->uvm_lite_gpus, new_uvm_lite_gpus); - status = range_unmap_mask(va_range, all_uvm_lite_gpus, out_tracker); + uvm_processor_mask_or(all_uvm_lite_gpus, &managed_range->va_range.uvm_lite_gpus, new_uvm_lite_gpus); + status = range_unmap_mask(managed_range, all_uvm_lite_gpus, out_tracker); if (status != NV_OK) goto out; // GPUs that stop being UVM-Lite, but are in the accessed_by mask need to // have any possible mappings established. - uvm_processor_mask_andnot(set_accessed_by_processors, &va_range->uvm_lite_gpus, new_uvm_lite_gpus); + uvm_processor_mask_andnot(set_accessed_by_processors, &managed_range->va_range.uvm_lite_gpus, new_uvm_lite_gpus); // A GPU which had been in UVM-Lite mode before must still be in UVM-Lite // mode if it is the new preferred location. Otherwise we'd have to be more @@ -1540,14 +1613,14 @@ NV_STATUS uvm_va_range_set_preferred_location(uvm_va_range_t *va_range, uvm_processor_mask_and(set_accessed_by_processors, set_accessed_by_processors, &va_range_policy->accessed_by); - // Now update the va_range state + // Now update the managed_range state va_range_policy->preferred_location = preferred_location; va_range_policy->preferred_nid = preferred_cpu_nid; - uvm_processor_mask_copy(&va_range->uvm_lite_gpus, new_uvm_lite_gpus); + uvm_processor_mask_copy(&managed_range->va_range.uvm_lite_gpus, new_uvm_lite_gpus); va_block_context = uvm_va_space_block_context(va_space, mm); - for_each_va_block_in_va_range(va_range, va_block) { + for_each_va_block_in_va_range(managed_range, va_block) { uvm_processor_id_t id; uvm_va_block_region_t region = uvm_va_block_region_from_block(va_block); @@ -1583,7 +1656,7 @@ NV_STATUS uvm_va_range_set_preferred_location(uvm_va_range_t *va_range, // And lastly map all of the current UVM-Lite GPUs to the resident pages on // the new preferred location. Anything that's not resident right now will // get mapped on the next PreventMigration(). - status = range_map_uvm_lite_gpus(va_range, out_tracker); + status = range_map_uvm_lite_gpus(managed_range, out_tracker); out: uvm_processor_mask_cache_free(set_accessed_by_processors); @@ -1593,15 +1666,15 @@ NV_STATUS uvm_va_range_set_preferred_location(uvm_va_range_t *va_range, return status; } -NV_STATUS uvm_va_range_set_accessed_by(uvm_va_range_t *va_range, +NV_STATUS uvm_va_range_set_accessed_by(uvm_va_range_managed_t *managed_range, uvm_processor_id_t processor_id, struct mm_struct *mm, uvm_tracker_t *out_tracker) { NV_STATUS status = NV_OK; uvm_va_block_t *va_block; - uvm_va_space_t *va_space = va_range->va_space; - uvm_va_policy_t *policy = uvm_va_range_get_policy(va_range); + uvm_va_space_t *va_space = managed_range->va_range.va_space; + uvm_va_policy_t *policy = &managed_range->policy; uvm_va_block_context_t *va_block_context = uvm_va_space_block_context(va_space, mm); uvm_processor_mask_t *new_uvm_lite_gpus; @@ -1612,9 +1685,12 @@ NV_STATUS uvm_va_range_set_accessed_by(uvm_va_range_t *va_range, if (!new_uvm_lite_gpus) return NV_ERR_NO_MEMORY; - // If the range belongs to a non-migratable range group and that processor_id is a non-faultable GPU, - // check it can map the preferred location - if (!uvm_range_group_all_migratable(va_space, va_range->node.start, va_range->node.end) && + // If the range belongs to a non-migratable range group and that + // processor_id is a non-faultable GPU, check it can map the preferred + // location + if (!uvm_range_group_all_migratable(va_space, + managed_range->va_range.node.start, + managed_range->va_range.node.end) && UVM_ID_IS_GPU(processor_id) && !uvm_processor_mask_test(&va_space->faultable_processors, processor_id) && !uvm_processor_mask_test(&va_space->accessible_from[uvm_id_value(policy->preferred_location)], processor_id)) { @@ -1625,25 +1701,25 @@ NV_STATUS uvm_va_range_set_accessed_by(uvm_va_range_t *va_range, uvm_processor_mask_set(&policy->accessed_by, processor_id); // If a GPU is already a UVM-Lite GPU then there is nothing else to do. - if (uvm_processor_mask_test(&va_range->uvm_lite_gpus, processor_id)) + if (uvm_processor_mask_test(&managed_range->va_range.uvm_lite_gpus, processor_id)) goto out; - // Calculate the new UVM-Lite GPUs mask, but don't update it in the va range - // yet so that we can keep block_page_check_mappings() happy while updating - // the mappings. + // Calculate the new UVM-Lite GPUs mask, but don't update it in the managed + // range yet so that we can keep block_page_check_mappings() happy while + // updating the mappings. calc_uvm_lite_gpus_mask(va_space, policy->preferred_location, &policy->accessed_by, new_uvm_lite_gpus); if (uvm_processor_mask_test(new_uvm_lite_gpus, processor_id)) { // GPUs that become UVM-Lite GPUs need to unmap everything so that they // can map the preferred location. - status = range_unmap(va_range, processor_id, out_tracker); + status = range_unmap(managed_range, processor_id, out_tracker); if (status != NV_OK) goto out; } - uvm_processor_mask_copy(&va_range->uvm_lite_gpus, new_uvm_lite_gpus); + uvm_processor_mask_copy(&managed_range->va_range.uvm_lite_gpus, new_uvm_lite_gpus); - for_each_va_block_in_va_range(va_range, va_block) { + for_each_va_block_in_va_range(managed_range, va_block) { status = uvm_va_block_set_accessed_by(va_block, va_block_context, processor_id); if (status != NV_OK) goto out; @@ -1654,44 +1730,48 @@ NV_STATUS uvm_va_range_set_accessed_by(uvm_va_range_t *va_range, return status; } -void uvm_va_range_unset_accessed_by(uvm_va_range_t *va_range, +void uvm_va_range_unset_accessed_by(uvm_va_range_managed_t *managed_range, uvm_processor_id_t processor_id, uvm_tracker_t *out_tracker) { uvm_range_group_range_t *rgr = NULL; - // Mark all range group ranges within this VA range as migrated. We do this to force - // uvm_range_group_set_migration_policy to re-check the policy state since we're changing it here. - uvm_range_group_for_each_range_in(rgr, va_range->va_space, va_range->node.start, va_range->node.end) { + // Mark all range group ranges within this managed range as migrated. We do + // this to force uvm_range_group_set_migration_policy to re-check the policy + // state since we're changing it here. + uvm_range_group_for_each_range_in(rgr, + managed_range->va_range.va_space, + managed_range->va_range.node.start, + managed_range->va_range.node.end) { uvm_spin_lock(&rgr->range_group->migrated_ranges_lock); if (list_empty(&rgr->range_group_migrated_list_node)) list_move_tail(&rgr->range_group_migrated_list_node, &rgr->range_group->migrated_ranges); uvm_spin_unlock(&rgr->range_group->migrated_ranges_lock); } - uvm_processor_mask_clear(&uvm_va_range_get_policy(va_range)->accessed_by, processor_id); + uvm_processor_mask_clear(&managed_range->policy.accessed_by, processor_id); // If a UVM-Lite GPU is being removed from the accessed_by mask, it will // also stop being a UVM-Lite GPU unless it's also the preferred location. - if (uvm_processor_mask_test(&va_range->uvm_lite_gpus, processor_id) && - !uvm_va_policy_preferred_location_equal(uvm_va_range_get_policy(va_range), processor_id, NUMA_NO_NODE)) { - range_unmap(va_range, processor_id, out_tracker); + if (uvm_processor_mask_test(&managed_range->va_range.uvm_lite_gpus, processor_id) && + !uvm_va_policy_preferred_location_equal(&managed_range->policy, processor_id, NUMA_NO_NODE)) { + range_unmap(managed_range, processor_id, out_tracker); } - range_update_uvm_lite_gpus_mask(va_range); + range_update_uvm_lite_gpus_mask(managed_range); } -NV_STATUS uvm_va_range_set_read_duplication(uvm_va_range_t *va_range, struct mm_struct *mm) +NV_STATUS uvm_va_range_set_read_duplication(uvm_va_range_managed_t *managed_range, struct mm_struct *mm) { uvm_va_block_t *va_block; uvm_va_block_context_t *va_block_context; - if (uvm_va_range_get_policy(va_range)->read_duplication == UVM_READ_DUPLICATION_ENABLED) + if (managed_range->policy.read_duplication == UVM_READ_DUPLICATION_ENABLED) return NV_OK; - va_block_context = uvm_va_space_block_context(va_range->va_space, mm); + va_block_context = uvm_va_space_block_context(managed_range->va_range.va_space, mm); - for_each_va_block_in_va_range(va_range, va_block) { + for_each_va_block_in_va_range(managed_range, va_block) { NV_STATUS status = uvm_va_block_set_read_duplication(va_block, va_block_context); if (status != NV_OK) @@ -1701,18 +1781,18 @@ NV_STATUS uvm_va_range_set_read_duplication(uvm_va_range_t *va_range, struct mm_ return NV_OK; } -NV_STATUS uvm_va_range_unset_read_duplication(uvm_va_range_t *va_range, struct mm_struct *mm) +NV_STATUS uvm_va_range_unset_read_duplication(uvm_va_range_managed_t *managed_range, struct mm_struct *mm) { uvm_va_block_t *va_block; uvm_va_block_context_t *va_block_context; NV_STATUS status; - if (uvm_va_range_get_policy(va_range)->read_duplication == UVM_READ_DUPLICATION_DISABLED) + if (managed_range->policy.read_duplication == UVM_READ_DUPLICATION_DISABLED) return NV_OK; - va_block_context = uvm_va_space_block_context(va_range->va_space, mm); + va_block_context = uvm_va_space_block_context(managed_range->va_range.va_space, mm); - for_each_va_block_in_va_range(va_range, va_block) { + for_each_va_block_in_va_range(managed_range, va_block) { status = uvm_va_block_unset_read_duplication(va_block, va_block_context); if (status != NV_OK) @@ -1754,7 +1834,7 @@ static NvU64 sked_reflected_pte_maker(uvm_page_table_range_vec_t *range_vec, NvU static NV_STATUS uvm_map_sked_reflected_range(uvm_va_space_t *va_space, UVM_MAP_DYNAMIC_PARALLELISM_REGION_PARAMS *params) { NV_STATUS status; - uvm_va_range_t *va_range = NULL; + uvm_va_range_sked_reflected_t *sked_reflected_range = NULL; uvm_gpu_t *gpu; uvm_gpu_va_space_t *gpu_va_space; uvm_page_tree_t *page_tables; @@ -1790,33 +1870,33 @@ static NV_STATUS uvm_map_sked_reflected_range(uvm_va_space_t *va_space, UVM_MAP_ goto done; } - status = uvm_va_range_create_sked_reflected(va_space, mm, params->base, params->length, &va_range); + status = uvm_va_range_create_sked_reflected(va_space, mm, params->base, params->length, &sked_reflected_range); if (status != NV_OK) { UVM_DBG_PRINT_RL("Failed to create sked reflected VA range [0x%llx, 0x%llx)\n", params->base, params->base + params->length); goto done; } - va_range->sked_reflected.gpu_va_space = gpu_va_space; + sked_reflected_range->gpu_va_space = gpu_va_space; status = uvm_page_table_range_vec_init(page_tables, - va_range->node.start, - uvm_va_range_size(va_range), + sked_reflected_range->va_range.node.start, + uvm_va_range_size(&sked_reflected_range->va_range), params->length, UVM_PMM_ALLOC_FLAGS_EVICT, - &va_range->sked_reflected.pt_range_vec); + &sked_reflected_range->pt_range_vec); if (status != NV_OK) goto done; - status = uvm_page_table_range_vec_write_ptes(&va_range->sked_reflected.pt_range_vec, + status = uvm_page_table_range_vec_write_ptes(&sked_reflected_range->pt_range_vec, UVM_MEMBAR_NONE, sked_reflected_pte_maker, NULL); if (status != NV_OK) goto done; done: - if (status != NV_OK && va_range != NULL) - uvm_va_range_destroy(va_range, NULL); + if (status != NV_OK && sked_reflected_range != NULL) + uvm_va_range_destroy(&sked_reflected_range->va_range, NULL); uvm_va_space_up_write(va_space); uvm_va_space_mm_or_current_release_unlock(va_space, mm); @@ -1838,7 +1918,7 @@ NV_STATUS uvm_api_alloc_semaphore_pool(UVM_ALLOC_SEMAPHORE_POOL_PARAMS *params, { NV_STATUS status; uvm_va_space_t *va_space = uvm_va_space_get(filp); - uvm_va_range_t *va_range = NULL; + uvm_va_range_semaphore_pool_t *semaphore_pool_range = NULL; uvm_gpu_t *gpu; struct mm_struct *mm; @@ -1860,26 +1940,26 @@ NV_STATUS uvm_api_alloc_semaphore_pool(UVM_ALLOC_SEMAPHORE_POOL_PARAMS *params, params->length, params->perGpuAttributes, params->gpuAttributesCount, - &va_range); + &semaphore_pool_range); if (status != NV_OK) goto unlock; for_each_va_space_gpu(gpu, va_space) { - status = va_range_register_gpu_semaphore_pool(va_range, gpu); + status = va_range_register_gpu_semaphore_pool(semaphore_pool_range, gpu); if (status != NV_OK) goto done; if (!uvm_processor_mask_test(&va_space->registered_gpu_va_spaces, gpu->id)) continue; - status = va_range_add_gpu_va_space_semaphore_pool(va_range, gpu); + status = va_range_add_gpu_va_space_semaphore_pool(semaphore_pool_range, gpu); if (status != NV_OK) goto done; } done: if (status != NV_OK) - uvm_va_range_destroy(va_range, NULL); + uvm_va_range_destroy(&semaphore_pool_range->va_range, NULL); unlock: uvm_va_space_up_write(va_space); @@ -1889,6 +1969,7 @@ NV_STATUS uvm_api_alloc_semaphore_pool(UVM_ALLOC_SEMAPHORE_POOL_PARAMS *params, NV_STATUS uvm_test_va_range_info(UVM_TEST_VA_RANGE_INFO_PARAMS *params, struct file *filp) { + uvm_va_range_managed_t *managed_range; uvm_va_space_t *va_space; uvm_va_range_t *va_range; uvm_processor_id_t processor_id; @@ -1908,7 +1989,6 @@ NV_STATUS uvm_test_va_range_info(UVM_TEST_VA_RANGE_INFO_PARAMS *params, struct f goto out; } - policy = uvm_va_range_get_policy(va_range); params->va_range_start = va_range->node.start; params->va_range_end = va_range->node.end; @@ -1917,20 +1997,6 @@ NV_STATUS uvm_test_va_range_info(UVM_TEST_VA_RANGE_INFO_PARAMS *params, struct f BUILD_BUG_ON((int)UVM_READ_DUPLICATION_ENABLED != (int)UVM_TEST_READ_DUPLICATION_ENABLED); BUILD_BUG_ON((int)UVM_READ_DUPLICATION_DISABLED != (int)UVM_TEST_READ_DUPLICATION_DISABLED); BUILD_BUG_ON((int)UVM_READ_DUPLICATION_MAX != (int)UVM_TEST_READ_DUPLICATION_MAX); - params->read_duplication = policy->read_duplication; - - if (UVM_ID_IS_INVALID(policy->preferred_location)) { - memset(¶ms->preferred_location, 0, sizeof(params->preferred_location)); - params->preferred_cpu_nid = NUMA_NO_NODE; - } - else { - uvm_va_space_processor_uuid(va_space, ¶ms->preferred_location, policy->preferred_location); - params->preferred_cpu_nid = policy->preferred_nid; - } - - params->accessed_by_count = 0; - for_each_id_in_mask(processor_id, &policy->accessed_by) - uvm_va_space_processor_uuid(va_space, ¶ms->accessed_by[params->accessed_by_count++], processor_id); // -Wall implies -Wenum-compare, so cast through int to avoid warnings BUILD_BUG_ON((int)UVM_TEST_VA_RANGE_TYPE_INVALID != (int)UVM_VA_RANGE_TYPE_INVALID); @@ -1942,16 +2008,34 @@ NV_STATUS uvm_test_va_range_info(UVM_TEST_VA_RANGE_INFO_PARAMS *params, struct f BUILD_BUG_ON((int)UVM_TEST_VA_RANGE_TYPE_MAX != (int)UVM_VA_RANGE_TYPE_MAX); params->type = va_range->type; + params->read_duplication = 0; + memset(¶ms->preferred_location, 0, sizeof(params->preferred_location)); + params->preferred_cpu_nid = NUMA_NO_NODE; + params->accessed_by_count = 0; + switch (va_range->type) { case UVM_VA_RANGE_TYPE_MANAGED: + managed_range = uvm_va_range_to_managed(va_range); + + policy = &managed_range->policy; + params->read_duplication = policy->read_duplication; + + if (UVM_ID_IS_VALID(policy->preferred_location)) { + uvm_processor_get_uuid(policy->preferred_location, ¶ms->preferred_location); + params->preferred_cpu_nid = policy->preferred_nid; + } + + for_each_id_in_mask(processor_id, &policy->accessed_by) + uvm_processor_get_uuid(processor_id, ¶ms->accessed_by[params->accessed_by_count++]); + params->managed.subtype = UVM_TEST_RANGE_SUBTYPE_UVM; - if (!va_range->managed.vma_wrapper) { + if (!managed_range->vma_wrapper) { params->managed.is_zombie = NV_TRUE; goto out; } params->managed.is_zombie = NV_FALSE; - vma = uvm_va_range_vma_check(va_range, mm); + vma = uvm_va_range_vma_check(managed_range, mm); if (!vma) { // We aren't in the same mm as the one which owns the vma, and // we don't have that mm locked. @@ -1975,7 +2059,7 @@ NV_STATUS uvm_test_va_range_info(UVM_TEST_VA_RANGE_INFO_PARAMS *params, struct f NV_STATUS uvm_test_va_range_split(UVM_TEST_VA_RANGE_SPLIT_PARAMS *params, struct file *filp) { uvm_va_space_t *va_space = uvm_va_space_get(filp); - uvm_va_range_t *va_range; + uvm_va_range_managed_t *managed_range; NV_STATUS status = NV_OK; if (!PAGE_ALIGNED(params->split_address + 1)) @@ -1983,15 +2067,14 @@ NV_STATUS uvm_test_va_range_split(UVM_TEST_VA_RANGE_SPLIT_PARAMS *params, struct uvm_va_space_down_write(va_space); - va_range = uvm_va_range_find(va_space, params->split_address); - if (!va_range || - va_range->node.end == params->split_address || - va_range->type != UVM_VA_RANGE_TYPE_MANAGED) { + managed_range = uvm_va_range_managed_find(va_space, params->split_address); + if (!managed_range || + managed_range->va_range.node.end == params->split_address) { status = NV_ERR_INVALID_ADDRESS; goto out; } - status = uvm_va_range_split(va_range, params->split_address, NULL); + status = uvm_va_range_split(managed_range, params->split_address, NULL); out: uvm_va_space_up_write(va_space); @@ -2001,6 +2084,7 @@ NV_STATUS uvm_test_va_range_split(UVM_TEST_VA_RANGE_SPLIT_PARAMS *params, struct NV_STATUS uvm_test_va_range_inject_split_error(UVM_TEST_VA_RANGE_INJECT_SPLIT_ERROR_PARAMS *params, struct file *filp) { uvm_va_space_t *va_space = uvm_va_space_get(filp); + uvm_va_range_managed_t *managed_range; uvm_va_range_t *va_range; struct mm_struct *mm; NV_STATUS status = NV_OK; @@ -2009,13 +2093,14 @@ NV_STATUS uvm_test_va_range_inject_split_error(UVM_TEST_VA_RANGE_INJECT_SPLIT_ER uvm_va_space_down_write(va_space); va_range = uvm_va_range_find(va_space, params->lookup_address); + managed_range = uvm_va_range_to_managed_or_null(va_range); if (!va_range) { if (!mm) status = NV_ERR_INVALID_ADDRESS; else status = uvm_hmm_test_va_block_inject_split_error(va_space, params->lookup_address); } - else if (va_range->type != UVM_VA_RANGE_TYPE_MANAGED) { + else if (!managed_range) { status = NV_ERR_INVALID_ADDRESS; } else { @@ -2024,8 +2109,8 @@ NV_STATUS uvm_test_va_range_inject_split_error(UVM_TEST_VA_RANGE_INJECT_SPLIT_ER va_range->inject_split_error = true; - split_index = uvm_va_range_block_index(va_range, params->lookup_address); - va_block = uvm_va_range_block(va_range, split_index); + split_index = uvm_va_range_block_index(managed_range, params->lookup_address); + va_block = uvm_va_range_block(managed_range, split_index); if (va_block) { uvm_va_block_test_t *block_test = uvm_va_block_get_test(va_block); diff --git a/kernel-open/nvidia-uvm/uvm_va_range.h b/kernel-open/nvidia-uvm/uvm_va_range.h index 995300407b..8d1c2d30ad 100644 --- a/kernel-open/nvidia-uvm/uvm_va_range.h +++ b/kernel-open/nvidia-uvm/uvm_va_range.h @@ -60,11 +60,11 @@ // location preferences) must take the lock in write mode. // // VA ranges with type == UVM_VA_RANGE_TYPE_MANAGED: -// Each va_range is contained completely within a parent vma. There can be -// multiple va_ranges under the same vma, but not vice versa. All VAs within -// the va_range share the same policy state. +// Each managed range is contained completely within a parent vma. There can +// be multiple managed ranges under the same vma, but not vice versa. All +// VAs within the managed range share the same policy state. // -// Each va_range is a collection of VA blocks. The VA blocks each have +// Each managed range is a collection of VA blocks. The VA blocks each have // individual locks, and they hold the current mapping and location state // for their block across all processors (CPU and all GPUs). // @@ -110,6 +110,7 @@ typedef enum UVM_VA_RANGE_TYPE_CHANNEL, UVM_VA_RANGE_TYPE_SKED_REFLECTED, UVM_VA_RANGE_TYPE_SEMAPHORE_POOL, + UVM_VA_RANGE_TYPE_DEVICE_P2P, UVM_VA_RANGE_TYPE_MAX } uvm_va_range_type_t; @@ -123,30 +124,10 @@ typedef struct uvm_rw_semaphore_t lock; } uvm_vma_wrapper_t; -// TODO: Bug 1733295. VA range types should really be inverted. Instead of -// maintaining common node state with a union of structs, we should have -// separate C types for each VA range type. Each type would embed a common -// VA range node. +// TODO: Bug 1733295. // // There's a lot of state in the top-level uvm_va_range_t struct below // which really belongs in the per-type structs (for example, blocks). -// We're deferring that cleanup to the full refactor. - -// va_range state when va_range.type == UVM_VA_RANGE_TYPE_MANAGED -typedef struct -{ - // This is null in the case of a zombie allocation. Zombie allocations are - // created from unfreed allocations at termination of a process which used - // UVM_INIT_FLAGS_MULTI_PROCESS_SHARING_MODE, when at least one other - // process is sharing the UVM file descriptor. - uvm_vma_wrapper_t *vma_wrapper; - - // Managed allocations only use this policy and never use the policy - // stored in the va_block for HMM allocations. - uvm_va_policy_t policy; - - uvm_perf_module_data_desc_t perf_modules_data[UVM_PERF_MODULE_TYPE_COUNT]; -} uvm_va_range_managed_t; typedef struct { @@ -233,8 +214,83 @@ typedef struct uvm_range_tree_t tree; } uvm_ext_gpu_range_tree_t; -typedef struct +struct uvm_va_range_struct { + // Parent uvm_va_space. + uvm_va_space_t *va_space; + + // Storage in VA range tree. Also contains range start and end. + // start and end + 1 have to be PAGE_SIZED aligned. + uvm_range_tree_node_t node; + + // Force the next split on this range to fail. Set by error injection ioctl + // (testing purposes only). + bool inject_split_error; + + // Force the next register_gpu_va_space to fail while adding this va_range. + // Set by error injection ioctl (testing purposes only). + bool inject_add_gpu_va_space_error; + + // Mask of UVM-Lite GPUs for the VA range + // + // If the preferred location is set to a non-faultable GPU or the CPU, + // this mask contains all non-faultable GPUs that are in the accessed by + // mask and the preferred location itself if it's a GPU. Empty otherwise. + // + // All UVM-Lite GPUs have mappings only to the preferred location. The + // mappings are initially established only when the pages are resident on + // the preferred location, but persist after that until the preferred + // location is changed or a GPU stops being a UVM-Lite GPU. + uvm_processor_mask_t uvm_lite_gpus; + + // This is a uvm_va_block_t ** array of all VA block pointers under this + // range. The pointers can be accessed using the functions + // uvm_va_range_block() and uvm_va_range_block_create(). The latter + // allocates the block if it doesn't already exist. Once allocated, the + // blocks persist in the array until the parent VA range is destroyed. + // + // Concurrent on-demand allocation requires the use of either atomics or a + // spin lock. Given that we don't want to take a spin lock for every lookup, + // and that the blocks are persistent, atomics are preferred. + // + // The number of blocks is calculated from the range size using + // uvm_va_range_num_blocks(). + // + // TODO: Bug 1766585: Compare perf of up-front allocation and demand- + // allocation of blocks in the common case (lots of accessed blocks) + // and the sparse case. If the common case is hurt by demand- + // allocation, or if the sparse case isn't helped much, just allocate + // them all at range allocation. + atomic_long_t *blocks; + + uvm_va_range_type_t type; +}; + +// Subclass of va_range state for va_range.type == UVM_VA_RANGE_TYPE_MANAGED +struct uvm_va_range_managed_struct +{ + // Base class + uvm_va_range_t va_range; + + // This is null in the case of a zombie allocation. Zombie allocations are + // created from unfreed allocations at termination of a process which used + // UVM_INIT_FLAGS_MULTI_PROCESS_SHARING_MODE, when at least one other + // process is sharing the UVM file descriptor. + uvm_vma_wrapper_t *vma_wrapper; + + // Managed allocations only use this policy and never use the policy + // stored in the va_block for HMM allocations. + uvm_va_policy_t policy; + + uvm_perf_module_data_desc_t perf_modules_data[UVM_PERF_MODULE_TYPE_COUNT]; +}; + +// Subclass of va_range state for va_range.type == UVM_VA_RANGE_TYPE_EXTERNAL +struct uvm_va_range_external_struct +{ + // Base class + uvm_va_range_t va_range; + // Mask of GPUs which have mappings to this VA range. If a bit in this mask // is set, the corresponding pointer in gpu_ranges is valid. // The bitmap can be safely accessed by following the locking rules: @@ -256,12 +312,15 @@ typedef struct // Dynamically allocated page mask allocated in // uvm_va_range_create_external() and used and freed in uvm_free(). uvm_processor_mask_t *retained_mask; -} uvm_va_range_external_t; +}; -// va_range state when va_range.type == UVM_VA_RANGE_TYPE_CHANNEL. This -// represents a channel buffer resource and mapping. -typedef struct +// Subclass of va_range state for va_range.type == UVM_VA_RANGE_TYPE_CHANNEL. +// This represents a channel buffer resource and mapping. +struct uvm_va_range_channel_struct { + // Base class + uvm_va_range_t va_range; + // Only a single GPU can map a channel resource, so we only need one GPU // VA space parent. uvm_gpu_va_space_t *gpu_va_space; @@ -296,22 +355,29 @@ typedef struct // Storage in the corresponding uvm_gpu_va_space's channel_va_ranges list struct list_head list_node; -} uvm_va_range_channel_t; +}; -// va_range state when va_range.type == UVM_VA_RANGE_TYPE_SKED_REFLECTED. This -// represents a sked reflected mapping. -typedef struct +// Subclass of va_range for va_range.type == UVM_VA_RANGE_TYPE_SKED_REFLECTED. +// This represents a sked reflected mapping. +struct uvm_va_range_sked_reflected_struct { + // Base class + uvm_va_range_t va_range; + // Each SKED reflected range is unique to a single GPU so only a single GPU // VA space needs to be tracked. uvm_gpu_va_space_t *gpu_va_space; // Page tables mapped by this range uvm_page_table_range_vec_t pt_range_vec; -} uvm_va_range_sked_reflected_t; +}; -typedef struct +// Subclass of va_range for va_range.type == UVM_VA_RANGE_TYPE_SEMAPHORE_POOL. +struct uvm_va_range_semaphore_pool_struct { + // Base class + uvm_va_range_t va_range; + uvm_mem_t *mem; // The optional owner is a GPU (at most one) that has the allocation cached - @@ -328,72 +394,120 @@ typedef struct // Tracks all outstanding GPU work using this allocation. uvm_tracker_t tracker; uvm_mutex_t tracker_lock; -} uvm_va_range_semaphore_pool_t; +}; -struct uvm_va_range_struct +// This represents a physical RM allocation used for device peer-to-peer access. +// This is distinct from the va_range type because the physical allocations can be +// shared by multiple va_ranges. +typedef struct { - // Parent uvm_va_space. - uvm_va_space_t *va_space; + // The physical GPU memory backing device P2P ranges can be referenced by + // two entities - kernel device drivers and the va_range(s) that UVM uses + // to create CPU mappings. The physical memory can not be freed until after + // both entities have finished accessing it. This refcount tracks total + // kernel users of the memory. + nv_kref_t refcount; - // Storage in VA range tree. Also contains range start and end. - // start and end + 1 have to be PAGE_SIZED aligned. - uvm_range_tree_node_t node; + // The number of va ranges referencing this physical range. + nv_kref_t va_range_count; - // Force the next split on this range to fail. Set by error injection ioctl - // (testing purposes only). - bool inject_split_error; + uvm_gpu_t *gpu; + NvHandle rm_memory_handle; + NvU64 *pfns; + NvU64 pfn_count; + NvLength page_size; + uvm_deferred_free_object_t deferred_free; + struct list_head *deferred_free_list; + wait_queue_head_t waitq; +} uvm_device_p2p_mem_t; - // Force the next register_gpu_va_space to fail while adding this va_range. - // Set by error injection ioctl (testing purposes only). - bool inject_add_gpu_va_space_error; +struct uvm_va_range_device_p2p_struct +{ + uvm_va_range_t va_range; + uvm_gpu_t *gpu; + NvU64 offset; + uvm_device_p2p_mem_t *p2p_mem; +}; - // Mask of UVM-Lite GPUs for the VA range - // - // If the preferred location is set to a non-faultable GPU or the CPU, - // this mask contains all non-faultable GPUs that are in the accessed by - // mask and the preferred location itself if it's a GPU. Empty otherwise. - // - // All UVM-Lite GPUs have mappings only to the preferred location. The - // mappings are initially established only when the pages are resident on - // the preferred location, but persist after that until the preferred - // location is changed or a GPU stops being a UVM-Lite GPU. - uvm_processor_mask_t uvm_lite_gpus; +// Managed Range dynamic cast +static inline uvm_va_range_managed_t *uvm_va_range_to_managed(uvm_va_range_t *va_range) +{ + UVM_ASSERT(va_range); + UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_MANAGED); + return container_of(va_range, uvm_va_range_managed_t, va_range); +} - // This is a uvm_va_block_t ** array of all VA block pointers under this - // range. The pointers can be accessed using the functions - // uvm_va_range_block() and uvm_va_range_block_create(). The latter - // allocates the block if it doesn't already exist. Once allocated, the - // blocks persist in the array until the parent VA range is destroyed. - // - // Concurrent on-demand allocation requires the use of either atomics or a - // spin lock. Given that we don't want to take a spin lock for every lookup, - // and that the blocks are persistent, atomics are preferred. - // - // The number of blocks is calculated from the range size using - // uvm_va_range_num_blocks(). - // - // TODO: Bug 1766585: Compare perf of up-front allocation and demand- - // allocation of blocks in the common case (lots of accessed blocks) - // and the sparse case. If the common case is hurt by demand- - // allocation, or if the sparse case isn't helped much, just allocate - // them all at range allocation. - atomic_long_t *blocks; +static inline uvm_va_range_managed_t *uvm_va_range_to_managed_or_null(uvm_va_range_t *va_range) +{ + if (!va_range) + return NULL; + if (va_range->type != UVM_VA_RANGE_TYPE_MANAGED) + return NULL; + return container_of(va_range, uvm_va_range_managed_t, va_range); +} - uvm_va_range_type_t type; - union - { - uvm_va_range_managed_t managed; - uvm_va_range_external_t external; - uvm_va_range_channel_t channel; - uvm_va_range_sked_reflected_t sked_reflected; - uvm_va_range_semaphore_pool_t semaphore_pool; - }; -}; + +// External Range dynamic cast +static inline uvm_va_range_external_t *uvm_va_range_to_external(uvm_va_range_t *va_range) +{ + UVM_ASSERT(va_range); + UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_EXTERNAL); + return container_of(va_range, uvm_va_range_external_t, va_range); +} + +// Channel Range dynamic cast +static inline uvm_va_range_channel_t *uvm_va_range_to_channel(uvm_va_range_t *va_range) +{ + UVM_ASSERT(va_range); + UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_CHANNEL); + return container_of(va_range, uvm_va_range_channel_t, va_range); +} + +// SKED Reflected Range dynamic cast +static inline uvm_va_range_sked_reflected_t *uvm_va_range_to_sked_reflected(uvm_va_range_t *va_range) +{ + UVM_ASSERT(va_range); + UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_SKED_REFLECTED); + return container_of(va_range, uvm_va_range_sked_reflected_t, va_range); +} + +// Semaphore Pool Range dynamic cast +static inline uvm_va_range_semaphore_pool_t *uvm_va_range_to_semaphore_pool(uvm_va_range_t *va_range) +{ + UVM_ASSERT(va_range); + UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_SEMAPHORE_POOL); + return container_of(va_range, uvm_va_range_semaphore_pool_t, va_range); +} + +// Device P2P Range dynamic cast +static inline uvm_va_range_device_p2p_t *uvm_va_range_to_device_p2p(uvm_va_range_t *va_range) +{ + UVM_ASSERT(va_range); + UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_DEVICE_P2P); + return container_of(va_range, uvm_va_range_device_p2p_t, va_range); +} // Module load/exit NV_STATUS uvm_va_range_init(void); void uvm_va_range_exit(void); +NV_STATUS uvm_va_range_initialize_reclaim(uvm_va_range_t *va_range, + struct mm_struct *mm, + uvm_va_range_type_t type, + uvm_va_space_t *va_space, + NvU64 start, + NvU64 end); + +NV_STATUS uvm_va_range_device_p2p_init(void); +void uvm_va_range_device_p2p_exit(void); + +NV_STATUS uvm_va_range_alloc_reclaim(uvm_va_space_t *va_space, + struct mm_struct *mm, + uvm_va_range_type_t type, + NvU64 start, + NvU64 end, + uvm_va_range_t **out_va_range); + static NvU64 uvm_va_range_size(uvm_va_range_t *va_range) { return uvm_range_tree_node_size(&va_range->node); @@ -406,21 +520,20 @@ static bool uvm_va_range_is_aligned(uvm_va_range_t *va_range, NvU64 alignment) static bool uvm_va_range_is_managed_zombie(uvm_va_range_t *va_range) { - return va_range->type == UVM_VA_RANGE_TYPE_MANAGED && va_range->managed.vma_wrapper == NULL; + return va_range->type == UVM_VA_RANGE_TYPE_MANAGED && + uvm_va_range_to_managed(va_range)->vma_wrapper == NULL; } -// Create a va_range with type UVM_VA_RANGE_TYPE_MANAGED. The out va_range pointer -// is optional. +// Create a managed range. out_managed_range is optional. // // Returns NV_ERR_UVM_ADDRESS_IN_USE if the vma overlaps with an existing range // in the va_space tree. NV_STATUS uvm_va_range_create_mmap(uvm_va_space_t *va_space, struct mm_struct *mm, uvm_vma_wrapper_t *vma_wrapper, - uvm_va_range_t **out_va_range); + uvm_va_range_managed_t **out_managed_range); -// Create a va_range with type UVM_VA_RANGE_TYPE_EXTERNAL. The out va_range -// pointer is optional. +// Create an external range. out_external_range is optional. // // Returns NV_ERR_UVM_ADDRESS_IN_USE if the range overlaps with an existing // range in the va_space tree. @@ -428,10 +541,9 @@ NV_STATUS uvm_va_range_create_external(uvm_va_space_t *va_space, struct mm_struct *mm, NvU64 start, NvU64 length, - uvm_va_range_t **out_va_range); + uvm_va_range_external_t **out_external_range); -// Create a va_range with type UVM_VA_RANGE_TYPE_CHANNEL. The out va_range -// pointer is optional. +// Create a channel range. out_channel_range is optional. // // Returns NV_ERR_UVM_ADDRESS_IN_USE if the range overlaps with an existing // range in the va_space tree. @@ -439,13 +551,13 @@ NV_STATUS uvm_va_range_create_channel(uvm_va_space_t *va_space, struct mm_struct *mm, NvU64 start, NvU64 end, - uvm_va_range_t **out_va_range); + uvm_va_range_channel_t **out_channel_range); NV_STATUS uvm_va_range_create_sked_reflected(uvm_va_space_t *va_space, struct mm_struct *mm, NvU64 start, NvU64 length, - uvm_va_range_t **out_va_range); + uvm_va_range_sked_reflected_t **out_sked_reflected_range); NV_STATUS uvm_va_range_create_semaphore_pool(uvm_va_space_t *va_space, struct mm_struct *mm, @@ -453,7 +565,7 @@ NV_STATUS uvm_va_range_create_semaphore_pool(uvm_va_space_t *va_space, NvU64 length, const UvmGpuMappingAttributes *per_gpu_attrs, NvU32 per_gpu_attrs_count, - uvm_va_range_t **out_va_range); + uvm_va_range_semaphore_pool_t **out_semaphore_pool_range); // Destroys any state associated with this VA range, removes the VA range from // the VA space, and frees the VA range. @@ -463,7 +575,7 @@ NV_STATUS uvm_va_range_create_semaphore_pool(uvm_va_space_t *va_space, // processing by uvm_deferred_free_object_list. void uvm_va_range_destroy(uvm_va_range_t *va_range, struct list_head *deferred_free_list); -void uvm_va_range_zombify(uvm_va_range_t *va_range); +void uvm_va_range_zombify(uvm_va_range_managed_t *managed_range); NV_STATUS uvm_api_clean_up_zombie_resources(UVM_CLEAN_UP_ZOMBIE_RESOURCES_PARAMS *params, struct file *filp); NV_STATUS uvm_api_validate_va_range(UVM_VALIDATE_VA_RANGE_PARAMS *params, struct file *filp); @@ -527,21 +639,19 @@ void uvm_va_range_unregister_gpu(uvm_va_range_t *va_range, struct mm_struct *mm, struct list_head *deferred_free_list); -// Splits existing_va_range into two pieces, with new_va_range always after -// existing. existing is updated to have new_end. new_end+1 must be page- +// Splits existing_managed_range into two pieces, with new_managed_range always +// after existing. existing is updated to have new_end. new_end+1 must be page- // aligned. // // Before: [----------- existing ------------] // After: [---- existing ----][---- new ----] // ^new_end // -// On error, existing_va_range is still accessible and is left in its original -// functional state. -// -// The va_range must have type UVM_VA_RANGE_TYPE_MANAGED. -NV_STATUS uvm_va_range_split(uvm_va_range_t *existing_va_range, +// On error, existing_managed_range is still accessible and is left in its +// original functional state. +NV_STATUS uvm_va_range_split(uvm_va_range_managed_t *existing_managed_range, NvU64 new_end, - uvm_va_range_t **new_va_range); + uvm_va_range_managed_t **new_managed_range); // TODO: Bug 1707562: Merge va ranges @@ -555,6 +665,49 @@ static uvm_va_range_t *uvm_va_range_container(uvm_range_tree_node_t *node) // Returns the va_range containing addr, if any uvm_va_range_t *uvm_va_range_find(uvm_va_space_t *va_space, NvU64 addr); +static uvm_va_range_managed_t *uvm_va_range_managed_find(uvm_va_space_t *va_space, NvU64 addr) +{ + return uvm_va_range_to_managed_or_null(uvm_va_range_find(va_space, addr)); +} + +static uvm_va_range_external_t *uvm_va_range_external_find(uvm_va_space_t *va_space, NvU64 addr) +{ + uvm_va_range_t *va_range; + + va_range = uvm_va_range_find(va_space, addr); + if (!va_range) + return NULL; + if (va_range->type != UVM_VA_RANGE_TYPE_EXTERNAL) + return NULL; + return uvm_va_range_to_external(va_range); +} + +static uvm_va_range_semaphore_pool_t *uvm_va_range_semaphore_pool_find(uvm_va_space_t *va_space, + NvU64 addr) +{ + uvm_va_range_t *va_range; + + va_range = uvm_va_range_find(va_space, addr); + if (!va_range) + return NULL; + if (va_range->type != UVM_VA_RANGE_TYPE_SEMAPHORE_POOL) + return NULL; + return uvm_va_range_to_semaphore_pool(va_range); +} + +static uvm_va_range_device_p2p_t *uvm_va_range_device_p2p_find(uvm_va_space_t *va_space, + NvU64 addr) +{ + uvm_va_range_t *va_range; + + va_range = uvm_va_range_find(va_space, addr); + if (!va_range) + return NULL; + if (va_range->type != UVM_VA_RANGE_TYPE_DEVICE_P2P) + return NULL; + return uvm_va_range_to_device_p2p(va_range); +} + static uvm_ext_gpu_map_t *uvm_ext_gpu_map_container(uvm_range_tree_node_t *node) { if (!node) @@ -596,48 +749,86 @@ static bool uvm_va_space_range_empty(uvm_va_space_t *va_space, NvU64 start, NvU6 return uvm_va_space_iter_first(va_space, start, end) == NULL; } -#define uvm_for_each_va_range_in(va_range, va_space, start, end) \ - for ((va_range) = uvm_va_space_iter_first((va_space), (start), (end)); \ - (va_range); \ - (va_range) = uvm_va_space_iter_next((va_range), (end))) - -#define uvm_for_each_va_range_in_safe(va_range, va_range_next, va_space, start, end) \ - for ((va_range) = uvm_va_space_iter_first((va_space), (start), (end)), \ - (va_range_next) = uvm_va_space_iter_next((va_range), (end)); \ - (va_range); \ - (va_range) = (va_range_next), (va_range_next) = uvm_va_space_iter_next((va_range), (end))) - -// Iterator for all contiguous VA ranges between [start, end]. If any part of -// [start, end] is not covered by a VA range, iteration stops. -#define uvm_for_each_va_range_in_contig(va_range, va_space, start, end) \ - for ((va_range) = uvm_va_space_iter_first((va_space), (start), (start)); \ - (va_range); \ - (va_range) = uvm_va_space_iter_next_contig((va_range), (end))) - -#define uvm_for_each_va_range_in_contig_from(va_range, va_space, first_va_range, end) \ - for ((va_range) = (first_va_range); \ - (va_range); \ - (va_range) = uvm_va_space_iter_next_contig((va_range), (end))) - -// Like uvm_for_each_va_range_in_contig but also stops iteration if any VA range -// has a type other than UVM_VA_RANGE_TYPE_MANAGED. -#define uvm_for_each_managed_va_range_in_contig(va_range, va_space, start, end) \ - for ((va_range) = uvm_va_space_iter_first((va_space), (start), (start)); \ - (va_range) && (va_range)->type == UVM_VA_RANGE_TYPE_MANAGED; \ - (va_range) = uvm_va_space_iter_next_contig((va_range), (end))) - -#define uvm_for_each_va_range_in_vma(va_range, vma) \ - uvm_for_each_va_range_in(va_range, \ - uvm_va_space_get(vma->vm_file), \ - vma->vm_start, \ - vma->vm_end - 1) - -#define uvm_for_each_va_range_in_vma_safe(va_range, va_range_next, vma) \ - uvm_for_each_va_range_in_safe(va_range, \ - va_range_next, \ - uvm_va_space_get(vma->vm_file), \ - vma->vm_start, \ - vma->vm_end - 1) +// Iterators for managed ranges + +static uvm_va_range_managed_t *uvm_va_space_iter_managed_first(uvm_va_space_t *va_space, + NvU64 start, + NvU64 end) +{ + return uvm_va_range_to_managed_or_null(uvm_va_space_iter_first(va_space, start, end)); +} + +static uvm_va_range_managed_t *uvm_va_space_iter_managed_next(uvm_va_range_managed_t *managed, + NvU64 end) +{ + uvm_va_range_managed_t *next_managed_range; + uvm_va_range_t *va_range; + + if (!managed) + return NULL; + + next_managed_range = NULL; + for (va_range = uvm_va_space_iter_next(&managed->va_range, end); + va_range; + va_range = uvm_va_space_iter_next(va_range, end)) { + next_managed_range = uvm_va_range_to_managed_or_null(va_range); + if (next_managed_range) + break; + } + + return next_managed_range; +} + +static uvm_va_range_managed_t *uvm_va_space_iter_managed_next_contig(uvm_va_range_managed_t *managed_range, + NvU64 end) +{ + uvm_va_range_managed_t *next = uvm_va_space_iter_managed_next(managed_range, end); + if (next && next->va_range.node.start != managed_range->va_range.node.end + 1) + return NULL; + return next; +} + +#define uvm_for_each_va_range_managed(managed_range, va_space) \ + for ((managed_range) = uvm_va_space_iter_managed_first((va_space), 0, ~0ULL); \ + (managed_range); \ + (managed_range) = uvm_va_space_iter_managed_next((managed_range), ~0ULL)) + +#define uvm_for_each_va_range_managed_in(managed_range, va_space, start, end) \ + for ((managed_range) = uvm_va_space_iter_managed_first((va_space), (start), (end)); \ + (managed_range); \ + (managed_range) = uvm_va_space_iter_managed_next((managed_range), (end))) + +// Iterator for all contiguous managed ranges between [start, end]. If any part +// of [start, end] is not covered by a managed range, iteration stops. +#define uvm_for_each_va_range_managed_in_contig(managed_range, va_space, start, end) \ + for ((managed_range) = uvm_va_space_iter_managed_first((va_space), (start), (start)); \ + (managed_range); \ + (managed_range) = uvm_va_space_iter_managed_next_contig((managed_range), (end))) + +#define uvm_for_each_va_range_managed_in_contig_from(managed_range, va_space, first_managed_range, end) \ + for ((managed_range) = (first_managed_range); \ + (managed_range); \ + (managed_range) = uvm_va_space_iter_managed_next_contig((managed_range), (end))) + +#define uvm_for_each_va_range_managed_in_vma(managed_range, vma) \ + uvm_for_each_va_range_managed_in(managed_range, \ + uvm_va_space_get(vma->vm_file), \ + vma->vm_start, \ + vma->vm_end - 1) + +#define uvm_for_each_va_range_managed_in_safe(managed_range, managed_range_next, va_space, start, end) \ + for ((managed_range) = uvm_va_space_iter_managed_first((va_space), (start), (end)), \ + (managed_range_next) = uvm_va_space_iter_managed_next((managed_range), (end)); \ + (managed_range); \ + (managed_range) = (managed_range_next), \ + (managed_range_next) = uvm_va_space_iter_managed_next((managed_range), (end))) + +#define uvm_for_each_va_range_managed_in_vma_safe(managed_range, managed_range_next, vma) \ + uvm_for_each_va_range_managed_in_safe(managed_range, \ + managed_range_next, \ + uvm_va_space_get(vma->vm_file), \ + vma->vm_start, \ + vma->vm_end - 1) // Only call this if you're sure that either: // 1) You have a reference on the vma's vm_mm and that vma->vm_mm's mmap_lock is @@ -648,60 +839,57 @@ static bool uvm_va_space_range_empty(uvm_va_space_t *va_space, NvU64 start, NvU6 // // Otherwise, use uvm_va_range_vma_current or uvm_va_range_vma_check and be // prepared to handle a NULL return value. -static struct vm_area_struct *uvm_va_range_vma(uvm_va_range_t *va_range) +static struct vm_area_struct *uvm_va_range_vma(uvm_va_range_managed_t *managed_range) { struct vm_area_struct *vma; - UVM_ASSERT_MSG(va_range->type == UVM_VA_RANGE_TYPE_MANAGED, "type: %d", va_range->type); - UVM_ASSERT(va_range->managed.vma_wrapper); + UVM_ASSERT(managed_range->vma_wrapper); - uvm_assert_rwsem_locked(&va_range->va_space->lock); + uvm_assert_rwsem_locked(&managed_range->va_range.va_space->lock); // vm_file, vm_private_data, vm_start, and vm_end are all safe to access // here because they can't change without the kernel calling vm_ops->open // or vm_ops->close, which both take va_space->lock. - vma = va_range->managed.vma_wrapper->vma; + vma = managed_range->vma_wrapper->vma; UVM_ASSERT(vma); - UVM_ASSERT_MSG(vma->vm_private_data == va_range->managed.vma_wrapper, + UVM_ASSERT_MSG(vma->vm_private_data == managed_range->vma_wrapper, "vma: 0x%llx [0x%lx, 0x%lx] has vm_private_data 0x%llx\n", (NvU64)vma, vma->vm_start, vma->vm_end - 1, (NvU64)vma->vm_private_data); - UVM_ASSERT_MSG(va_range->va_space == uvm_va_space_get(vma->vm_file), - "va_range va_space: 0x%llx vm_file: 0x%llx vm_file va_space: 0x%llx", - (NvU64)va_range->va_space, + UVM_ASSERT_MSG(managed_range->va_range.va_space == uvm_va_space_get(vma->vm_file), + "managed_range va_space: 0x%llx vm_file: 0x%llx vm_file va_space: 0x%llx", + (NvU64)managed_range->va_range.va_space, (NvU64)vma->vm_file, (NvU64)uvm_va_space_get(vma->vm_file)); - UVM_ASSERT_MSG(va_range->node.start >= vma->vm_start, - "Range mismatch: va_range: [0x%llx, 0x%llx] vma: [0x%lx, 0x%lx]\n", - va_range->node.start, - va_range->node.end, + UVM_ASSERT_MSG(managed_range->va_range.node.start >= vma->vm_start, + "Range mismatch: managed_range: [0x%llx, 0x%llx] vma: [0x%lx, 0x%lx]\n", + managed_range->va_range.node.start, + managed_range->va_range.node.end, vma->vm_start, vma->vm_end - 1); - UVM_ASSERT_MSG(va_range->node.end <= vma->vm_end - 1, - "Range mismatch: va_range: [0x%llx, 0x%llx] vma: [0x%lx, 0x%lx]\n", - va_range->node.start, - va_range->node.end, + UVM_ASSERT_MSG(managed_range->va_range.node.end <= vma->vm_end - 1, + "Range mismatch: managed_range: [0x%llx, 0x%llx] vma: [0x%lx, 0x%lx]\n", + managed_range->va_range.node.start, + managed_range->va_range.node.end, vma->vm_start, vma->vm_end - 1); return vma; } -// Check that the VA range's vma is safe to use under mm. If not, NULL is +// Check that the managed range's vma is safe to use under mm. If not, NULL is // returned. If the vma is returned, there must be a reference on mm and // mm->mmap_lock must be held. -static struct vm_area_struct *uvm_va_range_vma_check(uvm_va_range_t *va_range, struct mm_struct *mm) +static struct vm_area_struct *uvm_va_range_vma_check(uvm_va_range_managed_t *managed_range, struct mm_struct *mm) { struct vm_area_struct *vma; - UVM_ASSERT_MSG(va_range->type == UVM_VA_RANGE_TYPE_MANAGED, "type: %d\n", va_range->type); - // Zombies don't have a vma_wrapper. - if (!va_range->managed.vma_wrapper) + if (!managed_range->vma_wrapper) return NULL; - vma = uvm_va_range_vma(va_range); + vma = uvm_va_range_vma(managed_range); // Examples of mm on various paths: // - CPU fault vma->vm_mm @@ -713,7 +901,7 @@ static struct vm_area_struct *uvm_va_range_vma_check(uvm_va_range_t *va_range, s // on the vma's owning mm_struct. We won't know that until we look at the // vma. By then it's too late to take mmap_lock since mmap_lock is above the // va_space lock in our lock ordering, and we must be holding the va_space - // lock to query the va_range. Hence the need to detect the cases in which + // lock to query the managed_range. Hence the need to detect the cases in which // it's safe to operate on the vma. // // When we can't detect for certain that mm is safe to use, we shouldn't @@ -736,49 +924,40 @@ static struct vm_area_struct *uvm_va_range_vma_check(uvm_va_range_t *va_range, s } // Helper for use when the only mm which is known is current->mm -static struct vm_area_struct *uvm_va_range_vma_current(uvm_va_range_t *va_range) +static struct vm_area_struct *uvm_va_range_vma_current(uvm_va_range_managed_t *managed_range) { - return uvm_va_range_vma_check(va_range, current->mm); + return uvm_va_range_vma_check(managed_range, current->mm); } // Returns the maximum number of VA blocks which could be contained with the -// given va_range (number of elements in the va_range->blocks array). -// va_range->node.start and .end must be set. -// -// The va_range must have type UVM_VA_RANGE_TYPE_MANAGED. -size_t uvm_va_range_num_blocks(uvm_va_range_t *va_range); +// given managed_range (number of elements in the managed_range->va_range.blocks +// array). managed_range->va_range.node.start and .end must be set. +size_t uvm_va_range_num_blocks(uvm_va_range_managed_t *managed_range); -// Get the index within the va_range->blocks array of the VA block +// Get the index within the managed_range->va_range.blocks array of the VA block // corresponding to addr. The block pointer is not guaranteed to be valid. Use // either uvm_va_range_block or uvm_va_range_block_create to look up the block. -// -// The va_range must have type UVM_VA_RANGE_TYPE_MANAGED. -size_t uvm_va_range_block_index(uvm_va_range_t *va_range, NvU64 addr); +size_t uvm_va_range_block_index(uvm_va_range_managed_t *managed_range, NvU64 addr); -// Looks up the VA block at va_range->blocks[index]. If no block is present at -// that index, NULL is returned. -// -// The va_range must have type UVM_VA_RANGE_TYPE_MANAGED. -static uvm_va_block_t *uvm_va_range_block(uvm_va_range_t *va_range, size_t index) +// Looks up the VA block at managed_range->va_range.blocks[index]. If no block +// is present at that index, NULL is returned. +static uvm_va_block_t *uvm_va_range_block(uvm_va_range_managed_t *managed_range, size_t index) { - UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_MANAGED); - UVM_ASSERT(index < uvm_va_range_num_blocks(va_range)); - uvm_assert_rwsem_locked(&va_range->va_space->lock); + UVM_ASSERT(index < uvm_va_range_num_blocks(managed_range)); + uvm_assert_rwsem_locked(&managed_range->va_range.va_space->lock); - return (uvm_va_block_t *)atomic_long_read(&va_range->blocks[index]); + return (uvm_va_block_t *)atomic_long_read(&managed_range->va_range.blocks[index]); } // Same as uvm_va_range_block except that the block is created if not already // present in the array. If NV_OK is returned, the block has been allocated // successfully. -// -// The va_range must have type UVM_VA_RANGE_TYPE_MANAGED. -NV_STATUS uvm_va_range_block_create(uvm_va_range_t *va_range, size_t index, uvm_va_block_t **out_block); +NV_STATUS uvm_va_range_block_create(uvm_va_range_managed_t *managed_range, size_t index, uvm_va_block_t **out_block); -// Returns the first populated VA block in the VA range after the input +// Returns the first populated VA block in the managed range after the input // va_block, or NULL if none. If the input va_block is NULL, this returns the -// first VA block in the VA range, if any exists. -uvm_va_block_t *uvm_va_range_block_next(uvm_va_range_t *va_range, uvm_va_block_t *va_block); +// first VA block in the managed range, if any exists. +uvm_va_block_t *uvm_va_range_block_next(uvm_va_range_managed_t *managed_range, uvm_va_block_t *va_block); // Iterate over populated VA blocks in the range. Does not create new VA blocks. #define for_each_va_block_in_va_range(__va_range, __va_block) \ @@ -794,18 +973,16 @@ uvm_va_block_t *uvm_va_range_block_next(uvm_va_range_t *va_range, uvm_va_block_t __va_block = __va_block_next, \ __va_block_next = __va_block? uvm_va_range_block_next(__va_range, __va_block) : NULL) -// Set the VA range preferred location (or unset it if preferred location is -// UVM_ID_INVALID). +// Set the managed range preferred location (or unset it if preferred location +// is UVM_ID_INVALID). // // Unsetting the preferred location potentially changes the range group -// association to UVM_RANGE_GROUP_ID_NONE if the VA range was previously +// association to UVM_RANGE_GROUP_ID_NONE if the managed range was previously // associated with a non-migratable range group. // // Changing the preferred location also updates the mask and mappings of GPUs // in UVM-Lite mode. // -// The va_range must have type UVM_VA_RANGE_TYPE_MANAGED. -// // If mm != NULL, that mm is used for any CPU mappings which may be created as // a result of this call. See uvm_va_block_context_t::mm for details. // @@ -813,7 +990,7 @@ uvm_va_block_t *uvm_va_range_block_next(uvm_va_range_t *va_range, uvm_va_block_t // // LOCKING: If mm != NULL, the caller must hold mm->mmap_lock in at least read // mode. -NV_STATUS uvm_va_range_set_preferred_location(uvm_va_range_t *va_range, +NV_STATUS uvm_va_range_set_preferred_location(uvm_va_range_managed_t *managed_range, uvm_processor_id_t preferred_location, int preferred_cpu_nid, struct mm_struct *mm, @@ -831,7 +1008,7 @@ NV_STATUS uvm_va_range_set_preferred_location(uvm_va_range_t *va_range, // // LOCKING: If mm != NULL, the caller must hold mm->mmap_lock in at least read // mode. -NV_STATUS uvm_va_range_set_accessed_by(uvm_va_range_t *va_range, +NV_STATUS uvm_va_range_set_accessed_by(uvm_va_range_managed_t *managed_range, uvm_processor_id_t processor_id, struct mm_struct *mm, uvm_tracker_t *out_tracker); @@ -841,7 +1018,7 @@ NV_STATUS uvm_va_range_set_accessed_by(uvm_va_range_t *va_range, // If out_tracker != NULL any block work will be added to that tracker. // // This also updates the mask and mappings of the UVM-Lite GPUs if required. -void uvm_va_range_unset_accessed_by(uvm_va_range_t *va_range, +void uvm_va_range_unset_accessed_by(uvm_va_range_managed_t *managed_range, uvm_processor_id_t processor_id, uvm_tracker_t *out_tracker); @@ -852,7 +1029,7 @@ void uvm_va_range_unset_accessed_by(uvm_va_range_t *va_range, // // LOCKING: If mm != NULL, the caller must hold mm->mmap_lock in at least read // mode. -NV_STATUS uvm_va_range_set_read_duplication(uvm_va_range_t *va_range, struct mm_struct *mm); +NV_STATUS uvm_va_range_set_read_duplication(uvm_va_range_managed_t *managed_range, struct mm_struct *mm); // Unset read-duplication and establish accessed_by mappings // @@ -861,17 +1038,18 @@ NV_STATUS uvm_va_range_set_read_duplication(uvm_va_range_t *va_range, struct mm_ // // LOCKING: If mm != NULL, the caller must hold mm->mmap_lock in at least read // mode. -NV_STATUS uvm_va_range_unset_read_duplication(uvm_va_range_t *va_range, struct mm_struct *mm); +NV_STATUS uvm_va_range_unset_read_duplication(uvm_va_range_managed_t *managed_range, struct mm_struct *mm); // Create and destroy vma wrappers uvm_vma_wrapper_t *uvm_vma_wrapper_alloc(struct vm_area_struct *vma); void uvm_vma_wrapper_destroy(uvm_vma_wrapper_t *vma_wrapper); -static uvm_va_policy_t *uvm_va_range_get_policy(uvm_va_range_t *va_range) -{ - UVM_ASSERT(va_range->type == UVM_VA_RANGE_TYPE_MANAGED); - return &va_range->managed.policy; -} +NV_STATUS uvm_va_range_device_p2p_map_cpu(uvm_va_space_t *va_space, + struct vm_area_struct *vma, + uvm_va_range_device_p2p_t *device_p2p_range); +void uvm_va_range_deinit_device_p2p(uvm_va_range_device_p2p_t *device_p2p_range, struct list_head *deferred_free_list); +void uvm_va_range_destroy_device_p2p(uvm_va_range_device_p2p_t *device_p2p_range, struct list_head *deferred_free_list); +void uvm_va_range_free_device_p2p_mem(uvm_device_p2p_mem_t *p2p_mem); NV_STATUS uvm_test_va_range_info(UVM_TEST_VA_RANGE_INFO_PARAMS *params, struct file *filp); NV_STATUS uvm_test_va_range_split(UVM_TEST_VA_RANGE_SPLIT_PARAMS *params, struct file *filp); diff --git a/kernel-open/nvidia-uvm/uvm_va_range_device_p2p.c b/kernel-open/nvidia-uvm/uvm_va_range_device_p2p.c new file mode 100644 index 0000000000..564405fc06 --- /dev/null +++ b/kernel-open/nvidia-uvm/uvm_va_range_device_p2p.c @@ -0,0 +1,602 @@ +/******************************************************************************* + Copyright (c) 2024 NVIDIA Corporation + + Permission is hereby granted, free of charge, to any person obtaining a copy + of this software and associated documentation files (the "Software"), to + deal in the Software without restriction, including without limitation the + rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + sell copies of the Software, and to permit persons to whom the Software is + furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be + included in all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#include "uvm_common.h" +#include "uvm_linux.h" +#include "uvm_types.h" +#include "uvm_api.h" +#include "uvm_global.h" +#include "uvm_va_space.h" +#include "uvm_va_range.h" +#include "uvm_kvmalloc.h" +#include "nv_uvm_interface.h" +#include "nv_uvm_types.h" + +static struct kmem_cache *g_uvm_va_range_device_p2p_cache __read_mostly; + +NV_STATUS uvm_va_range_device_p2p_init(void) +{ + g_uvm_va_range_device_p2p_cache = NV_KMEM_CACHE_CREATE("uvm_va_range_device_p2p_t", uvm_va_range_device_p2p_t); + if (!g_uvm_va_range_device_p2p_cache) + return NV_ERR_NO_MEMORY; + return NV_OK; +} + +void uvm_va_range_device_p2p_exit(void) +{ + kmem_cache_destroy_safe(&g_uvm_va_range_device_p2p_cache); +} + +static NvU64 p2p_mem_page_count(uvm_device_p2p_mem_t *p2p_mem) +{ + return (p2p_mem->pfn_count * p2p_mem->page_size) >> PAGE_SHIFT; +} + +static struct page *p2p_mem_get_page(uvm_device_p2p_mem_t *p2p_mem, NvU64 cpu_page_index) +{ + NvU64 gpu_pfn_nr = cpu_page_index / (p2p_mem->page_size >> PAGE_SHIFT); + NvU64 cpu_pfn_offset = cpu_page_index % (p2p_mem->page_size >> PAGE_SHIFT); + + UVM_ASSERT(gpu_pfn_nr < p2p_mem->pfn_count); + if (gpu_pfn_nr >= p2p_mem->pfn_count) + return NULL; + + return pfn_to_page(p2p_mem->pfns[gpu_pfn_nr] + cpu_pfn_offset); +} + +// When pages are first allocated to a range they start out with a refcount of +// one. Therefore when the last range is destroyed we need to drop the page +// refcounts. If nothing is pinning the page(s) they will get freed and release +// their reference to the p2p_mem object. If there are pinned pages we wait +// until they drop their pin before freeing the p2p_mem object. +void uvm_va_range_free_device_p2p_mem(uvm_device_p2p_mem_t *p2p_mem) +{ + NvU64 i; + uvm_gpu_t *gpu = p2p_mem->gpu; + + // In the coherent case we don't hold references on the page because RM does + // via the duplicated handle. + if (!uvm_parent_gpu_is_coherent(gpu->parent)) { + uvm_mutex_lock(&gpu->device_p2p_lock); + + // It's possible that another range has been setup for the handle since + // this was queued for deletion. In that case don't free the pages. + if (nv_kref_read(&p2p_mem->va_range_count)) { + uvm_mutex_unlock(&gpu->device_p2p_lock); + return; + } + + // No more va ranges are setup to map the physical range and none can be + // established because we hold device_p2p_lock. + for (i = 0; i < p2p_mem_page_count(p2p_mem); i++) + put_page(p2p_mem_get_page(p2p_mem, i)); + + // Wait for any pinners + wait_event(p2p_mem->waitq, nv_kref_read(&p2p_mem->refcount) == 0); + + uvm_mutex_unlock(&gpu->device_p2p_lock); + } + + // Unpin the GPU memory. On non-coherent systems this frees the memory from + // the point of view of UVM and the kernel because we waited for all kernel + // users to complete above. On coherent systems there may still be in-kernel + // users however in this case the kernel is responsible for freeing the + // pages when they are eventually unpinned. + uvm_rm_locked_call(nvUvmInterfaceFreeDupedHandle(uvm_gpu_device_handle(gpu), + p2p_mem->rm_memory_handle)); + uvm_kvfree(p2p_mem->pfns); + uvm_kvfree(p2p_mem); +} + +static void put_device_p2p_mem(struct nv_kref *ref) +{ + uvm_device_p2p_mem_t *p2p_mem = container_of(ref, uvm_device_p2p_mem_t, va_range_count); + + // We need to call into RM which we can't do whilst holding va_space + // lock so defer it. We free the device_p2p_range there as that holds the + // queue item. + uvm_deferred_free_object_add(p2p_mem->deferred_free_list, + &p2p_mem->deferred_free, + UVM_DEFERRED_FREE_OBJECT_TYPE_DEVICE_P2P_MEM); +} + +static void deinit_device_p2p_mem(uvm_device_p2p_mem_t *p2p_mem, struct list_head *deferred_free_list) +{ + // We need to hold device_p2p_lock to serialise against the nv_kref_read + // in free_device_p2p_mem but we already hold the va_space lock so we + // need to use the nested variants. This is safe because we are explicitly + // scheduling work which may not happen holding the va_space lock. Coherent + // systems don't need to take the lock because the p2p_mem objects are not + // shared between multiple va_ranges. + if (!uvm_parent_gpu_is_coherent(p2p_mem->gpu->parent)) + uvm_mutex_lock_nested(&p2p_mem->gpu->device_p2p_lock); + + p2p_mem->deferred_free_list = deferred_free_list; + nv_kref_put(&p2p_mem->va_range_count, put_device_p2p_mem); + + if (!uvm_parent_gpu_is_coherent(p2p_mem->gpu->parent)) + uvm_mutex_unlock_nested(&p2p_mem->gpu->device_p2p_lock); +} + +void uvm_va_range_deinit_device_p2p(uvm_va_range_device_p2p_t *device_p2p_range, struct list_head *deferred_free_list) +{ + deinit_device_p2p_mem(device_p2p_range->p2p_mem, deferred_free_list); + device_p2p_range->p2p_mem = NULL; +} + +void uvm_va_range_destroy_device_p2p(uvm_va_range_device_p2p_t *device_p2p_range, struct list_head *deferred_free_list) +{ + if (device_p2p_range->p2p_mem) + uvm_va_range_deinit_device_p2p(device_p2p_range, deferred_free_list); + kmem_cache_free(g_uvm_va_range_device_p2p_cache, device_p2p_range); +} + +static NV_STATUS uvm_va_range_create_device_p2p(uvm_va_space_t *va_space, + struct mm_struct *mm, + NvU64 start, + NvU64 length, + NvU64 offset, + uvm_device_p2p_mem_t *p2p_mem, + uvm_va_range_device_p2p_t **out_va_range) +{ + uvm_va_range_device_p2p_t *device_p2p_range = NULL; + NV_STATUS status; + + device_p2p_range = nv_kmem_cache_zalloc(g_uvm_va_range_device_p2p_cache, NV_UVM_GFP_FLAGS); + if (!device_p2p_range) + return NV_ERR_NO_MEMORY; + + status = uvm_va_range_initialize_reclaim(&device_p2p_range->va_range, + mm, + UVM_VA_RANGE_TYPE_DEVICE_P2P, + va_space, + start, + start + length - 1); + if (status != NV_OK) { + kmem_cache_free(g_uvm_va_range_device_p2p_cache, device_p2p_range); + return status; + } + + status = uvm_range_tree_add(&va_space->va_range_tree, &device_p2p_range->va_range.node); + if (status != NV_OK) { + uvm_va_range_destroy(&device_p2p_range->va_range, NULL); + return status; + } + + device_p2p_range->p2p_mem = p2p_mem; + device_p2p_range->gpu = p2p_mem->gpu; + device_p2p_range->offset = offset; + *out_va_range = device_p2p_range; + + return NV_OK; +} + +static NV_STATUS get_gpu_pfns(uvm_gpu_t *gpu, + NvHandle duped_memory, + NvU64 *pfns, + NvU64 pfn_count, + NvLength size) +{ + UvmGpuExternalPhysAddrInfo ext_mapping_info; + NV_STATUS status; + NvU64 i; + + memset(&ext_mapping_info, 0, sizeof(ext_mapping_info)); + ext_mapping_info.physAddrBuffer = pfns; + ext_mapping_info.physAddrBufferSize = pfn_count * sizeof(*pfns); + + status = uvm_rm_locked_call(nvUvmInterfaceGetExternalAllocPhysAddrs(gpu->rm_address_space, + duped_memory, + 0, + size, + &ext_mapping_info)); + if (status != NV_OK) { + UVM_ERR_PRINT("Failed to read external address"); + return status; + } + + if (ext_mapping_info.numWrittenPhysAddrs != pfn_count) { + UVM_ERR_PRINT("Could not find GPU PFNs for device P2P memory\n"); + return NV_ERR_NO_MEMORY; + } + + // get_gpu_pfns returns GPU physical addresses rather than absolute + // pfn's so we need to convert these to absolute pfns by adding the BAR1 + // start address or system memory start address and right shifting by + // PAGE_SHIFT. + for (i = 0; i < ext_mapping_info.numWrittenPhysAddrs; i++) + if (uvm_parent_gpu_is_coherent(gpu->parent)) { + NvU64 last_pfn = gpu->parent->system_bus.memory_window_end >> PAGE_SHIFT; + + pfns[i] = (gpu->parent->system_bus.memory_window_start + pfns[i]) >> PAGE_SHIFT; + UVM_ASSERT(pfns[i] <= last_pfn); + if (pfns[i] > last_pfn) + return NV_ERR_INVALID_ADDRESS; + } + else { + NvU64 last_pfn = ((gpu->mem_info.static_bar1_start + gpu->mem_info.static_bar1_size) >> PAGE_SHIFT) - 1; + + pfns[i] = (gpu->mem_info.static_bar1_start + pfns[i]) >> PAGE_SHIFT; + UVM_ASSERT(pfns[i] <= last_pfn); + if (pfns[i] > last_pfn) + return NV_ERR_INVALID_ADDRESS; + } + + return NV_OK; +} + +#if defined(CONFIG_PCI_P2PDMA) && defined(NV_STRUCT_PAGE_HAS_ZONE_DEVICE_DATA) +static bool pci_p2pdma_page_free(struct page *page) { + return is_pci_p2pdma_page(page) && !page->zone_device_data && page_ref_count(page) == 1; +} + +// page->zone_device_data does not exist in kernels versions older than v5.3 +// which don't support CONFIG_PCI_P2PDMA. Therefore we need these accessor +// functions to ensure compilation succeeeds on older kernels. +static void pci_p2pdma_page_set_zone_device_data(struct page *page, void *zone_device_data) +{ + page->zone_device_data = zone_device_data; +} + +static void *pci_p2pdma_page_get_zone_device_data(struct page *page) +{ + return page->zone_device_data; +} +#else +static bool pci_p2pdma_page_free(struct page *page) { + UVM_ASSERT(0); + return false; +} + +static void pci_p2pdma_page_set_zone_device_data(struct page *page, void *zone_device_data) +{ + UVM_ASSERT(0); +} + +static void *pci_p2pdma_page_get_zone_device_data(struct page *page) +{ + UVM_ASSERT(0); + return NULL; +} +#endif + +static NV_STATUS alloc_device_p2p_mem(uvm_gpu_t *gpu, + NvHandle client, + NvHandle memory, + uvm_device_p2p_mem_t **p2p_mem_out) +{ + uvm_device_p2p_mem_t *p2p_mem; + UvmGpuMemoryInfo mem_info; + NvHandle dupped_memory; + NV_STATUS status; + NvU64 i; + NvU64 *pfns = NULL; + + p2p_mem = uvm_kvmalloc_zero(sizeof(*p2p_mem)); + if (!p2p_mem) + return NV_ERR_NO_MEMORY; + + status = uvm_rm_locked_call(nvUvmInterfaceDupMemory(uvm_gpu_device_handle(gpu), + client, + memory, + &dupped_memory, + &mem_info)); + if (status != NV_OK) + goto out_free; + + // GPU allocations typically use 2MB pages which is larger than any + // supported CPU page size. However it's possible to create GPU allocations + // which use 4K page sizes. We don't support that for P2P mappings so bail. + if (mem_info.pageSize < PAGE_SIZE) { + status = NV_ERR_INVALID_ARGUMENT; + goto out_release; + } + + p2p_mem->gpu = gpu; + p2p_mem->rm_memory_handle = dupped_memory; + p2p_mem->pfn_count = mem_info.size/mem_info.pageSize; + p2p_mem->page_size = mem_info.pageSize; + init_waitqueue_head(&p2p_mem->waitq); + nv_kref_init(&p2p_mem->refcount); + nv_kref_init(&p2p_mem->va_range_count); + + pfns = uvm_kvmalloc_zero(p2p_mem->pfn_count * sizeof(*pfns)); + if (!pfns) { + status = NV_ERR_NO_MEMORY; + goto out_release; + } + + status = get_gpu_pfns(gpu, dupped_memory, pfns, p2p_mem->pfn_count, mem_info.size); + if (status != NV_OK) + goto out_release; + + p2p_mem->pfns = pfns; + + for (i = 0; i < p2p_mem_page_count(p2p_mem); i++) { + struct page *page = p2p_mem_get_page(p2p_mem, i); + + if (!pci_p2pdma_page_free(page)) { + UVM_ASSERT(0); + + // This will leak the RM handle because we don't release it. + // However we should never encounter this and it's unclear that + // we can safely recover so the best thing is to leave the + // memory pinned in case something is using it. + return NV_ERR_INVALID_ARGUMENT; + } + + pci_p2pdma_page_set_zone_device_data(page, p2p_mem); + nv_kref_get(&p2p_mem->refcount); + } + + // The pages hold the references now, so drop the one allocated at + // initialisation. + nv_kref_put(&p2p_mem->refcount, NULL); + + *p2p_mem_out = p2p_mem; + + return status; + +out_release: + uvm_rm_locked_call(nvUvmInterfaceFreeDupedHandle(uvm_gpu_device_handle(gpu), dupped_memory)); + uvm_kvfree(pfns); + +out_free: + uvm_kvfree(p2p_mem); + + return status; +} + +static NV_STATUS alloc_pci_device_p2p(uvm_gpu_t *gpu, + NvHandle client, + NvHandle memory, + uvm_device_p2p_mem_t **p2p_mem_out) +{ + NvU64 pfn; + NV_STATUS status; + NvHandle dupped_memory; + UvmGpuMemoryInfo mem_info; + uvm_device_p2p_mem_t *p2p_mem; + + status = uvm_rm_locked_call(nvUvmInterfaceDupMemory(uvm_gpu_device_handle(gpu), + client, + memory, + &dupped_memory, + &mem_info)); + if (status != NV_OK) + return status; + + // The client RM handle is associated with a range of pages, which if + // initialised previously will all have their zone_device_data set to point + // to the same p2p_mem struct. Therefore we only need to look up one page to + // find the common p2p_mem struct to determine if the pages in the range are + // free or not. + status = get_gpu_pfns(gpu, dupped_memory, &pfn, 1, mem_info.pageSize); + if (status != NV_OK) + goto out_release; + + // Holding the device_p2p_lock ensures if we find a p2p_mem struct in + // zone_device_data it will remain alive until we get a reference on it. It + // also ensures if we don't find a p2p_mem object that we don't race with + // some other thread assigning or clearing zone_device_data. + uvm_mutex_lock(&gpu->device_p2p_lock); + p2p_mem = pci_p2pdma_page_get_zone_device_data(pfn_to_page(pfn)); + if (!p2p_mem) { + // We have not previously allocated p2pdma pages for this RM handle so do + // so now. + status = alloc_device_p2p_mem(gpu, client, memory, &p2p_mem); + if (status != NV_OK) { + uvm_mutex_unlock(&gpu->device_p2p_lock); + goto out_release; + } + } + else { + // Get reference on the existing range. + nv_kref_get(&p2p_mem->va_range_count); + } + uvm_mutex_unlock(&gpu->device_p2p_lock); + + // The p2p_mem will have have a pin on the memory. + uvm_rm_locked_call(nvUvmInterfaceFreeDupedHandle(uvm_gpu_device_handle(gpu), dupped_memory)); + *p2p_mem_out = p2p_mem; + + return NV_OK; + +out_release: + uvm_rm_locked_call(nvUvmInterfaceFreeDupedHandle(uvm_gpu_device_handle(gpu), dupped_memory)); + + return status; +} + +static NV_STATUS alloc_coherent_device_p2p(uvm_gpu_t *gpu, + NvHandle client, + NvHandle memory, + uvm_device_p2p_mem_t **p2p_mem_out) +{ + uvm_device_p2p_mem_t *p2p_mem; + UvmGpuMemoryInfo mem_info; + NvHandle dupped_memory; + NV_STATUS status; + NvU64 *pfns = NULL; + + p2p_mem = uvm_kvmalloc_zero(sizeof(*p2p_mem)); + if (!p2p_mem) + return NV_ERR_NO_MEMORY; + + status = uvm_rm_locked_call(nvUvmInterfaceDupMemory(uvm_gpu_device_handle(gpu), + client, + memory, + &dupped_memory, + &mem_info)); + if (status != NV_OK) + goto out; + + // GPU allocations typically use 2MB pages which is larger than any + // supported CPU page size. However it's possible to create GPU allocations + // which use 4K page sizes. We don't support that for P2P mappings so bail. + if (mem_info.pageSize < PAGE_SIZE) { + status = NV_ERR_INVALID_ARGUMENT; + goto out_release; + } + + p2p_mem->gpu = gpu; + p2p_mem->rm_memory_handle = dupped_memory; + p2p_mem->pfn_count = mem_info.size / mem_info.pageSize; + p2p_mem->page_size = mem_info.pageSize; + init_waitqueue_head(&p2p_mem->waitq); + nv_kref_init(&p2p_mem->refcount); + nv_kref_init(&p2p_mem->va_range_count); + + pfns = uvm_kvmalloc_zero(p2p_mem->pfn_count * sizeof(*pfns)); + if (!pfns) { + status = NV_ERR_NO_MEMORY; + goto out_release; + } + + status = get_gpu_pfns(gpu, dupped_memory, pfns, p2p_mem->pfn_count, mem_info.size); + if (status != NV_OK) + goto out_release; + + // We don't need to get references on the underlying pages because RM should + // hold a reference until we release the duplicated handle which doesn't + // happen until the va_range is deinitialized. + p2p_mem->pfns = pfns; + *p2p_mem_out = p2p_mem; + + return NV_OK; + +out_release: + uvm_rm_locked_call(nvUvmInterfaceFreeDupedHandle(uvm_gpu_device_handle(gpu), dupped_memory)); + uvm_kvfree(pfns); + +out: + uvm_kvfree(p2p_mem); + + return status; +} + +// Establish a mapping to p2p pages +NV_STATUS uvm_api_alloc_device_p2p(UVM_ALLOC_DEVICE_P2P_PARAMS *params, struct file *filp) +{ + NV_STATUS status; + uvm_device_p2p_mem_t *p2p_mem; + uvm_va_space_t *va_space = uvm_va_space_get(filp); + uvm_va_range_device_p2p_t *device_p2p_range; + struct mm_struct *mm; + uvm_gpu_t *gpu; + LIST_HEAD(deferred_free_list); + + if (uvm_api_range_invalid(params->base + params->offset, params->length)) + return NV_ERR_INVALID_ARGUMENT; + + gpu = uvm_va_space_retain_gpu_by_uuid(va_space, ¶ms->gpuUuid); + if (!gpu) + return NV_ERR_INVALID_DEVICE; + + if (!gpu->device_p2p_initialised) { + status = NV_ERR_NOT_SUPPORTED; + goto out_release; + } + + if (uvm_parent_gpu_is_coherent(gpu->parent)) { + status = alloc_coherent_device_p2p(gpu, params->hClient, params->hMemory, &p2p_mem); + if (status != NV_OK) + goto out_release; + } + else { + status = alloc_pci_device_p2p(gpu, params->hClient, params->hMemory, &p2p_mem); + if (status != NV_OK) + goto out_release; + } + + if (params->offset + params->length > p2p_mem->pfn_count * p2p_mem->page_size) { + status = NV_ERR_INVALID_ARGUMENT; + goto out_free; + } + + // The mm needs to be locked in order to remove stale HMM va_blocks. + mm = uvm_va_space_mm_or_current_retain_lock(va_space); + uvm_va_space_down_write(va_space); + status = uvm_va_range_create_device_p2p(va_space, + mm, + params->base, + params->length, + params->offset, + p2p_mem, + &device_p2p_range); + uvm_va_space_up_write(va_space); + uvm_va_space_mm_or_current_release_unlock(va_space, mm); + + if (status != NV_OK) + goto out_free; + + uvm_gpu_release(gpu); + return NV_OK; + +out_free: + deinit_device_p2p_mem(p2p_mem, &deferred_free_list); + uvm_deferred_free_object_list(&deferred_free_list); + +out_release: + uvm_gpu_release(gpu); + + return status; +} + +NV_STATUS uvm_va_range_device_p2p_map_cpu(uvm_va_space_t *va_space, + struct vm_area_struct *vma, + uvm_va_range_device_p2p_t *device_p2p_range) +{ + NvU64 i, va; + NV_STATUS status = NV_OK; + uvm_device_p2p_mem_t *p2p_mem = device_p2p_range->p2p_mem; + + uvm_assert_mmap_lock_locked(vma->vm_mm); + + for (i = device_p2p_range->offset >> PAGE_SHIFT, va = vma->vm_start; va < vma->vm_end; i++, va += PAGE_SIZE) { + struct page *page = p2p_mem_get_page(p2p_mem, i); + int ret; + + if (!page) { + status = NV_ERR_FATAL_ERROR; + goto error; + } + + // Takes a reference on the page. We know the page can't be freed + // (ie. have a refcount of 0) because the va_range exists and it has + // a reference on the uvm_device_p2p_mem_t and hence the underlying + // pages. + ret = vm_insert_page(vma, va, page); + if (ret) { + status = errno_to_nv_status(ret); + goto error; + } + } + + return NV_OK; + +error: + unmap_mapping_range(va_space->mapping, vma->vm_start, vma->vm_end - vma->vm_start, 1); + + return status; +} diff --git a/kernel-open/nvidia-uvm/uvm_va_space.c b/kernel-open/nvidia-uvm/uvm_va_space.c index 8b075a4dd2..15568aa380 100644 --- a/kernel-open/nvidia-uvm/uvm_va_space.c +++ b/kernel-open/nvidia-uvm/uvm_va_space.c @@ -86,8 +86,8 @@ static void init_tools_data(uvm_va_space_t *va_space) for (i = 0; i < ARRAY_SIZE(va_space->tools.counters); i++) INIT_LIST_HEAD(va_space->tools.counters + i); - for (i = 0; i < ARRAY_SIZE(va_space->tools.queues_v1); i++) - INIT_LIST_HEAD(va_space->tools.queues_v1 + i); + for (i = 0; i < ARRAY_SIZE(va_space->tools.queues); i++) + INIT_LIST_HEAD(va_space->tools.queues + i); for (i = 0; i < ARRAY_SIZE(va_space->tools.queues_v2); i++) INIT_LIST_HEAD(va_space->tools.queues_v2 + i); } @@ -99,14 +99,12 @@ static NV_STATUS register_gpu_peers(uvm_va_space_t *va_space, uvm_gpu_t *gpu) uvm_assert_rwsem_locked(&va_space->lock); for_each_va_space_gpu(other_gpu, va_space) { - uvm_gpu_peer_t *peer_caps; - if (uvm_id_equal(other_gpu->id, gpu->id)) continue; - peer_caps = uvm_gpu_peer_caps(gpu, other_gpu); - - if (peer_caps->link_type >= UVM_GPU_LINK_NVLINK_1 || gpu->parent == other_gpu->parent) { + // Enable NVLINK and SMC peers. + if (uvm_gpus_are_smc_peers(gpu, other_gpu) || + uvm_parent_gpu_peer_link_type(gpu->parent, other_gpu->parent) >= UVM_GPU_LINK_NVLINK_1) { NV_STATUS status = enable_peers(va_space, gpu, other_gpu); if (status != NV_OK) return status; @@ -132,7 +130,7 @@ static bool va_space_check_processors_masks(uvm_va_space_t *va_space) bool check_can_copy_from = true; if (UVM_ID_IS_GPU(processor)) { - uvm_gpu_t *gpu = uvm_va_space_get_gpu(va_space, processor); + uvm_gpu_t *gpu = uvm_gpu_get(processor); // Peer copies between two processors can be disabled even when they // are NvLink peers, or there is HW support for atomics between @@ -200,7 +198,8 @@ NV_STATUS uvm_va_space_create(struct address_space *mapping, uvm_va_space_t **va uvm_range_tree_init(&va_space->va_range_tree); uvm_ats_init_va_space(va_space); - // Init to 0 since we rely on atomic_inc_return behavior to return 1 as the first ID + // Init to 0 since we rely on atomic_inc_return behavior to return 1 as the + // first ID. atomic64_set(&va_space->range_group_id_counter, 0); INIT_RADIX_TREE(&va_space->range_groups, NV_UVM_GFP_FLAGS); @@ -304,7 +303,7 @@ static void unregister_gpu(uvm_va_space_t *va_space, { uvm_gpu_t *peer_gpu; uvm_va_range_t *va_range; - NvU32 peer_table_index; + NvU32 pair_index; uvm_assert_rwsem_locked_write(&va_space->lock); @@ -329,14 +328,14 @@ static void unregister_gpu(uvm_va_space_t *va_space, if (gpu == peer_gpu) continue; - peer_table_index = uvm_gpu_peer_table_index(gpu->id, peer_gpu->id); - if (test_bit(peer_table_index, va_space->enabled_peers)) { + pair_index = uvm_gpu_pair_index(gpu->id, peer_gpu->id); + if (test_bit(pair_index, va_space->enabled_peers)) { disable_peers(va_space, gpu, peer_gpu, deferred_free_list); - // Only PCIE peers need to be globally released. NVLINK peers are - // brought up and torn down automatically within add_gpu and - // remove_gpu. - if (peers_to_release && g_uvm_global.peers[peer_table_index].link_type == UVM_GPU_LINK_PCIE) + // Only PCIE peers need to be globally released. NVLINK and MIG + // peers are brought up and torn down automatically within + // add_gpu() and remove_gpu(). + if (peers_to_release && uvm_parent_gpu_peer_link_type(gpu->parent, peer_gpu->parent) == UVM_GPU_LINK_PCIE) uvm_processor_mask_set(peers_to_release, peer_gpu->id); } } @@ -376,7 +375,6 @@ static void unregister_gpu(uvm_va_space_t *va_space, UVM_ASSERT(processor_mask_array_empty(va_space->has_native_atomics, gpu->id)); uvm_processor_mask_clear(&va_space->registered_gpus, gpu->id); - va_space->registered_gpus_table[uvm_id_gpu_index(gpu->id)] = NULL; // Remove the GPU from the CPU/GPU affinity masks if (gpu->parent->closest_cpu_numa_node != -1) { @@ -506,9 +504,6 @@ void uvm_va_space_destroy(uvm_va_space_t *va_space) UVM_ASSERT(uvm_processor_mask_empty(&va_space->registered_gpus)); UVM_ASSERT(uvm_processor_mask_empty(&va_space->registered_gpu_va_spaces)); - for_each_gpu_id(gpu_id) - UVM_ASSERT(va_space->registered_gpus_table[uvm_id_gpu_index(gpu_id)] == NULL); - // The instance pointer mappings for this VA space have been removed so no // new bottom halves can get to this VA space, but there could still be // bottom halves running from before we removed the mapping. Rather than @@ -584,14 +579,13 @@ void uvm_va_space_destroy(uvm_va_space_t *va_space) uvm_processor_mask_clear(retained_gpus, gpu_id); for_each_gpu_in_mask(peer_gpu, retained_gpus) { - NvU32 peer_table_index = uvm_gpu_peer_table_index(gpu->id, peer_gpu->id); - if (test_bit(peer_table_index, va_space->enabled_peers_teardown)) { - uvm_gpu_peer_t *peer_caps = &g_uvm_global.peers[peer_table_index]; + NvU32 pair_index = uvm_gpu_pair_index(gpu->id, peer_gpu->id); - if (peer_caps->link_type == UVM_GPU_LINK_PCIE) + if (test_bit(pair_index, va_space->enabled_peers_teardown)) { + if (uvm_parent_gpu_peer_link_type(gpu->parent, peer_gpu->parent) == UVM_GPU_LINK_PCIE) uvm_gpu_release_pcie_peer_access(gpu, peer_gpu); - __clear_bit(peer_table_index, va_space->enabled_peers_teardown); + __clear_bit(pair_index, va_space->enabled_peers_teardown); } } @@ -668,6 +662,23 @@ uvm_gpu_t *uvm_va_space_retain_gpu_by_uuid(uvm_va_space_t *va_space, const NvPro return gpu; } +// TODO: Bug 4750544: remove this function (WAR) when nvUvmInterfaceDupMemory() +// is fixed. +uvm_gpu_t *uvm_va_space_get_gpu_by_mem_info(uvm_va_space_t *va_space, const UvmGpuMemoryInfo *mem_info) +{ + uvm_gpu_t *gpu; + + uvm_assert_rwsem_locked(&va_space->lock); + + for_each_va_space_gpu(gpu, va_space) { + if (uvm_uuid_eq(&gpu->uuid, &mem_info->uuid) || + (gpu->parent->smc.enabled && uvm_uuid_eq(&gpu->parent->uuid, &mem_info->uuid))) + return gpu; + } + + return NULL; +} + bool uvm_va_space_can_read_duplicate(uvm_va_space_t *va_space, uvm_gpu_t *changing_gpu) { NvU32 count = va_space->num_non_faultable_gpu_va_spaces; @@ -767,7 +778,6 @@ NV_STATUS uvm_va_space_register_gpu(uvm_va_space_t *va_space, va_space->peers_to_release[uvm_id_value(gpu->id)] = peers_to_release; uvm_processor_mask_set(&va_space->registered_gpus, gpu->id); - va_space->registered_gpus_table[uvm_id_gpu_index(gpu->id)] = gpu; if (gpu->parent->isr.replayable_faults.handling) { UVM_ASSERT(!uvm_processor_mask_test(&va_space->faultable_processors, gpu->id)); @@ -895,6 +905,7 @@ NV_STATUS uvm_va_space_unregister_gpu(uvm_va_space_t *va_space, const NvProcesso uvm_gpu_id_t peer_gpu_id; uvm_processor_mask_t *peers_to_release; LIST_HEAD(deferred_free_list); + bool disable_access_counters = false; // Stopping channels requires holding the VA space lock in read mode, so do // it first. We start in write mode then drop to read in order to flush out @@ -920,6 +931,20 @@ NV_STATUS uvm_va_space_unregister_gpu(uvm_va_space_t *va_space, const NvProcesso uvm_processor_mask_set(&va_space->gpu_unregister_in_progress, gpu->id); + if (gpu->parent->access_counters_supported) { + uvm_processor_mask_t *mask = &va_space->scratch_processor_mask; + + // If this is the last sub-processor in the parent being unregistered, + // then disable the parent's access counters. + uvm_processor_mask_zero(mask); + uvm_processor_mask_range_fill(mask, + uvm_gpu_id_from_sub_processor(gpu->parent->id, 0), + UVM_PARENT_ID_MAX_SUB_PROCESSORS); + uvm_processor_mask_and(mask, mask, &va_space->registered_gpus); + if (!uvm_processor_mask_andnot(mask, mask, &va_space->gpu_unregister_in_progress)) + disable_access_counters = true; + } + uvm_va_space_downgrade_write_rm(va_space); gpu_va_space = uvm_gpu_va_space_get(va_space, gpu); @@ -931,15 +956,14 @@ NV_STATUS uvm_va_space_unregister_gpu(uvm_va_space_t *va_space, const NvProcesso // it from the VA space until we're done. uvm_va_space_up_read_rm(va_space); - // If uvm_parent_gpu_access_counters_required(gpu->parent) is true, a - // concurrent registration could enable access counters after they are - // disabled here. + // If disable_access_counters is true, a concurrent registration could + // enable access counters after they are disabled here. // The concurrent registration will fail later on if it acquires the VA // space lock before the unregistration does (because the GPU is still // registered) and undo the access counters enablement, or succeed if it // acquires the VA space lock after the unregistration does. Both outcomes // result on valid states. - if (gpu->parent->access_counters_supported) + if (disable_access_counters) uvm_parent_gpu_access_counters_disable(gpu->parent, va_space); // mmap_lock is needed to establish CPU mappings to any pages evicted from @@ -984,7 +1008,7 @@ NV_STATUS uvm_va_space_unregister_gpu(uvm_va_space_t *va_space, const NvProcesso for_each_gpu_id_in_mask(peer_gpu_id, peers_to_release) { uvm_gpu_t *peer_gpu = uvm_gpu_get(peer_gpu_id); - UVM_ASSERT(uvm_gpu_peer_caps(gpu, peer_gpu)->link_type == UVM_GPU_LINK_PCIE); + UVM_ASSERT(uvm_parent_gpu_peer_link_type(gpu->parent, peer_gpu->parent) == UVM_GPU_LINK_PCIE); uvm_gpu_release_pcie_peer_access(gpu, peer_gpu); } @@ -1005,14 +1029,14 @@ static void disable_peers(uvm_va_space_t *va_space, uvm_gpu_t *gpu1, struct list_head *deferred_free_list) { - NvU32 table_index; + NvU32 pair_index; uvm_va_range_t *va_range; uvm_assert_rwsem_locked_write(&va_space->lock); - table_index = uvm_gpu_peer_table_index(gpu0->id, gpu1->id); + pair_index = uvm_gpu_pair_index(gpu0->id, gpu1->id); - if (!test_bit(table_index, va_space->enabled_peers)) + if (!test_bit(pair_index, va_space->enabled_peers)) return; // Unmap all page tables in this VA space which have peer mappings between @@ -1031,7 +1055,7 @@ static void disable_peers(uvm_va_space_t *va_space, processor_mask_array_clear(va_space->has_native_atomics, gpu0->id, gpu1->id); processor_mask_array_clear(va_space->has_native_atomics, gpu1->id, gpu0->id); - __clear_bit(table_index, va_space->enabled_peers); + __clear_bit(pair_index, va_space->enabled_peers); va_space_check_processors_masks(va_space); } @@ -1040,8 +1064,7 @@ static NV_STATUS enable_peers(uvm_va_space_t *va_space, uvm_gpu_t *gpu0, uvm_gpu { NV_STATUS status = NV_OK; uvm_gpu_va_space_t *gpu_va_space0, *gpu_va_space1; - NvU32 table_index = 0; - uvm_gpu_peer_t *peer_caps; + NvU32 pair_index; uvm_va_range_t *va_range; LIST_HEAD(deferred_free_list); @@ -1054,10 +1077,9 @@ static NV_STATUS enable_peers(uvm_va_space_t *va_space, uvm_gpu_t *gpu0, uvm_gpu return NV_ERR_INVALID_DEVICE; } - table_index = uvm_gpu_peer_table_index(gpu0->id, gpu1->id); - peer_caps = &g_uvm_global.peers[table_index]; + pair_index = uvm_gpu_pair_index(gpu0->id, gpu1->id); - UVM_ASSERT(!test_bit(table_index, va_space->enabled_peers)); + UVM_ASSERT(!test_bit(pair_index, va_space->enabled_peers)); // If both GPUs have registered GPU VA spaces already, their big page sizes // must match. @@ -1085,20 +1107,20 @@ static NV_STATUS enable_peers(uvm_va_space_t *va_space, uvm_gpu_t *gpu0, uvm_gpu } // Pre-compute nvlink and native atomic masks for the new peers - if (peer_caps->link_type >= UVM_GPU_LINK_NVLINK_1) { - processor_mask_array_set(va_space->has_nvlink, gpu0->id, gpu1->id); - processor_mask_array_set(va_space->has_nvlink, gpu1->id, gpu0->id); - + if (uvm_gpus_are_smc_peers(gpu0, gpu1)) { processor_mask_array_set(va_space->has_native_atomics, gpu0->id, gpu1->id); processor_mask_array_set(va_space->has_native_atomics, gpu1->id, gpu0->id); } - else if (gpu0->parent == gpu1->parent) { + else if (uvm_parent_gpu_peer_link_type(gpu0->parent, gpu1->parent) >= UVM_GPU_LINK_NVLINK_1) { + processor_mask_array_set(va_space->has_nvlink, gpu0->id, gpu1->id); + processor_mask_array_set(va_space->has_nvlink, gpu1->id, gpu0->id); + processor_mask_array_set(va_space->has_native_atomics, gpu0->id, gpu1->id); processor_mask_array_set(va_space->has_native_atomics, gpu1->id, gpu0->id); } UVM_ASSERT(va_space_check_processors_masks(va_space)); - __set_bit(table_index, va_space->enabled_peers); + __set_bit(pair_index, va_space->enabled_peers); uvm_for_each_va_range(va_range, va_space) { status = uvm_va_range_enable_peer(va_range, gpu0, gpu1); @@ -1134,7 +1156,7 @@ static NV_STATUS retain_pcie_peers_from_uuids(uvm_va_space_t *va_space, *gpu0 = uvm_va_space_get_gpu_by_uuid(va_space, gpu_uuid_1); *gpu1 = uvm_va_space_get_gpu_by_uuid(va_space, gpu_uuid_2); - if (*gpu0 && *gpu1 && !uvm_parent_id_equal((*gpu0)->parent->id, (*gpu1)->parent->id)) + if (*gpu0 && *gpu1 && !uvm_id_equal((*gpu0)->id, (*gpu1)->id) && !uvm_gpus_are_smc_peers(*gpu0, *gpu1)) status = uvm_gpu_retain_pcie_peer_access(*gpu0, *gpu1); else status = NV_ERR_INVALID_DEVICE; @@ -1147,7 +1169,7 @@ static NV_STATUS retain_pcie_peers_from_uuids(uvm_va_space_t *va_space, static bool uvm_va_space_pcie_peer_enabled(uvm_va_space_t *va_space, uvm_gpu_t *gpu0, uvm_gpu_t *gpu1) { return !processor_mask_array_test(va_space->has_nvlink, gpu0->id, gpu1->id) && - gpu0->parent != gpu1->parent && + !uvm_gpus_are_smc_peers(gpu0, gpu1) && uvm_va_space_peer_enabled(va_space, gpu0, gpu1); } @@ -1466,7 +1488,7 @@ static NV_STATUS check_gpu_va_space(uvm_gpu_va_space_t *gpu_va_space) if (other_gpu_va_space->ats.enabled != gpu_va_space->ats.enabled) return NV_ERR_INVALID_FLAGS; - if (!test_bit(uvm_gpu_peer_table_index(gpu->id, other_gpu->id), va_space->enabled_peers)) + if (!test_bit(uvm_gpu_pair_index(gpu->id, other_gpu->id), va_space->enabled_peers)) continue; if (gpu_va_space->page_tables.big_page_size != other_gpu_va_space->page_tables.big_page_size) @@ -1705,13 +1727,10 @@ NV_STATUS uvm_va_space_unregister_gpu_va_space(uvm_va_space_t *va_space, const N bool uvm_va_space_peer_enabled(uvm_va_space_t *va_space, const uvm_gpu_t *gpu0, const uvm_gpu_t *gpu1) { - size_t table_index; - UVM_ASSERT(uvm_processor_mask_test(&va_space->registered_gpus, gpu0->id)); UVM_ASSERT(uvm_processor_mask_test(&va_space->registered_gpus, gpu1->id)); - table_index = uvm_gpu_peer_table_index(gpu0->id, gpu1->id); - return !!test_bit(table_index, va_space->enabled_peers); + return test_bit(uvm_gpu_pair_index(gpu0->id, gpu1->id), va_space->enabled_peers); } uvm_processor_id_t uvm_processor_mask_find_closest_id(uvm_va_space_t *va_space, @@ -1727,6 +1746,22 @@ uvm_processor_id_t uvm_processor_mask_find_closest_id(uvm_va_space_t *va_space, uvm_mutex_lock(&va_space->closest_processors.mask_mutex); + // SMC peers should be considered closer than NVLINK or PCIe peers. + if (UVM_ID_IS_GPU(src)) { + uvm_processor_mask_zero(mask); + uvm_processor_mask_range_fill(mask, + uvm_gpu_id_from_sub_processor(uvm_parent_gpu_id_from_gpu_id(src), 0), + UVM_PARENT_ID_MAX_SUB_PROCESSORS); + if (uvm_processor_mask_and(mask, mask, candidates)) { + // We already know that src is not in candidates and that the mask + // is not empty so this has to find a SMC peer other than src. + closest_id = uvm_processor_mask_find_first_gpu_id(mask); + UVM_ASSERT(UVM_ID_IS_GPU(closest_id)); + UVM_ASSERT(!uvm_id_equal(closest_id, src)); + goto out; + } + } + if (uvm_processor_mask_and(mask, candidates, &va_space->has_nvlink[uvm_id_value(src)])) { // Direct peers, prioritizing GPU peers over CPU closest_id = uvm_processor_mask_find_first_gpu_id(mask); @@ -1749,6 +1784,7 @@ uvm_processor_id_t uvm_processor_mask_find_closest_id(uvm_va_space_t *va_space, closest_id = uvm_processor_mask_find_first_id(candidates); } +out: uvm_mutex_unlock(&va_space->closest_processors.mask_mutex); return closest_id; @@ -1796,6 +1832,9 @@ void uvm_deferred_free_object_list(struct list_head *deferred_free_list) case UVM_DEFERRED_FREE_OBJECT_TYPE_EXTERNAL_ALLOCATION: uvm_ext_gpu_map_free(container_of(object, uvm_ext_gpu_map_t, deferred_free)); break; + case UVM_DEFERRED_FREE_OBJECT_TYPE_DEVICE_P2P_MEM: + uvm_va_range_free_device_p2p_mem(container_of(object, uvm_device_p2p_mem_t, deferred_free)); + break; default: UVM_ASSERT_MSG(0, "Invalid type %d\n", object->type); } @@ -1830,7 +1869,7 @@ NV_STATUS uvm_api_enable_peer_access(UVM_ENABLE_PEER_ACCESS_PARAMS *params, stru NV_STATUS status = NV_OK; uvm_gpu_t *gpu0 = NULL; uvm_gpu_t *gpu1 = NULL; - size_t table_index; + NvU32 pair_index; uvm_mutex_lock(&g_uvm_global.global_lock); status = retain_pcie_peers_from_uuids(va_space, ¶ms->gpuUuidA, ¶ms->gpuUuidB, &gpu0, &gpu1); @@ -1840,8 +1879,8 @@ NV_STATUS uvm_api_enable_peer_access(UVM_ENABLE_PEER_ACCESS_PARAMS *params, stru uvm_va_space_down_write(va_space); - table_index = uvm_gpu_peer_table_index(gpu0->id, gpu1->id); - if (test_bit(table_index, va_space->enabled_peers)) + pair_index = uvm_gpu_pair_index(gpu0->id, gpu1->id); + if (test_bit(pair_index, va_space->enabled_peers)) status = NV_ERR_INVALID_DEVICE; else status = enable_peers(va_space, gpu0, gpu1); @@ -1962,29 +2001,29 @@ NV_STATUS uvm_test_enable_nvlink_peer_access(UVM_TEST_ENABLE_NVLINK_PEER_ACCESS_ NV_STATUS status = NV_OK; uvm_gpu_t *gpu0 = NULL; uvm_gpu_t *gpu1 = NULL; - size_t table_index; - uvm_gpu_peer_t *peer_caps = NULL; + size_t pair_index; uvm_va_space_down_write(va_space); gpu0 = uvm_va_space_get_gpu_by_uuid(va_space, ¶ms->gpuUuidA); gpu1 = uvm_va_space_get_gpu_by_uuid(va_space, ¶ms->gpuUuidB); - if (gpu0 && gpu1 && !uvm_id_equal(gpu0->id, gpu1->id)) - peer_caps = uvm_gpu_peer_caps(gpu0, gpu1); - - if (!peer_caps || peer_caps->link_type < UVM_GPU_LINK_NVLINK_1) { + if (!gpu0 || + !gpu1 || + uvm_id_equal(gpu0->id, gpu1->id) || + uvm_gpus_are_smc_peers(gpu0, gpu1) || + uvm_parent_gpu_peer_link_type(gpu0->parent, gpu1->parent) < UVM_GPU_LINK_NVLINK_1) { uvm_va_space_up_write(va_space); return NV_ERR_INVALID_DEVICE; } - table_index = uvm_gpu_peer_table_index(gpu0->id, gpu1->id); + pair_index = uvm_gpu_pair_index(gpu0->id, gpu1->id); // NVLink peers are automatically enabled in the VA space at VA space // registration time. In order to avoid tests having to keep track of the // different initial state for PCIe and NVLink peers, we just return NV_OK // if NVLink peer were already enabled. - if (test_bit(table_index, va_space->enabled_peers)) + if (test_bit(pair_index, va_space->enabled_peers)) status = NV_OK; else status = enable_peers(va_space, gpu0, gpu1); @@ -2174,10 +2213,26 @@ NV_STATUS uvm_test_va_space_allow_movable_allocations(UVM_TEST_VA_SPACE_ALLOW_MO static LIST_HEAD(g_cpu_service_block_context_list); static uvm_spinlock_t g_cpu_service_block_context_list_lock; +static struct kmem_cache *g_uvm_va_block_service_context_cache __read_mostly; + +static void uvm_va_space_destroy_service_context_cache(void) +{ + kmem_cache_destroy_safe(&g_uvm_va_block_service_context_cache); +} + +static NV_STATUS uvm_va_space_alloc_service_context_cache(void) +{ + g_uvm_va_block_service_context_cache = NV_KMEM_CACHE_CREATE("uvm_service_block_context_t", + uvm_service_block_context_t); + if (!g_uvm_va_block_service_context_cache) + return NV_ERR_NO_MEMORY; + + return NV_OK; +} uvm_service_block_context_t *uvm_service_block_context_alloc(struct mm_struct *mm) { - uvm_service_block_context_t *service_context = uvm_kvmalloc(sizeof(*service_context)); + uvm_service_block_context_t *service_context = kmem_cache_alloc(g_uvm_va_block_service_context_cache, NV_UVM_GFP_FLAGS); if (!service_context) return NULL; @@ -2197,13 +2252,18 @@ void uvm_service_block_context_free(uvm_service_block_context_t *service_context return; uvm_va_block_context_free(service_context->block_context); - uvm_kvfree(service_context); + kmem_cache_free(g_uvm_va_block_service_context_cache, service_context); } NV_STATUS uvm_service_block_context_init(void) { + NV_STATUS status; unsigned num_preallocated_contexts = 4; + status = uvm_va_space_alloc_service_context_cache(); + if (status != NV_OK) + return status; + uvm_spin_lock_init(&g_cpu_service_block_context_list_lock, UVM_LOCK_ORDER_LEAF); // Pre-allocate some fault service contexts for the CPU and add them to the global list @@ -2232,6 +2292,7 @@ void uvm_service_block_context_exit(void) } INIT_LIST_HEAD(&g_cpu_service_block_context_list); + uvm_va_space_destroy_service_context_cache(); } // Get a fault service context from the global list or allocate a new one if @@ -2395,7 +2456,7 @@ static vm_fault_t uvm_va_space_cpu_fault(uvm_va_space_t *va_space, } // Watch out, current->mm might not be vma->vm_mm - UVM_ASSERT(vma == uvm_va_range_vma(va_block->va_range)); + UVM_ASSERT(vma == uvm_va_range_vma(va_block->managed_range)); } // Loop until thrashing goes away. diff --git a/kernel-open/nvidia-uvm/uvm_va_space.h b/kernel-open/nvidia-uvm/uvm_va_space.h index edceecb845..367a374670 100644 --- a/kernel-open/nvidia-uvm/uvm_va_space.h +++ b/kernel-open/nvidia-uvm/uvm_va_space.h @@ -54,6 +54,7 @@ typedef enum UVM_DEFERRED_FREE_OBJECT_TYPE_CHANNEL, UVM_DEFERRED_FREE_OBJECT_GPU_VA_SPACE, UVM_DEFERRED_FREE_OBJECT_TYPE_EXTERNAL_ALLOCATION, + UVM_DEFERRED_FREE_OBJECT_TYPE_DEVICE_P2P_MEM, UVM_DEFERRED_FREE_OBJECT_TYPE_COUNT } uvm_deferred_free_object_type_t; @@ -113,10 +114,9 @@ struct uvm_gpu_va_space_struct // List of all uvm_user_channel_t's under this GPU VA space struct list_head registered_channels; - // List of all uvm_va_range_t's under this GPU VA space with type == - // UVM_VA_RANGE_TYPE_CHANNEL. Used at channel registration time to find - // shareable VA ranges without having to iterate through all VA ranges in - // the VA space. + // List of all channel ranges under this GPU VA space. Used at channel + // registration time to find shareable VA ranges without having to iterate + // through all VA ranges in the VA space. struct list_head channel_va_ranges; // Boolean which is 1 if no new channel registration is allowed. This is set @@ -150,15 +150,6 @@ struct uvm_va_space_struct // Mask of gpus registered with the va space uvm_processor_mask_t registered_gpus; - // Array of pointers to the uvm_gpu_t objects that correspond to the - // uvm_processor_id_t index. - // - // With SMC, GPUs can be partitioned so the number of uvm_gpu_t objects can - // be larger than UVM_ID_MAX_GPUS. However, each VA space can only - // subscribe to a single partition per GPU, so it is fine to have a regular - // processor mask. - uvm_gpu_t *registered_gpus_table[UVM_ID_MAX_GPUS]; - // Mask of processors registered with the va space that support replayable // faults. uvm_processor_mask_t faultable_processors; @@ -203,7 +194,7 @@ struct uvm_va_space_struct // Peer to peer table // A bitmask of peer to peer pairs enabled in this va_space - // indexed by a peer_table_index returned by uvm_gpu_peer_table_index(). + // indexed by a pair_index returned by uvm_gpu_pair_index(). DECLARE_BITMAP(enabled_peers, UVM_MAX_UNIQUE_GPU_PAIRS); // Temporary copy of the above state used to avoid allocation during VA @@ -324,7 +315,7 @@ struct uvm_va_space_struct // Lists of counters listening for events on this VA space struct list_head counters[UVM_TOTAL_COUNTERS]; - struct list_head queues_v1[UvmEventNumTypesAll]; + struct list_head queues[UvmEventNumTypesAll]; struct list_head queues_v2[UvmEventNumTypesAll]; // Node for this va_space in global subscribers list @@ -396,48 +387,6 @@ struct uvm_va_space_struct nv_kthread_q_item_t deferred_release_q_item; }; -static uvm_gpu_t *uvm_va_space_get_gpu(uvm_va_space_t *va_space, uvm_gpu_id_t gpu_id) -{ - uvm_gpu_t *gpu; - - UVM_ASSERT(uvm_processor_mask_test(&va_space->registered_gpus, gpu_id)); - - gpu = va_space->registered_gpus_table[uvm_id_gpu_index(gpu_id)]; - - UVM_ASSERT(gpu); - UVM_ASSERT(uvm_gpu_get(gpu->id) == gpu); - - return gpu; -} - -static const char *uvm_va_space_processor_name(uvm_va_space_t *va_space, uvm_processor_id_t id) -{ - if (UVM_ID_IS_CPU(id)) - return "0: CPU"; - else - return uvm_gpu_name(uvm_va_space_get_gpu(va_space, id)); -} - -static void uvm_va_space_processor_uuid(uvm_va_space_t *va_space, NvProcessorUuid *uuid, uvm_processor_id_t id) -{ - if (UVM_ID_IS_CPU(id)) { - memcpy(uuid, &NV_PROCESSOR_UUID_CPU_DEFAULT, sizeof(*uuid)); - } - else { - uvm_gpu_t *gpu = uvm_va_space_get_gpu(va_space, id); - UVM_ASSERT(gpu); - memcpy(uuid, &gpu->uuid, sizeof(*uuid)); - } -} - -static bool uvm_va_space_processor_has_memory(uvm_va_space_t *va_space, uvm_processor_id_t id) -{ - if (UVM_ID_IS_CPU(id)) - return true; - - return uvm_va_space_get_gpu(va_space, id)->mem_info.size > 0; -} - NV_STATUS uvm_va_space_create(struct address_space *mapping, uvm_va_space_t **va_space_ptr, NvU64 flags); void uvm_va_space_destroy(uvm_va_space_t *va_space); @@ -519,6 +468,10 @@ uvm_gpu_t *uvm_va_space_get_gpu_by_uuid_with_gpu_va_space(uvm_va_space_t *va_spa // LOCKING: The function takes and releases the VA space lock in read mode. uvm_gpu_t *uvm_va_space_retain_gpu_by_uuid(uvm_va_space_t *va_space, const NvProcessorUuid *gpu_uuid); +// Find and return the owning GPU for the given mem_info or NULL if not found. +// Locking: the VA space lock must be held. +uvm_gpu_t *uvm_va_space_get_gpu_by_mem_info(uvm_va_space_t *va_space, const UvmGpuMemoryInfo *mem_info); + // Returns whether read-duplication is supported. // If gpu is NULL, returns the current state. // otherwise, it returns what the result would be once the gpu's va space is @@ -670,7 +623,7 @@ static uvm_gpu_t *uvm_processor_mask_find_first_va_space_gpu(const uvm_processor if (UVM_ID_IS_INVALID(gpu_id)) return NULL; - gpu = uvm_va_space_get_gpu(va_space, gpu_id); + gpu = uvm_gpu_get(gpu_id); UVM_ASSERT_MSG(gpu, "gpu_id %u\n", uvm_id_value(gpu_id)); return gpu; @@ -698,7 +651,7 @@ static uvm_gpu_t *__uvm_processor_mask_find_next_va_space_gpu(const uvm_processo if (UVM_ID_IS_INVALID(gpu_id)) return NULL; - gpu = uvm_va_space_get_gpu(va_space, gpu_id); + gpu = uvm_gpu_get(gpu_id); UVM_ASSERT_MSG(gpu, "gpu_id %u\n", uvm_id_value(gpu_id)); return gpu; @@ -731,6 +684,7 @@ static uvm_gpu_t *uvm_processor_mask_find_next_va_space_gpu(const uvm_processor_ // Return the processor in the candidates mask that is "closest" to src, or // UVM_ID_MAX_PROCESSORS if candidates is empty. The order is: // - src itself +// - SMC peers if src is GPU // - Direct NVLINK GPU peers if src is CPU or GPU (1) // - NVLINK CPU if src is GPU // - PCIe peers if src is GPU (2) @@ -740,7 +694,7 @@ static uvm_gpu_t *uvm_processor_mask_find_next_va_space_gpu(const uvm_processor_ // (1) When src is a GPU, NVLINK GPU peers are preferred over the CPU because in // NUMA systems the CPU processor may refer to multiple CPU NUMA nodes, and // the bandwidth between src and the farthest CPU node can be substantially -// lower than the bandwidth src and its peer GPUs. +// lower than the bandwidth between src and its peer GPUs. // (2) TODO: Bug 1764943: Is copying from a PCI peer always better than copying // from CPU? uvm_processor_id_t uvm_processor_mask_find_closest_id(uvm_va_space_t *va_space, diff --git a/kernel-open/nvidia-uvm/uvm_va_space_mm.c b/kernel-open/nvidia-uvm/uvm_va_space_mm.c index 46d5f47e87..7dc08a3e7d 100644 --- a/kernel-open/nvidia-uvm/uvm_va_space_mm.c +++ b/kernel-open/nvidia-uvm/uvm_va_space_mm.c @@ -588,7 +588,7 @@ NV_STATUS uvm_test_va_space_mm_or_current_retain(UVM_TEST_VA_SPACE_MM_OR_CURRENT if (params->retain_done_ptr) { NvU64 flag = true; - if (nv_copy_to_user((void __user *)params->retain_done_ptr, &flag, sizeof(flag))) + if (copy_to_user((void __user *)params->retain_done_ptr, &flag, sizeof(flag))) status = NV_ERR_INVALID_ARGUMENT; } diff --git a/kernel-open/nvidia/linux_nvswitch.c b/kernel-open/nvidia/linux_nvswitch.c index 83250ae65f..40cb0d7826 100644 --- a/kernel-open/nvidia/linux_nvswitch.c +++ b/kernel-open/nvidia/linux_nvswitch.c @@ -31,6 +31,7 @@ #include "nvCpuUuid.h" #include "nv-time.h" #include "nvlink_caps.h" +#include "nvlink_proto.h" #include #include diff --git a/kernel-open/nvidia/nv-caps-imex.c b/kernel-open/nvidia/nv-caps-imex.c index 7106adb075..ee0e3a3d55 100644 --- a/kernel-open/nvidia/nv-caps-imex.c +++ b/kernel-open/nvidia/nv-caps-imex.c @@ -22,6 +22,7 @@ */ #include "nv-linux.h" +#include "nv-caps-imex.h" extern int NVreg_ImexChannelCount; extern int NVreg_CreateImexChannel0; diff --git a/kernel-open/nvidia/nv-caps.c b/kernel-open/nvidia/nv-caps.c index 840f47a9bb..391f31abad 100644 --- a/kernel-open/nvidia/nv-caps.c +++ b/kernel-open/nvidia/nv-caps.c @@ -269,7 +269,7 @@ static void nv_cap_procfs_exit(void) nv_cap_procfs_dir = NULL; } -int nv_cap_procfs_init(void) +static int nv_cap_procfs_init(void) { static struct proc_dir_entry *file_entry; diff --git a/kernel-open/nvidia/nv-dma.c b/kernel-open/nvidia/nv-dma.c index 7c24adb308..e45d6f1c6a 100644 --- a/kernel-open/nvidia/nv-dma.c +++ b/kernel-open/nvidia/nv-dma.c @@ -290,7 +290,7 @@ void nv_destroy_dma_map_scatterlist(nv_dma_map_t *dma_map) os_free_mem(dma_map->mapping.discontig.submaps); } -void nv_load_dma_map_scatterlist( +static void nv_load_dma_map_scatterlist( nv_dma_map_t *dma_map, NvU64 *va_array ) @@ -486,7 +486,7 @@ NV_STATUS NV_API_CALL nv_dma_map_sgt( return status; } -NV_STATUS NV_API_CALL nv_dma_unmap_sgt( +static NV_STATUS NV_API_CALL nv_dma_unmap_sgt( nv_dma_device_t *dma_dev, void **priv ) @@ -854,7 +854,7 @@ NV_STATUS NV_API_CALL nv_dma_map_peer * convert to a bus address. */ NvU64 offset = *va - res->start; - *va = nv_pci_bus_address(peer_pci_dev, bar_index) + offset; + *va = pci_bus_address(peer_pci_dev, bar_index) + offset; status = NV_OK; } diff --git a/kernel-open/nvidia/nv-dmabuf.c b/kernel-open/nvidia/nv-dmabuf.c index 7b98b4ae62..2269d1aeff 100644 --- a/kernel-open/nvidia/nv-dmabuf.c +++ b/kernel-open/nvidia/nv-dmabuf.c @@ -33,19 +33,16 @@ typedef struct nv_dma_buf_mem_handle NvU64 size; // RM memdesc specific data - void *static_mem_info; + void *mem_info; // // Refcount for phys addresses - // If refcount > 0, phys address ranges in phys_range are reused. + // If refcount > 0, phys address ranges in memArea are reused. // NvU64 phys_refcount; - // Number of scatterlist entries in phys_range[] array - NvU32 phys_range_count; - - // List of phys address ranges to be used to dma map - nv_phys_addr_range_t *phys_range; + // Scatterlist of all the memory ranges associated with the buf + MemoryArea memArea; } nv_dma_buf_mem_handle_t; typedef struct nv_dma_buf_file_private @@ -331,7 +328,7 @@ nv_dma_buf_dup_mem_handles( priv->handles[index].h_memory = h_memory_duped; priv->handles[index].offset = params->offsets[i]; priv->handles[index].size = params->sizes[i]; - priv->handles[index].static_mem_info = mem_info; + priv->handles[index].mem_info = mem_info; priv->num_objects++; index++; count++; @@ -380,14 +377,14 @@ nv_put_phys_addresses( continue; } - // Per-handle phys_range is freed by RM + // Per-handle memArea is freed by RM rm_dma_buf_unmap_mem_handle(sp, priv->nv, priv->h_client, priv->handles[index].h_memory, - priv->handles[index].size, - &priv->handles[index].phys_range, - priv->handles[index].phys_range_count); + priv->handles[index].mem_info, + priv->static_phys_addrs, + priv->handles[index].memArea); - priv->handles[index].phys_range_count = 0; + priv->handles[index].memArea.numRanges = 0; } } @@ -506,14 +503,14 @@ nv_dma_buf_get_phys_addresses ( continue; } - // Per-handle phys_range is allocated by RM + // Per-handle memArea is allocated by RM status = rm_dma_buf_map_mem_handle(sp, priv->nv, priv->h_client, priv->handles[index].h_memory, - priv->handles[index].offset, - priv->handles[index].size, - priv->handles[index].static_mem_info, - &priv->handles[index].phys_range, - &priv->handles[index].phys_range_count); + mrangeMake(priv->handles[index].offset, + priv->handles[index].size), + priv->handles[index].mem_info, + priv->static_phys_addrs, + &priv->handles[index].memArea); if (status != NV_OK) { goto unmap_handles; @@ -602,7 +599,7 @@ nv_dma_buf_map_pages ( // Calculate nents needed to allocate sg_table for (i = 0; i < priv->num_objects; i++) { - nents += priv->handles[i].phys_range_count; + nents += priv->handles[i].memArea.numRanges; } NV_KZALLOC(sgt, sizeof(struct sg_table)); @@ -621,12 +618,12 @@ nv_dma_buf_map_pages ( for (i = 0; i < priv->num_objects; i++) { - NvU32 range_count = priv->handles[i].phys_range_count; + NvU32 range_count = priv->handles[i].memArea.numRanges; NvU32 index = 0; for (index = 0; index < range_count; index++) { - NvU64 addr = priv->handles[i].phys_range[index].addr; - NvU64 len = priv->handles[i].phys_range[index].len; + NvU64 addr = priv->handles[i].memArea.pRanges[index].start; + NvU64 len = priv->handles[i].memArea.pRanges[index].size; struct page *page = NV_GET_PAGE_STRUCT(addr); if ((page == NULL) || (sg == NULL)) @@ -634,7 +631,7 @@ nv_dma_buf_map_pages ( goto free_table; } - sg_set_page(sg, page, len, 0); + sg_set_page(sg, page, len, NV_GET_OFFSET_IN_PAGE(addr)); sg = sg_next(sg); } } @@ -687,12 +684,12 @@ nv_dma_buf_map_pfns ( // Calculate nents needed to allocate sg_table for (i = 0; i < priv->num_objects; i++) { - NvU32 range_count = priv->handles[i].phys_range_count; + NvU32 range_count = priv->handles[i].memArea.numRanges; NvU32 index; for (index = 0; index < range_count; index++) { - NvU64 length = priv->handles[i].phys_range[index].len; + NvU64 length = priv->handles[i].memArea.pRanges[index].size; NvU64 count = length + dma_max_seg_size - 1; do_div(count, dma_max_seg_size); nents += count; @@ -714,13 +711,13 @@ nv_dma_buf_map_pfns ( sg = sgt->sgl; for (i = 0; i < priv->num_objects; i++) { - NvU32 range_count = priv->handles[i].phys_range_count; + NvU32 range_count = priv->handles[i].memArea.numRanges; NvU32 index = 0; for (index = 0; index < range_count; index++) { - NvU64 dma_addr = priv->handles[i].phys_range[index].addr; - NvU64 dma_len = priv->handles[i].phys_range[index].len; + NvU64 dma_addr = priv->handles[i].memArea.pRanges[index].start; + NvU64 dma_len = priv->handles[i].memArea.pRanges[index].size; // Break the scatterlist into dma_max_seg_size chunks while(dma_len != 0) diff --git a/kernel-open/nvidia/nv-i2c.c b/kernel-open/nvidia/nv-i2c.c index 6fdf206a8f..d1e80c217d 100644 --- a/kernel-open/nvidia/nv-i2c.c +++ b/kernel-open/nvidia/nv-i2c.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2005-2019 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2005-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/kernel-open/nvidia/nv-ibmnpu.c b/kernel-open/nvidia/nv-ibmnpu.c index a541c0718f..5a567f4dd8 100644 --- a/kernel-open/nvidia/nv-ibmnpu.c +++ b/kernel-open/nvidia/nv-ibmnpu.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2017-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2017-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -25,9 +25,9 @@ * nv-ibmnpu.c - interface with the ibmnpu (IBM NVLink Processing Unit) "module" */ #include "nv-linux.h" +#include "nv-ibmnpu.h" #if defined(NVCPU_PPC64LE) -#include "nv-ibmnpu.h" #include "nv-rsync.h" /* diff --git a/kernel-open/nvidia/nv-kthread-q.c b/kernel-open/nvidia/nv-kthread-q.c index 7f3c4cabc9..28d17d82cf 100644 --- a/kernel-open/nvidia/nv-kthread-q.c +++ b/kernel-open/nvidia/nv-kthread-q.c @@ -201,7 +201,7 @@ static struct task_struct *thread_create_on_node(int (*threadfn)(void *data), // Ran out of attempts - return thread even if its stack may not be // allocated on the preferred node - if ((i == (attempts - 1))) + if (i == (attempts - 1)) break; // Get the NUMA node where the first page of the stack is resident. If diff --git a/kernel-open/nvidia/nv-mmap.c b/kernel-open/nvidia/nv-mmap.c index 8fd4496044..ba53bda792 100644 --- a/kernel-open/nvidia/nv-mmap.c +++ b/kernel-open/nvidia/nv-mmap.c @@ -127,10 +127,10 @@ nvidia_vma_access( NvU32 pageIndex, pageOffset; void *kernel_mapping; const nv_alloc_mapping_context_t *mmap_context = &nvlfp->mmap_context; - NvU64 offset; + NvU64 offsInVma = addr - vma->vm_start; - pageIndex = ((addr - vma->vm_start) >> PAGE_SHIFT); - pageOffset = (addr & ~PAGE_MASK); + pageIndex = (offsInVma >> PAGE_SHIFT); + pageOffset = (offsInVma & ~PAGE_MASK); if (length < 0) { @@ -143,8 +143,6 @@ nvidia_vma_access( return -EINVAL; } - offset = mmap_context->mmap_start; - if (nv->flags & NV_FLAG_CONTROL) { at = NV_VMA_PRIVATE(vma); @@ -170,17 +168,29 @@ nvidia_vma_access( #endif kernel_mapping = (void *)(at->page_table[pageIndex]->virt_addr + pageOffset); } - else if (IS_FB_OFFSET(nv, offset, length)) + else { - addr = (offset & PAGE_MASK); + NvU64 idx = 0; + NvU64 curOffs = 0; + for(; idx < mmap_context->memArea.numRanges; idx++) + { + NvU64 nextOffs = mmap_context->memArea.pRanges[idx].size + curOffs; + if (curOffs <= offsInVma && nextOffs > offsInVma) + { + NvU64 realAddr = offsInVma - curOffs + mmap_context->memArea.pRanges[idx].start; + addr = realAddr & PAGE_MASK; + goto found; + } + curOffs = nextOffs; + } + return -EINVAL; +found: kernel_mapping = os_map_kernel_space(addr, PAGE_SIZE, NV_MEMORY_UNCACHED); if (kernel_mapping == NULL) return -ENOMEM; kernel_mapping = ((char *)kernel_mapping + pageOffset); } - else - return -EINVAL; length = NV_MIN(length, (int)(PAGE_SIZE - pageOffset)); @@ -213,10 +223,6 @@ static vm_fault_t nvidia_fault( nv_state_t *nv = NV_STATE_PTR(nvl); vm_fault_t ret = VM_FAULT_NOPAGE; - NvU64 page; - NvU64 num_pages = NV_VMA_SIZE(vma) >> PAGE_SHIFT; - NvU64 pfn_start = (nvlfp->mmap_context.mmap_start >> PAGE_SHIFT); - if (vma->vm_pgoff != 0) { return VM_FAULT_SIGBUS; @@ -228,6 +234,7 @@ static vm_fault_t nvidia_fault( return VM_FAULT_SIGBUS; } + // Wake up GPU and reinstate mappings only if we are not in S3/S4 entry if (!down_read_trylock(&nv_system_pm_lock)) { @@ -269,24 +276,35 @@ static vm_fault_t nvidia_fault( up_read(&nv_system_pm_lock); return VM_FAULT_NOPAGE; } - - // Safe to mmap, map all pages in this VMA. - for (page = 0; page < num_pages; page++) { - NvU64 virt_addr = vma->vm_start + (page << PAGE_SHIFT); - NvU64 pfn = pfn_start + page; - - ret = nv_insert_pfn(vma, virt_addr, pfn, - nvlfp->mmap_context.remap_prot_extra); - if (ret != VM_FAULT_NOPAGE) + NvU64 idx; + NvU64 curOffs = 0; + NvBool bRevoked = NV_TRUE; + nv_alloc_mapping_context_t *mmap_context = &nvlfp->mmap_context; + for(idx = 0; idx < mmap_context->memArea.numRanges; idx++) { - nv_printf(NV_DBG_ERRORS, - "NVRM: VM: nv_insert_pfn failed: %x\n", ret); - break; + NvU64 nextOffs = curOffs + mmap_context->memArea.pRanges[idx].size; + NvU64 pfn = mmap_context->memArea.pRanges[idx].start >> PAGE_SHIFT; + NvU64 numPages = mmap_context->memArea.pRanges[idx].size >> PAGE_SHIFT; + while (numPages != 0) + { + ret = nv_insert_pfn(vma, curOffs + vma->vm_start, pfn, + mmap_context->remap_prot_extra); + if (ret != VM_FAULT_NOPAGE) + { + goto err; + } + bRevoked = NV_FALSE; + curOffs += PAGE_SIZE; + pfn++; + numPages--; + } + curOffs = nextOffs; } - - nvl->all_mappings_revoked = NV_FALSE; +err: + nvl->all_mappings_revoked &= bRevoked; } + up(&nvl->mmap_lock); up_read(&nv_system_pm_lock); @@ -384,7 +402,7 @@ static int nvidia_mmap_peer_io( start = at->page_table[page_index]->phys_addr; size = pages * PAGE_SIZE; - ret = nv_io_remap_page_range(vma, start, size, 0); + ret = nv_io_remap_page_range(vma, start, size, 0, vma->vm_start); return ret; } @@ -416,14 +434,16 @@ static int nvidia_mmap_sysmem( nv_speculation_barrier(); #endif + if ( #if defined(NV_VGPU_KVM_BUILD) - if (at->flags.guest) + at->flags.guest || +#endif + at->flags.carveout) { ret = nv_remap_page_range(vma, start, at->page_table[j]->phys_addr, PAGE_SIZE, vma->vm_page_prot); } else -#endif { vma->vm_page_prot = nv_adjust_pgprot(vma->vm_page_prot, 0); ret = vm_insert_page(vma, start, @@ -525,13 +545,11 @@ int nvidia_mmap_helper( if (!NV_IS_CTL_DEVICE(nv)) { NvU32 remap_prot_extra = mmap_context->remap_prot_extra; - NvU64 mmap_start = mmap_context->mmap_start; - NvU64 mmap_length = mmap_context->mmap_size; NvU64 access_start = mmap_context->access_start; NvU64 access_len = mmap_context->access_size; - // validate the size - if (NV_VMA_SIZE(vma) != mmap_length) + // Ensure size is correct. + if (NV_VMA_SIZE(vma) != memareaSize(mmap_context->memArea)) { return -ENXIO; } @@ -590,11 +608,20 @@ int nvidia_mmap_helper( } else { - if (nv_io_remap_page_range(vma, mmap_start, mmap_length, - remap_prot_extra) != 0) + NvU64 idx = 0; + NvU64 curOffs = 0; + for(; idx < mmap_context->memArea.numRanges; idx++) { - up(&nvl->mmap_lock); - return -EAGAIN; + NvU64 nextOffs = curOffs + mmap_context->memArea.pRanges[idx].size; + if (nv_io_remap_page_range(vma, + mmap_context->memArea.pRanges[idx].start, + mmap_context->memArea.pRanges[idx].size, + remap_prot_extra, vma->vm_start + curOffs) != 0) + { + up(&nvl->mmap_lock); + return -EAGAIN; + } + curOffs = nextOffs; } } } diff --git a/kernel-open/nvidia/nv-modeset-interface.c b/kernel-open/nvidia/nv-modeset-interface.c index 5a8911c68b..39890ee064 100644 --- a/kernel-open/nvidia/nv-modeset-interface.c +++ b/kernel-open/nvidia/nv-modeset-interface.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -143,4 +143,4 @@ NV_STATUS nvidia_get_rm_ops(nvidia_modeset_rm_ops_t *rm_ops) return NV_OK; } -EXPORT_SYMBOL(nvidia_get_rm_ops); +NV_EXPORT_SYMBOL(nvidia_get_rm_ops); diff --git a/kernel-open/nvidia/nv-pci.c b/kernel-open/nvidia/nv-pci.c index fae36c2ba4..19b16a829f 100644 --- a/kernel-open/nvidia/nv-pci.c +++ b/kernel-open/nvidia/nv-pci.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2019-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -37,9 +37,14 @@ #include #endif +#include "detect-self-hosted.h" + #if !defined(NV_BUS_TYPE_HAS_IOMMU_OPS) #include #endif +#if NV_IS_EXPORT_SYMBOL_GPL_pci_ats_supported +#include +#endif static void nv_check_and_exclude_gpu( @@ -434,22 +439,28 @@ nv_init_coherent_link_info nvl->coherent_link_info.gpu_mem_pa = NV_PCI_RESOURCE_START(nvl->pci_dev, gpu_bar2_offset); - if ((NV_PCI_RESOURCE_VALID(nvl->pci_dev, gpu_bar1_offset)) && + if ((pci_devid_is_self_hosted_hopper(nv->pci_info.device_id)) && + (NV_PCI_RESOURCE_VALID(nvl->pci_dev, gpu_bar1_offset)) && (NV_PCI_RESOURCE_FLAGS(nvl->pci_dev, gpu_bar1_offset) & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY) { - // Present only in passthrough case + // Present only in passthrough case for self-hosted hopper. nvl->coherent_link_info.rsvd_mem_pa = NV_PCI_RESOURCE_START(nvl->pci_dev, gpu_bar1_offset); + + // + // Unset nv->bars[1] only for self-hosted Hopper as BAR1 in virtualization case + // for hopper is used to convey RM reserved memory information and doesn't contain + // the traditional GPU BAR2. Starting from Blackwell BAR1 will be the real BAR1. + // + memset(&nv->bars[1], 0, sizeof(nv->bars[1])); } // - // Unset nv->bars[] as the BARs in the virtualization case are used - // only to convey the coherent GPU memory information and doesn't - // contain the traditional GPU BAR1/BAR2. This is to ensure the - // coherent FB addresses don't inadvertently pass the IS_FB_OFFSET - // or IS_IMEM_OFFSET checks. + // Unset nv->bars[2] for all self-hosted systems as BAR2 in the virtualization case + // is used only to convey the coherent GPU memory information and doesn't contain + // the traditional GPU BAR2. This is to ensure the coherent FB addresses don't + // inadvertently pass the IS_FB_OFFSET or IS_IMEM_OFFSET checks. // - memset(&nv->bars[1], 0, sizeof(nv->bars[1])); memset(&nv->bars[2], 0, sizeof(nv->bars[2])); } @@ -457,8 +468,11 @@ nv_init_coherent_link_info NV_DEV_PRINTF(NV_DBG_INFO, nv, "DSD properties: \n"); NV_DEV_PRINTF(NV_DBG_INFO, nv, "\tGPU memory PA: 0x%lx \n", nvl->coherent_link_info.gpu_mem_pa); - NV_DEV_PRINTF(NV_DBG_INFO, nv, "\tGPU reserved memory PA: 0x%lx \n", - nvl->coherent_link_info.rsvd_mem_pa); + if (pci_devid_is_self_hosted_hopper(nv->pci_info.device_id)) + { + NV_DEV_PRINTF(NV_DBG_INFO, nv, "\tGPU reserved memory PA: 0x%lx \n", + nvl->coherent_link_info.rsvd_mem_pa); + } if (!gi_found) { @@ -780,8 +794,12 @@ nv_pci_probe // PPC64LE platform where ATS is currently supported (IBM P9). nv_ats_supported &= nv_platform_supports_numa(nvl); #else -#if defined(NV_PCI_DEV_HAS_ATS_ENABLED) +#if NV_IS_EXPORT_SYMBOL_GPL_pci_ats_supported + nv_ats_supported &= pci_ats_supported(pci_dev); +#elif defined(NV_PCI_DEV_HAS_ATS_ENABLED) nv_ats_supported &= pci_dev->ats_enabled; +#else + nv_ats_supported = NV_FALSE; #endif #endif if (nv_ats_supported) diff --git a/kernel-open/nvidia/nv-procfs.c b/kernel-open/nvidia/nv-procfs.c index ca92413cd8..f72828014f 100644 --- a/kernel-open/nvidia/nv-procfs.c +++ b/kernel-open/nvidia/nv-procfs.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1999-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1999-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -691,7 +691,7 @@ static nv_proc_ops_t nv_procfs_suspend_fops = { /* * Forwards error to nv_log_error which exposes data to vendor callback */ -void +static void exercise_error_forwarding_va( nv_state_t *nv, NvU32 err, diff --git a/kernel-open/nvidia/nv-reg.h b/kernel-open/nvidia/nv-reg.h index e6c20ca13b..5189b44be1 100644 --- a/kernel-open/nvidia/nv-reg.h +++ b/kernel-open/nvidia/nv-reg.h @@ -802,6 +802,18 @@ #define NV_DMA_REMAP_PEER_MMIO_DISABLE 0x00000000 #define NV_DMA_REMAP_PEER_MMIO_ENABLE 0x00000001 +/* + * Option: NVreg_RmNvlinkBandwidthLinkCount + * + * Description: + * + * This option allows user to reduce the GPU nvlink bandwidth to save power. + * + * This option is only for Blackwell+ GPU with NVLINK version 5.0. + */ +#define __NV_RM_NVLINK_BW_LINK_COUNT RmNvlinkBandwidthLinkCount +#define NV_RM_NVLINK_BW_LINK_COUNT NV_REG_STRING(__NV_RM_NVLINK_BW_LINK_COUNT) + /* * Option: NVreg_RmNvlinkBandwidth * @@ -951,6 +963,7 @@ NV_DEFINE_REG_STRING_ENTRY(__NV_TEMPORARY_FILE_PATH, NULL); NV_DEFINE_REG_STRING_ENTRY(__NV_EXCLUDED_GPUS, NULL); NV_DEFINE_REG_ENTRY(__NV_DMA_REMAP_PEER_MMIO, NV_DMA_REMAP_PEER_MMIO_ENABLE); NV_DEFINE_REG_STRING_ENTRY(__NV_RM_NVLINK_BW, NULL); +NV_DEFINE_REG_ENTRY(__NV_RM_NVLINK_BW_LINK_COUNT, 0); NV_DEFINE_REG_ENTRY_GLOBAL(__NV_IMEX_CHANNEL_COUNT, 2048); NV_DEFINE_REG_ENTRY_GLOBAL(__NV_CREATE_IMEX_CHANNEL_0, 0); @@ -996,6 +1009,7 @@ nv_parm_t nv_parms[] = { NV_DEFINE_PARAMS_TABLE_ENTRY(__NV_ENABLE_RESIZABLE_BAR), NV_DEFINE_PARAMS_TABLE_ENTRY(__NV_ENABLE_GPU_FIRMWARE), NV_DEFINE_PARAMS_TABLE_ENTRY(__NV_ENABLE_GPU_FIRMWARE_LOGS), + NV_DEFINE_PARAMS_TABLE_ENTRY(__NV_RM_NVLINK_BW_LINK_COUNT), NV_DEFINE_PARAMS_TABLE_ENTRY(__NV_ENABLE_DBG_BREAKPOINT), NV_DEFINE_PARAMS_TABLE_ENTRY(__NV_OPENRM_ENABLE_UNSUPPORTED_GPUS), NV_DEFINE_PARAMS_TABLE_ENTRY(__NV_DMA_REMAP_PEER_MMIO), diff --git a/kernel-open/nvidia/nv-report-err.c b/kernel-open/nvidia/nv-report-err.c index eec5af3e76..a3fa595483 100644 --- a/kernel-open/nvidia/nv-report-err.c +++ b/kernel-open/nvidia/nv-report-err.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2017 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2017-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,7 +29,7 @@ nv_report_error_cb_t nv_error_cb_handle = NULL; -int nv_register_error_cb(nv_report_error_cb_t report_error_cb) +int nvidia_register_error_cb(nv_report_error_cb_t report_error_cb) { if (report_error_cb == NULL) return -EINVAL; @@ -41,9 +41,9 @@ int nv_register_error_cb(nv_report_error_cb_t report_error_cb) return 0; } -EXPORT_SYMBOL(nv_register_error_cb); +EXPORT_SYMBOL(nvidia_register_error_cb); -int nv_unregister_error_cb(void) +int nvidia_unregister_error_cb(void) { if (nv_error_cb_handle == NULL) return -EPERM; @@ -52,9 +52,7 @@ int nv_unregister_error_cb(void) return 0; } -EXPORT_SYMBOL(nv_unregister_error_cb); - -struct pci_dev; +EXPORT_SYMBOL(nvidia_unregister_error_cb); void nv_report_error( struct pci_dev *dev, @@ -63,27 +61,17 @@ void nv_report_error( va_list ap ) { - va_list ap_copy; char *buffer; - int length = 0; - int status = NV_OK; + gfp_t gfp = NV_MAY_SLEEP() ? NV_GFP_NO_OOM : NV_GFP_ATOMIC; - if (nv_error_cb_handle != NULL) - { - va_copy(ap_copy, ap); - length = vsnprintf(NULL, 0, format, ap); - va_end(ap_copy); + if (nv_error_cb_handle == NULL) + return; + + buffer = kvasprintf(gfp, format, ap); - if (length > 0) - { - status = os_alloc_mem((void *)&buffer, (length + 1)*sizeof(char)); + if (buffer == NULL) + return; - if (status == NV_OK) - { - vsnprintf(buffer, length, format, ap); - nv_error_cb_handle(dev, error_number, buffer, length + 1); - os_free_mem(buffer); - } - } - } + nv_error_cb_handle(dev, error_number, buffer, strlen(buffer) + 1); + kfree(buffer); } diff --git a/kernel-open/nvidia/nv-report-err.h b/kernel-open/nvidia/nv-report-err.h index d488709211..815c659a02 100644 --- a/kernel-open/nvidia/nv-report-err.h +++ b/kernel-open/nvidia/nv-report-err.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2017 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2017-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -37,7 +37,7 @@ * @param[in] int * Length of error string. */ -typedef void (*nv_report_error_cb_t)(struct pci_dev *, uint32_t, char *, int); +typedef void (*nv_report_error_cb_t)(struct pci_dev *, uint32_t, char *, size_t); /* * @brief @@ -51,7 +51,7 @@ typedef void (*nv_report_error_cb_t)(struct pci_dev *, uint32_t, char *, int); * -EINVAL callback handle is NULL. * -EBUSY callback handle is already registered. */ -int nv_register_error_cb(nv_report_error_cb_t report_error_cb); +int nvidia_register_error_cb(nv_report_error_cb_t report_error_cb); /* * @brief @@ -61,6 +61,6 @@ int nv_register_error_cb(nv_report_error_cb_t report_error_cb); * 0 upon successful completion. * -EPERM unregister not permitted on NULL callback handle. */ -int nv_unregister_error_cb(void); +int nvidia_unregister_error_cb(void); #endif /* _NV_REPORT_ERR_H_ */ diff --git a/kernel-open/nvidia/nv-usermap.c b/kernel-open/nvidia/nv-usermap.c index 0cc927a6c1..30a7626b6b 100644 --- a/kernel-open/nvidia/nv-usermap.c +++ b/kernel-open/nvidia/nv-usermap.c @@ -55,6 +55,8 @@ NV_STATUS NV_API_CALL nv_add_mapping_context_to_file( status = NV_ERR_STATE_IN_USE; goto done; } + + os_mem_set((void*) nvamc, 0, sizeof(nv_alloc_mapping_context_t)); if (NV_IS_CTL_DEVICE(nv)) { @@ -69,8 +71,18 @@ NV_STATUS NV_API_CALL nv_add_mapping_context_to_file( goto done; } - nvamc->mmap_start = nvuap->mmap_start; - nvamc->mmap_size = nvuap->mmap_size; + status = os_alloc_mem((void**) &nvamc->memArea.pRanges, + sizeof(MemoryRange) * nvuap->memArea.numRanges); + + if (status != NV_OK) + { + nvamc->memArea.pRanges = NULL; + goto done; + } + nvamc->memArea.numRanges = nvuap->memArea.numRanges; + os_mem_copy(nvamc->memArea.pRanges, nvuap->memArea.pRanges, + sizeof(MemoryRange) * nvuap->memArea.numRanges); + if (nv_get_numa_status(nvl) == NV_NUMA_STATUS_ONLINE) { nvamc->page_array = nvuap->page_array; @@ -148,8 +160,9 @@ NV_STATUS NV_API_CALL nv_get_usermap_access_params( nvuap->remap_prot_extra = NV_PROT_4K_PAGE_ISOLATION; nvuap->access_start = (NvU64)NV_4K_PAGE_ISOLATION_ACCESS_START(addr); nvuap->access_size = NV_4K_PAGE_ISOLATION_ACCESS_LEN(addr, size); - nvuap->mmap_start = (NvU64)NV_4K_PAGE_ISOLATION_MMAP_ADDR(addr); - nvuap->mmap_size = NV_4K_PAGE_ISOLATION_MMAP_LEN(size); + + nvuap->memArea.pRanges[0].start = (NvU64)NV_4K_PAGE_ISOLATION_MMAP_ADDR(addr); + nvuap->memArea.pRanges[0].size = NV_4K_PAGE_ISOLATION_MMAP_LEN(size); #else NV_DEV_PRINTF(NV_DBG_ERRORS, nv, "4K page isolation required but not available!\n"); return NV_ERR_OPERATING_SYSTEM; diff --git a/kernel-open/nvidia/nv.c b/kernel-open/nvidia/nv.c index 217d7a7cb2..83705a0513 100644 --- a/kernel-open/nvidia/nv.c +++ b/kernel-open/nvidia/nv.c @@ -96,6 +96,10 @@ #include #endif +#if defined(NV_ASM_MSHYPERV_H_PRESENT) && defined(NVCPU_X86_64) +#include +#endif + #if defined(NV_ASM_CPUFEATURE_H_PRESENT) #include #endif @@ -184,11 +188,7 @@ struct semaphore nv_linux_devices_lock; // True if all the successfully probed devices support ATS // Assigned at device probe (module init) time -NvBool nv_ats_supported = NVCPU_IS_PPC64LE -#if defined(NV_PCI_DEV_HAS_ATS_ENABLED) - || NV_TRUE -#endif -; +NvBool nv_ats_supported = NV_TRUE; // allow an easy way to convert all debug printfs related to events // back and forth between 'info' and 'errors' @@ -285,6 +285,17 @@ void nv_detect_conf_compute_platform( #if defined(NV_CC_PLATFORM_PRESENT) os_cc_enabled = cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT); +#if defined(NV_CC_ATTR_SEV_SNP) + os_cc_sev_snp_enabled = cc_platform_has(CC_ATTR_GUEST_SEV_SNP); +#endif + +#if defined(NV_HV_GET_ISOLATION_TYPE) && IS_ENABLED(CONFIG_HYPERV) && defined(NVCPU_X86_64) + if (hv_get_isolation_type() == HV_ISOLATION_TYPE_SNP) + { + os_cc_snp_vtom_enabled = NV_TRUE; + } +#endif + #if defined(X86_FEATURE_TDX_GUEST) if (cpu_feature_enabled(X86_FEATURE_TDX_GUEST)) { @@ -293,8 +304,10 @@ void nv_detect_conf_compute_platform( #endif #else os_cc_enabled = NV_FALSE; + os_cc_sev_snp_enabled = NV_FALSE; + os_cc_snp_vtom_enabled = NV_FALSE; os_cc_tdx_enabled = NV_FALSE; -#endif +#endif //NV_CC_PLATFORM_PRESENT } static @@ -1018,9 +1031,16 @@ static void nv_free_file_private(nv_linux_file_private_t *nvlfp) NV_KFREE(nvet, sizeof(nvidia_event_t)); } - if (nvlfp->mmap_context.page_array != NULL) + if (nvlfp->mmap_context.valid) { - os_free_mem(nvlfp->mmap_context.page_array); + if (nvlfp->mmap_context.page_array != NULL) + { + os_free_mem(nvlfp->mmap_context.page_array); + } + if (nvlfp->mmap_context.memArea.pRanges != NULL) + { + os_free_mem(nvlfp->mmap_context.memArea.pRanges); + } } NV_KFREE(nvlfp, sizeof(nv_linux_file_private_t)); @@ -1251,17 +1271,29 @@ static int validate_numa_start_state(nv_linux_state_t *nvl) return rc; } -NV_STATUS NV_API_CALL nv_get_num_dpaux_instances(nv_state_t *nv, NvU32 *num_instances) +void NV_API_CALL +nv_schedule_uvm_isr(nv_state_t *nv) { - *num_instances = nv->num_dpaux_instance; - return NV_OK; +#if defined(NV_UVM_ENABLE) + nv_uvm_event_interrupt(nv_get_cached_uuid(nv)); +#endif +} + +NV_STATUS NV_API_CALL +nv_schedule_uvm_drain_p2p(NvU8 *pUuid) +{ +#if defined(NV_UVM_ENABLE) + return nv_uvm_drain_P2P(pUuid); +#else + return NV_ERR_NOT_SUPPORTED; +#endif } void NV_API_CALL -nv_schedule_uvm_isr(nv_state_t *nv) +nv_schedule_uvm_resume_p2p(NvU8 *pUuid) { #if defined(NV_UVM_ENABLE) - nv_uvm_event_interrupt(nv_get_cached_uuid(nv)); + nv_uvm_resume_P2P(pUuid); #endif } @@ -1623,9 +1655,6 @@ static void nv_init_mapping_revocation(nv_linux_state_t *nvl, address_space_init_once(&nvlfp->mapping); nvlfp->mapping.host = inode; nvlfp->mapping.a_ops = inode->i_mapping->a_ops; -#if defined(NV_ADDRESS_SPACE_HAS_BACKING_DEV_INFO) - nvlfp->mapping.backing_dev_info = inode->i_mapping->backing_dev_info; -#endif file->f_mapping = &nvlfp->mapping; /* Add nvlfp to list of open files in nvl for mapping revocation */ @@ -3136,6 +3165,7 @@ nv_alias_pages( NvU32 cache_type, NvU64 guest_id, NvU64 *pte_array, + NvBool carveout, void **priv_data ) { @@ -3167,6 +3197,7 @@ nv_alias_pages( #endif at->flags.guest = NV_TRUE; + at->flags.carveout = carveout; for (i=0; i < at->num_pages; ++i) { @@ -4411,15 +4442,7 @@ nvidia_suspend( status = nv_power_management(nv, pm_action); - if (status != NV_OK) - { - nvidia_modeset_resume(nv->gpu_id); - goto done; - } - else - { - nv->flags |= NV_FLAG_SUSPENDED; - } + nv->flags |= NV_FLAG_SUSPENDED; pci_pm: /* @@ -4606,13 +4629,17 @@ nv_suspend_devices( { if (resume_devices) { - nvidia_resume(nvl->dev, pm_action); + nvidia_resume(nvl->dev, NV_PM_ACTION_RESUME); } nv_restore_user_channels(NV_STATE_PTR(nvl)); } UNLOCK_NV_LINUX_DEVICES(); + + nv_uvm_resume(); + + nvidia_modeset_resume(0); } return status; @@ -4689,6 +4716,10 @@ int nv_pmops_suspend( NV_STATUS status; status = nvidia_suspend(dev, NV_PM_ACTION_STANDBY, NV_FALSE); + + if (status != NV_OK) + nvidia_resume(dev, NV_PM_ACTION_RESUME); + return (status == NV_OK) ? 0 : -EIO; } @@ -4709,6 +4740,10 @@ int nv_pmops_freeze( NV_STATUS status; status = nvidia_suspend(dev, NV_PM_ACTION_HIBERNATE, NV_FALSE); + + if (status != NV_OK) + nvidia_resume(dev, NV_PM_ACTION_RESUME); + return (status == NV_OK) ? 0 : -EIO; } diff --git a/kernel-open/nvidia/nv_gpu_ops.h b/kernel-open/nvidia/nv_gpu_ops.h index bb4a6f19c3..5e8c610c44 100644 --- a/kernel-open/nvidia/nv_gpu_ops.h +++ b/kernel-open/nvidia/nv_gpu_ops.h @@ -45,6 +45,11 @@ typedef struct gpuObject *gpuObjectHandle; typedef struct gpuRetainedChannel_struct gpuRetainedChannel; + +NV_STATUS calculatePCIELinkRateMBps(NvU32 lanes, + NvU32 pciLinkMaxSpeed, + NvU32 *pcieLinkRate); + NV_STATUS nvGpuOpsCreateSession(struct gpuSession **session); NV_STATUS nvGpuOpsDestroySession(struct gpuSession *session); @@ -180,6 +185,8 @@ NV_STATUS nvGpuOpsGetFbInfo(struct gpuDevice *device, gpuFbInfo * fbInfo); NV_STATUS nvGpuOpsGetEccInfo(struct gpuDevice *device, gpuEccInfo * eccInfo); +NV_STATUS nvGpuOpsGetNvlinkInfo(struct gpuDevice *device, gpuNvlinkInfo * nvlinkInfo); + NV_STATUS nvGpuOpsInitFaultInfo(struct gpuDevice *device, gpuFaultInfo *pFaultInfo); NV_STATUS nvGpuOpsDestroyFaultInfo(struct gpuDevice *device, @@ -227,6 +234,12 @@ NV_STATUS nvGpuOpsGetExternalAllocPtes(struct gpuAddressSpace *vaSpace, NvU64 size, gpuExternalMappingInfo *pGpuExternalMappingInfo); +NV_STATUS nvGpuOpsGetExternalAllocPhysAddrs(struct gpuAddressSpace *vaSpace, + NvHandle hDupedMemory, + NvU64 offset, + NvU64 size, + gpuExternalPhysAddrInfo *pGpuExternalPhysAddrInfo); + NV_STATUS nvGpuOpsRetainChannel(struct gpuAddressSpace *vaSpace, NvHandle hClient, NvHandle hChannel, @@ -285,6 +298,8 @@ NV_STATUS nvGpuOpsFlushReplayableFaultBuffer(gpuFaultInfo *pFaultInfo, NV_STATUS nvGpuOpsTogglePrefetchFaults(gpuFaultInfo *pFaultInfo, NvBool bEnable); +void nvGpuOpsReportFatalError(NV_STATUS error); + // Interface used for CCSL NV_STATUS nvGpuOpsCcslContextInit(struct ccslContext_t **ctx, gpuChannelHandle channel); diff --git a/kernel-open/nvidia/nv_uvm_interface.c b/kernel-open/nvidia/nv_uvm_interface.c index a76514bbf8..73f0252f07 100644 --- a/kernel-open/nvidia/nv_uvm_interface.c +++ b/kernel-open/nvidia/nv_uvm_interface.c @@ -1219,6 +1219,73 @@ NV_STATUS nv_uvm_event_interrupt(const NvU8 *pUuid) return NV_ERR_NO_INTR_PENDING; } +NV_STATUS nvUvmInterfaceGetNvlinkInfo(uvmGpuDeviceHandle device, + UvmGpuNvlinkInfo *nvlinkInfo) +{ + nvidia_stack_t *sp = NULL; + NV_STATUS status; + + if (nv_kmem_cache_alloc_stack(&sp) != 0) + { + return NV_ERR_NO_MEMORY; + } + + status = rm_gpu_ops_get_nvlink_info(sp, (gpuDeviceHandle)device, nvlinkInfo); + + nv_kmem_cache_free_stack(sp); + + return status; +} +EXPORT_SYMBOL(nvUvmInterfaceGetNvlinkInfo); + +NV_STATUS nv_uvm_drain_P2P(const NvU8 *uuid) +{ + NvProcessorUuid uvmUuid; + struct UvmOpsUvmEvents *events; + NV_STATUS ret = NV_ERR_NOT_SUPPORTED; + + memcpy(uvmUuid.uuid, uuid, UVM_UUID_LEN); + + // Synchronize callbacks with unregistration + down(&g_pNvUvmEventsLock); + + // It's not strictly necessary to use a cached local copy of the events + // pointer here since it can't change under the lock, but we'll do it for + // consistency. + events = getUvmEvents(); + if(events && events->drainP2P) + { + ret = events->drainP2P(&uvmUuid); + } + up(&g_pNvUvmEventsLock); + + return ret; +} + +NV_STATUS nv_uvm_resume_P2P(const NvU8 *uuid) +{ + NvProcessorUuid uvmUuid; + struct UvmOpsUvmEvents *events; + NV_STATUS ret = NV_ERR_NOT_SUPPORTED; + + memcpy(uvmUuid.uuid, uuid, UVM_UUID_LEN); + + // Synchronize callbacks with unregistration + down(&g_pNvUvmEventsLock); + + // It's not strictly necessary to use a cached local copy of the events + // pointer here since it can't change under the lock, but we'll do it for + // consistency. + events = getUvmEvents(); + if(events && events->resumeP2P) + { + ret = events->resumeP2P(&uvmUuid); + } + up(&g_pNvUvmEventsLock); + + return ret; +} + NV_STATUS nvUvmInterfaceP2pObjectCreate(uvmGpuDeviceHandle device1, uvmGpuDeviceHandle device2, NvHandle *hP2pObject) @@ -1277,6 +1344,32 @@ NV_STATUS nvUvmInterfaceGetExternalAllocPtes(uvmGpuAddressSpaceHandle vaSpace, } EXPORT_SYMBOL(nvUvmInterfaceGetExternalAllocPtes); +NV_STATUS nvUvmInterfaceGetExternalAllocPhysAddrs(uvmGpuAddressSpaceHandle vaSpace, + NvHandle hDupedMemory, + NvU64 offset, + NvU64 size, + UvmGpuExternalPhysAddrInfo *gpuExternalPhysAddrInfo) +{ + nvidia_stack_t *sp = NULL; + NV_STATUS status; + + if (nv_kmem_cache_alloc_stack(&sp) != 0) + { + return NV_ERR_NO_MEMORY; + } + + status = rm_gpu_ops_get_external_alloc_phys_addrs(sp, + (gpuAddressSpaceHandle)vaSpace, + hDupedMemory, + offset, + size, + gpuExternalPhysAddrInfo); + + nv_kmem_cache_free_stack(sp); + return status; +} +EXPORT_SYMBOL(nvUvmInterfaceGetExternalAllocPhysAddrs); + NV_STATUS nvUvmInterfaceRetainChannel(uvmGpuAddressSpaceHandle vaSpace, NvHandle hClient, NvHandle hChannel, @@ -1478,6 +1571,14 @@ NV_STATUS nvUvmInterfacePagingChannelPushStream(UvmGpuPagingChannelHandle channe } EXPORT_SYMBOL(nvUvmInterfacePagingChannelPushStream); +void nvUvmInterfaceReportFatalError(NV_STATUS error) +{ + nvidia_stack_t *sp = nvUvmGetSafeStack(); + rm_gpu_ops_report_fatal_error(sp, error); + nvUvmFreeSafeStack(sp); +} +EXPORT_SYMBOL(nvUvmInterfaceReportFatalError); + NV_STATUS nvUvmInterfaceCslInitContext(UvmCslContext *uvmCslContext, uvmGpuChannelHandle channel) { diff --git a/kernel-open/nvidia/nvidia.Kbuild b/kernel-open/nvidia/nvidia.Kbuild index a99358e8a2..ea4ef5bade 100644 --- a/kernel-open/nvidia/nvidia.Kbuild +++ b/kernel-open/nvidia/nvidia.Kbuild @@ -136,7 +136,6 @@ NV_CONFTEST_FUNCTION_COMPILE_TESTS += of_find_node_by_phandle NV_CONFTEST_FUNCTION_COMPILE_TESTS += of_node_to_nid NV_CONFTEST_FUNCTION_COMPILE_TESTS += pnv_pci_get_npu_dev NV_CONFTEST_FUNCTION_COMPILE_TESTS += of_get_ibm_chip_id -NV_CONFTEST_FUNCTION_COMPILE_TESTS += pci_bus_address NV_CONFTEST_FUNCTION_COMPILE_TESTS += pci_stop_and_remove_bus_device NV_CONFTEST_FUNCTION_COMPILE_TESTS += pci_rebar_get_possible_sizes NV_CONFTEST_FUNCTION_COMPILE_TESTS += wait_for_random_bytes @@ -160,6 +159,8 @@ NV_CONFTEST_FUNCTION_COMPILE_TESTS += full_name_hash NV_CONFTEST_FUNCTION_COMPILE_TESTS += pci_enable_atomic_ops_to_root NV_CONFTEST_FUNCTION_COMPILE_TESTS += vga_tryget NV_CONFTEST_FUNCTION_COMPILE_TESTS += cc_platform_has +NV_CONFTEST_FUNCTION_COMPILE_TESTS += cc_attr_guest_sev_snp +NV_CONFTEST_FUNCTION_COMPILE_TESTS += hv_get_isolation_type NV_CONFTEST_FUNCTION_COMPILE_TESTS += seq_read_iter NV_CONFTEST_FUNCTION_COMPILE_TESTS += follow_pfn NV_CONFTEST_FUNCTION_COMPILE_TESTS += drm_gem_object_get @@ -230,6 +231,7 @@ NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_tsec_comms_free_gsc NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_memory_block_size_bytes NV_CONFTEST_SYMBOL_COMPILE_TESTS += crypto NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_follow_pte +NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_gpl_pci_ats_supported NV_CONFTEST_TYPE_COMPILE_TESTS += dma_ops NV_CONFTEST_TYPE_COMPILE_TESTS += swiotlb_dma_ops diff --git a/kernel-open/nvidia/nvlink_linux.c b/kernel-open/nvidia/nvlink_linux.c index 11e798d65b..ade72e4ee4 100644 --- a/kernel-open/nvidia/nvlink_linux.c +++ b/kernel-open/nvidia/nvlink_linux.c @@ -27,6 +27,7 @@ #include "nvlink_linux.h" #include "nvlink_errors.h" #include "nvlink_export.h" +#include "nvlink_proto.h" #include "nv-linux.h" #include "nv-procfs.h" #include "nv-time.h" diff --git a/kernel-open/nvidia/nvlink_proto.h b/kernel-open/nvidia/nvlink_proto.h index 356001e4d5..3e3cffef3b 100644 --- a/kernel-open/nvidia/nvlink_proto.h +++ b/kernel-open/nvidia/nvlink_proto.h @@ -45,7 +45,6 @@ void nvswitch_exit (void); */ int tegrashim_init (void); void tegrashim_exit (void); -NvlStatus tegrashim_init_device (struct pci_dev *); #endif #endif /* _NVLINK_PROTO_H_ */ diff --git a/kernel-open/nvidia/os-interface.c b/kernel-open/nvidia/os-interface.c index eb49831333..9a6041c091 100644 --- a/kernel-open/nvidia/os-interface.c +++ b/kernel-open/nvidia/os-interface.c @@ -52,6 +52,8 @@ NvU32 os_page_size = PAGE_SIZE; NvU64 os_page_mask = NV_PAGE_MASK; NvU8 os_page_shift = PAGE_SHIFT; NvBool os_cc_enabled = 0; +NvBool os_cc_sev_snp_enabled = 0; +NvBool os_cc_snp_vtom_enabled = 0; NvBool os_cc_tdx_enabled = 0; #if defined(CONFIG_DMA_SHARED_BUFFER) @@ -370,9 +372,27 @@ NvBool NV_API_CALL os_is_administrator(void) return NV_IS_SUSER(); } -NvBool NV_API_CALL os_allow_priority_override(void) +NvBool NV_API_CALL os_check_access(RsAccessRight accessRight) { - return capable(CAP_SYS_NICE); + switch (accessRight) + { + case RS_ACCESS_PERFMON: + { +#if defined(CAP_PERFMON) + return capable(CAP_PERFMON); +#else + return os_is_administrator(); +#endif + } + case RS_ACCESS_NICE: + { + return capable(CAP_SYS_NICE); + } + default: + { + return NV_FALSE; + } + } } char* NV_API_CALL os_string_copy( @@ -400,7 +420,7 @@ NvS32 NV_API_CALL os_string_compare(const char *str1, const char *str2) return strcmp(str1, str2); } -void *os_mem_copy_custom( +static void *os_mem_copy_custom( void *dstPtr, const void *srcPtr, NvU32 length @@ -1173,7 +1193,7 @@ NV_STATUS NV_API_CALL os_queue_work_item(struct os_work_queue *queue, void *data return NV_OK; } -NV_STATUS NV_API_CALL os_flush_work_queue(struct os_work_queue *queue) +NV_STATUS NV_API_CALL os_flush_work_queue(struct os_work_queue *queue, NvBool is_unload) { nv_kthread_q_t *kthread; @@ -1182,9 +1202,13 @@ NV_STATUS NV_API_CALL os_flush_work_queue(struct os_work_queue *queue) if (NV_MAY_SLEEP()) { + kthread->is_unload_flush_ongoing = is_unload; + if (kthread->q_kthread) nv_kthread_q_flush(kthread); + kthread->is_unload_flush_ongoing = NV_FALSE; + return NV_OK; } else @@ -1196,6 +1220,13 @@ NV_STATUS NV_API_CALL os_flush_work_queue(struct os_work_queue *queue) } } +NvBool NV_API_CALL os_is_queue_flush_ongoing(struct os_work_queue *queue) +{ + nv_kthread_q_t *kthread = queue ? &queue->nvk : &nv_kthread_q; + + return kthread->is_unload_flush_ongoing; +} + extern NvU32 NVreg_EnableDbgBreakpoint; void NV_API_CALL os_dbg_breakpoint(void) diff --git a/kernel-open/nvidia/os-usermap.c b/kernel-open/nvidia/os-usermap.c index 2022e0faca..1aef5948e3 100644 --- a/kernel-open/nvidia/os-usermap.c +++ b/kernel-open/nvidia/os-usermap.c @@ -26,25 +26,6 @@ #include "os-interface.h" #include "nv-linux.h" -void* NV_API_CALL os_map_user_space( - NvU64 start, - NvU64 size_bytes, - NvU32 mode, - NvU32 protect, - void **priv_data -) -{ - return (void *)(NvUPtr)start; -} - -void NV_API_CALL os_unmap_user_space( - void *address, - NvU64 size, - void *priv_data -) -{ -} - NV_STATUS NV_API_CALL os_match_mmap_offset( void *pAllocPrivate, NvU64 offset, diff --git a/src/common/displayport/inc/dp_configcaps.h b/src/common/displayport/inc/dp_configcaps.h index 39651cdbb6..9ba48685c9 100644 --- a/src/common/displayport/inc/dp_configcaps.h +++ b/src/common/displayport/inc/dp_configcaps.h @@ -472,8 +472,8 @@ namespace DisplayPort virtual void refreshLinkStatus() = 0; virtual bool isLinkStatusValid(unsigned lanes) = 0; - virtual void getCustomTestPattern(NvU8 *testPattern) = 0; // DPCD offset 250 - 259 - + // DPCD offset 250 - 259 + virtual void get80BitsCustomTestPattern(NvU8 *testPattern) = 0; // // Message Boxes // @@ -689,8 +689,9 @@ namespace DisplayPort bool streamStatusChanged; // DPCD offset 2005 bool hdmiLinkStatusChanged; // DPCD offset 2005 bool dpTunnelingIrq; // DPCD offset 2005 - NvU8 eightyBitCustomPat[10]; // DPCD offset 250 - 259 + // DPCD offset 250 - 259 + NvU8 cstm80Bits[NV_DPCD_TEST_80BIT_CUSTOM_PATTERN__SIZE]; struct { struct @@ -1002,7 +1003,7 @@ namespace DisplayPort virtual AuxRetry::status setMultistreamLink(bool enable); virtual AuxRetry::status setMultistreamHotplugMode(MultistreamHotplugMode notifyType); - bool parseTestRequestTraining(NvU8 * buffer /* 0x18-0x28 valid */); + virtual bool parseTestRequestTraining(NvU8 * buffer /* 0x18-0x28 valid */); void parseAutomatedTestRequest(bool testRequestPending); virtual bool parseTestRequestPhy(); @@ -1200,24 +1201,27 @@ namespace DisplayPort return interrupts.testPhyCompliance.testRequestPhyCompliance; } - virtual void getTestRequestTraining(LinkRate & rate, unsigned & lanes) // DPCD offset 219, 220 + // DPCD offset 219, 220 + virtual void getTestRequestTraining(LinkRate & rate, unsigned & lanes) { rate = interrupts.testTraining.testRequestLinkRate; lanes = interrupts.testTraining.testRequestLaneCount; } - virtual LinkQualityPatternType getPhyTestPattern() // DPCD offset 248 + // DPCD offset 248 + virtual LinkQualityPatternType getPhyTestPattern() { return interrupts.testPhyCompliance.phyTestPattern; } - virtual void getCustomTestPattern(NvU8 *testPattern) // DPCD offset 250 - 259 + // DPCD offset 250 - 259 + virtual void get80BitsCustomTestPattern(NvU8 *testPattern) { int i; for (i = 0; i < 10; i++) { - testPattern[i] = interrupts.eightyBitCustomPat[i]; + testPattern[i] = interrupts.cstm80Bits[i]; } } diff --git a/src/common/displayport/inc/dp_connector.h b/src/common/displayport/inc/dp_connector.h index fbc0d86f6c..9402ea7ff0 100644 --- a/src/common/displayport/inc/dp_connector.h +++ b/src/common/displayport/inc/dp_connector.h @@ -287,6 +287,7 @@ namespace DisplayPort virtual void markDeviceForDeletion() = 0; virtual bool getRawDscCaps(NvU8 *buffer, NvU32 bufferSize) = 0; + virtual bool setRawDscCaps(const NvU8 *buffer, NvU32 bufferSize) = 0; // This interface is still nascent. Please don't use it. Read size limit is 16 bytes. virtual AuxBus::status getDpcdData(unsigned offset, NvU8 * buffer, diff --git a/src/common/displayport/inc/dp_connectorimpl.h b/src/common/displayport/inc/dp_connectorimpl.h index 7391709f42..7f36298743 100644 --- a/src/common/displayport/inc/dp_connectorimpl.h +++ b/src/common/displayport/inc/dp_connectorimpl.h @@ -317,7 +317,6 @@ namespace DisplayPort bool bDisableSSC; bool bEnableFastLT; NvU32 maxLinkRateFromRegkey; - bool bFlushTimeslotWhenDirty; // // Latency(ms) to apply between link-train and FEC enable for bug @@ -401,10 +400,12 @@ namespace DisplayPort virtual LinkConfiguration getMaxLinkConfig(); virtual LinkConfiguration getActiveLinkConfig(); virtual void powerdownLink(bool bPowerdownPanel = false); + LinkConfiguration initMaxLinkConfig(); GroupImpl * getActiveGroupForSST(); bool detectSinkCountChange(); - bool handlePhyPatternRequest(); + + virtual bool handlePhyPatternRequest(); void applyOuiWARs(); bool linkUseMultistream() { diff --git a/src/common/displayport/inc/dp_deviceimpl.h b/src/common/displayport/inc/dp_deviceimpl.h index bef4dc64cf..22ae4ed109 100644 --- a/src/common/displayport/inc/dp_deviceimpl.h +++ b/src/common/displayport/inc/dp_deviceimpl.h @@ -45,6 +45,7 @@ namespace DisplayPort #define HDCP_BCAPS_DP_EN_BIT 0x01 #define HDCP_I2C_CLIENT_ADDR 0x74 #define DEVICE_OUI_SIZE 3 + #define DSC_CAPS_SIZE 16 struct GroupImpl; struct ConnectorImpl; @@ -427,6 +428,7 @@ namespace DisplayPort virtual void markDeviceForDeletion() {bisMarkedForDeletion = true;}; virtual bool isMarkedForDeletion() {return bisMarkedForDeletion;}; virtual bool getRawDscCaps(NvU8 *buffer, NvU32 bufferSize); + virtual bool setRawDscCaps(const NvU8 *buffer, NvU32 bufferSize); virtual AuxBus::status dscCrcControl(NvBool bEnable, gpuDscCrc *dataGpu, sinkDscCrc *dataSink); diff --git a/src/common/displayport/inc/dp_edid.h b/src/common/displayport/inc/dp_edid.h index 903dffa647..cbd1e9183a 100644 --- a/src/common/displayport/inc/dp_edid.h +++ b/src/common/displayport/inc/dp_edid.h @@ -165,7 +165,6 @@ namespace DisplayPort bool delayAfterD3; bool keepLinkAlive; bool useLegacyAddress; - bool reassessMaxLink; bool bIgnoreDscCap; // Ignore DSC even if sink reports DSC capability }_WARFlags; diff --git a/src/common/displayport/inc/dp_evoadapter.h b/src/common/displayport/inc/dp_evoadapter.h index dfc18f7f41..d7fb3864d4 100644 --- a/src/common/displayport/inc/dp_evoadapter.h +++ b/src/common/displayport/inc/dp_evoadapter.h @@ -51,7 +51,7 @@ namespace DisplayPort { public: // - + // IOCTL access to RM class DISPLAY_COMMON and NV50_DISPLAY // virtual NvU32 rmControl0073(NvU32 command, void * params, NvU32 paramSize) = 0; virtual NvU32 rmControl5070(NvU32 command, void * params, NvU32 paramSize) = 0; @@ -329,7 +329,6 @@ namespace DisplayPort virtual bool aquireSema(); virtual void releaseSema(); virtual bool physicalLayerSetTestPattern(PatternInfo * patternInfo); - virtual void preLinkTraining(NvU32 head); virtual void postLinkTraining(NvU32 head); virtual NvU32 getRegkeyValue(const char *key); diff --git a/src/common/displayport/inc/dp_linkconfig.h b/src/common/displayport/inc/dp_linkconfig.h index 579d8487ac..ca422456db 100644 --- a/src/common/displayport/inc/dp_linkconfig.h +++ b/src/common/displayport/inc/dp_linkconfig.h @@ -209,7 +209,6 @@ namespace DisplayPort #define DP_INVALID_SOR_INDEX 0xFFFFFFFF #define DSC_DEPTH_FACTOR 16 - class LinkConfiguration : virtual public Object { public: @@ -236,21 +235,8 @@ namespace DisplayPort linkTrainCounter(0) {}; LinkConfiguration(LinkPolicy * p, unsigned lanes, LinkRate peakRate, - bool enhancedFraming, bool MST, bool disablePostLTRequest = false, - bool bEnableFEC = false, bool bDisableLTTPR = false) : - lanes(lanes), peakRatePossible(peakRate), peakRate(peakRate), - enhancedFraming(enhancedFraming), multistream(MST), - disablePostLTRequest(disablePostLTRequest), - bEnableFEC(bEnableFEC), bDisableLTTPR(bDisableLTTPR), - linkTrainCounter(0) - { - // downrate for spread and FEC - minRate = linkOverhead(peakRate); - if (p) - { - policy = *p; - } - } + bool enhancedFraming, bool MST, bool disablePostLTRequest = false, + bool bEnableFEC = false, bool bDisableLTTPR = false); void setLTCounter(unsigned counter) { @@ -466,52 +452,7 @@ namespace DisplayPort return lanes != laneCount_0; } - bool lowerConfig(bool bReduceLaneCnt = false) - { - // - // TODO: bReduceLaneCnt is set to fallback to 4 lanes with lower - // valid link rate. But we should reset to max lane count - // sink supports instead. - // - - LinkRate lowerRate = policy.getLinkRates()->getLowerRate(peakRate); - - if(bReduceLaneCnt) - { - // Reduce laneCount before reducing linkRate - if(lanes == laneCount_1) - { - if (lowerRate) - { - lanes = laneCount_4; - peakRate = lowerRate; - } - else - { - lanes = laneCount_0; - } - } - else - { - lanes /= 2; - } - } - else - { - // Reduce the link rate instead of lane count - if (lowerRate) - { - peakRate = lowerRate; - } - else - { - lanes /= 2; - } - } - - minRate = linkOverhead(peakRate); - return lanes != laneCount_0; - } + bool lowerConfig(bool bReduceLaneCnt = false); void setLaneRate(LinkRate newRate, unsigned newLanes) { diff --git a/src/common/displayport/inc/dp_mainlink.h b/src/common/displayport/inc/dp_mainlink.h index b030cd6ade..15aae31a34 100644 --- a/src/common/displayport/inc/dp_mainlink.h +++ b/src/common/displayport/inc/dp_mainlink.h @@ -103,7 +103,6 @@ namespace DisplayPort { public: virtual bool physicalLayerSetTestPattern(PatternInfo * patternInfo) = 0; - // // Wrappers for existing link training RM control calls // diff --git a/src/common/displayport/inc/dp_regkeydatabase.h b/src/common/displayport/inc/dp_regkeydatabase.h index 7173e7079a..164009f557 100644 --- a/src/common/displayport/inc/dp_regkeydatabase.h +++ b/src/common/displayport/inc/dp_regkeydatabase.h @@ -62,25 +62,17 @@ // Message to power down video stream before power down link (set D3) #define NV_DP_REGKEY_POWER_DOWN_PHY "DP_POWER_DOWN_PHY" -// -// Regkey to re-assess max link if the first assessed link config -// is lower than the panel max -// -#define NV_DP_REGKEY_REASSESS_MAX_LINK "DP_REASSESS_MAX_LINK" - // // DSC capability of downstream device should be decided based on device's own // and its parent's DSC capability. // #define NV_DP_DSC_MST_CAP_BUG_3143315 "DP_DSC_MST_CAP_BUG_3143315" - +// // Bug 4388987 : This regkey will disable reading PCON caps for MST. +// #define NV_DP_REGKEY_MST_PCON_CAPS_READ_DISABLED "DP_BUG_4388987_WAR" -// Bug 4426624: Flush timeslot change to HW when dirty bit is set. -#define NV_DP_REGKEY_FLUSH_TIMESLOT_INFO_WHEN_DIRTY "DP_BUG_4426624_WAR" - #define NV_DP_REGKEY_DISABLE_TUNNEL_BW_ALLOCATION "DP_DISABLE_TUNNEL_BW_ALLOCATION" // @@ -114,9 +106,7 @@ struct DP_REGKEY_DATABASE bool bBypassEDPRevCheck; bool bDscMstCapBug3143315; bool bPowerDownPhyBeforeD3; - bool bReassessMaxLink; bool bMSTPCONCapsReadDisabled; - bool bFlushTimeslotWhenDirty; bool bForceDisableTunnelBwAllocation; }; diff --git a/src/common/displayport/src/dp_buffer.cpp b/src/common/displayport/src/dp_buffer.cpp index abc0d0f9c9..cb30938d57 100644 --- a/src/common/displayport/src/dp_buffer.cpp +++ b/src/common/displayport/src/dp_buffer.cpp @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -232,7 +232,12 @@ Buffer::Buffer(const Buffer & other) else { if (resize(other.getLength()) && other.getData()) - dpMemCopy(getData(), other.getData(), getLength()); + { + if (capacity && getData()) + { + dpMemCopy(getData(), other.getData(), getLength()); + } + } } } diff --git a/src/common/displayport/src/dp_configcaps.cpp b/src/common/displayport/src/dp_configcaps.cpp index fa9239dc74..adc188751e 100644 --- a/src/common/displayport/src/dp_configcaps.cpp +++ b/src/common/displayport/src/dp_configcaps.cpp @@ -1457,7 +1457,7 @@ bool DPCDHALImpl::parseTestRequestPhy() for (unsigned i = 0; i < NV_DPCD_TEST_80BIT_CUSTOM_PATTERN__SIZE; i++) { - interrupts.eightyBitCustomPat[i] = buffer[i]; + interrupts.cstm80Bits[i] = buffer[i]; } } diff --git a/src/common/displayport/src/dp_connectorimpl.cpp b/src/common/displayport/src/dp_connectorimpl.cpp index 29b1b352e1..2de2109f7a 100644 --- a/src/common/displayport/src/dp_connectorimpl.cpp +++ b/src/common/displayport/src/dp_connectorimpl.cpp @@ -144,10 +144,7 @@ ConnectorImpl::ConnectorImpl(MainLink * main, AuxBus * auxBus, Timer * timer, Co this->applyRegkeyOverrides(dpRegkeyDatabase); hal->applyRegkeyOverrides(dpRegkeyDatabase); - highestAssessedLC = getMaxLinkConfig(); - highestAssessedLC.peakRate = DATA_RATE_8B_10B_TO_LINK_RATE(highestAssessedLC.peakRate); - highestAssessedLC.peakRatePossible = DATA_RATE_8B_10B_TO_LINK_RATE(highestAssessedLC.peakRatePossible); - + highestAssessedLC = initMaxLinkConfig(); } void ConnectorImpl::applyRegkeyOverrides(const DP_REGKEY_DATABASE& dpRegkeyDatabase) @@ -175,13 +172,11 @@ void ConnectorImpl::applyRegkeyOverrides(const DP_REGKEY_DATABASE& dpRegkeyDatab this->bEnableFastLT = dpRegkeyDatabase.bFastLinkTrainingEnabled; this->bDscMstCapBug3143315 = dpRegkeyDatabase.bDscMstCapBug3143315; this->bPowerDownPhyBeforeD3 = dpRegkeyDatabase.bPowerDownPhyBeforeD3; - this->bReassessMaxLink = dpRegkeyDatabase.bReassessMaxLink; if (dpRegkeyDatabase.applyMaxLinkRateOverrides) { this->maxLinkRateFromRegkey = hal->mapLinkBandiwdthToLinkrate(dpRegkeyDatabase.applyMaxLinkRateOverrides); // BW to linkrate } this->bForceDisableTunnelBwAllocation = dpRegkeyDatabase.bForceDisableTunnelBwAllocation; - this->bFlushTimeslotWhenDirty = dpRegkeyDatabase.bFlushTimeslotWhenDirty; } void ConnectorImpl::setPolicyModesetOrderMitigation(bool enabled) @@ -533,30 +528,6 @@ void ConnectorImpl::processNewDevice(const DiscoveryManager::Device & device, this->assessLink(); } - // Panel has issues with LQA, reassess link - if (processedEdid.WARFlags.reassessMaxLink) - { - // - // If the highest assessed LC is not equal to max possible link config and - // panel is branch device which GPU is link training, re-assess link - // - int retries = 0; - - LinkConfiguration maxLinkConfig = getMaxLinkConfig(); - maxLinkConfig.peakRate = DATA_RATE_8B_10B_TO_LINK_RATE(maxLinkConfig.peakRate); - maxLinkConfig.peakRatePossible = DATA_RATE_8B_10B_TO_LINK_RATE(maxLinkConfig.peakRatePossible); - - while((retries < WAR_MAX_REASSESS_ATTEMPT) && (highestAssessedLC != maxLinkConfig)) - { - DP_PRINTF(DP_WARNING, "DP> Assessed link is not equal to highest possible config. Reassess link."); - this->assessLink(); - maxLinkConfig = getMaxLinkConfig(); - maxLinkConfig.peakRate = DATA_RATE_8B_10B_TO_LINK_RATE(maxLinkConfig.peakRate); - maxLinkConfig.peakRatePossible = DATA_RATE_8B_10B_TO_LINK_RATE(maxLinkConfig.peakRatePossible); - retries++; - } - } - // Postpone the remote HDCPCap read for Dongles DP_ASSERT(!isLinkInD3() && "Hdcp probe at D3"); if (device.peerDevice != Dongle) @@ -1061,7 +1032,19 @@ LinkConfiguration ConnectorImpl::getActiveLinkConfig() activeLinkConfig.multistream, false, /* disablePostLTRequest */ activeLinkConfig.bEnableFEC); - return activeLinkConfig; +} + +LinkConfiguration ConnectorImpl::initMaxLinkConfig() +{ + LinkRate linkRate = dp2LinkRate_8_10Gbps; + unsigned laneCount = 4; + + return LinkConfiguration (&this->linkPolicy, + laneCount, linkRate, + this->hal->getEnhancedFraming(), + linkUseMultistream(), + false, /* disablePostLTRequest */ + this->bFECEnable); } void ConnectorImpl::beginCompoundQuery(const bool bForceEnableFEC) @@ -2586,15 +2569,14 @@ bool ConnectorImpl::isHeadShutDownNeeded(Group * target, // Group } bool bHeadShutdownNeeded = true; - LinkConfiguration lowestSelected; + LinkConfiguration lowestSelected = getMaxLinkConfig(); // Force highestLink config in SST bool bSkipLowestConfigCheck = false; bool bIsModeSupported = false; - LinkConfiguration maxLc = getMaxLinkConfig(); - maxLc.peakRate = DATA_RATE_8B_10B_TO_LINK_RATE(maxLc.peakRate); - maxLc.peakRatePossible = DATA_RATE_8B_10B_TO_LINK_RATE(maxLc.peakRatePossible); - lowestSelected = maxLc; + + lowestSelected.peakRate = DATA_RATE_8B_10B_TO_LINK_RATE(lowestSelected.peakRate); + lowestSelected.peakRatePossible = DATA_RATE_8B_10B_TO_LINK_RATE(lowestSelected.peakRatePossible); GroupImpl* targetImpl = (GroupImpl*)target; // Certain panels only work when link train to highest linkConfig in SST mode. @@ -4106,7 +4088,9 @@ bool ConnectorImpl::allocateMaxDpTunnelBw() void ConnectorImpl::assessLink(LinkTrainingType trainType) { this->bSkipLt = false; // Assesslink should never skip LT, so let's reset it in case it was set. - bool bLinkStateToggle = false; + bool bLinkStateToggle = false; + NvU32 retryCount = 0; + LinkConfiguration _maxLinkConfig = getMaxLinkConfig(); _maxLinkConfig.peakRate = DATA_RATE_8B_10B_TO_LINK_RATE(_maxLinkConfig.peakRate); _maxLinkConfig.peakRatePossible = DATA_RATE_8B_10B_TO_LINK_RATE(_maxLinkConfig.peakRatePossible); @@ -4307,14 +4291,18 @@ void ConnectorImpl::assessLink(LinkTrainingType trainType) { goto done; } - - // - // if dpcd is offline; avoid assessing. Just consider max. - // keep lowering lane/rate config till train succeeds - // - hal->updateDPCDOffline(); - if (!hal->isDpcdOffline()) + do { + // + // if dpcd is offline; avoid assessing. Just consider max. + // keep lowering lane/rate config till train succeeds + // + hal->updateDPCDOffline(); + if (hal->isDpcdOffline()) + { + lConfig = _maxLinkConfig; + break; + } if (!train(lConfig, false /* do not force LT */)) { // @@ -4323,20 +4311,37 @@ void ConnectorImpl::assessLink(LinkTrainingType trainType) // lConfig = activeLinkConfig; } - - if (!this->linkUseMultistream() && this->policyAssessLinkSafely) + if (lConfig == _maxLinkConfig || lConfig.lanes == 0) { - GroupImpl * groupAttached = this->getActiveGroupForSST(); + break; + } + timer->sleep(40); + } while (retryCount++ < WAR_MAX_REASSESS_ATTEMPT); - if (groupAttached && groupAttached->isHeadAttached() && - !willLinkSupportModeSST(lConfig, groupAttached->lastModesetInfo)) - { - DP_ASSERT(0 && "DP> Maximum assessed link configuration is not capable to driver existing raster!"); + if (lConfig != _maxLinkConfig) + { + if (lConfig.lanes == 0) + { + DP_PRINTF(DP_NOTICE, "DP> assessLink(): Device unplugged or offline."); + } + else + { + DP_PRINTF(DP_WARNING, + "DP> assessLink(): Failed to reach max link configuration (%d x %d).", + lConfig.lanes, lConfig.peakRate); + } + } - train(preFlushModeActiveLinkConfig, true); - linkGuessed = true; - goto done; - } + if (!hal->isDpcdOffline() && !this->linkUseMultistream() && this->policyAssessLinkSafely) + { + GroupImpl * groupAttached = this->getActiveGroupForSST(); + if (groupAttached && groupAttached->isHeadAttached() && + !willLinkSupportModeSST(lConfig, groupAttached->lastModesetInfo)) + { + DP_ASSERT(0 && "DP> Maximum assessed link configuration is not capable driving existing raster!"); + train(preFlushModeActiveLinkConfig, true); + linkGuessed = true; + goto done; } } @@ -4732,7 +4737,7 @@ bool ConnectorImpl::isNoActiveStreamAndPowerdown() (!bIsDiscoveryDetectActive) && (pendingRemoteHdcpDetections == 0) && (!main->isInternalPanelDynamicMuxCapable()) - ) + ) { powerdownLink(); @@ -5917,8 +5922,7 @@ void ConnectorImpl::beforeDeleteStream(GroupImpl * group, bool forFlushMode) } } - if (linkUseMultistream() && group && group->isHeadAttached() && - (group->timeslot.count || (this->bFlushTimeslotWhenDirty && group->timeslot.hardwareDirty))) + if (linkUseMultistream() && group && group->isHeadAttached() && (group->timeslot.count || group->timeslot.hardwareDirty)) { // Detach all the panels from payload for (Device * d = group->enumDevices(0); d; d = group->enumDevices(d)) @@ -6346,7 +6350,7 @@ void ConnectorImpl::notifyLongPulse(bool statusConnected) if (previousPlugged && statusConnected) { if (main->isInternalPanelDynamicMuxCapable() - ) + ) { return; } @@ -6799,22 +6803,6 @@ void ConnectorImpl::notifyLongPulseInternal(bool statusConnected) hal->setPowerState(PowerStateD0); } this->assessLink(); - - if (this->bReassessMaxLink) - { - // - // If the highest assessed LC is not equal to - // max possible link config, re-assess link - // - NvU8 retries = 0U; - - while((retries < WAR_MAX_REASSESS_ATTEMPT) && (highestAssessedLC != maxLinkConfig)) - { - DP_PRINTF(DP_WARNING, "DP> Assessed link is not equal to highest possible config. Reassess link."); - this->assessLink(); - retries++; - } - } } if (hal->getLegacyPortCount() != 0) @@ -7125,7 +7113,6 @@ void ConnectorImpl::notifyShortPulse() } } } - else if (hal->getPendingTestRequestPhyCompliance()) { hal->setTestResponse(handlePhyPatternRequest()); @@ -7462,8 +7449,10 @@ void ConnectorImpl::createFakeMuxDevice(const NvU8 *buffer, NvU32 bufferSize) // Initialize DSC state newDev->dscCaps.bDSCSupported = true; newDev->dscCaps.bDSCDecompressionSupported = true; - newDev->parseDscCaps(buffer, bufferSize); - dpMemCopy(newDev->rawDscCaps, buffer, DP_MIN(bufferSize, 16)); + if (!(newDev->setRawDscCaps(buffer, DP_MIN(bufferSize, DSC_CAPS_SIZE)))) + { + DP_ASSERT(0 && "Faking DSC caps failed!"); + } newDev->bDSCPossible = true; newDev->devDoingDscDecompression = newDev; @@ -7802,7 +7791,7 @@ bool ConnectorImpl::handlePhyPatternRequest() if (pattern_info.lqsPattern == LINK_QUAL_80BIT_CUST) { - hal->getCustomTestPattern((NvU8 *)&pattern_info.ctsmLower); + hal->get80BitsCustomTestPattern((NvU8 *)&pattern_info.ctsmLower); } // send control call to rm for the pattern diff --git a/src/common/displayport/src/dp_deviceimpl.cpp b/src/common/displayport/src/dp_deviceimpl.cpp index 3c7a4cc283..a1b82c873d 100644 --- a/src/common/displayport/src/dp_deviceimpl.cpp +++ b/src/common/displayport/src/dp_deviceimpl.cpp @@ -473,6 +473,15 @@ bool DeviceImpl::getRawDscCaps(NvU8 *buffer, NvU32 bufferSize) return true; } +bool DeviceImpl::setRawDscCaps(const NvU8 *buffer, NvU32 bufferSize) +{ + if (bufferSize < sizeof(rawDscCaps)) + return false; + + dpMemCopy(&rawDscCaps, buffer, sizeof(rawDscCaps)); + return parseDscCaps(&rawDscCaps[0], sizeof(rawDscCaps)); +} + AuxBus::status DeviceImpl::transaction(Action action, Type type, int address, NvU8 * buffer, unsigned sizeRequested, unsigned * sizeCompleted, diff --git a/src/common/displayport/src/dp_evoadapter.cpp b/src/common/displayport/src/dp_evoadapter.cpp index fd778a40d5..63c1965f79 100644 --- a/src/common/displayport/src/dp_evoadapter.cpp +++ b/src/common/displayport/src/dp_evoadapter.cpp @@ -93,9 +93,7 @@ const struct {NV_DP_REGKEY_FORCE_EDP_ILR, &dpRegkeyDatabase.bBypassEDPRevCheck, DP_REG_VAL_BOOL}, {NV_DP_DSC_MST_CAP_BUG_3143315, &dpRegkeyDatabase.bDscMstCapBug3143315, DP_REG_VAL_BOOL}, {NV_DP_REGKEY_POWER_DOWN_PHY, &dpRegkeyDatabase.bPowerDownPhyBeforeD3, DP_REG_VAL_BOOL}, - {NV_DP_REGKEY_REASSESS_MAX_LINK, &dpRegkeyDatabase.bReassessMaxLink, DP_REG_VAL_BOOL}, {NV_DP_REGKEY_MST_PCON_CAPS_READ_DISABLED, &dpRegkeyDatabase.bMSTPCONCapsReadDisabled, DP_REG_VAL_BOOL}, - {NV_DP_REGKEY_FLUSH_TIMESLOT_INFO_WHEN_DIRTY, &dpRegkeyDatabase.bFlushTimeslotWhenDirty, DP_REG_VAL_BOOL}, {NV_DP_REGKEY_DISABLE_TUNNEL_BW_ALLOCATION, &dpRegkeyDatabase.bForceDisableTunnelBwAllocation, DP_REG_VAL_BOOL} }; @@ -319,10 +317,14 @@ void EvoMainLink::triggerACT() params.subDeviceInstance = this->subdeviceIndex; params.displayId = this->displayId; - provider->rmControl0073(NV0073_CTRL_CMD_DP_SEND_ACT, ¶ms, sizeof params); + NvU32 ret = provider->rmControl0073(NV0073_CTRL_CMD_DP_SEND_ACT, ¶ms, sizeof params); + if (ret != NVOS_STATUS_SUCCESS) + { + DP_PRINTF(DP_ERROR, "triggerACT failed!"); + } } -void EvoMainLink::configureHDCPRenegotiate(NvU64 cN, NvU64 cKSV, bool bForceReAuth, bool bRxIDMsgPending){} +void EvoMainLink::configureHDCPRenegotiate(NvU64 cN, NvU64 cKSV, bool bForceReAuth, bool bRxIDMsgPending) {} void EvoMainLink::configureHDCPGetHDCPState(HDCPState &hdcpState) { // HDCP Not Supported @@ -372,7 +374,11 @@ void EvoMainLink::configureSingleStream(NvU32 head, params.SST.waterMark = waterMark; params.SST.bEnableAudioOverRightPanel = bAudioOverRightPanel; - provider->rmControl0073(NV0073_CTRL_CMD_DP_CONFIG_STREAM, ¶ms, sizeof params); + NvU32 ret = provider->rmControl0073(NV0073_CTRL_CMD_DP_CONFIG_STREAM, ¶ms, sizeof params); + if (ret != NVOS_STATUS_SUCCESS) + { + DP_PRINTF(DP_ERROR, "configureSingleStream failed!"); + } } void EvoMainLink::configureSingleHeadMultiStreamMode(NvU32 displayIDs[], @@ -393,9 +399,12 @@ void EvoMainLink::configureSingleHeadMultiStreamMode(NvU32 displayIDs[], params.numStreams = numStreams; params.vbiosPrimaryDispIdIndex = vbiosPrimaryDispIdIndex; - provider->rmControl0073(NV0073_CTRL_CMD_DP_CONFIG_SINGLE_HEAD_MULTI_STREAM, - ¶ms, - sizeof params); + NvU32 ret = provider->rmControl0073(NV0073_CTRL_CMD_DP_CONFIG_SINGLE_HEAD_MULTI_STREAM, + ¶ms, sizeof params); + if (ret != NVOS_STATUS_SUCCESS) + { + DP_PRINTF(DP_ERROR, "configureSingleHeadMultiStreamMode failed!"); + } } void EvoMainLink::configureMultiStream(NvU32 head, @@ -431,7 +440,11 @@ void EvoMainLink::configureMultiStream(NvU32 head, params.MST.singleHeadMSTPipeline = streamIdentifier; params.MST.bEnableAudioOverRightPanel = bAudioOverRightPanel; - provider->rmControl0073(NV0073_CTRL_CMD_DP_CONFIG_STREAM, ¶ms, sizeof params); + NvU32 ret = provider->rmControl0073(NV0073_CTRL_CMD_DP_CONFIG_STREAM, ¶ms, sizeof params); + if (ret != NVOS_STATUS_SUCCESS) + { + DP_PRINTF(DP_ERROR, "configureMultiStream failed!"); + } } void EvoMainLink::configureMsScratchRegisters(NvU32 address, @@ -447,7 +460,11 @@ void EvoMainLink::configureMsScratchRegisters(NvU32 address, params.hopCount = hopCount; params.dpMsDevAddrState = dpMsDevAddrState; - provider->rmControl0073(NV0073_CTRL_CMD_DP_CONFIG_RAD_SCRATCH_REG, ¶ms, sizeof params); + NvU32 ret = provider->rmControl0073(NV0073_CTRL_CMD_DP_CONFIG_RAD_SCRATCH_REG, ¶ms, sizeof params); + if (ret != NVOS_STATUS_SUCCESS) + { + DP_PRINTF(DP_ERROR, "configureMsScratchRegisters failed!"); + } } // @@ -490,7 +507,8 @@ bool EvoMainLink::setDpStereoMSAParameters(bool bStereoEnable, const NV0073_CTRL // implement this rmcontrol. To avoid that, this class would need to be // aware of which evo display HAL is in use. // - if (ret != NVOS_STATUS_SUCCESS && ret != NVOS_STATUS_ERROR_NOT_SUPPORTED) { + if (ret != NVOS_STATUS_SUCCESS && ret != NVOS_STATUS_ERROR_NOT_SUPPORTED) + { DP_ASSERT(!"Enabling MSA stereo override failed!"); return false; } @@ -1583,8 +1601,11 @@ bool EvoMainLink::controlRateGoverning(NvU32 head, bool enable, bool updateNow) params.flags |= DRF_DEF(0073_CTRL, _CMD_DP_SET_RATE_GOV_FLAGS, _TRIGGER_MODE, _LOADV); } - provider->rmControl0073(NV0073_CTRL_CMD_DP_SET_RATE_GOV, ¶ms, sizeof params); - + NvU32 ret = provider->rmControl0073(NV0073_CTRL_CMD_DP_SET_RATE_GOV, ¶ms, sizeof params); + if (ret != NVOS_STATUS_SUCCESS) + { + DP_PRINTF(DP_ERROR, "controlRateGoverning(): Set RateGov failed!"); + } return true; } @@ -1712,7 +1733,11 @@ void EvoMainLink::configureTriggerSelect(NvU32 head, DP_SINGLE_HEAD_MULTI_STREAM params.subDeviceInstance = subdeviceIndex; params.sorIndex = provider->getSorIndex(); params.singleHeadMSTPipeline = streamIdentifier; - provider->rmControl0073(NV0073_CTRL_CMD_DP_SET_TRIGGER_SELECT, ¶ms, sizeof params); + NvU32 ret = provider->rmControl0073(NV0073_CTRL_CMD_DP_SET_TRIGGER_SELECT, ¶ms, sizeof params); + if (ret != NVOS_STATUS_SUCCESS) + { + DP_PRINTF(DP_ERROR, "configureTriggerSelect(): Set Trigger Select failed!"); + } } void EvoMainLink::configureTriggerAll(NvU32 head, bool enable) @@ -1721,7 +1746,11 @@ void EvoMainLink::configureTriggerAll(NvU32 head, bool enable) params.head = head; params.subDeviceInstance = subdeviceIndex; params.enable = enable; - provider->rmControl0073(NV0073_CTRL_CMD_DP_SET_TRIGGER_ALL, ¶ms, sizeof params); + NvU32 ret = provider->rmControl0073(NV0073_CTRL_CMD_DP_SET_TRIGGER_ALL, ¶ms, sizeof params); + if (ret != NVOS_STATUS_SUCCESS) + { + DP_PRINTF(DP_ERROR, "configureTriggerAll(): Set Trigger All failed!"); + } } MainLink * DisplayPort::MakeEvoMainLink(EvoInterface * provider, Timer * timer) @@ -1806,9 +1835,7 @@ bool EvoMainLink::configureLinkRateTable } } - NvU32 code = provider->rmControl0073( - NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES, - ¶ms, sizeof(params)); + NvU32 code = provider->rmControl0073(NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES, ¶ms, sizeof(params)); if ((pLinkRates != NULL ) && (code == NVOS_STATUS_SUCCESS) && (params.linkBwCount <= NV0073_CTRL_DP_MAX_INDEXED_LINK_RATES)) @@ -1860,9 +1887,7 @@ bool EvoMainLink::configureFec params.displayId = displayId; params.bEnableFec = bEnableFec; - NvU32 code = provider->rmControl0073( - NV0073_CTRL_CMD_DP_CONFIGURE_FEC, - ¶ms, sizeof(params)); + NvU32 code = provider->rmControl0073(NV0073_CTRL_CMD_DP_CONFIGURE_FEC, ¶ms, sizeof(params)); if (code == NVOS_STATUS_SUCCESS) { diff --git a/src/common/displayport/src/dp_linkconfig.cpp b/src/common/displayport/src/dp_linkconfig.cpp new file mode 100644 index 0000000000..6f780faff6 --- /dev/null +++ b/src/common/displayport/src/dp_linkconfig.cpp @@ -0,0 +1,97 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/******************************* DisplayPort********************************\ +* * +* Module: dp_linkconfig.cpp * +* DP LinkConfiguration implementation * +* * +\***************************************************************************/ + + +#include "dp_linkconfig.h" +#include "dp_regkeydatabase.h" + +using namespace DisplayPort; +bool LinkConfiguration::lowerConfig(bool bReduceLaneCnt) +{ + // + // TODO: bReduceLaneCnt is set to fallback to 4 lanes with lower + // valid link rate. But we should reset to max lane count + // sink supports instead. + // + + LinkRate lowerRate = policy.getLinkRates()->getLowerRate(peakRate); + + if(bReduceLaneCnt) + { + // Reduce laneCount before reducing linkRate + if(lanes == laneCount_1) + { + if (lowerRate) + { + lanes = laneCount_4; + peakRate = lowerRate; + } + else + { + lanes = laneCount_0; + } + } + else + { + lanes /= 2; + } + } + else + { + // Reduce the link rate instead of lane count + if (lowerRate) + { + peakRate = lowerRate; + } + else + { + lanes /= 2; + } + } + + minRate = linkOverhead(peakRate); + return lanes != laneCount_0; +} + +LinkConfiguration::LinkConfiguration(LinkPolicy * p, unsigned lanes, LinkRate peakRate, + bool enhancedFraming, bool MST, bool disablePostLTRequest, + bool bEnableFEC, bool bDisableLTTPR) + : lanes(lanes), peakRatePossible(peakRate), peakRate(peakRate), enhancedFraming(enhancedFraming), + multistream(MST), disablePostLTRequest(disablePostLTRequest), bEnableFEC(bEnableFEC), + bDisableLTTPR(bDisableLTTPR), linkTrainCounter(0) +{ + // downrate for spread and FEC + minRate = linkOverhead(peakRate); + if (p) + { + policy = *p; + } +} + diff --git a/src/common/displayport/src/dp_messages.cpp b/src/common/displayport/src/dp_messages.cpp index 730626b166..aed50a5974 100644 --- a/src/common/displayport/src/dp_messages.cpp +++ b/src/common/displayport/src/dp_messages.cpp @@ -71,6 +71,7 @@ bool MessageManager::send(MessageManager::Message * message, NakData & nakData) NvU64 startTime, elapsedTime; message->bBusyWaiting = true; + message->setMessagePriority(NV_DP_SBMSG_PRIORITY_LEVEL_1); post(message, &completion); startTime = timer->getTimeUs(); do diff --git a/src/common/displayport/src/dp_wardatabase.cpp b/src/common/displayport/src/dp_wardatabase.cpp index d05dfd5f08..93dc689183 100644 --- a/src/common/displayport/src/dp_wardatabase.cpp +++ b/src/common/displayport/src/dp_wardatabase.cpp @@ -498,15 +498,6 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen } break; - // Dell - case 0xAC10: - // Dell U2713H has problem with LQA. Disable it. - if ((ProductID == 0xA092) || (ProductID == 0xF046)) - { - this->WARFlags.reassessMaxLink = true; - } - break; - // CMN case 0xAE0D: if (ProductID == 0x1747) diff --git a/src/common/inc/displayport/displayport.h b/src/common/inc/displayport/displayport.h index e48f26a005..856dd9c4dc 100644 --- a/src/common/inc/displayport/displayport.h +++ b/src/common/inc/displayport/displayport.h @@ -144,6 +144,30 @@ typedef enum dp2LinkRate_Supported } DP2X_LINKRATE_10M; +typedef enum +{ + // Uses 8b/10b channel encoding + // Link Data Rate = link rate * (8 / 10) / 8 + // = link rate * 0.1 + dataRate_1_62Gbps = 162000000, + dataRate_2_16Gbps = 216000000, + dataRate_2_43Gbps = 243000000, + dataRate_2_70Gbps = 270000000, + dataRate_3_24Gbps = 324000000, + dataRate_4_32Gbps = 432000000, + dataRate_5_40Gbps = 540000000, + dataRate_8_10Gbps = 810000000 +} DP_LINK_8B_10B_DATA_RATES; + +#define IS_8B_10B_CODING(dataRate) (((NvU64)(val)== dataRate_1_62Gbps) || \ + ((NvU64)(val)== dataRate_2_16Gbps) || \ + ((NvU64)(val)== dataRate_2_43Gbps) || \ + ((NvU64)(val)== dataRate_2_70Gbps) || \ + ((NvU64)(val)== dataRate_3_24Gbps) || \ + ((NvU64)(val)== dataRate_4_32Gbps) || \ + ((NvU64)(val)== dataRate_5_40Gbps) || \ + ((NvU64)(val)== dataRate_8_10Gbps)) + typedef enum { linkSpeedId_1_62Gbps = 0x00, @@ -190,7 +214,7 @@ typedef enum trainingPattern_1 = 0x1, trainingPattern_2 = 0x2, trainingPattern_3 = 0x3, - trainingPattern_4 = 0xB, + trainingPattern_4 = 0xB } DP_TRAININGPATTERN; typedef enum @@ -655,8 +679,9 @@ typedef struct // // Phy Repeater count read from DPCD offset F0002h is an // 8 bit value where each bit represents the total count -// 80h = 1 repeater, 40h = 2 , 20h = 3 ... 01h = 8 +// 80h = 1 repeater, 40h = 2 , 20h = 3 ... 04h = 6 // This function maps it to decimal system +// Note: From DP2.x max count of LTTPR is set to 6. // static NV_INLINE NvU32 mapPhyRepeaterVal(NvU32 value) { @@ -676,10 +701,6 @@ static NV_INLINE NvU32 mapPhyRepeaterVal(NvU32 value) return 5; case NV_DPCD14_PHY_REPEATER_CNT_VAL_6: return 6; - case NV_DPCD14_PHY_REPEATER_CNT_VAL_7: - return 7; - case NV_DPCD14_PHY_REPEATER_CNT_VAL_8: - return 8; default: return 0; } diff --git a/src/common/inc/displayport/dpcd.h b/src/common/inc/displayport/dpcd.h index da563fb949..5506d5997b 100644 --- a/src/common/inc/displayport/dpcd.h +++ b/src/common/inc/displayport/dpcd.h @@ -1088,9 +1088,9 @@ number of Downstream ports will be limited to 32. #define NV_DPCD_EDP_DISPLAY_CTL_OVERDRIVE_CTL_AUTONOMOUS_1 (0x00000001) /* RWXUV */ #define NV_DPCD_EDP_DISPLAY_CTL_OVERDRIVE_CTL_DISABLE (0x00000002) /* RWXUV */ #define NV_DPCD_EDP_DISPLAY_CTL_OVERDRIVE_CTL_ENABLE (0x00000003) /* RWXUV */ -#define NV_DPCD_EDP_DISPLAY_CTL_VARIABLE_BKLGHT_CTRL 6:6 /* RWXUF */ -#define NV_DPCD_EDP_DISPLAY_CTL_VARIABLE_BKLGHT_CTRL_ENABLED (0x00000001) /* RWXUV */ -#define NV_DPCD_EDP_DISPLAY_CTL_VARIABLE_BKLGHT_CTRL_DISABLED (0x00000000) /* RWXUV */ +#define NV_DPCD_EDP_DISPLAY_CTL_VARIABLE_BKLGHT_CTRL_DISABLE 6:6 /* RWXUF */ +#define NV_DPCD_EDP_DISPLAY_CTL_VARIABLE_BKLGHT_CTRL_DISABLE_YES (0x00000001) /* RWXUV */ +#define NV_DPCD_EDP_DISPLAY_CTL_VARIABLE_BKLGHT_CTRL_DISABLE_NO (0x00000000) /* RWXUV */ #define NV_DPCD_EDP_DISPLAY_CTL_VBLANK_BKLGHT_UPDATE_EN 7:7 /* RWXUF */ #define NV_DPCD_EDP_DISPLAY_CTL_VBLANK_BKLGHT_UPDATE_EN_ENABLED (0x00000001) /* RWXUV */ #define NV_DPCD_EDP_DISPLAY_CTL_VBLANK_BKLGHT_UPDATE_EN_DISABLED (0x00000000) /* RWXUV */ diff --git a/src/common/inc/displayport/dpcd14.h b/src/common/inc/displayport/dpcd14.h index 7b911d8d55..9a5a766254 100644 --- a/src/common/inc/displayport/dpcd14.h +++ b/src/common/inc/displayport/dpcd14.h @@ -471,6 +471,29 @@ #define NV_DPCD14_DPRX_FEATURE_ENUM_LIST_VSC_EXT_FRAMEWORK_V1_SUPPORTED_NO (0x00000000) /* R-XUV */ #define NV_DPCD14_DPRX_FEATURE_ENUM_LIST_VSC_EXT_FRAMEWORK_V1_SUPPORTED_YES (0x00000001) /* R-XUV */ +#define NV_DPCD14_PCON_DOWNSTREAM_LINK_ERROR (0x00003030) /* R-XUR */ +#define NV_DPCD14_PCON_DOWNSTREAM_LINK_ERROR_REPORTING 0:0 /* R-XUF */ +#define NV_DPCD14_PCON_DOWNSTREAM_LINK_ERROR_REPORTING_NOT_SUPPORTED (0x00000000) /* R-XUV */ +#define NV_DPCD14_PCON_DOWNSTREAM_LINK_ERROR_REPORTING_SUPPORTED (0x00000001) /* R-XUV */ +#define NV_DPCD14_PCON_DOWNSTREAM_LINK_ERROR_TMDS_LINK_CLOCK_DATA_NOTIFICATION 7:7 /* R-XUF */ +#define NV_DPCD14_PCON_DOWNSTREAM_LINK_ERROR_TMDS_LINK_CLOCK_DATA_NOTIFICATION_NOT_SUPPORTED (0x00000000) /* R-XUV */ +#define NV_DPCD14_PCON_DOWNSTREAM_LINK_ERROR_TMDS_LINK_CLOCK_DATA_NOTIFICATION_SUPPORTED (0x00000001) /* R-XUV */ + +#define NV_DPCD14_PCON_DOWNSTREAM_HDMI_ERROR_STATUS_CH(i) (0x00003031+(i)) /* R-XUR */ +#define NV_DPCD14_PCON_DOWNSTREAM_HDMI_ERROR_STATUS_CH_THREE_ERRORS 0:0 /* R-XUF */ +#define NV_DPCD14_PCON_DOWNSTREAM_HDMI_ERROR_STATUS_CH_THREE_ERRORS_NO (0x00000000) /* R-XUV */ +#define NV_DPCD14_PCON_DOWNSTREAM_HDMI_ERROR_STATUS_CH_THREE_ERRORS_YES (0x00000001) /* R-XUV */ +#define NV_DPCD14_PCON_DOWNSTREAM_HDMI_ERROR_STATUS_CH_TEN_ERRORS 1:1 /* R-XUF */ +#define NV_DPCD14_PCON_DOWNSTREAM_HDMI_ERROR_STATUS_CH_TEN_ERRORS_NO (0x00000000) /* R-XUV */ +#define NV_DPCD14_PCON_DOWNSTREAM_HDMI_ERROR_STATUS_CH_TEN_ERRORS_YES (0x00000001) /* R-XUV */ +#define NV_DPCD14_PCON_DOWNSTREAM_HDMI_ERROR_STATUS_CH_HUNDRED_ERRORS 2:2 /* R-XUF */ +#define NV_DPCD14_PCON_DOWNSTREAM_HDMI_ERROR_STATUS_CH_HUNDRED_ERRORS_NO (0x00000000) /* R-XUV */ +#define NV_DPCD14_PCON_DOWNSTREAM_HDMI_ERROR_STATUS_CH_HUNDRED_ERRORS_YES (0x00000001) /* R-XUV */ +#define NV_DPCD14_PCON_DOWNSTREAM_HDMI_ERROR_STATUS_CH_CLOCK_DATA_STATUS 5:4 /* R-XUF */ +#define NV_DPCD14_PCON_DOWNSTREAM_HDMI_ERROR_STATUS_CH_CLOCK_DATA_STATUS_BOTH_LOCKED (0x00000000) /* R-XUV */ +#define NV_DPCD14_PCON_DOWNSTREAM_HDMI_ERROR_STATUS_CH_CLOCK_DATA_STATUS_CLOCK_LOCKED (0x00000001) /* R-XUV */ +#define NV_DPCD14_PCON_DOWNSTREAM_HDMI_ERROR_STATUS_CH_CLOCK_DATA_STATUS_NONE_LOCKED (0x00000002) /* R-XUV */ + #define NV_DPCD14_PCON_HDMI_LINK_CONFIG_STATUS (0x00003036) /* R-XUR */ #define NV_DPCD14_PCON_HDMI_LINK_CONFIG_STATUS_MODE 0:0 /* R-XUF */ #define NV_DPCD14_PCON_HDMI_LINK_CONFIG_STATUS_MODE_TMDS (0x00000000) /* R-XUV */ @@ -618,7 +641,7 @@ #define NV_DPCD14_PHY_REPEATER_CNT_VAL_6 (0x00000004) /* R-XUV */ #define NV_DPCD14_PHY_REPEATER_CNT_VAL_7 (0x00000002) /* R-XUV */ #define NV_DPCD14_PHY_REPEATER_CNT_VAL_8 (0x00000001) /* R-XUV */ -#define NV_DPCD14_PHY_REPEATER_CNT_MAX 8 +#define NV_DPCD14_PHY_REPEATER_CNT_MAX 6 #define NV_DPCD14_PHY_REPEATER_MODE (0x000F0003) /* R-XUR */ #define NV_DPCD14_PHY_REPEATER_MODE_VAL_TRANSPARENT (0x00000055) /* R-XUV */ diff --git a/src/common/inc/nvBldVer.h b/src/common/inc/nvBldVer.h index 917915c079..be4a88efc5 100644 --- a/src/common/inc/nvBldVer.h +++ b/src/common/inc/nvBldVer.h @@ -36,26 +36,26 @@ // and then checked back in. You cannot make changes to these sections without // corresponding changes to the buildmeister script #ifndef NV_BUILD_BRANCH - #define NV_BUILD_BRANCH r560_88 + #define NV_BUILD_BRANCH r565_97 #endif #ifndef NV_PUBLIC_BRANCH - #define NV_PUBLIC_BRANCH r560_88 + #define NV_PUBLIC_BRANCH r565_97 #endif #if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS) -#define NV_BUILD_BRANCH_VERSION "rel/gpu_drv/r560/r560_88-137" -#define NV_BUILD_CHANGELIST_NUM (34725486) +#define NV_BUILD_BRANCH_VERSION "rel/gpu_drv/r565/r565_97-152" +#define NV_BUILD_CHANGELIST_NUM (34971420) #define NV_BUILD_TYPE "Official" -#define NV_BUILD_NAME "rel/gpu_drv/r560/r560_88-137" -#define NV_LAST_OFFICIAL_CHANGELIST_NUM (34725486) +#define NV_BUILD_NAME "rel/gpu_drv/r565/r565_97-152" +#define NV_LAST_OFFICIAL_CHANGELIST_NUM (34971420) #else /* Windows builds */ -#define NV_BUILD_BRANCH_VERSION "r560_88-4" -#define NV_BUILD_CHANGELIST_NUM (34711266) +#define NV_BUILD_BRANCH_VERSION "r565_97-1" +#define NV_BUILD_CHANGELIST_NUM (34971420) #define NV_BUILD_TYPE "Official" -#define NV_BUILD_NAME "560.94" -#define NV_LAST_OFFICIAL_CHANGELIST_NUM (34711266) -#define NV_BUILD_BRANCH_BASE_VERSION R560 +#define NV_BUILD_NAME "565.98" +#define NV_LAST_OFFICIAL_CHANGELIST_NUM (34971420) +#define NV_BUILD_BRANCH_BASE_VERSION R565 #endif // End buildmeister python edited section diff --git a/src/common/inc/nvPNPVendorIds.h b/src/common/inc/nvPNPVendorIds.h index 4121a85078..ca93cb7af2 100644 --- a/src/common/inc/nvPNPVendorIds.h +++ b/src/common/inc/nvPNPVendorIds.h @@ -253,6 +253,7 @@ static const PNPVendorId PNPVendorIds[] = { "HEC", _VENDOR_NAME_ENTRY("Hisense") }, { "HEI", _VENDOR_NAME_ENTRY("Hyundai") }, { "HIT", _VENDOR_NAME_ENTRY("Hitachi/HINT") }, + { "HKC", _VENDOR_NAME_ENTRY("HKC Overseas Ltd.") }, { "HMX", _VENDOR_NAME_ENTRY("HUMAX Co., Ltd.") }, { "HPN", _VENDOR_NAME_ENTRY("HP Inc.") }, { "HSD", _VENDOR_NAME_ENTRY("HannStar Display Corp") }, diff --git a/src/common/inc/nvUnixVersion.h b/src/common/inc/nvUnixVersion.h index 812276775f..fb0776ebf0 100644 --- a/src/common/inc/nvUnixVersion.h +++ b/src/common/inc/nvUnixVersion.h @@ -4,7 +4,7 @@ #if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS) || defined(NV_VMWARE) || defined(NV_QNX) || defined(NV_INTEGRITY) || \ (defined(RMCFG_FEATURE_PLATFORM_GSP) && RMCFG_FEATURE_PLATFORM_GSP == 1) -#define NV_VERSION_STRING "560.35.03" +#define NV_VERSION_STRING "565.57.01" #else diff --git a/src/common/inc/nvlog_defs.h b/src/common/inc/nvlog_defs.h index 142a40b85f..a38eca9d11 100644 --- a/src/common/inc/nvlog_defs.h +++ b/src/common/inc/nvlog_defs.h @@ -453,7 +453,7 @@ typedef enum _NVLOG_ARGTYPE )) | \ DRF_DEF(_REG_STR_RM, _NVLOG, _BUFFER_SIZE, _DEFAULT) | \ DRF_NUM(_REG_STR_RM, _NVLOG, _RUNTIME_LEVEL, 0) | \ - DRF_DEF(_REG_STR_RM, _NVLOG, _TIMESTAMP, _32) | \ + DRF_DEF(_REG_STR_RM, _NVLOG, _TIMESTAMP, _64) | \ DRF_DEF(_REG_STR_RM, _NVLOG, _INITED, _YES) \ ) #endif // NVLOG_DEFAULT_FLAGS diff --git a/src/common/inc/swref/published/ampere/ga100/dev_bus_addendum.h b/src/common/inc/swref/published/ampere/ga100/dev_bus_addendum.h index 15244b9ca3..56881c281b 100644 --- a/src/common/inc/swref/published/ampere/ga100/dev_bus_addendum.h +++ b/src/common/inc/swref/published/ampere/ga100/dev_bus_addendum.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES + * SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -24,8 +24,16 @@ #ifndef ga100_dev_nv_bus_addendum_h #define ga100_dev_nv_bus_addendum_h -#define NV_PBUS_SW_SCRATCH1_SMC_MODE 15:15 -#define NV_PBUS_SW_SCRATCH1_SMC_MODE_OFF 0x00000000 -#define NV_PBUS_SW_SCRATCH1_SMC_MODE_ON 0x00000001 +#define NV_PBUS_SW_SCRATCH1_SMC_MODE 15:15 +#define NV_PBUS_SW_SCRATCH1_SMC_MODE_OFF 0x00000000 +#define NV_PBUS_SW_SCRATCH1_SMC_MODE_ON 0x00000001 + +// +// This bit is set by RM to indicate that a GPU reset is recommended after +// work is drained +// +#define NV_PBUS_SW_SCRATCH30_GPU_DRAIN_AND_RESET_RECOMMENDED 1:1 +#define NV_PBUS_SW_SCRATCH30_GPU_DRAIN_AND_RESET_RECOMMENDED_NO 0x00000000 +#define NV_PBUS_SW_SCRATCH30_GPU_DRAIN_AND_RESET_RECOMMENDED_YES 0x00000001 #endif // ga100_dev_nv_bus_addendum_h diff --git a/src/common/inc/swref/published/ampere/ga100/dev_top.h b/src/common/inc/swref/published/ampere/ga100/dev_top.h index f4bc632465..44f372237e 100644 --- a/src/common/inc/swref/published/ampere/ga100/dev_top.h +++ b/src/common/inc/swref/published/ampere/ga100/dev_top.h @@ -31,4 +31,6 @@ #define NV_PTOP_DEVICE_INFO_CFG_MAX_ROWS_PER_DEVICE 19:16 /* C--UF */ #define NV_PTOP_DEVICE_INFO_CFG_NUM_ROWS 31:20 /* C--UF */ +#define NV_PTOP_DEVICE_INFO2_DEV_TYPE_ENUM_LCE 19 /* */ + #endif // __ga100_dev_top_h__ diff --git a/src/common/inc/swref/published/ampere/ga102/dev_riscv_pri.h b/src/common/inc/swref/published/ampere/ga102/dev_riscv_pri.h index b6c41f08e8..8d629f22ad 100644 --- a/src/common/inc/swref/published/ampere/ga102/dev_riscv_pri.h +++ b/src/common/inc/swref/published/ampere/ga102/dev_riscv_pri.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES + * SPDX-FileCopyrightText: Copyright (c) 2003-2024 NVIDIA CORPORATION & AFFILIATES * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -30,6 +30,7 @@ #define NV_PRISCV_RISCV_CPUCTL 0x00000388 /* RWI4R */ #define NV_PRISCV_RISCV_CPUCTL_ACTIVE_STAT 7:7 /* R-IVF */ #define NV_PRISCV_RISCV_CPUCTL_ACTIVE_STAT_ACTIVE 0x00000001 /* R---V */ +#define NV_PRISCV_RISCV_CPUCTL_HALTED 4:4 /* R-IVF */ #define NV_PRISCV_RISCV_BCR_CTRL 0x00000668 /* RWI4R */ #define NV_PRISCV_RISCV_BCR_CTRL_VALID 0:0 /* R-IVF */ #define NV_PRISCV_RISCV_BCR_CTRL_VALID_TRUE 0x00000001 /* R---V */ diff --git a/src/common/inc/swref/published/blackwell/gb100/dev_falcon_v4.h b/src/common/inc/swref/published/blackwell/gb100/dev_falcon_v4.h new file mode 100644 index 0000000000..dcaad9e88b --- /dev/null +++ b/src/common/inc/swref/published/blackwell/gb100/dev_falcon_v4.h @@ -0,0 +1,31 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gb100_dev_falcon_v4_h__ +#define __gb100_dev_falcon_v4_h__ + +#define NV_PFALCON_FALCON_IRQSTAT_EXT_EXTIRQ7 14:14 /* R-IVF */ +#define NV_PFALCON_FALCON_IRQSTAT_EXT_EXTIRQ7_TRUE 0x00000001 /* R---V */ +#define NV_PFALCON_FALCON_IRQSTAT_EXT_EXTIRQ7_FALSE 0x00000000 /* R-I-V */ + +#endif // __gb100_dev_falcon_v4_h__ diff --git a/src/common/inc/swref/published/blackwell/gb100/dev_gsp.h b/src/common/inc/swref/published/blackwell/gb100/dev_gsp.h index 716019679c..a04957c698 100644 --- a/src/common/inc/swref/published/blackwell/gb100/dev_gsp.h +++ b/src/common/inc/swref/published/blackwell/gb100/dev_gsp.h @@ -64,4 +64,123 @@ #define NV_PGSP_FALCON_RESET_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_ENABLE 0x00000001 /* */ #define NV_PGSP_FALCON_RESET_PRIV_LEVEL_MASK_WRITE_PROTECTION_LEVEL0_DISABLE 0x00000000 /* */ +#define NV_PGSP_FALCON_IRQSTAT 0x110008 /* R--4R */ +#define NV_PGSP_FALCON_IRQSTAT_FATAL_ERROR 24:24 /* */ +#define NV_PGSP_FALCON_IRQSTAT_FATAL_ERROR_TRUE 1 /* */ +#define NV_PGSP_FALCON_IRQSTAT_FATAL_ERROR_FALSE 0 /* */ + +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT 0x111700 /* R--4R */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_GLOBAL_MEM 0:0 /* R-IVF */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_GLOBAL_MEM_FAULTED 0x00000001 /* R---V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_GLOBAL_MEM_NO_FAULT 0x00000000 /* R-I-V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_ROM 1:1 /* R-IVF */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_ROM_FAULTED 0x00000001 /* R---V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_ROM_NO_FAULT 0x00000000 /* R-I-V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_ITCM 2:2 /* R-IVF */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_ITCM_FAULTED 0x00000001 /* R---V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_ITCM_NO_FAULT 0x00000000 /* R-I-V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_DTCM 3:3 /* R-IVF */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_DTCM_FAULTED 0x00000001 /* R---V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_DTCM_NO_FAULT 0x00000000 /* R-I-V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_ICACHE 4:4 /* R-IVF */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_ICACHE_FAULTED 0x00000001 /* R---V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_ICACHE_NO_FAULT 0x00000000 /* R-I-V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_DCACHE 5:5 /* R-IVF */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_DCACHE_FAULTED 0x00000001 /* R---V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_DCACHE_NO_FAULT 0x00000000 /* R-I-V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_RVCORE 6:6 /* R-IVF */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_RVCORE_FAULTED 0x00000001 /* R---V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_RVCORE_NO_FAULT 0x00000000 /* R-I-V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_REG 7:7 /* R-IVF */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_REG_FAULTED 0x00000001 /* R---V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_REG_NO_FAULT 0x00000000 /* R-I-V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_SE_LOGIC 8:8 /* R-IVF */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_SE_LOGIC_FAULTED 0x00000001 /* R---V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_SE_LOGIC_NO_FAULT 0x00000000 /* R-I-V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_SE_KSLT 9:9 /* R-IVF */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_SE_KSLT_FAULTED 0x00000001 /* R---V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_SE_KSLT_NO_FAULT 0x00000000 /* R-I-V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_TKE 10:10 /* R-IVF */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_TKE_FAULTED 0x00000001 /* R---V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_TKE_NO_FAULT 0x00000000 /* R-I-V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_FBIF 11:11 /* R-IVF */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_FBIF_FAULTED 0x00000001 /* R---V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_FBIF_NO_FAULT 0x00000000 /* R-I-V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_MPURAM 12:12 /* R-IVF */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_MPURAM_FAULTED 0x00000001 /* R---V */ +#define NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT_MPURAM_NO_FAULT 0x00000000 /* R-I-V */ + +#define NV_PGSP_ECC_INTR_STATUS 0x00110888 /* R--4R */ +#define NV_PGSP_ECC_INTR_STATUS_CORRECTED 0:0 /* R--VF */ +#define NV_PGSP_ECC_INTR_STATUS_CORRECTED_NOT_PENDING 0x0 /* R---V */ +#define NV_PGSP_ECC_INTR_STATUS_CORRECTED_PENDING 0x1 /* R---V */ +#define NV_PGSP_ECC_INTR_STATUS_UNCORRECTED 1:1 /* R--VF */ +#define NV_PGSP_ECC_INTR_STATUS_UNCORRECTED_NOT_PENDING 0x0 /* R---V */ +#define NV_PGSP_ECC_INTR_STATUS_UNCORRECTED_PENDING 0x1 /* R---V */ + +#define NV_PGSP_FALCON_ECC_STATUS 0x00110878 /* RW-4R */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_IMEM 8:8 /* RWIVF */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_IMEM_NOT_PENDING 0x0 /* R-I-V */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_IMEM_PENDING 0x1 /* R---V */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_IMEM_CLEAR 0x1 /* -W--C */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_DMEM 9:9 /* RWIVF */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_DMEM_NOT_PENDING 0x0 /* R-I-V */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_DMEM_PENDING 0x1 /* R---V */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_DMEM_CLEAR 0x1 /* -W--C */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_MPU_RAM 10:10 /* RWIVF */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_MPU_RAM_NOT_PENDING 0x0 /* R-I-V */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_MPU_RAM_PENDING 0x1 /* R---V */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_MPU_RAM_CLEAR 0x1 /* -W--C */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_DCLS 11:11 /* RWIVF */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_DCLS_NOT_PENDING 0x0 /* R-I-V */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_DCLS_PENDING 0x1 /* R---V */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_DCLS_CLEAR 0x1 /* -W--C */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_REG 12:12 /* RWIVF */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_REG_NOT_PENDING 0x0 /* R-I-V */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_REG_PENDING 0x1 /* R---V */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_REG_CLEAR 0x1 /* -W--C */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_EMEM 13:13 /* RWIVF */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_EMEM_NOT_PENDING 0x0 /* R-I-V */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_EMEM_PENDING 0x1 /* R---V */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_EMEM_CLEAR 0x1 /* -W--C */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_ICACHE 14:14 /* RWIVF */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_ICACHE_NOT_PENDING 0x0 /* R-I-V */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_ICACHE_PENDING 0x1 /* R---V */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_ICACHE_CLEAR 0x1 /* -W--C */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_DCACHE 15:15 /* RWIVF */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_DCACHE_NOT_PENDING 0x0 /* R-I-V */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_DCACHE_PENDING 0x1 /* R---V */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_DCACHE_CLEAR 0x1 /* -W--C */ +#define NV_PGSP_FALCON_ECC_STATUS_CORRECTED_ERR_TOTAL_COUNTER_OVERFLOW 16:16 /* RWIVF */ +#define NV_PGSP_FALCON_ECC_STATUS_CORRECTED_ERR_TOTAL_COUNTER_OVERFLOW_NOT_PENDING 0x0 /* R-I-V */ +#define NV_PGSP_FALCON_ECC_STATUS_CORRECTED_ERR_TOTAL_COUNTER_OVERFLOW_PENDING 0x1 /* R---V */ +#define NV_PGSP_FALCON_ECC_STATUS_CORRECTED_ERR_TOTAL_COUNTER_OVERFLOW_CLEAR 0x1 /* -W--C */ +#define NV_PGSP_FALCON_ECC_STATUS_CORRECTED_ERR_UNIQUE_COUNTER_OVERFLOW 17:17 /* RWIVF */ +#define NV_PGSP_FALCON_ECC_STATUS_CORRECTED_ERR_UNIQUE_COUNTER_OVERFLOW_NOT_PENDING 0x0 /* R-I-V */ +#define NV_PGSP_FALCON_ECC_STATUS_CORRECTED_ERR_UNIQUE_COUNTER_OVERFLOW_PENDING 0x1 /* R---V */ +#define NV_PGSP_FALCON_ECC_STATUS_CORRECTED_ERR_UNIQUE_COUNTER_OVERFLOW_CLEAR 0x1 /* -W--C */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_TOTAL_COUNTER_OVERFLOW 18:18 /* RWIVF */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_TOTAL_COUNTER_OVERFLOW_NOT_PENDING 0x0 /* R-I-V */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_TOTAL_COUNTER_OVERFLOW_PENDING 0x1 /* R---V */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_TOTAL_COUNTER_OVERFLOW_CLEAR 0x1 /* -W--C */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_UNIQUE_COUNTER_OVERFLOW 19:19 /* RWIVF */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_UNIQUE_COUNTER_OVERFLOW_NOT_PENDING 0x0 /* R-I-V */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_UNIQUE_COUNTER_OVERFLOW_PENDING 0x1 /* R---V */ +#define NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_UNIQUE_COUNTER_OVERFLOW_CLEAR 0x1 /* -W--C */ +#define NV_PGSP_FALCON_ECC_STATUS_RESET 31:31 /* RWIVF */ +#define NV_PGSP_FALCON_ECC_STATUS_RESET_TASK 0x1 /* -W--T */ +#define NV_PGSP_FALCON_ECC_STATUS_RESET_INIT 0x0 /* R-I-V */ + +#define NV_PGSP_FALCON_ECC_CORRECTED_ERR_COUNT 0x00110880 /* RW-4R */ +#define NV_PGSP_FALCON_ECC_CORRECTED_ERR_COUNT_TOTAL 15:0 /* RWIVF */ +#define NV_PGSP_FALCON_ECC_CORRECTED_ERR_COUNT_TOTAL_INIT 0x0 /* RWI-V */ +#define NV_PGSP_FALCON_ECC_CORRECTED_ERR_COUNT_UNIQUE 31:16 /* RWIVF */ +#define NV_PGSP_FALCON_ECC_CORRECTED_ERR_COUNT_UNIQUE_INIT 0x0 /* RWI-V */ + +#define NV_PGSP_FALCON_ECC_UNCORRECTED_ERR_COUNT 0x00110884 /* RW-4R */ +#define NV_PGSP_FALCON_ECC_UNCORRECTED_ERR_COUNT_TOTAL 15:0 /* RWIVF */ +#define NV_PGSP_FALCON_ECC_UNCORRECTED_ERR_COUNT_TOTAL_INIT 0x0 /* RWI-V */ +#define NV_PGSP_FALCON_ECC_UNCORRECTED_ERR_COUNT_UNIQUE 31:16 /* RWIVF */ +#define NV_PGSP_FALCON_ECC_UNCORRECTED_ERR_COUNT_UNIQUE_INIT 0x0 /* RWI-V */ + #endif // __gb100_dev_gsp_h__ diff --git a/src/common/inc/swref/published/blackwell/gb100/dev_nv_pcie_config_reg_addendum.h b/src/common/inc/swref/published/blackwell/gb100/dev_nv_pcie_config_reg_addendum.h new file mode 100644 index 0000000000..9ceafba4c6 --- /dev/null +++ b/src/common/inc/swref/published/blackwell/gb100/dev_nv_pcie_config_reg_addendum.h @@ -0,0 +1,162 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __dev_nv_pcie_config_reg_addendum_h__ +#define __dev_nv_pcie_config_reg_addendum_h__ + +/*!--------------------- Config Register Defines---------------------*/ +// Partition IDs +enum CONFIG_REGISTERS_PARTITION_ID { + NV_PCIE_PARTITION_ID_TYPE0_HEADER = 0x0, + NV_PCIE_PARTITION_ID_CFG_SPACE, + NV_PCIE_PARTITION_ID_EXT_CFG_SPACE, + NV_PCIE_PARTITION_ID_INVALID +}; + +// Base address of each partition +#define NV_PCIE_PARTITION_ID_TYPE0_HEADER_BASE_ADDR 0x0 +#define NV_PCIE_PARTITION_ID_CFG_SPACE_BASE_ADDR 0x34 +#define NV_PCIE_PARTITION_ID_EXT_CFG_SPACE_BASE_ADDR 0x100 + +// Masks for partition 1 - PCI Config Space +#define NV_PCIE_PARTITION_ID_CFG_SPACE_CAP_ID_MASK 0xFF +#define NV_PCIE_PARTITION_ID_CFG_SPACE_NEXT_PTR_MASK 0xFF00 +#define NV_PCIE_PARTITION_ID_CFG_SPACE_MSGBOX_ID_MASK 0x1000000 + +// Masks for partition 2 - Extended Config Space +#define NV_PCIE_PARTITION_ID_EXT_CFG_SPACE_CAP_ID_MASK 0xFFFF +#define NV_PCIE_PARTITION_ID_EXT_CFG_SPACE_NEXT_PTR_MASK 0xFFF00000 +#define NV_PCIE_PARTITION_ID_EXT_CFG_SPACE_VENDOR_ID_MASK 0xFFFF +#define NV_PCIE_PARTITION_ID_EXT_CFG_SPACE_DVSEC_LEN_MASK 0xFFF00000 + +// Capability IDs for ALL group of registers defined in PCIe Spec +#define NV_PCIE_REG_CAP_ID_CFG_PCIE_CAP 0x10 +#define NV_PCIE_REG_CAP_ID_CFG_MSIX_CAP 0x11 +#define NV_PCIE_REG_CAP_ID_CFG_POWER_MGMT_CAP 0x1 +#define NV_PCIE_REG_CAP_ID_CFG_VENDOR_SPECIFIC_CAP 0x9 + +#define NV_PCIE_REG_CAP_ID_EXT_CFG_AER_CAP 0x1 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_DSN_CAP 0x3 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_POWER_BUDGETING_CAP 0x4 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_ARI_CAP 0xe +#define NV_PCIE_REG_CAP_ID_EXT_CFG_ATS_CAP 0xf +#define NV_PCIE_REG_CAP_ID_EXT_CFG_SR_IOV_CAP 0x10 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_PF_RESIZABLE_BAR_CAP 0x15 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_LTR_CAP 0x18 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_SECONDARY_PCIE_CAP 0x19 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_PASID_CAP 0x1b +#define NV_PCIE_REG_CAP_ID_EXT_CFG_L1_PM_SUBSTATE_CAP 0x1e +#define NV_PCIE_REG_CAP_ID_EXT_CFG_DVSEC_CAP 0x23 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_VF_RESIZABLE_BAR_CAP 0x24 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_DATA_LINK_FEATURE_CAP 0x25 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_X16P0_GTS_CAP 0x26 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_LANE_MARGINING_AT_RECEIVER_CAP 0x27 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_32P0_GTS_CAP 0x2a +#define NV_PCIE_REG_CAP_ID_EXT_CFG_ALTERNATE_PROTOCOL_CAP 0x2b +#define NV_PCIE_REG_CAP_ID_EXT_CFG_DOE_CAP 0x2e +#define NV_PCIE_REG_CAP_ID_EXT_CFG_DEVICE3_CAP 0x2f +#define NV_PCIE_REG_CAP_ID_EXT_CFG_IDE_CAP 0x30 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_64P0_GTS_CAP 0x31 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_FLIT_LOGGING_CAP 0x32 + +// Structure to capture the details of each regId in LUT +typedef struct +{ + NvU32 hwDefCapGrpFirstAddr; + NvU32 hwDefCapGrpLastAddr; + NvU32 capId; +} PCIE_HW_DEF_REG_INFO; + +typedef struct +{ + PCIE_HW_DEF_REG_INFO hwDefRegInfo; + NvU32 msgboxId; +} PCIE_CFG_REG_INFO; + +typedef struct +{ + PCIE_HW_DEF_REG_INFO hwDefRegInfo; + NvU32 vendorId; + NvU32 dvsecLen; +} PCIE_EXT_CFG_REG_INFO; + +// Invalid IDs +#define NV_PCIE_REG_MSGBOX_ID_INVALID 0x0 +#define NV_PCIE_REG_VEN_ID_INVALID 0x0 +#define NV_PCIE_REG_DVSEC_LENGTH_INVALID 0x0 + +static const PCIE_CFG_REG_INFO pcieCfgRegInfo[] = { + {{NV_PF0_PCI_EXPRESS_CAPABILITIES , NV_PF0_LINK_CONTROL_AND_STATUS_2 , NV_PCIE_REG_CAP_ID_CFG_PCIE_CAP }, NV_PCIE_REG_MSGBOX_ID_INVALID}, + {{NV_PF0_MSIX_CAPABILITY_HEADR_AND_CONTROL , NV_PF0_PBA_OFFSET_PBA_BIR , NV_PCIE_REG_CAP_ID_CFG_MSIX_CAP }, NV_PCIE_REG_MSGBOX_ID_INVALID}, + {{NV_PF0_POWER_MANAGEMENT_CAPABILITIES , NV_PF0_POWER_MANAGEMENT_CONTROL_STATUS , NV_PCIE_REG_CAP_ID_CFG_POWER_MGMT_CAP }, NV_PCIE_REG_MSGBOX_ID_INVALID}, + {{NV_PF0_VENDOR_SPECIFIC_HEADER_CAP , NV_PF0_VENDOR_SPECIFIC_CAP_MSG_BOX_MUTEX , NV_PCIE_REG_CAP_ID_CFG_VENDOR_SPECIFIC_CAP }, NV_PF0_VENDOR_SPECIFIC_HEADER_CAP_MSG_BOX_ENABLED_DEFAULT}, + {{NV_PF0_VENDOR_SPECIFIC2_HEADER_CAP , NV_PF0_VENDOR_SPECIFIC2_HEADER_CAP_DWORD5 , NV_PCIE_REG_CAP_ID_CFG_VENDOR_SPECIFIC_CAP }, NV_PF0_VENDOR_SPECIFIC2_HEADER_CAP_MSG_BOX_ENABLED_DEFAULT}, +}; + +static const PCIE_EXT_CFG_REG_INFO pcieExtCfgRegInfo[] = { + {{NV_PF0_DSN_CAP_HEADER , NV_PF0_DSN_SERIAL_NUMBER_HIGH , NV_PCIE_REG_CAP_ID_EXT_CFG_DSN_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_ADVANCED_ERROR_REPORTING_EXTENDED_CAPABILITY_HEADER , NV_PF0_TLP_PREFIX_LOG_REGISTER_3 , NV_PCIE_REG_CAP_ID_EXT_CFG_AER_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_POWER_BUDGETING_EXTENDED_CAPABILITY_HEADER , NV_PF0_POWER_BUDGETING_CAPABILITY , NV_PCIE_REG_CAP_ID_EXT_CFG_POWER_BUDGETING_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_ARI_EXTENDED_CAPABILITY_HEADER , NV_PF0_ARI_CAPABILITY_AND_CONTROL , NV_PCIE_REG_CAP_ID_EXT_CFG_ARI_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_ATS_EXTENDED_CAP_HEADER , NV_PF0_ATS_CAP_AND_CONTROL , NV_PCIE_REG_CAP_ID_EXT_CFG_ATS_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_SR_IOV_EXTENDED_CAPABILITY_HEADER , NV_PF0_VF_MIGRATION_STATE_ARRAY_OFFSET , NV_PCIE_REG_CAP_ID_EXT_CFG_SR_IOV_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_PF_RESIZABLE_BAR_EXTENDED_CAPABILITY_HEADER , NV_PF0_PF_RESIZABLE_BAR_CONTROL , NV_PCIE_REG_CAP_ID_EXT_CFG_PF_RESIZABLE_BAR_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_LTR_EXTENDED_CAPABILITY_HEADER , NV_PF0_MAX_SNOOP_AND_NO_SNOOP_LATENCY , NV_PCIE_REG_CAP_ID_EXT_CFG_LTR_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_SECONDARY_PCI_EXPRESS_EXTENDED_CAPABILITY_HEADER , NV_PF0_LANE_EQUALIZATION_CONTROL_0_1(7) , NV_PCIE_REG_CAP_ID_EXT_CFG_SECONDARY_PCIE_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_PASID_CAP_HEADER , NV_PF0_PASID_CAP_AND_CONTROL , NV_PCIE_REG_CAP_ID_EXT_CFG_PASID_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_L1_PM_SUBSTATE_EXTENDED_CAPABILITY_HEADER , NV_PF0_L1_PM_SUBSTATES_STATUS , NV_PCIE_REG_CAP_ID_EXT_CFG_L1_PM_SUBSTATE_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_VF_RESIZABLE_BAR_EXTENDED_CAPABILITY_HEADER , NV_PF0_VF_RESIZABLE_BAR_CONTROL , NV_PCIE_REG_CAP_ID_EXT_CFG_VF_RESIZABLE_BAR_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_DATA_LINK_FEATURE_EXTENDED_CAPABILITY_HEADER , NV_PF0_DATA_LINK_FEATURE_STATUS_REGISTER , NV_PCIE_REG_CAP_ID_EXT_CFG_DATA_LINK_FEATURE_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_X16P0_GTS_CAPABILITY_HEADER , NV_PF0_X16P0_GTS_LANE_EQUALIZATION_CONTROL_0_3(3) , NV_PCIE_REG_CAP_ID_EXT_CFG_X16P0_GTS_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_LANE_MARGINING_AT_THE_RECEIVER_EXTENDED_CAPABILITY_HEADER , NV_PF0_LANE_MARGINING_CONTROL_STATUS_0(15) , NV_PCIE_REG_CAP_ID_EXT_CFG_LANE_MARGINING_AT_RECEIVER_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_PL_32P0_GTS_CAPABILITY_HEADER , NV_PF0_PL_32P0_GTS_LANE_EQUALIZATION_CONTROL_0_3(3) , NV_PCIE_REG_CAP_ID_EXT_CFG_32P0_GTS_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_ALTERNATE_PROTOCOL_CAP_HEADER , NV_PF0_ALTERNATE_PROTOCOL_SELECTIVE_ENABLE_MASK , NV_PCIE_REG_CAP_ID_EXT_CFG_ALTERNATE_PROTOCOL_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_DOE_CAP_HEADER , NV_PF0_DOE_READ_DATA_MAILBOX , NV_PCIE_REG_CAP_ID_EXT_CFG_DOE_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_DEVICE3_EXTENDED_CAP_HEADER , NV_PF0_DEVICE3_STATUS_3 , NV_PCIE_REG_CAP_ID_EXT_CFG_DEVICE3_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_IDE_CAP_HEADER , NV_PF0_IDE_ADDRESS_ASSOCIATION_3_6(15) , NV_PCIE_REG_CAP_ID_EXT_CFG_IDE_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_PHYSICAL_LAYER_64P0_GTS_EXTENDED_CAPABILITY_HEADER , NV_PF0_64P0_GTS_LANE_EQUALIZATION_CONTROL_0_3(3) , NV_PCIE_REG_CAP_ID_EXT_CFG_64P0_GTS_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_FLIT_LOGGING_EXTENDED_CAPABILITY_HEADER , NV_PF0_FBER_MEASUREMENT_STATUS_10 , NV_PCIE_REG_CAP_ID_EXT_CFG_FLIT_LOGGING_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_DVSEC0_CAP_HEADER , NV_PF0_NV_CXL_DVSEC0_CXL_LOCK_CAP_3 , NV_PCIE_REG_CAP_ID_EXT_CFG_DVSEC_CAP }, NV_PF0_DVSEC0_CXL_HEADER_1_DVSEC_VENDOR_ID_DEFAULT , NV_PF0_DVSEC0_CXL_HEADER_1_DVSEC_LENGTH_DEFAULT }, + {{NV_PF0_DVSEC8_CAP_HEADER , NV_PF0_DVSEC8_REGISTER_BLOCK_3_REGISTER_OFFSET_HIGH , NV_PCIE_REG_CAP_ID_EXT_CFG_DVSEC_CAP }, NV_PF0_DVSEC8_HEADER_1_DVSEC_VENDOR_ID_DEFAULT , NV_PF0_DVSEC8_HEADER_1_DVSEC_LENGTH_DEFAULT }, + {{NV_PF0_DVSEC0_CAPABILITY_HEADER , NV_PF0_DVSEC0_SEC_FAULT_REGISTER_1 , NV_PCIE_REG_CAP_ID_EXT_CFG_DVSEC_CAP }, NV_PF0_DESIGNATED_VENDOR_SPECIFIC_0_HEADER_1_NV_DVSEC0_VENDOR_ID_DEFAULT , NV_PF0_DESIGNATED_VENDOR_SPECIFIC_0_HEADER_1_NV_DVSEC0_LENGTH_DEFAULT}, + {{NV_PF0_DVSEC1_CAPABILITY_HEADER , NV_PF0_DESIGNATED_VENDOR_SPECIFIC_1_HEADER_2 , NV_PCIE_REG_CAP_ID_EXT_CFG_DVSEC_CAP }, NV_PF0_DESIGNATED_VENDOR_SPECIFIC_1_HEADER_1_NV_DVSEC1_VENDOR_ID_DEFAULT , NV_PF0_DESIGNATED_VENDOR_SPECIFIC_1_HEADER_1_NV_DVSEC1_LENGTH_DEFAULT}, + {{NV_PF0_DVSEC2_CAP_HEADER , NV_PF0_NON_CXL_FUNCTION_REGISTER_8 , NV_PCIE_REG_CAP_ID_EXT_CFG_DVSEC_CAP }, NV_PF0_DVSEC2_HEADER_1_DVSEC_VENDOR_ID_DEFAULT , NV_PF0_DVSEC2_HEADER_1_DVSEC_LENGTH_DEFAULT }, + {{NV_PF0_DVSEC7_CAP_HEADER , NV_PF0_DVSEC7_FLEX_BUS_PORT_STATUS_2 , NV_PCIE_REG_CAP_ID_EXT_CFG_DVSEC_CAP }, NV_PF0_DVSEC7_HEADER_1_DVSEC_VENDOR_ID_DEFAULT , NV_PF0_DVSEC7_HEADER_1_DVSEC_LENGTH_DEFAULT }, + {{NV_PF0_DVSEC2_CAPABILITY_HEADER , NV_PF0_DESIGNATED_VENDOR_SPECIFIC_2_HEADER_2_AND_GENERAL , NV_PCIE_REG_CAP_ID_EXT_CFG_DVSEC_CAP }, NV_PF0_DESIGNATED_VENDOR_SPECIFIC_2_HEADER_1_NV_DVSEC2_VENDOR_ID_DEFAULT , NV_PF0_DESIGNATED_VENDOR_SPECIFIC_2_HEADER_1_NV_DVSEC2_LENGTH_DEFAULT}, +}; + +/*--------------------------------------------------- Partition IDs Range --------------------------------------------------------------*/ +#define NV_PCIE_PARTITION_ID_TYPE0_HEADER_START 0x0 +#define NV_PCIE_PARTITION_ID_TYPE0_HEADER_END 0x3c + +#define NV_PCIE_PARTITION_ID_CFG_SPACE_START 0x40 +#define NV_PCIE_PARTITION_ID_CFG_SPACE_END 0xFC + +#define NV_PCIE_PARTITION_ID_EXT_CFG_SPACE_START 0x100 +// #define NV_PCIE_PARTITION_ID_EXT_CFG_SPACE_END NV_PF0_DESIGNATED_VENDOR_SPECIFIC_2_HEADER_2_AND_GENERAL +/*--------------------------------------------------- Partition IDs Range --------------------------------------------------------------*/ + +/*!--------------------- End of Config Register Defines---------------------*/ + +#endif // __dev_nv_pcie_config_reg_addendum_h__ + diff --git a/src/common/inc/swref/published/blackwell/gb100/dev_pcfg_pf0.h b/src/common/inc/swref/published/blackwell/gb100/dev_pcfg_pf0.h index 048f468e56..204b9d2441 100644 --- a/src/common/inc/swref/published/blackwell/gb100/dev_pcfg_pf0.h +++ b/src/common/inc/swref/published/blackwell/gb100/dev_pcfg_pf0.h @@ -24,6 +24,93 @@ #ifndef __gb100_dev_pcfg_pf0_h__ #define __gb100_dev_pcfg_pf0_h__ +#define NV_PF0_INTERRUPT_AND_LATENCY 0x0000003c /* RW-4R */ +#define NV_PF0_PCI_EXPRESS_CAPABILITIES 0x00000040 /* R--4R */ +#define NV_PF0_LINK_CONTROL_AND_STATUS_2 0x00000070 /* RW-4R */ +#define NV_PF0_PBA_OFFSET_PBA_BIR 0x00000084 /* R--4R */ +#define NV_PF0_POWER_MANAGEMENT_CAPABILITIES 0x00000088 /* R--4R */ +#define NV_PF0_POWER_MANAGEMENT_CONTROL_STATUS 0x0000008c /* RW-4R */ +#define NV_PF0_VENDOR_SPECIFIC_HEADER_CAP 0x00000090 /* R--4R */ +#define NV_PF0_VENDOR_SPECIFIC_CAP_MSG_BOX_MUTEX 0x000000a0 /* RW-4R */ +#define NV_PF0_VENDOR_SPECIFIC_HEADER_CAP_MSG_BOX_ENABLED_DEFAULT 0x00000001 /* R-I-V */ +#define NV_PF0_VENDOR_SPECIFIC2_HEADER_CAP 0x000000a4 /* R--4R */ +#define NV_PF0_VENDOR_SPECIFIC2_HEADER_CAP_DWORD5 0x000000b8 /* R--4R */ +#define NV_PF0_VENDOR_SPECIFIC2_HEADER_CAP_MSG_BOX_ENABLED_DEFAULT 0x00000000 /* R-I-V */ +#define NV_PF0_DSN_CAP_HEADER 0x00000100 /* R--4R */ +#define NV_PF0_DSN_SERIAL_NUMBER_HIGH 0x00000108 /* R--4R */ +#define NV_PF0_ADVANCED_ERROR_REPORTING_EXTENDED_CAPABILITY_HEADER 0x00000148 /* R--4R */ +#define NV_PF0_TLP_PREFIX_LOG_REGISTER_3 0x0000018c /* R--4R */ +#define NV_PF0_POWER_BUDGETING_EXTENDED_CAPABILITY_HEADER 0x00000368 /* R--4R */ +#define NV_PF0_POWER_BUDGETING_CAPABILITY 0x00000374 /* R--4R */ +#define NV_PF0_ARI_EXTENDED_CAPABILITY_HEADER 0x000002f8 /* R--4R */ +#define NV_PF0_ARI_CAPABILITY_AND_CONTROL 0x000002fc /* R--4R */ +#define NV_PF0_ATS_EXTENDED_CAP_HEADER 0x000003a8 /* R--4R */ +#define NV_PF0_ATS_CAP_AND_CONTROL 0x000003ac /* RW-4R */ +#define NV_PF0_SR_IOV_EXTENDED_CAPABILITY_HEADER 0x00000300 /* R--4R */ +#define NV_PF0_VF_MIGRATION_STATE_ARRAY_OFFSET 0x0000033c /* R--4R */ +#define NV_PF0_PF_RESIZABLE_BAR_EXTENDED_CAPABILITY_HEADER 0x00000198 /* R--4R */ +#define NV_PF0_LTR_EXTENDED_CAPABILITY_HEADER 0x00000190 /* R--4R */ +#define NV_PF0_MAX_SNOOP_AND_NO_SNOOP_LATENCY 0x00000194 /* RW-4R */ +#define NV_PF0_SECONDARY_PCI_EXPRESS_EXTENDED_CAPABILITY_HEADER 0x00000244 /* R--4R */ +#define NV_PF0_LANE_EQUALIZATION_CONTROL_0_1(i) (0x00000250+(i)*4) /* R--4A */ +#define NV_PF0_LANE_EQUALIZATION_CONTROL_0_1__SIZE_1 8 /* */ +#define NV_PF0_PASID_CAP_HEADER 0x000003b0 /* R--4R */ +#define NV_PF0_PASID_CAP_AND_CONTROL 0x000003b4 /* RW-4R */ +#define NV_PF0_L1_PM_SUBSTATE_EXTENDED_CAPABILITY_HEADER 0x00000340 /* R--4R */ +#define NV_PF0_L1_PM_SUBSTATES_STATUS 0x00000350 /* R--4R */ +#define NV_PF0_VF_RESIZABLE_BAR_EXTENDED_CAPABILITY_HEADER 0x000001a4 /* R--4R */ +#define NV_PF0_VF_RESIZABLE_BAR_CONTROL 0x000001ac /* RW-4R */ +#define NV_PF0_DATA_LINK_FEATURE_EXTENDED_CAPABILITY_HEADER 0x000001d8 /* R--4R */ +#define NV_PF0_DATA_LINK_FEATURE_STATUS_REGISTER 0x000001e0 /* R--4R */ +#define NV_PF0_X16P0_GTS_CAPABILITY_HEADER 0x000001e4 /* R--4R */ +#define NV_PF0_X16P0_GTS_LANE_EQUALIZATION_CONTROL_0_3(i) (0x00000204+(i)*4) /* R--4A */ +#define NV_PF0_X16P0_GTS_LANE_EQUALIZATION_CONTROL_0_3__SIZE_1 4 /* */ +#define NV_PF0_LANE_MARGINING_AT_THE_RECEIVER_EXTENDED_CAPABILITY_HEADER 0x00000270 /* R--4R */ +#define NV_PF0_LANE_MARGINING_CONTROL_STATUS_0(i) (0x00000278+(i)*4) /* RW-4A */ +#define NV_PF0_LANE_MARGINING_CONTROL_STATUS_0__SIZE_1 16 /* */ +#define NV_PF0_PL_32P0_GTS_CAPABILITY_HEADER 0x00000214 /* R--4R */ +#define NV_PF0_PL_32P0_GTS_LANE_EQUALIZATION_CONTROL_0_3(i) (0x00000234+(i)*4) /* R--4A */ +#define NV_PF0_PL_32P0_GTS_LANE_EQUALIZATION_CONTROL_0_3__SIZE_1 4 /* */ +#define NV_PF0_ALTERNATE_PROTOCOL_CAP_HEADER 0x00000a7c /* R--4R */ +#define NV_PF0_ALTERNATE_PROTOCOL_SELECTIVE_ENABLE_MASK 0x00000a90 /* R--4R */ +#define NV_PF0_DOE_CAP_HEADER 0x00000378 /* R--4R */ +#define NV_PF0_DOE_READ_DATA_MAILBOX 0x0000038c /* RW-4R */ +#define NV_PF0_DEVICE3_EXTENDED_CAP_HEADER 0x00000ae0 /* R--4R */ +#define NV_PF0_DEVICE3_STATUS_3 0x00000aec /* R--4R */ +#define NV_PF0_IDE_CAP_HEADER 0x000003e8 /* R--4R */ +#define NV_PF0_IDE_ADDRESS_ASSOCIATION_3_6(i) (0x00000460+(i)*104) /* RW-4A */ +#define NV_PF0_IDE_ADDRESS_ASSOCIATION_3_6__SIZE_1 16 /* */ +#define NV_PF0_PHYSICAL_LAYER_64P0_GTS_EXTENDED_CAPABILITY_HEADER 0x00000ac0 /* R--4R */ +#define NV_PF0_64P0_GTS_LANE_EQUALIZATION_CONTROL_0_3(i) (0x00000ad0+(i)*4) /* R--4A */ +#define NV_PF0_64P0_GTS_LANE_EQUALIZATION_CONTROL_0_3__SIZE_1 4 /* */ +#define NV_PF0_FLIT_LOGGING_EXTENDED_CAPABILITY_HEADER 0x00000b1c /* R--4R */ +#define NV_PF0_FBER_MEASUREMENT_STATUS_10 0x00000b54 /* R--4R */ +#define NV_PF0_DVSEC0_CAP_HEADER 0x0000010c /* R--4R */ +#define NV_PF0_NV_CXL_DVSEC0_CXL_LOCK_CAP_3 0x00000144 /* R--4R */ +#define NV_PF0_DVSEC0_CXL_HEADER_1_DVSEC_VENDOR_ID_DEFAULT 0x00001e98 /* R-I-V */ +#define NV_PF0_DVSEC0_CXL_HEADER_1_DVSEC_LENGTH_DEFAULT 0x0000003c /* R-I-V */ +#define NV_PF0_DVSEC0_CAPABILITY_HEADER 0x00000af0 /* R--4R */ +#define NV_PF0_DESIGNATED_VENDOR_SPECIFIC_0_HEADER_1_NV_DVSEC0_LENGTH_DEFAULT 0x0000001c /* R-I-V */ +#define NV_PF0_DVSEC8_CAP_HEADER 0x000003b8 /* R--4R */ +#define NV_PF0_DVSEC8_REGISTER_BLOCK_3_REGISTER_OFFSET_HIGH 0x000003d8 /* R--4R */ +#define NV_PF0_DVSEC8_HEADER_1_DVSEC_VENDOR_ID_DEFAULT 0x00001e98 /* R-I-V */ +#define NV_PF0_DVSEC8_HEADER_1_DVSEC_LENGTH_DEFAULT 0x00000024 /* R-I-V */ +#define NV_PF0_DVSEC1_CAPABILITY_HEADER 0x00000b0c /* R--4R */ +#define NV_PF0_DESIGNATED_VENDOR_SPECIFIC_1_HEADER_2 0x00000b14 /* R--4R */ +#define NV_PF0_DESIGNATED_VENDOR_SPECIFIC_1_HEADER_1_NV_DVSEC1_VENDOR_ID_DEFAULT 0x000010de /* R-I-V */ +#define NV_PF0_DESIGNATED_VENDOR_SPECIFIC_1_HEADER_1_NV_DVSEC1_LENGTH_DEFAULT 0x00000010 /* R-I-V */ +#define NV_PF0_DVSEC2_CAP_HEADER 0x00000b58 /* R--4R */ +#define NV_PF0_NON_CXL_FUNCTION_REGISTER_8 0x00000b80 /* R--4R */ +#define NV_PF0_DVSEC2_HEADER_1_DVSEC_VENDOR_ID_DEFAULT 0x00001e98 /* R-I-V */ +#define NV_PF0_DVSEC2_HEADER_1_DVSEC_LENGTH_DEFAULT 0x0000002c /* R-I-V */ +#define NV_PF0_DVSEC7_CAP_HEADER 0x00000b84 /* R--4R */ +#define NV_PF0_DVSEC7_FLEX_BUS_PORT_STATUS_2 0x00000ba0 /* R--4R */ +#define NV_PF0_DVSEC7_HEADER_1_DVSEC_VENDOR_ID_DEFAULT 0x00001e98 /* R-I-V */ +#define NV_PF0_DVSEC7_HEADER_1_DVSEC_LENGTH_DEFAULT 0x00000020 /* R-I-V */ +#define NV_PF0_DVSEC2_CAPABILITY_HEADER 0x00000ba4 /* R--4R */ +#define NV_PF0_DESIGNATED_VENDOR_SPECIFIC_2_HEADER_2_AND_GENERAL 0x00000bac /* R--4R */ +#define NV_PF0_DESIGNATED_VENDOR_SPECIFIC_2_HEADER_1_NV_DVSEC2_VENDOR_ID_DEFAULT 0x000010de /* R-I-V */ +#define NV_PF0_DESIGNATED_VENDOR_SPECIFIC_2_HEADER_1_NV_DVSEC2_LENGTH_DEFAULT 0x00000010 /* R-I-V */ #define NV_PF0_CORRECTABLE_ERROR_STATUS_REPLAY_TIMER_TIMEOUT_STATUS 12:12 /* RWCVF */ #define NV_PF0_STATUS_COMMAND_IO_SPACE_ENABLE 0:0 /* RWIVF */ #define NV_PF0_SUBSYSTEM_ID_AND_VENDOR_ID 0x0000002c /* R--4R */ @@ -36,7 +123,7 @@ #define NV_PF0_BASE_ADDRESS_REGISTERS_0 0x00000010 /* RW-4R */ #define NV_PF0_DEVICE_CONTROL_AND_STATUS 0x00000048 /* RW-4R */ #define NV_PF0_BASE_ADDRESS_REGISTERS_0_ADDR_TYPE 2:1 /* R-IVF */ -#define NV_PF0_MSIX_CAPABILITY_HEADR_AND_CONTROL 0x0000007c /* RW-4R */ +#define NV_PF0_MSIX_CAPABILITY_HEADR_AND_CONTROL 0x0000007c /* RW-4R */ #define NV_PF0_DEVICE_CONTROL_2_ATOMICOP_REQUESTER_ENABLE 6:6 /* RWIVF */ #define NV_PF0_DEVICE_CONTROL_AND_STATUS_CORRECTABLE_ERROR_DETECTED 16:16 /* RWIVF */ #define NV_PF0_DEVICE_CONTROL_AND_STATUS_UNSUPPORTED_REQUEST_DETECTED 19:19 /* RWIVF */ diff --git a/src/common/inc/swref/published/blackwell/gb100/dev_riscv_pri.h b/src/common/inc/swref/published/blackwell/gb100/dev_riscv_pri.h new file mode 100644 index 0000000000..ebe2ddeec7 --- /dev/null +++ b/src/common/inc/swref/published/blackwell/gb100/dev_riscv_pri.h @@ -0,0 +1,49 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gb100_dev_riscv_pri_h__ +#define __gb100_dev_riscv_pri_h__ + +#define NV_PRISCV_RISCV_FAULT_CONTAINMENT_SRCSTAT_ITCM 2:2 /* R-IVF */ +#define NV_PRISCV_RISCV_FAULT_CONTAINMENT_SRCSTAT_ITCM_FAULTED 0x00000001 /* R---V */ +#define NV_PRISCV_RISCV_FAULT_CONTAINMENT_SRCSTAT_ITCM_NO_FAULT 0x00000000 /* R-I-V */ +#define NV_PRISCV_RISCV_FAULT_CONTAINMENT_SRCSTAT_DTCM 3:3 /* R-IVF */ +#define NV_PRISCV_RISCV_FAULT_CONTAINMENT_SRCSTAT_DTCM_FAULTED 0x00000001 /* R---V */ +#define NV_PRISCV_RISCV_FAULT_CONTAINMENT_SRCSTAT_DTCM_NO_FAULT 0x00000000 /* R-I-V */ +#define NV_PRISCV_RISCV_FAULT_CONTAINMENT_SRCSTAT_ICACHE 4:4 /* R-IVF */ +#define NV_PRISCV_RISCV_FAULT_CONTAINMENT_SRCSTAT_ICACHE_FAULTED 0x00000001 /* R---V */ +#define NV_PRISCV_RISCV_FAULT_CONTAINMENT_SRCSTAT_ICACHE_NO_FAULT 0x00000000 /* R-I-V */ +#define NV_PRISCV_RISCV_FAULT_CONTAINMENT_SRCSTAT_DCACHE 5:5 /* R-IVF */ +#define NV_PRISCV_RISCV_FAULT_CONTAINMENT_SRCSTAT_DCACHE_FAULTED 0x00000001 /* R---V */ +#define NV_PRISCV_RISCV_FAULT_CONTAINMENT_SRCSTAT_DCACHE_NO_FAULT 0x00000000 /* R-I-V */ +#define NV_PRISCV_RISCV_FAULT_CONTAINMENT_SRCSTAT_RVCORE 6:6 /* R-IVF */ +#define NV_PRISCV_RISCV_FAULT_CONTAINMENT_SRCSTAT_RVCORE_FAULTED 0x00000001 /* R---V */ +#define NV_PRISCV_RISCV_FAULT_CONTAINMENT_SRCSTAT_RVCORE_NO_FAULT 0x00000000 /* R-I-V */ +#define NV_PRISCV_RISCV_FAULT_CONTAINMENT_SRCSTAT_REG 7:7 /* R-IVF */ +#define NV_PRISCV_RISCV_FAULT_CONTAINMENT_SRCSTAT_REG_FAULTED 0x00000001 /* R---V */ +#define NV_PRISCV_RISCV_FAULT_CONTAINMENT_SRCSTAT_REG_NO_FAULT 0x00000000 /* R-I-V */ +#define NV_PRISCV_RISCV_FAULT_CONTAINMENT_SRCSTAT_MPURAM 12:12 /* R-IVF */ +#define NV_PRISCV_RISCV_FAULT_CONTAINMENT_SRCSTAT_MPURAM_FAULTED 0x00000001 /* R---V */ +#define NV_PRISCV_RISCV_FAULT_CONTAINMENT_SRCSTAT_MPURAM_NO_FAULT 0x00000000 /* R-I-V */ + +#endif // __gb100_dev_riscv_pri_h__ diff --git a/src/common/inc/swref/published/blackwell/gb102/dev_nv_pcie_config_reg_addendum.h b/src/common/inc/swref/published/blackwell/gb102/dev_nv_pcie_config_reg_addendum.h new file mode 100644 index 0000000000..9ceafba4c6 --- /dev/null +++ b/src/common/inc/swref/published/blackwell/gb102/dev_nv_pcie_config_reg_addendum.h @@ -0,0 +1,162 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __dev_nv_pcie_config_reg_addendum_h__ +#define __dev_nv_pcie_config_reg_addendum_h__ + +/*!--------------------- Config Register Defines---------------------*/ +// Partition IDs +enum CONFIG_REGISTERS_PARTITION_ID { + NV_PCIE_PARTITION_ID_TYPE0_HEADER = 0x0, + NV_PCIE_PARTITION_ID_CFG_SPACE, + NV_PCIE_PARTITION_ID_EXT_CFG_SPACE, + NV_PCIE_PARTITION_ID_INVALID +}; + +// Base address of each partition +#define NV_PCIE_PARTITION_ID_TYPE0_HEADER_BASE_ADDR 0x0 +#define NV_PCIE_PARTITION_ID_CFG_SPACE_BASE_ADDR 0x34 +#define NV_PCIE_PARTITION_ID_EXT_CFG_SPACE_BASE_ADDR 0x100 + +// Masks for partition 1 - PCI Config Space +#define NV_PCIE_PARTITION_ID_CFG_SPACE_CAP_ID_MASK 0xFF +#define NV_PCIE_PARTITION_ID_CFG_SPACE_NEXT_PTR_MASK 0xFF00 +#define NV_PCIE_PARTITION_ID_CFG_SPACE_MSGBOX_ID_MASK 0x1000000 + +// Masks for partition 2 - Extended Config Space +#define NV_PCIE_PARTITION_ID_EXT_CFG_SPACE_CAP_ID_MASK 0xFFFF +#define NV_PCIE_PARTITION_ID_EXT_CFG_SPACE_NEXT_PTR_MASK 0xFFF00000 +#define NV_PCIE_PARTITION_ID_EXT_CFG_SPACE_VENDOR_ID_MASK 0xFFFF +#define NV_PCIE_PARTITION_ID_EXT_CFG_SPACE_DVSEC_LEN_MASK 0xFFF00000 + +// Capability IDs for ALL group of registers defined in PCIe Spec +#define NV_PCIE_REG_CAP_ID_CFG_PCIE_CAP 0x10 +#define NV_PCIE_REG_CAP_ID_CFG_MSIX_CAP 0x11 +#define NV_PCIE_REG_CAP_ID_CFG_POWER_MGMT_CAP 0x1 +#define NV_PCIE_REG_CAP_ID_CFG_VENDOR_SPECIFIC_CAP 0x9 + +#define NV_PCIE_REG_CAP_ID_EXT_CFG_AER_CAP 0x1 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_DSN_CAP 0x3 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_POWER_BUDGETING_CAP 0x4 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_ARI_CAP 0xe +#define NV_PCIE_REG_CAP_ID_EXT_CFG_ATS_CAP 0xf +#define NV_PCIE_REG_CAP_ID_EXT_CFG_SR_IOV_CAP 0x10 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_PF_RESIZABLE_BAR_CAP 0x15 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_LTR_CAP 0x18 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_SECONDARY_PCIE_CAP 0x19 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_PASID_CAP 0x1b +#define NV_PCIE_REG_CAP_ID_EXT_CFG_L1_PM_SUBSTATE_CAP 0x1e +#define NV_PCIE_REG_CAP_ID_EXT_CFG_DVSEC_CAP 0x23 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_VF_RESIZABLE_BAR_CAP 0x24 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_DATA_LINK_FEATURE_CAP 0x25 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_X16P0_GTS_CAP 0x26 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_LANE_MARGINING_AT_RECEIVER_CAP 0x27 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_32P0_GTS_CAP 0x2a +#define NV_PCIE_REG_CAP_ID_EXT_CFG_ALTERNATE_PROTOCOL_CAP 0x2b +#define NV_PCIE_REG_CAP_ID_EXT_CFG_DOE_CAP 0x2e +#define NV_PCIE_REG_CAP_ID_EXT_CFG_DEVICE3_CAP 0x2f +#define NV_PCIE_REG_CAP_ID_EXT_CFG_IDE_CAP 0x30 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_64P0_GTS_CAP 0x31 +#define NV_PCIE_REG_CAP_ID_EXT_CFG_FLIT_LOGGING_CAP 0x32 + +// Structure to capture the details of each regId in LUT +typedef struct +{ + NvU32 hwDefCapGrpFirstAddr; + NvU32 hwDefCapGrpLastAddr; + NvU32 capId; +} PCIE_HW_DEF_REG_INFO; + +typedef struct +{ + PCIE_HW_DEF_REG_INFO hwDefRegInfo; + NvU32 msgboxId; +} PCIE_CFG_REG_INFO; + +typedef struct +{ + PCIE_HW_DEF_REG_INFO hwDefRegInfo; + NvU32 vendorId; + NvU32 dvsecLen; +} PCIE_EXT_CFG_REG_INFO; + +// Invalid IDs +#define NV_PCIE_REG_MSGBOX_ID_INVALID 0x0 +#define NV_PCIE_REG_VEN_ID_INVALID 0x0 +#define NV_PCIE_REG_DVSEC_LENGTH_INVALID 0x0 + +static const PCIE_CFG_REG_INFO pcieCfgRegInfo[] = { + {{NV_PF0_PCI_EXPRESS_CAPABILITIES , NV_PF0_LINK_CONTROL_AND_STATUS_2 , NV_PCIE_REG_CAP_ID_CFG_PCIE_CAP }, NV_PCIE_REG_MSGBOX_ID_INVALID}, + {{NV_PF0_MSIX_CAPABILITY_HEADR_AND_CONTROL , NV_PF0_PBA_OFFSET_PBA_BIR , NV_PCIE_REG_CAP_ID_CFG_MSIX_CAP }, NV_PCIE_REG_MSGBOX_ID_INVALID}, + {{NV_PF0_POWER_MANAGEMENT_CAPABILITIES , NV_PF0_POWER_MANAGEMENT_CONTROL_STATUS , NV_PCIE_REG_CAP_ID_CFG_POWER_MGMT_CAP }, NV_PCIE_REG_MSGBOX_ID_INVALID}, + {{NV_PF0_VENDOR_SPECIFIC_HEADER_CAP , NV_PF0_VENDOR_SPECIFIC_CAP_MSG_BOX_MUTEX , NV_PCIE_REG_CAP_ID_CFG_VENDOR_SPECIFIC_CAP }, NV_PF0_VENDOR_SPECIFIC_HEADER_CAP_MSG_BOX_ENABLED_DEFAULT}, + {{NV_PF0_VENDOR_SPECIFIC2_HEADER_CAP , NV_PF0_VENDOR_SPECIFIC2_HEADER_CAP_DWORD5 , NV_PCIE_REG_CAP_ID_CFG_VENDOR_SPECIFIC_CAP }, NV_PF0_VENDOR_SPECIFIC2_HEADER_CAP_MSG_BOX_ENABLED_DEFAULT}, +}; + +static const PCIE_EXT_CFG_REG_INFO pcieExtCfgRegInfo[] = { + {{NV_PF0_DSN_CAP_HEADER , NV_PF0_DSN_SERIAL_NUMBER_HIGH , NV_PCIE_REG_CAP_ID_EXT_CFG_DSN_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_ADVANCED_ERROR_REPORTING_EXTENDED_CAPABILITY_HEADER , NV_PF0_TLP_PREFIX_LOG_REGISTER_3 , NV_PCIE_REG_CAP_ID_EXT_CFG_AER_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_POWER_BUDGETING_EXTENDED_CAPABILITY_HEADER , NV_PF0_POWER_BUDGETING_CAPABILITY , NV_PCIE_REG_CAP_ID_EXT_CFG_POWER_BUDGETING_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_ARI_EXTENDED_CAPABILITY_HEADER , NV_PF0_ARI_CAPABILITY_AND_CONTROL , NV_PCIE_REG_CAP_ID_EXT_CFG_ARI_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_ATS_EXTENDED_CAP_HEADER , NV_PF0_ATS_CAP_AND_CONTROL , NV_PCIE_REG_CAP_ID_EXT_CFG_ATS_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_SR_IOV_EXTENDED_CAPABILITY_HEADER , NV_PF0_VF_MIGRATION_STATE_ARRAY_OFFSET , NV_PCIE_REG_CAP_ID_EXT_CFG_SR_IOV_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_PF_RESIZABLE_BAR_EXTENDED_CAPABILITY_HEADER , NV_PF0_PF_RESIZABLE_BAR_CONTROL , NV_PCIE_REG_CAP_ID_EXT_CFG_PF_RESIZABLE_BAR_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_LTR_EXTENDED_CAPABILITY_HEADER , NV_PF0_MAX_SNOOP_AND_NO_SNOOP_LATENCY , NV_PCIE_REG_CAP_ID_EXT_CFG_LTR_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_SECONDARY_PCI_EXPRESS_EXTENDED_CAPABILITY_HEADER , NV_PF0_LANE_EQUALIZATION_CONTROL_0_1(7) , NV_PCIE_REG_CAP_ID_EXT_CFG_SECONDARY_PCIE_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_PASID_CAP_HEADER , NV_PF0_PASID_CAP_AND_CONTROL , NV_PCIE_REG_CAP_ID_EXT_CFG_PASID_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_L1_PM_SUBSTATE_EXTENDED_CAPABILITY_HEADER , NV_PF0_L1_PM_SUBSTATES_STATUS , NV_PCIE_REG_CAP_ID_EXT_CFG_L1_PM_SUBSTATE_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_VF_RESIZABLE_BAR_EXTENDED_CAPABILITY_HEADER , NV_PF0_VF_RESIZABLE_BAR_CONTROL , NV_PCIE_REG_CAP_ID_EXT_CFG_VF_RESIZABLE_BAR_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_DATA_LINK_FEATURE_EXTENDED_CAPABILITY_HEADER , NV_PF0_DATA_LINK_FEATURE_STATUS_REGISTER , NV_PCIE_REG_CAP_ID_EXT_CFG_DATA_LINK_FEATURE_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_X16P0_GTS_CAPABILITY_HEADER , NV_PF0_X16P0_GTS_LANE_EQUALIZATION_CONTROL_0_3(3) , NV_PCIE_REG_CAP_ID_EXT_CFG_X16P0_GTS_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_LANE_MARGINING_AT_THE_RECEIVER_EXTENDED_CAPABILITY_HEADER , NV_PF0_LANE_MARGINING_CONTROL_STATUS_0(15) , NV_PCIE_REG_CAP_ID_EXT_CFG_LANE_MARGINING_AT_RECEIVER_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_PL_32P0_GTS_CAPABILITY_HEADER , NV_PF0_PL_32P0_GTS_LANE_EQUALIZATION_CONTROL_0_3(3) , NV_PCIE_REG_CAP_ID_EXT_CFG_32P0_GTS_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_ALTERNATE_PROTOCOL_CAP_HEADER , NV_PF0_ALTERNATE_PROTOCOL_SELECTIVE_ENABLE_MASK , NV_PCIE_REG_CAP_ID_EXT_CFG_ALTERNATE_PROTOCOL_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_DOE_CAP_HEADER , NV_PF0_DOE_READ_DATA_MAILBOX , NV_PCIE_REG_CAP_ID_EXT_CFG_DOE_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_DEVICE3_EXTENDED_CAP_HEADER , NV_PF0_DEVICE3_STATUS_3 , NV_PCIE_REG_CAP_ID_EXT_CFG_DEVICE3_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_IDE_CAP_HEADER , NV_PF0_IDE_ADDRESS_ASSOCIATION_3_6(15) , NV_PCIE_REG_CAP_ID_EXT_CFG_IDE_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_PHYSICAL_LAYER_64P0_GTS_EXTENDED_CAPABILITY_HEADER , NV_PF0_64P0_GTS_LANE_EQUALIZATION_CONTROL_0_3(3) , NV_PCIE_REG_CAP_ID_EXT_CFG_64P0_GTS_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_FLIT_LOGGING_EXTENDED_CAPABILITY_HEADER , NV_PF0_FBER_MEASUREMENT_STATUS_10 , NV_PCIE_REG_CAP_ID_EXT_CFG_FLIT_LOGGING_CAP }, NV_PCIE_REG_VEN_ID_INVALID , NV_PCIE_REG_DVSEC_LENGTH_INVALID }, + {{NV_PF0_DVSEC0_CAP_HEADER , NV_PF0_NV_CXL_DVSEC0_CXL_LOCK_CAP_3 , NV_PCIE_REG_CAP_ID_EXT_CFG_DVSEC_CAP }, NV_PF0_DVSEC0_CXL_HEADER_1_DVSEC_VENDOR_ID_DEFAULT , NV_PF0_DVSEC0_CXL_HEADER_1_DVSEC_LENGTH_DEFAULT }, + {{NV_PF0_DVSEC8_CAP_HEADER , NV_PF0_DVSEC8_REGISTER_BLOCK_3_REGISTER_OFFSET_HIGH , NV_PCIE_REG_CAP_ID_EXT_CFG_DVSEC_CAP }, NV_PF0_DVSEC8_HEADER_1_DVSEC_VENDOR_ID_DEFAULT , NV_PF0_DVSEC8_HEADER_1_DVSEC_LENGTH_DEFAULT }, + {{NV_PF0_DVSEC0_CAPABILITY_HEADER , NV_PF0_DVSEC0_SEC_FAULT_REGISTER_1 , NV_PCIE_REG_CAP_ID_EXT_CFG_DVSEC_CAP }, NV_PF0_DESIGNATED_VENDOR_SPECIFIC_0_HEADER_1_NV_DVSEC0_VENDOR_ID_DEFAULT , NV_PF0_DESIGNATED_VENDOR_SPECIFIC_0_HEADER_1_NV_DVSEC0_LENGTH_DEFAULT}, + {{NV_PF0_DVSEC1_CAPABILITY_HEADER , NV_PF0_DESIGNATED_VENDOR_SPECIFIC_1_HEADER_2 , NV_PCIE_REG_CAP_ID_EXT_CFG_DVSEC_CAP }, NV_PF0_DESIGNATED_VENDOR_SPECIFIC_1_HEADER_1_NV_DVSEC1_VENDOR_ID_DEFAULT , NV_PF0_DESIGNATED_VENDOR_SPECIFIC_1_HEADER_1_NV_DVSEC1_LENGTH_DEFAULT}, + {{NV_PF0_DVSEC2_CAP_HEADER , NV_PF0_NON_CXL_FUNCTION_REGISTER_8 , NV_PCIE_REG_CAP_ID_EXT_CFG_DVSEC_CAP }, NV_PF0_DVSEC2_HEADER_1_DVSEC_VENDOR_ID_DEFAULT , NV_PF0_DVSEC2_HEADER_1_DVSEC_LENGTH_DEFAULT }, + {{NV_PF0_DVSEC7_CAP_HEADER , NV_PF0_DVSEC7_FLEX_BUS_PORT_STATUS_2 , NV_PCIE_REG_CAP_ID_EXT_CFG_DVSEC_CAP }, NV_PF0_DVSEC7_HEADER_1_DVSEC_VENDOR_ID_DEFAULT , NV_PF0_DVSEC7_HEADER_1_DVSEC_LENGTH_DEFAULT }, + {{NV_PF0_DVSEC2_CAPABILITY_HEADER , NV_PF0_DESIGNATED_VENDOR_SPECIFIC_2_HEADER_2_AND_GENERAL , NV_PCIE_REG_CAP_ID_EXT_CFG_DVSEC_CAP }, NV_PF0_DESIGNATED_VENDOR_SPECIFIC_2_HEADER_1_NV_DVSEC2_VENDOR_ID_DEFAULT , NV_PF0_DESIGNATED_VENDOR_SPECIFIC_2_HEADER_1_NV_DVSEC2_LENGTH_DEFAULT}, +}; + +/*--------------------------------------------------- Partition IDs Range --------------------------------------------------------------*/ +#define NV_PCIE_PARTITION_ID_TYPE0_HEADER_START 0x0 +#define NV_PCIE_PARTITION_ID_TYPE0_HEADER_END 0x3c + +#define NV_PCIE_PARTITION_ID_CFG_SPACE_START 0x40 +#define NV_PCIE_PARTITION_ID_CFG_SPACE_END 0xFC + +#define NV_PCIE_PARTITION_ID_EXT_CFG_SPACE_START 0x100 +// #define NV_PCIE_PARTITION_ID_EXT_CFG_SPACE_END NV_PF0_DESIGNATED_VENDOR_SPECIFIC_2_HEADER_2_AND_GENERAL +/*--------------------------------------------------- Partition IDs Range --------------------------------------------------------------*/ + +/*!--------------------- End of Config Register Defines---------------------*/ + +#endif // __dev_nv_pcie_config_reg_addendum_h__ + diff --git a/src/common/inc/swref/published/nv_arch.h b/src/common/inc/swref/published/nv_arch.h index 641c742b17..e75ee11486 100644 --- a/src/common/inc/swref/published/nv_arch.h +++ b/src/common/inc/swref/published/nv_arch.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2004-2022 NVIDIA CORPORATION & AFFILIATES + * SPDX-FileCopyrightText: Copyright (c) 2004-2024 NVIDIA CORPORATION & AFFILIATES * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/common/inc/swref/published/nv_ref.h b/src/common/inc/swref/published/nv_ref.h index 37d0981b38..7b85120377 100644 --- a/src/common/inc/swref/published/nv_ref.h +++ b/src/common/inc/swref/published/nv_ref.h @@ -33,6 +33,8 @@ +#include "nvmisc.h" + // // These registers can be accessed by chip-independent code as // well as chip-dependent code. @@ -102,7 +104,7 @@ * Very stable across generations. */ -/* dev_master.ref */ +/* dev_boot */ #define NV_PMC_BOOT_0 0x00000000 /* R--4R */ #define NV_PMC_BOOT_0_MINOR_REVISION 3:0 /* R--VF */ #define NV_PMC_BOOT_0_MAJOR_REVISION 7:4 /* R--VF */ @@ -148,19 +150,8 @@ #define NV_PMC_BOOT_42_MINOR_REVISION 15:12 /* R-XVF */ #define NV_PMC_BOOT_42_MAJOR_REVISION 19:16 /* R-XVF */ #define NV_PMC_BOOT_42_IMPLEMENTATION 23:20 /* */ -// -// temporary #define until HW updates bitwidth - bug 4574714/73 -// TODO: once HW update is in, #define BUG_4574714_TEMPORARY_WAR 0 and -// remove this #if -// -#define BUG_4574714_TEMPORARY_WAR 1 -#if BUG_4574714_TEMPORARY_WAR -#define NV_PMC_BOOT_42_ARCHITECTURE_NEW 29:24 /* */ -#define NV_PMC_BOOT_42_CHIP_ID_NEW 29:20 /* R-XVF */ -#else #define NV_PMC_BOOT_42_ARCHITECTURE 29:24 /* */ #define NV_PMC_BOOT_42_CHIP_ID 29:20 /* R-XVF */ -#endif #define NV_PMC_BOOT_42_ARCHITECTURE_TU100 0x00000016 /* */ #define NV_PMC_BOOT_42_ARCHITECTURE_GA100 0x00000017 /* */ #define NV_PMC_BOOT_42_ARCHITECTURE_GH100 0x00000018 /* */ @@ -174,24 +165,29 @@ #define NV_PAPB_MISC_GP_HIDREV_CHIPID 15:8 /* ----F */ #define NV_PAPB_MISC_GP_HIDREV_MAJORREV 7:4 /* ----F */ + // -// Helper to return BOOT_0 architecture, which is split across fields: +// Helper to return NV_PMC_BOOT_0 architecture, which is split across fields: // ARCHITECTURE_1 (msb) and ARCHITECTURE_0 (lsb) // -#define gpuGetArchitectureFromPmcBoot0(regVal) ( (DRF_VAL(_PMC, _BOOT_0, _ARCHITECTURE_1, regVal) << DRF_SIZE(NV_PMC_BOOT_0_ARCHITECTURE_0)) | DRF_VAL(_PMC, _BOOT_0, _ARCHITECTURE_0, regVal) ) +static inline NvU32 +decodePmcBoot0Architecture(NvU32 pmcBoot0RegVal) +{ + return (DRF_VAL(_PMC, _BOOT_0, _ARCHITECTURE_1, pmcBoot0RegVal) << DRF_SIZE(NV_PMC_BOOT_0_ARCHITECTURE_0)) | + DRF_VAL(_PMC, _BOOT_0, _ARCHITECTURE_0, pmcBoot0RegVal); +} -// Helper to return BOOT_42 architecture and chip ID -// -// temporary #define until HW updates bitwidth - bug 4574714/73 -// TODO: once HW update is in, #define BUG_4574714_TEMPORARY_WAR 0 and -// remove this #if -// -#if BUG_4574714_TEMPORARY_WAR -#define gpuGetArchitectureFromPmcBoot42(regVal) DRF_VAL(_PMC, _BOOT_42, _ARCHITECTURE_NEW, regVal) -#define gpuGetChipIdFromPmcBoot42(regVal) DRF_VAL(_PMC, _BOOT_42, _CHIP_ID_NEW, regVal) -#else -#define gpuGetArchitectureFromPmcBoot42(regVal) DRF_VAL(_PMC, _BOOT_42, _ARCHITECTURE, regVal) -#define gpuGetChipIdFromPmcBoot42(regVal) DRF_VAL(_PMC, _BOOT_42, _CHIP_ID, regVal) -#endif +// Helpers to return NV_PMC_BOOT_42 architecture and chip ID +static inline NvU32 +decodePmcBoot42Architecture(NvU32 pmcBoot42RegVal) +{ + return DRF_VAL(_PMC, _BOOT_42, _ARCHITECTURE, pmcBoot42RegVal); +} + +static inline NvU32 +decodePmcBoot42ChipId(NvU32 pmcBoot42RegVal) +{ + return DRF_VAL(_PMC, _BOOT_42, _CHIP_ID, pmcBoot42RegVal); +} #endif // NV_REF_PUBLISHED_H diff --git a/src/common/inc/swref/published/nvswitch/ls10/dev_master.h b/src/common/inc/swref/published/nvswitch/ls10/dev_boot.h similarity index 91% rename from src/common/inc/swref/published/nvswitch/ls10/dev_master.h rename to src/common/inc/swref/published/nvswitch/ls10/dev_boot.h index 113b1588fa..dc52f7fd05 100644 --- a/src/common/inc/swref/published/nvswitch/ls10/dev_master.h +++ b/src/common/inc/swref/published/nvswitch/ls10/dev_boot.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2003-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -21,8 +21,8 @@ * DEALINGS IN THE SOFTWARE. */ -#ifndef __ls10_dev_master_h__ -#define __ls10_dev_master_h__ +#ifndef __ls10_dev_boot_h__ +#define __ls10_dev_boot_h__ /* This file is autogenerated. Do not edit */ #define NV_PMC 0x00000fff:0x00000000 /* RW--D */ #define NV_PMC_BOOT_42 0x00000A00 /* R--4R */ @@ -30,4 +30,4 @@ #define NV_PMC_BOOT_42_CHIP_ID_SVNP01 0x00000005 /* R---V */ #define NV_PMC_BOOT_42_CHIP_ID_LR10 0x00000006 /* R---V */ #define NV_PMC_BOOT_42_CHIP_ID_LS10 0x00000007 /* R---V */ -#endif // __ls10_dev_master_h__ +#endif // __ls10_dev_boot_h__ diff --git a/src/common/inc/swref/published/nvswitch/ls10/dev_ctrl_ip_addendum.h b/src/common/inc/swref/published/nvswitch/ls10/dev_ctrl_ip_addendum.h index 8138244630..9d1fb1d2a1 100644 --- a/src/common/inc/swref/published/nvswitch/ls10/dev_ctrl_ip_addendum.h +++ b/src/common/inc/swref/published/nvswitch/ls10/dev_ctrl_ip_addendum.h @@ -62,4 +62,14 @@ #define NV_CTRL_CPU_INTR_UNITS_PRIV_RING 15:15 #define NV_CTRL_CPU_INTR_UNITS_FSP 16:16 +#define NV_CTRL_CPU_INTR_TOP_LEAF_BIT(i) (i/2):(i/2) +#define NV_CTRL_CPU_INTR_TOP_LEAF_INTR_UNITS NV_CTRL_CPU_INTR_TOP_LEAF_BIT(NV_CTRL_CPU_INTR_UNITS_IDX) +#define NV_CTRL_CPU_INTR_TOP_LEAF_INTR_NPG_FATAL NV_CTRL_CPU_INTR_TOP_LEAF_BIT(NV_CTRL_CPU_INTR_NPG_FATAL_IDX) +#define NV_CTRL_CPU_INTR_TOP_LEAF_INTR_NPG_NON_FATAL NV_CTRL_CPU_INTR_TOP_LEAF_BIT(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX) +#define NV_CTRL_CPU_INTR_TOP_LEAF_INTR_NPG_CORRECTABLE NV_CTRL_CPU_INTR_TOP_LEAF_BIT(NV_CTRL_CPU_INTR_NPG_CORRECTABLE_IDX) +#define NV_CTRL_CPU_INTR_TOP_LEAF_INTR_NVLW_FATAL NV_CTRL_CPU_INTR_TOP_LEAF_BIT(NV_CTRL_CPU_INTR_NVLW_FATAL_IDX) +#define NV_CTRL_CPU_INTR_TOP_LEAF_INTR_NVLW_NON_FATAL NV_CTRL_CPU_INTR_TOP_LEAF_BIT(NV_CTRL_CPU_INTR_NVLW_NON_FATAL_IDX) +#define NV_CTRL_CPU_INTR_TOP_LEAF_INTR_NVLW_CORRECTABLE NV_CTRL_CPU_INTR_TOP_LEAF_BIT(NV_CTRL_CPU_INTR_NVLW_CORRECTABLE_IDX) +#define NV_CTRL_CPU_INTR_TOP_LEAF_INTR_NXBAR_FATAL NV_CTRL_CPU_INTR_TOP_LEAF_BIT(NV_CTRL_CPU_INTR_NXBAR_FATAL_IDX) + #endif // __ls10_dev_ctrl_ip_addendum_h__ diff --git a/src/common/inc/swref/published/pascal/gp100/dev_bus_addendum.h b/src/common/inc/swref/published/pascal/gp100/dev_bus_addendum.h new file mode 100644 index 0000000000..36c529e568 --- /dev/null +++ b/src/common/inc/swref/published/pascal/gp100/dev_bus_addendum.h @@ -0,0 +1,35 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gp100_dev_bus_addendum_h__ +#define __gp100_dev_bus_addendum_h__ + + +// +// This bit is set by RM to indicate that GPU reset is required +// +#define NV_PBUS_SW_SCRATCH30_GPU_RESET_REQUIRED 0:0 +#define NV_PBUS_SW_SCRATCH30_GPU_RESET_REQUIRED_OFF 0x00000000 +#define NV_PBUS_SW_SCRATCH30_GPU_RESET_REQUIRED_ON 0x00000001 + +#endif // __gp100_dev_bus_addendum_h__ diff --git a/src/common/inc/swref/published/pascal/gp102/dev_pbdma.h b/src/common/inc/swref/published/pascal/gp102/dev_pbdma.h index af0c005956..5fd22a7359 100644 --- a/src/common/inc/swref/published/pascal/gp102/dev_pbdma.h +++ b/src/common/inc/swref/published/pascal/gp102/dev_pbdma.h @@ -23,5 +23,5 @@ #ifndef __gp102_dev_pbdma_h__ #define __gp102_dev_pbdma_h__ -#define NV_PPBDMA_SET_CHANNEL_INFO_SCG_TYPE_COMPUTE1 0x00000001 /* */ +#define NV_PBDMA_SET_CHANNEL_INFO_SCG_TYPE_COMPUTE1 0x00000001 /* */ #endif // __gp102_dev_pbdma_h__ diff --git a/src/common/inc/swref/published/turing/tu102/dev_bus.h b/src/common/inc/swref/published/turing/tu102/dev_bus.h index 852c606aa6..b2b711ff7b 100644 --- a/src/common/inc/swref/published/turing/tu102/dev_bus.h +++ b/src/common/inc/swref/published/turing/tu102/dev_bus.h @@ -25,6 +25,7 @@ #define __tu102_dev_bus_h__ #define NV_PBUS_VBIOS_SCRATCH(i) (0x00001400+(i)*4) /* */ +#define NV_PBUS_SW_SCRATCH(i) (0x00001400+(i)*4) /* RW-4A */ #define NV_PBUS_IFR_FMT_FIXED0 0x00000000 /* */ #define NV_PBUS_IFR_FMT_FIXED0_SIGNATURE 31:0 /* */ diff --git a/src/common/inc/swref/published/turing/tu102/kind_macros.h b/src/common/inc/swref/published/turing/tu102/kind_macros.h index 4243730dfc..81fa9abbfc 100644 --- a/src/common/inc/swref/published/turing/tu102/kind_macros.h +++ b/src/common/inc/swref/published/turing/tu102/kind_macros.h @@ -24,8 +24,11 @@ #define _kind_macros_orig_H_ #define KIND_INVALID(k) ( ((k) ==NV_MMU_CLIENT_KIND_INVALID)) +#define PTEKIND_PITCH(k) ( ((k) ==NV_MMU_PTE_KIND_PITCH)|| ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)) #define PTEKIND_COMPRESSIBLE(k) ( ((k) >=NV_MMU_PTE_KIND_GENERIC_MEMORY_COMPRESSIBLE && (k) <= NV_MMU_PTE_KIND_Z24S8_COMPRESSIBLE_DISABLE_PLC)) #define PTEKIND_DISALLOWS_PLC(k) ( !((k) ==NV_MMU_PTE_KIND_GENERIC_MEMORY_COMPRESSIBLE)) #define PTEKIND_SUPPORTED(k) ( ((k) ==NV_MMU_PTE_KIND_INVALID)|| ((k) ==NV_MMU_PTE_KIND_PITCH)|| ((k) ==NV_MMU_PTE_KIND_GENERIC_MEMORY)|| ((k) >=NV_MMU_PTE_KIND_Z16 && (k) <= NV_MMU_PTE_KIND_Z24S8)|| ((k) >=NV_MMU_PTE_KIND_GENERIC_MEMORY_COMPRESSIBLE && (k) <= NV_MMU_PTE_KIND_SMSKED_MESSAGE)) #define KIND_Z(k) ( ((k) >=NV_MMU_CLIENT_KIND_Z16 && (k) <= NV_MMU_CLIENT_KIND_Z24S8)) +#define PTEKIND_Z(k) ( ((k) >=NV_MMU_PTE_KIND_Z16 && (k) <= NV_MMU_PTE_KIND_Z24S8)|| ((k) >=NV_MMU_PTE_KIND_S8_COMPRESSIBLE_DISABLE_PLC && (k) <= NV_MMU_PTE_KIND_Z24S8_COMPRESSIBLE_DISABLE_PLC)) +#define PTEKIND_GENERIC_MEMORY(k) ( ((k) ==NV_MMU_PTE_KIND_GENERIC_MEMORY)|| ((k) >=NV_MMU_PTE_KIND_GENERIC_MEMORY_COMPRESSIBLE && (k) <= NV_MMU_PTE_KIND_GENERIC_MEMORY_COMPRESSIBLE_DISABLE_PLC)) diff --git a/src/common/inc/swref/published/volta/gv100/dev_ram.h b/src/common/inc/swref/published/volta/gv100/dev_ram.h index 16aaf4ca27..21c528ab7c 100644 --- a/src/common/inc/swref/published/volta/gv100/dev_ram.h +++ b/src/common/inc/swref/published/volta/gv100/dev_ram.h @@ -23,6 +23,7 @@ #ifndef __gv100_dev_ram_h__ #define __gv100_dev_ram_h__ +#define NV_PRAMIN 0x007FFFFF:0x00700000 /* RW--M */ #define NV_RAMIN_BASE_SHIFT 12 /* */ #define NV_RAMIN_ALLOC_SIZE 4096 /* */ #define NV_RAMIN_ENABLE_ATS (135*32+31):(135*32+31) /* RWXUF */ diff --git a/src/common/modeset/timing/displayid20.h b/src/common/modeset/timing/displayid20.h index 823a1bc73f..03ca269836 100644 --- a/src/common/modeset/timing/displayid20.h +++ b/src/common/modeset/timing/displayid20.h @@ -1,6 +1,6 @@ //***************************************************************************** // -// SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +// SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. // SPDX-License-Identifier: MIT // // Permission is hereby granted, free of charge, to any person obtaining a @@ -341,12 +341,12 @@ typedef struct _TAG_DISPLAYID_2_0_TIMING_9_DESCRIPTOR } DISPLAYID_2_0_TIMING_9_DESCRIPTOR; // the following fields apply to Timing 9/10 Descriptors -#define DISPLAYID_2_0_TIMING_FORMULA_CVT_1_2_STANDARD 0 +#define DISPLAYID_2_0_TIMING_FORMULA_CVT_1_2_STANDARD_CRT_BASED 0 #define DISPLAYID_2_0_TIMING_FORMULA_CVT_1_2_REDUCED_BLANKING_1 1 -#define DISPLAYID_2_0_TIMING_FORMULA_CVT_2_0_REDUCED_BLANKING_2 2 -#define DISPLAYID_2_0_TIMING_FORMULA_CVT_2_0_REDUCED_BLANKING_3 3 +#define DISPLAYID_2_0_TIMING_FORMULA_CVT_2_1_REDUCED_BLANKING_2 2 +#define DISPLAYID_2_0_TIMING_FORMULA_CVT_2_1_REDUCED_BLANKING_3 3 -#define DISPLAYID_2_0_TIMING_9_MAX_DESCRIPTORS 18 +#define DISPLAYID_2_0_TIMING_9_MAX_DESCRIPTORS 10 typedef struct _tagDISPLAYID_2_0_TIMING_9_BLOCK { @@ -357,6 +357,7 @@ typedef struct _tagDISPLAYID_2_0_TIMING_9_BLOCK #define DISPLAYID_2_0_TIMING_10_PAYLOAD_BYTES_6 0 #define DISPLAYID_2_0_TIMING_10_PAYLOAD_BYTES_7 1 +#define DISPLAYID_2_1_TIMING_10_PAYLOAD_BYTES_8 2 typedef struct _tagDISPLAYID_2_0_TIMING_10_BLOCK_HEADER { @@ -368,6 +369,10 @@ typedef struct _tagDISPLAYID_2_0_TIMING_10_BLOCK_HEADER NvU8 payload_bytes; } DISPLAYID_2_0_TIMING_10_BLOCK_HEADER; +#define DISPLAYID_2_0_TIMING_10_MAX_6BYTES_DESCRIPTORS 18 +#define DISPLAYID_2_0_TIMING_10_MAX_7BYTES_DESCRIPTORS 16 +#define DISPLAYID_2_1_TIMING_10_MAX_8BYTES_DESCRIPTORS 14 + typedef struct _DISPLAYID_2_0_TIMING_10_6BYTES_DESCRIPTOR { struct { @@ -383,6 +388,9 @@ typedef struct _DISPLAYID_2_0_TIMING_10_6BYTES_DESCRIPTOR NvU8 refresh_rate; // 1 Hz to 256 Hz } DISPLAYID_2_0_TIMING_10_6BYTES_DESCRIPTOR; +#define DISPLAYID_2_0_TIMING_10_NOMINAL_MINIMUM_VBLANK 35 +#define DISPLAYID_2_1_TIMING_10_ALTERNATE_MINIMUM_VBLANK 20 + typedef struct _DISPLAYID_2_0_TIMING_10_7BYTES_DESCRIPTOR { DISPLAYID_2_0_TIMING_10_6BYTES_DESCRIPTOR descriptor_6_bytes; @@ -391,13 +399,17 @@ typedef struct _DISPLAYID_2_0_TIMING_10_7BYTES_DESCRIPTOR NvU8 additional_vblank_timing :3; } DISPLAYID_2_0_TIMING_10_7BYTES_DESCRIPTOR; -#define DISPLAYID_2_0_TIMING_10_MAX_6BYTES_DESCRIPTORS 18 -#define DISPLAYID_2_0_TIMING_10_MAX_7BYTES_DESCRIPTORS 16 +typedef struct _DISPLAYID_2_1_TIMING_10_8BYTES_DESCRIPTOR +{ + DISPLAYID_2_0_TIMING_10_7BYTES_DESCRIPTOR descriptor_7_bytes; + NvU8 additional_mini_vblank :1; + NvU8 reserved :7; +} DISPLAYID_2_1_TIMING_10_8BYTES_DESCRIPTOR; typedef struct _DISPLAYID_2_0_TIMING_10_BLOCK { DISPLAYID_2_0_TIMING_10_BLOCK_HEADER header; - NvU8 descriptors[120]; + NvU8 descriptors[144]; } DISPLAYID_2_0_TIMING_10_BLOCK; #define DISPLAYID_2_0_RANGE_LIMITS_BLOCK_PAYLOAD_LENGTH 9 diff --git a/src/common/modeset/timing/nvt_cvt.c b/src/common/modeset/timing/nvt_cvt.c index af00dce2cd..4255151691 100644 --- a/src/common/modeset/timing/nvt_cvt.c +++ b/src/common/modeset/timing/nvt_cvt.c @@ -1,6 +1,6 @@ //***************************************************************************** // -// SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +// SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. // SPDX-License-Identifier: MIT // // Permission is hereby granted, free of charge, to any person obtaining a @@ -38,7 +38,7 @@ CONS_SEGMENT(PAGE_CONS) const NvU32 NVT_MAX_NVU32= (NvU32)(-1); -const NvU32 NVT_CVT_CELL_GRAN = 8; // Character cell width. +const NvU32 NVT_CVT_CELL_GRAN = 8; // Character cell width. const NvU32 NVT_CVT_MIN_VSYNCBP = 11; // in 550us (!!) [1000000:550 = 20000:11] const NvU32 NVT_CVT_V_PORCH = 3; // in pixels const NvU32 NVT_CVT_C_PRIME = 30; // value of (C' * 10) @@ -54,16 +54,17 @@ const NvU32 NVT_CVT_MIN_V_BPORCH = 6; // Minimum vertical back porch. // VESA CVT spec ver1.2: -// +// // Page 24 : Table 5-4 : Delta between Original Reduced Blank Timing and Reduced Blanking Timing V2 -#define NVT_CVT_RB2_CLOCK_STEP_KHZ 1 +#define NVT_CVT_RB2_CLOCK_STEP_KHZ 1 #define NVT_CVT_RB2_H_BLANK_PIXELS 80 #define NVT_CVT_RB2_H_SYNC_PIXELS 32 #define NVT_CVT_RB2_MIN_VBLANK_MICROSEC 460 +#define NVT_CVT_RB2_MIN_ALT_VBLANK_MICROSEC 300 #define NVT_CVT_RB2_MIN_V_FPORCH 1 #define NVT_CVT_RB2_MIN_V_BPORCH 6 // Page 16 : Table 3-2 : Vertical Sync Duration -#define NVT_CVT_RB2_V_SYNC_WIDTH 8 +#define NVT_CVT_RB2_V_SYNC_WIDTH 8 // Page 22: RB_MIN_VBI = RB_V_FPORCH + V_SYNC_RND + MIN_V_BPORCH #define NVT_CVT_RB2_MIN_VBI NVT_CVT_RB2_V_SYNC_WIDTH + NVT_CVT_RB2_MIN_V_FPORCH + NVT_CVT_RB2_MIN_V_BPORCH // Page 15 : The Horizontal Sync Pulse duration will in all cases be 32 pixel clocks in duration, with the position @@ -81,6 +82,7 @@ const NvU32 NVT_CVT_MIN_V_BPORCH = 6; // Minimum vertical back porch. #define NVT_CVT_RB3_H_SYNC_PIXELS NVT_CVT_RB2_H_SYNC_PIXELS #define NVT_CVT_RB3_H_FPORCH NVT_CVT_RB2_H_FPORCH #define NVT_CVT_RB3_MIN_VBLANK_MICROSEC NVT_CVT_RB2_MIN_VBLANK_MICROSEC +#define NVT_CVT_RB3_MIN_ALT_VBLANK_MICROSEC NVT_CVT_RB2_MIN_ALT_VBLANK_MICROSEC #define NVT_CVT_RB3_V_FIELD_RATE_PPM_ADJ 350 #define NVT_CVT_RB3_V_SYNC_WIDTH NVT_CVT_RB2_V_SYNC_WIDTH #define NVT_CVT_RB3_MIN_V_FPORCH NVT_CVT_RB2_MIN_V_FPORCH @@ -92,11 +94,11 @@ CODE_SEGMENT(PAGE_DD_CODE) static NvU16 getCVTVSync(NvU32 XRes, NvU32 YRes) { // 4:3 modes - if(XRes * 3 == YRes * 4) + if(XRes * 3 == YRes * 4) return 4; // 16:9 modes - //if((XRes * 9 == YRes * 16) || + //if((XRes * 9 == YRes * 16) || // (XRes == 848 && YRes == 480) || // 53:30 = 1.76666 // (XRes == 1064 && YRes == 600) || // 133:75 = 1.77333 // (XRes == 1360 && YRes == 768) || // 85:48 = 1.77083 @@ -108,7 +110,7 @@ static NvU16 getCVTVSync(NvU32 XRes, NvU32 YRes) // (XRes == 4264 && YRes == 2400)) // 533:300 = 1.77666 // return 5; // NOTE: Because 16:9 modes are really a collection of mode of - // aspect ratio between 16:9 and 53:30, we will include + // aspect ratio between 16:9 and 53:30, we will include // all generic mode within this aspect ration range if((XRes * 9 <= YRes * 16) && (XRes * 30 >= YRes * 53)) return 5; @@ -116,7 +118,7 @@ static NvU16 getCVTVSync(NvU32 XRes, NvU32 YRes) // 16:10 modes if((XRes * 5 == YRes * 8) || (XRes == 1224 && YRes == 768) || - (XRes == 2456 && YRes == 1536)) + (XRes == 2456 && YRes == 1536)) return 6; // Special 1280 modes @@ -125,7 +127,7 @@ static NvU16 getCVTVSync(NvU32 XRes, NvU32 YRes) return 7; // Failure value, for identification - return 10; + return 10; } @@ -137,17 +139,17 @@ NVT_STATUS NvTiming_CalcCVT(NvU32 width, NvU32 height, NvU32 rr, NvU32 flag, NVT NvU32 dwHPeriodEstimate_NUM, dwHPeroidEstimate_DEN; NvU32 dwIdealDutyCycle_NUM, dwIdealDutyCycle_DEN; - // parameter check + // parameter check if (pT == NULL) return NVT_STATUS_ERR; if (width == 0 || height == 0 || rr == 0 ) return NVT_STATUS_ERR; - // Check for valid input parameter + // Check for valid input parameter if (width < 300 || height < 200 || rr < 10) return NVT_STATUS_ERR;//return NVT_STATUS_ERR_BACKOFF | NVT_STATUS_ERR_OUTOFRANGE; - + NVMISC_MEMSET(pT, 0, sizeof(NVT_TIMING)); pT->etc.status = NVT_STATUS_CVT; @@ -222,7 +224,7 @@ NVT_STATUS NvTiming_CalcCVT(NvU32 width, NvU32 height, NvU32 rr, NvU32 flag, NVT pT->etc.rr = (NvU16)rr; pT->etc.rrx1k = axb_div_c((NvU32)pT->pclk, (NvU32)10000*(NvU32)1000, (NvU32)pT->HTotal*(NvU32)pT->VTotal); pT->etc.aspect = 0; - pT->etc.rep = 0x1; + pT->etc.rep = 0x1; NVT_SNPRINTF((char *)pT->etc.name, 40, "CVT:%dx%dx%dHz",width, height, rr); pT->etc.name[39] = '\0'; @@ -249,20 +251,20 @@ NVT_STATUS NvTiming_CalcCVT_RB(NvU32 width, NvU32 height, NvU32 rr, NvU32 flag, { NvU32 dwXCells, dwPClk, dwVBILines, dwVSyncWidth; - // parameter check + // parameter check if (pT == NULL) return NVT_STATUS_ERR; if (width == 0 || height == 0 || rr == 0 ) return NVT_STATUS_ERR; - // Check for valid input parameter + // Check for valid input parameter if (width < 300 || height < 200 || rr < 10) return NVT_STATUS_ERR;//NVT_STATUS_ERR_BACKOFF | NVT_STATUS_ERR_OUTOFRANGE; NVMISC_MEMSET(pT, 0, sizeof(NVT_TIMING)); - pT->etc.status = NVT_STATUS_CVT_RB; - + pT->etc.status = NVT_STATUS_CVT_RB; + // H_PIXELS_RND = ROUNDDOWN(H_PIXELS / CELL_GRAN_RND,0) * CELL_GRAN_RND if ((width % NVT_CVT_CELL_GRAN)!=0) { @@ -307,7 +309,7 @@ NVT_STATUS NvTiming_CalcCVT_RB(NvU32 width, NvU32 height, NvU32 rr, NvU32 flag, pT->etc.rr = (NvU16)rr; pT->etc.rrx1k = axb_div_c((NvU32)pT->pclk, (NvU32)10000*(NvU32)1000, (NvU32)pT->HTotal*(NvU32)pT->VTotal); pT->etc.aspect = 0; - pT->etc.rep = 0x1; + pT->etc.rep = 0x1; NVT_SNPRINTF((char *)pT->etc.name, 40, "CVT-RB:%dx%dx%dHz",width, height, rr); pT->etc.name[39] = '\0'; @@ -329,15 +331,15 @@ NVT_STATUS NvTiming_CalcCVT_RB(NvU32 width, NvU32 height, NvU32 rr, NvU32 flag, // CVT-RB2 timing calculation CODE_SEGMENT(PAGE_DD_CODE) -NVT_STATUS NvTiming_CalcCVT_RB2(NvU32 width, NvU32 height, NvU32 rr, NvBool is1000div1001, NVT_TIMING *pT) +NVT_STATUS NvTiming_CalcCVT_RB2(NvU32 width, NvU32 height, NvU32 rr, NvBool is1000div1001, NvBool isAltMiniVblankTiming, NVT_TIMING *pT) { NvU32 vbi, act_vbi_lines, total_v_lines, total_pixels, act_pixel_freq_khz; - // parameter check + // parameter check if (pT == NULL || width == 0 || height == 0 || rr == 0) return NVT_STATUS_ERR; - // Check for valid input parameter + // Check for valid input parameter if (width < 300 || height < 200 || rr < 10) return NVT_STATUS_ERR; @@ -355,7 +357,16 @@ NVT_STATUS NvTiming_CalcCVT_RB2(NvU32 width, NvU32 height, NvU32 rr, NvBool is10 // vbi = NVT_CVT_RB2_MIN_VBLANK / h_period_est + 1; // combining step 8, 9, - vbi = height * NVT_CVT_RB2_MIN_VBLANK_MICROSEC * rr / (1000000 - NVT_CVT_RB2_MIN_VBLANK_MICROSEC * rr) + 1; + if (isAltMiniVblankTiming) + { + // CVT spec2.1 - page 11 6. VBlank Period + // an alternate minimum VBlank duration of 300 us may be used under conditions defined by the interface specification on which the timing is used + vbi = height * NVT_CVT_RB2_MIN_ALT_VBLANK_MICROSEC * rr / (1000000 - NVT_CVT_RB2_MIN_ALT_VBLANK_MICROSEC * rr) + 1; + } + else + { + vbi = height * NVT_CVT_RB2_MIN_VBLANK_MICROSEC * rr / (1000000 - NVT_CVT_RB2_MIN_VBLANK_MICROSEC * rr) + 1; + } // 10. Check Vertical Blanking is Sufficient : // RB_MIN_VBI = RB_V_FPORCH + V_SYNC_RND + MIN_V_BPORCH @@ -380,7 +391,7 @@ NVT_STATUS NvTiming_CalcCVT_RB2(NvU32 width, NvU32 height, NvU32 rr, NvBool is10 // TOTAL_PIXELS / 1000000 * REFRESH_MULTIPLIER) / CLOCK_STEP, 0) if (is1000div1001) act_pixel_freq_khz = NVT_CVT_RB2_CLOCK_STEP_KHZ * (rr * total_v_lines * total_pixels / 1001 / NVT_CVT_RB2_CLOCK_STEP_KHZ); - else + else act_pixel_freq_khz = NVT_CVT_RB2_CLOCK_STEP_KHZ * (rr * total_v_lines * total_pixels / 1000 / NVT_CVT_RB2_CLOCK_STEP_KHZ); // 14. Find actual Horizontal Frequency(kHz) : @@ -393,7 +404,7 @@ NVT_STATUS NvTiming_CalcCVT_RB2(NvU32 width, NvU32 height, NvU32 rr, NvBool is10 // fill in the essential timing info for output pT->HVisible = (NvU16)width; pT->HTotal = (NvU16)(total_pixels); - pT->HFrontPorch = NVT_CVT_RB2_H_FPORCH; + pT->HFrontPorch = NVT_CVT_RB2_H_FPORCH; pT->HSyncWidth = NVT_CVT_RB2_H_SYNC_PIXELS; pT->VVisible = (NvU16)height; pT->VTotal = (NvU16)total_v_lines; @@ -408,7 +419,7 @@ NVT_STATUS NvTiming_CalcCVT_RB2(NvU32 width, NvU32 height, NvU32 rr, NvBool is10 // fill in the extra timing info pT->etc.flag = 0; pT->etc.rr = (NvU16)rr; - pT->etc.rrx1k = (NvU32)axb_div_c_64((NvU64)pT->pclk, (NvU64)10000 * (NvU64)1000, (NvU64)pT->HTotal*(NvU64)pT->VTotal); + pT->etc.rrx1k = (NvU32)axb_div_c_64((NvU64)act_pixel_freq_khz, (NvU64)1000 * (NvU64)1000, (NvU64)pT->HTotal*(NvU64)pT->VTotal); pT->etc.aspect = 0; pT->etc.rep = 0x1; NVT_SNPRINTF((char *)pT->etc.name, 40, "CVT-RB2:%dx%dx%dHz", width, height, rr); @@ -421,20 +432,30 @@ NVT_STATUS NvTiming_CalcCVT_RB2(NvU32 width, NvU32 height, NvU32 rr, NvBool is10 // CVT-RB3 timing calculation // This is intended to work in conjunction with VESA Adaptive-Sync operation (or other similar VRR methodology) CODE_SEGMENT(PAGE_DD_CODE) -NVT_STATUS NvTiming_CalcCVT_RB3(NvU32 width, NvU32 height, NvU32 rr, NvU32 deltaHBlank, NvU32 vBlankMicroSec, NvBool isEarlyVSync, NVT_TIMING *pT) +NVT_STATUS NvTiming_CalcCVT_RB3(NvU32 width, + NvU32 height, + NvU32 rr, + NvU32 deltaHBlank, + NvU32 vBlankMicroSec, + NvBool isAltMiniVblankTiming, + NvBool isEarlyVSync, + NVT_TIMING *pT) { - NvU32 vbi, act_v_blank_time, act_v_blank_lines, v_back_porch, total_v_lines, total_pixels, adj_rr_x1M, act_pixel_freq_khz; - NvU64 act_pixel_freq_hz = 0xFFFFFFFFFFFFFFFFULL; + NvU32 vbi, act_v_blank_time, act_v_blank_lines, v_back_porch_est, v_back_porch, total_v_lines, total_pixels, adj_rr_x1M, act_pixel_freq_khz; + NvU64 act_pixel_freq_hz = 0xFFFFFFFFFFFFFFFFULL; - // parameter check + // parameter check if (pT == NULL) return NVT_STATUS_ERR; if (width == 0 || height == 0 || rr == 0) return NVT_STATUS_ERR; - // Check for valid input parameter - if ( (height % 8 != 0) || (deltaHBlank % 8 != 0) || deltaHBlank > 120 || vBlankMicroSec > 245) + // Check for valid input parameter + if ((height % 8 != 0) || (deltaHBlank % 8 != 0) || deltaHBlank > 120) + return NVT_STATUS_INVALID_PARAMETER; + + if ((isAltMiniVblankTiming && vBlankMicroSec > 140) || (!isAltMiniVblankTiming && vBlankMicroSec > 245)) return NVT_STATUS_INVALID_PARAMETER; NVMISC_MEMSET(pT, 0, sizeof(NVT_TIMING)); @@ -462,93 +483,112 @@ NVT_STATUS NvTiming_CalcCVT_RB3(NvU32 width, NvU32 height, NvU32 rr, NvU32 delta NVT_SET_TIMING_STATUS_MISMATCH(pT->etc.status, NVT_STATUS_TIMING_MISMATCH_ALIGNMENT); } - // 3 Round the number of vertical lines down to the nearest integer: + // 3 Round the number of vertical lines down to the nearest integer: // V_LINES_RND = ROUNDDOWN(I_V_LINES, 0) // Parameters mapping: // - V_LINES_RND == "height" - // 4 Calculate the estimated Horizontal Period (kHz): - // H_PERIOD_EST = ((1000000 / (V_FIELD_RATE_RQD)) - C_RB_MIN_V_BLANK) / V_LINES_RND - + // 4 Calculate the minimum allowed VBlank duration: + // MIN_V_BLANK = IF(I_ALTERNATE_VBLANK_MIN?="N", C_RB_MIN_V_BLANK, C_RB_ALT_MIN_V_BLANK) + + // 5 Calculate the estimated Horizontal Period (kHz): + // H_PERIOD_EST = ((1,000,000 / (V_FIELD_RATE_RQD)) – MIN_V_BLANK) / V_LINES_RND + // Parameters mapping: // - H_PERIOD_EST == "h_period_est" - // - C_RB_MIN_V_BLANK == "NVT_CVT_RB3_MIN_VBLANK_MICROSEC" - // h_period_est = ((1000000000000 / adj_rr_x1M) - NVT_CVT_RB3_MIN_VBLANK_MICROSEC) / height - - // 5 Calculate the total VBlank time: - // ACT_V_BLANK_TIME = IF(I_VBLANK < C_RB_MIN_V_BLANK, C_RB_MIN_V_BLANK, I_VBLANK) - + // - C_RB_MIN_V_BLANK == "NVT_CVT_RB3_MIN_VBLANK_MICROSEC" == 460 + // - C_RB_ALT_MIN_V_BLANK == "NVT_CVT_RB3_MIN_ALT_VBLANK_MICROSEC" == 300 + // h_period_est = ((1000000000000 / adj_rr_x1M) - MIN_V_BLANK) / height + + // 6 Calculate the total VBlank time: + // ACT_V_BLANK_TIME = IF(I_VBLANK < MIN_V_BLANK, MIN_V_BLANK, I_VBLANK) + // Parameters mapping: // - ACT_V_BLANK_TIME == "act_v_blank_time" // - I_VBLANK == "vBlankMicroSec" - act_v_blank_time = MAX(vBlankMicroSec + 460, NVT_CVT_RB3_MIN_VBLANK_MICROSEC); + if (isAltMiniVblankTiming) + act_v_blank_time = MAX(vBlankMicroSec + NVT_CVT_RB3_MIN_ALT_VBLANK_MICROSEC, NVT_CVT_RB3_MIN_ALT_VBLANK_MICROSEC); + else + act_v_blank_time = MAX(vBlankMicroSec + NVT_CVT_RB3_MIN_VBLANK_MICROSEC, NVT_CVT_RB3_MIN_VBLANK_MICROSEC); - // 6 Calculate the number of idealized lines in the VBlank interval: + // 7 Calculate the number of idealized lines in the VBlank interval: // VBI_LINES = ROUNDUP(ACT_V_BLANK_TIME / H_PERIOD_EST, 0) - + // Parameters mapping: - // - VBI_LINES == vbi" - // below formula are combining step 4, 5, 6 togerther. i.e. both numerator and denominator multiple by height and addj_rr_x1M. + // - VBI_LINES == "vbi" + // below formula are combining step 4, 5, 6 together. i.e. both numerator and denominator multiple by height and addj_rr_x1M. vbi = (NvU32)(((NvU64)height * (NvU64)act_v_blank_time * (NvU64)adj_rr_x1M) / ((NvU64)1000000000000 - (NvU64)act_v_blank_time * (NvU64)adj_rr_x1M)); // ROUNDUP if (((NvU64)height * (NvU64)act_v_blank_time * (NvU64)adj_rr_x1M) % ((NvU64)1000000000000 - (NvU64)act_v_blank_time * (NvU64)adj_rr_x1M) !=0) vbi += 1; - // 7 Determine whether idealized VBlank is sufficient and calculate the actual number of lines in the VBlank period: - // RB_MIN_VBI = C_RB_V_FPORCH + C_V_SYNC_RND + C_MIN_V_BPORCH + // 8 Determine whether idealized VBlank is sufficient and calculate the actual number of lines in the VBlank period: + // RB_MIN_VBI = C_RB_MIN_V_FPORCH + C_V_SYNC_RND + C_MIN_V_BPORCH // V_BLANK = IF(VBI_LINES < RB_MIN_VBI, RB_MIN_VBI, VBI_LINES) - // Paameters mapping: - // - C_RB_V_FPORCH == 1 - // - C_V_SYNC_RND == 8 - // - C_MIN_V_BPORCH == 6 - // - V_BLANK == "act_v_blank_lines" + // Parameters mapping: + // - C_RB_MIN_V_FPORCH == 1 + // - C_V_SYNC_RND == 8 + // - C_MIN_V_BPORCH == 6 + // - V_BLANK == "act_v_blank_lines" // NVT_CVT_RB3_MIN_VBI == 1 + 8 + 6 = 15 act_v_blank_lines = MAX(vbi, NVT_CVT_RB3_MIN_VBI); - // 8 Calculate the total number of vertical lines: + // 9 Calculate the total number of vertical lines: // TOTAL_V_LINES = V_BLANK + V_LINES_RND total_v_lines = act_v_blank_lines + height; - // 9 Calculate the vertical back porch: - // V_BACK_PORCH = IF(AND(I_RED_BLANK_VER=3, I_EARLY_VSYNC_RQD?="Y"), ROUNDDOWN(VBI_LINES / 2, 0), C_MIN_V_BPORCH) - - // Paameters mapping: + // 10 Calculate the estimated vertical back porch, determine whether the remaining vertical front porch is greater than the + // minimum vertical front porch (C_RB_MIN_V_FPORCH), and if not, reduce the estimated vertical back porch to reserve VBlank lines for the vertical front porch: + // V_BACK_PORCH_EST = IF(AND(I_RED_BLANK_VER=3,I_EARLY_VSYNC_RQD?="Y"), ROUNDDOWN(VBI_LINES / 2, 0), C_MIN_V_BPORCH) + // V_BACK_PORCH = IF(AND(I_RED_BLANK_VER=3, I_EARLY_VSYNC_RQD?="Y"), + // IF(VBLANK – V_BACK_PORCH_EST – C_V_SYNC_RND < C_RB_MIN_V_FPORCH, V_BLANK – C_V_SYNC_RND – C_RB_MIN_V_FPORCH, V_BACK_PORCH_EST), + // V_BACK_PORCH_EST) + + // Parameters mapping: + // - V_BACK_PORCH_EST == "(VBI_LINES / 2) // - V_BACK_PORCH == "v_back_porch" - // - I_RED_BLANK_VER == "3" this is for RB3 function so the value is 3 + // - I_RED_BLANK_VER == "3" this is for RB3 function so the value is 3 // - I_EARLY_VSYNC_RQD == "isEarlyVSync" - // - C_MIN_V_BPORCH == 6 + // - C_V_SYNC_RND == NVT_CVT_RB3_V_SYNC_WIDTH == 8 + // - C_RB_MIN_V_FPORCH == NVT_CVT_RB3_MIN_V_FPORCH == 1 + // - C_MIN_V_BPORCH == NVT_CVT_RB3_MIN_V_BPROCH == 6 if (isEarlyVSync) - v_back_porch = vbi / 2; - // v_back_porch = act_v_blank_lines /2 ; - else + { + v_back_porch_est = vbi / 2; + if ((act_v_blank_lines - v_back_porch_est - NVT_CVT_RB3_V_SYNC_WIDTH) < NVT_CVT_RB3_MIN_V_FPORCH) + v_back_porch = act_v_blank_lines - NVT_CVT_RB3_V_SYNC_WIDTH - NVT_CVT_RB3_MIN_V_FPORCH; + else + v_back_porch = v_back_porch_est; + } + else v_back_porch = NVT_CVT_RB3_MIN_V_BPROCH; - // 10 Calculate the vertical front porch: + // 11 Calculate the vertical front porch: // V_FRONT_PORCH = V_BLANK – V_BACK_PORCH – C_V_SYNC_RND - // we directly use this to assign as pT->VFrontPorch value in NVT_TIMING + // pT->VFrontPorch = (NvU16)(act_v_blank_lines - NVT_CVT_RB3_V_SYNC_WIDTH - v_back_porch); - // 11 Calculate the total number of pixels per line: - // TOTAL_PIXELS = TOTAL_ACTIVE_PIXELS + C_RB_H_BLANK + IF(I_RED_BLANK_VER=3, I_ADDITIONAL_HBLANK, 0) + // 12 Calculate the total number of pixels per line: + // TOTAL_PIXELS = TOTAL_ACTIVE_PIXELS + C_RB_MIN_H_BLANK + IF(I_RED_BLANK_VER=3, I_ADDITIONAL_HBLANK, 0) // Parameters mapping: - // - C_RB_H_BLANK == 80 - // - I_ADDITIONAL_HBLANK == deltaHBlank scopes are defined in the TypeX in displayId2.1 - // 80 <= HBlank <=200 is a valid scope - total_pixels = width + deltaHBlank + 80; + // - C_RB_MIN_H_BLANK == NVT_CVT_RB3_H_BLANK_PIXELS == 80 + // - I_ADDITIONAL_HBLANK == deltaHBlank scopes are defined in the TypeX in displayId2.1a + // 80 <= HBlank <= 200 is a valid scope + total_pixels = width + NVT_CVT_RB3_H_BLANK_PIXELS + deltaHBlank; - // 12 Calculate the horizontal back porch: - // H_BACK_PORCH = C_RB_H_BLANK + IF(I_RED_BLANK_VER=3, I_ADDITIONAL_HBLANK, 0) – C_H_FRONT_PORCH – C_RB_H_SYNC + // 13 Calculate the horizontal back porch: + // H_BACK_PORCH = C_RB_MIN_H_BLANK + IF(I_RED_BLANK_VER=3, I_ADDITIONAL_HBLANK, 0) – C_H_FRONT_PORCH – C_RB_H_SYNC // NVT_TIMING did not need to store H_BACK_PORCH - + // sanity check just in case of bad edid where the timing value could exceed the limit of NVT_TIMING structure which unfortunately is defined in NvU16 if (total_pixels > (NvU16)-1 || total_v_lines > (NvU16)-1) return NVT_STATUS_INVALID_PARAMETER; - - // 13 Calculate the pixel clock frequency to the nearest C_CLOCK_STEP (MHz): + + // 14 Calculate the pixel clock frequency to the nearest C_CLOCK_STEP (MHz): // ACT_PIXEL_FREQ = C_CLOCK_STEP * ROUNDUP((V_FIELD_RATE_RQD * TOTAL_V_LINES * TOTAL_PIXELS / 1000000 * 1) / C_CLOCK_STEP, 0)) - + // Parameters mapping: // - ACT_PIXEL_FREQ == "act_pixel_freq_hz" // - C_CLOCK_STEP == "NVT_CVT_RB3_CLOCK_STEP_KHZ" == 1000 @@ -558,17 +598,17 @@ NVT_STATUS NvTiming_CalcCVT_RB3(NvU32 width, NvU32 height, NvU32 rr, NvU32 delta act_pixel_freq_khz = (NvU32)(act_pixel_freq_hz / NVT_CVT_RB3_CLOCK_STEP_KHZ); // kHz ROUNDUP - if ((act_pixel_freq_hz % 1000) != 0) + if ((act_pixel_freq_hz % 1000) != 0) act_pixel_freq_khz += 1; pT->HVisible = (NvU16)width; pT->HTotal = (NvU16)total_pixels; - pT->HFrontPorch = NVT_CVT_RB3_H_FPORCH; + pT->HFrontPorch = NVT_CVT_RB3_H_FPORCH; pT->HSyncWidth = NVT_CVT_RB3_H_SYNC_PIXELS; pT->VVisible = (NvU16)height; pT->VTotal = (NvU16)total_v_lines; pT->VSyncWidth = NVT_CVT_RB3_V_SYNC_WIDTH; - pT->VFrontPorch = (NvU16)(act_v_blank_lines - NVT_CVT_RB2_V_SYNC_WIDTH - v_back_porch); + pT->VFrontPorch = (NvU16)(act_v_blank_lines - NVT_CVT_RB3_V_SYNC_WIDTH - v_back_porch); pT->pclk = ((NvU32)act_pixel_freq_khz + 5) / 10; //convert to 10Khz pT->HSyncPol = NVT_H_SYNC_POSITIVE; pT->VSyncPol = NVT_V_SYNC_NEGATIVE; @@ -578,7 +618,7 @@ NVT_STATUS NvTiming_CalcCVT_RB3(NvU32 width, NvU32 height, NvU32 rr, NvU32 delta // fill in the extra timing info pT->etc.flag = 0; pT->etc.rr = (NvU16)rr; - pT->etc.rrx1k = (NvU32)axb_div_c_64((NvU64)pT->pclk, (NvU64)10000 * (NvU64)1000, (NvU64)pT->HTotal*(NvU64)pT->VTotal); + pT->etc.rrx1k = (NvU32)axb_div_c_64((NvU64)act_pixel_freq_khz, (NvU64)1000 * (NvU64)1000, (NvU64)pT->HTotal*(NvU64)pT->VTotal); pT->etc.aspect = 0; pT->etc.rep = 0x1; NVT_SNPRINTF((char *)pT->etc.name, 40, "CVT-RB3:%dx%dx%dHz", width, height, rr); diff --git a/src/common/modeset/timing/nvt_displayid20.c b/src/common/modeset/timing/nvt_displayid20.c index 357f273af2..9ae3cc86e6 100644 --- a/src/common/modeset/timing/nvt_displayid20.c +++ b/src/common/modeset/timing/nvt_displayid20.c @@ -1,6 +1,6 @@ //***************************************************************************** // -// SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +// SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. // SPDX-License-Identifier: MIT // // Permission is hereby granted, free of charge, to any person obtaining a @@ -819,6 +819,15 @@ parseDisplayId20Timing10( return NVT_STATUS_ERR; } } + else if (pTiming10Block->header.payload_bytes_len == DISPLAYID_2_1_TIMING_10_PAYLOAD_BYTES_8) + { + descriptorCount = pDataBlock->data_bytes / sizeof(DISPLAYID_2_1_TIMING_10_8BYTES_DESCRIPTOR); + + if (descriptorCount < 1 || descriptorCount > DISPLAYID_2_1_TIMING_10_MAX_8BYTES_DESCRIPTORS) + { + return NVT_STATUS_ERR; + } + } eachOfDescriptorsSize += pTiming10Block->header.payload_bytes_len; @@ -842,7 +851,7 @@ parseDisplayId20Timing10( UPDATE_BPC_FOR_COLORFORMAT(newTiming.etc.yuv420, 0, 1, 1, 1, 0, 1); } - if (p6bytesDescriptor->options.timing_formula == DISPLAYID_2_0_TIMING_FORMULA_CVT_1_2_STANDARD) + if (p6bytesDescriptor->options.timing_formula == DISPLAYID_2_0_TIMING_FORMULA_CVT_1_2_STANDARD_CRT_BASED) { NVT_SNPRINTF((char *)newTiming.etc.name, sizeof(newTiming.etc.name), "DID20-Type10:#%3d:%dx%dx%3d.%03dHz/%s", (int)NVT_GET_TIMING_STATUS_SEQ(newTiming.etc.status), @@ -1720,14 +1729,14 @@ parseDisplayId20Timing9Descriptor( switch (pDescriptor->options.timing_formula) { - case DISPLAYID_2_0_TIMING_FORMULA_CVT_1_2_STANDARD: + case DISPLAYID_2_0_TIMING_FORMULA_CVT_1_2_STANDARD_CRT_BASED: status = NvTiming_CalcCVT(width, height, rr, NVT_PROGRESSIVE, pTiming); break; case DISPLAYID_2_0_TIMING_FORMULA_CVT_1_2_REDUCED_BLANKING_1: status = NvTiming_CalcCVT_RB(width, height, rr, NVT_PROGRESSIVE, pTiming); break; - case DISPLAYID_2_0_TIMING_FORMULA_CVT_2_0_REDUCED_BLANKING_2: - status = NvTiming_CalcCVT_RB2(width, height, rr, pDescriptor->options.rr_1000div1001_support, pTiming); + case DISPLAYID_2_0_TIMING_FORMULA_CVT_2_1_REDUCED_BLANKING_2: + status = NvTiming_CalcCVT_RB2(width, height, rr, pDescriptor->options.rr_1000div1001_support, NV_FALSE, pTiming); break; default: { @@ -1742,7 +1751,7 @@ parseDisplayId20Timing9Descriptor( NVMISC_MEMSET(pTiming->etc.name, 0, sizeof(pTiming->etc.name)); pTiming->etc.status = NVT_STATUS_DISPLAYID_9N(++count); - if (pDescriptor->options.timing_formula == DISPLAYID_2_0_TIMING_FORMULA_CVT_1_2_STANDARD) + if (pDescriptor->options.timing_formula == DISPLAYID_2_0_TIMING_FORMULA_CVT_1_2_STANDARD_CRT_BASED) { NVT_SNPRINTF((char *)pTiming->etc.name, sizeof(pTiming->etc.name), "DID20-Type9:#%3d:%dx%dx%3d.%03dHz/%s", (int)NVT_GET_TIMING_STATUS_SEQ(pTiming->etc.status), @@ -1781,6 +1790,7 @@ parseDisplayId20Timing10Descriptor( NVT_STATUS status = NVT_STATUS_SUCCESS; const DISPLAYID_2_0_TIMING_10_6BYTES_DESCRIPTOR* p6bytesDescriptor = NULL; const DISPLAYID_2_0_TIMING_10_7BYTES_DESCRIPTOR* p7bytesDescriptor = NULL; + const DISPLAYID_2_1_TIMING_10_8BYTES_DESCRIPTOR* p8bytesDescriptor = NULL; NvU32 width = 0; NvU32 height = 0; NvU32 rr = 0; @@ -1796,21 +1806,37 @@ parseDisplayId20Timing10Descriptor( p7bytesDescriptor = (const DISPLAYID_2_0_TIMING_10_7BYTES_DESCRIPTOR *)pDescriptor; rr = (p7bytesDescriptor->descriptor_6_bytes.refresh_rate | p7bytesDescriptor->refresh_rate_high << 8) + 1; } + else if (payloadBytes == DISPLAYID_2_1_TIMING_10_PAYLOAD_BYTES_8) + { + p8bytesDescriptor = (const DISPLAYID_2_1_TIMING_10_8BYTES_DESCRIPTOR *)pDescriptor; + rr = (p8bytesDescriptor->descriptor_7_bytes.descriptor_6_bytes.refresh_rate | + p8bytesDescriptor->descriptor_7_bytes.refresh_rate_high << 8) + 1; + } switch (p6bytesDescriptor->options.timing_formula) { - case DISPLAYID_2_0_TIMING_FORMULA_CVT_1_2_STANDARD: + case DISPLAYID_2_0_TIMING_FORMULA_CVT_1_2_STANDARD_CRT_BASED: status = NvTiming_CalcCVT(width, height, rr, NVT_PROGRESSIVE, pTiming); break; case DISPLAYID_2_0_TIMING_FORMULA_CVT_1_2_REDUCED_BLANKING_1: status = NvTiming_CalcCVT_RB(width, height, rr, NVT_PROGRESSIVE, pTiming); break; - case DISPLAYID_2_0_TIMING_FORMULA_CVT_2_0_REDUCED_BLANKING_2: - status = NvTiming_CalcCVT_RB2(width, height, rr, p6bytesDescriptor->options.rr1000div1001_or_hblank, pTiming); + case DISPLAYID_2_0_TIMING_FORMULA_CVT_2_1_REDUCED_BLANKING_2: + if (p8bytesDescriptor != NULL) + { + status = NvTiming_CalcCVT_RB2(width, height, rr, p6bytesDescriptor->options.rr1000div1001_or_hblank, p8bytesDescriptor->additional_mini_vblank, pTiming); + } + else + { + status = NvTiming_CalcCVT_RB2(width, height, rr, p6bytesDescriptor->options.rr1000div1001_or_hblank, NV_FALSE, pTiming); + } + break; - case DISPLAYID_2_0_TIMING_FORMULA_CVT_2_0_REDUCED_BLANKING_3: + case DISPLAYID_2_0_TIMING_FORMULA_CVT_2_1_REDUCED_BLANKING_3: { NvU32 deltaHBlank = 0; + NvU32 multiplier = DISPLAYID_2_0_TIMING_10_NOMINAL_MINIMUM_VBLANK; + if (p7bytesDescriptor != NULL) { if (p6bytesDescriptor->options.rr1000div1001_or_hblank == 0) // Horizontal Blank in Pixels = [Field Value] * 8 + 80 @@ -1825,14 +1851,49 @@ parseDisplayId20Timing10Descriptor( deltaHBlank = (160 - ((p7bytesDescriptor->delta_hblank - 5) * 8)) - 80; } - status = NvTiming_CalcCVT_RB3(width, height, rr, deltaHBlank, p7bytesDescriptor->additional_vblank_timing * 35, p6bytesDescriptor->options.early_vsync, pTiming); + status = NvTiming_CalcCVT_RB3(width, + height, + rr, + deltaHBlank, + p7bytesDescriptor->additional_vblank_timing * multiplier, + 0, + p6bytesDescriptor->options.early_vsync, + pTiming); + + } + else if (p8bytesDescriptor != NULL) + { + if (p6bytesDescriptor->options.rr1000div1001_or_hblank == 0) // Horizontal Blank in Pixels = [Field Value] * 8 + 80 + { + deltaHBlank = p8bytesDescriptor->descriptor_7_bytes.delta_hblank * 8; + } + else if (p6bytesDescriptor->options.rr1000div1001_or_hblank == 1) + { + if (p8bytesDescriptor->descriptor_7_bytes.delta_hblank <= 5) + deltaHBlank = (p8bytesDescriptor->descriptor_7_bytes.delta_hblank * 8 + 160) - 80; + else // if 5 < Field Value <=7 + deltaHBlank = (160 - ((p8bytesDescriptor->descriptor_7_bytes.delta_hblank - 5) * 8)) - 80; + } + + if (p8bytesDescriptor->additional_mini_vblank == 1) + multiplier = DISPLAYID_2_1_TIMING_10_ALTERNATE_MINIMUM_VBLANK; + + status = NvTiming_CalcCVT_RB3(width, + height, + rr, + deltaHBlank, + p8bytesDescriptor->descriptor_7_bytes.additional_vblank_timing * multiplier, + p8bytesDescriptor->additional_mini_vblank, + p6bytesDescriptor->options.early_vsync, + pTiming); } else // 6 bytes descriptor { + // just assign the HBlank 80pixel but actually HBlank is 160 in DisplayId2.1a spec if (p6bytesDescriptor->options.rr1000div1001_or_hblank == 1) deltaHBlank = 80; - status = NvTiming_CalcCVT_RB3(width, height, rr, deltaHBlank, 0, p6bytesDescriptor->options.early_vsync, pTiming); + status = NvTiming_CalcCVT_RB3(width, height, rr, deltaHBlank, 0, 0, p6bytesDescriptor->options.early_vsync, pTiming); } } break; diff --git a/src/common/modeset/timing/nvt_dsc_pps.c b/src/common/modeset/timing/nvt_dsc_pps.c index e1bba89b67..cedc94cc55 100644 --- a/src/common/modeset/timing/nvt_dsc_pps.c +++ b/src/common/modeset/timing/nvt_dsc_pps.c @@ -101,6 +101,7 @@ typedef struct NvU32 native_420; // 420 native mode NvU32 native_422; // 422 native mode NvU32 drop_mode; // 0 - normal mode, 1 - drop mode. + NvU32 multi_tile; // 1 = Multi-tile architecture, 0 = dsc single or dual mode without multi-tile NvU32 peak_throughput_mode0; // peak throughput supported by the sink for 444 and simple 422 modes. NvU32 peak_throughput_mode1; // peak throughput supported by the sink for native 422 and 420 modes. } DSC_INPUT_PARAMS; @@ -996,19 +997,27 @@ DSC_PpsCalcBase out->block_pred_enable = in->block_pred_enable ? 1 : 0; ENUM2_CHECK("convert_rgb", in->convert_rgb, 0, 1); out->convert_rgb = in->convert_rgb ? 1 : 0; - RANGE_CHECK("pic_height", in->pic_height, 8, 8192); - out->pic_height = in->pic_height; - if (in->dual_mode) + if (in->multi_tile) { - RANGE_CHECK("pic_width", in->pic_width, 64, 8192); + RANGE_CHECK("pic_width", in->pic_width, 64, 16384); + RANGE_CHECK("pic_height", in->pic_height, 8, 16384); } else { - RANGE_CHECK("pic_width", in->pic_width, 32, 5120); + RANGE_CHECK("pic_height", in->pic_height, 8, 8192); + if (in->dual_mode) + { + RANGE_CHECK("pic_width", in->pic_width, 64, 8192); + } + else + { + RANGE_CHECK("pic_width", in->pic_width, 32, 5120); + } } - out->pic_width = in->pic_width; + out->pic_height = in->pic_height; + out->pic_width = in->pic_width; out->simple_422 = in->simple_422; out->vbr_enable = 0; out->native_420 = in->native_420; @@ -2353,6 +2362,7 @@ DSC_GeneratePPS NvU32 minSliceCount = (NvU32)NV_CEIL(pModesetInfo->pixelClockHz, (MAX_PCLK_PER_SLICE_KHZ * 1000U)); NvU32 sliceWidth; NvU32 i; + NvU64 dataRate; if ((minSliceCount > 2U) &&(minSliceCount < 4U)) { @@ -2380,7 +2390,8 @@ DSC_GeneratePPS dscOverhead = minSliceCount * 2U; - if ((pWARData->dpData.hBlank * pWARData->dpData.linkRateHz / pModesetInfo->pixelClockHz) < + dataRate = pWARData->dpData.linkRateHz; + if ((pWARData->dpData.hBlank * dataRate / pModesetInfo->pixelClockHz) < (protocolOverhead + dscOverhead + 3U)) { // @@ -2501,6 +2512,7 @@ DSC_GeneratePPS in->pixel_clkMHz = (NvU32)(pModesetInfo->pixelClockHz / 1000000L); in->dual_mode = pModesetInfo->bDualMode; in->drop_mode = pModesetInfo->bDropMode; + in->multi_tile = (pDscInfo->gpuCaps.maxNumHztSlices > 4U) ? 1 : 0; in->slice_count_mask = pDscInfo->sinkCaps.sliceCountSupportedMask; in->peak_throughput_mode0 = pDscInfo->sinkCaps.peakThroughputMode0; in->peak_throughput_mode1 = pDscInfo->sinkCaps.peakThroughputMode1; diff --git a/src/common/modeset/timing/nvt_dsc_pps.h b/src/common/modeset/timing/nvt_dsc_pps.h index 070dcb9982..a86b85d148 100644 --- a/src/common/modeset/timing/nvt_dsc_pps.h +++ b/src/common/modeset/timing/nvt_dsc_pps.h @@ -257,7 +257,7 @@ typedef struct } WAR_DATA; typedef struct { - NvU8 data[492U]; // total size of DSC_IN/OUTPUT_PARAMS + NvU8 data[496U]; // total size of DSC_IN/OUTPUT_PARAMS } DSC_GENERATE_PPS_OPAQUE_WORKAREA; /* diff --git a/src/common/modeset/timing/nvt_edidext_861.c b/src/common/modeset/timing/nvt_edidext_861.c index 5848eae79c..474966050f 100644 --- a/src/common/modeset/timing/nvt_edidext_861.c +++ b/src/common/modeset/timing/nvt_edidext_861.c @@ -1,6 +1,6 @@ //***************************************************************************** // -// SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +// SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. // SPDX-License-Identifier: MIT // // Permission is hereby granted, free of charge, to any person obtaining a @@ -4035,7 +4035,7 @@ void parseCta861DIDType10VideoTimingDataBlock(NVT_EDID_CEA861_INFO *pExt861, voi pInfo->hdmiForumInfo.dc_48bit_420); } - if (p6bytesDescriptor->options.timing_formula == DISPLAYID_2_0_TIMING_FORMULA_CVT_1_2_STANDARD) + if (p6bytesDescriptor->options.timing_formula == DISPLAYID_2_0_TIMING_FORMULA_CVT_1_2_STANDARD_CRT_BASED) { NVT_SNPRINTF((char *)newTiming.etc.name, sizeof(newTiming.etc.name), "CTA861-T10:#%3d:%dx%dx%3d.%03dHz/%s", (int)NVT_GET_TIMING_STATUS_SEQ(newTiming.etc.status), diff --git a/src/common/modeset/timing/nvt_edidext_displayid.c b/src/common/modeset/timing/nvt_edidext_displayid.c index 5d9a61a5b1..4dc07f3295 100644 --- a/src/common/modeset/timing/nvt_edidext_displayid.c +++ b/src/common/modeset/timing/nvt_edidext_displayid.c @@ -832,7 +832,7 @@ static NVT_STATUS parseDisplayIdTiming5Descriptor(DISPLAYID_TIMING_5_DESCRIPTOR width = ((desc->horizontal_active_pixels_high << 8) | desc->horizontal_active_pixels_low) + 1; height = ((desc->vertical_active_pixels_high << 8) | desc->vertical_active_pixels_low) + 1; rr = desc->refresh_rate + 1; - return NvTiming_CalcCVT_RB2(width, height, rr, is1000div1001, pT); + return NvTiming_CalcCVT_RB2(width, height, rr, is1000div1001, NV_FALSE, pT); } CODE_SEGMENT(PAGE_DD_CODE) diff --git a/src/common/modeset/timing/nvtiming.h b/src/common/modeset/timing/nvtiming.h index 3cc671c00b..1c9782392c 100644 --- a/src/common/modeset/timing/nvtiming.h +++ b/src/common/modeset/timing/nvtiming.h @@ -1,6 +1,6 @@ //**************************************************************************** // -// SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +// SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. // SPDX-License-Identifier: MIT // // Permission is hereby granted, free of charge, to any person obtaining a @@ -42,7 +42,7 @@ // Nvidia specific timing extras typedef struct tagNVT_HDMIEXT { - // in the case of stereo, the NVT_TIMING structure will hold the 2D + // in the case of stereo, the NVT_TIMING structure will hold the 2D // instance of the timing parameters, and the stereo extension will // contain the variants required to produce the stereo frame. NvU8 StereoStructureType; @@ -160,8 +160,8 @@ typedef struct tagNVT_TIMINGEXT // verical V | | | | | | | // total --+-------------------------+ | | | | | // : vb border | | | | | -// : -----------------------------------+ | | | | -// : vfp front porch | | | | +// : -----------------------------------+ | | | | +// : vfp front porch | | | | // : -------------------------------------------+ | | | // : vsw sync width | | | // : ---------------------------------------------------+ | | @@ -173,8 +173,8 @@ typedef struct tagNVT_TIMINGEXT typedef struct tagNVT_TIMING { // VESA scan out timing parameters: - NvU16 HVisible; //horizontal visible - NvU16 HBorder; //horizontal border + NvU16 HVisible; //horizontal visible + NvU16 HBorder; //horizontal border NvU16 HFrontPorch; //horizontal front porch NvU16 HSyncWidth; //horizontal sync width NvU16 HTotal; //horizontal total @@ -186,12 +186,12 @@ typedef struct tagNVT_TIMING NvU16 VSyncWidth; //vertical sync width NvU16 VTotal; //vertical total NvU8 VSyncPol; //vertical sync polarity: 1-negative, 0-positive - + NvU16 interlaced; //1-interlaced, 0-progressive NvU32 pclk; //pixel clock in 10KHz //other timing related extras - NVT_TIMINGEXT etc; + NVT_TIMINGEXT etc; }NVT_TIMING; #define NVT_MAX_TOTAL_TIMING 128 @@ -217,8 +217,8 @@ typedef struct tagNVT_TIMING #define NVT_FRAME_HEIGHT(_vvisible_, _interlaced_) ((_vvisible_) * ((_interlaced_ != 0) ? 2 : 1)) //************************************* -// The Timing Status encoded in -// NVT_TIMING::NVT_TIMINGEXT::status +// The Timing Status encoded in +// NVT_TIMING::NVT_TIMINGEXT::status //************************************* // // TIMING_STATUS has the following kinds of info: @@ -234,13 +234,13 @@ typedef struct tagNVT_TIMING #define NVT_STATUS_TIMING_NATIVE_FLAG_MASK 0x80000000 #define NVT_STATUS_TIMING_NATIVE_FLAG_SHIFT 31 #define NVT_IS_NATIVE_TIMING(n) (((n)&NVT_STATUS_TIMING_NATIVE_FLAG_MASK)>>NVT_STATUS_TIMING_NATIVE_FLAG_SHIFT) -#define NVT_SET_NATIVE_TIMING_FLAG(n) ((n)|=1U<< NVT_STATUS_TIMING_NATIVE_FLAG_SHIFT) +#define NVT_SET_NATIVE_TIMING_FLAG(n) ((n)|=1U<< NVT_STATUS_TIMING_NATIVE_FLAG_SHIFT) #define NVT_PREFERRED_TIMING_MODE_MASK 0x2 // #define NVT_STATUS_TIMING_CUST_ENTRY_MASK 0x40000000 #define NVT_STATUS_TIMING_CUST_ENTRY_SHIFT 30 #define NVT_IS_CUST_ENTRY(n) (((n)&NVT_STATUS_TIMING_CUST_ENTRY_MASK)>>NVT_STATUS_TIMING_CUST_ENTRY_SHIFT) -#define NVT_SET_CUST_ENTRY_FLAG(n) ((n)|=1<>NVT_STATUS_TIMING_TYPE_SHIFT #define NVT_GET_TIMING_STATUS_SEQ(n) ((n)&NVT_STATUS_TIMING_SEQ_MASK) @@ -559,7 +559,7 @@ typedef enum NVT_TV_FORMAT #define NVT_CTA861_VIDEO_NATIVE_MASK 0x80 //the Native mask of the short video descriptor #define NVT_HDMI_YUV_420_PCLK_SUPPORTED_MIN 59000 //the vale shall equal or larger than 590MHz to support YCbCr in HDMI2.1 -// CTA-861G supports more SVDs which is over 0x7F index +// CTA-861G supports more SVDs which is over 0x7F index // All value below 192 will be treated as 7 bit VIC. Value 128~192 shall be forbidden. #define NVT_GET_CTA_8BIT_VIC(vic) (((vic) <= NVT_CTA861_7BIT_8BIT_SEPARATE_VALUE) ? ((vic) & NVT_CTA861_7BIT_VIDEO_VIC_MASK) : ((vic) & NVT_CTA861_VIDEO_VIC_MASK)) // @@ -567,8 +567,8 @@ typedef enum NVT_TV_FORMAT // According to CEA-861-E Spec. // Note 3. A video timing with a vertical frequency that is an integer multiple // of 6.00 Hz (i.e. 24.00, 30.00, 60.00, 120.00 or 240.00 Hz) is considered to -// be the same as a video timing with the equivalent detailed timing -// information but where the vertical frequency is adjusted by a factor of +// be the same as a video timing with the equivalent detailed timing +// information but where the vertical frequency is adjusted by a factor of // 1000/1001 (i.e., 24/1.001, 30/1.001, 60/1.001, 120/1.001 or 240/1.001). // Excluding ceaIndex 1 640x480 which is a PC Mode. #define NVT_CTA861_TIMING_FRR(_VID_, _RR_) ((_VID_) > 1 && ((_RR_) % 6) == 0) @@ -682,7 +682,7 @@ typedef enum NVT_TV_FORMAT #define NVT_CEA861_4096X2160P_50000HZ_64X27 106 #define NVT_CEA861_4096X2160P_59940HZ_64X27 107 -// Following modes are from CTA-861G +// Following modes are from CTA-861G #define NVT_CTA861_1280X720P_47950HZ_16X9 108 #define NVT_CTA861_1280X720P_47950HZ_64x27 109 #define NVT_CTA861_1680X720P_47950HZ_64x27 110 @@ -706,39 +706,39 @@ typedef enum NVT_TV_FORMAT #define NVT_CTA861_7BIT_8BIT_SEPARATE_VALUE 192 -#define NVT_CTA861_5120x2160p_119880HZ_64X276 193 -#define NVT_CTA861_7680x4320p_23980HZ_16X9 194 -#define NVT_CTA861_7680x4320p_25000HZ_16X9 195 -#define NVT_CTA861_7680x4320p_29970HZ_16X9 196 -#define NVT_CTA861_7680x4320p_47950HZ_16X9 197 -#define NVT_CTA861_7680x4320p_50000HZ_16X9 198 -#define NVT_CTA861_7680x4320p_59940HZ_16X9 199 -#define NVT_CTA861_7680x4320p_100000HZ_16X9 200 -#define NVT_CTA861_7680x4320p_119880HZ_16X9 201 -#define NVT_CTA861_7680x4320p_23980HZ_64X276 202 -#define NVT_CTA861_7680x4320p_25000HZ_64X276 203 -#define NVT_CTA861_7680x4320p_29970HZ_64X276 204 -#define NVT_CTA861_7680x4320p_47950HZ_64X276 205 -#define NVT_CTA861_7680x4320p_50000HZ_64X276 206 -#define NVT_CTA861_7680x4320p_59940HZ_64X276 207 -#define NVT_CTA861_7680x4320p_100000HZ_64X276 208 -#define NVT_CTA861_7680x4320p_119880HZ_64X276 209 -#define NVT_CTA861_10240x4320p_23980HZ_64X276 210 -#define NVT_CTA861_10240x4320p_25000HZ_64X276 211 -#define NVT_CTA861_10240x4320p_29970HZ_64X276 212 -#define NVT_CTA861_10240x4320p_47950HZ_64X276 213 -#define NVT_CTA861_10240x4320p_50000HZ_64X276 214 -#define NVT_CTA861_10240x4320p_59940HZ_64X276 215 -#define NVT_CTA861_10240x4320p_100000HZ_64X276 216 -#define NVT_CTA861_10240x4320p_119880HZ_64X276 217 -#define NVT_CTA861_4096x2160p_100000HZ_256X135 218 -#define NVT_CTA861_4096x2160p_119880HZ_256X135 219 +#define NVT_CTA861_5120x2160p_119880HZ_64X276 193 +#define NVT_CTA861_7680x4320p_23980HZ_16X9 194 +#define NVT_CTA861_7680x4320p_25000HZ_16X9 195 +#define NVT_CTA861_7680x4320p_29970HZ_16X9 196 +#define NVT_CTA861_7680x4320p_47950HZ_16X9 197 +#define NVT_CTA861_7680x4320p_50000HZ_16X9 198 +#define NVT_CTA861_7680x4320p_59940HZ_16X9 199 +#define NVT_CTA861_7680x4320p_100000HZ_16X9 200 +#define NVT_CTA861_7680x4320p_119880HZ_16X9 201 +#define NVT_CTA861_7680x4320p_23980HZ_64X276 202 +#define NVT_CTA861_7680x4320p_25000HZ_64X276 203 +#define NVT_CTA861_7680x4320p_29970HZ_64X276 204 +#define NVT_CTA861_7680x4320p_47950HZ_64X276 205 +#define NVT_CTA861_7680x4320p_50000HZ_64X276 206 +#define NVT_CTA861_7680x4320p_59940HZ_64X276 207 +#define NVT_CTA861_7680x4320p_100000HZ_64X276 208 +#define NVT_CTA861_7680x4320p_119880HZ_64X276 209 +#define NVT_CTA861_10240x4320p_23980HZ_64X276 210 +#define NVT_CTA861_10240x4320p_25000HZ_64X276 211 +#define NVT_CTA861_10240x4320p_29970HZ_64X276 212 +#define NVT_CTA861_10240x4320p_47950HZ_64X276 213 +#define NVT_CTA861_10240x4320p_50000HZ_64X276 214 +#define NVT_CTA861_10240x4320p_59940HZ_64X276 215 +#define NVT_CTA861_10240x4320p_100000HZ_64X276 216 +#define NVT_CTA861_10240x4320p_119880HZ_64X276 217 +#define NVT_CTA861_4096x2160p_100000HZ_256X135 218 +#define NVT_CTA861_4096x2160p_119880HZ_256X135 219 // When defining new CEA861 format: // Search code base to update array of certain category of CEA formats, such as 720p, 1080i, etc... -// Ideally, it's better to define these groups in one module. However, they should not reside +// Ideally, it's better to define these groups in one module. However, they should not reside // in this .h file, thus updating these groups in other file is still needed. -// example of the group: 720p: NVT_CEA861_1280X720P_59940HZ_16X9, +// example of the group: 720p: NVT_CEA861_1280X720P_59940HZ_16X9, // NVT_CEA861_1280X720P_100000HZ_16X9, // NVT_CEA861_1280X720P_119880HZ_16X9 @@ -811,7 +811,7 @@ typedef enum NVT_TV_FORMAT (NVT_CEA861_MAX_PAYLOAD % NVT_CEA861_SD_TOTAL_SIZE - NVT_CEA861_SD_HEADER_SIZE) / NVT_CEA861_AUDIO_SD_SIZE) // // short audio descriptor - byte 1 -#define NVT_CEA861_AUDIO_FORMAT_MASK 0x78 //the audio format mask of the CEA short +#define NVT_CEA861_AUDIO_FORMAT_MASK 0x78 //the audio format mask of the CEA short #define NVT_CEA861_AUDIO_FORMAT_SHIFT 3 //the audio format data shift // #define NVT_CEA861_AUDIO_FORMAT_RSVD 0 // short audio descriptor format - reserved @@ -924,13 +924,13 @@ typedef struct VSVDB_DATA typedef struct tagNVT_RID_CODES { - NvU16 HVisible; // horizontal visible + NvU16 HVisible; // horizontal visible NvU8 HSyncPol; // horizontal sync polarity: 1-negative, 0-positive - NvU16 VVisible; // vertical visible - NvU8 VSyncPol; // vertical sync polarity: 1-negative, 0-positive - NvU16 interlaced; // 1-interlaced, 0-progressive + NvU16 VVisible; // vertical visible + NvU8 VSyncPol; // vertical sync polarity: 1-negative, 0-positive + NvU16 interlaced; // 1-interlaced, 0-progressive NvU32 aspect; // the display aspect ratio Hi(aspect):horizontal-aspect, Low(aspect):vertical-aspect - NvU8 rid; // Resolution Identification (RID) + NvU8 rid; // Resolution Identification (RID) } NVT_RID_CODES; #pragma pack(1) @@ -969,7 +969,7 @@ typedef struct tagVFDB_DATA NvU8 f22_25 : 4; NvU8 ntsc : 1; NvU8 y420 : 1; - } info; + } info; NvU8 total_vfd; NvU8 video_format_desc[NVT_CTA861_VF_MAX_DESCRIPTORS]; @@ -1074,7 +1074,7 @@ typedef struct tagNVT_DV_STATIC_METADATA_TYPE1_1 //sixth byte NvU8 unique_Ry_bit_1 : 1; NvU8 unique_Gy : 7; - + //seventh byte NvU8 unique_Rx : 5; NvU8 unique_Ry_bit_2_to_4 : 3; @@ -1104,7 +1104,7 @@ typedef struct tagNVT_DV_STATIC_METADATA_TYPE2 NvU8 unique_Gx : 7; //fifth byte - NvU8 supports_10b_12b_444_bit0 : 1; + NvU8 supports_10b_12b_444_bit0 : 1; NvU8 unique_Gy : 7; //sixth byte @@ -1144,7 +1144,7 @@ typedef struct tagNVT_HDR10PLUS_INFO #define NVT_CEA861_COLORIMETRY_BT2020YCC 0x40 // BT2020 Y'CbCr capable #define NVT_CEA861_COLORIMETRY_BT2020RGB 0x80 // BT2020 RGB capable // Colorimetry capabilities - byte 4 -#define NVT_CEA861_COLORIMETRY_defaultRGB 0x10 // based on the default chromaticity in Basic Display Parameters and Feature Block +#define NVT_CEA861_COLORIMETRY_defaultRGB 0x10 // based on the default chromaticity in Basic Display Parameters and Feature Block #define NVT_CEA861_COLORIMETRY_sRGB 0x20 // IEC 61966-2-1 #define NVT_CEA861_COLORIMETRY_ICtCp 0x40 // ITU-R BT.2100 ICtCp #define NVT_CEA861_COLORIMETRY_ST2113RGB 0x80 // SMPTE ST 2113 R'G'B' @@ -1269,7 +1269,7 @@ typedef struct tagNVT_2BYTES #define NVT_CTA861_DID_TYPE7_DESCRIPTORS_LENGTH 20 typedef struct tagDID_TYPE7_DATA -{ +{ struct { NvU8 revision : 3; NvU8 dsc_pt : 1; @@ -1291,7 +1291,7 @@ typedef struct tagDID_TYPE7_DATA #define NVT_CTA861_DID_TYPE8_TWO_BYTE_DESCRIPTORS_MAX 14 typedef struct tagDID_TYPE8_DATA -{ +{ struct { NvU8 revision : 3; NvU8 tcs : 1; @@ -1311,7 +1311,7 @@ typedef struct tagDID_TYPE8_DATA #define NVT_CTA861_DID_TYPE10_DESCRIPTORS_MAX 4 typedef struct tagDID_TYPE10_DATA -{ +{ struct { NvU8 revision : 3; NvU8 F33 : 1; @@ -1346,7 +1346,7 @@ typedef struct tagNATIVE_VIDEO_RESOLUTION_DATA #pragma pack() -// See CEA-861E, Table 42, 43 Extended Tags; indicates that the corresponding CEA extended data block value is valid, +// See CEA-861E, Table 42, 43 Extended Tags; indicates that the corresponding CEA extended data block value is valid, // e.g. if colorimetry is set, then NVT_EDID_CEA861_INFO::colorimetry is valid typedef struct tagNVT_VALID_EXTENDED_BLOCKS { @@ -1374,14 +1374,14 @@ typedef struct tagNVT_VALID_EXTENDED_BLOCKS #define NVT_CEA861_Y420VDB_SD_SIZE 1 // Max number of YUV420 VDBs for each VDB block is 30 per CTA-861-G spec sec. 7.5.10 -// Accomodate 2 blocks +// Accomodate 2 blocks #define NVT_CEA861_Y420VDB_MAX_DESCRIPTOR 60 #define NVT_CEA861_Y420CMDB_SD_SIZE 1 // Max number of YUV420 SVDs for each VDB block is 30 per CTA-861-G spec sec. 7.5.11 -// Accomodate 2 blocks -#define NVT_CEA861_Y420CMDB_MAX_DESCRIPTOR 60 +// Accomodate 2 blocks +#define NVT_CEA861_Y420CMDB_MAX_DESCRIPTOR 60 #define NVT_CEA861_VFPDB_SD_SIZE 1 #define NVT_CEA861_VFPDB_MAX_DESCRIPTOR 16 // NOTE: Limiting to 16 to not allocate too much space. The maximum descriptor should be: // ((NVT_CEA861_MAX_PAYLOAD / NVT_CEA861_SD_TOTAL_SIZE) * (NVT_CEA861_SD_PAYLOAD_SIZE / NVT_CEA861_VFPDB_SD_SIZE) + @@ -1423,7 +1423,7 @@ typedef struct tagEDID_CEA861_INFO // video format data NvU8 total_vfdb; VFDB_DATA vfdb[NVT_CTA861_VF_MAX_BLOCKS]; - + // indicates which of the extended data blocks below contain valid data excluding extended blocks with total count NVT_VALID_EXTENDED_BLOCKS valid; // extended data blocks @@ -1542,7 +1542,7 @@ typedef struct _tagNVT_DISPLAYID_INFO NvU8 week; NvU8 year; NvU8 product_string[NVT_DISPLAYID_PRODUCT_STRING_MAX_LEN + 1]; - + // Display Parameters NvU16 horiz_size; NvU16 vert_size; @@ -1603,7 +1603,7 @@ typedef struct _tagNVT_DISPLAYID_INFO union { - struct + struct { NvU8 rsvd : 3; NvU8 color_map : 1; @@ -1628,9 +1628,9 @@ typedef struct _tagNVT_DISPLAYID_INFO // Stereo Interface NvU8 stereo_code; - union + union { - struct + struct { NvU8 stereo_polarity; } field_sequential; @@ -1639,19 +1639,19 @@ typedef struct _tagNVT_DISPLAYID_INFO { NvU8 view_identity; } side_by_side; - - struct + + struct { NvU8 interleave_pattern[8]; } pixel_interleaved; - + struct { NvU8 rsvd : 5; NvU8 mirroring : 2; NvU8 polarity : 1; } left_right_separate; - + struct { NvU8 num_views; @@ -1669,7 +1669,7 @@ typedef struct _tagNVT_DISPLAYID_INFO } tile_capability; struct - { + { NvU32 row; NvU32 col; } tile_topology; @@ -1713,7 +1713,7 @@ typedef struct _tagNVT_DISPLAYID_INFO NvU8 interface_version; - struct + struct { NvU8 rsvd : 2; NvU8 support_16b : 1; @@ -1724,7 +1724,7 @@ typedef struct _tagNVT_DISPLAYID_INFO NvU8 support_6b : 1; } rgb_depth; - struct + struct { NvU8 rsvd : 2; NvU8 support_16b : 1; @@ -1735,7 +1735,7 @@ typedef struct _tagNVT_DISPLAYID_INFO NvU8 support_6b : 1; } ycbcr444_depth; - struct + struct { NvU8 rsvd : 3; NvU8 support_16b : 1; @@ -1754,9 +1754,9 @@ typedef struct _tagNVT_DISPLAYID_INFO } display_interface; //display interface features for DID2.0 - struct + struct { - struct + struct { NvU8 rsvd : 2; NvU8 support_16b : 1; @@ -1766,8 +1766,8 @@ typedef struct _tagNVT_DISPLAYID_INFO NvU8 support_8b : 1; NvU8 support_6b : 1; } rgb_depth; - - struct + + struct { NvU8 rsvd : 2; NvU8 support_16b : 1; @@ -1777,8 +1777,8 @@ typedef struct _tagNVT_DISPLAYID_INFO NvU8 support_8b : 1; NvU8 support_6b : 1; } ycbcr444_depth; - - struct + + struct { NvU8 rsvd : 3; NvU8 support_16b : 1; @@ -1788,7 +1788,7 @@ typedef struct _tagNVT_DISPLAYID_INFO NvU8 support_8b : 1; } ycbcr422_depth; - struct + struct { NvU8 rsvd : 3; NvU8 support_16b : 1; @@ -1843,7 +1843,7 @@ typedef struct _tagNVT_DISPLAYID_INFO } NVT_DISPLAYID_INFO; //*********************************** -// EDID 18-byte display descriptors +// EDID 18-byte display descriptors //*********************************** // // @@ -1944,7 +1944,7 @@ typedef struct tagNVT_EDID_RANGE_LIMIT #define NVT_EDID_CVT_ASPECT_PREFER_16X10 0x02 #define NVT_EDID_CVT_ASPECT_PREFER_5X4 0x03 #define NVT_EDID_CVT_ASPECT_PREFER_15X9 0x04 - + // cvt blanking support #define NVT_EDID_CVT_BLANKING_STANDARD 0x01 #define NVT_EDID_CVT_BLANKING_REDUCED 0x02 @@ -2182,7 +2182,7 @@ typedef struct tagNVT_EDID_18BYTE_DESCRIPTOR // #define NVT_EDID_MAX_LONG_DISPLAY_DESCRIPTOR 4 #define NVT_EDID_MAX_STANDARD_TIMINGS 8 -#define NVT_EDID_MAX_TOTAL_TIMING NVT_MAX_TOTAL_TIMING +#define NVT_EDID_MAX_TOTAL_TIMING NVT_MAX_TOTAL_TIMING #define NVT_EDID_VER_1_1 0x101 #define NVT_EDID_VER_1_2 0x102 #define NVT_EDID_VER_1_3 0x103 @@ -2243,7 +2243,7 @@ typedef struct _HDMI3DDetails typedef struct _SupportMap { HDMI3DDETAILS map[MAX_3D_VICS_SUPPORTED]; - NvU32 total; + NvU32 total; } HDMI3DSUPPORTMAP; typedef struct tagNVT_EXT_TIMING @@ -2383,7 +2383,7 @@ typedef struct tagNVT_HDMI_FORUM_INFO NvU8 qms_tfr_min : 1; NvU8 qms_tfr_max : 1; - NvU16 dsc_MaxSlices : 6; + NvU16 dsc_MaxSlices : 6; NvU16 dsc_MaxPclkPerSliceMHz : 10; NvU8 dsc_10bpc : 1; @@ -2445,7 +2445,7 @@ typedef struct tagNVT_DV_STATIC_METADATA }NVT_DV_STATIC_METADATA; //*********************************** -// parsed DisplayID 2.0 definitions +// parsed DisplayID 2.0 definitions //*********************************** #define NVT_DISPLAYID_2_0_PRODUCT_STRING_MAX_LEN 236 @@ -2454,7 +2454,7 @@ typedef struct tagNVT_DV_STATIC_METADATA #define NVT_DISPLAY_2_0_CAP_YCbCr_444 0x20 // DTV monitor supports YCbCr4:4:4 #define NVT_DISPLAY_2_0_CAP_YCbCr_422 0x10 // DTV monitor supports YCbCr4:2:2 -// vendor specific +// vendor specific #define NVT_VESA_VENDOR_SPECIFIC_IEEE_ID 0x3A0292 #define NVT_VESA_VENDOR_SPECIFIC_LENGTH 7 @@ -2541,7 +2541,7 @@ typedef struct _tagNVT_DISPLAYID_TILED_DISPLAY_TOPOLOGY } capability; struct - { + { NvU32 row; NvU32 col; } topology; @@ -2666,11 +2666,11 @@ typedef struct _tagNVT_DISPLAYID_ADAPTIVE_SYNC struct { NvU8 adaptive_sync_range : 1; - NvU8 duration_inc_flicker_perf : 1; + NvU8 duration_inc_flicker_perf : 1; NvU8 modes : 2; NvU8 seamless_not_support : 1; NvU8 duration_dec_flicker_perf : 1; - NvU8 reserved : 2; + NvU8 reserved : 2; } information; } u; @@ -2682,7 +2682,7 @@ typedef struct _tagNVT_DISPLAYID_ADAPTIVE_SYNC typedef struct _tagVESA_VSDB_PARSED_INFO { - struct + struct { NvU8 type : 3; NvU8 reserved : 4; @@ -2711,7 +2711,7 @@ typedef struct _tagVESA_VSDB_PARSED_INFO } VESA_VSDB_PARSED_INFO; typedef struct _tagNVT_DISPLAYID_VENDOR_SPECIFIC -{ +{ NVT_HDMI_LLC_INFO hdmiLlc; NVT_HDMI_FORUM_INFO hfvs; NVDA_VSDB_PARSED_INFO nvVsdb; @@ -2756,12 +2756,12 @@ typedef struct _tagNVT_VALID_DATA_BLOCKS NvBool cta_data_present; } NVT_VALID_DATA_BLOCKS; -#define NVT_DISPLAYID_MAX_TOTAL_TIMING NVT_MAX_TOTAL_TIMING +#define NVT_DISPLAYID_MAX_TOTAL_TIMING NVT_MAX_TOTAL_TIMING typedef struct _tagNVT_DISPLAYID_2_0_INFO { NvU8 revision; NvU8 version; - + // support audio/yuv444/yuv422 color for CTA861 compatible NvU8 basic_caps; @@ -2793,11 +2793,11 @@ typedef struct _tagNVT_DISPLAYID_2_0_INFO // Dynamic Video Timing Range Limits Data Block (Not Mandatory) NVT_DISPLAYID_RANGE_LIMITS range_limits; - // Display Interface Features Data Block (Mandatory) + // Display Interface Features Data Block (Mandatory) NVT_DISPLAYID_INTERFACE_FEATURES interface_features; // Stereo Display Interface Data Block (Not Mandatory) - + // Tiled Display Topology Data Block (Not Mandatory) NVT_DISPLAYID_TILED_DISPLAY_TOPOLOGY tile_topo; @@ -2809,8 +2809,8 @@ typedef struct _tagNVT_DISPLAYID_2_0_INFO NVT_DISPLAYID_ADAPTIVE_SYNC adaptive_sync_descriptor[NVT_ADAPTIVE_SYNC_DESCRIPTOR_MAX_COUNT]; // Brightness Luminance Range Data Block (Mandatory for display device supports Nits based brightness control) - NVT_DISPLAYID_BRIGHTNESS_LUMINANCE_RANGE luminance_ranges; - + NVT_DISPLAYID_BRIGHTNESS_LUMINANCE_RANGE luminance_ranges; + // Vendor-specific Data Block (Not Mandatory) NVT_DISPLAYID_VENDOR_SPECIFIC vendor_specific; @@ -2820,7 +2820,7 @@ typedef struct _tagNVT_DISPLAYID_2_0_INFO #define NVT_EDID_PRIMARY_COLOR_FP2INT_FACTOR 1024 // Per EDID 1.4, 10bit color primary is encoded in floating point as (bit9/2 + bit8/4 + bi7/8 + ... + bit0) typedef struct tagNVT_EDID_INFO -{ +{ // generic edid info NvU32 version; NvU16 manuf_id; @@ -2875,7 +2875,7 @@ typedef struct tagNVT_EDID_INFO NvU8 support_active_off : 1; NvU8 support_suspend : 1; NvU8 support_standby : 1; - + } feature_ver_1_3; struct { @@ -2896,7 +2896,7 @@ typedef struct tagNVT_EDID_INFO NvU8 support_ycrcb_422 : 1; NvU8 support_active_off : 1; NvU8 support_suspend : 1; - NvU8 support_standby : 1; + NvU8 support_standby : 1; } feature_ver_1_4_digital; }u; @@ -2925,7 +2925,7 @@ typedef struct tagNVT_EDID_INFO // the parse timing NVT_TIMING timing[NVT_EDID_MAX_TOTAL_TIMING]; - // Note: This contains the timing after validation. + // Note: This contains the timing after validation. NvU32 total_timings; // This contains the count timing that were invalidated because they don't meet @@ -2936,7 +2936,7 @@ typedef struct tagNVT_EDID_INFO NvU32 HDMI3DSupported; HDMI3DSUPPORTMAP Hdmi3Dsupport; - + // Data parsed from NVDA VSDB - Variable Refresh Rate Monitor capabilities NVDA_VSDB_PARSED_INFO nvdaVsdbInfo; @@ -3162,7 +3162,7 @@ typedef struct tagNVT_VIDEO_INFOFRAME NvU8 byte4; NvU8 byte5; - // byte 6~13 + // byte 6~13 NvU8 top_bar_low; NvU8 top_bar_high; NvU8 bottom_bar_low; @@ -3198,26 +3198,26 @@ typedef struct tagNVT_VIDEO_INFOFRAME // #define NVT_VIDEO_INFOFRAME_BYTE1_A0_MASK 0x10 // active format info present #define NVT_VIDEO_INFOFRAME_BYTE1_A0_SHIFT 4 // active format info present -#define NVT_VIDEO_INFOFRAME_BYTE1_A0_NO_DATA 0 +#define NVT_VIDEO_INFOFRAME_BYTE1_A0_NO_DATA 0 #define NVT_VIDEO_INFOFRAME_BYTE1_A0_VALID 1 // // CTA-861G new requirement - DD changed this policy #define NVT_VIDEO_INFOFRAME_BYTE1_Y2_MASK 8 #define NVT_VIDEO_INFOFRAME_BYTE1_Y2Y1Y0_MASK 0xE0 #define NVT_VIDEO_INFOFRAME_BYTE1_Y2Y1Y0_SHIFT 0x5 -#define NVT_VIDEO_INFOFRAME_BYTE1_Y2Y1Y0_RGB 0 +#define NVT_VIDEO_INFOFRAME_BYTE1_Y2Y1Y0_RGB 0 #define NVT_VIDEO_INFOFRAME_BYTE1_Y2Y1Y0_YCbCr422 1 -#define NVT_VIDEO_INFOFRAME_BYTE1_Y2Y1Y0_YCbCr444 2 +#define NVT_VIDEO_INFOFRAME_BYTE1_Y2Y1Y0_YCbCr444 2 #define NVT_VIDEO_INFOFRAME_BYTE1_Y2Y1Y0_YCbCr420 3 #define NVT_VIDEO_INFOFRAME_BYTE1_Y2Y1Y0_FUTURE 3 // nvlEscape still uses this line 4266 #define NVT_VIDEO_INFOFRAME_BYTE1_Y2Y1Y0_IDODEFINED 7 // CEA-861-F - Unix still used this one #define NVT_VIDEO_INFOFRAME_BYTE1_Y1Y0_MASK 0x60 #define NVT_VIDEO_INFOFRAME_BYTE1_Y1Y0_SHIFT 0x5 -#define NVT_VIDEO_INFOFRAME_BYTE1_Y1Y0_RGB 0 +#define NVT_VIDEO_INFOFRAME_BYTE1_Y1Y0_RGB 0 #define NVT_VIDEO_INFOFRAME_BYTE1_Y1Y0_YCbCr422 1 -#define NVT_VIDEO_INFOFRAME_BYTE1_Y1Y0_YCbCr444 2 -#define NVT_VIDEO_INFOFRAME_BYTE1_Y1Y0_YCbCr420 3 +#define NVT_VIDEO_INFOFRAME_BYTE1_Y1Y0_YCbCr444 2 +#define NVT_VIDEO_INFOFRAME_BYTE1_Y1Y0_YCbCr420 3 #define NVT_VIDEO_INFOFRAME_BYTE1_Y1Y0_FUTURE 3 // nvlEscape still uses this lline 4266 // #define NVT_VIDEO_INFOFRAME_BYTE1_RESERVED_MASK 0x80 // for Inforframe V1 / V2 @@ -3243,7 +3243,7 @@ typedef struct tagNVT_VIDEO_INFOFRAME #define NVT_VIDEO_INFOFRAME_BYTE2_C1C0_SMPTE170M_ITU601 1 #define NVT_VIDEO_INFOFRAME_BYTE2_C1C0_ITU709 2 #define NVT_VIDEO_INFOFRAME_BYTE2_C1C0_EXT_COLORIMETRY 3 -// +// #define NVT_VIDEO_INFOFRAME_BYTE3_SC_MASK 0x03 // non-uniform scaling #define NVT_VIDEO_INFOFRAME_BYTE3_SC_SHIFT 0 #define NVT_VIDEO_INFOFRAME_BYTE3_SC_NONE 0 @@ -3316,10 +3316,10 @@ typedef struct tagNVT_VIDEO_INFOFRAME #define NVT_VIDEO_INFOFRAME_BYTE5_YQ1YQ0_FULL_RANGE 2 #define NVT_VIDEO_INFOFRAME_BYTE5_YQ1YQ0_RESERVED3 3 #define NVT_VIDEO_INFOFRAME_BYTE5_YQ1YQ0_RESERVED4 4 -// +// #define NVT_VIDEO_INFOFRAME_BYTE5_YQ_MASK 0xc0 // content type #define NVT_VIDEO_INFOFRAME_BYTE5_YQ_SHIFT 6 -#define NVT_VIDEO_INFOFRAME_BYTE5_YQ_LIMITED 0 +#define NVT_VIDEO_INFOFRAME_BYTE5_YQ_LIMITED 0 #define NVT_VIDEO_INFOFRAME_BYTE5_YQ_FULL 1 #define NVT_VIDEO_INFOFRAME_BYTE5_YQ_RSVD1 2 #define NVT_VIDEO_INFOFRAME_BYTE5_YQ_RSVD2 3 @@ -3384,14 +3384,14 @@ typedef struct NvU8 rgbQuantizationRange : 2; NvU8 extendedColorimetry : 3; NvU8 itContent : 1; - } byte3; + } byte3; // byte 4 struct { NvU8 vic : 7; NvU8 rsvd_bits_byte4 : 1; - } byte4; + } byte4; // byte 5 struct @@ -3399,15 +3399,15 @@ typedef struct NvU8 pixelRepeat : 4; NvU8 contentTypes : 2; NvU8 yccQuantizationRange : 2; - } byte5; - - NvU16 topBar; - NvU16 bottomBar; - NvU16 leftBar; + } byte5; + + NvU16 topBar; + NvU16 bottomBar; + NvU16 leftBar; NvU16 rightBar; // byte 14~15 - struct + struct { NvU8 fr_low : 4; NvU8 ace : 4; @@ -3438,7 +3438,7 @@ typedef struct NvU32 activeFormatAspectRatio : 5; NvU32 picAspectRatio : 3; NvU32 nonuniformScaling : 3; - NvU32 barInfo : 3; + NvU32 barInfo : 3; NvU32 top_bar : 17; NvU32 bottom_bar : 17; NvU32 left_bar : 17; @@ -3473,7 +3473,7 @@ typedef struct #define NVT_VIDEO_INFOFRAME_OVERRIDE_BYTE14_ACE0ACE3_MASK 0xF // Additional Colorimetry Extension #define NVT_VIDEO_INFOFRAME_OVERRIDE_BYTE15_RID0RID5_MASK 0x3F // Resolution Identification #define NVT_VIDEO_INFOFRAME_OVERRIDE_BYTE15_FR4_MASK 0x1 // Frame rate 4th bit in Byte 15 - + // audio infoframe structure typedef struct tagNVT_AUDIO_INFOFRAME { @@ -3561,10 +3561,10 @@ typedef struct tagNVT_SR_INFOFRAME #define NVT_AUDIO_INFOFRAME_BYTE3_CXT_MASK 0x1F #define NVT_AUDIO_INFOFRAME_BYTE3_CXT_SHIFT 0 #define NVT_AUDIO_INFOFRAME_BYTE3_CXT_RESERVE31 31 -// +// #define NVT_AUDIO_INFOFRAME_BYTE3_RESERVED_MASK 0xE0 #define NVT_AUDIO_INFOFRAME_BYTE3_RESERVED_SHIFT 5 -// +// #define NVT_AUDIO_INFOFRAME_BYTE4_CA_MASK 0xFF #define NVT_AUDIO_INFOFRAME_BYTE4_CA_SHIFT 0 #define NVT_AUDIO_INFOFRAME_BYTE4_CA_FRW_FLW_RR_RL_FC_LFE_FR_FL 49 @@ -3575,7 +3575,7 @@ typedef struct tagNVT_SR_INFOFRAME #define NVT_AUDIO_INFOFRAME_BYTE5_LFEPBL_0DB 1 #define NVT_AUDIO_INFOFRAME_BYTE5_LFEPBL_PLUS10DB 2 #define NVT_AUDIO_INFOFRAME_BYTE5_LFEPBL_RESERVED03 3 -// +// #define NVT_AUDIO_INFOFRAME_BYTE5_RESERVED_MASK 0x4 #define NVT_AUDIO_INFOFRAME_BYTE5_RESERVED_SHIFT 2 // @@ -3602,23 +3602,23 @@ typedef struct tagNVT_SR_INFOFRAME #define NVT_AUDIO_INFOFRAME_BYTE5_DM_INH_SHIFT 7 #define NVT_AUDIO_INFOFRAME_BYTE5_DM_INH_PERMITTED 0 #define NVT_AUDIO_INFOFRAME_BYTE5_DM_INH_PROHIBITED 1 -// +// #define NVT_AUDIO_INFOFRAME_BYTE6_RESERVED_MASK 0xFF #define NVT_AUDIO_INFOFRAME_BYTE6_RESERVED_SHIFT 0 // -// +// #define NVT_AUDIO_INFOFRAME_BYTE7_RESERVED_MASK 0xFF #define NVT_AUDIO_INFOFRAME_BYTE7_RESERVED_SHIFT 0 // -/// +/// #define NVT_AUDIO_INFOFRAME_BYTE8_RESERVED_MASK 0xFF #define NVT_AUDIO_INFOFRAME_BYTE8_RESERVED_SHIFT 0 // -// +// #define NVT_AUDIO_INFOFRAME_BYTE9_RESERVED_MASK 0xFF #define NVT_AUDIO_INFOFRAME_BYTE9_RESERVED_SHIFT 0 // -// +// #define NVT_AUDIO_INFOFRAME_BYTE10_RESERVED_MASK 0xFF #define NVT_AUDIO_INFOFRAME_BYTE10_RESERVED_SHIFT 0 // @@ -3631,7 +3631,7 @@ typedef struct NvU8 channelCount : 3; NvU8 rsvd_bits_byte1 : 1; NvU8 codingType : 4; - } byte1; + } byte1; // byte 2 struct @@ -3640,12 +3640,12 @@ typedef struct NvU8 sampleRate : 3; NvU8 rsvd_bits_byte2 : 3; } byte2; - + // byte 3 struct { - NvU8 codingExtensionType : 5; + NvU8 codingExtensionType : 5; NvU8 rsvd_bits_byte3 : 3; } byte3; @@ -3659,7 +3659,7 @@ typedef struct NvU8 rsvd_bits_byte5 : 1; NvU8 levelShift : 4; NvU8 downmixInhibit : 1; - } byte5; + } byte5; // byte 6~10 NvU8 rsvd_byte6; @@ -3853,7 +3853,7 @@ typedef struct tagNVT_VENDOR_SPECIFIC_INFOFRAME #define NVT_HDMI_VS_BYTE_OPT1_HDMI_3DEX_SSH_Q_EL_ER 0x07 // Quincunx matrix Even Left Even Right //0x08-0x0f reserved #define NVT_HDMI_VS_BYTE_OPT2_HDMI_METADATA_LEN_MASK 0xf0 // HDMI_VID_FMT = HDMI_VID_FMT_3D; HDMI_3D_META_PRESENT = 1 -#define NVT_HDMI_VS_BYTE_OPT2_HDMI_METADATA_LEN_SHIFT 0x04 // +#define NVT_HDMI_VS_BYTE_OPT2_HDMI_METADATA_LEN_SHIFT 0x04 // #define NVT_HDMI_VS_BYTE_OPT2_HDMI_METADATA_LEN_NONE 0x00 // length of no metadata #define NVT_HDMI_VS_BYTE_OPT2_HDMI_METADATA_LEN_PARALLAX 0x08 // length of paralax data @@ -3979,7 +3979,7 @@ typedef struct tagNVT_EXTENDED_METADATA_PACKET_INFOFRAME #define NVT_DP_ADAPTIVE_SYNC_SDP_DB0_VARIABLE_FRAME_RATE_MASK 0x3 #define NVT_DP_ADAPTIVE_SYNC_SDP_DB0_VARIABLE_FRAME_RATE_SHIFT 0 #define NVT_DP_ADAPTIVE_SYNC_SDP_DB0_VARIABLE_FRAME_RATE_AVT_VARIABLE 0 -#define NVT_DP_ADAPTIVE_SYNC_SDP_DB0_VARIABLE_FRAME_RATE_AVT_FIXED 1 +#define NVT_DP_ADAPTIVE_SYNC_SDP_DB0_VARIABLE_FRAME_RATE_AVT_FIXED 1 #define NVT_DP_ADAPTIVE_SYNC_SDP_DB0_VARIABLE_FRAME_RATE_FAVT_TARGET_NOT_REACHED 2 #define NVT_DP_ADAPTIVE_SYNC_SDP_DB0_VARIABLE_FRAME_RATE_FAVT_TARGET_REACHED 3 @@ -4044,7 +4044,7 @@ typedef struct tagNVT_EXTENDED_METADATA_PACKET_INFOFRAME typedef struct tagNVT_ADAPTIVE_SYNC_SDP_HEADER { NvU8 hb0; - NvU8 type; + NvU8 type; NvU8 version; NvU8 length; }NVT_ADAPTIVE_SYNC_SDP_HEADER; @@ -4167,11 +4167,11 @@ typedef struct tagNVT_HDMI_LLC_VSDB_PAYLOAD NvU8 I_Latency_Fields_Present : 1; NvU8 Latency_Fields_Present : 1; - // the rest of the frame may contain optional data as defined + // the rest of the frame may contain optional data as defined // in the NVT_CEA861_LATENCY, HDMI_VIDEO, HDMI_VIC, NVT_3D_STRUCT_ALL & 3D_MULTI_LIST structures // and as specified by the corresponding control bits NvU8 Data[NVT_CEA861_VSDB_PAYLOAD_MAX_LENGTH - 5]; - + } NVT_HDMI_LLC_VSDB_PAYLOAD; // HDMI LLC Vendor Specific Data Block @@ -4184,7 +4184,7 @@ typedef struct tagNVT_HDMI_LLC_DATA typedef struct tagNVT_NVDA_VSDB_PAYLOAD { NvU8 opcode; // Nvidia specific opcode - please refer to VRR monitor spec v17 - NvU8 vrrMinRefreshRate; // Minimum refresh rate supported by this monitor + NvU8 vrrMinRefreshRate; // Minimum refresh rate supported by this monitor } NVT_NVDA_VSDB_PAYLOAD; // NVIDIA Vendor Specific Data Block @@ -4273,7 +4273,7 @@ typedef struct tagNVT_HDMI_FORUM_DATA } NVT_HDMI_FORUM_DATA; // -// +// // Video Capability Data Block (VCDB) typedef struct _NV_ESC_MONITOR_CAPS_VCDB { @@ -4284,7 +4284,7 @@ typedef struct _NV_ESC_MONITOR_CAPS_VCDB NvU8 scanInfoCEVideoFormats : 2; } NVT_HDMI_VCDB_DATA; -// +// // //*********************************************************** // Dynamic Range and Mastering Infoframe (HDR) @@ -4294,7 +4294,7 @@ typedef struct tagNVT_HDR_INFOFRAME_MASTERING_DATA { NvU16 displayPrimary_x0; //!< x coordinate of color primary 0 (e.g. Red) of mastering display ([0x0000-0xC350] = [0.0 - 1.0]) NvU16 displayPrimary_y0; //!< y coordinate of color primary 0 (e.g. Red) of mastering display ([0x0000-0xC350] = [0.0 - 1.0]) - + NvU16 displayPrimary_x1; //!< x coordinate of color primary 1 (e.g. Green) of mastering display ([0x0000-0xC350] = [0.0 - 1.0]) NvU16 displayPrimary_y1; //!< y coordinate of color primary 1 (e.g. Green) of mastering display ([0x0000-0xC350] = [0.0 - 1.0]) @@ -4313,7 +4313,7 @@ typedef struct tagNVT_HDR_INFOFRAME_MASTERING_DATA #define NVT_CEA861_HDR_INFOFRAME_EOTF_SDR_GAMMA 0 //SDR Luminance Range #define NVT_CEA861_HDR_INFOFRAME_EOTF_HDR_GAMMA 1 //HDR Luminance Range -#define NVT_CEA861_HDR_INFOFRAME_EOTF_ST2084 2 +#define NVT_CEA861_HDR_INFOFRAME_EOTF_ST2084 2 #define NVT_CEA861_HDR_INFOFRAME_EOTF_Future 3 #define NVT_CEA861_STATIC_METADATA_TYPE1_PRIMARY_COLOR_NORMALIZE_FACTOR 0xC350 // Per CEA-861.3 spec @@ -4337,7 +4337,7 @@ typedef struct tagNVT_HDR_INFOFRAME } NVT_HDR_INFOFRAME; #pragma pack() -// +// // //*********************************************************** // Gamut Metadata Range and Vertices structures @@ -4410,7 +4410,7 @@ typedef struct tagNVT_GAMUT_METADATA_RANGE_10BIT{ NvU8 Min_Blue_Data_LO:2; NvU8 Data_Rsvd:4; - NvU8 Max_Blue_Data_LO:4; + NvU8 Max_Blue_Data_LO:4; } NVT_GAMUT_METADATA_RANGE_10BIT; @@ -4430,8 +4430,8 @@ typedef struct tagNVT_GAMUT_METADATA_RANGE_12BIT{ NvU8 Max_Red_Data_LO:8; - NvU8 Min_Green_Data_HI:8; - + NvU8 Min_Green_Data_HI:8; + NvU8 Max_Green_Data_HI:4; NvU8 Min_Green_Data_LO:4; @@ -4485,43 +4485,43 @@ typedef struct tagNVT_GAMUT_METADATA_VERTICES_10BIT // Packaged data NvU8 Black_Y_R_HI; - + NvU8 Black_Cb_G_HI:6; NvU8 Black_Y_R_LO:2; - + NvU8 Black_Cr_B_HI:4; NvU8 Black_Cb_G_LO:4; - + NvU8 Red_Y_R_HI:2; NvU8 Black_Cr_B_LO:6; - + NvU8 Red_Y_R_LO; - + NvU8 Red_Cb_G_HI; - + NvU8 Red_Cr_B_HI:6; NvU8 Red_Cb_G_LO:2; - + NvU8 Green_Y_R_HI:4; NvU8 Red_Cr_B_LO:4; - + NvU8 Green_Cb_G_HI:2; NvU8 Green_Y_R_LO:6; - + NvU8 Green_Cb_G_LO; - + NvU8 Green_Cr_B_HI; - + NvU8 Blue_Y_R_HI:6; NvU8 Green_Cr_B_LO:2; - + NvU8 Blue_Cb_G_HI:4; NvU8 Blue_Y_R_LO:4; - + NvU8 Blue_Cr_B_HI:2; NvU8 Blue_Cb_G_LO:6; - - NvU8 Blue_Cr_B_LO; + + NvU8 Blue_Cr_B_LO; } NVT_GAMUT_METADATA_VERTICES_10BIT; typedef struct tagNVT_GAMUT_METADATA_VERTICES_12BIT @@ -4537,50 +4537,50 @@ typedef struct tagNVT_GAMUT_METADATA_VERTICES_12BIT // Packaged data NvU8 Black_Y_R_HI; - + NvU8 Black_Cb_G_HI:4; NvU8 Black_Y_R_LO:4; - + NvU8 Black_Cb_G_LO; - + NvU8 Black_Cr_B_HI; - + NvU8 Red_Y_R_HI:4; NvU8 Black_Cr_B_LO:4; - + NvU8 Red_Y_R_LO; - + NvU8 Red_Cb_G_HI; - + NvU8 Red_Cr_B_HI:4; NvU8 Red_Cb_G_LO:4; - + NvU8 Red_Cr_B_LO; - - NvU8 Green_Y_R_HI; - + + NvU8 Green_Y_R_HI; + NvU8 Green_Cb_G_HI:4; NvU8 Green_Y_R_LO:4; - + NvU8 Green_Cb_G_LO; - + NvU8 Green_Cr_B_HI; - + NvU8 Blue_Y_R_HI:4; NvU8 Green_Cr_B_LO:4; - + NvU8 Blue_Y_R_LO; - + NvU8 Blue_Cb_G_HI; - + NvU8 Blue_Cr_B_HI:4; NvU8 Blue_Cb_G_LO:4; - - NvU8 Blue_Cr_B_LO; + + NvU8 Blue_Cr_B_LO; } NVT_GAMUT_METADATA_VERTICES_12BIT; typedef struct tagNVT_GAMUT_METADATA -{ +{ NVT_GAMUT_HEADER header; union @@ -4625,7 +4625,7 @@ typedef struct tagNVT_GAMUT_METADATA // Raw DPCD data format - Receiver Capability Field // 00000h - 000FFh typedef struct tagNVT_DPCD_RECEIVER_CAP { - NvU8 rev; // 00000h + NvU8 rev; // 00000h NvU8 max_link_rate; // 00001h NvU8 max_lane_count; // 00002h NvU8 max_downspread; // 00003h @@ -4684,7 +4684,7 @@ typedef struct tagNVT_DPCD_LINK_SINK_STATUS NvU8 test_link_rate; // 00219h NvU8 reserved_1[0x21F - 0x21A + 1]; // 0021Fh - 0021Ah NvU8 test_lane_count; // 00220h - NvU8 test_pattern; // 00221h + NvU8 test_pattern; // 00221h NvU16 test_h_total; // 00222h - 00223h NvU16 test_v_total; // 00224h - 00225h NvU16 test_h_start; // 00226h - 00227h @@ -4697,7 +4697,7 @@ typedef struct tagNVT_DPCD_LINK_SINK_STATUS NvU8 test_refresh_rate_numerator; // 00234h NvU8 reserved_2[0x23F - 0x235 + 1]; // 00235h - 0023Fh NvU16 test_crc_R_Cr; // 00240h - 00241h - NvU16 test_crc_G_Y; // 00242h - 00243h + NvU16 test_crc_G_Y; // 00242h - 00243h NvU16 test_crc_B_Cb; // 00244h - 00245h NvU8 test_sink_misc; // 00246h NvU8 reserved_3[0x25F - 0x247 + 1]; // 00247h - 0025fh @@ -4723,7 +4723,7 @@ typedef struct tagNVT_DPCD_VENDOR_SPECIFIC_FIELD //NvU8 reserved[0x3FF - 0x303 + 1]; // 003FFh - 00303h }NVT_DPCD_VENDOR_SPECIFIC_FIELD; // -// Raw DPCD data format - Dongle Specific Field +// Raw DPCD data format - Dongle Specific Field typedef struct tagNVT_DPCD_DONGLE_SPECIFIC_FIELD { NvU8 vendor_b0; // 00300h @@ -4742,7 +4742,7 @@ typedef struct tagNVT_DPCD_DUALDP_SPECIFIC_FIELD NvU8 vendor_b2; // 00302h NvU8 model[6]; // 00303h - 00308h NvU8 chipd_id_version; // 00309h - NvU8 reserved_1[0x3AF - 0x30A + 1]; // 0030Ah - 003AFh + NvU8 reserved_1[0x3AF - 0x30A + 1]; // 0030Ah - 003AFh NvU8 dual_dp_cap; // 003B0h NvU8 dual_dp_base_addr[3]; // 003B1h - 003B3h //NvU8 reserved_2[0x3FF - 0x3B4 + 1]; // 003B4h - 003FFh @@ -4826,12 +4826,12 @@ typedef enum NVT_COLORIMETRY_INVALID = 0xFF } NVT_COLORIMETRY; -#define NVT_DPCD_BPC_DEFAULT 0x00 -#define NVT_DPCD_BPC_6 0x01 -#define NVT_DPCD_BPC_8 0x02 -#define NVT_DPCD_BPC_10 0x03 -#define NVT_DPCD_BPC_12 0x04 -#define NVT_DPCD_BPC_16 0x05 +#define NVT_DPCD_BPC_DEFAULT 0x00 +#define NVT_DPCD_BPC_6 0x01 +#define NVT_DPCD_BPC_8 0x02 +#define NVT_DPCD_BPC_10 0x03 +#define NVT_DPCD_BPC_12 0x04 +#define NVT_DPCD_BPC_16 0x05 #define NVT_DPCD_AUTOMATED_TEST 0x02 #define NVT_DPCD_CP_IRQ 0x04 @@ -4874,7 +4874,7 @@ typedef enum #define NVT_DPCD_DPCD_REV 0x000 #define NVT_DPCD_DPCD_REV_MINOR_VER 3:0 #define NVT_DPCD_DPCD_REV_MAJOR_VER 7:4 -#define NVT_DPCD_DPCD_REV_10 0x10 +#define NVT_DPCD_DPCD_REV_10 0x10 #define NVT_DPCD_DPCD_REV_11 0x11 #define NVT_DPCD_DPCD_REV_12 0x12 @@ -5046,7 +5046,7 @@ typedef enum #define NVT_DPCD_TRAINING_LANE0_SET_MAX_PRE_EMPHASIS_REACHED_YES 1 #define NVT_DPCD_TRAINING_LANE0_SET_RSVD 7:6 -// 0x107h - DOWNSPREAD_CTRL +// 0x107h - DOWNSPREAD_CTRL #define NVT_DPCD_DOWNSPREAD_CTRL 0x107 #define NVT_DPCD_DOWNSPREAD_CTRL_RSVD 3:0 #define NVT_DPCD_DOWNSPREAD_CTRL_SPREAD_AMP 4:4 @@ -5085,7 +5085,7 @@ typedef enum #define NVT_DPCD_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x1C1 #define NVT_DPCD_PAYLOAD_ALLOCATE_START_TIME_SLOT_FIELD 5:0 -#define NVT_DPCD_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1C2 +#define NVT_DPCD_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1C2 #define NVT_DPCD_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT_FIELD 5:0 // 0x200h - SINK_COUNT @@ -5463,9 +5463,9 @@ typedef enum // // HDMI/DP common definitions -#define NVT_DYNAMIC_RANGE_VESA 0x00 -#define NVT_DYNAMIC_RANGE_CEA 0x01 -#define NVT_DYNAMIC_RANGE_AUTO 0xFF +#define NVT_DYNAMIC_RANGE_VESA 0x00 +#define NVT_DYNAMIC_RANGE_CEA 0x01 +#define NVT_DYNAMIC_RANGE_AUTO 0xFF typedef struct tagNVT_PARSED_DPCD_INFO_DOWNSTREAM_PORT @@ -5488,7 +5488,7 @@ typedef struct tagNVT_DPCD_PARSED_RECEIVER_INFO // downstream port info NvU32 downstreamPortCount; // the total number of down stream ports NvU32 downstreamPort0Type; // type of downstream port 0 - NVT_PARSED_DPCD_INFO_DOWNSTREAM_PORT downstreamPort[NVT_DPCD_RECEIVER_MAX_DOWNSTREAM_PORT]; + NVT_PARSED_DPCD_INFO_DOWNSTREAM_PORT downstreamPort[NVT_DPCD_RECEIVER_MAX_DOWNSTREAM_PORT]; // other misc info NvU32 cap_support0_005DownSpread : 1; @@ -5501,7 +5501,7 @@ typedef struct tagNVT_DPCD_PARSED_RECEIVER_INFO NvU32 cap_p0AssociatedToPrecedingPort : 1; NvU32 cap_p1HasEDID : 1; NvU32 cap_p1AssociatedToPrecedingPort : 1; - + // DP 1.2 fields NvU32 cap_mstm : 1; NvU32 cap_reserved : 21; @@ -5510,7 +5510,7 @@ typedef struct tagNVT_DPCD_PARSED_RECEIVER_INFO #define NVT_DPCD_NUM_TRAINING_LANES 4 typedef struct tagNVT_TRAINING_LANE_SETTING -{ +{ NvU8 voltageSwing; NvU8 maxSwingReached; NvU8 preEmphasis; @@ -5524,7 +5524,7 @@ typedef struct tagNVT_DPCD_PARSED_LINK_CONFIG NvU8 laneCount; NVT_TRAINING_LANE_SETTING trainLaneSetting[NVT_DPCD_NUM_TRAINING_LANES]; - + NvU32 enhancedFrameEnabled : 1; NvU32 trainingPatternSetting : 2; NvU32 linkQualityPatternSetting : 2; @@ -5564,14 +5564,14 @@ typedef struct tagNVT_DPCD_CONFIG #define NV_DISPLAYPORT_INFO_FLAGS_DP_MAX_CAP_LANECOUNT_2_LANE (0x00000001) #define NV_DISPLAYPORT_INFO_FLAGS_DP_MAX_CAP_LANECOUNT_4_LANE (0x00000002) #define NV_DISPLAYPORT_INFO_FLAGS_DP_MAX_CAP_LINKRATE 13:11 // Maximum supported linkRate -#define NV_DISPLAYPORT_INFO_FLAGS_DP_MAX_CAP_LINKRATE_1_62GBPS (0x00000000) +#define NV_DISPLAYPORT_INFO_FLAGS_DP_MAX_CAP_LINKRATE_1_62GBPS (0x00000000) #define NV_DISPLAYPORT_INFO_FLAGS_DP_MAX_CAP_LINKRATE_2_70GBPS (0x00000001) #define NV_DISPLAYPORT_INFO_FLAGS_DP_MAX_CAP_LINKRATE_5_40GBPS (0x00000002) #define NV_DISPLAYPORT_INFO_FLAGS_DP_MAX_CAP_LINKRATE_8_10GBPS (0x00000003) #define NV_DISPLAYPORT_INFO_FLAGS_DP_MULTISTREAM 16:16 // Bit to check MST/SST -#define NV_DISPLAYPORT_INFO_FLAGS_DP_MULTISTREAM_DISABLED (0x00000000) +#define NV_DISPLAYPORT_INFO_FLAGS_DP_MULTISTREAM_DISABLED (0x00000000) #define NV_DISPLAYPORT_INFO_FLAGS_DP_MULTISTREAM_ENABLED (0x00000001) -#define NV_DISPLAYPORT_INFO_FLAGS_DP_ENHANCED_FRAMING 17:17 // Bit to check enhanced framing support +#define NV_DISPLAYPORT_INFO_FLAGS_DP_ENHANCED_FRAMING 17:17 // Bit to check enhanced framing support #define NV_DISPLAYPORT_INFO_FLAGS_DP_ENHANCED_FRAMING_DISABLED (0x00000000) #define NV_DISPLAYPORT_INFO_FLAGS_DP_ENHANCED_FRAMING_ENABLED (0x00000001) #define NV_DISPLAYPORT_INFO_FLAGS_DP_DOWNSPREAD 18:18 // Bit to check downspread support @@ -5581,24 +5581,24 @@ typedef struct tagNVT_DPCD_CONFIG #define NV_DISPLAYPORT_INFO_FLAGS_DP_SCRAMBLING_DISABLED (0x00000000) #define NV_DISPLAYPORT_INFO_FLAGS_DP_SCRAMBLING_ENABLED (0x00000001) NvU32 linkRate; - NvU32 laneCount; + NvU32 laneCount; NvU32 colorFormat; NvU32 dynamicRange; NvU32 colorimetry; NvU32 bpc; NvU32 bpp; - + // pre-emphasis and drive current level (EFI might need this information) NvU8 laneData[4]; // DP max pixelClock supported based on DP max laneCount/linkRate NvU32 dpMaxPixelClk; NvU8 maxCapLinkRate; NvU8 maxCapLaneCount; - + // B4 (DP2VGA) Vendor Specific I2C Speed Control NvU8 dp2vga_i2cCap; NvU8 dp2vga_i2cCtrl; - + NvU8 bDpOffline; }NVT_DPCD_CONFIG; @@ -5651,7 +5651,7 @@ typedef struct tagNVT_DPCD_USB4_DRIVER_ID #define NVT_DEFAULT_HDTV_PREFERRED_TIMING(x, y, z, p) \ if(((x) == 1920) && ((y) == 1080) && ((z) != D3DDDI_VSSLO_PROGRESSIVE )) p = 1; -//Default format for non-DDC displays is 10x7 +//Default format for non-DDC displays is 10x7 #define NVT_DEFAULT_NONDCC_PREFERRED_TIMING(x, y, z, p) \ if(((x) == 1024) && ((y) == 768) && ((z) == 60 )) p = 1; @@ -5705,7 +5705,7 @@ typedef enum typedef enum { - // errors returned as a bitmask by NvTiming_EDIDValidationMask() + // errors returned as a bitmask by NvTiming_EDIDValidationMask() NVT_EDID_VALIDATION_ERR_EXT = 0, NVT_EDID_VALIDATION_ERR_VERSION, NVT_EDID_VALIDATION_ERR_SIZE, @@ -5715,7 +5715,7 @@ typedef enum NVT_EDID_VALIDATION_ERR_HEADER, NVT_EDID_VALIDATION_ERR_EXT_DTD, NVT_EDID_VALIDATION_ERR_EXTENSION_TAG, - NVT_EDID_VALIDATION_ERR_EXTENSION_COUNT, + NVT_EDID_VALIDATION_ERR_EXTENSION_COUNT, NVT_EDID_VALIDATION_ERR_DESCRIPTOR, NVT_EDID_VALIDATION_ERR_EXT_CTA_BASIC, NVT_EDID_VALIDATION_ERR_EXT_CTA_DTD, @@ -5726,7 +5726,7 @@ typedef enum NVT_EDID_VALIDATION_ERR_EXT_DID_VERSION, NVT_EDID_VALIDATION_ERR_EXT_DID_EXTCOUNT, NVT_EDID_VALIDATION_ERR_EXT_DID_CHECKSUM, - NVT_EDID_VALIDATION_ERR_EXT_DID_SEC_SIZE, + NVT_EDID_VALIDATION_ERR_EXT_DID_SEC_SIZE, NVT_EDID_VALIDATION_ERR_EXT_DID13_TAG, NVT_EDID_VALIDATION_ERR_EXT_DID13_TYPE1, NVT_EDID_VALIDATION_ERR_EXT_DID2_TAG, @@ -5747,7 +5747,7 @@ typedef enum // errors returned as a bitmask by NvTiming_DisplayID2ValidationMask() NVT_DID2_VALIDATION_ERR_VERSION = 0, NVT_DID2_VALIDATION_ERR_SIZE, - NVT_DID2_VALIDATION_ERR_CHECKSUM, + NVT_DID2_VALIDATION_ERR_CHECKSUM, NVT_DID2_VALIDATION_ERR_NO_DATA_BLOCK, NVT_EDID_VALIDATION_ERR_TAG, NVT_DID2_VALIDATION_ERR_RANGE_LIMIT, @@ -5827,8 +5827,8 @@ NVT_STATUS NvTiming_CalcDMT_RB2(NvU32 width, NvU32 height, NvU32 rr, NvU32 flag, // CVT timing calculation NVT_STATUS NvTiming_CalcCVT(NvU32 width, NvU32 height, NvU32 rr, NvU32 flag, NVT_TIMING *pT); NVT_STATUS NvTiming_CalcCVT_RB(NvU32 width, NvU32 height, NvU32 rr, NvU32 flag, NVT_TIMING *pT); -NVT_STATUS NvTiming_CalcCVT_RB2(NvU32 width, NvU32 height, NvU32 rr, NvBool is1000div1001, NVT_TIMING *pT); -NVT_STATUS NvTiming_CalcCVT_RB3(NvU32 width, NvU32 height, NvU32 rr, NvU32 deltaHBlank, NvU32 vBlankMicroSec, NvBool isEarlyVSync, NVT_TIMING *pT); +NVT_STATUS NvTiming_CalcCVT_RB2(NvU32 width, NvU32 height, NvU32 rr, NvBool is1000div1001, NvBool isAltMiniVblankTiming, NVT_TIMING *pT); +NVT_STATUS NvTiming_CalcCVT_RB3(NvU32 width, NvU32 height, NvU32 rr, NvU32 deltaHBlank, NvU32 vBlankMicroSec, NvBool isAltMiniVblankTiming, NvBool isEarlyVSync, NVT_TIMING *pT); NvBool NvTiming_IsTimingCVTRB(const NVT_TIMING *pTiming); // OVT timing calculation @@ -5842,7 +5842,7 @@ NVT_STATUS NvTiming_EnumNvPsfTiming(NvU32 nvPsfFormat, NVT_TIMING *pT); NvU32 NvTiming_GetCEA861TimingIndex(NVT_TIMING *pT); //expose the HDMI extended video timing defined by the HDMI LLC VSDB -NVT_STATUS NvTiming_EnumHdmiVsdbExtendedTiming(NvU32 hdmi_vic, NVT_TIMING *pT); +NVT_STATUS NvTiming_EnumHdmiVsdbExtendedTiming(NvU32 hdmi_vic, NVT_TIMING *pT); // TV(analog) based timing NVT_STATUS NvTiming_GetTvTiming(NvU32 width, NvU32 height, NvU32 rr, NvU32 flag, NvU32 tvFormat, NVT_TIMING *pT); @@ -5904,7 +5904,7 @@ void NvTiming_ConstructAdaptiveSyncSDP(const NVT_ADAPTIVE_SYNC_SDP_CTRL * // Get specific timing from parsed EDID NVT_STATUS NvTiming_GetDTD1Timing (NVT_EDID_INFO * pEdidInfo, NVT_TIMING * pT); -#define NVT_IS_DTD(d) (NVT_GET_TIMING_STATUS_TYPE((d)) == NVT_TYPE_EDID_DTD) +#define NVT_IS_DTD(d) (NVT_GET_TIMING_STATUS_TYPE((d)) == NVT_TYPE_EDID_DTD) #define NVT_IS_EXT_DTD(d) (NVT_GET_TIMING_STATUS_TYPE((d)) == NVT_TYPE_EDID_EXT_DTD) #define NVT_IS_CTA861(d) (NVT_GET_TIMING_STATUS_TYPE((d)) == NVT_TYPE_EDID_861ST) #define NVT_IS_CTA861_DID_T7(d) (NVT_GET_TIMING_STATUS_TYPE((d)) == NVT_TYPE_CTA861_DID_T7) diff --git a/src/common/nvlink/inband/interface/nvlink_inband_msg.h b/src/common/nvlink/inband/interface/nvlink_inband_msg.h index 234be6e62b..b6e0cdc2f1 100644 --- a/src/common/nvlink/inband/interface/nvlink_inband_msg.h +++ b/src/common/nvlink/inband/interface/nvlink_inband_msg.h @@ -101,7 +101,9 @@ typedef struct NvU32 gpuCapMask; /* GPU capabilities, one of NVLINK_INBAND_GPU_PROBE_CAPS */ NvU8 bwMode; /* NVLink bandwidth mode, one of NVLINK_INBAND_BW_MODE */ - NvU8 reserved[31]; /* For future use. Must be initialized to zero */ + NvU8 rbmRequested; /* Flag to request a specific RBM Mode */ + NvU8 rbmLinkCount; /* Number of links to be used for Reduced Bandwidth mode */ + NvU8 reserved[29]; /* For future use. Must be initialized to zero */ } nvlink_inband_gpu_probe_req_t; typedef struct @@ -139,7 +141,8 @@ typedef struct NvU32 cliqueId; /* Fabric Clique Id */ NvU32 fabricHealthMask; /* Mask containing bits indicating various fabric health parameters */ NvU32 gpaAddressEGMHi; /* GPA Address for EGM. Don't use if EGM support is not present in GFM */ - NvU8 reserved[16]; /* For future use. Must be initialized to zero */ + NvU8 maxRbmLinks; /* Max RBM mode supported */ + NvU8 reserved[15]; /* For future use. Must be initialized to zero */ } nvlink_inband_gpu_probe_rsp_t; typedef struct diff --git a/src/common/nvlink/kernel/nvlink/interface/nvlink_kern_shutdown_entry.c b/src/common/nvlink/kernel/nvlink/interface/nvlink_kern_shutdown_entry.c index b6e838f127..80c0f6527c 100644 --- a/src/common/nvlink/kernel/nvlink/interface/nvlink_kern_shutdown_entry.c +++ b/src/common/nvlink/kernel/nvlink/interface/nvlink_kern_shutdown_entry.c @@ -378,6 +378,21 @@ nvlink_lib_powerdown_links_from_active_to_off lockLinkCount++; } + if (lockLinkCount == 0) + { + if (conns != NULL) + nvlink_free((void *)conns); + + if (lockLinks != NULL) + nvlink_free((void *)lockLinks); + + // Release the top-level lock + nvlink_lib_top_lock_release(); + NVLINK_PRINT((DBG_MODULE_NVLINK_CORE, NVLINK_DBG_LEVEL_ERRORS, + "%s: No conns were found\n", __FUNCTION__)); + return NVL_NOT_FOUND; + } + // Acquire the per-link locks for all links captured status = nvlink_lib_link_locks_acquire(lockLinks, lockLinkCount); if (status != NVL_SUCCESS) @@ -923,4 +938,3 @@ nvlink_lib_powerdown_floorswept_links_to_off return status; } - diff --git a/src/common/nvswitch/common/inc/rmsoecmdif.h b/src/common/nvswitch/common/inc/rmsoecmdif.h index e7ada59d2c..1001c030f4 100644 --- a/src/common/nvswitch/common/inc/rmsoecmdif.h +++ b/src/common/nvswitch/common/inc/rmsoecmdif.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -49,6 +49,7 @@ #include "soe/soeifsmbpbi.h" #include "soe/soeifcore.h" #include "soe/soeifchnmgmt.h" +#include "soe/soeiftnvl.h" #include "soe/soeifcci.h" #include "soe/soeifheartbeat.h" @@ -71,6 +72,7 @@ typedef struct RM_SOE_BIF_CMD bif; RM_SOE_CORE_CMD core; RM_SOE_CHNMGMT_CMD chnmgmt; + RM_SOE_TNVL_CMD tnvl; RM_SOE_CCI_CMD cci; } cmd; } RM_FLCN_CMD_SOE, @@ -126,8 +128,9 @@ typedef struct #define RM_SOE_TASK_ID_CCI 0x0D #define RM_SOE_TASK_ID_FSPMGMT 0x0E #define RM_SOE_TASK_ID_HEARTBEAT 0x0F +#define RM_SOE_TASK_ID_TNVL 0x10 // Add new task ID here... -#define RM_SOE_TASK_ID__END 0x10 +#define RM_SOE_TASK_ID__END 0x11 /*! * Unit-identifiers: @@ -151,8 +154,9 @@ typedef struct #define RM_SOE_UNIT_CHNMGMT (0x0D) #define RM_SOE_UNIT_CCI (0x0E) #define RM_SOE_UNIT_HEARTBEAT (0x0F) +#define RM_SOE_UNIT_TNVL (0x10) // Add new unit ID here... -#define RM_SOE_UNIT_END (0x10) +#define RM_SOE_UNIT_END (0x11) #endif // _RMSOECMDIF_H_ diff --git a/src/common/nvswitch/common/inc/soe/soeiftnvl.h b/src/common/nvswitch/common/inc/soe/soeiftnvl.h new file mode 100644 index 0000000000..64119908e7 --- /dev/null +++ b/src/common/nvswitch/common/inc/soe/soeiftnvl.h @@ -0,0 +1,76 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _SOEIFTNVL_H_ +#define _SOEIFTNVL_H_ + + + +/*! + * @file soeiftnvl.h + * @brief SOE TNVL Command Queue + * + * The TNVL unit ID will be used for sending and recieving + * Command Messages between driver and TNVL unit of SOE + */ + +/*! + * Commands offered by the SOE Tnvl Interface. + */ +enum +{ + /* + * Issue register write command + */ + RM_SOE_TNVL_CMD_ISSUE_REGISTER_WRITE = 0x0, + /* + * Issue pre-lock sequence + */ + RM_SOE_TNVL_CMD_ISSUE_PRE_LOCK_SEQUENCE = 0x1, +}; + +/*! + * TNVL queue command payload + */ + +typedef struct +{ + NvU8 cmdType; + NvU32 offset; + NvU32 data; +} RM_SOE_TNVL_CMD_REGISTER_WRITE; + +typedef struct +{ + NvU8 cmdType; +} RM_SOE_TNVL_CMD_PRE_LOCK_SEQUENCE; + +typedef union +{ + NvU8 cmdType; + RM_SOE_TNVL_CMD_REGISTER_WRITE registerWrite; + RM_SOE_TNVL_CMD_PRE_LOCK_SEQUENCE preLockSequence; +} RM_SOE_TNVL_CMD; + +#endif // _SOEIFTNVL_H_ + diff --git a/src/common/nvswitch/kernel/cci/cci_nvswitch.c b/src/common/nvswitch/kernel/cci/cci_nvswitch.c index b8fbe018c4..3d8aa4ebcc 100644 --- a/src/common/nvswitch/kernel/cci/cci_nvswitch.c +++ b/src/common/nvswitch/kernel/cci/cci_nvswitch.c @@ -325,9 +325,17 @@ cciInit NvU32 pci_device_id ) { - nvswitch_task_create(device, _nvswitch_cci_poll_callback, - NVSWITCH_INTERVAL_1SEC_IN_NS / NVSWITCH_CCI_POLLING_RATE_HZ, - 0); + if (!nvswitch_is_tnvl_mode_enabled(device)) + { + nvswitch_task_create(device, _nvswitch_cci_poll_callback, + NVSWITCH_INTERVAL_1SEC_IN_NS / NVSWITCH_CCI_POLLING_RATE_HZ, + 0); + } + else + { + NVSWITCH_PRINT(device, INFO, "Skipping CCI background task when TNVL is enabled\n"); + } + return NVL_SUCCESS; } diff --git a/src/common/nvswitch/kernel/fsprpc_nvswitch.c b/src/common/nvswitch/kernel/fsprpc_nvswitch.c index 3c1333d1aa..9283c82967 100644 --- a/src/common/nvswitch/kernel/fsprpc_nvswitch.c +++ b/src/common/nvswitch/kernel/fsprpc_nvswitch.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -87,7 +87,7 @@ _nvswitch_fsp_poll_for_queue_empty do { - bKeepPolling = nvswitch_timeout_check(&timeout) ? NV_FALSE : NV_TRUE; + bKeepPolling = nvswitch_timeout_check(&timeout) ? NV_FALSE : NV_TRUE; bMsgqEmpty = _nvswitch_fsp_is_msgq_empty(device); bCmdqEmpty = _nvswitch_fsp_is_queue_empty(device); @@ -98,7 +98,7 @@ _nvswitch_fsp_poll_for_queue_empty // if (!bCmdqEmpty && !bMsgqEmpty) { - nvswitch_fsp_read_message(device, NULL, 0); + nvswitch_fsp_read_message(device, NULL, 0, &timeout); NVSWITCH_PRINT(device, ERROR, "Received error message from FSP while waiting for CMDQ to be empty.\n"); return -NVL_ERR_GENERIC; } @@ -125,23 +125,22 @@ _nvswitch_fsp_poll_for_queue_empty * @brief Poll for response from FSP via RM message queue * * @param[in] device nvswitch_device pointer + * @param[in] pTimeout RPC timeout * * @return NVL_SUCCESS, or NV_ERR_TIMEOUT */ static NvlStatus _nvswitch_fsp_poll_for_response ( - nvswitch_device *device + nvswitch_device *device, + NVSWITCH_TIMEOUT *pTimeout ) { NvBool bKeepPolling; - NVSWITCH_TIMEOUT timeout; - - nvswitch_timeout_create(10 * NVSWITCH_INTERVAL_1MSEC_IN_NS, &timeout); do { - bKeepPolling = nvswitch_timeout_check(&timeout) ? NV_FALSE : NV_TRUE; + bKeepPolling = nvswitch_timeout_check(pTimeout) ? NV_FALSE : NV_TRUE; // // Poll for message queue to wait for FSP's reply @@ -178,6 +177,8 @@ _nvswitch_fsp_poll_for_response * @param[in] device nvswitch_device pointer * @param[in/out] pPayloadBuffer Buffer in which to return message payload * @param[in] payloadBufferSize Payload buffer size + * @param[in] pTimeout RPC timeout + * * * @return NVL_SUCCESS, NV_ERR_INVALID_DATA, NV_ERR_INSUFFICIENT_RESOURCES, or errors * from functions called within @@ -187,7 +188,8 @@ nvswitch_fsp_read_message ( nvswitch_device *device, NvU8 *pPayloadBuffer, - NvU32 payloadBufferSize + NvU32 payloadBufferSize, + NVSWITCH_TIMEOUT *pTimeout ) { NvU8 *pPacketBuffer; @@ -206,7 +208,7 @@ nvswitch_fsp_read_message if (pPacketBuffer == NULL) { NVSWITCH_PRINT(device, ERROR, - "Failed to allocate memory for GLT!!\n"); + "%s: Failed to allocate memory!!\n", __FUNCTION__); return -NVL_NO_MEM; } @@ -219,9 +221,10 @@ nvswitch_fsp_read_message NvU8 tag; // Wait for next packet - status = _nvswitch_fsp_poll_for_response(device); + status = _nvswitch_fsp_poll_for_response(device, pTimeout); if (status != NVL_SUCCESS) { + NVSWITCH_PRINT(device, ERROR, "%s: Timed out waiting for response from FSP!\n", __FUNCTION__); goto done; } @@ -353,6 +356,7 @@ nvswitch_fsp_send_packet * @param[in] nvdmType NVDM type of message being sent * @param[in] pResponsePayload Buffer in which to return response payload * @param[in] responseBufferSize Response payload buffer size + * @param[in] pTimeout RPC timeout * * @return NVL_SUCCESS, or NV_ERR_* */ @@ -364,7 +368,8 @@ nvswitch_fsp_send_and_read_message NvU32 size, NvU32 nvdmType, NvU8 *pResponsePayload, - NvU32 responseBufferSize + NvU32 responseBufferSize, + NVSWITCH_TIMEOUT *pTimeout ) { NvU32 dataSent, dataRemaining; @@ -443,12 +448,13 @@ nvswitch_fsp_send_and_read_message } } - status = _nvswitch_fsp_poll_for_response(device); + status = _nvswitch_fsp_poll_for_response(device, pTimeout); if (status != NVL_SUCCESS) { + NVSWITCH_PRINT(device, ERROR, "%s: Timed out waiting for response from FSP!\n", __FUNCTION__); goto failed; } - status = nvswitch_fsp_read_message(device, pResponsePayload, responseBufferSize); + status = nvswitch_fsp_read_message(device, pResponsePayload, responseBufferSize, pTimeout); failed: nvswitch_os_free(pBuffer); diff --git a/src/common/nvswitch/kernel/inc/fsprpc_nvswitch.h b/src/common/nvswitch/kernel/inc/fsprpc_nvswitch.h index eda5b72669..6d454f188b 100644 --- a/src/common/nvswitch/kernel/inc/fsprpc_nvswitch.h +++ b/src/common/nvswitch/kernel/inc/fsprpc_nvswitch.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -91,8 +91,8 @@ typedef enum mctp_packet_state MCTP_PACKET_STATE_SINGLE_PACKET } MCTP_PACKET_STATE, *PMCTP_PACKET_STATE; -NvlStatus nvswitch_fsp_read_message(nvswitch_device *device, NvU8 *pPayloadBuffer, NvU32 payloadBufferSize); +NvlStatus nvswitch_fsp_read_message(nvswitch_device *device, NvU8 *pPayloadBuffer, NvU32 payloadBufferSize, struct NVSWITCH_TIMEOUT *pTimeout); NvlStatus nvswitch_fsp_send_packet(nvswitch_device *device, NvU8 *pPacket, NvU32 packetSize); -NvlStatus nvswitch_fsp_send_and_read_message(nvswitch_device *device, NvU8 *pPayload, NvU32 size, NvU32 nvdmType, NvU8 *pResponsePayload, NvU32 responseBufferSize); +NvlStatus nvswitch_fsp_send_and_read_message(nvswitch_device *device, NvU8 *pPayload, NvU32 size, NvU32 nvdmType, NvU8 *pResponsePayload, NvU32 responseBufferSize, struct NVSWITCH_TIMEOUT *pTimeout); #endif //_FSPRPC_NVSWITCH_H_ diff --git a/src/common/nvswitch/kernel/inc/haldef_nvswitch.h b/src/common/nvswitch/kernel/inc/haldef_nvswitch.h index 5c8dd78b65..d2c03b577e 100644 --- a/src/common/nvswitch/kernel/inc/haldef_nvswitch.h +++ b/src/common/nvswitch/kernel/inc/haldef_nvswitch.h @@ -296,6 +296,8 @@ _op(NvlStatus, nvswitch_tnvl_get_attestation_report, (nvswitch_device *device, NVSWITCH_GET_ATTESTATION_REPORT_PARAMS *params), _arch) \ _op(NvlStatus, nvswitch_tnvl_send_fsp_lock_config, (nvswitch_device *device), _arch) \ _op(NvlStatus, nvswitch_tnvl_get_status, (nvswitch_device *device, NVSWITCH_GET_TNVL_STATUS_PARAMS *params), _arch) \ + _op(NvlStatus, nvswitch_send_tnvl_prelock_cmd, (nvswitch_device *device), _arch) \ + _op(void, nvswitch_tnvl_disable_interrupts, (nvswitch_device *device), _arch) \ NVSWITCH_HAL_FUNCTION_LIST_FEATURE_0(_op, _arch) \ #define NVSWITCH_HAL_FUNCTION_LIST_LS10(_op, _arch) \ diff --git a/src/common/nvswitch/kernel/inc/lr10/lr10.h b/src/common/nvswitch/kernel/inc/lr10/lr10.h index 44c937b199..14894b1df2 100644 --- a/src/common/nvswitch/kernel/inc/lr10/lr10.h +++ b/src/common/nvswitch/kernel/inc/lr10/lr10.h @@ -710,4 +710,5 @@ NvlStatus nvswitch_fsp_error_code_to_nvlstatus_map_lr10(nvswitch_device *device, NvlStatus nvswitch_tnvl_get_attestation_certificate_chain_lr10(nvswitch_device *device, NVSWITCH_GET_ATTESTATION_CERTIFICATE_CHAIN_PARAMS *params); NvlStatus nvswitch_tnvl_get_attestation_report_lr10(nvswitch_device *device, NVSWITCH_GET_ATTESTATION_REPORT_PARAMS *params); NvlStatus nvswitch_tnvl_get_status_lr10(nvswitch_device *device, NVSWITCH_GET_TNVL_STATUS_PARAMS *params); +void nvswitch_tnvl_disable_interrupts_lr10(nvswitch_device *device); #endif //_LR10_H_ diff --git a/src/common/nvswitch/kernel/inc/ls10/ls10.h b/src/common/nvswitch/kernel/inc/ls10/ls10.h index a54a387cfa..66850b5fc8 100644 --- a/src/common/nvswitch/kernel/inc/ls10/ls10.h +++ b/src/common/nvswitch/kernel/inc/ls10/ls10.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,9 +29,9 @@ #include "export_nvswitch.h" #include "common_nvswitch.h" +#include "nvswitch/ls10/dev_boot.h" #include "ctrl_dev_nvswitch.h" -#include "nvswitch/ls10/dev_master.h" #define NVSWITCH_NUM_LINKS_LS10 64 #define NVSWITCH_NUM_LANES_LS10 2 @@ -189,6 +189,8 @@ #define SOE_VBIOS_VERSION_MASK 0xFF0000 #define SOE_VBIOS_REVLOCK_DISABLE_NPORT_FATAL_INTR 0x370000 #define SOE_VBIOS_REVLOCK_ISSUE_INGRESS_STOP 0x4C0000 +#define SOE_VBIOS_REVLOCK_ISSUE_REGISTER_WRITE 0x580000 +#define SOE_VBIOS_REVLOCK_TNVL_PRELOCK_COMMAND 0x600000 // LS10 Saved LED state #define ACCESS_LINK_LED_STATE CPLD_MACHXO3_ACCESS_LINK_LED_CTL_NVL_CABLE_LED @@ -1053,6 +1055,9 @@ NvlStatus nvswitch_tnvl_get_attestation_certificate_chain_ls10(nvswitch_device * NvlStatus nvswitch_tnvl_get_attestation_report_ls10(nvswitch_device *device, NVSWITCH_GET_ATTESTATION_REPORT_PARAMS *params); NvlStatus nvswitch_tnvl_send_fsp_lock_config_ls10(nvswitch_device *device); NvlStatus nvswitch_tnvl_get_status_ls10(nvswitch_device *device, NVSWITCH_GET_TNVL_STATUS_PARAMS *params); +void nvswitch_tnvl_reg_wr_32_ls10(nvswitch_device *device, NVSWITCH_ENGINE_ID eng_id, NvU32 eng_bcast, NvU32 eng_instance, NvU32 base_addr, NvU32 offset, NvU32 data); +NvlStatus nvswitch_send_tnvl_prelock_cmd_ls10(nvswitch_device *device); +void nvswitch_tnvl_disable_interrupts_ls10(nvswitch_device *device); NvlStatus nvswitch_ctrl_get_soe_heartbeat_ls10(nvswitch_device *device, NVSWITCH_GET_SOE_HEARTBEAT_PARAMS *p); NvlStatus nvswitch_cci_enable_iobist_ls10(nvswitch_device *device, NvU32 linkNumber, NvBool bEnable); diff --git a/src/common/nvswitch/kernel/inc/ls10/soe_ls10.h b/src/common/nvswitch/kernel/inc/ls10/soe_ls10.h index c693379024..dfe615af48 100644 --- a/src/common/nvswitch/kernel/inc/ls10/soe_ls10.h +++ b/src/common/nvswitch/kernel/inc/ls10/soe_ls10.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -51,4 +51,5 @@ NvlStatus nvswitch_soe_set_nport_interrupts_ls10(nvswitch_device *device, NvU32 void nvswitch_soe_disable_nport_fatal_interrupts_ls10(nvswitch_device *device, NvU32 nport, NvU32 nportIntrEnable, NvU8 nportIntrType); NvlStatus nvswitch_soe_issue_ingress_stop_ls10(nvswitch_device *device, NvU32 nport, NvBool bStop); +NvlStatus nvswitch_soe_reg_wr_32_ls10(nvswitch_device *device, NvU32 offset, NvU32 data); #endif //_SOE_LS10_H_ diff --git a/src/common/nvswitch/kernel/inc/soe/bin/g_soeuc_lr10_dbg.h b/src/common/nvswitch/kernel/inc/soe/bin/g_soeuc_lr10_dbg.h index 5d1f8f6e2e..9729049c1a 100644 --- a/src/common/nvswitch/kernel/inc/soe/bin/g_soeuc_lr10_dbg.h +++ b/src/common/nvswitch/kernel/inc/soe/bin/g_soeuc_lr10_dbg.h @@ -188,9 +188,9 @@ const NvU32 soe_ucode_data_lr10_dbg[] = { 0xa995039a, 0x0190b31f, 0x3d7cb29d, 0x133f3ed4, 0x10c93f00, 0xcc9001dd, 0xff9fc401, 0x23009033, 0x00310080, 0x80e80f7c, 0x3c003118, 0xbe66980f, 0xf00f08f4, 0xe97cff94, 0xf5b96690, 0x26ff6708, 0xd008f4d6, 0xe4ffafc4, 0xb6fffff9, 0x49fa0894, 0x01339004, 0x0cf52566, 0x07f8ff0d, 0x81fb3ab2, - 0xc53252f9, 0xb332a4b2, 0x0800a0b3, 0x0c00b433, 0xff0a02f8, 0x0013ae3e, 0x42b2c43d, 0x0011037e, - 0x14bd043d, 0x0013a73e, 0x00102a3f, 0x01229001, 0x1700a033, 0x3c324bb2, 0x387e5d32, 0x1abc0012, - 0x00a6b010, 0x260a1ef4, 0xdf08f403, 0x51fb1ab2, 0x0000ea7e, 0x4a7e2f0b, 0x00f80018, 0x0000ea7e, + 0xc53252f9, 0xb332a4b2, 0x0800a0b3, 0x0c00b433, 0xff0a02f8, 0x0013ae3e, 0x41b2c43d, 0x0011037e, + 0x043d24bd, 0x0013a73e, 0x00101a3f, 0x01119001, 0x1700a033, 0x3c324bb2, 0x387e5d32, 0x2abc0012, + 0x00a6b020, 0x260a1ef4, 0xdf08f403, 0x51fb2ab2, 0x0000ea7e, 0x4a7e2f0b, 0x00f80018, 0x0000ea7e, 0x4a7e2f0b, 0x00f80018, 0xa93f22f9, 0xd0b2c1b2, 0x3204c0b4, 0xff94f0ed, 0x08f4b9a6, 0x9402f805, 0xb99402bf, 0x02ae9804, 0x5200c0b3, 0x3cf0f9bc, 0xa998f9ed, 0x18203402, 0x0e1e0dcc, 0x909fbc01, 0x98019235, 0xebbb02a9, 0x909fbc04, 0x980191b5, 0x9fbc02a9, 0x029db590, 0xbc02a998, 0x9cb5909f, @@ -426,8 +426,8 @@ const NvU32 soe_ucode_data_lr10_dbg[] = { 0xb9e404a9, 0x1bf50fff, 0x4dfe0224, 0x0c6ab201, 0x44dd9004, 0x0028d77e, 0x0a00a033, 0xb13ea532, 0x90b40032, 0xff94f111, 0x0239750f, 0xe71190b4, 0x75016c99, 0x90b40339, 0x1f95b611, 0xb4083935, 0xf9e411f0, 0x9ab30fff, 0xe7130fff, 0xb3016cf9, 0x0a0fff9a, 0x39350109, 0xb339bf09, 0x00900099, - 0x00297cdf, 0x0dfb1800, 0x4a049990, 0x91b00ffc, 0xffb4f009, 0x0016bb7e, 0x743d94bd, 0x090d91b0, - 0x94a9fffc, 0x3e0c91b0, 0x3d003277, 0x7e1c0ba4, 0xb200384c, 0x00a4b3a1, 0x0002f80c, 0x32de3e05, + 0x00297cdf, 0x0dfb1800, 0xb0049990, 0x94bd0991, 0xb00ffc4a, 0xb4f00d91, 0x16bb7eff, 0x3dfc0900, + 0x94a9ff74, 0x3e0c91b0, 0x3d003277, 0x7e1c0ba4, 0xb200384c, 0x00a4b3a1, 0x0002f80c, 0x32de3e05, 0x0cb0b400, 0x7eff7ac4, 0xbd0016fc, 0x061eb5e4, 0x0c09b0b4, 0x014dfe04, 0xbc40dd90, 0x6ab2b0ba, 0x7e011bb5, 0x320028d7, 0x00ad33a0, 0x90b40155, 0xffffdf10, 0x9ffd00ff, 0xa619a004, 0x071bf49f, 0x19a094bd, 0xb3011b98, 0xf80c00b4, 0x3e020002, 0xb40032de, 0x3f180ce0, 0x01b99208, 0xbc04b290, @@ -2269,8 +2269,8 @@ const NvU32 soe_ucode_data_lr10_dbg[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x69e9060c, 0xe6ca2d91, 0xac20edf2, 0xeafeafcc, 0x34352e3e, 0x16b9514e, 0xb0b75ac2, 0xb2eff27b, - 0x30867660, 0xbc4af25f, 0xbc09e1ed, 0xab87e0fc, 0xaed46664, 0x0e67518e, 0x2e509632, 0x911f4d66, + 0x69e9060c, 0xe6ca2d91, 0xac20edf2, 0xeafeafcc, 0x7941bd61, 0xa58046fa, 0xea4f2206, 0x1f176aa9, + 0x30867660, 0xbc4af25f, 0xbc09e1ed, 0xab87e0fc, 0x71adf495, 0x5294be55, 0x76b98dbd, 0xa2c54edf, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, diff --git a/src/common/nvswitch/kernel/inc/soe/bin/g_soeuc_lr10_prd.h b/src/common/nvswitch/kernel/inc/soe/bin/g_soeuc_lr10_prd.h index 309adfcd34..2d5fee9f8f 100644 --- a/src/common/nvswitch/kernel/inc/soe/bin/g_soeuc_lr10_prd.h +++ b/src/common/nvswitch/kernel/inc/soe/bin/g_soeuc_lr10_prd.h @@ -188,9 +188,9 @@ const NvU32 soe_ucode_data_lr10_prd[] = { 0xa995039a, 0x0190b31f, 0x3d7cb29d, 0x133f3ed4, 0x10c93f00, 0xcc9001dd, 0xff9fc401, 0x23009033, 0x00310080, 0x80e80f7c, 0x3c003118, 0xbe66980f, 0xf00f08f4, 0xe97cff94, 0xf5b96690, 0x26ff6708, 0xd008f4d6, 0xe4ffafc4, 0xb6fffff9, 0x49fa0894, 0x01339004, 0x0cf52566, 0x07f8ff0d, 0x81fb3ab2, - 0xc53252f9, 0xb332a4b2, 0x0800a0b3, 0x0c00b433, 0xff0a02f8, 0x0013ae3e, 0x42b2c43d, 0x0011037e, - 0x14bd043d, 0x0013a73e, 0x00102a3f, 0x01229001, 0x1700a033, 0x3c324bb2, 0x387e5d32, 0x1abc0012, - 0x00a6b010, 0x260a1ef4, 0xdf08f403, 0x51fb1ab2, 0x0000ea7e, 0x4a7e2f0b, 0x00f80018, 0x0000ea7e, + 0xc53252f9, 0xb332a4b2, 0x0800a0b3, 0x0c00b433, 0xff0a02f8, 0x0013ae3e, 0x41b2c43d, 0x0011037e, + 0x043d24bd, 0x0013a73e, 0x00101a3f, 0x01119001, 0x1700a033, 0x3c324bb2, 0x387e5d32, 0x2abc0012, + 0x00a6b020, 0x260a1ef4, 0xdf08f403, 0x51fb2ab2, 0x0000ea7e, 0x4a7e2f0b, 0x00f80018, 0x0000ea7e, 0x4a7e2f0b, 0x00f80018, 0xa93f22f9, 0xd0b2c1b2, 0x3204c0b4, 0xff94f0ed, 0x08f4b9a6, 0x9402f805, 0xb99402bf, 0x02ae9804, 0x5200c0b3, 0x3cf0f9bc, 0xa998f9ed, 0x18203402, 0x0e1e0dcc, 0x909fbc01, 0x98019235, 0xebbb02a9, 0x909fbc04, 0x980191b5, 0x9fbc02a9, 0x029db590, 0xbc02a998, 0x9cb5909f, @@ -426,8 +426,8 @@ const NvU32 soe_ucode_data_lr10_prd[] = { 0xb9e404a9, 0x1bf50fff, 0x4dfe0224, 0x0c6ab201, 0x44dd9004, 0x0028d77e, 0x0a00a033, 0xb13ea532, 0x90b40032, 0xff94f111, 0x0239750f, 0xe71190b4, 0x75016c99, 0x90b40339, 0x1f95b611, 0xb4083935, 0xf9e411f0, 0x9ab30fff, 0xe7130fff, 0xb3016cf9, 0x0a0fff9a, 0x39350109, 0xb339bf09, 0x00900099, - 0x00297cdf, 0x0dfb1800, 0x4a049990, 0x91b00ffc, 0xffb4f009, 0x0016bb7e, 0x743d94bd, 0x090d91b0, - 0x94a9fffc, 0x3e0c91b0, 0x3d003277, 0x7e1c0ba4, 0xb200384c, 0x00a4b3a1, 0x0002f80c, 0x32de3e05, + 0x00297cdf, 0x0dfb1800, 0xb0049990, 0x94bd0991, 0xb00ffc4a, 0xb4f00d91, 0x16bb7eff, 0x3dfc0900, + 0x94a9ff74, 0x3e0c91b0, 0x3d003277, 0x7e1c0ba4, 0xb200384c, 0x00a4b3a1, 0x0002f80c, 0x32de3e05, 0x0cb0b400, 0x7eff7ac4, 0xbd0016fc, 0x061eb5e4, 0x0c09b0b4, 0x014dfe04, 0xbc40dd90, 0x6ab2b0ba, 0x7e011bb5, 0x320028d7, 0x00ad33a0, 0x90b40155, 0xffffdf10, 0x9ffd00ff, 0xa619a004, 0x071bf49f, 0x19a094bd, 0xb3011b98, 0xf80c00b4, 0x3e020002, 0xb40032de, 0x3f180ce0, 0x01b99208, 0xbc04b290, @@ -2269,8 +2269,8 @@ const NvU32 soe_ucode_data_lr10_prd[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x69e9060c, 0xe6ca2d91, 0xac20edf2, 0xeafeafcc, 0x34352e3e, 0x16b9514e, 0xb0b75ac2, 0xb2eff27b, - 0x30867660, 0xbc4af25f, 0xbc09e1ed, 0xab87e0fc, 0xaed46664, 0x0e67518e, 0x2e509632, 0x911f4d66, + 0x69e9060c, 0xe6ca2d91, 0xac20edf2, 0xeafeafcc, 0x7941bd61, 0xa58046fa, 0xea4f2206, 0x1f176aa9, + 0x30867660, 0xbc4af25f, 0xbc09e1ed, 0xab87e0fc, 0x71adf495, 0x5294be55, 0x76b98dbd, 0xa2c54edf, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, diff --git a/src/common/nvswitch/kernel/inforom/ifrnvlink_nvswitch.c b/src/common/nvswitch/kernel/inforom/ifrnvlink_nvswitch.c index eea3c144de..daa9a33605 100644 --- a/src/common/nvswitch/kernel/inforom/ifrnvlink_nvswitch.c +++ b/src/common/nvswitch/kernel/inforom/ifrnvlink_nvswitch.c @@ -212,8 +212,15 @@ _inforom_nvlink_start_correctable_error_recording pNvlinkState->bCallbackPending = NV_FALSE; - nvswitch_task_create(device, &_nvswitch_nvlink_1hz_callback, - NVSWITCH_INTERVAL_1SEC_IN_NS, 0); + if (!nvswitch_is_tnvl_mode_enabled(device)) + { + nvswitch_task_create(device, &_nvswitch_nvlink_1hz_callback, + NVSWITCH_INTERVAL_1SEC_IN_NS, 0); + } + else + { + NVSWITCH_PRINT(device, INFO, "Skipping NVLINK heartbeat task when TNVL is enabled\n"); + } } NvlStatus diff --git a/src/common/nvswitch/kernel/lr10/lr10.c b/src/common/nvswitch/kernel/lr10/lr10.c index 21f431c8e7..61504dadce 100644 --- a/src/common/nvswitch/kernel/lr10/lr10.c +++ b/src/common/nvswitch/kernel/lr10/lr10.c @@ -8301,6 +8301,24 @@ nvswitch_tnvl_get_status_lr10 return -NVL_ERR_NOT_SUPPORTED; } +NvlStatus +nvswitch_send_tnvl_prelock_cmd_lr10 +( + nvswitch_device *device +) +{ + return -NVL_ERR_NOT_SUPPORTED; +} + +void +nvswitch_tnvl_disable_interrupts_lr10 +( + nvswitch_device *device +) +{ + return; +} + // // This function auto creates the lr10 HAL connectivity from the NVSWITCH_INIT_HAL // macro in haldef_nvswitch.h diff --git a/src/common/nvswitch/kernel/ls10/cci_ls10.c b/src/common/nvswitch/kernel/ls10/cci_ls10.c index 3d4a81cc85..e4fc9b3eab 100644 --- a/src/common/nvswitch/kernel/ls10/cci_ls10.c +++ b/src/common/nvswitch/kernel/ls10/cci_ls10.c @@ -386,6 +386,13 @@ nvswitch_is_cci_supported_ls10 nvswitch_device *device ) { + // Skip CCI on TNVL mode + if (nvswitch_is_tnvl_mode_enabled(device)) + { + NVSWITCH_PRINT(device, INFO, "CCI is not supported on TNVL mode\n"); + return NV_FALSE; + } + if (FLD_TEST_DRF(_SWITCH_REGKEY, _CCI_CONTROL, _ENABLE, _FALSE, device->regkeys.cci_control)) { diff --git a/src/common/nvswitch/kernel/ls10/fsprpc_ls10.c b/src/common/nvswitch/kernel/ls10/fsprpc_ls10.c index 5bd7e10fab..e8e05f720e 100644 --- a/src/common/nvswitch/kernel/ls10/fsprpc_ls10.c +++ b/src/common/nvswitch/kernel/ls10/fsprpc_ls10.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -585,13 +585,16 @@ nvswitch_fsprpc_get_caps_ls10 TNVL_RPC_CAPS_PAYLOAD payload; TNVL_RPC_CAPS_RSP_PAYLOAD responsePayload; NvlStatus status; + NVSWITCH_TIMEOUT timeout; payload.subMessageId = TNVL_CAPS_SUBMESSAGE_ID; nvswitch_os_memset(&responsePayload, 0, sizeof(TNVL_RPC_CAPS_RSP_PAYLOAD)); + nvswitch_timeout_create(5 * NVSWITCH_INTERVAL_1SEC_IN_NS, &timeout); + status = nvswitch_fsp_send_and_read_message(device, (NvU8*) &payload, sizeof(TNVL_RPC_CAPS_PAYLOAD), NVDM_TYPE_CAPS_QUERY, - (NvU8*) &responsePayload, sizeof(TNVL_RPC_CAPS_RSP_PAYLOAD)); + (NvU8*) &responsePayload, sizeof(TNVL_RPC_CAPS_RSP_PAYLOAD), &timeout); if (status != NVL_SUCCESS) { NVSWITCH_PRINT(device, ERROR, "RPC failed for FSP caps query\n"); diff --git a/src/common/nvswitch/kernel/ls10/intr_ls10.c b/src/common/nvswitch/kernel/ls10/intr_ls10.c index e6c03c5480..ba781ca734 100644 --- a/src/common/nvswitch/kernel/ls10/intr_ls10.c +++ b/src/common/nvswitch/kernel/ls10/intr_ls10.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -1367,6 +1367,13 @@ _nvswitch_service_route_nonfatal_ls10 if (!(nvswitch_test_flags(report.raw_pending, DRF_NUM(_ROUTE, _ERR_STATUS_0, _NVS_ECC_DBE_ERR, 1)))) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + report.data[0] = NVSWITCH_ENG_RD32(device, NPORT, , link, _ROUTE, _ERR_NVS_ECC_ERROR_COUNTER); _nvswitch_collect_error_info_ls10(device, link, NVSWITCH_RAW_ERROR_LOG_DATA_FLAG_ROUTE_TIME, @@ -1391,6 +1398,13 @@ _nvswitch_service_route_nonfatal_ls10 if (!(nvswitch_test_flags(report.raw_pending, DRF_NUM(_ROUTE, _ERR_STATUS_0, _GLT_ECC_DBE_ERR, 1)))) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + report.data[0] = NVSWITCH_ENG_RD32(device, NPORT, , link, _ROUTE, _ERR_GLT_ECC_ERROR_COUNTER); _nvswitch_collect_error_info_ls10(device, link, NVSWITCH_RAW_ERROR_LOG_DATA_FLAG_ROUTE_TIME, @@ -1415,6 +1429,13 @@ _nvswitch_service_route_nonfatal_ls10 if (!(nvswitch_test_flags(report.raw_pending, DRF_NUM(_ROUTE, _ERR_STATUS_0, _MCRID_ECC_DBE_ERR, 1)))) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + report.data[0] = NVSWITCH_ENG_RD32(device, NPORT, , link, _ROUTE, _ERR_MCRID_ECC_ERROR_COUNTER); _nvswitch_collect_error_info_ls10(device, link, NVSWITCH_RAW_ERROR_LOG_DATA_FLAG_ROUTE_TIME, @@ -1439,6 +1460,13 @@ _nvswitch_service_route_nonfatal_ls10 if (!(nvswitch_test_flags(report.raw_pending, DRF_NUM(_ROUTE, _ERR_STATUS_0, _EXTMCRID_ECC_DBE_ERR, 1)))) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + report.data[0] = NVSWITCH_ENG_RD32(device, NPORT, , link, _ROUTE, _ERR_EXTMCRID_ECC_ERROR_COUNTER); _nvswitch_collect_error_info_ls10(device, link, NVSWITCH_RAW_ERROR_LOG_DATA_FLAG_ROUTE_TIME, @@ -1463,6 +1491,13 @@ _nvswitch_service_route_nonfatal_ls10 if (!(nvswitch_test_flags(report.raw_pending, DRF_NUM(_ROUTE, _ERR_STATUS_0, _RAM_ECC_DBE_ERR, 1)))) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + report.data[0] = NVSWITCH_ENG_RD32(device, NPORT, , link, _ROUTE, _ERR_RAM_ECC_ERROR_COUNTER); _nvswitch_collect_error_info_ls10(device, link, NVSWITCH_RAW_ERROR_LOG_DATA_FLAG_ROUTE_TIME, @@ -1603,6 +1638,13 @@ _nvswitch_service_ingress_fatal_ls10 // Clear associated LIMIT_ERR interrupt if (report.raw_pending & DRF_NUM(_INGRESS, _ERR_STATUS_0, _NCISOC_HDR_ECC_LIMIT_ERR, 1)) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + NVSWITCH_ENG_WR32(device, NPORT, , link, _INGRESS, _ERR_STATUS_0, DRF_NUM(_INGRESS, _ERR_STATUS_0, _NCISOC_HDR_ECC_LIMIT_ERR, 1)); } @@ -1851,6 +1893,13 @@ _nvswitch_service_ingress_nonfatal_ls10 if (!(nvswitch_test_flags(report.raw_pending, DRF_NUM(_INGRESS, _ERR_STATUS_0, _NCISOC_HDR_ECC_DBE_ERR, 1)))) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + report.data[0] = NVSWITCH_ENG_RD32(device, NPORT, , link, _INGRESS, _ERR_NCISOC_HDR_ECC_ERROR_COUNTER); NVSWITCH_REPORT_NONFATAL(_HW_NPORT_INGRESS_NCISOC_HDR_ECC_LIMIT_ERR, "ingress header ECC"); NVSWITCH_REPORT_DATA(_HW_NPORT_INGRESS_NCISOC_HDR_ECC_LIMIT_ERR, data); @@ -1897,6 +1946,13 @@ _nvswitch_service_ingress_nonfatal_ls10 if (!(nvswitch_test_flags(report.raw_pending, DRF_NUM(_INGRESS, _ERR_STATUS_0, _REMAPTAB_ECC_DBE_ERR, 1)))) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + report.data[0] = NVSWITCH_ENG_RD32(device, NPORT, , link, _INGRESS, _ERR_REMAPTAB_ECC_ERROR_COUNTER); NVSWITCH_REPORT_NONFATAL(_HW_NPORT_INGRESS_REMAPTAB_ECC_LIMIT_ERR, "ingress remap ECC"); NVSWITCH_REPORT_DATA(_HW_NPORT_INGRESS_REMAPTAB_ECC_LIMIT_ERR, data); @@ -1918,6 +1974,13 @@ _nvswitch_service_ingress_nonfatal_ls10 if (!(nvswitch_test_flags(report.raw_pending, DRF_NUM(_INGRESS, _ERR_STATUS_0, _RIDTAB_ECC_DBE_ERR, 1)))) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + report.data[0] = NVSWITCH_ENG_RD32(device, NPORT, , link, _INGRESS, _ERR_RIDTAB_ECC_ERROR_COUNTER); NVSWITCH_REPORT_NONFATAL(_HW_NPORT_INGRESS_RIDTAB_ECC_LIMIT_ERR, "ingress RID ECC"); NVSWITCH_REPORT_DATA(_HW_NPORT_INGRESS_RIDTAB_ECC_LIMIT_ERR, data); @@ -1939,6 +2002,13 @@ _nvswitch_service_ingress_nonfatal_ls10 if (!(nvswitch_test_flags(report.raw_pending, DRF_NUM(_INGRESS, _ERR_STATUS_0, _RLANTAB_ECC_DBE_ERR, 1)))) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + report.data[0] = NVSWITCH_ENG_RD32(device, NPORT, , link, _INGRESS, _ERR_RLANTAB_ECC_ERROR_COUNTER); NVSWITCH_REPORT_NONFATAL(_HW_NPORT_INGRESS_RLANTAB_ECC_LIMIT_ERR, "ingress RLAN ECC"); NVSWITCH_REPORT_DATA(_HW_NPORT_INGRESS_RLANTAB_ECC_LIMIT_ERR, data); @@ -2106,6 +2176,13 @@ _nvswitch_service_ingress_nonfatal_ls10 if (!(nvswitch_test_flags(raw_pending_0, DRF_NUM(_INGRESS, _ERR_STATUS_0, _EXTAREMAPTAB_ECC_DBE_ERR, 1)))) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + report.data[0] = NVSWITCH_ENG_RD32(device, NPORT, , link, _INGRESS, _ERR_EXTAREMAPTAB_ECC_ERROR_COUNTER); NVSWITCH_REPORT_NONFATAL(_HW_NPORT_INGRESS_EXTAREMAPTAB_ECC_LIMIT_ERR, "ingress ExtA remap ECC"); NVSWITCH_REPORT_DATA(_HW_NPORT_INGRESS_EXTAREMAPTAB_ECC_LIMIT_ERR, data); @@ -2127,6 +2204,13 @@ _nvswitch_service_ingress_nonfatal_ls10 if (!(nvswitch_test_flags(raw_pending_0, DRF_NUM(_INGRESS, _ERR_STATUS_0, _EXTBREMAPTAB_ECC_DBE_ERR, 1)))) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + report.data[0] = NVSWITCH_ENG_RD32(device, NPORT, , link, _INGRESS, _ERR_EXTBREMAPTAB_ECC_ERROR_COUNTER); NVSWITCH_REPORT_NONFATAL(_HW_NPORT_INGRESS_EXTBREMAPTAB_ECC_LIMIT_ERR, "ingress ExtB remap ECC"); NVSWITCH_REPORT_DATA(_HW_NPORT_INGRESS_EXTBREMAPTAB_ECC_LIMIT_ERR, data); @@ -2148,6 +2232,13 @@ _nvswitch_service_ingress_nonfatal_ls10 if (!(nvswitch_test_flags(raw_pending_0, DRF_NUM(_INGRESS, _ERR_STATUS_0, _MCREMAPTAB_ECC_DBE_ERR, 1)))) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + report.data[0] = NVSWITCH_ENG_RD32(device, NPORT, , link, _INGRESS, _ERR_MCREMAPTAB_ECC_ERROR_COUNTER); NVSWITCH_REPORT_NONFATAL(_HW_NPORT_INGRESS_MCREMAPTAB_ECC_LIMIT_ERR, "ingress MC remap ECC"); NVSWITCH_REPORT_DATA(_HW_NPORT_INGRESS_MCREMAPTAB_ECC_LIMIT_ERR, data); @@ -2281,8 +2372,6 @@ _nvswitch_service_tstate_nonfatal_ls10 } report.data[1] = NVSWITCH_ENG_RD32(device, NPORT, , link, _TSTATE, _ERR_TAGPOOL_ECC_ERROR_COUNTER); - NVSWITCH_ENG_WR32(device, NPORT, , link, _TSTATE, _ERR_TAGPOOL_ECC_ERROR_COUNTER, - DRF_DEF(_TSTATE, _ERR_TAGPOOL_ECC_ERROR_COUNTER, _ERROR_COUNT, _INIT)); NVSWITCH_REPORT_NONFATAL(_HW_NPORT_TSTATE_TAGPOOL_ECC_LIMIT_ERR, "TS tag store single-bit threshold"); _nvswitch_collect_error_info_ls10(device, link, NVSWITCH_RAW_ERROR_LOG_DATA_FLAG_EGRESS_TIME | @@ -2291,6 +2380,15 @@ _nvswitch_service_tstate_nonfatal_ls10 &data); NVSWITCH_REPORT_DATA(_HW_NPORT_TSTATE_TAGPOOL_ECC_LIMIT_ERR, data); + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + NVSWITCH_ENG_WR32(device, NPORT, , link, _TSTATE, _ERR_TAGPOOL_ECC_ERROR_COUNTER, + DRF_DEF(_TSTATE, _ERR_TAGPOOL_ECC_ERROR_COUNTER, _ERROR_COUNT, _INIT)); + _nvswitch_construct_ecc_error_event_ls10(&err_event, NVSWITCH_ERR_HW_NPORT_TSTATE_TAGPOOL_ECC_LIMIT_ERR, link, bAddressValid, address, NV_FALSE, 1); @@ -2322,8 +2420,6 @@ _nvswitch_service_tstate_nonfatal_ls10 } report.data[1] = NVSWITCH_ENG_RD32(device, NPORT, , link, _TSTATE, _ERR_CRUMBSTORE_ECC_ERROR_COUNTER); - NVSWITCH_ENG_WR32(device, NPORT, , link, _TSTATE, _ERR_CRUMBSTORE_ECC_ERROR_COUNTER, - DRF_DEF(_TSTATE, _ERR_CRUMBSTORE_ECC_ERROR_COUNTER, _ERROR_COUNT, _INIT)); NVSWITCH_REPORT_NONFATAL(_HW_NPORT_TSTATE_CRUMBSTORE_ECC_LIMIT_ERR, "TS crumbstore single-bit threshold"); _nvswitch_collect_error_info_ls10(device, link, NVSWITCH_RAW_ERROR_LOG_DATA_FLAG_INGRESS_TIME | @@ -2332,6 +2428,15 @@ _nvswitch_service_tstate_nonfatal_ls10 &data); NVSWITCH_REPORT_DATA(_HW_NPORT_TSTATE_CRUMBSTORE_ECC_LIMIT_ERR, data); + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + NVSWITCH_ENG_WR32(device, NPORT, , link, _TSTATE, _ERR_CRUMBSTORE_ECC_ERROR_COUNTER, + DRF_DEF(_TSTATE, _ERR_CRUMBSTORE_ECC_ERROR_COUNTER, _ERROR_COUNT, _INIT)); + _nvswitch_construct_ecc_error_event_ls10(&err_event, NVSWITCH_ERR_HW_NPORT_TSTATE_CRUMBSTORE_ECC_LIMIT_ERR, link, bAddressValid, address, NV_FALSE, 1); @@ -2446,6 +2551,13 @@ _nvswitch_service_tstate_fatal_ls10 // Clear associated LIMIT_ERR interrupt if (report.raw_pending & DRF_NUM(_TSTATE, _ERR_STATUS_0, _TAGPOOL_ECC_LIMIT_ERR, 1)) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + NVSWITCH_ENG_WR32(device, NPORT, , link, _TSTATE, _ERR_STATUS_0, DRF_NUM(_TSTATE, _ERR_STATUS_0, _TAGPOOL_ECC_LIMIT_ERR, 1)); } @@ -2501,6 +2613,13 @@ _nvswitch_service_tstate_fatal_ls10 // Clear associated LIMIT_ERR interrupt if (report.raw_pending & DRF_NUM(_TSTATE, _ERR_STATUS_0, _CRUMBSTORE_ECC_LIMIT_ERR, 1)) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + NVSWITCH_ENG_WR32(device, NPORT, , link, _TSTATE, _ERR_STATUS_0, DRF_NUM(_TSTATE, _ERR_STATUS_0, _CRUMBSTORE_ECC_LIMIT_ERR, 1)); } @@ -2609,6 +2728,13 @@ _nvswitch_service_egress_nonfatal_ls10 if (!(nvswitch_test_flags(report.raw_pending, DRF_NUM(_EGRESS, _ERR_STATUS_0, _NXBAR_HDR_ECC_DBE_ERR, 1)))) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + report.data[0] = NVSWITCH_ENG_RD32(device, NPORT, , link, _EGRESS, _ERR_NXBAR_ECC_ERROR_COUNTER); NVSWITCH_REPORT_NONFATAL(_HW_NPORT_EGRESS_NXBAR_HDR_ECC_LIMIT_ERR, "egress input ECC error limit"); NVSWITCH_REPORT_DATA(_HW_NPORT_EGRESS_NXBAR_HDR_ECC_LIMIT_ERR, data); @@ -2648,6 +2774,13 @@ _nvswitch_service_egress_nonfatal_ls10 NVSWITCH_REPORT_NONFATAL(_HW_NPORT_EGRESS_RAM_OUT_HDR_ECC_LIMIT_ERR, "egress output ECC error limit"); NVSWITCH_REPORT_DATA(_HW_NPORT_EGRESS_RAM_OUT_HDR_ECC_LIMIT_ERR, data); + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + _nvswitch_construct_ecc_error_event_ls10(&err_event, NVSWITCH_ERR_HW_NPORT_EGRESS_RAM_OUT_HDR_ECC_LIMIT_ERR, link, bAddressValid, address, NV_FALSE, 1); @@ -2714,6 +2847,16 @@ _nvswitch_service_egress_nonfatal_ls10 if (!(nvswitch_test_flags(report.raw_pending, DRF_NUM(_EGRESS, _ERR_STATUS_1, _NXBAR_REDUCTION_HDR_ECC_DBE_ERR, 1)))) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + + + NVSWITCH_ENG_WR32(device, NPORT, , link, _EGRESS, _ERR_NXBAR_REDUCTION_ECC_ERROR_COUNTER, 0); + NVSWITCH_REPORT_NONFATAL(_HW_NPORT_EGRESS_NXBAR_REDUCTION_HDR_ECC_LIMIT_ERR, "egress reduction header ECC error limit"); NVSWITCH_REPORT_DATA(_HW_NPORT_EGRESS_NXBAR_HDR_ECC_LIMIT_ERR, data); @@ -2734,6 +2877,15 @@ _nvswitch_service_egress_nonfatal_ls10 if (!(nvswitch_test_flags(report.raw_pending, DRF_NUM(_EGRESS, _ERR_STATUS_1, _MCRSPCTRLSTORE_ECC_DBE_ERR, 1)))) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + + NVSWITCH_ENG_WR32(device, NPORT, , link, _EGRESS, _ERR_MCRSPCTRLSTORE_ECC_ERROR_COUNTER, 0); + NVSWITCH_REPORT_NONFATAL(_HW_NPORT_EGRESS_MCRSPCTRLSTORE_ECC_LIMIT_ERR, "egress MC response ECC error limit"); NVSWITCH_REPORT_DATA(_HW_NPORT_EGRESS_MCRSPCTRLSTORE_ECC_LIMIT_ERR, data); @@ -2754,6 +2906,15 @@ _nvswitch_service_egress_nonfatal_ls10 if (!(nvswitch_test_flags(report.raw_pending, DRF_NUM(_EGRESS, _ERR_STATUS_1, _RBCTRLSTORE_ECC_DBE_ERR, 1)))) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + + NVSWITCH_ENG_WR32(device, NPORT, , link, _EGRESS, _ERR_RBCTRLSTORE_ECC_ERROR_COUNTER, 0); + NVSWITCH_REPORT_NONFATAL(_HW_NPORT_EGRESS_RBCTRLSTORE_ECC_LIMIT_ERR, "egress RB ECC error limit"); NVSWITCH_REPORT_DATA(_HW_NPORT_EGRESS_RBCTRLSTORE_ECC_LIMIT_ERR, data); @@ -2774,6 +2935,15 @@ _nvswitch_service_egress_nonfatal_ls10 if (!(nvswitch_test_flags(report.raw_pending, DRF_NUM(_EGRESS, _ERR_STATUS_1, _MCREDSGT_ECC_DBE_ERR, 1)))) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + + NVSWITCH_ENG_WR32(device, NPORT, , link, _EGRESS, _ERR_MCREDSGT_ECC_ERROR_COUNTER, 0); + NVSWITCH_REPORT_NONFATAL(_HW_NPORT_EGRESS_MCREDSGT_ECC_LIMIT_ERR, "egress RSG ECC error limit"); NVSWITCH_REPORT_DATA(_HW_NPORT_EGRESS_MCREDSGT_ECC_LIMIT_ERR, data); @@ -2794,6 +2964,15 @@ _nvswitch_service_egress_nonfatal_ls10 if (!(nvswitch_test_flags(report.raw_pending, DRF_NUM(_EGRESS, _ERR_STATUS_1, _MCREDBUF_ECC_DBE_ERR, 1)))) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + + NVSWITCH_ENG_WR32(device, NPORT, , link, _EGRESS, _ERR_MCREDBUF_ECC_ERROR_COUNTER, 0); + NVSWITCH_REPORT_NONFATAL(_HW_NPORT_EGRESS_MCREDBUF_ECC_LIMIT_ERR, "egress MCRB ECC error limit"); NVSWITCH_REPORT_DATA(_HW_NPORT_EGRESS_MCREDBUF_ECC_LIMIT_ERR, data); @@ -2814,6 +2993,15 @@ _nvswitch_service_egress_nonfatal_ls10 if (!(nvswitch_test_flags(report.raw_pending, DRF_NUM(_EGRESS, _ERR_STATUS_1, _MCRSP_RAM_HDR_ECC_DBE_ERR, 1)))) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + + NVSWITCH_ENG_WR32(device, NPORT, , link, _EGRESS, _ERR_MCRSP_RAM_ECC_ERROR_COUNTER, 0); + NVSWITCH_REPORT_NONFATAL(_HW_NPORT_EGRESS_MCRSP_RAM_HDR_ECC_LIMIT_ERR, "egress MC header ECC error limit"); NVSWITCH_REPORT_DATA(_HW_NPORT_EGRESS_MCRSP_RAM_HDR_ECC_LIMIT_ERR, data); @@ -2843,6 +3031,13 @@ _nvswitch_service_egress_nonfatal_ls10 // Clear associated LIMIT_ERR interrupt if (report.raw_pending & DRF_NUM(_EGRESS, _ERR_STATUS_1, _NXBAR_REDUCTION_HDR_ECC_LIMIT_ERR, 1)) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + NVSWITCH_ENG_WR32(device, NPORT, , link, _EGRESS, _ERR_STATUS_1, DRF_NUM(_EGRESS, _ERR_STATUS_1, _NXBAR_REDUCTION_HDR_ECC_LIMIT_ERR, 1)); } @@ -2880,6 +3075,13 @@ _nvswitch_service_egress_nonfatal_ls10 // Clear associated LIMIT_ERR interrupt if (report.raw_pending & DRF_NUM(_EGRESS, _ERR_STATUS_1, _MCREDBUF_ECC_LIMIT_ERR, 1)) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + NVSWITCH_ENG_WR32(device, NPORT, , link, _EGRESS, _ERR_STATUS_1, DRF_NUM(_EGRESS, _ERR_STATUS_1, _MCREDBUF_ECC_LIMIT_ERR, 1)); } @@ -3027,6 +3229,13 @@ _nvswitch_service_egress_fatal_ls10 // Clear associated LIMIT_ERR interrupt if (report.raw_pending & DRF_NUM(_EGRESS, _ERR_STATUS_0, _NXBAR_HDR_ECC_LIMIT_ERR, 1)) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + NVSWITCH_ENG_WR32(device, NPORT, , link, _EGRESS, _ERR_STATUS_0, DRF_NUM(_EGRESS, _ERR_STATUS_0, _NXBAR_HDR_ECC_LIMIT_ERR, 1)); } @@ -3061,6 +3270,13 @@ _nvswitch_service_egress_fatal_ls10 // Clear associated LIMIT_ERR interrupt if (report.raw_pending & DRF_NUM(_EGRESS, _ERR_STATUS_0, _RAM_OUT_HDR_ECC_LIMIT_ERR, 1)) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + NVSWITCH_ENG_WR32(device, NPORT, , link, _EGRESS, _ERR_STATUS_0, DRF_NUM(_EGRESS, _ERR_STATUS_0, _RAM_OUT_HDR_ECC_LIMIT_ERR, 1)); } @@ -3249,6 +3465,13 @@ _nvswitch_service_egress_fatal_ls10 // Clear associated LIMIT_ERR interrupt if (report.raw_pending & DRF_NUM(_EGRESS, _ERR_STATUS_1, _MCRSPCTRLSTORE_ECC_LIMIT_ERR, 1)) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + NVSWITCH_ENG_WR32(device, NPORT, , link, _EGRESS, _ERR_STATUS_1, DRF_NUM(_EGRESS, _ERR_STATUS_1, _MCRSPCTRLSTORE_ECC_LIMIT_ERR, 1)); } @@ -3270,6 +3493,13 @@ _nvswitch_service_egress_fatal_ls10 // Clear associated LIMIT_ERR interrupt if (report.raw_pending & DRF_NUM(_EGRESS, _ERR_STATUS_1, _RBCTRLSTORE_ECC_LIMIT_ERR, 1)) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + NVSWITCH_ENG_WR32(device, NPORT, , link, _EGRESS, _ERR_STATUS_1, DRF_NUM(_EGRESS, _ERR_STATUS_1, _RBCTRLSTORE_ECC_LIMIT_ERR, 1)); } @@ -3291,6 +3521,13 @@ _nvswitch_service_egress_fatal_ls10 // Clear associated LIMIT_ERR interrupt if (report.raw_pending & DRF_NUM(_EGRESS, _ERR_STATUS_1, _MCREDSGT_ECC_LIMIT_ERR, 1)) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + NVSWITCH_ENG_WR32(device, NPORT, , link, _EGRESS, _ERR_STATUS_1, DRF_NUM(_EGRESS, _ERR_STATUS_1, _MCREDSGT_ECC_LIMIT_ERR, 1)); } @@ -3312,6 +3549,13 @@ _nvswitch_service_egress_fatal_ls10 // Clear associated LIMIT_ERR interrupt if (report.raw_pending & DRF_NUM(_EGRESS, _ERR_STATUS_1, _MCRSP_RAM_HDR_ECC_LIMIT_ERR, 1)) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + NVSWITCH_ENG_WR32(device, NPORT, , link, _EGRESS, _ERR_STATUS_1, DRF_NUM(_EGRESS, _ERR_STATUS_1, _MCRSP_RAM_HDR_ECC_LIMIT_ERR, 1)); } @@ -3411,6 +3655,13 @@ _nvswitch_service_sourcetrack_nonfatal_ls10 NVSWITCH_REPORT_NONFATAL(_HW_NPORT_SOURCETRACK_CREQ_TCEN0_CRUMBSTORE_ECC_LIMIT_ERR, "sourcetrack TCEN0 crumbstore ECC limit err"); + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + _nvswitch_construct_ecc_error_event_ls10(&err_event, NVSWITCH_ERR_HW_NPORT_SOURCETRACK_CREQ_TCEN0_CRUMBSTORE_ECC_LIMIT_ERR, link, bAddressValid, address, NV_FALSE, 1); @@ -3510,6 +3761,13 @@ _nvswitch_service_sourcetrack_fatal_ls10 // Clear associated LIMIT_ERR interrupt if (report.raw_pending & DRF_NUM(_SOURCETRACK, _ERR_STATUS_0, _CREQ_TCEN0_CRUMBSTORE_ECC_LIMIT_ERR, 1)) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + NVSWITCH_ENG_WR32(device, NPORT, , link, _SOURCETRACK, _ERR_STATUS_0, DRF_NUM(_SOURCETRACK, _ERR_STATUS_0, _CREQ_TCEN0_CRUMBSTORE_ECC_LIMIT_ERR, 1)); } @@ -3638,11 +3896,19 @@ _nvswitch_service_multicast_nonfatal_ls10 } report.data[1] = NVSWITCH_ENG_RD32(device, NPORT, , link, _MULTICASTTSTATE, _ERR_TAGPOOL_ECC_ERROR_COUNTER); - NVSWITCH_ENG_WR32(device, NPORT, , link, _MULTICASTTSTATE, _ERR_TAGPOOL_ECC_ERROR_COUNTER, - DRF_DEF(_MULTICASTTSTATE, _ERR_TAGPOOL_ECC_ERROR_COUNTER, _ERROR_COUNT, _INIT)); NVSWITCH_REPORT_NONFATAL(_HW_NPORT_MULTICASTTSTATE_TAGPOOL_ECC_LIMIT_ERR, "MC TS tag store single-bit threshold"); NVSWITCH_REPORT_DATA(_HW_NPORT_MULTICASTTSTATE_TAGPOOL_ECC_LIMIT_ERR, data); + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + + NVSWITCH_ENG_WR32(device, NPORT, , link, _MULTICASTTSTATE, _ERR_TAGPOOL_ECC_ERROR_COUNTER, + DRF_DEF(_MULTICASTTSTATE, _ERR_TAGPOOL_ECC_ERROR_COUNTER, _ERROR_COUNT, _INIT)); + _nvswitch_construct_ecc_error_event_ls10(&err_event, NVSWITCH_ERR_HW_NPORT_MULTICASTTSTATE_TAGPOOL_ECC_LIMIT_ERR, link, bAddressValid, address, NV_FALSE, 1); @@ -3674,11 +3940,19 @@ _nvswitch_service_multicast_nonfatal_ls10 } report.data[1] = NVSWITCH_ENG_RD32(device, NPORT, , link, _MULTICASTTSTATE, _ERR_CRUMBSTORE_ECC_ERROR_COUNTER); - NVSWITCH_ENG_WR32(device, NPORT, , link, _MULTICASTTSTATE, _ERR_CRUMBSTORE_ECC_ERROR_COUNTER, - DRF_DEF(_MULTICASTTSTATE, _ERR_CRUMBSTORE_ECC_ERROR_COUNTER, _ERROR_COUNT, _INIT)); NVSWITCH_REPORT_NONFATAL(_HW_NPORT_MULTICASTTSTATE_CRUMBSTORE_ECC_LIMIT_ERR, "MC TS crumbstore single-bit threshold"); NVSWITCH_REPORT_DATA(_HW_NPORT_MULTICASTTSTATE_CRUMBSTORE_ECC_LIMIT_ERR, data); + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + + NVSWITCH_ENG_WR32(device, NPORT, , link, _MULTICASTTSTATE, _ERR_CRUMBSTORE_ECC_ERROR_COUNTER, + DRF_DEF(_MULTICASTTSTATE, _ERR_CRUMBSTORE_ECC_ERROR_COUNTER, _ERROR_COUNT, _INIT)); + _nvswitch_construct_ecc_error_event_ls10(&err_event, NVSWITCH_ERR_HW_NPORT_MULTICASTTSTATE_CRUMBSTORE_ECC_LIMIT_ERR, link, bAddressValid, address, NV_FALSE, 1); @@ -3791,6 +4065,13 @@ _nvswitch_service_multicast_fatal_ls10 // Clear associated LIMIT_ERR interrupt if (report.raw_pending & DRF_NUM(_MULTICASTTSTATE, _ERR_STATUS_0, _TAGPOOL_ECC_LIMIT_ERR, 1)) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + NVSWITCH_ENG_WR32(device, NPORT, , link, _MULTICASTTSTATE, _ERR_STATUS_0, DRF_NUM(_MULTICASTTSTATE, _ERR_STATUS_0, _TAGPOOL_ECC_LIMIT_ERR, 1)); } @@ -3828,6 +4109,13 @@ _nvswitch_service_multicast_fatal_ls10 // Clear associated LIMIT_ERR interrupt if (report.raw_pending & DRF_NUM(_MULTICASTTSTATE, _ERR_STATUS_0, _CRUMBSTORE_ECC_LIMIT_ERR, 1)) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + NVSWITCH_ENG_WR32(device, NPORT, , link, _MULTICASTTSTATE, _ERR_STATUS_0, DRF_NUM(_MULTICASTTSTATE, _ERR_STATUS_0, _CRUMBSTORE_ECC_LIMIT_ERR, 1)); } @@ -3929,11 +4217,19 @@ _nvswitch_service_reduction_nonfatal_ls10 } report.data[1] = NVSWITCH_ENG_RD32(device, NPORT, , link, _REDUCTIONTSTATE, _ERR_TAGPOOL_ECC_ERROR_COUNTER); - NVSWITCH_ENG_WR32(device, NPORT, , link, _REDUCTIONTSTATE, _ERR_TAGPOOL_ECC_ERROR_COUNTER, - DRF_DEF(_REDUCTIONTSTATE, _ERR_TAGPOOL_ECC_ERROR_COUNTER, _ERROR_COUNT, _INIT)); NVSWITCH_REPORT_NONFATAL(_HW_NPORT_REDUCTIONTSTATE_TAGPOOL_ECC_LIMIT_ERR, "Red TS tag store single-bit threshold"); NVSWITCH_REPORT_DATA(_HW_NPORT_REDUCTIONTSTATE_TAGPOOL_ECC_LIMIT_ERR, data); + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + + NVSWITCH_ENG_WR32(device, NPORT, , link, _REDUCTIONTSTATE, _ERR_TAGPOOL_ECC_ERROR_COUNTER, + DRF_DEF(_REDUCTIONTSTATE, _ERR_TAGPOOL_ECC_ERROR_COUNTER, _ERROR_COUNT, _INIT)); + _nvswitch_construct_ecc_error_event_ls10(&err_event, NVSWITCH_ERR_HW_NPORT_REDUCTIONTSTATE_TAGPOOL_ECC_LIMIT_ERR, link, bAddressValid, address, NV_FALSE, 1); @@ -3965,11 +4261,19 @@ _nvswitch_service_reduction_nonfatal_ls10 } report.data[1] = NVSWITCH_ENG_RD32(device, NPORT, , link, _REDUCTIONTSTATE, _ERR_CRUMBSTORE_ECC_ERROR_COUNTER); - NVSWITCH_ENG_WR32(device, NPORT, , link, _REDUCTIONTSTATE, _ERR_CRUMBSTORE_ECC_ERROR_COUNTER, - DRF_DEF(_REDUCTIONTSTATE, _ERR_CRUMBSTORE_ECC_ERROR_COUNTER, _ERROR_COUNT, _INIT)); NVSWITCH_REPORT_NONFATAL(_HW_NPORT_REDUCTIONTSTATE_CRUMBSTORE_ECC_LIMIT_ERR, "Red TS crumbstore single-bit threshold"); NVSWITCH_REPORT_DATA(_HW_NPORT_REDUCTIONTSTATE_CRUMBSTORE_ECC_LIMIT_ERR, data); + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + + NVSWITCH_ENG_WR32(device, NPORT, , link, _REDUCTIONTSTATE, _ERR_CRUMBSTORE_ECC_ERROR_COUNTER, + DRF_DEF(_REDUCTIONTSTATE, _ERR_CRUMBSTORE_ECC_ERROR_COUNTER, _ERROR_COUNT, _INIT)); + _nvswitch_construct_ecc_error_event_ls10(&err_event, NVSWITCH_ERR_HW_NPORT_REDUCTIONTSTATE_CRUMBSTORE_ECC_LIMIT_ERR, link, bAddressValid, address, NV_FALSE, 1); @@ -4082,6 +4386,13 @@ _nvswitch_service_reduction_fatal_ls10 // Clear associated LIMIT_ERR interrupt if (report.raw_pending & DRF_NUM(_REDUCTIONTSTATE, _ERR_STATUS_0, _TAGPOOL_ECC_LIMIT_ERR, 1)) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + NVSWITCH_ENG_WR32(device, NPORT, , link, _REDUCTIONTSTATE, _ERR_STATUS_0, DRF_NUM(_REDUCTIONTSTATE, _ERR_STATUS_0, _TAGPOOL_ECC_LIMIT_ERR, 1)); } @@ -4124,6 +4435,13 @@ _nvswitch_service_reduction_fatal_ls10 // Clear associated LIMIT_ERR interrupt if (report.raw_pending & DRF_NUM(_REDUCTIONTSTATE, _ERR_STATUS_0, _CRUMBSTORE_ECC_LIMIT_ERR, 1)) { + // + // Driver WAR to disable NPG interrupt at GIN to prevent interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + NVBIT(link / NVSWITCH_LINKS_PER_NPG_LS10)); + NVSWITCH_ENG_WR32(device, NPORT, , link, _REDUCTIONTSTATE, _ERR_STATUS_0, DRF_NUM(_REDUCTIONTSTATE, _ERR_STATUS_0, _CRUMBSTORE_ECC_LIMIT_ERR, 1)); } @@ -4512,6 +4830,14 @@ _nvswitch_service_nvltlc_tx_sys_fatal_ls10 { NVSWITCH_REPORT_FATAL(_HW_NVLTLC_TX_SYS_NCISOC_ECC_LIMIT_ERR, "NCISOC ECC Limit Error", NV_FALSE); nvswitch_clear_flags(&unhandled, bit); + + // + // Driver WAR to disable ECC error and prevent an interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_LINK_WR32_LS10(device, link, NVLTLC, _NVLTLC_TX_SYS, _ERR_FATAL_REPORT_EN_0, + report.raw_enable & + ~DRF_NUM(_NVLTLC_TX_SYS, _ERR_FATAL_REPORT_EN_0, _NCISOC_ECC_LIMIT_ERR, 1)); } bit = DRF_NUM(_NVLTLC_TX_SYS, _ERR_STATUS_0, _TXPOISONDET, 1); @@ -4622,6 +4948,14 @@ _nvswitch_service_nvltlc_rx_sys_fatal_ls10 { NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RX_SYS_HDR_RAM_ECC_LIMIT_ERR, "HDR RAM ECC Limit Error", NV_FALSE); nvswitch_clear_flags(&unhandled, bit); + + // + // Driver WAR to disable ECC error and prevent an interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_LINK_WR32_LS10(device, link, NVLTLC, _NVLTLC_RX_SYS, _ERR_FATAL_REPORT_EN_0, + report.raw_enable & + ~DRF_NUM(_NVLTLC_RX_SYS, _ERR_FATAL_REPORT_EN_0, _HDR_RAM_ECC_LIMIT_ERR, 1)); } bit = DRF_NUM(_NVLTLC_RX_SYS, _ERR_STATUS_0, _DAT0_RAM_ECC_DBE_ERR, 1); @@ -4641,6 +4975,14 @@ _nvswitch_service_nvltlc_rx_sys_fatal_ls10 { NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RX_SYS_DAT0_RAM_ECC_LIMIT_ERR, "DAT0 RAM ECC Limit Error", NV_FALSE); nvswitch_clear_flags(&unhandled, bit); + + // + // Driver WAR to disable ECC error and prevent an interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_LINK_WR32_LS10(device, link, NVLTLC, _NVLTLC_RX_SYS, _ERR_FATAL_REPORT_EN_0, + report.raw_enable & + ~DRF_NUM(_NVLTLC_RX_SYS, _ERR_FATAL_REPORT_EN_0, _DAT0_RAM_ECC_LIMIT_ERR, 1)); } bit = DRF_NUM(_NVLTLC_RX_SYS, _ERR_STATUS_0, _DAT1_RAM_ECC_DBE_ERR, 1); @@ -4660,6 +5002,14 @@ _nvswitch_service_nvltlc_rx_sys_fatal_ls10 { NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RX_SYS_DAT1_RAM_ECC_LIMIT_ERR, "DAT1 RAM ECC Limit Error", NV_FALSE); nvswitch_clear_flags(&unhandled, bit); + + // + // Driver WAR to disable ECC error and prevent an interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_LINK_WR32_LS10(device, link, NVLTLC, _NVLTLC_RX_SYS, _ERR_FATAL_REPORT_EN_0, + report.raw_enable & + ~DRF_NUM(_NVLTLC_RX_SYS, _ERR_FATAL_REPORT_EN_0, _DAT1_RAM_ECC_LIMIT_ERR, 1)); } if (report.raw_first & report.mask) @@ -5877,7 +6227,8 @@ _nvswitch_deferred_link_state_check_ls10 lastLinkUpTime = chip_device->deferredLinkErrors[link].state.lastLinkUpTime; lastRetrainTime = chip_device->deferredLinkErrors[link].state.lastRetrainTime; // Sanity Check - NVSWITCH_ASSERT(nvswitch_is_link_valid(device, link)); + if (!nvswitch_is_link_valid(device, link)) + return; chip_device->deferredLinkErrors[link].state.bLinkStateCallBackEnabled = NV_FALSE; bRedeferLinkStateCheck = NV_FALSE; @@ -5945,11 +6296,18 @@ nvswitch_create_deferred_link_state_check_task_ls10 pErrorReportParams->nvlipt_instance = nvlipt_instance; pErrorReportParams->link = link; - status = nvswitch_task_create_args(device, (void*)pErrorReportParams, - &_nvswitch_deferred_link_state_check_ls10, - NVSWITCH_DEFERRED_LINK_STATE_CHECK_INTERVAL_NS, - NVSWITCH_TASK_TYPE_FLAGS_RUN_ONCE | - NVSWITCH_TASK_TYPE_FLAGS_VOID_PTR_ARGS); + if (!nvswitch_is_tnvl_mode_enabled(device)) + { + status = nvswitch_task_create_args(device, (void*)pErrorReportParams, + &_nvswitch_deferred_link_state_check_ls10, + NVSWITCH_DEFERRED_LINK_STATE_CHECK_INTERVAL_NS, + NVSWITCH_TASK_TYPE_FLAGS_RUN_ONCE | + NVSWITCH_TASK_TYPE_FLAGS_VOID_PTR_ARGS); + } + else + { + NVSWITCH_PRINT(device, INFO, "Skipping Deferred link state background task when TNVL is enabled\n"); + } if (status == NVL_SUCCESS) { @@ -6025,12 +6383,19 @@ _nvswitch_create_deferred_link_errors_task_ls10 pErrorReportParams->nvlipt_instance = nvlipt_instance; pErrorReportParams->link = link; - status = nvswitch_task_create_args(device, (void*)pErrorReportParams, - &_nvswitch_deferred_link_errors_check_ls10, - NVSWITCH_DEFERRED_FAULT_UP_CHECK_INTERVAL_NS, - NVSWITCH_TASK_TYPE_FLAGS_RUN_ONCE | - NVSWITCH_TASK_TYPE_FLAGS_VOID_PTR_ARGS); - + if (!nvswitch_is_tnvl_mode_enabled(device)) + { + status = nvswitch_task_create_args(device, (void*)pErrorReportParams, + &_nvswitch_deferred_link_errors_check_ls10, + NVSWITCH_DEFERRED_FAULT_UP_CHECK_INTERVAL_NS, + NVSWITCH_TASK_TYPE_FLAGS_RUN_ONCE | + NVSWITCH_TASK_TYPE_FLAGS_VOID_PTR_ARGS); + } + else + { + NVSWITCH_PRINT(device, INFO, "Skipping Deferred link error checks background task when TNVL is enabled\n"); + } + if (status == NVL_SUCCESS) { @@ -6306,6 +6671,14 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_0_ls10 { NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_CREQ_RAM_ECC_LIMIT_ERR, "CREQ RAM DAT ECC Limit Error"); nvswitch_clear_flags(&unhandled, bit); + + // + // Driver WAR to disable ECC error and prevent an interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_LINK_WR32_LS10(device, link, NVLTLC, _NVLTLC_TX_LNK, _ERR_NON_FATAL_REPORT_EN_0, + report.raw_enable & + ~DRF_NUM(_NVLTLC_TX_LNK, _ERR_NON_FATAL_REPORT_EN_0, _CREQ_RAM_ECC_LIMIT_ERR, 1)); } bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_0, _RSP_RAM_DAT_ECC_DBE_ERR, 1); @@ -6320,6 +6693,14 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_0_ls10 { NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_RSP_RAM_ECC_LIMIT_ERR, "Response RAM ECC Limit Error"); nvswitch_clear_flags(&unhandled, bit); + + // + // Driver WAR to disable ECC error and prevent an interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_LINK_WR32_LS10(device, link, NVLTLC, _NVLTLC_TX_LNK, _ERR_NON_FATAL_REPORT_EN_0, + report.raw_enable & + ~DRF_NUM(_NVLTLC_TX_LNK, _ERR_NON_FATAL_REPORT_EN_0, _RSP_RAM_ECC_LIMIT_ERR, 1)); } bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_0, _COM_RAM_DAT_ECC_DBE_ERR, 1); @@ -6339,6 +6720,14 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_0_ls10 { NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_COM_RAM_ECC_LIMIT_ERR, "COM RAM ECC Limit Error"); nvswitch_clear_flags(&unhandled, bit); + + // + // Driver WAR to disable ECC error and prevent an interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_LINK_WR32_LS10(device, link, NVLTLC, _NVLTLC_TX_LNK, _ERR_NON_FATAL_REPORT_EN_0, + report.raw_enable & + ~DRF_NUM(_NVLTLC_TX_LNK, _ERR_NON_FATAL_REPORT_EN_0, _COM_RAM_ECC_LIMIT_ERR, 1)); } bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_0, _RSP1_RAM_ECC_LIMIT_ERR, 1); @@ -6346,6 +6735,14 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_0_ls10 { NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_RSP1_RAM_ECC_LIMIT_ERR, "RSP1 RAM ECC Limit Error"); nvswitch_clear_flags(&unhandled, bit); + + // + // Driver WAR to disable ECC error and prevent an interrupt storm. + // TODO: Clear ECC_ERROR_COUNTER by sending command to SOE and remove the WAR. + // + NVSWITCH_LINK_WR32_LS10(device, link, NVLTLC, _NVLTLC_TX_LNK, _ERR_NON_FATAL_REPORT_EN_0, + report.raw_enable & + ~DRF_NUM(_NVLTLC_TX_LNK, _ERR_NON_FATAL_REPORT_EN_0, _RSP1_RAM_ECC_LIMIT_ERR, 1)); } NVSWITCH_UNHANDLED_CHECK(device, unhandled); @@ -7418,207 +7815,239 @@ nvswitch_lib_service_interrupts_ls10 NvlStatus status = NVL_SUCCESS; NvlStatus return_status = NVL_SUCCESS; NvU32 val; + NvU32 topEnable; + NvU32 topIntr; NvU32 i; // // Interrupt handler steps: + // 1. Read Top Interrupt // 1. Read Leaf interrupt // 2. Clear leaf interrupt // 3. Run leaf specific interrupt handler // - val = NVSWITCH_ENG_RD32(device, GIN, , 0, _CTRL, _CPU_INTR_NVLW_NON_FATAL); - val = DRF_NUM(_CTRL, _CPU_INTR_NVLW_NON_FATAL, _MASK, val); - if (val != 0) + + topEnable = NVSWITCH_ENG_RD32(device, GIN, , 0, _CTRL, _CPU_INTR_TOP_EN_SET(0)); + topIntr = topEnable & NVSWITCH_ENG_RD32(device, GIN, , 0, _CTRL, _CPU_INTR_TOP(0)); + + if (FLD_TEST_DRF_NUM(_CTRL, _CPU_INTR_TOP_LEAF, _INTR_NVLW_NON_FATAL, 0x1, topIntr)) { - NVSWITCH_PRINT(device, INFO, "%s: NVLW NON_FATAL interrupts pending = 0x%x\n", - __FUNCTION__, val); - NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF(NV_CTRL_CPU_INTR_NVLW_NON_FATAL_IDX), val); - for (i = 0; i < DRF_SIZE(NV_CTRL_CPU_INTR_NVLW_NON_FATAL_MASK); i++) + val = NVSWITCH_ENG_RD32(device, GIN, , 0, _CTRL, _CPU_INTR_NVLW_NON_FATAL); + val = DRF_VAL(_CTRL, _CPU_INTR_NVLW_NON_FATAL, _MASK, val); + if (val != 0) { - if (val & NVBIT(i)) + NVSWITCH_PRINT(device, INFO, "%s: NVLW NON_FATAL interrupts pending = 0x%x\n", + __FUNCTION__, val); + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF(NV_CTRL_CPU_INTR_NVLW_NON_FATAL_IDX), val); + for (i = 0; i < DRF_SIZE(NV_CTRL_CPU_INTR_NVLW_NON_FATAL_MASK); i++) { - status = _nvswitch_service_nvlw_nonfatal_ls10(device, i); - if (status != NVL_SUCCESS) + if (val & NVBIT(i)) { - NVSWITCH_PRINT(device, INFO, "%s: NVLW[%d] NON_FATAL interrupt handling status = %d\n", - __FUNCTION__, i, status); - return_status = status; + status = _nvswitch_service_nvlw_nonfatal_ls10(device, i); + if (status != NVL_SUCCESS) + { + NVSWITCH_PRINT(device, INFO, "%s: NVLW[%d] NON_FATAL interrupt handling status = %d\n", + __FUNCTION__, i, status); + return_status = status; + } } } } } - val = NVSWITCH_ENG_RD32(device, GIN, , 0, _CTRL, _CPU_INTR_NVLW_FATAL); - val = DRF_NUM(_CTRL, _CPU_INTR_NVLW_FATAL, _MASK, val); - if (val != 0) + if (FLD_TEST_DRF_NUM(_CTRL, _CPU_INTR_TOP_LEAF, _INTR_NVLW_FATAL, 0x1, topIntr)) { - NVSWITCH_PRINT(device, INFO, "%s: NVLW FATAL interrupts pending = 0x%x\n", - __FUNCTION__, val); + val = NVSWITCH_ENG_RD32(device, GIN, , 0, _CTRL, _CPU_INTR_NVLW_FATAL); + val = DRF_VAL(_CTRL, _CPU_INTR_NVLW_FATAL, _MASK, val); + if (val != 0) + { + NVSWITCH_PRINT(device, INFO, "%s: NVLW FATAL interrupts pending = 0x%x\n", + __FUNCTION__, val); - NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF(NV_CTRL_CPU_INTR_NVLW_FATAL_IDX), val); + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF(NV_CTRL_CPU_INTR_NVLW_FATAL_IDX), val); - for (i = 0; i < DRF_SIZE(NV_CTRL_CPU_INTR_NVLW_FATAL_MASK); i++) - { - if (val & NVBIT(i)) + for (i = 0; i < DRF_SIZE(NV_CTRL_CPU_INTR_NVLW_FATAL_MASK); i++) { - status = _nvswitch_service_nvlw_fatal_ls10(device, i); - if (status != NVL_SUCCESS) + if (val & NVBIT(i)) { - NVSWITCH_PRINT(device, INFO, "%s: NVLW[%d] FATAL interrupt handling status = %d\n", - __FUNCTION__, i, status); - return_status = status; + status = _nvswitch_service_nvlw_fatal_ls10(device, i); + if (status != NVL_SUCCESS) + { + NVSWITCH_PRINT(device, INFO, "%s: NVLW[%d] FATAL interrupt handling status = %d\n", + __FUNCTION__, i, status); + return_status = status; + } } } } } - val = NVSWITCH_ENG_RD32(device, GIN, , 0, _CTRL, _CPU_INTR_NVLW_CORRECTABLE); - val = DRF_NUM(_CTRL, _CPU_INTR_NVLW_CORRECTABLE, _MASK, val); - if (val != 0) + if (FLD_TEST_DRF_NUM(_CTRL, _CPU_INTR_TOP_LEAF, _INTR_NVLW_CORRECTABLE, 0x1, topIntr)) { - NVSWITCH_PRINT(device, ERROR, "%s: NVLW CORRECTABLE interrupts pending = 0x%x\n", - __FUNCTION__, val); - return_status = -NVL_MORE_PROCESSING_REQUIRED; + val = NVSWITCH_ENG_RD32(device, GIN, , 0, _CTRL, _CPU_INTR_NVLW_CORRECTABLE); + val = DRF_VAL(_CTRL, _CPU_INTR_NVLW_CORRECTABLE, _MASK, val); + if (val != 0) + { + NVSWITCH_PRINT(device, ERROR, "%s: NVLW CORRECTABLE interrupts pending = 0x%x\n", + __FUNCTION__, val); + return_status = -NVL_MORE_PROCESSING_REQUIRED; + } } // Check NPG - val = NVSWITCH_ENG_RD32(device, GIN, , 0, _CTRL, _CPU_INTR_NPG_FATAL); - val = DRF_NUM(_CTRL, _CPU_INTR_NPG_FATAL, _MASK, val); - if (val != 0) + if (FLD_TEST_DRF_NUM(_CTRL, _CPU_INTR_TOP_LEAF, _INTR_NPG_FATAL, 0x1, topIntr)) { - NVSWITCH_PRINT(device, INFO, "%s: NPG FATAL interrupts pending = 0x%x\n", - __FUNCTION__, val); - NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF(NV_CTRL_CPU_INTR_NPG_FATAL_IDX), val); - for (i = 0; i < DRF_SIZE(NV_CTRL_CPU_INTR_NPG_FATAL_MASK); i++) + val = NVSWITCH_ENG_RD32(device, GIN, , 0, _CTRL, _CPU_INTR_NPG_FATAL); + val = DRF_VAL(_CTRL, _CPU_INTR_NPG_FATAL, _MASK, val); + if (val != 0) { - if (val & NVBIT(i)) + NVSWITCH_PRINT(device, INFO, "%s: NPG FATAL interrupts pending = 0x%x\n", + __FUNCTION__, val); + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF(NV_CTRL_CPU_INTR_NPG_FATAL_IDX), val); + for (i = 0; i < DRF_SIZE(NV_CTRL_CPU_INTR_NPG_FATAL_MASK); i++) { - status = _nvswitch_service_npg_fatal_ls10(device, i); - if (status != NVL_SUCCESS) + if (val & NVBIT(i)) { - NVSWITCH_PRINT(device, INFO, "%s: NPG[%d] FATAL interrupt handling status = %d\n", - __FUNCTION__, i, status); - return_status = status; + status = _nvswitch_service_npg_fatal_ls10(device, i); + if (status != NVL_SUCCESS) + { + NVSWITCH_PRINT(device, INFO, "%s: NPG[%d] FATAL interrupt handling status = %d\n", + __FUNCTION__, i, status); + return_status = status; + } } } } } - val = NVSWITCH_ENG_RD32(device, GIN, , 0, _CTRL, _CPU_INTR_NPG_NON_FATAL); - val = DRF_NUM(_CTRL, _CPU_INTR_NPG_NON_FATAL, _MASK, val); - if (val != 0) + // Check NPG + if (FLD_TEST_DRF_NUM(_CTRL, _CPU_INTR_TOP_LEAF, _INTR_NPG_NON_FATAL, 0x1, topIntr)) { - NVSWITCH_PRINT(device, INFO, "%s: NPG NON_FATAL interrupts pending = 0x%x\n", - __FUNCTION__, val); - NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), val); - for (i = 0; i < DRF_SIZE(NV_CTRL_CPU_INTR_NPG_NON_FATAL_MASK); i++) + val = NVSWITCH_ENG_RD32(device, GIN, , 0, _CTRL, _CPU_INTR_NPG_NON_FATAL); + val = DRF_VAL(_CTRL, _CPU_INTR_NPG_NON_FATAL, _MASK, val); + if (val != 0) { - if (val & NVBIT(i)) + NVSWITCH_PRINT(device, INFO, "%s: NPG NON_FATAL interrupts pending = 0x%x\n", + __FUNCTION__, val); + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), val); + for (i = 0; i < DRF_SIZE(NV_CTRL_CPU_INTR_NPG_NON_FATAL_MASK); i++) { - status = _nvswitch_service_npg_nonfatal_ls10(device, i); - if (status != NVL_SUCCESS) + if (val & NVBIT(i)) { - NVSWITCH_PRINT(device, INFO, "%s: NPG[%d] NON_FATAL interrupt handling status = %d\n", - __FUNCTION__, i, status); - return_status = status; + status = _nvswitch_service_npg_nonfatal_ls10(device, i); + if (status != NVL_SUCCESS) + { + NVSWITCH_PRINT(device, INFO, "%s: NPG[%d] NON_FATAL interrupt handling status = %d\n", + __FUNCTION__, i, status); + return_status = status; + } } } } } - val = NVSWITCH_ENG_RD32(device, GIN, , 0, _CTRL, _CPU_INTR_NPG_CORRECTABLE); - val = DRF_NUM(_CTRL, _CPU_INTR_NPG_CORRECTABLE, _MASK, val); - if (val != 0) + if (FLD_TEST_DRF_NUM(_CTRL, _CPU_INTR_TOP_LEAF, _INTR_NPG_CORRECTABLE, 0x1, topIntr)) { - NVSWITCH_PRINT(device, ERROR, "%s: NPG CORRECTABLE interrupts pending = 0x%x\n", - __FUNCTION__, val); - return_status = -NVL_MORE_PROCESSING_REQUIRED; + val = NVSWITCH_ENG_RD32(device, GIN, , 0, _CTRL, _CPU_INTR_NPG_CORRECTABLE); + val = DRF_VAL(_CTRL, _CPU_INTR_NPG_CORRECTABLE, _MASK, val); + if (val != 0) + { + NVSWITCH_PRINT(device, ERROR, "%s: NPG CORRECTABLE interrupts pending = 0x%x\n", + __FUNCTION__, val); + return_status = -NVL_MORE_PROCESSING_REQUIRED; + } } // Check NXBAR - val = NVSWITCH_ENG_RD32(device, GIN, , 0, _CTRL, _CPU_INTR_NXBAR_FATAL); - val = DRF_NUM(_CTRL, _CPU_INTR_NXBAR_FATAL, _MASK, val); - if (val != 0) + if (FLD_TEST_DRF_NUM(_CTRL, _CPU_INTR_TOP_LEAF, _INTR_NXBAR_FATAL, 0x1, topIntr)) { - NVSWITCH_PRINT(device, INFO, "%s: NXBAR FATAL interrupts pending = 0x%x\n", - __FUNCTION__, val); - NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF(NV_CTRL_CPU_INTR_NXBAR_FATAL_IDX), val); - for (i = 0; i < DRF_SIZE(NV_CTRL_CPU_INTR_NXBAR_FATAL_MASK); i++) + val = NVSWITCH_ENG_RD32(device, GIN, , 0, _CTRL, _CPU_INTR_NXBAR_FATAL); + val = DRF_VAL(_CTRL, _CPU_INTR_NXBAR_FATAL, _MASK, val); + if (val != 0) { - if (val & NVBIT(i)) + NVSWITCH_PRINT(device, INFO, "%s: NXBAR FATAL interrupts pending = 0x%x\n", + __FUNCTION__, val); + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF(NV_CTRL_CPU_INTR_NXBAR_FATAL_IDX), val); + for (i = 0; i < DRF_SIZE(NV_CTRL_CPU_INTR_NXBAR_FATAL_MASK); i++) { - status = _nvswitch_service_nxbar_fatal_ls10(device, i); - if (status != NVL_SUCCESS) + if (val & NVBIT(i)) { - NVSWITCH_PRINT(device, INFO, "%s: NXBAR[%d] FATAL interrupt handling status = %d\n", - __FUNCTION__, i, status); - return_status = status; + status = _nvswitch_service_nxbar_fatal_ls10(device, i); + if (status != NVL_SUCCESS) + { + NVSWITCH_PRINT(device, INFO, "%s: NXBAR[%d] FATAL interrupt handling status = %d\n", + __FUNCTION__, i, status); + return_status = status; + } } } } } // Check UNITS - val = NVSWITCH_ENG_RD32(device, GIN, , 0, _CTRL, _CPU_INTR_UNITS); - if (val != 0) + if (FLD_TEST_DRF_NUM(_CTRL, _CPU_INTR_TOP_LEAF, _INTR_UNITS, 0x1, topIntr)) { - NVSWITCH_PRINT(device, MMIO, "%s: UNIT interrupts pending = 0x%x\n", - __FUNCTION__, val); - - NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF(NV_CTRL_CPU_INTR_UNITS_IDX), val); - if (FLD_TEST_DRF_NUM(_CTRL, _CPU_INTR_UNITS, _PMGR_HOST, 1, val)) - { - NVSWITCH_PRINT(device, ERROR, "%s: _PMGR_HOST interrupt pending\n", - __FUNCTION__); - return_status = -NVL_MORE_PROCESSING_REQUIRED; - } - if (FLD_TEST_DRF_NUM(_CTRL, _CPU_INTR_UNITS, _PTIMER, 1, val)) + val = NVSWITCH_ENG_RD32(device, GIN, , 0, _CTRL, _CPU_INTR_UNITS); + if (val != 0) { - NVSWITCH_PRINT(device, ERROR, "%s: _PTIMER interrupt pending\n", - __FUNCTION__); - return_status = -NVL_MORE_PROCESSING_REQUIRED; - } - if (FLD_TEST_DRF_NUM(_CTRL, _CPU_INTR_UNITS, _PTIMER_ALARM, 1, val)) - { - NVSWITCH_PRINT(device, ERROR, "%s: _PTIMER_ALARM interrupt pending\n", - __FUNCTION__); - return_status = -NVL_MORE_PROCESSING_REQUIRED; - } - if (FLD_TEST_DRF_NUM(_CTRL, _CPU_INTR_UNITS, _XTL_CPU, 1, val)) - { - NVSWITCH_PRINT(device, ERROR, "%s: _XTL_CPU interrupt pending\n", - __FUNCTION__); - return_status = -NVL_MORE_PROCESSING_REQUIRED; - } - if (FLD_TEST_DRF_NUM(_CTRL, _CPU_INTR_UNITS, _XAL_EP, 1, val)) - { - NVSWITCH_PRINT(device, ERROR, "%s: _XAL_EP interrupt pending\n", - __FUNCTION__); - return_status = -NVL_MORE_PROCESSING_REQUIRED; - } - if (FLD_TEST_DRF_NUM(_CTRL, _CPU_INTR_UNITS, _PRIV_RING, 1, val)) - { - status = _nvswitch_service_priv_ring_ls10(device); - if (status != NVL_SUCCESS) + NVSWITCH_PRINT(device, MMIO, "%s: UNIT interrupts pending = 0x%x\n", + __FUNCTION__, val); + + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF(NV_CTRL_CPU_INTR_UNITS_IDX), val); + if (FLD_TEST_DRF_NUM(_CTRL, _CPU_INTR_UNITS, _PMGR_HOST, 1, val)) { - NVSWITCH_PRINT(device, ERROR, "%s: Problem handling PRI errors\n", + NVSWITCH_PRINT(device, ERROR, "%s: _PMGR_HOST interrupt pending\n", __FUNCTION__); - return_status = status; + return_status = -NVL_MORE_PROCESSING_REQUIRED; } - } - if (!IS_RTLSIM(device) && !IS_FMODEL(device)) - { - if (FLD_TEST_DRF_NUM(_CTRL, _CPU_INTR_UNITS, _SEC0_INTR0_0, 1, val)) + if (FLD_TEST_DRF_NUM(_CTRL, _CPU_INTR_UNITS, _PTIMER, 1, val)) + { + NVSWITCH_PRINT(device, ERROR, "%s: _PTIMER interrupt pending\n", + __FUNCTION__); + return_status = -NVL_MORE_PROCESSING_REQUIRED; + } + if (FLD_TEST_DRF_NUM(_CTRL, _CPU_INTR_UNITS, _PTIMER_ALARM, 1, val)) { - status = _nvswitch_service_soe_fatal_ls10(device); + NVSWITCH_PRINT(device, ERROR, "%s: _PTIMER_ALARM interrupt pending\n", + __FUNCTION__); + return_status = -NVL_MORE_PROCESSING_REQUIRED; + } + if (FLD_TEST_DRF_NUM(_CTRL, _CPU_INTR_UNITS, _XTL_CPU, 1, val)) + { + NVSWITCH_PRINT(device, ERROR, "%s: _XTL_CPU interrupt pending\n", + __FUNCTION__); + return_status = -NVL_MORE_PROCESSING_REQUIRED; + } + if (FLD_TEST_DRF_NUM(_CTRL, _CPU_INTR_UNITS, _XAL_EP, 1, val)) + { + NVSWITCH_PRINT(device, ERROR, "%s: _XAL_EP interrupt pending\n", + __FUNCTION__); + return_status = -NVL_MORE_PROCESSING_REQUIRED; + } + if (FLD_TEST_DRF_NUM(_CTRL, _CPU_INTR_UNITS, _PRIV_RING, 1, val)) + { + status = _nvswitch_service_priv_ring_ls10(device); if (status != NVL_SUCCESS) { - NVSWITCH_PRINT(device, ERROR, "%s: Problem servicing SOE", + NVSWITCH_PRINT(device, ERROR, "%s: Problem handling PRI errors\n", __FUNCTION__); return_status = status; - } + } } - } + if (!IS_RTLSIM(device) && !IS_FMODEL(device)) + { + if (FLD_TEST_DRF_NUM(_CTRL, _CPU_INTR_UNITS, _SEC0_INTR0_0, 1, val)) + { + status = _nvswitch_service_soe_fatal_ls10(device); + if (status != NVL_SUCCESS) + { + NVSWITCH_PRINT(device, ERROR, "%s: Problem servicing SOE", + __FUNCTION__); + return_status = status; + } + } + } + } } // step 4 -- retrigger engine interrupts diff --git a/src/common/nvswitch/kernel/ls10/ls10.c b/src/common/nvswitch/kernel/ls10/ls10.c index 3242f6d6ad..ed3a142191 100644 --- a/src/common/nvswitch/kernel/ls10/ls10.c +++ b/src/common/nvswitch/kernel/ls10/ls10.c @@ -293,7 +293,7 @@ nvswitch_destroy_device_state_ls10 { ls10_device *chip_device = NVSWITCH_GET_CHIP_DEVICE_LS10(device); - if (nvswitch_is_soe_supported(device)) + if (NVSWITCH_ENG_VALID_LS10(device, SOE, 0) && nvswitch_is_soe_supported(device)) { nvswitch_soe_unregister_events(device); nvswitch_unload_soe_ls10(device); @@ -3089,13 +3089,6 @@ nvswitch_is_soe_supported_ls10 NVSWITCH_PRINT(device, WARN, "SOE can not be disabled via regkey.\n"); } - if (nvswitch_is_tnvl_mode_locked(device)) - { - NVSWITCH_PRINT(device, INFO, - "SOE is not supported when TNVL mode is locked\n"); - return NV_FALSE; - } - return NV_TRUE; } @@ -3143,13 +3136,6 @@ nvswitch_is_inforom_supported_ls10 return NV_FALSE; } - if (nvswitch_is_tnvl_mode_enabled(device)) - { - NVSWITCH_PRINT(device, INFO, - "INFOROM is not supported when TNVL mode is enabled\n"); - return NV_FALSE; - } - if (!nvswitch_is_soe_supported(device)) { NVSWITCH_PRINT(device, INFO, @@ -4637,7 +4623,14 @@ nvswitch_eng_wr_ls10 return; } - nvswitch_reg_write_32(device, base_addr + offset, data); + if (nvswitch_is_tnvl_mode_enabled(device)) + { + nvswitch_tnvl_reg_wr_32_ls10(device, eng_id, eng_bcast, eng_instance, base_addr, offset, data); + } + else + { + nvswitch_reg_write_32(device, base_addr + offset, data); + } #if defined(DEVELOP) || defined(DEBUG) || defined(NV_MODS) { diff --git a/src/common/nvswitch/kernel/ls10/soe_ls10.c b/src/common/nvswitch/kernel/ls10/soe_ls10.c index f94adaecdb..14ebd09344 100644 --- a/src/common/nvswitch/kernel/ls10/soe_ls10.c +++ b/src/common/nvswitch/kernel/ls10/soe_ls10.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -666,6 +666,76 @@ nvswitch_soe_issue_ingress_stop_ls10 return NVL_SUCCESS; } +/* + * @Brief : Perform register writes in SOE during TNVL + * + * @param[in] device + * @param[in] offset + * @param[in] data + */ +NvlStatus +nvswitch_soe_reg_wr_32_ls10 +( + nvswitch_device *device, + NvU32 offset, + NvU32 data +) +{ + FLCN *pFlcn; + NvU32 cmdSeqDesc = 0; + NV_STATUS status; + RM_FLCN_CMD_SOE cmd; + NVSWITCH_TIMEOUT timeout; + RM_SOE_TNVL_CMD_REGISTER_WRITE *pRegisterWrite; + NVSWITCH_GET_BIOS_INFO_PARAMS params = { 0 }; + + if (!nvswitch_is_soe_supported(device)) + { + NVSWITCH_PRINT(device, INFO, + "%s: SOE is not supported\n", + __FUNCTION__); + return NVL_SUCCESS; // -NVL_ERR_NOT_SUPPORTED + } + + status = device->hal.nvswitch_ctrl_get_bios_info(device, ¶ms); + if ((status != NVL_SUCCESS) || ((params.version & SOE_VBIOS_VERSION_MASK) < + SOE_VBIOS_REVLOCK_ISSUE_REGISTER_WRITE)) + { + nvswitch_reg_write_32(device, offset, data); + return NVL_SUCCESS; + } + + pFlcn = device->pSoe->pFlcn; + + nvswitch_os_memset(&cmd, 0, sizeof(cmd)); + + cmd.hdr.unitId = RM_SOE_UNIT_TNVL; + cmd.hdr.size = RM_SOE_CMD_SIZE(TNVL, REGISTER_WRITE); + + pRegisterWrite = &cmd.cmd.tnvl.registerWrite; + pRegisterWrite->cmdType = RM_SOE_TNVL_CMD_ISSUE_REGISTER_WRITE; + pRegisterWrite->offset = offset; + pRegisterWrite->data = data; + + nvswitch_timeout_create(NVSWITCH_INTERVAL_5MSEC_IN_NS, &timeout); + status = flcnQueueCmdPostBlocking(device, pFlcn, + (PRM_FLCN_CMD)&cmd, + NULL, // pMsg + NULL, // pPayload + SOE_RM_CMDQ_LOG_ID, + &cmdSeqDesc, + &timeout); + if (status != NV_OK) + { + NVSWITCH_PRINT(device, ERROR, + "%s: Failed to send REGISTER_WRITE command to SOE, offset = 0x%x, data = 0x%x\n", + __FUNCTION__, offset, data); + return -NVL_ERR_GENERIC; + } + + return NVL_SUCCESS; +} + /* * @Brief : Init sequence for SOE FSP RISCV image * @@ -716,14 +786,21 @@ nvswitch_init_soe_ls10 } // Register SOE callbacks - status = nvswitch_soe_register_event_callbacks(device); - if (status != NVL_SUCCESS) + if (!nvswitch_is_tnvl_mode_enabled(device)) { - NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_SOE_COMMAND_QUEUE, - "Failed to register SOE events\n"); - NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_SOE_BOOTSTRAP, - "SOE init failed(2)\n"); - return status; + status = nvswitch_soe_register_event_callbacks(device); + if (status != NVL_SUCCESS) + { + NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_SOE_COMMAND_QUEUE, + "Failed to register SOE events\n"); + NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_SOE_BOOTSTRAP, + "SOE init failed(2)\n"); + return status; + } + } + else + { + NVSWITCH_PRINT(device, INFO, "Skipping registering SOE callbacks since TNVL is enabled\n"); } // Sanity the command and message queues as a final check @@ -1470,6 +1547,71 @@ _soeI2CAccess_LS10 return ret; } +/* + * @Brief : Send TNVL Pre Lock command to SOE + * + * @param[in] device + */ +NvlStatus +nvswitch_send_tnvl_prelock_cmd_ls10 +( + nvswitch_device *device +) +{ + FLCN *pFlcn; + NvU32 cmdSeqDesc = 0; + NV_STATUS status; + RM_FLCN_CMD_SOE cmd; + NVSWITCH_TIMEOUT timeout; + RM_SOE_TNVL_CMD_PRE_LOCK_SEQUENCE *pTnvlPreLock; + NVSWITCH_GET_BIOS_INFO_PARAMS params = { 0 }; + + if (!nvswitch_is_soe_supported(device)) + { + NVSWITCH_PRINT(device, INFO, "%s: SOE is not supported\n", + __FUNCTION__); + return -NVL_ERR_NOT_SUPPORTED; + } + + status = device->hal.nvswitch_ctrl_get_bios_info(device, ¶ms); + if ((status != NVL_SUCCESS) || ((params.version & SOE_VBIOS_VERSION_MASK) < + SOE_VBIOS_REVLOCK_TNVL_PRELOCK_COMMAND)) + { + NVSWITCH_PRINT(device, INFO, + "%s: Skipping TNVL_CMD_PRE_LOCK_SEQUENCE command to SOE. Update firmware " + "from .%02X to .%02X\n", + __FUNCTION__, (NvU32)((params.version & SOE_VBIOS_VERSION_MASK) >> 16), + SOE_VBIOS_REVLOCK_TNVL_PRELOCK_COMMAND); + return -NVL_ERR_NOT_SUPPORTED; + } + + pFlcn = device->pSoe->pFlcn; + + nvswitch_os_memset(&cmd, 0, sizeof(cmd)); + cmd.hdr.unitId = RM_SOE_UNIT_TNVL; + cmd.hdr.size = RM_SOE_CMD_SIZE(TNVL, PRE_LOCK_SEQUENCE); + + pTnvlPreLock = &cmd.cmd.tnvl.preLockSequence; + pTnvlPreLock->cmdType = RM_SOE_TNVL_CMD_ISSUE_PRE_LOCK_SEQUENCE; + + nvswitch_timeout_create(NVSWITCH_INTERVAL_5MSEC_IN_NS, &timeout); + status = flcnQueueCmdPostBlocking(device, pFlcn, + (PRM_FLCN_CMD)&cmd, + NULL, // pMsg + NULL, // pPayload + SOE_RM_CMDQ_LOG_ID, + &cmdSeqDesc, + &timeout); + if (status != NV_OK) + { + NVSWITCH_PRINT(device, ERROR, "%s: Failed to send PRE_LOCK_SEQUENCE command to SOE, status 0x%x\n", + __FUNCTION__, status); + return -NVL_ERR_GENERIC; + } + + return NVL_SUCCESS; +} + /** * @brief set hal function pointers for functions defined in LR10 (i.e. this file) * diff --git a/src/common/nvswitch/kernel/ls10/tnvl_ls10.c b/src/common/nvswitch/kernel/ls10/tnvl_ls10.c index 0a72723375..b4d6553108 100644 --- a/src/common/nvswitch/kernel/ls10/tnvl_ls10.c +++ b/src/common/nvswitch/kernel/ls10/tnvl_ls10.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -26,9 +26,12 @@ #include "common_nvswitch.h" #include "haldef_nvswitch.h" #include "ls10/ls10.h" +#include "ls10/soe_ls10.h" #include "nvswitch/ls10/dev_nvlsaw_ip.h" #include "nvswitch/ls10/dev_nvlsaw_ip_addendum.h" +#include "nvswitch/ls10/dev_ctrl_ip.h" +#include "nvswitch/ls10/dev_ctrl_ip_addendum.h" #include @@ -639,6 +642,7 @@ _nvswitch_tnvl_get_cert_chain_from_fsp_ls10 NvlStatus status; TNVL_GET_ATT_CERTS_CMD_PAYLOAD *pCmdPayload = nvswitch_os_malloc(sizeof(TNVL_GET_ATT_CERTS_CMD_PAYLOAD)); TNVL_GET_ATT_CERTS_RSP_PAYLOAD *pRspPayload = nvswitch_os_malloc(sizeof(TNVL_GET_ATT_CERTS_RSP_PAYLOAD)); + NVSWITCH_TIMEOUT timeout; if (pCmdPayload == NULL || pRspPayload == NULL) { @@ -653,9 +657,11 @@ _nvswitch_tnvl_get_cert_chain_from_fsp_ls10 pCmdPayload->minorVersion = 0; pCmdPayload->majorVersion = 1; + nvswitch_timeout_create(5 * NVSWITCH_INTERVAL_1SEC_IN_NS, &timeout); + status = nvswitch_fsp_send_and_read_message(device, (NvU8*) pCmdPayload, sizeof(TNVL_GET_ATT_CERTS_CMD_PAYLOAD), NVDM_TYPE_TNVL, - (NvU8*) pRspPayload, sizeof(TNVL_GET_ATT_CERTS_RSP_PAYLOAD)); + (NvU8*) pRspPayload, sizeof(TNVL_GET_ATT_CERTS_RSP_PAYLOAD), &timeout); if (status != NVL_SUCCESS) { NVSWITCH_PRINT(device, ERROR, @@ -762,6 +768,10 @@ nvswitch_tnvl_get_attestation_certificate_chain_ls10 goto ErrorExit; } + certChainLength = certChainLength - + NVSWITCH_IK_HASH_LENGTH - + NVSWITCH_ATT_CERT_SIZE_FIELD_LENGTH - + NVSWITCH_ATT_RSVD1_FIELD_LENGTH; // // pCertChainBufferEnd represents last valid byte for cert buffer. // @@ -865,6 +875,7 @@ nvswitch_tnvl_get_attestation_report_ls10 NvlStatus status; TNVL_GET_ATT_REPORT_CMD_PAYLOAD *pCmdPayload; TNVL_GET_ATT_REPORT_RSP_PAYLOAD *pRspPayload; + NVSWITCH_TIMEOUT timeout; if (!nvswitch_is_tnvl_mode_enabled(device)) { @@ -892,9 +903,11 @@ nvswitch_tnvl_get_attestation_report_ls10 pCmdPayload->majorVersion = 1; nvswitch_os_memcpy(pCmdPayload->nonce, params->nonce, NVSWITCH_NONCE_SIZE); + nvswitch_timeout_create(10 * NVSWITCH_INTERVAL_1SEC_IN_NS, &timeout); + status = nvswitch_fsp_send_and_read_message(device, (NvU8*) pCmdPayload, sizeof(TNVL_GET_ATT_REPORT_CMD_PAYLOAD), NVDM_TYPE_TNVL, - (NvU8*) pRspPayload, sizeof(TNVL_GET_ATT_REPORT_RSP_PAYLOAD)); + (NvU8*) pRspPayload, sizeof(TNVL_GET_ATT_REPORT_RSP_PAYLOAD), &timeout); if (status != NVL_SUCCESS) { NVSWITCH_PRINT(device, ERROR, @@ -937,6 +950,9 @@ nvswitch_detect_tnvl_mode_ls10 val = NVSWITCH_SAW_RD32_LS10(device, _NVLSAW, _TNVL_MODE); if (FLD_TEST_DRF(_NVLSAW, _TNVL_MODE, _STATUS, _ENABLED, val)) { + NVSWITCH_PRINT(device, ERROR, + "%s: TNVL Mode Detected\n", + __FUNCTION__); device->tnvl_mode = NVSWITCH_DEVICE_TNVL_MODE_ENABLED; } @@ -970,6 +986,7 @@ nvswitch_tnvl_send_fsp_lock_config_ls10 NvlStatus status; TNVL_LOCK_CONFIG_CMD_PAYLOAD *pCmdPayload; TNVL_LOCK_CONFIG_RSP_PAYLOAD *pRspPayload; + NVSWITCH_TIMEOUT timeout; if (!nvswitch_is_tnvl_mode_enabled(device)) { @@ -995,9 +1012,11 @@ nvswitch_tnvl_send_fsp_lock_config_ls10 pCmdPayload->minorVersion = 0; pCmdPayload->majorVersion = 1; + nvswitch_timeout_create(5 * NVSWITCH_INTERVAL_1SEC_IN_NS, &timeout); + status = nvswitch_fsp_send_and_read_message(device, (NvU8*) pCmdPayload, sizeof(TNVL_LOCK_CONFIG_CMD_PAYLOAD), NVDM_TYPE_TNVL, - (NvU8*) pRspPayload, sizeof(TNVL_LOCK_CONFIG_RSP_PAYLOAD)); + (NvU8*) pRspPayload, sizeof(TNVL_LOCK_CONFIG_RSP_PAYLOAD), &timeout); if (status != NVL_SUCCESS) { NVSWITCH_PRINT(device, ERROR, @@ -1035,3 +1054,100 @@ nvswitch_tnvl_get_status_ls10 params->status = device->tnvl_mode; return NVL_SUCCESS; } + +static NvBool +_nvswitch_reg_cpu_write_allow_list_ls10 +( + nvswitch_device *device, + NVSWITCH_ENGINE_ID eng_id, + NvU32 offset +) +{ + switch (eng_id) + { + case NVSWITCH_ENGINE_ID_SOE: + case NVSWITCH_ENGINE_ID_GIN: + case NVSWITCH_ENGINE_ID_FSP: + return NV_TRUE; + case NVSWITCH_ENGINE_ID_SAW: + if (offset == NV_NVLSAW_DRIVER_ATTACH_DETACH) + return NV_TRUE; + default : + return NV_FALSE; + } +} + +void +nvswitch_tnvl_reg_wr_32_ls10 +( + nvswitch_device *device, + NVSWITCH_ENGINE_ID eng_id, + NvU32 eng_bcast, + NvU32 eng_instance, + NvU32 base_addr, + NvU32 offset, + NvU32 data +) +{ + if (!nvswitch_is_tnvl_mode_enabled(device)) + { + NVSWITCH_PRINT(device, ERROR, + "%s: TNVL mode is not enabled\n", + __FUNCTION__); + NVSWITCH_ASSERT(0); + return; + } + + if (nvswitch_is_tnvl_mode_locked(device)) + { + NVSWITCH_PRINT(device, ERROR, + "%s: TNVL mode is locked\n", + __FUNCTION__); + NVSWITCH_ASSERT(0); + return; + } + + if (_nvswitch_reg_cpu_write_allow_list_ls10(device, eng_id, offset)) + { + nvswitch_reg_write_32(device, base_addr + offset, data); + } + else + { + if (nvswitch_soe_reg_wr_32_ls10(device, base_addr + offset, data) != NVL_SUCCESS) + { + NVSWITCH_PRINT(device, ERROR, + "%s: SOE ENG_WR failed for 0x%x[%d] %s @0x%08x+0x%06x = 0x%08x\n", + __FUNCTION__, + eng_id, eng_instance, + ( + (eng_bcast == NVSWITCH_GET_ENG_DESC_TYPE_UNICAST) ? "UC" : + (eng_bcast == NVSWITCH_GET_ENG_DESC_TYPE_BCAST) ? "BC" : + (eng_bcast == NVSWITCH_GET_ENG_DESC_TYPE_MULTICAST) ? "MC" : + "??" + ), + base_addr, offset, data); + NVSWITCH_ASSERT(0); + } + } +} + +void +nvswitch_tnvl_disable_interrupts_ls10 +( + nvswitch_device *device +) +{ + // + // In TNVL locked disable non-fatal NVLW, NPG, and legacy interrupt, + // disable additional non-fatals on those partitions. + // + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NVLW_NON_FATAL_IDX), + 0xFFFF); + + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX), + 0xFFFF); + + NVSWITCH_ENG_WR32(device, GIN, , 0, _CTRL, _CPU_INTR_LEAF_EN_CLEAR(NV_CTRL_CPU_INTR_UNITS_IDX), + 0xFFFFFFFF); +} + diff --git a/src/common/nvswitch/kernel/nvswitch.c b/src/common/nvswitch/kernel/nvswitch.c index a0366122de..bbfe098ad7 100644 --- a/src/common/nvswitch/kernel/nvswitch.c +++ b/src/common/nvswitch/kernel/nvswitch.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2017-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2017-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -1032,6 +1032,15 @@ _nvswitch_ctrl_get_tnvl_status return device->hal.nvswitch_tnvl_get_status(device, params); } +void +nvswitch_tnvl_disable_interrupts +( + nvswitch_device *device +) +{ + device->hal.nvswitch_tnvl_disable_interrupts(device); +} + static NvlStatus _nvswitch_construct_soe ( @@ -1879,9 +1888,16 @@ nvswitch_lib_initialize_device (void)device->hal.nvswitch_read_oob_blacklist_state(device); (void)device->hal.nvswitch_write_fabric_state(device); - nvswitch_task_create(device, &nvswitch_fabric_state_heartbeat, - NVSWITCH_HEARTBEAT_INTERVAL_NS, - NVSWITCH_TASK_TYPE_FLAGS_RUN_EVEN_IF_DEVICE_NOT_INITIALIZED); + if (!nvswitch_is_tnvl_mode_enabled(device)) + { + nvswitch_task_create(device, &nvswitch_fabric_state_heartbeat, + NVSWITCH_HEARTBEAT_INTERVAL_NS, + NVSWITCH_TASK_TYPE_FLAGS_RUN_EVEN_IF_DEVICE_NOT_INITIALIZED); + } + else + { + NVSWITCH_PRINT(device, INFO, "Skipping Fabric state heartbeat background task when TNVL is enabled\n"); + } // // Blacklisted devices return successfully in order to preserve the fabric state heartbeat @@ -1985,12 +2001,26 @@ nvswitch_lib_initialize_device if (device->regkeys.latency_counter == NV_SWITCH_REGKEY_LATENCY_COUNTER_LOGGING_ENABLE) { - nvswitch_task_create(device, &nvswitch_internal_latency_bin_log, - nvswitch_get_latency_sample_interval_msec(device) * NVSWITCH_INTERVAL_1MSEC_IN_NS * 9/10, 0); + if (!nvswitch_is_tnvl_mode_enabled(device)) + { + nvswitch_task_create(device, &nvswitch_internal_latency_bin_log, + nvswitch_get_latency_sample_interval_msec(device) * NVSWITCH_INTERVAL_1MSEC_IN_NS * 9/10, 0); + } + else + { + NVSWITCH_PRINT(device, INFO, "Skipping Internal latency background task when TNVL is enabled\n"); + } } - nvswitch_task_create(device, &nvswitch_ecc_writeback_task, - (60 * NVSWITCH_INTERVAL_1SEC_IN_NS), 0); + if (!nvswitch_is_tnvl_mode_enabled(device)) + { + nvswitch_task_create(device, &nvswitch_ecc_writeback_task, + (60 * NVSWITCH_INTERVAL_1SEC_IN_NS), 0); + } + else + { + NVSWITCH_PRINT(device, INFO, "Skipping ECC writeback background task when TNVL is enabled\n"); + } if (IS_RTLSIM(device) || IS_EMULATION(device) || IS_FMODEL(device)) { @@ -2000,8 +2030,15 @@ nvswitch_lib_initialize_device } else { - nvswitch_task_create(device, &nvswitch_monitor_thermal_alert, - 100*NVSWITCH_INTERVAL_1MSEC_IN_NS, 0); + if (!nvswitch_is_tnvl_mode_enabled(device)) + { + nvswitch_task_create(device, &nvswitch_monitor_thermal_alert, + 100*NVSWITCH_INTERVAL_1MSEC_IN_NS, 0); + } + else + { + NVSWITCH_PRINT(device, INFO, "Skipping Thermal alert background task when TNVL is enabled\n"); + } } device->nvlink_device->initialized = 1; @@ -5987,6 +6024,15 @@ nvswitch_tnvl_send_fsp_lock_config return device->hal.nvswitch_tnvl_send_fsp_lock_config(device); } +NvlStatus +nvswitch_send_tnvl_prelock_cmd +( + nvswitch_device *device +) +{ + return device->hal.nvswitch_send_tnvl_prelock_cmd(device); +} + static NvlStatus _nvswitch_ctrl_set_device_tnvl_lock ( @@ -6020,8 +6066,18 @@ _nvswitch_ctrl_set_device_tnvl_lock // // Disable non-fatal and legacy interrupts - // Disable commands to SOE // + nvswitch_tnvl_disable_interrupts(device); + + // + // + // Send Pre-Lock sequence command to SOE + // + status = nvswitch_send_tnvl_prelock_cmd(device); + if (status != NVL_SUCCESS) + { + return status; + } // Send lock-config command to FSP status = nvswitch_tnvl_send_fsp_lock_config(device); diff --git a/src/common/sdk/nvidia/inc/class/cl00de.h b/src/common/sdk/nvidia/inc/class/cl00de.h index 904760dd7b..5b31652912 100644 --- a/src/common/sdk/nvidia/inc/class/cl00de.h +++ b/src/common/sdk/nvidia/inc/class/cl00de.h @@ -109,12 +109,20 @@ enum { typedef struct RUSD_BAR1_MEMORY_INFO { volatile NvU64 lastModifiedTimestamp; + // + // Non-polled data, not tied to any specific RM API + // Total size and available memory in Bar1 + // NvU32 bar1Size; NvU32 bar1AvailSize; } RUSD_BAR1_MEMORY_INFO; typedef struct RUSD_PMA_MEMORY_INFO { volatile NvU64 lastModifiedTimestamp; + // + // Non-polled data, not tied to any specific RM API + // Total size and available memory in PMA + // NvU64 totalPmaMemory; NvU64 freePmaMemory; } RUSD_PMA_MEMORY_INFO; @@ -152,12 +160,13 @@ typedef struct RUSD_PERF_DEVICE_UTILIZATION { typedef struct RUSD_PERF_CURRENT_PSTATE { volatile NvU64 lastModifiedTimestamp; + // Provided from NV2080_CTRL_CMD_PERF_GET_CURRENT_PSTATE NvU32 currentPstate; } RUSD_PERF_CURRENT_PSTATE; typedef struct RUSD_CLK_THROTTLE_REASON { volatile NvU64 lastModifiedTimestamp; - NvU32 reasonMask; // Bitmask of RUSD_CLK_THROTTLE_REASON + NvU32 reasonMask; // Bitmask of RUSD_CLK_THROTTLE_REASON_* } RUSD_CLK_THROTTLE_REASON; typedef struct RUSD_MEM_ERROR_COUNTS { @@ -174,6 +183,7 @@ typedef struct RUSD_MEM_ERROR_COUNTS { typedef struct RUSD_MEM_ECC { volatile NvU64 lastModifiedTimestamp; + // Provided from NV2080_CTRL_CMD_GPU_QUERY_ECC_STATUS RUSD_MEM_ERROR_COUNTS count[RUSD_MEMORY_ERROR_TYPE_COUNT]; } RUSD_MEM_ECC; @@ -198,6 +208,7 @@ typedef struct RUSD_TEMPERATURE { } RUSD_TEMPERATURE; typedef struct RUSD_MEM_ROW_REMAP_INFO { + // Provided from NV2080_CTRL_CMD_FB_GET_ROW_REMAPPER_HISTOGRAM NvU32 histogramMax; // No remapped row is used. NvU32 histogramHigh; // One remapped row is used. NvU32 histogramPartial; // More than one remapped rows are used. @@ -229,6 +240,7 @@ typedef struct RUSD_AVG_POWER_USAGE { typedef struct RUSD_INST_POWER_INFO { NvU32 instGpuPower; // mW NvU32 instModulePower; // mW + NvU32 instCpuPower; // mW } RUSD_INST_POWER_INFO; typedef struct RUSD_INST_POWER_USAGE { @@ -238,22 +250,50 @@ typedef struct RUSD_INST_POWER_USAGE { typedef struct RUSD_SHADOW_ERR_CONT { volatile NvU64 lastModifiedTimestamp; + // + // Non-polled data, not tied to any specific RM API + // Shadowed ERR_CONT register value + // NvU32 shadowErrContVal; } RUSD_SHADOW_ERR_CONT; -typedef struct NV00DE_SHARED_DATA { - // Temporarily duplicated - to be removed by nested structs below - volatile NvU64 seq; +// Each RUSD_BUS_DATA_* define corresponds to the equivalent NV2080_CTRL_BUS_INFO_INDEX_* +#define RUSD_BUS_DATA_PCIE_GEN_INFO 0 +#define RUSD_BUS_DATA_PCIE_GPU_LINK_LINECODE_ERRORS 1 +#define RUSD_BUS_DATA_PCIE_GPU_LINK_CRC_ERRORS 2 +#define RUSD_BUS_DATA_PCIE_GPU_LINK_NAKS_RECEIVED 3 +#define RUSD_BUS_DATA_PCIE_GPU_LINK_FAILED_L0S_EXITS 4 +#define RUSD_BUS_DATA_PCIE_GPU_LINK_CORRECTABLE_ERRORS 5 +#define RUSD_BUS_DATA_PCIE_GPU_LINK_NONFATAL_ERRORS 6 +#define RUSD_BUS_DATA_PCIE_GPU_LINK_FATAL_ERRORS 7 +#define RUSD_BUS_DATA_PCIE_GPU_LINK_UNSUPPORTED_REQUESTS 8 +#define RUSD_BUS_DATA_COUNT 9 + +typedef struct RUSD_PCIE_DATA_INFO { + // Provided from NV2080_CTRL_CMD_BUS_GET_INFO_V2 + NvU32 data[RUSD_BUS_DATA_COUNT]; +} RUSD_PCIE_DATA_INFO; + +typedef struct RUSD_PCIE_DATA { + volatile NvU64 lastModifiedTimestamp; + RUSD_PCIE_DATA_INFO info; +} RUSD_PCIE_DATA; - NvU32 bar1Size; - NvU32 bar1AvailSize; +typedef struct RUSD_GR_INFO +{ + volatile NvU64 lastModifiedTimestamp; + NvBool bCtxswLoggingEnabled; +} RUSD_GR_INFO; +typedef struct NV00DE_SHARED_DATA { NV_DECLARE_ALIGNED(RUSD_BAR1_MEMORY_INFO bar1MemoryInfo, 8); NV_DECLARE_ALIGNED(RUSD_PMA_MEMORY_INFO pmaMemoryInfo, 8); NV_DECLARE_ALIGNED(RUSD_SHADOW_ERR_CONT shadowErrCont, 8); + NV_DECLARE_ALIGNED(RUSD_GR_INFO grInfo, 8); + // gpuUpdateUserSharedData is sensitive to these two sections being contiguous // @@ -295,6 +335,9 @@ typedef struct NV00DE_SHARED_DATA { // POLL_POWER NV_DECLARE_ALIGNED(RUSD_INST_POWER_USAGE instPowerUsage, 8); + + // POLL_PCI + NV_DECLARE_ALIGNED(RUSD_PCIE_DATA pciBusData, 8); } NV00DE_SHARED_DATA; // @@ -306,6 +349,7 @@ typedef struct NV00DE_SHARED_DATA { #define NV00DE_RUSD_POLL_MEMORY 0x4 #define NV00DE_RUSD_POLL_POWER 0x8 #define NV00DE_RUSD_POLL_THERMAL 0x10 +#define NV00DE_RUSD_POLL_PCI 0x20 typedef struct NV00DE_ALLOC_PARAMETERS { NvU64 polledDataMask; // Bitmask of data to request polling at alloc time, 0 if not needed diff --git a/src/common/sdk/nvidia/inc/class/cl00f8.h b/src/common/sdk/nvidia/inc/class/cl00f8.h index 97a29f5fd5..66d3907ba3 100644 --- a/src/common/sdk/nvidia/inc/class/cl00f8.h +++ b/src/common/sdk/nvidia/inc/class/cl00f8.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -95,11 +95,8 @@ #define NV_MEMORY_FABRIC_PAGE_SIZE_2M 0x200000 #define NV_MEMORY_FABRIC_PAGE_SIZE_512M 0x20000000 - #define NV_MEMORY_FABRIC_PAGE_SIZE_256G 0x4000000000 - - #define NV00F8_ALLOC_FLAGS_DEFAULT 0 #define NV00F8_ALLOC_FLAGS_FLEXIBLE_FLA NVBIT(0) #define NV00F8_ALLOC_FLAGS_FORCE_NONCONTIGUOUS NVBIT(1) diff --git a/src/common/sdk/nvidia/inc/class/cl2080_notification.h b/src/common/sdk/nvidia/inc/class/cl2080_notification.h index 97fa0bb9ca..f8ac46bc88 100644 --- a/src/common/sdk/nvidia/inc/class/cl2080_notification.h +++ b/src/common/sdk/nvidia/inc/class/cl2080_notification.h @@ -204,7 +204,6 @@ extern "C" { #define NV2080_NOTIFIERS_SEC_FAULT_ERROR (163) #define NV2080_NOTIFIERS_UNUSED_1 (164) // Unused #define NV2080_NOTIFIERS_NVLINK_INFO_LINK_UP (165) -// removal tracking bug: 3748354 #define NV2080_NOTIFIERS_CE10 (166) #define NV2080_NOTIFIERS_CE11 (167) #define NV2080_NOTIFIERS_CE12 (168) @@ -219,7 +218,6 @@ extern "C" { #define NV2080_NOTIFIERS_NVPCF_EVENTS (177) #define NV2080_NOTIFIERS_HDMI_FRL_RETRAINING_REQUEST (178) #define NV2080_NOTIFIERS_VRR_SET_TIMEOUT (179) -// removal tracking bug: 3748354 #define NV2080_NOTIFIERS_OFA1 (180) #define NV2080_NOTIFIERS_AUX_POWER_EVENT (181) #define NV2080_NOTIFIERS_AUX_POWER_STATE_CHANGE (182) @@ -230,7 +228,12 @@ extern "C" { #define NV2080_NOTIFIERS_ECC_SBE_STORM (187) #define NV2080_NOTIFIERS_DRAM_RETIREMENT_EVENT (188) #define NV2080_NOTIFIERS_DRAM_RETIREMENT_FAILURE (189) -#define NV2080_NOTIFIERS_MAXCOUNT (190) +#define NV2080_NOTIFIERS_NVLINK_UNCONTAINED_ERROR (190) +#define NV2080_NOTIFIERS_GPU_UNAVAILABLE (191) +#define NV2080_NOTIFIERS_GPU_RECOVERY_ACTION (192) +#define NV2080_NOTIFIERS_POWER_SUSPEND (193) +#define NV2080_NOTIFIERS_POWER_RESUME (194) +#define NV2080_NOTIFIERS_MAXCOUNT (195) // Indexed GR notifier reference #define NV2080_NOTIFIERS_GR(x) ((x == 0) ? (NV2080_NOTIFIERS_GR0) : (NV2080_NOTIFIERS_GR1 + (x - 1))) @@ -238,7 +241,6 @@ extern "C" { #define NV2080_NOTIFIER_TYPE_IS_GR(x) (((x) == NV2080_NOTIFIERS_GR0) || (((x) >= NV2080_NOTIFIERS_GR1) && ((x) <= NV2080_NOTIFIERS_GR7))) // Indexed CE notifier reference -// removal tracking bug: 3748354 #define NV2080_NOTIFIERS_CE(x) (((x) < 10) ? (NV2080_NOTIFIERS_CE0 + (x)) : (NV2080_NOTIFIERS_CE10 + (x) - 10)) #define NV2080_NOTIFIERS_CE_IDX(x) (((x) <= NV2080_NOTIFIERS_CE9) ? ((x) - NV2080_NOTIFIERS_CE0) : ((x) - NV2080_NOTIFIERS_CE10 + 10)) #define NV2080_NOTIFIER_TYPE_IS_CE(x) ((((x) >= NV2080_NOTIFIERS_CE0) && ((x) <= NV2080_NOTIFIERS_CE9)) || \ @@ -258,7 +260,6 @@ extern "C" { #define NV2080_NOTIFIER_TYPE_IS_NVJPEG(x) (((x) >= NV2080_NOTIFIERS_NVJPEG0) && ((x) <= NV2080_NOTIFIERS_NVJPEG7)) // Indexed OFA notifier reference -// removal tracking bug: 3748354 #define NV2080_NOTIFIERS_OFAn(x) ((x == 0) ? (NV2080_NOTIFIERS_OFA0) : (NV2080_NOTIFIERS_OFA1)) #define NV2080_NOTIFIERS_OFA_IDX(x) ((x == NV2080_NOTIFIERS_OFA0) ? ((x) - NV2080_NOTIFIERS_OFA0) : ((x) - NV2080_NOTIFIERS_OFA1 + 1)) #define NV2080_NOTIFIER_TYPE_IS_OFA(x) (((x) == NV2080_NOTIFIERS_OFA0) || ((x) == NV2080_NOTIFIERS_OFA1)) @@ -331,7 +332,6 @@ extern "C" { #define NV2080_ENGINE_TYPE_NVJPEG7 (0x00000032) #define NV2080_ENGINE_TYPE_OFA (0x00000033) #define NV2080_ENGINE_TYPE_OFA0 NV2080_ENGINE_TYPE_OFA -// removal tracking bug: 3748354 // Update the TYPE_COMP_DECOMP_COPYN defines as well when you update COPYN defines #define NV2080_ENGINE_TYPE_COPY10 (0x00000034) #define NV2080_ENGINE_TYPE_COPY11 (0x00000035) @@ -343,11 +343,9 @@ extern "C" { #define NV2080_ENGINE_TYPE_COPY17 (0x0000003b) #define NV2080_ENGINE_TYPE_COPY18 (0x0000003c) #define NV2080_ENGINE_TYPE_COPY19 (0x0000003d) -// removal tracking bug: 3748354 #define NV2080_ENGINE_TYPE_OFA1 (0x0000003e) #define NV2080_ENGINE_TYPE_RESERVED3f (0x0000003f) // See TBD documentation for how these defines work with existing ENGINE_TYPE_COPYN defines -// removal tracking bug: 3748354 #define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY0 (0x00000040) #define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY1 (0x00000041) #define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY2 (0x00000042) @@ -390,11 +388,9 @@ extern "C" { #define NV2080_ENGINE_TYPE_IS_COMP_DECOMP_COPY(i) (((i) >= NV2080_ENGINE_TYPE_COMP_DECOMP_COPY0) && ((i) <= NV2080_ENGINE_TYPE_COMP_DECOMP_COPY19)) #define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY_IDX(i) ((i) - NV2080_ENGINE_TYPE_COMP_DECOMP_COPY0) -// removal tracking bug: 3748354 #define NV2080_ENGINE_TYPE_COPY(i) (((i) < 10) ? (NV2080_ENGINE_TYPE_COPY0 + (i)) : (NV2080_ENGINE_TYPE_COPY10 + (i) - 10)) #define NV2080_ENGINE_TYPE_IS_COPY(i) ((((i) >= NV2080_ENGINE_TYPE_COPY0) && ((i) <= NV2080_ENGINE_TYPE_COPY9)) || \ - (((i) >= NV2080_ENGINE_TYPE_COPY10) && ((i) <= NV2080_ENGINE_TYPE_COPY19)) || \ - (NV2080_ENGINE_TYPE_IS_COMP_DECOMP_COPY(i))) + (((i) >= NV2080_ENGINE_TYPE_COPY10) && ((i) <= NV2080_ENGINE_TYPE_COPY19))) #define NV2080_ENGINE_TYPE_COPY_IDX(i) (((i) <= NV2080_ENGINE_TYPE_COPY9) ? \ ((i) - NV2080_ENGINE_TYPE_COPY0) : ((i) - NV2080_ENGINE_TYPE_COPY10 + 10)) @@ -414,7 +410,6 @@ extern "C" { #define NV2080_ENGINE_TYPE_IS_GR(i) (((i) >= NV2080_ENGINE_TYPE_GR0) && ((i) < NV2080_ENGINE_TYPE_GR(NV2080_ENGINE_TYPE_GR_SIZE))) #define NV2080_ENGINE_TYPE_GR_IDX(i) ((i) - NV2080_ENGINE_TYPE_GR0) -// removal tracking bug: 3748354 #define NV2080_ENGINE_TYPE_OFAn(i) ((i == 0) ? (NV2080_ENGINE_TYPE_OFA0) : (NV2080_ENGINE_TYPE_OFA1)) #define NV2080_ENGINE_TYPE_IS_OFA(i) (((i) == NV2080_ENGINE_TYPE_OFA0) || ((i) == NV2080_ENGINE_TYPE_OFA1)) #define NV2080_ENGINE_TYPE_OFA_IDX(i) ((i == NV2080_ENGINE_TYPE_OFA0) ? ((i) - NV2080_ENGINE_TYPE_OFA0) : ((i) - NV2080_ENGINE_TYPE_OFA1 + 1)) diff --git a/src/common/sdk/nvidia/inc/class/cl90cdtrace.h b/src/common/sdk/nvidia/inc/class/cl90cdtrace.h index e792373731..1b07412397 100644 --- a/src/common/sdk/nvidia/inc/class/cl90cdtrace.h +++ b/src/common/sdk/nvidia/inc/class/cl90cdtrace.h @@ -39,4 +39,28 @@ typedef struct NV_RATS_GSP_TRACE_RECORD_V1 typedef NV_RATS_GSP_TRACE_RECORD_V1 NV_RATS_GSP_TRACE_RECORD; +#define VGPU_TRACING_BUFFER_KEEP_OLDEST 0 +#define VGPU_TRACING_BUFFER_KEEP_NEWEST 1 + +typedef struct NV_RATS_VGPU_GSP_TRACING_BUFFER_V1{ + NvU8 policy; + + NvBool bGuestNotifInProgress; + + NvU16 seqNo; + NvU32 bufferSize; + NvU32 bufferWatermark; + NvU32 recordCount; + + NvU64 tracepointMask; + NvU32 read; + NvU32 write; + + NvU64 lastReadTimestamp; + + NV_RATS_GSP_TRACE_RECORD *buffer; +} NV_RATS_VGPU_GSP_TRACING_BUFFER_V1; + +typedef NV_RATS_VGPU_GSP_TRACING_BUFFER_V1 NV_RATS_VGPU_GSP_TRACING_BUFFER; + #endif diff --git a/src/common/sdk/nvidia/inc/class/cla084.h b/src/common/sdk/nvidia/inc/class/cla084.h index c862310b3f..a2ad5f927e 100644 --- a/src/common/sdk/nvidia/inc/class/cla084.h +++ b/src/common/sdk/nvidia/inc/class/cla084.h @@ -58,6 +58,7 @@ * hPluginHeapMemory -> plugin heap memory handle, the client handle is hPluginClient * hMigRmHeapMemory -> MIG-RM heap memory handle * bDeviceProfilingEnabled -> If set to true, profiling is allowed + * bGpupLiveMigrationEnabled -> True if GPUP LM is supported */ #define NVA084_ALLOC_PARAMETERS_MESSAGE_ID (0xa084U) @@ -88,4 +89,5 @@ typedef struct NVA084_ALLOC_PARAMETERS { NV_DECLARE_ALIGNED(NvU64 kernelLogBuffOffset, 8); NV_DECLARE_ALIGNED(NvU64 kernelLogBuffSize, 8); NvBool bDeviceProfilingEnabled; + NvBool bGpupLiveMigrationEnabled; } NVA084_ALLOC_PARAMETERS; diff --git a/src/common/sdk/nvidia/inc/class/clb1cc.h b/src/common/sdk/nvidia/inc/class/clb1cc.h new file mode 100644 index 0000000000..4e3e226179 --- /dev/null +++ b/src/common/sdk/nvidia/inc/class/clb1cc.h @@ -0,0 +1,50 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clb1cc.finn +// + +#include "clb0cc.h" + +#define MAXWELL_PROFILER_CONTEXT (0xb1ccU) /* finn: Evaluated from "NVB1CC_ALLOC_PARAMETERS_MESSAGE_ID" */ + +/* + * Creating the MAXWELL_PROFILER_CONTEXT object: + * - The profiler object is instantiated as a child of either a bc channel + * group or bc channel. + */ +#define NVB1CC_ALLOC_PARAMETERS_MESSAGE_ID (0xb1ccU) + +typedef struct NVB1CC_ALLOC_PARAMETERS { + /* + * Handle of a specific subdevice of a broadcast device. + */ + NvHandle hSubDevice; +} NVB1CC_ALLOC_PARAMETERS; + diff --git a/src/common/sdk/nvidia/inc/class/clc970.h b/src/common/sdk/nvidia/inc/class/clc970.h new file mode 100644 index 0000000000..769cd741ff --- /dev/null +++ b/src/common/sdk/nvidia/inc/class/clc970.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clc970.finn +// + +#define NVC970_DISPLAY (0xc970U) /* finn: Evaluated from "NVC970_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +#define NVC970_ALLOCATION_PARAMETERS_MESSAGE_ID (0xc970U) + +typedef struct NVC970_ALLOCATION_PARAMETERS { + NvU32 numHeads; // Number of HEADs in this chip/display + NvU32 numSors; // Number of SORs in this chip/display + NvU32 numDsis; // Number of DSIs in this chip/display +} NVC970_ALLOCATION_PARAMETERS; + diff --git a/src/common/sdk/nvidia/inc/class/clc971.h b/src/common/sdk/nvidia/inc/class/clc971.h new file mode 100644 index 0000000000..7cdb433b7b --- /dev/null +++ b/src/common/sdk/nvidia/inc/class/clc971.h @@ -0,0 +1,329 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc971_h_ +#define _clc971_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC971_DISP_SF_USER (0x000C971) + +typedef volatile struct { + NvU32 dispSfUserOffset[0x400]; +} _NvC971DispSfUser, NvC971DispSfUserMap; + +#define NVC971_SF_HDMI_INFO_IDX_AVI_INFOFRAME 0x00000000 /* */ +#define NVC971_SF_HDMI_INFO_IDX_GCP 0x00000001 /* */ +#define NVC971_SF_HDMI_INFO_IDX_ACR 0x00000002 /* */ +#define NVC971_SF_HDMI_INFO_CTRL(i,j) (0x000E0000-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC971_SF_HDMI_INFO_CTRL__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_INFO_CTRL__SIZE_2 3 /* */ +#define NVC971_SF_HDMI_INFO_CTRL_ENABLE 0:0 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_INFO_CTRL_ENABLE_DIS 0x00000000 /* RW--V */ +#define NVC971_SF_HDMI_INFO_CTRL_ENABLE_EN 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_INFO_CTRL_CHKSUM_HW 9:9 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_CTRL_CHKSUM_HW_ENABLE 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_INFO_CTRL_CHKSUM_HW_EN 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_INFO_CTRL_CHKSUM_HW_DISABLE 0x00000000 /* RW--V */ +#define NVC971_SF_HDMI_INFO_CTRL_CHKSUM_HW_DIS 0x00000000 /* RW--V */ +#define NVC971_SF_HDMI_INFO_CTRL_CHKSUM_HW_INIT 0x00000001 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_CTRL_HBLANK 12:12 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_CTRL_HBLANK_DIS 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_CTRL_HBLANK_EN 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_INFO_CTRL_VIDEO_FMT 16:16 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_CTRL_VIDEO_FMT_SW_CONTROLLED 0x00000000 /* RW--V */ +#define NVC971_SF_HDMI_INFO_CTRL_VIDEO_FMT_HW_CONTROLLED 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_INFO_CTRL_VIDEO_FMT_INIT 0x00000001 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_STATUS(i,j) (0x000E0004-0x000E0000+(i)*1024+(j)*64) /* R--4A */ +#define NVC971_SF_HDMI_INFO_STATUS__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_INFO_STATUS__SIZE_2 3 /* */ +#define NVC971_SF_HDMI_INFO_STATUS_SENT 0:0 /* R--VF */ +#define NVC971_SF_HDMI_INFO_STATUS_SENT_DONE 0x00000001 /* R---V */ +#define NVC971_SF_HDMI_INFO_STATUS_SENT_WAITING 0x00000000 /* R---V */ +#define NVC971_SF_HDMI_INFO_HEADER(i,j) (0x000E0008-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC971_SF_HDMI_INFO_HEADER__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_INFO_HEADER__SIZE_2 3 /* */ +#define NVC971_SF_HDMI_INFO_HEADER_HB0 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_HEADER_HB0_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_HEADER_HB1 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_HEADER_HB1_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_HEADER_HB2 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_HEADER_HB2_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_LOW(i,j) (0x000E000C-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_LOW__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_LOW__SIZE_2 3 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_LOW_PB0 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_LOW_PB0_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_LOW_PB1 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_LOW_PB1_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_LOW_PB2 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_LOW_PB2_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_LOW_PB3 31:24 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_LOW_PB3_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_HIGH(i,j) (0x000E0010-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_HIGH__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_HIGH__SIZE_2 3 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_HIGH_PB4 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_HIGH_PB4_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_HIGH_PB5 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_HIGH_PB5_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_HIGH_PB6 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_HIGH_PB6_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_LOW(i,j) (0x000E0014-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_LOW__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_LOW__SIZE_2 3 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_LOW_PB7 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_LOW_PB7_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_LOW_PB8 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_LOW_PB8_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_LOW_PB9 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_LOW_PB9_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_LOW_PB10 31:24 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_LOW_PB10_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_HIGH(i,j) (0x000E0018-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_HIGH__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_HIGH__SIZE_2 3 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_HIGH_PB11 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_HIGH_PB11_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_HIGH_PB12 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_HIGH_PB12_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_HIGH_PB13 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_HIGH_PB13_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_LOW(i,j) (0x000E001C-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_LOW__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_LOW__SIZE_2 3 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_LOW_PB14 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_LOW_PB14_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_LOW_PB15 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_LOW_PB15_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_LOW_PB16 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_LOW_PB16_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_LOW_PB17 31:24 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_LOW_PB17_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_HIGH(i,j) (0x000E0020-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_HIGH__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_HIGH__SIZE_2 3 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_HIGH_PB18 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_HIGH_PB18_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_HIGH_PB19 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_HIGH_PB19_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_HIGH_PB20 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_HIGH_PB20_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_LOW(i,j) (0x000E0024-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_LOW__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_LOW__SIZE_2 3 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_LOW_PB21 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_LOW_PB21_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_LOW_PB22 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_LOW_PB22_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_LOW_PB23 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_LOW_PB23_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_LOW_PB24 31:24 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_LOW_PB24_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_HIGH(i,j) (0x000E0028-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_HIGH__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_HIGH__SIZE_2 3 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_HIGH_PB25 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_HIGH_PB25_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_HIGH_PB26 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_HIGH_PB26_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_HIGH_PB27 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_HIGH_PB27_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_CTRL(i) (0x000E0000-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_CTRL__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE 0:0 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_DIS 0x00000000 /* RW--V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_EN 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW 9:9 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_ENABLE 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_DISABLE 0x00000000 /* RW--V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_INIT 0x00000001 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_STATUS(i) (0x000E0004-0x000E0000+(i)*1024) /* R--4A */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_STATUS__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_STATUS_SENT 0:0 /* R-IVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_DONE 0x00000001 /* R---V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_WAITING 0x00000000 /* R---V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_INIT 0x00000000 /* R-I-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_HEADER(i) (0x000E0008-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_HEADER__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_HEADER_HB0 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_HEADER_HB0_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_HEADER_HB1 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_HEADER_HB1_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_HEADER_HB2 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_HEADER_HB2_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW(i) (0x000E000C-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB0 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB0_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB1 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB1_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB2 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB2_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB3 31:24 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB3_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH(i) (0x000E0010-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB4 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB4_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB5 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB5_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB6 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB6_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW(i) (0x000E0014-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB7 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB7_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB8 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB8_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB9 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB9_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB10 31:24 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB10_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH(i) (0x000E0018-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB11 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB11_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB12 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB12_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB13 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB13_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW(i) (0x000E001C-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB14 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB14_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB15 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB15_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB16 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB16_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB17 31:24 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB17_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_GCP_CTRL(i) (0x000E0040-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_HDMI_GCP_CTRL__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_GCP_CTRL_ENABLE 0:0 /* RWIVF */ +#define NVC971_SF_HDMI_GCP_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_GCP_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_GCP_CTRL_ENABLE_DIS 0x00000000 /* RW--V */ +#define NVC971_SF_HDMI_GCP_CTRL_ENABLE_EN 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_GCP_STATUS(i) (0x000E0044-0x000E0000+(i)*1024) /* R--4A */ +#define NVC971_SF_HDMI_GCP_STATUS__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_GCP_STATUS_SENT 0:0 /* R-IVF */ +#define NVC971_SF_HDMI_GCP_STATUS_SENT_DONE 0x00000001 /* R---V */ +#define NVC971_SF_HDMI_GCP_STATUS_SENT_WAITING 0x00000000 /* R---V */ +#define NVC971_SF_HDMI_GCP_STATUS_SENT_INIT 0x00000000 /* R-I-V */ +#define NVC971_SF_HDMI_GCP_SUBPACK(i) (0x000E004C-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_HDMI_GCP_SUBPACK__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB0 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB0_INIT 0x00000001 /* RWI-V */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB0_SET_AVMUTE 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB0_CLR_AVMUTE 0x00000010 /* RW--V */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB1 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB1_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB2 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB2_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB1_CTRL 24:24 /* RWIVF */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB1_CTRL_INIT 0x00000001 /* RWI-V */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB1_CTRL_SW 0x00000000 /* RW--V */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB1_CTRL_HW 0x00000001 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL(i,j) (0x000E0130-0x000E0000+(i)*1024+(j)*8) /* RW-4A */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL__SIZE_1 8 /* */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL__SIZE_2 10 /* */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_ENABLE 0:0 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE 3:1 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_ALWAYS 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_ONCE 0x00000001 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_FID_ALWAYS 0x00000002 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_FID_ONCE 0x00000003 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_FID_TRIGGER 0x00000004 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_LOC 5:4 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_LOC_VBLANK 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_LOC_VSYNC 0x00000001 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_LOC_LINE 0x00000002 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_OFFSET 10:6 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_OFFSET_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_SIZE 18:14 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_SIZE_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_BUSY 22:22 /* R-IVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_BUSY_NO 0x00000000 /* R-I-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_BUSY_YES 0x00000001 /* R---V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_SENT 23:23 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_SENT_NO 0x00000000 /* R-I-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_SENT_YES 0x00000001 /* R---V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_SENT_CLEAR 0x00000001 /* -W--C */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG(i,j) (0x000E0134-0x000E0000+(i)*1024+(j)*8) /* RW-4A */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG__SIZE_1 8 /* */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG__SIZE_2 10 /* */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_FID 7:0 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_FID_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID 23:8 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_REVERSED 24:24 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_REVERSED_NO 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_REVERSED_YES 0x00000001 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_AS_SDP_OVERRIDE_EN 25:25 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_AS_SDP_OVERRIDE_EN_NO 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_AS_SDP_OVERRIDE_EN_YES 0x00000001 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_HW_CHECKSUM 29:29 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_HW_CHECKSUM_NO 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_HW_CHECKSUM_YES 0x00000001 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_NEW 30:30 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_NEW_INIT 0x00000000 /* R-I-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_NEW_DONE 0x00000000 /* R---V */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_NEW_PENDING 0x00000001 /* R---T */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_NEW_TRIGGER 0x00000001 /* -W--T */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_MTD_STATE_CTRL 31:31 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_MTD_STATE_CTRL_ACT 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_MTD_STATE_CTRL_ARM 0x00000001 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_CTRL(i) (0x000E03F0-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_CTRL__SIZE_1 8 /* */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_CTRL_OFFSET 4:0 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_CTRL_OFFSET_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA(i) (0x000E03F4-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA__SIZE_1 8 /* */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_BYTE0 7:0 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_BYTE0_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_BYTE1 15:8 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_BYTE1_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_BYTE2 23:16 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_BYTE2_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_BYTE3 31:24 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_BYTE3_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_MISC_CTRL(i) (0x000E03F8-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_GENERIC_INFOFRAME_MISC_CTRL__SIZE_1 8 /* */ +#define NVC971_SF_GENERIC_INFOFRAME_MISC_CTRL_AUDIO_PRIORITY 1:1 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_MISC_CTRL_AUDIO_PRIORITY_HIGH 0x00000000 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_MISC_CTRL_AUDIO_PRIORITY_LOW 0x00000001 /* RWI-V */ + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif // _clc971_h_ diff --git a/src/common/sdk/nvidia/inc/class/clc973.h b/src/common/sdk/nvidia/inc/class/clc973.h new file mode 100644 index 0000000000..f770493e42 --- /dev/null +++ b/src/common/sdk/nvidia/inc/class/clc973.h @@ -0,0 +1,379 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc973_h_ +#define _clc973_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC973_DISP_CAPABILITIES 0xC973 + +#define NVC973_SYS_CAP 0x0 /* RW-4R */ +#define NVC973_SYS_CAP_HEAD0_EXISTS 0:0 /* RWIVF */ +#define NVC973_SYS_CAP_HEAD0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_HEAD0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_HEAD1_EXISTS 1:1 /* RWIVF */ +#define NVC973_SYS_CAP_HEAD1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_HEAD1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_HEAD2_EXISTS 2:2 /* RWIVF */ +#define NVC973_SYS_CAP_HEAD2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_HEAD2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_HEAD3_EXISTS 3:3 /* RWIVF */ +#define NVC973_SYS_CAP_HEAD3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_HEAD3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_HEAD4_EXISTS 4:4 /* RWIVF */ +#define NVC973_SYS_CAP_HEAD4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_HEAD4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_HEAD5_EXISTS 5:5 /* RWIVF */ +#define NVC973_SYS_CAP_HEAD5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_HEAD5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_HEAD6_EXISTS 6:6 /* RWIVF */ +#define NVC973_SYS_CAP_HEAD6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_HEAD6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_HEAD7_EXISTS 7:7 /* RWIVF */ +#define NVC973_SYS_CAP_HEAD7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_HEAD7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_HEAD_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVC973_SYS_CAP_HEAD_EXISTS__SIZE_1 8 /* */ +#define NVC973_SYS_CAP_HEAD_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_HEAD_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_SOR0_EXISTS 8:8 /* RWIVF */ +#define NVC973_SYS_CAP_SOR0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_SOR0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_SOR1_EXISTS 9:9 /* RWIVF */ +#define NVC973_SYS_CAP_SOR1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_SOR1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_SOR2_EXISTS 10:10 /* RWIVF */ +#define NVC973_SYS_CAP_SOR2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_SOR2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_SOR3_EXISTS 11:11 /* RWIVF */ +#define NVC973_SYS_CAP_SOR3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_SOR3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_SOR4_EXISTS 12:12 /* RWIVF */ +#define NVC973_SYS_CAP_SOR4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_SOR4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_SOR5_EXISTS 13:13 /* RWIVF */ +#define NVC973_SYS_CAP_SOR5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_SOR5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_SOR6_EXISTS 14:14 /* RWIVF */ +#define NVC973_SYS_CAP_SOR6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_SOR6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_SOR7_EXISTS 15:15 /* RWIVF */ +#define NVC973_SYS_CAP_SOR7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_SOR7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_SOR_EXISTS(i) (8+(i)):(8+(i)) /* RWIVF */ +#define NVC973_SYS_CAP_SOR_EXISTS__SIZE_1 8 /* */ +#define NVC973_SYS_CAP_SOR_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_SOR_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_DSI0_EXISTS 20:20 /* RWIVF */ +#define NVC973_SYS_CAP_DSI0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_DSI0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_DSI1_EXISTS 21:21 /* RWIVF */ +#define NVC973_SYS_CAP_DSI1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_DSI1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_DSI2_EXISTS 22:22 /* RWIVF */ +#define NVC973_SYS_CAP_DSI2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_DSI2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_DSI3_EXISTS 23:23 /* RWIVF */ +#define NVC973_SYS_CAP_DSI3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_DSI3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_DSI_EXISTS(i) (20+(i)):(20+(i)) /* RWIVF */ +#define NVC973_SYS_CAP_DSI_EXISTS__SIZE_1 4 /* */ +#define NVC973_SYS_CAP_DSI_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_DSI_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA 0x10 /* RW-4R */ +#define NVC973_IHUB_COMMON_CAPA_MEMPOOL_ENTRIES 15:0 /* RWIUF */ +#define NVC973_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH 17:16 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_32B 0x00000000 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_64B 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_128B 0x00000002 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_256B 0x00000003 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_ROTATION 18:18 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_ROTATION_FALSE 0x00000000 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_ROTATION_TRUE 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_PLANAR 19:19 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_PLANAR_FALSE 0x00000000 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_PLANAR_TRUE 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_VGA 20:20 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_VGA_FALSE 0x00000000 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_VGA_TRUE 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION 21:21 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION_FALSE 0x00000000 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION_TRUE 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_MSCG 22:22 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_MSCG_FALSE 0x00000000 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_MSCG_TRUE 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH 23:23 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH_FALSE 0x00000000 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH_TRUE 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_LATENCY_EVENT 26:26 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_LATENCY_EVENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_LATENCY_EVENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION 31:30 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_32B 0x00000000 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_64B 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_128B 0x00000002 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_256B 0x00000003 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPC 0x18 /* RW-4R */ +#define NVC973_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE 1:0 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_32B 0x00000000 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_64B 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_128B 0x00000002 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_256B 0x00000003 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED 6:4 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_NONE 0x00000000 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_TWO 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_FOUR 0x00000002 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_EIGHT 0x00000003 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_SIXTEEN 0x00000004 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR 11:11 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR_FALSE 0x00000000 /* RWI-V */ +#define NVC973_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR_TRUE 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP 12:12 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP_FALSE 0x00000000 /* RWI-V */ +#define NVC973_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA(i) (0x680+(i)*32) /* RW-4A */ +#define NVC973_POSTCOMP_HDR_CAPA__SIZE_1 8 /* */ +#define NVC973_POSTCOMP_HDR_CAPA_FULL_WIDTH 4:0 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPA_UNIT_WIDTH 9:5 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPA_OCSC0_PRESENT 16:16 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPA_OCSC0_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_OCSC0_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_OCSC1_PRESENT 17:17 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPA_OCSC1_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_OCSC1_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_SCLR_PRESENT 18:18 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPA_SCLR_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_SCLR_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_HCLPF_PRESENT 19:19 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPA_HCLPF_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_HCLPF_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_DTH_PRESENT 20:20 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPA_DTH_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_DTH_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_OSCAN_PRESENT 21:21 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPA_OSCAN_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_OSCAN_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_DSC_PRESENT 22:22 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPA_DSC_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_DSC_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_VFILTER_PRESENT 23:23 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPA_VFILTER_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_VFILTER_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPB(i) (0x684+(i)*32) /* RW-4A */ +#define NVC973_POSTCOMP_HDR_CAPB__SIZE_1 8 /* */ +#define NVC973_POSTCOMP_HDR_CAPB_VGA 0:0 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPB_VGA_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPB_VGA_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPB_OLUT_SZ 12:1 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPB_OLUT_LOGNR 15:13 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPB_OLUT_SFCLOAD 17:17 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPB_OLUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPB_OLUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPB_OLUT_DIRECT 18:18 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPB_OLUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPB_OLUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPC(i) (0x688+(i)*32) /* RW-4A */ +#define NVC973_POSTCOMP_HDR_CAPC__SIZE_1 8 /* */ +#define NVC973_POSTCOMP_HDR_CAPC_OCSC0_PRECISION 4:0 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPC_OCSC0_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPC_OCSC0_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPC_OCSC0_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPC_OCSC1_PRECISION 12:8 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPC_OCSC1_UNITY_CLAMP 13:13 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPC_OCSC1_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPC_OCSC1_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPC_SCLR_SF_PRECISION 20:16 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPC_SCLR_CI_PRECISION 24:21 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPC_SCLR_VS_EXT_RGB 25:25 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPC_SCLR_VS_EXT_RGB_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPC_SCLR_VS_EXT_RGB_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR 28:28 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR 30:30 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPD(i) (0x68c+(i)*32) /* RW-4A */ +#define NVC973_POSTCOMP_HDR_CAPD__SIZE_1 8 /* */ +#define NVC973_POSTCOMP_HDR_CAPD_VSCLR_MAX_PIXELS_2TAP 15:0 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPD_VSCLR_MAX_PIXELS_5TAP 31:16 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPE(i) (0x690+(i)*32) /* RW-4A */ +#define NVC973_POSTCOMP_HDR_CAPE__SIZE_1 8 /* */ +#define NVC973_POSTCOMP_HDR_CAPE_DSC_NATIVE422 16:16 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPE_DSC_NATIVE422_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPE_DSC_NATIVE422_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPE_DSC_NATIVE420 17:17 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPE_DSC_NATIVE420_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPE_DSC_NATIVE420_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPF(i) (0x694+(i)*32) /* RW-4A */ +#define NVC973_POSTCOMP_HDR_CAPF__SIZE_1 8 /* */ +#define NVC973_POSTCOMP_HDR_CAPF_VFILTER_MAX_PIXELS 15:0 /* RWIVF */ +#define NVC973_SOR_CAP(i) (0x144+(i)*8) /* RW-4A */ +#define NVC973_SOR_CAP__SIZE_1 8 /* */ +#define NVC973_SOR_CAP_SINGLE_LVDS_18 0:0 /* RWIVF */ +#define NVC973_SOR_CAP_SINGLE_LVDS_18_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_SINGLE_LVDS_18_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_SINGLE_LVDS_24 1:1 /* RWIVF */ +#define NVC973_SOR_CAP_SINGLE_LVDS_24_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_SINGLE_LVDS_24_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_DUAL_LVDS_18 2:2 /* RWIVF */ +#define NVC973_SOR_CAP_DUAL_LVDS_18_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_DUAL_LVDS_18_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_DUAL_LVDS_24 3:3 /* RWIVF */ +#define NVC973_SOR_CAP_DUAL_LVDS_24_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_DUAL_LVDS_24_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_SINGLE_TMDS_A 8:8 /* RWIVF */ +#define NVC973_SOR_CAP_SINGLE_TMDS_A_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_SINGLE_TMDS_A_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_SINGLE_TMDS_B 9:9 /* RWIVF */ +#define NVC973_SOR_CAP_SINGLE_TMDS_B_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_SINGLE_TMDS_B_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_DUAL_TMDS 11:11 /* RWIVF */ +#define NVC973_SOR_CAP_DUAL_TMDS_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_DUAL_TMDS_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_DISPLAY_OVER_PCIE 13:13 /* RWIVF */ +#define NVC973_SOR_CAP_DISPLAY_OVER_PCIE_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_DISPLAY_OVER_PCIE_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_SDI 16:16 /* RWIVF */ +#define NVC973_SOR_CAP_SDI_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_SDI_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_DP_A 24:24 /* RWIVF */ +#define NVC973_SOR_CAP_DP_A_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_DP_A_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_DP_B 25:25 /* RWIVF */ +#define NVC973_SOR_CAP_DP_B_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_DP_B_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_DP_INTERLACE 26:26 /* RWIVF */ +#define NVC973_SOR_CAP_DP_INTERLACE_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_DP_INTERLACE_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_DP_8_LANES 27:27 /* RWIVF */ +#define NVC973_SOR_CAP_DP_8_LANES_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_DP_8_LANES_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_HDMI_FRL 28:28 /* RWIVF */ +#define NVC973_SOR_CAP_HDMI_FRL_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_HDMI_FRL_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA(i) (0x780+(i)*32) /* RW-4A */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA__SIZE_1 32 /* */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_FULL_WIDTH 4:0 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_UNIT_WIDTH 9:5 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_ALPHA_WIDTH 13:10 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT 16:16 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT 17:17 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT 18:18 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT 19:19 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT 20:20 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT 21:21 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT 22:22 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT 23:23 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT 24:24 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPB(i) (0x784+(i)*32) /* RW-4A */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPB__SIZE_1 32 /* */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPB_FMT_PRECISION 4:0 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_LOGSZ 9:6 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_LOGNR 12:10 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD 14:14 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT 15:15 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC(i) (0x788+(i)*32) /* RW-4A */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC__SIZE_1 32 /* */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_PRECISION 4:0 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT 15:15 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_PRECISION 20:16 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP 21:21 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD(i) (0x78c+(i)*32) /* RW-4A */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD__SIZE_1 32 /* */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_LOGSZ 3:0 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_LOGNR 6:4 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD 8:8 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT 9:9 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_SF_PRECISION 16:12 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_CI_PRECISION 20:17 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB 21:21 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA 22:22 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR 28:28 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR 30:30 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE(i) (0x790+(i)*32) /* RW-4A */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE__SIZE_1 32 /* */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_PRECISION 4:0 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT 15:15 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_PRECISION 20:16 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP 21:21 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPF(i) (0x794+(i)*32) /* RW-4A */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPF__SIZE_1 32 /* */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPF_VSCLR_MAX_PIXELS_2TAP 15:0 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPF_VSCLR_MAX_PIXELS_5TAP 31:16 /* RWIVF */ + +#ifdef __cplusplus +}; +#endif /* extern C */ +#endif //_clc973_h_ diff --git a/src/common/sdk/nvidia/inc/class/clc97a.h b/src/common/sdk/nvidia/inc/class/clc97a.h new file mode 100644 index 0000000000..fd26c950ee --- /dev/null +++ b/src/common/sdk/nvidia/inc/class/clc97a.h @@ -0,0 +1,168 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc97a__h_ +#define _clc97a__h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC97A_CURSOR_IMM_CHANNEL_PIO (0x0000C97A) + +#define NVC97A_FREE (0x00000008) +#define NVC97A_FREE_COUNT 5:0 +#define NVC97A_UPDATE (0x00000200) +#define NVC97A_SET_INTERLOCK_FLAGS (0x00000204) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 0:0 +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 1:1 +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 2:2 +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 3:3 +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 4:4 +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 5:5 +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 6:6 +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 7:7 +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 16:16 +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVC97A_SET_CURSOR_HOT_SPOT_POINT_OUT(b) (0x00000208 + (b)*0x00000004) +#define NVC97A_SET_CURSOR_HOT_SPOT_POINT_OUT_X 15:0 +#define NVC97A_SET_CURSOR_HOT_SPOT_POINT_OUT_Y 31:16 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS (0x00000210) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clc97a_h diff --git a/src/common/sdk/nvidia/inc/class/clc97b.h b/src/common/sdk/nvidia/inc/class/clc97b.h new file mode 100644 index 0000000000..40c1e1096a --- /dev/null +++ b/src/common/sdk/nvidia/inc/class/clc97b.h @@ -0,0 +1,64 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc97b_h_ +#define _clc97b_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC97B_WINDOW_IMM_CHANNEL_DMA (0x0000C97B) + +// dma opcode instructions +#define NVC97B_DMA +#define NVC97B_DMA_OPCODE 31:29 +#define NVC97B_DMA_OPCODE_METHOD 0x00000000 +#define NVC97B_DMA_OPCODE_JUMP 0x00000001 +#define NVC97B_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVC97B_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVC97B_DMA_METHOD_COUNT 27:18 +#define NVC97B_DMA_METHOD_OFFSET 15:2 +#define NVC97B_DMA_DATA 31:0 +#define NVC97B_DMA_DATA_NOP 0x00000000 +#define NVC97B_DMA_JUMP_OFFSET 15:2 +#define NVC97B_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// class methods +#define NVC97B_PUT (0x00000000) +#define NVC97B_PUT_PTR 9:0 +#define NVC97B_GET (0x00000004) +#define NVC97B_GET_PTR 9:0 +#define NVC97B_UPDATE (0x00000200) +#define NVC97B_UPDATE_INTERLOCK_WITH_WINDOW 1:1 +#define NVC97B_UPDATE_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVC97B_UPDATE_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVC97B_SET_POINT_OUT(b) (0x00000208 + (b)*0x00000004) +#define NVC97B_SET_POINT_OUT_X 15:0 +#define NVC97B_SET_POINT_OUT_Y 31:16 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clc97b_h diff --git a/src/common/sdk/nvidia/inc/class/clc97d.h b/src/common/sdk/nvidia/inc/class/clc97d.h new file mode 100644 index 0000000000..990f20b3d6 --- /dev/null +++ b/src/common/sdk/nvidia/inc/class/clc97d.h @@ -0,0 +1,1373 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc97d_h_ +#define _clc97d_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC97D_CORE_CHANNEL_DMA (0x0000C97D) + +#define NV_DISP_NOTIFIER 0x00000000 +#define NV_DISP_NOTIFIER_SIZEOF 0x00000010 +#define NV_DISP_NOTIFIER__0 0x00000000 +#define NV_DISP_NOTIFIER__0_PRESENT_COUNT 7:0 +#define NV_DISP_NOTIFIER__0_FIELD 8:8 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE 9:9 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE_NON_TEARING 0x00000000 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE_IMMEDIATE 0x00000001 +#define NV_DISP_NOTIFIER__0_R1 15:10 +#define NV_DISP_NOTIFIER__0_R2 23:16 +#define NV_DISP_NOTIFIER__0_R3 29:24 +#define NV_DISP_NOTIFIER__0_STATUS 31:30 +#define NV_DISP_NOTIFIER__0_STATUS_NOT_BEGUN 0x00000000 +#define NV_DISP_NOTIFIER__0_STATUS_BEGUN 0x00000001 +#define NV_DISP_NOTIFIER__0_STATUS_FINISHED 0x00000002 +#define NV_DISP_NOTIFIER__1 0x00000001 +#define NV_DISP_NOTIFIER__1_R4 31:0 +#define NV_DISP_NOTIFIER__2 0x00000002 +#define NV_DISP_NOTIFIER__2_TIMESTAMP_LO 31:0 +#define NV_DISP_NOTIFIER__3 0x00000003 +#define NV_DISP_NOTIFIER__3_TIMESTAMP_HI 31:0 + + +// dma opcode instructions +#define NVC97D_DMA +#define NVC97D_DMA_OPCODE 31:29 +#define NVC97D_DMA_OPCODE_METHOD 0x00000000 +#define NVC97D_DMA_OPCODE_JUMP 0x00000001 +#define NVC97D_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVC97D_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVC97D_DMA_METHOD_COUNT 27:18 +#define NVC97D_DMA_METHOD_OFFSET 15:2 +#define NVC97D_DMA_DATA 31:0 +#define NVC97D_DMA_DATA_NOP 0x00000000 +#define NVC97D_DMA_JUMP_OFFSET 15:2 +#define NVC97D_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// if cap SUPPORT_FLEXIBLE_WIN_MAPPING is FALSE, this define can be used to obtain which head a window is mapped to +#define NVC37D_WINDOW_MAPPED_TO_HEAD(w) ((w)>>1) +#define NVC37D_GET_VALID_WINDOWMASK_FOR_HEAD(h) ((1<<((h)*2)) | (1<<((h)*2+1))) + + +// class methods +#define NVC97D_PUT (0x00000000) +#define NVC97D_PUT_PTR 9:0 +#define NVC97D_GET (0x00000004) +#define NVC97D_GET_PTR 9:0 +#define NVC97D_UPDATE (0x00000200) +#define NVC97D_UPDATE_SPECIAL_HANDLING 21:20 +#define NVC97D_UPDATE_SPECIAL_HANDLING_NONE (0x00000000) +#define NVC97D_UPDATE_SPECIAL_HANDLING_INTERRUPT_RM (0x00000001) +#define NVC97D_UPDATE_SPECIAL_HANDLING_MODE_SWITCH (0x00000002) +#define NVC97D_UPDATE_SPECIAL_HANDLING_REASON 19:12 +#define NVC97D_UPDATE_INHIBIT_INTERRUPTS 24:24 +#define NVC97D_UPDATE_INHIBIT_INTERRUPTS_FALSE (0x00000000) +#define NVC97D_UPDATE_INHIBIT_INTERRUPTS_TRUE (0x00000001) +#define NVC97D_UPDATE_RELEASE_ELV 0:0 +#define NVC97D_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVC97D_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVC97D_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC97D_SET_NOTIFIER_CONTROL (0x0000020C) +#define NVC97D_SET_NOTIFIER_CONTROL_MODE 0:0 +#define NVC97D_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000) +#define NVC97D_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001) +#define NVC97D_SET_NOTIFIER_CONTROL_NOTIFY 12:12 +#define NVC97D_SET_NOTIFIER_CONTROL_NOTIFY_DISABLE (0x00000000) +#define NVC97D_SET_NOTIFIER_CONTROL_NOTIFY_ENABLE (0x00000001) +#define NVC97D_SET_CONTROL (0x00000210) +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN(i) ((i)+0):((i)+0) +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN__SIZE_1 4 +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN_DISABLE (0x00000000) +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN_ENABLE (0x00000001) +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN0 0:0 +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN0_DISABLE (0x00000000) +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN0_ENABLE (0x00000001) +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN1 1:1 +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN1_DISABLE (0x00000000) +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN1_ENABLE (0x00000001) +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN2 2:2 +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN2_DISABLE (0x00000000) +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN2_ENABLE (0x00000001) +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN3 3:3 +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN3_DISABLE (0x00000000) +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN3_ENABLE (0x00000001) +#define NVC97D_SET_INTERLOCK_FLAGS (0x00000218) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR(i) ((i)+0):((i)+0) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR__SIZE_1 8 +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_DISABLE (0x00000000) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_ENABLE (0x00000001) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 0:0 +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 1:1 +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 2:2 +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 3:3 +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 4:4 +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 5:5 +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 6:6 +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 7:7 +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 16:16 +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS (0x0000021C) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW(i) ((i)+0):((i)+0) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW__SIZE_1 32 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) +#define NVC97D_GET_RG_SCAN_LINE(b) (0x00000220 + (b)*0x00000004) +#define NVC97D_GET_RG_SCAN_LINE_LINE 15:0 +#define NVC97D_GET_RG_SCAN_LINE_VBLANK 16:16 +#define NVC97D_GET_RG_SCAN_LINE_VBLANK_FALSE (0x00000000) +#define NVC97D_GET_RG_SCAN_LINE_VBLANK_TRUE (0x00000001) +#define NVC97D_SET_GET_BLANKING_CTRL(b) (0x00000240 + (b)*0x00000004) +#define NVC97D_SET_GET_BLANKING_CTRL_BLANK 0:0 +#define NVC97D_SET_GET_BLANKING_CTRL_BLANK_NO_CHANGE (0x00000000) +#define NVC97D_SET_GET_BLANKING_CTRL_BLANK_ENABLE (0x00000001) +#define NVC97D_SET_GET_BLANKING_CTRL_UNBLANK 1:1 +#define NVC97D_SET_GET_BLANKING_CTRL_UNBLANK_NO_CHANGE (0x00000000) +#define NVC97D_SET_GET_BLANKING_CTRL_UNBLANK_ENABLE (0x00000001) +#define NVC97D_SET_SURFACE_ADDRESS_HI_NOTIFIER (0x00000260) +#define NVC97D_SET_SURFACE_ADDRESS_HI_NOTIFIER_ADDRESS_HI 31:0 +#define NVC97D_SET_SURFACE_ADDRESS_LO_NOTIFIER (0x00000264) +#define NVC97D_SET_SURFACE_ADDRESS_LO_NOTIFIER_ADDRESS_LO 31:4 +#define NVC97D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET 3:2 +#define NVC97D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_IOVA (0x00000000) +#define NVC97D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_NVM (0x00000001) +#define NVC97D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_PCI (0x00000002) +#define NVC97D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVC97D_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE 0:0 +#define NVC97D_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE_DISABLE (0x00000000) +#define NVC97D_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE_ENABLE (0x00000001) + +#define NVC97D_SOR_SET_CONTROL(a) (0x00000300 + (a)*0x00000020) +#define NVC97D_SOR_SET_CONTROL_OWNER_MASK 7:0 +#define NVC97D_SOR_SET_CONTROL_OWNER_MASK_NONE (0x00000000) +#define NVC97D_SOR_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001) +#define NVC97D_SOR_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002) +#define NVC97D_SOR_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004) +#define NVC97D_SOR_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008) +#define NVC97D_SOR_SET_CONTROL_OWNER_MASK_HEAD4 (0x00000010) +#define NVC97D_SOR_SET_CONTROL_OWNER_MASK_HEAD5 (0x00000020) +#define NVC97D_SOR_SET_CONTROL_OWNER_MASK_HEAD6 (0x00000040) +#define NVC97D_SOR_SET_CONTROL_OWNER_MASK_HEAD7 (0x00000080) +#define NVC97D_SOR_SET_CONTROL_PROTOCOL 11:8 +#define NVC97D_SOR_SET_CONTROL_PROTOCOL_LVDS_CUSTOM (0x00000000) +#define NVC97D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_A (0x00000001) +#define NVC97D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_B (0x00000002) +#define NVC97D_SOR_SET_CONTROL_PROTOCOL_DUAL_TMDS (0x00000005) +#define NVC97D_SOR_SET_CONTROL_PROTOCOL_DP_A (0x00000008) +#define NVC97D_SOR_SET_CONTROL_PROTOCOL_DP_B (0x00000009) +#define NVC97D_SOR_SET_CONTROL_PROTOCOL_HDMI_FRL (0x0000000C) +#define NVC97D_SOR_SET_CONTROL_PROTOCOL_CUSTOM (0x0000000F) +#define NVC97D_SOR_SET_CONTROL_DE_SYNC_POLARITY 16:16 +#define NVC97D_SOR_SET_CONTROL_DE_SYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVC97D_SOR_SET_CONTROL_DE_SYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC97D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE 21:20 +#define NVC97D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_OFF (0x00000000) +#define NVC97D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X2 (0x00000001) +#define NVC97D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X4 (0x00000002) +#define NVC97D_SOR_SET_CUSTOM_REASON(a) (0x00000304 + (a)*0x00000020) +#define NVC97D_SOR_SET_CUSTOM_REASON_CODE 31:0 +#define NVC97D_SOR_SET_SW_SPARE_A(a) (0x00000308 + (a)*0x00000020) +#define NVC97D_SOR_SET_SW_SPARE_A_CODE 31:0 +#define NVC97D_SOR_SET_SW_SPARE_B(a) (0x0000030C + (a)*0x00000020) +#define NVC97D_SOR_SET_SW_SPARE_B_CODE 31:0 + +#define NVC97D_DSI_SET_CONTROL(a) (0x00000500 + (a)*0x00000020) +#define NVC97D_DSI_SET_CONTROL_OWNER_MASK 7:0 +#define NVC97D_DSI_SET_CONTROL_OWNER_MASK_NONE (0x00000000) +#define NVC97D_DSI_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001) +#define NVC97D_DSI_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002) +#define NVC97D_DSI_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004) +#define NVC97D_DSI_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008) +#define NVC97D_DSI_SET_CONTROL_OWNER_MASK_HEAD4 (0x00000010) +#define NVC97D_DSI_SET_CONTROL_OWNER_MASK_HEAD5 (0x00000020) +#define NVC97D_DSI_SET_CONTROL_OWNER_MASK_HEAD6 (0x00000040) +#define NVC97D_DSI_SET_CONTROL_OWNER_MASK_HEAD7 (0x00000080) +#define NVC97D_DSI_SET_CUSTOM_REASON(a) (0x00000504 + (a)*0x00000020) +#define NVC97D_DSI_SET_CUSTOM_REASON_CODE 31:0 +#define NVC97D_DSI_SET_SW_SPARE_A(a) (0x00000508 + (a)*0x00000020) +#define NVC97D_DSI_SET_SW_SPARE_A_CODE 31:0 +#define NVC97D_DSI_SET_SW_SPARE_B(a) (0x0000050C + (a)*0x00000020) +#define NVC97D_DSI_SET_SW_SPARE_B_CODE 31:0 + +#define NVC97D_WINDOW_SET_CONTROL(a) (0x00001000 + (a)*0x00000080) +#define NVC97D_WINDOW_SET_CONTROL_OWNER 3:0 +#define NVC97D_WINDOW_SET_CONTROL_OWNER_HEAD(i) (0x00000000 +(i)) +#define NVC97D_WINDOW_SET_CONTROL_OWNER_HEAD__SIZE_1 8 +#define NVC97D_WINDOW_SET_CONTROL_OWNER_HEAD0 (0x00000000) +#define NVC97D_WINDOW_SET_CONTROL_OWNER_HEAD1 (0x00000001) +#define NVC97D_WINDOW_SET_CONTROL_OWNER_HEAD2 (0x00000002) +#define NVC97D_WINDOW_SET_CONTROL_OWNER_HEAD3 (0x00000003) +#define NVC97D_WINDOW_SET_CONTROL_OWNER_HEAD4 (0x00000004) +#define NVC97D_WINDOW_SET_CONTROL_OWNER_HEAD5 (0x00000005) +#define NVC97D_WINDOW_SET_CONTROL_OWNER_HEAD6 (0x00000006) +#define NVC97D_WINDOW_SET_CONTROL_OWNER_HEAD7 (0x00000007) +#define NVC97D_WINDOW_SET_CONTROL_OWNER_NONE (0x0000000F) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS(a) (0x00001004 + (a)*0x00000080) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP 1:1 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP 2:2 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP 3:3 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422 4:4 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420 5:5 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444 6:6 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420 7:7 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422 8:8 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R 9:9 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444 10:10 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420 11:11 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444 12:12 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420 13:13 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422 14:14 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R 15:15 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444 16:16 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS(a) (0x00001008 + (a)*0x00000080) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP 1:1 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP 2:2 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP 3:3 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422 4:4 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420 5:5 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444 6:6 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420 7:7 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422 8:8 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R 9:9 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444 10:10 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420 11:11 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444 12:12 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420 13:13 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422 14:14 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R 15:15 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444 16:16 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR(a) (0x0000100C + (a)*0x00000080) +#define NVC97D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR_HORIZONTAL 15:0 +#define NVC97D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR_VERTICAL 31:16 +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS(a) (0x00001010 + (a)*0x00000080) +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_MAX_PIXELS_FETCHED_PER_LINE 14:0 +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED 16:16 +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED 28:28 +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS 22:20 +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS_TAPS_2 (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS_TAPS_5 (0x00000004) +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED 24:24 +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED 30:30 +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED_TRUE (0x00000001) + +#define NVC97D_HEAD_SET_PROCAMP(a) (0x00002000 + (a)*0x00000800) +#define NVC97D_HEAD_SET_PROCAMP_COLOR_SPACE 1:0 +#define NVC97D_HEAD_SET_PROCAMP_COLOR_SPACE_RGB (0x00000000) +#define NVC97D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_601 (0x00000001) +#define NVC97D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_709 (0x00000002) +#define NVC97D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_2020 (0x00000003) +#define NVC97D_HEAD_SET_PROCAMP_CHROMA_LPF 3:3 +#define NVC97D_HEAD_SET_PROCAMP_CHROMA_LPF_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_PROCAMP_CHROMA_LPF_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_PROCAMP_CHROMA_DOWN_V 4:4 +#define NVC97D_HEAD_SET_PROCAMP_CHROMA_DOWN_V_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_PROCAMP_CHROMA_DOWN_V_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_PROCAMP_DYNAMIC_RANGE 28:28 +#define NVC97D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_VESA (0x00000000) +#define NVC97D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_CEA (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE(a) (0x00002004 + (a)*0x00000800) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE 1:0 +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_ACTIVE_RASTER (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_COMPLETE_RASTER (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_NON_ACTIVE_RASTER (0x00000002) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY 2:2 +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY 3:3 +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH 7:4 +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_16_422 (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_18_444 (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_20_422 (0x00000002) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_422 (0x00000003) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_444 (0x00000004) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_30_444 (0x00000005) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_32_422 (0x00000006) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_36_444 (0x00000007) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_48_444 (0x00000008) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_16_444 (0x00000009) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_18_444NP (0x0000000A) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE 24:24 +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_FLAG 23:12 +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN 31:26 +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN0 (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN1 (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN2 (0x00000002) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN3 (0x00000003) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN4 (0x00000004) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN5 (0x00000005) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN6 (0x00000006) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN7 (0x00000007) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN8 (0x00000008) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN9 (0x00000009) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN10 (0x0000000A) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN11 (0x0000000B) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN12 (0x0000000C) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN13 (0x0000000D) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN14 (0x0000000E) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN15 (0x0000000F) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN16 (0x00000010) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN17 (0x00000011) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN18 (0x00000012) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN19 (0x00000013) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN20 (0x00000014) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN21 (0x00000015) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN22 (0x00000016) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN23 (0x00000017) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN24 (0x00000018) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN25 (0x00000019) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN26 (0x0000001A) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN27 (0x0000001B) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN28 (0x0000001C) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN29 (0x0000001D) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN30 (0x0000001E) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN31 (0x0000001F) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_NONE (0x0000003F) +#define NVC97D_HEAD_SET_CONTROL(a) (0x00002008 + (a)*0x00000800) +#define NVC97D_HEAD_SET_CONTROL_STRUCTURE 1:0 +#define NVC97D_HEAD_SET_CONTROL_STRUCTURE_PROGRESSIVE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE 2:2 +#define NVC97D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE_NORMAL (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE_FRAME_PACKED (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_YUV420PACKER 3:3 +#define NVC97D_HEAD_SET_CONTROL_YUV420PACKER_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_YUV420PACKER_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE 11:10 +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_NO_LOCK (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_FRAME_LOCK (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_RASTER_LOCK (0x00000003) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN 8:4 +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCKOUT_WINDOW 15:12 +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_MODE 23:22 +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_NO_LOCK (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_FRAME_LOCK (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_RASTER_LOCK (0x00000003) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN 20:16 +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN 28:24 +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN__SIZE_1 16 +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_0 (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_1 (0x00000002) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_2 (0x00000003) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_3 (0x00000004) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_4 (0x00000005) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_5 (0x00000006) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_6 (0x00000007) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_7 (0x00000008) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_8 (0x00000009) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_A (0x0000000B) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_B (0x0000000C) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_C (0x0000000D) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_D (0x0000000E) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_E (0x0000000F) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_F (0x00000010) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE 30:30 +#define NVC97D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE 31:31 +#define NVC97D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY(a) (0x0000200C + (a)*0x00000800) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HERTZ 30:0 +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001 31:31 +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_FALSE (0x00000000) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_TRUE (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_SCALER(a) (0x00002014 + (a)*0x00000800) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS 2:0 +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_2 (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_5 (0x00000004) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS 6:4 +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_2 (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_5 (0x00000004) +#define NVC97D_HEAD_SET_DITHER_CONTROL(a) (0x00002018 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DITHER_CONTROL_ENABLE 0:0 +#define NVC97D_HEAD_SET_DITHER_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_DITHER_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_DITHER_CONTROL_BITS 5:4 +#define NVC97D_HEAD_SET_DITHER_CONTROL_BITS_TO_6_BITS (0x00000000) +#define NVC97D_HEAD_SET_DITHER_CONTROL_BITS_TO_8_BITS (0x00000001) +#define NVC97D_HEAD_SET_DITHER_CONTROL_BITS_TO_10_BITS (0x00000002) +#define NVC97D_HEAD_SET_DITHER_CONTROL_BITS_TO_12_BITS (0x00000003) +#define NVC97D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE 2:2 +#define NVC97D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_DITHER_CONTROL_MODE 10:8 +#define NVC97D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_ERR_ACC (0x00000000) +#define NVC97D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_ERR_ACC (0x00000001) +#define NVC97D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_2X2 (0x00000002) +#define NVC97D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_2X2 (0x00000003) +#define NVC97D_HEAD_SET_DITHER_CONTROL_MODE_TEMPORAL (0x00000004) +#define NVC97D_HEAD_SET_DITHER_CONTROL_MODE_ROUND (0x00000005) +#define NVC97D_HEAD_SET_DITHER_CONTROL_PHASE 13:12 +#define NVC97D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION(a) (0x0000201C + (a)*0x00000800) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER 0:0 +#define NVC97D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_FALSE (0x00000000) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_TRUE (0x00000001) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING 4:4 +#define NVC97D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE 9:8 +#define NVC97D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_VBLANK (0x00000000) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_HBLANK (0x00000001) +#define NVC97D_HEAD_SET_DISPLAY_ID(a,b) (0x00002020 + (a)*0x00000800 + (b)*0x00000004) +#define NVC97D_HEAD_SET_DISPLAY_ID_CODE 31:0 +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX(a) (0x00002028 + (a)*0x00000800) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_HERTZ 30:0 +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001 31:31 +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_FALSE (0x00000000) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_TRUE (0x00000001) +#define NVC97D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR(a) (0x0000202C + (a)*0x00000800) +#define NVC97D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR_HORIZONTAL 15:0 +#define NVC97D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR_VERTICAL 31:16 +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS(a) (0x00002030 + (a)*0x00000800) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR 2:0 +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_NONE (0x00000000) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W32_H32 (0x00000001) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W64_H64 (0x00000002) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W128_H128 (0x00000003) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W256_H256 (0x00000004) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED 4:4 +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED_FALSE (0x00000000) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED_TRUE (0x00000001) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS 14:12 +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS_TAPS_2 (0x00000001) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS_TAPS_5 (0x00000004) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED 8:8 +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED_FALSE (0x00000000) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED_TRUE (0x00000001) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED 16:16 +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED_FALSE (0x00000000) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED_TRUE (0x00000001) +#define NVC97D_HEAD_SET_STALL_LOCK(a) (0x00002034 + (a)*0x00000800) +#define NVC97D_HEAD_SET_STALL_LOCK_ENABLE 0:0 +#define NVC97D_HEAD_SET_STALL_LOCK_ENABLE_FALSE (0x00000000) +#define NVC97D_HEAD_SET_STALL_LOCK_ENABLE_TRUE (0x00000001) +#define NVC97D_HEAD_SET_STALL_LOCK_MODE 2:2 +#define NVC97D_HEAD_SET_STALL_LOCK_MODE_CONTINUOUS (0x00000000) +#define NVC97D_HEAD_SET_STALL_LOCK_MODE_ONE_SHOT (0x00000001) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN 8:4 +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC97D_HEAD_SET_STALL_LOCK_UNSTALL_MODE 12:12 +#define NVC97D_HEAD_SET_STALL_LOCK_UNSTALL_MODE_CRASH_LOCK (0x00000000) +#define NVC97D_HEAD_SET_STALL_LOCK_UNSTALL_MODE_LINE_LOCK (0x00000001) +#define NVC97D_HEAD_SET_STALL_LOCK_TEPOLARITY 14:14 +#define NVC97D_HEAD_SET_STALL_LOCK_TEPOLARITY_POSITIVE_TRUE (0x00000000) +#define NVC97D_HEAD_SET_STALL_LOCK_TEPOLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC97D_HEAD_SET_STALL_LOCK_UNSTALL_SYNC_ADVANCE 25:16 +#define NVC97D_HEAD_SET_LOCK_CHAIN(a) (0x00002044 + (a)*0x00000800) +#define NVC97D_HEAD_SET_LOCK_CHAIN_POSITION 3:0 +#define NVC97D_HEAD_SET_VIEWPORT_POINT_IN(a) (0x00002048 + (a)*0x00000800) +#define NVC97D_HEAD_SET_VIEWPORT_POINT_IN_X 14:0 +#define NVC97D_HEAD_SET_VIEWPORT_POINT_IN_Y 30:16 +#define NVC97D_HEAD_SET_VIEWPORT_SIZE_IN(a) (0x0000204C + (a)*0x00000800) +#define NVC97D_HEAD_SET_VIEWPORT_SIZE_IN_WIDTH 14:0 +#define NVC97D_HEAD_SET_VIEWPORT_SIZE_IN_HEIGHT 30:16 +#define NVC97D_HEAD_SET_VIEWPORT_SIZE_OUT(a) (0x00002058 + (a)*0x00000800) +#define NVC97D_HEAD_SET_VIEWPORT_SIZE_OUT_WIDTH 14:0 +#define NVC97D_HEAD_SET_VIEWPORT_SIZE_OUT_HEIGHT 30:16 +#define NVC97D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST(a) (0x0000205C + (a)*0x00000800) +#define NVC97D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_X 15:0 +#define NVC97D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_Y 31:16 +#define NVC97D_HEAD_SET_RASTER_SIZE(a) (0x00002064 + (a)*0x00000800) +#define NVC97D_HEAD_SET_RASTER_SIZE_WIDTH 15:0 +#define NVC97D_HEAD_SET_RASTER_SIZE_HEIGHT 31:16 +#define NVC97D_HEAD_SET_RASTER_SYNC_END(a) (0x00002068 + (a)*0x00000800) +#define NVC97D_HEAD_SET_RASTER_SYNC_END_X 14:0 +#define NVC97D_HEAD_SET_RASTER_SYNC_END_Y 30:16 +#define NVC97D_HEAD_SET_RASTER_BLANK_END(a) (0x0000206C + (a)*0x00000800) +#define NVC97D_HEAD_SET_RASTER_BLANK_END_X 14:0 +#define NVC97D_HEAD_SET_RASTER_BLANK_END_Y 30:16 +#define NVC97D_HEAD_SET_RASTER_BLANK_START(a) (0x00002070 + (a)*0x00000800) +#define NVC97D_HEAD_SET_RASTER_BLANK_START_X 14:0 +#define NVC97D_HEAD_SET_RASTER_BLANK_START_Y 30:16 +#define NVC97D_HEAD_SET_OVERSCAN_COLOR(a) (0x00002078 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OVERSCAN_COLOR_RED_CR 9:0 +#define NVC97D_HEAD_SET_OVERSCAN_COLOR_GREEN_Y 19:10 +#define NVC97D_HEAD_SET_OVERSCAN_COLOR_BLUE_CB 29:20 +#define NVC97D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR(a) (0x0000207C + (a)*0x00000800) +#define NVC97D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_RED_CR 9:0 +#define NVC97D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_GREEN_Y 19:10 +#define NVC97D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_BLUE_CB 29:20 +#define NVC97D_HEAD_SET_HDMI_CTRL(a) (0x00002080 + (a)*0x00000800) +#define NVC97D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT 2:0 +#define NVC97D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_NORMAL (0x00000000) +#define NVC97D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_EXTENDED (0x00000001) +#define NVC97D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_STEREO3D (0x00000002) +#define NVC97D_HEAD_SET_HDMI_CTRL_HDMI_VIC 11:4 +#define NVC97D_HEAD_SET_PRESENT_CONTROL_CURSOR(a) (0x00002098 + (a)*0x00000800) +#define NVC97D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE 0:0 +#define NVC97D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_MONO (0x00000000) +#define NVC97D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_STEREO (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_CURSOR(a) (0x0000209C + (a)*0x00000800) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_ENABLE 31:31 +#define NVC97D_HEAD_SET_CONTROL_CURSOR_ENABLE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_ENABLE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_FORMAT 7:0 +#define NVC97D_HEAD_SET_CONTROL_CURSOR_FORMAT_A1R5G5B5 (0x000000E9) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_FORMAT_A8R8G8B8 (0x000000CF) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_SIZE 9:8 +#define NVC97D_HEAD_SET_CONTROL_CURSOR_SIZE_W32_H32 (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_SIZE_W64_H64 (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_SIZE_W128_H128 (0x00000002) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_SIZE_W256_H256 (0x00000003) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_X 19:12 +#define NVC97D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_Y 27:20 +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION(a) (0x000020A0 + (a)*0x00000800) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_K1 7:0 +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT 11:8 +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT_K1 (0x00000002) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT_K1_TIMES_SRC (0x00000005) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT 15:12 +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_ZERO (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_K1 (0x00000002) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE 16:16 +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE_BLEND (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE_XOR (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS 20:20 +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_HI_RG_REL_SEMAPHORE(a,b) (0x00002110 + (a)*0x00000800 + (b)*0x00000004) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_HI_RG_REL_SEMAPHORE_ADDRESS_HI 31:0 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE(a,b) (0x00002130 + (a)*0x00000800 + (b)*0x00000004) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_ADDRESS_LO 31:4 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET 3:2 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET_IOVA (0x00000000) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET_PHYSICAL_NVM (0x00000001) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET_PHYSICAL_PCI (0x00000002) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_ENABLE 0:0 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_ENABLE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_ENABLE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_HI_CRC(a) (0x00002150 + (a)*0x00000800) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_HI_CRC_ADDRESS_HI 31:0 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CRC(a) (0x00002154 + (a)*0x00000800) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_ADDRESS_LO 31:4 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET 3:2 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET_IOVA (0x00000000) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET_PHYSICAL_NVM (0x00000001) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET_PHYSICAL_PCI (0x00000002) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_ENABLE 0:0 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_ENABLE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_ENABLE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_HI_OLUT(a) (0x00002158 + (a)*0x00000800) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_HI_OLUT_ADDRESS_HI 31:0 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT(a) (0x0000215C + (a)*0x00000800) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_ADDRESS_LO 31:4 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET 3:2 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET_IOVA (0x00000000) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET_PHYSICAL_NVM (0x00000001) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET_PHYSICAL_PCI (0x00000002) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_ENABLE 0:0 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_ENABLE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_ENABLE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_HI_CURSOR(a,b) (0x00002170 + (a)*0x00000800 + (b)*0x00000004) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_HI_CURSOR_ADDRESS_HI 31:0 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR(a,b) (0x00002178 + (a)*0x00000800 + (b)*0x00000004) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_ADDRESS_LO 31:4 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET 3:2 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET_IOVA (0x00000000) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET_PHYSICAL_NVM (0x00000001) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET_PHYSICAL_PCI (0x00000002) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_KIND 1:1 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_KIND_PITCH (0x00000000) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_KIND_BLOCKLINEAR (0x00000001) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_ENABLE 0:0 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_ENABLE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_ENABLE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_CRC_CONTROL(a) (0x00002184 + (a)*0x00000800) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL 5:0 +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_0 (0x00000000) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_1 (0x00000001) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_2 (0x00000002) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_3 (0x00000003) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_4 (0x00000004) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_5 (0x00000005) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_6 (0x00000006) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_7 (0x00000007) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_8 (0x00000008) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_9 (0x00000009) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_10 (0x0000000A) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_11 (0x0000000B) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_12 (0x0000000C) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_13 (0x0000000D) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_14 (0x0000000E) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_15 (0x0000000F) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_16 (0x00000010) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_17 (0x00000011) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_18 (0x00000012) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_19 (0x00000013) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_20 (0x00000014) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_21 (0x00000015) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_22 (0x00000016) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_23 (0x00000017) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_24 (0x00000018) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_25 (0x00000019) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_26 (0x0000001A) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_27 (0x0000001B) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_28 (0x0000001C) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_29 (0x0000001D) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_30 (0x0000001E) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_31 (0x0000001F) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_CORE (0x00000020) +#define NVC97D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE 8:8 +#define NVC97D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_FALSE (0x00000000) +#define NVC97D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_TRUE (0x00000001) +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC 19:12 +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_NONE (0x00000000) +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SF (0x00000030) +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR(i) (0x00000050 +(i)) +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR__SIZE_1 8 +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR0 (0x00000050) +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR1 (0x00000051) +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR2 (0x00000052) +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR3 (0x00000053) +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR4 (0x00000054) +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR5 (0x00000055) +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR6 (0x00000056) +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR7 (0x00000057) +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC 27:20 +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_NONE (0x00000000) +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SF (0x00000030) +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR(i) (0x00000050 +(i)) +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR__SIZE_1 8 +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR0 (0x00000050) +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR1 (0x00000051) +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR2 (0x00000052) +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR3 (0x00000053) +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR4 (0x00000054) +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR5 (0x00000055) +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR6 (0x00000056) +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR7 (0x00000057) +#define NVC97D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE 9:9 +#define NVC97D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_PRESENT_CONTROL(a) (0x0000218C + (a)*0x00000800) +#define NVC97D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD 0:0 +#define NVC97D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_PRESENT_CONTROL_BEGIN_FIELD 6:4 +#define NVC97D_HEAD_SET_SW_SPARE_A(a) (0x00002194 + (a)*0x00000800) +#define NVC97D_HEAD_SET_SW_SPARE_A_CODE 31:0 +#define NVC97D_HEAD_SET_SW_SPARE_B(a) (0x00002198 + (a)*0x00000800) +#define NVC97D_HEAD_SET_SW_SPARE_B_CODE 31:0 +#define NVC97D_HEAD_SET_SW_SPARE_C(a) (0x0000219C + (a)*0x00000800) +#define NVC97D_HEAD_SET_SW_SPARE_C_CODE 31:0 +#define NVC97D_HEAD_SET_SW_SPARE_D(a) (0x000021A0 + (a)*0x00000800) +#define NVC97D_HEAD_SET_SW_SPARE_D_CODE 31:0 +#define NVC97D_HEAD_SET_DISPLAY_RATE(a) (0x000021A8 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DISPLAY_RATE_RUN_MODE 1:0 +#define NVC97D_HEAD_SET_DISPLAY_RATE_RUN_MODE_CONTINUOUS (0x00000000) +#define NVC97D_HEAD_SET_DISPLAY_RATE_RUN_MODE_ONE_SHOT (0x00000001) +#define NVC97D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_INTERVAL 25:4 +#define NVC97D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH 2:2 +#define NVC97D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL(a,b) (0x000021CC + (a)*0x00000800 + (b)*0x00000004) +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE 15:15 +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_32BIT (0x00000000) +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_64BIT (0x00000001) +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE 14:14 +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE_WRITE (0x00000000) +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE_WRITE_AWAKEN (0x00000001) +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE 10:10 +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE_ONE_TIME (0x00000000) +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE_CONTINUOUS (0x00000001) +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RASTER_LINE 31:16 +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_VALUE(a,b) (0x000021EC + (a)*0x00000800 + (b)*0x00000004) +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_VALUE 31:0 +#define NVC97D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE(a) (0x00002214 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE_DATA 9:0 +#define NVC97D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE_INDEX 19:12 +#define NVC97D_HEAD_SET_MIN_FRAME_IDLE(a) (0x00002218 + (a)*0x00000800) +#define NVC97D_HEAD_SET_MIN_FRAME_IDLE_LEADING_RASTER_LINES 14:0 +#define NVC97D_HEAD_SET_MIN_FRAME_IDLE_TRAILING_RASTER_LINES 30:16 +#define NVC97D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED(a) (0x00002220 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED_ALPHA 7:0 +#define NVC97D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED_RED 31:16 +#define NVC97D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE(a) (0x00002224 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE_GREEN 15:0 +#define NVC97D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE_BLUE 31:16 +#define NVC97D_HEAD_SET_CURSOR_COLOR_NORM_SCALE(a) (0x00002228 + (a)*0x00000800) +#define NVC97D_HEAD_SET_CURSOR_COLOR_NORM_SCALE_VALUE 15:0 +#define NVC97D_HEAD_SET_XOR_BLEND_FACTOR(a) (0x0000222C + (a)*0x00000800) +#define NVC97D_HEAD_SET_XOR_BLEND_FACTOR_LOG2PEAK_LUMINANCE 3:0 +#define NVC97D_HEAD_SET_XOR_BLEND_FACTOR_S1 16:4 +#define NVC97D_HEAD_SET_XOR_BLEND_FACTOR_S2 30:18 +#define NVC97D_HEAD_SET_CLAMP_RANGE_GREEN(a) (0x00002238 + (a)*0x00000800) +#define NVC97D_HEAD_SET_CLAMP_RANGE_GREEN_LOW 11:0 +#define NVC97D_HEAD_SET_CLAMP_RANGE_GREEN_HIGH 27:16 +#define NVC97D_HEAD_SET_CLAMP_RANGE_RED_BLUE(a) (0x0000223C + (a)*0x00000800) +#define NVC97D_HEAD_SET_CLAMP_RANGE_RED_BLUE_LOW 11:0 +#define NVC97D_HEAD_SET_CLAMP_RANGE_RED_BLUE_HIGH 27:16 +#define NVC97D_HEAD_SET_OCSC0CONTROL(a) (0x00002240 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0CONTROL_ENABLE 0:0 +#define NVC97D_HEAD_SET_OCSC0CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_OCSC0CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C00(a) (0x00002244 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C00_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C01(a) (0x00002248 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C01_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C02(a) (0x0000224C + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C02_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C03(a) (0x00002250 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C03_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C10(a) (0x00002254 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C10_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C11(a) (0x00002258 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C11_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C12(a) (0x0000225C + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C12_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C13(a) (0x00002260 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C13_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C20(a) (0x00002264 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C20_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C21(a) (0x00002268 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C21_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C22(a) (0x0000226C + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C22_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C23(a) (0x00002270 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C23_VALUE 20:0 +#define NVC97D_HEAD_SET_OLUT_CONTROL(a) (0x00002280 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OLUT_CONTROL_INTERPOLATE 0:0 +#define NVC97D_HEAD_SET_OLUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_OLUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_OLUT_CONTROL_MIRROR 1:1 +#define NVC97D_HEAD_SET_OLUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_OLUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_OLUT_CONTROL_MODE 3:2 +#define NVC97D_HEAD_SET_OLUT_CONTROL_MODE_SEGMENTED (0x00000000) +#define NVC97D_HEAD_SET_OLUT_CONTROL_MODE_DIRECT8 (0x00000001) +#define NVC97D_HEAD_SET_OLUT_CONTROL_MODE_DIRECT10 (0x00000002) +#define NVC97D_HEAD_SET_OLUT_CONTROL_SIZE 18:8 +#define NVC97D_HEAD_SET_OLUT_FP_NORM_SCALE(a) (0x00002284 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OLUT_FP_NORM_SCALE_VALUE 31:0 +#define NVC97D_HEAD_SET_OCSC1CONTROL(a) (0x0000229C + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1CONTROL_ENABLE 0:0 +#define NVC97D_HEAD_SET_OCSC1CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_OCSC1CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C00(a) (0x000022A0 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C00_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C01(a) (0x000022A4 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C01_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C02(a) (0x000022A8 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C02_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C03(a) (0x000022AC + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C03_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C10(a) (0x000022B0 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C10_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C11(a) (0x000022B4 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C11_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C12(a) (0x000022B8 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C12_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C13(a) (0x000022BC + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C13_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C20(a) (0x000022C0 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C20_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C21(a) (0x000022C4 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C21_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C22(a) (0x000022C8 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C22_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C23(a) (0x000022CC + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C23_VALUE 20:0 +#define NVC97D_HEAD_SET_HEAD_POSITION(a) (0x000022D0 + (a)*0x00000800) +#define NVC97D_HEAD_SET_HEAD_POSITION_X 2:0 +#define NVC97D_HEAD_SET_HEAD_POSITION_Y 6:4 +#define NVC97D_HEAD_SET_DSC_CONTROL(a) (0x000022D4 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_CONTROL_ENABLE 0:0 +#define NVC97D_HEAD_SET_DSC_CONTROL_ENABLE_FALSE (0x00000000) +#define NVC97D_HEAD_SET_DSC_CONTROL_ENABLE_TRUE (0x00000001) +#define NVC97D_HEAD_SET_DSC_CONTROL_AUTO_RESET 3:3 +#define NVC97D_HEAD_SET_DSC_CONTROL_AUTO_RESET_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_DSC_CONTROL_AUTO_RESET_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION 4:4 +#define NVC97D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET 5:5 +#define NVC97D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET_FALSE (0x00000000) +#define NVC97D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET_TRUE (0x00000001) +#define NVC97D_HEAD_SET_DSC_CONTROL_FLATNESS_DET_THRESH 15:6 +#define NVC97D_HEAD_SET_DSC_PPS_CONTROL(a) (0x000022D8 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_CONTROL_ENABLE 0:0 +#define NVC97D_HEAD_SET_DSC_PPS_CONTROL_ENABLE_FALSE (0x00000000) +#define NVC97D_HEAD_SET_DSC_PPS_CONTROL_ENABLE_TRUE (0x00000001) +#define NVC97D_HEAD_SET_DSC_PPS_CONTROL_LOCATION 2:1 +#define NVC97D_HEAD_SET_DSC_PPS_CONTROL_LOCATION_VBLANK (0x00000000) +#define NVC97D_HEAD_SET_DSC_PPS_CONTROL_LOCATION_VSYNC (0x00000001) +#define NVC97D_HEAD_SET_DSC_PPS_CONTROL_SIZE 10:3 +#define NVC97D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY 11:11 +#define NVC97D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY_EVERY_FRAME (0x00000000) +#define NVC97D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY_ONCE (0x00000001) +#define NVC97D_HEAD_SET_DSC_PPS_HEAD(a) (0x000022DC + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_HEAD_BYTE0 7:0 +#define NVC97D_HEAD_SET_DSC_PPS_HEAD_BYTE1 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_HEAD_BYTE2 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_HEAD_BYTE3 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA0(a) (0x000022E0 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA0_DSC_VERSION_MINOR 3:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA0_DSC_VERSION_MAJOR 7:4 +#define NVC97D_HEAD_SET_DSC_PPS_DATA0_PPS_IDENTIFIER 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA0_RESERVED 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA0_LINEBUF_DEPTH 27:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA0_BITS_PER_COMPONENT 31:28 +#define NVC97D_HEAD_SET_DSC_PPS_DATA1(a) (0x000022E4 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA1_BITS_PER_PIXEL_HIGH 1:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA1_VBR_ENABLE 2:2 +#define NVC97D_HEAD_SET_DSC_PPS_DATA1_SIMPLE422 3:3 +#define NVC97D_HEAD_SET_DSC_PPS_DATA1_CONVERT_RGB 4:4 +#define NVC97D_HEAD_SET_DSC_PPS_DATA1_BLOCK_PRED_ENABLE 5:5 +#define NVC97D_HEAD_SET_DSC_PPS_DATA1_RESERVED 7:6 +#define NVC97D_HEAD_SET_DSC_PPS_DATA1_BITS_PER_PIXEL_LOW 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA1_PIC_HEIGHT_HIGH 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA1_PIC_HEIGHT_LOW 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA2(a) (0x000022E8 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA2_PIC_WIDTH_HIGH 7:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA2_PIC_WIDTH_LOW 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA2_SLICE_HEIGHT_HIGH 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA2_SLICE_HEIGHT_LOW 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA3(a) (0x000022EC + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA3_SLICE_WIDTH_HIGH 7:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA3_SLICE_WIDTH_LOW 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA3_CHUNK_SIZE_HIGH 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA3_CHUNK_SIZE_LOW 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA4(a) (0x000022F0 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA4_INITIAL_XMIT_DELAY_HIGH 1:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA4_RESERVED 7:2 +#define NVC97D_HEAD_SET_DSC_PPS_DATA4_INITIAL_XMIT_DELAY_LOW 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA4_INITIAL_DEC_DELAY_HIGH 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA4_INITIAL_DEC_DELAY_LOW 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA5(a) (0x000022F4 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA5_RESERVED0 7:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA5_INITIAL_SCALE_VALUE 13:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA5_RESERVED1 15:14 +#define NVC97D_HEAD_SET_DSC_PPS_DATA5_SCALE_INCREMENT_INTERVAL_HIGH 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA5_SCALE_INCREMENT_INTERVAL_LOW 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA6(a) (0x000022F8 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA6_SCALE_DECREMENT_INTERVAL_HIGH 3:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA6_RESERVED0 7:4 +#define NVC97D_HEAD_SET_DSC_PPS_DATA6_SCALE_DECREMENT_INTERVAL_LOW 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA6_RESERVED1 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA6_FIRST_LINE_BPG_OFFSET 28:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA6_RESERVED2 31:29 +#define NVC97D_HEAD_SET_DSC_PPS_DATA7(a) (0x000022FC + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA7_NFL_BPG_OFFSET_HIGH 7:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA7_NFL_BPG_OFFSET_LOW 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA7_SLICE_BPG_OFFSET_HIGH 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA7_SLICE_BPG_OFFSET_LOW 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA8(a) (0x00002300 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA8_INITIAL_OFFSET_HIGH 7:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA8_INITIAL_OFFSET_LOW 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA8_FINAL_OFFSET_HIGH 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA8_FINAL_OFFSET_LOW 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA9(a) (0x00002304 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA9_FLATNESS_MIN_QP 4:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA9_RESERVED0 7:5 +#define NVC97D_HEAD_SET_DSC_PPS_DATA9_FLATNESS_MAX_QP 12:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA9_RESERVED1 15:13 +#define NVC97D_HEAD_SET_DSC_PPS_DATA9_RC_MODEL_SIZE_HIGH 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA9_RC_MODEL_SIZE_LOW 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA10(a) (0x00002308 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA10_RC_EDGE_FACTOR 3:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA10_RESERVED0 7:4 +#define NVC97D_HEAD_SET_DSC_PPS_DATA10_RC_QUANT_INCR_LIMIT0 12:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA10_RESERVED1 15:13 +#define NVC97D_HEAD_SET_DSC_PPS_DATA10_RC_QUANT_INCR_LIMIT1 20:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA10_RESERVED2 23:21 +#define NVC97D_HEAD_SET_DSC_PPS_DATA10_RC_TGT_OFFSET_LO 27:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA10_RC_TGT_OFFSET_HI 31:28 +#define NVC97D_HEAD_SET_DSC_PPS_DATA11(a) (0x0000230C + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH0 7:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH1 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH2 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH3 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA12(a) (0x00002310 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH4 7:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH5 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH6 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH7 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA13(a) (0x00002314 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH8 7:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH9 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH10 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH11 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA14(a) (0x00002318 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA14_RC_BUF_THRESH12 7:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA14_RC_BUF_THRESH13 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MAX_QP_HIGH0 18:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MIN_QP0 23:19 +#define NVC97D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_BPG_OFFSET0 29:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MAX_QP_LOW0 31:30 +#define NVC97D_HEAD_SET_DSC_PPS_DATA15(a) (0x0000231C + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_HIGH1 2:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MIN_QP1 7:3 +#define NVC97D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_BPG_OFFSET1 13:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_LOW1 15:14 +#define NVC97D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_HIGH2 18:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MIN_QP2 23:19 +#define NVC97D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_BPG_OFFSET2 29:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_LOW2 31:30 +#define NVC97D_HEAD_SET_DSC_PPS_DATA16(a) (0x00002320 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_HIGH3 2:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MIN_QP3 7:3 +#define NVC97D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_BPG_OFFSET3 13:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_LOW3 15:14 +#define NVC97D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_HIGH4 18:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MIN_QP4 23:19 +#define NVC97D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_BPG_OFFSET4 29:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_LOW4 31:30 +#define NVC97D_HEAD_SET_DSC_PPS_DATA17(a) (0x00002324 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_HIGH5 2:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MIN_QP5 7:3 +#define NVC97D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_BPG_OFFSET5 13:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_LOW5 15:14 +#define NVC97D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_HIGH6 18:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MIN_QP6 23:19 +#define NVC97D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_BPG_OFFSET6 29:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_LOW6 31:30 +#define NVC97D_HEAD_SET_DSC_PPS_DATA18(a) (0x00002328 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_HIGH7 2:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MIN_QP7 7:3 +#define NVC97D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_BPG_OFFSET7 13:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_LOW7 15:14 +#define NVC97D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_HIGH8 18:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MIN_QP8 23:19 +#define NVC97D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_BPG_OFFSET8 29:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_LOW8 31:30 +#define NVC97D_HEAD_SET_DSC_PPS_DATA19(a) (0x0000232C + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_HIGH9 2:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MIN_QP9 7:3 +#define NVC97D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_BPG_OFFSET9 13:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_LOW9 15:14 +#define NVC97D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_HIGH10 18:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MIN_QP10 23:19 +#define NVC97D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_BPG_OFFSET10 29:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_LOW10 31:30 +#define NVC97D_HEAD_SET_DSC_PPS_DATA20(a) (0x00002330 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_HIGH11 2:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MIN_QP11 7:3 +#define NVC97D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_BPG_OFFSET11 13:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_LOW11 15:14 +#define NVC97D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_HIGH12 18:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MIN_QP12 23:19 +#define NVC97D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_BPG_OFFSET12 29:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_LOW12 31:30 +#define NVC97D_HEAD_SET_DSC_PPS_DATA21(a) (0x00002334 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_HIGH13 2:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MIN_QP13 7:3 +#define NVC97D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_BPG_OFFSET13 13:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_LOW13 15:14 +#define NVC97D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_HIGH14 18:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MIN_QP14 23:19 +#define NVC97D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_BPG_OFFSET14 29:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_LOW14 31:30 +#define NVC97D_HEAD_SET_DSC_PPS_DATA22(a) (0x00002338 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA22_NATIVE422 0:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA22_NATIVE420 1:1 +#define NVC97D_HEAD_SET_DSC_PPS_DATA22_RESERVED0 7:2 +#define NVC97D_HEAD_SET_DSC_PPS_DATA22_SECOND_LINE_BPG_OFFSET 12:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA22_RESERVED1 15:13 +#define NVC97D_HEAD_SET_DSC_PPS_DATA22_NSL_BPG_OFFSET_HIGH 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA22_NSL_BPG_OFFSETLOW 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA23(a) (0x0000233C + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA23_SECOND_LINE_OFFSET_ADJ_HIGH 7:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA23_SECOND_LINE_OFFSET_ADJ_LOW 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA23_RESERVED 31:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA24(a) (0x00002340 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA24_RESERVED 31:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA25(a) (0x00002344 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA25_RESERVED 31:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA26(a) (0x00002348 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA26_RESERVED 31:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA27(a) (0x0000234C + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA27_RESERVED 31:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA28(a) (0x00002350 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA28_RESERVED 31:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA29(a) (0x00002354 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA29_RESERVED 31:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA30(a) (0x00002358 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA30_RESERVED 31:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA31(a) (0x0000235C + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA31_RESERVED 31:0 +#define NVC97D_HEAD_SET_RASTER_HBLANK_DELAY(a) (0x00002364 + (a)*0x00000800) +#define NVC97D_HEAD_SET_RASTER_HBLANK_DELAY_BLANK_START 15:0 +#define NVC97D_HEAD_SET_RASTER_HBLANK_DELAY_BLANK_END 31:16 +#define NVC97D_HEAD_SET_HDMI_DSC_HCACTIVE(a) (0x00002368 + (a)*0x00000800) +#define NVC97D_HEAD_SET_HDMI_DSC_HCACTIVE_BYTES 15:0 +#define NVC97D_HEAD_SET_HDMI_DSC_HCACTIVE_TRI_BYTES 31:16 +#define NVC97D_HEAD_SET_HDMI_DSC_HCBLANK(a) (0x0000236C + (a)*0x00000800) +#define NVC97D_HEAD_SET_HDMI_DSC_HCBLANK_WIDTH 15:0 +#define NVC97D_HEAD_SW_RESERVED(a,b) (0x00002370 + (a)*0x00000800 + (b)*0x00000004) +#define NVC97D_HEAD_SW_RESERVED_VALUE 31:0 +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_HI(a,b) (0x00002380 + (a)*0x00000800 + (b)*0x00000004) +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_HI_VALUE 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clc97d_h diff --git a/src/common/sdk/nvidia/inc/class/clc97e.h b/src/common/sdk/nvidia/inc/class/clc97e.h new file mode 100644 index 0000000000..55f514cc5f --- /dev/null +++ b/src/common/sdk/nvidia/inc/class/clc97e.h @@ -0,0 +1,740 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc97e_h_ +#define _clc97e_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC97E_WINDOW_CHANNEL_DMA (0x0000C97E) + +// dma opcode instructions +#define NVC97E_DMA +#define NVC97E_DMA_OPCODE 31:29 +#define NVC97E_DMA_OPCODE_METHOD 0x00000000 +#define NVC97E_DMA_OPCODE_JUMP 0x00000001 +#define NVC97E_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVC97E_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVC97E_DMA_METHOD_COUNT 27:18 +#define NVC97E_DMA_METHOD_OFFSET 15:2 +#define NVC97E_DMA_DATA 31:0 +#define NVC97E_DMA_DATA_NOP 0x00000000 +#define NVC97E_DMA_JUMP_OFFSET 15:2 +#define NVC97E_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// class methods +#define NVC97E_PUT (0x00000000) +#define NVC97E_PUT_PTR 9:0 +#define NVC97E_GET (0x00000004) +#define NVC97E_GET_PTR 9:0 +#define NVC97E_UPDATE (0x00000200) +#define NVC97E_UPDATE_RELEASE_ELV 0:0 +#define NVC97E_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVC97E_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVC97E_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC97E_UPDATE_INTERLOCK_WITH_WIN_IMM 12:12 +#define NVC97E_UPDATE_INTERLOCK_WITH_WIN_IMM_DISABLE (0x00000000) +#define NVC97E_UPDATE_INTERLOCK_WITH_WIN_IMM_ENABLE (0x00000001) +#define NVC97E_SET_SEMAPHORE_ACQUIRE_HI (0x00000204) +#define NVC97E_SET_SEMAPHORE_ACQUIRE_HI_VALUE 31:0 +#define NVC97E_GET_LINE (0x00000208) +#define NVC97E_GET_LINE_LINE 15:0 +#define NVC97E_SET_SEMAPHORE_CONTROL (0x0000020C) +#define NVC97E_SET_SEMAPHORE_CONTROL_SKIP_ACQ 11:11 +#define NVC97E_SET_SEMAPHORE_CONTROL_SKIP_ACQ_FALSE (0x00000000) +#define NVC97E_SET_SEMAPHORE_CONTROL_SKIP_ACQ_TRUE (0x00000001) +#define NVC97E_SET_SEMAPHORE_CONTROL_PAYLOAD_SIZE 15:15 +#define NVC97E_SET_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_32BIT (0x00000000) +#define NVC97E_SET_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_64BIT (0x00000001) +#define NVC97E_SET_SEMAPHORE_CONTROL_ACQ_MODE 13:12 +#define NVC97E_SET_SEMAPHORE_CONTROL_ACQ_MODE_EQ (0x00000000) +#define NVC97E_SET_SEMAPHORE_CONTROL_ACQ_MODE_CGEQ (0x00000001) +#define NVC97E_SET_SEMAPHORE_CONTROL_ACQ_MODE_STRICT_GEQ (0x00000002) +#define NVC97E_SET_SEMAPHORE_CONTROL_REL_MODE 14:14 +#define NVC97E_SET_SEMAPHORE_CONTROL_REL_MODE_WRITE (0x00000000) +#define NVC97E_SET_SEMAPHORE_CONTROL_REL_MODE_WRITE_AWAKEN (0x00000001) +#define NVC97E_SET_SEMAPHORE_ACQUIRE (0x00000210) +#define NVC97E_SET_SEMAPHORE_ACQUIRE_VALUE 31:0 +#define NVC97E_SET_SEMAPHORE_RELEASE (0x00000214) +#define NVC97E_SET_SEMAPHORE_RELEASE_VALUE 31:0 +#define NVC97E_SET_NOTIFIER_CONTROL (0x00000220) +#define NVC97E_SET_NOTIFIER_CONTROL_MODE 0:0 +#define NVC97E_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000) +#define NVC97E_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001) +#define NVC97E_SET_SIZE (0x00000224) +#define NVC97E_SET_SIZE_WIDTH 15:0 +#define NVC97E_SET_SIZE_HEIGHT 31:16 +#define NVC97E_SET_STORAGE (0x00000228) +#define NVC97E_SET_STORAGE_BLOCK_HEIGHT 3:0 +#define NVC97E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_ONE_GOB (0x00000000) +#define NVC97E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_TWO_GOBS (0x00000001) +#define NVC97E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_FOUR_GOBS (0x00000002) +#define NVC97E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVC97E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVC97E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVC97E_SET_PARAMS (0x0000022C) +#define NVC97E_SET_PARAMS_FORMAT 7:0 +#define NVC97E_SET_PARAMS_FORMAT_I8 (0x0000001E) +#define NVC97E_SET_PARAMS_FORMAT_R4G4B4A4 (0x0000002F) +#define NVC97E_SET_PARAMS_FORMAT_R5G6B5 (0x000000E8) +#define NVC97E_SET_PARAMS_FORMAT_A1R5G5B5 (0x000000E9) +#define NVC97E_SET_PARAMS_FORMAT_R5G5B5A1 (0x0000002E) +#define NVC97E_SET_PARAMS_FORMAT_A8R8G8B8 (0x000000CF) +#define NVC97E_SET_PARAMS_FORMAT_X8R8G8B8 (0x000000E6) +#define NVC97E_SET_PARAMS_FORMAT_A8B8G8R8 (0x000000D5) +#define NVC97E_SET_PARAMS_FORMAT_X8B8G8R8 (0x000000F9) +#define NVC97E_SET_PARAMS_FORMAT_A2R10G10B10 (0x000000DF) +#define NVC97E_SET_PARAMS_FORMAT_A2B10G10R10 (0x000000D1) +#define NVC97E_SET_PARAMS_FORMAT_R16_G16_B16_A16_NVBIAS (0x00000023) +#define NVC97E_SET_PARAMS_FORMAT_R16_G16_B16_A16 (0x000000C6) +#define NVC97E_SET_PARAMS_FORMAT_RF16_GF16_BF16_AF16 (0x000000CA) +#define NVC97E_SET_PARAMS_FORMAT_Y8_U8__Y8_V8_N422 (0x00000028) +#define NVC97E_SET_PARAMS_FORMAT_U8_Y8__V8_Y8_N422 (0x00000029) +#define NVC97E_SET_PARAMS_FORMAT_Y8___U8V8_N444 (0x00000035) +#define NVC97E_SET_PARAMS_FORMAT_Y8___U8V8_N422 (0x00000036) +#define NVC97E_SET_PARAMS_FORMAT_Y8___V8U8_N420 (0x00000038) +#define NVC97E_SET_PARAMS_FORMAT_Y8___U8___V8_N444 (0x0000003A) +#define NVC97E_SET_PARAMS_FORMAT_Y8___U8___V8_N420 (0x0000003B) +#define NVC97E_SET_PARAMS_FORMAT_Y10___U10V10_N444 (0x00000055) +#define NVC97E_SET_PARAMS_FORMAT_Y10___U10V10_N422 (0x00000056) +#define NVC97E_SET_PARAMS_FORMAT_Y10___V10U10_N420 (0x00000058) +#define NVC97E_SET_PARAMS_FORMAT_Y12___U12V12_N444 (0x00000075) +#define NVC97E_SET_PARAMS_FORMAT_Y12___U12V12_N422 (0x00000076) +#define NVC97E_SET_PARAMS_FORMAT_Y12___V12U12_N420 (0x00000078) +#define NVC97E_SET_PARAMS_CLAMP_BEFORE_BLEND 18:18 +#define NVC97E_SET_PARAMS_CLAMP_BEFORE_BLEND_DISABLE (0x00000000) +#define NVC97E_SET_PARAMS_CLAMP_BEFORE_BLEND_ENABLE (0x00000001) +#define NVC97E_SET_PARAMS_SWAP_UV 19:19 +#define NVC97E_SET_PARAMS_SWAP_UV_DISABLE (0x00000000) +#define NVC97E_SET_PARAMS_SWAP_UV_ENABLE (0x00000001) +#define NVC97E_SET_PARAMS_FMT_ROUNDING_MODE 22:22 +#define NVC97E_SET_PARAMS_FMT_ROUNDING_MODE_ROUND_TO_NEAREST (0x00000000) +#define NVC97E_SET_PARAMS_FMT_ROUNDING_MODE_ROUND_DOWN (0x00000001) +#define NVC97E_SET_PLANAR_STORAGE(b) (0x00000230 + (b)*0x00000004) +#define NVC97E_SET_PLANAR_STORAGE_PITCH 12:0 +#define NVC97E_SET_SEMAPHORE_RELEASE_HI (0x0000023C) +#define NVC97E_SET_SEMAPHORE_RELEASE_HI_VALUE 31:0 +#define NVC97E_SET_POINT_IN(b) (0x00000290 + (b)*0x00000004) +#define NVC97E_SET_POINT_IN_X 15:0 +#define NVC97E_SET_POINT_IN_Y 31:16 +#define NVC97E_SET_SIZE_IN (0x00000298) +#define NVC97E_SET_SIZE_IN_WIDTH 15:0 +#define NVC97E_SET_SIZE_IN_HEIGHT 31:16 +#define NVC97E_SET_SIZE_OUT (0x000002A4) +#define NVC97E_SET_SIZE_OUT_WIDTH 15:0 +#define NVC97E_SET_SIZE_OUT_HEIGHT 31:16 +#define NVC97E_SET_CONTROL_INPUT_SCALER (0x000002A8) +#define NVC97E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS 2:0 +#define NVC97E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS_TAPS_2 (0x00000001) +#define NVC97E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS_TAPS_5 (0x00000004) +#define NVC97E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS 6:4 +#define NVC97E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS_TAPS_2 (0x00000001) +#define NVC97E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS_TAPS_5 (0x00000004) +#define NVC97E_SET_INPUT_SCALER_COEFF_VALUE (0x000002AC) +#define NVC97E_SET_INPUT_SCALER_COEFF_VALUE_DATA 9:0 +#define NVC97E_SET_INPUT_SCALER_COEFF_VALUE_INDEX 19:12 +#define NVC97E_SET_COMPOSITION_CONTROL (0x000002EC) +#define NVC97E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT 1:0 +#define NVC97E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DISABLE (0x00000000) +#define NVC97E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_SRC (0x00000001) +#define NVC97E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DST (0x00000002) +#define NVC97E_SET_COMPOSITION_CONTROL_DEPTH 11:4 +#define NVC97E_SET_COMPOSITION_CONTROL_BYPASS 16:16 +#define NVC97E_SET_COMPOSITION_CONTROL_BYPASS_DISABLE (0x00000000) +#define NVC97E_SET_COMPOSITION_CONTROL_BYPASS_ENABLE (0x00000001) +#define NVC97E_SET_COMPOSITION_CONSTANT_ALPHA (0x000002F0) +#define NVC97E_SET_COMPOSITION_CONSTANT_ALPHA_K1 7:0 +#define NVC97E_SET_COMPOSITION_CONSTANT_ALPHA_K2 15:8 +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT (0x000002F4) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT 3:0 +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT 7:4 +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT 11:8 +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT 15:12 +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT 19:16 +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT 23:20 +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT 27:24 +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT 31:28 +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC97E_SET_KEY_ALPHA (0x000002F8) +#define NVC97E_SET_KEY_ALPHA_MIN 15:0 +#define NVC97E_SET_KEY_ALPHA_MAX 31:16 +#define NVC97E_SET_KEY_RED_CR (0x000002FC) +#define NVC97E_SET_KEY_RED_CR_MIN 15:0 +#define NVC97E_SET_KEY_RED_CR_MAX 31:16 +#define NVC97E_SET_KEY_GREEN_Y (0x00000300) +#define NVC97E_SET_KEY_GREEN_Y_MIN 15:0 +#define NVC97E_SET_KEY_GREEN_Y_MAX 31:16 +#define NVC97E_SET_KEY_BLUE_CB (0x00000304) +#define NVC97E_SET_KEY_BLUE_CB_MIN 15:0 +#define NVC97E_SET_KEY_BLUE_CB_MAX 31:16 +#define NVC97E_SET_PRESENT_CONTROL (0x00000308) +#define NVC97E_SET_PRESENT_CONTROL_MIN_PRESENT_INTERVAL 3:0 +#define NVC97E_SET_PRESENT_CONTROL_BEGIN_MODE 6:4 +#define NVC97E_SET_PRESENT_CONTROL_BEGIN_MODE_NON_TEARING (0x00000000) +#define NVC97E_SET_PRESENT_CONTROL_BEGIN_MODE_IMMEDIATE (0x00000001) +#define NVC97E_SET_PRESENT_CONTROL_TIMESTAMP_MODE 8:8 +#define NVC97E_SET_PRESENT_CONTROL_TIMESTAMP_MODE_DISABLE (0x00000000) +#define NVC97E_SET_PRESENT_CONTROL_TIMESTAMP_MODE_ENABLE (0x00000001) +#define NVC97E_SET_PRESENT_CONTROL_STEREO_MODE 13:12 +#define NVC97E_SET_PRESENT_CONTROL_STEREO_MODE_MONO (0x00000000) +#define NVC97E_SET_PRESENT_CONTROL_STEREO_MODE_PAIR_FLIP (0x00000001) +#define NVC97E_SET_PRESENT_CONTROL_STEREO_MODE_AT_ANY_FRAME (0x00000002) +#define NVC97E_SET_ACQ_SEMAPHORE_VALUE_HI (0x0000030C) +#define NVC97E_SET_ACQ_SEMAPHORE_VALUE_HI_VALUE 31:0 +#define NVC97E_SET_ACQ_SEMAPHORE_CONTROL (0x00000330) +#define NVC97E_SET_ACQ_SEMAPHORE_CONTROL_PAYLOAD_SIZE 15:15 +#define NVC97E_SET_ACQ_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_32BIT (0x00000000) +#define NVC97E_SET_ACQ_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_64BIT (0x00000001) +#define NVC97E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE 13:12 +#define NVC97E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE_EQ (0x00000000) +#define NVC97E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE_CGEQ (0x00000001) +#define NVC97E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE_STRICT_GEQ (0x00000002) +#define NVC97E_SET_ACQ_SEMAPHORE_VALUE (0x00000334) +#define NVC97E_SET_ACQ_SEMAPHORE_VALUE_VALUE 31:0 +#define NVC97E_SET_SCAN_DIRECTION (0x0000033C) +#define NVC97E_SET_SCAN_DIRECTION_HORIZONTAL_DIRECTION 0:0 +#define NVC97E_SET_SCAN_DIRECTION_HORIZONTAL_DIRECTION_FROM_LEFT (0x00000000) +#define NVC97E_SET_SCAN_DIRECTION_HORIZONTAL_DIRECTION_FROM_RIGHT (0x00000001) +#define NVC97E_SET_SCAN_DIRECTION_VERTICAL_DIRECTION 1:1 +#define NVC97E_SET_SCAN_DIRECTION_VERTICAL_DIRECTION_FROM_TOP (0x00000000) +#define NVC97E_SET_SCAN_DIRECTION_VERTICAL_DIRECTION_FROM_BOTTOM (0x00000001) +#define NVC97E_SET_SCAN_DIRECTION_COLUMN_ORDER 2:2 +#define NVC97E_SET_SCAN_DIRECTION_COLUMN_ORDER_FALSE (0x00000000) +#define NVC97E_SET_SCAN_DIRECTION_COLUMN_ORDER_TRUE (0x00000001) +#define NVC97E_SET_TIMESTAMP_ORIGIN_LO (0x00000340) +#define NVC97E_SET_TIMESTAMP_ORIGIN_LO_TIMESTAMP_LO 31:0 +#define NVC97E_SET_TIMESTAMP_ORIGIN_HI (0x00000344) +#define NVC97E_SET_TIMESTAMP_ORIGIN_HI_TIMESTAMP_HI 31:0 +#define NVC97E_SET_UPDATE_TIMESTAMP_LO (0x00000348) +#define NVC97E_SET_UPDATE_TIMESTAMP_LO_TIMESTAMP_LO 31:0 +#define NVC97E_SET_UPDATE_TIMESTAMP_HI (0x0000034C) +#define NVC97E_SET_UPDATE_TIMESTAMP_HI_TIMESTAMP_HI 31:0 +#define NVC97E_SET_INTERLOCK_FLAGS (0x00000370) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 0:0 +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR(i) ((i)+1):((i)+1) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR__SIZE_1 8 +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_DISABLE (0x00000000) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_ENABLE (0x00000001) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 1:1 +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 2:2 +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 3:3 +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 4:4 +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 5:5 +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 6:6 +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 7:7 +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 8:8 +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS (0x00000374) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW(i) ((i)+0):((i)+0) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW__SIZE_1 32 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) +#define NVC97E_SET_EXT_PACKET_CONTROL (0x00000398) +#define NVC97E_SET_EXT_PACKET_CONTROL_ENABLE 0:0 +#define NVC97E_SET_EXT_PACKET_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_EXT_PACKET_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_EXT_PACKET_CONTROL_LOCATION 4:4 +#define NVC97E_SET_EXT_PACKET_CONTROL_LOCATION_VSYNC (0x00000000) +#define NVC97E_SET_EXT_PACKET_CONTROL_LOCATION_VBLANK (0x00000001) +#define NVC97E_SET_EXT_PACKET_CONTROL_FREQUENCY 8:8 +#define NVC97E_SET_EXT_PACKET_CONTROL_FREQUENCY_EVERY_FRAME (0x00000000) +#define NVC97E_SET_EXT_PACKET_CONTROL_FREQUENCY_ONCE (0x00000001) +#define NVC97E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE 12:12 +#define NVC97E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE_DISABLE (0x00000000) +#define NVC97E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE_ENABLE (0x00000001) +#define NVC97E_SET_EXT_PACKET_CONTROL_SIZE 27:16 +#define NVC97E_SET_EXT_PACKET_DATA (0x0000039C) +#define NVC97E_SET_EXT_PACKET_DATA_DB0 7:0 +#define NVC97E_SET_EXT_PACKET_DATA_DB1 15:8 +#define NVC97E_SET_EXT_PACKET_DATA_DB2 23:16 +#define NVC97E_SET_EXT_PACKET_DATA_DB3 31:24 +#define NVC97E_SET_FMT_COEFFICIENT_C00 (0x00000400) +#define NVC97E_SET_FMT_COEFFICIENT_C00_VALUE 20:0 +#define NVC97E_SET_FMT_COEFFICIENT_C01 (0x00000404) +#define NVC97E_SET_FMT_COEFFICIENT_C01_VALUE 20:0 +#define NVC97E_SET_FMT_COEFFICIENT_C02 (0x00000408) +#define NVC97E_SET_FMT_COEFFICIENT_C02_VALUE 20:0 +#define NVC97E_SET_FMT_COEFFICIENT_C03 (0x0000040C) +#define NVC97E_SET_FMT_COEFFICIENT_C03_VALUE 20:0 +#define NVC97E_SET_FMT_COEFFICIENT_C10 (0x00000410) +#define NVC97E_SET_FMT_COEFFICIENT_C10_VALUE 20:0 +#define NVC97E_SET_FMT_COEFFICIENT_C11 (0x00000414) +#define NVC97E_SET_FMT_COEFFICIENT_C11_VALUE 20:0 +#define NVC97E_SET_FMT_COEFFICIENT_C12 (0x00000418) +#define NVC97E_SET_FMT_COEFFICIENT_C12_VALUE 20:0 +#define NVC97E_SET_FMT_COEFFICIENT_C13 (0x0000041C) +#define NVC97E_SET_FMT_COEFFICIENT_C13_VALUE 20:0 +#define NVC97E_SET_FMT_COEFFICIENT_C20 (0x00000420) +#define NVC97E_SET_FMT_COEFFICIENT_C20_VALUE 20:0 +#define NVC97E_SET_FMT_COEFFICIENT_C21 (0x00000424) +#define NVC97E_SET_FMT_COEFFICIENT_C21_VALUE 20:0 +#define NVC97E_SET_FMT_COEFFICIENT_C22 (0x00000428) +#define NVC97E_SET_FMT_COEFFICIENT_C22_VALUE 20:0 +#define NVC97E_SET_FMT_COEFFICIENT_C23 (0x0000042C) +#define NVC97E_SET_FMT_COEFFICIENT_C23_VALUE 20:0 +#define NVC97E_SET_ILUT_CONTROL (0x00000440) +#define NVC97E_SET_ILUT_CONTROL_INTERPOLATE 0:0 +#define NVC97E_SET_ILUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC97E_SET_ILUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC97E_SET_ILUT_CONTROL_MIRROR 1:1 +#define NVC97E_SET_ILUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVC97E_SET_ILUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVC97E_SET_ILUT_CONTROL_MODE 3:2 +#define NVC97E_SET_ILUT_CONTROL_MODE_SEGMENTED (0x00000000) +#define NVC97E_SET_ILUT_CONTROL_MODE_DIRECT8 (0x00000001) +#define NVC97E_SET_ILUT_CONTROL_MODE_DIRECT10 (0x00000002) +#define NVC97E_SET_ILUT_CONTROL_SIZE 18:8 +#define NVC97E_SET_CSC00CONTROL (0x0000045C) +#define NVC97E_SET_CSC00CONTROL_ENABLE 0:0 +#define NVC97E_SET_CSC00CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_CSC00CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_CSC00COEFFICIENT_C00 (0x00000460) +#define NVC97E_SET_CSC00COEFFICIENT_C00_VALUE 20:0 +#define NVC97E_SET_CSC00COEFFICIENT_C01 (0x00000464) +#define NVC97E_SET_CSC00COEFFICIENT_C01_VALUE 20:0 +#define NVC97E_SET_CSC00COEFFICIENT_C02 (0x00000468) +#define NVC97E_SET_CSC00COEFFICIENT_C02_VALUE 20:0 +#define NVC97E_SET_CSC00COEFFICIENT_C03 (0x0000046C) +#define NVC97E_SET_CSC00COEFFICIENT_C03_VALUE 20:0 +#define NVC97E_SET_CSC00COEFFICIENT_C10 (0x00000470) +#define NVC97E_SET_CSC00COEFFICIENT_C10_VALUE 20:0 +#define NVC97E_SET_CSC00COEFFICIENT_C11 (0x00000474) +#define NVC97E_SET_CSC00COEFFICIENT_C11_VALUE 20:0 +#define NVC97E_SET_CSC00COEFFICIENT_C12 (0x00000478) +#define NVC97E_SET_CSC00COEFFICIENT_C12_VALUE 20:0 +#define NVC97E_SET_CSC00COEFFICIENT_C13 (0x0000047C) +#define NVC97E_SET_CSC00COEFFICIENT_C13_VALUE 20:0 +#define NVC97E_SET_CSC00COEFFICIENT_C20 (0x00000480) +#define NVC97E_SET_CSC00COEFFICIENT_C20_VALUE 20:0 +#define NVC97E_SET_CSC00COEFFICIENT_C21 (0x00000484) +#define NVC97E_SET_CSC00COEFFICIENT_C21_VALUE 20:0 +#define NVC97E_SET_CSC00COEFFICIENT_C22 (0x00000488) +#define NVC97E_SET_CSC00COEFFICIENT_C22_VALUE 20:0 +#define NVC97E_SET_CSC00COEFFICIENT_C23 (0x0000048C) +#define NVC97E_SET_CSC00COEFFICIENT_C23_VALUE 20:0 +#define NVC97E_SET_CSC0LUT_CONTROL (0x000004A0) +#define NVC97E_SET_CSC0LUT_CONTROL_INTERPOLATE 0:0 +#define NVC97E_SET_CSC0LUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC97E_SET_CSC0LUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC97E_SET_CSC0LUT_CONTROL_MIRROR 1:1 +#define NVC97E_SET_CSC0LUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVC97E_SET_CSC0LUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVC97E_SET_CSC0LUT_CONTROL_ENABLE 4:4 +#define NVC97E_SET_CSC0LUT_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_CSC0LUT_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_CSC01CONTROL (0x000004BC) +#define NVC97E_SET_CSC01CONTROL_ENABLE 0:0 +#define NVC97E_SET_CSC01CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_CSC01CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_CSC01COEFFICIENT_C00 (0x000004C0) +#define NVC97E_SET_CSC01COEFFICIENT_C00_VALUE 20:0 +#define NVC97E_SET_CSC01COEFFICIENT_C01 (0x000004C4) +#define NVC97E_SET_CSC01COEFFICIENT_C01_VALUE 20:0 +#define NVC97E_SET_CSC01COEFFICIENT_C02 (0x000004C8) +#define NVC97E_SET_CSC01COEFFICIENT_C02_VALUE 20:0 +#define NVC97E_SET_CSC01COEFFICIENT_C03 (0x000004CC) +#define NVC97E_SET_CSC01COEFFICIENT_C03_VALUE 20:0 +#define NVC97E_SET_CSC01COEFFICIENT_C10 (0x000004D0) +#define NVC97E_SET_CSC01COEFFICIENT_C10_VALUE 20:0 +#define NVC97E_SET_CSC01COEFFICIENT_C11 (0x000004D4) +#define NVC97E_SET_CSC01COEFFICIENT_C11_VALUE 20:0 +#define NVC97E_SET_CSC01COEFFICIENT_C12 (0x000004D8) +#define NVC97E_SET_CSC01COEFFICIENT_C12_VALUE 20:0 +#define NVC97E_SET_CSC01COEFFICIENT_C13 (0x000004DC) +#define NVC97E_SET_CSC01COEFFICIENT_C13_VALUE 20:0 +#define NVC97E_SET_CSC01COEFFICIENT_C20 (0x000004E0) +#define NVC97E_SET_CSC01COEFFICIENT_C20_VALUE 20:0 +#define NVC97E_SET_CSC01COEFFICIENT_C21 (0x000004E4) +#define NVC97E_SET_CSC01COEFFICIENT_C21_VALUE 20:0 +#define NVC97E_SET_CSC01COEFFICIENT_C22 (0x000004E8) +#define NVC97E_SET_CSC01COEFFICIENT_C22_VALUE 20:0 +#define NVC97E_SET_CSC01COEFFICIENT_C23 (0x000004EC) +#define NVC97E_SET_CSC01COEFFICIENT_C23_VALUE 20:0 +#define NVC97E_SET_TMO_CONTROL (0x00000500) +#define NVC97E_SET_TMO_CONTROL_INTERPOLATE 0:0 +#define NVC97E_SET_TMO_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC97E_SET_TMO_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC97E_SET_TMO_CONTROL_SAT_MODE 3:2 +#define NVC97E_SET_TMO_CONTROL_SIZE 18:8 +#define NVC97E_SET_TMO_LOW_INTENSITY_ZONE (0x00000508) +#define NVC97E_SET_TMO_LOW_INTENSITY_ZONE_END 29:16 +#define NVC97E_SET_TMO_LOW_INTENSITY_VALUE (0x0000050C) +#define NVC97E_SET_TMO_LOW_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVC97E_SET_TMO_LOW_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVC97E_SET_TMO_LOW_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVC97E_SET_TMO_MEDIUM_INTENSITY_ZONE (0x00000510) +#define NVC97E_SET_TMO_MEDIUM_INTENSITY_ZONE_START 13:0 +#define NVC97E_SET_TMO_MEDIUM_INTENSITY_ZONE_END 29:16 +#define NVC97E_SET_TMO_MEDIUM_INTENSITY_VALUE (0x00000514) +#define NVC97E_SET_TMO_MEDIUM_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVC97E_SET_TMO_MEDIUM_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVC97E_SET_TMO_MEDIUM_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVC97E_SET_TMO_HIGH_INTENSITY_ZONE (0x00000518) +#define NVC97E_SET_TMO_HIGH_INTENSITY_ZONE_START 13:0 +#define NVC97E_SET_TMO_HIGH_INTENSITY_VALUE (0x0000051C) +#define NVC97E_SET_TMO_HIGH_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVC97E_SET_TMO_HIGH_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVC97E_SET_TMO_HIGH_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVC97E_SET_CSC10CONTROL (0x0000053C) +#define NVC97E_SET_CSC10CONTROL_ENABLE 0:0 +#define NVC97E_SET_CSC10CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_CSC10CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_CSC10COEFFICIENT_C00 (0x00000540) +#define NVC97E_SET_CSC10COEFFICIENT_C00_VALUE 20:0 +#define NVC97E_SET_CSC10COEFFICIENT_C01 (0x00000544) +#define NVC97E_SET_CSC10COEFFICIENT_C01_VALUE 20:0 +#define NVC97E_SET_CSC10COEFFICIENT_C02 (0x00000548) +#define NVC97E_SET_CSC10COEFFICIENT_C02_VALUE 20:0 +#define NVC97E_SET_CSC10COEFFICIENT_C03 (0x0000054C) +#define NVC97E_SET_CSC10COEFFICIENT_C03_VALUE 20:0 +#define NVC97E_SET_CSC10COEFFICIENT_C10 (0x00000550) +#define NVC97E_SET_CSC10COEFFICIENT_C10_VALUE 20:0 +#define NVC97E_SET_CSC10COEFFICIENT_C11 (0x00000554) +#define NVC97E_SET_CSC10COEFFICIENT_C11_VALUE 20:0 +#define NVC97E_SET_CSC10COEFFICIENT_C12 (0x00000558) +#define NVC97E_SET_CSC10COEFFICIENT_C12_VALUE 20:0 +#define NVC97E_SET_CSC10COEFFICIENT_C13 (0x0000055C) +#define NVC97E_SET_CSC10COEFFICIENT_C13_VALUE 20:0 +#define NVC97E_SET_CSC10COEFFICIENT_C20 (0x00000560) +#define NVC97E_SET_CSC10COEFFICIENT_C20_VALUE 20:0 +#define NVC97E_SET_CSC10COEFFICIENT_C21 (0x00000564) +#define NVC97E_SET_CSC10COEFFICIENT_C21_VALUE 20:0 +#define NVC97E_SET_CSC10COEFFICIENT_C22 (0x00000568) +#define NVC97E_SET_CSC10COEFFICIENT_C22_VALUE 20:0 +#define NVC97E_SET_CSC10COEFFICIENT_C23 (0x0000056C) +#define NVC97E_SET_CSC10COEFFICIENT_C23_VALUE 20:0 +#define NVC97E_SET_CSC1LUT_CONTROL (0x00000580) +#define NVC97E_SET_CSC1LUT_CONTROL_INTERPOLATE 0:0 +#define NVC97E_SET_CSC1LUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC97E_SET_CSC1LUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC97E_SET_CSC1LUT_CONTROL_MIRROR 1:1 +#define NVC97E_SET_CSC1LUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVC97E_SET_CSC1LUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVC97E_SET_CSC1LUT_CONTROL_ENABLE 4:4 +#define NVC97E_SET_CSC1LUT_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_CSC1LUT_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_CSC11CONTROL (0x0000059C) +#define NVC97E_SET_CSC11CONTROL_ENABLE 0:0 +#define NVC97E_SET_CSC11CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_CSC11CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_CSC11COEFFICIENT_C00 (0x000005A0) +#define NVC97E_SET_CSC11COEFFICIENT_C00_VALUE 20:0 +#define NVC97E_SET_CSC11COEFFICIENT_C01 (0x000005A4) +#define NVC97E_SET_CSC11COEFFICIENT_C01_VALUE 20:0 +#define NVC97E_SET_CSC11COEFFICIENT_C02 (0x000005A8) +#define NVC97E_SET_CSC11COEFFICIENT_C02_VALUE 20:0 +#define NVC97E_SET_CSC11COEFFICIENT_C03 (0x000005AC) +#define NVC97E_SET_CSC11COEFFICIENT_C03_VALUE 20:0 +#define NVC97E_SET_CSC11COEFFICIENT_C10 (0x000005B0) +#define NVC97E_SET_CSC11COEFFICIENT_C10_VALUE 20:0 +#define NVC97E_SET_CSC11COEFFICIENT_C11 (0x000005B4) +#define NVC97E_SET_CSC11COEFFICIENT_C11_VALUE 20:0 +#define NVC97E_SET_CSC11COEFFICIENT_C12 (0x000005B8) +#define NVC97E_SET_CSC11COEFFICIENT_C12_VALUE 20:0 +#define NVC97E_SET_CSC11COEFFICIENT_C13 (0x000005BC) +#define NVC97E_SET_CSC11COEFFICIENT_C13_VALUE 20:0 +#define NVC97E_SET_CSC11COEFFICIENT_C20 (0x000005C0) +#define NVC97E_SET_CSC11COEFFICIENT_C20_VALUE 20:0 +#define NVC97E_SET_CSC11COEFFICIENT_C21 (0x000005C4) +#define NVC97E_SET_CSC11COEFFICIENT_C21_VALUE 20:0 +#define NVC97E_SET_CSC11COEFFICIENT_C22 (0x000005C8) +#define NVC97E_SET_CSC11COEFFICIENT_C22_VALUE 20:0 +#define NVC97E_SET_CSC11COEFFICIENT_C23 (0x000005CC) +#define NVC97E_SET_CSC11COEFFICIENT_C23_VALUE 20:0 +#define NVC97E_SET_CLAMP_RANGE (0x000005D0) +#define NVC97E_SET_CLAMP_RANGE_LOW 15:0 +#define NVC97E_SET_CLAMP_RANGE_HIGH 31:16 +#define NVC97E_SW_RESERVED(b) (0x000005D4 + (b)*0x00000004) +#define NVC97E_SW_RESERVED_VALUE 31:0 +#define NVC97E_SET_SURFACE_ADDRESS_HI_SEMAPHORE (0x00000640) +#define NVC97E_SET_SURFACE_ADDRESS_HI_SEMAPHORE_ADDRESS_HI 31:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_SEMAPHORE (0x00000644) +#define NVC97E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_ADDRESS_LO 31:4 +#define NVC97E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET 3:2 +#define NVC97E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET_IOVA (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET_PHYSICAL_NVM (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET_PHYSICAL_PCI (0x00000002) +#define NVC97E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVC97E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_ENABLE 0:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_HI_ACQ_SEMAPHORE (0x00000648) +#define NVC97E_SET_SURFACE_ADDRESS_HI_ACQ_SEMAPHORE_ADDRESS_HI 31:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE (0x0000064C) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_ADDRESS_LO 31:4 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET 3:2 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET_IOVA (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET_PHYSICAL_NVM (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET_PHYSICAL_PCI (0x00000002) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_ENABLE 0:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_HI_NOTIFIER (0x00000650) +#define NVC97E_SET_SURFACE_ADDRESS_HI_NOTIFIER_ADDRESS_HI 31:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_NOTIFIER (0x00000654) +#define NVC97E_SET_SURFACE_ADDRESS_LO_NOTIFIER_ADDRESS_LO 31:4 +#define NVC97E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET 3:2 +#define NVC97E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_IOVA (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_NVM (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_PCI (0x00000002) +#define NVC97E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVC97E_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE 0:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_HI_ISO(b) (0x00000658 + (b)*0x00000004) +#define NVC97E_SET_SURFACE_ADDRESS_HI_ISO_ADDRESS_HI 31:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO(b) (0x00000670 + (b)*0x00000004) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_ADDRESS_LO 31:4 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_TARGET 3:2 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_TARGET_IOVA (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_TARGET_PHYSICAL_NVM (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_TARGET_PHYSICAL_PCI (0x00000002) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_KIND 1:1 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_KIND_PITCH (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_KIND_BLOCKLINEAR (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_ENABLE 0:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_HI_ILUT (0x00000688) +#define NVC97E_SET_SURFACE_ADDRESS_HI_ILUT_ADDRESS_HI 31:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ILUT (0x0000068C) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ILUT_ADDRESS_LO 31:4 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET 3:2 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET_IOVA (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET_PHYSICAL_NVM (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET_PHYSICAL_PCI (0x00000002) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ILUT_ENABLE 0:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ILUT_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ILUT_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_HI_TMO_LUT (0x00000690) +#define NVC97E_SET_SURFACE_ADDRESS_HI_TMO_LUT_ADDRESS_HI 31:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_TMO_LUT (0x00000694) +#define NVC97E_SET_SURFACE_ADDRESS_LO_TMO_LUT_ADDRESS_LO 31:4 +#define NVC97E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET 3:2 +#define NVC97E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET_IOVA (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET_PHYSICAL_NVM (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET_PHYSICAL_PCI (0x00000002) +#define NVC97E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVC97E_SET_SURFACE_ADDRESS_LO_TMO_LUT_ENABLE 0:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_TMO_LUT_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_TMO_LUT_ENABLE_ENABLE (0x00000001) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clc97e_h diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000gpu.h b/src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000gpu.h index 351222d0a6..6cb427bcac 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000gpu.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000gpu.h @@ -933,6 +933,16 @@ typedef struct NV0000_CTRL_GPU_PUSH_GSP_UCODE_PARAMS { * The setting must be applied before the GPU is attached. * NVLINK_BW_MODE is an NOP for non-NVLink GPUs. * + * [in] mode + * BW mode requested defined as a DRF + * Possible Legacy values that can be set in bits 2:0: + * NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_FULL + * NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_OFF + * NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_MIN + * NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_HALF + * NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_3QUARTER + * Link count can be requested on Blackwell+ in bits 7:3 + * * Possible status values returned are: * NV_OK * NV_ERR_INVALID_ARGUMENT @@ -942,11 +952,20 @@ typedef struct NV0000_CTRL_GPU_PUSH_GSP_UCODE_PARAMS { * NV_ERR_IN_USE */ -#define NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_FULL (0x00U) -#define NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_OFF (0x01U) -#define NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_MIN (0x02U) -#define NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_HALF (0x03U) -#define NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_3QUARTER (0x04U) +#define NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_SETTING_LEGACY 2:0 +#define NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_SETTING_LINK_COUNT 7:3 + +#define NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_FULL (0x00U) +#define NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_OFF (0x01U) +#define NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_MIN (0x02U) +#define NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_HALF (0x03U) +#define NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_3QUARTER (0x04U) +#define NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_LINK_COUNT (0x05U) + +#define NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_SCOPE_UNSET (0x00U) +#define NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_SCOPE_PER_NODE (0x01U) +#define NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_SCOPE_PER_GPU (0x02U) + #define NV0000_CTRL_CMD_GPU_SET_NVLINK_BW_MODE (0x286U) /* finn: Evaluated from "(FINN_NV01_ROOT_GPU_INTERFACE_ID << 8) | NV0000_CTRL_GPU_SET_NVLINK_BW_MODE_PARAMS_MESSAGE_ID" */ #define NV0000_CTRL_GPU_SET_NVLINK_BW_MODE_PARAMS_MESSAGE_ID (0x86U) @@ -960,9 +979,23 @@ typedef struct NV0000_CTRL_GPU_SET_NVLINK_BW_MODE_PARAMS { * * This command is used to get NVLINK bandwidth for power saving * - * The setting must be applied before the GPU is attached. * NVLINK_BW_MODE is an NOP for non-NVLink GPUs. * + * [out] mode + * BW mode currently set for the GPUs on the system. + * Possible values are: + * NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_FULL + * NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_OFF + * NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_MIN + * NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_HALF + * NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_3QUARTER + * [out] bwModeScope + * Scope of the bw mode setting on the system. + * Possible values are: + * NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_SCOPE_UNSET + * NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_SCOPE_PER_NODE + * NV0000_CTRL_CMD_GPU_NVLINK_BW_MODE_SCOPE_PER_GPU + * * Possible status values returned are: * NV_OK * NV_ERR_INVALID_ARGUMENT @@ -977,6 +1010,7 @@ typedef struct NV0000_CTRL_GPU_SET_NVLINK_BW_MODE_PARAMS { typedef struct NV0000_CTRL_GPU_GET_NVLINK_BW_MODE_PARAMS { NvU8 mode; + NvU8 bwModeScope; } NV0000_CTRL_GPU_GET_NVLINK_BW_MODE_PARAMS; /* diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000system.h b/src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000system.h index 59bd99c738..4b4efb3fbe 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000system.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000system.h @@ -122,6 +122,12 @@ typedef struct NV0000_CTRL_SYSTEM_GET_BUILD_VERSION_PARAMS { NvU32 officialChangelistNumber; } NV0000_CTRL_SYSTEM_GET_BUILD_VERSION_PARAMS; +typedef enum NV0000_CTRL_SYSTEM_SH_SOC_TYPE { + NV0000_CTRL_SYSTEM_SH_SOC_TYPE_NA = 0, + NV0000_CTRL_SYSTEM_SH_SOC_TYPE_NV_GRACE = 1, + +} NV0000_CTRL_SYSTEM_SH_SOC_TYPE; + /* * NV0000_CTRL_CMD_SYSTEM_GET_CPU_INFO * @@ -203,6 +209,8 @@ typedef struct NV0000_CTRL_SYSTEM_GET_BUILD_VERSION_PARAMS { * Silicon stepping * bCCEnabled * Confidentail compute enabled/disabled state + * selfHostedSocType + * SoC type NV0000_CTRL_SYSTEM_SH_SOC_TYPE* in case of self hosted systems * * Possible status values returned are: * NV_OK @@ -213,20 +221,21 @@ typedef struct NV0000_CTRL_SYSTEM_GET_BUILD_VERSION_PARAMS { #define NV0000_CTRL_SYSTEM_GET_CPU_INFO_PARAMS_MESSAGE_ID (0x2U) typedef struct NV0000_CTRL_SYSTEM_GET_CPU_INFO_PARAMS { - NvU32 type; /* processor type */ - NvU32 capabilities; /* processor caps */ - NvU32 clock; /* processor speed (MHz) */ - NvU32 L1DataCacheSize; /* L1 dcache size (KB) */ - NvU32 L2DataCacheSize; /* L2 dcache size (KB) */ - NvU32 dataCacheLineSize; /* L1 dcache bytes/line */ - NvU32 numLogicalCpus; /* logial processor cnt */ - NvU32 numPhysicalCpus; /* physical processor cnt*/ - NvU8 name[52]; /* embedded cpu name */ - NvU32 family; /* Vendor defined Family and Extended Family combined */ - NvU32 model; /* Vendor defined Model and Extended Model combined */ - NvU8 stepping; /* Silicon stepping */ - NvU32 coresOnDie; /* cpu cores per die */ - NvBool bCCEnabled; /* CC enabled on cpu */ + NvU32 type; /* processor type */ + NvU32 capabilities; /* processor caps */ + NvU32 clock; /* processor speed (MHz) */ + NvU32 L1DataCacheSize; /* L1 dcache size (KB) */ + NvU32 L2DataCacheSize; /* L2 dcache size (KB) */ + NvU32 dataCacheLineSize; /* L1 dcache bytes/line */ + NvU32 numLogicalCpus; /* logial processor cnt */ + NvU32 numPhysicalCpus; /* physical processor cnt*/ + NvU8 name[52]; /* embedded cpu name */ + NvU32 family; /* Vendor defined Family and Extended Family combined */ + NvU32 model; /* Vendor defined Model and Extended Model combined */ + NvU8 stepping; /* Silicon stepping */ + NvU32 coresOnDie; /* cpu cores per die */ + NvBool bCCEnabled; /* CC enabled on cpu */ + NV0000_CTRL_SYSTEM_SH_SOC_TYPE selfHostedSocType; /* SoC type in case of self hosted systems */ } NV0000_CTRL_SYSTEM_GET_CPU_INFO_PARAMS; // Macros for CPU family information @@ -2108,6 +2117,31 @@ typedef struct NV0000_CTRL_SYSTEM_GET_RM_INSTANCE_ID_PARAMS { * NV_ERR_NOT_SUPPORTED */ #define NV0000_CTRL_CMD_SYSTEM_NVPCF_GET_POWER_MODE_INFO (0x13bU) /* finn: Evaluated from "(FINN_NV01_ROOT_SYSTEM_INTERFACE_ID << 8) | NV0000_CTRL_CMD_SYSTEM_NVPCF_GET_POWER_MODE_INFO_PARAMS_MESSAGE_ID" */ +#define NVPCF_CTRL_SYSPWRLIMIT_TYPE_BASE 1U +#define NV0000_CTRL_SYSTEM_POWER_INFO_INDEX_MAX_SIZE 32U + +#define NV0000_CTRL_CMD_SYSTEM_GET_SYSTEM_POWER_LIMIT_MESSAGE_ID (0x48U) + +typedef struct NV0000_CTRL_CMD_SYSTEM_GET_SYSTEM_POWER_LIMIT { + + /* Battery state of charge threshold (percent 0-100) */ + NvU8 batteryStateOfChargePercent; + + /* Long Timescale Battery current limit (milliamps) */ + NvU32 batteryCurrentLimitmA; + + /* Rest of system reserved power (milliwatts) */ + NvU32 restOfSytemReservedPowermW; + + /* Min CPU TDP (milliwatts) */ + NvU32 minCpuTdpmW; + + /* Max CPU TDP (milliwatts) */ + NvU32 maxCpuTdpmW; + + /* Short Timescale Battery current limit (milliamps) */ + NvU32 shortTimescaleBatteryCurrentLimitmA; +} NV0000_CTRL_CMD_SYSTEM_GET_SYSTEM_POWER_LIMIT; #define NV0000_CTRL_CMD_SYSTEM_NVPCF_GET_POWER_MODE_INFO_PARAMS_MESSAGE_ID (0x3BU) @@ -2200,41 +2234,71 @@ typedef struct NV0000_CTRL_CMD_SYSTEM_NVPCF_GET_POWER_MODE_INFO_PARAMS { } filterParam; /* Reserved */ - NvU16 filterReserved; + NvU16 filterReserved; /* Controller Type Dynamic Boost Controller */ - NvBool bIsBoostController; + NvBool bIsBoostController; /* Increase power limit ratio */ - NvU16 incRatio; + NvU16 incRatio; /* Decrease power limit ratio */ - NvU16 decRatio; + NvU16 decRatio; /* Dynamic Boost Controller DC Support */ - NvBool bSupportBatt; + NvBool bSupportBatt; /* CPU type(Intel/AMD) */ - NvU8 cpuType; + NvU8 cpuType; /* GPU type(Nvidia) */ - NvU8 gpuType; + NvU8 gpuType; + + /* System Power Table info index */ + NvU32 sysPwrIndex; + + /* System Power Table get table limits */ + NV0000_CTRL_CMD_SYSTEM_GET_SYSTEM_POWER_LIMIT sysPwrGetInfo[NV0000_CTRL_SYSTEM_POWER_INFO_INDEX_MAX_SIZE]; + + /* + * Does this version of the system power limits table support TSP -> table + * version 2.0 and later should set this to true + */ + NvBool bIsTspSupported; + + /* + * Stores the System Power Limits (Battery State of Charge aka BSOC) table version implemented by the SBIOS + * + */ + NvU8 sysPwrLimitsTableVersion; + + /* SYSPWRLIMIT class types */ + NvU32 type; + + /* CPU TDP Limit to be set (milliwatts) */ + NvU32 cpuTdpmw; } NV0000_CTRL_CMD_SYSTEM_NVPCF_GET_POWER_MODE_INFO_PARAMS; /* Define the filter types */ -#define CONTROLLER_FILTER_TYPE_EMWA 0U -#define CONTROLLER_FILTER_TYPE_MOVING_MAX 1U +#define CONTROLLER_FILTER_TYPE_EMWA 0U +#define CONTROLLER_FILTER_TYPE_MOVING_MAX 1U /* Valid NVPCF subfunction case */ -#define NVPCF0100_CTRL_CONFIG_DSM_2X_FUNC_GET_SUPPORTED_CASE 2U -#define NVPCF0100_CTRL_CONFIG_DSM_2X_FUNC_GET_DYNAMIC_CASE 3U +#define NVPCF0100_CTRL_CONFIG_DSM_2X_FUNC_GET_SUPPORTED_CASE 2U +#define NVPCF0100_CTRL_CONFIG_DSM_2X_FUNC_GET_DYNAMIC_CASE 3U /* NVPCF subfunction to get the static data tables */ -#define NVPCF0100_CTRL_CONFIG_DSM_2X_FUNC_GET_STATIC_CASE 4U +#define NVPCF0100_CTRL_CONFIG_DSM_2X_FUNC_GET_STATIC_CASE 4U + +/* NVPCF subfunction to get the system power limits table */ +#define NVPCF0100_CTRL_CONFIG_DSM_2X_FUNC_GET_DC_SYSTEM_POWER_LIMITS_CASE 5U + +/* NVPCF subfunction to change the CPU's TDP limit */ +#define NVPCF0100_CTRL_CONFIG_DSM_2X_FUNC_CPU_TDP_LIMIT_CONTROL_CASE 6U /* Valid NVPCF subfunction ids */ -#define NVPCF0100_CTRL_CONFIG_DSM_1X_FUNC_GET_SUPPORTED (0x00000000) -#define NVPCF0100_CTRL_CONFIG_DSM_1X_FUNC_GET_DYNAMIC_PARAMS (0x00000002) +#define NVPCF0100_CTRL_CONFIG_DSM_1X_FUNC_GET_SUPPORTED (0x00000000) +#define NVPCF0100_CTRL_CONFIG_DSM_1X_FUNC_GET_DYNAMIC_PARAMS (0x00000002) /* * Defines for get supported sub functions bit fields @@ -2246,10 +2310,12 @@ typedef struct NV0000_CTRL_CMD_SYSTEM_NVPCF_GET_POWER_MODE_INFO_PARAMS { /*! * Config DSM 2x version specific defines */ -#define NVPCF0100_CTRL_CONFIG_DSM_2X_VERSION (0x00000200) -#define NVPCF0100_CTRL_CONFIG_DSM_2X_FUNC_GET_SUPPORTED (0x00000000) -#define NVPCF0100_CTRL_CONFIG_DSM_2X_FUNC_GET_STATIC_CONFIG_TABLES (0x00000001) -#define NVPCF0100_CTRL_CONFIG_DSM_2X_FUNC_GET_DYNAMIC_PARAMS (0x00000002) +#define NVPCF0100_CTRL_CONFIG_DSM_2X_VERSION (0x00000200) +#define NVPCF0100_CTRL_CONFIG_DSM_2X_FUNC_GET_SUPPORTED (0x00000000) +#define NVPCF0100_CTRL_CONFIG_DSM_2X_FUNC_GET_STATIC_CONFIG_TABLES (0x00000001) +#define NVPCF0100_CTRL_CONFIG_DSM_2X_FUNC_GET_DYNAMIC_PARAMS (0x00000002) +#define NVPCF0100_CTRL_CONFIG_DSM_2X_FUNC_GET_DC_SYSTEM_POWER_LIMITS_TABLE (0x00000008) +#define NVPCF0100_CTRL_CONFIG_DSM_2X_FUNC_CPU_TDP_LIMIT_CONTROL (0x00000009) /*! * Defines the max buffer size for config @@ -2268,7 +2334,7 @@ typedef struct NV0000_CTRL_CMD_SYSTEM_NVPCF_GET_POWER_MODE_INFO_PARAMS { * Possible status values returned are: * NV_OK */ -#define NV0000_CTRL_CMD_SYSTEM_SYNC_EXTERNAL_FABRIC_MGMT (0x13cU) /* finn: Evaluated from "(FINN_NV01_ROOT_SYSTEM_INTERFACE_ID << 8) | NV0000_CTRL_CMD_SYSTEM_SYNC_EXTERNAL_FABRIC_MGMT_PARAMS_MESSAGE_ID" */ +#define NV0000_CTRL_CMD_SYSTEM_SYNC_EXTERNAL_FABRIC_MGMT (0x13cU) /* finn: Evaluated from "(FINN_NV01_ROOT_SYSTEM_INTERFACE_ID << 8) | NV0000_CTRL_CMD_SYSTEM_SYNC_EXTERNAL_FABRIC_MGMT_PARAMS_MESSAGE_ID" */ #define NV0000_CTRL_CMD_SYSTEM_SYNC_EXTERNAL_FABRIC_MGMT_PARAMS_MESSAGE_ID (0x3CU) diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000vgpu.h b/src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000vgpu.h index 476e83067f..29c893031a 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000vgpu.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000vgpu.h @@ -37,6 +37,15 @@ #include "class/cl0000.h" #include "nv_vgpu_types.h" +/* DRF macros for OBJGPU::gpuId */ +#define NV0000_BUSDEVICE_DOMAIN 31:16 +#define NV0000_BUSDEVICE_BUS 15:8 +#define NV0000_BUSDEVICE_DEVICE 7:0 + +#define GPU_32_BIT_ID_DECODE_DOMAIN(gpuId) (NvU16)DRF_VAL(0000, _BUSDEVICE, _DOMAIN, gpuId); +#define GPU_32_BIT_ID_DECODE_BUS(gpuId) (NvU8) DRF_VAL(0000, _BUSDEVICE, _BUS, gpuId); +#define GPU_32_BIT_ID_DECODE_DEVICE(gpuId) (NvU8) DRF_VAL(0000, _BUSDEVICE, _DEVICE, gpuId); + /* * NV0000_CTRL_CMD_VGPU_CREATE_DEVICE * diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dfp.h b/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dfp.h index 7deb173788..f42309c63a 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dfp.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dfp.h @@ -1451,4 +1451,39 @@ typedef struct NV0073_CTRL_DFP_EDP_DRIVER_UNLOAD_PARAMS { +/* + * NV0073_CTRL_CMD_DFP_SET_FORCE_BLACK_PIXELS + * + * This command is used to force black pixels from postcomp. + * + * subDeviceInstance + * This parameter specifies the subdevice instance within the + * NV04_DISPLAY_COMMON parent device to which the operation should be + * directed. This parameter must specify a value between zero and the + * total number of subdevices within the parent device. This parameter + * should be set to zero for default behavior. + * + * displayId + * DisplayId of the connected display. + * + * bForceBlackPixels + * To enable or disable black pixel generation. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_INVALID_ARGUMENT + * NV_ERR_NOT_SUPPORTED + * + */ +#define NV0073_CTRL_CMD_DFP_SET_FORCE_BLACK_PIXELS (0x731179U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DFP_INTERFACE_ID << 8) | NV0073_CTRL_DFP_SET_FORCE_BLACK_PIXELS_PARAMS_MESSAGE_ID" */ + +#define NV0073_CTRL_DFP_SET_FORCE_BLACK_PIXELS_PARAMS_MESSAGE_ID (0x79U) + +typedef struct NV0073_CTRL_DFP_SET_FORCE_BLACK_PIXELS_PARAMS { + NvU32 subDeviceInstance; + NvU32 displayId; + NvU32 head; + NvBool bForceBlack; +} NV0073_CTRL_DFP_SET_FORCE_BLACK_PIXELS_PARAMS; + /* _ctrl0073dfp_h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dp.h b/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dp.h index 98c1a53c85..67a86c98d9 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dp.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dp.h @@ -804,39 +804,33 @@ typedef struct NV0073_CTRL_DP_CSTM { #define NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS_CSTM2 15:0 #define NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS_CSTM8 7:0 - /* * NV0073_CTRL_DP_TESTPATTERN * - * This structure specifies the possible test patterns available in display port. + * This structure specifies the possible test patterns available in display port, + * and parameters for Square pattern. + * */ typedef struct NV0073_CTRL_DP_TESTPATTERN { NvU32 testPattern; } NV0073_CTRL_DP_TESTPATTERN; -#define NV0073_CTRL_DP_TESTPATTERN_DATA 4:0 -#define NV0073_CTRL_DP_TESTPATTERN_DATA_NONE (0x00000000U) -#define NV0073_CTRL_DP_TESTPATTERN_DATA_D10_2 (0x00000001U) -#define NV0073_CTRL_DP_TESTPATTERN_DATA_SERMP (0x00000002U) -#define NV0073_CTRL_DP_TESTPATTERN_DATA_PRBS_7 (0x00000003U) -#define NV0073_CTRL_DP_TESTPATTERN_DATA_CSTM (0x00000004U) -#define NV0073_CTRL_DP_TESTPATTERN_DATA_HBR2COMPLIANCE (0x00000005U) -#define NV0073_CTRL_DP_TESTPATTERN_DATA_CP2520PAT3 (0x00000006U) -#define NV0073_CTRL_DP_TESTPATTERN_DATA_TRAINING1 (0x00000007U) -#define NV0073_CTRL_DP_TESTPATTERN_DATA_TRAINING2 (0x00000008U) -#define NV0073_CTRL_DP_TESTPATTERN_DATA_TRAINING3 (0x00000009U) -#define NV0073_CTRL_DP_TESTPATTERN_DATA_TRAINING4 (0x0000000AU) -#define NV0073_CTRL_DP_TESTPATTERN_DATA_CP2520PAT1 (0x0000000BU) -#define NV0073_CTRL_DP_TESTPATTERN_DATA_128B132B_TPS1 (0x0000000CU) -#define NV0073_CTRL_DP_TESTPATTERN_DATA_128B132B_TPS2 (0x0000000DU) -#define NV0073_CTRL_DP_TESTPATTERN_DATA_PRBS_9 (0x0000000EU) -#define NV0073_CTRL_DP_TESTPATTERN_DATA_PRBS_11 (0x0000000FU) -#define NV0073_CTRL_DP_TESTPATTERN_DATA_PRBS_15 (0x00000010U) -#define NV0073_CTRL_DP_TESTPATTERN_DATA_PRBS_23 (0x00000011U) -#define NV0073_CTRL_DP_TESTPATTERN_DATA_PRBS_31 (0x00000012U) -#define NV0073_CTRL_DP_TESTPATTERN_DATA_SQNUM (0x00000013U) -#define NV0073_CTRL_DP_TESTPATTERN_DATA_CSTM_264 (0x00000014U) +#define NV0073_CTRL_DP_TESTPATTERN_DATA 4:0 +#define NV0073_CTRL_DP_TESTPATTERN_DATA_NONE (0x00000000U) +#define NV0073_CTRL_DP_TESTPATTERN_DATA_D10_2 (0x00000001U) +#define NV0073_CTRL_DP_TESTPATTERN_DATA_SERMP (0x00000002U) +#define NV0073_CTRL_DP_TESTPATTERN_DATA_PRBS_7 (0x00000003U) +#define NV0073_CTRL_DP_TESTPATTERN_DATA_CSTM (0x00000004U) +#define NV0073_CTRL_DP_TESTPATTERN_DATA_HBR2COMPLIANCE (0x00000005U) +#define NV0073_CTRL_DP_TESTPATTERN_DATA_CP2520PAT3 (0x00000006U) +#define NV0073_CTRL_DP_TESTPATTERN_DATA_TRAINING1 (0x00000007U) +#define NV0073_CTRL_DP_TESTPATTERN_DATA_TRAINING2 (0x00000008U) +#define NV0073_CTRL_DP_TESTPATTERN_DATA_TRAINING3 (0x00000009U) +#define NV0073_CTRL_DP_TESTPATTERN_DATA_TRAINING4 (0x0000000AU) +#define NV0073_CTRL_DP_TESTPATTERN_DATA_CP2520PAT1 (0x0000000BU) + + /* * NV0073_CTRL_CMD_DP_SET_TESTPATTERN @@ -868,10 +862,8 @@ typedef struct NV0073_CTRL_DP_TESTPATTERN { * laneMask * This parameter specifies the bit mask of DP lanes on which test * pattern is to be applied. - * lower - * This parameter specifies the lower 64 bits of the CSTM test pattern - * upper - * This parameter specifies the upper 16 bits of the CSTM test pattern + * cstm + * This parameter specifies the all the bits for CSTM test pattern. * bIsHBR2 * This Boolean parameter is set to TRUE if HBR2 compliance test is * being performed. @@ -2774,8 +2766,8 @@ typedef struct NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_V2_PARAMS { #define NV0073_CTRL_CMD_DP_AUXCH_SET_VBL_CTL 0x00000002 /* valid state values */ -#define NV0073_CTRL_CMD_DP_AUXCH_SET_VBL_CTL_DISABLE 0x00000000 -#define NV0073_CTRL_CMD_DP_AUXCH_SET_VBL_CTL_ENABLE 0x00000001 +#define NV0073_CTRL_CMD_DP_AUXCH_SET_VBL_CTL_DISABLE 0x00000001 +#define NV0073_CTRL_CMD_DP_AUXCH_SET_VBL_CTL_AUTONOMOUS 0x00000000 #define NV0073_CTRL_CMD_DP_AUXCH_VBL_CTRL_PARAMS_MESSAGE_ID (0x86U) diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073specific.h b/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073specific.h index 8812d26734..5c46f25afb 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073specific.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073specific.h @@ -328,10 +328,7 @@ typedef struct NV0073_CTRL_SPECIFIC_GET_I2C_PORTID_PARAMS { NvU32 ddcPortId; } NV0073_CTRL_SPECIFIC_GET_I2C_PORTID_PARAMS; -#define NV0073_CTRL_SPECIFIC_I2C_PORT_NONE (0x0U) - - - +#define NV0073_CTRL_SPECIFIC_I2C_PORT_NONE (0x0U) /* * NV0073_CTRL_CMD_SPECIFIC_GET_CONNECTOR_DATA @@ -394,10 +391,10 @@ typedef struct NV0073_CTRL_SPECIFIC_GET_I2C_PORTID_PARAMS { * */ -#define NV0073_CTRL_CMD_SPECIFIC_GET_CONNECTOR_DATA (0x730250U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SPECIFIC_INTERFACE_ID << 8) | NV0073_CTRL_SPECIFIC_GET_CONNECTOR_DATA_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SPECIFIC_GET_CONNECTOR_DATA (0x730250U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SPECIFIC_INTERFACE_ID << 8) | NV0073_CTRL_SPECIFIC_GET_CONNECTOR_DATA_PARAMS_MESSAGE_ID" */ /* maximum number of connectors */ -#define NV0073_CTRL_MAX_CONNECTORS 4U +#define NV0073_CTRL_MAX_CONNECTORS 4U #define NV0073_CTRL_SPECIFIC_GET_CONNECTOR_DATA_PARAMS_MESSAGE_ID (0x50U) diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073system.h b/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073system.h index 83e4a787b9..55c4f1db47 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073system.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073system.h @@ -1603,15 +1603,30 @@ typedef struct NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX_PARAMS { * NV_ERR_GENERIC */ -#define NV0073_CTRL_CMD_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH (0x730143U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS_MESSAGE_ID" */ +/* + * NV0073_CTRL_CMD_SYSTEM_INTERNAL_ALLOCATE_DISPLAY_BANDWIDTH + * + * This command is identical to + * NV0073_CTRL_CMD_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH, except that it routes to + * Physical RM, and is for internal RM use. Clients are advised to use + * NV0073_CTRL_CMD_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH instead. + */ -#define NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS_MESSAGE_ID (0x43U) +#define NV0073_CTRL_CMD_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH (0x730143U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS_MESSAGE_ID" */ +#define NV0073_CTRL_CMD_SYSTEM_INTERNAL_ALLOCATE_DISPLAY_BANDWIDTH (0x730157U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_INTERNAL_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS_MESSAGE_ID" */ -typedef struct NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS { +typedef struct NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS_TYPE { NvU32 subDeviceInstance; NvU32 averageBandwidthKBPS; NvU32 floorBandwidthKBPS; -} NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS; +} NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS_TYPE; + +#define NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS_MESSAGE_ID (0x43U) + +typedef NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS_TYPE NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS; +#define NV0073_CTRL_SYSTEM_INTERNAL_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS_MESSAGE_ID (0x57U) + +typedef NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS_TYPE NV0073_CTRL_SYSTEM_INTERNAL_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS; /* * NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS @@ -2013,5 +2028,298 @@ typedef struct NV0073_CTRL_CMD_SYSTEM_MAP_SHARED_DATA_PARAMS { NvBool bMap; } NV0073_CTRL_CMD_SYSTEM_MAP_SHARED_DATA_PARAMS; +/* + * NV0073_CTRL_CMD_SYSTEM_GET_LOADV_COUNTER_INFO + * + * Fetches the LoadV Counter information from corresponding registers. + * + * subDeviceInstance + * This parameter specifies the subdevice instance within the + * NV04_DISPLAY_COMMON parent device to which the operation should be + * directed. + * displayId + * DisplayId of the panel for which we are going to read loadv info + * Possible status values returned are: + * counterValue + * Counts number of frames that have been procesed or synchronized with display + * NV_OK + * NV_ERR_INVALID_PARAM_STRUCT + * NV_ERR_INVALID_ARGUMENT + */ + +#define NV0073_CTRL_CMD_SYSTEM_GET_LOADV_COUNTER_INFO (0x730154U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_GET_LOADV_COUNTER_INFO_PARAMS_MESSAGE_ID" */ + +#define NV0073_CTRL_CMD_SYSTEM_GET_LOADV_COUNTER_INFO_PARAMS_MESSAGE_ID (0x54U) + +typedef struct NV0073_CTRL_CMD_SYSTEM_GET_LOADV_COUNTER_INFO_PARAMS { + NvU32 subDeviceInstance; + NvU32 displayId; + NvU32 counterValue; +} NV0073_CTRL_CMD_SYSTEM_GET_LOADV_COUNTER_INFO_PARAMS; + +/*! + * @brief Defines Display Low Power feature IDs + * + * Following defines specifies unique IDs to identify Display Power saving feature. + */ +#define NV0073_CTRL_DISP_LPWR_FEATURE_ID_INVALID 0x0000 +#define NV0073_CTRL_DISP_LPWR_FEATURE_ID_ALPM 0x0001 +#define NV0073_CTRL_DISP_LPWR_FEATURE_ID_CLK_SWITCH_HUBCLK 0x0002 +#define NV0073_CTRL_DISP_LPWR_FEATURE_ID_CLK_SWITCH_RISCV0CLK 0x0003 +#define NV0073_CTRL_DISP_LPWR_FEATURE_ID_CLK_SWITCH_DISPCLK 0x0004 +#define NV0073_CTRL_DISP_LPWR_FEATURE_ID_CLK_SWITCH_POSTRG_CLKS 0x0005 + +// Parameter/characteristics of Display ALPM +#define NV0073_CTRL_DISP_LPWR_PARAMETER_ID_ALPM_INVALID 0x0000 +#define NV0073_CTRL_DISP_LPWR_PARAMETER_ID_ALPM_SUPPORTED 0x0001 +#define NV0073_CTRL_DISP_LPWR_PARAMETER_ID_ALPM_ENABLED 0x0002 +#define NV0073_CTRL_DISP_LPWR_PARAMETER_ID_ALPM_TYPE_AUX_LESS 0x0003 +#define NV0073_CTRL_DISP_LPWR_PARAMETER_ID_ALPM_ENGAGE_TIME 0x0004 +#define NV0073_CTRL_DISP_LPWR_PARAMETER_ID_ALPM_ENTRY_COUNT 0x0005 +#define NV0073_CTRL_DISP_LPWR_PARAMETER_ID_ALPM_EXIT_COUNT 0x0006 + +/*! + * @brief Parameter/characteristics of hubclk, dispclk, riscv0clk and Post-RG clock Switching + * + * Following are the Parameter/characteristics for of hubclk, dispclk, riscv0clk and + * Post-RG clock Switching + */ +#define NV0073_CTRL_DISP_LPWR_PARAMETER_ID_CLK_SWITCH_INVALID (0x0000) + +/*! + * Property specifies if Clock Switching is supported + * or not. This property is applicable for hubclk, dispclk, riscv0clk and Post-RG clk. + * (This property allows Get operation) + */ +#define NV0073_CTRL_DISP_LPWR_PARAMETER_ID_CLK_SWITCH_SUPPORT (0x0001) + + /*! + * Property specifies if Clock Switching is enabled or not. + * This property is applicable for hubclk, dispclk, riscv0clk and Post-RG clk. + * (This property allows Get and Set operation) + */ +#define NV0073_CTRL_DISP_LPWR_PARAMETER_ID_CLK_SWITCH_ENABLED (0x0002) + + /*! + * Property specifies the time(us) for which the specified clock was in Safe mode. + * This property is applicable for hubclk, dispclk, riscv0clk and Post-RG clk + * (This property allows Get operation) + */ +#define NV0073_CTRL_DISP_LPWR_PARAMETER_ID_CLK_SWITCH_SAFE_TIME_US (0x0003) + + /*! + * Property specifies the time(us) for which the specified clock was in Alternate mode. + * This property is only applicable to riscv0clk. + * (This property allows Get operation) + */ +#define NV0073_CTRL_DISP_LPWR_PARAMETER_ID_CLK_SWITCH_ALTERNATE_TIME_US (0x0004) + + /*! + * Property specifies if the specified clock is forced to Function mode or not. + * This property is applicable for hubclk, dispclk, riscv0clk and Post-RG clk. + * (This property allows Get and Set operation) + */ +#define NV0073_CTRL_DISP_LPWR_PARAMETER_ID_CLK_SWITCH_FORCE_FUNCTION (0x0005) + + /*! + * Property specifies if there was an error when the specified clock is being switched + * to safe mode but switch didn't happen in programmed time. + * This property is applicable for hubclk, dispclk, riscv0clk and Post-RG clk. + * (This property allows Get operation) + */ +#define NV0073_CTRL_DISP_LPWR_PARAMETER_ID_CLK_SWITCH_SAFE_ERROR (0x0006) + + /*! + * Property specifies if there was an error when the specified clock is being switched + * to function mode but switch didn't happen in programmed time. + * This property is applicable for hubclk, dispclk, riscv0clk and Post-RG clk. + * (This property allows Get operation) + */ +#define NV0073_CTRL_DISP_LPWR_PARAMETER_ID_CLK_SWITCH_UNSAFE_ERROR (0x0007) + + /*! + * Property specifies if there was an error when Riscv0clk clock is being switched + * to alternate mode but switch didn't happen in programmed time. + * This property is only applicable to riscv0clk. + * (This property allows Get operation) + */ +#define NV0073_CTRL_DISP_LPWR_PARAMETER_ID_CLK_SWITCH_ALTER_ERROR (0x0008) + + /*! + * Property specifies if there was an error when the Riscv0clk clock is being switched to + * function mode but switch didn't happen in programmed time. + * This property is only applicable to riscv0clk. + * (This property allows Get operation) + */ +#define NV0073_CTRL_DISP_LPWR_PARAMETER_ID_CLK_SWITCH_UNALTER_ERROR (0x0009) + + /*! + * Property specifies current state of the specified clock + * i.e. Safe or Function or Alternate + * (This property allows Get operation) + */ +#define NV0073_CTRL_DISP_LPWR_PARAMETER_ID_CLK_SWITCH_STATUS (0x0010) + +/*! + * @brief Structure to identify display low power feature + * + * Structure to get/set feature Id, It has two fields + * FeatureID[In] : Feature Identifier + * SubFeatureID[In] : If Any Subfeature associated to Feature + * + * In general, Power saving feature is identify by featureId and SubFeature. + * Add enum in this structure in case some specific power feature needs + * additional fields. "Union" should follow XAPI standards. + */ +typedef struct NV0073_CTRL_DISP_LPWR_FEATURE { + NvU16 featureId; + NvU16 subfeatureId; +} NV0073_CTRL_DISP_LPWR_FEATURE; + +/*! + * @brief Parameter structure + * + * Structure to get/set parameter/characteristic. Each parameter has 3 field + * 1) ID [In] : Parameter Identifier + * 2) Flag [In/Out] : Flags + * 3) Value [In/Out] : Value of parameter + * + * Add enum in this structure in case we need to additional fields for some + * special parameters. + */ +typedef struct NV0073_CTRL_DISP_LPWR_PARAMETER { + NvU16 paramId; + NvU16 flag; + NvU32 val; +} NV0073_CTRL_DISP_LPWR_PARAMETER; + +/*! + * @brief Flags for PARAMETER + * + * SUCCEED: + * - Get/Set param call is succeed or not. + * - Get Param call for given parameter succeed means RMCtrl retrieved valid + * value for this parameter. + * - Set Param call for given parameter succeed means RMCtrl set value of this + * parameter. + * + * BLOCKING: + * - Defines whether RM Ctrl call is blocking/non-blocking for given parameter. + */ + +#define NV0073_CTRL_DISP_LPWR_FEATURE_PARAMETER_FLAG_SUCCEED 0:0 +#define NV0073_CTRL_DISP_LPWR_FEATURE_PARAMETER_FLAG_SUCCEED_NO 0x0 +#define NV0073_CTRL_DISP_LPWR_FEATURE_PARAMETER_FLAG_SUCCEED_YES 0x1 + +/*! + * @brief Defines all information required to get/set the parameter for given + * display low power feature. + */ +typedef struct NV0073_CTRL_DISP_LPWR_FEATURE_PARAMETER { + NV0073_CTRL_DISP_LPWR_FEATURE feature; + NV0073_CTRL_DISP_LPWR_PARAMETER param; +} NV0073_CTRL_DISP_LPWR_FEATURE_PARAMETER; + +// Max size of FEATURE_PARAMETER structure for RMCtrl NV0073_CTRL_DISP_LPWR_GET/SET +#define NV0073_CTRL_DISP_LPWR_FEATURE_PARAMETER_LIST_MAX_SIZE 64 + +/* + * NV0073_CTRL_CMD_DISP_LPWR_FEATURE_PARAMETER_GET + * + * This command retrieves parameters/characteristics of power features. It can + * query NV0073_CTRL_DISP_LPWR_FEATURE_PARAMETER_LIST_MAX_SIZE number of parameters + * in one call. Command provides facility of collecting information on multiple + * power saving features in one call. + * + * Commands returns SUCCESS only when it successfully retrieves value all + * parameter in the list. + * + * listSize + * Number of valid entries in list. + * + * list + * List of parameters. Refer NV0073_CTRL_DISP_LPWR_FEATURE_PARAMETER to get + * details about each entry in the list. + * + * Possible status return values are: + * NV_OK + * NV_ERR_NOT_SUPPORTED + */ + +#define NV0073_CTRL_CMD_DISP_LPWR_FEATURE_PARAMETER_GET (0x730155) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_DISP_LPWR_FEATURE_PARAMETER_GET_PARAMS_MESSAGE_ID" */ + +#define NV0073_CTRL_DISP_LPWR_FEATURE_PARAMETER_GET_PARAMS_MESSAGE_ID (0x55U) + +typedef struct NV0073_CTRL_DISP_LPWR_FEATURE_PARAMETER_GET_PARAMS { + NvU32 subDeviceInstance; + NvU32 listSize; + NV0073_CTRL_DISP_LPWR_FEATURE_PARAMETER list[NV0073_CTRL_DISP_LPWR_FEATURE_PARAMETER_LIST_MAX_SIZE]; +} NV0073_CTRL_DISP_LPWR_FEATURE_PARAMETER_GET_PARAMS; + +/* + * NV0073_CTRL_CMD_DISP_LPWR_FEATURE_PARAMETER_SET + * + * This command sets parameters/characteristics of power features. It can + * set NV0073_CTRL_DISP_LPWR_FEATURE_PARAMETER_LIST_MAX_SIZE number of parameters + * in one call. Command provides facility of setting parameters for multiple + * power saving features in one call. + * + * Commands returns SUCCESS only when it successfully sets value of all + * parameter in the list. + * + * listSize + * Number of valid entries in list. + * + * list + * List of parameters. Refer NV0073_CTRL_DISP_LPWR_FEATURE_PARAMETER to get + * details about each entry in the list. + * + * Possible status return values are: + * NV_OK + * NV_ERR_NOT_SUPPORTED + */ + +#define NV0073_CTRL_CMD_DISP_LPWR_FEATURE_PARAMETER_SET (0x730156) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_DISP_LPWR_FEATURE_PARAMETER_SET_PARAMS_MESSAGE_ID" */ + +#define NV0073_CTRL_DISP_LPWR_FEATURE_PARAMETER_SET_PARAMS_MESSAGE_ID (0x56U) + +typedef struct NV0073_CTRL_DISP_LPWR_FEATURE_PARAMETER_SET_PARAMS { + NvU32 subDeviceInstance; + NvU32 listSize; + NV0073_CTRL_DISP_LPWR_FEATURE_PARAMETER list[NV0073_CTRL_DISP_LPWR_FEATURE_PARAMETER_LIST_MAX_SIZE]; +} NV0073_CTRL_DISP_LPWR_FEATURE_PARAMETER_SET_PARAMS; + +/* + * NV0073_CTRL_CMD_SYSTEM_NOTIFY_DRR_MSCG_WAR + * + * This command is used to Notify RM about DRR feature. RM uses this + * notification to account MSCG WARs for Turing and Ampere HW bugs. + * + * subDeviceInstance (in) + * This parameter specifies the subdevice instance within the + * NV04_DISPLAY_COMMON parent device to which the operation + * should be directed. + * presentDurationUs (in) + * This parameter inputs the presentDurationUs of the active display. + * bEnableDrr + * If it is true, it means that DRR is enabled from DD side. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_INVALID_PARAM_STRUCT + * NV_ERR_INVALID_ARGUMENT + * NV_ERR_NOT_SUPPORTED + */ +#define NV0073_CTRL_CMD_SYSTEM_NOTIFY_DRR_MSCG_WAR (0x730158U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_NOTIFY_DRR_MSCG_WAR_PARAMS_MESSAGE_ID" */ + +#define NV0073_CTRL_CMD_SYSTEM_NOTIFY_DRR_MSCG_WAR_PARAMS_MESSAGE_ID (0x58U) + +typedef struct NV0073_CTRL_CMD_SYSTEM_NOTIFY_DRR_MSCG_WAR_PARAMS { + NvU32 subDeviceInstance; + NvU32 presentDurationUs; + NvBool bEnableDrr; +} NV0073_CTRL_CMD_SYSTEM_NOTIFY_DRR_MSCG_WAR_PARAMS; + + /* _ctrl0073system_h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl0076.h b/src/common/sdk/nvidia/inc/ctrl/ctrl0076.h new file mode 100644 index 0000000000..0387fc984f --- /dev/null +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl0076.h @@ -0,0 +1,41 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: ctrl/ctrl0076.finn +// + + + +/* + * NV0076_CTRL_NOTIFY_CONSOLE_DISABLED + * + * This command signals to the resource manager that the operating system's + * legacy framebuffer console was disabled and that the underlying BAR mapping + * can be freed. + */ +#define NV0076_CTRL_CMD_NOTIFY_CONSOLE_DISABLED (0x760101) /* finn: Evaluated from "(FINN_NV01_FRAMEBUFFER_CONSOLE_INTERFACE_ID << 8) | 1" */ + diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl0080.h b/src/common/sdk/nvidia/inc/ctrl/ctrl0080.h index 1e0c7a93a0..3804556340 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl0080.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl0080.h @@ -33,7 +33,6 @@ #include "ctrl0080/ctrl0080bif.h" #include "ctrl0080/ctrl0080gpu.h" -#include "ctrl0080/ctrl0080clk.h" #include "ctrl0080/ctrl0080dma.h" #include "ctrl0080/ctrl0080gr.h" #include "ctrl0080/ctrl0080cipher.h" diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080bif.h b/src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080bif.h index 7d36ae0a57..6f2ea494c7 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080bif.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080bif.h @@ -73,28 +73,6 @@ typedef struct NV0080_CTRL_BIF_RESET_PARAMS { #define NV0080_CTRL_BIF_RESET_FLAGS_TYPE_OOBHUB_TRIGGER 0x7 #define NV0080_CTRL_BIF_RESET_FLAGS_TYPE_BASE 0x8 -/* - * NV0080_CTRL_BIF_GET_DMA_BASE_SYSMEM_ADDR - * - * baseDmaSysmemAddr - * This parameter represents the base DMA address for sysmem which will be - * added to all DMA accesses issued by GPU. Currently GPUs do not support 64-bit physical address, - * hence if sysmem is greater than max GPU supported physical address width, this address - * will be non-zero - * - * Possible status values returned are: - * NV_OK - * NV_ERR_INVALID_OBJECT_PARENT - */ - -#define NV0080_CTRL_CMD_BIF_GET_DMA_BASE_SYSMEM_ADDR (0x800103) /* finn: Evaluated from "(FINN_NV01_DEVICE_0_BIF_INTERFACE_ID << 8) | NV0080_CTRL_BIF_GET_DMA_BASE_SYSMEM_ADDR_PARAMS_MESSAGE_ID" */ - -#define NV0080_CTRL_BIF_GET_DMA_BASE_SYSMEM_ADDR_PARAMS_MESSAGE_ID (0x3U) - -typedef struct NV0080_CTRL_BIF_GET_DMA_BASE_SYSMEM_ADDR_PARAMS { - NV_DECLARE_ALIGNED(NvU64 baseDmaSysmemAddr, 8); -} NV0080_CTRL_BIF_GET_DMA_BASE_SYSMEM_ADDR_PARAMS; - /* * NV0080_CTRL_BIF_SET_ASPM_FEATURE * @@ -105,7 +83,7 @@ typedef struct NV0080_CTRL_BIF_GET_DMA_BASE_SYSMEM_ADDR_PARAMS { * NV_OK */ -#define NV0080_CTRL_CMD_BIF_SET_ASPM_FEATURE (0x800104) /* finn: Evaluated from "(FINN_NV01_DEVICE_0_BIF_INTERFACE_ID << 8) | NV0080_CTRL_BIF_SET_ASPM_FEATURE_PARAMS_MESSAGE_ID" */ +#define NV0080_CTRL_CMD_BIF_SET_ASPM_FEATURE (0x800104) /* finn: Evaluated from "(FINN_NV01_DEVICE_0_BIF_INTERFACE_ID << 8) | NV0080_CTRL_BIF_SET_ASPM_FEATURE_PARAMS_MESSAGE_ID" */ #define NV0080_CTRL_BIF_SET_ASPM_FEATURE_PARAMS_MESSAGE_ID (0x4U) diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080fifo.h b/src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080fifo.h index bd68d2a427..f1aead6c58 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080fifo.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080fifo.h @@ -91,54 +91,7 @@ typedef struct NV0080_CTRL_FIFO_GET_CAPS_PARAMS { #define NV0080_CTRL_FIFO_CAPS_SUPPORT_WDDM_INTERLEAVING 1:0x40 /* size in bytes of fifo caps table */ -#define NV0080_CTRL_FIFO_CAPS_TBL_SIZE 2 - -/* - * NV0080_CTRL_CMD_FIFO_START_SELECTED_CHANNELS - * - * This command allows the caller to request that a set of channels - * be added to the runlist. - * - * fifoStartChannelListSize - * Size of the fifoStartChannelList. The units are in entries, not - * bytes. - * fifoStartChannelList - * This will be a list of NV0080_CTRL_FIFO_CHANNEL data structures, - * one for each channel that is to be started. - * channelHandle - * deprecated - * - * Possible status values returned are: - * NV_OK - * NV_ERR_INVALID_PARAM_STRUCT - * NV_ERR_INVALID_ARGUMENT - */ - -/* - * hChannel - * This is the handle to the channel that is scheduled to be started. - */ -typedef struct NV0080_CTRL_FIFO_CHANNEL { - NvHandle hChannel; -} NV0080_CTRL_FIFO_CHANNEL; - -#define NV0080_CTRL_CMD_FIFO_START_SELECTED_CHANNELS (0x801705) /* finn: Evaluated from "(FINN_NV01_DEVICE_0_FIFO_INTERFACE_ID << 8) | NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS_MESSAGE_ID" */ - -#define NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS_MESSAGE_ID (0x5U) - -typedef struct NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS { - NvU32 fifoStartChannelListCount; - NvHandle channelHandle[8]; - NV_DECLARE_ALIGNED(NvP64 fifoStartChannelList, 8); -} NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS; - -#define NV0080_CTRL_FIFO_ENGINE_ID_GRAPHICS (0x00000000) -#define NV0080_CTRL_FIFO_ENGINE_ID_MPEG (0x00000001) -#define NV0080_CTRL_FIFO_ENGINE_ID_MOTION_ESTIMATION (0x00000002) -#define NV0080_CTRL_FIFO_ENGINE_ID_VIDEO (0x00000003) -#define NV0080_CTRL_FIFO_ENGINE_ID_BITSTREAM (0x00000004) -#define NV0080_CTRL_FIFO_ENGINE_ID_ENCRYPTION (0x00000005) -#define NV0080_CTRL_FIFO_ENGINE_ID_FGT (0x00000006) +#define NV0080_CTRL_FIFO_CAPS_TBL_SIZE 2 /* * NV0080_CTRL_CMD_FIFO_GET_ENGINE_CONTEXT_PROPERTIES diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080gpu.h b/src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080gpu.h index 2c3eda19dc..567ccfecf4 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080gpu.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080gpu.h @@ -313,8 +313,6 @@ typedef struct NV0080_CTRL_GPU_GET_VIRTUALIZATION_MODE_PARAMS { NvBool isGridBuild; } NV0080_CTRL_GPU_GET_VIRTUALIZATION_MODE_PARAMS; - - /* * NV0080_CTRL_CMD_GPU_GET_SPARSE_TEXTURE_COMPUTE_MODE * diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ce.h b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ce.h index 61706546b0..92b1d4ba5a 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ce.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ce.h @@ -146,6 +146,7 @@ typedef struct NV2080_CTRL_CE_GET_CAPS_V2_PARAMS { * NV2080_CTRL_CMD_CE_GET_CE_PCE_MASK * * This command returns the mapping of PCE's for the given LCE. + * The pceMask is local to the CE shim that ceEngineType belongs to. * * ceEngineType * This parameter specifies the copy engine type @@ -159,12 +160,6 @@ typedef struct NV2080_CTRL_CE_GET_CAPS_V2_PARAMS { * NV_ERR_INVALID_ARGUMENT */ -/* - * The pceMask is local to the CE shim that ceEngineType belongs to. - */ - - - #define NV2080_CTRL_CMD_CE_GET_CE_PCE_MASK (0x20802a02) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_CE_INTERFACE_ID << 8) | NV2080_CTRL_CE_GET_CE_PCE_MASK_PARAMS_MESSAGE_ID" */ #define NV2080_CTRL_CE_GET_CE_PCE_MASK_PARAMS_MESSAGE_ID (0x2U) @@ -236,18 +231,6 @@ typedef struct NV2080_CTRL_CE_SET_PCE_LCE_CONFIG_PARAMS { * NV_ERR_INVALID_ARGUMENT * NV_ERR_GENERIC */ - -/* - * This command updates the PCE-LCE mappings for one CE shim. On - * GPUs with multiple CE shims, this interface must be called for - * each shim. - * - * shimInstance [IN] - * Specify which CE shim instance to operate on. - */ - - - #define NV2080_CTRL_CMD_CE_UPDATE_PCE_LCE_MAPPINGS (0x20802a05) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_CE_INTERFACE_ID << 8) | NV2080_CTRL_CE_UPDATE_PCE_LCE_MAPPINGS_PARAMS_MESSAGE_ID" */ #define NV2080_CTRL_CE_UPDATE_PCE_LCE_MAPPINGS_PARAMS_MESSAGE_ID (0x5U) @@ -270,13 +253,9 @@ typedef struct NV2080_CTRL_CE_UPDATE_PCE_LCE_MAPPINGS_PARAMS { * * An example if NV2080_ENGINE_TYPE_COPY4 is stubbed (1<<4) will be * set in stubbedCeMask. - */ - -/* + * * This function operates on all CE shims. */ - - #define NV2080_CTRL_CMD_CE_UPDATE_CLASS_DB (0x20802a06) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_CE_INTERFACE_ID << 8) | NV2080_CTRL_CE_UPDATE_CLASS_DB_PARAMS_MESSAGE_ID" */ #define NV2080_CTRL_CE_UPDATE_CLASS_DB_PARAMS_MESSAGE_ID (0x6U) @@ -360,7 +339,6 @@ typedef struct NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS { typedef NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS NV2080_CTRL_CE_GET_ALL_PHYSICAL_CAPS_PARAMS; - /* * NV2080_CTRL_CMD_CE_GET_LCE_SHIM_INFO * @@ -439,11 +417,15 @@ typedef enum NV2080_CTRL_CE_LCE_TYPE { NV2080_CTRL_CE_LCE_TYPE_SCRUB = 3, NV2080_CTRL_CE_LCE_TYPE_NVLINK_PEER = 4, NV2080_CTRL_CE_LCE_TYPE_C2C = 5, + NV2080_CTRL_CE_LCE_TYPE_PCIE_RD = 6, + NV2080_CTRL_CE_LCE_TYPE_PCIE_WR = 7, + NV2080_CTRL_CE_LCE_TYPE_C2C_H2D = 8, + NV2080_CTRL_CE_LCE_TYPE_C2C_D2H = 9, } NV2080_CTRL_CE_LCE_TYPE; /* * NV2080_CTRL_CMD_INTERNAL_CE_GET_PCE_CONFIG_FOR_LCE_TYPE - * + * * This command queries the PCE config required for the specified LCE type. * * [in] lceType @@ -497,6 +479,24 @@ typedef struct NV2080_CTRL_CE_GET_DECOMP_LCE_MASK_PARAMS { NvU32 shimInstance; } NV2080_CTRL_CE_GET_DECOMP_LCE_MASK_PARAMS; +/* + * NV2080_CTRL_CMD_CE_IS_DECOMP_LCE_ENABLED + * + * This command returns whether a given global LCE index is enabled for decomp workloads. + * It has to be given a global LCE index (cannot support shim local LCE ID) + * + * [in] lceIndex + * [out] bDecompEnabled + * Returns NV_TRUE if LCE is enabled for decompression, else returns NV_FALSE + */ + +#define NV2080_CTRL_CMD_CE_IS_DECOMP_LCE_ENABLED (0x20802a12) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_CE_INTERFACE_ID << 8) | NV2080_CTRL_CE_IS_DECOMP_LCE_ENABLED_PARAMS_MESSAGE_ID" */ + +#define NV2080_CTRL_CE_IS_DECOMP_LCE_ENABLED_PARAMS_MESSAGE_ID (0x12U) +typedef struct NV2080_CTRL_CE_IS_DECOMP_LCE_ENABLED_PARAMS { + NvU32 lceIndex; + NvBool bDecompEnabled; +} NV2080_CTRL_CE_IS_DECOMP_LCE_ENABLED_PARAMS; /* _ctrl2080ce_h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ecc.h b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ecc.h index d8905557d1..8f38b227ca 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ecc.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ecc.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2017-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2017-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -39,36 +39,9 @@ /* * NV2080_CTRL_ECC_GET_CLIENT_EXPOSED_COUNTERS_PARAMS * - * sramLastClearedTimestamp [out] - * dramLastClearedTimestamp [out] - * unix-epoch based timestamp. These fields indicate when the error counters - * were last cleared by the user. - * - * sramErrorCounts [out] - * dramErrorCounts [out] - * Aggregate error counts for SRAM and DRAM - */ - -#define NV2080_CTRL_ECC_GET_CLIENT_EXPOSED_COUNTERS_PARAMS_MESSAGE_ID (0x0U) - -typedef struct NV2080_CTRL_ECC_GET_CLIENT_EXPOSED_COUNTERS_PARAMS { - NvU32 sramLastClearedTimestamp; - NvU32 dramLastClearedTimestamp; - - NV_DECLARE_ALIGNED(NvU64 sramCorrectedTotalCounts, 8); - NV_DECLARE_ALIGNED(NvU64 sramUncorrectedTotalCounts, 8); - NV_DECLARE_ALIGNED(NvU64 dramCorrectedTotalCounts, 8); - NV_DECLARE_ALIGNED(NvU64 dramUncorrectedTotalCounts, 8); -} NV2080_CTRL_ECC_GET_CLIENT_EXPOSED_COUNTERS_PARAMS; - -#define NV2080_CTRL_CMD_ECC_GET_ECI_COUNTERS (0x20803401U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_ECC_INTERFACE_ID << 8) | NV2080_CTRL_ECC_GET_ECI_COUNTERS_PARAMS_MESSAGE_ID" */ - -/* - * NV2080_CTRL_ECC_GET_ECI_COUNTERS_PARAMS - * * sramParityUncorrectedUnique [out] * sramSecDedUncorrectedUnique [out] - * sramCorrectedTotal [out] + * sramCorrectedUnique [out] * dramUncorrectedTotal [out] * dramCorrectedTotal [out] * Aggregate error counts for SRAM and DRAM. @@ -88,12 +61,12 @@ typedef struct NV2080_CTRL_ECC_GET_CLIENT_EXPOSED_COUNTERS_PARAMS { * Boolean flag which is set if SRAM error threshold was exceeded */ -#define NV2080_CTRL_ECC_GET_ECI_COUNTERS_PARAMS_MESSAGE_ID (0x1U) +#define NV2080_CTRL_ECC_GET_CLIENT_EXPOSED_COUNTERS_PARAMS_MESSAGE_ID (0x0U) -typedef struct NV2080_CTRL_ECC_GET_ECI_COUNTERS_PARAMS { +typedef struct NV2080_CTRL_ECC_GET_CLIENT_EXPOSED_COUNTERS_PARAMS { NV_DECLARE_ALIGNED(NvU64 sramParityUncorrectedUnique, 8); NV_DECLARE_ALIGNED(NvU64 sramSecDedUncorrectedUnique, 8); - NV_DECLARE_ALIGNED(NvU64 sramCorrectedTotal, 8); + NV_DECLARE_ALIGNED(NvU64 sramCorrectedUnique, 8); NV_DECLARE_ALIGNED(NvU64 dramUncorrectedTotal, 8); NV_DECLARE_ALIGNED(NvU64 dramCorrectedTotal, 8); @@ -106,7 +79,7 @@ typedef struct NV2080_CTRL_ECC_GET_ECI_COUNTERS_PARAMS { NV_DECLARE_ALIGNED(NvU64 sramBucketOther, 8); NvBool sramErrorThresholdExceeded; -} NV2080_CTRL_ECC_GET_ECI_COUNTERS_PARAMS; +} NV2080_CTRL_ECC_GET_CLIENT_EXPOSED_COUNTERS_PARAMS; /* * NV2080_CTRL_ECC_GET_VOLATILE_COUNTS_PARAMS @@ -124,9 +97,9 @@ typedef struct NV2080_CTRL_ECC_GET_ECI_COUNTERS_PARAMS { * dramUncTot [out]: * total uncorrectable DRAM error count */ -#define NV2080_CTRL_CMD_ECC_GET_VOLATILE_COUNTS (0x20803402U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_ECC_INTERFACE_ID << 8) | NV2080_CTRL_ECC_GET_VOLATILE_COUNTS_PARAMS_MESSAGE_ID" */ +#define NV2080_CTRL_CMD_ECC_GET_VOLATILE_COUNTS (0x20803401U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_ECC_INTERFACE_ID << 8) | NV2080_CTRL_ECC_GET_VOLATILE_COUNTS_PARAMS_MESSAGE_ID" */ -#define NV2080_CTRL_ECC_GET_VOLATILE_COUNTS_PARAMS_MESSAGE_ID (0x2U) +#define NV2080_CTRL_ECC_GET_VOLATILE_COUNTS_PARAMS_MESSAGE_ID (0x1U) typedef struct NV2080_CTRL_ECC_GET_VOLATILE_COUNTS_PARAMS { NV_DECLARE_ALIGNED(NvU64 sramCorUni, 8); diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fb.h b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fb.h index c4b589d78f..69a10547f7 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fb.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fb.h @@ -481,33 +481,6 @@ typedef struct NV2080_CTRL_FB_GET_BAR1_OFFSET_PARAMS { NV_DECLARE_ALIGNED(NvU64 gpuVirtAddress, 8); } NV2080_CTRL_FB_GET_BAR1_OFFSET_PARAMS; -/* - * Note: Returns Zeros if no System carveout address info - * - * NV2080_CTRL_CMD_FB_GET_CARVEOUT_ADDRESS_INFO - * - * This command returns FB carveout address space information - * - * StartAddr - * Returns the system memory address of the start of carveout space. - * SpaceSize - * Returns the size of carveout space. - * - * Possible status values returned are: - * NV_OK - * NV_ERR_INVALID_PARAM_STRUCT - * NV_ERR_NOT_SUPPORTED - */ - -#define NV2080_CTRL_CMD_FB_GET_CARVEOUT_ADDRESS_INFO (0x2080130bU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | NV2080_CTRL_FB_GET_SYSTEM_CARVEOUT_ADDRESS_SPACE_INFO_MESSAGE_ID" */ - -#define NV2080_CTRL_FB_GET_SYSTEM_CARVEOUT_ADDRESS_SPACE_INFO_MESSAGE_ID (0xBU) - -typedef struct NV2080_CTRL_FB_GET_SYSTEM_CARVEOUT_ADDRESS_SPACE_INFO { - NV_DECLARE_ALIGNED(NvU64 StartAddr, 8); - NV_DECLARE_ALIGNED(NvU64 SpaceSize, 8); -} NV2080_CTRL_FB_GET_SYSTEM_CARVEOUT_ADDRESS_SPACE_INFO; - /* * NV2080_CTRL_FB_CMD_GET_CALIBRATION_LOCK_FAILED * @@ -680,161 +653,6 @@ typedef struct NV2080_CTRL_FB_FLUSH_GPU_CACHE_PARAMS { #define NV2080_CTRL_FB_FLUSH_GPU_CACHE_FLAGS_FB_FLUSH_NO (0x00000000U) #define NV2080_CTRL_FB_FLUSH_GPU_CACHE_FLAGS_FB_FLUSH_YES (0x00000001U) -/* - * NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY (deprecated; use NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2 instead) - * - * These commands access the cache allocation policy on a specific - * engine, if supported. - * - * engine - * Specifies the target engine. Possible values are defined in - * NV2080_ENGINE_TYPE. - * allocPolicy - * Specifies the read/write allocation policy of the cache on the specified - * engine. Possible values are defined in - * NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_READS and - * NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_WRITES. - * - */ -typedef struct NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS { - NvU32 engine; - NvU32 allocPolicy; -} NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS; - -/* valid values for allocPolicy */ -#define NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_READS 0:0 -#define NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_READS_NO (0x00000000U) -#define NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_READS_YES (0x00000001U) -#define NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_WRITES 1:1 -#define NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_WRITES_NO (0x00000000U) -#define NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_WRITES_YES (0x00000001U) - - -/* - * NV2080_CTRL_CMD_FB_SET_GPU_CACHE_ALLOC_POLICY - * - * This command is deprecated. - * Use NV2080_CTRL_CMD_FB_SET_GPU_CACHE_ALLOC_POLICY_V2 instead. - * - * This command sets the state of the cache allocation policy on a specific - * engine, if supported. - * - * Possible status values returned are: - * NV_OK - * NV_ERR_NOT_SUPPORTED - * NV_ERR_INVALID_ARGUMENT - */ -#define NV2080_CTRL_CMD_FB_SET_GPU_CACHE_ALLOC_POLICY (0x2080130fU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | NV2080_CTRL_FB_SET_GPU_CACHE_ALLOC_POLICY_PARAMS_MESSAGE_ID" */ - -#define NV2080_CTRL_FB_SET_GPU_CACHE_ALLOC_POLICY_PARAMS_MESSAGE_ID (0xFU) - -typedef NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS NV2080_CTRL_FB_SET_GPU_CACHE_ALLOC_POLICY_PARAMS; - -/* - * NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAM - * - * These commands access the cache allocation policy on a specific - * client, if supported. - * - * count - * Specifies the number of entries in entry. - * entry - * Specifies an array of allocation policy entries. - * - * NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_ENTRY - * - * clients - * Specifies the target client. Possible values are defined in - * NV2080_CLIENT_TYPE_*. - * allocPolicy - * Specifies the read/write allocation policy of the cache on the specified - * engine. Possible values are defined in - * NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_READS and - * NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_WRITES. - * - * NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_ENTRY_SIZE - * - * Specifies the maximum number of allocation policy entries allowed - */ -#define NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_ENTRY_SIZE 11U - -typedef struct NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_ENTRY { - NvU32 client; - NvU32 allocPolicy; -} NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_ENTRY; - -typedef struct NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS { - NvU32 count; - NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_ENTRY entry[NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_ENTRY_SIZE]; -} NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS; - -/* valid values for allocPolicy */ -#define NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_READS 0:0 -#define NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_READS_DISABLE (0x00000000U) -#define NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_READS_ENABLE (0x00000001U) -#define NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_READS_ALLOW 1:1 -#define NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_READS_ALLOW_NO (0x00000000U) -#define NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_READS_ALLOW_YES (0x00000001U) -#define NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_WRITES 2:2 -#define NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_WRITES_DISABLE (0x00000000U) -#define NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_WRITES_ENABLE (0x00000001U) -#define NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_WRITES_ALLOW 3:3 -#define NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_WRITES_ALLOW_NO (0x00000000U) -#define NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_WRITES_ALLOW_YES (0x00000001U) - - -/* - * NV2080_CTRL_CMD_FB_SET_GPU_CACHE_ALLOC_POLICY_V2 - * - * This command sets the state of the cache allocation policy on a specific - * engine, if supported. - * - * Possible status values returned are: - * NV_OK - * NV_ERR_NOT_SUPPORTED - * NV_ERR_INVALID_ARGUMENT - */ -#define NV2080_CTRL_CMD_FB_SET_GPU_CACHE_ALLOC_POLICY_V2 (0x20801318U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | NV2080_CTRL_FB_SET_GPU_CACHE_ALLOC_POLICY_V2_PARAMS_MESSAGE_ID" */ - -#define NV2080_CTRL_FB_SET_GPU_CACHE_ALLOC_POLICY_V2_PARAMS_MESSAGE_ID (0x18U) - -typedef NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS NV2080_CTRL_FB_SET_GPU_CACHE_ALLOC_POLICY_V2_PARAMS; - -/* - * NV2080_CTRL_CMD_FB_GET_GPU_CACHE_ALLOC_POLICY (deprecated; use NV2080_CTRL_CMD_FB_GET_GPU_CACHE_ALLOC_POLICY_V2 instead) - * - * This command gets the state of the cache allocation policy on a specific - * engine, if supported. - * - * Possible status values returned are: - * NV_OK - * NV_ERR_NOT_SUPPORTED - * NV_ERR_INVALID_ARGUMENT - */ -#define NV2080_CTRL_CMD_FB_GET_GPU_CACHE_ALLOC_POLICY (0x20801312U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | NV2080_CTRL_FB_GET_GPU_CACHE_ALLOC_POLICY_PARAMS_MESSAGE_ID" */ - -#define NV2080_CTRL_FB_GET_GPU_CACHE_ALLOC_POLICY_PARAMS_MESSAGE_ID (0x12U) - -typedef NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS NV2080_CTRL_FB_GET_GPU_CACHE_ALLOC_POLICY_PARAMS; - -/* - * NV2080_CTRL_CMD_FB_GET_GPU_CACHE_ALLOC_POLICY_V2 - * - * This command gets the state of the cache allocation policy on a specific - * engine, if supported. - * - * Possible status values returned are: - * NV_OK - * NV_ERR_NOT_SUPPORTED - * NV_ERR_INVALID_ARGUMENT - */ -#define NV2080_CTRL_CMD_FB_GET_GPU_CACHE_ALLOC_POLICY_V2 (0x20801319U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | NV2080_CTRL_FB_GET_GPU_CACHE_ALLOC_POLICY_V2_PARAMS_MESSAGE_ID" */ - -#define NV2080_CTRL_FB_GET_GPU_CACHE_ALLOC_POLICY_V2_PARAMS_MESSAGE_ID (0x19U) - -typedef NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS NV2080_CTRL_FB_GET_GPU_CACHE_ALLOC_POLICY_V2_PARAMS; - - /* * NV2080_CTRL_CMD_FB_IS_KIND * @@ -908,7 +726,7 @@ typedef NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS NV2080_CTRL_FB_GET_GPU_C * NV_OK * NV_ERR_INVALID_ARGUMENT */ -#define NV2080_CTRL_CMD_FB_IS_KIND (0x20801313U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | NV2080_CTRL_FB_IS_KIND_PARAMS_MESSAGE_ID" */ +#define NV2080_CTRL_CMD_FB_IS_KIND (0x20801313U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | NV2080_CTRL_FB_IS_KIND_PARAMS_MESSAGE_ID" */ #define NV2080_CTRL_FB_IS_KIND_PARAMS_MESSAGE_ID (0x13U) @@ -985,65 +803,6 @@ typedef struct NV2080_CTRL_FB_GET_GPU_CACHE_INFO_PARAMS { #define NV2080_CTRL_FB_GET_GPU_CACHE_INFO_RCM_STATE_REDUCED (0x00000002U) #define NV2080_CTRL_FB_GET_GPU_CACHE_INFO_RCM_STATE_ZERO_CACHE (0x00000003U) -/* - * NV2080_CTRL_FB_GPU_CACHE_PROMOTION_POLICY - * - * These commands access the cache promotion policy on a specific - * engine, if supported by the hardware. - * - * Cache promotion refers to the GPU promoting a memory read to a larger - * size to preemptively fill the cache so future reads to nearby memory - * addresses will hit in the cache. - * - * engine - * Specifies the target engine. Possible values are defined in - * NV2080_ENGINE_TYPE. - * promotionPolicy - * Specifies the promotion policy of the cache on the specified - * engine. Possible values are defined by - * NV2080_CTRL_FB_GPU_CACHE_PROMOTION_POLICY_*. These values are in terms - * of the hardware cache line size. - * - */ -typedef struct NV2080_CTRL_FB_GPU_CACHE_PROMOTION_POLICY_PARAMS { - NvU32 engine; - NvU32 promotionPolicy; -} NV2080_CTRL_FB_GPU_CACHE_PROMOTION_POLICY_PARAMS; - -/* valid values for promotionPolicy */ -#define NV2080_CTRL_FB_GPU_CACHE_PROMOTION_POLICY_NONE (0x00000000U) -#define NV2080_CTRL_FB_GPU_CACHE_PROMOTION_POLICY_QUARTER (0x00000001U) -#define NV2080_CTRL_FB_GPU_CACHE_PROMOTION_POLICY_HALF (0x00000002U) -#define NV2080_CTRL_FB_GPU_CACHE_PROMOTION_POLICY_FULL (0x00000003U) - - -/* - * NV2080_CTRL_CMD_FB_SET_GPU_CACHE_PROMOTION_POLICY - * - * This command sets the cache promotion policy on a specific engine, if - * supported by the hardware. - * - * Possible status values returned are: - * NV_OK - * NV_ERR_NOT_SUPPORTED - * NV_ERR_INVALID_ARGUMENT - */ -#define NV2080_CTRL_CMD_FB_SET_GPU_CACHE_PROMOTION_POLICY (0x20801316U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | 0x16" */ // Deprecated, removed form RM - - -/* - * NV2080_CTRL_CMD_FB_GET_GPU_CACHE_PROMOTION_POLICY - * - * This command gets the cache promotion policy on a specific engine, if - * supported by the hardware. - * - * Possible status values returned are: - * NV_OK - * NV_ERR_NOT_SUPPORTED - * NV_ERR_INVALID_ARGUMENT - */ -#define NV2080_CTRL_CMD_FB_GET_GPU_CACHE_PROMOTION_POLICY (0x20801317U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | 0x17" */ // Deprecated, removed form RM - /* * NV2080_CTRL_FB_CMD_GET_FB_REGION_INFO * @@ -1086,9 +845,9 @@ typedef struct NV2080_CTRL_FB_GPU_CACHE_PROMOTION_POLICY_PARAMS { * NV_OK * NV_ERR_NOT_SUPPORTED */ -#define NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO (0x20801320U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_PARAMS_MESSAGE_ID" */ +#define NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO (0x20801320U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_PARAMS_MESSAGE_ID" */ -#define NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_MEM_TYPES 17U +#define NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_MEM_TYPES 17U typedef NvBool NV2080_CTRL_CMD_FB_GET_FB_REGION_SURFACE_MEM_TYPE_FLAG[NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_MEM_TYPES]; @@ -2391,6 +2150,21 @@ typedef struct NV2080_CTRL_SYSL2_FS_INFO_SYSLTC_MASK_PARAMS { NvU32 sysl2LtcEnMask; } NV2080_CTRL_SYSL2_FS_INFO_SYSLTC_MASK_PARAMS; +/*! + * Structure holding the in/out params for NV2080_CTRL_SYSL2_FS_INFO_SYSLTS_MASK. + */ +typedef struct NV2080_CTRL_SYSL2_FS_INFO_SYSLTS_MASK_PARAMS { + /*! + * [IN]: physical/local SYS index. + */ + NvU32 sysIdx; + /*! + * [OUT]: physical/local lts mask. + * Note: this lts mask should be flattened out within a sys chiplet + */ + NV_DECLARE_ALIGNED(NvU64 sysl2LtsEnMask, 8); +} NV2080_CTRL_SYSL2_FS_INFO_SYSLTS_MASK_PARAMS; + /*! * Structure holding the in/out params for NV2080_CTRL_FB_FS_INFO_PAC_MASK. */ @@ -2456,6 +2230,7 @@ typedef struct NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LOGICAL_LTC_MASK_PARAMS { #define NV2080_CTRL_FB_FS_INFO_PAC_MASK 0xEU #define NV2080_CTRL_FB_FS_INFO_LOGICAL_LTC_MASK 0xFU #define NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LOGICAL_LTC_MASK 0x10U +#define NV2080_CTRL_SYSL2_FS_INFO_SYSLTS_MASK 0x11U typedef struct NV2080_CTRL_FB_FS_INFO_QUERY { NvU16 queryType; @@ -2479,6 +2254,7 @@ typedef struct NV2080_CTRL_FB_FS_INFO_QUERY { NV2080_CTRL_FB_FS_INFO_PAC_MASK_PARAMS pac; NV_DECLARE_ALIGNED(NV2080_CTRL_FB_FS_INFO_LOGICAL_LTC_MASK_PARAMS logicalLtc, 8); NV_DECLARE_ALIGNED(NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LOGICAL_LTC_MASK_PARAMS dmLogicalLtc, 8); + NV_DECLARE_ALIGNED(NV2080_CTRL_SYSL2_FS_INFO_SYSLTS_MASK_PARAMS sysl2Lts, 8); } queryParams; } NV2080_CTRL_FB_FS_INFO_QUERY; @@ -2884,4 +2660,31 @@ typedef struct NV2080_CTRL_CMD_FB_STATS_GET_PARAMS { NV_DECLARE_ALIGNED(NV2080_CTRL_CMD_FB_STATS_OWNER_INFO fbBlockInfo[NV2080_CTRL_CMD_FB_STATS_MAX_OWNER], 8); } NV2080_CTRL_CMD_FB_STATS_GET_PARAMS; +/* + * NV2080_CTRL_CMD_FB_GET_STATIC_BAR1_INFO + * + * This command returns the GPU static BAR1 Info + * This is for general P2P DMA. NV50_P2P is for GPU P2P. + * + * @params [OUT] NvBool bStaticBar1Enabled: + * This field indicates the static BAR1 mode is enabled. All the following fields are valid + * only if static BAR1 mode is enabled. + * @params [OUT] NvU64 staticBar1Size: + * This field indicates the size of the static BAR1. + * + * Possible status values returned are + * NV_OK + * NV_ERR_INVALID_PARAM_STRUCT + * NV_ERR_NOT_SUPPORTED + * NV_ERR_INVALID_ARGUMENT + */ +#define NV2080_CTRL_CMD_FB_GET_STATIC_BAR1_INFO (0x20801354U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | NV2080_CTRL_FB_GET_STATIC_BAR1_INFO_PARAMS_MESSAGE_ID" */ + +#define NV2080_CTRL_FB_GET_STATIC_BAR1_INFO_PARAMS_MESSAGE_ID (0x54U) + +typedef struct NV2080_CTRL_FB_GET_STATIC_BAR1_INFO_PARAMS { + NvBool bStaticBar1Enabled; + NV_DECLARE_ALIGNED(NvU64 staticBar1Size, 8); +} NV2080_CTRL_FB_GET_STATIC_BAR1_INFO_PARAMS; + /* _ctrl2080fb_h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h index 77c697f934..ee99b76734 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h @@ -114,10 +114,7 @@ typedef NVXXXX_CTRL_XXX_INFO NV2080_CTRL_GPU_INFO; #define NV2080_CTRL_GPU_INFO_MAX_LIST_SIZE (0x00000041U) - #define NV2080_CTRL_GPU_INFO_INDEX_GROUP_ID 30:24 - - #define NV2080_CTRL_GPU_INFO_INDEX_RESERVED 31:31 /* valid minor revision extended values */ @@ -1128,7 +1125,10 @@ typedef struct NV2080_CTRL_GPU_QUERY_ECC_INTR_PARAMS { #define NV2080_CTRL_CMD_GPU_QUERY_ECC_STATUS (0x2080012fU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_GPU_INTERFACE_ID << 8) | NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_MESSAGE_ID" */ -#define NV2080_CTRL_GPU_ECC_UNIT_COUNT (0x0000001FU) +#define NV2080_CTRL_GPU_ECC_UNIT_GSP (0x0000001DU) + + +#define NV2080_CTRL_GPU_ECC_UNIT_COUNT (0x00000024U) @@ -1861,13 +1861,11 @@ typedef struct NV2080_CTRL_GPU_GET_IP_VERSION_PARAMS { NvU32 ipVersion; } NV2080_CTRL_GPU_GET_IP_VERSION_PARAMS; -#define NV2080_CTRL_GPU_GET_IP_VERSION_DISPLAY (0x00000001U) -#define NV2080_CTRL_GPU_GET_IP_VERSION_HDACODEC (0x00000002U) -#define NV2080_CTRL_GPU_GET_IP_VERSION_PMGR (0x00000003U) -#define NV2080_CTRL_GPU_GET_IP_VERSION_PPWR_PMU (0x00000004U) -#define NV2080_CTRL_GPU_GET_IP_VERSION_DISP_FALCON (0x00000005U) - - +#define NV2080_CTRL_GPU_GET_IP_VERSION_DISPLAY (0x00000001U) +#define NV2080_CTRL_GPU_GET_IP_VERSION_HDACODEC (0x00000002U) +#define NV2080_CTRL_GPU_GET_IP_VERSION_PMGR (0x00000003U) +#define NV2080_CTRL_GPU_GET_IP_VERSION_PPWR_PMU (0x00000004U) +#define NV2080_CTRL_GPU_GET_IP_VERSION_DISP_FALCON (0x00000005U) /* * NV2080_CTRL_CMD_GPU_ID_ILLUM_SUPPORT @@ -2584,37 +2582,39 @@ typedef struct NV2080_CTRL_GPU_SET_PARTITION_INFO { NV_DECLARE_ALIGNED(NV2080_CTRL_GPU_PARTITION_SPAN placement, 8); } NV2080_CTRL_GPU_SET_PARTITION_INFO; -#define PARTITIONID_INVALID NV2080_CTRL_GPU_PARTITION_ID_INVALID -#define NV2080_CTRL_GPU_PARTITION_ID_INVALID 0xFFFFFFFFU -#define NV2080_CTRL_GPU_MAX_PARTITIONS 0x00000008U -#define NV2080_CTRL_GPU_MAX_PARTITION_IDS 0x00000009U -#define NV2080_CTRL_GPU_MAX_SMC_IDS 0x00000008U -#define NV2080_CTRL_GPU_MAX_GPC_PER_SMC 0x0000000cU -#define NV2080_CTRL_GPU_MAX_CE_PER_SMC 0x00000008U +#define PARTITIONID_INVALID NV2080_CTRL_GPU_PARTITION_ID_INVALID +#define NV2080_CTRL_GPU_PARTITION_ID_INVALID 0xFFFFFFFFU +#define NV2080_CTRL_GPU_MAX_PARTITIONS 0x00000008U +#define NV2080_CTRL_GPU_MAX_PARTITION_IDS 0x00000009U +#define NV2080_CTRL_GPU_MAX_SMC_IDS 0x00000008U +#define NV2080_CTRL_GPU_MAX_GPC_PER_SMC 0x0000000cU +#define NV2080_CTRL_GPU_MAX_CE_PER_SMC 0x00000008U #define NV2080_CTRL_GPU_PARTITION_FLAG_MEMORY_SIZE 1:0 -#define NV2080_CTRL_GPU_PARTITION_FLAG_MEMORY_SIZE_FULL 0x00000000U -#define NV2080_CTRL_GPU_PARTITION_FLAG_MEMORY_SIZE_HALF 0x00000001U -#define NV2080_CTRL_GPU_PARTITION_FLAG_MEMORY_SIZE_QUARTER 0x00000002U -#define NV2080_CTRL_GPU_PARTITION_FLAG_MEMORY_SIZE_EIGHTH 0x00000003U -#define NV2080_CTRL_GPU_PARTITION_FLAG_MEMORY_SIZE__SIZE 4U +#define NV2080_CTRL_GPU_PARTITION_FLAG_MEMORY_SIZE_FULL 0x00000000U +#define NV2080_CTRL_GPU_PARTITION_FLAG_MEMORY_SIZE_HALF 0x00000001U +#define NV2080_CTRL_GPU_PARTITION_FLAG_MEMORY_SIZE_QUARTER 0x00000002U +#define NV2080_CTRL_GPU_PARTITION_FLAG_MEMORY_SIZE_EIGHTH 0x00000003U +#define NV2080_CTRL_GPU_PARTITION_FLAG_MEMORY_SIZE__SIZE 4U #define NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE 4:2 -#define NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_FULL 0x00000000U -#define NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_HALF 0x00000001U -#define NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_MINI_HALF 0x00000002U -#define NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_QUARTER 0x00000003U -#define NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_MINI_QUARTER 0x00000004U -#define NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_EIGHTH 0x00000005U -#define NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE__SIZE 6U - - -#define NV2080_CTRL_GPU_PARTITION_MAX_TYPES 20U +#define NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_FULL 0x00000000U +#define NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_HALF 0x00000001U +#define NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_MINI_HALF 0x00000002U +#define NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_QUARTER 0x00000003U +#define NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_MINI_QUARTER 0x00000004U +#define NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_EIGHTH 0x00000005U +#define NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_RESERVED_INTERNAL_06 0x00000006U +#define NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_RESERVED_INTERNAL_07 0x00000007U +#define NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE__SIZE 8U + + +#define NV2080_CTRL_GPU_PARTITION_MAX_TYPES 40U #define NV2080_CTRL_GPU_PARTITION_FLAG_REQ_DEC_JPG_OFA 30:30 -#define NV2080_CTRL_GPU_PARTITION_FLAG_REQ_DEC_JPG_OFA_DISABLE 0U -#define NV2080_CTRL_GPU_PARTITION_FLAG_REQ_DEC_JPG_OFA_ENABLE 1U +#define NV2080_CTRL_GPU_PARTITION_FLAG_REQ_DEC_JPG_OFA_DISABLE 0U +#define NV2080_CTRL_GPU_PARTITION_FLAG_REQ_DEC_JPG_OFA_ENABLE 1U #define NV2080_CTRL_GPU_PARTITION_FLAG_PLACE_AT_SPAN 31:31 -#define NV2080_CTRL_GPU_PARTITION_FLAG_PLACE_AT_SPAN_DISABLE 0U -#define NV2080_CTRL_GPU_PARTITION_FLAG_PLACE_AT_SPAN_ENABLE 1U +#define NV2080_CTRL_GPU_PARTITION_FLAG_PLACE_AT_SPAN_DISABLE 0U +#define NV2080_CTRL_GPU_PARTITION_FLAG_PLACE_AT_SPAN_ENABLE 1U // TODO XXX Bug 2657907 Remove these once clients update #define NV2080_CTRL_GPU_PARTITION_FLAG_FULL_GPU (DRF_DEF(2080, _CTRL_GPU_PARTITION_FLAG, _MEMORY_SIZE, _FULL) | DRF_DEF(2080, _CTRL_GPU_PARTITION_FLAG, _COMPUTE_SIZE, _FULL)) @@ -4328,11 +4328,11 @@ typedef struct NV2080_CTRL_GPU_GET_CONSTRUCTED_FALCON_INFO_PARAMS { } NV2080_CTRL_GPU_GET_CONSTRUCTED_FALCON_INFO_PARAMS; /* - * NV2080_CTRL_CMD_GPU_GET_VF_CAPS + * NV2080_CTRL_CMD_GPU_GET_VF_CAPS * * This command will return the MSIX capabilities for virtual function * Parameters: - * + * * gfid [IN] * The GPU function identifier for a given VF BDF * @@ -4357,6 +4357,33 @@ typedef struct NV2080_CTRL_GPU_GET_VF_CAPS_PARAMS { NV2080_VF_MSIX_CAPS vfMsixCap; } NV2080_CTRL_GPU_GET_VF_CAPS_PARAMS; +/* + * NV2080_CTRL_CMD_GPU_GET_RECOVERY_ACTION + * + * Gets the recovery action needed for the device after a failure. + * + * action [OUT] + * Returns the recovery action needed. + * + * Possible status return values are: + * NV_OK + * NV_ERR_NOT_SUPPORTED + */ +#define NV2080_CTRL_CMD_GPU_GET_RECOVERY_ACTION (0x208001b2U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_GPU_INTERFACE_ID << 8) | NV2080_CTRL_GPU_GET_RECOVERY_ACTION_PARAMS_MESSAGE_ID" */ + +typedef enum NV2080_CTRL_GPU_RECOVERY_ACTION { + NV2080_CTRL_GPU_RECOVERY_ACTION_NONE = 0, + NV2080_CTRL_GPU_RECOVERY_ACTION_GPU_RESET = 1, + NV2080_CTRL_GPU_RECOVERY_ACTION_NODE_REBOOT = 2, + NV2080_CTRL_GPU_RECOVERY_ACTION_DRAIN_P2P = 3, +} NV2080_CTRL_GPU_RECOVERY_ACTION; + +#define NV2080_CTRL_GPU_GET_RECOVERY_ACTION_PARAMS_MESSAGE_ID (0xB2U) + +typedef struct NV2080_CTRL_GPU_GET_RECOVERY_ACTION_PARAMS { + NV2080_CTRL_GPU_RECOVERY_ACTION action; +} NV2080_CTRL_GPU_GET_RECOVERY_ACTION_PARAMS; + /* * NV2080_CTRL_GPU_GET_FIPS_STATUS * diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gr.h b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gr.h index 7e4704f443..5ef747e8c4 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gr.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gr.h @@ -309,7 +309,6 @@ typedef NV0080_CTRL_GR_INFO NV2080_CTRL_GR_INFO; #define NV2080_CTRL_GR_INFO_SM_VERSION_8_08 (0x00000808U) #define NV2080_CTRL_GR_INFO_SM_VERSION_8_09 (0x00000809U) #define NV2080_CTRL_GR_INFO_SM_VERSION_9_00 (0x00000900U) - #define NV2080_CTRL_GR_INFO_SM_VERSION_10_00 (0x00000A00U) #define NV2080_CTRL_GR_INFO_SM_VERSION_10_01 (0x00000A01U) @@ -330,7 +329,6 @@ typedef NV0080_CTRL_GR_INFO NV2080_CTRL_GR_INFO; #define NV2080_CTRL_GR_INFO_SM_VERSION_8_8 (NV2080_CTRL_GR_INFO_SM_VERSION_8_08) #define NV2080_CTRL_GR_INFO_SM_VERSION_8_9 (NV2080_CTRL_GR_INFO_SM_VERSION_8_09) #define NV2080_CTRL_GR_INFO_SM_VERSION_9_0 (NV2080_CTRL_GR_INFO_SM_VERSION_9_00) - #define NV2080_CTRL_GR_INFO_SM_VERSION_10_0 (NV2080_CTRL_GR_INFO_SM_VERSION_10_00) #define NV2080_CTRL_GR_INFO_SM_VERSION_10_1 (NV2080_CTRL_GR_INFO_SM_VERSION_10_01) @@ -834,7 +832,8 @@ typedef enum NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS { NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_CONTEXT_POOL = 5, NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_CONTEXT_POOL_CONTROL = 6, NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_CONTEXT_POOL_CONTROL_CPU = 7, - NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_END = 8, + NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_SETUP = 8, + NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_END = 9, } NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS; /* @@ -1909,4 +1908,27 @@ typedef struct NV2080_CTRL_GR_GET_GFX_GPC_AND_TPC_INFO_PARAMS { NvU32 numGfxTpc; } NV2080_CTRL_GR_GET_GFX_GPC_AND_TPC_INFO_PARAMS; +/* + * NV2080_CTRL_GR_SET_LG_SECTOR_PROMOTION + * + * This command grabs information on GFX capable GPC's and TPC's for a specifc GR engine + * + * promoType[IN] + * This parameter specifies what kind of sector promotion to perform + * + */ +#define NV2080_CTRL_CMD_GR_SET_LG_SECTOR_PROMOTION (0x2080123bU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_GR_INTERFACE_ID << 8) | NV2080_CTRL_GR_SET_LG_SECTOR_PROMOTION_PARAMS_MESSAGE_ID" */ + +typedef enum NV2080_CTRL_GR_SET_LG_SECTOR_PROMOTION_TYPE { + NV2080_CTRL_GR_SET_LG_SECTOR_PROMOTION_NONE = 0, + NV2080_CTRL_GR_SET_LG_SECTOR_PROMOTION_64B = 1, + NV2080_CTRL_GR_SET_LG_SECTOR_PROMOTION_128B = 2, +} NV2080_CTRL_GR_SET_LG_SECTOR_PROMOTION_TYPE; + +#define NV2080_CTRL_GR_SET_LG_SECTOR_PROMOTION_PARAMS_MESSAGE_ID (0x3BU) + +typedef struct NV2080_CTRL_GR_SET_LG_SECTOR_PROMOTION_PARAMS { + NV2080_CTRL_GR_SET_LG_SECTOR_PROMOTION_TYPE promoType; +} NV2080_CTRL_GR_SET_LG_SECTOR_PROMOTION_PARAMS; + /* _ctrl2080gr_h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gsp.h b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gsp.h index a84119a02f..ad3b7db66d 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gsp.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gsp.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -87,6 +87,10 @@ typedef struct NV2080_CTRL_GSP_GET_FEATURES_PARAMS { * * This command reports the current GSP-RM heap usage statistics. * + * gfid + * The gfid that's under query: When gfid = 0, it will report the stats of PF. + * Otherwise, it will report stats for RM task's memory consumption associated + * with a given gfid. * managedSize * The total size in bytes of the underlying heap. Note that not all memory * will be allocatable, due to fragmentation and memory allocator/tracking @@ -125,6 +129,7 @@ typedef struct NV2080_CTRL_GSP_RM_HEAP_STATS_SNAPSHOT { #define NV2080_CTRL_GSP_GET_RM_HEAP_STATS_PARAMS_MESSAGE_ID (0x2U) typedef struct NV2080_CTRL_GSP_GET_RM_HEAP_STATS_PARAMS { + NvU32 gfid; NV_DECLARE_ALIGNED(NvU64 managedSize, 8); NV_DECLARE_ALIGNED(NV2080_CTRL_GSP_RM_HEAP_STATS_SNAPSHOT current, 8); NV_DECLARE_ALIGNED(NV2080_CTRL_GSP_RM_HEAP_STATS_SNAPSHOT peak, 8); diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080internal.h b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080internal.h index 8758872874..095097ca13 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080internal.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080internal.h @@ -750,8 +750,9 @@ typedef struct NV2080_CTRL_INTERNAL_DEVICE_INFO { NvU32 groupId; NvU32 ginTargetId; NvU32 deviceBroadcastPriBase; + NvU32 groupLocalInstanceId; } NV2080_CTRL_INTERNAL_DEVICE_INFO; -#define NV2080_CTRL_CMD_INTERNAL_DEVICE_INFO_MAX_ENTRIES 256 +#define NV2080_CTRL_CMD_INTERNAL_DEVICE_INFO_MAX_ENTRIES 512 #define NV2080_CTRL_CMD_INTERNAL_GET_DEVICE_INFO_TABLE (0x20800a40) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS_MESSAGE_ID" */ @@ -1351,6 +1352,12 @@ typedef struct NV2080_CTRL_INTERNAL_VMMU_GET_SPA_FOR_GPA_ENTRIES_PARAMS { * pbTargetAperture [IN] * Indicates the PushBuffer Target Aperture type (IOVA, PCI, PCI_COHERENT or NVM) * + * channelPBSize [IN] + * Indicates the PushBuffer size requested by client + * + * subDeviceId [IN] + * One-hot encoded subDeviceId (i.e. SDM) that will be used to address the channel + * in the pushbuffer stream (via SSDM method) */ #define NV2080_CTRL_CMD_INTERNAL_DISPLAY_CHANNEL_PUSHBUFFER (0x20800a58) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_DISPLAY_CHANNEL_PUSHBUFFER_PARAMS_MESSAGE_ID" */ @@ -1365,6 +1372,8 @@ typedef struct NV2080_CTRL_INTERNAL_DISPLAY_CHANNEL_PUSHBUFFER_PARAMS { NvU32 channelInstance; NvBool valid; NvU32 pbTargetAperture; + NvU32 channelPBSize; + NvU32 subDeviceId; } NV2080_CTRL_INTERNAL_DISPLAY_CHANNEL_PUSHBUFFER_PARAMS; /*! @@ -4024,36 +4033,46 @@ typedef struct NV2080_CTRL_INTERNAL_USER_SHARED_DATA_SET_DATA_POLL_PARAMS { #define NV2080_CTRL_CMD_INTERNAL_USER_SHARED_DATA_SET_DATA_POLL (0x20800aff) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_USER_SHARED_DATA_SET_DATA_POLL_PARAMS_MESSAGE_ID" */ /*! - * NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE_INFO_PARAMS + * NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE_PARAMS * * This structure provides the params for starting GPU Fabric Probe * * tracepointMask[IN] * - tracepoint selection filter + * bufferAddr[IN] + * - physical address of tracing buffer for VGPU * bufferSize[IN] * - size of gsp side logging buffer * bufferWatermark[IN] * - entry threshold for GSP to issue RPC of logged entries to kernel RM - * bStart[IN] - * - if true, start tracing. if false, stop tracing. + * flag[IN] + * - indicates which operation to perform */ -#define NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE_INFO_PARAMS_MESSAGE_ID (0xE3U) +#define NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE_PARAMS_MESSAGE_ID (0xE3U) -typedef struct NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE_INFO_PARAMS { +typedef struct NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE_PARAMS { NV_DECLARE_ALIGNED(NvU64 tracepointMask, 8); - NvU32 bufferSize; - NvU32 bufferWatermark; - NvBool bStart; -} NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE_INFO_PARAMS; + NV_DECLARE_ALIGNED(NvU64 bufferAddr, 8); + NvU32 bufferSize; + NvU32 bufferWatermark; + NvU8 flag; +} NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE_PARAMS; + +/*! + * Macros for INTERNAL_CONTROL_GSP_TRACE flags for specific operation. + */ +#define NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE_FLAG_START_KEEP_OLDEST 0x00U +#define NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE_FLAG_START_KEEP_NEWEST 0x01U +#define NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE_FLAG_STOP 0x02U /* - * NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE + * NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE * * This command is used to start GSP-RM trace tool. - * This command accepts NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE_INFO_PARAMS + * This command accepts NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE_PARAMS * */ -#define NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE (0x208001e3) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_GPU_INTERFACE_ID << 8) | NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE_INFO_PARAMS_MESSAGE_ID" */ +#define NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE (0x208001e3) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_GPU_INTERFACE_ID << 8) | NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE_PARAMS_MESSAGE_ID" */ /* * NV2080_CTRL_CMD_INTERNAL_GET_ENABLED_SEC2_CLASSES @@ -4143,7 +4162,26 @@ typedef struct NV2080_CTRL_INTERNAL_GPU_SET_ILLUM_PARAMS { NvU32 attribute; NvU32 value; } NV2080_CTRL_INTERNAL_GPU_SET_ILLUM_PARAMS; -#define NV2080_CTRL_CMD_INTERNAL_GPU_SET_ILLUM (0x20800aecU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_GPU_SET_ILLUM_PARAMS_MESSAGE_ID" */ +#define NV2080_CTRL_CMD_INTERNAL_GPU_SET_ILLUM (0x20800aecU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_GPU_SET_ILLUM_PARAMS_MESSAGE_ID" */ +/*! + * NV2080_CTRL_CMD_INTERNAL_GSYNC_APPLY_STEREO_PIN_ALWAYS_HI_WAR + * + * @brief NVIDIA RTX 5000 (GP180 SKU500) Windows-specific war + * to pull gpio19 (stereo pin) low for bug3362661. + * + * [in] bApplyStereoPinAlwaysHiWar + * If need to driver stereo pin(GPIO19) low(_IO_INPUT) + * + * @return NV_OK on success + * @return NV_ERR_ otherwise + */ +#define NV2080_CTRL_INTERNAL_GSYNC_APPLY_STEREO_PIN_ALWAYS_HI_WAR_PARAMS_MESSAGE_ID (0xEDU) + +typedef struct NV2080_CTRL_INTERNAL_GSYNC_APPLY_STEREO_PIN_ALWAYS_HI_WAR_PARAMS { + NvBool bApplyStereoPinAlwaysHiWar; +} NV2080_CTRL_INTERNAL_GSYNC_APPLY_STEREO_PIN_ALWAYS_HI_WAR_PARAMS; +#define NV2080_CTRL_CMD_INTERNAL_GSYNC_APPLY_STEREO_PIN_ALWAYS_HI_WAR (0x20800aed) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_GSYNC_APPLY_STEREO_PIN_ALWAYS_HI_WAR_PARAMS_MESSAGE_ID" */ + /*! * NV2080_CTRL_CMD_INTERNAL_HSHUB_GET_MAX_HSHUBS_PER_SHIM * @@ -4154,7 +4192,7 @@ typedef struct NV2080_CTRL_INTERNAL_GPU_SET_ILLUM_PARAMS { * * @return NV_OK */ -#define NV2080_CTRL_CMD_INTERNAL_HSHUB_GET_MAX_HSHUBS_PER_SHIM (0x20800a79) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_HSHUB_GET_MAX_HSHUBS_PER_SHIM_PARAMS_MESSAGE_ID" */ +#define NV2080_CTRL_CMD_INTERNAL_HSHUB_GET_MAX_HSHUBS_PER_SHIM (0x20800a79) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_HSHUB_GET_MAX_HSHUBS_PER_SHIM_PARAMS_MESSAGE_ID" */ #define NV2080_CTRL_INTERNAL_HSHUB_GET_MAX_HSHUBS_PER_SHIM_PARAMS_MESSAGE_ID (0x79U) @@ -4162,4 +4200,490 @@ typedef struct NV2080_CTRL_INTERNAL_HSHUB_GET_MAX_HSHUBS_PER_SHIM_PARAMS { NvU32 maxHshubs; } NV2080_CTRL_INTERNAL_HSHUB_GET_MAX_HSHUBS_PER_SHIM_PARAMS; + +/*! + * NV2080_CTRL_CMD_INTERNAL_GSYNC_GET_RASTER_MODE + * + * Possible status values returned are: + * NV_OK + * NV_ERR_NOT_SUPPORTED + */ + +#define NV2080_CTRL_INTERNAL_GSYNC_GET_RASTER_SYNC_DECODE_MODE_PARAMS_MESSAGE_ID (0x14U) + +typedef struct NV2080_CTRL_INTERNAL_GSYNC_GET_RASTER_SYNC_DECODE_MODE_PARAMS { + NvU32 rasterSyncDecodeMode; +} NV2080_CTRL_INTERNAL_GSYNC_GET_RASTER_SYNC_DECODE_MODE_PARAMS; + +#define NV2080_CTRL_CMD_INTERNAL_GSYNC_GET_RASTER_SYNC_DECODE_MODE (0x20800a14) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_GSYNC_GET_RASTER_SYNC_DECODE_MODE_PARAMS_MESSAGE_ID" */ + +/* + * NV2080_CTRL_INTERNAL_GPU_GET_PF_BAR1_SPA_PARAMS + * + * This is an internal command sent from kernel-RM to physical-RM to retrieve GPU PF BAR1 SPA + * BAR1 SPA is required for BAR1 mapping in Direct NIC case for DMA(Direct Memory Access) of FB. + * + * spaValue[OUT] + * - BAR1 SPA of GPU PF + */ +#define NV2080_CTRL_INTERNAL_GPU_GET_PF_BAR1_SPA_PARAMS_MESSAGE_ID (0xEEU) + +typedef struct NV2080_CTRL_INTERNAL_GPU_GET_PF_BAR1_SPA_PARAMS { + NV_DECLARE_ALIGNED(NvU64 spaValue, 8); +} NV2080_CTRL_INTERNAL_GPU_GET_PF_BAR1_SPA_PARAMS; +#define NV2080_CTRL_CMD_INTERNAL_GPU_GET_PF_BAR1_SPA (0x20800aee) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_GPU_GET_PF_BAR1_SPA_PARAMS_MESSAGE_ID" */ + +/* + * NV2080_CTRL_CMD_INTERNAL_NVLINK_ENABLE_NVLINK_PEER + * + * This command is used to enable RM NVLink enabled peer state. + * Note: This just updates the RM state. To reflect the state in the registers, + * use NV2080_CTRL_CMD_NVLINK_SET_NVLINK_PEER + * + * [in] peerMask + * Mask of Peer IDs for which USE_NVLINK_PEER needs to be enabled + * [in] bEnable + * Whether the bit needs to be set or unset + * + * Possible status values returned are: + * NV_OK + * If the USE_NVLINK_PEER bit was enabled successfully + * NV_ERR_NOT_SUPPORTED + * If NVLINK is not supported on the chip, or + * If unsetting USE_NVLINK_PEER bit is not supported + * + */ +#define NV2080_CTRL_CMD_INTERNAL_NVLINK_ENABLE_NVLINK_PEER (0x20800a21U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_NVLINK_ENABLE_NVLINK_PEER_PARAMS_MESSAGE_ID" */ + +#define NV2080_CTRL_INTERNAL_NVLINK_ENABLE_NVLINK_PEER_PARAMS_MESSAGE_ID (0x21U) + +typedef struct NV2080_CTRL_INTERNAL_NVLINK_ENABLE_NVLINK_PEER_PARAMS { + NvU32 peerMask; + NvBool bEnable; +} NV2080_CTRL_INTERNAL_NVLINK_ENABLE_NVLINK_PEER_PARAMS; + +/* + * NVLINK Link states + * These should ALWAYS match the nvlink core library defines in nvlink.h + */ +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_OFF 0x00U +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_HS 0x01U +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_SAFE 0x02U +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_FAULT 0x03U +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_RECOVERY 0x04U +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_FAIL 0x05U +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_DETECT 0x06U +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_RESET 0x07U +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_ENABLE_PM 0x08U +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_DISABLE_PM 0x09U +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_SLEEP 0x0AU +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_SAVE_STATE 0x0BU +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_RESTORE_STATE 0x0CU +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_PRE_HS 0x0EU +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_DISABLE_ERR_DETECT 0x0FU +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_LANE_DISABLE 0x10U +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_LANE_SHUTDOWN 0x11U +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_TRAFFIC_SETUP 0x12U +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_INITPHASE1 0x13U +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_INITNEGOTIATE 0x14U +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_POST_INITNEGOTIATE 0x15U +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_INITOPTIMIZE 0x16U +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_POST_INITOPTIMIZE 0x17U +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_DISABLE_HEARTBEAT 0x18U +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_CONTAIN 0x19U +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_INITTL 0x1AU +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_INITPHASE5 0x1BU +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_ALI 0x1CU +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_ACTIVE_PENDING 0x1DU +#define NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_INVALID 0xFFU + +/* + * NVLINK TX Sublink states + * These should ALWAYS match the nvlink core library defines in nvlink.h + */ +#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_HS 0x00U +#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_SINGLE_LANE 0x04U +#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_LOW_POWER 0x04U +#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_TRAIN 0x05U +#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_SAFE 0x06U +#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_OFF 0x07U +#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_COMMON_MODE 0x08U +#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_COMMON_MODE_DISABLE 0x09U +#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_DATA_READY 0x0AU +#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_EQ 0x0BU +#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_PRBS_EN 0x0CU +#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_POST_HS 0x0DU + +/* + * NVLINK RX Sublink states + * These should ALWAYS match the nvlink core library defines in nvlink.h + */ +#define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_HS 0x00U +#define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_SINGLE_LANE 0x04U +#define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_LOW_POWER 0x04U +#define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_TRAIN 0x05U +#define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_SAFE 0x06U +#define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_OFF 0x07U +#define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_RXCAL 0x08U +#define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_INIT_TERM 0x09U + +/* + * Link training seed values + * These should ALWAYS match the values defined in nvlink.h + */ +#define NV2080_CTRL_INTERNAL_NVLINK_MAX_SEED_NUM 6U +#define NV2080_CTRL_INTERNAL_NVLINK_MAX_SEED_BUFFER_SIZE (0x7U) /* finn: Evaluated from "NV2080_CTRL_INTERNAL_NVLINK_MAX_SEED_NUM + 1" */ + +// NVLINK callback types +#define NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_GET_DL_LINK_MODE 0x00U +#define NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_SET_DL_LINK_MODE 0x01U +#define NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_GET_TL_LINK_MODE 0x02U +#define NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_SET_TL_LINK_MODE 0x03U +#define NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_GET_TX_SUBLINK_MODE 0x04U +#define NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_SET_TX_SUBLINK_MODE 0x05U +#define NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_GET_RX_SUBLINK_MODE 0x06U +#define NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_SET_RX_SUBLINK_MODE 0x07U +#define NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_GET_RX_SUBLINK_DETECT 0x08U +#define NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_SET_RX_SUBLINK_DETECT 0x09U +#define NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_WRITE_DISCOVERY_TOKEN 0x0AU +#define NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_READ_DISCOVERY_TOKEN 0x0BU +#define NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_TRAINING_COMPLETE 0x0CU +#define NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_GET_UPHY_LOAD 0x0DU + +/* + * Structure to store the GET_DL_MODE callback params. + * mode + * The current Nvlink DL mode + */ +typedef struct NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_GET_DL_LINK_MODE_PARAMS { + NvU32 mode; +} NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_GET_DL_LINK_MODE_PARAMS; + +/* + * Structure to store the SET_DL_LINK_MODE callback OFF params + * seedData + * The output seed data + */ +typedef struct NV2080_CTRL_INTERNAL_NVLINK_SET_DL_LINK_MODE_OFF_PARAMS { + NvU32 seedData[NV2080_CTRL_INTERNAL_NVLINK_MAX_SEED_BUFFER_SIZE]; +} NV2080_CTRL_INTERNAL_NVLINK_SET_DL_LINK_MODE_OFF_PARAMS; + +/* + * Structure to store the SET_DL_LINK_MODE callback PRE_HS params + * remoteDeviceType + * The input remote Device Type + * ipVerDlPl + * The input DLPL version + */ +typedef struct NV2080_CTRL_INTERNAL_NVLINK_SET_DL_LINK_MODE_PRE_HS_PARAMS { + NvU32 remoteDeviceType; + NvU32 ipVerDlPl; +} NV2080_CTRL_INTERNAL_NVLINK_SET_DL_LINK_MODE_PRE_HS_PARAMS; + +/* + * Structure to store SET_DL_LINK_MODE callback INIT_PHASE1 params + * seedData[] + * The input seed data + */ +typedef struct NV2080_CTRL_INTERNAL_NVLINK_SET_DL_LINK_MODE_INIT_PHASE1_PARAMS { + NvU32 seedData[NV2080_CTRL_INTERNAL_NVLINK_MAX_SEED_BUFFER_SIZE]; +} NV2080_CTRL_INTERNAL_NVLINK_SET_DL_LINK_MODE_INIT_PHASE1_PARAMS; + +/* + * Structure to store the Nvlink Remote and Local SID info + * remoteSid + * The output remote SID + * remoteDeviceType + * The output remote Device Type + * remoteLinkId + * The output remote link ID + * localSid + * The output local SID + */ +typedef struct NV2080_CTRL_INTERNAL_NVLINK_REMOTE_LOCAL_SID_INFO { + NV_DECLARE_ALIGNED(NvU64 remoteSid, 8); + NvU32 remoteDeviceType; + NvU32 remoteLinkId; + NV_DECLARE_ALIGNED(NvU64 localSid, 8); +} NV2080_CTRL_INTERNAL_NVLINK_REMOTE_LOCAL_SID_INFO; + +/* + * Structure to store the SET_DL_LINK_MODE callback POST_INITNEGOTIATE params + * bInitnegotiateConfigGood + * The output bool if the config is good + * remoteLocalSidInfo + * The output structure containing the Nvlink Remote/Local SID info + */ +typedef struct NV2080_CTRL_INTERNAL_NVLINK_SET_DL_LINK_MODE_POST_INITNEGOTIATE_PARAMS { + NvBool bInitnegotiateConfigGood; + NV_DECLARE_ALIGNED(NV2080_CTRL_INTERNAL_NVLINK_REMOTE_LOCAL_SID_INFO remoteLocalSidInfo, 8); +} NV2080_CTRL_INTERNAL_NVLINK_SET_DL_LINK_MODE_POST_INITNEGOTIATE_PARAMS; + +/* + * Structure to store the SET_DL_LINK_MODE callback POST_INITOPTIMIZE params + * bPollDone + * The output bool if the polling has finished + */ +typedef struct NV2080_CTRL_INTERNAL_NVLINK_SET_DL_LINK_MODE_POST_INITOPTIMIZE_PARAMS { + NvBool bPollDone; +} NV2080_CTRL_INTERNAL_NVLINK_SET_DL_LINK_MODE_POST_INITOPTIMIZE_PARAMS; + +/* + * Structure to store the SET_DL_LINK_MODE callback params + * mode + * The input nvlink state to set + * bSync + * The input sync boolean + * linkMode + * The input link mode to be set for the callback + */ +typedef struct NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_SET_DL_LINK_MODE_PARAMS { + NV_DECLARE_ALIGNED(NvU64 mode, 8); + NvBool bSync; + NvU32 linkMode; + union { + NV2080_CTRL_INTERNAL_NVLINK_SET_DL_LINK_MODE_OFF_PARAMS linkModeOffParams; + NV2080_CTRL_INTERNAL_NVLINK_SET_DL_LINK_MODE_PRE_HS_PARAMS linkModePreHsParams; + NV2080_CTRL_INTERNAL_NVLINK_SET_DL_LINK_MODE_INIT_PHASE1_PARAMS linkModeInitPhase1Params; + NV_DECLARE_ALIGNED(NV2080_CTRL_INTERNAL_NVLINK_SET_DL_LINK_MODE_POST_INITNEGOTIATE_PARAMS linkModePostInitNegotiateParams, 8); + NV2080_CTRL_INTERNAL_NVLINK_SET_DL_LINK_MODE_POST_INITOPTIMIZE_PARAMS linkModePostInitOptimizeParams; + } linkModeParams; +} NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_SET_DL_LINK_MODE_PARAMS; + +/* + * Structure to store the GET_TL_MODE callback params. + * mode + * The current Nvlink TL mode + */ +typedef struct NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_GET_TL_LINK_MODE_PARAMS { + NvU32 mode; +} NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_GET_TL_LINK_MODE_PARAMS; + +/* + * Structure to store the SET_TL_LINK_MODE callback params + * mode + * The input nvlink mode to set + * bSync + * The input sync boolean + */ +typedef struct NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_SET_TL_LINK_MODE_PARAMS { + NV_DECLARE_ALIGNED(NvU64 mode, 8); + NvBool bSync; +} NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_SET_TL_LINK_MODE_PARAMS; + +/* + * Structure to store the GET_RX/TX_SUBLINK_MODE callback params + * sublinkMode + * The current Sublink mode + * sublinkSubMode + * The current Sublink sub mode + */ +typedef struct NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_GET_SUBLINK_MODE_PARAMS { + NvU32 sublinkMode; + NvU32 sublinkSubMode; +} NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_GET_SUBLINK_MODE_PARAMS; + +/* + * Structure to store the SET_TL_LINK_MODE callback params + * mode + * The input nvlink mode to set + * bSync + * The input sync boolean + */ +typedef struct NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_SET_TX_SUBLINK_MODE_PARAMS { + NV_DECLARE_ALIGNED(NvU64 mode, 8); + NvBool bSync; +} NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_SET_TX_SUBLINK_MODE_PARAMS; + +/* + * Structure to store the SET_RX_SUBLINK_MODE callback params + * mode + * The input nvlink mode to set + * bSync + * The input sync boolean + */ +typedef struct NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_SET_RX_SUBLINK_MODE_PARAMS { + NV_DECLARE_ALIGNED(NvU64 mode, 8); + NvBool bSync; +} NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_SET_RX_SUBLINK_MODE_PARAMS; + +/* + * Structure to store the GET_RX_SUBLINK_DETECT callback params + * laneRxdetStatusMask + * The output RXDET per-lane status mask + */ +typedef struct NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_GET_RX_DETECT_PARAMS { + NvU32 laneRxdetStatusMask; +} NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_GET_RX_DETECT_PARAMS; + +/* + * Structure to store the SET_RX_DETECT callback params + * bSync + * The input bSync boolean + */ +typedef struct NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_SET_RX_DETECT_PARAMS { + NvBool bSync; +} NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_SET_RX_DETECT_PARAMS; + +/* + * Structure to store the RD_WR_DISCOVERY_TOKEN callback params + * ipVerDlPl + * The input DLPL version + * token + * The output token + */ +typedef struct NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_RD_WR_DISCOVERY_TOKEN_PARAMS { + NvU32 ipVerDlPl; + NV_DECLARE_ALIGNED(NvU64 token, 8); +} NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_RD_WR_DISCOVERY_TOKEN_PARAMS; + +/* + * Structure to store the GET_UPHY_LOAD callback params + * bUnlocked + * The output unlocked boolean + */ +typedef struct NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_GET_UPHY_LOAD_PARAMS { + NvBool bUnlocked; +} NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_GET_UPHY_LOAD_PARAMS; + +/* + * Structure to store the Union of Callback params + * type + * The input type of callback to be executed + */ +typedef struct NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE { + NvU8 type; + union { + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_GET_DL_LINK_MODE_PARAMS getDlLinkMode; + NV_DECLARE_ALIGNED(NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_SET_DL_LINK_MODE_PARAMS setDlLinkMode, 8); + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_GET_TL_LINK_MODE_PARAMS getTlLinkMode; + NV_DECLARE_ALIGNED(NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_SET_TL_LINK_MODE_PARAMS setTlLinkMode, 8); + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_GET_SUBLINK_MODE_PARAMS getTxSublinkMode; + NV_DECLARE_ALIGNED(NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_SET_TX_SUBLINK_MODE_PARAMS setTxSublinkMode, 8); + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_GET_SUBLINK_MODE_PARAMS getRxSublinkMode; + NV_DECLARE_ALIGNED(NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_SET_RX_SUBLINK_MODE_PARAMS setRxSublinkMode, 8); + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_GET_RX_DETECT_PARAMS getRxSublinkDetect; + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_SET_RX_DETECT_PARAMS setRxSublinkDetect; + NV_DECLARE_ALIGNED(NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_RD_WR_DISCOVERY_TOKEN_PARAMS writeDiscoveryToken, 8); + NV_DECLARE_ALIGNED(NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_RD_WR_DISCOVERY_TOKEN_PARAMS readDiscoveryToken, 8); + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_GET_UPHY_LOAD_PARAMS getUphyLoad; + } callbackParams; +} NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE; + +/* + * NV2080_CTRL_CMD_INTERNAL_NVLINK_CORE_CALLBACK + * + * Generic NvLink callback RPC to route commands to GSP + * + * [In] linkdId + * ID of the link to be used + * [In/Out] callBackType + * Callback params + */ +#define NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS_MESSAGE_ID (0x24U) + +typedef struct NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS { + NvU32 linkId; + NV_DECLARE_ALIGNED(NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE callbackType, 8); +} NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS; + +#define NV2080_CTRL_CMD_INTERNAL_NVLINK_CORE_CALLBACK (0x20800a24U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS_MESSAGE_ID" */ + +/* + * NV2080_CTRL_CMD_INTERNAL_NVLINK_UPDATE_REMOTE_LOCAL_SID + * + * Update Remote and Local Sid info via GSP + * + * [In] linkId + * ID of the link to be used + * [Out] remoteLocalSidInfo + * The output structure containing the Nvlink Remote/Local SID info + */ +#define NV2080_CTRL_INTERNAL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS_MESSAGE_ID (0x25U) + +typedef struct NV2080_CTRL_INTERNAL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS { + NvU32 linkId; + NV_DECLARE_ALIGNED(NV2080_CTRL_INTERNAL_NVLINK_REMOTE_LOCAL_SID_INFO remoteLocalSidInfo, 8); +} NV2080_CTRL_INTERNAL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS; + +#define NV2080_CTRL_CMD_INTERNAL_NVLINK_UPDATE_REMOTE_LOCAL_SID (0x20800a25U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS_MESSAGE_ID" */ + +/* + * NV2080_CTRL_CMD_INTERNAL_NVLINK_GET_ALI_ENABLED + * + * Returns if ALI is enabled + * + * [Out] bEnableAli + * Output boolean for ALI enablement + */ +#define NV2080_CTRL_INTERNAL_NVLINK_GET_ALI_ENABLED_PARAMS_MESSAGE_ID (0x29U) + +typedef struct NV2080_CTRL_INTERNAL_NVLINK_GET_ALI_ENABLED_PARAMS { + NvBool bEnableAli; +} NV2080_CTRL_INTERNAL_NVLINK_GET_ALI_ENABLED_PARAMS; + +#define NV2080_CTRL_CMD_INTERNAL_NVLINK_GET_ALI_ENABLED (0x20800a29U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_NVLINK_GET_ALI_ENABLED_PARAMS_MESSAGE_ID" */ + +#define NV2080_CTRL_INTERNAL_NVLINK_UPDATE_HSHUB_MUX_TYPE_PROGRAM 0x0U +#define NV2080_CTRL_INTERNAL_NVLINK_UPDATE_HSHUB_MUX_TYPE_RESET 0x1U + +/* + * NV2080_CTRL_CMD_INTERNAL_NVLINK_UPDATE_HSHUB_MUX + * + * Generic Hshub Mux Update RPC to route commands to GSP + * + * [In] updateType + * HSHUB Mux update type to program or reset Mux + * [In] bSysMem + * Boolean to differentiate between sysmen and peer mem + * [In] peerMask + * Mask of peer IDs. Only parsed when bSysMem is false + */ +#define NV2080_CTRL_INTERNAL_NVLINK_UPDATE_HSHUB_MUX_PARAMS_MESSAGE_ID (0x42U) + +typedef struct NV2080_CTRL_INTERNAL_NVLINK_UPDATE_HSHUB_MUX_PARAMS { + NvBool updateType; + NvBool bSysMem; + NvU32 peerMask; +} NV2080_CTRL_INTERNAL_NVLINK_UPDATE_HSHUB_MUX_PARAMS; + +#define NV2080_CTRL_CMD_INTERNAL_NVLINK_UPDATE_HSHUB_MUX (0x20800a42U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_NVLINK_UPDATE_HSHUB_MUX_PARAMS_MESSAGE_ID" */ + +/* + * NV2080_CTRL_CMD_INTERNAL_NVLINK_PRE_SETUP_NVLINK_PEER + * + * Performs all the necessary actions required before setting a peer on NVLink + * + * [In] peerId + * Peer ID which will be set on NVLink + * [In] peerLinkMask + * Mask of links that connects the given peer + * [In] bNvswitchConn + * Is the GPU connected to NVSwitch + */ +#define NV2080_CTRL_INTERNAL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS_MESSAGE_ID (0x4EU) + +typedef struct NV2080_CTRL_INTERNAL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS { + NvU32 peerId; + NvU32 peerLinkMask; + NvBool bEgmPeer; + NvBool bNvswitchConn; +} NV2080_CTRL_INTERNAL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS; +#define NV2080_CTRL_CMD_INTERNAL_NVLINK_PRE_SETUP_NVLINK_PEER (0x20800a4eU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS_MESSAGE_ID" */ + +/* + * NV2080_CTRL_CMD_INTERNAL_NVLINK_POST_SETUP_NVLINK_PEER + * + * Performs all the necessary actions required after setting a peer on NVLink + * + * [In] peerMask + * Mask of Peer IDs which has been set on NVLink + */ +#define NV2080_CTRL_INTERNAL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS_MESSAGE_ID (0x50U) + +typedef struct NV2080_CTRL_INTERNAL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS { + NvU32 peerMask; +} NV2080_CTRL_INTERNAL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS; +#define NV2080_CTRL_CMD_INTERNAL_NVLINK_POST_SETUP_NVLINK_PEER (0x20800a50U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS_MESSAGE_ID" */ + /* ctrl2080internal_h */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080mc.h b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080mc.h index 99973dfc69..a2e5eb4b72 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080mc.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080mc.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2014-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2014-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -77,6 +77,10 @@ typedef struct NV2080_CTRL_MC_GET_ARCH_INFO_PARAMS { #define NV2080_CTRL_MC_ARCH_INFO_ARCHITECTURE_TU100 (0x00000160) #define NV2080_CTRL_MC_ARCH_INFO_ARCHITECTURE_GA100 (0x00000170) +#define NV2080_CTRL_MC_ARCH_INFO_ARCHITECTURE_GH100 (0x00000180) +#define NV2080_CTRL_MC_ARCH_INFO_ARCHITECTURE_AD100 (0x00000190) +#define NV2080_CTRL_MC_ARCH_INFO_ARCHITECTURE_GB100 (0x000001A0) + /* valid ARCHITECTURE_T23X implementation values */ @@ -109,6 +113,25 @@ typedef struct NV2080_CTRL_MC_GET_ARCH_INFO_PARAMS { #define NV2080_CTRL_MC_ARCH_INFO_IMPLEMENTATION_GA10B (0x0000000B) +/* valid ARCHITECTURE_GH10x implementation values */ +#define NV2080_CTRL_MC_ARCH_INFO_IMPLEMENTATION_GH100 (0x00000000) +#define NV2080_CTRL_MC_ARCH_INFO_IMPLEMENTATION_GH100_SOC (0x00000001) + +/* valid ARCHITECTURE_AD10x implementation values */ +#define NV2080_CTRL_MC_ARCH_INFO_IMPLEMENTATION_AD100 (0x00000000) +#define NV2080_CTRL_MC_ARCH_INFO_IMPLEMENTATION_AD000 (0x00000001) +#define NV2080_CTRL_MC_ARCH_INFO_IMPLEMENTATION_AD101 (0x00000001) +#define NV2080_CTRL_MC_ARCH_INFO_IMPLEMENTATION_AD102 (0x00000002) +#define NV2080_CTRL_MC_ARCH_INFO_IMPLEMENTATION_AD103 (0x00000003) +#define NV2080_CTRL_MC_ARCH_INFO_IMPLEMENTATION_AD104 (0x00000004) +#define NV2080_CTRL_MC_ARCH_INFO_IMPLEMENTATION_AD106 (0x00000006) +#define NV2080_CTRL_MC_ARCH_INFO_IMPLEMENTATION_AD107 (0x00000007) +#define NV2080_CTRL_MC_ARCH_INFO_IMPLEMENTATION_AD10B (0x0000000B) +/* valid ARCHITECTURE_GB10x implementation values */ +#define NV2080_CTRL_MC_ARCH_INFO_IMPLEMENTATION_GB100 (0x00000000) +#define NV2080_CTRL_MC_ARCH_INFO_IMPLEMENTATION_GB102 (0x00000002) + + /* Valid Chip sub revisions */ #define NV2080_CTRL_MC_ARCH_INFO_SUBREVISION_NO_SUBREVISION (0x00000000) @@ -166,52 +189,6 @@ typedef struct NV2080_CTRL_MC_GET_MANUFACTURER_PARAMS { -/* - * NV2080_CTRL_CMD_MC_QUERY_HOSTCLK_SLOWDOWN_STATUS - * - * This command is used to allow clients to query whether hostclk slowdown is - * disabled. - * - * bDisabled - * This parameter will hold the status of hostclk slowdown - * - * Possible status values returned are: - * NV_OK - * - */ -#define NV2080_CTRL_CMD_MC_QUERY_HOSTCLK_SLOWDOWN_STATUS (0x20801708) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_MC_INTERFACE_ID << 8) | NV2080_CTRL_MC_QUERY_HOSTCLK_SLOWDOWN_STATUS_PARAMS_MESSAGE_ID" */ - -#define NV2080_CTRL_MC_QUERY_HOSTCLK_SLOWDOWN_STATUS_PARAMS_MESSAGE_ID (0x8U) - -typedef struct NV2080_CTRL_MC_QUERY_HOSTCLK_SLOWDOWN_STATUS_PARAMS { - NvBool bDisabled; -} NV2080_CTRL_MC_QUERY_HOSTCLK_SLOWDOWN_STATUS_PARAMS; - -/* - * NV2080_CTRL_CMD_MC_SET_HOSTCLK_SLOWDOWN_STATUS - * - * This command is used to allow clients to disable/enable hostclk slowdown. - * - * bDisable - * When this parameter is set to TRUE, RM should disable hostclk slowdown. - * If it is set to FALSE, RM will attempt to enable hostclk slowdown, but - * in this case, slowdown is NOT guaranteed to be enabled since there may - * be other reason (like regkey) preventing slowdown. - * - * Possible status values returned are: - * NV_OK - * - */ -#define NV2080_CTRL_CMD_MC_SET_HOSTCLK_SLOWDOWN_STATUS (0x20801709) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_MC_INTERFACE_ID << 8) | NV2080_CTRL_MC_SET_HOSTCLK_SLOWDOWN_STATUS_PARAMS_MESSAGE_ID" */ - -#define NV2080_CTRL_MC_SET_HOSTCLK_SLOWDOWN_STATUS_PARAMS_MESSAGE_ID (0x9U) - -typedef struct NV2080_CTRL_MC_SET_HOSTCLK_SLOWDOWN_STATUS_PARAMS { - NvBool bDisable; -} NV2080_CTRL_MC_SET_HOSTCLK_SLOWDOWN_STATUS_PARAMS; - - - /* * NV2080_CTRL_CMD_MC_CHANGE_REPLAYABLE_FAULT_OWNERSHIP * diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080nvlink.h b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080nvlink.h index 28b776dddd..b2649defe7 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080nvlink.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080nvlink.h @@ -104,6 +104,8 @@ typedef struct NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS { * Set if L3 is a supported power state on this subdevice/link, NV_FALSE otherwise. * VALID * Set if this link is supported on this subdevice, NV_FALSE otherwise. This field is used for *per-link* caps only and NOT for global caps. + * UNCONTAINED_ERROR_RECOVERY + * Set if this GPU supports resetless recovery from uncontained packet errors. * */ @@ -121,6 +123,7 @@ typedef struct NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS { #define NV2080_CTRL_NVLINK_CAPS_POWER_STATE_L2 1:0x04 #define NV2080_CTRL_NVLINK_CAPS_POWER_STATE_L3 1:0x08 #define NV2080_CTRL_NVLINK_CAPS_VALID 1:0x10 +#define NV2080_CTRL_NVLINK_CAPS_UNCONTAINED_ERROR_RECOVERY 1:0x20 /* * Size in bytes of nvlink caps table. This value should be one greater @@ -135,10 +138,7 @@ typedef struct NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS { #define NV2080_CTRL_NVLINK_CAPS_NVLINK_VERSION_3_0 (0x00000005U) #define NV2080_CTRL_NVLINK_CAPS_NVLINK_VERSION_3_1 (0x00000006U) #define NV2080_CTRL_NVLINK_CAPS_NVLINK_VERSION_4_0 (0x00000007U) - #define NV2080_CTRL_NVLINK_CAPS_NVLINK_VERSION_5_0 (0x00000008U) - - #define NV2080_CTRL_NVLINK_CAPS_NCI_VERSION_INVALID (0x00000000U) #define NV2080_CTRL_NVLINK_CAPS_NCI_VERSION_1_0 (0x00000001U) #define NV2080_CTRL_NVLINK_CAPS_NCI_VERSION_2_0 (0x00000002U) @@ -146,10 +146,7 @@ typedef struct NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS { #define NV2080_CTRL_NVLINK_CAPS_NCI_VERSION_3_0 (0x00000005U) #define NV2080_CTRL_NVLINK_CAPS_NCI_VERSION_3_1 (0x00000006U) #define NV2080_CTRL_NVLINK_CAPS_NCI_VERSION_4_0 (0x00000007U) - #define NV2080_CTRL_NVLINK_CAPS_NCI_VERSION_5_0 (0x00000008U) - - /* * NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS * @@ -377,10 +374,7 @@ typedef struct NV2080_CTRL_NVLINK_LINK_STATUS_INFO { #define NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_3_0 (0x00000005U) #define NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_3_1 (0x00000006U) #define NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_4_0 (0x00000007U) - #define NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_5_0 (0x00000008U) - - #define NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_INVALID (0x000000FFU) #define NV2080_CTRL_NVLINK_STATUS_NCI_VERSION_1_0 (0x00000001U) @@ -389,10 +383,7 @@ typedef struct NV2080_CTRL_NVLINK_LINK_STATUS_INFO { #define NV2080_CTRL_NVLINK_STATUS_NCI_VERSION_3_0 (0x00000005U) #define NV2080_CTRL_NVLINK_STATUS_NCI_VERSION_3_1 (0x00000006U) #define NV2080_CTRL_NVLINK_STATUS_NCI_VERSION_4_0 (0x00000007U) - #define NV2080_CTRL_NVLINK_STATUS_NCI_VERSION_5_0 (0x00000008U) - - #define NV2080_CTRL_NVLINK_STATUS_NCI_VERSION_INVALID (0x000000FFU) #define NV2080_CTRL_NVLINK_STATUS_NVHS_VERSION_1_0 (0x00000001U) @@ -986,8 +977,6 @@ typedef struct NV2080_CTRL_NVLINK_CLEAR_COUNTERS_PARAMS { #define NV2080_CTRL_NVLINK_COUNTERS_MAX 107U - - #define NV2080_CTRL_NVLINK_COUNTER_MAX_GROUPS 2U #define NV2080_CTRL_NVLINK_COUNTER_MAX_COUNTERS_PER_LINK_IN_REQ 28 #define NV2080_CTRL_NVLINK_COUNTER_V2_GROUP(i) ((i) / 64) @@ -1992,35 +1981,6 @@ typedef struct NV2080_CTRL_CMD_NVLINK_LOCK_LINK_POWER_STATE_PARAMS { NvBool bLockPowerMode; } NV2080_CTRL_CMD_NVLINK_LOCK_LINK_POWER_STATE_PARAMS; -/* - * NV2080_CTRL_CMD_NVLINK_ENABLE_NVLINK_PEER - * - * This command is used to enable RM NVLink enabled peer state. - * Note: This just updates the RM state. To reflect the state in the registers, - * use NV2080_CTRL_CMD_NVLINK_SET_NVLINK_PEER - * - * [in] peerMask - * Mask of Peer IDs for which USE_NVLINK_PEER needs to be enabled - * [in] bEnable - * Whether the bit needs to be set or unset - * - * Possible status values returned are: - * NV_OK - * If the USE_NVLINK_PEER bit was enabled successfully - * NV_ERR_NOT_SUPPORTED - * If NVLINK is not supported on the chip, or - * If unsetting USE_NVLINK_PEER bit is not supported - * - */ -#define NV2080_CTRL_CMD_NVLINK_ENABLE_NVLINK_PEER (0x20803017U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_ENABLE_NVLINK_PEER_PARAMS_MESSAGE_ID" */ - -#define NV2080_CTRL_NVLINK_ENABLE_NVLINK_PEER_PARAMS_MESSAGE_ID (0x17U) - -typedef struct NV2080_CTRL_NVLINK_ENABLE_NVLINK_PEER_PARAMS { - NvU32 peerMask; - NvBool bEnable; -} NV2080_CTRL_NVLINK_ENABLE_NVLINK_PEER_PARAMS; - #define NV2080_CTRL_NVLINK_GET_LP_COUNTERS_COUNT_TX_NVHS 0U #define NV2080_CTRL_NVLINK_GET_LP_COUNTERS_COUNT_TX_EIGHTH 1U #define NV2080_CTRL_NVLINK_GET_LP_COUNTERS_COUNT_TX_OTHER 2U @@ -2068,433 +2028,9 @@ typedef struct NV2080_CTRL_NVLINK_GET_LP_COUNTERS_PARAMS { NvU32 counterValues[NV2080_CTRL_NVLINK_GET_LP_COUNTERS_MAX_COUNTERS]; } NV2080_CTRL_NVLINK_GET_LP_COUNTERS_PARAMS; -#define NV2080_CTRL_CMD_NVLINK_GET_LP_COUNTERS (0x20803018U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_LP_COUNTERS_PARAMS_MESSAGE_ID" */ - -#define NV2080_CTRL_CMD_NVLINK_CLEAR_LP_COUNTERS (0x20803052U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8 | 0x52)" */ - -/* - * NVLINK Link states - * These should ALWAYS match the nvlink core library defines in nvlink.h - */ -#define NV2080_NVLINK_CORE_LINK_STATE_OFF 0x00U -#define NV2080_NVLINK_CORE_LINK_STATE_HS 0x01U -#define NV2080_NVLINK_CORE_LINK_STATE_SAFE 0x02U -#define NV2080_NVLINK_CORE_LINK_STATE_FAULT 0x03U -#define NV2080_NVLINK_CORE_LINK_STATE_RECOVERY 0x04U -#define NV2080_NVLINK_CORE_LINK_STATE_FAIL 0x05U -#define NV2080_NVLINK_CORE_LINK_STATE_DETECT 0x06U -#define NV2080_NVLINK_CORE_LINK_STATE_RESET 0x07U -#define NV2080_NVLINK_CORE_LINK_STATE_ENABLE_PM 0x08U -#define NV2080_NVLINK_CORE_LINK_STATE_DISABLE_PM 0x09U -#define NV2080_NVLINK_CORE_LINK_STATE_SLEEP 0x0AU -#define NV2080_NVLINK_CORE_LINK_STATE_SAVE_STATE 0x0BU -#define NV2080_NVLINK_CORE_LINK_STATE_RESTORE_STATE 0x0CU -#define NV2080_NVLINK_CORE_LINK_STATE_PRE_HS 0x0EU -#define NV2080_NVLINK_CORE_LINK_STATE_DISABLE_ERR_DETECT 0x0FU -#define NV2080_NVLINK_CORE_LINK_STATE_LANE_DISABLE 0x10U -#define NV2080_NVLINK_CORE_LINK_STATE_LANE_SHUTDOWN 0x11U -#define NV2080_NVLINK_CORE_LINK_STATE_TRAFFIC_SETUP 0x12U -#define NV2080_NVLINK_CORE_LINK_STATE_INITPHASE1 0x13U -#define NV2080_NVLINK_CORE_LINK_STATE_INITNEGOTIATE 0x14U -#define NV2080_NVLINK_CORE_LINK_STATE_POST_INITNEGOTIATE 0x15U -#define NV2080_NVLINK_CORE_LINK_STATE_INITOPTIMIZE 0x16U -#define NV2080_NVLINK_CORE_LINK_STATE_POST_INITOPTIMIZE 0x17U -#define NV2080_NVLINK_CORE_LINK_STATE_DISABLE_HEARTBEAT 0x18U -#define NV2080_NVLINK_CORE_LINK_STATE_CONTAIN 0x19U -#define NV2080_NVLINK_CORE_LINK_STATE_INITTL 0x1AU -#define NV2080_NVLINK_CORE_LINK_STATE_INITPHASE5 0x1BU -#define NV2080_NVLINK_CORE_LINK_STATE_ALI 0x1CU -#define NV2080_NVLINK_CORE_LINK_STATE_ACTIVE_PENDING 0x1DU -#define NV2080_NVLINK_CORE_LINK_STATE_INVALID 0xFFU - -/* - * NVLINK TX Sublink states - * These should ALWAYS match the nvlink core library defines in nvlink.h - */ -#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_HS 0x00U -#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_SINGLE_LANE 0x04U -#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_LOW_POWER 0x04U -#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_TRAIN 0x05U -#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_SAFE 0x06U -#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_OFF 0x07U -#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_COMMON_MODE 0x08U -#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_COMMON_MODE_DISABLE 0x09U -#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_DATA_READY 0x0AU -#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_EQ 0x0BU -#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_PRBS_EN 0x0CU -#define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_POST_HS 0x0DU - -/* - * NVLINK RX Sublink states - * These should ALWAYS match the nvlink core library defines in nvlink.h - */ -#define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_HS 0x00U -#define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_SINGLE_LANE 0x04U -#define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_LOW_POWER 0x04U -#define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_TRAIN 0x05U -#define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_SAFE 0x06U -#define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_OFF 0x07U -#define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_RXCAL 0x08U -#define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_INIT_TERM 0x09U - -/* - * Link training seed values - * These should ALWAYS match the values defined in nvlink.h - */ -#define NV2080_CTRL_NVLINK_MAX_SEED_NUM 6U -#define NV2080_CTRL_NVLINK_MAX_SEED_BUFFER_SIZE (0x7U) /* finn: Evaluated from "NV2080_CTRL_NVLINK_MAX_SEED_NUM + 1" */ - -// NVLINK callback types -#define NV2080_CTRL_NVLINK_CALLBACK_TYPE_GET_DL_LINK_MODE 0x00U -#define NV2080_CTRL_NVLINK_CALLBACK_TYPE_SET_DL_LINK_MODE 0x01U -#define NV2080_CTRL_NVLINK_CALLBACK_TYPE_GET_TL_LINK_MODE 0x02U -#define NV2080_CTRL_NVLINK_CALLBACK_TYPE_SET_TL_LINK_MODE 0x03U -#define NV2080_CTRL_NVLINK_CALLBACK_TYPE_GET_TX_SUBLINK_MODE 0x04U -#define NV2080_CTRL_NVLINK_CALLBACK_TYPE_SET_TX_SUBLINK_MODE 0x05U -#define NV2080_CTRL_NVLINK_CALLBACK_TYPE_GET_RX_SUBLINK_MODE 0x06U -#define NV2080_CTRL_NVLINK_CALLBACK_TYPE_SET_RX_SUBLINK_MODE 0x07U -#define NV2080_CTRL_NVLINK_CALLBACK_TYPE_GET_RX_SUBLINK_DETECT 0x08U -#define NV2080_CTRL_NVLINK_CALLBACK_TYPE_SET_RX_SUBLINK_DETECT 0x09U -#define NV2080_CTRL_NVLINK_CALLBACK_TYPE_WRITE_DISCOVERY_TOKEN 0x0AU -#define NV2080_CTRL_NVLINK_CALLBACK_TYPE_READ_DISCOVERY_TOKEN 0x0BU -#define NV2080_CTRL_NVLINK_CALLBACK_TYPE_TRAINING_COMPLETE 0x0CU -#define NV2080_CTRL_NVLINK_CALLBACK_TYPE_GET_UPHY_LOAD 0x0DU - -/* - * Structure to store the GET_DL_MODE callback params. - * mode - * The current Nvlink DL mode - */ -typedef struct NV2080_CTRL_NVLINK_CALLBACK_GET_DL_LINK_MODE_PARAMS { - NvU32 mode; -} NV2080_CTRL_NVLINK_CALLBACK_GET_DL_LINK_MODE_PARAMS; - -/* - * Structure to store the SET_DL_LINK_MODE callback OFF params - * seedData - * The output seed data - */ -typedef struct NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_OFF_PARAMS { - NvU32 seedData[NV2080_CTRL_NVLINK_MAX_SEED_BUFFER_SIZE]; -} NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_OFF_PARAMS; - -/* - * Structure to store the SET_DL_LINK_MODE callback PRE_HS params - * remoteDeviceType - * The input remote Device Type - * ipVerDlPl - * The input DLPL version - */ -typedef struct NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_PRE_HS_PARAMS { - NvU32 remoteDeviceType; - NvU32 ipVerDlPl; -} NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_PRE_HS_PARAMS; - -/* - * Structure to store SET_DL_LINK_MODE callback INIT_PHASE1 params - * seedData[] - * The input seed data - */ -typedef struct NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_INIT_PHASE1_PARAMS { - NvU32 seedData[NV2080_CTRL_NVLINK_MAX_SEED_BUFFER_SIZE]; -} NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_INIT_PHASE1_PARAMS; - -/* - * Structure to store the Nvlink Remote and Local SID info - * remoteSid - * The output remote SID - * remoteDeviceType - * The output remote Device Type - * remoteLinkId - * The output remote link ID - * localSid - * The output local SID - */ -typedef struct NV2080_CTRL_NVLINK_REMOTE_LOCAL_SID_INFO { - NV_DECLARE_ALIGNED(NvU64 remoteSid, 8); - NvU32 remoteDeviceType; - NvU32 remoteLinkId; - NV_DECLARE_ALIGNED(NvU64 localSid, 8); -} NV2080_CTRL_NVLINK_REMOTE_LOCAL_SID_INFO; - -/* - * Structure to store the SET_DL_LINK_MODE callback POST_INITNEGOTIATE params - * bInitnegotiateConfigGood - * The output bool if the config is good - * remoteLocalSidInfo - * The output structure containing the Nvlink Remote/Local SID info - */ -typedef struct NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_POST_INITNEGOTIATE_PARAMS { - NvBool bInitnegotiateConfigGood; - NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_REMOTE_LOCAL_SID_INFO remoteLocalSidInfo, 8); -} NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_POST_INITNEGOTIATE_PARAMS; - -/* - * Structure to store the SET_DL_LINK_MODE callback POST_INITOPTIMIZE params - * bPollDone - * The output bool if the polling has finished - */ -typedef struct NV2080_CTRLNVLINK_SET_DL_LINK_MODE_POST_INITOPTIMIZE_PARAMS { - NvBool bPollDone; -} NV2080_CTRLNVLINK_SET_DL_LINK_MODE_POST_INITOPTIMIZE_PARAMS; - -/* - * Structure to store the SET_DL_LINK_MODE callback params - * mode - * The input nvlink state to set - * bSync - * The input sync boolean - * linkMode - * The input link mode to be set for the callback - */ -typedef struct NV2080_CTRL_NVLINK_CALLBACK_SET_DL_LINK_MODE_PARAMS { - NV_DECLARE_ALIGNED(NvU64 mode, 8); - NvBool bSync; - NvU32 linkMode; - union { - NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_OFF_PARAMS linkModeOffParams; - NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_PRE_HS_PARAMS linkModePreHsParams; - NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_INIT_PHASE1_PARAMS linkModeInitPhase1Params; - NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_POST_INITNEGOTIATE_PARAMS linkModePostInitNegotiateParams, 8); - NV2080_CTRLNVLINK_SET_DL_LINK_MODE_POST_INITOPTIMIZE_PARAMS linkModePostInitOptimizeParams; - } linkModeParams; -} NV2080_CTRL_NVLINK_CALLBACK_SET_DL_LINK_MODE_PARAMS; - -/* - * Structure to store the GET_TL_MODE callback params. - * mode - * The current Nvlink TL mode - */ -typedef struct NV2080_CTRL_NVLINK_CALLBACK_GET_TL_LINK_MODE_PARAMS { - NvU32 mode; -} NV2080_CTRL_NVLINK_CALLBACK_GET_TL_LINK_MODE_PARAMS; - -/* - * Structure to store the SET_TL_LINK_MODE callback params - * mode - * The input nvlink mode to set - * bSync - * The input sync boolean - */ -typedef struct NV2080_CTRL_NVLINK_CALLBACK_SET_TL_LINK_MODE_PARAMS { - NV_DECLARE_ALIGNED(NvU64 mode, 8); - NvBool bSync; -} NV2080_CTRL_NVLINK_CALLBACK_SET_TL_LINK_MODE_PARAMS; - -/* - * Structure to store the GET_RX/TX_SUBLINK_MODE callback params - * sublinkMode - * The current Sublink mode - * sublinkSubMode - * The current Sublink sub mode - */ -typedef struct NV2080_CTRL_NVLINK_CALLBACK_GET_SUBLINK_MODE_PARAMS { - NvU32 sublinkMode; - NvU32 sublinkSubMode; -} NV2080_CTRL_NVLINK_CALLBACK_GET_SUBLINK_MODE_PARAMS; - -/* - * Structure to store the SET_TL_LINK_MODE callback params - * mode - * The input nvlink mode to set - * bSync - * The input sync boolean - */ -typedef struct NV2080_CTRL_NVLINK_CALLBACK_SET_TX_SUBLINK_MODE_PARAMS { - NV_DECLARE_ALIGNED(NvU64 mode, 8); - NvBool bSync; -} NV2080_CTRL_NVLINK_CALLBACK_SET_TX_SUBLINK_MODE_PARAMS; - -/* - * Structure to store the SET_RX_SUBLINK_MODE callback params - * mode - * The input nvlink mode to set - * bSync - * The input sync boolean - */ -typedef struct NV2080_CTRL_NVLINK_CALLBACK_SET_RX_SUBLINK_MODE_PARAMS { - NV_DECLARE_ALIGNED(NvU64 mode, 8); - NvBool bSync; -} NV2080_CTRL_NVLINK_CALLBACK_SET_RX_SUBLINK_MODE_PARAMS; - -/* - * Structure to store the GET_RX_SUBLINK_DETECT callback params - * laneRxdetStatusMask - * The output RXDET per-lane status mask - */ -typedef struct NV2080_CTRL_NVLINK_CALLBACK_GET_RX_DETECT_PARAMS { - NvU32 laneRxdetStatusMask; -} NV2080_CTRL_NVLINK_CALLBACK_GET_RX_DETECT_PARAMS; - -/* - * Structure to store the SET_RX_DETECT callback params - * bSync - * The input bSync boolean - */ -typedef struct NV2080_CTRL_NVLINK_CALLBACK_SET_RX_DETECT_PARAMS { - NvBool bSync; -} NV2080_CTRL_NVLINK_CALLBACK_SET_RX_DETECT_PARAMS; - -/* - * Structure to store the RD_WR_DISCOVERY_TOKEN callback params - * ipVerDlPl - * The input DLPL version - * token - * The output token - */ -typedef struct NV2080_CTRL_NVLINK_CALLBACK_RD_WR_DISCOVERY_TOKEN_PARAMS { - NvU32 ipVerDlPl; - NV_DECLARE_ALIGNED(NvU64 token, 8); -} NV2080_CTRL_NVLINK_CALLBACK_RD_WR_DISCOVERY_TOKEN_PARAMS; - -/* - * Structure to store the GET_UPHY_LOAD callback params - * bUnlocked - * The output unlocked boolean - */ -typedef struct NV2080_CTRL_NVLINK_CALLBACK_GET_UPHY_LOAD_PARAMS { - NvBool bUnlocked; -} NV2080_CTRL_NVLINK_CALLBACK_GET_UPHY_LOAD_PARAMS; - -/* - * Structure to store the Union of Callback params - * type - * The input type of callback to be executed - */ -typedef struct NV2080_CTRL_NVLINK_CALLBACK_TYPE { - NvU8 type; - union { - NV2080_CTRL_NVLINK_CALLBACK_GET_DL_LINK_MODE_PARAMS getDlLinkMode; - NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_CALLBACK_SET_DL_LINK_MODE_PARAMS setDlLinkMode, 8); - NV2080_CTRL_NVLINK_CALLBACK_GET_TL_LINK_MODE_PARAMS getTlLinkMode; - NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_CALLBACK_SET_TL_LINK_MODE_PARAMS setTlLinkMode, 8); - NV2080_CTRL_NVLINK_CALLBACK_GET_SUBLINK_MODE_PARAMS getTxSublinkMode; - NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_CALLBACK_SET_TX_SUBLINK_MODE_PARAMS setTxSublinkMode, 8); - NV2080_CTRL_NVLINK_CALLBACK_GET_SUBLINK_MODE_PARAMS getRxSublinkMode; - NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_CALLBACK_SET_RX_SUBLINK_MODE_PARAMS setRxSublinkMode, 8); - NV2080_CTRL_NVLINK_CALLBACK_GET_RX_DETECT_PARAMS getRxSublinkDetect; - NV2080_CTRL_NVLINK_CALLBACK_SET_RX_DETECT_PARAMS setRxSublinkDetect; - NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_CALLBACK_RD_WR_DISCOVERY_TOKEN_PARAMS writeDiscoveryToken, 8); - NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_CALLBACK_RD_WR_DISCOVERY_TOKEN_PARAMS readDiscoveryToken, 8); - NV2080_CTRL_NVLINK_CALLBACK_GET_UPHY_LOAD_PARAMS getUphyLoad; - } callbackParams; -} NV2080_CTRL_NVLINK_CALLBACK_TYPE; - -/* - * NV2080_CTRL_CMD_NVLINK_CORE_CALLBACK - * - * Generic NvLink callback RPC to route commands to GSP - * - * [In] linkdId - * ID of the link to be used - * [In/Out] callBackType - * Callback params - */ -#define NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS_MESSAGE_ID (0x19U) - -typedef struct NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS { - NvU32 linkId; - NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_CALLBACK_TYPE callbackType, 8); -} NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS; - -#define NV2080_CTRL_CMD_NVLINK_CORE_CALLBACK (0x20803019U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS_MESSAGE_ID" */ - -/* - * NV2080_CTRL_CMD_NVLINK_GET_ALI_ENABLED - * - * Returns if ALI is enabled - * - * [Out] bEnableAli - * Output boolean for ALI enablement - */ -#define NV2080_CTRL_NVLINK_GET_ALI_ENABLED_PARAMS_MESSAGE_ID (0x1aU) - -typedef struct NV2080_CTRL_NVLINK_GET_ALI_ENABLED_PARAMS { - NvBool bEnableAli; -} NV2080_CTRL_NVLINK_GET_ALI_ENABLED_PARAMS; - -#define NV2080_CTRL_CMD_NVLINK_GET_ALI_ENABLED (0x2080301aU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_ALI_ENABLED_PARAMS_MESSAGE_ID" */ - -/* - * NV2080_CTRL_CMD_NVLINK_UPDATE_REMOTE_LOCAL_SID - * - * Update Remote and Local Sid info via GSP - * - * [In] linkId - * ID of the link to be used - * [Out] remoteLocalSidInfo - * The output structure containing the Nvlink Remote/Local SID info - */ -#define NV2080_CTRL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS_MESSAGE_ID (0x1bU) - -typedef struct NV2080_CTRL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS { - NvU32 linkId; - NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_REMOTE_LOCAL_SID_INFO remoteLocalSidInfo, 8); -} NV2080_CTRL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS; - -#define NV2080_CTRL_CMD_NVLINK_UPDATE_REMOTE_LOCAL_SID (0x2080301bU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS_MESSAGE_ID" */ - -#define NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_TYPE_PROGRAM 0x0U -#define NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_TYPE_RESET 0x1U - -/* - * NV2080_CTRL_CMD_NVLINK_UPDATE_HSHUB_MUX - * - * Generic Hshub Mux Update RPC to route commands to GSP - * - * [In] updateType - * HSHUB Mux update type to program or reset Mux - * [In] bSysMem - * Boolean to differentiate between sysmen and peer mem - * [In] peerMask - * Mask of peer IDs. Only parsed when bSysMem is false - */ -#define NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_PARAMS_MESSAGE_ID (0x1cU) - -typedef struct NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_PARAMS { - NvBool updateType; - NvBool bSysMem; - NvU32 peerMask; -} NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_PARAMS; - -#define NV2080_CTRL_CMD_NVLINK_UPDATE_HSHUB_MUX (0x2080301cU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_PARAMS_MESSAGE_ID" */ - -/* - * NV2080_CTRL_CMD_NVLINK_PRE_SETUP_NVLINK_PEER - * - * Performs all the necessary actions required before setting a peer on NVLink - * - * [In] peerId - * Peer ID which will be set on NVLink - * [In] peerLinkMask - * Mask of links that connects the given peer - * [In] bNvswitchConn - * Is the GPU connected to NVSwitch - */ -#define NV2080_CTRL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS_MESSAGE_ID (0x1dU) +#define NV2080_CTRL_CMD_NVLINK_GET_LP_COUNTERS (0x20803018U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_LP_COUNTERS_PARAMS_MESSAGE_ID" */ -typedef struct NV2080_CTRL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS { - NvU32 peerId; - NvU32 peerLinkMask; - NvBool bEgmPeer; - NvBool bNvswitchConn; -} NV2080_CTRL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS; -#define NV2080_CTRL_CMD_NVLINK_PRE_SETUP_NVLINK_PEER (0x2080301dU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS_MESSAGE_ID" */ - -/* - * NV2080_CTRL_CMD_NVLINK_POST_SETUP_NVLINK_PEER - * - * Performs all the necessary actions required after setting a peer on NVLink - * - * [In] peerMask - * Mask of Peer IDs which has been set on NVLink - */ -#define NV2080_CTRL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS_MESSAGE_ID (0x1eU) - -typedef struct NV2080_CTRL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS { - NvU32 peerMask; -} NV2080_CTRL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS; -#define NV2080_CTRL_CMD_NVLINK_POST_SETUP_NVLINK_PEER (0x2080301eU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS_MESSAGE_ID" */ +#define NV2080_CTRL_CMD_NVLINK_CLEAR_LP_COUNTERS (0x20803052U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8 | 0x52)" */ #define NV2080_CTRL_NVLINK_REMOVE_NVLINK_MAPPING_TYPE_SYSMEM 0x1U #define NV2080_CTRL_NVLINK_REMOVE_NVLINK_MAPPING_TYPE_PEER 0x2U @@ -3333,7 +2869,7 @@ typedef struct NV2080_CTRL_NVLINK_INBAND_SEND_DATA_PARAMS { * * [In] linkId * Id of the link on which error occured - * [In] bIsGpuDegraded + * [Out] bIsGpuDegraded * Boolean to track corresponding GPU is degraded or not */ #define NV2080_CTRL_NVLINK_IS_GPU_DEGRADED_PARAMS_MESSAGE_ID (0x41U) @@ -3484,6 +3020,7 @@ typedef struct NV2080_CTRL_NVLINK_IS_REDUCED_CONFIG_PARAMS { #define NV2080_CTRL_CMD_NVLINK_IS_REDUCED_CONFIG (0x20803046U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_IS_REDUCED_CONFIG_PARAMS_MESSAGE_ID" */ + #define NV2080_CTRL_NVLINK_PRM_ACCESS_MAX_LENGTH 496U typedef struct NV2080_CTRL_NVLINK_PRM_DATA { @@ -3513,7 +3050,6 @@ typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_PAOS_PARAMS { } NV2080_CTRL_NVLINK_PRM_ACCESS_PAOS_PARAMS; - /*! * * NV2080_CTRL_CMD_NVLINK_ENABLE_LINKS @@ -3609,15 +3145,6 @@ typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MTECR_PARAMS { NvU8 slot_index; } NV2080_CTRL_NVLINK_PRM_ACCESS_MTECR_PARAMS; -#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MTWE (0x2080305dU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MTWE_PARAMS_MESSAGE_ID" */ - -#define NV2080_CTRL_NVLINK_PRM_ACCESS_MTWE_PARAMS_MESSAGE_ID (0x5dU) - -typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MTWE_PARAMS { - NvBool bWrite; - NV2080_CTRL_NVLINK_PRM_DATA prm; -} NV2080_CTRL_NVLINK_PRM_ACCESS_MTWE_PARAMS; - #define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MTEWE (0x2080305eU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MTEWE_PARAMS_MESSAGE_ID" */ #define NV2080_CTRL_NVLINK_PRM_ACCESS_MTEWE_PARAMS_MESSAGE_ID (0x5eU) @@ -3663,28 +3190,6 @@ typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_PMTU_PARAMS { NvU16 admin_mtu; } NV2080_CTRL_NVLINK_PRM_ACCESS_PMTU_PARAMS; -#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MCIA (0x20803063U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MCIA_PARAMS_MESSAGE_ID" */ - -#define NV2080_CTRL_NVLINK_PRM_ACCESS_MCIA_PARAMS_MESSAGE_ID (0x63U) - -typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MCIA_PARAMS { - NvBool bWrite; - NV2080_CTRL_NVLINK_PRM_DATA prm; - NvU8 slot_index; - NvU8 module; - NvBool pnv; - NvBool l; - NvU16 device_address; - NvU8 page_number; - NvU8 i2c_device_address; - NvU16 size; - NvU8 bank_number; - NvBool passwd_length; - NvU32 password; - NvU32 dword[32]; - NvU32 password_msb; -} NV2080_CTRL_NVLINK_PRM_ACCESS_MCIA_PARAMS; - #define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_PMLP (0x20803064U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_PMLP_PARAMS_MESSAGE_ID" */ #define NV2080_CTRL_NVLINK_PRM_ACCESS_PMLP_PARAMS_MESSAGE_ID (0x64U) @@ -4109,6 +3614,136 @@ typedef struct NV2080_CTRL_NVLINK_GET_PLATFORM_INFO_PARAMS { NvU8 moduleId; } NV2080_CTRL_NVLINK_GET_PLATFORM_INFO_PARAMS; +/* + * Structure to store UPHY cmd data. + * laneId + * Lane ID for specified link + * address + * Desired address for read + */ +typedef struct NV2080_CTRL_NVLINK_UPHY_CLN_CMD { + NvU8 pllIndex; + NvU16 address; +} NV2080_CTRL_NVLINK_UPHY_CLN_CMD; + +#define NV2080_CTRL_NVLINK_BLACKWELL_MAX_LINKS 18U + +/* + * NV2080_CTRL_CMD_NVLINK_READ_UPHY_CLN + * + * + * This command retrieves the land id cln select, lane id, and pll index. + * + * [in] linkMask + * Mask of links whose uphy should be read + * [in] uphyCmd + * Array of input data (pll index and address) for each link, + * where index 0 represents link 0's pll index + * and index 16 represents link 16's pll index. + * [out] data + * Data from uphy cln for each link where index 0 represents link 0's pll index + * and index 16 represents link 16's pll index. + * + * Possible status values returned are: + * NV_OK + * If the minion command completed successfully + * NV_ERR_NOT_SUPPORTED + * If NVLINK is not supported on the chip + * NV_ERR_INVALID_ARGUMENT + * If the link is not enabled on the GPU or the lane is invalid + * NV_ERR_TIMEOUT + * If a timeout occurred waiting for minion response + */ +#define NV2080_CTRL_CMD_NVLINK_READ_UPHY_CLN (0x20803084U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_READ_UPHY_CLN_REG_PARAMS_MESSAGE_ID" */ + +#define NV2080_CTRL_NVLINK_READ_UPHY_CLN_REG_PARAMS_MESSAGE_ID (0x84U) + +typedef struct NV2080_CTRL_NVLINK_READ_UPHY_CLN_REG_PARAMS { + NvU32 linkMask; + NV2080_CTRL_NVLINK_UPHY_CLN_CMD uphyCmd[NV2080_CTRL_NVLINK_BLACKWELL_MAX_LINKS]; + NvU32 data[NV2080_CTRL_NVLINK_BLACKWELL_MAX_LINKS]; +} NV2080_CTRL_NVLINK_READ_UPHY_CLN_REG_PARAMS; + +#define NV2080_CTRL_NVLINK_SUPPORTED_MAX_BW_MODE_COUNT 23U + +/* + * NV2080_CTRL_CMD_NVLINK_GET_SUPPORTED_BW_MODE + * + * This command gets the supported RBMs of the GPU + * + * [out] rbmModesList + * List of supported RBM modes + * [out] rbmTotalModes + * Total RBM modes supported + * Possible status values returned are: TODO: Update this + * NV_OK + * If the BW mode is retrieved successfully + * NV_ERR_NOT_SUPPORTED + * If NVLINK is not supported on the chip + * NV_ERR_INVALID_ARGUMENT + * If the link is not enabled on the GPU + * NV_ERR_INVALID_STATE + * If the link is in an invalid state + */ +#define NV2080_CTRL_CMD_NVLINK_GET_SUPPORTED_BW_MODE (0x20803085U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_SUPPORTED_BW_MODE_PARAMS_MESSAGE_ID" */ + +#define NV2080_CTRL_NVLINK_GET_SUPPORTED_BW_MODE_PARAMS_MESSAGE_ID (0x85U) + +typedef struct NV2080_CTRL_NVLINK_GET_SUPPORTED_BW_MODE_PARAMS { + NvU8 rbmModesList[NV2080_CTRL_NVLINK_SUPPORTED_MAX_BW_MODE_COUNT]; + NvU8 rbmTotalModes; +} NV2080_CTRL_NVLINK_GET_SUPPORTED_BW_MODE_PARAMS; + +/* + * NV2080_CTRL_CMD_NVLINK_SET_BW_MODE + * + * This command sets the requested RBM of the GPU + * + * [in] rbmMode + * Requested RBM mode + * + * Possible status values returned are: TODO: Update this + * NV_OK + * If the BW mode is set successfully + * NV_ERR_NOT_SUPPORTED + * If NVLINK is not supported on the chip + * NV_ERR_INVALID_ARGUMENT + * If the link is not enabled on the GPU + * NV_ERR_INVALID_STATE + * If the link is in an invalid state + */ +#define NV2080_CTRL_CMD_NVLINK_SET_BW_MODE (0x20803086U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_SET_BW_MODE_PARAMS_MESSAGE_ID" */ + +#define NV2080_CTRL_NVLINK_SET_BW_MODE_PARAMS_MESSAGE_ID (0x86U) + +typedef struct NV2080_CTRL_NVLINK_SET_BW_MODE_PARAMS { + NvU8 rbmMode; +} NV2080_CTRL_NVLINK_SET_BW_MODE_PARAMS; + +/* + * NV2080_CTRL_CMD_NVLINK_GET_BW_MODE + * + * This command gets the set RBM of the GPU + * + * [out] rbmMode + * RBM mode currently set + * + * Possible status values returned are: TODO: Update this + * NV_OK + * If the BW mode is set successfully + * NV_ERR_NOT_SUPPORTED + * If NVLINK is not supported on the chip + * NV_ERR_INVALID_ARGUMENT + * If the link is not enabled on the GPU + * NV_ERR_INVALID_STATE + * If the link is in an invalid state + */ +#define NV2080_CTRL_CMD_NVLINK_GET_BW_MODE (0x20803087U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_BW_MODE_PARAMS_MESSAGE_ID" */ +#define NV2080_CTRL_NVLINK_GET_BW_MODE_PARAMS_MESSAGE_ID (0x87U) + +typedef struct NV2080_CTRL_NVLINK_GET_BW_MODE_PARAMS { + NvU8 rbmMode; +} NV2080_CTRL_NVLINK_GET_BW_MODE_PARAMS; /* _ctrl2080nvlink_h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080spdm.h b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080spdm.h index 60cab30907..4c251659d5 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080spdm.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080spdm.h @@ -40,21 +40,23 @@ * @brief SPDM Command Types * */ -#define RM_GSP_SPDM_CMD_ID_CC_INIT (0x1) -#define RM_GSP_SPDM_CMD_ID_CC_DEINIT (0x2) -#define RM_GSP_SPDM_CMD_ID_CC_CTRL (0x3) -#define RM_GSP_SPDM_CMD_ID_CC_INIT_RM_DATA (0x4) -#define RM_GSP_SPDM_CMD_ID_CC_HEARTBEAT_CTRL (0x5) -#define RM_GSP_SPDM_CMD_ID_FIPS_SELFTEST (0x6) +#define RM_GSP_SPDM_CMD_ID_CC_INIT (0x1) +#define RM_GSP_SPDM_CMD_ID_CC_DEINIT (0x2) +#define RM_GSP_SPDM_CMD_ID_CC_CTRL (0x3) +#define RM_GSP_SPDM_CMD_ID_CC_INIT_RM_DATA (0x4) +#define RM_GSP_SPDM_CMD_ID_CC_HEARTBEAT_CTRL (0x5) +#define RM_GSP_SPDM_CMD_ID_FIPS_SELFTEST (0x6) -#define RM_GSP_SPDM_CMD_ID_INVALID_COMMAND (0xFF) +#define RM_GSP_SPDM_CMD_ID_INVALID_COMMAND (0xFF) +#define SPDM_SESSION_ESTABLISHMENT_TRANSCRIPT_BUFFER_SIZE 0x2400 -#define RSVD7_SIZE 16 -#define RSVD8_SIZE 2 +#define RSVD7_SIZE 16 + +#define RSVD8_SIZE 2 /*! * Guest RM provides INIT context @@ -227,5 +229,20 @@ typedef struct NV2080_CTRL_INTERNAL_SPDM_PARTITION_PARAMS { RM_GSP_SPDM_MSG msg; } NV2080_CTRL_INTERNAL_SPDM_PARTITION_PARAMS; +/* + * NV2080_CTRL_INTERNAL_SPDM_RETRIEVE_TRANSCRIPT + * + * This command retrieves the transcript of SPDM session establishment messages. + * + */ +#define NV2080_CTRL_INTERNAL_SPDM_RETRIEVE_TRANSCRIPT (0x20800ada) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_SPDM_RETRIEVE_TRANSCRIPT_PARAMS_MESSAGE_ID" */ + +#define NV2080_CTRL_INTERNAL_SPDM_RETRIEVE_TRANSCRIPT_PARAMS_MESSAGE_ID (0xDAU) + +typedef struct NV2080_CTRL_INTERNAL_SPDM_RETRIEVE_TRANSCRIPT_PARAMS { + NvU8 transcript[SPDM_SESSION_ESTABLISHMENT_TRANSCRIPT_BUFFER_SIZE]; + NvU32 transcriptSize; +} NV2080_CTRL_INTERNAL_SPDM_RETRIEVE_TRANSCRIPT_PARAMS; + diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080vgpumgrinternal.h b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080vgpumgrinternal.h index eeeceb1a88..717b1e2ad1 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080vgpumgrinternal.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080vgpumgrinternal.h @@ -438,4 +438,24 @@ typedef struct NV2080_CTRL_VGPU_MGR_INTERNAL_FREE_STATES_PARAMS { NvU32 flags; } NV2080_CTRL_VGPU_MGR_INTERNAL_FREE_STATES_PARAMS; +/* + * NV2080_CTRL_CMD_VGPU_MGR_INTERNAL_GET_FRAME_RATE_LIMITER_STATUS + * + * Returns information whether frame rate limiter is disabled. + * + * bFlrDisabled [OUT] + * True, if frame rate limiter is disabled. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_INVALID_STATE + */ +#define NV2080_CTRL_CMD_VGPU_MGR_INTERNAL_GET_FRAME_RATE_LIMITER_STATUS (0x2080400d) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_VGPU_MGR_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_VGPU_MGR_GET_FRAME_RATE_LIMITER_STATUS_PARAMS_MESSAGE_ID" */ + +#define NV2080_CTRL_VGPU_MGR_GET_FRAME_RATE_LIMITER_STATUS_PARAMS_MESSAGE_ID (0xDU) + +typedef struct NV2080_CTRL_VGPU_MGR_GET_FRAME_RATE_LIMITER_STATUS_PARAMS { + NvBool bFlrDisabled; +} NV2080_CTRL_VGPU_MGR_GET_FRAME_RATE_LIMITER_STATUS_PARAMS; + /* _ctrl2080vgpumgrinternal_h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl208f.h b/src/common/sdk/nvidia/inc/ctrl/ctrl208f.h index 38929e0367..f467e0ab8f 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl208f.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl208f.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2006-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2006-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -48,5 +48,5 @@ #include "ctrl208f/ctrl208fdma.h" #include "ctrl208f/ctrl208fmmu.h" #include "ctrl208f/ctrl208fucodecoverage.h" - +#include "ctrl208f/ctrl208fpmu.h" diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208ffb.h b/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208ffb.h index 78139a7c3b..41825448b4 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208ffb.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208ffb.h @@ -306,8 +306,10 @@ typedef struct NV208F_CTRL_CMD_FB_ECC_GET_FORWARD_MAP_ADDRESS_PARAMS { NvU32 col; NvU32 extBank; NvU32 rank; - NvU32 sublocation; - NvU32 partition; + NvU32 physicalSublocation; + NvU32 physicalPartition; + NvU32 logicalSublocation; + NvU32 logicalPartition; NvU32 writeKillPtr0; NvU32 injectionAddr; NvU32 injectionAddrExt; @@ -462,11 +464,20 @@ typedef struct NV208F_CTRL_FB_ECC_SET_WRITE_KILL_PARAMS { NV_DECLARE_ALIGNED(NvU64 address, 8); } NV208F_CTRL_FB_ECC_SET_WRITE_KILL_PARAMS; +typedef struct NV208F_CTRL_FB_REMAPPING_RBC_ADDRESS_INFO { + NvU32 bank; + NvU32 stackId; + NvU32 row; + NvU32 partition; + NvU32 sublocation; +} NV208F_CTRL_FB_REMAPPING_RBC_ADDRESS_INFO; + +#define NV208F_CTRL_FB_REMAP_ROW_ADDRESS_TYPE_PHYSICAL 0x0 +#define NV208F_CTRL_FB_REMAP_ROW_ADDRESS_TYPE_RBC 0x1 + /* * NV208F_CTRL_FB_REMAPPING_ADDRESS_INFO * - * physicalAddress - * Physical address to be remapped * source * The reason for retirement. Valid values for this parameter are * from NV2080_CTRL_FB_REMAPPED_ROW_SOURCE_* @@ -482,11 +493,23 @@ typedef struct NV208F_CTRL_FB_ECC_SET_WRITE_KILL_PARAMS { * Attempting to remap a reserved row * NV208F_CTRL_FB_REMAP_ROW_STATUS_INTERNAL_ERROR * Some other RM failure + * addressType + * Type of address passed. Valid values are: + * NV208F_CTRL_FB_REMAP_ROW_ADDRESS_TYPE_PHYSICAL + * The specified address is physical address. + * NV208F_CTRL_FB_REMAP_ROW_ADDRESS_TYPE_RBC + * The specified address is DRAM Row Bank Column address. + * address + * Union of physicalAddress and rbcAddress. Set the appropriate one based on the address type. */ typedef struct NV208F_CTRL_FB_REMAPPING_ADDRESS_INFO { - NV_DECLARE_ALIGNED(NvU64 physicalAddress, 8); NvU8 source; NvU32 status; + NvU8 addressType; + union { + NV_DECLARE_ALIGNED(NvU64 physicalAddress, 8); + NV208F_CTRL_FB_REMAPPING_RBC_ADDRESS_INFO rbcAddress; + } address; } NV208F_CTRL_FB_REMAPPING_ADDRESS_INFO; /* valid values for status */ @@ -654,4 +677,51 @@ typedef struct NV208F_CTRL_FB_INJECT_SYSLTC_ECC_ERROR_PARAMS { NV208F_CTRL_FB_ERROR_TYPE errorType; } NV208F_CTRL_FB_INJECT_SYSLTC_ECC_ERROR_PARAMS; +/* + * NV208F_CTRL_CMD_FB_GET_FBPA_PAC_MASKS + * + * This API returns the PAC mask for an FBPA. The format is an array where the + * index is the physical FBPA value and the value at the index is the channel + * mask at the corresponding FBPA. At this time there can only be max 4 + * channels per FBPA. A floorswept FBPA will have a value of 0x0, vs a + * non-floorswept FBPA with no floorswept channels will have a value of 0xf + * + */ +#define NV208F_CTRL_FB_GET_FBPA_PAC_MASKS_MAX_FBPAS 64 + +#define NV208F_CTRL_CMD_FB_GET_FBPA_PAC_MASKS (0x208f0518) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_GET_FBPA_PAC_MASKS_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_FB_GET_FBPA_PAC_MASKS_PARAMS_MESSAGE_ID (0x18U) + +typedef struct NV208F_CTRL_FB_GET_FBPA_PAC_MASKS_PARAMS { + NvU8 fbpas[NV208F_CTRL_FB_GET_FBPA_PAC_MASKS_MAX_FBPAS]; +} NV208F_CTRL_FB_GET_FBPA_PAC_MASKS_PARAMS; + +/* + * NV208F_CTRL_CMD_FB_CONVERT_CHANNEL + * + * This API converts either a channel from physical to logical or vice-versa + * + * conversionType: + * See NV208F_CTRL_FB_CHANNEL_CONVERSION_TYPE + * fbpa: + * The physical fbpa the channel resides + * input: + * Input channel + * output: + * Output channel + */ +#define NV208F_CTRL_CMD_FB_CONVERT_CHANNEL (0x208f0519) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_CONVERT_CHANNEL_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_FB_CONVERT_CHANNEL_PARAMS_MESSAGE_ID (0x19U) + +typedef struct NV208F_CTRL_FB_CONVERT_CHANNEL_PARAMS { + NvU32 conversionType; + NvU32 fbpa; + NvU32 input; + NvU32 output; +} NV208F_CTRL_FB_CONVERT_CHANNEL_PARAMS; + +#define NV208F_CTRL_FB_CHANNEL_CONVERSION_TYPE_LOGICAL_TO_PHYSICAL (0x00000000U) +#define NV208F_CTRL_FB_CHANNEL_CONVERSION_TYPE_PHYSICAL_TO_LOGICAL (0x00000001U) /* _ctrl208ffb_h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208fgpu.h b/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208fgpu.h index 5d8f1d81ab..2edc89b23e 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208fgpu.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208fgpu.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2009-2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2009-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208fmmu.h b/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208fmmu.h index c6f0b1fac6..89b553518a 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208fmmu.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208fmmu.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -69,7 +69,6 @@ typedef struct NV208F_CTRL_MMU_ECC_INJECT_ERROR_PARAMS { NvU8 unit; NvU8 errorType; NvU8 instance; - } NV208F_CTRL_MMU_ECC_INJECT_ERROR_PARAMS; @@ -127,18 +126,18 @@ typedef struct NV208F_CTRL_MMU_GET_NUM_HSHUBMMUS_PARAMS { NvU32 numHshubmmus; } NV208F_CTRL_MMU_GET_NUM_HSHUBMMUS_PARAMS; - /* - * NV208F_CTRL_CMD_MMU_GET_NUM_HUBMMUS - * - * Returns the number of ECC Capable HUBMMUS. - * - * numHubmmus [out] - * Number of Hubmmus - * - * Possible status values returned are: - * NV_OK - * NV_ERR_NOT_SUPPORTED - */ +/* +* NV208F_CTRL_CMD_MMU_GET_NUM_HUBMMUS +* +* Returns the number of ECC Capable HUBMMUS. +* +* numHubmmus [out] +* Number of Hubmmus +* +* Possible status values returned are: +* NV_OK +* NV_ERR_NOT_SUPPORTED +*/ #define NV208F_CTRL_CMD_MMU_GET_NUM_HUBMMUS (0x208f0b04) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_MMU_INTERFACE_ID << 8) | NV208F_CTRL_MMU_GET_NUM_HUBMMUS_PARAMS_MESSAGE_ID" */ #define NV208F_CTRL_MMU_GET_NUM_HUBMMUS_PARAMS_MESSAGE_ID (0x4U) @@ -147,6 +146,4 @@ typedef struct NV208F_CTRL_MMU_GET_NUM_HUBMMUS_PARAMS { NvU32 numHubmmus; } NV208F_CTRL_MMU_GET_NUM_HUBMMUS_PARAMS; - - /* _ctrl208fmmu_h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208fpmu.h b/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208fpmu.h new file mode 100644 index 0000000000..c7880fa205 --- /dev/null +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208fpmu.h @@ -0,0 +1,95 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: ctrl/ctrl208f/ctrl208fpmu.finn +// + +#include "ctrl/ctrl208f/ctrl208fbase.h" + +/* + * NV208F_CTRL_CMD_PMU_ECC_INJECT_ERROR + * + * This ctrl call injects PMU ECC errors. Please see the confluence + * page "ECC" for more information on ECC and ECC injection. + * + * Parameters: + * + * location + * Specifies the PMU HW unit where the injection will occur. + * + * errorType + * Specifies whether the injected error will be correctable or uncorrectable. + * Correctable errors have no effect on running programs while uncorrectable + * errors will cause all channels to be torn down. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_NOT_SUPPORTED + * NV_ERR_INVALID_ARGUMENT + */ +#define NV208F_CTRL_CMD_PMU_ECC_INJECT_ERROR (0x208f0c01) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_PMU_INTERFACE_ID << 8) | NV208F_CTRL_PMU_ECC_INJECT_ERROR_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_PMU_ECC_INJECT_ERROR_PARAMS_MESSAGE_ID (0x1U) + +typedef struct NV208F_CTRL_PMU_ECC_INJECT_ERROR_PARAMS { + NvU8 errorType; +} NV208F_CTRL_PMU_ECC_INJECT_ERROR_PARAMS; + +#define NV208F_CTRL_PMU_ECC_INJECT_ERROR_TYPE 0:0 +#define NV208F_CTRL_PMU_ECC_INJECT_ERROR_TYPE_CORRECTABLE (0x00000000) +#define NV208F_CTRL_PMU_ECC_INJECT_ERROR_TYPE_UNCORRECTABLE (0x00000001) + +/* + * NV208F_CTRL_CMD_PMU_ECC_INJECTION_SUPPORTED + * + * Reports if error injection is supported for the PMU + * + * bCorrectableSupported [out]: + * Boolean value that shows if correcatable errors can be injected. + * + * bUncorrectableSupported [out]: + * Boolean value that shows if uncorrecatable errors can be injected. + * + * Return values: + * NV_OK on success + * NV_ERR_INSUFFICIENT_PERMISSIONS if priv write not enabled. + * NV_ERR_NOT_SUPPORTED otherwise + * + * + */ +#define NV208F_CTRL_CMD_PMU_ECC_INJECTION_SUPPORTED (0x208f0c02) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_PMU_INTERFACE_ID << 8) | NV208F_CTRL_PMU_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_PMU_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID (0x2U) + +typedef struct NV208F_CTRL_PMU_ECC_INJECTION_SUPPORTED_PARAMS { + NvBool bCorrectableSupported; + NvBool bUncorrectableSupported; +} NV208F_CTRL_PMU_ECC_INJECTION_SUPPORTED_PARAMS; + +/* _ctrl208fpmu_h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl5080.h b/src/common/sdk/nvidia/inc/ctrl/ctrl5080.h index 52d027a002..0b46927071 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl5080.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl5080.h @@ -32,7 +32,6 @@ #include "ctrl/ctrlxxxx.h" #include "ctrl/ctrl0080/ctrl0080dma.h" /* NV0080_CTRL_DMA_FILL_PTE_MEM_PARAMS */ #include "ctrl/ctrl2080/ctrl2080dma.h" /* NV2080_CTRL_DMA_* */ -#include "ctrl/ctrl2080/ctrl2080fb.h" /* NV2080_CTRL_FB_* */ #include "ctrl/ctrl2080/ctrl2080fifo.h" /* NV2080_CTRL_FIFO_* */ #include "ctrl/ctrl2080/ctrl2080gpu.h" /* NV2080_CTRL_GPU_* */ #include "ctrl/ctrl2080/ctrl2080gr.h" /* NV2080_CTRL_GR_* */ @@ -101,20 +100,16 @@ typedef struct NV5080_CTRL_DEFERRED_API_PARAMS { NV_DECLARE_ALIGNED(NV2080_CTRL_GPU_PROMOTE_CTX_PARAMS PromoteCtx, 8); - NV2080_CTRL_GPU_EVICT_CTX_PARAMS EvictCtx; + NV2080_CTRL_GPU_EVICT_CTX_PARAMS EvictCtx; - NV2080_CTRL_DMA_INVALIDATE_TLB_PARAMS InvalidateTlb; + NV2080_CTRL_DMA_INVALIDATE_TLB_PARAMS InvalidateTlb; NV_DECLARE_ALIGNED(NV0080_CTRL_DMA_FILL_PTE_MEM_PARAMS FillPteMem, 8); - NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS CacheAllocPolicy; - NV_DECLARE_ALIGNED(NV2080_CTRL_GR_CTXSW_ZCULL_BIND_PARAMS ZcullCtxsw, 8); NV_DECLARE_ALIGNED(NV2080_CTRL_GR_CTXSW_PM_BIND_PARAMS PmCtxsw, 8); - NV2080_CTRL_FB_GPU_CACHE_PROMOTION_POLICY_PARAMS CachePromotePolicy; - NV_DECLARE_ALIGNED(NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS PreemptionCtxsw, 8); } api_bundle; } NV5080_CTRL_DEFERRED_API_PARAMS; @@ -166,20 +161,16 @@ typedef struct NV5080_CTRL_DEFERRED_API_V2_PARAMS { NV_DECLARE_ALIGNED(NV2080_CTRL_GPU_PROMOTE_CTX_PARAMS PromoteCtx, 8); - NV2080_CTRL_GPU_EVICT_CTX_PARAMS EvictCtx; + NV2080_CTRL_GPU_EVICT_CTX_PARAMS EvictCtx; - NV2080_CTRL_DMA_INVALIDATE_TLB_PARAMS InvalidateTlb; + NV2080_CTRL_DMA_INVALIDATE_TLB_PARAMS InvalidateTlb; NV_DECLARE_ALIGNED(NV0080_CTRL_DMA_FILL_PTE_MEM_PARAMS FillPteMem, 8); - NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS CacheAllocPolicy; - NV_DECLARE_ALIGNED(NV2080_CTRL_GR_CTXSW_ZCULL_BIND_PARAMS ZcullCtxsw, 8); NV_DECLARE_ALIGNED(NV2080_CTRL_GR_CTXSW_PM_BIND_PARAMS PmCtxsw, 8); - NV2080_CTRL_FB_GPU_CACHE_PROMOTION_POLICY_PARAMS CachePromotePolicy; - NV_DECLARE_ALIGNED(NV2080_CTRL_FIFO_DISABLE_CHANNELS_PARAMS DisableChannels, 8); NV_DECLARE_ALIGNED(NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS PreemptionCtxsw, 8); diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl83de/ctrl83dedebug.h b/src/common/sdk/nvidia/inc/ctrl/ctrl83de/ctrl83dedebug.h index c798fd705f..1fdc93690f 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl83de/ctrl83dedebug.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl83de/ctrl83dedebug.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2006-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2006-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -1143,5 +1143,19 @@ typedef struct NV83DE_CTRL_DEBUG_READ_MMU_FAULT_INFO_PARAMS { NvU32 count; } NV83DE_CTRL_DEBUG_READ_MMU_FAULT_INFO_PARAMS; +/* + * NV83DE_CTRL_CMD_DEBUG_SET_DROP_DEFERRED_RC + * + * bDropDeferredRc (OUT) + * This indicates whether debugger wants a fault to eventually trigger RC on teardown or be dropped. + */ +#define NV83DE_CTRL_CMD_DEBUG_SET_DROP_DEFERRED_RC (0x83de0329) /* finn: Evaluated from "(FINN_GT200_DEBUGGER_DEBUG_INTERFACE_ID << 8) | NV83DE_CTRL_DEBUG_SET_DROP_DEFERRED_RC_PARAMS_MESSAGE_ID" */ + +#define NV83DE_CTRL_DEBUG_SET_DROP_DEFERRED_RC_PARAMS_MESSAGE_ID (0x29U) + +typedef struct NV83DE_CTRL_DEBUG_SET_DROP_DEFERRED_RC_PARAMS { + NvBool bDropDeferredRc; +} NV83DE_CTRL_DEBUG_SET_DROP_DEFERRED_RC_PARAMS; + /* _ctrl83dedebug_h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl90e7/ctrl90e7base.h b/src/common/sdk/nvidia/inc/ctrl/ctrl90e7/ctrl90e7base.h index f0e5bb347b..a177cf1e86 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl90e7/ctrl90e7base.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl90e7/ctrl90e7base.h @@ -39,6 +39,7 @@ #define NV90E7_CTRL_BBX_LEGACY_PRIVILEGED (0xc1) /* finn: Evaluated from "(NV90E7_CTRL_BBX | NVxxxx_CTRL_LEGACY_PRIVILEGED)" */ #define NV90E7_CTRL_BBX (0x01) #define NV90E7_CTRL_RPR (0x02) +#define NV90E7_CTRL_PREDICTIVE (0x03) /* * NV90E7_CTRL_CMD_NULL diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl90e7/ctrl90e7bbx.h b/src/common/sdk/nvidia/inc/ctrl/ctrl90e7/ctrl90e7bbx.h index dfe589fc6a..5563a66edd 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl90e7/ctrl90e7bbx.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl90e7/ctrl90e7bbx.h @@ -63,3 +63,30 @@ typedef struct NV90E7_CTRL_BBX_GET_LAST_FLUSH_TIME_PARAMS { +/* + * NV90E7_CTRL_CMD_BBX_IS_NVM_FLUSH_ENABLED + * + * This command is used to query whether BBX flushing to non-volatile memory is enabled. + * + * bIsEnabled + * Whether BBX flushing to non-volatile memory is enabled. + * bPeriodicFlush + * Whether BBX periodically flushes to non-volatile memory. + * periodicFlushIntervalSec + * The minimum interval (in seconds) between two consecutive periodic BBX flushes + * if periodic flush is enabled. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_NOT_SUPPORTED + */ +#define NV90E7_CTRL_CMD_BBX_IS_NVM_FLUSH_ENABLED (0x90e70119) /* finn: Evaluated from "(FINN_GF100_SUBDEVICE_INFOROM_BBX_INTERFACE_ID << 8) | NV90E7_CTRL_BBX_IS_NVM_FLUSH_ENABLED_PARAMS_MESSAGE_ID" */ + +#define NV90E7_CTRL_BBX_IS_NVM_FLUSH_ENABLED_PARAMS_MESSAGE_ID (0x19U) + +typedef struct NV90E7_CTRL_BBX_IS_NVM_FLUSH_ENABLED_PARAMS { + NvBool bIsEnabled; + NvBool bPeriodicFlush; + NvU32 periodicFlushIntervalSec; +} NV90E7_CTRL_BBX_IS_NVM_FLUSH_ENABLED_PARAMS; + diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrla081.h b/src/common/sdk/nvidia/inc/ctrl/ctrla081.h index 6fe016b8b7..178114d4cb 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrla081.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrla081.h @@ -242,6 +242,8 @@ typedef struct NVA081_GUEST_VM_INFO { * placementId [OUT] * This param specifies the placement ID of heterogeneous timesliced vGPU instance. * Otherwise it is NVA081_PLACEMENT_ID_INVALID. + * vgpuDevName [OUT] + * This param specifies the VF BDF of the virtual GPU. * */ typedef struct NVA081_HOST_VGPU_DEVICE { @@ -249,7 +251,7 @@ typedef struct NVA081_HOST_VGPU_DEVICE { NvU32 vgpuDeviceInstanceId; NV_DECLARE_ALIGNED(NvU64 vgpuPciId, 8); NvU8 vgpuUuid[VM_UUID_SIZE]; - NvU8 mdevUuid[VM_UUID_SIZE]; + NvU8 vgpuDevName[VM_UUID_SIZE]; NvU32 encoderCapacity; NV_DECLARE_ALIGNED(NvU64 fbUsed, 8); NvU32 eccState; @@ -737,16 +739,25 @@ typedef struct NVA081_CTRL_VGPU_CONFIG_VALIDATE_SWIZZID_PARAMS { * This param specific whether timesliced heterogeneous vGPU is enabled * for different FB sized profiles. * - * vgpuTypeId [IN] - * This param specifies the Type ID for VGPU profile - * * placementId [IN / OUT] * This param specifies the input placement ID provided by hypervisor * or output placement ID reserved by RM for vGPU type ID. * - * TODO : This same RmCtrl will be also be used to provide GSP heap offset - * to CPU plugin when vGPU-GSP is enabled. - * (As guest fb and gsp heap is allocated before A084 object) + * vgpuTypeId [IN] + * This param specifies the Type ID for VGPU profile + * + * guestFbLength [OUT] + * This param specifies the FB size assigned to the VM. + * + * guestFbOffset [OUT] + * This param specifies the starting FB offset assigned to the VM. + * + * gspHeapOffset [OUT] + * This param specifies the heap offset of gsp vgpu task. + * + * guestBar1PFOffset [OUT] + * This param specifies the starting PF BAR1 offset assigned to the VM. + * Only applicable for the legacy GPUs. * * Possible status values returned are: * NV_OK @@ -765,6 +776,7 @@ typedef struct NVA081_CTRL_VGPU_CONFIG_UPDATE_HETEROGENEOUS_INFO_PARAMS { NV_DECLARE_ALIGNED(NvU64 guestFbLength, 8); NV_DECLARE_ALIGNED(NvU64 guestFbOffset, 8); NV_DECLARE_ALIGNED(NvU64 gspHeapOffset, 8); + NV_DECLARE_ALIGNED(NvU64 guestBar1PFOffset, 8); } NVA081_CTRL_VGPU_CONFIG_UPDATE_HETEROGENEOUS_INFO_PARAMS; /* @@ -825,9 +837,15 @@ typedef struct NVA081_CTRL_PGPU_GET_VGPU_STREAMING_CAPABILITY_PARAMS { } NVA081_CTRL_PGPU_GET_VGPU_STREAMING_CAPABILITY_PARAMS; /* vGPU capabilities */ -#define NVA081_CTRL_VGPU_CAPABILITY_MINI_QUARTER_GPU 0 -#define NVA081_CTRL_VGPU_CAPABILITY_COMPUTE_MEDIA_ENGINE_GPU 1 -#define NVA081_CTRL_VGPU_CAPABILITY_WARM_UPDATE 2 +#define NVA081_CTRL_VGPU_CAPABILITY_MINI_QUARTER_GPU 0 +#define NVA081_CTRL_VGPU_CAPABILITY_COMPUTE_MEDIA_ENGINE_GPU 1 +#define NVA081_CTRL_VGPU_CAPABILITY_WARM_UPDATE 2 +#define NVA081_CTRL_VGPU_CAPABILITY_DEVICE_STREAMING 3 +#define NVA081_CTRL_VGPU_CAPABILITY_READ_DEVICE_BUFFER_BW 4 +#define NVA081_CTRL_VGPU_CAPABILITY_WRITE_DEVICE_BUFFER_BW 5 +#define NVA081_CTRL_VGPU_CAPABILITY_HETEROGENEOUS_TIMESLICE_SIZES 6 +#define NVA081_CTRL_VGPU_CAPABILITY_HETEROGENEOUS_TIMESLICE_PROFILES 7 +#define NVA081_CTRL_VGPU_CAPABILITY_FRACTIONAL_MULTI_VGPU 8 /* * NVA081_CTRL_CMD_VGPU_SET_CAPABILITY @@ -846,7 +864,7 @@ typedef struct NVA081_CTRL_PGPU_GET_VGPU_STREAMING_CAPABILITY_PARAMS { * NV_ERR_OBJECT_NOT_FOUND * NV_ERR_INVALID_ARGUMENT */ -#define NVA081_CTRL_CMD_VGPU_SET_CAPABILITY (0xa081011e) /* finn: Evaluated from "(FINN_NVA081_VGPU_CONFIG_VGPU_CONFIG_INTERFACE_ID << 8) | NVA081_CTRL_VGPU_SET_CAPABILITY_PARAMS_MESSAGE_ID" */ +#define NVA081_CTRL_CMD_VGPU_SET_CAPABILITY (0xa081011e) /* finn: Evaluated from "(FINN_NVA081_VGPU_CONFIG_VGPU_CONFIG_INTERFACE_ID << 8) | NVA081_CTRL_VGPU_SET_CAPABILITY_PARAMS_MESSAGE_ID" */ #define NVA081_CTRL_VGPU_SET_CAPABILITY_PARAMS_MESSAGE_ID (0x1eU) @@ -877,20 +895,24 @@ typedef struct NVA081_CTRL_VGPU_SET_CAPABILITY_PARAMS { #define NVA081_CTRL_VGPU_GET_CAPABILITY_PARAMS_MESSAGE_ID (0x1fU) typedef struct NVA081_CTRL_VGPU_GET_CAPABILITY_PARAMS { - NvU32 capability; - NvBool state; + NvU32 capability; + NvU32 state; } NVA081_CTRL_VGPU_GET_CAPABILITY_PARAMS; /* * NVA081_CTRL_CMD_VGPU_SET_VM_NAME * - * This command is to set VM name for KVM. + * This command is to set VM name for the host. * - * vgpuName [IN] - * This param provides the vGPU device name to RM. + * vmIdType [IN] + * This param provides the guest VM ID type based on the host. + * + * guestVmId [IN] + * This param provides the guest VM indentifier to RM based on the host. * * vmName [IN] - * This param provides the VM name of the vGPU device attached. + * This param provides the VM name of the vGPU device attached + * to the above mentioned host VM. * * Possible status values returned are: * NV_OK @@ -903,8 +925,9 @@ typedef struct NVA081_CTRL_VGPU_GET_CAPABILITY_PARAMS { #define NVA081_CTRL_VGPU_SET_VM_NAME_PARAMS_MESSAGE_ID (0x20U) typedef struct NVA081_CTRL_VGPU_SET_VM_NAME_PARAMS { - NvU8 vgpuName[VM_UUID_SIZE]; - NvU8 vmName[NVA081_VM_NAME_SIZE]; + VM_ID_TYPE vmIdType; + NV_DECLARE_ALIGNED(VM_ID guestVmId, 8); + NvU8 vmName[NVA081_VM_NAME_SIZE]; } NVA081_CTRL_VGPU_SET_VM_NAME_PARAMS; /* @@ -957,4 +980,26 @@ typedef struct NVA081_CTRL_VGPU_GET_BAR_INFO_PARAMS { NvBool isBar064bit; } NVA081_CTRL_VGPU_GET_BAR_INFO_PARAMS; +/* + * NVA081_CTRL_CMD_VGPU_CONFIG_GET_MIGRATION_BANDWIDTH + * + * This command is to get the migration bandwidth of the physical GPU. + * + * migrationBandwidth [OUT] + * This param specifies the migration bandwidth of GPU + * + * Possible status values returned are: + * NV_OK + * NV_ERR_INVALID_REQUEST + * NV_ERR_INVALID_STATE + * NV_ERR_INVALID_ARGUMENT + */ +#define NVA081_CTRL_CMD_VGPU_CONFIG_GET_MIGRATION_BANDWIDTH (0xa0810122) /* finn: Evaluated from "(FINN_NVA081_VGPU_CONFIG_VGPU_CONFIG_INTERFACE_ID << 8) | NVA081_CTRL_VGPU_CONFIG_GET_MIGRATION_BANDWIDTH_PARAMS_MESSAGE_ID" */ + +#define NVA081_CTRL_VGPU_CONFIG_GET_MIGRATION_BANDWIDTH_PARAMS_MESSAGE_ID (0x22U) + +typedef struct NVA081_CTRL_VGPU_CONFIG_GET_MIGRATION_BANDWIDTH_PARAMS { + NvU32 migrationBandwidth; +} NVA081_CTRL_VGPU_CONFIG_GET_MIGRATION_BANDWIDTH_PARAMS; + /* _ctrlA081vgpuconfig_h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrla084.h b/src/common/sdk/nvidia/inc/ctrl/ctrla084.h index b86e38e651..d41cdaf343 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrla084.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrla084.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -308,4 +308,52 @@ typedef struct NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_FREE_STATES_PARAMS { NvU32 flags; } NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_FREE_STATES_PARAMS; +#define NVA084_MAX_VMMU_SEGMENTS_COUNT 384 + +/* + * NVA084_CTRL_CMD_KERNEL_HOST_VGPU_DEVICE_BOOTLOAD_VGPU_TASK + * + * This command will update the bootload vGPU task + * + * Possible status values returned are: + * NV_OK + * NV_ERR_INVALID_CLIENT + * NV_ERR_INVALID_ARGUMENT + * NV_ERR_INVALID_OBJECT_HANDLE + * NV_ERR_OBJECT_NOT_FOUND + * NV_ERR_NOT_SUPPORTED + * + * Parameters: + * numGuestFbHandles -> number of guest memory handles, the client handle is hPluginClient + * guestFbHandleList -> handle list to guest memory + * hPluginHeapMemory -> plugin heap memory handle, the client handle is hPluginClient + * ctrlBuffOffset -> offset of control buffer + * initTaskLogBuffOffset -> offset of init task log buffer + * initTaskLogBuffSize -> size of init task log buffer + * vgpuTaskLogBuffOffset -> offset of vgpu task log buffer + * vgpuTaskLogBuffSize -> size of vgpu task log buffer + * kernelLogBuffOffset -> offset of kernel log buffer + * kernelLogBuffSize -> size of kernel log buffer + * hMigRmHeapMemory -> MIG-RM heap memory handle + * bDeviceProfilingEnabled -> If set to true, profiling is allowed + */ +#define NVA084_CTRL_CMD_KERNEL_HOST_VGPU_DEVICE_BOOTLOAD_VGPU_TASK (0xa084010d) /* finn: Evaluated from "(FINN_NVA084_KERNEL_HOST_VGPU_DEVICE_KERNEL_HOST_VGPU_DEVICE_INTERFACE_ID << 8) | NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_BOOTLOAD_VGPU_TASK_PARAMS_MESSAGE_ID" */ + +#define NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_BOOTLOAD_VGPU_TASK_PARAMS_MESSAGE_ID (0xDU) + +typedef struct NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_BOOTLOAD_VGPU_TASK_PARAMS { + NvU32 numGuestFbHandles; + NvHandle guestFbHandleList[NVA084_MAX_VMMU_SEGMENTS_COUNT]; + NvHandle hPluginHeapMemory; + NV_DECLARE_ALIGNED(NvU64 ctrlBuffOffset, 8); + NV_DECLARE_ALIGNED(NvU64 initTaskLogBuffOffset, 8); + NV_DECLARE_ALIGNED(NvU64 initTaskLogBuffSize, 8); + NV_DECLARE_ALIGNED(NvU64 vgpuTaskLogBuffOffset, 8); + NV_DECLARE_ALIGNED(NvU64 vgpuTaskLogBuffSize, 8); + NV_DECLARE_ALIGNED(NvU64 kernelLogBuffOffset, 8); + NV_DECLARE_ALIGNED(NvU64 kernelLogBuffSize, 8); + NvHandle hMigRmHeapMemory; + NvBool bDeviceProfilingEnabled; +} NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_BOOTLOAD_VGPU_TASK_PARAMS; + /* _ctrla084_h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrlb0cc/ctrlb0ccinternal.h b/src/common/sdk/nvidia/inc/ctrl/ctrlb0cc/ctrlb0ccinternal.h index 3e8e16b22a..6c684a006a 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrlb0cc/ctrlb0ccinternal.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrlb0cc/ctrlb0ccinternal.h @@ -135,9 +135,14 @@ typedef struct NVB0CC_CTRL_INTERNAL_PERMISSIONS_INIT_PARAMS { NvBool bDevProfilingPermitted; /*! - * [in] Is Memory profiling permitted + * [in] Is Video memory profiling permitted */ - NvBool bMemoryProfilingPermitted; + NvBool bVideoMemoryProfilingPermitted; + + /*! + * [in] Is SYS memory profiling permitted + */ + NvBool bSysMemoryProfilingPermitted; } NVB0CC_CTRL_INTERNAL_PERMISSIONS_INIT_PARAMS; #define NVB0CC_CTRL_INTERNAL_ALLOC_PMA_STREAM_PARAMS_MESSAGE_ID (0x4U) diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrlb0cc/ctrlb0ccprofiler.h b/src/common/sdk/nvidia/inc/ctrl/ctrlb0cc/ctrlb0ccprofiler.h index b22f0ffea6..d046699868 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrlb0cc/ctrlb0ccprofiler.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrlb0cc/ctrlb0ccprofiler.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -558,7 +558,7 @@ typedef struct NVB0CC_CTRL_RELEASE_HES_PARAMS { /*! * Defines the maximum count of output credit pools. - * 30 is estimate based on the # of PMAs (2) and chiplet types(3), + * 30 is estimate based on the # of PMAs (2) and chiplet types(3), * which should be big enough to accommodate the required number of credit pools */ #define NVB0CC_CREDIT_POOL_MAX_COUNT 30 @@ -566,7 +566,7 @@ typedef struct NVB0CC_CTRL_RELEASE_HES_PARAMS { /*! * NVB0CC_CTRL_CMD_GET_CHIPLET_HS_CREDIT_POOL * - * Gets the total high speed streaming credits available for the client + * Gets the total high speed streaming credits available for the client * in each chiplet pool. * * This command is similar to @ref NVB0CC_CTRL_CMD_GET_TOTAL_HS_CREDITS but @@ -606,25 +606,25 @@ typedef struct NVB0CC_CTRL_GET_CHIPLET_HS_CREDIT_POOL { } NVB0CC_CTRL_GET_CHIPLET_HS_CREDIT_POOL; typedef struct NVB0CC_CTRL_PMA_STREAM_HS_CREDITS_MAPPING_INFO { - /*! - * [in] Specifies the chiplet type @ref NVB0CC_CHIPLET_TYPE. + /*! + * [in] Specifies the chiplet type @ref NVB0CC_CHIPLET_TYPE. */ NvU8 chipletType; - /*! - * [in] Specifies the logical index of the chiplet. + /*! + * [in] Specifies the logical index of the chiplet. */ NvU8 chipletIndex; - /*! - * [out] Specifies the index of credits pool for the chiplet. + /*! + * [out] Specifies the index of credits pool for the chiplet. */ NvU8 poolIndex; } NVB0CC_CTRL_PMA_STREAM_HS_CREDITS_MAPPING_INFO; /*! * NVB0CC_CTRL_CMD_GET_HS_CREDITS_MAPPING - * + * * Query the associated PMA credit pool index for given chiplet. * */ @@ -648,12 +648,10 @@ typedef struct NVB0CC_CTRL_GET_HS_CREDITS_POOL_MAPPING_PARAMS { NVB0CC_CTRL_PMA_STREAM_HS_CREDITS_MAPPING_INFO queries[NVB0CC_MAX_CREDIT_INFO_ENTRIES]; } NVB0CC_CTRL_GET_HS_CREDITS_POOL_MAPPING_PARAMS; - /* End of extension construct */ - /*! * NVB0CC_CTRL_CMD_DISABLE_DYNAMIC_MMA_BOOST - * + * * Disable the Dynamic MMA clock boost during profiler lifetime. * */ @@ -669,7 +667,7 @@ typedef struct NVB0CC_CTRL_DISABLE_DYNAMIC_MMA_BOOST_PARAMS { /*! * NVB0CC_CTRL_CMD_GET_DYNAMIC_MMA_BOOST_STATUS - * + * * Request the Dynamic MMA clock boost feature enablement status. * */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrlc36f.h b/src/common/sdk/nvidia/inc/ctrl/ctrlc36f.h index edb0d08427..7b6bb06bdf 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrlc36f.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrlc36f.h @@ -45,6 +45,7 @@ #define NVC36F_CTRL_RESERVED (0x00) #define NVC36F_CTRL_GPFIFO (0x01) #define NVC36F_CTRL_EVENT (0x02) +#define NVC36F_CTRL_INTERNAL (0x03) /* * NVC36F_CTRL_CMD_NULL @@ -58,22 +59,6 @@ -/* - * NVC36F_CTRL_CMD_EVENT_SET_NOTIFICATION - * - * Please see description of NVA06F_CTRL_CMD_EVENT_SET_NOTIFICATION for more information. -*/ -#define NVC36F_CTRL_CMD_EVENT_SET_NOTIFICATION (0xc36f0205) /* finn: Evaluated from "(FINN_VOLTA_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID << 8) | 0x5" */ - -/* - * NVC36F_CTRL_CMD_EVENT_SET_TRIGGER - * - * Please see description of NVA06F_CTRL_CMD_EVENT_SET_TRIGGER for more information. - */ -#define NVC36F_CTRL_CMD_EVENT_SET_TRIGGER (0xc36f0206) /* finn: Evaluated from "(FINN_VOLTA_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID << 8) | 0x6" */ - - - /* * NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN * @@ -155,5 +140,39 @@ typedef struct NVC36F_CTRL_GPFIFO_SET_WORK_SUBMIT_TOKEN_NOTIF_INDEX_PARAMS { NvU32 index; } NVC36F_CTRL_GPFIFO_SET_WORK_SUBMIT_TOKEN_NOTIF_INDEX_PARAMS; + + +/* + * NVC36F_CTRL_CMD_EVENT_SET_NOTIFICATION + * + * Please see description of NVA06F_CTRL_CMD_EVENT_SET_NOTIFICATION for more information. +*/ +#define NVC36F_CTRL_CMD_EVENT_SET_NOTIFICATION (0xc36f0205) /* finn: Evaluated from "(FINN_VOLTA_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID << 8) | 0x5" */ + +/* + * NVC36F_CTRL_CMD_EVENT_SET_TRIGGER + * + * Please see description of NVA06F_CTRL_CMD_EVENT_SET_TRIGGER for more information. + */ +#define NVC36F_CTRL_CMD_EVENT_SET_TRIGGER (0xc36f0206) /* finn: Evaluated from "(FINN_VOLTA_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID << 8) | 0x6" */ + + + +/* + * NVC36F_CTRL_CMD_INTERNAL_GPFIFO_GET_WORK_SUBMIT_TOKEN + * + * This command is an internal command sent from Kernel RM to Physical RM + * to get work submit token + * + * Please see description of NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN for more information. + * + */ + +#define NVC36F_CTRL_CMD_INTERNAL_GPFIFO_GET_WORK_SUBMIT_TOKEN (0xc36f0301) /* finn: Evaluated from "(FINN_VOLTA_CHANNEL_GPFIFO_A_INTERNAL_INTERFACE_ID << 8) | NVC36F_CTRL_INTERNAL_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS_MESSAGE_ID" */ + +#define NVC36F_CTRL_INTERNAL_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS_MESSAGE_ID (0x1U) + +typedef NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS NVC36F_CTRL_INTERNAL_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS; + /* _ctrlc36f.h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrlc372/ctrlc372chnc.h b/src/common/sdk/nvidia/inc/ctrl/ctrlc372/ctrlc372chnc.h index e18f96cf40..bca0a33939 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrlc372/ctrlc372chnc.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrlc372/ctrlc372chnc.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2015-2021,2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -154,9 +154,9 @@ * means the cursor is disabled. * * head.tileMask - * This parameter specifies the number of tiles which will be assigned to - * the head. Normally, this parameter is set to zero, allowing IMP to - * calculate the number of tiles, but the number of tiles may be specified + * This parameter contains a bitmask specifying which tiles must be + * assigned to the head. Normally, this parameter is set to zero, allowing + * IMP to calculate the number of tiles, but the tiles may be specified * explicitly for test or debug. If the mode is not possible with the * specified number of tiles, IMP will report the result as such; the * number of tiles will not be adjusted. @@ -168,29 +168,32 @@ * optionally be used to force the number of DSC slices. * * head.bEnableDsc - * bEnableDsc indicates whether or not DSC is enabled + * bEnableDsc indicates whether or not DSC is enabled, by default. If it + * is disabled by default, but head.possibleDscSliceCountMask is non-zero, + * IMP may still present tiling solutions with DSC enabled, but only if the + * mode is not possible otherwise. (This will be indicated by a non-zero + * tileList.headDscSlices output.) * * head.dscTargetBppX16 * dscTargetBppX16 is the DSC encoder's target bits per pixel, multiplied * by 16. * * This field is required only on systems that support tiling, and only if - * head.bEnableDsc is true. + * head.possibleDscSliceCountMask is true. * * head.possibleDscSliceCountMask * This is a bit mask indicating how many DSC slices are allowed in a * scanline. If a bit n is set in the bit mask, it means that one possible * configuration has n+1 DSC slices per scanline. * - * This field is required only on systems that support tiling, and only if - * head.bEnableDsc is true. + * This field is required only on systems that support tiling. * * head.maxDscSliceWidth * The maximum allowed DSC slice width is determined by spec restrictions * and monitor capabilities. * * This field is required only on systems that support tiling, and only if - * head.bEnableDsc is true. + * head.possibleDscSliceCountMask is true. * * head.bYUV420Format * This parameter indicates output format is YUV420. @@ -230,6 +233,12 @@ * This parameter is a bitmask of all possible rotated mode data formats * (NVC372_CTRL_FORMAT_xxx values). * + * window.surfaceLayout + * This parameter is the surface layout of the window. It is one of + * NVC372_CTRL_LAYOUT_xxx values. + * The default value of 0U would imply that SW uses legacy equations + * (pre NVD5.0) in its computation for fetch BW. + * * window.maxPixelsFetchedPerLine * This parameter defines the maximum number of pixels that may need to be * fetched in a single line for this window. Often, this can be set to the @@ -517,6 +526,10 @@ * assigned to head 0, bringing the tile total to three for that head. The * number of DSC slices required for that head would be increased to three. * + * Note that the tiling assignments do not specify which tiles to use; they + * only specify how many tiles to assign to each head. The client must + * choose which tiles to assign, based on their capabilities. + * * tilingAssignments.numTiles * This is the number of additional tiles required for the indexed tiling * assignment. The tilingAssignment does not provide any benefit unless @@ -536,6 +549,10 @@ * head (if a single head requires that more than one additional tile be * assigned). * + * tilelist.head indexes heads as they are indexed in the + * NVC372_CTRL_IMP_HEAD array within the IMP input data structure. (These + * do not necessarily correspond to physical head indexes.) + * * tileList.headDscSlices * headDscSlices gives the recommended number of DSC slices for each * scanline for the head specified in tileList.head. If a specific tiling @@ -637,6 +654,7 @@ typedef struct NVC372_CTRL_IMP_WINDOW { NvBool bOverfetchEnabled; NvU8 lut; NvU8 tmoLut; + NvU8 surfaceLayout; } NVC372_CTRL_IMP_WINDOW; typedef struct NVC372_CTRL_IMP_WINDOW *PNVC372_CTRL_IMP_WINDOW; @@ -722,6 +740,11 @@ typedef struct NVC372_CTRL_IS_MODE_POSSIBLE_PARAMS *PNVC372_CTRL_IS_MODE_POSSIBL #define NVC372_CTRL_FORMAT_EXT_YUV_SEMI_PLANAR_422R (0x00008000) #define NVC372_CTRL_FORMAT_EXT_YUV_SEMI_PLANAR_444 (0x00010000) +/* valid layout values */ +#define NVC372_CTRL_LAYOUT_PITCH_BLOCKLINEAR 0 +#define NVC372_CTRL_LAYOUT_PITCH 1 +#define NVC372_CTRL_LAYOUT_BLOCKLINEAR 2 + /* valid impResult values */ #define NVC372_CTRL_IMP_MODE_POSSIBLE 0 #define NVC372_CTRL_IMP_NOT_ENOUGH_MEMPOOL 1 diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrlc56f.h b/src/common/sdk/nvidia/inc/ctrl/ctrlc56f.h index 82352eb0f9..cef6f477bc 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrlc56f.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrlc56f.h @@ -145,7 +145,7 @@ typedef struct NVC56F_CTRL_ROTATE_SECURE_CHANNEL_IV_PARAMS { */ #define SECURITY_POLICY_ATTACKER_ADVANTAGE_DEFAULT (60) #define SET_SECURITY_POLICY_ATTACKER_ADVANTAGE_MIN (50) -#define SET_SECURITY_POLICY_ATTACKER_ADVANTAGE_MAX (75) +#define SET_SECURITY_POLICY_ATTACKER_ADVANTAGE_MAX (65) #define NV_CONF_COMPUTE_CTRL_SET_SECURITY_POLICY (0xc56f010d) /* finn: Evaluated from "(FINN_AMPERE_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NV_CONF_COMPUTE_CTRL_SET_SECURITY_POLICY_PARAMS_MESSAGE_ID" */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrlc637.h b/src/common/sdk/nvidia/inc/ctrl/ctrlc637.h index a06c3e1dd8..f480c0e98c 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrlc637.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrlc637.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2019-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -30,6 +30,7 @@ // Source file: ctrl/ctrlc637.finn // +#include "nvlimits.h" #include "ctrl/ctrlxxxx.h" /* AMPERE_SMC_PARTITION_REF commands and parameters */ @@ -257,9 +258,8 @@ typedef struct NVC637_CTRL_EXEC_PARTITIONS_GET_PARAMS { * NV_ERR_NOT_SUPPORTED */ -/* 'M' 'I' 'G' '-'(x5), '\0x0', extra = 9 */ #define NVC637_UUID_LEN 16 -#define NVC637_UUID_STR_LEN (0x29) /* finn: Evaluated from "((NVC637_UUID_LEN << 1) + 9)" */ +#define NVC637_UUID_STR_LEN NV_MIG_DEVICE_UUID_STR_LENGTH typedef struct NVC637_EXEC_PARTITION_UUID { // C form: char str[NVC638_UUID_STR_LEN]; diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrlc86f.h b/src/common/sdk/nvidia/inc/ctrl/ctrlc86f.h index 0c29242189..9aa36f5d22 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrlc86f.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrlc86f.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrlc96f.h b/src/common/sdk/nvidia/inc/ctrl/ctrlc96f.h index 02fb5b0a68..a317a80396 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrlc96f.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrlc96f.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrlcb33.h b/src/common/sdk/nvidia/inc/ctrl/ctrlcb33.h index 329271dd9d..3ac9f2803c 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrlcb33.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrlcb33.h @@ -108,6 +108,8 @@ #define NV_CONF_COMPUTE_SYSTEM_CPU_CAPABILITY_NONE 0 #define NV_CONF_COMPUTE_SYSTEM_CPU_CAPABILITY_AMD_SEV 1 #define NV_CONF_COMPUTE_SYSTEM_CPU_CAPABILITY_INTEL_TDX 2 +#define NV_CONF_COMPUTE_SYSTEM_CPU_CAPABILITY_AMD_SEV_SNP 3 +#define NV_CONF_COMPUTE_SYSTEM_CPU_CAPABILITY_AMD_SNP_VTOM 4 #define NV_CONF_COMPUTE_SYSTEM_GPUS_CAPABILITY_NONE 0 #define NV_CONF_COMPUTE_SYSTEM_GPUS_CAPABILITY_APM 1 diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrlxxxx.h b/src/common/sdk/nvidia/inc/ctrl/ctrlxxxx.h index 6f03990d2e..c51ea2b4c0 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrlxxxx.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrlxxxx.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2005-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2005-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/common/sdk/nvidia/inc/g_finn_rm_api.h b/src/common/sdk/nvidia/inc/g_finn_rm_api.h index a4d69bfe1c..0a9e3010f2 100644 --- a/src/common/sdk/nvidia/inc/g_finn_rm_api.h +++ b/src/common/sdk/nvidia/inc/g_finn_rm_api.h @@ -257,6 +257,8 @@ typedef FINN_RM_API FINN_NV04_DISPLAY_COMMON_STEREO; #define FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID (0x7301U) typedef FINN_RM_API FINN_NV04_DISPLAY_COMMON_SYSTEM; +#define FINN_NV01_FRAMEBUFFER_CONSOLE_INTERFACE_ID (0x007601U) +typedef FINN_RM_API FINN_NV01_FRAMEBUFFER_CONSOLE; #define FINN_NV01_DEVICE_0_RESERVED_INTERFACE_ID (0x8000U) typedef FINN_RM_API FINN_NV01_DEVICE_0_RESERVED; #define FINN_NV01_DEVICE_0_BIF_INTERFACE_ID (0x8001U) @@ -446,6 +448,9 @@ typedef FINN_RM_API FINN_NV20_SUBDEVICE_DIAG_GR; #define FINN_NV20_SUBDEVICE_DIAG_MMU_INTERFACE_ID (0x208f0bU) typedef FINN_RM_API FINN_NV20_SUBDEVICE_DIAG_MMU; +#define FINN_NV20_SUBDEVICE_DIAG_PMU_INTERFACE_ID (0x208f0cU) +typedef FINN_RM_API FINN_NV20_SUBDEVICE_DIAG_PMU; + #define FINN_NV20_SUBDEVICE_DIAG_UCODE_COVERAGE_INTERFACE_ID (0x208f19U) typedef FINN_RM_API FINN_NV20_SUBDEVICE_DIAG_UCODE_COVERAGE; #define FINN_NV30_GSYNC_RESERVED_INTERFACE_ID (0x30f100U) @@ -665,6 +670,8 @@ typedef FINN_RM_API FINN_VOLTA_CHANNEL_GPFIFO_A_RESERVED; typedef FINN_RM_API FINN_VOLTA_CHANNEL_GPFIFO_A_GPFIFO; #define FINN_VOLTA_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID (0xc36f02U) typedef FINN_RM_API FINN_VOLTA_CHANNEL_GPFIFO_A_EVENT; +#define FINN_VOLTA_CHANNEL_GPFIFO_A_INTERNAL_INTERFACE_ID (0xc36f03U) +typedef FINN_RM_API FINN_VOLTA_CHANNEL_GPFIFO_A_INTERNAL; #define FINN_NVC370_DISPLAY_RESERVED_INTERFACE_ID (0xc37000U) typedef FINN_RM_API FINN_NVC370_DISPLAY_RESERVED; #define FINN_NVC370_DISPLAY_CHNCTL_INTERFACE_ID (0xc37001U) @@ -710,7 +717,6 @@ typedef FINN_RM_API FINN_MMU_VIDMEM_ACCESS_BIT_BUFFER_RESERVED; typedef FINN_RM_API FINN_MMU_VIDMEM_ACCESS_BIT_BUFFER_VIDMEM_ACCESS_BIT_BUFFER; #define FINN_HOPPER_CHANNEL_GPFIFO_A_RESERVED_INTERFACE_ID (0xc86f00U) typedef FINN_RM_API FINN_HOPPER_CHANNEL_GPFIFO_A_RESERVED; - #define FINN_BLACKWELL_CHANNEL_GPFIFO_A_RESERVED_INTERFACE_ID (0xc96f00U) typedef FINN_RM_API FINN_BLACKWELL_CHANNEL_GPFIFO_A_RESERVED; diff --git a/src/common/sdk/nvidia/inc/nverror.h b/src/common/sdk/nvidia/inc/nverror.h index 60964fca6c..ed120b06e8 100644 --- a/src/common/sdk/nvidia/inc/nverror.h +++ b/src/common/sdk/nvidia/inc/nverror.h @@ -145,7 +145,8 @@ #define ROBUST_CHANNEL_KEY_ROTATION_ERROR (151) #define RESERVED7_ERROR (152) #define RESERVED8_ERROR (153) -#define ROBUST_CHANNEL_LAST_ERROR (153) +#define GPU_RECOVERY_ACTION_CHANGED (154) +#define ROBUST_CHANNEL_LAST_ERROR (154) // Indexed CE reference diff --git a/src/common/sdk/nvidia/inc/nvfixedtypes.h b/src/common/sdk/nvidia/inc/nvfixedtypes.h index 84611605c2..988be7a539 100644 --- a/src/common/sdk/nvidia/inc/nvfixedtypes.h +++ b/src/common/sdk/nvidia/inc/nvfixedtypes.h @@ -315,6 +315,7 @@ typedef NvUFXP64 NvUFXP60_4; #define NV_TYPES_SINGLE_SIGN_NEGATIVE 0x00000001 #define NV_TYPES_SINGLE_EXPONENT 30:23 #define NV_TYPES_SINGLE_EXPONENT_ZERO 0x00000000 +#define NV_TYPES_SINGLE_EXPONENT_MAX 0x000000FE #define NV_TYPES_SINGLE_EXPONENT_BIAS 0x0000007F #define NV_TYPES_SINGLE_MANTISSA 22:0 @@ -346,6 +347,19 @@ typedef NvUFXP64 NvUFXP60_4; ((NvS32)(DRF_VAL(_TYPES, _SINGLE, _EXPONENT, single) - \ NV_TYPES_SINGLE_EXPONENT_BIAS)) +/*! + * Helper macro to convert an NvS8 unbiased exponent value to an IEEE 754 + * single-precision value's exponent, by adding the bias. + * Input exponent can range from -127 to 127 which is stored in the range + * [0, 254] + * + * @param[in] single IEEE 754 single-precision value to manipulate. + * + * @return Biased exponent value for IEEE 754 single-precision. + */ +#define NV_TYPES_NvS32_TO_SINGLE_EXPONENT_BIASED(exponent) \ + ((NvU32)((exponent) + NV_TYPES_SINGLE_EXPONENT_BIAS)) + /*! * NvTemp - temperature data type introduced to avoid bugs in conversion between * various existing notations. diff --git a/src/common/sdk/nvidia/inc/nvlimits.h b/src/common/sdk/nvidia/inc/nvlimits.h index 619c749c7e..e7fad3f30c 100644 --- a/src/common/sdk/nvidia/inc/nvlimits.h +++ b/src/common/sdk/nvidia/inc/nvlimits.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2017 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2017-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -34,19 +34,25 @@ /* * This is the maximum number of GPUs supported in a single system. */ -#define NV_MAX_DEVICES 32 +#define NV_MAX_DEVICES 32 /* * This is the maximum number of subdevices within a single device. */ -#define NV_MAX_SUBDEVICES 8 +#define NV_MAX_SUBDEVICES 8 /* * This is the maximum length of the process name string. */ -#define NV_PROC_NAME_MAX_LENGTH 100U +#define NV_PROC_NAME_MAX_LENGTH 100U /* * This is the maximum number of heads per GPU. */ -#define NV_MAX_HEADS 4 +#define NV_MAX_HEADS 4 + +/* + * Maximum length of a MIG device UUID. It is a 36-byte UUID string plus a + * 4-byte prefix and NUL terminator: 'M' 'I' 'G' '-' UUID '\0x0' + */ +#define NV_MIG_DEVICE_UUID_STR_LENGTH 41U diff --git a/src/common/sdk/nvidia/inc/nvmisc.h b/src/common/sdk/nvidia/inc/nvmisc.h index 1c93d75794..ffaa7cea81 100644 --- a/src/common/sdk/nvidia/inc/nvmisc.h +++ b/src/common/sdk/nvidia/inc/nvmisc.h @@ -721,6 +721,42 @@ nvPrevPow2_U64(const NvU64 x ) } \ } +// +// Bug 4851259: Newly added functions must be hidden from certain HS-signed +// ucode compilers to avoid signature mismatch. +// +#ifndef NVDEC_1_0 +/*! + * Returns the position of nth set bit in the given mask. + * + * Returns -1 if mask has fewer than n bits set. + * + * n is 0 indexed and has valid values 0..31 inclusive, so "zeroth" set bit is + * the first set LSB. + * + * Example, if mask = 0x000000F0u and n = 1, the return value will be 5. + * Example, if mask = 0x000000F0u and n = 4, the return value will be -1. + */ +static NV_FORCEINLINE NvS32 +nvGetNthSetBitIndex32(NvU32 mask, NvU32 n) +{ + NvU32 seenSetBitsCount = 0; + NvS32 index; + FOR_EACH_INDEX_IN_MASK(32, index, mask) + { + if (seenSetBitsCount == n) + { + return index; + } + ++seenSetBitsCount; + } + FOR_EACH_INDEX_IN_MASK_END; + + return -1; +} + +#endif // NVDEC_1_0 + // // Size to use when declaring variable-sized arrays // diff --git a/src/common/sdk/nvidia/inc/nvos.h b/src/common/sdk/nvidia/inc/nvos.h index 6d3e1e5bc4..c210ffeadb 100644 --- a/src/common/sdk/nvidia/inc/nvos.h +++ b/src/common/sdk/nvidia/inc/nvos.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -191,7 +191,6 @@ typedef struct #define NVOS02_FLAGS_PHYSICALITY_NONCONTIGUOUS (0x00000001) #define NVOS02_FLAGS_LOCATION 11:8 #define NVOS02_FLAGS_LOCATION_PCI (0x00000000) -#define NVOS02_FLAGS_LOCATION_AGP (0x00000001) #define NVOS02_FLAGS_LOCATION_VIDMEM (0x00000002) #define NVOS02_FLAGS_COHERENCY 15:12 #define NVOS02_FLAGS_COHERENCY_UNCACHED (0x00000000) @@ -1106,7 +1105,6 @@ typedef struct #define NVOS32_ATTR_LOCATION 26:25 #define NVOS32_ATTR_LOCATION_VIDMEM 0x00000000 #define NVOS32_ATTR_LOCATION_PCI 0x00000001 -#define NVOS32_ATTR_LOCATION_AGP 0x00000002 #define NVOS32_ATTR_LOCATION_ANY 0x00000003 // @@ -1196,11 +1194,16 @@ typedef struct // SMMU mapping for GPU physical allocation decided internally by RM // This attribute provide an override to RM policy for verification purposes. // -#define NVOS32_ATTR2_SMMU_ON_GPU 10:8 +#define NVOS32_ATTR2_SMMU_ON_GPU 9:8 #define NVOS32_ATTR2_SMMU_ON_GPU_DEFAULT 0x00000000 #define NVOS32_ATTR2_SMMU_ON_GPU_DISABLE 0x00000001 #define NVOS32_ATTR2_SMMU_ON_GPU_ENABLE 0x00000002 +// Used for allocating the memory from scanout carveout. +#define NVOS32_ATTR2_USE_SCANOUT_CARVEOUT 10:10 +#define NVOS32_ATTR2_USE_SCANOUT_CARVEOUT_FALSE 0x00000000 +#define NVOS32_ATTR2_USE_SCANOUT_CARVEOUT_TRUE 0x00000001 + // // Make comptag allocation aligned to compression cacheline size. // Specifying this attribute will make RM allocate comptags worth an entire @@ -1749,7 +1752,7 @@ typedef struct // Mappings can have restricted permissions (read-only, write-only). Some // RM implementations may choose to ignore these flags, or they may work -// only for certain memory spaces (system, AGP, video memory); in such cases, +// only for certain memory spaces (system, video memory); in such cases, // you may get a read/write mapping even if you asked for a read-only or // write-only mapping. #define NVOS33_FLAGS_ACCESS 1:0 @@ -2305,6 +2308,8 @@ typedef struct NvU8 bForcePowerStateFail; NvU32 errorStatus; // [OUT] To tell client if there is bubble up errors NvU32 fastBootPowerState; + NvU8 reserved; + NvU8 reserved2; } NVPOWERSTATE_PARAMETERS, *PNVPOWERSTATE_PARAMETERS; /***************************************************************************\ @@ -2463,21 +2468,32 @@ typedef struct { #define NV_CHANNELGPFIFO_NOTIFICATION_STATUS_IN_PROGRESS_TRUE 0x1 #define NV_CHANNELGPFIFO_NOTIFICATION_STATUS_IN_PROGRESS_FALSE 0x0 -typedef struct +typedef enum { - NvV32 channelInstance; // One of the n channel instances of a given channel type. - // Note that core channel has only one instance - // while all others have two (one per head). - NvHandle hObjectBuffer; // ctx dma handle for DMA push buffer - NvHandle hObjectNotify; // ctx dma handle for an area (of type NvNotification defined in sdk/nvidia/inc/nvtypes.h) where RM can write errors/notifications - NvU32 offset; // Initial offset for put/get, usually zero. - NvP64 pControl NV_ALIGN_BYTES(8); // pControl gives virt addr of UDISP GET/PUT regs + PB_SIZE_4KB = 0, + PB_SIZE_8KB, + PB_SIZE_16KB, + PB_SIZE_32KB, + PB_SIZE_64KB +} ChannelPBSize; - NvU32 flags; +typedef struct +{ + NvV32 channelInstance; // One of the n channel instances of a given channel type. + // Note that core channel has only one instance + // while all others have two (one per head). + NvHandle hObjectBuffer; // ctx dma handle for DMA push buffer + NvHandle hObjectNotify; // ctx dma handle for an area (of type NvNotification defined in sdk/nvidia/inc/nvtypes.h) where RM can write errors/notifications + NvU32 offset; // Initial offset for put/get, usually zero. + NvP64 pControl NV_ALIGN_BYTES(8); // pControl gives virt addr of UDISP GET/PUT regs + + NvU32 flags; + ChannelPBSize channelPBSize; // Size of Push Buffer requested by client (allowed values in enum) #define NV50VAIO_CHANNELDMA_ALLOCATION_FLAGS_CONNECT_PB_AT_GRAB 1:1 #define NV50VAIO_CHANNELDMA_ALLOCATION_FLAGS_CONNECT_PB_AT_GRAB_YES 0x00000000 #define NV50VAIO_CHANNELDMA_ALLOCATION_FLAGS_CONNECT_PB_AT_GRAB_NO 0x00000001 + NvU32 subDeviceId; // One-hot encoded subDeviceId (i.e. SDM) that will be used to address the channel in the pushbuffer stream (via SSDM method) } NV50VAIO_CHANNELDMA_ALLOCATION_PARAMETERS; typedef struct diff --git a/src/common/sdk/nvidia/inc/rs_access.h b/src/common/sdk/nvidia/inc/rs_access.h index 53ac2d908e..7020677422 100644 --- a/src/common/sdk/nvidia/inc/rs_access.h +++ b/src/common/sdk/nvidia/inc/rs_access.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2019-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -59,7 +59,8 @@ #define RS_ACCESS_DUP_OBJECT 0U #define RS_ACCESS_NICE 1U #define RS_ACCESS_DEBUG 2U -#define RS_ACCESS_COUNT 3U +#define RS_ACCESS_PERFMON 3U +#define RS_ACCESS_COUNT 4U /****************************************************************************/ diff --git a/src/common/shared/inc/g_vgpu_resman_specific.h b/src/common/shared/inc/g_vgpu_resman_specific.h index df9cca1a7a..408eefb805 100644 --- a/src/common/shared/inc/g_vgpu_resman_specific.h +++ b/src/common/shared/inc/g_vgpu_resman_specific.h @@ -22,7 +22,6 @@ static inline void _get_chip_id_for_alias_pgpu(NvU32 *dev_id, NvU32 *subdev_id) { 0x2330, 0x16C0, 0x2330, 0x16C1 }, { 0x2336, 0x16C2, 0x2330, 0x16C1 }, { 0x26BA, 0x1990, 0x26BA, 0x1957 }, - }; for (NvU32 i = 0; i < (sizeof(vgpu_aliases) / sizeof(struct vgpu_alias_details)); ++i) { diff --git a/src/common/shared/inc/nvdevid.h b/src/common/shared/inc/nvdevid.h index d80c838aba..aec280dd5d 100644 --- a/src/common/shared/inc/nvdevid.h +++ b/src/common/shared/inc/nvdevid.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 200-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2004-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -617,6 +617,7 @@ enum { , CS_NVIDIA_T234 , CS_NVIDIA_T23x , CS_NVIDIA_TH500 +, CS_RESERVED_1 , CS_MARVELL_THUNDERX2 , CS_REDHAT_QEMU , CS_AMPERE_EMAG @@ -638,6 +639,7 @@ enum { , CS_INTEL_18DC , CS_INTEL_7A04 , CS_INTEL_5795 +, CS_RESERVED_2 , CS_SIFIVE_FU740_C000 , CS_PLDA_XPRESSRICH_AXI_REF , CS_AMPERE_AMPEREONE diff --git a/src/common/softfloat/source/8086-SSE/s_f16UIToCommonNaN.c b/src/common/softfloat/source/8086-SSE/s_f16UIToCommonNaN.c new file mode 100644 index 0000000000..18b6dfdb89 --- /dev/null +++ b/src/common/softfloat/source/8086-SSE/s_f16UIToCommonNaN.c @@ -0,0 +1,59 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3d, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include +#include "platform.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Assuming `uiA' has the bit pattern of a 16-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +void softfloat_f16UIToCommonNaN( uint_fast16_t uiA, struct commonNaN *zPtr ) +{ + + if ( softfloat_isSigNaNF16UI( uiA ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + zPtr->sign = uiA>>15; + zPtr->v64 = (uint_fast64_t) uiA<<54; + zPtr->v0 = 0; + +} + diff --git a/src/common/softfloat/source/f16_to_f32.c b/src/common/softfloat/source/f16_to_f32.c new file mode 100644 index 0000000000..fb8b3819d1 --- /dev/null +++ b/src/common/softfloat/source/f16_to_f32.c @@ -0,0 +1,93 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3d, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float32_t f16_to_f32( float16_t a ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + bool sign; + int_fast8_t exp; + uint_fast16_t frac; + struct commonNaN commonNaN; + uint_fast32_t uiZ; + struct exp8_sig16 normExpSig; + union ui32_f32 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF16UI( uiA ); + exp = expF16UI( uiA ); + frac = fracF16UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x1F ) { + if ( frac ) { + softfloat_f16UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF32UI( &commonNaN ); + } else { + uiZ = packToF32UI( sign, 0xFF, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! exp ) { + if ( ! frac ) { + uiZ = packToF32UI( sign, 0, 0 ); + goto uiZ; + } + normExpSig = softfloat_normSubnormalF16Sig( frac ); + exp = normExpSig.exp - 1; + frac = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ = packToF32UI( sign, exp + 0x70, (uint_fast32_t) frac<<13 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/src/common/softfloat/source/s_normSubnormalF16Sig.c b/src/common/softfloat/source/s_normSubnormalF16Sig.c new file mode 100644 index 0000000000..e612a9eb6d --- /dev/null +++ b/src/common/softfloat/source/s_normSubnormalF16Sig.c @@ -0,0 +1,52 @@ + +/*============================================================================ + +This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3d, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#include +#include "platform.h" +#include "internals.h" + +struct exp8_sig16 softfloat_normSubnormalF16Sig( uint_fast16_t sig ) +{ + int_fast8_t shiftDist; + struct exp8_sig16 z; + + shiftDist = softfloat_countLeadingZeros16( sig ) - 5; + z.exp = 1 - shiftDist; + z.sig = sig<pos - pLog->preservedNoWrapPos; + NvU64 nvlogPos = pNvLogBuffer->pos - pLog->preservedNoWrapPos + sizeof(NvU64); if (putOffset < nvlogPos) { @@ -1373,22 +1375,25 @@ static NvBool libosCopyLogToNvlog_nowrap(LIBOS_LOG_DECODE_LOG *pLog) return NV_TRUE; } - if (putOffset + pLog->preservedNoWrapPos > - pNvLogBuffer->size - NV_OFFSETOF(LIBOS_LOG_NVLOG_BUFFER, data) - sizeof(NvU64)) + NvU64 len = putOffset - nvlogPos; + + if (pNvLogBuffer->pos + len >= pNvLogBuffer->size ) { - // Are we done filling nowrap? + // we are done filling nowrap return NV_FALSE; } - NvU64 len = putOffset - nvlogPos; + NvU8 *pSrc = ((NvU8 *)pLog->physicLogBuffer) + nvlogPos; - NvU8 *pDst = pNoWrapBuf->data + pNvLogBuffer->pos; + NvU8 *pDst = pNoWrapBuf->data + pNvLogBuffer->pos - NV_OFFSETOF(LIBOS_LOG_NVLOG_BUFFER, data); pLog->bDidPush = NV_TRUE; portMemCopy(pDst, len, pSrc, len); - pNvLogBuffer->pos = putOffset + pLog->preservedNoWrapPos; // TODO: usage of NVLOG_BUFFER::pos is sus here, reconsider? - *(NvU64 *)(pNoWrapBuf->data) = putCopy + pLog->preservedNoWrapPos / sizeof(NvU64); + + // preservedNoWrapPos already accounted for both LIBOS buffer header and put pointer + pNvLogBuffer->pos = putOffset + pLog->preservedNoWrapPos - sizeof(NvU64); + *(NvU64 *)(pNoWrapBuf->data) = putCopy + (pLog->preservedNoWrapPos-NV_OFFSETOF(LIBOS_LOG_NVLOG_BUFFER, data)-sizeof(NvU64)) / sizeof(NvU64); return NV_TRUE; } @@ -1398,6 +1403,51 @@ static NvBool libosCopyLogToNvlog_wrap(LIBOS_LOG_DECODE_LOG *pLog) NVLOG_BUFFER *pNvLogBuffer = NvLogLogger.pBuffers[pLog->hNvLogWrap]; NV_ASSERT_OR_RETURN((pLog->hNvLogWrap != 0) && (pNvLogBuffer != NULL), NV_FALSE); + LIBOS_LOG_NVLOG_BUFFER *pWrapBuf = (LIBOS_LOG_NVLOG_BUFFER *)pNvLogBuffer->data; + NvU64 logEntries = pLog->logBufferSize / sizeof(NvU64) - 1 /* -1 for PUT pointer */; + NvU64 putCopy = pLog->physicLogBuffer[0]; + NvU64 putOffset = putCopy * sizeof(NvU64) + sizeof(NvU64); + + NvU64 prevPutOffset = pNvLogBuffer->pos - NV_OFFSETOF(LIBOS_LOG_NVLOG_BUFFER, data); + NvU64 nvlogPos = (prevPutOffset - sizeof(NvU64)) % (logEntries * sizeof(NvU64)) + sizeof(NvU64); + NvU64 putOffsetWrapped = (putCopy % logEntries) * sizeof(NvU64) + sizeof(NvU64); + + if (putOffsetWrapped == nvlogPos) + { + // No new data + return NV_TRUE; + } + + if (putOffsetWrapped < nvlogPos) + { + // ring buffer wrapped around since last dump + // copy from pNvLogBuffer->pos to end of buffer, update nvlogPos to 0 + NvU64 len = pNvLogBuffer->size - NV_OFFSETOF(LIBOS_LOG_NVLOG_BUFFER, data) - nvlogPos; + NvU8 *pSrc = ((NvU8 *)pLog->physicLogBuffer) + nvlogPos; + NvU8 *pDst = pWrapBuf->data + nvlogPos; + portMemCopy(pDst, len, pSrc, len); + nvlogPos = sizeof(NvU64); + } + + if (putOffsetWrapped > nvlogPos) + { + NvU64 len = putOffsetWrapped - nvlogPos; + NvU8 *pSrc = ((NvU8 *)pLog->physicLogBuffer) + nvlogPos; + NvU8 *pDst = pWrapBuf->data + nvlogPos; + portMemCopy(pDst, len, pSrc, len); + } + + pNvLogBuffer->pos = NV_OFFSETOF(LIBOS_LOG_NVLOG_BUFFER, data) + putOffset; + *(NvU64 *)(pWrapBuf->data) = putCopy; + + return NV_TRUE; +} + +static NvBool libosSyncNvlog(LIBOS_LOG_DECODE_LOG *pLog) +{ + NVLOG_BUFFER *pNvLogBuffer = NvLogLogger.pBuffers[pLog->hNvLogWrap]; + NV_ASSERT_OR_RETURN((pLog->hNvLogWrap != 0) && (pNvLogBuffer != NULL), NV_FALSE); + LIBOS_LOG_NVLOG_BUFFER *pWrapBuf = (LIBOS_LOG_NVLOG_BUFFER *)pNvLogBuffer->data; NvU64 putCopy = pLog->physicLogBuffer[0]; NvU64 putOffset = putCopy * sizeof(NvU64) + sizeof(NvU64); @@ -1419,10 +1469,15 @@ static void libosExtractLogs_nvlog(LIBOS_LOG_DECODE *logDecode, NvBool bSyncNvLo pLog->bNvLogNoWrap = libosCopyLogToNvlog_nowrap(pLog); } - if (bSyncNvLog) + if (!pLog->bNvLogNoWrap) { libosCopyLogToNvlog_wrap(pLog); } + + if (bSyncNvLog) + { + libosSyncNvlog(pLog); + } } } @@ -1446,6 +1501,34 @@ void libosPreserveLogs(LIBOS_LOG_DECODE *pLogDecode) } } +NvBool isLibosPreserveLogBufferFull(LIBOS_LOG_DECODE *pLogDecode, NvU32 gpuInstance) +{ + NvU64 i = (NvU32)(pLogDecode->numLogBuffers); + NvU32 tag = LIBOS_LOG_NVLOG_BUFFER_TAG(pLogDecode->sourceName, i * 2); + NVLOG_BUFFER_HANDLE handle = 0; + NV_STATUS status = nvlogGetBufferHandleFromTag(tag, &handle); + + if (status != NV_OK) + { + return NV_FALSE; + } + + NVLOG_BUFFER *pNvLogBuffer = NvLogLogger.pBuffers[handle]; + if (pNvLogBuffer == NULL) + { + return NV_FALSE; + } + + if (FLD_TEST_DRF(LOG_BUFFER, _FLAGS, _PRESERVE, _YES, pNvLogBuffer->flags) && + DRF_VAL(LOG, _BUFFER_FLAGS, _GPU_INSTANCE, pNvLogBuffer->flags) == gpuInstance && + (pNvLogBuffer->pos >= pNvLogBuffer->size - NV_OFFSETOF(LIBOS_LOG_NVLOG_BUFFER, data) - sizeof(NvU64))) + { + return NV_TRUE; + } + + return NV_FALSE; +} + static NvBool findPreservedNvlogBuffer(NvU32 tag, NvU32 gpuInstance, NVLOG_BUFFER_HANDLE *pHandle) { NVLOG_BUFFER_HANDLE handle = 0; @@ -1576,7 +1659,7 @@ void libosLogAddLogEx(LIBOS_LOG_DECODE *logDecode, void *buffer, NvU64 bufferSiz pLog->bNvLogNoWrap = NV_FALSE; pLog->bDidPush = NV_FALSE; - pLog->preservedNoWrapPos = 0; + pLog->preservedNoWrapPos = NV_OFFSETOF(LIBOS_LOG_NVLOG_BUFFER, data) + sizeof(NvU64); // offset to account for LIBOS buffer header and put pointer LIBOS_LOG_NVLOG_BUFFER *pNoWrapBuf; NvU32 tag = LIBOS_LOG_NVLOG_BUFFER_TAG(logDecode->sourceName, i * 2); @@ -1601,7 +1684,7 @@ void libosLogAddLogEx(LIBOS_LOG_DECODE *logDecode, void *buffer, NvU64 bufferSiz pNoWrapBuf->gpuArch = gpuArch; pNoWrapBuf->gpuImpl = gpuImpl; - NvLogLogger.pBuffers[pLog->hNvLogNoWrap]->pos = sizeof(NvU64); // offset to account for put pointer + NvLogLogger.pBuffers[pLog->hNvLogNoWrap]->pos = NV_OFFSETOF(LIBOS_LOG_NVLOG_BUFFER, data) + sizeof(NvU64); // offset to account for LIBOS buffer header and put pointer pLog->bNvLogNoWrap = NV_TRUE; } @@ -1614,14 +1697,6 @@ void libosLogAddLogEx(LIBOS_LOG_DECODE *logDecode, void *buffer, NvU64 bufferSiz { pLog->bNvLogNoWrap = NV_TRUE; pLog->preservedNoWrapPos = NvLogLogger.pBuffers[pLog->hNvLogNoWrap]->pos; - - // - // The 0th NvU64 is the last value of put pointer from the physical log buffer, which is - // the number of NvU64 log buffer elements in it plus one. - // Subtract one NvU64 from it to avoid off-by-one error. - // - if (pLog->preservedNoWrapPos >= sizeof(NvU64)) - pLog->preservedNoWrapPos -= sizeof(NvU64); } LIBOS_LOG_NVLOG_BUFFER *pWrapBuf; @@ -1642,6 +1717,8 @@ void libosLogAddLogEx(LIBOS_LOG_DECODE *logDecode, void *buffer, NvU64 bufferSiz pWrapBuf->gpuArch = gpuArch; pWrapBuf->gpuImpl = gpuImpl; + + NvLogLogger.pBuffers[pLog->hNvLogWrap]->pos = NV_OFFSETOF(LIBOS_LOG_NVLOG_BUFFER, data) + sizeof(NvU64); // offset to account for LIBOS buffer header and put pointer } else { diff --git a/src/nvidia-modeset/include/dp/nvdp-timer.h b/src/nvidia-modeset/include/dp/nvdp-timer.h index 1126eff2ca..f1b2ecbc18 100644 --- a/src/nvidia-modeset/include/dp/nvdp-timer.h +++ b/src/nvidia-modeset/include/dp/nvdp-timer.h @@ -30,7 +30,6 @@ extern "C" { #endif -NvBool nvDPTimersPending(void); NVDPLibTimerPtr nvDPAllocTimer(NVDevEvoPtr pDevEvo); void nvDPFreeTimer(NVDPLibTimerPtr pTimer); void nvDPFireExpiredTimers(NVDevEvoPtr pDevEvo); diff --git a/src/nvidia-modeset/include/nvkms-dpy.h b/src/nvidia-modeset/include/nvkms-dpy.h index 4f3173bdd6..6ff62edeb0 100644 --- a/src/nvidia-modeset/include/nvkms-dpy.h +++ b/src/nvidia-modeset/include/nvkms-dpy.h @@ -90,6 +90,10 @@ NvU32 nvDpyGetPossibleApiHeadsMask(const NVDpyEvoRec *pDpyEvo); NvBool nvDpyIsHDRCapable(const NVDpyEvoRec *pDpyEvo); +void nvConstructDpVscSdp(const NVDispHeadInfoFrameStateEvoRec *pInfoFrame, + const NVDpyAttributeColor *pDpyColor, + DPSDP_DP_VSC_SDP_DESCRIPTOR *sdp); + #ifdef __cplusplus }; #endif diff --git a/src/nvidia-modeset/include/nvkms-evo.h b/src/nvidia-modeset/include/nvkms-evo.h index 7d68813581..07e73a5504 100644 --- a/src/nvidia-modeset/include/nvkms-evo.h +++ b/src/nvidia-modeset/include/nvkms-evo.h @@ -118,7 +118,9 @@ void nvEnableMidFrameAndDWCFWatermark(NVDevEvoPtr pDevEvo, NVEvoUpdateState *pUpdateState); void nvEvoHeadSetControlOR(NVDispEvoPtr pDispEvo, - const NvU32 head, NVEvoUpdateState *pUpdateState); + const NvU32 head, + const NVDpyAttributeColor *pDpyColor, + NVEvoUpdateState *pUpdateState); void nvChooseDitheringEvo( const NVConnectorEvoRec *pConnectorEvo, @@ -185,6 +187,7 @@ NvBool nvDowngradeColorBpc( NVDpyAttributeColor *pDpyColor); NvBool nvDowngradeColorSpaceAndBpc( + const NVDpyEvoRec *pDpyEvo, const NvKmsDpyOutputColorFormatInfo *pSupportedColorFormats, NVDpyAttributeColor *pDpyColor); @@ -250,7 +253,6 @@ NvBool nvValidateSetLutCommonParams( const struct NvKmsSetLutCommonParams *pParams); NvBool nvChooseColorRangeEvo( - enum NvKmsOutputColorimetry colorimetry, const enum NvKmsDpyAttributeColorRangeValue requestedColorRange, const enum NvKmsDpyAttributeCurrentColorSpaceValue colorSpace, const enum NvKmsDpyAttributeColorBpcValue colorBpc, @@ -393,9 +395,10 @@ void nvEvoDisableHwYUV420Packer(const NVDispEvoRec *pDispEvo, const NvU32 head, NVEvoUpdateState *pUpdateState); -NvBool nvEvoGetSingleTileHwModeTimings(const NVHwModeTimingsEvo *pSrc, - const NvU32 numTiles, - NVHwModeTimingsEvo *pDst); +NvBool nvEvoGetSingleMergeHeadSectionHwModeTimings( + const NVHwModeTimingsEvo *pSrc, + const NvU32 numSections, + NVHwModeTimingsEvo *pDst); NvBool nvEvoUse2Heads1OR(const NVDpyEvoRec *pDpyEvo, const NVHwModeTimingsEvo *pTimings, diff --git a/src/nvidia-modeset/include/nvkms-evo3.h b/src/nvidia-modeset/include/nvkms-evo3.h index 2f450e7603..3bf44e9f04 100644 --- a/src/nvidia-modeset/include/nvkms-evo3.h +++ b/src/nvidia-modeset/include/nvkms-evo3.h @@ -71,6 +71,12 @@ struct EvoClampRangeC5 { NvU32 green, red_blue; }; +typedef void (NVEvoParseCapabilityNotifierFunc3)(NVDevEvoPtr pDevEvo, + NVEvoSubDevPtr pEvoSubDev, volatile const NvU32 *pCaps); + +typedef NvU32 (NVEvoHwFormatFromKmsFormatFunc3)( + const enum NvKmsSurfaceMemoryFormat format); + /* * Converts FP32 to fixed point S5.14 coefficient format */ @@ -130,6 +136,23 @@ void nvEvoSetNotifierC3(NVDevEvoRec *pDevEvo, const NvU32 notifier, NVEvoUpdateState *updateState); +static inline NvU32 nvEvoReadCapReg3(volatile const NvU32 *pCaps, NvU32 offset) +{ + /* Offsets are in bytes, but the array has dword-sized elements. */ + return pCaps[offset / sizeof(NvU32)]; +} + +NvBool nvEvoGetCapabilities3(NVDevEvoPtr pDevEvo, + NVEvoParseCapabilityNotifierFunc3 *pParse, + NVEvoHwFormatFromKmsFormatFunc3 *pGetHwFmt, + NvU32 hwclass, size_t length); + +void nvEvoParseCapabilityNotifier6(NVDevEvoPtr pDevEvo, + NVEvoSubDevPtr pEvoSubDev, + volatile const NvU32 *pCaps); + +NvU32 nvHwFormatFromKmsFormatC6(const enum NvKmsSurfaceMemoryFormat format); + NvBool nvEvoGetCapabilitiesC6(NVDevEvoPtr pDevEvo); void @@ -153,14 +176,11 @@ nvEvoFillLUTSurfaceC5(NVEvoLutEntryRec *pLUTBuffer, void nvSetupOutputLUT5(NVDevEvoPtr pDevEvo, const NVDispHeadStateEvoRec *pHeadState, - const int head, - NVLutSurfaceEvoPtr pLutSurfEvo, - NvBool enableBaseLut, NvBool enableOutputLut, - NVEvoUpdateState *updateState, NvBool bypassComposition, NVSurfaceDescriptor **pSurfaceDesc, NvU32 *lutSize, + NvU64 *offset, NvBool *disableOcsc0, NvU32 *fpNormScale, NvBool *isLutModeVss); @@ -257,7 +277,8 @@ const struct NvKmsCscMatrix* nvEvoGetOCsc1MatrixC5(const NVDispHeadStateEvoRec * struct EvoClampRangeC5 nvEvoGetOCsc1ClampRange(const NVDispHeadStateEvoRec *pHeadState); -void nvEvo3PickOCsc0(NVDispEvoPtr pDispEvo, const NvU32 head, struct NvKms3x4MatrixF32 *ocsc0Matrix); +void nvEvo3PickOCsc0(const NVDispEvoRec* pDispEvo, const NvU32 head, + struct NvKms3x4MatrixF32 *ocsc0Matrix, NvBool *pOutputRoundingFix); static inline const NVEvoScalerCaps* nvEvoGetWindowScalingCapsC3(const NVDevEvoRec *pDevEvo) diff --git a/src/nvidia-modeset/include/nvkms-hw-flip.h b/src/nvidia-modeset/include/nvkms-hw-flip.h index be3492d581..7db628132a 100644 --- a/src/nvidia-modeset/include/nvkms-hw-flip.h +++ b/src/nvidia-modeset/include/nvkms-hw-flip.h @@ -42,7 +42,7 @@ void nvInitFlipEvoHwState( NvBool nvUpdateFlipEvoHwState( const struct NvKmsPerOpenDev *pOpenDev, - const NVDevEvoRec *pDevEvo, + NVDevEvoRec *pDevEvo, const NvU32 sd, const NvU32 head, const struct NvKmsFlipCommonParams *pParams, diff --git a/src/nvidia-modeset/include/nvkms-lut.h b/src/nvidia-modeset/include/nvkms-lut.h index e3d4eafb86..623ecfee45 100644 --- a/src/nvidia-modeset/include/nvkms-lut.h +++ b/src/nvidia-modeset/include/nvkms-lut.h @@ -30,21 +30,20 @@ extern "C" { #include "nvkms-types.h" -NvBool nvSetTmoLutSurfacesEvo(NVDevEvoPtr pDevEvo, - NVFlipEvoHwState *pFlipState, - NvU32 head); -void nvRefTmoLutSurfacesEvo(NVDevEvoPtr pDevEvo, - NVFlipEvoHwState *pFlipState, - NvU32 head); -void nvUnrefTmoLutSurfacesEvo(NVDevEvoPtr pDevEvo, - NVFlipEvoHwState *pFlipState, - NvU32 head); +NvBool nvSetTmoLutSurfaceEvo(NVDevEvoPtr pDevEvo, + NVFlipChannelEvoHwState *pHwState); + +void nvFreeUnrefedTmoLutSurfacesEvo(NVDevEvoPtr pDevEvo, + NVFlipEvoHwState *pFlipState, + NvU32 head); + +void nvInvalidateDefaultLut(NVDevEvoPtr pDevEvo); NvBool nvAllocLutSurfacesEvo(NVDevEvoPtr pDevEvo); void nvFreeLutSurfacesEvo(NVDevEvoPtr pDevEvo); -void nvUploadDataToLutSurfaceEvo(NVLutSurfaceEvoPtr pSurfEvo, +void nvUploadDataToLutSurfaceEvo(NVSurfaceEvoPtr pSurfEvo, const NVEvoLutDataRec *pLUTBuffer, NVDispEvoPtr pDispEvo); diff --git a/src/nvidia-modeset/include/nvkms-modeset-types.h b/src/nvidia-modeset/include/nvkms-modeset-types.h index 4350dcc1f5..aeff65ee4b 100644 --- a/src/nvidia-modeset/include/nvkms-modeset-types.h +++ b/src/nvidia-modeset/include/nvkms-modeset-types.h @@ -51,7 +51,7 @@ typedef struct { } NVProposedModeSetStateOneApiHead; typedef struct { - NvU8 tilePosition; + NvU8 mergeHeadSection; NVHwModeTimingsEvo timings; NVConnectorEvoRec *pConnectorEvo; HDMI_FRL_CONFIG hdmiFrlConfig; diff --git a/src/nvidia-modeset/include/nvkms-modeset.h b/src/nvidia-modeset/include/nvkms-modeset.h index 16656e7b46..0ae03d38dc 100644 --- a/src/nvidia-modeset/include/nvkms-modeset.h +++ b/src/nvidia-modeset/include/nvkms-modeset.h @@ -65,7 +65,8 @@ NVVBlankCallbackPtr nvApiHeadRegisterVBlankCallback(NVDispEvoPtr pDispEvo, const NvU32 apiHead, NVVBlankCallbackProc pCallback, - void *pUserData); + void *pUserData, + NvU8 listIndex); void nvApiHeadUnregisterVBlankCallback(NVDispEvoPtr pDispEvo, NVVBlankCallbackPtr pCallback); diff --git a/src/nvidia-modeset/include/nvkms-prealloc-types.h b/src/nvidia-modeset/include/nvkms-prealloc-types.h index ddb4693d7e..044c4d2bd9 100644 --- a/src/nvidia-modeset/include/nvkms-prealloc-types.h +++ b/src/nvidia-modeset/include/nvkms-prealloc-types.h @@ -43,6 +43,7 @@ enum NVPreallocType { PREALLOC_TYPE_VALIDATE_MODE_IMP_OUT_HW_MODE_TIMINGS, PREALLOC_TYPE_VALIDATE_MODE_TMP_USAGE_BOUNDS, PREALLOC_TYPE_DPLIB_IS_MODE_POSSIBLE_PARAMS, + PREALLOC_TYPE_SET_LUT_WORK_AREA, PREALLOC_TYPE_MAX }; diff --git a/src/nvidia-modeset/include/nvkms-private.h b/src/nvidia-modeset/include/nvkms-private.h index 0728fbb926..adebda42c9 100644 --- a/src/nvidia-modeset/include/nvkms-private.h +++ b/src/nvidia-modeset/include/nvkms-private.h @@ -33,6 +33,8 @@ extern "C" { struct NvKmsPerOpenDev *nvAllocPerOpenDev(struct NvKmsPerOpen *pOpen, NVDevEvoPtr pDevEvo, NvBool isPrivileged); +void nvRevokeDevice(NVDevEvoPtr pDevEvo); + void nvFreePerOpenDev(struct NvKmsPerOpen *pOpen, struct NvKmsPerOpenDev *pOpenDev); @@ -71,6 +73,8 @@ const NVEvoApiHandlesRec *nvGetSurfaceHandlesFromOpenDevConst( void nvKmsServiceNonStallInterrupt(void *dataPtr, NvU32 dataU32); +void nvKmsOrphanVblankSemControlForAllOpens(NVDispEvoRec *pDispEvo); + #ifdef __cplusplus }; #endif diff --git a/src/nvidia-modeset/include/nvkms-rm.h b/src/nvidia-modeset/include/nvkms-rm.h index ef09bcbad0..683509e602 100644 --- a/src/nvidia-modeset/include/nvkms-rm.h +++ b/src/nvidia-modeset/include/nvkms-rm.h @@ -112,6 +112,7 @@ NvBool nvRmIsPossibleToActivateDpyIdList(NVDispEvoPtr pDispEvo, NvBool nvRmVTSwitch(NVDevEvoPtr pDevEvo, NvU32 cmd); NvBool nvRmGetVTFBInfo(NVDevEvoPtr pDevEvo); void nvRmImportFbConsoleMemory(NVDevEvoPtr pDevEvo); +void nvRmUnmapFbConsoleMemory(NVDevEvoPtr pDevEvo); NvBool nvRmAllocEvoDma(NVDevEvoPtr pDevEvo, NVEvoDmaPtr pDma, NvU64 limit, diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080clk.h b/src/nvidia-modeset/include/nvkms-setlut-workarea.h similarity index 75% rename from src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080clk.h rename to src/nvidia-modeset/include/nvkms-setlut-workarea.h index 6bead7f36e..1c5d98d657 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080clk.h +++ b/src/nvidia-modeset/include/nvkms-setlut-workarea.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2004-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -21,12 +21,16 @@ * DEALINGS IN THE SOFTWARE. */ -#pragma once +#ifndef __NVKMS_SETLUT_WORKAREA_H__ +#define __NVKMS_SETLUT_WORKAREA_H__ -#include +#include "nvkms-types.h" -// -// This file was generated with FINN, an NVIDIA coding tool. -// Source file: ctrl/ctrl0080/ctrl0080clk.finn -// +struct NvKmsSetLutWorkArea { + struct { + NVFlipEvoHwState newState; + NVFlipEvoHwState oldState; + } head[NVKMS_MAX_HEADS_PER_DISP]; +}; +#endif diff --git a/src/nvidia-modeset/include/nvkms-surface.h b/src/nvidia-modeset/include/nvkms-surface.h index d03eece204..b5218d78e9 100644 --- a/src/nvidia-modeset/include/nvkms-surface.h +++ b/src/nvidia-modeset/include/nvkms-surface.h @@ -77,21 +77,9 @@ void nvEvoUnregisterDeferredRequestFifo( NVDevEvoPtr pDevEvo, NVDeferredRequestFifoRec *pDeferredRequestFifo); -NVVblankSemControl *nvEvoEnableVblankSemControl( - NVDevEvoRec *pDevEvo, - NVDispEvoRec *pDispEvo, - NvU32 apiHeadMask, - NVSurfaceEvoRec *pSurfaceEvo, - NvU64 surfaceOffset); - -NvBool nvEvoDisableVblankSemControl( - NVDevEvoRec *pDevEvo, - NVVblankSemControl *pVblankSemControl); - -NvBool nvEvoAccelVblankSemControls( +NvBool nvEvoCpuMapSurface( NVDevEvoPtr pDevEvo, - NvU32 dispIndex, - NvU32 hwHeadMask); + NVSurfaceEvoPtr pSurfaceEvo); static inline NvBool nvEvoIsSurfaceOwner(const NVSurfaceEvoRec *pSurfaceEvo, const struct NvKmsPerOpenDev *pOpenDev, diff --git a/src/nvidia-modeset/include/nvkms-types.h b/src/nvidia-modeset/include/nvkms-types.h index 3cb20295a5..10bab71dcb 100644 --- a/src/nvidia-modeset/include/nvkms-types.h +++ b/src/nvidia-modeset/include/nvkms-types.h @@ -56,6 +56,7 @@ extern "C" { #include "nvidia-push-init.h" #include "timing/nvtiming.h" +#include "timing/dpsdp.h" #include "timing/nvt_dsc_pps.h" #include "hdmipacket/nvhdmi_frlInterface.h" // HDMI_{SRC,SINK}_CAPS @@ -143,7 +144,6 @@ typedef struct _NVParsedEdidEvoRec *NVParsedEdidEvoPtr; typedef struct _NVVBlankCallbackRec *NVVBlankCallbackPtr; typedef struct _NVRgLine1CallbackRec *NVRgLine1CallbackPtr; typedef struct _NVDpyEvoRec *NVDpyEvoPtr; -typedef struct _NVLutSurfaceEvo *NVLutSurfaceEvoPtr; typedef struct _NVFrameLockEvo *NVFrameLockEvoPtr; typedef struct _NVEvoInfoString *NVEvoInfoStringPtr; typedef struct _NVSurfaceEvoRec NVSurfaceEvoRec, *NVSurfaceEvoPtr; @@ -292,12 +292,14 @@ typedef struct { NvBool usable; NvBool csc0MatricesPresent; NvBool cscLUTsPresent; - NvBool csc1MatricesPresent; + NvBool csc10MatrixPresent; + NvBool csc11MatrixPresent; NvBool tmoPresent; NVEvoScalerCaps scalerCaps; } NVEvoWindowCaps; #define NV_EVO_NUM_WINDOW_CAPS 32 + typedef NvU64 NVEvoChannelMask; #define NV_EVO_CHANNEL_MASK_CORE 0:0 @@ -511,6 +513,7 @@ typedef struct _NVEvoChannel { struct { NvBool enabled; + NvBool clientSpecified; NvU32 srcMaxLum; NvU32 targetMaxLums[NVKMS_MAX_SUBDEVICES]; } tmoParams; @@ -609,7 +612,11 @@ typedef struct { } NVFlipSyncObjectEvoHwState; typedef struct { - NVLutSurfaceEvoPtr pLutSurfaceEvo; + NVSurfaceEvoPtr pLutSurfaceEvo; + NvU64 offset; + NvU32 vssSegments; + NvU32 lutEntries; + NvBool fromOverride; } NVFlipLutHwState; typedef struct { @@ -678,6 +685,26 @@ typedef struct { */ NvU16 horizontal; } maxDownscaleFactors; + + struct { + struct NvKmsCscMatrix matrix; + NvBool enabled; + } csc00Override; + + struct { + struct NvKmsCscMatrix matrix; + NvBool enabled; + } csc01Override; + + struct { + struct NvKmsCscMatrix matrix; + NvBool enabled; + } csc10Override; + + struct { + struct NvKmsCscMatrix matrix; + NvBool enabled; + } csc11Override; } NVFlipChannelEvoHwState; typedef struct { @@ -694,6 +721,9 @@ typedef struct { struct NvKmsHDRStaticMetadata staticMetadata; } hdrInfoFrame; + NVFlipLutHwState outputLut; + NvU32 olutFpNormScale; + NvBool skipLayerPendingFlips[NVKMS_MAX_LAYERS_PER_HEAD]; struct { @@ -702,6 +732,7 @@ typedef struct { NvBool cursorPosition : 1; NvBool tf : 1; NvBool hdrStaticMetadata : 1; + NvBool olut : 1; NvBool layerPosition[NVKMS_MAX_LAYERS_PER_HEAD]; NvBool layerSyncObjects[NVKMS_MAX_LAYERS_PER_HEAD]; @@ -724,6 +755,8 @@ typedef struct _NVEvoSubDevHeadStateRec { struct NvKmsPoint viewPortPointIn; NVFlipCursorEvoHwState cursor; NVFlipChannelEvoHwState layer[NVKMS_MAX_LAYERS_PER_HEAD]; + NVFlipLutHwState outputLut; + NvU32 olutFpNormScale; // Current usage bounds programmed into the hardware. struct NvKmsUsageBounds usage; // Usage bounds required after the last scheduled flip completes. @@ -867,6 +900,7 @@ typedef struct { typedef struct { NvBool supportsDP13 :1; NvBool supportsHDMI20 :1; + NvBool supportsYUV2020 :1; NvBool inputLutAppliesToBase :1; NvU8 validNIsoFormatMask; NvU32 maxPitchValue; @@ -878,6 +912,7 @@ typedef struct { struct NvKmsCompositionCapabilities cursorCompositionCaps; NvU16 validLayerRRTransforms; struct NvKmsLayerCapabilities layerCaps[NVKMS_MAX_LAYERS_PER_HEAD]; + struct NvKmsLUTCaps olut; NvU8 legacyNotifierFormatSizeBytes[NVKMS_MAX_LAYERS_PER_HEAD]; NvU8 dpYCbCr422MaxBpc; NvU8 hdmiYCbCr422MaxBpc; @@ -914,6 +949,12 @@ typedef struct _NVEvoSubDeviceRec { NvBool isBaseSurfSpecified[NVKMS_MAX_HEADS_PER_DISP]; enum NvKmsSurfaceMemoryFormat baseSurfFormat[NVKMS_MAX_HEADS_PER_DISP]; + /* EVO2 only, base and output LUT state - prevents unnecessary flip interlocking */ + const NVSurfaceEvoRec *pBaseLutSurface[NVKMS_MAX_HEADS_PER_DISP]; + NvU64 baseLutOffset[NVKMS_MAX_HEADS_PER_DISP]; + const NVSurfaceEvoRec *pOutputLutSurface[NVKMS_MAX_HEADS_PER_DISP]; + NvU64 outputLutOffset[NVKMS_MAX_HEADS_PER_DISP]; + /* Composition parameters considered for hardware programming by EVO2 hal */ struct { NvBool initialized; @@ -1202,7 +1243,7 @@ typedef struct _NVEvoDevRec { */ struct { struct { - NVLutSurfaceEvoPtr LUT[3]; + NVSurfaceEvoPtr LUT[3]; struct { NvBool waitForPreviousUpdate; NvBool curBaseLutEnabled; @@ -1211,7 +1252,7 @@ typedef struct _NVEvoDevRec { nvkms_timer_handle_t *updateTimer; } disp[NVKMS_MAX_SUBDEVICES]; } apiHead[NVKMS_MAX_HEADS_PER_DISP]; - NVLutSurfaceEvoPtr defaultLut; + NVSurfaceEvoPtr defaultLut; enum NvKmsLUTState defaultBaseLUTState[NVKMS_MAX_SUBDEVICES]; enum NvKmsLUTState defaultOutputLUTState[NVKMS_MAX_SUBDEVICES]; @@ -1820,17 +1861,18 @@ typedef struct _NVDispHeadStateEvoRec { } hdrInfoFrame; struct { - NVLutSurfaceEvoPtr pCurrSurface; + NVSurfaceEvoPtr pCurrSurface; NvBool outputLutEnabled : 1; NvBool baseLutEnabled : 1; } lut; /* * The api head can be mapped onto the N harware heads, a frame presented - * by the api head gets split horizontally into N tiles, 'tilePosition' - * describe the tile presented by this hardware head. + * by the api head gets split horizontally into N sections, + * 'mergeHeadSection' describe the section presented by this hardware + * head. */ - NvU8 tilePosition; + NvU8 mergeHeadSection; NVEvoMergeMode mergeMode; /* @@ -1897,8 +1939,20 @@ typedef struct _NVDispApiHeadStateEvoRec { NVDispFlipOccurredEventDataEvoRec data; } flipOccurredEvent[NVKMS_MAX_LAYERS_PER_HEAD]; + NvU64 vblankCount; + NvU32 rmVBlankCallbackHandle; - NVListRec vblankCallbackList; + + /* + * All entries in vblankCallbackList[0] get called before any entries in + * vblankCallbackList[1]. + */ + NVListRec vblankCallbackList[2]; + + struct { + NVListRec list; + NVVBlankCallbackPtr pCallbackPtr; + } vblankSemControl; NvBool hs10bpcHint : 1; } NVDispApiHeadStateEvoRec; @@ -2267,6 +2321,9 @@ static inline NvBool NV_EVO_LOCK_PIN_IS_INTERNAL(NvU32 n) #define FOR_ALL_EVO_DEVS(_pDevEvo) \ nvListForEachEntry(_pDevEvo, &nvEvoGlobal.devList, devListEntry) +#define FOR_ALL_EVO_DEVS_SAFE(_pDevEvo, _pDevEvo_tmp) \ + nvListForEachEntry_safe(_pDevEvo, _pDevEvo_tmp, &nvEvoGlobal.devList, devListEntry) + #define FOR_ALL_DEFERRED_REQUEST_FIFOS_IN_SWAP_GROUP( \ _pSwapGroup, _pDeferredRequestFifo) \ nvListForEachEntry((_pDeferredRequestFifo), \ @@ -2444,24 +2501,6 @@ static inline NvBool nvIs3DVisionStereoEvo(const enum NvKmsStereoMode stereo) (_head)++) \ if ((_headMask) & (1 << (_head))) -typedef struct _NVLutSurfaceEvo { - NVDevEvoPtr pDevEvo; - - NvU32 handle; - NvU32 size; - - NVSurfaceDescriptor surfaceDesc; - - NvU32 allocRefCnt; /* Only used for dynamically allocated LUTs */ - - NvU64 gpuAddress; - void *subDeviceAddress[NVKMS_MAX_SUBDEVICES]; - - /* Keep track of prefetched surfaces. */ - NvU32 difrLastPrefetchPass; - -} NVLutSurfaceEvoRec; - typedef struct _NVFrameLockEvo { NVListRec frameLockListEntry; @@ -2919,11 +2958,9 @@ typedef const struct _nv_evo_hal { const NvU16 *green, const NvU16 *blue, int nColorMapEntries, int depth); - void (*SetLUTContextDma) (const NVDispEvoRec *pDispEvo, - const int head, - NVLutSurfaceEvoPtr pLutSurfEvo, - NvBool enableBaseLut, - NvBool enableOutputLut, + void (*SetOutputLut) (NVDevEvoPtr pDevEvo, NvU32 sd, NvU32 head, + const NVFlipLutHwState *pOutputLut, + NvU32 fpNormScale, NVEvoUpdateState *updateState, NvBool bypassComposition); void (*SetOutputScaler) (const NVDispEvoRec *pDispEvo, const NvU32 head, @@ -3179,11 +3216,18 @@ static inline void nvAssignHwHeadsMaskApiHeadState( nvPopCount32(hwHeadsMask); } +typedef struct _NVVblankSemControlHeadEntryRec { + NVListRec listEntry; + NvU32 previousRequestCounter; + NvU64 previousVblankCount; + struct NvKmsVblankSemControlDataOneHead *pDataOneHead; +} NVVblankSemControlHeadEntry; + typedef struct _NVVblankSemControl { NvU32 dispIndex; - NvU32 hwHeadMask; - NvU64 surfaceOffset; + NvU32 apiHeadMask; NVSurfaceEvoRec *pSurfaceEvo; + NVVblankSemControlHeadEntry headEntry[NV_MAX_HEADS]; } NVVblankSemControl; #ifdef __cplusplus diff --git a/src/nvidia-modeset/include/nvkms-vblank-sem-control.h b/src/nvidia-modeset/include/nvkms-vblank-sem-control.h new file mode 100644 index 0000000000..848805d5dc --- /dev/null +++ b/src/nvidia-modeset/include/nvkms-vblank-sem-control.h @@ -0,0 +1,49 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __NVKMS_VBLANK_SEM_CONTROL_H__ +#define __NVKMS_VBLANK_SEM_CONTROL_H__ + +#include "nvkms-types.h" + +NVVblankSemControl *nvEvoEnableVblankSemControl( + NVDevEvoRec *pDevEvo, + NVDispEvoRec *pDispEvo, + NvU32 apiHeadMask, + NVSurfaceEvoRec *pSurfaceEvo, + NvU64 surfaceOffset); + +NvBool nvEvoDisableVblankSemControl( + NVDevEvoRec *pDevEvo, + NVVblankSemControl *pVblankSemControl); + +NvBool nvEvoAccelVblankSemControls( + NVDevEvoPtr pDevEvo, + NVDispEvoRec *pDispEvo, + NvU32 apiHeadMask); + +void nvEvoOrphanVblankSemControl( + NVDispEvoRec *pDispEvo, + NVVblankSemControl *pVblankSemControl); + +#endif /* __NVKMS_VBLANK_SEM_CONTROL_H__ */ diff --git a/src/nvidia-modeset/interface/nvkms-api-types.h b/src/nvidia-modeset/interface/nvkms-api-types.h index 4f5bd787b2..34e4ab2350 100644 --- a/src/nvidia-modeset/interface/nvkms-api-types.h +++ b/src/nvidia-modeset/interface/nvkms-api-types.h @@ -50,6 +50,8 @@ #define NVKMS_LOG2_LUT_ARRAY_SIZE 10 #define NVKMS_LUT_ARRAY_SIZE (1 << NVKMS_LOG2_LUT_ARRAY_SIZE) +#define NVKMS_OLUT_FP_NORM_SCALE_DEFAULT 0xffffffff + typedef NvU32 NvKmsDeviceHandle; typedef NvU32 NvKmsDispHandle; typedef NvU32 NvKmsConnectorHandle; @@ -245,6 +247,80 @@ struct NvKmsLutRamps { NvU16 blue[NVKMS_LUT_ARRAY_SIZE]; /*! in */ }; +/* Datatypes for LUT capabilities */ +enum NvKmsLUTFormat { + /* + * Normalized fixed-point format mapping [0, 1] to [0x0, 0xFFFF]. + */ + NVKMS_LUT_FORMAT_UNORM16, + + /* + * Half-precision floating point. + */ + NVKMS_LUT_FORMAT_FP16, + + /* + * 14-bit fixed-point format required to work around hardware bug 813188. + * + * To convert from UNORM16 to UNORM14_WAR_813188: + * unorm14_war_813188 = ((unorm16 >> 2) & ~7) + 0x6000 + */ + NVKMS_LUT_FORMAT_UNORM14_WAR_813188 +}; + +enum NvKmsLUTVssSupport { + NVKMS_LUT_VSS_NOT_SUPPORTED, + NVKMS_LUT_VSS_SUPPORTED, + NVKMS_LUT_VSS_REQUIRED, +}; + +enum NvKmsLUTVssType { + NVKMS_LUT_VSS_TYPE_NONE, + NVKMS_LUT_VSS_TYPE_LINEAR, + NVKMS_LUT_VSS_TYPE_LOGARITHMIC, +}; + +struct NvKmsLUTCaps { + /*! Whether this layer or head on this device supports this LUT stage. */ + NvBool supported; + + /*! Whether this LUT supports VSS. */ + enum NvKmsLUTVssSupport vssSupport; + + /*! + * The type of VSS segmenting this LUT uses. + */ + enum NvKmsLUTVssType vssType; + + /*! + * Expected number of VSS segments. + */ + NvU32 vssSegments; + + /*! + * Expected number of LUT entries. + */ + NvU32 lutEntries; + + /*! + * Format for each of the LUT entries. + */ + enum NvKmsLUTFormat entryFormat; +}; + +/* each LUT entry uses this many bytes */ +#define NVKMS_LUT_CAPS_LUT_ENTRY_SIZE (4 * sizeof(NvU16)) + +/* if the LUT surface uses VSS, size of the VSS header */ +#define NVKMS_LUT_VSS_HEADER_SIZE (4 * NVKMS_LUT_CAPS_LUT_ENTRY_SIZE) + +struct NvKmsLUTSurfaceParams { + NvKmsSurfaceHandle surfaceHandle; + NvU64 offset NV_ALIGN_BYTES(8); + NvU32 vssSegments; + NvU32 lutEntries; +}; + /* * A 3x4 row-major colorspace conversion matrix. * @@ -463,6 +539,10 @@ struct NvKmsLayerCapabilities { * still expected to honor the NvKmsUsageBounds for each head. */ NvU64 supportedSurfaceMemoryFormats NV_ALIGN_BYTES(8); + + /* Capabilities for each LUT stage in the EVO3 precomp pipeline. */ + struct NvKmsLUTCaps ilut; + struct NvKmsLUTCaps tmo; }; /*! @@ -683,4 +763,20 @@ struct NvKmsSuperframeInfo { } view[NVKMS_MAX_SUPERFRAME_VIEWS]; }; +/* Fields within NvKmsVblankSemControlDataOneHead::flags */ +#define NVKMS_VBLANK_SEM_CONTROL_SWAP_INTERVAL 15:0 + +struct NvKmsVblankSemControlDataOneHead { + NvU32 requestCounterAccel; + NvU32 requestCounter; + NvU32 flags; + + NvU32 semaphore; + NvU64 vblankCount NV_ALIGN_BYTES(8); +}; + +struct NvKmsVblankSemControlData { + struct NvKmsVblankSemControlDataOneHead head[NV_MAX_HEADS]; +}; + #endif /* NVKMS_API_TYPES_H */ diff --git a/src/nvidia-modeset/interface/nvkms-api.h b/src/nvidia-modeset/interface/nvkms-api.h index fa0deec943..421b9d25e7 100644 --- a/src/nvidia-modeset/interface/nvkms-api.h +++ b/src/nvidia-modeset/interface/nvkms-api.h @@ -272,6 +272,7 @@ enum NvKmsIoctlCommand { NVKMS_IOCTL_DISABLE_VBLANK_SEM_CONTROL, NVKMS_IOCTL_ACCEL_VBLANK_SEM_CONTROLS, NVKMS_IOCTL_VRR_SIGNAL_SEMAPHORE, + NVKMS_IOCTL_FRAMEBUFFER_CONSOLE_DISABLED, }; @@ -751,6 +752,17 @@ struct NvKmsFlipCommonParams { */ struct NvKmsSetLutCommonParams lut; + struct { + NvBool specified; + NvBool enabled; + struct NvKmsLUTSurfaceParams lut; + } olut; + + struct { + NvBool specified; + NvU32 val; + } olutFpNormScale; + struct { NvBool specified; /*! @@ -886,6 +898,18 @@ struct NvKmsFlipCommonParams { NvBool specified; } compositionParams; + struct { + NvBool specified; + NvBool enabled; + struct NvKmsLUTSurfaceParams lut; + } ilut; + + struct { + NvBool specified; + NvBool enabled; + struct NvKmsLUTSurfaceParams lut; + } tmo; + /* * Color-space conversion matrix applied to the layer before * compositing. @@ -946,6 +970,34 @@ struct NvKmsFlipCommonParams { enum NvKmsInputColorSpace val; NvBool specified; } colorSpace; + + /* When enabled, explicitly set CSC00 with provided matrix */ + struct { + struct NvKmsCscMatrix matrix; + NvBool enabled; + NvBool specified; + } csc00Override; + + /* When enabled, explicitly set CSC01 with provided matrix */ + struct { + struct NvKmsCscMatrix matrix; + NvBool enabled; + NvBool specified; + } csc01Override; + + /* When enabled, explicitly set CSC10 with provided matrix */ + struct { + struct NvKmsCscMatrix matrix; + NvBool enabled; + NvBool specified; + } csc10Override; + + /* When enabled, explicitly set CSC11 with provided matrix */ + struct { + struct NvKmsCscMatrix matrix; + NvBool enabled; + NvBool specified; + } csc11Override; } layer[NVKMS_MAX_LAYERS_PER_HEAD]; }; @@ -1146,6 +1198,11 @@ struct NvKmsAllocDeviceReply { */ struct NvKmsLayerCapabilities layerCaps[NVKMS_MAX_LAYERS_PER_HEAD]; + /*! + * Describes supported functionalities for the output LUT on each head + */ + struct NvKmsLUTCaps olutCaps; + /*! * This bitmask specifies all of the (rotation, reflectionX, reflectionY) * combinations that are supported for the main and overlay layers. @@ -4133,11 +4190,74 @@ struct NvKmsSetFlipLockGroupParams { * NVKMS_IOCTL_DISABLE_VBLANK_SEM_CONTROL * NVKMS_IOCTL_ACCEL_VBLANK_SEM_CONTROLS * - * Enable or disable vblank semaphore control for the given heads using the - * specified surface and surface offset. The memory at that location is - * interpreted as an NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA. See the - * RMAPI documentation for NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA for - * details of the semantics of that interface. + * The VBlank Semaphore Control API ("VBlank Sem Control") allows clients to + * register for a semaphore release to be performed on the specified system + * memory. + * + * One or more clients may register a memory allocation + offset by specifying + * an NvKmsSurfaceHandle and offset within that surface. Until the + * vblank_sem_control is disabled, during each vblank on the specified heads, + * nvkms will interpret the specified memory location as an + * NvKmsVblankSemControlData data structure. Each enabled head will inspect the + * corresponding NvKmsVblankSemControlDataOneHead at + * NvKmsVblankSemControlData::head[head]. + * + * NvKmsEnableVblankSemControlRequest::surfaceOffset must be a multiple of 8, so + * that GPU semaphore releases can write to 8-byte fields within + * NvKmsVblankSemControlDataOneHead with natural alignment. + * + * During vblank, the NvKmsVblankSemControlDataOneHead::requestCounter field + * will be read, and the following pseudocode will be performed: + * + * swapInterval = DRF_VAL(data->flags) + * + * if (data->requestCounter == prevRequestCounter) + * return + * + * if (currentVblankCount < (prevVBlankCount + swapInterval)) + * return + * + * data->vblankCount = currentVblankCount + * data->semaphore = data->requestCounter + * + * prevRequestCounter = data->requestCounter + * previousVblankCount = currentVblankCount + * + * I.e., if the client-described conditions are met, nvkms will write + * NvKmsVblankSemControlDataOneHead::semaphore to the client-requested + * 'requestCounter' along with the vblankCount. + * + * The intent is for clients to use semaphore releases to write: + * + * NvKmsVblankSemControlDataOneHead::swapInterval + * NvKmsVblankSemControlDataOneHead::requestCounter + * + * and then perform a semaphore acquire on + * NvKmsVblankSemControlDataOneHead::semaphore >= requestCounter (using the + * ACQ_GEQ semaphore operation). This will block any following methods in the + * client's channel (e.g., a blit) until the requested conditions are met. Note + * the ::requestCounter should be written last, because the change in value of + * ::requestCounter is what causes nvkms, during a vblank callback, to inspect + * the other fields. + * + * Additionally, clients should use the CPU (not semaphore releases in their + * channel) to write the field + * NvKmsVblankSemControlDataOneHead::requestCounterAccel at the same time that + * they enqueue the semaphore release to write to + * NvKmsVblankSemControlDataOneHead::requestCounter. ::requestCounterAccel will + * be used by nvkms to "accelerate" the vblank sem control by copying the value + * from ::requestCounterAccel to ::semaphore. This will be done when the vblank + * sem control is disabled, and when a client calls + * NVKMS_IOCTL_ACCEL_VBLANK_SEM_CONTROLS. It is important for nvkms to have + * access to the value in ::requestCounterAccel, and not just ::requestCounter. + * The latter is only the last value released so far by the client's channel + * (further releases to ::requestCounter may still be inflight, perhaps blocked + * on pending semaphore acquires). The former should be the most recent value + * enqueued in the channel. This is also why it is important for clients to + * acquire with ACQ_GEQ (greater-than-or-equal-to), rather than just ACQUIRE. + * + * The same NvKmsSurfaceHandle (with different surfaceOffsets) may be used by + * multiple VBlank Sem Controls. * * It is the responsibility of the nvkms client(s) to coordinate at modeset * time: the mapping of nvkms apiHeads to underlying hwHeads may change during a @@ -4150,7 +4270,7 @@ struct NvKmsSetFlipLockGroupParams { * NVKMS_IOCTL_ACCEL_VBLANK_SEM_CONTROLS can be used, specifying a particular * set of heads, to set all vblank sem controls on those heads to have their * semaphore set to the value in their respective - * NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA::requestCounterAccel fields. + * NvKmsVblankSemControlDataOneHead::requestCounterAccel fields. * * These ioctls are only available when * NvKmsAllocDeviceReply::supportsVblankSemControl is true. @@ -4224,4 +4344,27 @@ struct NvKmsVrrSignalSemaphoreParams { struct NvKmsVrrSignalSemaphoreReply reply; /*! out */ }; +/* + * NVKMS_IOCTL_FRAMEBUFFER_CONSOLE_DISABLED + * + * Notify NVKMS that the calling client has disabled the framebuffer console. + * NVKMS will free the framebuffer console reserved memory and disable + * NVKMS-based console restore. + * + * This IOCTL can only be used by kernel-mode clients. + */ + +struct NvKmsFramebufferConsoleDisabledRequest { + NvKmsDeviceHandle deviceHandle; +}; + +struct NvKmsFramebufferConsoleDisabledReply { + NvU32 padding; +}; + +struct NvKmsFramebufferConsoleDisabledParams { + struct NvKmsFramebufferConsoleDisabledRequest request; + struct NvKmsFramebufferConsoleDisabledReply reply; +}; + #endif /* NVKMS_API_H */ diff --git a/src/nvidia-modeset/kapi/include/nvkms-kapi-internal.h b/src/nvidia-modeset/kapi/include/nvkms-kapi-internal.h index 0dabd22b71..bbf87cbe40 100644 --- a/src/nvidia-modeset/kapi/include/nvkms-kapi-internal.h +++ b/src/nvidia-modeset/kapi/include/nvkms-kapi-internal.h @@ -124,6 +124,8 @@ struct NvKmsKapiDevice { NvU64 supportedSurfaceMemoryFormats[NVKMS_KAPI_LAYER_MAX]; NvBool supportsICtCp[NVKMS_KAPI_LAYER_MAX]; + struct NvKmsKapiLutCaps lutCaps; + NvU32 numHeads; NvU32 numLayers[NVKMS_KAPI_MAX_HEADS]; diff --git a/src/nvidia-modeset/kapi/interface/nvkms-kapi.h b/src/nvidia-modeset/kapi/interface/nvkms-kapi.h index 4d740bbe4e..309d60699a 100644 --- a/src/nvidia-modeset/kapi/interface/nvkms-kapi.h +++ b/src/nvidia-modeset/kapi/interface/nvkms-kapi.h @@ -124,6 +124,14 @@ struct NvKmsKapiDisplayMode { #define NVKMS_KAPI_LAYER_INVALID_IDX 0xff #define NVKMS_KAPI_LAYER_PRIMARY_IDX 0 +struct NvKmsKapiLutCaps { + struct { + struct NvKmsLUTCaps ilut; + struct NvKmsLUTCaps tmo; + } layer[NVKMS_KAPI_LAYER_MAX]; + struct NvKmsLUTCaps olut; +}; + struct NvKmsKapiDeviceResourcesInfo { NvU32 numHeads; @@ -169,6 +177,8 @@ struct NvKmsKapiDeviceResourcesInfo { NvU64 supportedSurfaceMemoryFormats[NVKMS_KAPI_LAYER_MAX]; NvBool supportsICtCp[NVKMS_KAPI_LAYER_MAX]; + + struct NvKmsKapiLutCaps lutCaps; }; #define NVKMS_KAPI_LAYER_MASK(layerType) (1 << (layerType)) @@ -262,21 +272,54 @@ struct NvKmsKapiLayerConfig { NvU16 dstWidth, dstHeight; enum NvKmsInputColorSpace inputColorSpace; + + struct { + NvBool enabled; + struct NvKmsKapiSurface *lutSurface; + NvU64 offset; + NvU32 vssSegments; + NvU32 lutEntries; + } ilut; + + struct { + NvBool enabled; + struct NvKmsKapiSurface *lutSurface; + NvU64 offset; + NvU32 vssSegments; + NvU32 lutEntries; + } tmo; + struct NvKmsCscMatrix csc; NvBool cscUseMain; + + struct { + struct NvKmsCscMatrix lmsCtm; + struct NvKmsCscMatrix lmsToItpCtm; + struct NvKmsCscMatrix itpToLmsCtm; + struct NvKmsCscMatrix blendCtm; + struct { + NvBool lmsCtm : 1; + NvBool lmsToItpCtm : 1; + NvBool itpToLmsCtm : 1; + NvBool blendCtm : 1; + } enabled; + } matrixOverrides; }; struct NvKmsKapiLayerRequestedConfig { struct NvKmsKapiLayerConfig config; struct { - NvBool surfaceChanged : 1; - NvBool srcXYChanged : 1; - NvBool srcWHChanged : 1; - NvBool dstXYChanged : 1; - NvBool dstWHChanged : 1; - NvBool cscChanged : 1; - NvBool tfChanged : 1; - NvBool hdrMetadataChanged : 1; + NvBool surfaceChanged : 1; + NvBool srcXYChanged : 1; + NvBool srcWHChanged : 1; + NvBool dstXYChanged : 1; + NvBool dstWHChanged : 1; + NvBool cscChanged : 1; + NvBool tfChanged : 1; + NvBool hdrMetadataChanged : 1; + NvBool matrixOverridesChanged : 1; + NvBool ilutChanged : 1; + NvBool tmoChanged : 1; } flags; }; @@ -342,18 +385,30 @@ struct NvKmsKapiHeadModeSetConfig { struct NvKmsLutRamps *pRamps; } output; } lut; + + struct { + NvBool enabled; + struct NvKmsKapiSurface *lutSurface; + NvU64 offset; + NvU32 vssSegments; + NvU32 lutEntries; + } olut; + + NvU32 olutFpNormScale; }; struct NvKmsKapiHeadRequestedConfig { struct NvKmsKapiHeadModeSetConfig modeSetConfig; struct { - NvBool activeChanged : 1; - NvBool displaysChanged : 1; - NvBool modeChanged : 1; - NvBool hdrInfoFrameChanged : 1; - NvBool colorimetryChanged : 1; - NvBool ilutChanged : 1; - NvBool olutChanged : 1; + NvBool activeChanged : 1; + NvBool displaysChanged : 1; + NvBool modeChanged : 1; + NvBool hdrInfoFrameChanged : 1; + NvBool colorimetryChanged : 1; + NvBool legacyIlutChanged : 1; + NvBool legacyOlutChanged : 1; + NvBool olutChanged : 1; + NvBool olutFpNormScaleChanged : 1; } flags; struct NvKmsKapiCursorRequestedConfig cursorRequestedConfig; @@ -1172,21 +1227,6 @@ struct NvKmsKapiFunctionsTable { NvU64 *pPages ); - /*! - * Check if this memory object can be scanned out for display. - * - * \param [in] device A device allocated using allocateDevice(). - * - * \param [in] memory The memory object to check for display support. - * - * \return NV_TRUE if this memory can be displayed, NV_FALSE if not. - */ - NvBool (*isMemoryValidForDisplay) - ( - const struct NvKmsKapiDevice *device, - const struct NvKmsKapiMemory *memory - ); - /* * Import SGT as a memory handle. * @@ -1504,6 +1544,16 @@ struct NvKmsKapiFunctionsTable { struct NvKmsKapiDevice *device, NvS32 index ); + + /* + * Notify NVKMS that the system's framebuffer console has been disabled and + * the reserved allocation for the old framebuffer console can be unmapped. + */ + void + (*framebufferConsoleDisabled) + ( + struct NvKmsKapiDevice *device + ); }; /** @} */ @@ -1518,6 +1568,20 @@ NvBool nvKmsKapiGetFunctionsTable struct NvKmsKapiFunctionsTable *funcsTable ); +NvU32 nvKmsKapiF16ToF32(NvU16 a); + +NvU16 nvKmsKapiF32ToF16(NvU32 a); + +NvU32 nvKmsKapiF32Mul(NvU32 a, NvU32 b); + +NvU32 nvKmsKapiF32Div(NvU32 a, NvU32 b); + +NvU32 nvKmsKapiF32Add(NvU32 a, NvU32 b); + +NvU32 nvKmsKapiF32ToUI32RMinMag(NvU32 a, NvBool exact); + +NvU32 nvKmsKapiUI32ToF32(NvU32 a); + /** @} */ #endif /* defined(__NVKMS_KAPI_H__) */ diff --git a/src/nvidia-modeset/kapi/src/nvkms-kapi.c b/src/nvidia-modeset/kapi/src/nvkms-kapi.c index 7c1c7e32b7..32935cfe8f 100644 --- a/src/nvidia-modeset/kapi/src/nvkms-kapi.c +++ b/src/nvidia-modeset/kapi/src/nvkms-kapi.c @@ -30,6 +30,9 @@ #include "nvkms-rmapi.h" #include "nvkms-vrr.h" +#include "nvkms-softfloat.h" +#include "nv-float.h" + #include "nvkms-kapi.h" #include "nvkms-kapi-private.h" #include "nvkms-kapi-internal.h" @@ -401,7 +404,13 @@ static NvBool KmsAllocateDevice(struct NvKmsKapiDevice *device) device->supportedSurfaceMemoryFormats[layer] = paramsAlloc->reply.layerCaps[layer].supportedSurfaceMemoryFormats; device->supportsICtCp[layer] = paramsAlloc->reply.layerCaps[layer].supportsICtCp; + + device->lutCaps.layer[layer].ilut = + paramsAlloc->reply.layerCaps[layer].ilut; + device->lutCaps.layer[layer].tmo = + paramsAlloc->reply.layerCaps[layer].tmo; } + device->lutCaps.olut = paramsAlloc->reply.olutCaps; if (paramsAlloc->reply.validNIsoFormatMask & (1 << NVKMS_NISO_FORMAT_FOUR_WORD_NVDISPLAY)) { @@ -1120,6 +1129,9 @@ static NvBool GetDeviceResourcesInfo nvkms_memcpy(info->supportsICtCp, device->supportsICtCp, sizeof(device->supportsICtCp)); + + info->lutCaps = device->lutCaps; + done: return status; @@ -1909,57 +1921,6 @@ static NvBool GetMemoryPages return NV_TRUE; } -/* - * Check if the memory we are creating this framebuffer with is valid. We - * cannot scan out sysmem or compressed buffers. - * - * If we cannot use this memory for display it may be resident in sysmem - * or may belong to another GPU. - */ -static NvBool IsMemoryValidForDisplay -( - const struct NvKmsKapiDevice *device, - const struct NvKmsKapiMemory *memory -) -{ - NV_STATUS status; - NV0041_CTRL_SURFACE_INFO surfaceInfo = {}; - NV0041_CTRL_GET_SURFACE_INFO_PARAMS surfaceInfoParams = {}; - - if (device == NULL || memory == NULL) { - return NV_FALSE; - } - - /* - * Don't do these checks on tegra. Tegra has different capabilities. - * Here we always say display is possible so we never fail framebuffer - * creation. - */ - if (device->isSOC) { - return NV_TRUE; - } - - /* Get the type of address space this memory is in, i.e. vidmem or sysmem */ - surfaceInfo.index = NV0041_CTRL_SURFACE_INFO_INDEX_ADDR_SPACE_TYPE; - - surfaceInfoParams.surfaceInfoListSize = 1; - surfaceInfoParams.surfaceInfoList = (NvP64)&surfaceInfo; - - status = nvRmApiControl(device->hRmClient, - memory->hRmHandle, - NV0041_CTRL_CMD_GET_SURFACE_INFO, - &surfaceInfoParams, - sizeof(surfaceInfoParams)); - if (status != NV_OK) { - nvKmsKapiLogDeviceDebug(device, - "Failed to get memory location of RM memory object 0x%x", - memory->hRmHandle); - return NV_FALSE; - } - - return surfaceInfo.data == NV0000_CTRL_CMD_CLIENT_GET_ADDR_SPACE_TYPE_VIDMEM; -} - static void FreeMemoryPages ( NvU64 *pPages @@ -2557,6 +2518,53 @@ static void AssignHDRMetadataConfig( } } +static void AssignLayerLutConfig( + const struct NvKmsKapiDevice *device, + const struct NvKmsKapiLayerConfig *layerConfig, + const struct NvKmsKapiLayerRequestedConfig *layerRequestedConfig, + const NvU32 layer, + struct NvKmsFlipCommonParams *params, + NvBool bFromKmsSetMode) +{ + if ((device->lutCaps.layer[layer].ilut.supported) && + (layerRequestedConfig->flags.ilutChanged || bFromKmsSetMode)) { + + params->layer[layer].ilut.specified = TRUE; + params->layer[layer].ilut.enabled = layerConfig->ilut.enabled; + + if (layerConfig->ilut.lutSurface != NULL) { + params->layer[layer].ilut.lut.surfaceHandle = + layerConfig->ilut.lutSurface->hKmsHandle; + } else { + params->layer[layer].ilut.lut.surfaceHandle = 0; + } + params->layer[layer].ilut.lut.offset = layerConfig->ilut.offset; + params->layer[layer].ilut.lut.vssSegments = + layerConfig->ilut.vssSegments; + params->layer[layer].ilut.lut.lutEntries = + layerConfig->ilut.lutEntries; + } + + if ((device->lutCaps.layer[layer].tmo.supported) && + (layerRequestedConfig->flags.tmoChanged || bFromKmsSetMode)) { + + params->layer[layer].tmo.specified = TRUE; + params->layer[layer].tmo.enabled = layerConfig->tmo.enabled; + + if (layerConfig->tmo.lutSurface != NULL) { + params->layer[layer].tmo.lut.surfaceHandle = + layerConfig->tmo.lutSurface->hKmsHandle; + } else { + params->layer[layer].tmo.lut.surfaceHandle = 0; + } + params->layer[layer].tmo.lut.offset = layerConfig->tmo.offset; + params->layer[layer].tmo.lut.vssSegments = + layerConfig->tmo.vssSegments; + params->layer[layer].tmo.lut.lutEntries = + layerConfig->tmo.lutEntries; + } +} + static void NvKmsKapiCursorConfigToKms( const struct NvKmsKapiCursorRequestedConfig *requestedConfig, struct NvKmsFlipCommonParams *params, @@ -2626,12 +2634,21 @@ static NvBool NvKmsKapiOverlayLayerConfigToKms( params->layer[layer].colorSpace.specified = TRUE; } - if (layerRequestedConfig->flags.cscChanged || bFromKmsSetMode) { + if (layerRequestedConfig->flags.cscChanged || + layerRequestedConfig->flags.matrixOverridesChanged || + bFromKmsSetMode) { params->layer[layer].csc.specified = NV_TRUE; params->layer[layer].csc.useMain = layerConfig->cscUseMain; if (!layerConfig->cscUseMain) { params->layer[layer].csc.matrix = layerConfig->csc; } + + // 'blendCtm' overrides 'csc', but provides a 3x4 matrix. + if (layerConfig->matrixOverrides.enabled.blendCtm) { + params->layer[layer].csc.useMain = FALSE; + params->layer[layer].csc.matrix = + layerConfig->matrixOverrides.blendCtm; + } } if (layerRequestedConfig->flags.srcWHChanged || bFromKmsSetMode) { @@ -2656,6 +2673,51 @@ static NvBool NvKmsKapiOverlayLayerConfigToKms( AssignHDRMetadataConfig(layerConfig, layerRequestedConfig, layer, params, bFromKmsSetMode); + if (layerRequestedConfig->flags.matrixOverridesChanged || bFromKmsSetMode) { + // 'lmsCtm' explicitly provides a matrix to program CSC00. + if (layerConfig->matrixOverrides.enabled.lmsCtm) { + params->layer[layer].csc00Override.matrix = + layerConfig->matrixOverrides.lmsCtm; + params->layer[layer].csc00Override.enabled = TRUE; + } else { + params->layer[layer].csc00Override.enabled = FALSE; + } + params->layer[layer].csc00Override.specified = TRUE; + + // 'lmsToItpCtm' explicitly provides a matrix to program CSC01. + if (layerConfig->matrixOverrides.enabled.lmsToItpCtm) { + params->layer[layer].csc01Override.matrix = + layerConfig->matrixOverrides.lmsToItpCtm; + params->layer[layer].csc01Override.enabled = TRUE; + } else { + params->layer[layer].csc01Override.enabled = FALSE; + } + params->layer[layer].csc01Override.specified = TRUE; + + // 'itpToLmsCtm' explicitly provides a matrix to program CSC10. + if (layerConfig->matrixOverrides.enabled.itpToLmsCtm) { + params->layer[layer].csc10Override.matrix = + layerConfig->matrixOverrides.itpToLmsCtm; + params->layer[layer].csc10Override.enabled = TRUE; + } else { + params->layer[layer].csc10Override.enabled = FALSE; + } + params->layer[layer].csc10Override.specified = TRUE; + + // 'blendCtm' explicitly provides a matrix to program CSC11. + if (layerConfig->matrixOverrides.enabled.blendCtm) { + params->layer[layer].csc11Override.matrix = + layerConfig->matrixOverrides.blendCtm; + params->layer[layer].csc11Override.enabled = TRUE; + } else { + params->layer[layer].csc11Override.enabled = FALSE; + } + params->layer[layer].csc11Override.specified = TRUE; + } + + AssignLayerLutConfig(device, layerConfig, layerRequestedConfig, layer, + params, bFromKmsSetMode); + if (commit) { NvU32 nextIndex = NVKMS_KAPI_INC_NOTIFIER_INDEX( device->layerState[head][layer]. @@ -2754,19 +2816,74 @@ static NvBool NvKmsKapiPrimaryLayerConfigToKms( changed = TRUE; } - if (layerRequestedConfig->flags.cscChanged || bFromKmsSetMode) { + if (layerRequestedConfig->flags.cscChanged || + layerRequestedConfig->flags.matrixOverridesChanged || + bFromKmsSetMode) { nvAssert(!layerConfig->cscUseMain); params->layer[NVKMS_MAIN_LAYER].csc.specified = NV_TRUE; params->layer[NVKMS_MAIN_LAYER].csc.useMain = FALSE; params->layer[NVKMS_MAIN_LAYER].csc.matrix = layerConfig->csc; + // 'blendCtm' overrides 'csc', but provides a 3x4 matrix. + if (layerConfig->matrixOverrides.enabled.blendCtm) { + params->layer[NVKMS_MAIN_LAYER].csc.matrix = + layerConfig->matrixOverrides.blendCtm; + } + changed = TRUE; } AssignHDRMetadataConfig(layerConfig, layerRequestedConfig, NVKMS_MAIN_LAYER, params, bFromKmsSetMode); + if (layerRequestedConfig->flags.matrixOverridesChanged || bFromKmsSetMode) { + // 'lmsCtm' explicitly provides a matrix to program CSC00. + if (layerConfig->matrixOverrides.enabled.lmsCtm) { + params->layer[NVKMS_MAIN_LAYER].csc00Override.matrix = + layerConfig->matrixOverrides.lmsCtm; + params->layer[NVKMS_MAIN_LAYER].csc00Override.enabled = TRUE; + } else { + params->layer[NVKMS_MAIN_LAYER].csc00Override.enabled = FALSE; + } + params->layer[NVKMS_MAIN_LAYER].csc00Override.specified = TRUE; + + // 'lmsToItpCtm' explicitly provides a matrix to program CSC01. + if (layerConfig->matrixOverrides.enabled.lmsToItpCtm) { + params->layer[NVKMS_MAIN_LAYER].csc01Override.matrix = + layerConfig->matrixOverrides.lmsToItpCtm; + params->layer[NVKMS_MAIN_LAYER].csc01Override.enabled = TRUE; + } else { + params->layer[NVKMS_MAIN_LAYER].csc01Override.enabled = FALSE; + } + params->layer[NVKMS_MAIN_LAYER].csc01Override.specified = TRUE; + + // 'itpToLmsCtm' explicitly provides a matrix to program CSC10. + if (layerConfig->matrixOverrides.enabled.itpToLmsCtm) { + params->layer[NVKMS_MAIN_LAYER].csc10Override.matrix = + layerConfig->matrixOverrides.itpToLmsCtm; + params->layer[NVKMS_MAIN_LAYER].csc10Override.enabled = TRUE; + } else { + params->layer[NVKMS_MAIN_LAYER].csc10Override.enabled = FALSE; + } + params->layer[NVKMS_MAIN_LAYER].csc10Override.specified = TRUE; + + // 'blendCtm' explicitly provides a matrix to program CSC11. + if (layerConfig->matrixOverrides.enabled.blendCtm) { + params->layer[NVKMS_MAIN_LAYER].csc11Override.matrix = + layerConfig->matrixOverrides.blendCtm; + params->layer[NVKMS_MAIN_LAYER].csc11Override.enabled = TRUE; + } else { + params->layer[NVKMS_MAIN_LAYER].csc11Override.enabled = FALSE; + } + params->layer[NVKMS_MAIN_LAYER].csc11Override.specified = TRUE; + + changed = TRUE; + } + + AssignLayerLutConfig(device, layerConfig, layerRequestedConfig, NVKMS_MAIN_LAYER, + params, bFromKmsSetMode); + if (commit && changed) { NvU32 nextIndex = NVKMS_KAPI_INC_NOTIFIER_INDEX( device->layerState[head][NVKMS_MAIN_LAYER]. @@ -2850,7 +2967,7 @@ static void NvKmsKapiHeadLutConfigToKms( struct NvKmsSetOutputLutParams *output = &lutParams->output; /* input LUT */ - if (headRequestedConfig->flags.ilutChanged || bFromKmsSetMode) { + if (headRequestedConfig->flags.legacyIlutChanged || bFromKmsSetMode) { input->specified = NV_TRUE; input->depth = modeSetConfig->lut.input.depth; input->start = modeSetConfig->lut.input.start; @@ -2860,7 +2977,7 @@ static void NvKmsKapiHeadLutConfigToKms( } /* output LUT */ - if (headRequestedConfig->flags.olutChanged || bFromKmsSetMode) { + if (headRequestedConfig->flags.legacyOlutChanged || bFromKmsSetMode) { output->specified = NV_TRUE; output->enabled = modeSetConfig->lut.output.enabled; @@ -2981,6 +3098,27 @@ static NvBool NvKmsKapiRequestedModeSetConfigToKms( ¶msHead->flip.lut, NV_TRUE /* bFromKmsSetMode */); + if (device->lutCaps.olut.supported) { + paramsHead->flip.olut.specified = TRUE; + paramsHead->flip.olut.enabled = headModeSetConfig->olut.enabled; + + if (headModeSetConfig->olut.lutSurface != NULL) { + paramsHead->flip.olut.lut.surfaceHandle = + headModeSetConfig->olut.lutSurface->hKmsHandle; + } else { + paramsHead->flip.olut.lut.surfaceHandle = 0; + } + paramsHead->flip.olut.lut.offset = headModeSetConfig->olut.offset; + paramsHead->flip.olut.lut.vssSegments = + headModeSetConfig->olut.vssSegments; + paramsHead->flip.olut.lut.lutEntries = + headModeSetConfig->olut.lutEntries; + + paramsHead->flip.olutFpNormScale.specified = TRUE; + paramsHead->flip.olutFpNormScale.val = + headModeSetConfig->olutFpNormScale; + } + NvKmsKapiCursorConfigToKms(&headRequestedConfig->cursorRequestedConfig, ¶msHead->flip, NV_TRUE /* bFromKmsSetMode */); @@ -3240,6 +3378,30 @@ static NvBool KmsFlip( NvKmsKapiHeadLutConfigToKms(headRequestedConfig, &flipParams->lut, NV_FALSE /* bFromKmsSetMode */); + + if (device->lutCaps.olut.supported && headRequestedConfig->flags.olutChanged) { + flipParams->olut.specified = TRUE; + flipParams->olut.enabled = headModeSetConfig->olut.enabled; + + if (headModeSetConfig->olut.lutSurface != NULL) { + flipParams->olut.lut.surfaceHandle = + headModeSetConfig->olut.lutSurface->hKmsHandle; + } else { + flipParams->olut.lut.surfaceHandle = 0; + } + flipParams->olut.lut.offset = headModeSetConfig->olut.offset; + flipParams->olut.lut.vssSegments = + headModeSetConfig->olut.vssSegments; + flipParams->olut.lut.lutEntries = + headModeSetConfig->olut.lutEntries; + } + + if (device->lutCaps.olut.supported && + headRequestedConfig->flags.olutFpNormScaleChanged) { + + flipParams->olutFpNormScale.specified = TRUE; + flipParams->olutFpNormScale.val = headModeSetConfig->olutFpNormScale; + } } if (params->request.numFlipHeads == 0) { @@ -3337,9 +3499,11 @@ static NvBool ApplyModeSetConfig( } bRequiredModeset = - headRequestedConfig->flags.activeChanged || - headRequestedConfig->flags.displaysChanged || - headRequestedConfig->flags.modeChanged; + headRequestedConfig->flags.activeChanged || + headRequestedConfig->flags.displaysChanged || + headRequestedConfig->flags.modeChanged || + headRequestedConfig->flags.hdrInfoFrameChanged || + headRequestedConfig->flags.colorimetryChanged; /* * NVKMS flip ioctl could not validate flip configuration for an @@ -3527,6 +3691,28 @@ static NvBool SignalVrrSemaphore return status; } +static void FramebufferConsoleDisabled +( + struct NvKmsKapiDevice *device +) +{ + struct NvKmsFramebufferConsoleDisabledParams params = { }; + NvBool status; + + if (device->hKmsDevice == 0x0) { + return; + } + + params.request.deviceHandle = device->hKmsDevice; + + status = nvkms_ioctl_from_kapi(device->pKmsOpen, + NVKMS_IOCTL_FRAMEBUFFER_CONSOLE_DISABLED, + ¶ms, sizeof(params)); + if (!status) { + nvKmsKapiLogDeviceDebug(device, "NVKMS FramebufferConsoleDisabled failed"); + } +} + NvBool nvKmsKapiGetFunctionsTableInternal ( struct NvKmsKapiFunctionsTable *funcsTable @@ -3595,8 +3781,6 @@ NvBool nvKmsKapiGetFunctionsTableInternal funcsTable->getMemoryPages = GetMemoryPages; funcsTable->freeMemoryPages = FreeMemoryPages; - funcsTable->isMemoryValidForDisplay = IsMemoryValidForDisplay; - funcsTable->importSemaphoreSurface = nvKmsKapiImportSemaphoreSurface; funcsTable->freeSemaphoreSurface = nvKmsKapiFreeSemaphoreSurface; funcsTable->registerSemaphoreSurfaceCallback = @@ -3606,6 +3790,7 @@ NvBool nvKmsKapiGetFunctionsTableInternal funcsTable->setSemaphoreSurfaceValue = nvKmsKapiSetSemaphoreSurfaceValue; funcsTable->setSuspendResumeCallback = nvKmsKapiSetSuspendResumeCallback; + funcsTable->framebufferConsoleDisabled = FramebufferConsoleDisabled; funcsTable->tryInitDisplaySemaphore = nvKmsKapiTryInitDisplaySemaphore; funcsTable->signalDisplaySemaphore = nvKmsKapiSignalDisplaySemaphore; @@ -3614,3 +3799,47 @@ NvBool nvKmsKapiGetFunctionsTableInternal return NV_TRUE; } + +NvU32 nvKmsKapiF16ToF32Internal(NvU16 a) +{ + float16_t fa = { .v = a }; + return f16_to_f32(fa).v; +} + +NvU16 nvKmsKapiF32ToF16Internal(NvU32 a) +{ + float32_t fa = { .v = a }; + return f32_to_f16(fa).v; +} + +NvU32 nvKmsKapiF32MulInternal(NvU32 a, NvU32 b) +{ + float32_t fa = { .v = a }; + float32_t fb = { .v = b }; + return f32_mul(fa, fb).v; +} + +NvU32 nvKmsKapiF32DivInternal(NvU32 a, NvU32 b) +{ + float32_t fa = { .v = a }; + float32_t fb = { .v = b }; + return f32_div(fa, fb).v; +} + +NvU32 nvKmsKapiF32AddInternal(NvU32 a, NvU32 b) +{ + float32_t fa = { .v = a }; + float32_t fb = { .v = b }; + return f32_add(fa, fb).v; +} + +NvU32 nvKmsKapiF32ToUI32RMinMagInternal(NvU32 a, NvBool exact) +{ + float32_t fa = { .v = a }; + return f32_to_ui32_r_minMag(fa, exact); +} + +NvU32 nvKmsKapiUI32ToF32Internal(NvU32 a) +{ + return ui32_to_f32(a).v; +} diff --git a/src/nvidia-modeset/os-interface/include/nvidia-modeset-os-interface.h b/src/nvidia-modeset/os-interface/include/nvidia-modeset-os-interface.h index 82309a8d6b..a2ee2067f0 100644 --- a/src/nvidia-modeset/os-interface/include/nvidia-modeset-os-interface.h +++ b/src/nvidia-modeset/os-interface/include/nvidia-modeset-os-interface.h @@ -67,6 +67,14 @@ enum NvKmsSyncPtOp { NVKMS_SYNCPT_OP_READ_MINVAL, }; +enum NvKmsDebugForceColorSpace { + NVKMS_DEBUG_FORCE_COLOR_SPACE_NONE, + NVKMS_DEBUG_FORCE_COLOR_SPACE_RGB, + NVKMS_DEBUG_FORCE_COLOR_SPACE_YUV444, + NVKMS_DEBUG_FORCE_COLOR_SPACE_YUV422, + NVKMS_DEBUG_FORCE_COLOR_SPACE_MAX, +}; + typedef struct { struct { @@ -102,6 +110,7 @@ NvBool nvkms_disable_vrr_memclk_switch(void); NvBool nvkms_hdmi_deepcolor(void); NvBool nvkms_vblank_sem_control(void); NvBool nvkms_opportunistic_display_sync(void); +enum NvKmsDebugForceColorSpace nvkms_debug_force_color_space(void); void nvkms_call_rm (void *ops); void* nvkms_alloc (size_t size, diff --git a/src/nvidia-modeset/os-interface/include/nvkms.h b/src/nvidia-modeset/os-interface/include/nvkms.h index 25e4923b63..0ac3f7913c 100644 --- a/src/nvidia-modeset/os-interface/include/nvkms.h +++ b/src/nvidia-modeset/os-interface/include/nvkms.h @@ -110,4 +110,18 @@ NvBool nvKmsSetBacklight(NvU32 display_id, void *drv_priv, NvU32 brightness); NvBool nvKmsOpenDevHasSubOwnerPermissionOrBetter(const struct NvKmsPerOpenDev *pOpenDev); +NvU32 nvKmsKapiF16ToF32Internal(NvU16 a); + +NvU16 nvKmsKapiF32ToF16Internal(NvU32 a); + +NvU32 nvKmsKapiF32MulInternal(NvU32 a, NvU32 b); + +NvU32 nvKmsKapiF32DivInternal(NvU32 a, NvU32 b); + +NvU32 nvKmsKapiF32AddInternal(NvU32 a, NvU32 b); + +NvU32 nvKmsKapiF32ToUI32RMinMagInternal(NvU32 a, NvBool exact); + +NvU32 nvKmsKapiUI32ToF32Internal(NvU32 a); + #endif /* __NV_KMS_H__ */ diff --git a/src/nvidia-modeset/src/dp/nvdp-evo-interface.hpp b/src/nvidia-modeset/src/dp/nvdp-evo-interface.hpp index 114aaa466b..e91825492b 100644 --- a/src/nvidia-modeset/src/dp/nvdp-evo-interface.hpp +++ b/src/nvidia-modeset/src/dp/nvdp-evo-interface.hpp @@ -43,13 +43,6 @@ class EvoInterface : public DisplayPort::Object, virtual NvU32 rmControl0073(NvU32 command, void * params, NvU32 paramSize); virtual NvU32 rmControl5070(NvU32 command, void * params, NvU32 paramSize); - virtual void disconnectHead(unsigned head) { - nvAssert(!"disconnectHead should never be called"); - } - virtual void reattachHead(unsigned head) { - nvAssert(!"reattachHead should never be called"); - } - virtual NvU32 getSubdeviceIndex(); virtual NvU32 getDisplayId(); virtual NvU32 getSorIndex(); diff --git a/src/nvidia-modeset/src/dp/nvdp-timer.cpp b/src/nvidia-modeset/src/dp/nvdp-timer.cpp index bc4d2e29d0..8739440012 100644 --- a/src/nvidia-modeset/src/dp/nvdp-timer.cpp +++ b/src/nvidia-modeset/src/dp/nvdp-timer.cpp @@ -124,11 +124,6 @@ namespace nvkmsDisplayPort { }; // namespace nvkmsDisplayPort -NvBool nvDPTimersPending(void) -{ - return FALSE; -} - NVDPLibTimerPtr nvDPAllocTimer(NVDevEvoPtr pDevEvo) { NVDPLibTimerPtr pTimer = new _nv_dplibtimer(pDevEvo); diff --git a/src/nvidia-modeset/src/nvkms-attributes.c b/src/nvidia-modeset/src/nvkms-attributes.c index c1154cac49..2f93892719 100644 --- a/src/nvidia-modeset/src/nvkms-attributes.c +++ b/src/nvidia-modeset/src/nvkms-attributes.c @@ -611,6 +611,8 @@ static void DpyPostColorSpaceOrRangeSetEvo(NVDpyEvoPtr pDpyEvo) NVDispEvoRec *pDispEvo = pDpyEvo->pDispEvo; NVDispApiHeadStateEvoRec *pApiHeadState; NvU32 head; + NvBool colorSpaceChanged = FALSE; + NvBool colorBpcChanged = FALSE; if (pDpyEvo->apiHead == NV_INVALID_HEAD) { return; @@ -637,10 +639,12 @@ static void DpyPostColorSpaceOrRangeSetEvo(NVDpyEvoPtr pDpyEvo) return; } + colorSpaceChanged = (pApiHeadState->attributes.color.format != colorSpace); + colorBpcChanged = (pApiHeadState->attributes.color.bpc != colorBpc); + /* For DP, neither color space nor bpc can be changed without a modeset */ if (nvConnectorUsesDPLib(pDpyEvo->pConnectorEvo) && - ((pApiHeadState->attributes.color.format != colorSpace) || - (pApiHeadState->attributes.color.bpc != colorBpc))) { + (colorSpaceChanged || colorBpcChanged)) { return; } @@ -677,7 +681,8 @@ static void DpyPostColorSpaceOrRangeSetEvo(NVDpyEvoPtr pDpyEvo) &tmpDpyColor) > pDpyEvo->maxSingleLinkPixelClockKHz) { - if(!nvDowngradeColorSpaceAndBpc(&colorFormatsInfo, + if(!nvDowngradeColorSpaceAndBpc(pDpyEvo, + &colorFormatsInfo, &tmpDpyColor)) { return; } @@ -703,9 +708,13 @@ static void DpyPostColorSpaceOrRangeSetEvo(NVDpyEvoPtr pDpyEvo) &pApiHeadState->attributes.color, &updateState); - if (newPixelDepth != pDispEvo->headState[head].pixelDepth) { + if ((newPixelDepth != pDispEvo->headState[head].pixelDepth) || + colorSpaceChanged) { pDispEvo->headState[head].pixelDepth = newPixelDepth; - nvEvoHeadSetControlOR(pDispEvo, head, &updateState); + nvEvoHeadSetControlOR(pDispEvo, + head, + &pApiHeadState->attributes.color, + &updateState); } } diff --git a/src/nvidia-modeset/src/nvkms-cursor.c b/src/nvidia-modeset/src/nvkms-cursor.c index a2eaf56fcf..6b31289e0d 100644 --- a/src/nvidia-modeset/src/nvkms-cursor.c +++ b/src/nvidia-modeset/src/nvkms-cursor.c @@ -305,7 +305,7 @@ void nvMoveCursor(NVDispEvoPtr pDispEvo, const NvU32 apiHead, } pDevEvo->gpus[sd].headState[head].cursor.x = - pParams->x - (hwViewportInWidth * pHeadState->tilePosition); + pParams->x - (hwViewportInWidth * pHeadState->mergeHeadSection); pDevEvo->gpus[sd].headState[head].cursor.y = pParams->y; nvEvoMoveCursorInternal(pDispEvo, diff --git a/src/nvidia-modeset/src/nvkms-difr.c b/src/nvidia-modeset/src/nvkms-difr.c index 070f010fc9..a773aa29aa 100644 --- a/src/nvidia-modeset/src/nvkms-difr.c +++ b/src/nvidia-modeset/src/nvkms-difr.c @@ -168,10 +168,6 @@ static NvBool PrefetchHelperSurfaceEvo(NVDIFRStateEvoPtr pDifr, size_t *cacheRemaining, NVSurfaceEvoPtr pSurfaceEvo, NvU32 *status); -static NvBool PrefetchHelperLutSurface(NVDIFRStateEvoPtr pDifr, - size_t *cacheRemaining, - NVLutSurfaceEvoPtr pLutSurface, - NvU32 *status); static NvBool SetDisabledState(NVDIFRStateEvoPtr pDifr, NvBool shouldDisable); @@ -332,14 +328,14 @@ NvU32 nvDIFRPrefetchSurfaces(NVDIFRStateEvoPtr pDifr, size_t l2CacheSize) * Prefetch per-layer LUTs, if any, but skip null LUTs and * duplicates already prefetched. */ - if (!PrefetchHelperLutSurface(pDifr, + if (!PrefetchHelperSurfaceEvo(pDifr, &cacheRemaining, pHeadState->layer[layer].inputLut.pLutSurfaceEvo, &status)) { goto out; } - if (!PrefetchHelperLutSurface(pDifr, + if (!PrefetchHelperSurfaceEvo(pDifr, &cacheRemaining, pHeadState->layer[layer].tmoLut.pLutSurfaceEvo, &status)) { @@ -351,7 +347,7 @@ NvU32 nvDIFRPrefetchSurfaces(NVDIFRStateEvoPtr pDifr, size_t l2CacheSize) /* * Finally prefetch the known main LUTs. */ - if (!PrefetchHelperLutSurface(pDifr, + if (!PrefetchHelperSurfaceEvo(pDifr, &cacheRemaining, pDevEvo->lut.defaultLut, &status)) { @@ -360,7 +356,7 @@ NvU32 nvDIFRPrefetchSurfaces(NVDIFRStateEvoPtr pDifr, size_t l2CacheSize) for (apiHead = 0; apiHead < pDevEvo->numApiHeads; apiHead++) { for (i = 0; i < ARRAY_LEN(pDevEvo->lut.apiHead[apiHead].LUT); i++) { - if (!PrefetchHelperLutSurface(pDifr, + if (!PrefetchHelperSurfaceEvo(pDifr, &cacheRemaining, pDevEvo->lut.apiHead[apiHead].LUT[i], &status)) { @@ -713,40 +709,6 @@ static NvBool PrefetchHelperSurfaceEvo(NVDIFRStateEvoPtr pDifr, return *status == NV2080_CTRL_LPWR_DIFR_PREFETCH_SUCCESS; } -static NvBool PrefetchHelperLutSurface(NVDIFRStateEvoPtr pDifr, - size_t *cacheRemaining, - NVLutSurfaceEvoPtr pLutSurface, - NvU32 *status) -{ - NVDIFRPrefetchParams params; - - nvAssert(*status == NV2080_CTRL_LPWR_DIFR_PREFETCH_SUCCESS); - - if (!pLutSurface) { - return TRUE; - } - - /* - * LUTs are often shared so we only want to prefetch (or consider) each - * LUT at most once during the prefetch process. - */ - if (pLutSurface->difrLastPrefetchPass == pDifr->prefetchPass) { - return TRUE; - } - - pLutSurface->difrLastPrefetchPass = pDifr->prefetchPass; - - /* Collect copy parameters and do the prefetch. */ - params.surfGpuAddress = (NvUPtr)pLutSurface->gpuAddress; - params.surfSizeBytes = pLutSurface->size; - params.surfPitchBytes = pLutSurface->size; - params.surfFormat = NvKmsSurfaceMemoryFormatI8; - - *status = PrefetchSingleSurface(pDifr, ¶ms, cacheRemaining); - - return *status == NV2080_CTRL_LPWR_DIFR_PREFETCH_SUCCESS; -} - /* * Set DIFR disabled state in H/W. Return true if state was changed and it * was successfully signalled downstream. diff --git a/src/nvidia-modeset/src/nvkms-dpy.c b/src/nvidia-modeset/src/nvkms-dpy.c index acaaf075fe..7188fc5737 100644 --- a/src/nvidia-modeset/src/nvkms-dpy.c +++ b/src/nvidia-modeset/src/nvkms-dpy.c @@ -2542,13 +2542,123 @@ static void UpdateDpHDRInfoFrame(const NVDispEvoRec *pDispEvo, const NvU32 head) } } +void nvConstructDpVscSdp(const NVDispHeadInfoFrameStateEvoRec *pInfoFrame, + const NVDpyAttributeColor *pDpyColor, + DPSDP_DP_VSC_SDP_DESCRIPTOR *sdp) +{ + nvkms_memset(sdp, 0, sizeof(*sdp)); + + // Header + // Per DP1.3 spec + sdp->hb.hb0 = 0; + sdp->hb.hb1 = SDP_PACKET_TYPE_VSC; + sdp->hb.revisionNumber = SDP_VSC_REVNUM_STEREO_PSR2_COLOR; + sdp->hb.numValidDataBytes = SDP_VSC_VALID_DATA_BYTES_PSR2_COLOR; + + sdp->db.stereoInterface = 0; + sdp->db.psrState = 0; + sdp->db.contentType = SDP_VSC_CONTENT_TYPE_GRAPHICS; + switch (pDpyColor->format) { + case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB: + sdp->db.pixEncoding = SDP_VSC_PIX_ENC_RGB; + break; + case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr444: + sdp->db.pixEncoding = SDP_VSC_PIX_ENC_YCBCR444; + break; + case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr422: + sdp->db.pixEncoding = SDP_VSC_PIX_ENC_YCBCR422; + break; + case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr420: + sdp->db.pixEncoding = SDP_VSC_PIX_ENC_YCBCR420; + break; + default: + nvAssert(!"unrecognized color format"); + break; + } + + switch (pDpyColor->format) { + case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB: + switch (pDpyColor->colorimetry) { + case NVKMS_OUTPUT_COLORIMETRY_BT2100: + sdp->db.colorimetryFormat = + SDP_VSC_COLOR_FMT_RGB_COLORIMETRY_ITU_R_BT2020_RGB; + break; + case NVKMS_OUTPUT_COLORIMETRY_DEFAULT: + sdp->db.colorimetryFormat = + SDP_VSC_COLOR_FMT_RGB_COLORIMETRY_SRGB; + break; + } + + switch (pDpyColor->bpc) { + case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_10: + sdp->db.bitDepth = SDP_VSC_BIT_DEPTH_RGB_10BPC; + break; + case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_8: + sdp->db.bitDepth = SDP_VSC_BIT_DEPTH_RGB_8BPC; + break; + case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_6: + sdp->db.bitDepth = SDP_VSC_BIT_DEPTH_RGB_6BPC; + break; + default: + nvAssert(!"Invalid bpc value for RBG format"); + break; + } + break; + case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr444: + case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr422: + case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr420: + switch (pDpyColor->colorimetry) { + case NVKMS_OUTPUT_COLORIMETRY_BT2100: + sdp->db.colorimetryFormat = + SDP_VSC_COLOR_FMT_YCBCR_COLORIMETRY_ITU_R_BT2020_YCBCR; + break; + case NVKMS_OUTPUT_COLORIMETRY_DEFAULT: + sdp->db.colorimetryFormat = + (pInfoFrame->hdTimings ? + SDP_VSC_COLOR_FMT_YCBCR_COLORIMETRY_ITU_R_BT709 : + SDP_VSC_COLOR_FMT_YCBCR_COLORIMETRY_ITU_R_BT601); + break; + } + + switch (pDpyColor->bpc) { + case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_10: + sdp->db.bitDepth = SDP_VSC_BIT_DEPTH_YCBCR_10BPC; + break; + case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_8: + sdp->db.bitDepth = SDP_VSC_BIT_DEPTH_YCBCR_8BPC; + break; + default: + nvAssert(!"Invalid bpc value for YUV color format"); + break; + } + break; + default: + nvAssert(!"unrecognized color format"); + break; + } + + switch (pDpyColor->range) { + case NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_FULL: + sdp->db.dynamicRange = SDP_VSC_DYNAMIC_RANGE_VESA; + break; + case NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_LIMITED: + sdp->db.dynamicRange = SDP_VSC_DYNAMIC_RANGE_CEA; + break; + default: + nvAssert(!"Invalid colorRange value"); + break; + } +} + /* - * Construct the DP 1.3 YUV420 infoframe, and toggle it on or off based on - * whether or not YUV420 mode is in use. + * Construct the DP 1.3 VSC SDP infoframe, and toggle it on or off based on + * whether or not YUV420 mode or BT2100 colorimetry is in use. */ -static void UpdateDpYUV420InfoFrame(const NVDispEvoRec *pDispEvo, - const NvU32 head, - const NVDpyAttributeColor *pDpyColor) +static void UpdateDpVscSdpInfoFrame( + const NVDispEvoRec *pDispEvo, + const NvU32 head, + const NVDpyAttributeColor *pDpyColor, + const NVDispHeadInfoFrameStateEvoRec *pInfoFrame) { const NVDispHeadStateEvoRec *pHeadState = &pDispEvo->headState[head]; @@ -2559,7 +2669,8 @@ static void UpdateDpYUV420InfoFrame(const NVDispEvoRec *pDispEvo, params.subDeviceInstance = pDispEvo->displayOwner; params.displayId = pHeadState->activeRmId; - if (pDpyColor->format == NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr420) { + if ((pDpyColor->format == NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr420) || + (pDpyColor->colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100)) { // DPSDP_DP_VSC_SDP_DESCRIPTOR has a (dataSize, hb, db) layout, while // NV0073_CTRL_SPECIFIC_SET_OD_PACKET_PARAMS.aPacket needs to contain @@ -2570,42 +2681,7 @@ static void UpdateDpYUV420InfoFrame(const NVDispEvoRec *pDispEvo, nvAssert((void *)&sdp->hb == (void *)params.aPacket); - // Header - // Per DP1.3 spec - sdp->hb.hb0 = 0; - sdp->hb.hb1 = SDP_PACKET_TYPE_VSC; - sdp->hb.revisionNumber = SDP_VSC_REVNUM_STEREO_PSR2_COLOR; - sdp->hb.numValidDataBytes = SDP_VSC_VALID_DATA_BYTES_PSR2_COLOR; - - sdp->db.stereoInterface = 0; - sdp->db.psrState = 0; - sdp->db.contentType = SDP_VSC_CONTENT_TYPE_GRAPHICS; - sdp->db.pixEncoding = SDP_VSC_PIX_ENC_YCBCR420; - sdp->db.colorimetryFormat = SDP_VSC_COLOR_FMT_YCBCR_COLORIMETRY_ITU_R_BT709; - - switch (pDpyColor->bpc) { - case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_10: - sdp->db.bitDepth = SDP_VSC_BIT_DEPTH_YCBCR_10BPC; - break; - case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_8: - sdp->db.bitDepth = SDP_VSC_BIT_DEPTH_YCBCR_8BPC; - break; - default: - nvAssert(!"Invalid pixelDepth value"); - break; - } - - switch (pDpyColor->range) { - case NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_FULL: - sdp->db.dynamicRange = SDP_VSC_DYNAMIC_RANGE_VESA; - break; - case NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_LIMITED: - sdp->db.dynamicRange = SDP_VSC_DYNAMIC_RANGE_CEA; - break; - default: - nvAssert(!"Invalid colorRange value"); - break; - } + nvConstructDpVscSdp(pInfoFrame, pDpyColor, sdp); params.packetSize = sizeof(sdp->hb) + sdp->hb.numValidDataBytes; @@ -2632,11 +2708,12 @@ static void UpdateDpYUV420InfoFrame(const NVDispEvoRec *pDispEvo, static void UpdateDpInfoFrames(const NVDispEvoRec *pDispEvo, const NvU32 head, - const NVDpyAttributeColor *pDpyColor) + const NVDpyAttributeColor *pDpyColor, + const NVDispHeadInfoFrameStateEvoRec *pInfoFrame) { UpdateDpHDRInfoFrame(pDispEvo, head); - UpdateDpYUV420InfoFrame(pDispEvo, head, pDpyColor); + UpdateDpVscSdpInfoFrame(pDispEvo, head, pDpyColor, pInfoFrame); } void nvCancelSDRTransitionTimer(NVDpyEvoRec *pDpyEvo) @@ -2704,7 +2781,10 @@ void nvUpdateInfoFrames(NVDpyEvoRec *pDpyEvo) pHeadState = &pDispEvo->headState[head]; if (nvConnectorUsesDPLib(pDpyEvo->pConnectorEvo)) { - UpdateDpInfoFrames(pDispEvo, head, &pApiHeadState->attributes.color); + UpdateDpInfoFrames(pDispEvo, + head, + &pApiHeadState->attributes.color, + &pApiHeadState->infoFrame); } else { nvUpdateHdmiInfoFrames(pDispEvo, head, @@ -3320,9 +3400,10 @@ NvKmsDpyOutputColorFormatInfo nvDpyGetOutputColorFormatInfo( NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_8; if (nvDpyIsHdmiEvo(pDpyEvo)) { - // TODO: Handle depth 30 YUV colorFormatsInfo.yuv444.maxBpc = - NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_8; + nvDpyIsHdmiDepth30Evo(pDpyEvo) ? + NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_10 : + NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_8; colorFormatsInfo.yuv444.minBpc = NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_8; @@ -3339,6 +3420,35 @@ NvKmsDpyOutputColorFormatInfo nvDpyGetOutputColorFormatInfo( } } + switch (nvkms_debug_force_color_space()) { + case NVKMS_DEBUG_FORCE_COLOR_SPACE_RGB: + colorFormatsInfo.yuv444.maxBpc = + colorFormatsInfo.yuv444.minBpc = + colorFormatsInfo.yuv422.maxBpc = + colorFormatsInfo.yuv422.minBpc = + NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_UNKNOWN; + break; + case NVKMS_DEBUG_FORCE_COLOR_SPACE_YUV444: + colorFormatsInfo.rgb444.maxBpc = + colorFormatsInfo.rgb444.minBpc = + colorFormatsInfo.yuv422.maxBpc = + colorFormatsInfo.yuv422.minBpc = + NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_UNKNOWN; + break; + case NVKMS_DEBUG_FORCE_COLOR_SPACE_YUV422: + colorFormatsInfo.rgb444.maxBpc = + colorFormatsInfo.rgb444.minBpc = + colorFormatsInfo.yuv444.maxBpc = + colorFormatsInfo.yuv444.minBpc = + NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_UNKNOWN; + break; + default: + nvAssert(!"Unrecognzed debug_force_color_space value"); + // fallthrough + case NVKMS_DEBUG_FORCE_COLOR_SPACE_NONE: + break; + } + return colorFormatsInfo; } diff --git a/src/nvidia-modeset/src/nvkms-evo.c b/src/nvidia-modeset/src/nvkms-evo.c index ea9fb50bd1..e35b5cb670 100644 --- a/src/nvidia-modeset/src/nvkms-evo.c +++ b/src/nvidia-modeset/src/nvkms-evo.c @@ -21,6 +21,7 @@ * DEALINGS IN THE SOFTWARE. */ +#include "nvkms-api-types.h" #include "nvkms-types.h" #include "nvkms-evo-states.h" @@ -48,6 +49,7 @@ #include "nvkms-difr.h" #include "nvkms-vrr.h" #include "nvkms-ioctl.h" +#include "nvkms-setlut-workarea.h" #include "nvctassert.h" @@ -238,6 +240,14 @@ static NvBool HasActiveHeads(NVDispEvoPtr pDispEvo) return nvGetActiveHeadMask(pDispEvo) != 0; } +static void EvoSetLUTContextDmaHelper(const NVDispEvoRec *pDispEvo, + const NvU32 head, + NVSurfaceEvoPtr pLutSurfEvo, + NvBool enableBaseLut, + NvBool enableOutputLut, + NVEvoUpdateState *pUpdateState, + NvBool bypassComposition); + static void BlankHeadEvo(NVDispEvoPtr pDispEvo, const NvU32 head, NVEvoUpdateState *updateState) { @@ -252,13 +262,13 @@ static void BlankHeadEvo(NVDispEvoPtr pDispEvo, const NvU32 head, * Lut explicitly. */ if (!pDevEvo->hal->caps.supportsCoreChannelSurface) { - pDevEvo->hal->SetLUTContextDma(pDispEvo, - head, - NULL /* pSurfEvo */, - FALSE /* baseLutEnabled */, - FALSE /* outputLutEnabled */, - updateState, - pHeadState->bypassComposition); + EvoSetLUTContextDmaHelper(pDispEvo, + head, + NULL /* pLutSurfEvo */, + FALSE /* baseLutEnabled */, + FALSE /* outputLutEnabled */, + updateState, + pHeadState->bypassComposition); } nvPushEvoSubDevMaskDisp(pDispEvo); @@ -965,7 +975,7 @@ void nvEvoSetTimings(NVDispEvoPtr pDispEvo, NV_YUV420_MODE_SW)); pDevEvo->hal->SetRasterParams(pDevEvo, head, - pTimings, pHeadState->tilePosition, + pTimings, pHeadState->mergeHeadSection, pDscInfo, &overscanColor, updateState); // Set the head parameters @@ -2724,27 +2734,38 @@ void nvEnableMidFrameAndDWCFWatermark(NVDevEvoPtr pDevEvo, pUpdateState); } +static enum NvKmsDpyAttributeColorBpcValue GetMinRequiredBpc( + enum NvKmsOutputColorimetry colorimetry) +{ + // 10 BPC required for HDR + // XXX HDR TODO: Handle other colorimetries + return (colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100) ? + NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_10 : + NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_6; +} + static NvBool GetDefaultColorSpace( const NvKmsDpyOutputColorFormatInfo *pColorFormatsInfo, enum NvKmsDpyAttributeCurrentColorSpaceValue *pColorSpace, - enum NvKmsDpyAttributeColorBpcValue *pColorBpc) + enum NvKmsDpyAttributeColorBpcValue *pColorBpc, + const enum NvKmsDpyAttributeColorBpcValue minRequiredBpc) { - if (pColorFormatsInfo->rgb444.maxBpc != - NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_UNKNOWN) { + nvAssert(minRequiredBpc != + NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_UNKNOWN); + + if (pColorFormatsInfo->rgb444.maxBpc >= minRequiredBpc) { *pColorSpace = NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB; *pColorBpc = pColorFormatsInfo->rgb444.maxBpc; return TRUE; } - if (pColorFormatsInfo->yuv444.maxBpc != - NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_UNKNOWN) { + if (pColorFormatsInfo->yuv444.maxBpc >= minRequiredBpc) { *pColorSpace = NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr444; *pColorBpc = pColorFormatsInfo->yuv444.maxBpc; return TRUE; } - if (pColorFormatsInfo->yuv422.maxBpc != - NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_UNKNOWN) { + if (pColorFormatsInfo->yuv422.maxBpc >= minRequiredBpc) { *pColorSpace = NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr422; *pColorBpc = pColorFormatsInfo->yuv422.maxBpc; return TRUE; @@ -2759,8 +2780,10 @@ NvBool nvGetDefaultDpyColor( { nvkms_memset(pDpyColor, 0, sizeof(*pDpyColor)); - if (!GetDefaultColorSpace(pColorFormatsInfo, &pDpyColor->format, - &pDpyColor->bpc)) { + if (!GetDefaultColorSpace(pColorFormatsInfo, + &pDpyColor->format, + &pDpyColor->bpc, + GetMinRequiredBpc(pDpyColor->colorimetry))) { return FALSE; } @@ -2776,7 +2799,6 @@ NvBool nvGetDefaultDpyColor( } NvBool nvChooseColorRangeEvo( - enum NvKmsOutputColorimetry colorimetry, const enum NvKmsDpyAttributeColorRangeValue requestedColorRange, const enum NvKmsDpyAttributeCurrentColorSpaceValue colorSpace, const enum NvKmsDpyAttributeColorBpcValue colorBpc, @@ -2789,16 +2811,11 @@ NvBool nvChooseColorRangeEvo( if ((colorSpace == NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB) && (colorBpc == NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_6)) { /* At depth 18 only RGB and full range are allowed */ - if (colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100) { - /* BT2100 requires limited color range */ - return FALSE; - } *pColorRange = NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_FULL; } else if ((colorSpace == NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr444) || (colorSpace == NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr422) || - (colorSpace == NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr420) || - (colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100)) { - /* Both YUV and BT2100 colorimetry require limited color range. */ + (colorSpace == NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr420)) { + /* YUV requires limited color range. */ *pColorRange = NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_LIMITED; } else { *pColorRange = requestedColorRange; @@ -2855,22 +2872,16 @@ NvBool nvChooseCurrentColorSpaceAndRangeEvo( NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_FULL; const NvKmsDpyOutputColorFormatInfo colorFormatsInfo = nvDpyGetOutputColorFormatInfo(pDpyEvo); + const enum NvKmsDpyAttributeColorBpcValue minRequiredBpc = + GetMinRequiredBpc(colorimetry); - // XXX HDR TODO: Handle other colorimetries - // XXX HDR TODO: Handle YUV - if (colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100) { - /* - * If the head currently has BT2100 colorimetry, we override the - * requested color space with RGB. We cannot support yuv420Mode in - * that configuration, so fail in that case. - */ - if (yuv420Mode != NV_YUV420_MODE_NONE) { + if (yuv420Mode != NV_YUV420_MODE_NONE) { + // XXX HDR TODO: Support YUV420 + HDR + // XXX HDR TODO: Handle other colorimetries + if (colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100) { return FALSE; } - newColorSpace = NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB; - newColorBpc = colorFormatsInfo.rgb444.maxBpc; - } else if (yuv420Mode != NV_YUV420_MODE_NONE) { /* * If the current mode timing requires YUV420 compression, we override the * requested color space with YUV420. @@ -2880,6 +2891,12 @@ NvBool nvChooseCurrentColorSpaceAndRangeEvo( nvAssert(colorFormatsInfo.rgb444.maxBpc >= NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_8); + } else if ((colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100) && + !pDpyEvo->pDispEvo->pDevEvo->caps.supportsYUV2020) { + newColorSpace = NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB; + newColorBpc = ChooseColorBpc(requestedColorBpc, + colorFormatsInfo.rgb444.maxBpc, + colorFormatsInfo.rgb444.minBpc); } else { /* * Note this is an assignment between different enum types. Checking the @@ -2909,23 +2926,18 @@ NvBool nvChooseCurrentColorSpaceAndRangeEvo( nvAssert(!"Invalid Requested ColorSpace"); } - if ((newColorBpc == - NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_UNKNOWN) && + if ((newColorBpc < minRequiredBpc) && !GetDefaultColorSpace(&colorFormatsInfo, &newColorSpace, - &newColorBpc)) { + &newColorBpc, minRequiredBpc)) { return FALSE; } } - // 10 BPC required for HDR - // XXX HDR TODO: Handle other colorimetries - // XXX HDR TODO: Handle YUV - if ((colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100) && - (newColorBpc < NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_BPC_10)) { + if (newColorBpc < minRequiredBpc) { return FALSE; } - if (!nvChooseColorRangeEvo(colorimetry, requestedColorRange, newColorSpace, + if (!nvChooseColorRangeEvo(requestedColorRange, newColorSpace, newColorBpc, &newColorRange)) { } @@ -2948,18 +2960,12 @@ void nvUpdateCurrentHardwareColorSpaceAndRangeEvo( nvAssert(pConnectorEvo != NULL); - // XXX HDR TODO: Support more output colorimetries - if (pDpyColor->colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100) { - nvAssert(pHeadState->timings.yuv420Mode == NV_YUV420_MODE_NONE); - nvAssert(pDpyColor->format == NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB); - nvAssert(pDpyColor->range == NV_KMS_DPY_ATTRIBUTE_COLOR_RANGE_LIMITED); - - pHeadState->procAmp.colorimetry = NVT_COLORIMETRY_BT2020RGB; - pHeadState->procAmp.colorRange = NVT_COLOR_RANGE_LIMITED; - pHeadState->procAmp.colorFormat = NVT_COLOR_FORMAT_RGB; - } else if ((pHeadState->timings.yuv420Mode == NV_YUV420_MODE_SW) && + if ((pHeadState->timings.yuv420Mode == NV_YUV420_MODE_SW) && (pDpyColor->format == NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr420)) { + // XXX HDR TODO: Support SW YUV420 + HDR Output + nvAssert(pDpyColor->colorimetry != NVKMS_OUTPUT_COLORIMETRY_BT2100); + /* * In SW YUV420 mode, HW is programmed with RGB color space and full * color range. The color space conversion and color range compression @@ -2997,12 +3003,18 @@ void nvUpdateCurrentHardwareColorSpaceAndRangeEvo( // program HW with RGB/YCbCr switch (pDpyColor->format) { case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB: - pHeadState->procAmp.colorimetry = NVT_COLORIMETRY_RGB; + if (pDpyColor->colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100) { + pHeadState->procAmp.colorimetry = NVT_COLORIMETRY_BT2020RGB; + } else { + pHeadState->procAmp.colorimetry = NVT_COLORIMETRY_RGB; + } break; case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr444: case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr422: case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr420: - if (nvEvoIsHDQualityVideoTimings(&pHeadState->timings)) { + if (pDpyColor->colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100) { + pHeadState->procAmp.colorimetry = NVT_COLORIMETRY_BT2020YCC; + } else if (nvEvoIsHDQualityVideoTimings(&pHeadState->timings)) { pHeadState->procAmp.colorimetry = NVT_COLORIMETRY_YUV_709; } else { pHeadState->procAmp.colorimetry = NVT_COLORIMETRY_YUV_601; @@ -3018,6 +3030,7 @@ void nvUpdateCurrentHardwareColorSpaceAndRangeEvo( // (i.e. the default - RGB) nvAssert(pDpyColor->format == NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB); + nvAssert(pDpyColor->colorimetry != NVKMS_OUTPUT_COLORIMETRY_BT2100); // program HW with RGB only pHeadState->procAmp.colorimetry = NVT_COLORIMETRY_RGB; @@ -3053,9 +3066,9 @@ void nvUpdateCurrentHardwareColorSpaceAndRangeEvo( } } - // In YUV colorimetry, only limited color range is allowed. - nvAssert(!((pHeadState->procAmp.colorimetry != NVT_COLORIMETRY_RGB) && - (pHeadState->procAmp.colorRange != NVT_COLOR_RANGE_LIMITED))); + // Full color range is only allowed with RGB color format. + nvAssert((pHeadState->procAmp.colorFormat == NVT_COLOR_FORMAT_RGB) || + (pHeadState->procAmp.colorRange == NVT_COLOR_RANGE_LIMITED)); // Limited color range is not allowed with 18bpp mode nvAssert(!((pHeadState->pixelDepth == NVKMS_PIXEL_DEPTH_18_444) && @@ -3071,7 +3084,9 @@ void nvUpdateCurrentHardwareColorSpaceAndRangeEvo( } void nvEvoHeadSetControlOR(NVDispEvoPtr pDispEvo, - const NvU32 head, NVEvoUpdateState *pUpdateState) + const NvU32 head, + const NVDpyAttributeColor *pDpyColor, + NVEvoUpdateState *pUpdateState) { NVDevEvoPtr pDevEvo = pDispEvo->pDevEvo; const NVDispHeadStateEvoPtr pHeadState = &pDispEvo->headState[head]; @@ -3079,16 +3094,19 @@ void nvEvoHeadSetControlOR(NVDispEvoPtr pDispEvo, const enum nvKmsPixelDepth pixelDepth = pHeadState->pixelDepth; NvBool colorSpaceOverride = FALSE; + nvAssert(pHeadState->pixelDepth == nvEvoDpyColorToPixelDepth(pDpyColor)); + /* * Determine whether or not this dpy will need its color space * overridden. * - * This is currently only used for DP 1.3 YUV420 mode, where the - * HW's normal support for carrying color space information + * This is currently only used for DP 1.3 YUV420 mode or BT2100 colorimetry, + * where the HW's normal support for carrying color space information * together with the frame is insufficient. */ - if ((pTimings->yuv420Mode == NV_YUV420_MODE_SW) && - nvConnectorUsesDPLib(pHeadState->pConnectorEvo)) { + if (((pTimings->yuv420Mode == NV_YUV420_MODE_SW) || + (pDpyColor->colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100)) && + nvConnectorUsesDPLib(pHeadState->pConnectorEvo)) { nvAssert(pDispEvo->pDevEvo->caps.supportsDP13); colorSpaceOverride = TRUE; @@ -4660,19 +4678,93 @@ static void EvoSetViewportPointIn(NVDispEvoPtr pDispEvo, const NvU32 head, nvPopEvoSubDevMask(pDevEvo); } -void nvEvoSetLUTContextDma(NVDispEvoPtr pDispEvo, - const NvU32 head, NVEvoUpdateState *pUpdateState) +static void EvoSetLUTContextDmaHelper(const NVDispEvoRec *pDispEvo, + const NvU32 head, + NVSurfaceEvoPtr pLutSurfEvo, + NvBool enableBaseLut, + NvBool enableOutputLut, + NVEvoUpdateState *pUpdateState, + NvBool bypassComposition) { NVDevEvoPtr pDevEvo = pDispEvo->pDevEvo; - const NVDispHeadStateEvoRec *pHeadState = &pDispEvo->headState[head]; + NvU32 layer, sd = pDispEvo->displayOwner; + NVEvoSubDevHeadStateRec *pSdHeadState = &pDevEvo->gpus[sd].headState[head]; + NVFlipLutHwState inputLut, outputLut; + + if (enableBaseLut) { + inputLut.pLutSurfaceEvo = pLutSurfEvo; + inputLut.offset = offsetof(NVEvoLutDataRec, base); + inputLut.lutEntries = NV_NUM_EVO_LUT_ENTRIES; + } else { + inputLut.pLutSurfaceEvo = NULL; + inputLut.offset = 0; + inputLut.lutEntries = 0; + } + inputLut.vssSegments = 0; + inputLut.fromOverride = FALSE; - pDevEvo->hal->SetLUTContextDma(pDispEvo, - head, - pHeadState->lut.pCurrSurface, - pHeadState->lut.baseLutEnabled, - pHeadState->lut.outputLutEnabled, + if (enableOutputLut) { + outputLut.pLutSurfaceEvo = pLutSurfEvo; + outputLut.offset = offsetof(NVEvoLutDataRec, output); + outputLut.lutEntries = NV_NUM_EVO_LUT_ENTRIES; + } else { + outputLut.pLutSurfaceEvo = NULL; + outputLut.offset = 0; + outputLut.lutEntries = 0; + } + outputLut.vssSegments = 0; + outputLut.fromOverride = FALSE; + + nvPushEvoSubDevMask(pDevEvo, NVBIT(pDispEvo->displayOwner)); + if ((pSdHeadState->outputLut.pLutSurfaceEvo != outputLut.pLutSurfaceEvo) || + (pSdHeadState->outputLut.offset != outputLut.offset) || + (pSdHeadState->olutFpNormScale != NVKMS_OLUT_FP_NORM_SCALE_DEFAULT)) { + + pSdHeadState->outputLut = outputLut; + pSdHeadState->olutFpNormScale = NVKMS_OLUT_FP_NORM_SCALE_DEFAULT; + pSdHeadState->layer[NVKMS_MAIN_LAYER].tearing = FALSE; + + pDevEvo->hal->SetOutputLut(pDevEvo, sd, head, + &outputLut, + NVKMS_OLUT_FP_NORM_SCALE_DEFAULT, pUpdateState, - pHeadState->bypassComposition); + bypassComposition); + } + + for (layer = 0; layer < pDevEvo->head[head].numLayers; layer++) { + NVEvoChannelPtr pChannel = pDevEvo->head[head].layer[layer]; + NVFlipChannelEvoHwState *pFlipState = &pSdHeadState->layer[layer]; + + if ((pFlipState->inputLut.pLutSurfaceEvo == inputLut.pLutSurfaceEvo) && + (pFlipState->inputLut.offset == inputLut.offset)) { + continue; + } + + pFlipState->tearing = FALSE; + pFlipState->inputLut = inputLut; + + pDevEvo->hal->Flip(pDevEvo, + pChannel, + pFlipState, + pUpdateState, + bypassComposition); + } + + nvPopEvoSubDevMask(pDevEvo); +} + +void nvEvoSetLUTContextDma(NVDispEvoPtr pDispEvo, + const NvU32 head, NVEvoUpdateState *pUpdateState) +{ + const NVDispHeadStateEvoRec *pDispHeadState = &pDispEvo->headState[head]; + + EvoSetLUTContextDmaHelper(pDispEvo, + head, + pDispHeadState->lut.pCurrSurface, + pDispHeadState->lut.baseLutEnabled, + pDispHeadState->lut.outputLutEnabled, + pUpdateState, + pDispHeadState->bypassComposition); } static void EvoUpdateCurrentPalette(NVDispEvoPtr pDispEvo, const NvU32 apiHead) @@ -4684,8 +4776,16 @@ static void EvoUpdateCurrentPalette(NVDispEvoPtr pDispEvo, const NvU32 apiHead) NvU32 head; NVEvoUpdateState updateState = { }; + struct NvKmsSetLutWorkArea *workarea = + nvPreallocGet(pDevEvo, PREALLOC_TYPE_SET_LUT_WORK_AREA, sizeof(*workarea)); + FOR_EACH_EVO_HW_HEAD_IN_MASK(pApiHeadState->hwHeadsMask, head) { + nvInitFlipEvoHwState(pDevEvo, dispIndex, head, &workarea->head[head].oldState); + nvEvoSetLUTContextDma(pDispEvo, head, &updateState); + + nvInitFlipEvoHwState(pDevEvo, dispIndex, head, &workarea->head[head].newState); + nvUpdateSurfacesFlipRefCount(pDevEvo, head, &workarea->head[head].newState, TRUE); } /* @@ -4728,6 +4828,12 @@ static void EvoUpdateCurrentPalette(NVDispEvoPtr pDispEvo, const NvU32 apiHead) TRUE /* releaseElv */); pDevEvo->lut.apiHead[apiHead].disp[dispIndex].waitForPreviousUpdate |= notify; } + + FOR_EACH_EVO_HW_HEAD_IN_MASK(pApiHeadState->hwHeadsMask, head) { + nvUpdateSurfacesFlipRefCount(pDevEvo, head, &workarea->head[head].oldState, FALSE); + } + + nvPreallocRelease(pDevEvo, PREALLOC_TYPE_SET_LUT_WORK_AREA); } static void UpdateMaxPixelClock(NVDevEvoPtr pDevEvo) @@ -4782,6 +4888,7 @@ static NvBool AllocEvoSubDevs(NVDevEvoPtr pDevEvo) pSdHeadState->cursor.cursorCompParams = nvDefaultCursorCompositionParams(pDevEvo); + pSdHeadState->olutFpNormScale = NVKMS_OLUT_FP_NORM_SCALE_DEFAULT; } } @@ -4864,6 +4971,8 @@ static void ClearApiHeadStateOneDisp(NVDispEvoRec *pDispEvo) { NvU32 apiHead; + nvKmsOrphanVblankSemControlForAllOpens(pDispEvo); + /* * Unregister all the flip-occurred event callbacks which are * registered with the (api-head, layer) pair event data, @@ -4877,7 +4986,11 @@ static void ClearApiHeadStateOneDisp(NVDispEvoRec *pDispEvo) NvU32 layer; NVDispApiHeadStateEvoRec *pApiHeadState = &pDispEvo->apiHeadState[apiHead]; - nvAssert(nvListIsEmpty(&pApiHeadState->vblankCallbackList)); + for (NvU32 i = 0; i < ARRAY_LEN(pApiHeadState->vblankCallbackList); i++) { + nvAssert(nvListIsEmpty(&pApiHeadState->vblankCallbackList[i])); + } + nvAssert(nvListIsEmpty(&pApiHeadState->vblankSemControl.list)); + for (layer = 0; layer < ARRAY_LEN(pApiHeadState->flipOccurredEvent); layer++) { if (pApiHeadState->flipOccurredEvent[layer].ref_ptr != NULL) { nvkms_free_ref_ptr(pApiHeadState->flipOccurredEvent[layer].ref_ptr); @@ -4916,7 +5029,10 @@ static NvBool InitApiHeadStateOneDisp(NVDispEvoRec *pDispEvo) pApiHeadState->activeDpys = nvEmptyDpyIdList(); pApiHeadState->attributes = NV_EVO_DEFAULT_ATTRIBUTES_SET; - nvListInit(&pApiHeadState->vblankCallbackList); + for (NvU32 i = 0; i < ARRAY_LEN(pApiHeadState->vblankCallbackList); i++) { + nvListInit(&pApiHeadState->vblankCallbackList[i]); + } + nvListInit(&pApiHeadState->vblankSemControl.list); for (layer = 0; layer < ARRAY_LEN(pApiHeadState->flipOccurredEvent); layer++) { pApiHeadState->flipOccurredEvent[layer].ref_ptr = @@ -5271,12 +5387,6 @@ NvBool nvAllocCoreChannelEvo(NVDevEvoPtr pDevEvo) goto failed; } - if (!nvAllocLutSurfacesEvo(pDevEvo)) { - nvEvoLogDev(pDevEvo, EVO_LOG_ERROR, - "Failed to allocate memory for the display color lookup table."); - goto failed; - } - // Resume the DisplayPort library's control of the device. if (!nvRmResumeDP(pDevEvo)) { nvEvoLogDev( @@ -5530,7 +5640,11 @@ NvBool nvResumeDevEvo(NVDevEvoRec *pDevEvo) } } + nvInvalidateDefaultLut(pDevEvo); + if (!nvAllocCoreChannelEvo(pDevEvo)) { + // free the device if core channel allocation fails + nvRevokeDevice(pDevEvo); return FALSE; } @@ -5600,8 +5714,6 @@ void nvFreeCoreChannelEvo(NVDevEvoPtr pDevEvo) // Pause the DisplayPort library's control of the device. nvRmPauseDP(pDevEvo); - nvFreeLutSurfacesEvo(pDevEvo); - // Unmap and free the cursor controls for all heads nvFreeCursorEvo(pDevEvo); @@ -5978,8 +6090,8 @@ NvBool nvConstructHwModeTimingsImpCheckEvo( timingsParams[head].pConnectorEvo = pConnectorEvo; timingsParams[head].activeRmId = activeRmId; timingsParams[head].pixelDepth = nvEvoDpyColorToPixelDepth(pColor); - if (!nvEvoGetSingleTileHwModeTimings(pTimings, numHeads, - &timings[head])) { + if (!nvEvoGetSingleMergeHeadSectionHwModeTimings(pTimings, numHeads, + &timings[head])) { ret = FALSE; goto done; } @@ -6716,8 +6828,7 @@ static NvBool GetDfpHdmiProtocol(const NVDpyEvoRec *pDpyEvo, nvDpyGetOutputColorFormatInfo(pDpyEvo); const NvBool forceHdmiFrlIsSupported = FALSE; - nvAssert(rmProtocol == NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_DUAL_TMDS || - rmProtocol == NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_SINGLE_TMDS_A || + nvAssert(rmProtocol == NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_SINGLE_TMDS_A || rmProtocol == NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_SINGLE_TMDS_B); /* Override protocol if this mode requires HDMI FRL. */ @@ -6744,28 +6855,14 @@ static NvBool GetDfpHdmiProtocol(const NVDpyEvoRec *pDpyEvo, if (nvHdmiGetEffectivePixelClockKHz(pDpyEvo, pTimings, pDpyColor) <= pDpyEvo->maxSingleLinkPixelClockKHz) { - switch (rmProtocol) { - case NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_DUAL_TMDS: - /* - * Force single link TMDS protocol. HDMI does not support - * physically support dual link TMDS. - * - * TMDS_A: "use A side of the link" - */ - *pTimingsProtocol = NVKMS_PROTOCOL_SOR_SINGLE_TMDS_A; - break; - case NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_SINGLE_TMDS_A: - *pTimingsProtocol = NVKMS_PROTOCOL_SOR_SINGLE_TMDS_A; - break; - case NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_SINGLE_TMDS_B: - *pTimingsProtocol = NVKMS_PROTOCOL_SOR_SINGLE_TMDS_B; - break; - default: - return FALSE; - } + *pTimingsProtocol = (rmProtocol == + NV0073_CTRL_SPECIFIC_OR_PROTOCOL_SOR_SINGLE_TMDS_A) ? + NVKMS_PROTOCOL_SOR_SINGLE_TMDS_A : + NVKMS_PROTOCOL_SOR_SINGLE_TMDS_B; return TRUE; } - } while (nvDowngradeColorSpaceAndBpc(&colorFormatsInfo, + } while (nvDowngradeColorSpaceAndBpc(pDpyEvo, + &colorFormatsInfo, pDpyColor)); return FALSE; } @@ -6994,6 +7091,7 @@ NvBool nvDowngradeColorBpc( } NvBool nvDowngradeColorSpaceAndBpc( + const NVDpyEvoRec *pDpyEvo, const NvKmsDpyOutputColorFormatInfo *pSupportedColorFormats, NVDpyAttributeColor *pDpyColor) { @@ -7003,9 +7101,9 @@ NvBool nvDowngradeColorSpaceAndBpc( switch (pDpyColor->format) { case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB: - /* XXX Add support for downgrading to YUV with BT2100 */ - if (pDpyColor->colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100) { - return FALSE; + if ((pDpyColor->colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100) && + !pDpyEvo->pDispEvo->pDevEvo->caps.supportsYUV2020) { + break; } /* fallthrough */ case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr444: @@ -7060,7 +7158,7 @@ NvBool nvDPValidateModeEvo(NVDpyEvoPtr pDpyEvo, if (!nvDPValidateModeForDpyEvo(pDpyEvo, &dpyColor, pParams, pTimings, b2Heads1Or, pDscInfo)) { - if (nvDowngradeColorSpaceAndBpc(&supportedColorFormats, &dpyColor)) { + if (nvDowngradeColorSpaceAndBpc(pDpyEvo, &supportedColorFormats, &dpyColor)) { goto tryAgain; } /* @@ -8460,7 +8558,7 @@ void nvEvoSetLut(NVDispEvoPtr pDispEvo, NvU32 apiHead, NvBool kickoff, pDevEvo->lut.apiHead[apiHead].disp[dispIndex].waitForPreviousUpdate; const int numLUTs = ARRAY_LEN(pDevEvo->lut.apiHead[apiHead].LUT); const int lutToFill = (curLUT + 1) % numLUTs; - NVLutSurfaceEvoPtr pSurfEvo = pDevEvo->lut.apiHead[apiHead].LUT[lutToFill]; + NVSurfaceEvoPtr pSurfEvo = pDevEvo->lut.apiHead[apiHead].LUT[lutToFill]; NvBool baseLutEnabled = pDevEvo->lut.apiHead[apiHead].disp[dispIndex].curBaseLutEnabled ; NvBool outputLutEnabled = @@ -8747,6 +8845,8 @@ NvBool nvFreeDevEvo(NVDevEvoPtr pDevEvo) pDevEvo->fbConsoleSurfaceHandle = 0; } + nvFreeLutSurfacesEvo(pDevEvo); + nvFreeCoreChannelEvo(pDevEvo); nvTeardownHdmiLibrary(pDevEvo); @@ -8905,6 +9005,13 @@ NVDevEvoPtr nvAllocDevEvo(const struct NvKmsAllocDeviceRequest *pRequest, goto done; } + if (!nvAllocLutSurfacesEvo(pDevEvo)) { + nvEvoLogDev(pDevEvo, EVO_LOG_ERROR, + "Failed to allocate memory for the display color lookup table."); + status = NVKMS_ALLOC_DEVICE_STATUS_FATAL_ERROR; + goto done; + } + if (!nvInitHdmiLibrary(pDevEvo)) { status = NVKMS_ALLOC_DEVICE_STATUS_FATAL_ERROR; goto done; @@ -9426,6 +9533,11 @@ NvBool nvNeedsTmoLut(NVDevEvoPtr pDevEvo, return FALSE; } + // If the TMO is set directly by the client, honor the client's request. + if (pHwState->tmoLut.fromOverride) { + return (pHwState->tmoLut.pLutSurfaceEvo != NULL); + } + // Don't tone map if layer doesn't have static metadata. // XXX HDR TODO: Support tone mapping SDR surfaces to HDR if (!pHwState->hdrStaticMetadata.enabled) { @@ -9650,41 +9762,42 @@ void nvEvoDisableMergeMode(NVDispEvoRec *pDispEvo, } } -NvBool nvEvoGetSingleTileHwModeTimings(const NVHwModeTimingsEvo *pSrc, - const NvU32 numTiles, - NVHwModeTimingsEvo *pDst) +NvBool nvEvoGetSingleMergeHeadSectionHwModeTimings( + const NVHwModeTimingsEvo *pSrc, + const NvU32 numMergeHeadSections, + NVHwModeTimingsEvo *pDst) { - if (numTiles == 1) { + if (numMergeHeadSections == 1) { *pDst = *pSrc; return TRUE; } - if ((numTiles == 0) || + if ((numMergeHeadSections == 0) || (pSrc->viewPort.out.xAdjust != 0) || (pSrc->viewPort.out.width != nvEvoVisibleWidth(pSrc))) { return FALSE; } - if (((pSrc->rasterSize.x % numTiles) != 0) || - (((pSrc->rasterSyncEnd.x + 1) % numTiles) != 0) || - (((pSrc->rasterBlankEnd.x + 1) % numTiles) != 0) || - (((pSrc->rasterBlankStart.x + 1) % numTiles) != 0) || - ((pSrc->pixelClock % numTiles) != 0) || - ((pSrc->viewPort.in.width % numTiles) != 0)) { + if (((pSrc->rasterSize.x % numMergeHeadSections) != 0) || + (((pSrc->rasterSyncEnd.x + 1) % numMergeHeadSections) != 0) || + (((pSrc->rasterBlankEnd.x + 1) % numMergeHeadSections) != 0) || + (((pSrc->rasterBlankStart.x + 1) % numMergeHeadSections) != 0) || + ((pSrc->pixelClock % numMergeHeadSections) != 0) || + ((pSrc->viewPort.in.width % numMergeHeadSections) != 0)) { return FALSE; } *pDst = *pSrc; - pDst->rasterSize.x /= numTiles; - pDst->rasterSyncEnd.x /= numTiles; - pDst->rasterBlankEnd.x /= numTiles; - pDst->rasterBlankStart.x /= numTiles; + pDst->rasterSize.x /= numMergeHeadSections; + pDst->rasterSyncEnd.x /= numMergeHeadSections; + pDst->rasterBlankEnd.x /= numMergeHeadSections; + pDst->rasterBlankStart.x /= numMergeHeadSections; - pDst->pixelClock /= numTiles; + pDst->pixelClock /= numMergeHeadSections; - pDst->viewPort.out.width /= numTiles; - pDst->viewPort.in.width /= numTiles; + pDst->viewPort.out.width /= numMergeHeadSections; + pDst->viewPort.in.width /= numMergeHeadSections; return TRUE; } diff --git a/src/nvidia-modeset/src/nvkms-evo2.c b/src/nvidia-modeset/src/nvkms-evo2.c index 44a3adc932..ce8675c54e 100644 --- a/src/nvidia-modeset/src/nvkms-evo2.c +++ b/src/nvidia-modeset/src/nvkms-evo2.c @@ -82,14 +82,6 @@ EvoSetCursorImage(NVDevEvoPtr pDevEvo, const struct NvKmsCompositionParams *pCursorCompParams); static void -EvoPushSetLUTContextDmaMethodsForOneSd(NVDevEvoRec *pDevEvo, - const NvU32 sd, - const NvU32 head, - const NvU32 ctxdma, - NvBool enableBaseLut, - const NvBool enableOutputLut, - NVEvoUpdateState *updateState); -static void EvoPushUpdateComposition(NVDevEvoPtr pDevEvo, const int head, const NVFlipChannelEvoHwState *pBaseHwState, @@ -370,12 +362,61 @@ static void EvoSetRasterParams91(NVDevEvoPtr pDevEvo, int head, nvDmaSetEvoMethodData(pChannel, hdmiStereoCtrl); } +static void EvoSetProcAmp97(NVDispEvoPtr pDispEvo, const NvU32 head, + NVEvoUpdateState *updateState) +{ + NVDevEvoPtr pDevEvo = pDispEvo->pDevEvo; + NVEvoChannelPtr pChannel = pDevEvo->core; + const NVDispHeadStateEvoRec *pHeadState = &pDispEvo->headState[head]; + NvU8 colorSpace; + NvU32 dynRange; + + /* These methods should only apply to a single pDpyEvo */ + nvAssert(pDevEvo->subDevMaskStackDepth > 0); + + nvUpdateUpdateState(pDevEvo, updateState, pChannel); + + // These NVT defines match the HEAD_SET_PROCAMP ones. + ct_assert(NVT_COLORIMETRY_RGB == NV977D_HEAD_SET_PROCAMP_COLOR_SPACE_RGB); + ct_assert(NVT_COLORIMETRY_YUV_601 == NV977D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_601); + ct_assert(NVT_COLORIMETRY_YUV_709 == NV977D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_709); + ct_assert(NVT_COLOR_RANGE_FULL == NV977D_HEAD_SET_PROCAMP_RANGE_COMPRESSION_DISABLE); + ct_assert(NVT_COLOR_RANGE_LIMITED == NV977D_HEAD_SET_PROCAMP_RANGE_COMPRESSION_ENABLE); + + if (pHeadState->procAmp.colorimetry == NVT_COLORIMETRY_BT2020RGB) { + colorSpace = NV977D_HEAD_SET_PROCAMP_COLOR_SPACE_RGB; + } else if (pHeadState->procAmp.colorimetry == NVT_COLORIMETRY_BT2020YCC) { + colorSpace = NV977D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_2020; + } else { + colorSpace = pHeadState->procAmp.colorimetry; + } + + if (pHeadState->procAmp.colorRange == NVT_COLOR_RANGE_FULL) { + dynRange = DRF_DEF(977D, _HEAD_SET_PROCAMP, _DYNAMIC_RANGE, _VESA); + } else { + nvAssert(pHeadState->procAmp.colorRange == NVT_COLOR_RANGE_LIMITED); + dynRange = DRF_DEF(977D, _HEAD_SET_PROCAMP, _DYNAMIC_RANGE, _CEA); + } + + nvDmaSetStartEvoMethod(pChannel, NV977D_HEAD_SET_PROCAMP(head), 1); + nvDmaSetEvoMethodData(pChannel, + DRF_NUM(977D, _HEAD_SET_PROCAMP, _COLOR_SPACE, colorSpace) | + DRF_DEF(977D, _HEAD_SET_PROCAMP, _CHROMA_LPF, _AUTO) | + DRF_NUM(977D, _HEAD_SET_PROCAMP, _SAT_COS, + pHeadState->procAmp.satCos) | + DRF_NUM(977D, _HEAD_SET_PROCAMP, _SAT_SINE, 0) | + dynRange | + DRF_NUM(977D, _HEAD_SET_PROCAMP, _RANGE_COMPRESSION, + pHeadState->procAmp.colorRange)); +} + static void EvoSetProcAmp90(NVDispEvoPtr pDispEvo, const NvU32 head, NVEvoUpdateState *updateState) { NVDevEvoPtr pDevEvo = pDispEvo->pDevEvo; NVEvoChannelPtr pChannel = pDevEvo->core; const NVDispHeadStateEvoRec *pHeadState = &pDispEvo->headState[head]; + NvU8 colorSpace; NvU32 dynRange; /* These methods should only apply to a single pDpyEvo */ @@ -390,6 +431,13 @@ static void EvoSetProcAmp90(NVDispEvoPtr pDispEvo, const NvU32 head, ct_assert(NVT_COLOR_RANGE_FULL == NV917D_HEAD_SET_PROCAMP_RANGE_COMPRESSION_DISABLE); ct_assert(NVT_COLOR_RANGE_LIMITED == NV917D_HEAD_SET_PROCAMP_RANGE_COMPRESSION_ENABLE); + if (pHeadState->procAmp.colorimetry == NVT_COLORIMETRY_BT2020RGB) { + colorSpace = NV917D_HEAD_SET_PROCAMP_COLOR_SPACE_RGB; + } else { + nvAssert(pHeadState->procAmp.colorimetry != NVT_COLORIMETRY_BT2020YCC); + colorSpace = pHeadState->procAmp.colorimetry; + } + if (pHeadState->procAmp.colorRange == NVT_COLOR_RANGE_FULL) { dynRange = DRF_DEF(917D, _HEAD_SET_PROCAMP, _DYNAMIC_RANGE, _VESA); } else { @@ -399,8 +447,7 @@ static void EvoSetProcAmp90(NVDispEvoPtr pDispEvo, const NvU32 head, nvDmaSetStartEvoMethod(pChannel, NV917D_HEAD_SET_PROCAMP(head), 1); nvDmaSetEvoMethodData(pChannel, - DRF_NUM(917D, _HEAD_SET_PROCAMP, _COLOR_SPACE, - pHeadState->procAmp.colorimetry) | + DRF_NUM(917D, _HEAD_SET_PROCAMP, _COLOR_SPACE, colorSpace) | DRF_DEF(917D, _HEAD_SET_PROCAMP, _CHROMA_LPF, _AUTO) | DRF_NUM(917D, _HEAD_SET_PROCAMP, _SAT_COS, pHeadState->procAmp.satCos) | @@ -870,6 +917,8 @@ static NvBool EvoSetUsageBounds90(NVDevEvoPtr pDevEvo, NvU32 sd, NvU32 head, baseUsage |= DRF_DEF(917D, _HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, _SUPER_SAMPLE, _X1_AA); + baseUsage |= DRF_DEF(917D, _HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, + _OUTPUT_LUT, _USAGE_1025); } overlayUsage |= pUsage->layer[NVKMS_OVERLAY_LAYER].usable ? @@ -892,6 +941,9 @@ static NvBool EvoSetUsageBounds90(NVDevEvoPtr pDevEvo, NvU32 sd, NvU32 head, _PIXEL_DEPTH, _BPP_16); } + overlayUsage |= DRF_DEF(917D, _HEAD_SET_OVERLAY_USAGE_BOUNDS, + _OVERLAY_LUT, _USAGE_1025); + nvDmaSetStartEvoMethod(pChannel, NV917D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS(head), 2); nvDmaSetEvoMethodData(pChannel, baseUsage); @@ -1363,6 +1415,249 @@ static void EvoSetSurface(NVDevEvoPtr pDevEvo, } } +static void +SetPresentControlBase(NVDevEvoPtr pDevEvo, + NVEvoChannelPtr pChannel, + const NVFlipChannelEvoHwState *pHwState, + NVEvoUpdateState *updateState) +{ + NvU32 presentControl = + DRF_NUM(917C, _SET_PRESENT_CONTROL, _MIN_PRESENT_INTERVAL, + pHwState->minPresentInterval); + + if (pHwState->tearing) { + presentControl = FLD_SET_DRF(917C, _SET_PRESENT_CONTROL, _BEGIN_MODE, + _IMMEDIATE, presentControl); + /* + * This avoids an invalid state exception: + * + * if ((SetPresentControl.BeginMode != NON_TEARING) && + * (SetPresentControl.BeginMode != AT_FRAME) + * && (wir_InterlockWithCore == ENABLE)) + * throw NV_DISP_BASE_STATE_ERROR_001; + */ + nvDisableCoreInterlockUpdateState(pDevEvo, updateState, pChannel); + } else { + presentControl = FLD_SET_DRF(917C, _SET_PRESENT_CONTROL, _BEGIN_MODE, + _NON_TEARING, presentControl); + } + + if (pHwState->pSurfaceEvo[NVKMS_RIGHT]) { + if (pHwState->perEyeStereoFlip) { + presentControl = FLD_SET_DRF(917C, _SET_PRESENT_CONTROL, + _STEREO_FLIP_MODE, _AT_ANY_FRAME, + presentControl); + } else { + presentControl = FLD_SET_DRF(917C, _SET_PRESENT_CONTROL, + _STEREO_FLIP_MODE, _PAIR_FLIP, + presentControl); + } + presentControl = FLD_SET_DRF(917C, _SET_PRESENT_CONTROL, + _MODE, _STEREO, presentControl); + } else { + presentControl = FLD_SET_DRF(917C, _SET_PRESENT_CONTROL, + _MODE, _MONO, presentControl); + } + + // If we have a non-zero timestamp we need to enable timestamp mode + if (pHwState->timeStamp == 0) { + presentControl = FLD_SET_DRF(917C, _SET_PRESENT_CONTROL, + _TIMESTAMP_MODE, _DISABLE, presentControl); + } else { + presentControl = FLD_SET_DRF(917C, _SET_PRESENT_CONTROL, + _TIMESTAMP_MODE, _ENABLE, presentControl); + } + + nvDmaSetStartEvoMethod(pChannel, NV917C_SET_TIMESTAMP_ORIGIN_LO, 2); + nvDmaSetEvoMethodData(pChannel, 0); + nvDmaSetEvoMethodData(pChannel, 0); + + nvDmaSetStartEvoMethod(pChannel, NV917C_SET_UPDATE_TIMESTAMP_LO, 2); + nvDmaSetEvoMethodData(pChannel, NvU64_LO32(pHwState->timeStamp)); + nvDmaSetEvoMethodData(pChannel, NvU64_HI32(pHwState->timeStamp)); + + nvDmaSetStartEvoMethod(pChannel, NV917C_SET_PRESENT_CONTROL, 1); + nvDmaSetEvoMethodData(pChannel, presentControl); +} + +static void EvoSetBaseInputLut(NVDevEvoPtr pDevEvo, + NvU32 sd, NvU32 head, + const NVFlipLutHwState *pInputLut, + NvBool enable, + NVEvoUpdateState *updateState) +{ + /* + * Program input LUT on the core channel, but output LUT on the base + * channel, so LUT surfaces can be split. The input LUT must be on the core + * channel so that I8 surfaces don't fail the error check. + */ + NVEvoChannelPtr pChannel = pDevEvo->core; + NvBool enableLut = enable && pInputLut->pLutSurfaceEvo != NULL; + NvU64 offset = enableLut ? pInputLut->offset : 0; + NvU32 ctxdma = enableLut ? + pInputLut->pLutSurfaceEvo->planes[0].surfaceDesc.ctxDmaHandle : 0; + + const NVSurfaceEvoRec *pOldSurface = pDevEvo->pSubDevices[sd]->pBaseLutSurface[head]; + NvBool oldEnableLut = (pOldSurface != NULL); + NvU64 oldOffset = oldEnableLut ? + pDevEvo->pSubDevices[sd]->baseLutOffset[head] : 0; + NvU32 oldCtxdma = oldEnableLut ? + pOldSurface->planes[0].surfaceDesc.ctxDmaHandle : 0; + + nvAssert((offset & 0xff) == 0); + nvAssert((oldOffset & 0xff) == 0); + + if ((enableLut == oldEnableLut) && + (ctxdma == oldCtxdma) && + (offset == oldOffset)) { + return; + } + + nvUpdateUpdateState(pDevEvo, updateState, pChannel); + + nvDmaSetStartEvoMethod(pChannel, NV917D_HEAD_SET_BASE_LUT_LO(head), 1); + nvDmaSetEvoMethodData(pChannel, + (enableLut ? DRF_DEF(917D, _HEAD_SET_BASE_LUT_LO, _ENABLE, _ENABLE) : + DRF_DEF(917D, _HEAD_SET_BASE_LUT_LO, _ENABLE, _DISABLE)) | + DRF_DEF(917D, _HEAD_SET_BASE_LUT_LO, _MODE, _INTERPOLATE_1025_UNITY_RANGE) | + DRF_DEF(917D, _HEAD_SET_BASE_LUT_LO, _NEVER_YIELD_TO_BASE, _DISABLE)); + nvDmaSetStartEvoMethod(pChannel, NV917D_HEAD_SET_BASE_LUT_HI(head), 1); + nvDmaSetEvoMethodData(pChannel, + DRF_NUM(917D, _HEAD_SET_BASE_LUT_HI, _ORIGIN, offset >> 8)); + + nvDmaSetStartEvoMethod(pChannel, NV917D_HEAD_SET_CONTEXT_DMA_LUT(head), 1); + nvDmaSetEvoMethodData(pChannel, + DRF_NUM(917D, _HEAD_SET_CONTEXT_DMA_LUT, _HANDLE, ctxdma)); + + /* + * Use this backdoor to disable "wide pipe" underreplication during + * expansion of color components into the display pipe. + * Underreplication of a non-zero 8-bit color to more than 8 bits + * causes lookups to fall between LUT entries in interpolating LUTs . + * See bug 734919 for details. However, we use + * INDEX_1025_UNITY_RANGE mode for the ILUT, so no interpolation + * occurs. + * The "wide pipe" may also cause scanout of 8-bit data to an 8-bit + * OR to not be a straight passthrough (bug 895401). + */ + nvDmaSetStartEvoMethod(pChannel, NV917D_HEAD_SET_CRC_CONTROL(head), 1); + nvDmaSetEvoMethodData(pChannel, + DRF_DEF(917D, _HEAD_SET_CRC_CONTROL, _PRIMARY_OUTPUT, _NONE) | + DRF_DEF(917D, _HEAD_SET_CRC_CONTROL, _SECONDARY_OUTPUT, _NONE) | + DRF_DEF(917D, _HEAD_SET_CRC_CONTROL, _WIDE_PIPE_CRC, _DISABLE)); + + pDevEvo->pSubDevices[sd]->pBaseLutSurface[head] = enableLut ? + pInputLut->pLutSurfaceEvo : NULL; + pDevEvo->pSubDevices[sd]->baseLutOffset[head] = offset; +} + +static void EvoSetOverlayInputLut(NVDevEvoPtr pDevEvo, + NVEvoChannelPtr pChannel, + const NVFlipLutHwState *pInputLut, + NvBool enable) +{ + NvBool enableLut = enable && pInputLut->pLutSurfaceEvo != NULL; + NvU64 offset = enableLut ? pInputLut->offset : 0; + NvU32 ctxdma = enableLut ? + pInputLut->pLutSurfaceEvo->planes[0].surfaceDesc.ctxDmaHandle : 0; + + nvAssert((offset & 0xff) == 0); + + nvDmaSetStartEvoMethod(pChannel, NV917E_SET_OVERLAY_LUT_LO, 1); + nvDmaSetEvoMethodData(pChannel, + DRF_DEF(917E, _SET_OVERLAY_LUT_LO, _MODE, _INDEX_1025_UNITY_RANGE) | + (enableLut ? DRF_DEF(917E, _SET_OVERLAY_LUT_LO, _ENABLE, _ENABLE) : + DRF_DEF(917E, _SET_OVERLAY_LUT_LO, _ENABLE, _DISABLE))); + nvDmaSetStartEvoMethod(pChannel, NV917E_SET_OVERLAY_LUT_HI, 1); + nvDmaSetEvoMethodData(pChannel, + DRF_NUM(917E, _SET_OVERLAY_LUT_HI, _ORIGIN, offset >> 8)); + + nvDmaSetStartEvoMethod(pChannel, NV917E_SET_CONTEXT_DMA_LUT, 1); + nvDmaSetEvoMethodData(pChannel, + DRF_NUM(917E, _SET_CONTEXT_DMA_LUT, _HANDLE, ctxdma)); +} + +static void EvoSetOutputLut(NVDevEvoPtr pDevEvo, + NvU32 sd, NvU32 head, + const NVFlipLutHwState *pOutputLut, + NvBool enable, + NVEvoUpdateState *updateState) +{ + /* + * Program input LUT on the core channel, but output LUT on the base + * channel, so LUT surfaces can be split. The input LUT must be on the core + * channel so that I8 surfaces don't fail the error check. + */ + NVEvoChannelPtr pChannel = pDevEvo->base[head]; + NvBool enableLut = enable && pOutputLut->pLutSurfaceEvo != NULL; + NvU64 offset = enableLut ? pOutputLut->offset : 0; + NvU32 ctxdma = enableLut ? + pOutputLut->pLutSurfaceEvo->planes[0].surfaceDesc.ctxDmaHandle : 0; + + const NVSurfaceEvoRec *pOldSurface = pDevEvo->pSubDevices[sd]->pOutputLutSurface[head]; + NvBool oldEnableLut = (pOldSurface != NULL); + NvU64 oldOffset = oldEnableLut ? + pDevEvo->pSubDevices[sd]->outputLutOffset[head] : 0; + NvU32 oldCtxdma = oldEnableLut ? + pOldSurface->planes[0].surfaceDesc.ctxDmaHandle : 0; + + NVFlipChannelEvoHwState *pBaseHwState = + &pDevEvo->gpus[sd].headState[head].layer[NVKMS_MAIN_LAYER]; + + nvAssert((offset & 0xff) == 0); + nvAssert((oldOffset & 0xff) == 0); + + if ((enableLut == oldEnableLut) && + (ctxdma == oldCtxdma) && + (offset == oldOffset)) { + return; + } + + nvUpdateUpdateState(pDevEvo, updateState, pChannel); + + /* + * If we're changing the OLUT, this update will need to interlock the base + * and core channels. The caller must set the main layer on the head to + * non-tearing. This function may end up being called without a flip on the + * base layer if it's not dirty, so ensure that we set the present mode + * here. + */ + nvAssert(!pBaseHwState->tearing); + SetPresentControlBase(pDevEvo, pChannel, pBaseHwState, updateState); + + nvDmaSetStartEvoMethod(pChannel, NV917C_SET_OUTPUT_LUT_LO, 1); + nvDmaSetEvoMethodData(pChannel, + DRF_DEF(917C, _SET_OUTPUT_LUT_LO, _MODE, _INDEX_1025_UNITY_RANGE) | + (enableLut ? DRF_DEF(917C, _SET_OUTPUT_LUT_LO, _ENABLE, _ENABLE) : + DRF_DEF(917C, _SET_OUTPUT_LUT_LO, _ENABLE, _DISABLE))); + nvDmaSetStartEvoMethod(pChannel, NV917C_SET_OUTPUT_LUT_HI, 1); + nvDmaSetEvoMethodData(pChannel, + DRF_NUM(917C, _SET_OUTPUT_LUT_HI, _ORIGIN, offset >> 8)); + + nvDmaSetStartEvoMethod(pChannel, NV917C_SET_CONTEXT_DMA_LUT, 1); + nvDmaSetEvoMethodData(pChannel, + DRF_NUM(917C, _SET_CONTEXT_DMA_LUT, _HANDLE, ctxdma)); + + pDevEvo->pSubDevices[sd]->pOutputLutSurface[head] = enableLut ? + pOutputLut->pLutSurfaceEvo : NULL; + pDevEvo->pSubDevices[sd]->outputLutOffset[head] = offset; +} + +static void EvoSetOutputLut90(NVDevEvoPtr pDevEvo, + NvU32 sd, NvU32 head, + const NVFlipLutHwState *pOutputLut, + NvU32 fpNormScale, + NVEvoUpdateState *updateState, + NvBool bypassComposition) +{ + NVFlipChannelEvoHwState *pBaseHwState = + &pDevEvo->gpus[sd].headState[head].layer[NVKMS_MAIN_LAYER]; + + EvoSetOutputLut(pDevEvo, sd, head, pOutputLut, + pBaseHwState->pSurfaceEvo[NVKMS_LEFT] != NULL, + updateState); +} + static void EvoPushSetCoreSurfaceMethodsForOneSd(NVDevEvoRec *pDevEvo, const NvU32 sd, @@ -1375,22 +1670,6 @@ EvoPushSetCoreSurfaceMethodsForOneSd(NVDevEvoRec *pDevEvo, &pDevEvo->gpus[sd].headState[head]; const NVFlipCursorEvoHwState *pSdCursorState = &pSdHeadState->cursor; - const NVDispEvoRec *pDispEvo = pDevEvo->gpus[sd].pDispEvo; - const NVDispHeadStateEvoRec *pHeadState = &pDispEvo->headState[head]; - - NvBool enableOutputLut = pHeadState->lut.outputLutEnabled; - NvBool enableBaseLut = pHeadState->lut.baseLutEnabled; - - NVLutSurfaceEvoPtr pCurLutSurfEvo = pHeadState->lut.pCurrSurface; - NvU32 lutCtxdma = pCurLutSurfEvo != NULL ? - pCurLutSurfEvo->surfaceDesc.ctxDmaHandle : 0x0; - - if (pSurfaceEvo == NULL || pCurLutSurfEvo == NULL) { - enableOutputLut = FALSE; - enableBaseLut = FALSE; - lutCtxdma = 0x0; - } - nvPushEvoSubDevMask(pDevEvo, NVBIT(sd)); EvoSetSurface(pDevEvo, head, pSurfaceEvo, pCscMatrix, updateState); @@ -1402,13 +1681,16 @@ EvoPushSetCoreSurfaceMethodsForOneSd(NVDevEvoRec *pDevEvo, updateState, &pSdCursorState->cursorCompParams); - /* - * EvoPushSetLUTContextDmaMethodsForOneSd() force enables base - * Lut if core scanout surface depth is 8. - */ - EvoPushSetLUTContextDmaMethodsForOneSd( - pDevEvo, sd, head, lutCtxdma, enableBaseLut, enableOutputLut, - updateState); + /* If we're disabling the core surface, we need to disable the LUTs. */ + if (pSurfaceEvo == NULL) { + EvoSetBaseInputLut(pDevEvo, sd, head, + NULL, FALSE, + updateState); + EvoSetOutputLut(pDevEvo, sd, head, + NULL, FALSE, + updateState); + + } nvPopEvoSubDevMask(pDevEvo); } @@ -1520,66 +1802,11 @@ FlipBase90(NVDevEvoPtr pDevEvo, nvDmaSetStartEvoMethod(pChannel, NV917C_SET_CSC_RED2RED, 1); nvDmaSetEvoMethodData(pChannel, DRF_DEF(917C, _SET_CSC_RED2RED, _OWNER, _CORE)); - return; - } - - NvU32 presentControl = - DRF_NUM(917C, _SET_PRESENT_CONTROL, _MIN_PRESENT_INTERVAL, - pHwState->minPresentInterval); - - if (pHwState->tearing) { - presentControl = FLD_SET_DRF(917C, _SET_PRESENT_CONTROL, _BEGIN_MODE, - _IMMEDIATE, presentControl); - /* - * This avoids an invalid state exception: - * - * if ((SetPresentControl.BeginMode != NON_TEARING) && - * (SetPresentControl.BeginMode != AT_FRAME) - * && (wir_InterlockWithCore == ENABLE)) - * throw NV_DISP_BASE_STATE_ERROR_001; - */ - nvDisableCoreInterlockUpdateState(pDevEvo, updateState, pChannel); - } else { - presentControl = FLD_SET_DRF(917C, _SET_PRESENT_CONTROL, _BEGIN_MODE, - _NON_TEARING, presentControl); - } - if (pHwState->pSurfaceEvo[NVKMS_RIGHT]) { - if (pHwState->perEyeStereoFlip) { - presentControl = FLD_SET_DRF(917C, _SET_PRESENT_CONTROL, - _STEREO_FLIP_MODE, _AT_ANY_FRAME, - presentControl); - } else { - presentControl = FLD_SET_DRF(917C, _SET_PRESENT_CONTROL, - _STEREO_FLIP_MODE, _PAIR_FLIP, - presentControl); - } - presentControl = FLD_SET_DRF(917C, _SET_PRESENT_CONTROL, - _MODE, _STEREO, presentControl); - } else { - presentControl = FLD_SET_DRF(917C, _SET_PRESENT_CONTROL, - _MODE, _MONO, presentControl); - } - - // If we have a non-zero timestamp we need to enable timestamp mode - if (pHwState->timeStamp == 0) { - presentControl = FLD_SET_DRF(917C, _SET_PRESENT_CONTROL, - _TIMESTAMP_MODE, _DISABLE, presentControl); - } else { - presentControl = FLD_SET_DRF(917C, _SET_PRESENT_CONTROL, - _TIMESTAMP_MODE, _ENABLE, presentControl); + return; } - nvDmaSetStartEvoMethod(pChannel, NV917C_SET_TIMESTAMP_ORIGIN_LO, 2); - nvDmaSetEvoMethodData(pChannel, 0); - nvDmaSetEvoMethodData(pChannel, 0); - - nvDmaSetStartEvoMethod(pChannel, NV917C_SET_UPDATE_TIMESTAMP_LO, 2); - nvDmaSetEvoMethodData(pChannel, NvU64_LO32(pHwState->timeStamp)); - nvDmaSetEvoMethodData(pChannel, NvU64_HI32(pHwState->timeStamp)); - - nvDmaSetStartEvoMethod(pChannel, NV917C_SET_PRESENT_CONTROL, 1); - nvDmaSetEvoMethodData(pChannel, presentControl); + SetPresentControlBase(pDevEvo, pChannel, pHwState, updateState); SetCscMatrix(pChannel, NV917C_SET_CSC_RED2RED, &pHwState->cscMatrix, DRF_DEF(917C, _SET_CSC_RED2RED, _OWNER, _BASE)); @@ -1630,8 +1857,6 @@ FlipBase90(NVDevEvoPtr pDevEvo, nvHwFormatFromKmsFormat90(pHwState->pSurfaceEvo[NVKMS_LEFT]->format)) | DRF_DEF(917C, _SURFACE_SET_PARAMS, _SUPER_SAMPLE, _X1_AA) | DRF_DEF(917C, _SURFACE_SET_PARAMS, _GAMMA, _LINEAR)); - - nvAssert(pHwState->inputLut.pLutSurfaceEvo == NULL); } static void @@ -1792,6 +2017,8 @@ FlipOverlay90(NVDevEvoPtr pDevEvo, // Disable overlay on this head. nvDmaSetStartEvoMethod(pChannel, NV917E_SET_CONTEXT_DMAS_ISO(NVKMS_LEFT), 1); nvDmaSetEvoMethodData(pChannel, 0); + + EvoSetOverlayInputLut(pDevEvo, pChannel, NULL, FALSE); return; } @@ -1828,10 +2055,10 @@ FlipOverlay90(NVDevEvoPtr pDevEvo, SetCscMatrix(pChannel, NV917E_SET_CSC_RED2RED, &pHwState->cscMatrix, 0); + EvoSetOverlayInputLut(pDevEvo, pChannel, &pHwState->inputLut, TRUE); + nvDmaSetStartEvoMethod(pChannel, NV917E_SET_CONTEXT_DMAS_ISO(NVKMS_LEFT), 1); nvDmaSetEvoMethodData(pChannel, pSurfaceEvo->planes[0].surfaceDesc.ctxDmaHandle); - - nvAssert(pHwState->inputLut.pLutSurfaceEvo == NULL); } static NvBool @@ -2021,6 +2248,23 @@ static void EvoFlip90(NVDevEvoPtr pDevEvo, } else { pDevEvo->pSubDevices[sd]->isBaseSurfSpecified[head] = FALSE; } + + /* + * On EVO2, error 52 will be thrown if the any of the + * SET_{BASE,OUTPUT}_LUT_{LO,HI} methods are programmed on a + * tearing flip, regardless of whether they actually update the + * hardware state. + */ + if (!pHwState->tearing) { + EvoSetBaseInputLut(pDevEvo, sd, head, + &pHwState->inputLut, + pHwState->pSurfaceEvo[NVKMS_LEFT] != NULL, + updateState); + EvoSetOutputLut(pDevEvo, sd, head, + &pDevEvo->gpus[sd].headState[head].outputLut, + pHwState->pSurfaceEvo[NVKMS_LEFT] != NULL, + updateState); + } } FOR_EACH_SUBDEV_IN_MASK_END FlipBase90(pDevEvo, pChannel, pHwState, updateState); @@ -2389,119 +2633,6 @@ EvoFillLUTSurface90(NVEvoLutEntryRec *pLUTBuffer, } } -static void -EvoPushSetLUTContextDmaMethodsForOneSd(NVDevEvoRec *pDevEvo, - const NvU32 sd, - const NvU32 head, - const NvU32 ctxdma, - NvBool enableBaseLut, - const NvBool enableOutputLut, - NVEvoUpdateState *updateState) -{ - NVEvoChannelPtr pChannel = pDevEvo->core; - NvU64 offset; - const NVSurfaceEvoRec *pCoreSurfaceEvo = - pDevEvo->pSubDevices[sd]->pCoreChannelSurface[head]; - const NvBool surfaceDepth8 = (pCoreSurfaceEvo != NULL) ? - (pCoreSurfaceEvo->format == NvKmsSurfaceMemoryFormatI8) : FALSE; - - nvAssert(nvPeekEvoSubDevMask(pDevEvo) == NVBIT(sd)); - - // Depth 8 requires the base LUT to be enabled. - if (ctxdma && !enableBaseLut && surfaceDepth8) { - // TODO: Is this still required? Callers should specify the LUT at - // modeset time now. - enableBaseLut = TRUE; - } - - nvAssert(ctxdma || (!enableBaseLut && !enableOutputLut)); - - nvUpdateUpdateState(pDevEvo, updateState, pChannel); - - /* Program the base LUT */ - - offset = offsetof(NVEvoLutDataRec, base); - nvAssert((offset & 0xff) == 0); - - nvDmaSetStartEvoMethod(pChannel, NV917D_HEAD_SET_BASE_LUT_LO(head), 1); - nvDmaSetEvoMethodData(pChannel, - DRF_DEF(917D, _HEAD_SET_BASE_LUT_LO, _MODE, _INDEX_1025_UNITY_RANGE) | - (enableBaseLut ? DRF_DEF(917D, _HEAD_SET_BASE_LUT_LO, _ENABLE, _ENABLE) : - DRF_DEF(917D, _HEAD_SET_BASE_LUT_LO, _ENABLE, _DISABLE)) | - DRF_DEF(917D, _HEAD_SET_BASE_LUT_LO, _NEVER_YIELD_TO_BASE, _DISABLE)); - - nvDmaSetStartEvoMethod(pChannel, NV917D_HEAD_SET_BASE_LUT_HI(head), 1); - nvDmaSetEvoMethodData(pChannel, - DRF_NUM(917D, _HEAD_SET_BASE_LUT_HI, _ORIGIN, offset >> 8)); - - /* Program the output LUT */ - - offset = offsetof(NVEvoLutDataRec, output); - nvAssert((offset & 0xff) == 0); - - nvDmaSetStartEvoMethod(pChannel, NV917D_HEAD_SET_OUTPUT_LUT_LO(head), 1); - nvDmaSetEvoMethodData(pChannel, - (enableOutputLut ? DRF_DEF(917D, _HEAD_SET_OUTPUT_LUT_LO, _ENABLE, _ENABLE) : - DRF_DEF(917D, _HEAD_SET_OUTPUT_LUT_LO, _ENABLE, _DISABLE)) | - DRF_DEF(917D, _HEAD_SET_OUTPUT_LUT_LO, _MODE, _INTERPOLATE_1025_UNITY_RANGE) | - DRF_DEF(917D, _HEAD_SET_OUTPUT_LUT_LO, _NEVER_YIELD_TO_BASE, _DISABLE)); - - nvDmaSetStartEvoMethod(pChannel, NV917D_HEAD_SET_OUTPUT_LUT_HI(head), 1); - nvDmaSetEvoMethodData(pChannel, - DRF_NUM(917D, _HEAD_SET_OUTPUT_LUT_HI, _ORIGIN, offset >> 8)); - - /* Set the ctxdma that's used by both LUTs */ - - nvDmaSetStartEvoMethod(pChannel, NV917D_HEAD_SET_CONTEXT_DMA_LUT(head), 1); - nvDmaSetEvoMethodData(pChannel, - DRF_NUM(917D, _HEAD_SET_CONTEXT_DMA_LUT, _HANDLE, ctxdma)); - - /* - * Use this backdoor to disable "wide pipe" underreplication during - * expansion of color components into the display pipe. Underreplication - * of a non-zero 8-bit color to more than 8 bits causes lookups to fall - * between LUT entries in a 256-entry LUT, which we don't want. See bug - * 734919 for details. - * The "wide pipe" may also cause scanout of 8-bit data to an 8-bit OR to - * not be a straight passthrough (bug 895401). - */ - nvDmaSetStartEvoMethod(pChannel, NV917D_HEAD_SET_CRC_CONTROL(head), 1); - nvDmaSetEvoMethodData(pChannel, - DRF_DEF(917D, _HEAD_SET_CRC_CONTROL, _PRIMARY_OUTPUT, _NONE) | - DRF_DEF(917D, _HEAD_SET_CRC_CONTROL, _SECONDARY_OUTPUT, _NONE) | - DRF_DEF(917D, _HEAD_SET_CRC_CONTROL, _WIDE_PIPE_CRC, _DISABLE)); -} - -static void EvoSetLUTContextDma90(const NVDispEvoRec *pDispEvo, - const int head, - NVLutSurfaceEvoPtr pLutSurfEvo, - NvBool enableBaseLut, - NvBool enableOutputLut, - NVEvoUpdateState *updateState, - NvBool bypassComposition) -{ - NVDevEvoPtr pDevEvo = pDispEvo->pDevEvo; - const NvU32 sd = pDispEvo->displayOwner; - - const NvBool coreChannelCtxDmaNonNull = - pDevEvo->pSubDevices[sd]->pCoreChannelSurface[head] != NULL; - const NvU32 ctxdma = (pLutSurfEvo != NULL) ? pLutSurfEvo->surfaceDesc.ctxDmaHandle : 0; - - /* - * If the core channel doesn't have a scanout surface set, then setting the - * LUT context DMA will cause an exception. - */ - if (!coreChannelCtxDmaNonNull && ctxdma) { - return; - } - - nvPushEvoSubDevMask(pDevEvo, NVBIT(sd)); - EvoPushSetLUTContextDmaMethodsForOneSd( - pDevEvo, sd, head, ctxdma, enableBaseLut, enableOutputLut, - updateState); - nvPopEvoSubDevMask(pDevEvo); -} - #define NV_EVO2_CAP_GET_PIN(cl, n, pEvoCaps, word, name, idx, pCaps) \ (pEvoCaps)->pin[(idx)].flipLock = \ FLD_TEST_DRF(cl##_CORE_NOTIFIER_##n, _CAPABILITIES_##word, \ @@ -2597,6 +2728,19 @@ static void EvoParseCapabilityNotifier3(NVEvoCapabilitiesPtr pEvoCaps, // Don't need any PIOR caps currently. } +/* + * VSS is unsupported on EVO2 and all LUT entries are in UNORM14_WAR_813188 + */ +static void EvoFillLUTCaps(struct NvKmsLUTCaps *pCaps, NvBool supported) +{ + pCaps->supported = supported; + pCaps->vssSupport = NVKMS_LUT_VSS_NOT_SUPPORTED; + pCaps->vssType = NVKMS_LUT_VSS_TYPE_NONE; + pCaps->vssSegments = 0; + pCaps->lutEntries = supported ? 1025 : 0; + pCaps->entryFormat = NVKMS_LUT_FORMAT_UNORM14_WAR_813188; +} + static NvBool EvoGetCapabilities90(NVDevEvoPtr pDevEvo) { NVEvoChannelPtr pChannel = pDevEvo->core; @@ -2620,8 +2764,14 @@ static NvBool EvoGetCapabilities90(NVDevEvoPtr pDevEvo) pDevEvo->caps.legacyNotifierFormatSizeBytes[layer] = NV_DISP_BASE_NOTIFIER_1_SIZEOF; } + + /* Only the ILUT and OLUT are supported on EVO2. The TMO is EVO3+. */ + EvoFillLUTCaps(&pDevEvo->caps.layerCaps[layer].ilut, TRUE /* supported */); + EvoFillLUTCaps(&pDevEvo->caps.layerCaps[layer].tmo, FALSE /* supported */); } + EvoFillLUTCaps(&pDevEvo->caps.olut, TRUE /* supported */); + pDevEvo->caps.cursorCompositionCaps = (struct NvKmsCompositionCapabilities) { .supportedColorKeySelects = @@ -3473,7 +3623,8 @@ static void EvoStopHeadCRC32Capture90(NVDevEvoPtr pDevEvo, DRF_DEF(917D, _HEAD_SET_CRC_CONTROL, _EXPECT_BUFFER_COLLAPSE, _FALSE) | DRF_DEF(917D, _HEAD_SET_CRC_CONTROL, _TIMESTAMP_MODE, _FALSE) | DRF_DEF(917D, _HEAD_SET_CRC_CONTROL, _FLIPLOCK_MODE, _FALSE) | - DRF_DEF(917D, _HEAD_SET_CRC_CONTROL, _CRC_DURING_SNOOZE, _DISABLE)); + DRF_DEF(917D, _HEAD_SET_CRC_CONTROL, _CRC_DURING_SNOOZE, _DISABLE) | + DRF_DEF(917D, _HEAD_SET_CRC_CONTROL, _WIDE_PIPE_CRC, _DISABLE)); } /*! @@ -3832,6 +3983,96 @@ static NvU32 EvoBindSurfaceDescriptor90( return nvCtxDmaBind(pDevEvo, pChannel, pSurfaceDesc->ctxDmaHandle); } +NVEvoHAL nvEvo97 = { + EvoSetRasterParams91, /* SetRasterParams */ + EvoSetProcAmp97, /* SetProcAmp */ + EvoSetHeadControl90, /* SetHeadControl */ + EvoSetHeadRefClk90, /* SetHeadRefClk */ + EvoHeadSetControlOR90, /* HeadSetControlOR */ + EvoORSetControl90, /* ORSetControl */ + EvoHeadSetDisplayId90, /* HeadSetDisplayId */ + EvoSetUsageBounds90, /* SetUsageBounds */ + EvoUpdate91, /* Update */ + nvEvo1IsModePossible, /* IsModePossible */ + nvEvo1PrePostIMP, /* PrePostIMP */ + EvoSetNotifier90, /* SetNotifier */ + EvoGetCapabilities90, /* GetCapabilities */ + EvoFlip90, /* Flip */ + EvoFlipTransitionWAR90, /* FlipTransitionWAR */ + EvoFillLUTSurface90, /* FillLUTSurface */ + EvoSetOutputLut90, /* SetOutputLut */ + EvoSetOutputScaler90, /* SetOutputScaler */ + EvoSetViewportPointIn90, /* SetViewportPointIn */ + EvoSetViewportInOut90, /* SetViewportInOut */ + EvoSetCursorImage91, /* SetCursorImage */ + EvoValidateCursorSurface90, /* ValidateCursorSurface */ + EvoValidateWindowFormat90, /* ValidateWindowFormat */ + EvoInitCompNotifier3, /* InitCompNotifier */ + EvoIsCompNotifierComplete3, /* IsCompNotifierComplete */ + EvoWaitForCompNotifier3, /* WaitForCompNotifier */ + EvoSetDither91, /* SetDither */ + EvoSetStallLock94, /* SetStallLock */ + NULL, /* SetDisplayRate */ + EvoInitChannel90, /* InitChannel */ + NULL, /* InitDefaultLut */ + EvoInitWindowMapping90, /* InitWindowMapping */ + nvEvo1IsChannelIdle, /* IsChannelIdle */ + nvEvo1IsChannelMethodPending, /* IsChannelMethodPending */ + EvoForceIdleSatelliteChannel90, /* ForceIdleSatelliteChannel */ + EvoForceIdleSatelliteChannel90, /* ForceIdleSatelliteChannelIgnoreLock */ + EvoAccelerateChannel91, /* AccelerateChannel */ + EvoResetChannelAccelerators91, /* ResetChannelAccelerators */ + EvoAllocRmCtrlObject90, /* AllocRmCtrlObject */ + EvoFreeRmCtrlObject90, /* FreeRmCtrlObject */ + EvoSetImmPointOut91, /* SetImmPointOut */ + EvoStartHeadCRC32Capture90, /* StartCRC32Capture */ + EvoStopHeadCRC32Capture90, /* StopCRC32Capture */ + EvoQueryHeadCRC32_90, /* QueryCRC32 */ + EvoGetScanLine90, /* GetScanLine */ + NULL, /* ConfigureVblankSyncObject */ + nvEvo1SetDscParams, /* SetDscParams */ + NULL, /* EnableMidFrameAndDWCFWatermark */ + EvoGetActiveViewportOffset94, /* GetActiveViewportOffset */ + EvoClearSurfaceUsage91, /* ClearSurfaceUsage */ + EvoComputeWindowScalingTaps91, /* ComputeWindowScalingTaps */ + NULL, /* GetWindowScalingCaps */ + NULL, /* SetMergeMode */ + EvoAllocSurfaceDescriptor90, /* AllocSurfaceDescriptor */ + EvoFreeSurfaceDescriptor90, /* FreeSurfaceDescriptor */ + EvoBindSurfaceDescriptor90, /* BindSurfaceDescriptor */ + NULL, /* SetTmoLutSurfaceAddress */ + NULL, /* SetILUTSurfaceAddress */ + NULL, /* SetISOSurfaceAddress */ + NULL, /* SetCoreNotifierSurfaceAddressAndControl */ + NULL, /* SetWinNotifierSurfaceAddressAndControl */ + NULL, /* SetSemaphoreSurfaceAddressAndControl */ + NULL, /* SetAcqSemaphoreSurfaceAddressAndControl */ + { /* caps */ + FALSE, /* supportsNonInterlockedUsageBoundsUpdate */ + FALSE, /* supportsDisplayRate */ + TRUE, /* supportsFlipLockRGStatus */ + FALSE, /* needDefaultLutSurface */ + FALSE, /* hasUnorm10OLUT */ + TRUE, /* supportsImageSharpening */ + FALSE, /* supportsHDMIVRR */ + TRUE, /* supportsCoreChannelSurface */ + FALSE, /* supportsHDMIFRL */ + TRUE, /* supportsSetStorageMemoryLayout */ + FALSE, /* supportsIndependentAcqRelSemaphore */ + TRUE, /* supportsCoreLut */ + FALSE, /* supportsSynchronizedOverlayPositionUpdate */ + FALSE, /* supportsVblankSyncObjects */ + TRUE, /* requiresScalingTapsInBothDimensions */ + FALSE, /* supportsMergeMode */ + FALSE, /* supportsHDMI10BPC */ + FALSE, /* supportsDPAudio192KHz */ + NV_EVO2_SUPPORTED_DITHERING_MODES, /* supportedDitheringModes */ + sizeof(NV5070_CTRL_CMD_IS_MODE_POSSIBLE_PARAMS), /* impStructSize */ + NV_EVO_SCALER_1TAP, /* minScalerTaps */ + 0, /* xEmulatedSurfaceMemoryFormats */ + }, +}; + NVEvoHAL nvEvo94 = { EvoSetRasterParams91, /* SetRasterParams */ EvoSetProcAmp90, /* SetProcAmp */ @@ -3849,7 +4090,7 @@ NVEvoHAL nvEvo94 = { EvoFlip90, /* Flip */ EvoFlipTransitionWAR90, /* FlipTransitionWAR */ EvoFillLUTSurface90, /* FillLUTSurface */ - EvoSetLUTContextDma90, /* SetLUTContextDma */ + EvoSetOutputLut90, /* SetOutputLut */ EvoSetOutputScaler90, /* SetOutputScaler */ EvoSetViewportPointIn90, /* SetViewportPointIn */ EvoSetViewportInOut90, /* SetViewportInOut */ diff --git a/src/nvidia-modeset/src/nvkms-evo3.c b/src/nvidia-modeset/src/nvkms-evo3.c index d9a6a928bd..55c10c2e26 100644 --- a/src/nvidia-modeset/src/nvkms-evo3.c +++ b/src/nvidia-modeset/src/nvkms-evo3.c @@ -110,6 +110,10 @@ static const NvU32 FMTMatrix[FMT_COEFF_TYPE_MAX][12] = static void SetCsc00MatrixC5(NVEvoChannelPtr pChannel, const struct NvKmsCscMatrix *matrix); +static void SetCsc01MatrixC5(NVEvoChannelPtr pChannel, + const struct NvKmsCscMatrix *matrix); +static void SetCsc10MatrixC5(NVEvoChannelPtr pChannel, + const struct NvKmsCscMatrix *matrix); static void SetCsc11MatrixC5(NVEvoChannelPtr pChannel, const struct NvKmsCscMatrix *matrix); static void @@ -366,6 +370,26 @@ static const struct NvKmsCscMatrix LMSToRec2020RGB = {{ { 0x1ff964, 0x1fe6a4, 0x11ff4, 0 }, }}; +/* + * This is a 3x4 matrix with S5.14 coefficients (truncated from S5.16 + * SW-specified values). + */ +static const struct NvKmsCscMatrix LMSToICtCp = {{ + { 0x460d0, 0x1bc120, 0x1fde10, 0x8000 }, + { 0x8000, 0x8000, 0, 0 }, + { 0x19d20, 0x1cad30, 0x1b5b0, 0x8000 }, +}}; + +/* + * This is a 3x4 matrix with S5.14 coefficients (truncated from S5.16 + * SW-specified values). + */ +static const struct NvKmsCscMatrix ICtCpToLMS = {{ + { 0x1c6c, 0x10000, 0x234, 0x1ff0b0 }, + { 0x1fe394, 0x10000, 0x1ffdcc, 0xf50 }, + { 0x1fadec, 0x10000, 0x8f5e, 0x1fe15b }, +}}; + /* * The two arrays below specify the PQ OETF transfer function that's used to * convert from linear LMS FP16 to PQ encoded L'M'S' fixed-point. @@ -471,8 +495,8 @@ struct TmoLutSettings NvU32 highIntensityValueThreshold; }; -// Default Rec.2020 weights, no color correction. -static const struct TmoLutSettings TMO_LUT_SETTINGS_REC2020 = { 2, 1280, 256, 256, 255, 4960, 4961, 256, 256, 255, 10640, 256, 256, 255 }; +// No color correction. +static const struct TmoLutSettings TMO_LUT_SETTINGS_NO_CORRECTION = { 2, 1280, 256, 256, 255, 4960, 4961, 256, 256, 255, 10640, 256, 256, 255 }; static void InitCsc0LUT(NVEvoChannelPtr pChannel, const NvU32 *pSegmentSizes, NvU32 numSegmentSizes, @@ -518,56 +542,71 @@ static void InitCsc1LUT(NVEvoChannelPtr pChannel, static void ConfigureCsc0C5(NVDevEvoPtr pDevEvo, NVEvoChannelPtr pChannel, - enum NvKmsInputColorSpace colorspace, + const NVFlipChannelEvoHwState *pHwState, NvBool enable) { NVEvoWindowCaps *pWinCaps = &pDevEvo->gpus[0].capabilities.window[pChannel->instance]; - struct NvKmsCscMatrix matrix = { }; + struct NvKmsCscMatrix csc00Matrix = { }; + struct NvKmsCscMatrix csc01Matrix = { }; NvU32 lutData = 0; - NvU32 csc01Data = 0; if (!pWinCaps->csc0MatricesPresent) { return; } + nvAssert(pWinCaps->cscLUTsPresent); + if (enable) { - if (colorspace == NVKMS_INPUT_COLORSPACE_BT2100_PQ) { - matrix = Rec2020RGBToLMS; + /* Linear RGB FP16 -> Linear LMS FP16 */ + if (pHwState->colorSpace == NVKMS_INPUT_COLORSPACE_BT2100_PQ) { + csc00Matrix = Rec2020RGBToLMS; } else { - matrix = Rec709RGBToLMS; + csc00Matrix = Rec709RGBToLMS; } - lutData |= DRF_DEF(C57E, _SET_CSC0LUT_CONTROL, _INTERPOLATE, _ENABLE) | - DRF_DEF(C57E, _SET_CSC0LUT_CONTROL, _MIRROR, _DISABLE) | - DRF_DEF(C57E, _SET_CSC0LUT_CONTROL, _ENABLE, _ENABLE); + /* Linear LMS FP16 -> PQ encoded L'M'S' fixed-point */ + lutData = DRF_DEF(C57E, _SET_CSC0LUT_CONTROL, _INTERPOLATE, _ENABLE) | + DRF_DEF(C57E, _SET_CSC0LUT_CONTROL, _MIRROR, _DISABLE) | + DRF_DEF(C57E, _SET_CSC0LUT_CONTROL, _ENABLE, _ENABLE); - csc01Data |= DRF_DEF(C57E, _SET_CSC01CONTROL, _ENABLE, _ENABLE); + /* PQ encoded L'M'S' fixed-point -> ICtCp */ + csc01Matrix = LMSToICtCp; } else { - matrix = NVKMS_IDENTITY_CSC_MATRIX; + csc00Matrix = NVKMS_IDENTITY_CSC_MATRIX; - lutData |= DRF_DEF(C57E, _SET_CSC0LUT_CONTROL, _INTERPOLATE, _DISABLE) | - DRF_DEF(C57E, _SET_CSC0LUT_CONTROL, _MIRROR, _DISABLE) | - DRF_DEF(C57E, _SET_CSC0LUT_CONTROL, _ENABLE, _DISABLE); + lutData = DRF_DEF(C57E, _SET_CSC0LUT_CONTROL, _INTERPOLATE, _DISABLE) | + DRF_DEF(C57E, _SET_CSC0LUT_CONTROL, _MIRROR, _DISABLE) | + DRF_DEF(C57E, _SET_CSC0LUT_CONTROL, _ENABLE, _DISABLE); - csc01Data |= DRF_DEF(C57E, _SET_CSC01CONTROL, _ENABLE, _DISABLE); + csc01Matrix = NVKMS_IDENTITY_CSC_MATRIX; } - /* Linear RGB FP16 -> Linear LMS FP16 */ - SetCsc00MatrixC5(pChannel, &matrix); + if (pHwState->csc00Override.enabled) { + csc00Matrix = pHwState->csc00Override.matrix; + } + + if (pHwState->csc01Override.enabled) { + csc01Matrix = pHwState->csc01Override.matrix; + } + + /* CSC0LUT must be enabled if CSC01 or CSC10 is in use. */ + if ((pHwState->csc01Override.enabled && + !nvIsCscMatrixIdentity(&pHwState->csc01Override.matrix)) || + (pHwState->csc10Override.enabled && + !nvIsCscMatrixIdentity(&pHwState->csc10Override.matrix))) { + + lutData = DRF_DEF(C57E, _SET_CSC0LUT_CONTROL, _INTERPOLATE, _ENABLE) | + DRF_DEF(C57E, _SET_CSC0LUT_CONTROL, _MIRROR, _DISABLE) | + DRF_DEF(C57E, _SET_CSC0LUT_CONTROL, _ENABLE, _ENABLE); + } + + SetCsc00MatrixC5(pChannel, &csc00Matrix); - /* Linear LMS FP16 -> PQ encoded L'M'S' fixed-point */ nvDmaSetStartEvoMethod(pChannel, NVC57E_SET_CSC0LUT_CONTROL, 1); nvDmaSetEvoMethodData(pChannel, lutData); - /* - * PQ encoded L'M'S' fixed-point -> ICtCp - * - * Note that we're converting between fixed colorspaces, so the default HW - * coefficients are sufficient. - */ - nvDmaSetStartEvoMethod(pChannel, NVC57E_SET_CSC01CONTROL, 1); - nvDmaSetEvoMethodData(pChannel, csc01Data); + SetCsc01MatrixC5(pChannel, &csc01Matrix); } static inline float64_t maxF(float64_t a, float64_t b) @@ -680,10 +719,10 @@ static NvU16 TmoLutEntry(NvU32 i, } static void InitializeTmoLut(const NVEvoChannelPtr pChannel, - NVLutSurfaceEvoPtr pLutSurfaceEvo, + NVSurfaceEvoPtr pLutSurfaceEvo, NvU32 sd) { - NVEvoLutDataRec *pData = pLutSurfaceEvo->subDeviceAddress[sd]; + NVEvoLutDataRec *pData = pLutSurfaceEvo->cpuAddress[sd]; NvU64 vssHead = 0; NvU32 lutEntryCounter = 0, i; @@ -744,6 +783,11 @@ static NvBool UpdateTmoParams(NVEvoChannelPtr pChannel, NvU16 sd; NvBool dirty = FALSE; + if (pChannel->tmoParams.clientSpecified) { + pChannel->tmoParams.clientSpecified = FALSE; + dirty = TRUE; + } + if (pChannel->tmoParams.enabled != enabled) { pChannel->tmoParams.enabled = enabled; dirty = TRUE; @@ -788,56 +832,62 @@ static void ConfigureTmoLut(NVDevEvoPtr pDevEvo, NvU16 sd; const NvU32 win = NV_EVO_CHANNEL_MASK_WINDOW_NUMBER(pChannel->channelMask); const NvU32 head = pDevEvo->headForWindow[win]; - const NvU32 offset = offsetof(NVEvoLutDataRec, base); - const struct TmoLutSettings *tmoLutSettings; - const NvU32 srcMaxLum = nvGetHDRSrcMaxLum(pHwState); + NvU32 offset = offsetof(NVEvoLutDataRec, base); + NvU32 lutSize = NV_LUT_VSS_HEADER_SIZE + TMO_LUT_NUM_ENTRIES + 1; + const struct TmoLutSettings *tmoLutSettings = &TMO_LUT_SETTINGS_NO_CORRECTION; + NvBool enableLut = FALSE; + + if (pHwState->tmoLut.fromOverride) { + enableLut = (pHwState->tmoLut.pLutSurfaceEvo != NULL); + pChannel->tmoParams.clientSpecified = TRUE; + offset = pHwState->tmoLut.offset; + lutSize = NV_LUT_VSS_HEADER_SIZE + pHwState->tmoLut.lutEntries; + } else { + NvBool needsTmoLut = FALSE; + const NvU32 srcMaxLum = nvGetHDRSrcMaxLum(pHwState); + NvU32 targetMaxLums[NVKMS_MAX_SUBDEVICES] = {0}; + for (sd = 0; sd < pDevEvo->numSubDevices; sd++) { + const NVDispHeadStateEvoRec *pHeadState = + &pDevEvo->pDispEvo[sd]->headState[head]; - NvBool needsTmoLut = FALSE; - NvU32 targetMaxLums[NVKMS_MAX_SUBDEVICES] = {0}; - for (sd = 0; sd < pDevEvo->numSubDevices; sd++) { - const NVDispHeadStateEvoRec *pHeadState = - &pDevEvo->pDispEvo[sd]->headState[head]; + targetMaxLums[sd] = pHeadState->hdrInfoFrame.staticMetadata.maxCLL; - targetMaxLums[sd] = pHeadState->hdrInfoFrame.staticMetadata.maxCLL; + // If any head needs tone mapping, enable TMO for channel + if (nvNeedsTmoLut(pDevEvo, pChannel, pHwState, + srcMaxLum, targetMaxLums[sd])) { + needsTmoLut = TRUE; + } + } - // If any head needs tone mapping, enable TMO for channel - if (nvNeedsTmoLut(pDevEvo, pChannel, pHwState, - srcMaxLum, targetMaxLums[sd])) { - needsTmoLut = TRUE; + if (!UpdateTmoParams(pChannel, needsTmoLut, srcMaxLum, targetMaxLums)) { + // No change in parameters, no need to reconfigure. + return; } - } + enableLut = pChannel->tmoParams.enabled; - if (!UpdateTmoParams(pChannel, needsTmoLut, srcMaxLum, targetMaxLums)) { - // No change in parameters, no need to reconfigure. - return; + if (enableLut) { + // Initialize TMO LUT on all subdevices + for (sd = 0; sd < pDevEvo->numSubDevices; sd++) { + nvAssert(pHwState->tmoLut.pLutSurfaceEvo != NULL); + InitializeTmoLut(pChannel, pHwState->tmoLut.pLutSurfaceEvo, sd); + } + } } - if (!pChannel->tmoParams.enabled) { + if (!enableLut) { pDevEvo->hal->SetTmoLutSurfaceAddress(pDevEvo, pChannel, NULL /* pSurfaceDesc */, 0 /* offset */); return; } - // Initialize TMO LUT on all subdevices - for (sd = 0; sd < pDevEvo->numSubDevices; sd++) { - nvAssert(pHwState->tmoLut.pLutSurfaceEvo != NULL); - InitializeTmoLut(pChannel, pHwState->tmoLut.pLutSurfaceEvo, sd); - } - - // Program TMO LUT - - // XXX HDR TODO: Support other transfer functions - tmoLutSettings = &TMO_LUT_SETTINGS_REC2020; - nvDmaSetStartEvoMethod(pChannel, NVC57E_SET_TMO_CONTROL, 1); nvDmaSetEvoMethodData(pChannel, - DRF_NUM(C57E, _SET_TMO_CONTROL, _SIZE, - NV_LUT_VSS_HEADER_SIZE + TMO_LUT_NUM_ENTRIES + 1) | + DRF_NUM(C57E, _SET_TMO_CONTROL, _SIZE, lutSize) | DRF_DEF(C57E, _SET_TMO_CONTROL, _INTERPOLATE, _ENABLE) | DRF_NUM(C57E, _SET_TMO_CONTROL, _SAT_MODE, tmoLutSettings->satMode)); pDevEvo->hal->SetTmoLutSurfaceAddress(pDevEvo, pChannel, - &pHwState->tmoLut.pLutSurfaceEvo->surfaceDesc, offset); + &pHwState->tmoLut.pLutSurfaceEvo->planes[0].surfaceDesc, offset); // Low Intensity @@ -892,17 +942,18 @@ static void ConfigureTmoLut(NVDevEvoPtr pDevEvo, static void ConfigureCsc1C5(NVDevEvoPtr pDevEvo, NVEvoChannelPtr pChannel, + const NVFlipChannelEvoHwState *pHwState, NvBool enable) { NVEvoWindowCaps *pWinCaps = &pDevEvo->gpus[0].capabilities.window[pChannel->instance]; - struct NvKmsCscMatrix matrix = { }; + struct NvKmsCscMatrix csc10Matrix = { }; + struct NvKmsCscMatrix csc11Matrix = { }; NvU32 lutData = 0; - NvU32 csc10Data = 0; const NvU32 win = NV_EVO_CHANNEL_MASK_WINDOW_NUMBER(pChannel->channelMask); const NvU32 head = pDevEvo->headForWindow[win]; - if (!pWinCaps->csc1MatricesPresent || (head == NV_INVALID_HEAD)) { + if (head == NV_INVALID_HEAD) { return; } @@ -919,43 +970,63 @@ static void ConfigureCsc1C5(NVDevEvoPtr pDevEvo, pHeadState = &pDevEvo->pDispEvo[sd]->headState[head]; + /* ICtCp -> PQ encoded L'M'S' fixed-point */ + csc10Matrix = ICtCpToLMS; + + /* PQ encoded L'M'S' fixed-point -> Linear LMS FP16 */ + lutData = DRF_DEF(C57E, _SET_CSC1LUT_CONTROL, _INTERPOLATE, _ENABLE) | + DRF_DEF(C57E, _SET_CSC1LUT_CONTROL, _MIRROR, _DISABLE) | + DRF_DEF(C57E, _SET_CSC1LUT_CONTROL, _ENABLE, _ENABLE); + + /* Linear LMS FP16 -> Linear RGB FP16 */ // If postcomp is PQ, composite in Rec2020 if (pHeadState->tf == NVKMS_OUTPUT_TF_PQ) { - matrix = LMSToRec2020RGB; + csc11Matrix = LMSToRec2020RGB; } else { - matrix = LMSToRec709RGB; + csc11Matrix = LMSToRec709RGB; } + } else { + csc10Matrix = NVKMS_IDENTITY_CSC_MATRIX; - lutData |= DRF_DEF(C57E, _SET_CSC1LUT_CONTROL, _INTERPOLATE, _ENABLE) | - DRF_DEF(C57E, _SET_CSC1LUT_CONTROL, _MIRROR, _DISABLE) | - DRF_DEF(C57E, _SET_CSC1LUT_CONTROL, _ENABLE, _ENABLE); + lutData = DRF_DEF(C57E, _SET_CSC1LUT_CONTROL, _INTERPOLATE, _DISABLE) | + DRF_DEF(C57E, _SET_CSC1LUT_CONTROL, _MIRROR, _DISABLE) | + DRF_DEF(C57E, _SET_CSC1LUT_CONTROL, _ENABLE, _DISABLE); - csc10Data |= DRF_DEF(C57E, _SET_CSC10CONTROL, _ENABLE, _ENABLE); - } else { - matrix = NVKMS_IDENTITY_CSC_MATRIX; + csc11Matrix = pHwState->cscMatrix; + } - lutData |= DRF_DEF(C57E, _SET_CSC1LUT_CONTROL, _INTERPOLATE, _DISABLE) | - DRF_DEF(C57E, _SET_CSC1LUT_CONTROL, _MIRROR, _DISABLE) | - DRF_DEF(C57E, _SET_CSC1LUT_CONTROL, _ENABLE, _DISABLE); + if (pHwState->csc10Override.enabled) { + csc10Matrix = pHwState->csc10Override.matrix; + } - csc10Data |= DRF_DEF(C57E, _SET_CSC10CONTROL, _ENABLE, _DISABLE); + if (pHwState->csc11Override.enabled) { + csc11Matrix = pHwState->csc11Override.matrix; } - /* - * ICtCp -> PQ encoded L'M'S' fixed-point - * - * Note that we're converting between fixed colorspaces, so the default HW - * coefficients are sufficient. - */ - nvDmaSetStartEvoMethod(pChannel, NVC57E_SET_CSC10CONTROL, 1); - nvDmaSetEvoMethodData(pChannel, csc10Data); + nvAssert(pWinCaps->csc10MatrixPresent || + !pWinCaps->csc0MatricesPresent); - /* PQ encoded L'M'S' fixed-point -> Linear LMS FP16 */ - nvDmaSetStartEvoMethod(pChannel, NVC57E_SET_CSC1LUT_CONTROL, 1); - nvDmaSetEvoMethodData(pChannel, lutData); + if (pWinCaps->csc10MatrixPresent) { + nvAssert(pWinCaps->cscLUTsPresent); + + /* CSC1LUT must be enabled if CSC01 or CSC10 is in use. */ + if ((pHwState->csc01Override.enabled && + !nvIsCscMatrixIdentity(&pHwState->csc01Override.matrix)) || + (pHwState->csc10Override.enabled && + !nvIsCscMatrixIdentity(&pHwState->csc10Override.matrix))) { + lutData = DRF_DEF(C57E, _SET_CSC1LUT_CONTROL, _INTERPOLATE, _ENABLE) | + DRF_DEF(C57E, _SET_CSC1LUT_CONTROL, _MIRROR, _DISABLE) | + DRF_DEF(C57E, _SET_CSC1LUT_CONTROL, _ENABLE, _ENABLE); + } + + SetCsc10MatrixC5(pChannel, &csc10Matrix); - /* Linear LMS FP16 -> Linear RGB FP16 */ - SetCsc11MatrixC5(pChannel, &matrix); + nvDmaSetStartEvoMethod(pChannel, NVC57E_SET_CSC1LUT_CONTROL, 1); + nvDmaSetEvoMethodData(pChannel, lutData); + } + + nvAssert(pWinCaps->csc11MatrixPresent); + SetCsc11MatrixC5(pChannel, &csc11Matrix); } static void InitDesktopColorC3(NVDevEvoPtr pDevEvo, NVEvoChannelPtr pChannel) @@ -1100,7 +1171,7 @@ static void EvoSetFMTMatrixC5( void nvEvoInitDefaultLutC5(NVDevEvoPtr pDevEvo) { - NVLutSurfaceEvoPtr pLut = pDevEvo->lut.defaultLut; + NVSurfaceEvoPtr pLut = pDevEvo->lut.defaultLut; NvU16 sd; nvAssert(pLut); @@ -1108,7 +1179,7 @@ void nvEvoInitDefaultLutC5(NVDevEvoPtr pDevEvo) for (sd = 0; sd < pDevEvo->numSubDevices; sd++) { NvU32 lutSize; NvBool isLutModeVss; - NVEvoLutDataRec *pData = pLut->subDeviceAddress[sd]; + NVEvoLutDataRec *pData = pLut->cpuAddress[sd]; EvoSetupIdentityBaseLutC5(pData, &pDevEvo->lut.defaultBaseLUTState[sd], @@ -1520,6 +1591,7 @@ static void EvoSetProcAmpC3(NVDispEvoPtr pDispEvo, const NvU32 head, NVDevEvoPtr pDevEvo = pDispEvo->pDevEvo; NVEvoChannelPtr pChannel = pDevEvo->core; const NVDispHeadStateEvoRec *pHeadState = &pDispEvo->headState[head]; + NvU8 colorSpace; NvU32 dynRange; /* These methods should only apply to a single pDpyEvo */ @@ -1531,10 +1603,17 @@ static void EvoSetProcAmpC3(NVDispEvoPtr pDispEvo, const NvU32 head, ct_assert(NVT_COLORIMETRY_RGB == NVC37D_HEAD_SET_PROCAMP_COLOR_SPACE_RGB); ct_assert(NVT_COLORIMETRY_YUV_601 == NVC37D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_601); ct_assert(NVT_COLORIMETRY_YUV_709 == NVC37D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_709); - /* XXXnvdisplay add REC2020 */ ct_assert(NVT_COLOR_RANGE_FULL == NVC37D_HEAD_SET_PROCAMP_RANGE_COMPRESSION_DISABLE); ct_assert(NVT_COLOR_RANGE_LIMITED == NVC37D_HEAD_SET_PROCAMP_RANGE_COMPRESSION_ENABLE); + if (pHeadState->procAmp.colorimetry == NVT_COLORIMETRY_BT2020RGB) { + colorSpace = NVC37D_HEAD_SET_PROCAMP_COLOR_SPACE_RGB; + } else if (pHeadState->procAmp.colorimetry == NVT_COLORIMETRY_BT2020YCC) { + colorSpace = NVC37D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_2020; + } else { + colorSpace = pHeadState->procAmp.colorimetry; + } + if (pHeadState->procAmp.colorRange == NVT_COLOR_RANGE_FULL) { dynRange = DRF_DEF(C37D, _HEAD_SET_PROCAMP, _DYNAMIC_RANGE, _VESA); } else { @@ -1544,8 +1623,7 @@ static void EvoSetProcAmpC3(NVDispEvoPtr pDispEvo, const NvU32 head, nvDmaSetStartEvoMethod(pChannel, NVC37D_HEAD_SET_PROCAMP(head), 1); nvDmaSetEvoMethodData(pChannel, - DRF_NUM(C37D, _HEAD_SET_PROCAMP, _COLOR_SPACE, - pHeadState->procAmp.colorimetry) | + DRF_NUM(C37D, _HEAD_SET_PROCAMP, _COLOR_SPACE, colorSpace) | DRF_DEF(C37D, _HEAD_SET_PROCAMP, _CHROMA_LPF, _DISABLE) | DRF_NUM(C37D, _HEAD_SET_PROCAMP, _SAT_COS, pHeadState->procAmp.satCos) | @@ -1556,16 +1634,6 @@ static void EvoSetProcAmpC3(NVDispEvoPtr pDispEvo, const NvU32 head, DRF_DEF(C37D, _HEAD_SET_PROCAMP, _BLACK_LEVEL, _GRAPHICS)); } -static const struct NvKmsCscMatrix RGBToFullRangeYCbCrRec709Matrix = {{ - { 0x8000, 0x1f8bbc, 0x1ff444, 0x8000 }, - { 0x366c, 0xb718, 0x127c, 0 }, - { 0x1fe2ac, 0x1f9d54, 0x8000, 0x8000 }, -}}; -static const struct NvKmsCscMatrix RGBToFullRangeYCbCrRec601Matrix = {{ - { 0x8000, 0x1f94d0, 0x1feb30, 0x8000 }, - { 0x4c8c, 0x9644, 0x1d30, 0 }, - { 0x1fd4cc, 0x1fab34, 0x8000, 0x8000 }, -}}; static const struct NvKmsCscMatrix RGBToLimitedRangeYCbCrRec2020Matrix = {{ { 0x7000, 0x1f9900, 0x1ff700, 0x8000 }, { 0x3988, 0x947c, 0xcfc, 0x1000 }, @@ -1601,10 +1669,6 @@ const struct NvKmsCscMatrix* nvEvoGetOCsc1MatrixC5(const NVDispHeadStateEvoRec * case NVT_COLORIMETRY_RGB: // No OCSC1 needed. return NULL; - case NVT_COLORIMETRY_YUV_601: - return &RGBToFullRangeYCbCrRec601Matrix; - case NVT_COLORIMETRY_YUV_709: - return &RGBToFullRangeYCbCrRec709Matrix; default: nvAssert(!"Unexpected colorimetry"); return NULL; @@ -1760,10 +1824,18 @@ static void EvoSetOCsc1C5(NVDispEvoPtr pDispEvo, const NvU32 head) * the final output. Then we multiply by its inverse to convert back * to RGB. Finally, we convert the coefficients to S5.14 fixed point * format. + * + * NOTE: Hue and saturation adjustment would not typically be used with HDR + * (BT2020) output, but is allowed here for the sake of compatibility. + * TODO: Do hue/saturation adjustment in BT2020 with BT2020 output colorimetry. */ -void nvEvo3PickOCsc0(NVDispEvoPtr pDispEvo, const NvU32 head, struct NvKms3x4MatrixF32 *ocsc0MatrixOutput) +void nvEvo3PickOCsc0(const NVDispEvoRec *pDispEvo, const NvU32 head, + struct NvKms3x4MatrixF32 *ocsc0MatrixOutput, NvBool *pOutputRoundingFix) { + const NVDevEvoRec *pDevEvo = pDispEvo->pDevEvo; + const NvU32 dispIdx = pDispEvo->displayOwner; const NVDispHeadStateEvoRec *pHeadState = &pDispEvo->headState[head]; + const NVEvoSubDevHeadStateRec *pSdHeadState = &pDevEvo->gpus[dispIdx].headState[head]; const float32_t zeroF32 = NvU32viewAsF32(NV_FLOAT_ZERO); const float32_t oneF32 = NvU32viewAsF32(NV_FLOAT_ONE); @@ -1786,6 +1858,8 @@ void nvEvo3PickOCsc0(NVDispEvoPtr pDispEvo, const NvU32 head, struct NvKms3x4Mat struct NvKmsMatrixF32 CrYCbtoRGBMatrix; struct NvKmsMatrixF32 RGBtoCrYCbMatrix; + NvBool outputRoundingFix = FALSE; + switch (pHeadState->procAmp.colorimetry) { default: @@ -1794,6 +1868,8 @@ void nvEvo3PickOCsc0(NVDispEvoPtr pDispEvo, const NvU32 head, struct NvKms3x4Mat case NVT_COLORIMETRY_RGB: case NVT_COLORIMETRY_BT2020RGB: /* fallthrough; for RGB output, perform saturation adjustment in YUV709 */ + case NVT_COLORIMETRY_BT2020YCC: + /* fallthrough; for BT2020 YUV output, perform saturation adjustment in YUV709 */ case NVT_COLORIMETRY_YUV_709: CrYCbtoRGBMatrix = NvKmsMatrixToNvKmsMatrixF32(CrYCb709toRGBMatrix); RGBtoCrYCbMatrix = NvKmsMatrixToNvKmsMatrixF32(RGBtoCrYCb709Matrix); @@ -1810,35 +1886,44 @@ void nvEvo3PickOCsc0(NVDispEvoPtr pDispEvo, const NvU32 head, struct NvKms3x4Mat if (nvkms_output_rounding_fix()) { /* - * XXX Only apply WAR for bug 2267663 for linear output TFs. Non-linear + * Only apply WAR for bug 2267663 for linear output TFs. Non-linear * TFs could amplify the 1/2048 factor to the point of being - * perceptible. + * perceptible, so don't apply WAR if the OLUT has been specified. + * + * Custom OLUTs may be non-linear, so unconditionally disable the WAR if + * one is specified. */ - if (pHeadState->tf == NVKMS_OUTPUT_TF_NONE) { + + if ((pHeadState->tf == NVKMS_OUTPUT_TF_NONE) && + (pSdHeadState->outputLut.pLutSurfaceEvo == NULL)) { ocsc0Matrix.m[0][3] = f32_add(ocsc0Matrix.m[0][3], inv2048F32); ocsc0Matrix.m[1][3] = f32_add(ocsc0Matrix.m[1][3], inv2048F32); ocsc0Matrix.m[2][3] = f32_add(ocsc0Matrix.m[2][3], inv2048F32); + + outputRoundingFix = TRUE; } } *ocsc0MatrixOutput = ocsc0Matrix; + *pOutputRoundingFix = outputRoundingFix; } /* * Programs the OCSC0 matrix coefficients, used to perform saturation * adjustment. * - * The OCSC0 matrix will be enabled later in EvoSetLUTContextDmaC5 if + * The OCSC0 matrix will be enabled later in EvoSetOutputLutC5 if * and only if we also enable the OLUT as required by the * specification. */ -static void EvoSetOCsc0C5(NVDispEvoPtr pDispEvo, const NvU32 head) +static void EvoSetOCsc0C5(const NVDispEvoRec *pDispEvo, const NvU32 head, + NvBool *pOutputRoundingFix) { - NVDevEvoPtr pDevEvo = pDispEvo->pDevEvo; + const NVDevEvoRec *pDevEvo = pDispEvo->pDevEvo; NVEvoChannelPtr pChannel = pDevEvo->core; struct NvKms3x4MatrixF32 ocsc0Matrix; - nvEvo3PickOCsc0(pDispEvo, head, &ocsc0Matrix); + nvEvo3PickOCsc0(pDispEvo, head, &ocsc0Matrix, pOutputRoundingFix); nvDmaSetStartEvoMethod(pChannel, NVC57D_HEAD_SET_OCSC0COEFFICIENT_C00(head), 12); nvDmaSetEvoMethodData(pChannel, DRF_NUM(C57D, _HEAD_SET_OCSC0COEFFICIENT_C00, _VALUE, nvCscCoefConvertS514(ocsc0Matrix.m[0][0]))); @@ -1865,6 +1950,7 @@ static void EvoSetProcAmpC5(NVDispEvoPtr pDispEvo, const NvU32 head, const NVDispHeadStateEvoRec *pHeadState = &pDispEvo->headState[head]; NvU32 dynRange, chromaLpf, chromaDownV; NvU32 colorimetry; + NvBool outputRoundingFix; NVT_COLORIMETRY nvtColorimetry = pHeadState->procAmp.colorimetry; NVT_COLOR_RANGE nvtColorRange = pHeadState->procAmp.colorRange; @@ -1918,7 +2004,7 @@ static void EvoSetProcAmpC5(NVDispEvoPtr pDispEvo, const NvU32 head, nvDmaSetEvoMethodData(pChannel, colorimetry | dynRange | chromaLpf | chromaDownV); - EvoSetOCsc0C5(pDispEvo, head); + EvoSetOCsc0C5(pDispEvo, head, &outputRoundingFix); EvoSetOCsc1C5(pDispEvo, head); } @@ -3421,6 +3507,26 @@ static void SetCsc00MatrixC5(NVEvoChannelPtr pChannel, DRF_DEF(C57E, _SET_CSC00CONTROL, _ENABLE, _DISABLE)); } +static void SetCsc01MatrixC5(NVEvoChannelPtr pChannel, + const struct NvKmsCscMatrix *matrix) +{ + SetCscMatrixC5Wrapper(pChannel, + matrix, + NVC57E_SET_CSC01COEFFICIENT_C00, NVC57E_SET_CSC01CONTROL, + DRF_DEF(C57E, _SET_CSC01CONTROL, _ENABLE, _ENABLE), + DRF_DEF(C57E, _SET_CSC01CONTROL, _ENABLE, _DISABLE)); +} + +static void SetCsc10MatrixC5(NVEvoChannelPtr pChannel, + const struct NvKmsCscMatrix *matrix) +{ + SetCscMatrixC5Wrapper(pChannel, + matrix, + NVC57E_SET_CSC10COEFFICIENT_C00, NVC57E_SET_CSC10CONTROL, + DRF_DEF(C57E, _SET_CSC10CONTROL, _ENABLE, _ENABLE), + DRF_DEF(C57E, _SET_CSC10CONTROL, _ENABLE, _DISABLE)); +} + static void SetCsc11MatrixC5(NVEvoChannelPtr pChannel, const struct NvKmsCscMatrix *matrix) { @@ -4136,8 +4242,7 @@ static NvU32 nvHwFormatFromKmsFormatC5( * * Return 0 in the case of an unrecognized NvKmsSurfaceMemoryFormat. */ -static NvU32 nvHwFormatFromKmsFormatC6( - const enum NvKmsSurfaceMemoryFormat format) +NvU32 nvHwFormatFromKmsFormatC6(const enum NvKmsSurfaceMemoryFormat format) { switch (format) { case NvKmsSurfaceMemoryFormatY8___U8___V8_N444: @@ -4186,9 +4291,12 @@ static NvU32 nvHwFormatFromKmsFormatC6( } static -NVLutSurfaceEvoPtr EvoGetLutSurface3(NVDevEvoPtr pDevEvo, - NVEvoChannelPtr pChannel, - const NVFlipChannelEvoHwState *pHwState) +NVSurfaceEvoPtr EvoGetLutSurface3(NVDevEvoPtr pDevEvo, + NVEvoChannelPtr pChannel, + const NVFlipChannelEvoHwState *pHwState, + NvU32 *lutSize, + NvU64 *offset, + NvBool *isLutModeVss) { NvU32 win = NV_EVO_CHANNEL_MASK_WINDOW_NUMBER(pChannel->channelMask); NvU32 head = pDevEvo->headForWindow[win]; @@ -4203,6 +4311,10 @@ NVLutSurfaceEvoPtr EvoGetLutSurface3(NVDevEvoPtr pDevEvo, /* Input Lut is explicitly enabled by client */ if (pHwState->inputLut.pLutSurfaceEvo != NULL) { + *lutSize = pHwState->inputLut.lutEntries + NV_LUT_VSS_HEADER_SIZE; + *offset = pHwState->inputLut.offset; + *isLutModeVss = (pHwState->inputLut.vssSegments > 0); + return pHwState->inputLut.pLutSurfaceEvo; } @@ -4253,8 +4365,17 @@ EvoFlipC3(NVDevEvoPtr pDevEvo, { NvBool enableCSC, swapUV, flip3Return; enum NvKmsSurfaceMemoryFormat format; - NVLutSurfaceEvoPtr pLutSurfaceEvo = - EvoGetLutSurface3(pDevEvo, pChannel, pHwState); + /* + * lutSize and isLutModeVss are unused, since we only support 1025 and + * non-VSS on Volta, but we declare them to pass to EvoGetLutSurface3. + * + * TODO: Maybe validate the resulting values? + */ + NvU32 lutSize = NV_NUM_EVO_LUT_ENTRIES; + NvU64 offset = offsetof(NVEvoLutDataRec, base); + NvBool isLutModeVss = FALSE; + NVSurfaceEvoPtr pLutSurfaceEvo = EvoGetLutSurface3(pDevEvo, pChannel, pHwState, + &lutSize, &offset, &isLutModeVss); NvU32 win = NV_EVO_CHANNEL_MASK_WINDOW_NUMBER(pChannel->channelMask); NvU32 head = pDevEvo->headForWindow[win]; @@ -4286,8 +4407,7 @@ EvoFlipC3(NVDevEvoPtr pDevEvo, DRF_DEF(C37E, _SET_PARAMS, _UNDERREPLICATE, _DISABLE)); if (pLutSurfaceEvo) { - const NvU32 ctxDma = pLutSurfaceEvo->surfaceDesc.ctxDmaHandle; - const NvU32 origin = offsetof(NVEvoLutDataRec, base); + const NvU32 ctxDma = pLutSurfaceEvo->planes[0].surfaceDesc.ctxDmaHandle; nvDmaSetStartEvoMethod(pChannel, NVC37E_SET_CONTROL_INPUT_LUT, 1); nvDmaSetEvoMethodData(pChannel, @@ -4297,7 +4417,7 @@ EvoFlipC3(NVDevEvoPtr pDevEvo, nvDmaSetStartEvoMethod(pChannel, NVC37E_SET_OFFSET_INPUT_LUT, 1); nvDmaSetEvoMethodData(pChannel, - DRF_NUM(C37E, _SET_OFFSET_INPUT_LUT, _ORIGIN, origin)); + DRF_NUM(C37E, _SET_OFFSET_INPUT_LUT, _ORIGIN, offset)); nvDmaSetStartEvoMethod(pChannel, NVC37E_SET_CONTEXT_DMA_INPUT_LUT, 1); nvDmaSetEvoMethodData(pChannel, @@ -4420,7 +4540,8 @@ EvoFlipC5Common(NVDevEvoPtr pDevEvo, NvBool swapUV; NvU32 hTaps, vTaps; NvBool scaling = FALSE; - NVLutSurfaceEvoPtr pLutSurfaceEvo = NULL; + NVSurfaceEvoPtr pLutSurfaceEvo = NULL; + NvU64 lutOffset = offsetof(NVEvoLutDataRec, base); NvU32 lutSize = NV_NUM_EVO_LUT_ENTRIES; NvBool isLutModeVss = FALSE; @@ -4433,8 +4554,10 @@ EvoFlipC5Common(NVDevEvoPtr pDevEvo, // XXX HDR TODO: Handle other colorspaces // XXX HDR TODO: Enable custom input LUTs with HDR - if (pHwState->colorSpace != NVKMS_INPUT_COLORSPACE_BT2100_PQ) { - pLutSurfaceEvo = EvoGetLutSurface3(pDevEvo, pChannel, pHwState); + if (pHwState->inputLut.fromOverride || + (pHwState->colorSpace != NVKMS_INPUT_COLORSPACE_BT2100_PQ)) { + pLutSurfaceEvo = EvoGetLutSurface3(pDevEvo, pChannel, pHwState, + &lutSize, &lutOffset, &isLutModeVss); } if (!EvoFlipC3Common(pDevEvo, pChannel, pHwState, updateState, head)) { @@ -4488,13 +4611,11 @@ EvoFlipC5Common(NVDevEvoPtr pDevEvo, nvNeedsTmoLut(pDevEvo, pChannel, pHwState, nvGetHDRSrcMaxLum(pHwState), pHeadState->hdrInfoFrame.staticMetadata.maxCLL)) { - ConfigureCsc0C5(pDevEvo, pChannel, pHwState->colorSpace, TRUE); - ConfigureCsc1C5(pDevEvo, pChannel, TRUE); + ConfigureCsc0C5(pDevEvo, pChannel, pHwState, TRUE); + ConfigureCsc1C5(pDevEvo, pChannel, pHwState, TRUE); } else { - ConfigureCsc0C5(pDevEvo, pChannel, pHwState->colorSpace, FALSE); - ConfigureCsc1C5(pDevEvo, pChannel, FALSE); - - SetCsc11MatrixC5(pChannel, &pHwState->cscMatrix); + ConfigureCsc0C5(pDevEvo, pChannel, pHwState, FALSE); + ConfigureCsc1C5(pDevEvo, pChannel, pHwState, FALSE); } // In nvdisplay 3, an ILUT is required to convert the input surface to FP16, @@ -4508,7 +4629,7 @@ EvoFlipC5Common(NVDevEvoPtr pDevEvo, NVEvoLutDataRec *pData = NULL; pLutSurfaceEvo = pDevEvo->lut.defaultLut; - pData = pLutSurfaceEvo->subDeviceAddress[sd]; + pData = pLutSurfaceEvo->cpuAddress[sd]; nvAssert(pData); @@ -4533,8 +4654,6 @@ EvoFlipC5Common(NVDevEvoPtr pDevEvo, } if (pLutSurfaceEvo) { - const NvU32 origin = offsetof(NVEvoLutDataRec, base); - nvDmaSetStartEvoMethod(pChannel, NVC57E_SET_ILUT_CONTROL, 1); nvDmaSetEvoMethodData(pChannel, (isLutModeVss ? DRF_DEF(C57E, _SET_ILUT_CONTROL, _INTERPOLATE, _ENABLE) : @@ -4545,7 +4664,7 @@ EvoFlipC5Common(NVDevEvoPtr pDevEvo, DRF_NUM(C57E, _SET_ILUT_CONTROL, _SIZE, lutSize)); pDevEvo->hal->SetILUTSurfaceAddress(pDevEvo, pChannel, - &pLutSurfaceEvo->surfaceDesc, origin); + &pLutSurfaceEvo->planes[0].surfaceDesc, lutOffset); } else { pDevEvo->hal->SetILUTSurfaceAddress(pDevEvo, pChannel, NULL /* pSurfaceDesc */, 0 /* offset */); @@ -5048,89 +5167,22 @@ nvEvoFillLUTSurfaceC5(NVEvoLutEntryRec *pLUTBuffer, } } -static void EvoSetLUTContextDma3(NVDevEvoPtr pDevEvo, - const int head, - NVLutSurfaceEvoPtr pLutSurfEvo, - NvBool enableBaseLut, - NVEvoUpdateState *updateState, - NvBool bypassComposition) +static void EvoSetOutputLutC3(NVDevEvoPtr pDevEvo, + NvU32 sd, + NvU32 head, + const NVFlipLutHwState *pOutputLut, + NvU32 fpNormScale, + NVEvoUpdateState *updateState, + NvBool bypassComposition) { NVEvoChannelPtr pChannel = pDevEvo->core; - NvU32 sd; - - /* These methods should only apply to a single pDpy */ - nvAssert(pDevEvo->subDevMaskStackDepth > 0); + NvBool enableLut = (pOutputLut->pLutSurfaceEvo != NULL); + NvU64 offset = enableLut ? pOutputLut->offset : offsetof(NVEvoLutDataRec, output); + NvU32 ctxdma = enableLut ? + pOutputLut->pLutSurfaceEvo->planes[0].surfaceDesc.ctxDmaHandle : 0; nvUpdateUpdateState(pDevEvo, updateState, pChannel); - /* - * For Window semaphores and Notifiers, the general rule of thumb is that - * the current semaphore/notifier will be released if the address for the - * semaphore/notifier changes (via context DMA change or offset change). - * This allows SW to push updates in the window channel that change other - * methods, but do not cause the semaphore or notifier to be released. This - * make it possible to reprogram the window channel with new input Lut - * without releasing semaphore. - * - * Note that higher-level code will use core channel notifiers to - * synchronize these LUT updates, but that's okay because nvEvoUpdateC3() - * will interlock the core and window channel(s) updates together. - */ - for (sd = 0; sd < pDevEvo->numSubDevices; sd++) { - if (nvPeekEvoSubDevMask(pDevEvo) & (1 << sd)) { - NVEvoChannelPtr pChannel = pDevEvo->window[head << 1]; - NVEvoSubDevHeadStateRec *pSdHeadState = - &pDevEvo->gpus[sd].headState[head]; - NVFlipChannelEvoHwState *pMainFlipState = - &pSdHeadState->layer[NVKMS_MAIN_LAYER]; - NVLutSurfaceEvoPtr pInputLutSurfEvo = enableBaseLut ? - pLutSurfEvo : NULL; - - if (pMainFlipState->inputLut.pLutSurfaceEvo == pInputLutSurfEvo) { - continue; - } - - pMainFlipState->inputLut.pLutSurfaceEvo = pInputLutSurfEvo; - /* It is not allowed to change the input LUT on immediate flips. */ - pMainFlipState->tearing = FALSE; - - nvPushEvoSubDevMask(pDevEvo, NVBIT(sd)); - - pDevEvo->hal->Flip(pDevEvo, pChannel, pMainFlipState, updateState, - bypassComposition); - - nvPopEvoSubDevMask(pDevEvo); - } - } -} - -static void EvoSetLUTContextDmaC3(const NVDispEvoRec *pDispEvo, - const int head, - NVLutSurfaceEvoPtr pLutSurfEvo, - NvBool enableBaseLut, - NvBool enableOutputLut, - NVEvoUpdateState *updateState, - NvBool bypassComposition) -{ - NvU32 ctxdma = (pLutSurfEvo != NULL) ? pLutSurfEvo->surfaceDesc.ctxDmaHandle : 0; - NVDevEvoPtr pDevEvo = pDispEvo->pDevEvo; - NVEvoChannelPtr pChannel = pDevEvo->core; - NvU64 offset; - - nvAssert(ctxdma || (!enableBaseLut && !enableOutputLut)); - - nvPushEvoSubDevMaskDisp(pDispEvo); - - EvoSetLUTContextDma3(pDevEvo, - head, - pLutSurfEvo, - enableBaseLut, - updateState, - bypassComposition); - - /* Program the output LUT */ - - offset = offsetof(NVEvoLutDataRec, output); nvAssert((offset & 0xff) == 0); nvDmaSetStartEvoMethod(pChannel, NVC37D_HEAD_SET_CONTROL_OUTPUT_LUT(head), 1); @@ -5145,15 +5197,13 @@ static void EvoSetLUTContextDmaC3(const NVDispEvoRec *pDispEvo, /* Set the ctxdma for the output LUT */ - if (!enableOutputLut) { + if (!enableLut) { /* Class C37D has no separate enable flag. */ ctxdma = 0; } nvDmaSetStartEvoMethod(pChannel, NVC37D_HEAD_SET_CONTEXT_DMA_OUTPUT_LUT(head), 1); nvDmaSetEvoMethodData(pChannel, DRF_NUM(C37D, _HEAD_SET_CONTEXT_DMA_OUTPUT_LUT, _HANDLE, ctxdma)); - - nvPopEvoSubDevMask(pDevEvo); } static void EvoSetupPQOetfOutputLutC5(NVEvoLutDataRec *pData, @@ -5240,8 +5290,8 @@ static void SetupHDROutputLUT(NVDevEvoPtr pDevEvo, NvU32 *lutSize, NvBool *isLutModeVss) { - NVLutSurfaceEvoPtr pLut = pDevEvo->lut.defaultLut; - NVEvoLutDataRec *pData = pLut->subDeviceAddress[sd]; + NVSurfaceEvoPtr pLut = pDevEvo->lut.defaultLut; + NVEvoLutDataRec *pData = pLut->cpuAddress[sd]; // XXX HDR TODO: Support other transfer functions nvAssert(pHeadState->tf == NVKMS_OUTPUT_TF_PQ); @@ -5251,27 +5301,17 @@ static void SetupHDROutputLUT(NVDevEvoPtr pDevEvo, void nvSetupOutputLUT5(NVDevEvoPtr pDevEvo, const NVDispHeadStateEvoRec *pHeadState, - const int head, - NVLutSurfaceEvoPtr pLutSurfEvo, - NvBool enableBaseLut, NvBool enableOutputLut, - NVEvoUpdateState *updateState, NvBool bypassComposition, NVSurfaceDescriptor **pSurfaceDesc, NvU32 *lutSize, + NvU64 *offset, NvBool *disableOcsc0, NvU32 *fpNormScale, NvBool *isLutModeVss) { NvU32 sd; - EvoSetLUTContextDma3(pDevEvo, - head, - pLutSurfEvo, - enableBaseLut, - updateState, - bypassComposition); - /* Set the ctxdma for the output LUT */ if (bypassComposition) { @@ -5281,7 +5321,8 @@ void nvSetupOutputLUT5(NVDevEvoPtr pDevEvo, *disableOcsc0 = TRUE; } else if (!enableOutputLut) { /* Use the default OLUT if the client didn't provide one */ - *pSurfaceDesc = &pDevEvo->lut.defaultLut->surfaceDesc; + *pSurfaceDesc = &pDevEvo->lut.defaultLut->planes[0].surfaceDesc; + *offset = offsetof(NVEvoLutDataRec, output); // Setup default OLUT for (sd = 0; sd < pDevEvo->numSubDevices; sd++) { @@ -5297,10 +5338,10 @@ void nvSetupOutputLUT5(NVDevEvoPtr pDevEvo, * Scale from [0.0, 125.0] to [0.0, 1.0] * XXX HDR TODO: Assumes input is in this range, SDR is not. */ - *fpNormScale = 0xFFFFFFFF / 125; + *fpNormScale = NVKMS_OLUT_FP_NORM_SCALE_DEFAULT / 125; } else { - NVLutSurfaceEvoPtr pLut = pDevEvo->lut.defaultLut; - NVEvoLutDataRec *pData = pLut->subDeviceAddress[sd]; + NVSurfaceEvoPtr pLut = pDevEvo->lut.defaultLut; + NVEvoLutDataRec *pData = pLut->cpuAddress[sd]; EvoSetupIdentityOutputLutC5( pData, @@ -5328,45 +5369,43 @@ static void SetOLUTSurfaceAddress( DRF_NUM(C57D, _HEAD_SET_OFFSET_OLUT, _ORIGIN, offset >> 8)); } -static void EvoSetLUTContextDmaC5(const NVDispEvoRec *pDispEvo, - const int head, - NVLutSurfaceEvoPtr pLutSurfEvo, - NvBool enableBaseLut, - NvBool enableOutputLut, - NVEvoUpdateState *updateState, - NvBool bypassComposition) +static void EvoSetOutputLutC5(NVDevEvoPtr pDevEvo, + NvU32 sd, + NvU32 head, + const NVFlipLutHwState *pOutputLut, + NvU32 fpNormScale, + NVEvoUpdateState *updateState, + NvBool bypassComposition) { - NVSurfaceDescriptor *pSurfaceDesc = - (pLutSurfEvo != NULL) ? &pLutSurfEvo->surfaceDesc : NULL; - NVDevEvoPtr pDevEvo = pDispEvo->pDevEvo; + const NVDispEvoRec *pDispEvo = pDevEvo->pDispEvo[sd]; NVEvoChannelPtr pChannel = pDevEvo->core; - NvU64 offset; - NvU32 lutSize = NV_NUM_EVO_LUT_ENTRIES; - NvBool isLutModeVss = FALSE; + NvBool enableOutputLut = (pOutputLut->pLutSurfaceEvo != NULL); + NVSurfaceEvoPtr pLutSurfEvo = pOutputLut->pLutSurfaceEvo; + NVSurfaceDescriptor *pSurfaceDesc = + enableOutputLut ? &pLutSurfEvo->planes[0].surfaceDesc : NULL; + NvU64 offset = enableOutputLut ? pOutputLut->offset : offsetof(NVEvoLutDataRec, output); + NvBool isLutModeVss = enableOutputLut ? (pOutputLut->vssSegments != 0) : FALSE; + NvU32 lutSize = enableOutputLut ? pOutputLut->lutEntries : NV_NUM_EVO_LUT_ENTRIES; const NVDispHeadStateEvoRec *pHeadState = &pDispEvo->headState[head]; NvBool disableOcsc0 = FALSE; - NvU32 fpNormScale = 0xFFFFFFFF; + NvBool outputRoundingFix = nvkms_output_rounding_fix(); + + nvUpdateUpdateState(pDevEvo, updateState, pChannel); // XXX HDR TODO: Enable custom output LUTs with HDR // XXX HDR TODO: Support other transfer functions - if (pHeadState->tf == NVKMS_OUTPUT_TF_PQ) { + if (!pOutputLut->fromOverride && + (pHeadState->tf == NVKMS_OUTPUT_TF_PQ)) { enableOutputLut = FALSE; } - nvAssert(pSurfaceDesc || (!enableBaseLut && !enableOutputLut)); - - nvPushEvoSubDevMaskDisp(pDispEvo); - nvSetupOutputLUT5(pDevEvo, pHeadState, - head, - pLutSurfEvo, - enableBaseLut, enableOutputLut, - updateState, bypassComposition, &pSurfaceDesc, &lutSize, + &offset, &disableOcsc0, &fpNormScale, &isLutModeVss); @@ -5374,23 +5413,25 @@ static void EvoSetLUTContextDmaC5(const NVDispEvoRec *pDispEvo, if (disableOcsc0) { nvDmaSetStartEvoMethod(pChannel, NVC57D_HEAD_SET_OCSC0CONTROL(head), 1); nvDmaSetEvoMethodData(pChannel, DRF_DEF(C57D, _HEAD_SET_OCSC0CONTROL, _ENABLE, _DISABLE)); + + outputRoundingFix = FALSE; + } else { + /* Update status of output rounding fix. */ + EvoSetOCsc0C5(pDispEvo, head, &outputRoundingFix); } /* Program the output LUT */ - - offset = offsetof(NVEvoLutDataRec, output); nvAssert((offset & 0xff) == 0); nvDmaSetStartEvoMethod(pChannel, NVC57D_HEAD_SET_OLUT_CONTROL(head), 1); nvDmaSetEvoMethodData(pChannel, - ((isLutModeVss || !nvkms_output_rounding_fix()) ? + ((isLutModeVss || !outputRoundingFix) ? DRF_DEF(C57D, _HEAD_SET_OLUT_CONTROL, _INTERPOLATE, _ENABLE) : DRF_DEF(C57D, _HEAD_SET_OLUT_CONTROL, _INTERPOLATE, _DISABLE)) | DRF_DEF(C57D, _HEAD_SET_OLUT_CONTROL, _MIRROR, _DISABLE) | (isLutModeVss ? DRF_DEF(C57D, _HEAD_SET_OLUT_CONTROL, _MODE, _SEGMENTED) : DRF_DEF(C57D, _HEAD_SET_OLUT_CONTROL, _MODE, _DIRECT10)) | - DRF_NUM(C57D, _HEAD_SET_OLUT_CONTROL, _SIZE, NV_LUT_VSS_HEADER_SIZE + - lutSize)); + DRF_NUM(C57D, _HEAD_SET_OLUT_CONTROL, _SIZE, NV_LUT_VSS_HEADER_SIZE + lutSize)); SetOLUTSurfaceAddress(pChannel, pSurfaceDesc, offset, head); @@ -5402,14 +5443,6 @@ static void EvoSetLUTContextDmaC5(const NVDispEvoRec *pDispEvo, nvDmaSetStartEvoMethod(pChannel, NVC57D_HEAD_SET_OCSC0CONTROL(head), 1); nvDmaSetEvoMethodData(pChannel, DRF_DEF(C57D, _HEAD_SET_OCSC0CONTROL, _ENABLE, _ENABLE)); } - - nvPopEvoSubDevMask(pDevEvo); -} - -static inline NvU32 ReadCapReg(volatile const NvU32 *pCaps, NvU32 offset) -{ - /* Offsets are in bytes, but the array has dword-sized elements. */ - return pCaps[offset / sizeof(NvU32)]; } static NvBool QueryStereoPinC3(NVDevEvoPtr pDevEvo, @@ -5443,8 +5476,8 @@ static void EvoParseCapabilityNotifier3(NVDevEvoPtr pDevEvo, volatile const NvU32 *pCaps) { NVEvoCapabilitiesPtr pEvoCaps = &pEvoSubDev->capabilities; - const NvU32 sysCap = ReadCapReg(pCaps, NVC373_SYS_CAP); - const NvU32 sysCapB = ReadCapReg(pCaps, NVC373_SYS_CAPB); + const NvU32 sysCap = nvEvoReadCapReg3(pCaps, NVC373_SYS_CAP); + const NvU32 sysCapB = nvEvoReadCapReg3(pCaps, NVC373_SYS_CAPB); NvU32 i, stereoPin; NvU32 layer; @@ -5547,7 +5580,7 @@ static void EvoParseCapabilityNotifier3(NVDevEvoPtr pDevEvo, if (pHeadCaps->usable) { pHeadCaps->maxPClkKHz = DRF_VAL(C373, _HEAD_CLK_CAP, _PCLK_MAX, - ReadCapReg(pCaps, NVC373_HEAD_CLK_CAP(i))) * 10000; + nvEvoReadCapReg3(pCaps, NVC373_HEAD_CLK_CAP(i))) * 10000; } } @@ -5562,7 +5595,7 @@ static void EvoParseCapabilityNotifier3(NVDevEvoPtr pDevEvo, /* XXXnvdisplay: add SOR caps: max DP clk, ... */ if (sorUsable) { - const NvU32 sorCap = ReadCapReg(pCaps, NVC373_SOR_CAP(i)); + const NvU32 sorCap = nvEvoReadCapReg3(pCaps, NVC373_SOR_CAP(i)); pSorCaps->dualTMDS = FLD_TEST_DRF(C373, _SOR_CAP, _DUAL_TMDS, _TRUE, sorCap); @@ -5581,7 +5614,7 @@ static void EvoParseCapabilityNotifier3(NVDevEvoPtr pDevEvo, pSorCaps->maxTMDSClkKHz = DRF_VAL(C373, _SOR_CLK_CAP, _TMDS_MAX, - ReadCapReg(pCaps, NVC373_SOR_CLK_CAP(i))) * 10000; + nvEvoReadCapReg3(pCaps, NVC373_SOR_CLK_CAP(i))) * 10000; } } @@ -5620,7 +5653,7 @@ static void EvoParseCapabilityNotifierC3(NVDevEvoPtr pDevEvo, pScalerCaps->present = FLD_TEST_DRF(C373, _HEAD_CAPA, _SCALER, _TRUE, - ReadCapReg(pCaps, NVC373_HEAD_CAPA(i))); + nvEvoReadCapReg3(pCaps, NVC373_HEAD_CAPA(i))); if (pScalerCaps->present) { NVEvoScalerTapsCaps *pTapsCaps; NvU32 tmp; @@ -5643,7 +5676,7 @@ static void EvoParseCapabilityNotifierC3(NVDevEvoPtr pDevEvo, */ /* 2-tap capabilities */ - tmp = ReadCapReg(pCaps, NVC373_HEAD_CAPD(i)); + tmp = nvEvoReadCapReg3(pCaps, NVC373_HEAD_CAPD(i)); pTapsCaps = &pScalerCaps->taps[NV_EVO_SCALER_2TAPS]; pTapsCaps->maxVDownscaleFactor = NV_EVO_SCALE_FACTOR_2X; pTapsCaps->maxHDownscaleFactor = NV_EVO_SCALE_FACTOR_2X; @@ -5670,15 +5703,15 @@ static void EvoParsePrecompScalerCaps5(NVEvoCapabilitiesPtr pEvoCaps, NVEvoWindowCaps *pWinCaps = &pEvoCaps->window[i]; NVEvoScalerCaps *pScalerCaps = &pWinCaps->scalerCaps; NVEvoScalerTapsCaps *pTapsCaps; - NvU32 capA = ReadCapReg(pCaps, NVC573_PRECOMP_WIN_PIPE_HDR_CAPA(i)); + NvU32 capA = nvEvoReadCapReg3(pCaps, NVC573_PRECOMP_WIN_PIPE_HDR_CAPA(i)); NvU32 capD, capF; pScalerCaps->present = FLD_TEST_DRF(C573, _PRECOMP_WIN_PIPE_HDR_CAPA, _SCLR_PRESENT, _TRUE, capA); if (pScalerCaps->present) { - capD = ReadCapReg(pCaps, NVC573_PRECOMP_WIN_PIPE_HDR_CAPD(i)); - capF = ReadCapReg(pCaps, NVC573_PRECOMP_WIN_PIPE_HDR_CAPF(i)); + capD = nvEvoReadCapReg3(pCaps, NVC573_PRECOMP_WIN_PIPE_HDR_CAPD(i)); + capF = nvEvoReadCapReg3(pCaps, NVC573_PRECOMP_WIN_PIPE_HDR_CAPF(i)); /* 5-tap capabilities */ pTapsCaps = &pScalerCaps->taps[NV_EVO_SCALER_5TAPS]; @@ -5725,7 +5758,7 @@ static void EvoParseCapabilityNotifierC5C6Common(NVEvoCapabilitiesPtr pEvoCaps, if (pHeadCaps->usable) { NVEvoScalerCaps *pScalerCaps = &pHeadCaps->scalerCaps; NVEvoScalerTapsCaps *pTapsCaps; - NvU32 capA = ReadCapReg(pCaps, NVC573_POSTCOMP_HEAD_HDR_CAPA(i)); + NvU32 capA = nvEvoReadCapReg3(pCaps, NVC573_POSTCOMP_HEAD_HDR_CAPA(i)); NvU32 capC, capD; pScalerCaps->present = @@ -5734,8 +5767,8 @@ static void EvoParseCapabilityNotifierC5C6Common(NVEvoCapabilitiesPtr pEvoCaps, if (pScalerCaps->present) { postcompScalingSupported = TRUE; - capC = ReadCapReg(pCaps, NVC573_POSTCOMP_HEAD_HDR_CAPC(i)); - capD = ReadCapReg(pCaps, NVC573_POSTCOMP_HEAD_HDR_CAPD(i)); + capC = nvEvoReadCapReg3(pCaps, NVC573_POSTCOMP_HEAD_HDR_CAPC(i)); + capD = nvEvoReadCapReg3(pCaps, NVC573_POSTCOMP_HEAD_HDR_CAPD(i)); /* * Note that some of these may be zero. @@ -5773,7 +5806,7 @@ static void EvoParseCapabilityNotifierC5C6Common(NVEvoCapabilitiesPtr pEvoCaps, } #if defined(NV_DEBUG) - NvU32 capA = ReadCapReg(pCaps, NVC573_POSTCOMP_HEAD_HDR_CAPA(i)); + NvU32 capA = nvEvoReadCapReg3(pCaps, NVC573_POSTCOMP_HEAD_HDR_CAPA(i)); NvU32 unitWidth = DRF_VAL(C573, _POSTCOMP_HEAD_HDR_CAPA, _UNIT_WIDTH, capA); // EvoInitChannelC5 assumes 16-bit fixed-point. @@ -5784,7 +5817,7 @@ static void EvoParseCapabilityNotifierC5C6Common(NVEvoCapabilitiesPtr pEvoCaps, for (i = 0; i < NVC573_SYS_CAPB_WINDOW_EXISTS__SIZE_1; i++) { NVEvoWindowCaps *pWinCaps = &pEvoCaps->window[i]; - NvU32 capA = ReadCapReg(pCaps, NVC573_PRECOMP_WIN_PIPE_HDR_CAPA(i)); + NvU32 capA = nvEvoReadCapReg3(pCaps, NVC573_PRECOMP_WIN_PIPE_HDR_CAPA(i)); pWinCaps->tmoPresent = FLD_TEST_DRF(C573, _PRECOMP_WIN_PIPE_HDR_CAPA, _TMO_PRESENT, _TRUE, capA); @@ -5795,11 +5828,12 @@ static void EvoParseCapabilityNotifierC5C6Common(NVEvoCapabilitiesPtr pEvoCaps, FLD_TEST_DRF(C573, _PRECOMP_WIN_PIPE_HDR_CAPA, _CSC01_PRESENT, _TRUE, capA); - pWinCaps->csc1MatricesPresent = - (FLD_TEST_DRF(C573, _PRECOMP_WIN_PIPE_HDR_CAPA, - _CSC10_PRESENT, _TRUE, capA) && - FLD_TEST_DRF(C573, _PRECOMP_WIN_PIPE_HDR_CAPA, - _CSC11_PRESENT, _TRUE, capA)); + pWinCaps->csc10MatrixPresent = + FLD_TEST_DRF(C573, _PRECOMP_WIN_PIPE_HDR_CAPA, + _CSC10_PRESENT, _TRUE, capA); + pWinCaps->csc11MatrixPresent = + FLD_TEST_DRF(C573, _PRECOMP_WIN_PIPE_HDR_CAPA, + _CSC11_PRESENT, _TRUE, capA); pWinCaps->cscLUTsPresent = FLD_TEST_DRF(C573, _PRECOMP_WIN_PIPE_HDR_CAPA, @@ -5809,7 +5843,8 @@ static void EvoParseCapabilityNotifierC5C6Common(NVEvoCapabilitiesPtr pEvoCaps, nvAssert(!pWinCaps->tmoPresent || (pWinCaps->csc0MatricesPresent && - pWinCaps->csc1MatricesPresent && + pWinCaps->csc10MatrixPresent && + pWinCaps->csc11MatrixPresent && pWinCaps->cscLUTsPresent)); } @@ -5840,25 +5875,25 @@ static void EvoParseCapabilityNotifierC5(NVDevEvoPtr pDevEvo, */ pEvoCaps->misc.supportsSemiPlanar = FLD_TEST_DRF(C573, _IHUB_COMMON_CAPA, _SUPPORT_PLANAR, _TRUE, - ReadCapReg(pCaps, NVC573_IHUB_COMMON_CAPA)); + nvEvoReadCapReg3(pCaps, NVC573_IHUB_COMMON_CAPA)); pEvoCaps->misc.supportsDSI = FALSE; EvoParseCapabilityNotifierC5C6Common(pEvoCaps, pCaps); } -static void EvoParseCapabilityNotifierC6(NVDevEvoPtr pDevEvo, - NVEvoSubDevPtr pEvoSubDev, - volatile const NvU32 *pCaps) +void nvEvoParseCapabilityNotifier6(NVDevEvoPtr pDevEvo, + NVEvoSubDevPtr pEvoSubDev, + volatile const NvU32 *pCaps) { NVEvoCapabilitiesPtr pEvoCaps = &pEvoSubDev->capabilities; - NvU32 capC = ReadCapReg(pCaps, NVC673_IHUB_COMMON_CAPC); + NvU32 capC = nvEvoReadCapReg3(pCaps, NVC673_IHUB_COMMON_CAPC); NvU32 i; // Miscellaneous capabilities pEvoCaps->misc.supportsPlanar = FLD_TEST_DRF(C673, _IHUB_COMMON_CAPA, _SUPPORT_PLANAR, _TRUE, - ReadCapReg(pCaps, NVC673_IHUB_COMMON_CAPA)); + nvEvoReadCapReg3(pCaps, NVC673_IHUB_COMMON_CAPA)); pEvoCaps->misc.supportsSemiPlanar = FLD_TEST_DRF(C673, _IHUB_COMMON_CAPC, _SUPPORT_SEMI_PLANAR, _TRUE, capC); @@ -5871,13 +5906,13 @@ static void EvoParseCapabilityNotifierC6(NVDevEvoPtr pDevEvo, // DSI is currently supported on just Orin, which has only 1 DSI engine (DSI0). pEvoCaps->misc.supportsDSI = FLD_TEST_DRF(C673, _SYS_CAP, _DSI0_EXISTS, _YES, - ReadCapReg(pCaps, NVC673_SYS_CAP)); + nvEvoReadCapReg3(pCaps, NVC673_SYS_CAP)); for (i = 0; i < NVC673_SYS_CAP_HEAD_EXISTS__SIZE_1; i++) { NVEvoHeadCaps *pHeadCaps = &pEvoCaps->head[i]; if (pHeadCaps->usable) { - NvU32 capA = ReadCapReg(pCaps, NVC673_POSTCOMP_HEAD_HDR_CAPA(i)); + NvU32 capA = nvEvoReadCapReg3(pCaps, NVC673_POSTCOMP_HEAD_HDR_CAPA(i)); NvBool hclpfPresent = FLD_TEST_DRF(C673, _POSTCOMP_HEAD_HDR_CAPA, _HCLPF_PRESENT, _TRUE, capA); @@ -5895,25 +5930,37 @@ static void EvoParseCapabilityNotifierC6(NVDevEvoPtr pDevEvo, static NvU32 UsableWindowCount(const NVEvoCapabilities *pEvoCaps) { NvU32 i, count = 0; - NvBool foundUnusable = FALSE; for (i = 0; i < ARRAY_LEN(pEvoCaps->window); i++) { if (pEvoCaps->window[i].usable) { count++; - /* Assert that usable windows are contiguous starting from 0. */ - if (foundUnusable) { - nvAssert(!foundUnusable); - } - } else { - foundUnusable = TRUE; + /* + * We expect usable windows to be contiguous and start at 0. + * Check that the number of usable windows matches the + * number of loop iterations. + */ + nvAssert(count == (i + 1)); } } return count; } -typedef typeof(EvoParseCapabilityNotifierC3) parse_caps_t; -typedef typeof(nvHwFormatFromKmsFormatC3) get_hw_fmt_t; +static void FillLUTCaps(struct NvKmsLUTCaps *pCaps, + NvBool supported, + enum NvKmsLUTVssSupport vssSupport, + enum NvKmsLUTVssType vssType, + NvU32 vssSegments, + NvU32 lutEntries, + enum NvKmsLUTFormat entryFormat) +{ + pCaps->supported = supported; + pCaps->vssSupport = supported ? vssSupport : NVKMS_LUT_VSS_NOT_SUPPORTED; + pCaps->vssType = supported ? vssType : NVKMS_LUT_VSS_TYPE_NONE; + pCaps->vssSegments = supported ? vssSegments : 0; + pCaps->lutEntries = supported ? lutEntries : 0; + pCaps->entryFormat = supported ? entryFormat : NVKMS_LUT_FORMAT_UNORM14_WAR_813188; +} static void SetHDRLayerCaps(NVDevEvoPtr pDevEvo) { @@ -5951,19 +5998,54 @@ static void SetHDRLayerCaps(NVDevEvoPtr pDevEvo) pDevEvo->caps.layerCaps[numLayers[head]].supportsICtCp = pWinCaps->tmoPresent; + if (pDevEvo->hal->caps.needDefaultLutSurface) { + /* Turing+ uses an FP16, linear 64-segment VSS supported ILUT */ + FillLUTCaps(&pDevEvo->caps.layerCaps[numLayers[head]].ilut, TRUE, + NVKMS_LUT_VSS_SUPPORTED, NVKMS_LUT_VSS_TYPE_LINEAR, + 64, 1025, NVKMS_LUT_FORMAT_FP16); + } else { + /* Volta uses a UNORM14_WAR_813188, non-VSS ILUT */ + FillLUTCaps(&pDevEvo->caps.layerCaps[numLayers[head]].ilut, TRUE, + NVKMS_LUT_VSS_NOT_SUPPORTED, NVKMS_LUT_VSS_TYPE_NONE, + 0, 1025, NVKMS_LUT_FORMAT_UNORM14_WAR_813188); + } + + if (pWinCaps->tmoPresent) { + FillLUTCaps(&pDevEvo->caps.layerCaps[numLayers[head]].tmo, TRUE, + NVKMS_LUT_VSS_REQUIRED, NVKMS_LUT_VSS_TYPE_LINEAR, + 64, 1025, NVKMS_LUT_FORMAT_UNORM16); + + } else { + FillLUTCaps(&pDevEvo->caps.layerCaps[numLayers[head]].tmo, FALSE, + NVKMS_LUT_VSS_NOT_SUPPORTED, NVKMS_LUT_VSS_TYPE_NONE, + 0, 0, NVKMS_LUT_FORMAT_UNORM14_WAR_813188); + } + #if defined(DEBUG) hdrLayerCapSet[numLayers[head]] = TRUE; #endif numLayers[head]++; } + + if (pDevEvo->hal->caps.hasUnorm16OLUT) { + /* Turing+ uses a UNORM16, logarithmic 33-segment VSS supported OLUT */ + FillLUTCaps(&pDevEvo->caps.olut, TRUE, + NVKMS_LUT_VSS_SUPPORTED, NVKMS_LUT_VSS_TYPE_LOGARITHMIC, + 33, 1025, NVKMS_LUT_FORMAT_UNORM16); + } else { + /* Volta uses a UNORM14_WAR_813188, non-VSS OLUT */ + FillLUTCaps(&pDevEvo->caps.olut, TRUE, + NVKMS_LUT_VSS_NOT_SUPPORTED, NVKMS_LUT_VSS_TYPE_NONE, + 0, 1025, NVKMS_LUT_FORMAT_UNORM14_WAR_813188); + } } -static NvBool EvoGetCapabilities3(NVDevEvoPtr pDevEvo, - parse_caps_t *pParse, - get_hw_fmt_t *pGetHwFmt, - NvU32 hwclass, - size_t length) +NvBool nvEvoGetCapabilities3(NVDevEvoPtr pDevEvo, + NVEvoParseCapabilityNotifierFunc3 *pParse, + NVEvoHwFormatFromKmsFormatFunc3 *pGetHwFmt, + NvU32 hwclass, + size_t length) { NvU32 capsHandle = nvGenerateUnixRmHandle(&pDevEvo->handleAllocator); NVDispEvoPtr pDispEvo; @@ -6138,26 +6220,27 @@ static NvBool EvoGetCapabilities3(NVDevEvoPtr pDevEvo, static NvBool EvoGetCapabilitiesC3(NVDevEvoPtr pDevEvo) { - return EvoGetCapabilities3(pDevEvo, EvoParseCapabilityNotifierC3, - nvHwFormatFromKmsFormatC3, - NVC373_DISP_CAPABILITIES, - sizeof(_NvC373DispCapabilities)); + return nvEvoGetCapabilities3(pDevEvo, EvoParseCapabilityNotifierC3, + nvHwFormatFromKmsFormatC3, + NVC373_DISP_CAPABILITIES, + sizeof(_NvC373DispCapabilities)); } static NvBool EvoGetCapabilitiesC5(NVDevEvoPtr pDevEvo) { - return EvoGetCapabilities3(pDevEvo, EvoParseCapabilityNotifierC5, - nvHwFormatFromKmsFormatC5, - NVC573_DISP_CAPABILITIES, - sizeof(_NvC573DispCapabilities)); + return nvEvoGetCapabilities3(pDevEvo, EvoParseCapabilityNotifierC5, + nvHwFormatFromKmsFormatC5, + NVC573_DISP_CAPABILITIES, + sizeof(_NvC573DispCapabilities)); } NvBool nvEvoGetCapabilitiesC6(NVDevEvoPtr pDevEvo) { - return EvoGetCapabilities3(pDevEvo, EvoParseCapabilityNotifierC6, - nvHwFormatFromKmsFormatC6, - NVC673_DISP_CAPABILITIES, - sizeof(_NvC673DispCapabilities)); + return nvEvoGetCapabilities3(pDevEvo, + nvEvoParseCapabilityNotifier6, + nvHwFormatFromKmsFormatC6, + NVC673_DISP_CAPABILITIES, + sizeof(_NvC673DispCapabilities)); } static void EvoSetViewportPointInC3(NVDevEvoPtr pDevEvo, const int head, @@ -6596,7 +6679,7 @@ typedef typeof(ValidateWindowFormatSourceRectC3) val_src_rect_t; static NvBool EvoValidateWindowFormatWrapper( const enum NvKmsSurfaceMemoryFormat format, - get_hw_fmt_t *pGetHwFmt, + NVEvoHwFormatFromKmsFormatFunc3 *pGetHwFmt, const struct NvKmsRect *sourceFetchRect, val_src_rect_t *pValSrcRect, NvU32 *hwFormatOut) @@ -7918,7 +8001,7 @@ NVEvoHAL nvEvoC3 = { EvoFlipC3, /* Flip */ EvoFlipTransitionWARC3, /* FlipTransitionWAR */ EvoFillLUTSurfaceC3, /* FillLUTSurface */ - EvoSetLUTContextDmaC3, /* SetLUTContextDma */ + EvoSetOutputLutC3, /* SetOutputLut */ EvoSetOutputScalerC3, /* SetOutputScaler */ EvoSetViewportPointInC3, /* SetViewportPointIn */ EvoSetViewportInOutC3, /* SetViewportInOut */ @@ -8008,7 +8091,7 @@ NVEvoHAL nvEvoC5 = { EvoFlipC5, /* Flip */ EvoFlipTransitionWARC5, /* FlipTransitionWAR */ nvEvoFillLUTSurfaceC5, /* FillLUTSurface */ - EvoSetLUTContextDmaC5, /* SetLUTContextDma */ + EvoSetOutputLutC5, /* SetOutputLut */ EvoSetOutputScalerC3, /* SetOutputScaler */ EvoSetViewportPointInC3, /* SetViewportPointIn */ EvoSetViewportInOutC5, /* SetViewportInOut */ @@ -8098,7 +8181,7 @@ NVEvoHAL nvEvoC6 = { nvEvoFlipC6, /* Flip */ nvEvoFlipTransitionWARC6, /* FlipTransitionWAR */ nvEvoFillLUTSurfaceC5, /* FillLUTSurface */ - EvoSetLUTContextDmaC5, /* SetLUTContextDma */ + EvoSetOutputLutC5, /* SetOutputLut */ EvoSetOutputScalerC3, /* SetOutputScaler */ EvoSetViewportPointInC3, /* SetViewportPointIn */ EvoSetViewportInOutC5, /* SetViewportInOut */ diff --git a/src/nvidia-modeset/src/nvkms-flip.c b/src/nvidia-modeset/src/nvkms-flip.c index 95afc1ac1d..0ae761a91b 100644 --- a/src/nvidia-modeset/src/nvkms-flip.c +++ b/src/nvidia-modeset/src/nvkms-flip.c @@ -26,6 +26,7 @@ #include "nvkms-flip.h" #include "nvkms-hw-flip.h" #include "nvkms-utils-flip.h" +#include "nvkms-lut.h" #include "nvkms-prealloc.h" #include "nvkms-private.h" #include "nvkms-utils.h" @@ -68,9 +69,10 @@ NvBool nvCheckFlipPermissions( layerMask = allLayersMask; } - /* Changing viewPortIn or LUT requires permission to alter all layers. */ + /* Changing viewPortIn or output LUT requires permission to alter all layers. */ if ((layerMask != allLayersMask) && ((pParams->viewPortIn.specified) || + (pParams->olut.specified) || (pParams->lut.input.specified) || (pParams->lut.output.specified))) { return FALSE; @@ -196,8 +198,7 @@ static NvBool UpdateProposedFlipStateOneApiHead( } } - if (!nvChooseColorRangeEvo(pProposedApiHead->hdr.dpyColor.colorimetry, - pDpyEvo->requestedColorRange, + if (!nvChooseColorRangeEvo(pDpyEvo->requestedColorRange, pProposedApiHead->hdr.dpyColor.format, pProposedApiHead->hdr.dpyColor.bpc, &pProposedApiHead->hdr.dpyColor.range)) { @@ -354,6 +355,26 @@ static void InitNvKmsFlipWorkArea(const NVDevEvoRec *pDevEvo, } } +static void CleanupNvKmsFlipWorkArea(NVDevEvoPtr pDevEvo, + struct NvKmsFlipWorkArea *pWorkArea) +{ + const NVDispEvoRec *pDispEvo; + NvU32 sd, head; + + FOR_ALL_EVO_DISPLAYS(pDispEvo, sd, pDevEvo) { + for (head = 0; head < ARRAY_LEN(pWorkArea->sd[sd].head); head++) { + /* + * If the flip failed or wasn't committed, any TMO surfaces + * allocated by nvSetTmoLutSurfaceEvo will be left in newState with + * 1 refcnt, so free them now. + */ + nvFreeUnrefedTmoLutSurfacesEvo(pDevEvo, + &pWorkArea->sd[sd].head[head].newState, + head); + } + } +} + static void FlipEvoOneApiHead(NVDispEvoRec *pDispEvo, const NvU32 apiHead, const struct NvKmsFlipWorkArea *pWorkArea, @@ -397,12 +418,6 @@ static void FlipEvoOneApiHead(NVDispEvoRec *pDispEvo, &pProposedApiHead->hdr.dpyColor, pUpdateState); } - - if (pProposedApiHead->lut.input.specified || - pProposedApiHead->lut.output.specified) { - /* Update current LUT to hardware */ - nvEvoSetLUTContextDma(pDispEvo, head, pUpdateState); - } } if (pProposedApiHead->dirty.hdr) { @@ -502,9 +517,7 @@ NvBool nvFlipEvo(NVDevEvoPtr pDevEvo, const NvBool allowVrr = GetAllowVrr(pDevEvo, pFlipHead, numFlipHeads, requestAllowVrr, &applyAllowVrr); - struct NvKmsFlipWorkArea *pWorkArea = - nvPreallocGet(pDevEvo, PREALLOC_TYPE_FLIP_WORK_AREA, - sizeof(*pWorkArea)); + struct NvKmsFlipWorkArea *pWorkArea; NvU32 i; /* @@ -516,9 +529,14 @@ NvBool nvFlipEvo(NVDevEvoPtr pDevEvo, * NVKMS_IOCTL_FLIP requests. */ if (pDevEvo->coreInitMethodsPending) { - goto done; + if (reply) { + reply->flipResult = result; + } + return ret; } + pWorkArea = nvPreallocGet(pDevEvo, PREALLOC_TYPE_FLIP_WORK_AREA, + sizeof(*pWorkArea)); InitNvKmsFlipWorkArea(pDevEvo, pWorkArea); /* Validate the flip parameters and update the work area. */ @@ -677,7 +695,7 @@ NvBool nvFlipEvo(NVDevEvoPtr pDevEvo, /* fall through */ done: - + CleanupNvKmsFlipWorkArea(pDevEvo, pWorkArea); nvPreallocRelease(pDevEvo, PREALLOC_TYPE_FLIP_WORK_AREA); if (reply) { reply->flipResult = result; @@ -782,7 +800,7 @@ void nvApiHeadSetViewportPointIn(const NVDispEvoRec *pDispEvo, nvPushEvoSubDevMaskDisp(pDispEvo); pDevEvo->hal->SetViewportPointIn(pDevEvo, head, - x + (hwViewportInWidth * pHeadState->tilePosition), y, + x + (hwViewportInWidth * pHeadState->mergeHeadSection), y, &updateState); nvPopEvoSubDevMask(pDevEvo); diff --git a/src/nvidia-modeset/src/nvkms-hal.c b/src/nvidia-modeset/src/nvkms-hal.c index 16093e11ff..19d58864b3 100644 --- a/src/nvidia-modeset/src/nvkms-hal.c +++ b/src/nvidia-modeset/src/nvkms-hal.c @@ -50,6 +50,7 @@ #include "class/clc77d.h" // NVC67D_CORE_CHANNEL_DMA extern NVEvoHAL nvEvo94; +extern NVEvoHAL nvEvo97; extern NVEvoHAL nvEvoC3; extern NVEvoHAL nvEvoC5; extern NVEvoHAL nvEvoC6; @@ -60,6 +61,7 @@ enum NvKmsAllocDeviceStatus nvAssignEvoCaps(NVDevEvoPtr pDevEvo) _pEvoHal, \ _supportsDP13, \ _supportsHDMI20, \ + _supportsYUV2020, \ _inputLutAppliesToBase, \ _dpYCbCr422MaxBpc, \ _hdmiYCbCr422MaxBpc, \ @@ -83,6 +85,7 @@ enum NvKmsAllocDeviceStatus nvAssignEvoCaps(NVDevEvoPtr pDevEvo) .evoCaps = { \ .supportsDP13 = _supportsDP13, \ .supportsHDMI20 = _supportsHDMI20, \ + .supportsYUV2020 = _supportsYUV2020, \ .validNIsoFormatMask = _validNIsoFormatMask, \ .inputLutAppliesToBase = _inputLutAppliesToBase, \ .maxPitchValue = _maxPitch, \ @@ -153,32 +156,33 @@ enum NvKmsAllocDeviceStatus nvAssignEvoCaps(NVDevEvoPtr pDevEvo) const NVEvoCapsRec evoCaps; } dispTable[] = { /* - * hdmiYCbCr422MaxBpc--------------------+ - * dpYCbCr422MaxBpc------------------+ | - * inputLutAppliesToBase ---------+ | | - * supportsHDMI20 -------------+ | | | - * supportsDP13 ------------+ | | | | - * pEvoHal --------------+ | | | | | - * windowClassPrefix | | | | | | - * classPrefix | | | | | | | - * | | | | | | | | + * hdmiYCbCr422MaxBpc-----------------------+ + * dpYCbCr422MaxBpc---------------------+ | + * inputLutAppliesToBase ------------+ | | + * supportsYUV2020 ---------------+ | | | + * supportsHDMI20 -------------+ | | | | + * supportsDP13 ------------+ | | | | | + * pEvoHal --------------+ | | | | | | + * windowClassPrefix | | | | | | | + * classPrefix | | | | | | | | + * | | | | | | | | | */ /* Ada */ - ENTRY_NVD(C7, C6, &nvEvoC6, 1, 1, 0, 12, 12), + ENTRY_NVD(C7, C6, &nvEvoC6, 1, 1, 1, 0, 12, 12), /* Ampere */ - ENTRY_NVD(C6, C6, &nvEvoC6, 1, 1, 0, 12, 12), + ENTRY_NVD(C6, C6, &nvEvoC6, 1, 1, 1, 0, 12, 12), /* Turing */ - ENTRY_NVD(C5, C5, &nvEvoC5, 1, 1, 0, 12, 12), + ENTRY_NVD(C5, C5, &nvEvoC5, 1, 1, 1, 0, 12, 12), /* Volta */ - ENTRY_NVD(C3, C3, &nvEvoC3, 1, 1, 0, 12, 12), + ENTRY_NVD(C3, C3, &nvEvoC3, 1, 1, 1, 0, 12, 12), /* gp10x */ - ENTRY_EVO(98, &nvEvo94, 1, 1, 1, 12, 12), + ENTRY_EVO(98, &nvEvo97, 1, 1, 1, 1, 12, 12), /* gp100 */ - ENTRY_EVO(97, &nvEvo94, 1, 1, 1, 12, 12), + ENTRY_EVO(97, &nvEvo97, 1, 1, 1, 1, 12, 12), /* gm20x */ - ENTRY_EVO(95, &nvEvo94, 0, 1, 1, 8, 0), + ENTRY_EVO(95, &nvEvo94, 0, 1, 0, 1, 8, 0), /* gm10x */ - ENTRY_EVO(94, &nvEvo94, 0, 0, 1, 8, 0), + ENTRY_EVO(94, &nvEvo94, 0, 0, 0, 1, 8, 0), }; int i; diff --git a/src/nvidia-modeset/src/nvkms-hdmi.c b/src/nvidia-modeset/src/nvkms-hdmi.c index 1dbc6c482b..07841ef5f6 100644 --- a/src/nvidia-modeset/src/nvkms-hdmi.c +++ b/src/nvidia-modeset/src/nvkms-hdmi.c @@ -69,16 +69,10 @@ static inline const NVT_EDID_CEA861_INFO *GetExt861(const NVParsedEdidEvoRec *pP static void CalculateVideoInfoFrameColorFormat( const NVDpyAttributeColor *pDpyColor, const NvU32 hdTimings, + const NVT_EDID_INFO *pEdidInfo, NVT_VIDEO_INFOFRAME_CTRL *pCtrl) { - /* - * If NVKMS_OUTPUT_COLORIMETRY_BT2100 is enabled, we expect the colorSpace - * is RGB. This is enforced when the colorSpace is selected. - * XXX HDR TODO: Support YUV - */ - nvAssert((pDpyColor->colorimetry != NVKMS_OUTPUT_COLORIMETRY_BT2100) || - (pDpyColor->format == - NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB)); + NvBool sinkSupportsRGBQuantizationOverride = FALSE; // sets video infoframe colorspace (RGB/YUV). switch (pDpyColor->format) { @@ -102,22 +96,36 @@ static void CalculateVideoInfoFrameColorFormat( // sets video infoframe colorimetry. switch (pDpyColor->format) { case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB: - if (pDpyColor->colorimetry == NVKMS_OUTPUT_COLORIMETRY_BT2100) { - pCtrl->colorimetry = NVT_COLORIMETRY_BT2020RGB; - } else { - pCtrl->colorimetry = NVT_COLORIMETRY_RGB; + switch (pDpyColor->colorimetry) { + case NVKMS_OUTPUT_COLORIMETRY_BT2100: + pCtrl->colorimetry = NVT_VIDEO_INFOFRAME_BYTE2_C1C0_EXT_COLORIMETRY; + pCtrl->extended_colorimetry = + NVT_VIDEO_INFOFRAME_BYTE3_EC_BT2020RGBYCC; + break; + case NVKMS_OUTPUT_COLORIMETRY_DEFAULT: + pCtrl->colorimetry = NVT_VIDEO_INFOFRAME_BYTE2_C1C0_NO_DATA; + break; } break; case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr422: case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr444: - if (hdTimings) { - pCtrl->colorimetry = NVT_COLORIMETRY_YUV_709; - } else { - pCtrl->colorimetry = NVT_COLORIMETRY_YUV_601; + switch (pDpyColor->colorimetry) { + case NVKMS_OUTPUT_COLORIMETRY_BT2100: + pCtrl->colorimetry = NVT_VIDEO_INFOFRAME_BYTE2_C1C0_EXT_COLORIMETRY; + pCtrl->extended_colorimetry = + NVT_VIDEO_INFOFRAME_BYTE3_EC_BT2020RGBYCC; + break; + case NVKMS_OUTPUT_COLORIMETRY_DEFAULT: + pCtrl->colorimetry = + (hdTimings ? NVT_VIDEO_INFOFRAME_BYTE2_C1C0_ITU709 : + NVT_VIDEO_INFOFRAME_BYTE2_C1C0_SMPTE170M_ITU601); + break; } break; case NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_YCbCr420: - pCtrl->colorimetry = NVT_COLORIMETRY_YUV_709; + // XXX HDR TODO: Support YUV420 + HDR + nvAssert(pDpyColor->colorimetry != NVKMS_OUTPUT_COLORIMETRY_BT2100); + pCtrl->colorimetry = NVT_VIDEO_INFOFRAME_BYTE2_C1C0_ITU709; break; default: nvAssert(!"Invalid colorSpace value"); @@ -139,13 +147,22 @@ static void CalculateVideoInfoFrameColorFormat( break; } + if (pEdidInfo != NULL) { + sinkSupportsRGBQuantizationOverride = (pEdidInfo->ext861.valid.VCDB && + ((pEdidInfo->ext861.video_capability & NVT_CEA861_VCDB_QS_MASK) >> + NVT_CEA861_VCDB_QS_SHIFT) != 0); + } + + if ((pDpyColor->format == NV_KMS_DPY_ATTRIBUTE_CURRENT_COLOR_SPACE_RGB) && + !sinkSupportsRGBQuantizationOverride) { + pCtrl->rgb_quantization_range = NVT_VIDEO_INFOFRAME_BYTE3_Q1Q0_DEFAULT; + } + /* - * Only limited color range is allowed with YUV444, YUV422 color spaces, or - * BT2020 colorimetry. + * Only limited color range is allowed with YUV444 and YUV422 color spaces. */ nvAssert(!(((pCtrl->color_space == NVT_VIDEO_INFOFRAME_BYTE1_Y1Y0_YCbCr422) || - (pCtrl->color_space == NVT_VIDEO_INFOFRAME_BYTE1_Y1Y0_YCbCr444) || - (pCtrl->colorimetry == NVT_COLORIMETRY_BT2020RGB)) && + (pCtrl->color_space == NVT_VIDEO_INFOFRAME_BYTE1_Y1Y0_YCbCr444)) && (pCtrl->rgb_quantization_range != NVT_VIDEO_INFOFRAME_BYTE3_Q1Q0_LIMITED_RANGE))); } @@ -532,8 +549,7 @@ static void SendVideoInfoFrame(const NVDispEvoRec *pDispEvo, NVT_VIDEO_INFOFRAME VideoInfoFrame; NVT_STATUS status; - - CalculateVideoInfoFrameColorFormat(pDpyColor, hdTimings, &videoCtrl); + CalculateVideoInfoFrameColorFormat(pDpyColor, hdTimings, pEdidInfo, &videoCtrl); status = NvTiming_ConstructVideoInfoframe(pEdidInfo, &videoCtrl, diff --git a/src/nvidia-modeset/src/nvkms-headsurface.c b/src/nvidia-modeset/src/nvkms-headsurface.c index 1ab7cda379..25b6c880c0 100644 --- a/src/nvidia-modeset/src/nvkms-headsurface.c +++ b/src/nvidia-modeset/src/nvkms-headsurface.c @@ -2281,7 +2281,8 @@ void nvHsAddVBlankCallback(NVHsChannelEvoPtr pHsChannel) nvApiHeadRegisterVBlankCallback(pDispEvo, pHsChannel->apiHead, HsVBlankCallback, - NULL); + NULL, + 1 /* listIndex */); } /*! diff --git a/src/nvidia-modeset/src/nvkms-hw-flip.c b/src/nvidia-modeset/src/nvkms-hw-flip.c index ff2fa19311..7bbf8088a7 100644 --- a/src/nvidia-modeset/src/nvkms-hw-flip.c +++ b/src/nvidia-modeset/src/nvkms-hw-flip.c @@ -168,6 +168,8 @@ void nvClearFlipEvoHwState( nvkms_memset(pFlipState, 0, sizeof(*pFlipState)); + pFlipState->olutFpNormScale = NVKMS_OLUT_FP_NORM_SCALE_DEFAULT; + for (i = 0; i < ARRAY_LEN(pFlipState->layer); i++) { pFlipState->layer[i].cscMatrix = NVKMS_IDENTITY_CSC_MATRIX; } @@ -227,6 +229,9 @@ void nvInitFlipEvoHwState( pFlipState->hdrInfoFrame.eotf = pHeadState->hdrInfoFrameOverride.eotf; pFlipState->hdrInfoFrame.staticMetadata = pHeadState->hdrInfoFrameOverride.staticMetadata; + + pFlipState->outputLut = pSdHeadState->outputLut; + pFlipState->olutFpNormScale = pSdHeadState->olutFpNormScale; } @@ -240,6 +245,8 @@ NvBool nvIsLayerDirty(const struct NvKmsFlipCommonParams *pParams, pParams->layer[layer].completionNotifier.specified || pParams->layer[layer].syncObjects.specified || pParams->layer[layer].compositionParams.specified || + pParams->layer[layer].ilut.specified || + pParams->layer[layer].tmo.specified || pParams->layer[layer].csc.specified || pParams->layer[layer].hdr.specified || pParams->layer[layer].colorSpace.specified; @@ -287,9 +294,12 @@ static NvBool FlipRequiresNonTearingMode( // Layout (i.e. frame, field1, or field2) pOldSurf->widthInPixels != pNewSurf->widthInPixels || pOldSurf->heightInPixels != pNewSurf->heightInPixels || - pOldSurf->layout != pNewSurf->layout; + pOldSurf->layout != pNewSurf->layout || // UseGainOfs - // NewBaseLut -- USE_CORE_LUT is programmed in InitChannel* + pOld->inputLut.pLutSurfaceEvo != pNew->inputLut.pLutSurfaceEvo || + pOld->inputLut.offset != pNew->inputLut.offset || + pOld->tmoLut.pLutSurfaceEvo != pNew->tmoLut.pLutSurfaceEvo || + pOld->tmoLut.offset != pNew->tmoLut.offset; // NewOutputLut } @@ -560,9 +570,106 @@ static NvBool UpdateLayerFlipEvoHwStateHDRStaticMetadata( return TRUE; } +static NvBool UpdateFlipLutHwState( + const NVDevEvoRec *pDevEvo, + const NVEvoApiHandlesRec *pOpenDevSurfaceHandles, + NVFlipLutHwState *pFlipLutHwState, + const struct NvKmsLUTSurfaceParams *pLUTSurfaceParams, + const struct NvKmsLUTCaps *pLUTCaps, + const NvBool isUsedByLayerChannel) +{ + NvU32 requiredSize = 0; + + /* + * If the LUT is not supported and the user has specified it, even with + * surfaceHandle == 0, the request is invalid. + */ + if (!pLUTCaps->supported) { + return FALSE; + } + + if (pLUTSurfaceParams->surfaceHandle != 0) { + pFlipLutHwState->pLutSurfaceEvo = + nvEvoGetSurfaceFromHandle(pDevEvo, + pOpenDevSurfaceHandles, + pLUTSurfaceParams->surfaceHandle, + FALSE, /* isUsedByCursorChannel */ + isUsedByLayerChannel); + + if (pFlipLutHwState->pLutSurfaceEvo == NULL) { + /* Invalid surface handle */ + return FALSE; + } + pFlipLutHwState->offset = pLUTSurfaceParams->offset; + pFlipLutHwState->vssSegments = pLUTSurfaceParams->vssSegments; + pFlipLutHwState->lutEntries = pLUTSurfaceParams->lutEntries; + + /* Attempt to validate the surface and parameters: */ + if (pFlipLutHwState->pLutSurfaceEvo->layout != NvKmsSurfaceMemoryLayoutPitch) { + /* + * Only pitch surfaces can be used. + * + * XXX: Also need surface format check? + * (NvKmsSurfaceMemoryFormatR16G16B16A16) + */ + return FALSE; + } + + if ((pLUTCaps->vssSupport == NVKMS_LUT_VSS_NOT_SUPPORTED) && + (pLUTSurfaceParams->vssSegments != 0)) { + /* Can't specify VSS entries if VSS is not supported. */ + return FALSE; + } + + if ((pLUTCaps->vssSupport == NVKMS_LUT_VSS_REQUIRED) && + (pLUTSurfaceParams->vssSegments == 0)) { + /* Must specify VSS entries if VSS is required. */ + return FALSE; + } + + if ((pLUTSurfaceParams->lutEntries > pLUTCaps->lutEntries) || + (pLUTSurfaceParams->vssSegments > pLUTCaps->vssSegments)) { + /* The number of LUT and VSS entries cannot exceed LUT caps. */ + return FALSE; + } + + requiredSize = pLUTSurfaceParams->lutEntries * NVKMS_LUT_CAPS_LUT_ENTRY_SIZE + + (pLUTSurfaceParams->vssSegments > 0 ? NVKMS_LUT_VSS_HEADER_SIZE : 0); + + if (requiredSize > pFlipLutHwState->pLutSurfaceEvo->planes[0].rmObjectSizeInBytes) { + /* The surface isn't large enough to hold the described LUT. */ + return FALSE; + } + + /* + * TODO: Check that lutEntries, vssSegments, and vssType correlate + * correctly. + */ + } else { + /* Disable the LUT. */ + pFlipLutHwState->pLutSurfaceEvo = NULL; + pFlipLutHwState->offset = 0; + pFlipLutHwState->vssSegments = 0; + pFlipLutHwState->lutEntries = 0; + } + return TRUE; +} + +#define WITH_APIHEAD_FOR_HEAD(_pDevEvo, _sd, _head, _apiHead) \ + for (_apiHead = 0; \ + _apiHead < ARRAY_LEN(_pDevEvo->pDispEvo[_sd]->apiHeadState); \ + _apiHead++) { \ + if ((_pDevEvo->pDispEvo[_sd]->apiHeadState[_apiHead].hwHeadsMask & \ + NVBIT(_head)) != 0) { + +#define WITH_APIHEAD_FOR_HEAD_DONE \ + break; \ + } \ + } + static NvBool UpdateLayerFlipEvoHwStateCommon( const struct NvKmsPerOpenDev *pOpenDev, - const NVDevEvoRec *pDevEvo, + NVDevEvoRec *pDevEvo, const NvU32 sd, const NvU32 head, const NvU32 layer, @@ -742,6 +849,49 @@ static NvBool UpdateLayerFlipEvoHwStateCommon( pParams->layer[layer].colorSpace.val; } + if (pParams->layer[layer].csc00Override.specified) { + // CSC00 is only available on layers that support ICtCp. + if (!pDevEvo->caps.layerCaps[layer].supportsICtCp && + pHwState->csc00Override.enabled) { + return FALSE; + } + pHwState->csc00Override.enabled = + pParams->layer[layer].csc00Override.enabled; + pHwState->csc00Override.matrix = + pParams->layer[layer].csc00Override.matrix; + } + + if (pParams->layer[layer].csc01Override.specified) { + // CSC01 is only available on layers that support ICtCp. + if (!pDevEvo->caps.layerCaps[layer].supportsICtCp && + pHwState->csc01Override.enabled) { + return FALSE; + } + pHwState->csc01Override.enabled = + pParams->layer[layer].csc01Override.enabled; + pHwState->csc01Override.matrix = + pParams->layer[layer].csc01Override.matrix; + } + + if (pParams->layer[layer].csc10Override.specified) { + // CSC10 is only available on layers that support ICtCp. + if (!pDevEvo->caps.layerCaps[layer].supportsICtCp && + pHwState->csc10Override.enabled) { + return FALSE; + } + pHwState->csc10Override.enabled = + pParams->layer[layer].csc10Override.enabled; + pHwState->csc10Override.matrix = + pParams->layer[layer].csc10Override.matrix; + } + + if (pParams->layer[layer].csc11Override.specified) { + pHwState->csc11Override.enabled = + pParams->layer[layer].csc11Override.enabled; + pHwState->csc11Override.matrix = + pParams->layer[layer].csc11Override.matrix; + } + if (pHwState->composition.depth == 0) { pHwState->composition.depth = NVKMS_MAX_LAYERS_PER_HEAD - layer; @@ -773,6 +923,89 @@ static NvBool UpdateLayerFlipEvoHwStateCommon( } } + if (pParams->layer[layer].ilut.specified) { + if (pParams->layer[layer].ilut.enabled) { + ret = UpdateFlipLutHwState( + pDevEvo, + pOpenDevSurfaceHandles, + &pFlipState->layer[layer].inputLut, + &pParams->layer[layer].ilut.lut, + &pDevEvo->caps.layerCaps[layer].ilut, + TRUE /*isUsedByLayerChannel*/); + if (!ret) { + return FALSE; + } + /* Cache that the hw state is from the new params. */ + pFlipState->layer[layer].inputLut.fromOverride = TRUE; + } else { + /* Cache that the hw state is from the legacy params. */ + pFlipState->layer[layer].inputLut.fromOverride = FALSE; + } + } + + /* + * If this is not from the new params - either cached this flip or in a + * previous one - set from the legacy params. + */ + if (!pFlipState->layer[layer].inputLut.fromOverride) { + NvU32 apiHead; + WITH_APIHEAD_FOR_HEAD(pDevEvo, sd, head, apiHead) { + NvBool ilutEnabled = pDevEvo->lut.apiHead[apiHead].disp[sd].curBaseLutEnabled; + NvU32 curLUTIndex = pDevEvo->lut.apiHead[apiHead].disp[sd].curLUTIndex; + NvU32 nextLutIndex = (curLUTIndex + 1) % 3; + + /* If the legacy params are specified, update from those. */ + if (pParams->lut.input.specified) { + if (pParams->lut.input.end != 0) { + pFlipState->layer[layer].inputLut.pLutSurfaceEvo = + pDevEvo->lut.apiHead[apiHead].LUT[nextLutIndex]; + pFlipState->layer[layer].inputLut.offset = offsetof(NVEvoLutDataRec, base); + pFlipState->layer[layer].inputLut.lutEntries = NV_NUM_EVO_LUT_ENTRIES; + pFlipState->layer[layer].inputLut.vssSegments = 0; + } else { + pFlipState->layer[layer].inputLut.pLutSurfaceEvo = NULL; + pFlipState->layer[layer].inputLut.offset = 0; + pFlipState->layer[layer].inputLut.lutEntries = 0; + pFlipState->layer[layer].inputLut.vssSegments = 0; + } + /* Otherwise, use the current state. */ + } else if (ilutEnabled) { + pFlipState->layer[layer].inputLut.pLutSurfaceEvo = + pDevEvo->lut.apiHead[apiHead].LUT[curLUTIndex]; + pFlipState->layer[layer].inputLut.offset = offsetof(NVEvoLutDataRec, base); + pFlipState->layer[layer].inputLut.lutEntries = NV_NUM_EVO_LUT_ENTRIES; + pFlipState->layer[layer].inputLut.vssSegments = 0; + } else { + pFlipState->layer[layer].inputLut.pLutSurfaceEvo = NULL; + pFlipState->layer[layer].inputLut.offset = 0; + pFlipState->layer[layer].inputLut.lutEntries = 0; + pFlipState->layer[layer].inputLut.vssSegments = 0; + } + } WITH_APIHEAD_FOR_HEAD_DONE; + } + + if (pParams->layer[layer].tmo.specified) { + if (pParams->layer[layer].tmo.enabled) { + ret = UpdateFlipLutHwState( + pDevEvo, + pOpenDevSurfaceHandles, + &pFlipState->layer[layer].tmoLut, + &pParams->layer[layer].tmo.lut, + &pDevEvo->caps.layerCaps[layer].tmo, + TRUE /*isUsedByLayerChannel*/); + if (!ret) { + return FALSE; + } + pFlipState->layer[layer].tmoLut.fromOverride = TRUE; + } else { + pFlipState->layer[layer].tmoLut.fromOverride = FALSE; + } + } + + if (!pFlipState->layer[layer].tmoLut.fromOverride) { + nvSetTmoLutSurfaceEvo(pDevEvo, &pFlipState->layer[layer]); + } + if (pParams->layer[layer].maxDownscaleFactors.specified) { pFlipState->layer[layer].maxDownscaleFactors.vertical = pParams->layer[layer].maxDownscaleFactors.vertical; @@ -792,7 +1025,7 @@ static NvBool UpdateLayerFlipEvoHwStateCommon( static NvBool UpdateMainLayerFlipEvoHwState( const struct NvKmsPerOpenDev *pOpenDev, - const NVDevEvoRec *pDevEvo, + NVDevEvoRec *pDevEvo, const NvU32 sd, const NvU32 head, const struct NvKmsFlipCommonParams *pParams, @@ -813,6 +1046,21 @@ static NvBool UpdateMainLayerFlipEvoHwState( return FALSE; } + if (pHwState->pSurfaceEvo[NVKMS_LEFT] && + pHwState->pSurfaceEvo[NVKMS_LEFT]->format == NvKmsSurfaceMemoryFormatI8 && + pHwState->inputLut.pLutSurfaceEvo == NULL) { + + /* + * Depth 8 requires the input LUT to be enabled, so fall back to the + * last programmed legacy LUT. + */ + pHwState->inputLut.pLutSurfaceEvo = + pDevEvo->pDispEvo[sd]->headState[head].lut.pCurrSurface; + pHwState->inputLut.offset = offsetof(NVEvoLutDataRec, base); + pHwState->inputLut.lutEntries = NV_NUM_EVO_LUT_ENTRIES; + pHwState->inputLut.vssSegments = 0; + } + if (pParams->layer[NVKMS_MAIN_LAYER].csc.specified) { if (pParams->layer[NVKMS_MAIN_LAYER].csc.useMain) { return FALSE; @@ -876,7 +1124,7 @@ static NvBool UpdateCursorLayerFlipEvoHwState( const NVDevEvoRec *pDevEvo, const struct NvKmsFlipCommonParams *pParams, const NVHwModeTimingsEvo *pTimings, - const NvU8 tilePosition, + const NvU8 mergeHeadSection, NVFlipEvoHwState *pFlipState) { if (pParams->cursor.imageSpecified) { @@ -895,7 +1143,7 @@ static NvBool UpdateCursorLayerFlipEvoHwState( if (pParams->cursor.positionSpecified) { pFlipState->cursor.x = (pParams->cursor.position.x - - (pTimings->viewPort.in.width * tilePosition)); + (pTimings->viewPort.in.width * mergeHeadSection)); pFlipState->cursor.y = pParams->cursor.position.y; pFlipState->dirty.cursorPosition = TRUE; @@ -906,7 +1154,7 @@ static NvBool UpdateCursorLayerFlipEvoHwState( static NvBool UpdateOverlayLayerFlipEvoHwState( const struct NvKmsPerOpenDev *pOpenDev, - const NVDevEvoRec *pDevEvo, + NVDevEvoRec *pDevEvo, const NvU32 sd, const NvU32 head, const NvU32 layer, @@ -978,12 +1226,12 @@ static NvBool UpdateOverlayLayerFlipEvoHwState( */ NvBool nvUpdateFlipEvoHwState( const struct NvKmsPerOpenDev *pOpenDev, - const NVDevEvoRec *pDevEvo, + NVDevEvoRec *pDevEvo, const NvU32 sd, const NvU32 head, const struct NvKmsFlipCommonParams *pParams, const NVHwModeTimingsEvo *pTimings, - const NvU8 tilePosition, + const NvU8 mergeHeadSection, NVFlipEvoHwState *pFlipState, NvBool allowVrr) { @@ -992,12 +1240,12 @@ NvBool nvUpdateFlipEvoHwState( if (pParams->viewPortIn.specified) { pFlipState->dirty.viewPortPointIn = TRUE; pFlipState->viewPortPointIn.x = pParams->viewPortIn.point.x + - (pTimings->viewPort.in.width * tilePosition); + (pTimings->viewPort.in.width * mergeHeadSection); pFlipState->viewPortPointIn.y = pParams->viewPortIn.point.y; } if (!UpdateCursorLayerFlipEvoHwState(pOpenDev, pDevEvo, pParams, pTimings, - tilePosition, pFlipState)) { + mergeHeadSection, pFlipState)) { return FALSE; } @@ -1034,6 +1282,77 @@ NvBool nvUpdateFlipEvoHwState( } } + /* + * See the comment for the ILUT in UpdateLayerFlipEvoHwStateCommon for an + * overview of this setup. + */ + if (pParams->olut.specified) { + if (pParams->olut.enabled) { + const NVEvoApiHandlesRec *pOpenDevSurfaceHandles = + nvGetSurfaceHandlesFromOpenDevConst(pOpenDev); + + if (!UpdateFlipLutHwState(pDevEvo, pOpenDevSurfaceHandles, + &pFlipState->outputLut, &pParams->olut.lut, + &pDevEvo->caps.olut, + FALSE /*isUsedByLayerChannel*/)) { + return FALSE; + } + pFlipState->outputLut.fromOverride = TRUE; + } else { + pFlipState->outputLut.fromOverride = FALSE; + } + } + + if (!pFlipState->outputLut.fromOverride) { + NvU32 apiHead; + WITH_APIHEAD_FOR_HEAD(pDevEvo, sd, head, apiHead) { + NvBool olutEnabled = pDevEvo->lut.apiHead[apiHead].disp[sd].curOutputLutEnabled; + NvU32 curLUTIndex = pDevEvo->lut.apiHead[apiHead].disp[sd].curLUTIndex; + NvU32 nextLutIndex = (curLUTIndex + 1) % 3; + + if (pParams->lut.output.specified) { + if (pParams->lut.output.enabled) { + pFlipState->outputLut.pLutSurfaceEvo = + pDevEvo->lut.apiHead[apiHead].LUT[nextLutIndex]; + pFlipState->outputLut.offset = offsetof(NVEvoLutDataRec, output); + pFlipState->outputLut.lutEntries = NV_NUM_EVO_LUT_ENTRIES; + pFlipState->outputLut.vssSegments = 0; + } else { + pFlipState->outputLut.pLutSurfaceEvo = NULL; + pFlipState->outputLut.offset = 0; + pFlipState->outputLut.lutEntries = 0; + pFlipState->outputLut.vssSegments = 0; + } + } else if (olutEnabled) { + pFlipState->outputLut.pLutSurfaceEvo = + pDevEvo->lut.apiHead[apiHead].LUT[curLUTIndex]; + pFlipState->outputLut.offset = offsetof(NVEvoLutDataRec, output); + pFlipState->outputLut.lutEntries = NV_NUM_EVO_LUT_ENTRIES; + pFlipState->outputLut.vssSegments = 0; + } else { + pFlipState->outputLut.pLutSurfaceEvo = NULL; + pFlipState->outputLut.offset = 0; + pFlipState->outputLut.lutEntries = 0; + pFlipState->outputLut.vssSegments = 0; + } + } WITH_APIHEAD_FOR_HEAD_DONE; + } + + if (pParams->olutFpNormScale.specified) { + pFlipState->olutFpNormScale = pParams->olutFpNormScale.val; + } + + if ((pFlipState->outputLut.pLutSurfaceEvo != + pDevEvo->gpus[sd].headState[head].outputLut.pLutSurfaceEvo) || + (pFlipState->outputLut.offset != + pDevEvo->gpus[sd].headState[head].outputLut.offset) || + (pFlipState->olutFpNormScale != + pDevEvo->gpus[sd].headState[head].olutFpNormScale)) { + + pFlipState->layer[NVKMS_MAIN_LAYER].tearing = FALSE; + pFlipState->dirty.olut = TRUE; + } + if (!AssignUsageBounds(pDevEvo, head, pFlipState)) { return FALSE; } @@ -1146,6 +1465,71 @@ static NvBool ValidateSurfaceSize( return TRUE; } +static NvBool +ValidateLayerLutHwState(const NVDevEvoRec *pDevEvo, + const NVFlipEvoHwState *pFlipState, + NvU32 layer) +{ + const NVFlipChannelEvoHwState *pHwState = &pFlipState->layer[layer]; + + if (!pDevEvo->caps.layerCaps[layer].ilut.supported && + (pHwState->inputLut.pLutSurfaceEvo != NULL)) { + return FALSE; + } + + if (!pDevEvo->caps.layerCaps[layer].tmo.supported && + (pHwState->tmoLut.pLutSurfaceEvo != NULL)) { + return FALSE; + } + + /* Surface format validation is handled in UpdateFlipLutHwState */ + if (pDevEvo->hal->caps.needDefaultLutSurface && + pHwState->pSurfaceEvo[NVKMS_LEFT] != NULL) { + /* + * needDefaultLutSurface corresponds to the Turing+ case where the ILUT + * must convert to FP16. When it is set, the ILUT must be set if the + * surface is not in FP16 and the ILUT must not be set if the surface + * is in FP16. However, we only validate the second case because the + * first is handled internally be using the default ILUT. + */ + if ((pHwState->pSurfaceEvo[NVKMS_LEFT]->format == + NvKmsSurfaceMemoryFormatRF16GF16BF16XF16) || + (pHwState->pSurfaceEvo[NVKMS_LEFT]->format == + NvKmsSurfaceMemoryFormatRF16GF16BF16AF16)) { + /* + * If the layer's surface format is FP16, the ILUT must not be + * enabled. + */ + if (pHwState->inputLut.pLutSurfaceEvo) { + return FALSE; + } + } + } + + if (pHwState->pSurfaceEvo[NVKMS_LEFT] && + pHwState->pSurfaceEvo[NVKMS_LEFT]->format == NvKmsSurfaceMemoryFormatI8) { + + /* If the layer's surface format is I8, the ILUT must be enabled. */ + if (pHwState->inputLut.pLutSurfaceEvo == NULL) { + return FALSE; + } + } + + return TRUE; +} + +static NvBool +ValidateHeadLutHwState(const NVDevEvoRec *pDevEvo, + const NVFlipEvoHwState *pFlipState) +{ + if (!pDevEvo->caps.olut.supported && + (pFlipState->outputLut.pLutSurfaceEvo != NULL)) { + return FALSE; + } + + return TRUE; +} + static NvBool ValidateMainFlipChannelEvoHwState(const NVDevEvoRec *pDevEvo, const NVFlipChannelEvoHwState *pHwState, @@ -1446,6 +1830,10 @@ NvBool nvValidateFlipEvoHwState( return FALSE; } } + + if (!ValidateLayerLutHwState(pDevEvo, pFlipState, layer)) { + return FALSE; + } } if (!ValidateHDR(pDevEvo, head, pFlipState)) { @@ -1456,6 +1844,10 @@ NvBool nvValidateFlipEvoHwState( return FALSE; } + if (!ValidateHeadLutHwState(pDevEvo, pFlipState)) { + return FALSE; + } + /* XXX NVKMS TODO: validate cursor x,y against current viewport in? */ return ValidateUsageBounds(pDevEvo, @@ -1531,12 +1923,12 @@ static inline NvU32 MinCvToVal(NvU32 cv, NvU32 maxCLL) softfloat_round_near_even, FALSE); } -static void UpdateHDR(NVDevEvoPtr pDevEvo, - const NVFlipEvoHwState *pFlipState, - const NvU32 sd, - const NvU32 head, - const NVT_HDR_STATIC_METADATA *pHdrInfo, - NVEvoUpdateState *updateState) +static NvBool UpdateHDR(NVDevEvoPtr pDevEvo, + const NVFlipEvoHwState *pFlipState, + const NvU32 sd, + const NvU32 head, + const NVT_HDR_STATIC_METADATA *pHdrInfo, + NVEvoUpdateState *updateState) { NVDispEvoPtr pDispEvo = pDevEvo->gpus[sd].pDispEvo; NVDispHeadStateEvoRec *pHeadState = &pDispEvo->headState[head]; @@ -1663,10 +2055,7 @@ static void UpdateHDR(NVDevEvoPtr pDevEvo, dirty = TRUE; } - if (dirty) { - // Update OCSC / OLUT - nvEvoSetLUTContextDma(pDispEvo, head, updateState); - } + return dirty; } /*! @@ -1695,6 +2084,7 @@ void nvFlipEvoOneHead( NVEvoSubDevHeadStateRec *pSdHeadState = &pDevEvo->gpus[sd].headState[head]; NvU32 layer; + NvBool hdrDirty; /* * Provide the pre-update hardware state (in pSdHeadState) and the new @@ -1719,6 +2109,11 @@ void nvFlipEvoOneHead( pSdHeadState->cursor = pFlipState->cursor; } + if (pFlipState->dirty.olut) { + pSdHeadState->outputLut = pFlipState->outputLut; + pSdHeadState->olutFpNormScale = pFlipState->olutFpNormScale; + } + for (layer = 0; layer < pDevEvo->head[head].numLayers; layer++) { if (pFlipState->dirty.layer[layer]) { pSdHeadState->layer[layer] = pFlipState->layer[layer]; @@ -1750,7 +2145,17 @@ void nvFlipEvoOneHead( pFlipState->cursor.y); } - UpdateHDR(pDevEvo, pFlipState, sd, head, pHdrInfo, updateState); + hdrDirty = UpdateHDR(pDevEvo, pFlipState, sd, head, pHdrInfo, updateState); + + if (pFlipState->dirty.olut || hdrDirty) { + nvPushEvoSubDevMask(pDevEvo, NVBIT(sd)); + pDevEvo->hal->SetOutputLut(pDevEvo, sd, head, + &pFlipState->outputLut, + pFlipState->olutFpNormScale, + updateState, + bypassComposition); + nvPopEvoSubDevMask(pDevEvo); + } for (layer = 0; layer < pDevEvo->head[head].numLayers; layer++) { if (!pFlipState->dirty.layer[layer]) { @@ -1825,6 +2230,10 @@ void nvUpdateSurfacesFlipRefCount( pDevEvo, pFlipState->cursor.pSurfaceEvo, increase); + ChangeSurfaceFlipRefCount( + pDevEvo, + pFlipState->outputLut.pLutSurfaceEvo, + increase); for (i = 0; i < pDevEvo->head[head].numLayers; i++) { NVFlipChannelEvoHwState *pLayerFlipState = &pFlipState->layer[i]; @@ -1841,6 +2250,14 @@ void nvUpdateSurfacesFlipRefCount( pDevEvo, pLayerFlipState->completionNotifier.surface.pSurfaceEvo, increase); + ChangeSurfaceFlipRefCount( + pDevEvo, + pLayerFlipState->inputLut.pLutSurfaceEvo, + increase); + ChangeSurfaceFlipRefCount( + pDevEvo, + pLayerFlipState->tmoLut.pLutSurfaceEvo, + increase); if (!pLayerFlipState->syncObject.usingSyncpt) { ChangeSurfaceFlipRefCount( @@ -2567,11 +2984,6 @@ void nvPreFlip(NVDevEvoRec *pDevEvo, head, &pWorkArea->sd[sd].head[head].newState, NV_TRUE); - - nvRefTmoLutSurfacesEvo( - pDevEvo, - &pWorkArea->sd[sd].head[head].newState, - head); } } @@ -2668,11 +3080,6 @@ void nvPostFlip(NVDevEvoRec *pDevEvo, head, &pWorkArea->sd[sd].head[head].oldState, NV_FALSE); - - nvUnrefTmoLutSurfacesEvo( - pDevEvo, - &pWorkArea->sd[sd].head[head].oldState, - head); } } @@ -2806,8 +3213,9 @@ NvBool nvAssignNVFlipEvoHwState(NVDevEvoRec *pDevEvo, &pHeadState->timings.viewPort.possibleUsage; if (!nvUpdateFlipEvoHwState(pOpenDev, pDevEvo, sd, head, pParams, - &pHeadState->timings, pHeadState->tilePosition, - pFlipHwState, allowVrr)) { + &pHeadState->timings, + pHeadState->mergeHeadSection, pFlipHwState, + allowVrr)) { return FALSE; } @@ -2818,10 +3226,6 @@ NvBool nvAssignNVFlipEvoHwState(NVDevEvoRec *pDevEvo, return FALSE; } - if (!nvSetTmoLutSurfacesEvo(pDevEvo, pFlipHwState, head)) { - return FALSE; - } - return TRUE; } diff --git a/src/nvidia-modeset/src/nvkms-lut.c b/src/nvidia-modeset/src/nvkms-lut.c index bfc6d395e6..be18776e83 100644 --- a/src/nvidia-modeset/src/nvkms-lut.c +++ b/src/nvidia-modeset/src/nvkms-lut.c @@ -25,57 +25,82 @@ #include "nvkms-rm.h" #include "nvkms-rmapi.h" #include "nvkms-dma.h" +#include "nvkms-surface.h" +#include "nvkms-private.h" #include "nvkms-utils.h" +#include "nvkms-headsurface.h" #include "nvos.h" #include /* NV01_MEMORY_LOCAL_USER */ -static void FreeLutSurfaceEvoInVidmem(NVLutSurfaceEvoPtr pSurfEvo) +static void FreeLutSurfaceEvo(NVDevEvoPtr pDevEvo, NVSurfaceEvoPtr pSurfEvo) { - NVDevEvoPtr pDevEvo; - if (pSurfEvo == NULL) { return; } - pDevEvo = pSurfEvo->pDevEvo; + nvAssert(pSurfEvo->rmRefCnt == 1); + nvAssert(pSurfEvo->structRefCnt == 1); - if (pSurfEvo->gpuAddress) { - nvRmApiUnmapMemoryDma(nvEvoGlobal.clientHandle, - pDevEvo->deviceHandle, - pDevEvo->nvkmsGpuVASpace, - pSurfEvo->handle, - 0, - (NvU64)pSurfEvo->gpuAddress); - } + nvEvoUnregisterSurface(pDevEvo, + pDevEvo->pNvKmsOpenDev, + pSurfEvo->owner.surfaceHandle, + TRUE /* skipUpdate */); +} - nvRmEvoUnMapVideoMemory(pDevEvo, pSurfEvo->handle, - pSurfEvo->subDeviceAddress); +static NVSurfaceEvoPtr RegisterLutSurfaceEvo(NVDevEvoPtr pDevEvo, NvU32 memoryHandle) +{ + struct NvKmsRegisterSurfaceParams registerSurfaceParams = { }; + const NVEvoApiHandlesRec *pSurfaceHandles; + NvU64 size = (sizeof(NVEvoLutDataRec) + 63) & ~63; + NVSurfaceEvoPtr pSurfEvo = NULL; - /* Free surface descriptor */ - pDevEvo->hal->FreeSurfaceDescriptor(pDevEvo, - nvEvoGlobal.clientHandle, - &pSurfEvo->surfaceDesc); + registerSurfaceParams.request.deviceHandle = pDevEvo->deviceHandle; + registerSurfaceParams.request.useFd = FALSE; + registerSurfaceParams.request.rmClient = nvEvoGlobal.clientHandle; - /* Free the surface */ - if (pSurfEvo->handle) { - NvU32 result; + registerSurfaceParams.request.planes[0].u.rmObject = memoryHandle; + registerSurfaceParams.request.planes[0].offset = 0; + registerSurfaceParams.request.planes[0].pitch = (size + 255) & ~255; + registerSurfaceParams.request.planes[0].rmObjectSizeInBytes = size; - result = nvRmApiFree(nvEvoGlobal.clientHandle, - pDevEvo->deviceHandle, pSurfEvo->handle); - if (result != NVOS_STATUS_SUCCESS) { - nvAssert(!"Freeing LUT surface failed"); - } + registerSurfaceParams.request.widthInPixels = (size + 7) >> 3; /* TODO: Check on this */ + registerSurfaceParams.request.heightInPixels = 1; + + registerSurfaceParams.request.layout = NvKmsSurfaceMemoryLayoutPitch; + registerSurfaceParams.request.format = NvKmsSurfaceMemoryFormatR16G16B16A16; + + registerSurfaceParams.request.noDisplayHardwareAccess = FALSE; + registerSurfaceParams.request.noDisplayCaching = FALSE; - nvFreeUnixRmHandle(&pDevEvo->handleAllocator, - pSurfEvo->handle); - pSurfEvo->handle = 0; + registerSurfaceParams.request.isoType = NVKMS_MEMORY_ISO; + registerSurfaceParams.request.log2GobsPerBlockY = 0; + + /* + * Although the caller may like a GPU mapping, we pass + * NvHsMapPermissionsNone so failing the mapping doesn't fail the surface + * creation. + */ + nvEvoRegisterSurface(pDevEvo, + pDevEvo->pNvKmsOpenDev, + ®isterSurfaceParams, + NvHsMapPermissionsNone); + + if (registerSurfaceParams.reply.surfaceHandle == 0) { + return NULL; } - nvFree(pSurfEvo); + pSurfaceHandles = nvGetSurfaceHandlesFromOpenDevConst(pDevEvo->pNvKmsOpenDev); + pSurfEvo = + nvEvoGetSurfaceFromHandle(pDevEvo, + pSurfaceHandles, + registerSurfaceParams.reply.surfaceHandle, + FALSE /* isUsedByCursorChannel */, + TRUE /* isUsedByLayerChannel */); + return pSurfEvo; } -static NVLutSurfaceEvoPtr AllocLutSurfaceEvoInVidmem(NVDevEvoPtr pDevEvo) +static NVSurfaceEvoPtr AllocLutSurfaceEvoInVidmem(NVDevEvoPtr pDevEvo) { NV_MEMORY_ALLOCATION_PARAMS memAllocParams = { }; NvU32 ret = NVOS_STATUS_ERROR_GENERIC; @@ -83,26 +108,16 @@ static NVLutSurfaceEvoPtr AllocLutSurfaceEvoInVidmem(NVDevEvoPtr pDevEvo) NvU32 allocFlags = NVOS32_ALLOC_FLAGS_FORCE_MEM_GROWS_DOWN | NVOS32_ALLOC_FLAGS_ALIGNMENT_FORCE; NvU64 size = 0, alignment = 4096; + NvU32 memoryHandle = 0; + NVSurfaceEvoPtr pSurfEvo = NULL; - NVLutSurfaceEvoPtr pSurfEvo; - - pSurfEvo = nvCalloc(1, sizeof(*pSurfEvo)); - if (pSurfEvo == NULL) { - return NULL; - } - - pSurfEvo->pDevEvo = pDevEvo; - - size = (sizeof(NVEvoLutDataRec) + 63) & ~63; - - pSurfEvo->size = size; - - pSurfEvo->handle = nvGenerateUnixRmHandle(&pDevEvo->handleAllocator); + memoryHandle = nvGenerateUnixRmHandle(&pDevEvo->handleAllocator); - if (pSurfEvo->handle == 0) { + if (memoryHandle == 0) { goto fail; } + size = (sizeof(NVEvoLutDataRec) + 63) & ~63; attr = FLD_SET_DRF(OS32, _ATTR, _LOCATION, _VIDMEM, attr); attr2 = FLD_SET_DRF(OS32, _ATTR2, _GPU_CACHEABLE, _DEFAULT, attr2); @@ -121,34 +136,39 @@ static NVLutSurfaceEvoPtr AllocLutSurfaceEvoInVidmem(NVDevEvoPtr pDevEvo) ret = nvRmApiAlloc(nvEvoGlobal.clientHandle, pDevEvo->deviceHandle, - pSurfEvo->handle, + memoryHandle, NV01_MEMORY_LOCAL_USER, &memAllocParams); /* If we failed the allocation above, abort */ if (ret != NVOS_STATUS_SUCCESS) { - nvFreeUnixRmHandle(&pDevEvo->handleAllocator, pSurfEvo->handle); - pSurfEvo->handle = 0; + nvFreeUnixRmHandle(&pDevEvo->handleAllocator, memoryHandle); goto fail; } - /* Allocate and bind surface descriptor */ - ret = - nvRmAllocAndBindSurfaceDescriptor( - pDevEvo, - pSurfEvo->handle, - NvKmsSurfaceMemoryLayoutPitch, - pSurfEvo->size - 1, - &pSurfEvo->surfaceDesc); - if (ret != NVOS_STATUS_SUCCESS) { + pSurfEvo = RegisterLutSurfaceEvo(pDevEvo, memoryHandle); + /* + * nvEvoRegisterSurface dups the memory handle, so we free the one we + * just created. + */ + nvRmApiFree(nvEvoGlobal.clientHandle, + pDevEvo->deviceHandle, + memoryHandle); + nvFreeUnixRmHandle(&pDevEvo->handleAllocator, memoryHandle); + memoryHandle = 0; + + if (pSurfEvo == NULL) { goto fail; } - /* Map the surface for the CPU */ - if (!nvRmEvoMapVideoMemory(pSurfEvo->pDevEvo, - pSurfEvo->handle, pSurfEvo->size, - pSurfEvo->subDeviceAddress, + /* + * Map the surface for the CPU. This is only done by nvEvoRegisterSurface + * for NISO surfaces, so it must be done manually here. + */ + if (!nvRmEvoMapVideoMemory(pDevEvo, + pSurfEvo->planes[0].rmHandle, + size, pSurfEvo->cpuAddress, SUBDEVICE_MASK_ALL)) { goto fail; } @@ -157,98 +177,31 @@ static NVLutSurfaceEvoPtr AllocLutSurfaceEvoInVidmem(NVDevEvoPtr pDevEvo) * The GPU mapping is only needed for prefetching LUT surfaces for DIFR. * It isn't worth failing alone but we want to keep gpuAddress coherent. */ - ret = nvRmApiMapMemoryDma(nvEvoGlobal.clientHandle, - pDevEvo->deviceHandle, - pDevEvo->nvkmsGpuVASpace, - pSurfEvo->handle, - 0, - pSurfEvo->size, - DRF_DEF(OS46, _FLAGS, _CACHE_SNOOP, _ENABLE) | - DRF_DEF(OS46, _FLAGS, _ACCESS, _READ_ONLY), - &pSurfEvo->gpuAddress); + pSurfEvo->gpuAddress = nvHsMapSurfaceToDevice(pDevEvo, + pSurfEvo->planes[0].rmHandle, + size, + NvHsMapPermissionsReadOnly); - if (ret != NVOS_STATUS_SUCCESS) { + if (pSurfEvo->gpuAddress == NV_HS_BAD_GPU_ADDRESS) { pSurfEvo->gpuAddress = 0ULL; } return pSurfEvo; - fail: +fail: /* An error occurred -- free the surface */ - FreeLutSurfaceEvoInVidmem(pSurfEvo); + FreeLutSurfaceEvo(pDevEvo, pSurfEvo); return NULL; - -} - -static void FreeLutSurfaceEvoInSysmem(NVLutSurfaceEvoPtr pSurfEvo) -{ - NVDevEvoPtr pDevEvo; - - if (pSurfEvo == NULL) { - return; - } - - pDevEvo = pSurfEvo->pDevEvo; - - /* Free surface descriptor */ - pDevEvo->hal->FreeSurfaceDescriptor(pDevEvo, - nvEvoGlobal.clientHandle, - &pSurfEvo->surfaceDesc); - - /* Free the surface */ - if (pSurfEvo->handle) { - NvU32 result; - - if (pSurfEvo->subDeviceAddress[0] != NULL) { - /* - * SOC display devices should only have one subdevice - * (and therefore it is safe to unmap only subDeviceAddress[0]) - * for reasons described in AllocLutSurfaceEvoInSysmem - */ - nvAssert(pDevEvo->numSubDevices == 1); - - result = nvRmApiUnmapMemory(nvEvoGlobal.clientHandle, - pDevEvo->deviceHandle, - pSurfEvo->handle, - pSurfEvo->subDeviceAddress[0], - 0); - if (result != NVOS_STATUS_SUCCESS) { - nvAssert(!"Unmapping LUT surface failed"); - } - pSurfEvo->subDeviceAddress[0] = NULL; - } - - result = nvRmApiFree(nvEvoGlobal.clientHandle, - pDevEvo->deviceHandle, pSurfEvo->handle); - if (result != NVOS_STATUS_SUCCESS) { - nvAssert(!"Freeing LUT surface failed"); - } - - nvFreeUnixRmHandle(&pDevEvo->handleAllocator, pSurfEvo->handle); - } - - nvFree(pSurfEvo); } -static NVLutSurfaceEvoPtr AllocLutSurfaceEvoInSysmem(NVDevEvoPtr pDevEvo) +static NVSurfaceEvoPtr AllocLutSurfaceEvoInSysmem(NVDevEvoPtr pDevEvo) { NvU32 memoryHandle = 0; void *pBase = NULL; - NvU64 size = 0; - NVLutSurfaceEvoPtr pSurfEvo; - NvU32 ret; - - pSurfEvo = nvCalloc(1, sizeof(*pSurfEvo)); - if (pSurfEvo == NULL) { - return NULL; - } - - pSurfEvo->pDevEvo = pDevEvo; - - size = (sizeof(NVEvoLutDataRec) + 63) & ~63; - - pSurfEvo->size = size; + NvU64 size = (sizeof(NVEvoLutDataRec) + 63) & ~63; + NVSurfaceEvoPtr pSurfEvo = NULL; + NvU32 ret = 0; memoryHandle = nvGenerateUnixRmHandle(&pDevEvo->handleAllocator); if (memoryHandle == 0) { @@ -265,16 +218,35 @@ static NVLutSurfaceEvoPtr AllocLutSurfaceEvoInSysmem(NVDevEvoPtr pDevEvo) goto fail; } - pSurfEvo->handle = memoryHandle; + pSurfEvo = RegisterLutSurfaceEvo(pDevEvo, memoryHandle); + + /* + * nvEvoRegisterSurface dups the memory handle, so we can free the one we + * just created. + */ + nvRmApiUnmapMemory(nvEvoGlobal.clientHandle, + pDevEvo->deviceHandle, + memoryHandle, + pBase, + 0 /* flags */); - /* Allocate and bind surface descriptor */ - ret = - nvRmAllocAndBindSurfaceDescriptor( - pDevEvo, - pSurfEvo->handle, - NvKmsSurfaceMemoryLayoutPitch, - pSurfEvo->size - 1, - &pSurfEvo->surfaceDesc); + nvRmApiFree(nvEvoGlobal.clientHandle, + pDevEvo->deviceHandle, + memoryHandle); + nvFreeUnixRmHandle(&pDevEvo->handleAllocator, memoryHandle); + memoryHandle = 0; + + if (pSurfEvo == NULL) { + goto fail; + } + + ret = nvRmApiMapMemory(nvEvoGlobal.clientHandle, + pDevEvo->deviceHandle, + pSurfEvo->planes[0].rmHandle, + 0, /* offset */ + size, + &pBase, + 0 /* flags */); if (ret != NVOS_STATUS_SUCCESS) { goto fail; @@ -287,35 +259,18 @@ static NVLutSurfaceEvoPtr AllocLutSurfaceEvoInSysmem(NVDevEvoPtr pDevEvo) * subdevice. */ nvAssert(pDevEvo->numSubDevices == 1); - pSurfEvo->subDeviceAddress[0] = pBase; + pSurfEvo->cpuAddress[0] = pBase; return pSurfEvo; - fail: +fail: /* An error occurred -- free the surface */ - FreeLutSurfaceEvoInSysmem(pSurfEvo); + FreeLutSurfaceEvo(pDevEvo, pSurfEvo); return NULL; } -static void FreeLutSurfaceEvo(NVLutSurfaceEvoPtr pSurfEvo) -{ - NVDevEvoPtr pDevEvo; - - if (pSurfEvo == NULL) { - return; - } - - pDevEvo = pSurfEvo->pDevEvo; - - if (pDevEvo->requiresAllAllocationsInSysmem) { - FreeLutSurfaceEvoInSysmem(pSurfEvo); - } else { - FreeLutSurfaceEvoInVidmem(pSurfEvo); - } -} - -static NVLutSurfaceEvoPtr AllocLutSurfaceEvo(NVDevEvoPtr pDevEvo) +static NVSurfaceEvoPtr AllocLutSurfaceEvo(NVDevEvoPtr pDevEvo) { if (pDevEvo->requiresAllAllocationsInSysmem) { return AllocLutSurfaceEvoInSysmem(pDevEvo); @@ -324,77 +279,69 @@ static NVLutSurfaceEvoPtr AllocLutSurfaceEvo(NVDevEvoPtr pDevEvo) } } -NvBool nvSetTmoLutSurfacesEvo(NVDevEvoPtr pDevEvo, - NVFlipEvoHwState *pFlipState, - NvU32 head) +NvBool nvSetTmoLutSurfaceEvo(NVDevEvoPtr pDevEvo, + NVFlipChannelEvoHwState *pHwState) { - NvU32 layer; - for (layer = 0; layer < pDevEvo->head[head].numLayers; layer++) { - if (pFlipState->layer[layer].hdrStaticMetadata.enabled) { - if (!pFlipState->layer[layer].tmoLut.pLutSurfaceEvo) { - pFlipState->layer[layer].tmoLut.pLutSurfaceEvo = - AllocLutSurfaceEvo(pDevEvo); - if (!pFlipState->layer[layer].tmoLut.pLutSurfaceEvo) { - return FALSE; - } - - // Will be referenced via nvRefTmoLutSurfacesEvo() on new state - pFlipState->layer[layer].tmoLut.pLutSurfaceEvo->allocRefCnt = 0; + if (pHwState->hdrStaticMetadata.enabled) { + if (!pHwState->tmoLut.pLutSurfaceEvo) { + pHwState->tmoLut.pLutSurfaceEvo = AllocLutSurfaceEvo(pDevEvo); + if (!pHwState->tmoLut.pLutSurfaceEvo) { + return FALSE; } - } else { - // Will be freed via nvUnrefTmoLutSurfacesEvo() on old state - pFlipState->layer[layer].tmoLut.pLutSurfaceEvo = NULL; } + } else { + // Will be freed via nvEvoDecrementSurfaceRefCnts() and + // nvFreeUnrefedTmoLutSurfacesEvo() on old state + pHwState->tmoLut.pLutSurfaceEvo = NULL; } return TRUE; } -void nvRefTmoLutSurfacesEvo(NVDevEvoPtr pDevEvo, - NVFlipEvoHwState *pFlipState, - NvU32 head) +/* + * After the flip dereferences its TMO surfaces, or when it fails after TMO + * surface allocation, any unused TMO surfaces are left with 1 refcount. If + * these TMO surfaces are owned by the pDevEvo's pNvKmsOpenDev, then they have + * been allocated within this file and need to be freed. If not, they have been + * allocated by an NvKms client, which is in charge of freeing them. + * + * Only call FreeLutSurfaceEvo in the first case. + */ +void nvFreeUnrefedTmoLutSurfacesEvo(NVDevEvoPtr pDevEvo, + NVFlipEvoHwState *pFlipState, + NvU32 head) { - // Reference new state layers that have hdrStaticMetadata enabled. NvU32 layer; for (layer = 0; layer < pDevEvo->head[head].numLayers; layer++) { - if (pFlipState->layer[layer].hdrStaticMetadata.enabled) { - nvAssert(pFlipState->layer[layer].tmoLut.pLutSurfaceEvo); - pFlipState->layer[layer].tmoLut.pLutSurfaceEvo->allocRefCnt++; + if (pFlipState->layer[layer].tmoLut.pLutSurfaceEvo != NULL && + pFlipState->layer[layer].tmoLut.pLutSurfaceEvo->structRefCnt <= 1) { + + if (pFlipState->layer[layer].tmoLut.pLutSurfaceEvo->owner.pOpenDev == + pDevEvo->pNvKmsOpenDev) { + + FreeLutSurfaceEvo(pDevEvo, + pFlipState->layer[layer].tmoLut.pLutSurfaceEvo); + } + pFlipState->layer[layer].tmoLut.pLutSurfaceEvo = NULL; } } } -void nvUnrefTmoLutSurfacesEvo(NVDevEvoPtr pDevEvo, - NVFlipEvoHwState *pFlipState, - NvU32 head) +void nvInvalidateDefaultLut(NVDevEvoPtr pDevEvo) { - // Unref old state layers that had hdrStaticMetadata enabled. - NvU32 layer; - for (layer = 0; layer < pDevEvo->head[head].numLayers; layer++) { - if (pFlipState->layer[layer].hdrStaticMetadata.enabled) { - nvAssert(pFlipState->layer[layer].tmoLut.pLutSurfaceEvo); + NvU32 sd; - if (pFlipState->layer[layer].tmoLut.pLutSurfaceEvo->allocRefCnt <= 1) { - // Wait for any outstanding LUT updates before freeing. - if (pDevEvo->core) { - nvRMSyncEvoChannel(pDevEvo, pDevEvo->core, __LINE__); - } - - FreeLutSurfaceEvo( - pFlipState->layer[layer].tmoLut.pLutSurfaceEvo); - - pFlipState->layer[layer].tmoLut.pLutSurfaceEvo = NULL; - } else { - pFlipState->layer[layer].tmoLut.pLutSurfaceEvo->allocRefCnt--; - } - } + for (sd = 0; sd < NVKMS_MAX_SUBDEVICES; sd++) { + pDevEvo->lut.defaultBaseLUTState[sd] = + pDevEvo->lut.defaultOutputLUTState[sd] = + NvKmsLUTStateUninitialized; } } NvBool nvAllocLutSurfacesEvo(NVDevEvoPtr pDevEvo) { NVDispEvoPtr pDispEvo; - NvU32 apiHead, dispIndex, i, sd; + NvU32 apiHead, dispIndex, i; for (apiHead = 0; apiHead < pDevEvo->numApiHeads; apiHead++) { for (i = 0; i < ARRAY_LEN(pDevEvo->lut.apiHead[apiHead].LUT); i++) { @@ -425,11 +372,7 @@ NvBool nvAllocLutSurfacesEvo(NVDevEvoPtr pDevEvo) return FALSE; } - for (sd = 0; sd < NVKMS_MAX_SUBDEVICES; sd++) { - pDevEvo->lut.defaultBaseLUTState[sd] = - pDevEvo->lut.defaultOutputLUTState[sd] = - NvKmsLUTStateUninitialized; - } + nvInvalidateDefaultLut(pDevEvo); pDevEvo->hal->InitDefaultLut(pDevEvo); } @@ -464,21 +407,21 @@ void nvFreeLutSurfacesEvo(NVDevEvoPtr pDevEvo) } if (pDevEvo->lut.defaultLut != NULL) { - FreeLutSurfaceEvo(pDevEvo->lut.defaultLut); + FreeLutSurfaceEvo(pDevEvo, pDevEvo->lut.defaultLut); pDevEvo->lut.defaultLut = NULL; } for (apiHead = 0; apiHead < pDevEvo->numApiHeads; apiHead++) { for (i = 0; i < ARRAY_LEN(pDevEvo->lut.apiHead[apiHead].LUT); i++) { if (pDevEvo->lut.apiHead[apiHead].LUT[i] != NULL) { - FreeLutSurfaceEvo(pDevEvo->lut.apiHead[apiHead].LUT[i]); + FreeLutSurfaceEvo(pDevEvo, pDevEvo->lut.apiHead[apiHead].LUT[i]); pDevEvo->lut.apiHead[apiHead].LUT[i] = NULL; } } } } -void nvUploadDataToLutSurfaceEvo(NVLutSurfaceEvoPtr pSurfEvo, +void nvUploadDataToLutSurfaceEvo(NVSurfaceEvoPtr pSurfEvo, const NVEvoLutDataRec *pLUTBuffer, NVDispEvoPtr pDispEvo) { @@ -494,18 +437,18 @@ void nvUploadDataToLutSurfaceEvo(NVLutSurfaceEvoPtr pSurfEvo, return; } - nvAssert(pSurfEvo->subDeviceAddress[sd]); + nvAssert(pSurfEvo->cpuAddress[sd]); /* The size to copy should not be larger than the surface. */ - nvAssert(size <= pSurfEvo->size); + nvAssert(size <= pSurfEvo->planes[0].rmObjectSizeInBytes); /* The source, destination, and size should be 4-byte aligned. */ nvAssert((((NvUPtr)data) & 0x3) == 0); - nvAssert((((NvUPtr)pSurfEvo->subDeviceAddress[sd]) & 0x3) == 0); + nvAssert((((NvUPtr)pSurfEvo->cpuAddress[sd]) & 0x3) == 0); nvAssert((size % 4) == 0); src = data; - dst = (NvU32*)pSurfEvo->subDeviceAddress[sd]; + dst = (NvU32*)pSurfEvo->cpuAddress[sd]; for (dword = 0; dword < (size/4); dword++) { *(dst++) = *(src++); diff --git a/src/nvidia-modeset/src/nvkms-modeset.c b/src/nvidia-modeset/src/nvkms-modeset.c index fb96ef04ac..90054e927e 100644 --- a/src/nvidia-modeset/src/nvkms-modeset.c +++ b/src/nvidia-modeset/src/nvkms-modeset.c @@ -576,7 +576,8 @@ InitProposedModeSetHwState(const NVDevEvoRec *pDevEvo, nvInitFlipEvoHwState(pDevEvo, sd, head, &pProposed->sd[sd].head[head].flip); - pProposedHead->tilePosition = pHeadState->tilePosition; + pProposedHead->mergeHeadSection = + pHeadState->mergeHeadSection; pProposedHead->timings = pHeadState->timings; pProposedHead->pConnectorEvo = pHeadState->pConnectorEvo; pProposedHead->hdmiFrlConfig = pHeadState->hdmiFrlConfig; @@ -621,6 +622,7 @@ AssignProposedModeSetNVFlipEvoHwState( pFlip->dirty.tf = TRUE; pFlip->dirty.hdrStaticMetadata = TRUE; + pFlip->dirty.olut = TRUE; for (layer = 0; layer < pDevEvo->head[head].numLayers; layer++) { pFlip->dirty.layer[layer] = TRUE; @@ -647,7 +649,7 @@ AssignProposedModeSetNVFlipEvoHwState( head, &pRequestHead->flip, &pProposedHead->timings, - pProposedHead->tilePosition, + pProposedHead->mergeHeadSection, pFlip, FALSE /* allowVrr */)) { return FALSE; @@ -1279,11 +1281,12 @@ AssignProposedModeSetHwState(NVDevEvoRec *pDevEvo, &pProposedDisp->apiHead[apiHead]; const NvU32 primaryHead = nvGetPrimaryHwHeadFromMask(pProposedApiHead->hwHeadsMask); - const NvU32 numTiles = nvPopCount32(pProposedApiHead->hwHeadsMask); + const NvU32 numMergeHeadSections = + nvPopCount32(pProposedApiHead->hwHeadsMask); const NVDpyEvoRec *pDpyEvo = nvGetOneArbitraryDpyEvo(pProposedApiHead->dpyIdList, pDispEvo); NVProposedModeSetHwStateOneHead *pProposedPrimaryHead; - NvU32 secondaryHeadTilePosition = 1; + NvU32 secondaryMergeHeadSection = 1; NvU32 head; nvAssert((pProposedApiHead->hwHeadsMask != 0x0) || @@ -1307,12 +1310,13 @@ AssignProposedModeSetHwState(NVDevEvoRec *pDevEvo, NVProposedModeSetHwStateOneHead *pProposedHead = &pProposedDisp->head[head]; - pProposedHead->tilePosition = - (head == primaryHead) ? 0 : (secondaryHeadTilePosition++); + pProposedHead->mergeHeadSection = + (head == primaryHead) ? 0 : (secondaryMergeHeadSection++); - if (!nvEvoGetSingleTileHwModeTimings(&pProposedApiHead->timings, - numTiles, - &pProposedHead->timings)) { + if (!nvEvoGetSingleMergeHeadSectionHwModeTimings( + &pProposedApiHead->timings, + numMergeHeadSections, + &pProposedHead->timings)) { status = NVKMS_SET_MODE_ONE_HEAD_STATUS_INVALID_MODE; break; } @@ -1443,6 +1447,10 @@ ValidateProposedModeSetHwStateOneDispImp(NVDispEvoPtr pDispEvo, NvU32 head; + if (pProposedApiHead->hwHeadsMask == 0x0) { + continue; + } + /* * Don't try to downgrade heads which are not marked as changed. * This could lead to unchanged/not-requested heads hogging all @@ -1560,7 +1568,7 @@ static NvBool DowngradeColorSpaceAndBpcOneHead( const NvKmsDpyOutputColorFormatInfo supportedColorFormats = nvDpyGetOutputColorFormatInfo(pDpyEvo); - if (!nvDowngradeColorSpaceAndBpc(&supportedColorFormats, &dpyColor)) { + if (!nvDowngradeColorSpaceAndBpc(pDpyEvo, &supportedColorFormats, &dpyColor)) { return FALSE; } @@ -1829,8 +1837,18 @@ static NvBool ValidateProposedModeSetHwStateOneDispDPlib( return dpIsModePossible; } +static NvBool VblankCallbackListsAreEmpty( + const NVDispApiHeadStateEvoRec *pApiHeadState) +{ + ct_assert(ARRAY_LEN(pApiHeadState->vblankCallbackList) == 2); + + return (nvListIsEmpty(&pApiHeadState->vblankCallbackList[0]) && + nvListIsEmpty(&pApiHeadState->vblankCallbackList[1])); +} + static void VBlankCallbackDeferredWork(void *dataPtr, NvU32 data32) { + NVDispApiHeadStateEvoRec *pApiHeadState = NULL; NVVBlankCallbackPtr pVBlankCallbackTmp = NULL; NVVBlankCallbackPtr pVBlankCallback = NULL; NVDispEvoPtr pDispEvo = dataPtr; @@ -1840,11 +1858,22 @@ static void VBlankCallbackDeferredWork(void *dataPtr, NvU32 data32) return; } - nvListForEachEntry_safe(pVBlankCallback, - pVBlankCallbackTmp, - &pDispEvo->apiHeadState[apiHead].vblankCallbackList, - vblankCallbackListEntry) { - pVBlankCallback->pCallback(pDispEvo, pVBlankCallback); + pApiHeadState = &pDispEvo->apiHeadState[apiHead]; + + /* + * Increment the vblankCount here, so that any callbacks in the list can + * rely on the same value. + */ + pApiHeadState->vblankCount++; + + for (NvU32 i = 0; i < ARRAY_LEN(pApiHeadState->vblankCallbackList); i++) { + + nvListForEachEntry_safe(pVBlankCallback, + pVBlankCallbackTmp, + &pApiHeadState->vblankCallbackList[i], + vblankCallbackListEntry) { + pVBlankCallback->pCallback(pDispEvo, pVBlankCallback); + } } } @@ -1859,6 +1888,64 @@ static void VBlankCallback(void *pParam1, void *pParam2) 0); /* timeout: schedule the work immediately */ } + +static void DisableVBlankCallbacks(const NVDevEvoRec *pDevEvo) +{ + NvU32 dispIndex; + NVDispEvoPtr pDispEvo; + + FOR_ALL_EVO_DISPLAYS(pDispEvo, dispIndex, pDevEvo) { + + NvU32 apiHead; + + for (apiHead = 0; apiHead < pDevEvo->numApiHeads; apiHead++) { + + NVDispApiHeadStateEvoRec *pApiHeadState = + &pDispEvo->apiHeadState[apiHead]; + + if (pApiHeadState->rmVBlankCallbackHandle != 0) { + nvRmRemoveVBlankCallback(pDispEvo, + pApiHeadState->rmVBlankCallbackHandle); + pApiHeadState->rmVBlankCallbackHandle = 0; + } + } + } +} + +static void EnableVBlankCallbacks(const NVDevEvoRec *pDevEvo) +{ + NvU32 dispIndex; + NVDispEvoPtr pDispEvo; + + FOR_ALL_EVO_DISPLAYS(pDispEvo, dispIndex, pDevEvo) { + + NvU32 apiHead; + + for (apiHead = 0; apiHead < pDevEvo->numApiHeads; apiHead++) { + + NVDispApiHeadStateEvoRec *pApiHeadState = + &pDispEvo->apiHeadState[apiHead]; + + nvAssert(pApiHeadState->rmVBlankCallbackHandle == 0); + + if (VblankCallbackListsAreEmpty(pApiHeadState)) { + continue; + } + + const NvU32 hwHead = + nvGetPrimaryHwHeadFromMask(pApiHeadState->hwHeadsMask); + + if (hwHead == NV_INVALID_HEAD) { + continue; + } + + pApiHeadState->rmVBlankCallbackHandle = + nvRmAddVBlankCallback(pDispEvo, hwHead, + VBlankCallback, (void *)(NvUPtr)apiHead); + } + } +} + /*! * Validate the proposed configuration on the specified disp. * @@ -2399,7 +2486,7 @@ ApplyProposedModeSetHwStateOneHeadShutDown( pHeadState->pConnectorEvo = NULL; pHeadState->bypassComposition = FALSE; - pHeadState->tilePosition = 0; + pHeadState->mergeHeadSection = 0; nvkms_memset(&pHeadState->timings, 0, sizeof(pHeadState->timings)); pHeadState->activeRmId = 0; @@ -2507,12 +2594,6 @@ ApplyProposedModeSetStateOneApiHeadShutDown( DisableActiveCoreRGSyncObjects(pDispEvo, apiHead, &pWorkArea->modesetUpdateState.updateState); - if (pApiHeadState->rmVBlankCallbackHandle != 0) { - nvRmRemoveVBlankCallback(pDispEvo, - pApiHeadState->rmVBlankCallbackHandle); - pApiHeadState->rmVBlankCallbackHandle = 0; - } - nvDisable3DVisionAegis(pDpyEvo); /* Cancel any pending LUT updates. */ @@ -2632,7 +2713,7 @@ ApplyProposedModeSetHwStateOneHeadPreUpdate( pHeadState->bypassComposition = bypassComposition; pHeadState->activeRmId = pProposedApiHead->activeRmId; pHeadState->pConnectorEvo = pProposedHead->pConnectorEvo; - pHeadState->tilePosition = pProposedHead->tilePosition; + pHeadState->mergeHeadSection = pProposedHead->mergeHeadSection; pHeadState->timings = pProposedHead->timings; pHeadState->dscInfo = pProposedApiHead->dscInfo; pHeadState->hdmiFrlConfig = pProposedHead->hdmiFrlConfig; @@ -2640,9 +2721,6 @@ ApplyProposedModeSetHwStateOneHeadPreUpdate( nvEvoDpyColorToPixelDepth(&pProposedApiHead->attributes.color); pHeadState->audio = pProposedHead->audio; - /* Update current LUT to hardware */ - nvEvoSetLUTContextDma(pDispEvo, head, updateState); - nvEvoSetTimings(pDispEvo, head, updateState); nvSetDitheringEvo(pDispEvo, @@ -2650,7 +2728,10 @@ ApplyProposedModeSetHwStateOneHeadPreUpdate( &pProposedApiHead->attributes.dithering, updateState); - nvEvoHeadSetControlOR(pDispEvo, head, updateState); + nvEvoHeadSetControlOR(pDispEvo, + head, + &pProposedApiHead->attributes.color, + updateState); /* Update hardware's current colorSpace and colorRange */ nvUpdateCurrentHardwareColorSpaceAndRangeEvo(pDispEvo, @@ -2816,13 +2897,6 @@ ApplyProposedModeSetStateOneApiHeadPreUpdate( */ ReEnableActiveCoreRGSyncObjects(pDispEvo, apiHead, updateState); - nvAssert(pApiHeadState->rmVBlankCallbackHandle == 0); - if (!nvListIsEmpty(&pApiHeadState->vblankCallbackList)) { - pApiHeadState->rmVBlankCallbackHandle = - nvRmAddVBlankCallback(pDispEvo, proposedPrimaryHead, - VBlankCallback, (void *)(NvUPtr)apiHead); - } - pApiHeadState->attributes = pProposedApiHead->attributes; pApiHeadState->tf = pProposedApiHead->tf; pApiHeadState->hdrInfoFrameOverride = @@ -3857,6 +3931,8 @@ NvBool nvSetDispModeEvo(NVDevEvoPtr pDevEvo, BeginEndModeset(pDevEvo, pProposed, BEGIN_MODESET); + DisableVBlankCallbacks(pDevEvo); + nvEvoLockStatePreModeset(pDevEvo); nvEvoRemoveOverlappingFlipLockRequestGroupsForModeset(pDevEvo, pRequest); @@ -3885,6 +3961,8 @@ NvBool nvSetDispModeEvo(NVDevEvoPtr pDevEvo, nvEvoLockStatePostModeset(pDevEvo, doRasterLock); + EnableVBlankCallbacks(pDevEvo); + /* * The modeset was successful: if headSurface was used as part of this * modeset, record that in the pDevEvo. @@ -3953,6 +4031,7 @@ NvBool nvSetDispModeEvo(NVDevEvoPtr pDevEvo, * \param[in] pCallback The function to call when vblank is reached on the * provided pDispEvo+head combination. * \param[in] pUserData A pointer to caller-provided custom data. + * \param[in] listIndex Which vblankCallbackList[] array to add this callback into. * * \return Returns a pointer to a NVVBlankCallbackRec structure if the * registration was successful. Otherwise, return NULL. @@ -3961,7 +4040,8 @@ NVVBlankCallbackPtr nvApiHeadRegisterVBlankCallback(NVDispEvoPtr pDispEvo, const NvU32 apiHead, NVVBlankCallbackProc pCallback, - void *pUserData) + void *pUserData, + NvU8 listIndex) { /* * All the hardware heads mapped on the input api head should be @@ -3982,8 +4062,9 @@ nvApiHeadRegisterVBlankCallback(NVDispEvoPtr pDispEvo, pVBlankCallback->pUserData = pUserData; pVBlankCallback->apiHead = apiHead; + /* append to the tail of the list */ nvListAppend(&pVBlankCallback->vblankCallbackListEntry, - &pApiHeadState->vblankCallbackList); + &pApiHeadState->vblankCallbackList[listIndex]); nvAssert((head != NV_INVALID_HEAD) || (pApiHeadState->rmVBlankCallbackHandle == 0)); @@ -4020,7 +4101,7 @@ void nvApiHeadUnregisterVBlankCallback(NVDispEvoPtr pDispEvo, (pApiHeadState->rmVBlankCallbackHandle == 0)); // If there are no more callbacks, disable the RM-level callback - if (nvListIsEmpty(&pApiHeadState->vblankCallbackList) && + if (VblankCallbackListsAreEmpty(pApiHeadState) && (head != NV_INVALID_HEAD) && (pApiHeadState->rmVBlankCallbackHandle != 0)) { nvRmRemoveVBlankCallback(pDispEvo, diff --git a/src/nvidia-modeset/src/nvkms-prealloc.c b/src/nvidia-modeset/src/nvkms-prealloc.c index fbf661901c..0c994976c8 100644 --- a/src/nvidia-modeset/src/nvkms-prealloc.c +++ b/src/nvidia-modeset/src/nvkms-prealloc.c @@ -25,6 +25,7 @@ #include "nvkms-flip-workarea.h" #include "nvkms-modeset-types.h" #include "nvkms-modeset-workarea.h" +#include "nvkms-setlut-workarea.h" #include "nvkms-prealloc.h" #include "nvkms-utils.h" @@ -64,6 +65,8 @@ static size_t GetSizeForType(NVDevEvoPtr pDevEvo, enum NVPreallocType type) return sizeof(struct NvKmsUsageBounds); case PREALLOC_TYPE_DPLIB_IS_MODE_POSSIBLE_PARAMS: return sizeof(NVDpLibIsModePossibleParamsRec); + case PREALLOC_TYPE_SET_LUT_WORK_AREA: + return sizeof(struct NvKmsSetLutWorkArea); case PREALLOC_TYPE_MAX: /* Not a real option, but added for -Wswitch-enum */ break; diff --git a/src/nvidia-modeset/src/nvkms-rm.c b/src/nvidia-modeset/src/nvkms-rm.c index 22eeec5328..a39d427edb 100644 --- a/src/nvidia-modeset/src/nvkms-rm.c +++ b/src/nvidia-modeset/src/nvkms-rm.c @@ -72,6 +72,7 @@ #include /* NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID */ #include /* NV0073_CTRL_CMD_SPECIFIC_OR_GET_INFO */ #include /* NV0073_CTRL_CMD_SYSTEM_GET_SUPPORTED */ +#include /* NV0076_CTRL_CMD_NOTIFY_CONSOLE_DISABLED */ #include /* NV0080_CTRL_CMD_GPU_SET_DISPLAY_OWNER */ #include /* NV0080_CTRL_CMD_GR_GET_CAPS_V2 */ #include /* NV0080_CTRL_CMD_OS_UNIX_VT_SWITCH */ @@ -3284,6 +3285,9 @@ static NVEvoChannel* EvoAllocateCoreChannel(NVDevEvoRec *pDevEvo) goto failed; } + nvkms_memset(&pDevEvo->lut.notifierState, 0, + sizeof(pDevEvo->lut.notifierState)); + for (sd = 0; sd < pDevEvo->numSubDevices; sd++) { NvU32 ret = nvRmApiMapMemory(nvEvoGlobal.clientHandle, pDevEvo->pSubDevices[sd]->handle, @@ -4722,6 +4726,38 @@ void nvRmImportFbConsoleMemory(NVDevEvoPtr pDevEvo) nvFreeUnixRmHandle(&pDevEvo->handleAllocator, hMemory); } +void nvRmUnmapFbConsoleMemory(NVDevEvoPtr pDevEvo) +{ + struct NvKmsPerOpenDev *pOpenDev = pDevEvo->pNvKmsOpenDev; + NVEvoApiHandlesRec *pOpenDevSurfaceHandles = + nvGetSurfaceHandlesFromOpenDev(pOpenDev); + NVSurfaceEvoPtr pSurfaceEvo = + nvEvoGetSurfaceFromHandle(pDevEvo, + pOpenDevSurfaceHandles, + pDevEvo->fbConsoleSurfaceHandle, + FALSE, + TRUE); + NvU32 status; + + if (!pSurfaceEvo) { + return; + } + + // Tell Resman that the surface mapping is no longer needed. + status = nvRmApiControl(nvEvoGlobal.clientHandle, + pSurfaceEvo->planes[0].rmHandle, + NV0076_CTRL_CMD_NOTIFY_CONSOLE_DISABLED, + NULL, 0); + (void)status; + nvAssert(status == NVOS_STATUS_SUCCESS); + + // Free the NVKMS surface. + nvEvoUnregisterSurface(pDevEvo, pDevEvo->pNvKmsOpenDev, + pDevEvo->fbConsoleSurfaceHandle, + TRUE /* skipUpdate */); + pDevEvo->fbConsoleSurfaceHandle = 0; +} + static void LogAuxPacket(const NVDispEvoRec *pDispEvo, const DPAUXPACKET *pkt) { const char *req, *rep; diff --git a/src/nvidia-modeset/src/nvkms-surface.c b/src/nvidia-modeset/src/nvkms-surface.c index 8ba5cd5065..0410f067a6 100644 --- a/src/nvidia-modeset/src/nvkms-surface.c +++ b/src/nvidia-modeset/src/nvkms-surface.c @@ -33,10 +33,71 @@ // NV0000_CTRL_CMD_OS_UNIX_IMPORT_OBJECT_FROM_FD #include "ctrl/ctrl0000/ctrl0000unix.h" +// NV0000_CTRL_CMD_CLIENT_GET_ADDR_SPACE_TYPE_VIDMEM +#include "ctrl/ctrl0000/ctrl0000client.h" + +/* NV0041_CTRL_SURFACE_INFO */ +#include "ctrl/ctrl0041.h" /* NV01_MEMORY_SYSTEM_OS_DESCRIPTOR */ #include "class/cl0071.h" +static void CpuUnmapSurface( + NVDevEvoPtr pDevEvo, + NVSurfaceEvoPtr pSurfaceEvo) +{ + const NvU32 planeIndex = 0; + NvU32 sd; + + if (pSurfaceEvo->planes[planeIndex].rmHandle == 0) { + return; + } + + for (sd = 0; sd < pDevEvo->numSubDevices; sd++) { + + if (pSurfaceEvo->cpuAddress[sd] != NULL) { + nvRmApiUnmapMemory(nvEvoGlobal.clientHandle, + pDevEvo->pSubDevices[sd]->handle, + pSurfaceEvo->planes[planeIndex].rmHandle, + pSurfaceEvo->cpuAddress[sd], + 0); + pSurfaceEvo->cpuAddress[sd] = NULL; + } + } +} + +NvBool nvEvoCpuMapSurface( + NVDevEvoPtr pDevEvo, + NVSurfaceEvoPtr pSurfaceEvo) +{ + const NvU32 planeIndex = 0; + NvU32 sd; + + /* + * We should only be called here with surfaces that contain a single plane. + */ + nvAssert(nvKmsGetSurfaceMemoryFormatInfo(pSurfaceEvo->format)->numPlanes == 1); + + for (sd = 0; sd < pDevEvo->numSubDevices; sd++) { + + NvU32 result = nvRmApiMapMemory( + nvEvoGlobal.clientHandle, + pDevEvo->pSubDevices[sd]->handle, + pSurfaceEvo->planes[planeIndex].rmHandle, + 0, + pSurfaceEvo->planes[planeIndex].rmObjectSizeInBytes, + (void **) &pSurfaceEvo->cpuAddress[sd], + 0); + + if (result != NVOS_STATUS_SUCCESS) { + CpuUnmapSurface(pDevEvo, pSurfaceEvo); + return FALSE; + } + } + + return TRUE; +} + static void FreeSurfaceEvoStruct(NVSurfaceEvoPtr pSurfaceEvo) { if (pSurfaceEvo == NULL) { @@ -54,7 +115,6 @@ static void FreeSurfaceEvoStruct(NVSurfaceEvoPtr pSurfaceEvo) static void FreeSurfaceEvoRm(NVDevEvoPtr pDevEvo, NVSurfaceEvoPtr pSurfaceEvo) { NvU64 structRefCnt; - NvU32 firstPlaneRmHandle; NvU8 planeIndex; if ((pDevEvo == NULL) || (pSurfaceEvo == NULL)) { @@ -69,26 +129,11 @@ static void FreeSurfaceEvoRm(NVDevEvoPtr pDevEvo, NVSurfaceEvoPtr pSurfaceEvo) &pSurfaceEvo->planes[planeIndex].surfaceDesc); } - firstPlaneRmHandle = pSurfaceEvo->planes[0].rmHandle; - - if (firstPlaneRmHandle != 0) { - - NvU32 sd; - - for (sd = 0; sd < pDevEvo->numSubDevices; sd++) { - - if (pSurfaceEvo->cpuAddress[sd] != NULL) { - nvRmApiUnmapMemory(nvEvoGlobal.clientHandle, - pDevEvo->pSubDevices[sd]->handle, - firstPlaneRmHandle, - pSurfaceEvo->cpuAddress[sd], - 0); - pSurfaceEvo->cpuAddress[sd] = NULL; - } - } + CpuUnmapSurface(pDevEvo, pSurfaceEvo); + if (pSurfaceEvo->planes[0].rmHandle != 0) { nvHsUnmapSurfaceFromDevice(pDevEvo, - firstPlaneRmHandle, + pSurfaceEvo->planes[0].rmHandle, pSurfaceEvo->gpuAddress); } @@ -329,6 +374,72 @@ static NvBool ValidateRegisterSurfaceRequest( return TRUE; } +static NvBool ValidateSurfaceAddressSpace( + NVDevEvoPtr pDevEvo, + const struct NvKmsRegisterSurfaceRequest *pRequest, + NvU32 rmHandle) +{ + NV0041_CTRL_GET_SURFACE_INFO_PARAMS surfaceInfoParams = {}; + NV0041_CTRL_SURFACE_INFO surfaceInfo = {}; + NV_STATUS status; + + /* + * Don't do these checks on tegra. Tegra has different capabilities. + * Here we always say display is possible so we never fail framebuffer + * creation. + */ + if (pDevEvo->isSOCDisplay) { + return TRUE; + } + + /* + * Don't do these checks for surfaces that do not need access to display + * hardware. + */ + if (pRequest->noDisplayHardwareAccess) { + return TRUE; + } + + /* + * If the memory is not isochronous, the memory will not be scanned out to a + * display. The checks are not needed for such memory types. + */ + if (pRequest->isoType != NVKMS_MEMORY_ISO) { + return TRUE; + } + + /* + * Check if the memory we are registering this surface with is valid. We + * cannot scan out sysmem or compressed buffers. + * + * If we cannot use this memory for display it may be resident in sysmem + * or may belong to another GPU. + */ + surfaceInfo.index = NV0041_CTRL_SURFACE_INFO_INDEX_ADDR_SPACE_TYPE; + + surfaceInfoParams.surfaceInfoListSize = 1; + surfaceInfoParams.surfaceInfoList = (NvP64)&surfaceInfo; + + status = nvRmApiControl(nvEvoGlobal.clientHandle, + rmHandle, + NV0041_CTRL_CMD_GET_SURFACE_INFO, + &surfaceInfoParams, + sizeof(surfaceInfoParams)); + if (status != NV_OK) { + nvEvoLogDevDebug(pDevEvo, EVO_LOG_ERROR, + "Failed to get memory location of RM memory object 0x%x", + rmHandle); + return FALSE; + } + + if (surfaceInfo.data != NV0000_CTRL_CMD_CLIENT_GET_ADDR_SPACE_TYPE_VIDMEM) { + nvEvoLogDevDebug(pDevEvo, EVO_LOG_ERROR, + "Memory used for surface not appropriate for scanout"); + return FALSE; + } + + return TRUE; +} void nvEvoRegisterSurface(NVDevEvoPtr pDevEvo, struct NvKmsPerOpenDev *pOpenDev, @@ -484,6 +595,10 @@ void nvEvoRegisterSurface(NVDevEvoPtr pDevEvo, goto fail; } + if (!ValidateSurfaceAddressSpace(pDevEvo, pRequest, planeRmHandle)) { + goto fail; + } + /* XXX Validate sizeInBytes: can we query the surface size from RM? */ if (!pRequest->noDisplayHardwareAccess) { @@ -536,26 +651,14 @@ void nvEvoRegisterSurface(NVDevEvoPtr pDevEvo, /* * Map the first plane of the surface only into the CPU's address space. * This is the only valid plane since we would have already rejected - * multi-planar semaphore requests earlier. + * multi-planar NISO surface requests earlier in + * + * nvEvoRegisterSurface() => ValidateRegisterSurfaceRequest() => + * ValidatePlaneProperties(). */ if (needCpuMapping) { - - NvU32 sd; - - for (sd = 0; sd < pDevEvo->numSubDevices; sd++) { - - result = nvRmApiMapMemory( - nvEvoGlobal.clientHandle, - pDevEvo->pSubDevices[sd]->handle, - pSurfaceEvo->planes[0].rmHandle, - 0, - pRequest->planes[0].rmObjectSizeInBytes, - (void **) &pSurfaceEvo->cpuAddress[sd], - 0); - - if (result != NVOS_STATUS_SUCCESS) { - goto fail; - } + if (!nvEvoCpuMapSurface(pDevEvo, pSurfaceEvo)) { + goto fail; } } @@ -1240,133 +1343,3 @@ void nvEvoUnregisterDeferredRequestFifo( nvFree(pDeferredRequestFifo); } - -static NvBool AssignVblankSemControlHwHeadMask( - NVDispEvoRec *pDispEvo, - NvU32 apiHeadMask, - NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE_PARAMS *pParams) -{ - NvU32 apiHead; - - FOR_ALL_HEADS(apiHead, apiHeadMask) { - - NvU32 hwHead = nvGetPrimaryHwHead(pDispEvo, apiHead); - - if (hwHead == NV_INVALID_HEAD) { - return FALSE; - } - - pParams->headMask |= NVBIT(hwHead); - pParams->headIndexMap[hwHead] = apiHead; - } - - pParams->bUseHeadIndexMap = TRUE; - return TRUE; -} - -NVVblankSemControl *nvEvoEnableVblankSemControl( - NVDevEvoRec *pDevEvo, - NVDispEvoRec *pDispEvo, - NvU32 apiHeadMask, - NVSurfaceEvoRec *pSurfaceEvo, - NvU64 surfaceOffset) -{ - NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE_PARAMS params = { }; - NVVblankSemControl *pVblankSemControl; - - if (!pDevEvo->supportsVblankSemControl) { - return NULL; - } - - if (!AssignVblankSemControlHwHeadMask(pDispEvo, apiHeadMask, ¶ms)) { - return NULL; - } - - /* - * We cannot enable VblankSemControl if the requested offset within the - * surface is too large. - */ - if (A_plus_B_greater_than_C_U64( - surfaceOffset, - sizeof(NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA), - pSurfaceEvo->planes[0].rmObjectSizeInBytes)) { - return NULL; - } - - if (nvEvoSurfaceRefCntsTooLarge(pSurfaceEvo)) { - return NULL; - } - - pVblankSemControl = nvCalloc(1, sizeof(*pVblankSemControl)); - - if (pVblankSemControl == NULL) { - return NULL; - } - - pVblankSemControl->dispIndex = pDispEvo->displayOwner; - pVblankSemControl->surfaceOffset = surfaceOffset; - pVblankSemControl->pSurfaceEvo = pSurfaceEvo; - - params.subDeviceInstance = pVblankSemControl->dispIndex; - params.hMemory = pVblankSemControl->pSurfaceEvo->planes[0].rmHandle; - params.memoryOffset = pVblankSemControl->surfaceOffset; - - if (nvRmApiControl(nvEvoGlobal.clientHandle, - pDevEvo->displayCommonHandle, - NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE, - ¶ms, sizeof(params)) == NVOS_STATUS_SUCCESS) { - - nvEvoIncrementSurfaceRefCnts(pSurfaceEvo); - return pVblankSemControl; - } else { - nvFree(pVblankSemControl); - return NULL; - } -} - -NvBool nvEvoDisableVblankSemControl( - NVDevEvoRec *pDevEvo, - NVVblankSemControl *pVblankSemControl) -{ - NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DISABLE_PARAMS params = { }; - - if (!pDevEvo->supportsVblankSemControl) { - return FALSE; - } - - params.subDeviceInstance = pVblankSemControl->dispIndex; - params.hMemory = pVblankSemControl->pSurfaceEvo->planes[0].rmHandle; - params.memoryOffset = pVblankSemControl->surfaceOffset; - - if (nvRmApiControl(nvEvoGlobal.clientHandle, - pDevEvo->displayCommonHandle, - NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DISABLE, - ¶ms, sizeof(params)) == NVOS_STATUS_SUCCESS) { - - nvEvoDecrementSurfaceRefCnts(pDevEvo, pVblankSemControl->pSurfaceEvo); - nvFree(pVblankSemControl); - return TRUE; - } else { - return FALSE; - } -} - -NvBool nvEvoAccelVblankSemControls( - NVDevEvoPtr pDevEvo, - NvU32 dispIndex, - NvU32 hwHeadMask) -{ - NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS_PARAMS params = { }; - - if (!pDevEvo->supportsVblankSemControl) { - return FALSE; - } - - params.subDeviceInstance = dispIndex; - params.headMask = hwHeadMask; - - return nvRmApiControl(nvEvoGlobal.clientHandle, - pDevEvo->displayCommonHandle, - NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS, - ¶ms, sizeof(params)) == NVOS_STATUS_SUCCESS; -} diff --git a/src/nvidia-modeset/src/nvkms-vblank-sem-control.c b/src/nvidia-modeset/src/nvkms-vblank-sem-control.c new file mode 100644 index 0000000000..5f8e2e9b4c --- /dev/null +++ b/src/nvidia-modeset/src/nvkms-vblank-sem-control.c @@ -0,0 +1,360 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include "nvkms-types.h" +#include "nvkms-utils.h" +#include "nvkms-surface.h" +#include "nvkms-modeset.h" +#include "nvkms-vblank-sem-control.h" + + +static void +VblankSemControlWrite( + NVVblankSemControlHeadEntry *pEntry, + NvU64 vblankCount, + NvBool bAccel) +{ + volatile struct NvKmsVblankSemControlDataOneHead *pData = + pEntry->pDataOneHead; + const NvU32 requestCounter = + bAccel ? pData->requestCounterAccel : pData->requestCounter; + + // + // Write the current vblankCount and GPU time, and release the + // semaphore. Be sure to release the semaphore last, so that consumers + // of these fields can use the semaphore to know when the other fields + // are ready. + // + pData->vblankCount = vblankCount; + + // + // Use gcc builtin to ensure the pData->semaphore write is ordered after the + // above. + // + __sync_synchronize(); + + pData->semaphore = requestCounter; + + // + // Record the request count and current vblankCount, for computation + // next time. + // + pEntry->previousRequestCounter = requestCounter; + pEntry->previousVblankCount = vblankCount; +} + +static void VblankSemControlCallback( + NVDispEvoRec *pDispEvo, + NVVBlankCallbackPtr pCallbackData) +{ + NVDispApiHeadStateEvoRec *pApiHeadState = pCallbackData->pUserData; + const NvU64 vblankCount = pApiHeadState->vblankCount; + NVVblankSemControlHeadEntry *pEntry; + + nvListForEachEntry( + pEntry, &pApiHeadState->vblankSemControl.list, listEntry) { + + volatile struct NvKmsVblankSemControlDataOneHead *pData = + pEntry->pDataOneHead; + NvU32 flags, swapInterval; + + const NvU32 requestCounter = pData->requestCounter; + + // + // Use gcc builtin to ensure the pData->requestCounter read is ordered + // before the below. + // + __sync_synchronize(); + + /* + * If this entry does not have a new request, skip it. But, still + * update the vblankCount so that the client always has access to the + * current vblankCount. + */ + if (requestCounter == pEntry->previousRequestCounter) { + pData->vblankCount = vblankCount; + continue; + } + + flags = pData->flags; + + swapInterval = DRF_VAL(KMS, _VBLANK_SEM_CONTROL, _SWAP_INTERVAL, flags); + + /* + * If the requested swapInterval is not satisfied, skip this entry. + */ + if (swapInterval != 0) { + if (vblankCount < (pEntry->previousVblankCount + swapInterval)) { + continue; + } + } + + VblankSemControlWrite(pEntry, vblankCount, FALSE /* bAccel */); + } +} + +static NvBool EnableVblankSemControlOneHead( + NVDispEvoRec *pDispEvo, + NvU32 apiHead, + NVVblankSemControl *pVblankSemControl, + struct NvKmsVblankSemControlDataOneHead *pDataOneHead) +{ + NVDispApiHeadStateEvoRec *pApiHeadState = &pDispEvo->apiHeadState[apiHead]; + NVVblankSemControlHeadEntry *pEntry; + const NvBool isFirstEntry = + nvListIsEmpty(&pApiHeadState->vblankSemControl.list); + + pEntry = &pVblankSemControl->headEntry[apiHead]; + + pEntry->pDataOneHead = pDataOneHead; + pEntry->previousRequestCounter = 0; + pEntry->previousVblankCount = pApiHeadState->vblankCount; + + // + // If this is the first enabled vblank sem control on head, add a vblank + // callback. Note we specify addToFront=true, so that this callback is + // sequenced before any NotifyVblank callbacks (those use addToFront=false). + // + if (isFirstEntry) { + pApiHeadState->vblankSemControl.pCallbackPtr = + nvApiHeadRegisterVBlankCallback(pDispEvo, + apiHead, + VblankSemControlCallback, + pApiHeadState, + 0 /* listIndex */); + if (pApiHeadState->vblankSemControl.pCallbackPtr == NULL) { + nvkms_memset(pEntry, 0, sizeof(*pEntry)); + return FALSE; + } + } + + nvListAdd(&pEntry->listEntry, &pApiHeadState->vblankSemControl.list); + + return TRUE; +} + +static void DisableVblankSemControlOneHead( + NVDispEvoRec *pDispEvo, + NvU32 apiHead, + NVVblankSemControlHeadEntry *pEntry) +{ + NVDispApiHeadStateEvoRec *pApiHeadState = &pDispEvo->apiHeadState[apiHead]; + + // + // Accelerate any pending semaphores before disabling the vblank sem control. + // + VblankSemControlWrite( + pEntry, pApiHeadState->vblankCount, TRUE /* bAccel */); + + nvListDel(&pEntry->listEntry); + + // + // If that was the last enabled vblank sem control on head, delete the + // vblank callback. + // + if (nvListIsEmpty(&pApiHeadState->vblankSemControl.list)) { + nvApiHeadUnregisterVBlankCallback( + pDispEvo, pApiHeadState->vblankSemControl.pCallbackPtr); + pApiHeadState->vblankSemControl.pCallbackPtr = NULL; + } + + nvkms_memset(pEntry, 0, sizeof(*pEntry)); +} + +static NvBool EnableVblankSemControlValidate( + NVDevEvoRec *pDevEvo, + NVDispEvoRec *pDispEvo, + NvU32 apiHeadMask, + NVSurfaceEvoRec *pSurfaceEvo, + NvU64 surfaceOffset) +{ + NvU32 apiHead; + + if (!pDevEvo->supportsVblankSemControl) { + return FALSE; + } + + /* + * We cannot enable VblankSemControl if the requested offset within the + * surface is too large. + */ + if (A_plus_B_greater_than_C_U64( + surfaceOffset, + sizeof(struct NvKmsVblankSemControlData), + pSurfaceEvo->planes[0].rmObjectSizeInBytes)) { + return FALSE; + } + + /* + * NvKmsVblankSemControlData must be at least 8-byte aligned, so that GPU + * semaphore releases can write to 8-byte fields within it with natural + * alignment. + */ + if ((surfaceOffset % sizeof(NvU64)) != 0) { + return FALSE; + } + + if (nvEvoSurfaceRefCntsTooLarge(pSurfaceEvo)) { + return FALSE; + } + + FOR_ALL_HEADS(apiHead, apiHeadMask) { + if (nvGetPrimaryHwHead(pDispEvo, apiHead) == NV_INVALID_HEAD) { + return FALSE; + } + } + + return TRUE; +} + +static void DisableVblankSemControl( + NVDispEvoPtr pDispEvo, + NVVblankSemControl *pVblankSemControl) +{ + NvU32 apiHead; + + FOR_ALL_HEADS(apiHead, pVblankSemControl->apiHeadMask) { + NVVblankSemControlHeadEntry *pEntry = + &pVblankSemControl->headEntry[apiHead]; + DisableVblankSemControlOneHead(pDispEvo, apiHead, pEntry); + } +} + +NvBool nvEvoDisableVblankSemControl( + NVDevEvoRec *pDevEvo, + NVVblankSemControl *pVblankSemControl) +{ + NVDispEvoPtr pDispEvo = pDevEvo->pDispEvo[pVblankSemControl->dispIndex]; + + if (!pDevEvo->supportsVblankSemControl) { + return FALSE; + } + + DisableVblankSemControl(pDispEvo, pVblankSemControl); + + nvEvoDecrementSurfaceRefCnts(pDevEvo, pVblankSemControl->pSurfaceEvo); + nvFree(pVblankSemControl); + return TRUE; +} + +void nvEvoOrphanVblankSemControl( + NVDispEvoRec *pDispEvo, + NVVblankSemControl *pVblankSemControl) +{ + if (!pDispEvo->pDevEvo->supportsVblankSemControl) { + return; + } + + DisableVblankSemControl(pDispEvo, pVblankSemControl); + pVblankSemControl->apiHeadMask = 0; +} + +NVVblankSemControl *nvEvoEnableVblankSemControl( + NVDevEvoRec *pDevEvo, + NVDispEvoRec *pDispEvo, + NvU32 apiHeadMask, + NVSurfaceEvoRec *pSurfaceEvo, + NvU64 surfaceOffset) +{ + struct NvKmsVblankSemControlData *pData; + NVVblankSemControl *pVblankSemControl; + NvU32 apiHead; + + if (!EnableVblankSemControlValidate(pDevEvo, pDispEvo, apiHeadMask, + pSurfaceEvo, surfaceOffset)) { + return NULL; + } + + /* + * Lazily map the surface; note we'll just leave the surface mapped after + * this point. + */ + if (pSurfaceEvo->cpuAddress[0] == NULL) { + if (!nvEvoCpuMapSurface(pDevEvo, pSurfaceEvo)) { + return NULL; + } + } + + pData = (struct NvKmsVblankSemControlData *) + (((NvU8 *) pSurfaceEvo->cpuAddress[0]) + surfaceOffset); + + pVblankSemControl = nvCalloc(1, sizeof(*pVblankSemControl)); + + if (pVblankSemControl == NULL) { + return NULL; + } + + pVblankSemControl->dispIndex = pDispEvo->displayOwner; + pVblankSemControl->apiHeadMask = apiHeadMask; + pVblankSemControl->pSurfaceEvo = pSurfaceEvo; + + FOR_ALL_HEADS(apiHead, apiHeadMask) { + if (!EnableVblankSemControlOneHead(pDispEvo, + apiHead, + pVblankSemControl, + &pData->head[apiHead])) { + /* + * EnableVblankSemControlOneHead() failed for one head, but previous + * heads may have succeeded. Unroll by disabling vblank_sem_control + * for all heads where the pVblankSemControl is enabled. + */ + DisableVblankSemControl(pDispEvo, pVblankSemControl); + nvFree(pVblankSemControl); + return NULL; + } + } + + nvEvoIncrementSurfaceRefCnts(pSurfaceEvo); + + return pVblankSemControl; +} + +NvBool nvEvoAccelVblankSemControls( + NVDevEvoPtr pDevEvo, + NVDispEvoRec *pDispEvo, + NvU32 apiHeadMask) +{ + NvU32 apiHead; + + if (!pDevEvo->supportsVblankSemControl) { + return FALSE; + } + + FOR_ALL_HEADS(apiHead, apiHeadMask) { + + NVDispApiHeadStateEvoRec *pApiHeadState = + &pDispEvo->apiHeadState[apiHead]; + NVVblankSemControlHeadEntry *pEntry; + + nvListForEachEntry( + pEntry, &pApiHeadState->vblankSemControl.list, listEntry) { + + VblankSemControlWrite( + pEntry, + pApiHeadState->vblankCount, + TRUE /* bAccel */); + } + } + + return TRUE; +} diff --git a/src/nvidia-modeset/src/nvkms.c b/src/nvidia-modeset/src/nvkms.c index 856b2e943d..9e3c60ecf7 100644 --- a/src/nvidia-modeset/src/nvkms.c +++ b/src/nvidia-modeset/src/nvkms.c @@ -42,6 +42,7 @@ #include "nvkms-surface.h" #include "nvkms-3dvision.h" #include "nvkms-ioctl.h" +#include "nvkms-vblank-sem-control.h" #include "nvkms-headsurface.h" #include "nvkms-headsurface-ioctl.h" #include "nvkms-headsurface-swapgroup.h" @@ -1117,6 +1118,8 @@ static void RestoreConsole(NVDevEvoPtr pDevEvo) nvDPSetAllowMultiStreaming(pDevEvo, TRUE /* allowMST */); EnableAndSetupVblankSyncObjectForAllOpens(pDevEvo); AllocSurfaceCtxDmasForAllOpens(pDevEvo); + } else { + nvRevokeDevice(pDevEvo); } } } @@ -1439,6 +1442,7 @@ static NvBool AllocDevice(struct NvKmsPerOpen *pOpen, layer++) { pParams->reply.layerCaps[layer] = pDevEvo->caps.layerCaps[layer]; } + pParams->reply.olutCaps = pDevEvo->caps.olut; pParams->reply.surfaceAlignment = NV_EVO_SURFACE_ALIGNMENT; pParams->reply.requiresVrrSemaphores = !pDevEvo->hal->caps.supportsDisplayRate; @@ -4234,6 +4238,7 @@ static NvBool SwitchMux( { struct NvKmsSwitchMuxParams *pParams = pParamsVoid; const struct NvKmsSwitchMuxRequest *r = &pParams->request; + struct NvKmsPerOpenDev *pOpenDev; NVDpyEvoPtr pDpyEvo; pDpyEvo = GetPerOpenDpy(pOpen, r->deviceHandle, r->dispHandle, r->dpyId); @@ -4241,7 +4246,12 @@ static NvBool SwitchMux( return FALSE; } - if (!nvKmsOpenDevHasSubOwnerPermissionOrBetter(GetPerOpenDev(pOpen, r->deviceHandle))) { + pOpenDev = GetPerOpenDev(pOpen, r->deviceHandle); + if (pOpenDev == NULL) { + return FALSE; + } + + if (!nvKmsOpenDevHasSubOwnerPermissionOrBetter(pOpenDev)) { return FALSE; } @@ -4652,7 +4662,8 @@ static NvBool NotifyVblank( pCallbackData = nvApiHeadRegisterVBlankCallback(pOpenDisp->pDispEvo, apiHead, NotifyVblankCallback, - pEventOpenFd); + pEventOpenFd, + 1 /* listIndex */); if (pCallbackData == NULL) { return NV_FALSE; } @@ -4867,8 +4878,7 @@ static NvBool AccelVblankSemControls( struct NvKmsPerOpenDev *pOpenDev; struct NvKmsPerOpenDisp *pOpenDisp; NVDevEvoPtr pDevEvo; - const NVDispEvoRec *pDispEvo; - NvU32 apiHead, hwHeadMask = 0; + NVDispEvoRec *pDispEvo; if (!GetPerOpenDevAndDisp(pOpen, pParams->request.deviceHandle, @@ -4885,18 +4895,10 @@ static NvBool AccelVblankSemControls( pDevEvo = pOpenDev->pDevEvo; pDispEvo = pOpenDisp->pDispEvo; - FOR_ALL_HEADS(apiHead, pParams->request.headMask) { - NvU32 hwHead = nvGetPrimaryHwHead(pDispEvo, apiHead); - - if (hwHead != NV_INVALID_HEAD) { - hwHeadMask |= NVBIT(hwHead); - } - } - return nvEvoAccelVblankSemControls( pDevEvo, - pDispEvo->displayOwner, - hwHeadMask); + pDispEvo, + pParams->request.headMask); } static NvBool VrrSignalSemaphore( @@ -4917,6 +4919,30 @@ static NvBool VrrSignalSemaphore( return TRUE; } +static NvBool FramebufferConsoleDisabled( + struct NvKmsPerOpen *pOpen, + void *pParamsVoid) +{ + const struct NvKmsFramebufferConsoleDisabledParams *pParams = pParamsVoid; + struct NvKmsPerOpenDev *pOpenDev = + GetPerOpenDev(pOpen, pParams->request.deviceHandle); + + if (pOpenDev == NULL) { + return FALSE; + } + + if (!nvKmsOpenDevHasSubOwnerPermissionOrBetter(pOpenDev)) { + return FALSE; + } + + if (pOpen->clientType != NVKMS_CLIENT_KERNEL_SPACE) { + return FALSE; + } + + nvRmUnmapFbConsoleMemory(pOpenDev->pDevEvo); + return TRUE; +} + /*! * Perform the ioctl operation requested by the client. * @@ -5043,6 +5069,7 @@ NvBool nvKmsIoctl( ENTRY(NVKMS_IOCTL_DISABLE_VBLANK_SEM_CONTROL, DisableVblankSemControl), ENTRY(NVKMS_IOCTL_ACCEL_VBLANK_SEM_CONTROLS, AccelVblankSemControls), ENTRY(NVKMS_IOCTL_VRR_SIGNAL_SEMAPHORE, VrrSignalSemaphore), + ENTRY(NVKMS_IOCTL_FRAMEBUFFER_CONSOLE_DISABLED, FramebufferConsoleDisabled), }; struct NvKmsPerOpen *pOpen = pOpenVoid; @@ -5191,6 +5218,31 @@ void nvKmsClose(void *pOpenVoid) } +/* +Frees all references to a device +*/ +void nvRevokeDevice(NVDevEvoPtr pDevEvo) +{ + if (pDevEvo == NULL) { + return; + } + + struct NvKmsPerOpen *pOpen; + + nvListForEachEntry(pOpen, &perOpenIoctlList, perOpenListEntry) { + struct NvKmsPerOpenDev *pOpenDev = DevEvoToOpenDev(pOpen, pDevEvo); + if (pOpenDev == NULL) { + continue; + } + if (pOpenDev == pDevEvo->pNvKmsOpenDev) { + // do not free the internal pOpenDev, as that is handled + // by nvFreeDevEvo + continue; + } + FreeDeviceReference(pOpen, pOpenDev); + } +} + /*! * Open callback. * @@ -6605,22 +6657,21 @@ void nvKmsResume(NvU32 gpuId) suspendCounter--; if (suspendCounter == 0) { - NVDevEvoPtr pDevEvo; - - FOR_ALL_EVO_DEVS(pDevEvo) { + NVDevEvoPtr pDevEvo, pDevEvo_tmp; + FOR_ALL_EVO_DEVS_SAFE(pDevEvo, pDevEvo_tmp) { nvEvoLogDevDebug(pDevEvo, EVO_LOG_INFO, "Resuming"); if (nvResumeDevEvo(pDevEvo)) { nvDPSetAllowMultiStreaming(pDevEvo, TRUE /* allowMST */); EnableAndSetupVblankSyncObjectForAllOpens(pDevEvo); AllocSurfaceCtxDmasForAllOpens(pDevEvo); - } - if (pDevEvo->modesetOwner == NULL) { - // Hardware state was lost, so we need to force a console - // restore. - pDevEvo->skipConsoleRestore = FALSE; - RestoreConsole(pDevEvo); + if (pDevEvo->modesetOwner == NULL) { + // Hardware state was lost, so we need to force a console + // restore. + pDevEvo->skipConsoleRestore = FALSE; + RestoreConsole(pDevEvo); + } } } } @@ -6755,3 +6806,40 @@ NvBool nvKmsOpenDevHasSubOwnerPermissionOrBetter(const struct NvKmsPerOpenDev *p pOpenDev->pDevEvo->modesetOwner == pOpenDev || pOpenDev->pDevEvo->modesetSubOwner == pOpenDev; } + +void nvKmsOrphanVblankSemControlForAllOpens(NVDispEvoRec *pDispEvo) +{ + struct NvKmsPerOpen *pOpen; + + if (!pDispEvo->pDevEvo->supportsVblankSemControl) { + return; + } + + nvListForEachEntry(pOpen, &perOpenIoctlList, perOpenIoctlListEntry) { + struct NvKmsPerOpenDev *pOpenDev = DevEvoToOpenDev(pOpen, pDispEvo->pDevEvo); + struct NvKmsPerOpenDisp *pOpenDisp; + NvKmsGenericHandle disp; + + if (pOpenDev == NULL) { + continue; + } + + FOR_ALL_POINTERS_IN_EVO_API_HANDLES(&pOpenDev->dispHandles, + pOpenDisp, disp) { + + NVVblankSemControl *pVblankSemControl; + NvKmsGenericHandle vblankSemControlHandle; + + if (pOpenDisp->pDispEvo != pDispEvo) { + continue; + } + + FOR_ALL_POINTERS_IN_EVO_API_HANDLES(&pOpenDisp->vblankSemControlHandles, + pVblankSemControl, + vblankSemControlHandle) { + + nvEvoOrphanVblankSemControl(pDispEvo, pVblankSemControl); + } + } + } +} diff --git a/src/nvidia-modeset/src/shaders/g_ampere_shader_info.h b/src/nvidia-modeset/src/shaders/g_ampere_shader_info.h index 977d0a974e..2df3d7e833 100644 --- a/src/nvidia-modeset/src/shaders/g_ampere_shader_info.h +++ b/src/nvidia-modeset/src/shaders/g_ampere_shader_info.h @@ -1,4 +1,4 @@ -// Generated using 'Offline GLSL Shader Compiler Version 13.0.0.0.545.00.dev/gpu_drv/dev_a-16109' +// Generated using 'Offline GLSL Shader Compiler Version 13.0.0.0.560.00.dev/gpu_drv/bugfix_main-17009' // WARNING: This file is auto-generated! Do not hand-edit! // Instead, edit the GLSL shaders and run 'unix-build nvmake @generate'. diff --git a/src/nvidia-modeset/src/shaders/g_ampere_shaders b/src/nvidia-modeset/src/shaders/g_ampere_shaders index 3ae838d516..6198e5f89f 100644 Binary files a/src/nvidia-modeset/src/shaders/g_ampere_shaders and b/src/nvidia-modeset/src/shaders/g_ampere_shaders differ diff --git a/src/nvidia-modeset/src/shaders/g_blackwell_shader_info.h b/src/nvidia-modeset/src/shaders/g_blackwell_shader_info.h index f1ee618579..4b0b13cbb6 100644 --- a/src/nvidia-modeset/src/shaders/g_blackwell_shader_info.h +++ b/src/nvidia-modeset/src/shaders/g_blackwell_shader_info.h @@ -1,4 +1,4 @@ -// Generated using 'Offline GLSL Shader Compiler Version 13.0.0.0.545.00.dev/gpu_drv/dev_a-16109' +// Generated using 'Offline GLSL Shader Compiler Version 13.0.0.0.560.00.dev/gpu_drv/bugfix_main-17009' // WARNING: This file is auto-generated! Do not hand-edit! // Instead, edit the GLSL shaders and run 'unix-build nvmake @generate'. @@ -17,8 +17,8 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment - { .offset = 0x00000300, - .registerCount = 13, + { .offset = 0x00000280, + .registerCount = 12, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, .stage = NV3D_HW_SHADER_STAGE_PIXEL, @@ -26,7 +26,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_customSampling - { .offset = 0x00000580, + { .offset = 0x00000480, .registerCount = 40, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -35,7 +35,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_overlay - { .offset = 0x00004680, + { .offset = 0x00004500, .registerCount = 31, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -44,7 +44,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_overlay_customSampling - { .offset = 0x00005480, + { .offset = 0x00005200, .registerCount = 32, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -53,7 +53,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_offset - { .offset = 0x00008280, + { .offset = 0x00007f00, .registerCount = 15, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -62,7 +62,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_offset_customSampling - { .offset = 0x00008600, + { .offset = 0x00008200, .registerCount = 40, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -71,8 +71,8 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_offset_swapped - { .offset = 0x0000c800, - .registerCount = 16, + { .offset = 0x0000c380, + .registerCount = 15, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, .stage = NV3D_HW_SHADER_STAGE_PIXEL, @@ -80,7 +80,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_offset_swapped_customSampling - { .offset = 0x0000cb80, + { .offset = 0x0000c680, .registerCount = 40, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -89,7 +89,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_offset_overlay - { .offset = 0x00010d80, + { .offset = 0x00010800, .registerCount = 32, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -98,7 +98,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_offset_overlay_customSampling - { .offset = 0x00011c00, + { .offset = 0x00011580, .registerCount = 32, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -107,7 +107,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_offset_overlay_swapped - { .offset = 0x00014b00, + { .offset = 0x00014380, .registerCount = 31, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -116,7 +116,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_offset_overlay_swapped_customSampling - { .offset = 0x00015980, + { .offset = 0x00015100, .registerCount = 32, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -125,7 +125,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_blend - { .offset = 0x00018880, + { .offset = 0x00017f00, .registerCount = 15, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -134,7 +134,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_blend_customSampling - { .offset = 0x00018b80, + { .offset = 0x00018180, .registerCount = 40, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -143,8 +143,8 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_blend_swapped - { .offset = 0x0001cd00, - .registerCount = 17, + { .offset = 0x0001c280, + .registerCount = 15, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, .stage = NV3D_HW_SHADER_STAGE_PIXEL, @@ -152,7 +152,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_blend_swapped_customSampling - { .offset = 0x0001d080, + { .offset = 0x0001c580, .registerCount = 40, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -161,7 +161,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_blend_overlay - { .offset = 0x00021280, + { .offset = 0x00020700, .registerCount = 32, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -170,7 +170,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_blend_overlay_customSampling - { .offset = 0x00022100, + { .offset = 0x00021480, .registerCount = 32, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -179,7 +179,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_blend_overlay_swapped - { .offset = 0x00024f80, + { .offset = 0x00024200, .registerCount = 31, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -188,7 +188,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_blend_overlay_swapped_customSampling - { .offset = 0x00025e00, + { .offset = 0x00024f80, .registerCount = 32, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -197,7 +197,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_blend_offset - { .offset = 0x00028d00, + { .offset = 0x00027d80, .registerCount = 20, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -206,7 +206,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_blend_offset_customSampling - { .offset = 0x00029100, + { .offset = 0x00028100, .registerCount = 40, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -215,7 +215,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_blend_offset_swapped - { .offset = 0x0002d380, + { .offset = 0x0002c300, .registerCount = 20, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -224,7 +224,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_blend_offset_swapped_customSampling - { .offset = 0x0002d780, + { .offset = 0x0002c680, .registerCount = 40, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -233,7 +233,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_blend_offset_overlay - { .offset = 0x00031a00, + { .offset = 0x00030880, .registerCount = 35, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -242,7 +242,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_blend_offset_overlay_customSampling - { .offset = 0x00032880, + { .offset = 0x00031600, .registerCount = 37, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -251,7 +251,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_blend_offset_overlay_swapped - { .offset = 0x00035780, + { .offset = 0x00034400, .registerCount = 36, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -260,7 +260,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_blend_offset_overlay_swapped_customSampling - { .offset = 0x00036680, + { .offset = 0x00035200, .registerCount = 37, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -269,8 +269,8 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_yuv420 - { .offset = 0x00039600, - .registerCount = 56, + { .offset = 0x00038080, + .registerCount = 40, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, .stage = NV3D_HW_SHADER_STAGE_PIXEL, @@ -278,7 +278,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_yuv420_overlay - { .offset = 0x0003b180, + { .offset = 0x00039880, .registerCount = 38, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -287,7 +287,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_pixelShift - { .offset = 0x0003dc80, + { .offset = 0x0003c180, .registerCount = 32, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -296,7 +296,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_overlay_pixelShift - { .offset = 0x0003e880, + { .offset = 0x0003cd00, .registerCount = 31, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -305,7 +305,7 @@ static const Nv3dProgramInfo BlackwellProgramInfo[NUM_PROGRAMS] = { }, // nvidia_headsurface_fragment_reversePrime - { .offset = 0x0003f780, + { .offset = 0x0003db00, .registerCount = 13, .type = NV3D_SHADER_TYPE_PIXEL, .constIndex = -1, @@ -322,7 +322,7 @@ static const Nv3dShaderConstBufInfo BlackwellConstBufInfo[] = { static const size_t BlackwellConstBufSize = 0; static const NvU32 BlackwellConstBufSizeAlign = 256; -// Total shader code size: 254.5 KB -static const size_t BlackwellProgramHeapSize = 260608; +// Total shader code size: 247.25 KB +static const size_t BlackwellProgramHeapSize = 253184; static const size_t BlackwellShaderMaxLocalBytes = 0; static const size_t BlackwellShaderMaxStackBytes = 0; diff --git a/src/nvidia-modeset/src/shaders/g_blackwell_shaders b/src/nvidia-modeset/src/shaders/g_blackwell_shaders index 32dc5abc51..47d05f17f5 100644 Binary files a/src/nvidia-modeset/src/shaders/g_blackwell_shaders and b/src/nvidia-modeset/src/shaders/g_blackwell_shaders differ diff --git a/src/nvidia-modeset/src/shaders/g_hopper_shader_info.h b/src/nvidia-modeset/src/shaders/g_hopper_shader_info.h index 6fa72c0905..5d78518bbd 100644 --- a/src/nvidia-modeset/src/shaders/g_hopper_shader_info.h +++ b/src/nvidia-modeset/src/shaders/g_hopper_shader_info.h @@ -1,4 +1,4 @@ -// Generated using 'Offline GLSL Shader Compiler Version 13.0.0.0.545.00.dev/gpu_drv/dev_a-16109' +// Generated using 'Offline GLSL Shader Compiler Version 13.0.0.0.560.00.dev/gpu_drv/bugfix_main-17009' // WARNING: This file is auto-generated! Do not hand-edit! // Instead, edit the GLSL shaders and run 'unix-build nvmake @generate'. diff --git a/src/nvidia-modeset/src/shaders/g_hopper_shaders b/src/nvidia-modeset/src/shaders/g_hopper_shaders index 82bff01539..fe594490f8 100644 Binary files a/src/nvidia-modeset/src/shaders/g_hopper_shaders and b/src/nvidia-modeset/src/shaders/g_hopper_shaders differ diff --git a/src/nvidia-modeset/src/shaders/g_maxwell_shader_info.h b/src/nvidia-modeset/src/shaders/g_maxwell_shader_info.h index e67d594f71..be520c6635 100644 --- a/src/nvidia-modeset/src/shaders/g_maxwell_shader_info.h +++ b/src/nvidia-modeset/src/shaders/g_maxwell_shader_info.h @@ -1,4 +1,4 @@ -// Generated using 'Offline GLSL Shader Compiler Version 13.0.0.0.545.00.dev/gpu_drv/dev_a-16109' +// Generated using 'Offline GLSL Shader Compiler Version 13.0.0.0.560.00.dev/gpu_drv/bugfix_main-17009' // WARNING: This file is auto-generated! Do not hand-edit! // Instead, edit the GLSL shaders and run 'unix-build nvmake @generate'. diff --git a/src/nvidia-modeset/src/shaders/g_maxwell_shaders b/src/nvidia-modeset/src/shaders/g_maxwell_shaders index e4aca2a983..c2c8073653 100644 Binary files a/src/nvidia-modeset/src/shaders/g_maxwell_shaders and b/src/nvidia-modeset/src/shaders/g_maxwell_shaders differ diff --git a/src/nvidia-modeset/src/shaders/g_pascal_shader_info.h b/src/nvidia-modeset/src/shaders/g_pascal_shader_info.h index eece908663..6652dddae1 100644 --- a/src/nvidia-modeset/src/shaders/g_pascal_shader_info.h +++ b/src/nvidia-modeset/src/shaders/g_pascal_shader_info.h @@ -1,4 +1,4 @@ -// Generated using 'Offline GLSL Shader Compiler Version 13.0.0.0.545.00.dev/gpu_drv/dev_a-16109' +// Generated using 'Offline GLSL Shader Compiler Version 13.0.0.0.560.00.dev/gpu_drv/bugfix_main-17009' // WARNING: This file is auto-generated! Do not hand-edit! // Instead, edit the GLSL shaders and run 'unix-build nvmake @generate'. diff --git a/src/nvidia-modeset/src/shaders/g_pascal_shaders b/src/nvidia-modeset/src/shaders/g_pascal_shaders index 5c9de8a51f..befe4e183e 100644 Binary files a/src/nvidia-modeset/src/shaders/g_pascal_shaders and b/src/nvidia-modeset/src/shaders/g_pascal_shaders differ diff --git a/src/nvidia-modeset/src/shaders/g_turing_shader_info.h b/src/nvidia-modeset/src/shaders/g_turing_shader_info.h index 96df9f09ef..661b21ee1e 100644 --- a/src/nvidia-modeset/src/shaders/g_turing_shader_info.h +++ b/src/nvidia-modeset/src/shaders/g_turing_shader_info.h @@ -1,4 +1,4 @@ -// Generated using 'Offline GLSL Shader Compiler Version 13.0.0.0.545.00.dev/gpu_drv/dev_a-16109' +// Generated using 'Offline GLSL Shader Compiler Version 13.0.0.0.560.00.dev/gpu_drv/bugfix_main-17009' // WARNING: This file is auto-generated! Do not hand-edit! // Instead, edit the GLSL shaders and run 'unix-build nvmake @generate'. diff --git a/src/nvidia-modeset/src/shaders/g_turing_shaders b/src/nvidia-modeset/src/shaders/g_turing_shaders index a85cf24ae9..8c7041c8da 100644 Binary files a/src/nvidia-modeset/src/shaders/g_turing_shaders and b/src/nvidia-modeset/src/shaders/g_turing_shaders differ diff --git a/src/nvidia-modeset/src/shaders/g_volta_shader_info.h b/src/nvidia-modeset/src/shaders/g_volta_shader_info.h index d9a3e453d8..6c048daa22 100644 --- a/src/nvidia-modeset/src/shaders/g_volta_shader_info.h +++ b/src/nvidia-modeset/src/shaders/g_volta_shader_info.h @@ -1,4 +1,4 @@ -// Generated using 'Offline GLSL Shader Compiler Version 13.0.0.0.545.00.dev/gpu_drv/dev_a-16109' +// Generated using 'Offline GLSL Shader Compiler Version 13.0.0.0.560.00.dev/gpu_drv/bugfix_main-17009' // WARNING: This file is auto-generated! Do not hand-edit! // Instead, edit the GLSL shaders and run 'unix-build nvmake @generate'. diff --git a/src/nvidia-modeset/src/shaders/g_volta_shaders b/src/nvidia-modeset/src/shaders/g_volta_shaders index 2eb6b81cfc..a9a8e0c53e 100644 Binary files a/src/nvidia-modeset/src/shaders/g_volta_shaders and b/src/nvidia-modeset/src/shaders/g_volta_shaders differ diff --git a/src/nvidia-modeset/srcs.mk b/src/nvidia-modeset/srcs.mk index 414ee1b8ff..bb8f225d84 100644 --- a/src/nvidia-modeset/srcs.mk +++ b/src/nvidia-modeset/srcs.mk @@ -5,11 +5,13 @@ SRCS += ../common/shared/nvstatus/nvstatus.c SRCS += ../common/softfloat/source/8086-SSE/s_commonNaNToF16UI.c SRCS += ../common/softfloat/source/8086-SSE/s_commonNaNToF32UI.c SRCS += ../common/softfloat/source/8086-SSE/s_commonNaNToF64UI.c +SRCS += ../common/softfloat/source/8086-SSE/s_f16UIToCommonNaN.c SRCS += ../common/softfloat/source/8086-SSE/s_f32UIToCommonNaN.c SRCS += ../common/softfloat/source/8086-SSE/s_f64UIToCommonNaN.c SRCS += ../common/softfloat/source/8086-SSE/s_propagateNaNF32UI.c SRCS += ../common/softfloat/source/8086-SSE/s_propagateNaNF64UI.c SRCS += ../common/softfloat/source/8086-SSE/softfloat_raiseFlags.c +SRCS += ../common/softfloat/source/f16_to_f32.c SRCS += ../common/softfloat/source/f32_add.c SRCS += ../common/softfloat/source/f32_div.c SRCS += ../common/softfloat/source/f32_eq.c @@ -74,6 +76,7 @@ SRCS += ../common/softfloat/source/s_mulAddF32.c SRCS += ../common/softfloat/source/s_mulAddF64.c SRCS += ../common/softfloat/source/s_normRoundPackToF32.c SRCS += ../common/softfloat/source/s_normRoundPackToF64.c +SRCS += ../common/softfloat/source/s_normSubnormalF16Sig.c SRCS += ../common/softfloat/source/s_normSubnormalF32Sig.c SRCS += ../common/softfloat/source/s_normSubnormalF64Sig.c SRCS += ../common/softfloat/source/s_roundPackToF16.c @@ -103,6 +106,7 @@ SRCS_CXX += ../common/displayport/src/dp_edid.cpp SRCS_CXX += ../common/displayport/src/dp_evoadapter.cpp SRCS_CXX += ../common/displayport/src/dp_groupimpl.cpp SRCS_CXX += ../common/displayport/src/dp_guid.cpp +SRCS_CXX += ../common/displayport/src/dp_linkconfig.cpp SRCS_CXX += ../common/displayport/src/dp_list.cpp SRCS_CXX += ../common/displayport/src/dp_merger.cpp SRCS_CXX += ../common/displayport/src/dp_messagecodings.cpp @@ -207,6 +211,7 @@ SRCS += src/nvkms-stereo.c SRCS += src/nvkms-surface.c SRCS += src/nvkms-utils-flip.c SRCS += src/nvkms-utils.c +SRCS += src/nvkms-vblank-sem-control.c SRCS += src/nvkms-vrr.c SRCS += src/nvkms.c SRCS += ../common/unix/xzminidec/src/xz_crc32.c diff --git a/src/nvidia/Makefile b/src/nvidia/Makefile index 423414afc7..931a74c058 100644 --- a/src/nvidia/Makefile +++ b/src/nvidia/Makefile @@ -208,6 +208,8 @@ all: $(NV_KERNEL_O) LINKER_SCRIPT = nv-kernel.ld +NV_KERNEL_O_LDFLAGS += $(LDFLAGS) + $(NV_KERNEL_O): $(OBJS) $(EXPORTS_LINK_COMMAND) $(LINKER_SCRIPT) $(call quiet_cmd,LD) \ $(NV_KERNEL_O_LDFLAGS) \ diff --git a/src/nvidia/arch/nvalloc/common/inc/conf_compute/cc_keystore.h b/src/nvidia/arch/nvalloc/common/inc/conf_compute/cc_keystore.h index 411d3e1287..683d153f51 100644 --- a/src/nvidia/arch/nvalloc/common/inc/conf_compute/cc_keystore.h +++ b/src/nvidia/arch/nvalloc/common/inc/conf_compute/cc_keystore.h @@ -42,9 +42,19 @@ enum CC_KEYSPACE_LCE5, CC_KEYSPACE_LCE6, CC_KEYSPACE_LCE7, + CC_KEYSPACE_LCE10, + CC_KEYSPACE_LCE11, + CC_KEYSPACE_LCE12, + CC_KEYSPACE_LCE13, + CC_KEYSPACE_LCE14, + CC_KEYSPACE_LCE15, + CC_KEYSPACE_LCE16, + CC_KEYSPACE_LCE17, CC_KEYSPACE_SIZE // This is always the last element. }; +#define CC_KEYSPACE_SIZE_GH100 (CC_KEYSPACE_LCE7 + 1) + enum { CC_LKEYID_CPU_GSP_LOCKED_RPC, @@ -98,63 +108,119 @@ enum CC_KEYSPACE_LCE_SIZE // This is always the last element. }; -#define CC_KEYSPACE_TOTAL_SIZE (CC_KEYSPACE_GSP_SIZE + CC_KEYSPACE_SEC2_SIZE + (8 * CC_KEYSPACE_LCE_SIZE)) - -#define CC_LKEYID_LCE0_H2D_USER_STR "Lce0_h2d_user" -#define CC_LKEYID_LCE0_D2H_USER_STR "Lce0_d2h_user" -#define CC_LKEYID_LCE0_H2D_KERN_STR "Lce0_h2d_kernel" -#define CC_LKEYID_LCE0_D2H_KERN_STR "Lce0_d2h_kernel" -#define CC_LKEYID_LCE0_H2D_P2P_STR "Lce0_h2d_p2p" -#define CC_LKEYID_LCE0_D2H_P2P_STR "Lce0_d2h_p2p" - -#define CC_LKEYID_LCE1_H2D_USER_STR "Lce1_h2d_user" -#define CC_LKEYID_LCE1_D2H_USER_STR "Lce1_d2h_user" -#define CC_LKEYID_LCE1_H2D_KERN_STR "Lce1_h2d_kernel" -#define CC_LKEYID_LCE1_D2H_KERN_STR "Lce1_d2h_kernel" -#define CC_LKEYID_LCE1_H2D_P2P_STR "Lce1_h2d_p2p" -#define CC_LKEYID_LCE1_D2H_P2P_STR "Lce1_d2h_p2p" - -#define CC_LKEYID_LCE2_H2D_USER_STR "Lce2_h2d_user" -#define CC_LKEYID_LCE2_D2H_USER_STR "Lce2_d2h_user" -#define CC_LKEYID_LCE2_H2D_KERN_STR "Lce2_h2d_kernel" -#define CC_LKEYID_LCE2_D2H_KERN_STR "Lce2_d2h_kernel" -#define CC_LKEYID_LCE2_H2D_P2P_STR "Lce2_h2d_p2p" -#define CC_LKEYID_LCE2_D2H_P2P_STR "Lce2_d2h_p2p" - -#define CC_LKEYID_LCE3_H2D_USER_STR "Lce3_h2d_user" -#define CC_LKEYID_LCE3_D2H_USER_STR "Lce3_d2h_user" -#define CC_LKEYID_LCE3_H2D_KERN_STR "Lce3_h2d_kernel" -#define CC_LKEYID_LCE3_D2H_KERN_STR "Lce3_d2h_kernel" -#define CC_LKEYID_LCE3_H2D_P2P_STR "Lce3_h2d_p2p" -#define CC_LKEYID_LCE3_D2H_P2P_STR "Lce3_d2h_p2p" - -#define CC_LKEYID_LCE4_H2D_USER_STR "Lce4_h2d_user" -#define CC_LKEYID_LCE4_D2H_USER_STR "Lce4_d2h_user" -#define CC_LKEYID_LCE4_H2D_KERN_STR "Lce4_h2d_kernel" -#define CC_LKEYID_LCE4_D2H_KERN_STR "Lce4_d2h_kernel" -#define CC_LKEYID_LCE4_H2D_P2P_STR "Lce4_h2d_p2p" -#define CC_LKEYID_LCE4_D2H_P2P_STR "Lce4_d2h_p2p" - -#define CC_LKEYID_LCE5_H2D_USER_STR "Lce5_h2d_user" -#define CC_LKEYID_LCE5_D2H_USER_STR "Lce5_d2h_user" -#define CC_LKEYID_LCE5_H2D_KERN_STR "Lce5_h2d_kernel" -#define CC_LKEYID_LCE5_D2H_KERN_STR "Lce5_d2h_kernel" -#define CC_LKEYID_LCE5_H2D_P2P_STR "Lce5_h2d_p2p" -#define CC_LKEYID_LCE5_D2H_P2P_STR "Lce5_d2h_p2p" - -#define CC_LKEYID_LCE6_H2D_USER_STR "Lce6_h2d_user" -#define CC_LKEYID_LCE6_D2H_USER_STR "Lce6_d2h_user" -#define CC_LKEYID_LCE6_H2D_KERN_STR "Lce6_h2d_kernel" -#define CC_LKEYID_LCE6_D2H_KERN_STR "Lce6_d2h_kernel" -#define CC_LKEYID_LCE6_H2D_P2P_STR "Lce6_h2d_p2p" -#define CC_LKEYID_LCE6_D2H_P2P_STR "Lce6_d2h_p2p" - -#define CC_LKEYID_LCE7_H2D_USER_STR "Lce7_h2d_user" -#define CC_LKEYID_LCE7_D2H_USER_STR "Lce7_d2h_user" -#define CC_LKEYID_LCE7_H2D_KERN_STR "Lce7_h2d_kernel" -#define CC_LKEYID_LCE7_D2H_KERN_STR "Lce7_d2h_kernel" -#define CC_LKEYID_LCE7_H2D_P2P_STR "Lce7_h2d_p2p" -#define CC_LKEYID_LCE7_D2H_P2P_STR "Lce7_d2h_p2p" + +#define CC_KEYSPACE_TOTAL_SIZE (CC_KEYSPACE_GSP_SIZE + CC_KEYSPACE_SEC2_SIZE + (16 * CC_KEYSPACE_LCE_SIZE)) +#define CC_LKEYID_LCE0_H2D_USER_STR "Lce00_h2d_user" +#define CC_LKEYID_LCE0_D2H_USER_STR "Lce00_d2h_user" +#define CC_LKEYID_LCE0_H2D_KERN_STR "Lce00_h2d_kernel" +#define CC_LKEYID_LCE0_D2H_KERN_STR "Lce00_d2h_kernel" +#define CC_LKEYID_LCE0_H2D_P2P_STR "Lce00_h2d_p2p" +#define CC_LKEYID_LCE0_D2H_P2P_STR "Lce00_d2h_p2p" + +#define CC_LKEYID_LCE1_H2D_USER_STR "Lce01_h2d_user" +#define CC_LKEYID_LCE1_D2H_USER_STR "Lce01_d2h_user" +#define CC_LKEYID_LCE1_H2D_KERN_STR "Lce01_h2d_kernel" +#define CC_LKEYID_LCE1_D2H_KERN_STR "Lce01_d2h_kernel" +#define CC_LKEYID_LCE1_H2D_P2P_STR "Lce01_h2d_p2p" +#define CC_LKEYID_LCE1_D2H_P2P_STR "Lce01_d2h_p2p" + +#define CC_LKEYID_LCE2_H2D_USER_STR "Lce02_h2d_user" +#define CC_LKEYID_LCE2_D2H_USER_STR "Lce02_d2h_user" +#define CC_LKEYID_LCE2_H2D_KERN_STR "Lce02_h2d_kernel" +#define CC_LKEYID_LCE2_D2H_KERN_STR "Lce02_d2h_kernel" +#define CC_LKEYID_LCE2_H2D_P2P_STR "Lce02_h2d_p2p" +#define CC_LKEYID_LCE2_D2H_P2P_STR "Lce02_d2h_p2p" + +#define CC_LKEYID_LCE3_H2D_USER_STR "Lce03_h2d_user" +#define CC_LKEYID_LCE3_D2H_USER_STR "Lce03_d2h_user" +#define CC_LKEYID_LCE3_H2D_KERN_STR "Lce03_h2d_kernel" +#define CC_LKEYID_LCE3_D2H_KERN_STR "Lce03_d2h_kernel" +#define CC_LKEYID_LCE3_H2D_P2P_STR "Lce03_h2d_p2p" +#define CC_LKEYID_LCE3_D2H_P2P_STR "Lce03_d2h_p2p" + +#define CC_LKEYID_LCE4_H2D_USER_STR "Lce04_h2d_user" +#define CC_LKEYID_LCE4_D2H_USER_STR "Lce04_d2h_user" +#define CC_LKEYID_LCE4_H2D_KERN_STR "Lce04_h2d_kernel" +#define CC_LKEYID_LCE4_D2H_KERN_STR "Lce04_d2h_kernel" +#define CC_LKEYID_LCE4_H2D_P2P_STR "Lce04_h2d_p2p" +#define CC_LKEYID_LCE4_D2H_P2P_STR "Lce04_d2h_p2p" + +#define CC_LKEYID_LCE5_H2D_USER_STR "Lce05_h2d_user" +#define CC_LKEYID_LCE5_D2H_USER_STR "Lce05_d2h_user" +#define CC_LKEYID_LCE5_H2D_KERN_STR "Lce05_h2d_kernel" +#define CC_LKEYID_LCE5_D2H_KERN_STR "Lce05_d2h_kernel" +#define CC_LKEYID_LCE5_H2D_P2P_STR "Lce05_h2d_p2p" +#define CC_LKEYID_LCE5_D2H_P2P_STR "Lce05_d2h_p2p" + +#define CC_LKEYID_LCE6_H2D_USER_STR "Lce06_h2d_user" +#define CC_LKEYID_LCE6_D2H_USER_STR "Lce06_d2h_user" +#define CC_LKEYID_LCE6_H2D_KERN_STR "Lce06_h2d_kernel" +#define CC_LKEYID_LCE6_D2H_KERN_STR "Lce06_d2h_kernel" +#define CC_LKEYID_LCE6_H2D_P2P_STR "Lce06_h2d_p2p" +#define CC_LKEYID_LCE6_D2H_P2P_STR "Lce06_d2h_p2p" + +#define CC_LKEYID_LCE7_H2D_USER_STR "Lce07_h2d_user" +#define CC_LKEYID_LCE7_D2H_USER_STR "Lce07_d2h_user" +#define CC_LKEYID_LCE7_H2D_KERN_STR "Lce07_h2d_kernel" +#define CC_LKEYID_LCE7_D2H_KERN_STR "Lce07_d2h_kernel" +#define CC_LKEYID_LCE7_H2D_P2P_STR "Lce07_h2d_p2p" +#define CC_LKEYID_LCE7_D2H_P2P_STR "Lce07_d2h_p2p" + +#define CC_LKEYID_LCE10_H2D_USER_STR "Lce10_h2d_user" +#define CC_LKEYID_LCE10_D2H_USER_STR "Lce10_d2h_user" +#define CC_LKEYID_LCE10_H2D_KERN_STR "Lce10_h2d_kernel" +#define CC_LKEYID_LCE10_D2H_KERN_STR "Lce10_d2h_kernel" +#define CC_LKEYID_LCE10_H2D_P2P_STR "Lce10_h2d_p2p" +#define CC_LKEYID_LCE10_D2H_P2P_STR "Lce10_d2h_p2p" + +#define CC_LKEYID_LCE11_H2D_USER_STR "Lce11_h2d_user" +#define CC_LKEYID_LCE11_D2H_USER_STR "Lce11_d2h_user" +#define CC_LKEYID_LCE11_H2D_KERN_STR "Lce11_h2d_kernel" +#define CC_LKEYID_LCE11_D2H_KERN_STR "Lce11_d2h_kernel" +#define CC_LKEYID_LCE11_H2D_P2P_STR "Lce11_h2d_p2p" +#define CC_LKEYID_LCE11_D2H_P2P_STR "Lce11_d2h_p2p" + +#define CC_LKEYID_LCE12_H2D_USER_STR "Lce12_h2d_user" +#define CC_LKEYID_LCE12_D2H_USER_STR "Lce12_d2h_user" +#define CC_LKEYID_LCE12_H2D_KERN_STR "Lce12_h2d_kernel" +#define CC_LKEYID_LCE12_D2H_KERN_STR "Lce12_d2h_kernel" +#define CC_LKEYID_LCE12_H2D_P2P_STR "Lce12_h2d_p2p" +#define CC_LKEYID_LCE12_D2H_P2P_STR "Lce12_d2h_p2p" + +#define CC_LKEYID_LCE13_H2D_USER_STR "Lce13_h2d_user" +#define CC_LKEYID_LCE13_D2H_USER_STR "Lce13_d2h_user" +#define CC_LKEYID_LCE13_H2D_KERN_STR "Lce13_h2d_kernel" +#define CC_LKEYID_LCE13_D2H_KERN_STR "Lce13_d2h_kernel" +#define CC_LKEYID_LCE13_H2D_P2P_STR "Lce13_h2d_p2p" +#define CC_LKEYID_LCE13_D2H_P2P_STR "Lce13_d2h_p2p" + +#define CC_LKEYID_LCE14_H2D_USER_STR "Lce14_h2d_user" +#define CC_LKEYID_LCE14_D2H_USER_STR "Lce14_d2h_user" +#define CC_LKEYID_LCE14_H2D_KERN_STR "Lce14_h2d_kernel" +#define CC_LKEYID_LCE14_D2H_KERN_STR "Lce14_d2h_kernel" +#define CC_LKEYID_LCE14_H2D_P2P_STR "Lce14_h2d_p2p" +#define CC_LKEYID_LCE14_D2H_P2P_STR "Lce14_d2h_p2p" + +#define CC_LKEYID_LCE15_H2D_USER_STR "Lce15_h2d_user" +#define CC_LKEYID_LCE15_D2H_USER_STR "Lce15_d2h_user" +#define CC_LKEYID_LCE15_H2D_KERN_STR "Lce15_h2d_kernel" +#define CC_LKEYID_LCE15_D2H_KERN_STR "Lce15_d2h_kernel" +#define CC_LKEYID_LCE15_H2D_P2P_STR "Lce15_h2d_p2p" +#define CC_LKEYID_LCE15_D2H_P2P_STR "Lce15_d2h_p2p" + +#define CC_LKEYID_LCE16_H2D_USER_STR "Lce16_h2d_user" +#define CC_LKEYID_LCE16_D2H_USER_STR "Lce16_d2h_user" +#define CC_LKEYID_LCE16_H2D_KERN_STR "Lce16_h2d_kernel" +#define CC_LKEYID_LCE16_D2H_KERN_STR "Lce16_d2h_kernel" +#define CC_LKEYID_LCE16_H2D_P2P_STR "Lce16_h2d_p2p" +#define CC_LKEYID_LCE16_D2H_P2P_STR "Lce16_d2h_p2p" + +#define CC_LKEYID_LCE17_H2D_USER_STR "Lce17_h2d_user" +#define CC_LKEYID_LCE17_D2H_USER_STR "Lce17_d2h_user" +#define CC_LKEYID_LCE17_H2D_KERN_STR "Lce17_h2d_kernel" +#define CC_LKEYID_LCE17_D2H_KERN_STR "Lce17_d2h_kernel" +#define CC_LKEYID_LCE17_H2D_P2P_STR "Lce17_h2d_p2p" +#define CC_LKEYID_LCE17_D2H_P2P_STR "Lce17_d2h_p2p" // Generate a global key ID from a keyspace (a) and local key ID (b). #define CC_GKEYID_GEN(a, b) (NvU32)(((a) << 16) | (b)) @@ -300,7 +366,111 @@ enum (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_P2P) ? \ CC_LKEYID_LCE7_H2D_P2P_STR : \ (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_P2P) ? \ - CC_LKEYID_LCE7_D2H_P2P_STR : NULL : NULL + CC_LKEYID_LCE7_D2H_P2P_STR : NULL : \ + (CC_GKEYID_GET_KEYSPACE(a) == CC_KEYSPACE_LCE10) ? \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_USER) ? \ + CC_LKEYID_LCE10_H2D_USER_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_USER) ? \ + CC_LKEYID_LCE10_D2H_USER_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_KERN) ? \ + CC_LKEYID_LCE10_H2D_KERN_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_KERN) ? \ + CC_LKEYID_LCE10_D2H_KERN_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_P2P) ? \ + CC_LKEYID_LCE10_H2D_P2P_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_P2P) ? \ + CC_LKEYID_LCE10_D2H_P2P_STR : NULL : \ + (CC_GKEYID_GET_KEYSPACE(a) == CC_KEYSPACE_LCE11) ? \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_USER) ? \ + CC_LKEYID_LCE11_H2D_USER_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_USER) ? \ + CC_LKEYID_LCE11_D2H_USER_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_KERN) ? \ + CC_LKEYID_LCE11_H2D_KERN_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_KERN) ? \ + CC_LKEYID_LCE11_D2H_KERN_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_P2P) ? \ + CC_LKEYID_LCE11_H2D_P2P_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_P2P) ? \ + CC_LKEYID_LCE11_D2H_P2P_STR : NULL : \ + (CC_GKEYID_GET_KEYSPACE(a) == CC_KEYSPACE_LCE12) ? \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_USER) ? \ + CC_LKEYID_LCE12_H2D_USER_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_USER) ? \ + CC_LKEYID_LCE12_D2H_USER_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_KERN) ? \ + CC_LKEYID_LCE12_H2D_KERN_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_KERN) ? \ + CC_LKEYID_LCE12_D2H_KERN_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_P2P) ? \ + CC_LKEYID_LCE12_H2D_P2P_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_P2P) ? \ + CC_LKEYID_LCE12_D2H_P2P_STR : NULL : \ + (CC_GKEYID_GET_KEYSPACE(a) == CC_KEYSPACE_LCE13) ? \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_USER) ? \ + CC_LKEYID_LCE13_H2D_USER_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_USER) ? \ + CC_LKEYID_LCE13_D2H_USER_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_KERN) ? \ + CC_LKEYID_LCE13_H2D_KERN_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_KERN) ? \ + CC_LKEYID_LCE13_D2H_KERN_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_P2P) ? \ + CC_LKEYID_LCE13_H2D_P2P_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_P2P) ? \ + CC_LKEYID_LCE13_D2H_P2P_STR : NULL : \ + (CC_GKEYID_GET_KEYSPACE(a) == CC_KEYSPACE_LCE14) ? \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_USER) ? \ + CC_LKEYID_LCE14_H2D_USER_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_USER) ? \ + CC_LKEYID_LCE14_D2H_USER_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_KERN) ? \ + CC_LKEYID_LCE14_H2D_KERN_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_KERN) ? \ + CC_LKEYID_LCE14_D2H_KERN_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_P2P) ? \ + CC_LKEYID_LCE14_H2D_P2P_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_P2P) ? \ + CC_LKEYID_LCE14_D2H_P2P_STR : NULL : \ + (CC_GKEYID_GET_KEYSPACE(a) == CC_KEYSPACE_LCE15) ? \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_USER) ? \ + CC_LKEYID_LCE15_H2D_USER_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_USER) ? \ + CC_LKEYID_LCE15_D2H_USER_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_KERN) ? \ + CC_LKEYID_LCE15_H2D_KERN_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_KERN) ? \ + CC_LKEYID_LCE15_D2H_KERN_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_P2P) ? \ + CC_LKEYID_LCE15_H2D_P2P_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_P2P) ? \ + CC_LKEYID_LCE15_D2H_P2P_STR : NULL : \ + (CC_GKEYID_GET_KEYSPACE(a) == CC_KEYSPACE_LCE16) ? \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_USER) ? \ + CC_LKEYID_LCE16_H2D_USER_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_USER) ? \ + CC_LKEYID_LCE16_D2H_USER_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_KERN) ? \ + CC_LKEYID_LCE16_H2D_KERN_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_KERN) ? \ + CC_LKEYID_LCE16_D2H_KERN_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_P2P) ? \ + CC_LKEYID_LCE16_H2D_P2P_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_P2P) ? \ + CC_LKEYID_LCE16_D2H_P2P_STR : NULL : \ + (CC_GKEYID_GET_KEYSPACE(a) == CC_KEYSPACE_LCE17) ? \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_USER) ? \ + CC_LKEYID_LCE17_H2D_USER_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_USER) ? \ + CC_LKEYID_LCE17_D2H_USER_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_KERN) ? \ + CC_LKEYID_LCE17_H2D_KERN_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_KERN) ? \ + CC_LKEYID_LCE17_D2H_KERN_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_H2D_P2P) ? \ + CC_LKEYID_LCE17_H2D_P2P_STR : \ + (CC_GKEYID_GET_LKEYID(a) == CC_LKEYID_LCE_D2H_P2P) ? \ + CC_LKEYID_LCE17_D2H_P2P_STR : NULL : NULL #define CC_EXPORT_MASTER_KEY_SIZE_BYTES 32 diff --git a/src/nvidia/arch/nvalloc/common/inc/flcnretval.h b/src/nvidia/arch/nvalloc/common/inc/flcnretval.h index f16ad579ea..e6257877f9 100644 --- a/src/nvidia/arch/nvalloc/common/inc/flcnretval.h +++ b/src/nvidia/arch/nvalloc/common/inc/flcnretval.h @@ -183,6 +183,8 @@ typedef NvU8 FLCN_STATUS; #define FLCN_ERR_NVRNG_INIT_CRYPTO_DEVICE_FAILED (0x95U) #define FLCN_ERR_NVRNG_SELECT_ENGINE_FAILED (0x96U) #define FLCN_ERR_NVRNG_GENERATE_FAILED (0x97U) +#define FLCN_ERR_NVPKA_ECDSA_INIT_FAILED (0x98U) +#define FLCN_ERR_NVPKA_ECDSA_SIGN_FAILED (0x99U) // Heavy Secure Errors #define FLCN_ERR_HS_CHK_INVALID_INPUT (0xA0U) diff --git a/src/nvidia/arch/nvalloc/common/inc/fsp/fsp_tnvl_rpc.h b/src/nvidia/arch/nvalloc/common/inc/fsp/fsp_tnvl_rpc.h index aacc727bf2..73e30341b8 100644 --- a/src/nvidia/arch/nvalloc/common/inc/fsp/fsp_tnvl_rpc.h +++ b/src/nvidia/arch/nvalloc/common/inc/fsp/fsp_tnvl_rpc.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES + * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -29,6 +29,10 @@ #define TNVL_GET_ATT_REPORT_SUBMESSAGE_ID 0x1 #define TNVL_LOCK_CONFIG_SUBMESSAGE_ID 0x2 +#define NVSWITCH_IK_HASH_LENGTH (48) +#define NVSWITCH_ATT_CERT_SIZE_FIELD_LENGTH (2) +#define NVSWITCH_ATT_RSVD1_FIELD_LENGTH (2) + #pragma pack(1) /*! @@ -61,10 +65,11 @@ typedef struct } TNVL_GET_ATT_CERTS_CMD_PAYLOAD; /*! - * @brief TNVL response payload for attestation cert chain - */ + * @brief TNVL response payload for attestation cert chain + */ typedef struct { + NvU8 nvdmType; NVDM_PAYLOAD_COMMAND_RESPONSE cmdResponse; NvU8 subMessageId; NvU8 rsvd0; @@ -72,6 +77,7 @@ typedef struct NvU8 majorVersion; NvU16 certChainLength; NvU16 rsvd1; + NvU8 devIkHash[NVSWITCH_IK_HASH_LENGTH]; NvU8 certChain[NVSWITCH_ATTESTATION_CERT_CHAIN_MAX_SIZE]; } TNVL_GET_ATT_CERTS_RSP_PAYLOAD; @@ -92,6 +98,7 @@ typedef struct */ typedef struct { + NvU8 nvdmType; NVDM_PAYLOAD_COMMAND_RESPONSE cmdResponse; NvU8 subMessageId; NvU8 rsvd0; @@ -117,6 +124,7 @@ typedef struct */ typedef struct { + NvU8 nvdmType; NVDM_PAYLOAD_COMMAND_RESPONSE cmdResponse; NvU8 subMessageId; NvU8 rsvd0; diff --git a/src/nvidia/arch/nvalloc/common/inc/nvcst.h b/src/nvidia/arch/nvalloc/common/inc/nvcst.h index ae93713de4..48c80975ca 100644 --- a/src/nvidia/arch/nvalloc/common/inc/nvcst.h +++ b/src/nvidia/arch/nvalloc/common/inc/nvcst.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2004-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2004-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/arch/nvalloc/common/inc/rmlsfm.h b/src/nvidia/arch/nvalloc/common/inc/rmlsfm.h index ac9ba96165..661c799329 100644 --- a/src/nvidia/arch/nvalloc/common/inc/rmlsfm.h +++ b/src/nvidia/arch/nvalloc/common/inc/rmlsfm.h @@ -122,39 +122,40 @@ * the same Falcon Id, the LSF_FALCON_USES_INSTANCE macro * need to be updated. */ -#define LSF_FALCON_ID_PMU (0U) -#define LSF_FALCON_ID_DPU (1U) -#define LSF_FALCON_ID_GSPLITE LSF_FALCON_ID_DPU -#define LSF_FALCON_ID_FECS (2U) -#define LSF_FALCON_ID_GPCCS (3U) -#define LSF_FALCON_ID_NVDEC (4U) -#define LSF_FALCON_ID_NVENC (5U) -#define LSF_FALCON_ID_NVENC0 (5U) -#define LSF_FALCON_ID_NVENC1 (6U) -#define LSF_FALCON_ID_SEC2 (7U) -#define LSF_FALCON_ID_NVENC2 (8U) -#define LSF_FALCON_ID_MINION (9U) -#define LSF_FALCON_ID_FBFALCON (10U) -#define LSF_FALCON_ID_XUSB (11U) -#define LSF_FALCON_ID_GSP_RISCV (12U) -#define LSF_FALCON_ID_PMU_RISCV (13U) -#define LSF_FALCON_ID_SOE (14U) -#define LSF_FALCON_ID_NVDEC1 (15U) -#define LSF_FALCON_ID_OFA (16U) -#define LSF_FALCON_ID_SEC2_RISCV (17U) -#define LSF_FALCON_ID_NVDEC_RISCV (18U) -#define LSF_FALCON_ID_NVDEC_RISCV_EB (19U) -#define LSF_FALCON_ID_NVJPG (20U) -#define LSF_FALCON_ID_FECS_RISCV (21U) -#define LSF_FALCON_ID_GPCCS_RISCV (22U) -#define LSF_FALCON_ID_NVJPG_RISCV_EB (23U) -#define LSF_FALCON_ID_OFA_RISCV_EB (24U) -#define LSF_FALCON_ID_NVENC_RISCV_EB (25U) -#define LSF_FALCON_ID_PMU_RISCV_EB (26U) -#define LSF_FALCON_ID_NVDEC0_RISCV_EB (27U) -#define LSF_FALCON_ID_GSPLITE_RISCV_EB (28U) -#define LSF_FALCON_ID_DISPLAY_RISCV_EB (29U) -#define LSF_FALCON_ID_END (30U) +#define LSF_FALCON_ID_PMU (0U) +#define LSF_FALCON_ID_DPU (1U) +#define LSF_FALCON_ID_GSPLITE LSF_FALCON_ID_DPU +#define LSF_FALCON_ID_FECS (2U) +#define LSF_FALCON_ID_GPCCS (3U) +#define LSF_FALCON_ID_NVDEC (4U) +#define LSF_FALCON_ID_NVENC (5U) +#define LSF_FALCON_ID_NVENC0 (5U) +#define LSF_FALCON_ID_NVENC1 (6U) +#define LSF_FALCON_ID_SEC2 (7U) +#define LSF_FALCON_ID_NVENC2 (8U) +#define LSF_FALCON_ID_MINION (9U) +#define LSF_FALCON_ID_FBFALCON (10U) +#define LSF_FALCON_ID_XUSB (11U) +#define LSF_FALCON_ID_GSP_RISCV (12U) +#define LSF_FALCON_ID_PMU_RISCV (13U) +#define LSF_FALCON_ID_SOE (14U) +#define LSF_FALCON_ID_NVDEC1 (15U) +#define LSF_FALCON_ID_OFA (16U) +#define LSF_FALCON_ID_SEC2_RISCV (17U) +#define LSF_FALCON_ID_NVDEC_RISCV (18U) +#define LSF_FALCON_ID_NVDEC_RISCV_EB (19U) +#define LSF_FALCON_ID_NVJPG (20U) +#define LSF_FALCON_ID_FECS_RISCV (21U) +#define LSF_FALCON_ID_GPCCS_RISCV (22U) +#define LSF_FALCON_ID_NVJPG_RISCV_EB (23U) +#define LSF_FALCON_ID_OFA_RISCV_EB (24U) +#define LSF_FALCON_ID_NVENC_RISCV_EB (25U) +#define LSF_FALCON_ID_PMU_RISCV_EB (26U) +#define LSF_FALCON_ID_NVDEC0_RISCV_EB (27U) +#define LSF_FALCON_ID_GSPLITE_RISCV_EB (28U) +#define LSF_FALCON_ID_DISPLAY_RISCV_EB (29U) +#define LSF_FALCON_ID_FBFALCON_RISCV_EB (30U) +#define LSF_FALCON_ID_END (31U) #define LSF_FALCON_ID_INVALID (0xFFFFFFFFU) diff --git a/src/nvidia/arch/nvalloc/common/inc/spdm/rmspdmtransport.h b/src/nvidia/arch/nvalloc/common/inc/spdm/rmspdmtransport.h index f7c0ec3753..48b9a82707 100644 --- a/src/nvidia/arch/nvalloc/common/inc/spdm/rmspdmtransport.h +++ b/src/nvidia/arch/nvalloc/common/inc/spdm/rmspdmtransport.h @@ -67,6 +67,7 @@ typedef struct _NV_SPDM_DESC_HEADER #define NV_SPDM_MESSAGE_TYPE_NORMAL (0) #define NV_SPDM_MESSAGE_TYPE_SECURED (1) +#define NV_SPDM_MESSAGE_TYPE_APPLICATION (2) #define NV_SPDM_DESC_HEADER_VERSION_1_0 (0x10) #define NV_SPDM_DESC_HEADER_VERSION_CURRENT (NV_SPDM_DESC_HEADER_VERSION_1_0) #define NV_SPDM_DESC_HEADER_ALIGNMENT_IN_BYTES (NV_SPDM_SYSMEM_SURFACE_ALIGNMENT_IN_BYTES) diff --git a/src/nvidia/arch/nvalloc/common/inc/spdm/rmspdmvendordef.h b/src/nvidia/arch/nvalloc/common/inc/spdm/rmspdmvendordef.h index a6ea987eaf..6cb032bf99 100644 --- a/src/nvidia/arch/nvalloc/common/inc/spdm/rmspdmvendordef.h +++ b/src/nvidia/arch/nvalloc/common/inc/spdm/rmspdmvendordef.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -26,11 +26,80 @@ #include /*! - * Defines structures and interfaces for any SPDM Vendor-defined behavior. + * In NVIDIA's implementation of SPDM, we will support application messages + * which are payloads delivered encrypted in SPDM secured messages, + * sent across the SPDM channel, but do not contain SPDM messages. + * Instead, these messages are for NVIDIA-application purposes. + * These messages and relevant structs are defined here. */ -/* ------------------------- NVIDIA Export Secrets -------------------------- */ +/* ------------------------- Application Payloads ------------------------ */ +/*! + * All application messages will follow a simple header format in order to + * simplify the parsing and forwarding of application messages to the + * relevant recipient endpoint. This format is defined as follows: + * + * +----------------------------------+ + * | RM_SPDM_NV_CMD | + * | Command Type | Command Payload | + * | (4 bytes) (n - 4 - 4 bytes) | + * +----------------------------------+ + * + * The Command Type value defines the expected structure of the payload, + * and how it should be interpreted. + * + * There are two major categories of commands - requests and responses. + * The values of 0x00000000-0x7FFFFFFF are reserved for requests. + * The values of 0x80000000-0xFFFFFFFF are reserved for responses. + */ + +typedef enum +{ + // Request commands. + // 0x00000000 - 0x7FFFFFFF reserved. + + // Response commands. + RM_SPDM_NV_CMD_TYPE_RSP_SUCCESS = 0x80000000, + // 0x80000001 - 0xFFFFFFFF reserved. + RM_SPDM_NV_CMD_TYPE_RSP_ERROR = 0xFFFFFFFF, +} RM_SPDM_NV_CMD_TYPE; + +typedef struct +{ + NvU32 cmdType; +} RM_SPDM_NV_CMD_HDR; + +/* ------------------------- NVIDIA Requests -------------------------------- */ + +/* ------------------------- NVIDIA Responses ------------------------------- */ +/*! + * Response Command: Success + * Command Type: 0x80000000 + * + * This command is a simple payload for the responding endpoint to + * return success. It has no Command Payload. + */ +typedef struct +{ + RM_SPDM_NV_CMD_HDR hdr; +} RM_SPDM_NV_CMD_RSP_SUCCESS; + +/*! + * Response Command: Error + * Command Type: 0xFFFFFFFF + * + * This command is a generic placeholder error response to return specific + * failure code to application endpoint. This is used to return an error + * back to the original application which sent the message, rather than + * suggesting that there was some SPDM or transport layer error. + */ +typedef struct +{ + RM_SPDM_NV_CMD_HDR hdr; + NV_STATUS status; +} RM_SPDM_NV_CMD_RSP_ERROR; +#pragma pack() /* ------------------------- Macros ----------------------------------------- */ #define SPDM_MAX_MEASUREMENT_BLOCK_COUNT (64) diff --git a/src/nvidia/arch/nvalloc/unix/include/nv-priv.h b/src/nvidia/arch/nvalloc/unix/include/nv-priv.h index b32f2b3404..e912f71a86 100644 --- a/src/nvidia/arch/nvalloc/unix/include/nv-priv.h +++ b/src/nvidia/arch/nvalloc/unix/include/nv-priv.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1999-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1999-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -338,6 +338,9 @@ typedef struct NvU32 pmc_boot_1; NvU32 pmc_boot_42; + + /* This flag is set if _PR3 ACPI method is available to support RTD3. */ + NvBool pr3_acpi_method_present; } nv_priv_t; #define NV_SET_NV_PRIV(nv,p) ((nv)->priv = (p)) diff --git a/src/nvidia/arch/nvalloc/unix/include/nv-reg.h b/src/nvidia/arch/nvalloc/unix/include/nv-reg.h index e6c20ca13b..5189b44be1 100644 --- a/src/nvidia/arch/nvalloc/unix/include/nv-reg.h +++ b/src/nvidia/arch/nvalloc/unix/include/nv-reg.h @@ -802,6 +802,18 @@ #define NV_DMA_REMAP_PEER_MMIO_DISABLE 0x00000000 #define NV_DMA_REMAP_PEER_MMIO_ENABLE 0x00000001 +/* + * Option: NVreg_RmNvlinkBandwidthLinkCount + * + * Description: + * + * This option allows user to reduce the GPU nvlink bandwidth to save power. + * + * This option is only for Blackwell+ GPU with NVLINK version 5.0. + */ +#define __NV_RM_NVLINK_BW_LINK_COUNT RmNvlinkBandwidthLinkCount +#define NV_RM_NVLINK_BW_LINK_COUNT NV_REG_STRING(__NV_RM_NVLINK_BW_LINK_COUNT) + /* * Option: NVreg_RmNvlinkBandwidth * @@ -951,6 +963,7 @@ NV_DEFINE_REG_STRING_ENTRY(__NV_TEMPORARY_FILE_PATH, NULL); NV_DEFINE_REG_STRING_ENTRY(__NV_EXCLUDED_GPUS, NULL); NV_DEFINE_REG_ENTRY(__NV_DMA_REMAP_PEER_MMIO, NV_DMA_REMAP_PEER_MMIO_ENABLE); NV_DEFINE_REG_STRING_ENTRY(__NV_RM_NVLINK_BW, NULL); +NV_DEFINE_REG_ENTRY(__NV_RM_NVLINK_BW_LINK_COUNT, 0); NV_DEFINE_REG_ENTRY_GLOBAL(__NV_IMEX_CHANNEL_COUNT, 2048); NV_DEFINE_REG_ENTRY_GLOBAL(__NV_CREATE_IMEX_CHANNEL_0, 0); @@ -996,6 +1009,7 @@ nv_parm_t nv_parms[] = { NV_DEFINE_PARAMS_TABLE_ENTRY(__NV_ENABLE_RESIZABLE_BAR), NV_DEFINE_PARAMS_TABLE_ENTRY(__NV_ENABLE_GPU_FIRMWARE), NV_DEFINE_PARAMS_TABLE_ENTRY(__NV_ENABLE_GPU_FIRMWARE_LOGS), + NV_DEFINE_PARAMS_TABLE_ENTRY(__NV_RM_NVLINK_BW_LINK_COUNT), NV_DEFINE_PARAMS_TABLE_ENTRY(__NV_ENABLE_DBG_BREAKPOINT), NV_DEFINE_PARAMS_TABLE_ENTRY(__NV_OPENRM_ENABLE_UNSUPPORTED_GPUS), NV_DEFINE_PARAMS_TABLE_ENTRY(__NV_DMA_REMAP_PEER_MMIO), diff --git a/src/nvidia/arch/nvalloc/unix/include/nv.h b/src/nvidia/arch/nvalloc/unix/include/nv.h index 9ed795db1b..8878e71670 100644 --- a/src/nvidia/arch/nvalloc/unix/include/nv.h +++ b/src/nvidia/arch/nvalloc/unix/include/nv.h @@ -44,6 +44,7 @@ #include #include #include +#include extern nv_cap_t *nvidia_caps_root; @@ -279,8 +280,7 @@ typedef struct nv_usermap_access_params_s NvU64 offset; NvU64 *page_array; NvU64 num_pages; - NvU64 mmap_start; - NvU64 mmap_size; + MemoryArea memArea; NvU64 access_start; NvU64 access_size; NvU64 remap_prot_extra; @@ -296,8 +296,7 @@ typedef struct nv_alloc_mapping_context_s { NvU64 page_index; NvU64 *page_array; NvU64 num_pages; - NvU64 mmap_start; - NvU64 mmap_size; + MemoryArea memArea; NvU64 access_start; NvU64 access_size; NvU64 remap_prot_extra; @@ -330,7 +329,7 @@ typedef struct nv_soc_irq_info_s { NvS32 ref_count; } nv_soc_irq_info_t; -#define NV_MAX_SOC_IRQS 6 +#define NV_MAX_SOC_IRQS 10 #define NV_MAX_DPAUX_NUM_DEVICES 4 #define NV_MAX_SOC_DPAUX_NUM_DEVICES 2 @@ -535,6 +534,7 @@ typedef struct UvmGpuAddressSpaceInfo_tag *nvgpuAddressSpaceInfo_t; typedef struct UvmGpuAllocInfo_tag *nvgpuAllocInfo_t; typedef struct UvmGpuP2PCapsParams_tag *nvgpuP2PCapsParams_t; typedef struct UvmGpuFbInfo_tag *nvgpuFbInfo_t; +typedef struct UvmGpuNvlinkInfo_tag *nvgpuNvlinkInfo_t; typedef struct UvmGpuEccInfo_tag *nvgpuEccInfo_t; typedef struct UvmGpuFaultInfo_tag *nvgpuFaultInfo_t; typedef struct UvmGpuAccessCntrInfo_tag *nvgpuAccessCntrInfo_t; @@ -545,6 +545,7 @@ typedef struct UvmPmaAllocationOptions_tag *nvgpuPmaAllocationOptions_t typedef struct UvmPmaStatistics_tag *nvgpuPmaStatistics_t; typedef struct UvmGpuMemoryInfo_tag *nvgpuMemoryInfo_t; typedef struct UvmGpuExternalMappingInfo_tag *nvgpuExternalMappingInfo_t; +typedef struct UvmGpuExternalPhysAddrInfo_tag *nvgpuExternalPhysAddrInfo_t; typedef struct UvmGpuChannelResourceInfo_tag *nvgpuChannelResourceInfo_t; typedef struct UvmGpuChannelInstanceInfo_tag *nvgpuChannelInstanceInfo_t; typedef struct UvmGpuChannelResourceBindParams_tag *nvgpuChannelResourceBindParams_t; @@ -783,7 +784,7 @@ nv_state_t* NV_API_CALL nv_get_ctl_state (void); void NV_API_CALL nv_set_dma_address_size (nv_state_t *, NvU32 ); -NV_STATUS NV_API_CALL nv_alias_pages (nv_state_t *, NvU32, NvU64, NvU32, NvU32, NvU64, NvU64 *, void **); +NV_STATUS NV_API_CALL nv_alias_pages (nv_state_t *, NvU32, NvU64, NvU32, NvU32, NvU64, NvU64 *, NvBool, void **); NV_STATUS NV_API_CALL nv_alloc_pages (nv_state_t *, NvU32, NvU64, NvBool, NvU32, NvBool, NvBool, NvS32, NvU64 *, void **); NV_STATUS NV_API_CALL nv_free_pages (nv_state_t *, NvU32, NvBool, NvU32, void *); @@ -904,6 +905,9 @@ void NV_API_CALL nv_dma_release_dma_buf (nv_dma_buf_t *); void NV_API_CALL nv_schedule_uvm_isr (nv_state_t *); +NV_STATUS NV_API_CALL nv_schedule_uvm_drain_p2p (NvU8 *); +void NV_API_CALL nv_schedule_uvm_resume_p2p (NvU8 *); + NvBool NV_API_CALL nv_platform_supports_s0ix (void); NvBool NV_API_CALL nv_s2idle_pm_configured (void); @@ -1001,8 +1005,8 @@ NV_STATUS NV_API_CALL rm_p2p_put_pages_persistent(nvidia_stack_t *, void *, vo NV_STATUS NV_API_CALL rm_p2p_dma_map_pages (nvidia_stack_t *, nv_dma_device_t *, NvU8 *, NvU64, NvU32, NvU64 *, void **); NV_STATUS NV_API_CALL rm_dma_buf_dup_mem_handle (nvidia_stack_t *, nv_state_t *, NvHandle, NvHandle, NvHandle, NvHandle, void *, NvHandle, NvU64, NvU64, NvHandle *, void **); void NV_API_CALL rm_dma_buf_undup_mem_handle(nvidia_stack_t *, nv_state_t *, NvHandle, NvHandle); -NV_STATUS NV_API_CALL rm_dma_buf_map_mem_handle (nvidia_stack_t *, nv_state_t *, NvHandle, NvHandle, NvU64, NvU64, void *, nv_phys_addr_range_t **, NvU32 *); -void NV_API_CALL rm_dma_buf_unmap_mem_handle(nvidia_stack_t *, nv_state_t *, NvHandle, NvHandle, NvU64, nv_phys_addr_range_t **, NvU32); +NV_STATUS NV_API_CALL rm_dma_buf_map_mem_handle (nvidia_stack_t *, nv_state_t *, NvHandle, NvHandle, MemoryRange, void *, NvBool, MemoryArea *); +void NV_API_CALL rm_dma_buf_unmap_mem_handle(nvidia_stack_t *, nv_state_t *, NvHandle, NvHandle, void *, NvBool, MemoryArea); NV_STATUS NV_API_CALL rm_dma_buf_get_client_and_device(nvidia_stack_t *, nv_state_t *, NvHandle, NvHandle, NvHandle *, NvHandle *, NvHandle *, void **, NvBool *); void NV_API_CALL rm_dma_buf_put_client_and_device(nvidia_stack_t *, nv_state_t *, NvHandle, NvHandle, NvHandle, void *); NV_STATUS NV_API_CALL rm_log_gpu_crash (nv_stack_t *, nv_state_t *); diff --git a/src/nvidia/arch/nvalloc/unix/include/os-interface.h b/src/nvidia/arch/nvalloc/unix/include/os-interface.h index a2bbcab80a..c01966dd86 100644 --- a/src/nvidia/arch/nvalloc/unix/include/os-interface.h +++ b/src/nvidia/arch/nvalloc/unix/include/os-interface.h @@ -40,8 +40,11 @@ #include "nv_stdarg.h" #include #include +#include #include +#include "rs_access.h" + typedef struct @@ -102,8 +105,6 @@ NvBool NV_API_CALL os_pci_remove_supported (void); void NV_API_CALL os_pci_remove (void *); void* NV_API_CALL os_map_kernel_space (NvU64, NvU64, NvU32); void NV_API_CALL os_unmap_kernel_space (void *, NvU64); -void* NV_API_CALL os_map_user_space (NvU64, NvU64, NvU32, NvU32, void **); -void NV_API_CALL os_unmap_user_space (void *, NvU64, void *); NV_STATUS NV_API_CALL os_flush_cpu_cache_all (void); NV_STATUS NV_API_CALL os_flush_user_cache (void); void NV_API_CALL os_flush_cpu_write_combine_buffer(void); @@ -114,7 +115,7 @@ void NV_API_CALL os_io_write_byte (NvU32, NvU8); void NV_API_CALL os_io_write_word (NvU32, NvU16); void NV_API_CALL os_io_write_dword (NvU32, NvU32); NvBool NV_API_CALL os_is_administrator (void); -NvBool NV_API_CALL os_allow_priority_override (void); +NvBool NV_API_CALL os_check_access (RsAccessRight accessRight); void NV_API_CALL os_dbg_init (void); void NV_API_CALL os_dbg_breakpoint (void); void NV_API_CALL os_dbg_set_level (NvU32); @@ -130,7 +131,8 @@ void NV_API_CALL os_free_spinlock (void *); NvU64 NV_API_CALL os_acquire_spinlock (void *); void NV_API_CALL os_release_spinlock (void *, NvU64); NV_STATUS NV_API_CALL os_queue_work_item (struct os_work_queue *, void *); -NV_STATUS NV_API_CALL os_flush_work_queue (struct os_work_queue *); +NV_STATUS NV_API_CALL os_flush_work_queue (struct os_work_queue *, NvBool); +NvBool NV_API_CALL os_is_queue_flush_ongoing (struct os_work_queue *); NV_STATUS NV_API_CALL os_alloc_mutex (void **); void NV_API_CALL os_free_mutex (void *); NV_STATUS NV_API_CALL os_acquire_mutex (void *); @@ -219,6 +221,8 @@ extern NvU32 os_page_size; extern NvU64 os_page_mask; extern NvU8 os_page_shift; extern NvBool os_cc_enabled; +extern NvBool os_cc_sev_snp_enabled; +extern NvBool os_cc_snp_vtom_enabled; extern NvBool os_cc_tdx_enabled; extern NvBool os_dma_buf_enabled; extern NvBool os_imex_channel_is_supported; diff --git a/src/nvidia/arch/nvalloc/unix/src/dynamic-power.c b/src/nvidia/arch/nvalloc/unix/src/dynamic-power.c index 34947b0886..65707f60e1 100644 --- a/src/nvidia/arch/nvalloc/unix/src/dynamic-power.c +++ b/src/nvidia/arch/nvalloc/unix/src/dynamic-power.c @@ -732,7 +732,7 @@ rmReadAndParseDynamicPowerRegkey return NV_OK; } - chipId = gpuGetChipIdFromPmcBoot42(pNvp->pmc_boot_42); + chipId = decodePmcBoot42ChipId(pNvp->pmc_boot_42); // From GA102+, we enable RTD3 only if system is found to be Notebook if ((chipId >= NV_PMC_BOOT_42_CHIP_ID_GA102) && @@ -794,6 +794,7 @@ void NV_API_CALL rm_init_dynamic_power_management( nvp->dynamic_power.dynamic_power_regkey = regkeyValue; } + nvp->pr3_acpi_method_present = bPr3AcpiMethodPresent; if (!nv_dynamic_power_available(nv) || !bPr3AcpiMethodPresent || (status != NV_OK)) { @@ -1907,6 +1908,12 @@ static NvBool RmCheckRtd3GcxSupport( return NV_FALSE; } + if (!nvp->pr3_acpi_method_present) + { + NV_PRINTF(LEVEL_NOTICE, "RTD3 ACPI support is not available.\n"); + return NV_FALSE; + } + return NV_TRUE; } @@ -2029,7 +2036,7 @@ RmUpdateFixedFbsrModes(OBJGPU *pGpu) } static NV_STATUS -RmPowerManagementInternal( +RmPowerManagement( OBJGPU *pGpu, nv_pm_action_t pmAction ) @@ -2119,19 +2126,6 @@ RmPowerManagementInternal( return rmStatus; } -static NV_STATUS -RmPowerManagement( - OBJGPU *pGpu, - nv_pm_action_t pmAction -) -{ - NV_STATUS rmStatus; - - rmStatus = RmPowerManagementInternal(pGpu, pmAction); - - return rmStatus; -} - /*! * @brief Call core RM to perform the GCx (GC6/GCOF) entry sequence (before * powering off the GPU) or exit sequence (after powering the GPU back on). @@ -2324,11 +2318,12 @@ NV_STATUS NV_API_CALL rm_power_management( NV_STATUS rmStatus = NV_OK; void *fp; NvBool bTryAgain = NV_FALSE; + NvBool bConsoleDisabled = NV_FALSE; NV_ENTER_RM_RUNTIME(sp,fp); - threadStateInit(&threadState, THREAD_STATE_FLAGS_NONE); + threadStateInit(&threadState, THREAD_STATE_FLAGS_DEVICE_INIT); - NV_ASSERT_OK(os_flush_work_queue(pNv->queue)); + NV_ASSERT_OK(os_flush_work_queue(pNv->queue, pmAction != NV_PM_ACTION_RESUME)); // LOCK: acquire API lock if ((rmStatus = rmapiLockAcquire(API_LOCK_FLAGS_NONE, RM_LOCK_MODULES_DYN_POWER)) == NV_OK) @@ -2342,6 +2337,16 @@ NV_STATUS NV_API_CALL rm_power_management( // LOCK: acquire GPUs lock if ((rmStatus = rmGpuLocksAcquire(GPUS_LOCK_FLAGS_NONE, RM_LOCK_MODULES_DYN_POWER)) == NV_OK) { + // + // For GPU driving console, disable console access here, to ensure no console + // writes through BAR1 can interfere with physical RM's setup of BAR1 + // + if (rm_get_uefi_console_status(pNv)) + { + os_disable_console_access(); + bConsoleDisabled = NV_TRUE; + } + nv_priv_t *nvp = NV_GET_NV_PRIV(pNv); // @@ -2376,6 +2381,11 @@ NV_STATUS NV_API_CALL rm_power_management( rmStatus = RmPowerManagement(pGpu, pmAction); } + if (bConsoleDisabled) + { + os_enable_console_access(); + } + // UNLOCK: release GPUs lock rmGpuLocksRelease(GPUS_LOCK_FLAGS_NONE, NULL); } @@ -2386,7 +2396,7 @@ NV_STATUS NV_API_CALL rm_power_management( rmapiLockRelease(); } - NV_ASSERT_OK(os_flush_work_queue(pNv->queue)); + NV_ASSERT_OK(os_flush_work_queue(pNv->queue, pmAction != NV_PM_ACTION_RESUME)); threadStateFree(&threadState, THREAD_STATE_FLAGS_NONE); NV_EXIT_RM_RUNTIME(sp,fp); diff --git a/src/nvidia/arch/nvalloc/unix/src/os-hypervisor.c b/src/nvidia/arch/nvalloc/unix/src/os-hypervisor.c index b2eb3ce0e8..e821879326 100644 --- a/src/nvidia/arch/nvalloc/unix/src/os-hypervisor.c +++ b/src/nvidia/arch/nvalloc/unix/src/os-hypervisor.c @@ -45,6 +45,7 @@ #include "gpu/bus/kern_bus.h" #include // NV_PMC_BOOT_1_VGPU #include "nvdevid.h" +#include "ctrl/ctrl0000/ctrl0000vgpu.h" #include "g_vgpu_chip_flags.h" // vGPU device names @@ -264,7 +265,7 @@ NV_STATUS NV_API_CALL nv_vgpu_get_type_ids( NV_STATUS NV_API_CALL nv_vgpu_delete( nvidia_stack_t *sp, - const NvU8 *pMdevUuid, + const NvU8 *pVgpuDevName, NvU16 vgpuId ) { @@ -278,7 +279,7 @@ NV_STATUS NV_API_CALL nv_vgpu_delete( // LOCK: acquire API lock if ((rmStatus = rmapiLockAcquire(API_LOCK_FLAGS_NONE, RM_LOCK_MODULES_HYPERVISOR)) == NV_OK) { - rmStatus = kvgpumgrDeleteRequestVgpu(pMdevUuid, vgpuId); + rmStatus = kvgpumgrDeleteRequestVgpu(pVgpuDevName, vgpuId); // UNLOCK: release API lock rmapiLockRelease(); } @@ -324,7 +325,7 @@ NV_STATUS NV_API_CALL nv_vgpu_process_vf_info( NV_STATUS NV_API_CALL nv_vgpu_create_request( nvidia_stack_t *sp, nv_state_t *pNv, - const NvU8 *pMdevUuid, + const NvU8 *pVgpuDevName, NvU32 vgpuTypeId, NvU16 *vgpuId, NvU32 gpuPciBdf @@ -340,7 +341,7 @@ NV_STATUS NV_API_CALL nv_vgpu_create_request( // LOCK: acquire API lock if ((rmStatus = rmapiLockAcquire(API_LOCK_FLAGS_NONE, RM_LOCK_MODULES_HYPERVISOR)) == NV_OK) { - rmStatus = kvgpumgrCreateRequestVgpu(pNv->gpu_id, pMdevUuid, + rmStatus = kvgpumgrCreateRequestVgpu(pNv->gpu_id, pVgpuDevName, vgpuTypeId, vgpuId, gpuPciBdf); // UNLOCK: release API lock @@ -487,7 +488,7 @@ NV_STATUS NV_API_CALL nv_vgpu_get_bar_info ( nvidia_stack_t *sp, nv_state_t *pNv, - const NvU8 *pMdevUuid, + const NvU8 *pVgpuDevName, NvU64 *barSizes, NvU64 *sparseOffsets, NvU64 *sparseSizes, @@ -517,7 +518,7 @@ NV_STATUS NV_API_CALL nv_vgpu_get_bar_info } NV_CHECK_OK_OR_GOTO(rmStatus, LEVEL_SILENT, - nv_vgpu_rm_get_bar_info(pGpu, pMdevUuid, barSizes, + nv_vgpu_rm_get_bar_info(pGpu, pVgpuDevName, barSizes, sparseOffsets, sparseSizes, sparseCount, isBar064bit, configParams), @@ -536,7 +537,7 @@ NV_STATUS NV_API_CALL nv_vgpu_get_bar_info NV_STATUS NV_API_CALL nv_vgpu_get_hbm_info( nvidia_stack_t *sp, nv_state_t *pNv, - const NvU8 *pMdevUuid, + const NvU8 *pVgpuDevName, NvU64 *hbmAddr, NvU64 *size ) @@ -568,9 +569,9 @@ NV_STATUS NV_API_CALL nv_vgpu_get_hbm_info( } NV_CHECK_OK_OR_GOTO(rmStatus, LEVEL_SILENT, - kvgpumgrGetHostVgpuDeviceFromMdevUuid(pNv->gpu_id, - pMdevUuid, - &pKernelHostVgpuDevice), release_lock); + kvgpumgrGetHostVgpuDeviceFromVgpuDevName(pNv->gpu_id, + pVgpuDevName, + &pKernelHostVgpuDevice), release_lock); if (pKernelHostVgpuDevice->numValidHbmRegions > 1) { NV_PRINTF(LEVEL_NOTICE, "non contiguous HBM region is not supported\n"); @@ -710,7 +711,7 @@ static NV_STATUS _nv_vgpu_get_sparse_mmap( NV_STATUS nv_vgpu_rm_get_bar_info ( OBJGPU *pGpu, - const NvU8 *pMdevUuid, + const NvU8 *pVgpuDevName, NvU64 *barSizes, NvU64 *sparseOffsets, NvU64 *sparseSizes, @@ -728,9 +729,9 @@ NV_STATUS nv_vgpu_rm_get_bar_info exit); NV_CHECK_OK_OR_GOTO(rmStatus, LEVEL_SILENT, - kvgpumgrGetHostVgpuDeviceFromMdevUuid(pGpu->gpuId, - pMdevUuid, - &pKernelHostVgpuDevice), + kvgpumgrGetHostVgpuDeviceFromVgpuDevName(pGpu->gpuId, + pVgpuDevName, + &pKernelHostVgpuDevice), exit); for (i = 0; i < NVA081_MAX_BAR_REGION_COUNT; i++) @@ -845,9 +846,9 @@ void osWakeRemoveVgpu(NvU32 gpuId, NvU32 returnStatus) vgpu_vfio_info vgpu_info; vgpu_info.return_status = returnStatus; - vgpu_info.domain = gpuDecodeDomain(gpuId); - vgpu_info.bus = gpuDecodeBus(gpuId); - vgpu_info.device = gpuDecodeDevice(gpuId); + vgpu_info.domain = GPU_32_BIT_ID_DECODE_DOMAIN(gpuId); + vgpu_info.bus = GPU_32_BIT_ID_DECODE_BUS(gpuId); + vgpu_info.device = GPU_32_BIT_ID_DECODE_DEVICE(gpuId); os_call_vgpu_vfio((void *)&vgpu_info, CMD_VFIO_WAKE_REMOVE_GPU); } @@ -923,3 +924,4 @@ NV_STATUS rm_is_vgpu_supported_device( return NV_ERR_NOT_SUPPORTED; } + diff --git a/src/nvidia/arch/nvalloc/unix/src/os.c b/src/nvidia/arch/nvalloc/unix/src/os.c index 9fdb5e87f4..8924675fd4 100644 --- a/src/nvidia/arch/nvalloc/unix/src/os.c +++ b/src/nvidia/arch/nvalloc/unix/src/os.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include @@ -609,9 +610,9 @@ NvBool osIsAdministrator(void) return os_is_administrator(); } -NvBool osAllowPriorityOverride(void) +NvBool osCheckAccess(RsAccessRight accessRight) { - return os_allow_priority_override(); + return os_check_access(accessRight); } NvU32 osGetCurrentProcess(void) @@ -751,6 +752,9 @@ NV_STATUS osQueueWorkItemWithFlags( if (flags & OS_QUEUE_WORKITEM_FLAGS_FULL_GPU_SANITY) pWi->flags |= OS_QUEUE_WORKITEM_FLAGS_FULL_GPU_SANITY; + if (flags & OS_QUEUE_WORKITEM_FLAGS_DROP_ON_UNLOAD_QUEUE_FLUSH) + pWi->flags |= OS_QUEUE_WORKITEM_FLAGS_DROP_ON_UNLOAD_QUEUE_FLUSH; + pWi->gpuInstance = gpuGetInstance(pGpu); pWi->func.pGpuFunction = pFunction; pWi->pData = pParams; @@ -802,6 +806,16 @@ void osQueueMMUFaultHandler(OBJGPU *pGpu) nv_schedule_uvm_isr(nv); } +NV_STATUS osQueueDrainP2PHandler(NvU8 *pUuid) +{ + return nv_schedule_uvm_drain_p2p(pUuid); +} + +void osQueueResumeP2PHandler(NvU8 *pUuid) +{ + nv_schedule_uvm_resume_p2p(pUuid); +} + static inline nv_dma_device_t* osGetDmaDeviceForMemDesc( OS_GPU_INFO *pOsGpuInfo, MEMORY_DESCRIPTOR *pMemDesc @@ -846,7 +860,12 @@ NV_STATUS osAllocPagesInternal( NV_ASSERT_OR_RETURN(pMemDesc->PageCount > 0, NV_ERR_INVALID_ARGUMENT); - if (memdescGetFlag(pMemDesc, MEMDESC_FLAGS_GUEST_ALLOCATED)) + // + // For carveout, the memory is already reserved so we don't have + // to allocate memory. + // + if (memdescGetFlag(pMemDesc, MEMDESC_FLAGS_ALLOC_FROM_SCANOUT_CARVEOUT) || + memdescGetFlag(pMemDesc, MEMDESC_FLAGS_GUEST_ALLOCATED)) { if (NV_RM_PAGE_SIZE < os_page_size && !memdescGetContiguity(pMemDesc, AT_CPU)) @@ -863,6 +882,7 @@ NV_STATUS osAllocPagesInternal( memdescGetCpuCacheAttrib(pMemDesc), memdescGetGuestId(pMemDesc), memdescGetPteArray(pMemDesc, AT_CPU), + memdescGetFlag(pMemDesc, MEMDESC_FLAGS_ALLOC_FROM_SCANOUT_CARVEOUT), &pMemData); } else @@ -991,6 +1011,84 @@ NV_STATUS osUnlockMem( return NV_ERR_NOT_SUPPORTED; } +NV_STATUS osMapPciMemoryAreaUser +( + OS_GPU_INFO *pOsGpuInfo, + MemoryArea memArea, + NvU32 protect, + NvU32 mode, + NvP64 *pVirtualAddress, + NvP64 *pPriv +) +{ + NV_STATUS status = NV_OK; + NvU64 origStart; + NvU64 origSize; + NvU64 diffStart; + + if (memArea.numRanges == 0) + { + *pVirtualAddress = (NvP64) NULL; + *pPriv = NULL; + return NV_OK; + } + + // Fix alignment insofar as we can (middle blocks can't be force-aligned this way) + origStart = memArea.pRanges[0].start; + memArea.pRanges[0].start = NV_ALIGN_DOWN64(origStart, os_page_size); + diffStart = origStart - memArea.pRanges[0].start; + memArea.pRanges[0].size += diffStart; + origSize = memArea.pRanges[memArea.numRanges - 1llu].size; + memArea.pRanges[memArea.numRanges - 1llu].size = NV_ALIGN_UP64(origSize, os_page_size); + + { + nv_usermap_access_params_t **ppNvuap, tNvuap; + NvU64 totalRangeSize = sizeof(MemoryRange) * memArea.numRanges; + + portMemSet(&tNvuap, 0, sizeof(nv_usermap_access_params_t)); + + tNvuap.memArea = memArea; + // access_size is only for caching, we can use os_page_size for now until linux has been properly plumbed + tNvuap.access_start = memArea.pRanges[0].start; + tNvuap.access_size = os_page_size; + + tNvuap.caching = mode; + tNvuap.remap_prot_extra = 0; + tNvuap.contig = NV_TRUE; + + NV_ASSERT_OK_OR_RETURN(nv_get_usermap_access_params(pOsGpuInfo, &tNvuap)); + + ppNvuap = (nv_usermap_access_params_t **) tlsEntryAcquire(TLS_ENTRY_ID_MAPPING_CONTEXT); + NV_ASSERT_OR_RETURN(ppNvuap != NULL, NV_ERR_INVALID_STATE); + + NV_ASSERT_OK_OR_GOTO(status, + os_alloc_mem((void**) ppNvuap, sizeof(nv_alloc_mapping_context_t)), + free_tls); + + portMemCopy(*ppNvuap, sizeof(nv_usermap_access_params_t), + &tNvuap, sizeof(nv_usermap_access_params_t)); + + NV_ASSERT_OK_OR_GOTO(status, + os_alloc_mem((void**) &((*ppNvuap)->memArea.pRanges), totalRangeSize), + free_nvuap); + + portMemCopy((*ppNvuap)->memArea.pRanges, totalRangeSize, memArea.pRanges, totalRangeSize); + + *pVirtualAddress = (NvP64) (memArea.pRanges[0].start + diffStart); + goto unalign_and_return; + +free_nvuap: + os_free_mem(*ppNvuap); +free_tls: + tlsEntryRelease(TLS_ENTRY_ID_MAPPING_CONTEXT); + } +unalign_and_return: + memArea.pRanges[memArea.numRanges - 1llu].size = origSize; + memArea.pRanges[0].size -= diffStart; + memArea.pRanges[0].start = origStart; + return status; +} + NV_STATUS osMapPciMemoryUser( OS_GPU_INFO *pOsGpuInfo, RmPhysAddr busAddress, @@ -1001,22 +1099,16 @@ NV_STATUS osMapPciMemoryUser( NvU32 modeFlag ) { - void *addr; - NvU64 offset = 0; - - NV_ASSERT_OR_RETURN(length != 0, NV_ERR_INVALID_ARGUMENT); + MemoryArea memArea; + MemoryRange memRange; - offset = busAddress & (os_page_size - 1llu); - busAddress = NV_ALIGN_DOWN64(busAddress, os_page_size); - length = NV_ALIGN_UP64(busAddress + offset + length, os_page_size) - busAddress; + memArea.numRanges = 1; + memArea.pRanges = &memRange; - addr = os_map_user_space(busAddress, length, modeFlag, Protect, (void **) pPriv); + memRange.start = busAddress; + memRange.size = length; - NV_ASSERT_OR_RETURN(addr != NULL, NV_ERR_INVALID_ADDRESS); - - *pVirtualAddress = (NvP64)(((NvU64) addr) + offset); - - return NV_OK; + return osMapPciMemoryAreaUser(pOsGpuInfo, memArea, Protect, modeFlag, pVirtualAddress, pPriv); } void osUnmapPciMemoryUser( @@ -1026,17 +1118,6 @@ void osUnmapPciMemoryUser( NvP64 pPriv ) { - NvU64 addr; - void *priv; - - addr = (NvU64)(virtualAddress); - priv = (void*)(pPriv); - - length = NV_ALIGN_UP64(addr + length, os_page_size); - addr = NV_ALIGN_DOWN64(addr, os_page_size); - length -= addr; - - os_unmap_user_space((void *)addr, length, priv); } NV_STATUS osMapPciMemoryKernelOld @@ -2706,6 +2787,8 @@ void osInitSystemStaticConfig(SYS_STATIC_CONFIG *pConfig) { pConfig->bIsNotebook = rm_is_system_notebook(); pConfig->bOsCCEnabled = os_cc_enabled; + pConfig->bOsCCSevSnpEnabled = os_cc_sev_snp_enabled; + pConfig->bOsCCSnpVtomEnabled = os_cc_snp_vtom_enabled; pConfig->bOsCCTdxEnabled = os_cc_tdx_enabled; } @@ -3081,6 +3164,15 @@ NvBool osTestPcieExtendedConfigAccess(void *handle, NvU32 offset) return configAccess; } +static NvBool skipIovaMappingForTegra +( + PIOVAMAPPING pIovaMapping, + nv_state_t *nv +) +{ + return NV_FALSE; +} + /*! * @brief Map memory into an IOVA space according to the given mapping info. * @@ -3139,7 +3231,12 @@ osIovaMap // since the physical address is already the DMA address to be used by the // GPU. // - if (memdescGetFlag(pIovaMapping->pPhysMemDesc, MEMDESC_FLAGS_GUEST_ALLOCATED)) + // For carveout memory, we setup identity mapping, so physical + // address is same as the DMA address. + // + // + if (memdescGetFlag(pIovaMapping->pPhysMemDesc, MEMDESC_FLAGS_ALLOC_FROM_SCANOUT_CARVEOUT) || + memdescGetFlag(pIovaMapping->pPhysMemDesc, MEMDESC_FLAGS_GUEST_ALLOCATED)) { return NV_OK; } @@ -3246,6 +3343,11 @@ osIovaMap } } + if (skipIovaMappingForTegra(pIovaMapping, nv)) + { + return NV_OK; + } + if (!bIsBar0 && (!bIsFbOffset || bIsIndirectPeerMapping)) { status = nv_dma_map_alloc( @@ -3332,16 +3434,22 @@ osIovaUnmap } // - // For guest-allocated memory, we never actually remapped the memory, so we - // shouldn't try to unmap it here. + // For guest-allocated or carveout memory, we never actually remapped the + // memory, so we shouldn't try to unmap it here. // - if (memdescGetFlag(pIovaMapping->pPhysMemDesc, MEMDESC_FLAGS_GUEST_ALLOCATED)) + if (memdescGetFlag(pIovaMapping->pPhysMemDesc, MEMDESC_FLAGS_ALLOC_FROM_SCANOUT_CARVEOUT) || + memdescGetFlag(pIovaMapping->pPhysMemDesc, MEMDESC_FLAGS_GUEST_ALLOCATED)) { return; } nv = NV_GET_NV_STATE(pGpu); + if (skipIovaMappingForTegra(pIovaMapping, nv)) + { + return; + } + if (memdescGetFlag(pIovaMapping->pPhysMemDesc, MEMDESC_FLAGS_PEER_IO_MEM)) { nv_dma_unmap_mmio(nv->dma_dev, diff --git a/src/nvidia/arch/nvalloc/unix/src/osapi.c b/src/nvidia/arch/nvalloc/unix/src/osapi.c index 78942a2aac..59ad6a6eb8 100644 --- a/src/nvidia/arch/nvalloc/unix/src/osapi.c +++ b/src/nvidia/arch/nvalloc/unix/src/osapi.c @@ -610,7 +610,7 @@ static void RmExecuteWorkItem( ) { nv_work_item_t *pWi = (nv_work_item_t *)pWorkItem; - NvU32 gpuMask; + NvU32 gpuMask = 0; NvU32 releaseLocks = 0; if (!(pWi->flags & NV_WORK_ITEM_FLAGS_REQUIRES_GPU) && @@ -637,18 +637,27 @@ static void RmExecuteWorkItem( // Make sure that pGpu is present OBJGPU *pGpu = gpumgrGetGpu(pWi->gpuInstance); if (pGpu != NULL) - { - pWi->func.pGpuFunction(pWi->gpuInstance, pWi->pData); + { + nv_state_t *nv = NV_GET_NV_STATE(pGpu); + + NV_ASSERT_OR_GOTO(nv != NULL, done); + + if (!((pWi->flags & OS_QUEUE_WORKITEM_FLAGS_DROP_ON_UNLOAD_QUEUE_FLUSH) && os_is_queue_flush_ongoing(nv->queue))) + { + pWi->func.pGpuFunction(pWi->gpuInstance, pWi->pData); + } } else { NV_PRINTF(LEVEL_ERROR, "Invalid GPU instance for workitem\n"); - goto done; } } else { - pWi->func.pSystemFunction(pWi->pData); + if (!((pWi->flags & OS_QUEUE_WORKITEM_FLAGS_DROP_ON_UNLOAD_QUEUE_FLUSH) && os_is_queue_flush_ongoing(NULL))) + { + pWi->func.pSystemFunction(pWi->pData); + } } done: @@ -1320,8 +1329,9 @@ RmDmabufVerifyMemHandle( return NV_ERR_INVALID_ARGUMENT; } - // Only supported for vidmem handles - if (memdescGetAddressSpace(pMemDesc) != ADDR_FBMEM) + // Only supported for vidmem and sysmem(only for 0FB) handles + if ((memdescGetAddressSpace(pMemDesc) != ADDR_FBMEM) && + (!pGpu->getProperty(pGpu, PDB_PROP_GPU_ZERO_FB))) { return NV_ERR_INVALID_ARGUMENT; } @@ -1609,7 +1619,7 @@ void NV_API_CALL rm_disable_adapter( NV_ENTER_RM_RUNTIME(sp,fp); threadStateInit(&threadState, THREAD_STATE_FLAGS_NONE); - NV_ASSERT_OK(os_flush_work_queue(pNv->queue)); + NV_ASSERT_OK(os_flush_work_queue(pNv->queue, NV_TRUE)); // LOCK: acquire API lock if (rmapiLockAcquire(API_LOCK_FLAGS_NONE, RM_LOCK_MODULES_DESTROY) == NV_OK) @@ -1627,7 +1637,7 @@ void NV_API_CALL rm_disable_adapter( rmapiLockRelease(); } - NV_ASSERT_OK(os_flush_work_queue(pNv->queue)); + NV_ASSERT_OK(os_flush_work_queue(pNv->queue, NV_TRUE)); threadStateFree(&threadState, THREAD_STATE_FLAGS_NONE); NV_EXIT_RM_RUNTIME(sp,fp); } @@ -1904,8 +1914,9 @@ static void nv_align_mmap_offset_length( NvU64 page_size = os_page_size; NvU64 end = nvuap->size + (nvuap->addr & (page_size - 1)); - nvuap->mmap_start = NV_ALIGN_DOWN(nvuap->addr, page_size); - nvuap->mmap_size = NV_ALIGN_UP(end, page_size); + nvuap->memArea.numRanges = 1; + nvuap->memArea.pRanges[0].start = NV_ALIGN_DOWN(nvuap->addr, page_size); + nvuap->memArea.pRanges[0].size = NV_ALIGN_UP(end, page_size); nvuap->offset = NV_ALIGN_DOWN(nvuap->offset, page_size); } @@ -1941,6 +1952,42 @@ static inline NV_STATUS RmGetArrayMinMax( return NV_OK; } +static NV_STATUS RmGetAllocPrivate(RmClient *, NvU32, NvU64, NvU64, NvU32 *, void **, + NvU64 *); + +static NV_STATUS RmValidateMmapRequest( + nv_state_t *pNv, + NvU64 offset, + NvU64 length, + NvU32 *pProtection +) +{ + NV2080_CTRL_GPU_VALIDATE_MEM_MAP_REQUEST_PARAMS params = { 0 }; + RM_API *pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); + NV_STATUS status; + + if (osIsAdministrator()) + { + *pProtection = NV_PROTECT_READ_WRITE; + return NV_OK; + } + + params.addressStart = offset; + params.addressLength = length; + + status = pRmApi->Control(pRmApi, pNv->rmapi.hClient, + pNv->rmapi.hSubDevice, + NV2080_CTRL_CMD_GPU_VALIDATE_MEM_MAP_REQUEST, + ¶ms, sizeof(params)); + + if (status == NV_OK) + { + *pProtection = params.protection; + } + + return status; +} + static NV_STATUS RmSetUserMapAccessRange( nv_usermap_access_params_t *nvuap ) @@ -1949,8 +1996,8 @@ static NV_STATUS RmSetUserMapAccessRange( if (nvuap->contig) { - nvuap->access_start = nvuap->mmap_start; - nvuap->access_size = nvuap->mmap_size; + nvuap->access_start = nvuap->memArea.pRanges[0].start; + nvuap->access_size = nvuap->memArea.pRanges[0].size; } else { @@ -1972,10 +2019,6 @@ static NV_STATUS RmSetUserMapAccessRange( return status; } -static NV_STATUS RmGetAllocPrivate(RmClient *, NvU32, NvU64, NvU64, NvU32 *, void **, - NvU64 *); -static NV_STATUS RmValidateMmapRequest(nv_state_t *, NvU64, NvU64, NvU32 *); - static NV_STATUS RmGetMmapPteArray( KernelMemorySystem *pKernelMemorySystem, RsClient *pClient, @@ -2019,11 +2062,11 @@ static NV_STATUS RmGetMmapPteArray( // if (nvuap->contig) { - pages = nvuap->mmap_size / os_page_size; + pages = nvuap->memArea.pRanges[0].size / os_page_size; } else { - pages = nvuap->mmap_size / NV_RM_PAGE_SIZE; + pages = nvuap->memArea.pRanges[0].size / NV_RM_PAGE_SIZE; } NV_ASSERT_OR_RETURN(pages != 0, NV_ERR_INVALID_ARGUMENT); @@ -2064,8 +2107,8 @@ static NV_STATUS RmGetMmapPteArray( } else { - // Offset is accounted in nvuap->mmap_start.start. - for (nvuap->page_array[0] = nvuap->mmap_start, i = 1; + // Offset is accounted in nvuap->memArea.pRanges[0].start. + for (nvuap->page_array[0] = nvuap->memArea.pRanges[0].start, i = 1; i < pages; i++) { nvuap->page_array[i] = nvuap->page_array[i-1] + os_page_size; @@ -2118,14 +2161,24 @@ static NV_STATUS RmCreateMmapContextLocked( GPU_RES_SET_THREAD_BC_STATE(pSubdevice); } } - - status = os_alloc_mem((void**)&nvuap, sizeof(nv_usermap_access_params_t)); - if (status != NV_OK) + nvuap = tlsEntryGet(TLS_ENTRY_ID_MAPPING_CONTEXT); + if (nvuap != NULL) { - return status; + NV_ASSERT(tlsEntryRelease(TLS_ENTRY_ID_MAPPING_CONTEXT) == 0); + prot = NV_PROTECT_READ_WRITE; + // + // TODO: Add this to the mapping context so we don't need to do gymnastics + // to figure out what the correct pNv is + // + pNv = NV_GET_NV_STATE(pGpu); + goto add_ctx_to_file; } + NV_ASSERT_OK_OR_RETURN(os_alloc_mem((void**)&nvuap, sizeof(nv_usermap_access_params_t))); portMemSet(nvuap, 0, sizeof(nv_usermap_access_params_t)); + + NV_ASSERT_OK_OR_GOTO(status, os_alloc_mem((void**)&(nvuap->memArea.pRanges), sizeof(MemoryRange)), free_nvuap); + nvuap->addr = addr; nvuap->size = size; nvuap->offset = offset; @@ -2146,7 +2199,6 @@ static NV_STATUS RmCreateMmapContextLocked( bSriovHostCoherentFbOffset = os_is_vgx_hyper() && IS_COHERENT_FB_OFFSET(pKernelMemorySystem, addr, size); } - // // If no device is given, or the address isn't in the given device's BARs, // validate this as a system memory mapping and associate it with the @@ -2218,10 +2270,7 @@ static NV_STATUS RmCreateMmapContextLocked( } } - if (RmSetUserMapAccessRange(nvuap) != NV_OK) - { - goto done; - } + NV_ASSERT_OK_OR_GOTO(status, RmSetUserMapAccessRange(nvuap), done); status = nv_get_usermap_access_params(pNv, nvuap); if (status != NV_OK) @@ -2238,10 +2287,13 @@ static NV_STATUS RmCreateMmapContextLocked( } } +add_ctx_to_file: status = nv_add_mapping_context_to_file(pNv, nvuap, prot, pAllocPriv, pageIndex, fd); done: + os_free_mem(nvuap->memArea.pRanges); +free_nvuap: os_free_mem(nvuap); return status; } @@ -2343,7 +2395,8 @@ static NV_STATUS RmGetAllocPrivate( bReadOnlyMem = memdescGetFlag(pMemDesc, MEMDESC_FLAGS_USER_READ_ONLY); bPeerIoMem = memdescGetFlag(pMemDesc, MEMDESC_FLAGS_PEER_IO_MEM); - if (!(pMemDesc->Allocated || bPeerIoMem)) + if (!(pMemDesc->Allocated || bPeerIoMem || + memdescGetFlag(pMemDesc, MEMDESC_FLAGS_ALLOC_FROM_SCANOUT_CARVEOUT))) { rmStatus = NV_ERR_OBJECT_NOT_FOUND; goto done; @@ -2400,39 +2453,6 @@ static NV_STATUS RmGetAllocPrivate( return rmStatus; } -static NV_STATUS RmValidateMmapRequest( - nv_state_t *pNv, - NvU64 offset, - NvU64 length, - NvU32 *pProtection -) -{ - NV2080_CTRL_GPU_VALIDATE_MEM_MAP_REQUEST_PARAMS params = { 0 }; - RM_API *pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); - NV_STATUS status; - - if (osIsAdministrator()) - { - *pProtection = NV_PROTECT_READ_WRITE; - return NV_OK; - } - - params.addressStart = offset; - params.addressLength = length; - - status = pRmApi->Control(pRmApi, pNv->rmapi.hClient, - pNv->rmapi.hSubDevice, - NV2080_CTRL_CMD_GPU_VALIDATE_MEM_MAP_REQUEST, - ¶ms, sizeof(params)); - - if (status == NV_OK) - { - *pProtection = params.protection; - } - - return status; -} - NV_STATUS rm_get_adapter_status( nv_state_t *pNv, NvU32 *pStatus @@ -4958,8 +4978,22 @@ void NV_API_CALL rm_kernel_rmapi_op(nvidia_stack_t *sp, void *ops_cmd) break; case NV04_MAP_MEMORY: + { + // + // We need to free NVUAP for MEM_SPACE_USER mappings, + // since we're not going through the regular path + // + nv_usermap_access_params_t *pNvuap = NULL; Nv04MapMemoryKernel(&ops->params.mapMemory); + pNvuap = (nv_usermap_access_params_t *) tlsEntryGet(TLS_ENTRY_ID_MAPPING_CONTEXT); + if (pNvuap != NULL) + { + NV_ASSERT(tlsEntryRelease(TLS_ENTRY_ID_MAPPING_CONTEXT) == 0); + os_free_mem(pNvuap->memArea.pRanges); + os_free_mem(pNvuap); + } break; + } case NV04_UNMAP_MEMORY: Nv04UnmapMemoryKernel(&ops->params.unmapMemory); @@ -5438,7 +5472,7 @@ NV_STATUS NV_API_CALL rm_dma_buf_dup_mem_handle( NvU64 offset, NvU64 size, NvHandle *phMemoryDuped, - void **ppStaticMemInfo + void **ppMemInfo ) { MEMORY_DESCRIPTOR *pMemDesc; @@ -5492,7 +5526,7 @@ NV_STATUS NV_API_CALL rm_dma_buf_dup_mem_handle( *phMemoryDuped = hMemoryDuped; } } - *ppStaticMemInfo = (void *) pMemDesc; + *ppMemInfo = (void *) pMemDesc; } threadStateFree(&threadState, THREAD_STATE_FLAGS_NONE); @@ -5534,167 +5568,130 @@ void NV_API_CALL rm_dma_buf_undup_mem_handle( NV_EXIT_RM_RUNTIME(sp,fp); } +// +// Maps a handle to system physical addresses: +// C2C for coherent platforms +// BAR1(static & dynamic) for non-coherent platforms +// Must be called with API lock and GPU lock held for dynamic BAR1. +// NV_STATUS NV_API_CALL rm_dma_buf_map_mem_handle( nvidia_stack_t *sp, nv_state_t *nv, NvHandle hClient, NvHandle hMemory, - NvU64 offset, - NvU64 size, - void *pStaticMemInfo, - nv_phys_addr_range_t **ppRanges, - NvU32 *pRangeCount + MemoryRange memRange, + void *pMemInfo, + NvBool bStaticPhysAddrs, + MemoryArea *pMemArea ) { THREAD_STATE_NODE threadState; NV_STATUS rmStatus = NV_ERR_INVALID_ARGUMENT; OBJGPU *pGpu; + MEMORY_DESCRIPTOR *pMemDesc; void *fp; NV_ENTER_RM_RUNTIME(sp,fp); threadStateInit(&threadState, THREAD_STATE_FLAGS_NONE); - NV_ASSERT_OR_GOTO(((ppRanges != NULL) && - (pRangeCount != NULL) && - (pStaticMemInfo != NULL)), Done); + NV_ASSERT_OR_GOTO(((pMemArea != NULL) && + (pMemInfo != NULL)) && + (memRange.size != 0), Done); pGpu = NV_GET_NV_PRIV_PGPU(nv); + pMemDesc = (MEMORY_DESCRIPTOR *) pMemInfo; - if (pGpu->getProperty(pGpu, PDB_PROP_GPU_COHERENT_CPU_MAPPING)) + if ((pGpu->getProperty(pGpu, PDB_PROP_GPU_COHERENT_CPU_MAPPING)) || + (pGpu->getProperty(pGpu, PDB_PROP_GPU_ZERO_FB))) { KernelMemorySystem *pKernelMemorySystem = GPU_GET_KERNEL_MEMORY_SYSTEM(pGpu); - MEMORY_DESCRIPTOR *pMemDesc = (MEMORY_DESCRIPTOR *) pStaticMemInfo; - NvU32 memdescPageSize = memdescGetPageSize(pMemDesc, AT_GPU); - NvU64 prologueOffset = offset; - NvU64 prologueSize = 0; - NvU64 epilogueOffset = offset; - NvU64 epilogueSize = 0; - NvU64 mainOffset = offset; - NvU64 mainSize = 0; - NvU32 mainPageCount = 0; - NvU64 alignedOffset; - NvU32 pageCount = 0; - NvU32 index = 0; - - alignedOffset = NV_ALIGN_UP64(offset, memdescPageSize); - - if ((size > 0) && offset != alignedOffset) - { - prologueOffset = offset; - prologueSize = NV_MIN(alignedOffset - offset, size); - pageCount++; - - size -= prologueSize; - } - - if (size > 0) - { - mainOffset = prologueOffset + prologueSize; - mainSize = NV_ALIGN_DOWN64(size, memdescPageSize); - mainPageCount = mainSize / memdescPageSize; - pageCount += mainPageCount; - - size -= mainSize; - } - - if (size > 0) - { - epilogueOffset = mainOffset + mainSize; - epilogueSize = size; - pageCount++; - - size -= epilogueSize; - } - - if ((pageCount == 0) || (size != 0)) - { - NV_ASSERT(0); - rmStatus = NV_ERR_INVALID_STATE; - goto Done; - } + NvBool contiguity = memdescCheckContiguity(pMemDesc, AT_CPU); - rmStatus = os_alloc_mem((void **) ppRanges, - pageCount * sizeof(nv_phys_addr_range_t)); - if (rmStatus != NV_OK) + if (contiguity) { - goto Done; - } + NvU64 physAddr = memdescGetPhysAddr(pMemDesc, AT_CPU, memRange.start); - // Fill the first unaligned segment - if (prologueSize > 0) - { - NvU64 physAddr = memdescGetPhysAddr(pMemDesc, AT_CPU, prologueOffset); - (*ppRanges)[0].addr = pKernelMemorySystem->coherentCpuFbBase + physAddr; - (*ppRanges)[0].len = prologueSize; + NV_ASSERT_OK_OR_GOTO(rmStatus, os_alloc_mem((void **) &pMemArea->pRanges, + sizeof(MemoryRange)), Done); - index = 1; + pMemArea->pRanges[0].start = pKernelMemorySystem->coherentCpuFbBase + physAddr; + pMemArea->pRanges[0].size = memRange.size; + pMemArea->numRanges = 1; } - - // Fill the aligned segments between first and last entries - while (mainPageCount != 0) + else { - NvU64 physAddr = memdescGetPhysAddr(pMemDesc, AT_CPU, alignedOffset); - (*ppRanges)[index].addr = pKernelMemorySystem->coherentCpuFbBase + physAddr; - (*ppRanges)[index].len = memdescPageSize; - index++; + NvU64 idx = 0; + NvU64 memdescPageSize = memdescGetPageSize(pMemDesc, AT_CPU); + NvU64 origEnd = memRange.start + memRange.size; + NvU64 realStart = NV_ALIGN_DOWN64(memRange.start, memdescPageSize); + NvU64 realEnd = NV_ALIGN_UP64(memRange.start + memRange.size, memdescPageSize); + NvU64 realSize = realEnd - realStart; + NvU64 pageCount = realSize / memdescPageSize; + + NV_ASSERT_OK_OR_GOTO(rmStatus, os_alloc_mem((void **) &pMemArea->pRanges, + pageCount * sizeof(MemoryRange)), Done); + + for(idx = 0; idx < pageCount; idx++) + { + NvU64 physAddr = memdescGetPhysAddr(pMemDesc, AT_CPU, + realStart + (idx * memdescPageSize)); + pMemArea->pRanges[idx].start = pKernelMemorySystem->coherentCpuFbBase + physAddr; + pMemArea->pRanges[idx].size = memdescPageSize; + } - alignedOffset += memdescPageSize; - mainPageCount--; - } + pMemArea->pRanges[0].start += (memRange.start - realStart); + pMemArea->pRanges[0].size -= (memRange.start - realStart); + pMemArea->pRanges[pageCount - 1llu].size -= (realEnd - origEnd); - // Fill the last unaligned segment - if (epilogueSize > 0) - { - NvU64 physAddr = memdescGetPhysAddr(pMemDesc, AT_CPU, epilogueOffset); - (*ppRanges)[index].addr = pKernelMemorySystem->coherentCpuFbBase + physAddr; - (*ppRanges)[index].len = epilogueSize; - index++; + pMemArea->numRanges = pageCount; } - - NV_ASSERT(index == pageCount); - - *pRangeCount = pageCount; } else { - Device *pDevice; + Device *pDevice = NULL; RsClient *pClient; + NvU64 idx; + NvU64 barOffset; KernelBus *pKernelBus; - NvU64 bar1Va; - NV_ASSERT(rmapiLockIsOwner()); - NV_ASSERT(rmDeviceGpuLockIsOwner(gpuGetInstance(pGpu))); + pKernelBus = GPU_GET_KERNEL_BUS(pGpu); - NV_ASSERT_OK_OR_GOTO(rmStatus, - serverGetClientUnderLock(&g_resServ, hClient, &pClient), - Done); + if (!bStaticPhysAddrs) + { + // Dynamic BAR1 requires RMAPI and GPU lock to be held + NV_ASSERT(rmapiLockIsOwner()); + NV_ASSERT(rmDeviceGpuLockIsOwner(gpuGetInstance(pGpu))); + + NV_ASSERT_OK_OR_GOTO(rmStatus, + serverGetClientUnderLock(&g_resServ, hClient, &pClient), + Done); + + NV_ASSERT_OK_OR_GOTO(rmStatus, + deviceGetByGpu(pClient, pGpu, NV_TRUE, &pDevice), + Done); + } + NV_CHECK_OR_GOTO(LEVEL_ERROR, + memdescGetAddressSpace(pMemDesc) == ADDR_FBMEM, + Done); + + // + // We don't take locks for static BAR1. + // Thus, we operate directly on the memdesc passed to + // bypass the client lookup which requires client locks. + // NV_ASSERT_OK_OR_GOTO(rmStatus, - deviceGetByGpu(pClient, pGpu, NV_TRUE, &pDevice), + kbusMapFbAperture_HAL(pGpu, pKernelBus, pMemDesc, memRange, pMemArea, + (BUS_MAP_FB_FLAGS_MAP_UNICAST | BUS_MAP_FB_FLAGS_ALLOW_DISCONTIG), + pDevice), Done); - pKernelBus = GPU_GET_KERNEL_BUS(pGpu); - - rmStatus = kbusMapFbApertureByHandle(pGpu, pKernelBus, hClient, - hMemory, offset, size, &bar1Va, - pDevice); - if (rmStatus != NV_OK) - { - goto Done; - } + barOffset = gpumgrGetGpuPhysFbAddr(pGpu); - // Adjust this alloc when discontiguous BAR1 is supported - rmStatus = os_alloc_mem((void **) ppRanges, - sizeof(nv_phys_addr_range_t)); - if (rmStatus != NV_OK) + for (idx = 0; idx < pMemArea->numRanges; idx++) { - kbusUnmapFbApertureByHandle(pGpu, pKernelBus, hClient, - hMemory, bar1Va); - goto Done; + pMemArea->pRanges[idx].start += barOffset; } - (*ppRanges)[0].addr = bar1Va; - (*ppRanges)[0].len = size; - *pRangeCount = 1; } Done: @@ -5705,53 +5702,64 @@ NV_STATUS NV_API_CALL rm_dma_buf_map_mem_handle( } // -// Unmaps a handle from BAR1. -// Must be called with API lock and GPU lock held. +// Unmaps a handle that was mapped to system physical addresses. +// Must be called with API lock and GPU lock held for dynamic BAR1. // void NV_API_CALL rm_dma_buf_unmap_mem_handle( nvidia_stack_t *sp, nv_state_t *nv, NvHandle hClient, NvHandle hMemory, - NvU64 size, - nv_phys_addr_range_t **ppRanges, - NvU32 rangeCount + void *pMemInfo, + NvBool bStaticPhysAddrs, + MemoryArea memArea ) { THREAD_STATE_NODE threadState; - NV_STATUS rmStatus = NV_OK; OBJGPU *pGpu; - NvU32 i; void *fp; NV_ENTER_RM_RUNTIME(sp,fp); threadStateInit(&threadState, THREAD_STATE_FLAGS_NONE); - NV_ASSERT_OR_GOTO(((ppRanges != NULL) && (rangeCount != 0)), Done); - pGpu = NV_GET_NV_PRIV_PGPU(nv); - if (!pGpu->getProperty(pGpu, PDB_PROP_GPU_COHERENT_CPU_MAPPING)) + if (pGpu->getProperty(pGpu, PDB_PROP_GPU_COHERENT_CPU_MAPPING) || + pGpu->getProperty(pGpu, PDB_PROP_GPU_ZERO_FB)) + { + os_free_mem(memArea.pRanges); + } + else { KernelBus *pKernelBus; - - NV_ASSERT(rmapiLockIsOwner()); - NV_ASSERT(rmDeviceGpuLockIsOwner(gpuGetInstance(pGpu))); + NvU64 idx; + NvU64 barOffset; + MEMORY_DESCRIPTOR *pMemDesc = (MEMORY_DESCRIPTOR *) pMemInfo; pKernelBus = GPU_GET_KERNEL_BUS(pGpu); + barOffset = gpumgrGetGpuPhysFbAddr(pGpu); - for (i = 0; i < rangeCount; i++) + for (idx = 0; idx < memArea.numRanges; idx++) { - rmStatus = kbusUnmapFbApertureByHandle(pGpu, pKernelBus, hClient, - hMemory, (*ppRanges)[i].addr); - NV_ASSERT_OK(rmStatus); + memArea.pRanges[idx].start -= barOffset; + } + + if (!bStaticPhysAddrs) + { + // Dynamic BAR1 requires RMAPI and GPU lock to be held + NV_ASSERT(rmapiLockIsOwner()); + NV_ASSERT(rmDeviceGpuLockIsOwner(gpuGetInstance(pGpu))); } - } - os_free_mem(*ppRanges); - *ppRanges = NULL; + // + // We don't take locks for static BAR1. + // Thus, we operate directly on the memdesc passed to + // bypass the client lookup which requires client locks. + // + NV_ASSERT_OK(kbusUnmapFbAperture_HAL(pGpu, pKernelBus, pMemDesc, memArea, + BUS_MAP_FB_FLAGS_MAP_UNICAST)); + } -Done: threadStateFree(&threadState, THREAD_STATE_FLAGS_NONE); NV_EXIT_RM_RUNTIME(sp,fp); } @@ -5789,9 +5797,10 @@ NV_STATUS NV_API_CALL rm_dma_buf_get_client_and_device( phSubdevice, ppGpuInstanceInfo); if (rmStatus == NV_OK) { - // Note: revisit this when BAR1 static map is supported. - *pbStaticPhysAddrs = pGpu->getProperty(pGpu, - PDB_PROP_GPU_COHERENT_CPU_MAPPING); + *pbStaticPhysAddrs = ((pGpu->getProperty(pGpu, + PDB_PROP_GPU_COHERENT_CPU_MAPPING)) || + kbusIsStaticBar1Enabled(pGpu, GPU_GET_KERNEL_BUS(pGpu)) || + (pGpu->getProperty(pGpu, PDB_PROP_GPU_ZERO_FB))); } rmDeviceGpuLocksRelease(pGpu, GPUS_LOCK_FLAGS_NONE, NULL); diff --git a/src/nvidia/arch/nvalloc/unix/src/osinit.c b/src/nvidia/arch/nvalloc/unix/src/osinit.c index 33742b947c..6ab4c39616 100644 --- a/src/nvidia/arch/nvalloc/unix/src/osinit.c +++ b/src/nvidia/arch/nvalloc/unix/src/osinit.c @@ -59,6 +59,7 @@ #include #include "liblogdecode.h" #include +#include #include #include @@ -364,7 +365,8 @@ osHandleGpuLost nvErrorLog_va((void *)pGpu, ROBUST_CHANNEL_GPU_HAS_FALLEN_OFF_THE_BUS, "GPU has fallen off the bus."); - gpuNotifySubDeviceEvent(pGpu, NV2080_NOTIFIERS_RC_ERROR, NULL, 0, ROBUST_CHANNEL_GPU_HAS_FALLEN_OFF_THE_BUS, 0); + gpuNotifySubDeviceEvent(pGpu, NV2080_NOTIFIERS_GPU_UNAVAILABLE, NULL, + 0, ROBUST_CHANNEL_GPU_HAS_FALLEN_OFF_THE_BUS, 0); NV_DEV_PRINTF(NV_DBG_ERRORS, nv, "GPU has fallen off the bus.\n"); @@ -377,6 +379,13 @@ osHandleGpuLost gpuSetDisconnectedProperties(pGpu); + if (IS_GSP_CLIENT(pGpu)) + { + // Notify all channels of the error so that UVM can fail gracefully + KernelGsp *pKernelGsp = GPU_GET_KERNEL_GSP(pGpu); + kgspRcAndNotifyAllChannels(pGpu, pKernelGsp, ROBUST_CHANNEL_GPU_HAS_FALLEN_OFF_THE_BUS, NV_FALSE); + } + // Trigger the OS's PCI recovery mechanism if (nv_pci_trigger_recovery(nv) != NV_OK) { @@ -398,14 +407,12 @@ osHandleGpuLost osModifyGpuSwStatePersistence(pGpu->pOsGpuInfo, NV_TRUE); } - OBJSYS *pSys = SYS_GET_INSTANCE(); - OBJCL *pCl = SYS_GET_CL(pSys); // Set SURPRISE_REMOVAL flag for eGPU to help in device removal. - if ((pCl != NULL) && - pCl->getProperty(pCl, PDB_PROP_CL_IS_EXTERNAL_GPU)) + if (pGpu->getProperty(pGpu, PDB_PROP_GPU_IS_EXTERNAL_GPU)) { nv->flags |= NV_FLAG_IN_SURPRISE_REMOVAL; } + DBG_BREAKPOINT(); } @@ -590,7 +597,9 @@ RmInitGpuInfoWithRmApi NV2080_CTRL_GPU_INFO_INDEX_DMABUF_CAPABILITY_YES); } - nv->coherent = pGpu->getProperty(pGpu, PDB_PROP_GPU_COHERENT_CPU_MAPPING); + nv->coherent = + (pGpu->getProperty(pGpu, PDB_PROP_GPU_COHERENT_CPU_MAPPING) || + pGpu->getProperty(pGpu, PDB_PROP_GPU_ZERO_FB)); portMemFree(pGpuInfoParams); @@ -1088,7 +1097,7 @@ RmInitNvDevice( // Configure eGPU setting if (RmCheckForExternalGpu(pGpu, pCl)) { - pCl->setProperty(pCl, PDB_PROP_CL_IS_EXTERNAL_GPU, NV_TRUE); + pGpu->setProperty(pGpu, PDB_PROP_GPU_IS_EXTERNAL_GPU, NV_TRUE); nv->is_external_gpu = NV_TRUE; } status->rmStatus = gpumgrStateInitGpu(pGpu); @@ -1416,6 +1425,7 @@ void RmClearPrivateState( nv_dynamic_power_t dynamicPowerCopy; NvU32 x = 0; NvU32 pmc_boot_0, pmc_boot_1, pmc_boot_42; + NvBool pr3_acpi_method_present = 0; // // Do not clear private state after GPU resets, it is used while @@ -1435,6 +1445,7 @@ void RmClearPrivateState( pmc_boot_0 = nvp->pmc_boot_0; pmc_boot_1 = nvp->pmc_boot_1; pmc_boot_42 = nvp->pmc_boot_42; + pr3_acpi_method_present = nvp->pr3_acpi_method_present; for (x = 0; x < MAX_I2C_ADAPTERS; x++) { @@ -1451,6 +1462,7 @@ void RmClearPrivateState( nvp->pmc_boot_0 = pmc_boot_0; nvp->pmc_boot_1 = pmc_boot_1; nvp->pmc_boot_42 = pmc_boot_42; + nvp->pr3_acpi_method_present = pr3_acpi_method_present; for (x = 0; x < MAX_I2C_ADAPTERS; x++) { @@ -1663,7 +1675,7 @@ static NV_STATUS RmFetchGspRmImages { nv_firmware_chip_family_t chipFamily; nv_priv_t *nvp = NV_GET_NV_PRIV(nv); - NvU32 gpuArch = (gpuGetArchitectureFromPmcBoot42(nvp->pmc_boot_42) << + NvU32 gpuArch = (decodePmcBoot42Architecture(nvp->pmc_boot_42) << GPU_ARCH_SHIFT); NvU32 gpuImpl = DRF_VAL(_PMC, _BOOT_42, _IMPLEMENTATION, nvp->pmc_boot_42); @@ -2133,8 +2145,6 @@ void RmShutdownAdapter( freeNbsiTable(pGpu); - gpuFreeEventHandle(pGpu); - OBJCL *pCl = SYS_GET_CL(pSys); OBJOS *pOS = GPU_GET_OS(pGpu); if (pCl != NULL) diff --git a/src/nvidia/arch/nvalloc/unix/src/osnvlink.c b/src/nvidia/arch/nvalloc/unix/src/osnvlink.c index 77b10d1c71..bb229713d5 100644 --- a/src/nvidia/arch/nvalloc/unix/src/osnvlink.c +++ b/src/nvidia/arch/nvalloc/unix/src/osnvlink.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2015-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/arch/nvalloc/unix/src/rm-gpu-ops.c b/src/nvidia/arch/nvalloc/unix/src/rm-gpu-ops.c index 213031ad1d..5b7e872f90 100644 --- a/src/nvidia/arch/nvalloc/unix/src/rm-gpu-ops.c +++ b/src/nvidia/arch/nvalloc/unix/src/rm-gpu-ops.c @@ -656,6 +656,18 @@ NV_STATUS NV_API_CALL rm_gpu_ops_disable_access_cntr(nvidia_stack_t *sp, return rmStatus; } +NV_STATUS NV_API_CALL rm_gpu_ops_get_nvlink_info (nvidia_stack_t *sp, + gpuDeviceHandle device, + gpuNvlinkInfo *nvlinkInfo) +{ + NV_STATUS rmStatus; + void *fp; + NV_ENTER_RM_RUNTIME(sp,fp); + rmStatus = nvGpuOpsGetNvlinkInfo(device, nvlinkInfo); + NV_EXIT_RM_RUNTIME(sp,fp); + return rmStatus; +} + NV_STATUS NV_API_CALL rm_gpu_ops_p2p_object_create(nvidia_stack_t *sp, gpuDeviceHandle device1, @@ -698,6 +710,23 @@ rm_gpu_ops_get_external_alloc_ptes(nvidia_stack_t* sp, return rmStatus; } +NV_STATUS NV_API_CALL +rm_gpu_ops_get_external_alloc_phys_addrs(nvidia_stack_t* sp, + nvgpuAddressSpaceHandle_t vaSpace, + NvHandle hDupedMemory, + NvU64 offset, + NvU64 size, + nvgpuExternalPhysAddrInfo_t gpuExternalPhysAddrsInfo) +{ + NV_STATUS rmStatus; + void *fp; + NV_ENTER_RM_RUNTIME(sp, fp); + rmStatus = nvGpuOpsGetExternalAllocPhysAddrs(vaSpace, hDupedMemory, offset, size, + gpuExternalPhysAddrsInfo); + NV_EXIT_RM_RUNTIME(sp, fp); + return rmStatus; +} + NV_STATUS NV_API_CALL rm_gpu_ops_retain_channel(nvidia_stack_t* sp, nvgpuAddressSpaceHandle_t vaSpace, @@ -848,6 +877,16 @@ rm_gpu_ops_paging_channel_push_stream(nvidia_stack_t *sp, return rmStatus; } +void NV_API_CALL +rm_gpu_ops_report_fatal_error(nvidia_stack_t *sp, + NV_STATUS error) +{ + void *fp; + NV_ENTER_RM_RUNTIME(sp,fp); + nvGpuOpsReportFatalError(error); + NV_EXIT_RM_RUNTIME(sp,fp); +} + NV_STATUS NV_API_CALL rm_gpu_ops_ccsl_context_init(nvidia_stack_t *sp, struct ccslContext_t **ctx, gpuChannelHandle channel) diff --git a/src/nvidia/arch/nvalloc/unix/src/unix_intr.c b/src/nvidia/arch/nvalloc/unix/src/unix_intr.c index f923d92010..7c43b5b02a 100644 --- a/src/nvidia/arch/nvalloc/unix/src/unix_intr.c +++ b/src/nvidia/arch/nvalloc/unix/src/unix_intr.c @@ -252,8 +252,6 @@ static NvBool osInterruptPending( { if (pKernelDisplay != NULL) { - NvU32 head = 0; - NvU32 headIntrMask = 0; MC_ENGINE_BITVECTOR intrDispPending; kdispServiceVblank_HAL(pGpu, pKernelDisplay, 0, @@ -261,32 +259,6 @@ static NvBool osInterruptPending( VBLANK_STATE_PROCESS_CALLED_FROM_ISR), &threadState); - // handle RG line interrupt, if it is forwared from GSP. - if (IS_GSP_CLIENT(pGpu)) - { - for (head = 0; head < kdispGetNumHeads(pKernelDisplay); ++head) - { - KernelHead *pKernelHead = KDISP_GET_HEAD(pKernelDisplay, head); - - headIntrMask = kheadReadPendingRgLineIntr_HAL(pGpu, pKernelHead, &threadState); - if (headIntrMask != 0) - { - NvU32 clearIntrMask = 0; - - kheadProcessRgLineCallbacks_HAL(pGpu, - pKernelHead, - head, - &headIntrMask, - &clearIntrMask, - osIsISR()); - if (clearIntrMask != 0) - { - kheadResetRgLineIntrMask_HAL(pGpu, pKernelHead, clearIntrMask, &threadState); - } - } - } - } - *serviced = NV_TRUE; bitVectorClr(&intr0Pending, MC_ENGINE_IDX_DISP); @@ -332,8 +304,6 @@ static NvBool osInterruptPending( } } } - threadStateFreeISRAndDeferredIntHandler(&threadState, - pDeviceLockGpu, THREAD_STATE_FLAGS_IS_ISR); if (sema_release) { @@ -346,6 +316,9 @@ static NvBool osInterruptPending( { rmDeviceGpuLockSetOwner(pDeviceLockGpu, GPUS_LOCK_OWNER_PENDING_DPC_REFRESH); } + + threadStateFreeISRAndDeferredIntHandler(&threadState, + pDeviceLockGpu, THREAD_STATE_FLAGS_IS_ISR); } tlsIsrDestroy(pIsrAllocator); @@ -544,9 +517,18 @@ static void RmIsrBottomHalf( pGpu, THREAD_STATE_FLAGS_IS_ISR_DEFERRED_INT_HANDLER); } + gpuInstance = 0; + pGpu = gpumgrGetNextGpu(gpuMask, &gpuInstance); + + threadStateInitISRAndDeferredIntHandler(&threadState, + pGpu, THREAD_STATE_FLAGS_IS_ISR_DEFERRED_INT_HANDLER); + // UNLOCK: release GPUs lock rmDeviceGpuLocksRelease(pDeviceLockGpu, GPUS_LOCK_FLAGS_NONE, NULL); + threadStateFreeISRAndDeferredIntHandler(&threadState, + pGpu, THREAD_STATE_FLAGS_IS_ISR_DEFERRED_INT_HANDLER); + tlsIsrDestroy(pIsrAllocator); portMemAllocatorRelease(pIsrAllocator); } @@ -568,6 +550,8 @@ static void RmIsrBottomHalfUnlocked( return; } + threadStateInit(&threadState, THREAD_STATE_FLAGS_NONE); + // Grab GPU lock here as this kthread-item was enqueued without grabbing GPU lock if (rmDeviceGpuLocksAcquire(pGpu, GPUS_LOCK_FLAGS_NONE, RM_LOCK_MODULES_DPC) == NV_OK) { @@ -575,20 +559,18 @@ static void RmIsrBottomHalfUnlocked( { pIntr = GPU_GET_INTR(pGpu); - threadStateInit(&threadState, THREAD_STATE_FLAGS_NONE); - if (intrGetIntrEn(pIntr) != INTERRUPT_TYPE_DISABLED) { MC_ENGINE_BITVECTOR intrPending; intrGetPendingStall_HAL(pGpu, pIntr, &intrPending, &threadState); intrServiceNonStallBottomHalf(pGpu, pIntr, &intrPending, &threadState); } - - threadStateFree(&threadState, THREAD_STATE_FLAGS_NONE); } rmDeviceGpuLocksRelease(pGpu, GPUS_LOCK_FLAGS_NONE, NULL); } + + threadStateFree(&threadState, THREAD_STATE_FLAGS_NONE); } NvBool NV_API_CALL rm_isr( diff --git a/src/nvidia/exports_link_command.txt b/src/nvidia/exports_link_command.txt index 67b031a308..e8b2e07127 100644 --- a/src/nvidia/exports_link_command.txt +++ b/src/nvidia/exports_link_command.txt @@ -108,9 +108,11 @@ --undefined=rm_gpu_ops_set_page_directory --undefined=rm_gpu_ops_unset_page_directory --undefined=rm_gpu_ops_stop_channel +--undefined=rm_gpu_ops_get_nvlink_info --undefined=rm_gpu_ops_p2p_object_create --undefined=rm_gpu_ops_p2p_object_destroy --undefined=rm_gpu_ops_get_external_alloc_ptes +--undefined=rm_gpu_ops_get_external_alloc_phys_addrs --undefined=rm_gpu_ops_retain_channel --undefined=rm_gpu_ops_bind_channel_resources --undefined=rm_gpu_ops_release_channel @@ -123,6 +125,7 @@ --undefined=rm_gpu_ops_paging_channel_push_stream --undefined=rm_gpu_ops_device_create --undefined=rm_gpu_ops_device_destroy +--undefined=rm_gpu_ops_report_fatal_error --undefined=rm_gpu_ops_ccsl_sign --undefined=rm_gpu_ops_ccsl_encrypt --undefined=rm_gpu_ops_ccsl_encrypt_with_iv diff --git a/src/nvidia/generated/g_access_cntr_buffer_nvoc.c b/src/nvidia/generated/g_access_cntr_buffer_nvoc.c index 99c2fde8b6..7da4ee2f41 100644 --- a/src/nvidia/generated/g_access_cntr_buffer_nvoc.c +++ b/src/nvidia/generated/g_access_cntr_buffer_nvoc.c @@ -270,158 +270,236 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_AccessCo }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_down_thunk_AccessCounterBuffer_gpuresMap(struct GpuResource *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_down_thunk_AccessCounterBuffer_gpuresUnmap(struct GpuResource *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_down_thunk_AccessCounterBuffer_gpuresGetMapAddrSpace(struct GpuResource *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this + // 3 down-thunk(s) defined to bridge methods in AccessCounterBuffer from superclasses // accesscntrMap: virtual override (res) base (gpures) -static NV_STATUS __nvoc_down_thunk_AccessCounterBuffer_gpuresMap(struct GpuResource *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_down_thunk_AccessCounterBuffer_gpuresMap(struct GpuResource *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return accesscntrMap((struct AccessCounterBuffer *)(((unsigned char *) pAccessCounterBuffer) - __nvoc_rtti_AccessCounterBuffer_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // accesscntrUnmap: virtual override (res) base (gpures) -static NV_STATUS __nvoc_down_thunk_AccessCounterBuffer_gpuresUnmap(struct GpuResource *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_down_thunk_AccessCounterBuffer_gpuresUnmap(struct GpuResource *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return accesscntrUnmap((struct AccessCounterBuffer *)(((unsigned char *) pAccessCounterBuffer) - __nvoc_rtti_AccessCounterBuffer_GpuResource.offset), pCallContext, pCpuMapping); } // accesscntrGetMapAddrSpace: virtual override (gpures) base (gpures) -static NV_STATUS __nvoc_down_thunk_AccessCounterBuffer_gpuresGetMapAddrSpace(struct GpuResource *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_down_thunk_AccessCounterBuffer_gpuresGetMapAddrSpace(struct GpuResource *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return accesscntrGetMapAddrSpace((struct AccessCounterBuffer *)(((unsigned char *) pAccessCounterBuffer) - __nvoc_rtti_AccessCounterBuffer_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_accesscntrControl(struct AccessCounterBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_GpuResource_accesscntrShareCallback(struct AccessCounterBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_accesscntrGetRegBaseOffsetAndSize(struct AccessCounterBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_accesscntrInternalControlForward(struct AccessCounterBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_accesscntrGetInternalObjectHandle(struct AccessCounterBuffer *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_accesscntrAccessCallback(struct AccessCounterBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_accesscntrGetMemInterMapParams(struct AccessCounterBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_accesscntrCheckMemInterUnmap(struct AccessCounterBuffer *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_accesscntrGetMemoryMappingDescriptor(struct AccessCounterBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_accesscntrControlSerialization_Prologue(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_accesscntrControlSerialization_Epilogue(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_accesscntrControl_Prologue(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_accesscntrControl_Epilogue(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_accesscntrCanCopy(struct AccessCounterBuffer *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_accesscntrIsDuplicate(struct AccessCounterBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_accesscntrPreDestruct(struct AccessCounterBuffer *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_accesscntrControlFilter(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_accesscntrIsPartialUnmapSupported(struct AccessCounterBuffer *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_accesscntrMapTo(struct AccessCounterBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_accesscntrUnmapFrom(struct AccessCounterBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_accesscntrGetRefCount(struct AccessCounterBuffer *pResource); // this +void __nvoc_up_thunk_RsResource_accesscntrAddAdditionalDependants(struct RsClient *pClient, struct AccessCounterBuffer *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_accesscntrGetNotificationListPtr(struct AccessCounterBuffer *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_accesscntrGetNotificationShare(struct AccessCounterBuffer *pNotifier); // this +void __nvoc_up_thunk_Notifier_accesscntrSetNotificationShare(struct AccessCounterBuffer *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_accesscntrUnregisterEvent(struct AccessCounterBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_accesscntrGetOrAllocNotifShare(struct AccessCounterBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 27 up-thunk(s) defined to bridge methods in AccessCounterBuffer to superclasses // accesscntrControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_accesscntrControl(struct AccessCounterBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_accesscntrControl(struct AccessCounterBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_AccessCounterBuffer_GpuResource.offset), pCallContext, pParams); } // accesscntrShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_accesscntrShareCallback(struct AccessCounterBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_accesscntrShareCallback(struct AccessCounterBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_AccessCounterBuffer_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // accesscntrGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_accesscntrGetRegBaseOffsetAndSize(struct AccessCounterBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_accesscntrGetRegBaseOffsetAndSize(struct AccessCounterBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_AccessCounterBuffer_GpuResource.offset), pGpu, pOffset, pSize); } // accesscntrInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_accesscntrInternalControlForward(struct AccessCounterBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_accesscntrInternalControlForward(struct AccessCounterBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_AccessCounterBuffer_GpuResource.offset), command, pParams, size); } // accesscntrGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_accesscntrGetInternalObjectHandle(struct AccessCounterBuffer *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_accesscntrGetInternalObjectHandle(struct AccessCounterBuffer *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_AccessCounterBuffer_GpuResource.offset)); } // accesscntrAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_accesscntrAccessCallback(struct AccessCounterBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_accesscntrAccessCallback(struct AccessCounterBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // accesscntrGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_accesscntrGetMemInterMapParams(struct AccessCounterBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_accesscntrGetMemInterMapParams(struct AccessCounterBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), pParams); } // accesscntrCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_accesscntrCheckMemInterUnmap(struct AccessCounterBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_accesscntrCheckMemInterUnmap(struct AccessCounterBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), bSubdeviceHandleProvided); } // accesscntrGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_accesscntrGetMemoryMappingDescriptor(struct AccessCounterBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_accesscntrGetMemoryMappingDescriptor(struct AccessCounterBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), ppMemDesc); } // accesscntrControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_accesscntrControlSerialization_Prologue(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_accesscntrControlSerialization_Prologue(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), pCallContext, pParams); } // accesscntrControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_accesscntrControlSerialization_Epilogue(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_accesscntrControlSerialization_Epilogue(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), pCallContext, pParams); } // accesscntrControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_accesscntrControl_Prologue(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_accesscntrControl_Prologue(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), pCallContext, pParams); } // accesscntrControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_accesscntrControl_Epilogue(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_accesscntrControl_Epilogue(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RmResource.offset), pCallContext, pParams); } // accesscntrCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_accesscntrCanCopy(struct AccessCounterBuffer *pResource) { +NvBool __nvoc_up_thunk_RsResource_accesscntrCanCopy(struct AccessCounterBuffer *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset)); } // accesscntrIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_accesscntrIsDuplicate(struct AccessCounterBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_accesscntrIsDuplicate(struct AccessCounterBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset), hMemory, pDuplicate); } // accesscntrPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_accesscntrPreDestruct(struct AccessCounterBuffer *pResource) { +void __nvoc_up_thunk_RsResource_accesscntrPreDestruct(struct AccessCounterBuffer *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset)); } // accesscntrControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_accesscntrControlFilter(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_accesscntrControlFilter(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset), pCallContext, pParams); } // accesscntrIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_accesscntrIsPartialUnmapSupported(struct AccessCounterBuffer *pResource) { +NvBool __nvoc_up_thunk_RsResource_accesscntrIsPartialUnmapSupported(struct AccessCounterBuffer *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset)); } // accesscntrMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_accesscntrMapTo(struct AccessCounterBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_accesscntrMapTo(struct AccessCounterBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset), pParams); } // accesscntrUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_accesscntrUnmapFrom(struct AccessCounterBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_accesscntrUnmapFrom(struct AccessCounterBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset), pParams); } // accesscntrGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_accesscntrGetRefCount(struct AccessCounterBuffer *pResource) { +NvU32 __nvoc_up_thunk_RsResource_accesscntrGetRefCount(struct AccessCounterBuffer *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset)); } // accesscntrAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_accesscntrAddAdditionalDependants(struct RsClient *pClient, struct AccessCounterBuffer *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_accesscntrAddAdditionalDependants(struct RsClient *pClient, struct AccessCounterBuffer *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_AccessCounterBuffer_RsResource.offset), pReference); } // accesscntrGetNotificationListPtr: virtual inherited (notify) base (notify) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_accesscntrGetNotificationListPtr(struct AccessCounterBuffer *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_accesscntrGetNotificationListPtr(struct AccessCounterBuffer *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_AccessCounterBuffer_Notifier.offset)); } // accesscntrGetNotificationShare: virtual inherited (notify) base (notify) -static struct NotifShare * __nvoc_up_thunk_Notifier_accesscntrGetNotificationShare(struct AccessCounterBuffer *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_accesscntrGetNotificationShare(struct AccessCounterBuffer *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_AccessCounterBuffer_Notifier.offset)); } // accesscntrSetNotificationShare: virtual inherited (notify) base (notify) -static void __nvoc_up_thunk_Notifier_accesscntrSetNotificationShare(struct AccessCounterBuffer *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_accesscntrSetNotificationShare(struct AccessCounterBuffer *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_AccessCounterBuffer_Notifier.offset), pNotifShare); } // accesscntrUnregisterEvent: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_accesscntrUnregisterEvent(struct AccessCounterBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_accesscntrUnregisterEvent(struct AccessCounterBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_AccessCounterBuffer_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // accesscntrGetOrAllocNotifShare: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_accesscntrGetOrAllocNotifShare(struct AccessCounterBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_accesscntrGetOrAllocNotifShare(struct AccessCounterBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_AccessCounterBuffer_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -473,18 +551,6 @@ NV_STATUS __nvoc_ctor_AccessCounterBuffer(AccessCounterBuffer *pThis, struct CAL static void __nvoc_init_funcTable_AccessCounterBuffer_1(AccessCounterBuffer *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // accesscntrMap -- virtual override (res) base (gpures) - pThis->__accesscntrMap__ = &accesscntrMap_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresMap__ = &__nvoc_down_thunk_AccessCounterBuffer_gpuresMap; - - // accesscntrUnmap -- virtual override (res) base (gpures) - pThis->__accesscntrUnmap__ = &accesscntrUnmap_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresUnmap__ = &__nvoc_down_thunk_AccessCounterBuffer_gpuresUnmap; - - // accesscntrGetMapAddrSpace -- virtual override (gpures) base (gpures) - pThis->__accesscntrGetMapAddrSpace__ = &accesscntrGetMapAddrSpace_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_down_thunk_AccessCounterBuffer_gpuresGetMapAddrSpace; - // accesscntrCtrlCmdAccessCntrBufferReadGet -- exported (id=0xc3650101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__accesscntrCtrlCmdAccessCntrBufferReadGet__ = &accesscntrCtrlCmdAccessCntrBufferReadGet_IMPL; @@ -534,94 +600,149 @@ static void __nvoc_init_funcTable_AccessCounterBuffer_1(AccessCounterBuffer *pTh #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__accesscntrCtrlCmdAccessCntrBufferEnableIntr__ = &accesscntrCtrlCmdAccessCntrBufferEnableIntr_IMPL; #endif - - // accesscntrControl -- virtual inherited (gpures) base (gpures) - pThis->__accesscntrControl__ = &__nvoc_up_thunk_GpuResource_accesscntrControl; - - // accesscntrShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__accesscntrShareCallback__ = &__nvoc_up_thunk_GpuResource_accesscntrShareCallback; - - // accesscntrGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__accesscntrGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_accesscntrGetRegBaseOffsetAndSize; - - // accesscntrInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__accesscntrInternalControlForward__ = &__nvoc_up_thunk_GpuResource_accesscntrInternalControlForward; - - // accesscntrGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__accesscntrGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_accesscntrGetInternalObjectHandle; - - // accesscntrAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__accesscntrAccessCallback__ = &__nvoc_up_thunk_RmResource_accesscntrAccessCallback; - - // accesscntrGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__accesscntrGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_accesscntrGetMemInterMapParams; - - // accesscntrCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__accesscntrCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_accesscntrCheckMemInterUnmap; - - // accesscntrGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__accesscntrGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_accesscntrGetMemoryMappingDescriptor; - - // accesscntrControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__accesscntrControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_accesscntrControlSerialization_Prologue; - - // accesscntrControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__accesscntrControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_accesscntrControlSerialization_Epilogue; - - // accesscntrControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__accesscntrControl_Prologue__ = &__nvoc_up_thunk_RmResource_accesscntrControl_Prologue; - - // accesscntrControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__accesscntrControl_Epilogue__ = &__nvoc_up_thunk_RmResource_accesscntrControl_Epilogue; - - // accesscntrCanCopy -- virtual inherited (res) base (gpures) - pThis->__accesscntrCanCopy__ = &__nvoc_up_thunk_RsResource_accesscntrCanCopy; - - // accesscntrIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__accesscntrIsDuplicate__ = &__nvoc_up_thunk_RsResource_accesscntrIsDuplicate; - - // accesscntrPreDestruct -- virtual inherited (res) base (gpures) - pThis->__accesscntrPreDestruct__ = &__nvoc_up_thunk_RsResource_accesscntrPreDestruct; - - // accesscntrControlFilter -- virtual inherited (res) base (gpures) - pThis->__accesscntrControlFilter__ = &__nvoc_up_thunk_RsResource_accesscntrControlFilter; - - // accesscntrIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__accesscntrIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_accesscntrIsPartialUnmapSupported; - - // accesscntrMapTo -- virtual inherited (res) base (gpures) - pThis->__accesscntrMapTo__ = &__nvoc_up_thunk_RsResource_accesscntrMapTo; - - // accesscntrUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__accesscntrUnmapFrom__ = &__nvoc_up_thunk_RsResource_accesscntrUnmapFrom; - - // accesscntrGetRefCount -- virtual inherited (res) base (gpures) - pThis->__accesscntrGetRefCount__ = &__nvoc_up_thunk_RsResource_accesscntrGetRefCount; - - // accesscntrAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__accesscntrAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_accesscntrAddAdditionalDependants; - - // accesscntrGetNotificationListPtr -- virtual inherited (notify) base (notify) - pThis->__accesscntrGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_accesscntrGetNotificationListPtr; - - // accesscntrGetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__accesscntrGetNotificationShare__ = &__nvoc_up_thunk_Notifier_accesscntrGetNotificationShare; - - // accesscntrSetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__accesscntrSetNotificationShare__ = &__nvoc_up_thunk_Notifier_accesscntrSetNotificationShare; - - // accesscntrUnregisterEvent -- virtual inherited (notify) base (notify) - pThis->__accesscntrUnregisterEvent__ = &__nvoc_up_thunk_Notifier_accesscntrUnregisterEvent; - - // accesscntrGetOrAllocNotifShare -- virtual inherited (notify) base (notify) - pThis->__accesscntrGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_accesscntrGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_AccessCounterBuffer_1 with approximately 43 basic block(s). +} // End __nvoc_init_funcTable_AccessCounterBuffer_1 with approximately 10 basic block(s). // Initialize vtable(s) for 40 virtual method(s). void __nvoc_init_funcTable_AccessCounterBuffer(AccessCounterBuffer *pThis) { - // Initialize vtable(s) with 40 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__AccessCounterBuffer vtable = { + .__accesscntrMap__ = &accesscntrMap_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresMap__ = &__nvoc_down_thunk_AccessCounterBuffer_gpuresMap, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__accesscntrUnmap__ = &accesscntrUnmap_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresUnmap__ = &__nvoc_down_thunk_AccessCounterBuffer_gpuresUnmap, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__accesscntrGetMapAddrSpace__ = &accesscntrGetMapAddrSpace_IMPL, // virtual override (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_down_thunk_AccessCounterBuffer_gpuresGetMapAddrSpace, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif + .__accesscntrControl__ = &__nvoc_up_thunk_GpuResource_accesscntrControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__accesscntrShareCallback__ = &__nvoc_up_thunk_GpuResource_accesscntrShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__accesscntrGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_accesscntrGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__accesscntrInternalControlForward__ = &__nvoc_up_thunk_GpuResource_accesscntrInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__accesscntrGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_accesscntrGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__accesscntrAccessCallback__ = &__nvoc_up_thunk_RmResource_accesscntrAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__accesscntrGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_accesscntrGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__accesscntrCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_accesscntrCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__accesscntrGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_accesscntrGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__accesscntrControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_accesscntrControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__accesscntrControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_accesscntrControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__accesscntrControl_Prologue__ = &__nvoc_up_thunk_RmResource_accesscntrControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__accesscntrControl_Epilogue__ = &__nvoc_up_thunk_RmResource_accesscntrControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__accesscntrCanCopy__ = &__nvoc_up_thunk_RsResource_accesscntrCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__accesscntrIsDuplicate__ = &__nvoc_up_thunk_RsResource_accesscntrIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__accesscntrPreDestruct__ = &__nvoc_up_thunk_RsResource_accesscntrPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__accesscntrControlFilter__ = &__nvoc_up_thunk_RsResource_accesscntrControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__accesscntrIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_accesscntrIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__accesscntrMapTo__ = &__nvoc_up_thunk_RsResource_accesscntrMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__accesscntrUnmapFrom__ = &__nvoc_up_thunk_RsResource_accesscntrUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__accesscntrGetRefCount__ = &__nvoc_up_thunk_RsResource_accesscntrGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__accesscntrAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_accesscntrAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__accesscntrGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_accesscntrGetNotificationListPtr, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__accesscntrGetNotificationShare__ = &__nvoc_up_thunk_Notifier_accesscntrGetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__accesscntrSetNotificationShare__ = &__nvoc_up_thunk_Notifier_accesscntrSetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__accesscntrUnregisterEvent__ = &__nvoc_up_thunk_Notifier_accesscntrUnregisterEvent, // virtual inherited (notify) base (notify) + .Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__accesscntrGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_accesscntrGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.Notifier.INotifier; // (inotify) super^2 + pThis->__nvoc_base_Notifier.__nvoc_vtable = &vtable.Notifier; // (notify) super + pThis->__nvoc_vtable = &vtable; // (accesscntr) this + + // Initialize vtable(s) with 10 per-object function pointer(s). __nvoc_init_funcTable_AccessCounterBuffer_1(pThis); } diff --git a/src/nvidia/generated/g_access_cntr_buffer_nvoc.h b/src/nvidia/generated/g_access_cntr_buffer_nvoc.h index 6f93ca759b..c3e48b50e5 100644 --- a/src/nvidia/generated/g_access_cntr_buffer_nvoc.h +++ b/src/nvidia/generated/g_access_cntr_buffer_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -61,10 +61,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__AccessCounterBuffer; + + struct AccessCounterBuffer { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__AccessCounterBuffer *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -80,10 +85,7 @@ struct AccessCounterBuffer { struct Notifier *__nvoc_pbase_Notifier; // notify super struct AccessCounterBuffer *__nvoc_pbase_AccessCounterBuffer; // accesscntr - // Vtable with 40 per-object function pointers - NV_STATUS (*__accesscntrMap__)(struct AccessCounterBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual override (res) base (gpures) - NV_STATUS (*__accesscntrUnmap__)(struct AccessCounterBuffer * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual override (res) base (gpures) - NV_STATUS (*__accesscntrGetMapAddrSpace__)(struct AccessCounterBuffer * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (gpures) base (gpures) + // Vtable with 10 per-object function pointers NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferReadGet__)(struct AccessCounterBuffer * /*this*/, NVC365_CTRL_ACCESS_CNTR_BUFFER_READ_GET_PARAMS *); // exported (id=0xc3650101) NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferReadPut__)(struct AccessCounterBuffer * /*this*/, NVC365_CTRL_ACCESS_CNTR_BUFFER_READ_PUT_PARAMS *); // exported (id=0xc3650103) NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferWriteGet__)(struct AccessCounterBuffer * /*this*/, NVC365_CTRL_ACCESS_CNTR_BUFFER_WRITE_GET_PARAMS *); // exported (id=0xc3650102) @@ -94,6 +96,21 @@ struct AccessCounterBuffer { NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferResetCounters__)(struct AccessCounterBuffer * /*this*/, NVC365_CTRL_ACCESS_CNTR_BUFFER_RESET_COUNTERS_PARAMS *); // exported (id=0xc3650108) NV_STATUS (*__accesscntrCtrlCmdAccessCntrSetConfig__)(struct AccessCounterBuffer * /*this*/, NVC365_CTRL_ACCESS_CNTR_SET_CONFIG_PARAMS *); // exported (id=0xc3650109) NV_STATUS (*__accesscntrCtrlCmdAccessCntrBufferEnableIntr__)(struct AccessCounterBuffer * /*this*/, NVC365_CTRL_ACCESS_CNTR_BUFFER_ENABLE_INTR_PARAMS *); // exported (id=0xc365010b) + + // Data members + struct MEMORY_DESCRIPTOR *pUvmAccessCntrAllocMemDesc; + NvU32 accessCounterIndex; +}; + + +// Metadata including vtable with 30 function pointers plus superclass metadata +struct NVOC_VTABLE__AccessCounterBuffer { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + const struct NVOC_VTABLE__Notifier Notifier; // (notify) 5 function pointers + + NV_STATUS (*__accesscntrMap__)(struct AccessCounterBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual override (res) base (gpures) + NV_STATUS (*__accesscntrUnmap__)(struct AccessCounterBuffer * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual override (res) base (gpures) + NV_STATUS (*__accesscntrGetMapAddrSpace__)(struct AccessCounterBuffer * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (gpures) base (gpures) NV_STATUS (*__accesscntrControl__)(struct AccessCounterBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NvBool (*__accesscntrShareCallback__)(struct AccessCounterBuffer * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__accesscntrGetRegBaseOffsetAndSize__)(struct AccessCounterBuffer * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) @@ -121,10 +138,6 @@ struct AccessCounterBuffer { void (*__accesscntrSetNotificationShare__)(struct AccessCounterBuffer * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) NV_STATUS (*__accesscntrUnregisterEvent__)(struct AccessCounterBuffer * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) NV_STATUS (*__accesscntrGetOrAllocNotifShare__)(struct AccessCounterBuffer * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) - - // Data members - struct MEMORY_DESCRIPTOR *pUvmAccessCntrAllocMemDesc; - NvU32 accessCounterIndex; }; #ifndef __NVOC_CLASS_AccessCounterBuffer_TYPEDEF__ @@ -157,11 +170,11 @@ NV_STATUS __nvoc_objCreate_AccessCounterBuffer(AccessCounterBuffer**, Dynamic*, // Wrapper macros -#define accesscntrMap_FNPTR(pAccessCounterBuffer) pAccessCounterBuffer->__accesscntrMap__ +#define accesscntrMap_FNPTR(pAccessCounterBuffer) pAccessCounterBuffer->__nvoc_vtable->__accesscntrMap__ #define accesscntrMap(pAccessCounterBuffer, pCallContext, pParams, pCpuMapping) accesscntrMap_DISPATCH(pAccessCounterBuffer, pCallContext, pParams, pCpuMapping) -#define accesscntrUnmap_FNPTR(pAccessCounterBuffer) pAccessCounterBuffer->__accesscntrUnmap__ +#define accesscntrUnmap_FNPTR(pAccessCounterBuffer) pAccessCounterBuffer->__nvoc_vtable->__accesscntrUnmap__ #define accesscntrUnmap(pAccessCounterBuffer, pCallContext, pCpuMapping) accesscntrUnmap_DISPATCH(pAccessCounterBuffer, pCallContext, pCpuMapping) -#define accesscntrGetMapAddrSpace_FNPTR(pAccessCounterBuffer) pAccessCounterBuffer->__accesscntrGetMapAddrSpace__ +#define accesscntrGetMapAddrSpace_FNPTR(pAccessCounterBuffer) pAccessCounterBuffer->__nvoc_vtable->__accesscntrGetMapAddrSpace__ #define accesscntrGetMapAddrSpace(pAccessCounterBuffer, pCallContext, mapFlags, pAddrSpace) accesscntrGetMapAddrSpace_DISPATCH(pAccessCounterBuffer, pCallContext, mapFlags, pAddrSpace) #define accesscntrCtrlCmdAccessCntrBufferReadGet_FNPTR(pAccessCounterBuffer) pAccessCounterBuffer->__accesscntrCtrlCmdAccessCntrBufferReadGet__ #define accesscntrCtrlCmdAccessCntrBufferReadGet(pAccessCounterBuffer, pGetParams) accesscntrCtrlCmdAccessCntrBufferReadGet_DISPATCH(pAccessCounterBuffer, pGetParams) @@ -183,72 +196,72 @@ NV_STATUS __nvoc_objCreate_AccessCounterBuffer(AccessCounterBuffer**, Dynamic*, #define accesscntrCtrlCmdAccessCntrSetConfig(pAccessCounterBuffer, pParams) accesscntrCtrlCmdAccessCntrSetConfig_DISPATCH(pAccessCounterBuffer, pParams) #define accesscntrCtrlCmdAccessCntrBufferEnableIntr_FNPTR(pAccessCounterBuffer) pAccessCounterBuffer->__accesscntrCtrlCmdAccessCntrBufferEnableIntr__ #define accesscntrCtrlCmdAccessCntrBufferEnableIntr(pAccessCounterBuffer, pGetParams) accesscntrCtrlCmdAccessCntrBufferEnableIntr_DISPATCH(pAccessCounterBuffer, pGetParams) -#define accesscntrControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define accesscntrControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define accesscntrControl(pGpuResource, pCallContext, pParams) accesscntrControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define accesscntrShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define accesscntrShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define accesscntrShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) accesscntrShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define accesscntrGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define accesscntrGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define accesscntrGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) accesscntrGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define accesscntrInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define accesscntrInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define accesscntrInternalControlForward(pGpuResource, command, pParams, size) accesscntrInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define accesscntrGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define accesscntrGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define accesscntrGetInternalObjectHandle(pGpuResource) accesscntrGetInternalObjectHandle_DISPATCH(pGpuResource) -#define accesscntrAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define accesscntrAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define accesscntrAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) accesscntrAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define accesscntrGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define accesscntrGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define accesscntrGetMemInterMapParams(pRmResource, pParams) accesscntrGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define accesscntrCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define accesscntrCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define accesscntrCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) accesscntrCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define accesscntrGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define accesscntrGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define accesscntrGetMemoryMappingDescriptor(pRmResource, ppMemDesc) accesscntrGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define accesscntrControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define accesscntrControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define accesscntrControlSerialization_Prologue(pResource, pCallContext, pParams) accesscntrControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define accesscntrControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define accesscntrControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define accesscntrControlSerialization_Epilogue(pResource, pCallContext, pParams) accesscntrControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define accesscntrControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define accesscntrControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define accesscntrControl_Prologue(pResource, pCallContext, pParams) accesscntrControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define accesscntrControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define accesscntrControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define accesscntrControl_Epilogue(pResource, pCallContext, pParams) accesscntrControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define accesscntrCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define accesscntrCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define accesscntrCanCopy(pResource) accesscntrCanCopy_DISPATCH(pResource) -#define accesscntrIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define accesscntrIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define accesscntrIsDuplicate(pResource, hMemory, pDuplicate) accesscntrIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define accesscntrPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define accesscntrPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define accesscntrPreDestruct(pResource) accesscntrPreDestruct_DISPATCH(pResource) -#define accesscntrControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define accesscntrControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define accesscntrControlFilter(pResource, pCallContext, pParams) accesscntrControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define accesscntrIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define accesscntrIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define accesscntrIsPartialUnmapSupported(pResource) accesscntrIsPartialUnmapSupported_DISPATCH(pResource) -#define accesscntrMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define accesscntrMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define accesscntrMapTo(pResource, pParams) accesscntrMapTo_DISPATCH(pResource, pParams) -#define accesscntrUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define accesscntrUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define accesscntrUnmapFrom(pResource, pParams) accesscntrUnmapFrom_DISPATCH(pResource, pParams) -#define accesscntrGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define accesscntrGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define accesscntrGetRefCount(pResource) accesscntrGetRefCount_DISPATCH(pResource) -#define accesscntrAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define accesscntrAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define accesscntrAddAdditionalDependants(pClient, pResource, pReference) accesscntrAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define accesscntrGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define accesscntrGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define accesscntrGetNotificationListPtr(pNotifier) accesscntrGetNotificationListPtr_DISPATCH(pNotifier) -#define accesscntrGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define accesscntrGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define accesscntrGetNotificationShare(pNotifier) accesscntrGetNotificationShare_DISPATCH(pNotifier) -#define accesscntrSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define accesscntrSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define accesscntrSetNotificationShare(pNotifier, pNotifShare) accesscntrSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define accesscntrUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define accesscntrUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define accesscntrUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) accesscntrUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define accesscntrGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define accesscntrGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define accesscntrGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) accesscntrGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS accesscntrMap_DISPATCH(struct AccessCounterBuffer *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pAccessCounterBuffer->__accesscntrMap__(pAccessCounterBuffer, pCallContext, pParams, pCpuMapping); + return pAccessCounterBuffer->__nvoc_vtable->__accesscntrMap__(pAccessCounterBuffer, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS accesscntrUnmap_DISPATCH(struct AccessCounterBuffer *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pAccessCounterBuffer->__accesscntrUnmap__(pAccessCounterBuffer, pCallContext, pCpuMapping); + return pAccessCounterBuffer->__nvoc_vtable->__accesscntrUnmap__(pAccessCounterBuffer, pCallContext, pCpuMapping); } static inline NV_STATUS accesscntrGetMapAddrSpace_DISPATCH(struct AccessCounterBuffer *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pAccessCounterBuffer->__accesscntrGetMapAddrSpace__(pAccessCounterBuffer, pCallContext, mapFlags, pAddrSpace); + return pAccessCounterBuffer->__nvoc_vtable->__accesscntrGetMapAddrSpace__(pAccessCounterBuffer, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS accesscntrCtrlCmdAccessCntrBufferReadGet_DISPATCH(struct AccessCounterBuffer *pAccessCounterBuffer, NVC365_CTRL_ACCESS_CNTR_BUFFER_READ_GET_PARAMS *pGetParams) { @@ -292,111 +305,111 @@ static inline NV_STATUS accesscntrCtrlCmdAccessCntrBufferEnableIntr_DISPATCH(str } static inline NV_STATUS accesscntrControl_DISPATCH(struct AccessCounterBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__accesscntrControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__accesscntrControl__(pGpuResource, pCallContext, pParams); } static inline NvBool accesscntrShareCallback_DISPATCH(struct AccessCounterBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__accesscntrShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__accesscntrShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS accesscntrGetRegBaseOffsetAndSize_DISPATCH(struct AccessCounterBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__accesscntrGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__accesscntrGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS accesscntrInternalControlForward_DISPATCH(struct AccessCounterBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__accesscntrInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__accesscntrInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle accesscntrGetInternalObjectHandle_DISPATCH(struct AccessCounterBuffer *pGpuResource) { - return pGpuResource->__accesscntrGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__accesscntrGetInternalObjectHandle__(pGpuResource); } static inline NvBool accesscntrAccessCallback_DISPATCH(struct AccessCounterBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__accesscntrAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__accesscntrAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS accesscntrGetMemInterMapParams_DISPATCH(struct AccessCounterBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__accesscntrGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__accesscntrGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS accesscntrCheckMemInterUnmap_DISPATCH(struct AccessCounterBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__accesscntrCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__accesscntrCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS accesscntrGetMemoryMappingDescriptor_DISPATCH(struct AccessCounterBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__accesscntrGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__accesscntrGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS accesscntrControlSerialization_Prologue_DISPATCH(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__accesscntrControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__accesscntrControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void accesscntrControlSerialization_Epilogue_DISPATCH(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__accesscntrControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__accesscntrControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS accesscntrControl_Prologue_DISPATCH(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__accesscntrControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__accesscntrControl_Prologue__(pResource, pCallContext, pParams); } static inline void accesscntrControl_Epilogue_DISPATCH(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__accesscntrControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__accesscntrControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool accesscntrCanCopy_DISPATCH(struct AccessCounterBuffer *pResource) { - return pResource->__accesscntrCanCopy__(pResource); + return pResource->__nvoc_vtable->__accesscntrCanCopy__(pResource); } static inline NV_STATUS accesscntrIsDuplicate_DISPATCH(struct AccessCounterBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__accesscntrIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__accesscntrIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void accesscntrPreDestruct_DISPATCH(struct AccessCounterBuffer *pResource) { - pResource->__accesscntrPreDestruct__(pResource); + pResource->__nvoc_vtable->__accesscntrPreDestruct__(pResource); } static inline NV_STATUS accesscntrControlFilter_DISPATCH(struct AccessCounterBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__accesscntrControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__accesscntrControlFilter__(pResource, pCallContext, pParams); } static inline NvBool accesscntrIsPartialUnmapSupported_DISPATCH(struct AccessCounterBuffer *pResource) { - return pResource->__accesscntrIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__accesscntrIsPartialUnmapSupported__(pResource); } static inline NV_STATUS accesscntrMapTo_DISPATCH(struct AccessCounterBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__accesscntrMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__accesscntrMapTo__(pResource, pParams); } static inline NV_STATUS accesscntrUnmapFrom_DISPATCH(struct AccessCounterBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__accesscntrUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__accesscntrUnmapFrom__(pResource, pParams); } static inline NvU32 accesscntrGetRefCount_DISPATCH(struct AccessCounterBuffer *pResource) { - return pResource->__accesscntrGetRefCount__(pResource); + return pResource->__nvoc_vtable->__accesscntrGetRefCount__(pResource); } static inline void accesscntrAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct AccessCounterBuffer *pResource, RsResourceRef *pReference) { - pResource->__accesscntrAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__accesscntrAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * accesscntrGetNotificationListPtr_DISPATCH(struct AccessCounterBuffer *pNotifier) { - return pNotifier->__accesscntrGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__accesscntrGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * accesscntrGetNotificationShare_DISPATCH(struct AccessCounterBuffer *pNotifier) { - return pNotifier->__accesscntrGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__accesscntrGetNotificationShare__(pNotifier); } static inline void accesscntrSetNotificationShare_DISPATCH(struct AccessCounterBuffer *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__accesscntrSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__accesscntrSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS accesscntrUnregisterEvent_DISPATCH(struct AccessCounterBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__accesscntrUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__accesscntrUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS accesscntrGetOrAllocNotifShare_DISPATCH(struct AccessCounterBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__accesscntrGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__accesscntrGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS accesscntrMap_IMPL(struct AccessCounterBuffer *pAccessCounterBuffer, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); diff --git a/src/nvidia/generated/g_allclasses.h b/src/nvidia/generated/g_allclasses.h index 7e3dcd98f2..4751d0a16e 100644 --- a/src/nvidia/generated/g_allclasses.h +++ b/src/nvidia/generated/g_allclasses.h @@ -120,6 +120,7 @@ #include // NV9010_VBLANK_CALLBACK #include // GF100_PROFILER #include // MAXWELL_PROFILER +#include // MAXWELL_PROFILER_CONTEXT #include // MAXWELL_PROFILER_DEVICE #include // GF100_SUBDEVICE_MASTER #include // GF100_SUBDEVICE_INFOROM @@ -618,6 +619,10 @@ #define MAXWELL_PROFILER (0x0000b0cc) #endif +#ifndef MAXWELL_PROFILER_CONTEXT +#define MAXWELL_PROFILER_CONTEXT (0x0000b1cc) +#endif + #ifndef MAXWELL_PROFILER_DEVICE #define MAXWELL_PROFILER_DEVICE (0x0000b2cc) #endif diff --git a/src/nvidia/generated/g_binary_api_nvoc.c b/src/nvidia/generated/g_binary_api_nvoc.c index d05d8b3817..906d5c4c48 100644 --- a/src/nvidia/generated/g_binary_api_nvoc.c +++ b/src/nvidia/generated/g_binary_api_nvoc.c @@ -93,133 +93,201 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_BinaryApi = /*pExportInfo=*/ &__nvoc_export_info_BinaryApi }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_BinaryApi_gpuresControl(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this + // 1 down-thunk(s) defined to bridge methods in BinaryApi from superclasses // binapiControl: virtual override (res) base (gpures) -static NV_STATUS __nvoc_down_thunk_BinaryApi_gpuresControl(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_down_thunk_BinaryApi_gpuresControl(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return binapiControl((struct BinaryApi *)(((unsigned char *) pResource) - __nvoc_rtti_BinaryApi_GpuResource.offset), pCallContext, pParams); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_binapiMap(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_binapiUnmap(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_binapiShareCallback(struct BinaryApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_binapiGetRegBaseOffsetAndSize(struct BinaryApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_binapiGetMapAddrSpace(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_binapiInternalControlForward(struct BinaryApi *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_binapiGetInternalObjectHandle(struct BinaryApi *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_binapiAccessCallback(struct BinaryApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_binapiGetMemInterMapParams(struct BinaryApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_binapiCheckMemInterUnmap(struct BinaryApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_binapiGetMemoryMappingDescriptor(struct BinaryApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_binapiControlSerialization_Prologue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_binapiControlSerialization_Epilogue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_binapiControl_Prologue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_binapiControl_Epilogue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_binapiCanCopy(struct BinaryApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_binapiIsDuplicate(struct BinaryApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_binapiPreDestruct(struct BinaryApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_binapiControlFilter(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_binapiIsPartialUnmapSupported(struct BinaryApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_binapiMapTo(struct BinaryApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_binapiUnmapFrom(struct BinaryApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_binapiGetRefCount(struct BinaryApi *pResource); // this +void __nvoc_up_thunk_RsResource_binapiAddAdditionalDependants(struct RsClient *pClient, struct BinaryApi *pResource, RsResourceRef *pReference); // this + // 24 up-thunk(s) defined to bridge methods in BinaryApi to superclasses // binapiMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_binapiMap(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_binapiMap(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // binapiUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_binapiUnmap(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_binapiUnmap(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApi_GpuResource.offset), pCallContext, pCpuMapping); } // binapiShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_binapiShareCallback(struct BinaryApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_binapiShareCallback(struct BinaryApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // binapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_binapiGetRegBaseOffsetAndSize(struct BinaryApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_binapiGetRegBaseOffsetAndSize(struct BinaryApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApi_GpuResource.offset), pGpu, pOffset, pSize); } // binapiGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_binapiGetMapAddrSpace(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_binapiGetMapAddrSpace(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // binapiInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_binapiInternalControlForward(struct BinaryApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_binapiInternalControlForward(struct BinaryApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApi_GpuResource.offset), command, pParams, size); } // binapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_binapiGetInternalObjectHandle(struct BinaryApi *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_binapiGetInternalObjectHandle(struct BinaryApi *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApi_GpuResource.offset)); } // binapiAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_binapiAccessCallback(struct BinaryApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_binapiAccessCallback(struct BinaryApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // binapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_binapiGetMemInterMapParams(struct BinaryApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_binapiGetMemInterMapParams(struct BinaryApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_BinaryApi_RmResource.offset), pParams); } // binapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_binapiCheckMemInterUnmap(struct BinaryApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_binapiCheckMemInterUnmap(struct BinaryApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_BinaryApi_RmResource.offset), bSubdeviceHandleProvided); } // binapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_binapiGetMemoryMappingDescriptor(struct BinaryApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_binapiGetMemoryMappingDescriptor(struct BinaryApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_BinaryApi_RmResource.offset), ppMemDesc); } // binapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_binapiControlSerialization_Prologue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_binapiControlSerialization_Prologue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RmResource.offset), pCallContext, pParams); } // binapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_binapiControlSerialization_Epilogue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_binapiControlSerialization_Epilogue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RmResource.offset), pCallContext, pParams); } // binapiControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_binapiControl_Prologue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_binapiControl_Prologue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RmResource.offset), pCallContext, pParams); } // binapiControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_binapiControl_Epilogue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_binapiControl_Epilogue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RmResource.offset), pCallContext, pParams); } // binapiCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_binapiCanCopy(struct BinaryApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_binapiCanCopy(struct BinaryApi *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RsResource.offset)); } // binapiIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_binapiIsDuplicate(struct BinaryApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_binapiIsDuplicate(struct BinaryApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RsResource.offset), hMemory, pDuplicate); } // binapiPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_binapiPreDestruct(struct BinaryApi *pResource) { +void __nvoc_up_thunk_RsResource_binapiPreDestruct(struct BinaryApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RsResource.offset)); } // binapiControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_binapiControlFilter(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_binapiControlFilter(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RsResource.offset), pCallContext, pParams); } // binapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_binapiIsPartialUnmapSupported(struct BinaryApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_binapiIsPartialUnmapSupported(struct BinaryApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RsResource.offset)); } // binapiMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_binapiMapTo(struct BinaryApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_binapiMapTo(struct BinaryApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RsResource.offset), pParams); } // binapiUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_binapiUnmapFrom(struct BinaryApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_binapiUnmapFrom(struct BinaryApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RsResource.offset), pParams); } // binapiGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_binapiGetRefCount(struct BinaryApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_binapiGetRefCount(struct BinaryApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RsResource.offset)); } // binapiAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_binapiAddAdditionalDependants(struct RsClient *pClient, struct BinaryApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_binapiAddAdditionalDependants(struct RsClient *pClient, struct BinaryApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApi_RsResource.offset), pReference); } @@ -262,89 +330,110 @@ NV_STATUS __nvoc_ctor_BinaryApi(BinaryApi *pThis, struct CALL_CONTEXT * arg_pCal // Vtable initialization static void __nvoc_init_funcTable_BinaryApi_1(BinaryApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // binapiControl -- virtual override (res) base (gpures) - pThis->__binapiControl__ = &binapiControl_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresControl__ = &__nvoc_down_thunk_BinaryApi_gpuresControl; - - // binapiMap -- virtual inherited (gpures) base (gpures) - pThis->__binapiMap__ = &__nvoc_up_thunk_GpuResource_binapiMap; - - // binapiUnmap -- virtual inherited (gpures) base (gpures) - pThis->__binapiUnmap__ = &__nvoc_up_thunk_GpuResource_binapiUnmap; - - // binapiShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__binapiShareCallback__ = &__nvoc_up_thunk_GpuResource_binapiShareCallback; - - // binapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__binapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_binapiGetRegBaseOffsetAndSize; - - // binapiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__binapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_binapiGetMapAddrSpace; - - // binapiInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__binapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_binapiInternalControlForward; - - // binapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__binapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_binapiGetInternalObjectHandle; - - // binapiAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__binapiAccessCallback__ = &__nvoc_up_thunk_RmResource_binapiAccessCallback; - - // binapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__binapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_binapiGetMemInterMapParams; - - // binapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__binapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_binapiCheckMemInterUnmap; - - // binapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__binapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_binapiGetMemoryMappingDescriptor; - - // binapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__binapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_binapiControlSerialization_Prologue; - - // binapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__binapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_binapiControlSerialization_Epilogue; - - // binapiControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__binapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_binapiControl_Prologue; - - // binapiControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__binapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_binapiControl_Epilogue; - - // binapiCanCopy -- virtual inherited (res) base (gpures) - pThis->__binapiCanCopy__ = &__nvoc_up_thunk_RsResource_binapiCanCopy; - - // binapiIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__binapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_binapiIsDuplicate; - - // binapiPreDestruct -- virtual inherited (res) base (gpures) - pThis->__binapiPreDestruct__ = &__nvoc_up_thunk_RsResource_binapiPreDestruct; - - // binapiControlFilter -- virtual inherited (res) base (gpures) - pThis->__binapiControlFilter__ = &__nvoc_up_thunk_RsResource_binapiControlFilter; - - // binapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__binapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_binapiIsPartialUnmapSupported; - - // binapiMapTo -- virtual inherited (res) base (gpures) - pThis->__binapiMapTo__ = &__nvoc_up_thunk_RsResource_binapiMapTo; - - // binapiUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__binapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_binapiUnmapFrom; - - // binapiGetRefCount -- virtual inherited (res) base (gpures) - pThis->__binapiGetRefCount__ = &__nvoc_up_thunk_RsResource_binapiGetRefCount; - - // binapiAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__binapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_binapiAddAdditionalDependants; -} // End __nvoc_init_funcTable_BinaryApi_1 with approximately 26 basic block(s). +} // End __nvoc_init_funcTable_BinaryApi_1 // Initialize vtable(s) for 25 virtual method(s). void __nvoc_init_funcTable_BinaryApi(BinaryApi *pThis) { - // Initialize vtable(s) with 25 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__BinaryApi vtable = { + .__binapiControl__ = &binapiControl_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresControl__ = &__nvoc_down_thunk_BinaryApi_gpuresControl, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__binapiMap__ = &__nvoc_up_thunk_GpuResource_binapiMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__binapiUnmap__ = &__nvoc_up_thunk_GpuResource_binapiUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__binapiShareCallback__ = &__nvoc_up_thunk_GpuResource_binapiShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__binapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_binapiGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__binapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_binapiGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__binapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_binapiInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__binapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_binapiGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__binapiAccessCallback__ = &__nvoc_up_thunk_RmResource_binapiAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__binapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_binapiGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__binapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_binapiCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__binapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_binapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__binapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_binapiControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__binapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_binapiControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__binapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_binapiControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__binapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_binapiControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__binapiCanCopy__ = &__nvoc_up_thunk_RsResource_binapiCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__binapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_binapiIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__binapiPreDestruct__ = &__nvoc_up_thunk_RsResource_binapiPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__binapiControlFilter__ = &__nvoc_up_thunk_RsResource_binapiControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__binapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_binapiIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__binapiMapTo__ = &__nvoc_up_thunk_RsResource_binapiMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__binapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_binapiUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__binapiGetRefCount__ = &__nvoc_up_thunk_RsResource_binapiGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__binapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_binapiAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (binapi) this __nvoc_init_funcTable_BinaryApi_1(pThis); } @@ -523,133 +612,226 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_BinaryApiPrivileged = /*pExportInfo=*/ &__nvoc_export_info_BinaryApiPrivileged }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_BinaryApi_gpuresControl(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_BinaryApiPrivileged_binapiControl(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this + // 1 down-thunk(s) defined to bridge methods in BinaryApiPrivileged from superclasses // binapiprivControl: virtual override (res) base (binapi) -static NV_STATUS __nvoc_down_thunk_BinaryApiPrivileged_binapiControl(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_down_thunk_BinaryApiPrivileged_binapiControl(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return binapiprivControl((struct BinaryApiPrivileged *)(((unsigned char *) pResource) - __nvoc_rtti_BinaryApiPrivileged_BinaryApi.offset), pCallContext, pParams); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^3 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^3 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^3 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super^2 +NV_STATUS __nvoc_up_thunk_GpuResource_binapiMap(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_GpuResource_binapiUnmap(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_GpuResource_binapiShareCallback(struct BinaryApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_GpuResource_binapiGetRegBaseOffsetAndSize(struct BinaryApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // super +NV_STATUS __nvoc_up_thunk_GpuResource_binapiGetMapAddrSpace(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super +NV_STATUS __nvoc_up_thunk_GpuResource_binapiInternalControlForward(struct BinaryApi *pGpuResource, NvU32 command, void *pParams, NvU32 size); // super +NvHandle __nvoc_up_thunk_GpuResource_binapiGetInternalObjectHandle(struct BinaryApi *pGpuResource); // super +NvBool __nvoc_up_thunk_RmResource_binapiAccessCallback(struct BinaryApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_binapiGetMemInterMapParams(struct BinaryApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_binapiCheckMemInterUnmap(struct BinaryApi *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_binapiGetMemoryMappingDescriptor(struct BinaryApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_binapiControlSerialization_Prologue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_binapiControlSerialization_Epilogue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_binapiControl_Prologue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_binapiControl_Epilogue(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_binapiCanCopy(struct BinaryApi *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_binapiIsDuplicate(struct BinaryApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_binapiPreDestruct(struct BinaryApi *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_binapiControlFilter(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_binapiIsPartialUnmapSupported(struct BinaryApi *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_binapiMapTo(struct BinaryApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_binapiUnmapFrom(struct BinaryApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_binapiGetRefCount(struct BinaryApi *pResource); // super +void __nvoc_up_thunk_RsResource_binapiAddAdditionalDependants(struct RsClient *pClient, struct BinaryApi *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_binapiprivMap(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_binapiprivUnmap(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_binapiprivShareCallback(struct BinaryApiPrivileged *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_binapiprivGetRegBaseOffsetAndSize(struct BinaryApiPrivileged *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_binapiprivGetMapAddrSpace(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_binapiprivInternalControlForward(struct BinaryApiPrivileged *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_binapiprivGetInternalObjectHandle(struct BinaryApiPrivileged *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_binapiprivAccessCallback(struct BinaryApiPrivileged *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_binapiprivGetMemInterMapParams(struct BinaryApiPrivileged *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_binapiprivCheckMemInterUnmap(struct BinaryApiPrivileged *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_binapiprivGetMemoryMappingDescriptor(struct BinaryApiPrivileged *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_binapiprivControlSerialization_Prologue(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_binapiprivControlSerialization_Epilogue(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_binapiprivControl_Prologue(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_binapiprivControl_Epilogue(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_binapiprivCanCopy(struct BinaryApiPrivileged *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_binapiprivIsDuplicate(struct BinaryApiPrivileged *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_binapiprivPreDestruct(struct BinaryApiPrivileged *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_binapiprivControlFilter(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_binapiprivIsPartialUnmapSupported(struct BinaryApiPrivileged *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_binapiprivMapTo(struct BinaryApiPrivileged *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_binapiprivUnmapFrom(struct BinaryApiPrivileged *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_binapiprivGetRefCount(struct BinaryApiPrivileged *pResource); // this +void __nvoc_up_thunk_RsResource_binapiprivAddAdditionalDependants(struct RsClient *pClient, struct BinaryApiPrivileged *pResource, RsResourceRef *pReference); // this + // 24 up-thunk(s) defined to bridge methods in BinaryApiPrivileged to superclasses // binapiprivMap: virtual inherited (gpures) base (binapi) -static NV_STATUS __nvoc_up_thunk_GpuResource_binapiprivMap(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_binapiprivMap(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApiPrivileged_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // binapiprivUnmap: virtual inherited (gpures) base (binapi) -static NV_STATUS __nvoc_up_thunk_GpuResource_binapiprivUnmap(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_binapiprivUnmap(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApiPrivileged_GpuResource.offset), pCallContext, pCpuMapping); } // binapiprivShareCallback: virtual inherited (gpures) base (binapi) -static NvBool __nvoc_up_thunk_GpuResource_binapiprivShareCallback(struct BinaryApiPrivileged *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_binapiprivShareCallback(struct BinaryApiPrivileged *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApiPrivileged_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // binapiprivGetRegBaseOffsetAndSize: virtual inherited (gpures) base (binapi) -static NV_STATUS __nvoc_up_thunk_GpuResource_binapiprivGetRegBaseOffsetAndSize(struct BinaryApiPrivileged *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_binapiprivGetRegBaseOffsetAndSize(struct BinaryApiPrivileged *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApiPrivileged_GpuResource.offset), pGpu, pOffset, pSize); } // binapiprivGetMapAddrSpace: virtual inherited (gpures) base (binapi) -static NV_STATUS __nvoc_up_thunk_GpuResource_binapiprivGetMapAddrSpace(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_binapiprivGetMapAddrSpace(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApiPrivileged_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // binapiprivInternalControlForward: virtual inherited (gpures) base (binapi) -static NV_STATUS __nvoc_up_thunk_GpuResource_binapiprivInternalControlForward(struct BinaryApiPrivileged *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_binapiprivInternalControlForward(struct BinaryApiPrivileged *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApiPrivileged_GpuResource.offset), command, pParams, size); } // binapiprivGetInternalObjectHandle: virtual inherited (gpures) base (binapi) -static NvHandle __nvoc_up_thunk_GpuResource_binapiprivGetInternalObjectHandle(struct BinaryApiPrivileged *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_binapiprivGetInternalObjectHandle(struct BinaryApiPrivileged *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_BinaryApiPrivileged_GpuResource.offset)); } // binapiprivAccessCallback: virtual inherited (rmres) base (binapi) -static NvBool __nvoc_up_thunk_RmResource_binapiprivAccessCallback(struct BinaryApiPrivileged *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_binapiprivAccessCallback(struct BinaryApiPrivileged *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // binapiprivGetMemInterMapParams: virtual inherited (rmres) base (binapi) -static NV_STATUS __nvoc_up_thunk_RmResource_binapiprivGetMemInterMapParams(struct BinaryApiPrivileged *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_binapiprivGetMemInterMapParams(struct BinaryApiPrivileged *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), pParams); } // binapiprivCheckMemInterUnmap: virtual inherited (rmres) base (binapi) -static NV_STATUS __nvoc_up_thunk_RmResource_binapiprivCheckMemInterUnmap(struct BinaryApiPrivileged *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_binapiprivCheckMemInterUnmap(struct BinaryApiPrivileged *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), bSubdeviceHandleProvided); } // binapiprivGetMemoryMappingDescriptor: virtual inherited (rmres) base (binapi) -static NV_STATUS __nvoc_up_thunk_RmResource_binapiprivGetMemoryMappingDescriptor(struct BinaryApiPrivileged *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_binapiprivGetMemoryMappingDescriptor(struct BinaryApiPrivileged *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), ppMemDesc); } // binapiprivControlSerialization_Prologue: virtual inherited (rmres) base (binapi) -static NV_STATUS __nvoc_up_thunk_RmResource_binapiprivControlSerialization_Prologue(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_binapiprivControlSerialization_Prologue(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), pCallContext, pParams); } // binapiprivControlSerialization_Epilogue: virtual inherited (rmres) base (binapi) -static void __nvoc_up_thunk_RmResource_binapiprivControlSerialization_Epilogue(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_binapiprivControlSerialization_Epilogue(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), pCallContext, pParams); } // binapiprivControl_Prologue: virtual inherited (rmres) base (binapi) -static NV_STATUS __nvoc_up_thunk_RmResource_binapiprivControl_Prologue(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_binapiprivControl_Prologue(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), pCallContext, pParams); } // binapiprivControl_Epilogue: virtual inherited (rmres) base (binapi) -static void __nvoc_up_thunk_RmResource_binapiprivControl_Epilogue(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_binapiprivControl_Epilogue(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RmResource.offset), pCallContext, pParams); } // binapiprivCanCopy: virtual inherited (res) base (binapi) -static NvBool __nvoc_up_thunk_RsResource_binapiprivCanCopy(struct BinaryApiPrivileged *pResource) { +NvBool __nvoc_up_thunk_RsResource_binapiprivCanCopy(struct BinaryApiPrivileged *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset)); } // binapiprivIsDuplicate: virtual inherited (res) base (binapi) -static NV_STATUS __nvoc_up_thunk_RsResource_binapiprivIsDuplicate(struct BinaryApiPrivileged *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_binapiprivIsDuplicate(struct BinaryApiPrivileged *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset), hMemory, pDuplicate); } // binapiprivPreDestruct: virtual inherited (res) base (binapi) -static void __nvoc_up_thunk_RsResource_binapiprivPreDestruct(struct BinaryApiPrivileged *pResource) { +void __nvoc_up_thunk_RsResource_binapiprivPreDestruct(struct BinaryApiPrivileged *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset)); } // binapiprivControlFilter: virtual inherited (res) base (binapi) -static NV_STATUS __nvoc_up_thunk_RsResource_binapiprivControlFilter(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_binapiprivControlFilter(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset), pCallContext, pParams); } // binapiprivIsPartialUnmapSupported: inline virtual inherited (res) base (binapi) body -static NvBool __nvoc_up_thunk_RsResource_binapiprivIsPartialUnmapSupported(struct BinaryApiPrivileged *pResource) { +NvBool __nvoc_up_thunk_RsResource_binapiprivIsPartialUnmapSupported(struct BinaryApiPrivileged *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset)); } // binapiprivMapTo: virtual inherited (res) base (binapi) -static NV_STATUS __nvoc_up_thunk_RsResource_binapiprivMapTo(struct BinaryApiPrivileged *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_binapiprivMapTo(struct BinaryApiPrivileged *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset), pParams); } // binapiprivUnmapFrom: virtual inherited (res) base (binapi) -static NV_STATUS __nvoc_up_thunk_RsResource_binapiprivUnmapFrom(struct BinaryApiPrivileged *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_binapiprivUnmapFrom(struct BinaryApiPrivileged *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset), pParams); } // binapiprivGetRefCount: virtual inherited (res) base (binapi) -static NvU32 __nvoc_up_thunk_RsResource_binapiprivGetRefCount(struct BinaryApiPrivileged *pResource) { +NvU32 __nvoc_up_thunk_RsResource_binapiprivGetRefCount(struct BinaryApiPrivileged *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset)); } // binapiprivAddAdditionalDependants: virtual inherited (res) base (binapi) -static void __nvoc_up_thunk_RsResource_binapiprivAddAdditionalDependants(struct RsClient *pClient, struct BinaryApiPrivileged *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_binapiprivAddAdditionalDependants(struct RsClient *pClient, struct BinaryApiPrivileged *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_BinaryApiPrivileged_RsResource.offset), pReference); } @@ -692,89 +874,136 @@ NV_STATUS __nvoc_ctor_BinaryApiPrivileged(BinaryApiPrivileged *pThis, struct CAL // Vtable initialization static void __nvoc_init_funcTable_BinaryApiPrivileged_1(BinaryApiPrivileged *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // binapiprivControl -- virtual override (res) base (binapi) - pThis->__binapiprivControl__ = &binapiprivControl_IMPL; - pThis->__nvoc_base_BinaryApi.__binapiControl__ = &__nvoc_down_thunk_BinaryApiPrivileged_binapiControl; - - // binapiprivMap -- virtual inherited (gpures) base (binapi) - pThis->__binapiprivMap__ = &__nvoc_up_thunk_GpuResource_binapiprivMap; - - // binapiprivUnmap -- virtual inherited (gpures) base (binapi) - pThis->__binapiprivUnmap__ = &__nvoc_up_thunk_GpuResource_binapiprivUnmap; - - // binapiprivShareCallback -- virtual inherited (gpures) base (binapi) - pThis->__binapiprivShareCallback__ = &__nvoc_up_thunk_GpuResource_binapiprivShareCallback; - - // binapiprivGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (binapi) - pThis->__binapiprivGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_binapiprivGetRegBaseOffsetAndSize; - - // binapiprivGetMapAddrSpace -- virtual inherited (gpures) base (binapi) - pThis->__binapiprivGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_binapiprivGetMapAddrSpace; - - // binapiprivInternalControlForward -- virtual inherited (gpures) base (binapi) - pThis->__binapiprivInternalControlForward__ = &__nvoc_up_thunk_GpuResource_binapiprivInternalControlForward; - - // binapiprivGetInternalObjectHandle -- virtual inherited (gpures) base (binapi) - pThis->__binapiprivGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_binapiprivGetInternalObjectHandle; - - // binapiprivAccessCallback -- virtual inherited (rmres) base (binapi) - pThis->__binapiprivAccessCallback__ = &__nvoc_up_thunk_RmResource_binapiprivAccessCallback; - - // binapiprivGetMemInterMapParams -- virtual inherited (rmres) base (binapi) - pThis->__binapiprivGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_binapiprivGetMemInterMapParams; - - // binapiprivCheckMemInterUnmap -- virtual inherited (rmres) base (binapi) - pThis->__binapiprivCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_binapiprivCheckMemInterUnmap; - - // binapiprivGetMemoryMappingDescriptor -- virtual inherited (rmres) base (binapi) - pThis->__binapiprivGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_binapiprivGetMemoryMappingDescriptor; - - // binapiprivControlSerialization_Prologue -- virtual inherited (rmres) base (binapi) - pThis->__binapiprivControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_binapiprivControlSerialization_Prologue; - - // binapiprivControlSerialization_Epilogue -- virtual inherited (rmres) base (binapi) - pThis->__binapiprivControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_binapiprivControlSerialization_Epilogue; - - // binapiprivControl_Prologue -- virtual inherited (rmres) base (binapi) - pThis->__binapiprivControl_Prologue__ = &__nvoc_up_thunk_RmResource_binapiprivControl_Prologue; - - // binapiprivControl_Epilogue -- virtual inherited (rmres) base (binapi) - pThis->__binapiprivControl_Epilogue__ = &__nvoc_up_thunk_RmResource_binapiprivControl_Epilogue; - - // binapiprivCanCopy -- virtual inherited (res) base (binapi) - pThis->__binapiprivCanCopy__ = &__nvoc_up_thunk_RsResource_binapiprivCanCopy; - - // binapiprivIsDuplicate -- virtual inherited (res) base (binapi) - pThis->__binapiprivIsDuplicate__ = &__nvoc_up_thunk_RsResource_binapiprivIsDuplicate; - - // binapiprivPreDestruct -- virtual inherited (res) base (binapi) - pThis->__binapiprivPreDestruct__ = &__nvoc_up_thunk_RsResource_binapiprivPreDestruct; - - // binapiprivControlFilter -- virtual inherited (res) base (binapi) - pThis->__binapiprivControlFilter__ = &__nvoc_up_thunk_RsResource_binapiprivControlFilter; - - // binapiprivIsPartialUnmapSupported -- inline virtual inherited (res) base (binapi) body - pThis->__binapiprivIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_binapiprivIsPartialUnmapSupported; - - // binapiprivMapTo -- virtual inherited (res) base (binapi) - pThis->__binapiprivMapTo__ = &__nvoc_up_thunk_RsResource_binapiprivMapTo; - - // binapiprivUnmapFrom -- virtual inherited (res) base (binapi) - pThis->__binapiprivUnmapFrom__ = &__nvoc_up_thunk_RsResource_binapiprivUnmapFrom; - - // binapiprivGetRefCount -- virtual inherited (res) base (binapi) - pThis->__binapiprivGetRefCount__ = &__nvoc_up_thunk_RsResource_binapiprivGetRefCount; - - // binapiprivAddAdditionalDependants -- virtual inherited (res) base (binapi) - pThis->__binapiprivAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_binapiprivAddAdditionalDependants; -} // End __nvoc_init_funcTable_BinaryApiPrivileged_1 with approximately 26 basic block(s). +} // End __nvoc_init_funcTable_BinaryApiPrivileged_1 // Initialize vtable(s) for 25 virtual method(s). void __nvoc_init_funcTable_BinaryApiPrivileged(BinaryApiPrivileged *pThis) { - // Initialize vtable(s) with 25 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__BinaryApiPrivileged vtable = { + .__binapiprivControl__ = &binapiprivControl_IMPL, // virtual override (res) base (binapi) + .BinaryApi.__binapiControl__ = &__nvoc_down_thunk_BinaryApiPrivileged_binapiControl, // virtual override (res) base (gpures) + .BinaryApi.GpuResource.__gpuresControl__ = &__nvoc_down_thunk_BinaryApi_gpuresControl, // virtual override (res) base (rmres) + .BinaryApi.GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .BinaryApi.GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__binapiprivMap__ = &__nvoc_up_thunk_GpuResource_binapiprivMap, // virtual inherited (gpures) base (binapi) + .BinaryApi.__binapiMap__ = &__nvoc_up_thunk_GpuResource_binapiMap, // virtual inherited (gpures) base (gpures) + .BinaryApi.GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .BinaryApi.GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .BinaryApi.GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__binapiprivUnmap__ = &__nvoc_up_thunk_GpuResource_binapiprivUnmap, // virtual inherited (gpures) base (binapi) + .BinaryApi.__binapiUnmap__ = &__nvoc_up_thunk_GpuResource_binapiUnmap, // virtual inherited (gpures) base (gpures) + .BinaryApi.GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .BinaryApi.GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .BinaryApi.GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__binapiprivShareCallback__ = &__nvoc_up_thunk_GpuResource_binapiprivShareCallback, // virtual inherited (gpures) base (binapi) + .BinaryApi.__binapiShareCallback__ = &__nvoc_up_thunk_GpuResource_binapiShareCallback, // virtual inherited (gpures) base (gpures) + .BinaryApi.GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .BinaryApi.GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .BinaryApi.GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__binapiprivGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_binapiprivGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (binapi) + .BinaryApi.__binapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_binapiGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .BinaryApi.GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__binapiprivGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_binapiprivGetMapAddrSpace, // virtual inherited (gpures) base (binapi) + .BinaryApi.__binapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_binapiGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .BinaryApi.GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__binapiprivInternalControlForward__ = &__nvoc_up_thunk_GpuResource_binapiprivInternalControlForward, // virtual inherited (gpures) base (binapi) + .BinaryApi.__binapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_binapiInternalControlForward, // virtual inherited (gpures) base (gpures) + .BinaryApi.GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__binapiprivGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_binapiprivGetInternalObjectHandle, // virtual inherited (gpures) base (binapi) + .BinaryApi.__binapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_binapiGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .BinaryApi.GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__binapiprivAccessCallback__ = &__nvoc_up_thunk_RmResource_binapiprivAccessCallback, // virtual inherited (rmres) base (binapi) + .BinaryApi.__binapiAccessCallback__ = &__nvoc_up_thunk_RmResource_binapiAccessCallback, // virtual inherited (rmres) base (gpures) + .BinaryApi.GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .BinaryApi.GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .BinaryApi.GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__binapiprivGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_binapiprivGetMemInterMapParams, // virtual inherited (rmres) base (binapi) + .BinaryApi.__binapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_binapiGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .BinaryApi.GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .BinaryApi.GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__binapiprivCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_binapiprivCheckMemInterUnmap, // virtual inherited (rmres) base (binapi) + .BinaryApi.__binapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_binapiCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .BinaryApi.GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .BinaryApi.GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__binapiprivGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_binapiprivGetMemoryMappingDescriptor, // virtual inherited (rmres) base (binapi) + .BinaryApi.__binapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_binapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .BinaryApi.GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .BinaryApi.GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__binapiprivControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_binapiprivControlSerialization_Prologue, // virtual inherited (rmres) base (binapi) + .BinaryApi.__binapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_binapiControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .BinaryApi.GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .BinaryApi.GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .BinaryApi.GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__binapiprivControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_binapiprivControlSerialization_Epilogue, // virtual inherited (rmres) base (binapi) + .BinaryApi.__binapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_binapiControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .BinaryApi.GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .BinaryApi.GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .BinaryApi.GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__binapiprivControl_Prologue__ = &__nvoc_up_thunk_RmResource_binapiprivControl_Prologue, // virtual inherited (rmres) base (binapi) + .BinaryApi.__binapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_binapiControl_Prologue, // virtual inherited (rmres) base (gpures) + .BinaryApi.GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .BinaryApi.GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .BinaryApi.GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__binapiprivControl_Epilogue__ = &__nvoc_up_thunk_RmResource_binapiprivControl_Epilogue, // virtual inherited (rmres) base (binapi) + .BinaryApi.__binapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_binapiControl_Epilogue, // virtual inherited (rmres) base (gpures) + .BinaryApi.GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .BinaryApi.GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .BinaryApi.GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__binapiprivCanCopy__ = &__nvoc_up_thunk_RsResource_binapiprivCanCopy, // virtual inherited (res) base (binapi) + .BinaryApi.__binapiCanCopy__ = &__nvoc_up_thunk_RsResource_binapiCanCopy, // virtual inherited (res) base (gpures) + .BinaryApi.GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .BinaryApi.GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .BinaryApi.GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__binapiprivIsDuplicate__ = &__nvoc_up_thunk_RsResource_binapiprivIsDuplicate, // virtual inherited (res) base (binapi) + .BinaryApi.__binapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_binapiIsDuplicate, // virtual inherited (res) base (gpures) + .BinaryApi.GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .BinaryApi.GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .BinaryApi.GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__binapiprivPreDestruct__ = &__nvoc_up_thunk_RsResource_binapiprivPreDestruct, // virtual inherited (res) base (binapi) + .BinaryApi.__binapiPreDestruct__ = &__nvoc_up_thunk_RsResource_binapiPreDestruct, // virtual inherited (res) base (gpures) + .BinaryApi.GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .BinaryApi.GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .BinaryApi.GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__binapiprivControlFilter__ = &__nvoc_up_thunk_RsResource_binapiprivControlFilter, // virtual inherited (res) base (binapi) + .BinaryApi.__binapiControlFilter__ = &__nvoc_up_thunk_RsResource_binapiControlFilter, // virtual inherited (res) base (gpures) + .BinaryApi.GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .BinaryApi.GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .BinaryApi.GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__binapiprivIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_binapiprivIsPartialUnmapSupported, // inline virtual inherited (res) base (binapi) body + .BinaryApi.__binapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_binapiIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .BinaryApi.GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .BinaryApi.GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .BinaryApi.GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__binapiprivMapTo__ = &__nvoc_up_thunk_RsResource_binapiprivMapTo, // virtual inherited (res) base (binapi) + .BinaryApi.__binapiMapTo__ = &__nvoc_up_thunk_RsResource_binapiMapTo, // virtual inherited (res) base (gpures) + .BinaryApi.GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .BinaryApi.GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .BinaryApi.GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__binapiprivUnmapFrom__ = &__nvoc_up_thunk_RsResource_binapiprivUnmapFrom, // virtual inherited (res) base (binapi) + .BinaryApi.__binapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_binapiUnmapFrom, // virtual inherited (res) base (gpures) + .BinaryApi.GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .BinaryApi.GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .BinaryApi.GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__binapiprivGetRefCount__ = &__nvoc_up_thunk_RsResource_binapiprivGetRefCount, // virtual inherited (res) base (binapi) + .BinaryApi.__binapiGetRefCount__ = &__nvoc_up_thunk_RsResource_binapiGetRefCount, // virtual inherited (res) base (gpures) + .BinaryApi.GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .BinaryApi.GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .BinaryApi.GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__binapiprivAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_binapiprivAddAdditionalDependants, // virtual inherited (res) base (binapi) + .BinaryApi.__binapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_binapiAddAdditionalDependants, // virtual inherited (res) base (gpures) + .BinaryApi.GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .BinaryApi.GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .BinaryApi.GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.BinaryApi.GpuResource.RmResource.RsResource; // (res) super^4 + pThis->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.BinaryApi.GpuResource.RmResource; // (rmres) super^3 + pThis->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_vtable = &vtable.BinaryApi.GpuResource; // (gpures) super^2 + pThis->__nvoc_base_BinaryApi.__nvoc_vtable = &vtable.BinaryApi; // (binapi) super + pThis->__nvoc_vtable = &vtable; // (binapipriv) this __nvoc_init_funcTable_BinaryApiPrivileged_1(pThis); } diff --git a/src/nvidia/generated/g_binary_api_nvoc.h b/src/nvidia/generated/g_binary_api_nvoc.h index 19e9fd0a78..1b586b9173 100644 --- a/src/nvidia/generated/g_binary_api_nvoc.h +++ b/src/nvidia/generated/g_binary_api_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -59,10 +59,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__BinaryApi; + + struct BinaryApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__BinaryApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -74,8 +79,13 @@ struct BinaryApi { struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct BinaryApi *__nvoc_pbase_BinaryApi; // binapi +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__BinaryApi { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers - // Vtable with 25 per-object function pointers NV_STATUS (*__binapiControl__)(struct BinaryApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (gpures) NV_STATUS (*__binapiMap__)(struct BinaryApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__binapiUnmap__)(struct BinaryApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -133,156 +143,156 @@ NV_STATUS __nvoc_objCreate_BinaryApi(BinaryApi**, Dynamic*, NvU32, struct CALL_C // Wrapper macros -#define binapiControl_FNPTR(pResource) pResource->__binapiControl__ +#define binapiControl_FNPTR(pResource) pResource->__nvoc_vtable->__binapiControl__ #define binapiControl(pResource, pCallContext, pParams) binapiControl_DISPATCH(pResource, pCallContext, pParams) -#define binapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define binapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define binapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) binapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define binapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define binapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define binapiUnmap(pGpuResource, pCallContext, pCpuMapping) binapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define binapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define binapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define binapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) binapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define binapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define binapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define binapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) binapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define binapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define binapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define binapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) binapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define binapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define binapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define binapiInternalControlForward(pGpuResource, command, pParams, size) binapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define binapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define binapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define binapiGetInternalObjectHandle(pGpuResource) binapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define binapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define binapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define binapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) binapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define binapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define binapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define binapiGetMemInterMapParams(pRmResource, pParams) binapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define binapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define binapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define binapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) binapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define binapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define binapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define binapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) binapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define binapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define binapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define binapiControlSerialization_Prologue(pResource, pCallContext, pParams) binapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define binapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define binapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define binapiControlSerialization_Epilogue(pResource, pCallContext, pParams) binapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define binapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define binapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define binapiControl_Prologue(pResource, pCallContext, pParams) binapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define binapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define binapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define binapiControl_Epilogue(pResource, pCallContext, pParams) binapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define binapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define binapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define binapiCanCopy(pResource) binapiCanCopy_DISPATCH(pResource) -#define binapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define binapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define binapiIsDuplicate(pResource, hMemory, pDuplicate) binapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define binapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define binapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define binapiPreDestruct(pResource) binapiPreDestruct_DISPATCH(pResource) -#define binapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define binapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define binapiControlFilter(pResource, pCallContext, pParams) binapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define binapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define binapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define binapiIsPartialUnmapSupported(pResource) binapiIsPartialUnmapSupported_DISPATCH(pResource) -#define binapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define binapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define binapiMapTo(pResource, pParams) binapiMapTo_DISPATCH(pResource, pParams) -#define binapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define binapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define binapiUnmapFrom(pResource, pParams) binapiUnmapFrom_DISPATCH(pResource, pParams) -#define binapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define binapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define binapiGetRefCount(pResource) binapiGetRefCount_DISPATCH(pResource) -#define binapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define binapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define binapiAddAdditionalDependants(pClient, pResource, pReference) binapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NV_STATUS binapiControl_DISPATCH(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__binapiControl__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__binapiControl__(pResource, pCallContext, pParams); } static inline NV_STATUS binapiMap_DISPATCH(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__binapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__binapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS binapiUnmap_DISPATCH(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__binapiUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__binapiUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool binapiShareCallback_DISPATCH(struct BinaryApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__binapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__binapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS binapiGetRegBaseOffsetAndSize_DISPATCH(struct BinaryApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__binapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__binapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS binapiGetMapAddrSpace_DISPATCH(struct BinaryApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__binapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__binapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS binapiInternalControlForward_DISPATCH(struct BinaryApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__binapiInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__binapiInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle binapiGetInternalObjectHandle_DISPATCH(struct BinaryApi *pGpuResource) { - return pGpuResource->__binapiGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__binapiGetInternalObjectHandle__(pGpuResource); } static inline NvBool binapiAccessCallback_DISPATCH(struct BinaryApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__binapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__binapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS binapiGetMemInterMapParams_DISPATCH(struct BinaryApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__binapiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__binapiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS binapiCheckMemInterUnmap_DISPATCH(struct BinaryApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__binapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__binapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS binapiGetMemoryMappingDescriptor_DISPATCH(struct BinaryApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__binapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__binapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS binapiControlSerialization_Prologue_DISPATCH(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__binapiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__binapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void binapiControlSerialization_Epilogue_DISPATCH(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__binapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__binapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS binapiControl_Prologue_DISPATCH(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__binapiControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__binapiControl_Prologue__(pResource, pCallContext, pParams); } static inline void binapiControl_Epilogue_DISPATCH(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__binapiControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__binapiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool binapiCanCopy_DISPATCH(struct BinaryApi *pResource) { - return pResource->__binapiCanCopy__(pResource); + return pResource->__nvoc_vtable->__binapiCanCopy__(pResource); } static inline NV_STATUS binapiIsDuplicate_DISPATCH(struct BinaryApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__binapiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__binapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void binapiPreDestruct_DISPATCH(struct BinaryApi *pResource) { - pResource->__binapiPreDestruct__(pResource); + pResource->__nvoc_vtable->__binapiPreDestruct__(pResource); } static inline NV_STATUS binapiControlFilter_DISPATCH(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__binapiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__binapiControlFilter__(pResource, pCallContext, pParams); } static inline NvBool binapiIsPartialUnmapSupported_DISPATCH(struct BinaryApi *pResource) { - return pResource->__binapiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__binapiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS binapiMapTo_DISPATCH(struct BinaryApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__binapiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__binapiMapTo__(pResource, pParams); } static inline NV_STATUS binapiUnmapFrom_DISPATCH(struct BinaryApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__binapiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__binapiUnmapFrom__(pResource, pParams); } static inline NvU32 binapiGetRefCount_DISPATCH(struct BinaryApi *pResource) { - return pResource->__binapiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__binapiGetRefCount__(pResource); } static inline void binapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct BinaryApi *pResource, RsResourceRef *pReference) { - pResource->__binapiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__binapiAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS binapiControl_IMPL(struct BinaryApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); @@ -304,10 +314,15 @@ NV_STATUS binapiConstruct_IMPL(struct BinaryApi *arg_pResource, struct CALL_CONT #endif +// Metadata including vtable +struct NVOC_VTABLE__BinaryApiPrivileged; + + struct BinaryApiPrivileged { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__BinaryApiPrivileged *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct BinaryApi __nvoc_base_BinaryApi; @@ -320,8 +335,13 @@ struct BinaryApiPrivileged { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super^2 struct BinaryApi *__nvoc_pbase_BinaryApi; // binapi super struct BinaryApiPrivileged *__nvoc_pbase_BinaryApiPrivileged; // binapipriv +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__BinaryApiPrivileged { + const struct NVOC_VTABLE__BinaryApi BinaryApi; // (binapi) 25 function pointers - // Vtable with 25 per-object function pointers NV_STATUS (*__binapiprivControl__)(struct BinaryApiPrivileged * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (binapi) NV_STATUS (*__binapiprivMap__)(struct BinaryApiPrivileged * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (binapi) NV_STATUS (*__binapiprivUnmap__)(struct BinaryApiPrivileged * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (binapi) @@ -379,156 +399,156 @@ NV_STATUS __nvoc_objCreate_BinaryApiPrivileged(BinaryApiPrivileged**, Dynamic*, // Wrapper macros -#define binapiprivControl_FNPTR(pResource) pResource->__binapiprivControl__ +#define binapiprivControl_FNPTR(pResource) pResource->__nvoc_vtable->__binapiprivControl__ #define binapiprivControl(pResource, pCallContext, pParams) binapiprivControl_DISPATCH(pResource, pCallContext, pParams) -#define binapiprivMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__gpuresMap__ +#define binapiprivMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define binapiprivMap(pGpuResource, pCallContext, pParams, pCpuMapping) binapiprivMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define binapiprivUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__gpuresUnmap__ +#define binapiprivUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define binapiprivUnmap(pGpuResource, pCallContext, pCpuMapping) binapiprivUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define binapiprivShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__gpuresShareCallback__ +#define binapiprivShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define binapiprivShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) binapiprivShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define binapiprivGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define binapiprivGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define binapiprivGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) binapiprivGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define binapiprivGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define binapiprivGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define binapiprivGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) binapiprivGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define binapiprivInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define binapiprivInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define binapiprivInternalControlForward(pGpuResource, command, pParams, size) binapiprivInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define binapiprivGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define binapiprivGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define binapiprivGetInternalObjectHandle(pGpuResource) binapiprivGetInternalObjectHandle_DISPATCH(pGpuResource) -#define binapiprivAccessCallback_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define binapiprivAccessCallback_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define binapiprivAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) binapiprivAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define binapiprivGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define binapiprivGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define binapiprivGetMemInterMapParams(pRmResource, pParams) binapiprivGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define binapiprivCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define binapiprivCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define binapiprivCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) binapiprivCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define binapiprivGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define binapiprivGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define binapiprivGetMemoryMappingDescriptor(pRmResource, ppMemDesc) binapiprivGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define binapiprivControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define binapiprivControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define binapiprivControlSerialization_Prologue(pResource, pCallContext, pParams) binapiprivControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define binapiprivControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define binapiprivControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define binapiprivControlSerialization_Epilogue(pResource, pCallContext, pParams) binapiprivControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define binapiprivControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define binapiprivControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define binapiprivControl_Prologue(pResource, pCallContext, pParams) binapiprivControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define binapiprivControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define binapiprivControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define binapiprivControl_Epilogue(pResource, pCallContext, pParams) binapiprivControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define binapiprivCanCopy_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define binapiprivCanCopy_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define binapiprivCanCopy(pResource) binapiprivCanCopy_DISPATCH(pResource) -#define binapiprivIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define binapiprivIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define binapiprivIsDuplicate(pResource, hMemory, pDuplicate) binapiprivIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define binapiprivPreDestruct_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define binapiprivPreDestruct_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define binapiprivPreDestruct(pResource) binapiprivPreDestruct_DISPATCH(pResource) -#define binapiprivControlFilter_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define binapiprivControlFilter_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define binapiprivControlFilter(pResource, pCallContext, pParams) binapiprivControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define binapiprivIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define binapiprivIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define binapiprivIsPartialUnmapSupported(pResource) binapiprivIsPartialUnmapSupported_DISPATCH(pResource) -#define binapiprivMapTo_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define binapiprivMapTo_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define binapiprivMapTo(pResource, pParams) binapiprivMapTo_DISPATCH(pResource, pParams) -#define binapiprivUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define binapiprivUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define binapiprivUnmapFrom(pResource, pParams) binapiprivUnmapFrom_DISPATCH(pResource, pParams) -#define binapiprivGetRefCount_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define binapiprivGetRefCount_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define binapiprivGetRefCount(pResource) binapiprivGetRefCount_DISPATCH(pResource) -#define binapiprivAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define binapiprivAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_BinaryApi.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define binapiprivAddAdditionalDependants(pClient, pResource, pReference) binapiprivAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NV_STATUS binapiprivControl_DISPATCH(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__binapiprivControl__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__binapiprivControl__(pResource, pCallContext, pParams); } static inline NV_STATUS binapiprivMap_DISPATCH(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__binapiprivMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__binapiprivMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS binapiprivUnmap_DISPATCH(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__binapiprivUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__binapiprivUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool binapiprivShareCallback_DISPATCH(struct BinaryApiPrivileged *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__binapiprivShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__binapiprivShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS binapiprivGetRegBaseOffsetAndSize_DISPATCH(struct BinaryApiPrivileged *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__binapiprivGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__binapiprivGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS binapiprivGetMapAddrSpace_DISPATCH(struct BinaryApiPrivileged *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__binapiprivGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__binapiprivGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS binapiprivInternalControlForward_DISPATCH(struct BinaryApiPrivileged *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__binapiprivInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__binapiprivInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle binapiprivGetInternalObjectHandle_DISPATCH(struct BinaryApiPrivileged *pGpuResource) { - return pGpuResource->__binapiprivGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__binapiprivGetInternalObjectHandle__(pGpuResource); } static inline NvBool binapiprivAccessCallback_DISPATCH(struct BinaryApiPrivileged *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__binapiprivAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__binapiprivAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS binapiprivGetMemInterMapParams_DISPATCH(struct BinaryApiPrivileged *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__binapiprivGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__binapiprivGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS binapiprivCheckMemInterUnmap_DISPATCH(struct BinaryApiPrivileged *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__binapiprivCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__binapiprivCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS binapiprivGetMemoryMappingDescriptor_DISPATCH(struct BinaryApiPrivileged *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__binapiprivGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__binapiprivGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS binapiprivControlSerialization_Prologue_DISPATCH(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__binapiprivControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__binapiprivControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void binapiprivControlSerialization_Epilogue_DISPATCH(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__binapiprivControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__binapiprivControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS binapiprivControl_Prologue_DISPATCH(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__binapiprivControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__binapiprivControl_Prologue__(pResource, pCallContext, pParams); } static inline void binapiprivControl_Epilogue_DISPATCH(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__binapiprivControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__binapiprivControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool binapiprivCanCopy_DISPATCH(struct BinaryApiPrivileged *pResource) { - return pResource->__binapiprivCanCopy__(pResource); + return pResource->__nvoc_vtable->__binapiprivCanCopy__(pResource); } static inline NV_STATUS binapiprivIsDuplicate_DISPATCH(struct BinaryApiPrivileged *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__binapiprivIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__binapiprivIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void binapiprivPreDestruct_DISPATCH(struct BinaryApiPrivileged *pResource) { - pResource->__binapiprivPreDestruct__(pResource); + pResource->__nvoc_vtable->__binapiprivPreDestruct__(pResource); } static inline NV_STATUS binapiprivControlFilter_DISPATCH(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__binapiprivControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__binapiprivControlFilter__(pResource, pCallContext, pParams); } static inline NvBool binapiprivIsPartialUnmapSupported_DISPATCH(struct BinaryApiPrivileged *pResource) { - return pResource->__binapiprivIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__binapiprivIsPartialUnmapSupported__(pResource); } static inline NV_STATUS binapiprivMapTo_DISPATCH(struct BinaryApiPrivileged *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__binapiprivMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__binapiprivMapTo__(pResource, pParams); } static inline NV_STATUS binapiprivUnmapFrom_DISPATCH(struct BinaryApiPrivileged *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__binapiprivUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__binapiprivUnmapFrom__(pResource, pParams); } static inline NvU32 binapiprivGetRefCount_DISPATCH(struct BinaryApiPrivileged *pResource) { - return pResource->__binapiprivGetRefCount__(pResource); + return pResource->__nvoc_vtable->__binapiprivGetRefCount__(pResource); } static inline void binapiprivAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct BinaryApiPrivileged *pResource, RsResourceRef *pReference) { - pResource->__binapiprivAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__binapiprivAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS binapiprivControl_IMPL(struct BinaryApiPrivileged *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); diff --git a/src/nvidia/generated/g_bindata.c b/src/nvidia/generated/g_bindata.c index 40427229dd..3937d60dcc 100644 --- a/src/nvidia/generated/g_bindata.c +++ b/src/nvidia/generated/g_bindata.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveConcatenatedFMCDesc_GH100.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveConcatenatedFMCDesc_GH100.c index 00acd0d2c8..f0f51df9c3 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveConcatenatedFMCDesc_GH100.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveConcatenatedFMCDesc_GH100.c @@ -39,8 +39,8 @@ // static BINDATA_CONST NvU8 kgspBinArchiveConcatenatedFMCDesc_GH100_ucode_desc_prod_data[] = { - 0x63, 0x65, 0x20, 0x02, 0x70, 0x41, 0xf1, 0x72, 0x20, 0xde, 0x08, 0xc4, 0x37, 0x19, 0x19, 0x18, - 0xf1, 0xe8, 0x03, 0x00, 0x1e, 0x4d, 0xae, 0xcc, 0x54, 0x00, 0x00, 0x00, + 0x63, 0x65, 0x20, 0x02, 0x70, 0x41, 0xf1, 0x0a, 0x20, 0xde, 0x04, 0xc4, 0x37, 0x19, 0x19, 0x18, + 0xf1, 0xe8, 0x03, 0x00, 0x92, 0x10, 0x68, 0x6c, 0x54, 0x00, 0x00, 0x00, }; #endif // defined(BINDATA_INCLUDE_DATA) diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveConcatenatedFMC_GH100.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveConcatenatedFMC_GH100.c index fc3689c64b..e1fb3260b4 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveConcatenatedFMC_GH100.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveConcatenatedFMC_GH100.c @@ -39,10422 +39,10422 @@ // static BINDATA_CONST NvU8 kgspBinArchiveConcatenatedFMC_GH100_ucode_image_prod_data[] = { - 0xcc, 0xe1, 0x30, 0x98, 0xcc, 0x8e, 0x6d, 0xc9, 0xc1, 0x58, 0x9f, 0x98, 0x43, 0x9e, 0x1c, 0xb2, - 0xec, 0x50, 0x04, 0xc7, 0xd9, 0x30, 0x1d, 0xbb, 0xe0, 0x1d, 0xa9, 0x6c, 0x0b, 0xc7, 0xc9, 0xff, - 0x87, 0xd4, 0xb4, 0x07, 0x0f, 0x6c, 0x10, 0x40, 0x66, 0xe2, 0x72, 0x89, 0x6a, 0x33, 0x00, 0x51, - 0xc0, 0x50, 0x4e, 0xe1, 0x89, 0x8b, 0xe7, 0x9e, 0x23, 0x37, 0x07, 0xae, 0xbc, 0xcd, 0xfd, 0x2a, - 0x18, 0xc2, 0xc5, 0x2c, 0x72, 0x33, 0x16, 0xbb, 0xca, 0xd4, 0x42, 0xe7, 0xe8, 0x5d, 0x2d, 0x20, - 0xb6, 0x2b, 0x97, 0x71, 0x0a, 0x23, 0x05, 0x9b, 0xa4, 0xbf, 0x63, 0xd6, 0x85, 0xa0, 0x8b, 0x1d, - 0x57, 0x6b, 0x0c, 0x75, 0x84, 0x3d, 0xd0, 0xec, 0x8c, 0xdb, 0x35, 0xca, 0x18, 0xf7, 0x66, 0xda, - 0xe7, 0x77, 0x81, 0x47, 0xab, 0xf3, 0x47, 0xff, 0x43, 0xe1, 0x12, 0xbb, 0xe8, 0xd5, 0xce, 0x48, - 0x58, 0x41, 0x77, 0x9b, 0x3d, 0xea, 0x06, 0xa8, 0x7d, 0x5a, 0x26, 0xc0, 0x99, 0x62, 0x81, 0x30, - 0xe3, 0x38, 0xce, 0x3b, 0x71, 0xf8, 0x42, 0x36, 0x1f, 0x6b, 0xe7, 0x1e, 0x25, 0x8a, 0x10, 0xfb, - 0xa6, 0x03, 0x7d, 0xa8, 0xf3, 0x70, 0x62, 0x14, 0xa9, 0x97, 0x86, 0xe9, 0xcb, 0x5d, 0x0b, 0x45, - 0x6b, 0xa2, 0x53, 0x55, 0xa1, 0x94, 0xa4, 0xa6, 0x70, 0x36, 0x55, 0x6c, 0xf9, 0xd7, 0x4e, 0xc6, - 0x74, 0x3c, 0x69, 0xf2, 0x39, 0x8c, 0xdb, 0x39, 0xdd, 0x5f, 0x81, 0x1e, 0xfe, 0x18, 0xf0, 0xaa, - 0xa5, 0x82, 0x51, 0x34, 0x1b, 0xff, 0x56, 0xc3, 0x72, 0x47, 0xf2, 0xa8, 0x98, 0xa5, 0xce, 0xe9, - 0x82, 0x94, 0x8e, 0x46, 0x89, 0x86, 0xe2, 0x5f, 0x98, 0x33, 0xdc, 0x78, 0x47, 0x04, 0xe6, 0xb2, - 0x7e, 0x24, 0xfe, 0xff, 0x4c, 0x4e, 0x47, 0xec, 0xcd, 0x84, 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0x4e, 0xbb, 0xb8, 0x76, 0x91, + 0x80, 0x09, 0x51, 0xed, 0x58, 0x48, 0xb0, 0xa7, 0xc8, 0x23, 0x94, 0xdd, 0xf7, 0xd6, 0x54, 0x0e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -10791,14342 +10791,14342 @@ static BINDATA_CONST NvU8 kgspBinArchiveConcatenatedFMC_GH100_ucode_image_prod_d 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x86, 0x98, 0xe3, 0xd2, 0x62, 0xdf, 0x33, 0xc8, 0x3c, 0x22, 0xfc, 0xb3, 0x16, 0xcd, 0x6d, 0xa0, - 0xfd, 0xb9, 0x30, 0x3f, 0x24, 0x8d, 0x8a, 0x22, 0x44, 0x95, 0x6d, 0x2b, 0xfb, 0xa8, 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0xa1, 0x60, 0x2d, 0xad, 0x57, 0x5a, 0x7f, 0x3a, + 0x1c, 0x0c, 0x5b, 0x69, 0x24, 0x7d, 0x6a, 0x65, 0x27, 0xa4, 0x70, 0xf4, 0x35, 0xf3, 0x98, 0xf2, + 0x12, 0xc2, 0x8f, 0x5a, 0xbc, 0xb9, 0xce, 0x79, 0xbe, 0x3a, 0xa6, 0xe3, 0x1c, 0xbb, 0x20, 0xbc, }; #endif // defined(BINDATA_INCLUDE_DATA) diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmBoot_GB100.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmBoot_GB100.c index 8c0279a840..b310398c89 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmBoot_GB100.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmBoot_GB100.c @@ -34,7 +34,7 @@ // VAR NAME: N/A // COMPRESSION: NO // COMPLEX_STRUCT: NO -// DATA SIZE (bytes): 196608 +// DATA SIZE (bytes): 200704 // COMPRESSED SIZE (bytes): N/A // static BINDATA_CONST NvU8 kgspBinArchiveGspRmBoot_GB100_ucode_image_dbg_data[] = @@ -63,12270 +63,12526 @@ static BINDATA_CONST NvU8 kgspBinArchiveGspRmBoot_GB100_ucode_image_dbg_data[] = 0x00, 0x00, 0x00, 0x00, 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defined(BINDATA_INCLUDE_STORAGE_PVT_DEFN) { - 196608, // uncompressed data size (bytes) - 196608, // compressed data size (bytes) + 200704, // uncompressed data size (bytes) + 200704, // compressed data size (bytes) kgspBinArchiveGspRmBoot_GB100_ucode_image_dbg_data, // compressed data pointer NV_FALSE, // is pData compressed? NV_TRUE, // contain information for file overriding? @@ -12359,8 +12615,8 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmBoot_GB100_ucode_image_dbg_storage_pvt; // static BINDATA_CONST NvU8 kgspBinArchiveGspRmBoot_GB100_ucode_desc_dbg_data[] = { - 0x63, 0x65, 0x20, 0x02, 0x70, 0x41, 0xf1, 0x72, 0x20, 0xde, 0x08, 0xc4, 0xfe, 0x4c, 0x0c, 0x8c, - 0x78, 0xf4, 0x01, 0x00, 0x74, 0xe6, 0x11, 0x5e, 0x54, 0x00, 0x00, 0x00, + 0x63, 0x65, 0x20, 0x02, 0x70, 0x41, 0xf1, 0x72, 0x20, 0xde, 0x08, 0xc4, 0x41, 0x4c, 0x0c, 0x8c, + 0x78, 0xf4, 0x01, 0x00, 0x79, 0x66, 0x28, 0xf2, 0x54, 0x00, 0x00, 0x00, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -12388,12251 +12644,12507 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmBoot_GB100_ucode_desc_dbg_storage_pvt; // VAR NAME: N/A // COMPRESSION: NO // COMPLEX_STRUCT: NO -// DATA SIZE (bytes): 196608 +// DATA SIZE (bytes): 200704 // COMPRESSED SIZE (bytes): N/A // static BINDATA_CONST NvU8 kgspBinArchiveGspRmBoot_GB100_ucode_image_prod_data[] = { - 0xcc, 0x7a, 0x01, 0xef, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -24690,8 +25202,8 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmBoot_GB100_ucode_image_prod_storage_pvt; #if defined(BINDATA_INCLUDE_STORAGE_PVT_DEFN) { - 196608, // uncompressed data size (bytes) - 196608, // compressed data size (bytes) + 200704, // uncompressed data size (bytes) + 200704, // compressed data size (bytes) kgspBinArchiveGspRmBoot_GB100_ucode_image_prod_data, // compressed data pointer NV_FALSE, // is pData compressed? NV_TRUE, // contain information for file overriding? @@ -24713,8 +25225,8 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmBoot_GB100_ucode_image_prod_storage_pvt; // static BINDATA_CONST NvU8 kgspBinArchiveGspRmBoot_GB100_ucode_desc_prod_data[] = { - 0x63, 0x65, 0x20, 0x02, 0x70, 0x41, 0xf1, 0x32, 0x20, 0xde, 0x00, 0xc4, 0xbe, 0x4c, 0x0c, 0x8c, - 0x78, 0xf4, 0x01, 0x00, 0xb7, 0x2b, 0xc9, 0xc2, 0x54, 0x00, 0x00, 0x00, + 0x63, 0x65, 0x20, 0x02, 0x70, 0x41, 0xf1, 0x72, 0x20, 0xde, 0x08, 0xc4, 0x41, 0x4c, 0x0c, 0x8c, + 0x78, 0xf4, 0x01, 0x00, 0x79, 0x66, 0x28, 0xf2, 0x54, 0x00, 0x00, 0x00, }; #endif // defined(BINDATA_INCLUDE_DATA) diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmBoot_GH100.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmBoot_GH100.c index 11531a0cd5..eb4ab58331 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmBoot_GH100.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmBoot_GH100.c @@ -63,10318 +63,10318 @@ static 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0xde, 0x6e, + 0x62, 0x29, 0xb6, 0x8e, 0x5a, 0x6a, 0xe7, 0x31, 0xed, 0x5b, 0x9b, 0xf4, 0x12, 0x0d, 0xfd, 0x6d, + 0xc1, 0xab, 0xa6, 0xb0, 0x3f, 0x96, 0x0f, 0x43, 0xd4, 0xe9, 0x5a, 0x76, 0x27, 0x87, 0x82, 0x98, + 0x9e, 0xe4, 0x73, 0x39, 0xf0, 0xee, 0x95, 0x97, 0x03, 0x3c, 0xca, 0x8b, 0x1d, 0xf8, 0x2a, 0xa6, + 0x14, 0x8f, 0x63, 0xe2, 0xcf, 0x6a, 0x21, 0x99, 0x34, 0xd4, 0xb4, 0xc6, 0xcc, 0x61, 0xda, 0x4a, + 0xb3, 0x6f, 0x4d, 0xf7, 0x0a, 0x07, 0xf5, 0x68, 0xe9, 0x47, 0x41, 0xa9, 0x4e, 0x34, 0xa5, 0x69, + 0xfe, 0x9e, 0x3d, 0x96, 0x98, 0x95, 0x4b, 0x17, 0x78, 0xd1, 0x17, 0xa5, 0xb1, 0xff, 0x00, 0xd4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -10601,10342 +10601,10342 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmBoot_GH100_ucode_desc_dbg_storage_pvt; // static BINDATA_CONST NvU8 kgspBinArchiveGspRmBoot_GH100_ucode_image_prod_data[] = { - 0x88, 0x6f, 0x33, 0x5d, 0x07, 0x91, 0x11, 0xdb, 0x1e, 0x29, 0xe1, 0x42, 0x01, 0xca, 0x48, 0x68, - 0x36, 0x09, 0xeb, 0xdc, 0xa8, 0xfc, 0x6d, 0x18, 0x31, 0xa8, 0x08, 0x62, 0x6c, 0x8d, 0x50, 0xd3, - 0x4b, 0x47, 0x02, 0xaf, 0x8e, 0xb9, 0x61, 0x30, 0x01, 0x57, 0xea, 0x9b, 0xea, 0x5b, 0xe3, 0xb8, - 0xfb, 0xb5, 0x7b, 0x67, 0xb9, 0xa2, 0x76, 0xf1, 0x0c, 0x24, 0xd5, 0x6a, 0xf8, 0x78, 0xa4, 0x64, - 0xc9, 0x8c, 0x80, 0x8c, 0x58, 0x5d, 0x01, 0x51, 0xe6, 0x3a, 0xdf, 0x0d, 0x21, 0x3c, 0xf2, 0xa9, - 0x11, 0xde, 0xd4, 0x7b, 0x26, 0x3e, 0x7b, 0x95, 0xb1, 0x63, 0xdb, 0x7b, 0x23, 0x46, 0x9f, 0x0c, - 0x53, 0x54, 0x2d, 0x5e, 0xc4, 0xd8, 0xef, 0xee, 0xae, 0xa3, 0x21, 0x8f, 0xfd, 0xc8, 0xbe, 0x10, - 0x30, 0xe2, 0x50, 0xee, 0xf2, 0xf0, 0x36, 0xb7, 0x75, 0x2b, 0xfb, 0xc6, 0xac, 0xa1, 0x76, 0xc6, - 0xae, 0x53, 0xac, 0x5b, 0x52, 0xe3, 0xfb, 0xba, 0xdf, 0xda, 0x4c, 0xde, 0xc0, 0xf2, 0xc2, 0x0e, - 0x5b, 0x0e, 0xa6, 0x28, 0xfa, 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0x3a, 0xd3, 0xe8, 0xa8, 0x00, 0xda, 0xcd, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmCcFmcGfwProdSigned_GH100.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmCcFmcGfwProdSigned_GH100.c index cdedd873c8..ca7cd4e33b 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmCcFmcGfwProdSigned_GH100.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmCcFmcGfwProdSigned_GH100.c @@ -34,10416 +34,10432 @@ // VAR NAME: N/A // COMPRESSION: NO // COMPLEX_STRUCT: NO -// DATA SIZE (bytes): 166472 +// DATA SIZE (bytes): 166728 // COMPRESSED SIZE (bytes): N/A // static BINDATA_CONST NvU8 kgspBinArchiveGspRmCcFmcGfwProdSigned_GH100_ucode_image_data[] = { - 0x03, 0x04, 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0x35, 0xad, 0x00, 0x33, 0xef, + 0xe5, 0xd7, 0x16, 0xd7, 0x37, 0x8c, 0xf2, 0xa7, 0x0b, 0x68, 0x63, 0x03, 0x82, 0xe8, 0xb4, 0xb7, + 0x9d, 0xf3, 0x1b, 0x20, 0xbf, 0xdc, 0xdf, 0xf4, 0x59, 0x48, 0xbb, 0x24, 0xf4, 0x3b, 0xc5, 0xb3, + 0x36, 0x04, 0x46, 0xe4, 0x25, 0x00, 0xf1, 0xfb, 0x25, 0x82, 0x84, 0x31, 0x07, 0x9e, 0xa6, 0x38, + 0xdf, 0xeb, 0x92, 0x41, 0xa9, 0xf9, 0x61, 0x2d, 0x78, 0x1a, 0xf8, 0x7c, 0xe4, 0xf9, 0xbc, 0xa4, + 0x2d, 0xaf, 0x13, 0x16, 0x85, 0xc8, 0xc3, 0x11, 0x5f, 0xec, 0x03, 0xa7, 0xcc, 0x79, 0x12, 0x7f, + 0x15, 0xbb, 0x17, 0xa7, 0x4e, 0xa2, 0x1e, 0xe2, 0x22, 0xfa, 0x1c, 0xa3, 0xc7, 0x9f, 0xaa, 0x13, + 0xda, 0xbd, 0xf7, 0x82, 0x34, 0xbd, 0x35, 0x4a, 0xa0, 0x44, 0xfa, 0x00, 0xe0, 0x39, 0x91, 0x1e, + 0x43, 0xc6, 0x2e, 0x70, 0x4e, 0x12, 0xb5, 0x77, 0x61, 0x7b, 0x9f, 0x07, 0x85, 0x29, 0x5d, 0xb3, + 0x55, 0x57, 0x69, 0x0e, 0x49, 0xb6, 0xd9, 0x02, 0x70, 0xc2, 0x6a, 0x6f, 0x41, 0x83, 0x17, 0x69, + 0x93, 0xc7, 0x30, 0x7d, 0x8a, 0x63, 0xc5, 0xd7, 0xc3, 0xa6, 0xd7, 0x6f, 0x84, 0x0c, 0x6e, 0x7f, + 0x0a, 0xd3, 0xd0, 0x29, 0xfc, 0x65, 0x8f, 0xde, 0xff, 0x5a, 0x53, 0x02, 0x30, 0x68, 0x5a, 0x2d, + 0xb0, 0x8f, 0x40, 0xf2, 0x62, 0xc0, 0xe2, 0xf8, 0x68, 0xcf, 0xa9, 0x12, 0x4c, 0x29, 0xae, 0xc0, + 0x36, 0x80, 0x93, 0x3e, 0x5f, 0x66, 0xb6, 0x0b, 0x28, 0x96, 0xc5, 0x5e, 0xe3, 0x34, 0xfa, 0xb1, + 0x5e, 0xc0, 0x16, 0x2c, 0x8a, 0x70, 0xd4, 0x0b, 0x5b, 0xdc, 0xc5, 0x40, 0xbc, 0xf9, 0x9e, 0x54, + 0xaf, 0x9d, 0x33, 0x0d, 0xfb, 0xc4, 0xea, 0x17, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -10453,8 +10469,8 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmCcFmcGfwProdSigned_GH100_ucode_image_stor #if defined(BINDATA_INCLUDE_STORAGE_PVT_DEFN) { - 166472, // uncompressed data size (bytes) - 166472, // compressed data size (bytes) + 166728, // uncompressed data size (bytes) + 166728, // compressed data size (bytes) kgspBinArchiveGspRmCcFmcGfwProdSigned_GH100_ucode_image_data, // compressed data pointer NV_FALSE, // is pData compressed? NV_TRUE, // contain information for file overriding? @@ -10476,9 +10492,9 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmCcFmcGfwProdSigned_GH100_ucode_image_stor // static BINDATA_CONST NvU8 kgspBinArchiveGspRmCcFmcGfwProdSigned_GH100_ucode_hash_data[] = { - 0x3e, 0x60, 0x86, 0xe2, 0x12, 0x68, 0x79, 0x08, 0x10, 0xa9, 0x08, 0x53, 0x48, 0xce, 0x88, 0x75, - 0xed, 0xf7, 0x86, 0x37, 0xf4, 0x0a, 0xcb, 0x0d, 0x94, 0x23, 0x9d, 0xa5, 0x03, 0x36, 0xe7, 0x02, - 0x28, 0xd2, 0xc5, 0x61, 0xb7, 0x49, 0x69, 0xf6, 0xd2, 0xfc, 0xaf, 0xcf, 0x4e, 0x2f, 0x0f, 0x61, + 0x19, 0x98, 0xa9, 0x43, 0xe6, 0xb5, 0xc6, 0x0e, 0x60, 0x9f, 0xfb, 0x80, 0xed, 0x5d, 0x91, 0x08, + 0x39, 0x57, 0xee, 0x91, 0xa4, 0x69, 0xe3, 0x52, 0xbd, 0x59, 0x45, 0xa3, 0x06, 0xf4, 0x1d, 0xe2, + 0xee, 0x8d, 0x55, 0xdd, 0xd5, 0xc8, 0x83, 0x70, 0x7e, 0x52, 0x20, 0x83, 0x56, 0xb1, 0x9b, 0xda, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -10511,30 +10527,30 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmCcFmcGfwProdSigned_GH100_ucode_hash_stora // static BINDATA_CONST NvU8 kgspBinArchiveGspRmCcFmcGfwProdSigned_GH100_ucode_sig_data[] = { - 0x76, 0xbb, 0xe0, 0xb2, 0x96, 0x5a, 0x9e, 0xc6, 0x0f, 0x6d, 0xf3, 0x03, 0xaa, 0xb1, 0xc2, 0xa3, - 0xa2, 0x33, 0x59, 0xc2, 0xc3, 0x11, 0x84, 0xa7, 0xa9, 0xf3, 0xa0, 0x0f, 0x51, 0x3f, 0x45, 0x62, - 0x23, 0x73, 0x76, 0xa5, 0x8f, 0x95, 0xd1, 0x12, 0x99, 0xf1, 0x06, 0xf8, 0x07, 0xcd, 0x4c, 0xbb, - 0xae, 0xec, 0x82, 0xa1, 0x55, 0xb2, 0x78, 0xd1, 0xae, 0x84, 0xe2, 0x96, 0xdc, 0x1c, 0x41, 0xeb, - 0x2f, 0xa6, 0x72, 0xf6, 0x0f, 0x66, 0x00, 0x3a, 0x6b, 0xd4, 0xac, 0xaa, 0x90, 0xf0, 0x45, 0xf2, - 0x51, 0x19, 0x7c, 0x89, 0x3d, 0x4a, 0xaf, 0x8f, 0xc4, 0x3b, 0xb4, 0x6b, 0xb5, 0x55, 0x02, 0xdc, - 0x65, 0xa3, 0x4d, 0x55, 0x08, 0xc2, 0xd2, 0xbd, 0xc5, 0x2d, 0xb1, 0x22, 0x62, 0x54, 0x44, 0x5a, - 0x1f, 0xf6, 0xa0, 0x4c, 0xae, 0x1b, 0x9c, 0xb9, 0xfb, 0x82, 0x60, 0xe7, 0xb5, 0xdc, 0x28, 0x09, - 0x72, 0x00, 0x24, 0x17, 0xa1, 0xa8, 0xbc, 0x35, 0xf0, 0x64, 0xcf, 0x5b, 0x28, 0x3a, 0x3e, 0xfd, - 0x8d, 0xe6, 0x74, 0xf6, 0x90, 0x9a, 0x94, 0x0d, 0xdc, 0xb8, 0x4e, 0xba, 0x0f, 0x56, 0x73, 0x1a, - 0x35, 0x97, 0x05, 0x9b, 0x6d, 0x20, 0xc4, 0x13, 0xd6, 0x1f, 0x29, 0x73, 0xe1, 0x69, 0x0c, 0xd6, - 0x3a, 0xf3, 0x13, 0x28, 0xd5, 0x16, 0x19, 0x64, 0x3a, 0xcf, 0x25, 0x3d, 0xc4, 0x32, 0x60, 0x95, - 0x72, 0x28, 0x7d, 0x0c, 0x04, 0x5f, 0x1e, 0xd8, 0xf1, 0x2d, 0x02, 0x50, 0xd4, 0xfb, 0x7d, 0xa4, - 0xa4, 0x74, 0xc4, 0xea, 0x99, 0xa7, 0x28, 0x41, 0x75, 0x3f, 0x8b, 0x1a, 0x4c, 0xa6, 0xff, 0x61, - 0x36, 0x07, 0x70, 0xe0, 0xa7, 0x32, 0x06, 0xe0, 0xb7, 0x4b, 0x17, 0xe0, 0xa4, 0xb3, 0xaa, 0xc4, - 0x0e, 0xff, 0xf0, 0x65, 0x22, 0x8c, 0x2c, 0xc8, 0x6d, 0x8a, 0xbe, 0xa6, 0x28, 0x34, 0xf2, 0x24, - 0x3d, 0xa5, 0x9c, 0xc9, 0x23, 0x9c, 0x89, 0xca, 0x69, 0x74, 0x73, 0x48, 0x19, 0x79, 0xc4, 0x38, - 0xf3, 0x0e, 0x40, 0x1d, 0x56, 0xd0, 0x77, 0x66, 0x63, 0xff, 0xfb, 0x1e, 0xa4, 0x69, 0xd4, 0xd8, - 0xc7, 0x73, 0x77, 0x63, 0x4a, 0x32, 0x82, 0x3c, 0xd2, 0x5b, 0xb2, 0x71, 0x43, 0xfe, 0xbe, 0x92, - 0xfd, 0x70, 0x89, 0x35, 0x92, 0x1f, 0x09, 0x23, 0xc1, 0x2b, 0xbe, 0x79, 0x63, 0xe1, 0xe8, 0x1c, - 0x22, 0x5f, 0x7a, 0xfb, 0x9a, 0xc5, 0x01, 0x14, 0xb1, 0x91, 0x59, 0xf8, 0x47, 0x16, 0xd3, 0x7c, - 0x0e, 0x56, 0x88, 0xc2, 0xbd, 0x92, 0x75, 0xbe, 0x45, 0xaf, 0xcb, 0xab, 0x06, 0xf8, 0x4f, 0xa0, - 0x9b, 0x12, 0x79, 0x5d, 0xcf, 0x92, 0x9e, 0x59, 0x8f, 0x7d, 0xf4, 0x2f, 0xf7, 0x66, 0xbd, 0x93, - 0x78, 0xbd, 0x1a, 0xcf, 0x56, 0x5a, 0x87, 0x73, 0x68, 0xb0, 0x15, 0xb5, 0xf1, 0xef, 0x9f, 0x47, + 0x90, 0x0a, 0x7a, 0x2e, 0x95, 0x70, 0xca, 0x11, 0x6f, 0x5f, 0xe7, 0xe9, 0xa9, 0xfe, 0x04, 0x96, + 0xf4, 0x98, 0xba, 0xe5, 0x5a, 0x10, 0xb8, 0xf9, 0xc2, 0xd6, 0x68, 0x1c, 0xfb, 0x02, 0x85, 0x37, + 0x4b, 0x1b, 0x8d, 0x14, 0xd1, 0xb6, 0x67, 0x49, 0x68, 0x95, 0x6c, 0xee, 0x33, 0xe6, 0x68, 0xfe, + 0xc9, 0xac, 0x08, 0x8c, 0xb5, 0x78, 0xe5, 0x12, 0x3a, 0xa8, 0x45, 0x61, 0xe0, 0xcc, 0xee, 0x6b, + 0xfd, 0x37, 0x84, 0x87, 0x9f, 0x9d, 0xe3, 0x4e, 0xd1, 0x35, 0x73, 0x48, 0xf5, 0x6d, 0xc9, 0x17, + 0x3d, 0x8d, 0x94, 0x0b, 0xdc, 0x67, 0xa9, 0xc9, 0xf1, 0x00, 0x56, 0xd3, 0xe2, 0x8d, 0xdf, 0x39, + 0xea, 0x4a, 0xea, 0x1c, 0x27, 0xb0, 0xa4, 0x8a, 0xc4, 0x23, 0x6e, 0xb0, 0x24, 0x07, 0x75, 0x4f, + 0x57, 0x54, 0x33, 0x9d, 0xd1, 0xfb, 0xba, 0xf0, 0x64, 0x14, 0xce, 0xe4, 0x5b, 0x43, 0x06, 0xae, + 0xc9, 0xc6, 0x8c, 0x29, 0x65, 0x03, 0xef, 0x73, 0x4e, 0xfe, 0x47, 0x42, 0x3b, 0x39, 0xc7, 0xd2, + 0xb3, 0x90, 0x06, 0x00, 0x8d, 0x0a, 0xcd, 0xe8, 0x54, 0xcd, 0x64, 0x25, 0x75, 0x27, 0xca, 0x13, + 0xd0, 0x8b, 0x9f, 0xd1, 0xf6, 0x2e, 0x06, 0xe2, 0xfc, 0xe6, 0xc0, 0x5f, 0xec, 0x8d, 0x2d, 0x89, + 0xde, 0x03, 0x07, 0x4e, 0x98, 0xbd, 0x92, 0x01, 0x09, 0xc3, 0x08, 0x43, 0x58, 0xd2, 0xa1, 0xf2, + 0xac, 0x78, 0x65, 0x5a, 0xcc, 0x1a, 0xe5, 0x7d, 0xb5, 0x82, 0x58, 0x9b, 0xe8, 0x5f, 0x85, 0xd8, + 0x44, 0x46, 0x7a, 0x24, 0xa8, 0x61, 0xb6, 0x02, 0x7e, 0xba, 0xdf, 0xe9, 0x18, 0x8c, 0xec, 0x2f, + 0x12, 0xeb, 0xff, 0x33, 0xd4, 0xcc, 0xb3, 0xf3, 0xe2, 0x0f, 0x33, 0xf3, 0xce, 0x23, 0x96, 0x65, + 0x36, 0xcf, 0xa0, 0x7b, 0xa9, 0x92, 0x86, 0xa4, 0x4f, 0xa9, 0x76, 0x3b, 0x9d, 0x64, 0x0d, 0x25, + 0xb9, 0x65, 0xce, 0xb9, 0x40, 0x22, 0x8f, 0x9e, 0x19, 0xc4, 0x7d, 0x5b, 0x94, 0x29, 0x6c, 0x27, + 0x6d, 0x8b, 0xaf, 0xd5, 0xf7, 0x23, 0xa8, 0x02, 0xef, 0xe0, 0xe2, 0x5e, 0xfc, 0x5f, 0xb2, 0x35, + 0xb4, 0x80, 0x27, 0x05, 0xbe, 0x78, 0x61, 0x5d, 0xcc, 0x5b, 0xd2, 0x5a, 0x70, 0xfa, 0x80, 0x96, + 0x90, 0x8f, 0x75, 0x4d, 0x20, 0x04, 0x90, 0xd5, 0x85, 0x6a, 0xc2, 0xe2, 0x38, 0xab, 0x4b, 0x73, + 0x0e, 0x34, 0xf0, 0x77, 0x8c, 0x43, 0xcf, 0x2c, 0xd1, 0x60, 0x9c, 0x5f, 0x2b, 0x3c, 0xb9, 0x4e, + 0x92, 0xef, 0x05, 0xf0, 0x98, 0xd5, 0x04, 0x2c, 0x7f, 0xa9, 0x1d, 0xbb, 0xf3, 0x9b, 0xdd, 0xc2, + 0x66, 0xe1, 0xd6, 0x1d, 0xc6, 0x5f, 0xb1, 0x6a, 0x1d, 0x1c, 0x5f, 0x02, 0x83, 0x5e, 0x70, 0x4a, + 0x5b, 0xe8, 0xa4, 0x86, 0xea, 0x7c, 0xa5, 0x3d, 0xdc, 0xeb, 0xe0, 0x02, 0xe9, 0xe0, 0x17, 0x81, }; #endif // defined(BINDATA_INCLUDE_DATA) diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwDebugSigned_GB100.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwDebugSigned_GB100.c index ca032901c0..0cafd59d81 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwDebugSigned_GB100.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwDebugSigned_GB100.c @@ -34,12144 +34,12192 @@ // VAR NAME: N/A // COMPRESSION: NO // COMPLEX_STRUCT: NO -// DATA SIZE (bytes): 196680 +// DATA SIZE (bytes): 197448 // COMPRESSED SIZE (bytes): N/A // static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwDebugSigned_GB100_ucode_image_data[] = { - 0x03, 0x04, 0x48, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4f, 0x02, 0x00, + 0x03, 0x04, 0x48, 0x00, 0x00, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x52, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x79, 0x48, 0x26, 0x2b, 0x64, 0xbd, 0xb9, 0x95, - 0xaa, 0xdf, 0xd0, 0x50, 0x88, 0xed, 0xaa, 0xdf, 0x84, 0x24, 0x30, 0x61, 0xe3, 0x7f, 0x79, 0x98, - 0x3d, 0xe3, 0xa8, 0xc2, 0xbe, 0xa2, 0x78, 0xce, 0x12, 0xb3, 0x6d, 0x14, 0x8c, 0xa0, 0xf6, 0x7d, - 0xde, 0xbf, 0x63, 0x95, 0x93, 0xca, 0xea, 0x8f, 0x57, 0xf6, 0x62, 0x6e, 0x93, 0x1b, 0x79, 0x4a, - 0x4c, 0x58, 0x71, 0x6c, 0xea, 0x96, 0xf8, 0x89, 0xe1, 0x15, 0x64, 0x28, 0xef, 0x20, 0xf7, 0x43, - 0x18, 0x58, 0x92, 0x0f, 0x67, 0x65, 0xed, 0x2d, 0x63, 0x31, 0x83, 0xb2, 0x47, 0x6a, 0xa6, 0xe8, - 0x7e, 0x66, 0x20, 0x42, 0x3e, 0xac, 0xc5, 0xac, 0x0d, 0x24, 0xc2, 0xff, 0x24, 0xb0, 0x47, 0xd4, - 0x86, 0x61, 0xde, 0xe9, 0xfd, 0x23, 0xd7, 0xa1, 0xaa, 0xf1, 0x2c, 0xa6, 0x23, 0x25, 0xce, 0x4b, - 0x4d, 0xc3, 0x87, 0x5a, 0x2a, 0xdd, 0x2d, 0x59, 0x1c, 0x6d, 0xa5, 0xb6, 0xac, 0x4f, 0xa3, 0xc3, - 0xd1, 0xe6, 0x23, 0x7a, 0x53, 0x6a, 0xe5, 0x40, 0x7b, 0xb9, 0x74, 0xf5, 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0x8f, 0xd2, 0x5f, 0x7f, 0x35, 0x89, 0x41, 0x70, 0xa2, 0x25, + 0xe0, 0x3f, 0x05, 0x3b, 0xd9, 0x04, 0x6e, 0x08, 0x81, 0xc1, 0x97, 0x9b, 0x9d, 0x1c, 0xd0, 0x6c, + 0xf0, 0x45, 0x49, 0xd8, 0x29, 0xa7, 0x21, 0x0c, 0xa1, 0x99, 0x62, 0x42, 0xf6, 0x3b, 0xf9, 0x86, + 0x8d, 0x9a, 0xa0, 0x4f, 0x2a, 0x92, 0x7b, 0x81, 0xde, 0xed, 0xbe, 0xee, 0xc8, 0x61, 0x31, 0x25, + 0x3d, 0x59, 0x45, 0x4e, 0x63, 0xa2, 0x63, 0x6c, 0x22, 0x98, 0xb5, 0x36, 0x6a, 0x28, 0x83, 0x52, + 0xef, 0xac, 0xfa, 0x59, 0x61, 0xab, 0x9b, 0xbb, 0x13, 0x92, 0x19, 0xa6, 0x5a, 0x5e, 0x70, 0x71, + 0x99, 0x14, 0xd6, 0x2d, 0x9f, 0xb4, 0x72, 0x0e, 0xe4, 0x76, 0xac, 0x89, 0x69, 0x7d, 0xe3, 0x39, + 0x70, 0x85, 0x94, 0x54, 0x1b, 0x7a, 0x75, 0x73, 0x82, 0x06, 0xed, 0x76, 0xa6, 0xed, 0xe4, 0xd1, + 0x77, 0x15, 0xc5, 0x77, 0x38, 0xbd, 0x8e, 0x85, 0xd2, 0x24, 0xdb, 0x9f, 0x10, 0x95, 0x58, 0xb2, + 0x7b, 0x6b, 0x9b, 0x32, 0x62, 0x5e, 0xb3, 0xb1, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -12341,8 +12389,8 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmFmcGfwDebugSigned_GB100_ucode_image_stora #if defined(BINDATA_INCLUDE_STORAGE_PVT_DEFN) { - 196680, // uncompressed data size (bytes) - 196680, // compressed data size (bytes) + 197448, // uncompressed data size (bytes) + 197448, // compressed data size (bytes) kgspBinArchiveGspRmFmcGfwDebugSigned_GB100_ucode_image_data, // compressed data pointer NV_FALSE, // is pData compressed? NV_TRUE, // contain information for file overriding? @@ -12364,9 +12412,9 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmFmcGfwDebugSigned_GB100_ucode_image_stora // static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwDebugSigned_GB100_ucode_hash_data[] = { - 0xa7, 0xb7, 0x2c, 0x0e, 0xf1, 0x71, 0xa0, 0xa0, 0x77, 0x0d, 0x6e, 0xb3, 0x78, 0x61, 0xa3, 0x93, - 0x4f, 0x12, 0x7a, 0x5e, 0x40, 0x69, 0x96, 0x43, 0x2f, 0x92, 0xca, 0x86, 0xcd, 0xad, 0xc3, 0xb8, - 0x07, 0xad, 0xac, 0x79, 0x6b, 0x5c, 0xa5, 0xf1, 0xf1, 0x61, 0xc9, 0xa3, 0xd6, 0xdd, 0x46, 0x0f, + 0xfd, 0x98, 0x19, 0xb2, 0xc5, 0xea, 0xba, 0x99, 0xe8, 0x1c, 0xce, 0x8e, 0xd3, 0x9b, 0x94, 0x04, + 0x62, 0x64, 0xb8, 0xb6, 0x18, 0x7f, 0x73, 0x73, 0x4a, 0x51, 0x69, 0xfb, 0x4d, 0x79, 0x9a, 0x76, + 0x80, 0x7e, 0x44, 0x6d, 0x8f, 0x6a, 0xfe, 0xab, 0xde, 0x28, 0x90, 0xb9, 0x02, 0x79, 0xb6, 0xb5, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -12399,12 +12447,12 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmFmcGfwDebugSigned_GB100_ucode_hash_storag // static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwDebugSigned_GB100_ucode_sig_data[] = { - 0x7d, 0xc8, 0x68, 0x1e, 0xbf, 0x3c, 0x12, 0xf7, 0x73, 0x4b, 0x37, 0x97, 0x29, 0x96, 0x0c, 0xe8, - 0xa9, 0xb6, 0x61, 0x2d, 0xa7, 0x6f, 0x75, 0xa2, 0xee, 0xd1, 0xd3, 0xd4, 0xc1, 0x7a, 0x00, 0xdf, - 0x2e, 0xf1, 0x2c, 0x96, 0xf1, 0x3b, 0x21, 0x6c, 0x1c, 0xa3, 0xb2, 0x27, 0xd6, 0x01, 0xd7, 0x9e, - 0x8c, 0x0d, 0x72, 0xd7, 0xe5, 0x88, 0x4f, 0x18, 0x30, 0xd4, 0xd9, 0x88, 0x33, 0xbc, 0x59, 0x11, - 0xf9, 0x7c, 0xfd, 0x72, 0x63, 0xbb, 0x4e, 0x23, 0xd3, 0x2c, 0xc9, 0x0c, 0x90, 0x9c, 0xae, 0xa8, - 0x16, 0x11, 0x03, 0x94, 0x25, 0x5e, 0x4a, 0xbf, 0x79, 0xf3, 0x62, 0x66, 0xa3, 0xd0, 0x91, 0xb1, + 0x30, 0x66, 0x0d, 0x8f, 0xcd, 0xef, 0x94, 0x42, 0xce, 0xee, 0x31, 0xad, 0x49, 0xf9, 0xc4, 0x9d, + 0x18, 0x35, 0xbd, 0x76, 0x94, 0xab, 0xfc, 0xf0, 0x30, 0x8d, 0xc8, 0xb1, 0x42, 0xfd, 0xf0, 0xca, + 0xe9, 0x8f, 0x8c, 0x12, 0x22, 0x5e, 0x9d, 0x53, 0x24, 0x18, 0xb9, 0x8d, 0x04, 0xad, 0x12, 0xbf, + 0x69, 0x3b, 0x30, 0xeb, 0x77, 0x38, 0xd2, 0x1f, 0xef, 0x0f, 0x05, 0xda, 0x01, 0x5d, 0x19, 0xd7, + 0xff, 0x17, 0x49, 0x44, 0xd9, 0xe5, 0xf5, 0x7d, 0xbf, 0x96, 0x57, 0xc6, 0xaa, 0x80, 0x0d, 0x0d, + 0xc3, 0xf5, 0x42, 0xce, 0xa0, 0xe2, 0x9c, 0x63, 0x3b, 0x6f, 0x5f, 0x80, 0x24, 0x81, 0xfd, 0x57, }; #endif // defined(BINDATA_INCLUDE_DATA) diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwDebugSigned_GH100.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwDebugSigned_GH100.c index 00f791cc7f..f2a782f780 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwDebugSigned_GH100.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwDebugSigned_GH100.c @@ -43,10183 +43,10183 @@ static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwDebugSigned_GH100_ucode_image 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe8, 0x41, 0xa1, 0xd3, 0x51, 0x7d, 0x58, 0x50, - 0xde, 0xfd, 0xdd, 0xd1, 0x8c, 0x80, 0x46, 0x14, 0x9e, 0xa1, 0x7d, 0xce, 0x1e, 0xcb, 0xf8, 0x51, - 0x5f, 0x43, 0x07, 0xfd, 0x8a, 0xae, 0x47, 0x11, 0xad, 0x60, 0xf5, 0x7e, 0xe9, 0x6d, 0x5c, 0x39, - 0xfd, 0x31, 0xe8, 0xff, 0xfb, 0x28, 0x01, 0xba, 0xd5, 0x3c, 0x43, 0x4d, 0x83, 0xd5, 0xac, 0x30, - 0x46, 0xac, 0x91, 0x12, 0xbf, 0x56, 0x39, 0x32, 0xcf, 0xcc, 0xc7, 0xee, 0x21, 0x0f, 0xc9, 0x2e, - 0x17, 0x9c, 0x07, 0x2d, 0xf7, 0x10, 0x53, 0x67, 0x80, 0xe0, 0xc5, 0x7e, 0x55, 0xb3, 0xd4, 0xf6, - 0xe8, 0x00, 0x8b, 0x76, 0x70, 0x09, 0xb6, 0x98, 0x72, 0x10, 0xd4, 0xa7, 0x2f, 0x54, 0x8f, 0x34, - 0x60, 0xf2, 0xe5, 0xea, 0x4e, 0x31, 0xa2, 0xed, 0x62, 0x71, 0xac, 0xe2, 0x5b, 0x14, 0xc5, 0xd9, - 0xa7, 0xfb, 0xc9, 0x68, 0x06, 0xaf, 0xff, 0xce, 0x4e, 0x58, 0xd2, 0x9f, 0xf2, 0xf8, 0x33, 0xa9, - 0xa5, 0x3c, 0x61, 0x45, 0xdc, 0x28, 0x9a, 0x9b, 0x44, 0x80, 0x41, 0x82, 0x81, 0x39, 0xf6, 0xfd, - 0x2b, 0xcd, 0x53, 0x0b, 0x92, 0x2b, 0xda, 0x15, 0x8c, 0x6a, 0x5d, 0xb4, 0x84, 0x9c, 0x9d, 0x81, - 0xb5, 0x94, 0x3b, 0x30, 0x46, 0xe6, 0x22, 0xc0, 0x96, 0x2f, 0x7f, 0x06, 0x87, 0xcc, 0xf2, 0xce, - 0x5d, 0x63, 0x86, 0xca, 0xa8, 0x63, 0xb1, 0x23, 0xe2, 0x4e, 0x0d, 0x41, 0x1b, 0xcd, 0x18, 0x4f, - 0x49, 0x7d, 0xfa, 0x47, 0xb4, 0xba, 0xb9, 0x40, 0x44, 0x6a, 0x0d, 0xb4, 0x69, 0xcd, 0xb5, 0xf7, - 0xf4, 0xf2, 0x54, 0xdb, 0x4b, 0x27, 0x18, 0x67, 0xca, 0x2f, 0x40, 0x83, 0x60, 0xdf, 0xa7, 0x62, - 0xe3, 0x70, 0xc7, 0xa7, 0x2b, 0x72, 0x2c, 0x7c, 0xe9, 0xae, 0x36, 0x60, 0x75, 0xf2, 0x86, 0xfb, - 0xd7, 0xd5, 0xe6, 0xdb, 0x60, 0x58, 0x76, 0xec, 0x28, 0xa3, 0x8c, 0x97, 0xc8, 0x9a, 0xcc, 0xe9, - 0xe4, 0x97, 0x18, 0x35, 0x80, 0xed, 0x69, 0xf9, 0x58, 0x73, 0x1e, 0xd2, 0x7a, 0xb0, 0xc2, 0xed, - 0xa1, 0x21, 0xab, 0x3a, 0x5f, 0xdb, 0xf5, 0x2f, 0x61, 0x99, 0x11, 0xa6, 0x9d, 0x17, 0x57, 0x57, - 0xd2, 0x8c, 0xb4, 0x4d, 0x89, 0xd6, 0x45, 0x6d, 0xe7, 0x9b, 0x02, 0xf7, 0xed, 0x81, 0xa4, 0x76, - 0x8c, 0xd6, 0xcb, 0x6f, 0x70, 0x04, 0xde, 0xf7, 0xe0, 0x31, 0x19, 0xc5, 0x63, 0x8b, 0x31, 0x23, - 0xe6, 0xba, 0x86, 0x4e, 0xdd, 0x5f, 0xdb, 0xcb, 0x81, 0x66, 0x03, 0xde, 0x48, 0x50, 0x3c, 0xdc, - 0xee, 0xa6, 0x56, 0xee, 0x48, 0xd4, 0x4f, 0x2b, 0xb8, 0x00, 0x7e, 0x25, 0xf5, 0x01, 0x26, 0x77, - 0x29, 0x67, 0xeb, 0xe8, 0x4c, 0x6b, 0x5b, 0xb9, 0x42, 0x5c, 0x86, 0x2d, 0xbb, 0xb4, 0x9e, 0xcc, - 0xaa, 0xfe, 0x20, 0x29, 0x69, 0x3a, 0x02, 0x6e, 0xfc, 0x57, 0x1d, 0x23, 0x45, 0x71, 0xc2, 0x3a, - 0x59, 0x52, 0xe1, 0x84, 0x38, 0x10, 0x9d, 0x22, 0x85, 0x83, 0x97, 0xdb, 0x97, 0xc6, 0xd6, 0xfc, - 0x81, 0xa9, 0x3a, 0x84, 0x2b, 0xba, 0xa1, 0x60, 0xec, 0xc5, 0x83, 0x2a, 0x6e, 0x1e, 0x95, 0x0d, - 0x9d, 0x43, 0x77, 0x93, 0x25, 0x19, 0xca, 0xc6, 0x70, 0x71, 0x00, 0x2d, 0x7b, 0x7c, 0x13, 0x1a, - 0xed, 0xca, 0xc0, 0x6f, 0xde, 0xf3, 0x44, 0x28, 0x8f, 0x82, 0x03, 0x56, 0x0f, 0x27, 0x7b, 0x20, - 0x33, 0x82, 0x55, 0xbc, 0x46, 0x1c, 0xc3, 0x46, 0xbf, 0x8c, 0x43, 0x3b, 0xa2, 0x98, 0xe6, 0xf6, - 0x65, 0x1d, 0xe3, 0x44, 0xfb, 0x38, 0xcf, 0x67, 0x03, 0xed, 0xe4, 0xef, 0x5e, 0xc2, 0x1c, 0x93, - 0x12, 0x94, 0x05, 0x9a, 0x1b, 0x57, 0x5b, 0x1c, 0x3c, 0xfc, 0xb8, 0x8e, 0x31, 0xf9, 0x27, 0xa2, - 0x38, 0x81, 0x38, 0x9c, 0xbb, 0xba, 0x45, 0xe2, 0x92, 0x08, 0xd3, 0x40, 0xe1, 0x71, 0x1b, 0xfc, - 0xa9, 0xb9, 0x66, 0x4f, 0x18, 0x81, 0x62, 0xe4, 0xca, 0xf9, 0xf9, 0x59, 0x1f, 0xd2, 0x2d, 0x58, - 0x5d, 0xfc, 0x73, 0x20, 0xc5, 0x7e, 0x1d, 0x86, 0x9d, 0x37, 0x82, 0x70, 0x1f, 0xd7, 0x53, 0x36, - 0x4f, 0x4a, 0xa6, 0x96, 0xcf, 0x44, 0x69, 0x9f, 0x12, 0x4f, 0xf9, 0xdf, 0x80, 0xf2, 0x38, 0x7e, - 0x5a, 0xbf, 0x72, 0xb8, 0xdd, 0x8d, 0x3c, 0x96, 0xf6, 0x8a, 0x03, 0x71, 0xb5, 0x26, 0xee, 0xbc, - 0x3a, 0x7e, 0xf5, 0x51, 0x4d, 0x62, 0x07, 0xaf, 0x5e, 0x15, 0x7f, 0x4d, 0x3a, 0x37, 0x04, 0xc3, - 0x21, 0x5c, 0xf8, 0x32, 0x3d, 0xcd, 0xf7, 0xef, 0x3c, 0x01, 0xd1, 0xe9, 0x7e, 0x93, 0x38, 0x1f, - 0x1f, 0x09, 0xe3, 0xa2, 0xa7, 0xbd, 0x49, 0x74, 0x97, 0xfd, 0x6d, 0xb5, 0x37, 0xb9, 0x80, 0xea, - 0xcc, 0xbf, 0xc9, 0xbe, 0x28, 0xda, 0x7c, 0x56, 0x81, 0xb2, 0x06, 0x9c, 0xad, 0x7e, 0xde, 0xf7, - 0x50, 0xd1, 0x7c, 0xd1, 0xb5, 0x6a, 0x21, 0x7a, 0x76, 0x65, 0x49, 0xbb, 0xf5, 0xc7, 0x17, 0x7e, - 0xd0, 0x90, 0x1e, 0xfb, 0xf6, 0x91, 0x99, 0x56, 0xad, 0x28, 0x0c, 0x9e, 0x04, 0x88, 0x78, 0x3a, - 0xda, 0xd2, 0x2f, 0x00, 0x70, 0xa9, 0x97, 0x44, 0xfb, 0xfa, 0xb2, 0xef, 0x16, 0xc0, 0x50, 0x9c, - 0x19, 0xd7, 0xbe, 0xcd, 0x4b, 0x24, 0x72, 0xdf, 0xf8, 0x70, 0x27, 0x41, 0x1b, 0x74, 0x08, 0xf0, - 0x7a, 0x94, 0xc2, 0xa8, 0x77, 0xc8, 0x0b, 0x3c, 0xea, 0xc5, 0x66, 0xd8, 0x21, 0x4f, 0x52, 0x60, - 0x51, 0x58, 0x96, 0x33, 0x7c, 0xcf, 0x15, 0x2a, 0x37, 0x05, 0x5c, 0xae, 0x8c, 0xa8, 0x43, 0xb6, - 0xfa, 0x4d, 0xd7, 0xaf, 0x5f, 0x5f, 0xaa, 0xc0, 0xbc, 0x78, 0x4a, 0x3b, 0xc4, 0x71, 0x2b, 0x12, - 0x66, 0xf6, 0x0f, 0x52, 0x44, 0xc6, 0x1b, 0x10, 0xf2, 0xa4, 0x05, 0xa3, 0x23, 0xe6, 0xe9, 0x1d, - 0xf3, 0x21, 0x46, 0x49, 0x10, 0x7c, 0x1d, 0xe0, 0x11, 0xb2, 0xce, 0xb5, 0x5e, 0x33, 0x8b, 0xfe, - 0x29, 0x35, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -10243,143 +10243,143 @@ static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwDebugSigned_GH100_ucode_image 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xfa, 0x48, 0xa7, 0x73, 0xc3, 0x81, 0x7e, - 0x43, 0x3d, 0xc2, 0x36, 0xb6, 0x2e, 0xef, 0x11, 0xa3, 0x44, 0x96, 0x7c, 0xff, 0x48, 0x0f, 0x68, - 0x37, 0x98, 0x52, 0xad, 0x75, 0xd2, 0xad, 0x90, 0x0a, 0x89, 0x8b, 0xb8, 0x37, 0xe5, 0x05, 0x5a, - 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0x74, 0xda, 0x7b, 0xaf, 0x3b, 0x92, 0x37, 0xa7, 0xe9, 0xa4, 0x7f, 0xef, 0x10, 0xca, 0x36, + 0x3d, 0xfa, 0x03, 0x58, 0xdc, 0x44, 0xcb, 0x44, 0x45, 0xdb, 0x5a, 0x5a, 0xa8, 0x0a, 0xd0, 0x41, + 0x47, 0x10, 0x5b, 0xb2, 0x75, 0xbe, 0x56, 0x0e, 0x1e, 0x27, 0xa9, 0x81, 0x8d, 0x7f, 0xdf, 0xd3, + 0x5b, 0x05, 0x50, 0xf5, 0x4e, 0x04, 0x3f, 0x24, 0x9c, 0x51, 0x36, 0x25, 0x9d, 0x8d, 0xd6, 0x2f, + 0x93, 0x5b, 0x67, 0x73, 0x78, 0x09, 0xc6, 0x54, 0x1f, 0x73, 0xb3, 0xa9, 0x77, 0x3d, 0x5c, 0x5b, + 0x2a, 0x71, 0x69, 0xfa, 0x2a, 0xf3, 0x20, 0x14, 0xf8, 0x74, 0xa0, 0x31, 0x29, 0x4a, 0xd5, 0x9b, + 0x64, 0x26, 0x90, 0x6b, 0xe4, 0xf8, 0x07, 0x18, 0x90, 0xd6, 0xfb, 0x2c, 0x6e, 0xa4, 0x4a, 0x9c, + 0x69, 0xd0, 0xfd, 0xe2, 0x55, 0xc9, 0xb6, 0xa1, 0x56, 0x99, 0xff, 0xbc, 0x0a, 0x9f, 0x08, 0xa0, + 0x16, 0xc7, 0xc2, 0xfb, 0x40, 0x97, 0x3e, 0xc0, 0xb3, 0x9c, 0x23, 0xca, 0x12, 0xc9, 0x9d, 0xe5, + 0x34, 0x73, 0xf3, 0xa4, 0xc2, 0xc6, 0x5c, 0x46, 0xc8, 0xdd, 0x77, 0x3a, 0x79, 0xe7, 0xf5, 0x73, + 0x4d, 0x10, 0x69, 0xee, 0x2b, 0x28, 0x76, 0x49, 0x52, 0xb7, 0xd3, 0xfc, 0x67, 0x6d, 0x72, 0xb8, + 0xae, 0x66, 0x6c, 0xb8, 0xb2, 0x70, 0x73, 0xa0, 0x29, 0xad, 0xae, 0xe0, 0xc0, 0x47, 0x22, 0xaf, + 0x31, 0x11, 0xe6, 0x90, 0x61, 0x17, 0x42, 0xe1, 0xf4, 0x10, 0x94, 0xf5, 0xc5, 0x7e, 0x5b, 0x26, + 0x52, 0xa5, 0xd9, 0xf4, 0x10, 0xe4, 0x37, 0xe5, 0x2c, 0xe0, 0x63, 0x17, 0x10, 0x09, 0x1c, 0x07, + 0xa5, 0xe2, 0x89, 0xb9, 0x15, 0x6b, 0x06, 0x74, 0x4a, 0xef, 0x71, 0xf5, 0x4a, 0xc5, 0x7a, 0x1b, + 0x1e, 0xc4, 0xbc, 0xd5, 0x9c, 0x68, 0x47, 0xcc, 0x78, 0xde, 0x2f, 0xce, 0x25, 0x74, 0xec, 0x0a, + 0x8b, 0x65, 0x96, 0x29, 0x84, 0x11, 0x67, 0xa8, 0x3f, 0x4f, 0xb3, 0x90, 0x2b, 0x9e, 0x5e, 0xd5, + 0xda, 0xd2, 0xc7, 0xdc, 0xb7, 0x35, 0xb6, 0x36, 0xdd, 0x37, 0x7d, 0xd9, 0xfb, 0x29, 0x3f, 0x6e, + 0x9f, 0xf5, 0xf5, 0xbd, 0xc3, 0xf7, 0xee, 0xb9, 0x30, 0x92, 0xdf, 0xc6, 0x5c, 0x31, 0x78, 0x44, + 0x04, 0xee, 0xe3, 0x1a, 0xdc, 0x97, 0x73, 0x3b, 0xa4, 0x7b, 0x30, 0x4c, 0xc2, 0x4b, 0x15, 0xab, + 0xc2, 0xe3, 0xbc, 0x2e, 0x37, 0xbd, 0x0e, 0x0a, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -10412,9 +10412,9 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmFmcGfwDebugSigned_GH100_ucode_image_stora // static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwDebugSigned_GH100_ucode_hash_data[] = { - 0xe5, 0xf7, 0xf0, 0x03, 0xde, 0x70, 0xd7, 0x0e, 0x82, 0x5a, 0x32, 0xac, 0x90, 0x22, 0x7a, 0x9e, - 0xef, 0x25, 0xaa, 0x70, 0xfe, 0xf8, 0x37, 0xba, 0x30, 0x0c, 0x25, 0x4f, 0x71, 0xb9, 0xd0, 0x0e, - 0x1e, 0xf4, 0xe2, 0x12, 0xa9, 0xb6, 0x43, 0x4f, 0xb2, 0xda, 0x89, 0xbd, 0xd1, 0x6b, 0x68, 0xae, + 0x97, 0x63, 0x9b, 0xe1, 0x01, 0xdf, 0x9a, 0xdc, 0xf0, 0xa3, 0x52, 0xd3, 0xb7, 0x79, 0xe3, 0xbc, + 0x29, 0x1c, 0x33, 0xeb, 0x93, 0x7a, 0x86, 0x05, 0xe6, 0x2b, 0x7a, 0x1f, 0xe6, 0x35, 0x71, 0x0d, + 0xba, 0x81, 0xdb, 0x38, 0x4a, 0x12, 0x4b, 0xba, 0xc0, 0x78, 0x1d, 0x90, 0xe3, 0x2a, 0x53, 0x1a, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -10447,30 +10447,30 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmFmcGfwDebugSigned_GH100_ucode_hash_storag // static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwDebugSigned_GH100_ucode_sig_data[] = { - 0xa7, 0xbe, 0xf7, 0xf5, 0x37, 0x3d, 0x05, 0xc8, 0x65, 0xab, 0xf7, 0x16, 0x3a, 0x3e, 0xd6, 0x7e, - 0xf8, 0x2a, 0xb2, 0xf9, 0x8f, 0xcc, 0xe1, 0x16, 0xa1, 0x5d, 0x92, 0x95, 0x13, 0xa4, 0xe0, 0xb8, - 0x82, 0x0c, 0x27, 0x4c, 0xf9, 0x51, 0x41, 0x00, 0x56, 0x3e, 0xb0, 0x1e, 0x37, 0xa9, 0x2d, 0x27, - 0xff, 0xec, 0xd2, 0xb9, 0xd1, 0x6f, 0xf5, 0xa5, 0xe7, 0x93, 0x0a, 0x54, 0x9f, 0xf3, 0x8b, 0x3d, - 0x28, 0xac, 0x54, 0x3c, 0x80, 0xe5, 0x01, 0xc5, 0x9c, 0x55, 0x84, 0x54, 0x0b, 0xad, 0xdb, 0x1f, - 0xa8, 0x94, 0xcc, 0xec, 0x83, 0x6d, 0x1e, 0x50, 0xc4, 0xc5, 0x57, 0x11, 0x7b, 0xbe, 0x7e, 0xe7, - 0x93, 0xee, 0x20, 0x9b, 0x63, 0x70, 0x24, 0xaf, 0xac, 0x65, 0x74, 0x10, 0x9f, 0x27, 0xca, 0x97, - 0x0f, 0xb6, 0xb8, 0xcd, 0x63, 0x94, 0xbd, 0x5f, 0x9f, 0xaa, 0xa4, 0x0e, 0xc9, 0xbb, 0x04, 0xc5, - 0x16, 0xb1, 0x55, 0x6a, 0x03, 0xfc, 0x33, 0x5b, 0x13, 0x98, 0x75, 0xed, 0x96, 0xc9, 0x51, 0xf9, - 0xd6, 0xf7, 0xd6, 0xc8, 0x8e, 0x67, 0x2d, 0x16, 0x42, 0x8f, 0xa4, 0xc2, 0x09, 0xe4, 0x1b, 0x3f, - 0xa4, 0xd2, 0xed, 0x0d, 0x91, 0x08, 0x42, 0xe5, 0x64, 0xdf, 0xb6, 0xc6, 0x1f, 0xef, 0x2c, 0xf1, - 0x57, 0x76, 0xdc, 0x69, 0xf1, 0x60, 0xbd, 0x43, 0x2a, 0x1d, 0x3d, 0x71, 0x7d, 0x9d, 0x5e, 0x51, - 0x81, 0x0c, 0x16, 0x51, 0x99, 0xf7, 0x43, 0x83, 0x94, 0x00, 0xec, 0x27, 0xa7, 0xd9, 0xcb, 0xee, - 0xf4, 0x78, 0x5d, 0x9a, 0xca, 0x41, 0x37, 0x5d, 0x1c, 0x92, 0xd2, 0x9c, 0x1f, 0x75, 0xbf, 0x2e, - 0x05, 0x71, 0xd8, 0x5b, 0x54, 0xa4, 0x10, 0x03, 0xee, 0xbf, 0x6c, 0xca, 0x5a, 0x47, 0xfd, 0x2b, - 0x7a, 0x7d, 0xbb, 0x03, 0xaf, 0x10, 0xee, 0xd1, 0x58, 0x03, 0x05, 0x05, 0xe1, 0xed, 0xd8, 0x4e, - 0xef, 0x1d, 0xb6, 0x40, 0xf7, 0xb0, 0x04, 0x03, 0x1f, 0xd5, 0xff, 0x26, 0x9d, 0x47, 0x2f, 0x71, - 0x8c, 0x4e, 0x05, 0x27, 0x56, 0x79, 0x74, 0x7b, 0xc0, 0xb8, 0xde, 0xc9, 0xd3, 0x54, 0xc1, 0xbf, - 0x2b, 0x7c, 0xe7, 0xd9, 0x18, 0xf4, 0x28, 0x8f, 0xd4, 0x87, 0x16, 0x05, 0x2e, 0x83, 0x40, 0xf6, - 0x54, 0xe0, 0x6e, 0x27, 0x5c, 0x39, 0xa7, 0x0b, 0x21, 0x65, 0x30, 0xf8, 0x74, 0x9a, 0x6f, 0x64, - 0xf6, 0x51, 0xa4, 0xa8, 0xe8, 0xb2, 0xbb, 0x9f, 0xef, 0x4d, 0x84, 0x11, 0x6c, 0x84, 0x47, 0x81, - 0x08, 0x5b, 0x4a, 0xe4, 0x0c, 0x2c, 0x46, 0x28, 0x29, 0x96, 0x02, 0xef, 0xc9, 0x29, 0xd1, 0x08, - 0x22, 0x2a, 0x6d, 0x59, 0x18, 0xea, 0xfe, 0xd0, 0x4a, 0xe9, 0x73, 0x35, 0x7c, 0xa0, 0x29, 0xd3, - 0xdf, 0x4f, 0x52, 0x2a, 0x4c, 0xa8, 0x38, 0xbf, 0xd0, 0x9e, 0x1d, 0xce, 0xaf, 0x5c, 0x8e, 0xe7, + 0x52, 0xf3, 0x36, 0x23, 0xbc, 0xf6, 0x74, 0x57, 0x48, 0x80, 0xa6, 0xd8, 0x32, 0xaa, 0x44, 0x34, + 0xf8, 0xc0, 0x73, 0x73, 0x51, 0x76, 0xbe, 0xf2, 0x31, 0x26, 0xc8, 0x90, 0x1c, 0xb9, 0x4a, 0x3f, + 0xbe, 0x56, 0x04, 0x31, 0x29, 0xbb, 0x66, 0x67, 0x1d, 0x9b, 0x91, 0x05, 0x73, 0x8c, 0x4c, 0x6f, + 0xf1, 0x48, 0xa1, 0x36, 0xc3, 0x64, 0x36, 0x7c, 0x5d, 0xe1, 0x49, 0x0f, 0x13, 0x41, 0xf9, 0x87, + 0x79, 0x4a, 0x7d, 0xf7, 0xef, 0x73, 0x28, 0xdf, 0xce, 0x0e, 0x38, 0xb8, 0xe3, 0xb1, 0xef, 0xe1, + 0x3f, 0xec, 0x80, 0x82, 0x64, 0x6b, 0xea, 0xb4, 0xa1, 0xdb, 0xfb, 0x7e, 0x2e, 0x1e, 0x6e, 0x22, + 0x99, 0x3e, 0xf9, 0xfb, 0x8c, 0x7b, 0x9c, 0x85, 0x43, 0x39, 0xc1, 0xb7, 0xfd, 0x48, 0x6c, 0x1f, + 0x45, 0xc9, 0x00, 0x6d, 0x4f, 0x4f, 0x56, 0x85, 0xf1, 0x77, 0x9a, 0x04, 0xb9, 0x91, 0x13, 0x63, + 0x4c, 0x5c, 0x80, 0x0d, 0x02, 0xee, 0x13, 0xd6, 0x74, 0xf8, 0x9d, 0x77, 0x8e, 0x3d, 0x6b, 0xd1, + 0xf9, 0x7f, 0x8c, 0x1a, 0x80, 0x82, 0x42, 0xd9, 0xb1, 0xf7, 0xd0, 0xd6, 0x3c, 0x13, 0xc1, 0x77, + 0x0f, 0x57, 0x72, 0x06, 0x47, 0xb8, 0xbe, 0xe3, 0x6a, 0xaa, 0xce, 0x73, 0x16, 0xc1, 0x08, 0x5c, + 0xb5, 0x7d, 0x71, 0x70, 0xbf, 0x40, 0x6e, 0x79, 0xea, 0x55, 0xd9, 0xe4, 0x9d, 0x6f, 0x5c, 0xf2, + 0xdb, 0x5f, 0x21, 0x8d, 0xc1, 0x8d, 0x9e, 0x18, 0x17, 0xa3, 0x2d, 0xdc, 0x4c, 0xfb, 0xcc, 0x83, + 0xa9, 0xa7, 0x43, 0xdb, 0x29, 0xca, 0xd3, 0x8c, 0xfd, 0xa6, 0xb7, 0xe6, 0x91, 0xfa, 0x14, 0xf9, + 0x4c, 0x89, 0xef, 0x68, 0x8f, 0x94, 0x55, 0x1e, 0xad, 0x85, 0x7c, 0x19, 0xf9, 0xdd, 0x9c, 0x28, + 0xf9, 0x06, 0x2e, 0x11, 0x59, 0xf6, 0x06, 0x13, 0xd9, 0x4d, 0x2d, 0x96, 0x9f, 0xca, 0x36, 0x76, + 0xf2, 0x56, 0xe6, 0x0c, 0x1f, 0x9f, 0xac, 0x90, 0x34, 0x06, 0x66, 0x4d, 0xf7, 0xb4, 0xc4, 0xcb, + 0xe5, 0xf8, 0x14, 0xbf, 0x30, 0x33, 0xcf, 0xbd, 0x1a, 0x36, 0x89, 0x68, 0xc3, 0x1b, 0x17, 0x94, + 0x56, 0x28, 0x89, 0xa7, 0xe8, 0xe4, 0x5e, 0x4c, 0xb9, 0x7f, 0x09, 0x88, 0x51, 0x53, 0x50, 0x9e, + 0xde, 0xf3, 0x39, 0x7b, 0xfa, 0x8f, 0x73, 0x3d, 0xed, 0x65, 0x36, 0x38, 0xd5, 0xda, 0x23, 0x7b, + 0x5f, 0x4b, 0xac, 0x4f, 0x85, 0x10, 0xdb, 0xfd, 0xca, 0x8f, 0xe3, 0x50, 0x2a, 0x7e, 0x9c, 0xce, + 0x4e, 0x12, 0x2f, 0x5d, 0x5b, 0x06, 0xa0, 0x6b, 0x27, 0x84, 0x6d, 0x5d, 0x16, 0xb6, 0xe0, 0xb4, + 0x4d, 0xa5, 0x20, 0xb2, 0x20, 0x0f, 0x2d, 0xed, 0xff, 0x3d, 0x69, 0x4b, 0xa8, 0x73, 0x38, 0xb4, + 0xfb, 0xfb, 0x92, 0xf4, 0x8a, 0x87, 0xe4, 0x59, 0xa5, 0x8e, 0x4a, 0x23, 0xf2, 0xf9, 0x71, 0x83, }; #endif // defined(BINDATA_INCLUDE_DATA) diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwProdSigned_GB100.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwProdSigned_GB100.c index 465118c81b..5b5798a880 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwProdSigned_GB100.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwProdSigned_GB100.c @@ -34,12256 +34,12352 @@ // VAR NAME: N/A // COMPRESSION: NO // COMPLEX_STRUCT: NO -// DATA SIZE (bytes): 195912 +// DATA SIZE (bytes): 197448 // COMPRESSED SIZE (bytes): N/A // static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwProdSigned_GB100_ucode_image_data[] = { - 0x03, 0x04, 0x48, 0x00, 0x00, 0xfd, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4d, 0x02, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0xa6, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x03, 0x04, 0x48, 0x00, 0x00, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x52, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1a, 0x98, 0x26, 0x7c, 0x2a, 0xbe, 0x92, 0xba, - 0x7d, 0x64, 0x17, 0xcd, 0xfb, 0x5a, 0x5c, 0xa7, 0x49, 0x00, 0xe7, 0x08, 0x1e, 0xa8, 0xcb, 0xc3, - 0xa9, 0x26, 0x77, 0x11, 0x80, 0x67, 0x80, 0x3c, 0xf8, 0x31, 0xf0, 0xc4, 0x52, 0xd0, 0x50, 0x46, - 0xf4, 0xfb, 0x50, 0x70, 0xab, 0x0b, 0x73, 0x8e, 0x93, 0xf6, 0x22, 0x2d, 0x20, 0x64, 0x65, 0x10, - 0xe9, 0xd8, 0xa0, 0xcc, 0x12, 0x4c, 0xdc, 0xa6, 0x09, 0x2c, 0x0b, 0x30, 0xb8, 0xfc, 0xea, 0xea, - 0x87, 0x0e, 0x00, 0xcd, 0x97, 0xe8, 0xb9, 0x58, 0x92, 0x35, 0xb8, 0xd1, 0xf4, 0x24, 0x5b, 0x56, - 0x8d, 0x40, 0x45, 0xd8, 0x1f, 0xcd, 0x90, 0xea, 0x0f, 0x0f, 0xe3, 0xa9, 0x56, 0x42, 0xfa, 0xe4, - 0xf7, 0xc1, 0x47, 0xfe, 0x01, 0xac, 0x66, 0x32, 0xc3, 0xc7, 0x51, 0x73, 0x42, 0xe2, 0x1f, 0xae, - 0xd8, 0x3a, 0xd0, 0xd4, 0xe4, 0xeb, 0x1b, 0xae, 0xf7, 0xfa, 0xb1, 0xfd, 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0x3b, 0xcb, 0x8d, 0x24, 0x8f, 0x08, 0xef, 0x01, 0x07, 0x86, + 0x94, 0xab, 0x80, 0xda, 0x02, 0xf5, 0xae, 0x59, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -12293,8 +12389,8 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmFmcGfwProdSigned_GB100_ucode_image_storag #if defined(BINDATA_INCLUDE_STORAGE_PVT_DEFN) { - 195912, // uncompressed data size (bytes) - 195912, // compressed data size (bytes) + 197448, // uncompressed data size (bytes) + 197448, // compressed data size (bytes) kgspBinArchiveGspRmFmcGfwProdSigned_GB100_ucode_image_data, // compressed data pointer NV_FALSE, // is pData compressed? NV_TRUE, // contain information for file overriding? @@ -12316,9 +12412,9 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmFmcGfwProdSigned_GB100_ucode_image_storag // static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwProdSigned_GB100_ucode_hash_data[] = { - 0x45, 0xec, 0xfc, 0xbb, 0xb9, 0x64, 0x1f, 0x27, 0xda, 0xe6, 0xc0, 0xda, 0xd1, 0xd4, 0x93, 0x3a, - 0x34, 0xb9, 0xaf, 0x8f, 0xb3, 0x3c, 0x0d, 0x6c, 0x31, 0xfd, 0xf6, 0xfb, 0x49, 0x42, 0x7d, 0x63, - 0x27, 0xb1, 0x70, 0x9e, 0x25, 0xea, 0xd8, 0x11, 0xc3, 0x19, 0x95, 0x07, 0xd1, 0x7e, 0x00, 0x9a, + 0xe9, 0xd1, 0x0d, 0x64, 0x20, 0x6b, 0x67, 0xdb, 0x5e, 0xd9, 0xd9, 0x9b, 0xc2, 0x1b, 0x7f, 0x21, + 0xdc, 0x4f, 0x92, 0xa5, 0x1b, 0xe4, 0x70, 0x0b, 0x5d, 0x2c, 0x4e, 0x5d, 0xb0, 0x63, 0x6c, 0x12, + 0x99, 0x26, 0xf3, 0x5b, 0xa1, 0x39, 0xd5, 0x11, 0x39, 0x42, 0x41, 0xa9, 0x20, 0xe4, 0x02, 0xa8, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -12351,12 +12447,12 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmFmcGfwProdSigned_GB100_ucode_hash_storage // static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwProdSigned_GB100_ucode_sig_data[] = { - 0xb1, 0x18, 0x5a, 0xc4, 0xfe, 0xaa, 0xfa, 0x0f, 0x90, 0x5e, 0x05, 0x1e, 0x72, 0x60, 0x39, 0x34, - 0x55, 0x9a, 0xf4, 0x13, 0xf6, 0xda, 0x82, 0x9e, 0x34, 0xd3, 0xa9, 0xbf, 0x33, 0xd2, 0xda, 0x21, - 0x98, 0xb8, 0x5b, 0x77, 0xf7, 0xaa, 0xaa, 0x18, 0x24, 0xed, 0x07, 0xd8, 0x1e, 0xef, 0xbf, 0x1c, - 0xe5, 0x4d, 0xa0, 0xae, 0x3a, 0x2c, 0xc7, 0x7a, 0x98, 0x58, 0x40, 0x42, 0x85, 0x63, 0xfc, 0x11, - 0x14, 0x87, 0xc4, 0xe9, 0x75, 0x3b, 0xd7, 0x6b, 0x57, 0xfd, 0x33, 0x2b, 0x8b, 0xda, 0xcb, 0xd3, - 0x85, 0xb2, 0x43, 0x18, 0x1f, 0x84, 0x5f, 0x52, 0x23, 0xb8, 0xea, 0x85, 0x9e, 0xa9, 0x71, 0xde, + 0xe9, 0x00, 0x6f, 0x51, 0x0a, 0x37, 0x17, 0x05, 0x8f, 0x42, 0x8f, 0xa8, 0xb7, 0x4b, 0xf6, 0x13, + 0x3c, 0x64, 0x26, 0xb2, 0x56, 0x40, 0xee, 0x99, 0x96, 0x44, 0x38, 0x29, 0xf4, 0xd4, 0xe0, 0x1e, + 0x14, 0x1a, 0xd2, 0x74, 0x94, 0xb4, 0x3e, 0x4d, 0x01, 0x0d, 0x82, 0x0f, 0xf3, 0xb9, 0x3a, 0x1a, + 0xf5, 0x40, 0xe3, 0xf1, 0xfe, 0xeb, 0x86, 0x37, 0x53, 0x97, 0x48, 0xfe, 0x69, 0x24, 0x84, 0xe3, + 0xec, 0x2c, 0x9b, 0x34, 0x47, 0xed, 0x83, 0xc4, 0xb1, 0x54, 0x76, 0xf5, 0xaf, 0x5d, 0xf2, 0x7c, + 0xa4, 0xe7, 0x86, 0x30, 0xd2, 0x70, 0xc6, 0x2a, 0x56, 0xc3, 0xb7, 0x4a, 0xda, 0xf6, 0xb5, 0xdd, }; #endif // defined(BINDATA_INCLUDE_DATA) diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwProdSigned_GH100.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwProdSigned_GH100.c index bfaeec3124..f76f7c4bd8 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwProdSigned_GH100.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwProdSigned_GH100.c @@ -43,10343 +43,10343 @@ static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwProdSigned_GH100_ucode_image_ 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x3f, 0xc9, 0xe1, 0xaa, 0xa9, 0xc0, 0x56, - 0x70, 0xa5, 0xad, 0xa1, 0x00, 0x60, 0x69, 0x81, 0x42, 0x71, 0x55, 0xdb, 0xe3, 0xfa, 0xc8, 0xae, - 0xbd, 0x6e, 0x16, 0x26, 0xb9, 0x35, 0xfe, 0xc7, 0xf7, 0xd0, 0x65, 0xc7, 0xca, 0x24, 0x44, 0x3b, - 0x37, 0x46, 0x2a, 0xd6, 0xa6, 0xf0, 0xef, 0x8e, 0x7b, 0x58, 0x0c, 0x1e, 0xc7, 0x68, 0xf9, 0xb2, - 0x7f, 0x96, 0xcf, 0x79, 0xf5, 0xdd, 0xcb, 0x37, 0x35, 0x72, 0x69, 0x25, 0x0f, 0x32, 0x49, 0xeb, - 0x9d, 0xff, 0xc4, 0xcc, 0x76, 0xdb, 0x72, 0xee, 0x45, 0x5d, 0x41, 0x22, 0xb9, 0x42, 0xff, 0x4c, - 0xab, 0x62, 0x15, 0xae, 0x35, 0x29, 0xb8, 0xf2, 0x04, 0x19, 0x88, 0x5a, 0x90, 0x1b, 0x2f, 0xa8, - 0xf4, 0xdc, 0xa2, 0x66, 0x56, 0xe5, 0x34, 0xfe, 0x51, 0x94, 0x4a, 0x58, 0x71, 0xc7, 0xe9, 0x28, - 0x0c, 0x00, 0x05, 0xd0, 0xc0, 0x70, 0x2d, 0x00, 0xd7, 0xc5, 0x6b, 0x45, 0xa1, 0x6e, 0x0b, 0xc3, - 0x5b, 0x4b, 0x9d, 0x28, 0x81, 0xd0, 0x96, 0x01, 0xda, 0x65, 0xd7, 0xe1, 0x5f, 0x12, 0x57, 0x05, - 0x29, 0xcf, 0x06, 0x66, 0x6d, 0x00, 0x1c, 0xa1, 0xc3, 0x25, 0x82, 0x4b, 0x0c, 0xaf, 0x08, 0xf0, - 0xc7, 0x0e, 0x45, 0x11, 0x1e, 0x23, 0x80, 0x66, 0xdd, 0xf3, 0x77, 0xa7, 0x33, 0x71, 0xbb, 0x99, - 0xd7, 0xee, 0xe9, 0x1f, 0x05, 0x00, 0xd5, 0x73, 0x44, 0xf2, 0x06, 0x35, 0x46, 0x2b, 0x44, 0x87, - 0x5f, 0x1a, 0xab, 0xa7, 0xf3, 0xe3, 0x37, 0x6b, 0x00, 0x10, 0x39, 0xaa, 0x0a, 0xae, 0x2e, 0x4b, - 0x0e, 0xb1, 0x3a, 0xc1, 0xa4, 0x12, 0xc4, 0xc9, 0x65, 0xea, 0x7a, 0x0d, 0xa8, 0x49, 0x67, 0x74, - 0x65, 0x52, 0x84, 0xcf, 0x7d, 0x84, 0x53, 0x04, 0x9f, 0x91, 0x6c, 0x5b, 0xc9, 0xdd, 0x2e, 0xe9, - 0x49, 0xdf, 0xe8, 0xfc, 0x0f, 0x3a, 0xbb, 0x0f, 0x4f, 0x59, 0x34, 0x0c, 0xb1, 0x11, 0xd5, 0xe0, - 0x0b, 0x46, 0xb4, 0x11, 0x2c, 0xce, 0x7d, 0x45, 0xa2, 0xf3, 0x79, 0x5a, 0x55, 0x16, 0x95, 0x25, - 0x9e, 0xb6, 0x34, 0x96, 0xc1, 0x9c, 0x87, 0xfc, 0x8d, 0x7b, 0x10, 0xcd, 0x80, 0x97, 0x28, 0xbb, - 0xdd, 0x28, 0xe5, 0x43, 0xc5, 0xf5, 0x17, 0x23, 0xda, 0x84, 0x6f, 0xcd, 0xb4, 0x8b, 0xe6, 0xc5, - 0xb7, 0x51, 0xaf, 0x6a, 0x90, 0x6a, 0xa9, 0x6d, 0x18, 0x49, 0x14, 0xcb, 0x15, 0x6a, 0x84, 0xc5, - 0x7b, 0xaa, 0xfc, 0x4f, 0x88, 0xc0, 0xa5, 0x0c, 0xa1, 0x28, 0xb0, 0x67, 0xef, 0xa9, 0xad, 0xdd, - 0x25, 0x18, 0x48, 0x5f, 0xa4, 0xd5, 0x9d, 0x37, 0x13, 0x16, 0x50, 0x83, 0x6b, 0x14, 0x3d, 0x58, - 0x5f, 0xbc, 0xcf, 0x86, 0x6f, 0x03, 0x82, 0x74, 0xba, 0xdb, 0xd3, 0xa8, 0x1d, 0x30, 0x37, 0xc9, - 0x8e, 0x27, 0x3e, 0x67, 0x32, 0xfb, 0x6d, 0x40, 0x79, 0x40, 0xec, 0x94, 0xe9, 0xac, 0x49, 0x93, - 0x60, 0xdf, 0x3c, 0x6a, 0x4c, 0x9f, 0xfa, 0x0a, 0xe0, 0xbf, 0x7e, 0x4b, 0x34, 0x7c, 0x2d, 0xda, - 0x6f, 0xbf, 0x24, 0xdf, 0x45, 0x7e, 0xa2, 0xd9, 0x66, 0x54, 0x66, 0x6f, 0x51, 0x43, 0xe1, 0xfa, - 0x95, 0x24, 0x5c, 0xfe, 0x7e, 0xcc, 0xec, 0x37, 0x0b, 0xd3, 0xec, 0x78, 0x86, 0x75, 0xee, 0xc6, - 0x84, 0xa2, 0x91, 0x04, 0x26, 0x0b, 0x35, 0xb4, 0x4d, 0x70, 0xb0, 0x31, 0xbf, 0x1f, 0x9f, 0xc2, - 0xec, 0xa1, 0xd0, 0x81, 0x50, 0x90, 0x42, 0x4f, 0xda, 0x59, 0xd1, 0xfa, 0xa4, 0x61, 0x98, 0x38, - 0x74, 0xb0, 0x10, 0x2c, 0xda, 0xef, 0x29, 0xc2, 0x2a, 0x59, 0xf7, 0x54, 0x1e, 0xcf, 0xc4, 0x21, - 0x9a, 0xd5, 0x78, 0xf0, 0xb3, 0x0b, 0x76, 0x65, 0x7d, 0x29, 0xf5, 0xae, 0xaa, 0xbb, 0x61, 0xf7, - 0x9e, 0xb3, 0x4c, 0x64, 0x5c, 0x6a, 0xb1, 0x42, 0x48, 0x3f, 0x81, 0xdf, 0xcd, 0x28, 0x05, 0xc9, - 0x24, 0x69, 0x63, 0xad, 0xd8, 0x6c, 0x1e, 0x39, 0xd5, 0xc4, 0xd0, 0x4d, 0xf6, 0xc5, 0x65, 0x56, - 0x97, 0x6d, 0x10, 0xfb, 0x1f, 0x44, 0xc7, 0x21, 0xf6, 0x2d, 0xc5, 0x33, 0x79, 0x49, 0xe8, 0xe7, - 0x06, 0x7f, 0xbd, 0xef, 0x61, 0x80, 0x1b, 0x83, 0x5f, 0x69, 0x0c, 0xf7, 0xdc, 0x51, 0x27, 0x83, - 0x2a, 0xf7, 0xb3, 0x12, 0x20, 0xda, 0xba, 0x7b, 0x82, 0x5c, 0x11, 0x5e, 0xde, 0xf6, 0x7c, 0x88, - 0xe2, 0x5f, 0x9d, 0x4e, 0x5a, 0x73, 0x05, 0xc9, 0x2e, 0x58, 0x6b, 0x63, 0xba, 0x74, 0x9f, 0x57, - 0xcd, 0x1d, 0x37, 0x1d, 0x72, 0x45, 0x57, 0xa1, 0xeb, 0xbb, 0xf1, 0xe0, 0x69, 0x39, 0x07, 0x2d, - 0x2d, 0xe3, 0xc3, 0x9f, 0xa2, 0x12, 0x7d, 0x80, 0x3b, 0xb0, 0x6e, 0x44, 0x1f, 0x59, 0x0b, 0x06, - 0xb3, 0x01, 0x2a, 0x67, 0x6b, 0x2b, 0x0a, 0xfc, 0x3b, 0xec, 0x2d, 0x22, 0x79, 0x8d, 0x79, 0x8c, - 0x68, 0x64, 0x31, 0x69, 0x7b, 0x11, 0xb8, 0x4e, 0x9d, 0x4e, 0x07, 0x5a, 0x87, 0x40, 0x8a, 0x50, - 0x2a, 0xb4, 0x5b, 0x83, 0x3a, 0x07, 0x3d, 0x0c, 0xfc, 0x7c, 0xcf, 0x44, 0x57, 0xbb, 0x7b, 0xd3, - 0x63, 0x2f, 0x6e, 0x65, 0x2f, 0x63, 0x9d, 0xc4, 0xd9, 0xff, 0x70, 0xd1, 0x74, 0x64, 0xae, 0xf8, - 0xbf, 0xde, 0x19, 0xdd, 0xf8, 0x8a, 0x9f, 0x98, 0x31, 0x0d, 0x61, 0x97, 0xd1, 0xb4, 0xb9, 0x73, - 0xc4, 0x56, 0x5d, 0x24, 0xe2, 0x39, 0x1c, 0x21, 0xe4, 0x48, 0x43, 0xa0, 0x2b, 0x7f, 0x14, 0x62, - 0xbf, 0x3a, 0x3e, 0x61, 0x5a, 0xfb, 0x75, 0xb6, 0x18, 0x57, 0x8b, 0x67, 0x75, 0xc0, 0xf5, 0x14, - 0xb3, 0xf5, 0x11, 0x76, 0x27, 0xdd, 0xf3, 0x77, 0xfd, 0x51, 0x99, 0xbf, 0x8d, 0xe9, 0xa8, 0xbd, - 0x0a, 0x22, 0xba, 0x2f, 0x28, 0x74, 0xa0, 0x74, 0xd3, 0x5f, 0x7c, 0x8d, 0x90, 0x70, 0xd8, 0x42, - 0x12, 0xe5, 0x7a, 0x55, 0xb9, 0x29, 0x2e, 0xed, 0xfc, 0xeb, 0x85, 0x10, 0xdf, 0x01, 0x3e, 0xf3, - 0x80, 0x9a, 0x1a, 0x3b, 0x49, 0x1d, 0x21, 0xc9, 0xad, 0x3d, 0x22, 0x81, 0xaa, 0x94, 0x90, 0xd0, - 0x6d, 0x99, 0xd2, 0xf1, 0xbe, 0xe7, 0xa7, 0xfb, 0x3a, 0x7b, 0x3c, 0xf7, 0x1e, 0xff, 0x9c, 0x65, - 0x75, 0x78, 0x51, 0x1f, 0xc2, 0x6e, 0xb3, 0xe5, 0x2a, 0x2f, 0x56, 0x79, 0x07, 0xce, 0x22, 0x80, - 0x01, 0xbc, 0x59, 0x13, 0xb5, 0xf9, 0xeb, 0xa1, 0x40, 0x5f, 0xe3, 0x5b, 0x16, 0xd3, 0x0e, 0x46, - 0x0b, 0x13, 0x41, 0x63, 0x89, 0x41, 0xa9, 0x60, 0xf7, 0xda, 0x0a, 0x6b, 0xcd, 0x95, 0x6b, 0x4a, - 0x4c, 0x23, 0x0f, 0x2d, 0xc3, 0x25, 0xa6, 0x6e, 0x12, 0x0f, 0xa2, 0xd6, 0x91, 0xf2, 0x89, 0x66, - 0xa4, 0xe9, 0x92, 0x7a, 0x4e, 0xbf, 0x0c, 0x2d, 0x48, 0xd1, 0x65, 0x1a, 0x81, 0xe0, 0x5b, 0x61, - 0x30, 0x9f, 0x07, 0x03, 0x05, 0x07, 0x41, 0x6c, 0x20, 0x95, 0xf1, 0x67, 0x8d, 0x3f, 0xe3, 0x6e, - 0xe6, 0x6f, 0xde, 0x17, 0x4c, 0x43, 0x32, 0x15, 0xfb, 0x58, 0xf7, 0x35, 0xd4, 0xfa, 0x94, 0x78, - 0x18, 0xa8, 0xa8, 0xfc, 0xe1, 0x95, 0xe2, 0x91, 0xf2, 0x5c, 0x89, 0xf7, 0xe4, 0x29, 0x9c, 0x4e, - 0x3c, 0x36, 0xee, 0x87, 0xab, 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0x19, 0xde, 0xf7, 0xae, 0x99, 0x22, 0x74, 0xfb, 0xc5, 0xce, 0xc4, 0xa3, 0x8c, 0xfb, 0x1b, + 0xb8, 0x16, 0x0f, 0x8a, 0x6a, 0xd2, 0xf7, 0xf1, 0x0a, 0xd0, 0xb1, 0x0a, 0xc7, 0x97, 0xe8, 0xc0, + 0x6f, 0x9c, 0x31, 0xa7, 0x33, 0x10, 0xd3, 0x5a, 0x1a, 0x1a, 0xe0, 0xe4, 0xd6, 0xc4, 0x63, 0x7d, + 0xf2, 0xc4, 0x65, 0x62, 0xbd, 0x4a, 0x7c, 0x91, 0x9d, 0x18, 0x15, 0x98, 0xe1, 0x67, 0x2b, 0x6e, + 0x07, 0x82, 0x76, 0x41, 0xb4, 0x2a, 0x9f, 0xe3, 0x85, 0x6e, 0xc2, 0x5a, 0xe9, 0x59, 0xbf, 0xc2, + 0xf9, 0xcc, 0xfd, 0x16, 0x61, 0x86, 0xa7, 0xdf, 0x70, 0xce, 0x8d, 0x5b, 0x61, 0x70, 0x24, 0xa8, + 0x61, 0x5e, 0x1a, 0x43, 0x9e, 0xa5, 0x5f, 0x21, 0xb6, 0xb6, 0xc0, 0xb5, 0x16, 0xcd, 0x24, 0xaa, + 0x4e, 0x07, 0xc7, 0x04, 0x65, 0x37, 0xc9, 0xb3, 0x86, 0x6e, 0x2d, 0x79, 0x6a, 0x42, 0x0a, 0x50, + 0xb4, 0x49, 0xc7, 0x7f, 0x08, 0xf1, 0x7a, 0xa6, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -10412,9 +10412,9 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmFmcGfwProdSigned_GH100_ucode_image_storag // static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwProdSigned_GH100_ucode_hash_data[] = { - 0xaa, 0x4f, 0xe4, 0xbe, 0xaf, 0x56, 0x71, 0x9b, 0x34, 0x4a, 0x4e, 0x48, 0xc2, 0x4b, 0xfc, 0x8e, - 0xe0, 0xc2, 0x98, 0x64, 0x05, 0x0e, 0xc1, 0x87, 0x09, 0x06, 0x8d, 0xcd, 0xde, 0x96, 0x52, 0xc2, - 0x12, 0x32, 0x26, 0xdf, 0xb6, 0x7a, 0x39, 0x0b, 0xa0, 0xc7, 0x89, 0x9e, 0xf4, 0x69, 0x95, 0xef, + 0xb8, 0xfb, 0x24, 0x4c, 0x70, 0x35, 0xa6, 0x35, 0xb4, 0xd4, 0xef, 0x3b, 0x76, 0x0c, 0x07, 0x30, + 0xb2, 0x0f, 0xa2, 0xdb, 0xb1, 0x07, 0x9a, 0x24, 0x9f, 0x91, 0x63, 0x2a, 0x01, 0x22, 0xba, 0x21, + 0x50, 0xc3, 0xf6, 0x66, 0xa3, 0x1d, 0x39, 0x4b, 0x92, 0x42, 0x23, 0x4a, 0x83, 0x9a, 0x3b, 0xae, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -10447,30 +10447,30 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmFmcGfwProdSigned_GH100_ucode_hash_storage // static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwProdSigned_GH100_ucode_sig_data[] = { - 0x89, 0x7d, 0x7d, 0xdd, 0x58, 0xe2, 0x42, 0x33, 0xeb, 0x72, 0x55, 0x08, 0xe7, 0xd2, 0x3d, 0x24, - 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0xc1, 0xd8, 0x57, 0xe7, 0x99, 0x79, 0x01, 0x15, 0x12, 0xbc, 0x00, 0x3a, 0xfb, - 0x87, 0x54, 0xda, 0x31, 0x1b, 0x0c, 0x7a, 0xd5, 0x53, 0x86, 0x51, 0x4d, 0x3d, 0xc0, 0xa3, 0xc1, - 0xed, 0xcc, 0x38, 0x2a, 0x3c, 0x34, 0x15, 0xb4, 0xe0, 0xa2, 0x65, 0xa7, 0xe9, 0x50, 0x84, 0x5f, - 0xf6, 0x90, 0x18, 0xac, 0x74, 0x98, 0x75, 0x9b, 0xc0, 0x45, 0x4d, 0xbc, 0x9b, 0xa2, 0xdb, 0x82, - 0x0d, 0xbf, 0xba, 0x33, 0xa0, 0x65, 0xf6, 0x23, 0xb7, 0x02, 0x64, 0x7f, 0x0a, 0xf1, 0xab, 0xfa, - 0x1a, 0x22, 0xac, 0xc0, 0xc2, 0xfe, 0xf4, 0xe6, 0x8d, 0xcf, 0xa1, 0x19, 0x4b, 0x40, 0x86, 0x24, - 0x30, 0x85, 0xa3, 0x8c, 0x10, 0xf3, 0x2d, 0xf3, 0xb8, 0x80, 0xcb, 0x38, 0x50, 0x71, 0xbd, 0x3e, - 0x33, 0x50, 0x5e, 0x72, 0xfa, 0x7d, 0x0d, 0x39, 0x8f, 0x06, 0x8a, 0x53, 0xe5, 0xd9, 0xfc, 0x28, - 0xe6, 0x3f, 0x98, 0xee, 0x88, 0x29, 0xba, 0x11, 0x4f, 0xbe, 0x74, 0x97, 0x19, 0x78, 0x75, 0xea, - 0xd7, 0x21, 0xf0, 0x32, 0x2e, 0xe2, 0x61, 0x25, 0x43, 0xe7, 0x34, 0xbb, 0xbe, 0x86, 0x6d, 0x90, - 0xde, 0xbb, 0xd2, 0xde, 0xd4, 0xbf, 0xe9, 0xfc, 0xa3, 0xed, 0x6f, 0xe0, 0x7e, 0xce, 0xd1, 0x3d, - 0x8e, 0x35, 0x58, 0x99, 0x3c, 0x0b, 0x9b, 0x4b, 0x03, 0x14, 0xbc, 0x1b, 0xe7, 0x1c, 0x2e, 0x5f, - 0xad, 0x36, 0x2c, 0xb3, 0x9d, 0xfc, 0xd9, 0xf5, 0x47, 0xc3, 0x0d, 0x07, 0x01, 0xe1, 0xe3, 0x6d, + 0x78, 0x85, 0x5f, 0xf1, 0x6c, 0xce, 0xb9, 0x86, 0xb9, 0x71, 0x8d, 0x73, 0x25, 0x2b, 0xea, 0x0f, + 0x8a, 0xa2, 0xa0, 0x95, 0xd2, 0x98, 0xf6, 0x2b, 0x20, 0xae, 0x77, 0xda, 0xec, 0xd3, 0x33, 0x15, + 0x62, 0x85, 0xe5, 0xd1, 0x2b, 0x40, 0x14, 0x41, 0x33, 0xae, 0x12, 0x17, 0xa4, 0x6c, 0xae, 0x15, + 0x60, 0x35, 0xdd, 0xfb, 0x90, 0xaa, 0x05, 0x6d, 0x97, 0x39, 0xaf, 0xf1, 0xca, 0xcf, 0x7f, 0x11, + 0x53, 0x53, 0x76, 0x3d, 0xc6, 0x1c, 0xeb, 0x16, 0x33, 0x70, 0xe8, 0x98, 0x02, 0x63, 0xbb, 0x9b, + 0x71, 0xb8, 0x49, 0x1f, 0x5e, 0x5a, 0x8b, 0x47, 0xcb, 0x18, 0x8a, 0xee, 0x82, 0x3a, 0xef, 0x6e, + 0x11, 0x34, 0x92, 0x77, 0x33, 0x7e, 0x0c, 0x13, 0x8e, 0xe9, 0xa0, 0x13, 0xdd, 0x9f, 0xc1, 0x93, + 0x83, 0x39, 0x0a, 0x06, 0x62, 0xd2, 0xb6, 0xf1, 0xfa, 0xc8, 0xea, 0x41, 0xae, 0x30, 0x43, 0xd4, + 0x49, 0x43, 0x87, 0x6a, 0x49, 0xb0, 0xf1, 0x77, 0xab, 0xda, 0x63, 0x66, 0x8e, 0xf1, 0x80, 0x36, + 0xd7, 0x5b, 0x2e, 0x73, 0x9c, 0x55, 0xd4, 0xc7, 0x91, 0x17, 0xa5, 0x45, 0xbc, 0xf9, 0x6f, 0xca, + 0x4e, 0x05, 0x69, 0xea, 0x6a, 0xb7, 0xcf, 0x41, 0x95, 0x65, 0x7c, 0x38, 0xdf, 0xfc, 0xac, 0xbb, + 0xaf, 0xc0, 0x99, 0xfc, 0x9f, 0x74, 0xaa, 0x98, 0x94, 0xd5, 0xc0, 0xf2, 0xe7, 0x6c, 0x1b, 0xce, + 0x96, 0xee, 0x5e, 0x41, 0xee, 0xef, 0x6c, 0x7f, 0x7a, 0xe0, 0xfd, 0x6b, 0x14, 0xea, 0xe8, 0xf6, + 0xfb, 0x4c, 0x50, 0xa5, 0xb8, 0x48, 0x35, 0xa1, 0xda, 0xde, 0x77, 0x3b, 0x45, 0x73, 0x86, 0xb7, + 0xbf, 0x67, 0x8b, 0xff, 0xa4, 0x56, 0x40, 0xd5, 0x83, 0x87, 0xd9, 0x0d, 0x3c, 0x1d, 0x5e, 0x96, + 0x95, 0xd5, 0xee, 0x8d, 0x77, 0x9e, 0xe9, 0x3e, 0x72, 0x9c, 0x76, 0x8e, 0xa8, 0x9e, 0x96, 0xf0, + 0x9d, 0x69, 0xfa, 0x68, 0x42, 0x12, 0x8f, 0x12, 0xc2, 0x8d, 0x19, 0xb0, 0xc1, 0x5c, 0xfa, 0x2b, + 0x7d, 0x7c, 0xf2, 0x4d, 0x88, 0xab, 0x49, 0xbf, 0x39, 0x9d, 0x35, 0x22, 0xd0, 0xe8, 0x47, 0x95, + 0xde, 0x90, 0x86, 0xa0, 0xea, 0x62, 0x24, 0xcc, 0x17, 0x47, 0xe8, 0x31, 0x45, 0x7c, 0x42, 0x22, + 0x13, 0x0a, 0x2d, 0x89, 0x37, 0x46, 0xc8, 0x03, 0x9c, 0x83, 0x33, 0xd0, 0xe6, 0x02, 0xce, 0x46, + 0x0f, 0x01, 0x00, 0x17, 0xab, 0x2d, 0xf1, 0xb9, 0x36, 0xc9, 0x31, 0x41, 0x8b, 0x0a, 0x80, 0x7c, + 0x65, 0xe7, 0x8e, 0xd1, 0x09, 0x6f, 0x95, 0x8a, 0x8b, 0x08, 0x28, 0xb7, 0xdc, 0xf2, 0x2b, 0xff, + 0x2f, 0x04, 0xee, 0x62, 0xcc, 0xde, 0x12, 0xbb, 0x32, 0x86, 0xd7, 0xd6, 0x54, 0xfa, 0x01, 0xaa, + 0x9d, 0x36, 0x1b, 0x95, 0x5f, 0x1b, 0x84, 0x84, 0x4d, 0x1d, 0x0b, 0x7f, 0xa7, 0xc6, 0xc7, 0x50, }; #endif // defined(BINDATA_INCLUDE_DATA) diff --git a/src/nvidia/generated/g_ccsl_nvoc.c b/src/nvidia/generated/g_ccsl_nvoc.c index 39051b689d..894b548331 100644 --- a/src/nvidia/generated/g_ccsl_nvoc.c +++ b/src/nvidia/generated/g_ccsl_nvoc.c @@ -49,6 +49,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_Ccsl = /*pExportInfo=*/ &__nvoc_export_info_Ccsl }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_Ccsl = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_ccsl_nvoc.h b/src/nvidia/generated/g_ccsl_nvoc.h index 387d9ab5f2..d4cb6e8a66 100644 --- a/src/nvidia/generated/g_ccsl_nvoc.h +++ b/src/nvidia/generated/g_ccsl_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_ce_utils_nvoc.c b/src/nvidia/generated/g_ce_utils_nvoc.c index 03fb84e3b1..d9d2b19eb0 100644 --- a/src/nvidia/generated/g_ce_utils_nvoc.c +++ b/src/nvidia/generated/g_ce_utils_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_CeUtils = /*pExportInfo=*/ &__nvoc_export_info_CeUtils }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_CeUtils = { /*numEntries=*/ 0, @@ -321,130 +325,198 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_CeUtilsA }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiControl(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiMap(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiUnmap(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_ceutilsapiShareCallback(struct CeUtilsApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiGetRegBaseOffsetAndSize(struct CeUtilsApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiGetMapAddrSpace(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiInternalControlForward(struct CeUtilsApi *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_ceutilsapiGetInternalObjectHandle(struct CeUtilsApi *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_ceutilsapiAccessCallback(struct CeUtilsApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_ceutilsapiGetMemInterMapParams(struct CeUtilsApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_ceutilsapiCheckMemInterUnmap(struct CeUtilsApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_ceutilsapiGetMemoryMappingDescriptor(struct CeUtilsApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_ceutilsapiControlSerialization_Prologue(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_ceutilsapiControlSerialization_Epilogue(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_ceutilsapiControl_Prologue(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_ceutilsapiControl_Epilogue(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_ceutilsapiCanCopy(struct CeUtilsApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_ceutilsapiIsDuplicate(struct CeUtilsApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_ceutilsapiPreDestruct(struct CeUtilsApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_ceutilsapiControlFilter(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_ceutilsapiIsPartialUnmapSupported(struct CeUtilsApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_ceutilsapiMapTo(struct CeUtilsApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_ceutilsapiUnmapFrom(struct CeUtilsApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_ceutilsapiGetRefCount(struct CeUtilsApi *pResource); // this +void __nvoc_up_thunk_RsResource_ceutilsapiAddAdditionalDependants(struct RsClient *pClient, struct CeUtilsApi *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in CeUtilsApi to superclasses // ceutilsapiControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiControl(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiControl(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset), pCallContext, pParams); } // ceutilsapiMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiMap(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiMap(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // ceutilsapiUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiUnmap(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiUnmap(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset), pCallContext, pCpuMapping); } // ceutilsapiShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_ceutilsapiShareCallback(struct CeUtilsApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_ceutilsapiShareCallback(struct CeUtilsApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // ceutilsapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiGetRegBaseOffsetAndSize(struct CeUtilsApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiGetRegBaseOffsetAndSize(struct CeUtilsApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset), pGpu, pOffset, pSize); } // ceutilsapiGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiGetMapAddrSpace(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiGetMapAddrSpace(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // ceutilsapiInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiInternalControlForward(struct CeUtilsApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_ceutilsapiInternalControlForward(struct CeUtilsApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset), command, pParams, size); } // ceutilsapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_ceutilsapiGetInternalObjectHandle(struct CeUtilsApi *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_ceutilsapiGetInternalObjectHandle(struct CeUtilsApi *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_CeUtilsApi_GpuResource.offset)); } // ceutilsapiAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_ceutilsapiAccessCallback(struct CeUtilsApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_ceutilsapiAccessCallback(struct CeUtilsApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // ceutilsapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_ceutilsapiGetMemInterMapParams(struct CeUtilsApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_ceutilsapiGetMemInterMapParams(struct CeUtilsApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), pParams); } // ceutilsapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_ceutilsapiCheckMemInterUnmap(struct CeUtilsApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_ceutilsapiCheckMemInterUnmap(struct CeUtilsApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), bSubdeviceHandleProvided); } // ceutilsapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_ceutilsapiGetMemoryMappingDescriptor(struct CeUtilsApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_ceutilsapiGetMemoryMappingDescriptor(struct CeUtilsApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), ppMemDesc); } // ceutilsapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_ceutilsapiControlSerialization_Prologue(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_ceutilsapiControlSerialization_Prologue(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), pCallContext, pParams); } // ceutilsapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_ceutilsapiControlSerialization_Epilogue(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_ceutilsapiControlSerialization_Epilogue(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), pCallContext, pParams); } // ceutilsapiControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_ceutilsapiControl_Prologue(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_ceutilsapiControl_Prologue(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), pCallContext, pParams); } // ceutilsapiControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_ceutilsapiControl_Epilogue(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_ceutilsapiControl_Epilogue(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RmResource.offset), pCallContext, pParams); } // ceutilsapiCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_ceutilsapiCanCopy(struct CeUtilsApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_ceutilsapiCanCopy(struct CeUtilsApi *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset)); } // ceutilsapiIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_ceutilsapiIsDuplicate(struct CeUtilsApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_ceutilsapiIsDuplicate(struct CeUtilsApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset), hMemory, pDuplicate); } // ceutilsapiPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_ceutilsapiPreDestruct(struct CeUtilsApi *pResource) { +void __nvoc_up_thunk_RsResource_ceutilsapiPreDestruct(struct CeUtilsApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset)); } // ceutilsapiControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_ceutilsapiControlFilter(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_ceutilsapiControlFilter(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset), pCallContext, pParams); } // ceutilsapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_ceutilsapiIsPartialUnmapSupported(struct CeUtilsApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_ceutilsapiIsPartialUnmapSupported(struct CeUtilsApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset)); } // ceutilsapiMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_ceutilsapiMapTo(struct CeUtilsApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_ceutilsapiMapTo(struct CeUtilsApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset), pParams); } // ceutilsapiUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_ceutilsapiUnmapFrom(struct CeUtilsApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_ceutilsapiUnmapFrom(struct CeUtilsApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset), pParams); } // ceutilsapiGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_ceutilsapiGetRefCount(struct CeUtilsApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_ceutilsapiGetRefCount(struct CeUtilsApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset)); } // ceutilsapiAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_ceutilsapiAddAdditionalDependants(struct RsClient *pClient, struct CeUtilsApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_ceutilsapiAddAdditionalDependants(struct RsClient *pClient, struct CeUtilsApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_CeUtilsApi_RsResource.offset), pReference); } @@ -503,88 +575,118 @@ static void __nvoc_init_funcTable_CeUtilsApi_1(CeUtilsApi *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x104u) pThis->__ceutilsapiCtrlCmdCheckProgress__ = &ceutilsapiCtrlCmdCheckProgress_IMPL; #endif - - // ceutilsapiControl -- virtual inherited (gpures) base (gpures) - pThis->__ceutilsapiControl__ = &__nvoc_up_thunk_GpuResource_ceutilsapiControl; - - // ceutilsapiMap -- virtual inherited (gpures) base (gpures) - pThis->__ceutilsapiMap__ = &__nvoc_up_thunk_GpuResource_ceutilsapiMap; - - // ceutilsapiUnmap -- virtual inherited (gpures) base (gpures) - pThis->__ceutilsapiUnmap__ = &__nvoc_up_thunk_GpuResource_ceutilsapiUnmap; - - // ceutilsapiShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__ceutilsapiShareCallback__ = &__nvoc_up_thunk_GpuResource_ceutilsapiShareCallback; - - // ceutilsapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__ceutilsapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_ceutilsapiGetRegBaseOffsetAndSize; - - // ceutilsapiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__ceutilsapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_ceutilsapiGetMapAddrSpace; - - // ceutilsapiInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__ceutilsapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_ceutilsapiInternalControlForward; - - // ceutilsapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__ceutilsapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_ceutilsapiGetInternalObjectHandle; - - // ceutilsapiAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__ceutilsapiAccessCallback__ = &__nvoc_up_thunk_RmResource_ceutilsapiAccessCallback; - - // ceutilsapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__ceutilsapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_ceutilsapiGetMemInterMapParams; - - // ceutilsapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__ceutilsapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_ceutilsapiCheckMemInterUnmap; - - // ceutilsapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__ceutilsapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_ceutilsapiGetMemoryMappingDescriptor; - - // ceutilsapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__ceutilsapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_ceutilsapiControlSerialization_Prologue; - - // ceutilsapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__ceutilsapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_ceutilsapiControlSerialization_Epilogue; - - // ceutilsapiControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__ceutilsapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_ceutilsapiControl_Prologue; - - // ceutilsapiControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__ceutilsapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_ceutilsapiControl_Epilogue; - - // ceutilsapiCanCopy -- virtual inherited (res) base (gpures) - pThis->__ceutilsapiCanCopy__ = &__nvoc_up_thunk_RsResource_ceutilsapiCanCopy; - - // ceutilsapiIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__ceutilsapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_ceutilsapiIsDuplicate; - - // ceutilsapiPreDestruct -- virtual inherited (res) base (gpures) - pThis->__ceutilsapiPreDestruct__ = &__nvoc_up_thunk_RsResource_ceutilsapiPreDestruct; - - // ceutilsapiControlFilter -- virtual inherited (res) base (gpures) - pThis->__ceutilsapiControlFilter__ = &__nvoc_up_thunk_RsResource_ceutilsapiControlFilter; - - // ceutilsapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__ceutilsapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_ceutilsapiIsPartialUnmapSupported; - - // ceutilsapiMapTo -- virtual inherited (res) base (gpures) - pThis->__ceutilsapiMapTo__ = &__nvoc_up_thunk_RsResource_ceutilsapiMapTo; - - // ceutilsapiUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__ceutilsapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_ceutilsapiUnmapFrom; - - // ceutilsapiGetRefCount -- virtual inherited (res) base (gpures) - pThis->__ceutilsapiGetRefCount__ = &__nvoc_up_thunk_RsResource_ceutilsapiGetRefCount; - - // ceutilsapiAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__ceutilsapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_ceutilsapiAddAdditionalDependants; -} // End __nvoc_init_funcTable_CeUtilsApi_1 with approximately 28 basic block(s). +} // End __nvoc_init_funcTable_CeUtilsApi_1 with approximately 3 basic block(s). // Initialize vtable(s) for 28 virtual method(s). void __nvoc_init_funcTable_CeUtilsApi(CeUtilsApi *pThis) { - // Initialize vtable(s) with 28 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__CeUtilsApi vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x104u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x104u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x104u) +#endif + .__ceutilsapiControl__ = &__nvoc_up_thunk_GpuResource_ceutilsapiControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__ceutilsapiMap__ = &__nvoc_up_thunk_GpuResource_ceutilsapiMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__ceutilsapiUnmap__ = &__nvoc_up_thunk_GpuResource_ceutilsapiUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__ceutilsapiShareCallback__ = &__nvoc_up_thunk_GpuResource_ceutilsapiShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__ceutilsapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_ceutilsapiGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__ceutilsapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_ceutilsapiGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__ceutilsapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_ceutilsapiInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__ceutilsapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_ceutilsapiGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__ceutilsapiAccessCallback__ = &__nvoc_up_thunk_RmResource_ceutilsapiAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__ceutilsapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_ceutilsapiGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__ceutilsapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_ceutilsapiCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__ceutilsapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_ceutilsapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__ceutilsapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_ceutilsapiControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__ceutilsapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_ceutilsapiControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__ceutilsapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_ceutilsapiControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__ceutilsapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_ceutilsapiControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__ceutilsapiCanCopy__ = &__nvoc_up_thunk_RsResource_ceutilsapiCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__ceutilsapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_ceutilsapiIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__ceutilsapiPreDestruct__ = &__nvoc_up_thunk_RsResource_ceutilsapiPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__ceutilsapiControlFilter__ = &__nvoc_up_thunk_RsResource_ceutilsapiControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__ceutilsapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_ceutilsapiIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__ceutilsapiMapTo__ = &__nvoc_up_thunk_RsResource_ceutilsapiMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__ceutilsapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_ceutilsapiUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__ceutilsapiGetRefCount__ = &__nvoc_up_thunk_RsResource_ceutilsapiGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__ceutilsapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_ceutilsapiAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (ceutilsapi) this + + // Initialize vtable(s) with 3 per-object function pointer(s). __nvoc_init_funcTable_CeUtilsApi_1(pThis); } diff --git a/src/nvidia/generated/g_ce_utils_nvoc.h b/src/nvidia/generated/g_ce_utils_nvoc.h index ac6dfe7c5a..8a03642a3d 100644 --- a/src/nvidia/generated/g_ce_utils_nvoc.h +++ b/src/nvidia/generated/g_ce_utils_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -220,10 +220,15 @@ static inline void ceutilsServiceInterrupts(struct CeUtils *pCeUtils) { #endif +// Metadata including vtable +struct NVOC_VTABLE__CeUtilsApi; + + struct CeUtilsApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__CeUtilsApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -236,10 +241,20 @@ struct CeUtilsApi { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct CeUtilsApi *__nvoc_pbase_CeUtilsApi; // ceutilsapi - // Vtable with 28 per-object function pointers + // Vtable with 3 per-object function pointers NV_STATUS (*__ceutilsapiCtrlCmdMemset__)(struct CeUtilsApi * /*this*/, NV0050_CTRL_MEMSET_PARAMS *); // exported (id=0x500101) NV_STATUS (*__ceutilsapiCtrlCmdMemcopy__)(struct CeUtilsApi * /*this*/, NV0050_CTRL_MEMCOPY_PARAMS *); // exported (id=0x500102) NV_STATUS (*__ceutilsapiCtrlCmdCheckProgress__)(struct CeUtilsApi * /*this*/, NV0050_CTRL_CHECK_PROGRESS_PARAMS *); // exported (id=0x500103) + + // Data members + struct CeUtils *pCeUtils; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__CeUtilsApi { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + NV_STATUS (*__ceutilsapiControl__)(struct CeUtilsApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__ceutilsapiMap__)(struct CeUtilsApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__ceutilsapiUnmap__)(struct CeUtilsApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -265,9 +280,6 @@ struct CeUtilsApi { NV_STATUS (*__ceutilsapiUnmapFrom__)(struct CeUtilsApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__ceutilsapiGetRefCount__)(struct CeUtilsApi * /*this*/); // virtual inherited (res) base (gpures) void (*__ceutilsapiAddAdditionalDependants__)(struct RsClient *, struct CeUtilsApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - struct CeUtils *pCeUtils; }; #ifndef __NVOC_CLASS_CeUtilsApi_TYPEDEF__ @@ -306,55 +318,55 @@ NV_STATUS __nvoc_objCreate_CeUtilsApi(CeUtilsApi**, Dynamic*, NvU32, CALL_CONTEX #define ceutilsapiCtrlCmdMemcopy(pCeUtilsApi, pParams) ceutilsapiCtrlCmdMemcopy_DISPATCH(pCeUtilsApi, pParams) #define ceutilsapiCtrlCmdCheckProgress_FNPTR(pCeUtilsApi) pCeUtilsApi->__ceutilsapiCtrlCmdCheckProgress__ #define ceutilsapiCtrlCmdCheckProgress(pCeUtilsApi, pParams) ceutilsapiCtrlCmdCheckProgress_DISPATCH(pCeUtilsApi, pParams) -#define ceutilsapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define ceutilsapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define ceutilsapiControl(pGpuResource, pCallContext, pParams) ceutilsapiControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define ceutilsapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define ceutilsapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define ceutilsapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) ceutilsapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define ceutilsapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define ceutilsapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define ceutilsapiUnmap(pGpuResource, pCallContext, pCpuMapping) ceutilsapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define ceutilsapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define ceutilsapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define ceutilsapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) ceutilsapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define ceutilsapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define ceutilsapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define ceutilsapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) ceutilsapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define ceutilsapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define ceutilsapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define ceutilsapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) ceutilsapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define ceutilsapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define ceutilsapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define ceutilsapiInternalControlForward(pGpuResource, command, pParams, size) ceutilsapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define ceutilsapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define ceutilsapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define ceutilsapiGetInternalObjectHandle(pGpuResource) ceutilsapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define ceutilsapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define ceutilsapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define ceutilsapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) ceutilsapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define ceutilsapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define ceutilsapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define ceutilsapiGetMemInterMapParams(pRmResource, pParams) ceutilsapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define ceutilsapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define ceutilsapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define ceutilsapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) ceutilsapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define ceutilsapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define ceutilsapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define ceutilsapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) ceutilsapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define ceutilsapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define ceutilsapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define ceutilsapiControlSerialization_Prologue(pResource, pCallContext, pParams) ceutilsapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define ceutilsapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define ceutilsapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define ceutilsapiControlSerialization_Epilogue(pResource, pCallContext, pParams) ceutilsapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define ceutilsapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define ceutilsapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define ceutilsapiControl_Prologue(pResource, pCallContext, pParams) ceutilsapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define ceutilsapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define ceutilsapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define ceutilsapiControl_Epilogue(pResource, pCallContext, pParams) ceutilsapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define ceutilsapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define ceutilsapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define ceutilsapiCanCopy(pResource) ceutilsapiCanCopy_DISPATCH(pResource) -#define ceutilsapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define ceutilsapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define ceutilsapiIsDuplicate(pResource, hMemory, pDuplicate) ceutilsapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define ceutilsapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define ceutilsapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define ceutilsapiPreDestruct(pResource) ceutilsapiPreDestruct_DISPATCH(pResource) -#define ceutilsapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define ceutilsapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define ceutilsapiControlFilter(pResource, pCallContext, pParams) ceutilsapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define ceutilsapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define ceutilsapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define ceutilsapiIsPartialUnmapSupported(pResource) ceutilsapiIsPartialUnmapSupported_DISPATCH(pResource) -#define ceutilsapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define ceutilsapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define ceutilsapiMapTo(pResource, pParams) ceutilsapiMapTo_DISPATCH(pResource, pParams) -#define ceutilsapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define ceutilsapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define ceutilsapiUnmapFrom(pResource, pParams) ceutilsapiUnmapFrom_DISPATCH(pResource, pParams) -#define ceutilsapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define ceutilsapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define ceutilsapiGetRefCount(pResource) ceutilsapiGetRefCount_DISPATCH(pResource) -#define ceutilsapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define ceutilsapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define ceutilsapiAddAdditionalDependants(pClient, pResource, pReference) ceutilsapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions @@ -371,103 +383,103 @@ static inline NV_STATUS ceutilsapiCtrlCmdCheckProgress_DISPATCH(struct CeUtilsAp } static inline NV_STATUS ceutilsapiControl_DISPATCH(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__ceutilsapiControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__ceutilsapiControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS ceutilsapiMap_DISPATCH(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__ceutilsapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__ceutilsapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS ceutilsapiUnmap_DISPATCH(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__ceutilsapiUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__ceutilsapiUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool ceutilsapiShareCallback_DISPATCH(struct CeUtilsApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__ceutilsapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__ceutilsapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS ceutilsapiGetRegBaseOffsetAndSize_DISPATCH(struct CeUtilsApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__ceutilsapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__ceutilsapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS ceutilsapiGetMapAddrSpace_DISPATCH(struct CeUtilsApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__ceutilsapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__ceutilsapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS ceutilsapiInternalControlForward_DISPATCH(struct CeUtilsApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__ceutilsapiInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__ceutilsapiInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle ceutilsapiGetInternalObjectHandle_DISPATCH(struct CeUtilsApi *pGpuResource) { - return pGpuResource->__ceutilsapiGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__ceutilsapiGetInternalObjectHandle__(pGpuResource); } static inline NvBool ceutilsapiAccessCallback_DISPATCH(struct CeUtilsApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__ceutilsapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__ceutilsapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS ceutilsapiGetMemInterMapParams_DISPATCH(struct CeUtilsApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__ceutilsapiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__ceutilsapiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS ceutilsapiCheckMemInterUnmap_DISPATCH(struct CeUtilsApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__ceutilsapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__ceutilsapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS ceutilsapiGetMemoryMappingDescriptor_DISPATCH(struct CeUtilsApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__ceutilsapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__ceutilsapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS ceutilsapiControlSerialization_Prologue_DISPATCH(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ceutilsapiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__ceutilsapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void ceutilsapiControlSerialization_Epilogue_DISPATCH(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__ceutilsapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__ceutilsapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS ceutilsapiControl_Prologue_DISPATCH(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ceutilsapiControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__ceutilsapiControl_Prologue__(pResource, pCallContext, pParams); } static inline void ceutilsapiControl_Epilogue_DISPATCH(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__ceutilsapiControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__ceutilsapiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool ceutilsapiCanCopy_DISPATCH(struct CeUtilsApi *pResource) { - return pResource->__ceutilsapiCanCopy__(pResource); + return pResource->__nvoc_vtable->__ceutilsapiCanCopy__(pResource); } static inline NV_STATUS ceutilsapiIsDuplicate_DISPATCH(struct CeUtilsApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__ceutilsapiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__ceutilsapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void ceutilsapiPreDestruct_DISPATCH(struct CeUtilsApi *pResource) { - pResource->__ceutilsapiPreDestruct__(pResource); + pResource->__nvoc_vtable->__ceutilsapiPreDestruct__(pResource); } static inline NV_STATUS ceutilsapiControlFilter_DISPATCH(struct CeUtilsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ceutilsapiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__ceutilsapiControlFilter__(pResource, pCallContext, pParams); } static inline NvBool ceutilsapiIsPartialUnmapSupported_DISPATCH(struct CeUtilsApi *pResource) { - return pResource->__ceutilsapiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__ceutilsapiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS ceutilsapiMapTo_DISPATCH(struct CeUtilsApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__ceutilsapiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__ceutilsapiMapTo__(pResource, pParams); } static inline NV_STATUS ceutilsapiUnmapFrom_DISPATCH(struct CeUtilsApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__ceutilsapiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__ceutilsapiUnmapFrom__(pResource, pParams); } static inline NvU32 ceutilsapiGetRefCount_DISPATCH(struct CeUtilsApi *pResource) { - return pResource->__ceutilsapiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__ceutilsapiGetRefCount__(pResource); } static inline void ceutilsapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct CeUtilsApi *pResource, RsResourceRef *pReference) { - pResource->__ceutilsapiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__ceutilsapiAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS ceutilsapiCtrlCmdMemset_IMPL(struct CeUtilsApi *pCeUtilsApi, NV0050_CTRL_MEMSET_PARAMS *pParams); diff --git a/src/nvidia/generated/g_channel_descendant_nvoc.c b/src/nvidia/generated/g_channel_descendant_nvoc.c index 68ede2bd7e..8f2bf2bc13 100644 --- a/src/nvidia/generated/g_channel_descendant_nvoc.c +++ b/src/nvidia/generated/g_channel_descendant_nvoc.c @@ -111,158 +111,236 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_ChannelDescendant = /*pExportInfo=*/ &__nvoc_export_info_ChannelDescendant }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap(struct RmResource *pChannelDescendant, NvBool bSubdeviceHandleProvided); // this + // 1 down-thunk(s) defined to bridge methods in ChannelDescendant from superclasses // chandesCheckMemInterUnmap: virtual override (rmres) base (gpures) -static NV_STATUS __nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap(struct RmResource *pChannelDescendant, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap(struct RmResource *pChannelDescendant, NvBool bSubdeviceHandleProvided) { return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) - __nvoc_rtti_ChannelDescendant_RmResource.offset), bSubdeviceHandleProvided); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesControl(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_chandesMap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_chandesUnmap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_chandesShareCallback(struct ChannelDescendant *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize(struct ChannelDescendant *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_chandesInternalControlForward(struct ChannelDescendant *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle(struct ChannelDescendant *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_chandesAccessCallback(struct ChannelDescendant *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemInterMapParams(struct ChannelDescendant *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor(struct ChannelDescendant *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_chandesControl_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_chandesControl_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_chandesCanCopy(struct ChannelDescendant *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_chandesIsDuplicate(struct ChannelDescendant *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_chandesPreDestruct(struct ChannelDescendant *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_chandesControlFilter(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported(struct ChannelDescendant *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_chandesMapTo(struct ChannelDescendant *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_chandesUnmapFrom(struct ChannelDescendant *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_chandesGetRefCount(struct ChannelDescendant *pResource); // this +void __nvoc_up_thunk_RsResource_chandesAddAdditionalDependants(struct RsClient *pClient, struct ChannelDescendant *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_chandesGetNotificationListPtr(struct ChannelDescendant *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_chandesGetNotificationShare(struct ChannelDescendant *pNotifier); // this +void __nvoc_up_thunk_Notifier_chandesSetNotificationShare(struct ChannelDescendant *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_chandesUnregisterEvent(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 29 up-thunk(s) defined to bridge methods in ChannelDescendant to superclasses // chandesControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_chandesControl(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_chandesControl(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset), pCallContext, pParams); } // chandesMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_chandesMap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_chandesMap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // chandesUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_chandesUnmap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_chandesUnmap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset), pCallContext, pCpuMapping); } // chandesShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_chandesShareCallback(struct ChannelDescendant *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_chandesShareCallback(struct ChannelDescendant *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // chandesGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize(struct ChannelDescendant *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize(struct ChannelDescendant *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset), pGpu, pOffset, pSize); } // chandesGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // chandesInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_chandesInternalControlForward(struct ChannelDescendant *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_chandesInternalControlForward(struct ChannelDescendant *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset), command, pParams, size); } // chandesGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle(struct ChannelDescendant *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle(struct ChannelDescendant *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ChannelDescendant_GpuResource.offset)); } // chandesAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_chandesAccessCallback(struct ChannelDescendant *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_chandesAccessCallback(struct ChannelDescendant *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // chandesGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemInterMapParams(struct ChannelDescendant *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemInterMapParams(struct ChannelDescendant *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ChannelDescendant_RmResource.offset), pParams); } // chandesGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor(struct ChannelDescendant *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor(struct ChannelDescendant *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ChannelDescendant_RmResource.offset), ppMemDesc); } // chandesControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RmResource.offset), pCallContext, pParams); } // chandesControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RmResource.offset), pCallContext, pParams); } // chandesControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_chandesControl_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_chandesControl_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RmResource.offset), pCallContext, pParams); } // chandesControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_chandesControl_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_chandesControl_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RmResource.offset), pCallContext, pParams); } // chandesCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_chandesCanCopy(struct ChannelDescendant *pResource) { +NvBool __nvoc_up_thunk_RsResource_chandesCanCopy(struct ChannelDescendant *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset)); } // chandesIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_chandesIsDuplicate(struct ChannelDescendant *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_chandesIsDuplicate(struct ChannelDescendant *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset), hMemory, pDuplicate); } // chandesPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_chandesPreDestruct(struct ChannelDescendant *pResource) { +void __nvoc_up_thunk_RsResource_chandesPreDestruct(struct ChannelDescendant *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset)); } // chandesControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_chandesControlFilter(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_chandesControlFilter(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset), pCallContext, pParams); } // chandesIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported(struct ChannelDescendant *pResource) { +NvBool __nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported(struct ChannelDescendant *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset)); } // chandesMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_chandesMapTo(struct ChannelDescendant *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_chandesMapTo(struct ChannelDescendant *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset), pParams); } // chandesUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_chandesUnmapFrom(struct ChannelDescendant *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_chandesUnmapFrom(struct ChannelDescendant *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset), pParams); } // chandesGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_chandesGetRefCount(struct ChannelDescendant *pResource) { +NvU32 __nvoc_up_thunk_RsResource_chandesGetRefCount(struct ChannelDescendant *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset)); } // chandesAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_chandesAddAdditionalDependants(struct RsClient *pClient, struct ChannelDescendant *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_chandesAddAdditionalDependants(struct RsClient *pClient, struct ChannelDescendant *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ChannelDescendant_RsResource.offset), pReference); } // chandesGetNotificationListPtr: virtual inherited (notify) base (notify) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_chandesGetNotificationListPtr(struct ChannelDescendant *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_chandesGetNotificationListPtr(struct ChannelDescendant *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_ChannelDescendant_Notifier.offset)); } // chandesGetNotificationShare: virtual inherited (notify) base (notify) -static struct NotifShare * __nvoc_up_thunk_Notifier_chandesGetNotificationShare(struct ChannelDescendant *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_chandesGetNotificationShare(struct ChannelDescendant *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_ChannelDescendant_Notifier.offset)); } // chandesSetNotificationShare: virtual inherited (notify) base (notify) -static void __nvoc_up_thunk_Notifier_chandesSetNotificationShare(struct ChannelDescendant *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_chandesSetNotificationShare(struct ChannelDescendant *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_ChannelDescendant_Notifier.offset), pNotifShare); } // chandesUnregisterEvent: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_chandesUnregisterEvent(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_chandesUnregisterEvent(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_ChannelDescendant_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // chandesGetOrAllocNotifShare: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_ChannelDescendant_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -323,110 +401,129 @@ static void __nvoc_init_funcTable_ChannelDescendant_1(ChannelDescendant *pThis, PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - - // chandesGetSwMethods -- virtual - pThis->__chandesGetSwMethods__ = &chandesGetSwMethods_IMPL; - - // chandesIsSwMethodStalling -- virtual - pThis->__chandesIsSwMethodStalling__ = &chandesIsSwMethodStalling_IMPL; - - // chandesCheckMemInterUnmap -- virtual override (rmres) base (gpures) - pThis->__chandesCheckMemInterUnmap__ = &chandesCheckMemInterUnmap_IMPL; - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap; - - // chandesControl -- virtual inherited (gpures) base (gpures) - pThis->__chandesControl__ = &__nvoc_up_thunk_GpuResource_chandesControl; - - // chandesMap -- virtual inherited (gpures) base (gpures) - pThis->__chandesMap__ = &__nvoc_up_thunk_GpuResource_chandesMap; - - // chandesUnmap -- virtual inherited (gpures) base (gpures) - pThis->__chandesUnmap__ = &__nvoc_up_thunk_GpuResource_chandesUnmap; - - // chandesShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__chandesShareCallback__ = &__nvoc_up_thunk_GpuResource_chandesShareCallback; - - // chandesGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__chandesGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize; - - // chandesGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__chandesGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace; - - // chandesInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__chandesInternalControlForward__ = &__nvoc_up_thunk_GpuResource_chandesInternalControlForward; - - // chandesGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__chandesGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle; - - // chandesAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__chandesAccessCallback__ = &__nvoc_up_thunk_RmResource_chandesAccessCallback; - - // chandesGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__chandesGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_chandesGetMemInterMapParams; - - // chandesGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__chandesGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor; - - // chandesControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__chandesControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue; - - // chandesControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__chandesControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue; - - // chandesControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__chandesControl_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControl_Prologue; - - // chandesControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__chandesControl_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControl_Epilogue; - - // chandesCanCopy -- virtual inherited (res) base (gpures) - pThis->__chandesCanCopy__ = &__nvoc_up_thunk_RsResource_chandesCanCopy; - - // chandesIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__chandesIsDuplicate__ = &__nvoc_up_thunk_RsResource_chandesIsDuplicate; - - // chandesPreDestruct -- virtual inherited (res) base (gpures) - pThis->__chandesPreDestruct__ = &__nvoc_up_thunk_RsResource_chandesPreDestruct; - - // chandesControlFilter -- virtual inherited (res) base (gpures) - pThis->__chandesControlFilter__ = &__nvoc_up_thunk_RsResource_chandesControlFilter; - - // chandesIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__chandesIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported; - - // chandesMapTo -- virtual inherited (res) base (gpures) - pThis->__chandesMapTo__ = &__nvoc_up_thunk_RsResource_chandesMapTo; - - // chandesUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__chandesUnmapFrom__ = &__nvoc_up_thunk_RsResource_chandesUnmapFrom; - - // chandesGetRefCount -- virtual inherited (res) base (gpures) - pThis->__chandesGetRefCount__ = &__nvoc_up_thunk_RsResource_chandesGetRefCount; - - // chandesAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__chandesAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_chandesAddAdditionalDependants; - - // chandesGetNotificationListPtr -- virtual inherited (notify) base (notify) - pThis->__chandesGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationListPtr; - - // chandesGetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__chandesGetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationShare; - - // chandesSetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__chandesSetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesSetNotificationShare; - - // chandesUnregisterEvent -- virtual inherited (notify) base (notify) - pThis->__chandesUnregisterEvent__ = &__nvoc_up_thunk_Notifier_chandesUnregisterEvent; - - // chandesGetOrAllocNotifShare -- virtual inherited (notify) base (notify) - pThis->__chandesGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_ChannelDescendant_1 with approximately 33 basic block(s). +} // End __nvoc_init_funcTable_ChannelDescendant_1 // Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_ChannelDescendant(ChannelDescendant *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 32 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__ChannelDescendant vtable = { + .__chandesGetSwMethods__ = &chandesGetSwMethods_IMPL, // virtual + .__chandesIsSwMethodStalling__ = &chandesIsSwMethodStalling_IMPL, // virtual + .__chandesCheckMemInterUnmap__ = &chandesCheckMemInterUnmap_IMPL, // virtual override (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap, // virtual + .__chandesControl__ = &__nvoc_up_thunk_GpuResource_chandesControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__chandesMap__ = &__nvoc_up_thunk_GpuResource_chandesMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__chandesUnmap__ = &__nvoc_up_thunk_GpuResource_chandesUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__chandesShareCallback__ = &__nvoc_up_thunk_GpuResource_chandesShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__chandesGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__chandesGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__chandesInternalControlForward__ = &__nvoc_up_thunk_GpuResource_chandesInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__chandesGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__chandesAccessCallback__ = &__nvoc_up_thunk_RmResource_chandesAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__chandesGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_chandesGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__chandesGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__chandesControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__chandesControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__chandesControl_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__chandesControl_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__chandesCanCopy__ = &__nvoc_up_thunk_RsResource_chandesCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__chandesIsDuplicate__ = &__nvoc_up_thunk_RsResource_chandesIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__chandesPreDestruct__ = &__nvoc_up_thunk_RsResource_chandesPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__chandesControlFilter__ = &__nvoc_up_thunk_RsResource_chandesControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__chandesIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__chandesMapTo__ = &__nvoc_up_thunk_RsResource_chandesMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__chandesUnmapFrom__ = &__nvoc_up_thunk_RsResource_chandesUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__chandesGetRefCount__ = &__nvoc_up_thunk_RsResource_chandesGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__chandesAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_chandesAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__chandesGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationListPtr, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__chandesGetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__chandesSetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesSetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__chandesUnregisterEvent__ = &__nvoc_up_thunk_Notifier_chandesUnregisterEvent, // virtual inherited (notify) base (notify) + .Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__chandesGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.Notifier.INotifier; // (inotify) super^2 + pThis->__nvoc_base_Notifier.__nvoc_vtable = &vtable.Notifier; // (notify) super + pThis->__nvoc_vtable = &vtable; // (chandes) this __nvoc_init_funcTable_ChannelDescendant_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_channel_descendant_nvoc.h b/src/nvidia/generated/g_channel_descendant_nvoc.h index 63a5d4f584..647d26e492 100644 --- a/src/nvidia/generated/g_channel_descendant_nvoc.h +++ b/src/nvidia/generated/g_channel_descendant_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -127,10 +127,15 @@ typedef ENGDESCRIPTOR PARAM_TO_ENGDESC_FUNCTION(OBJGPU *pGpu, NvU32 externalClas #endif +// Metadata including vtable +struct NVOC_VTABLE__ChannelDescendant; + + struct ChannelDescendant { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__ChannelDescendant *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -146,7 +151,20 @@ struct ChannelDescendant { struct Notifier *__nvoc_pbase_Notifier; // notify super struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes - // Vtable with 32 per-object function pointers + // Data members + struct KernelChannel *pKernelChannel; + GPU_RESOURCE_DESC resourceDesc; + NvU16 classID; + NvU32 notifyAction; + NvBool bNotifyTrigger; +}; + + +// Metadata including vtable with 32 function pointers plus superclass metadata +struct NVOC_VTABLE__ChannelDescendant { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + const struct NVOC_VTABLE__Notifier Notifier; // (notify) 5 function pointers + NV_STATUS (*__chandesGetSwMethods__)(struct ChannelDescendant * /*this*/, const METHOD **, NvU32 *); // virtual NvBool (*__chandesIsSwMethodStalling__)(struct ChannelDescendant * /*this*/, NvU32); // virtual NV_STATUS (*__chandesCheckMemInterUnmap__)(struct ChannelDescendant * /*this*/, NvBool); // virtual override (rmres) base (gpures) @@ -179,13 +197,6 @@ struct ChannelDescendant { void (*__chandesSetNotificationShare__)(struct ChannelDescendant * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) NV_STATUS (*__chandesUnregisterEvent__)(struct ChannelDescendant * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) NV_STATUS (*__chandesGetOrAllocNotifShare__)(struct ChannelDescendant * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) - - // Data members - struct KernelChannel *pKernelChannel; - GPU_RESOURCE_DESC resourceDesc; - NvU16 classID; - NvU32 notifyAction; - NvBool bNotifyTrigger; }; #ifndef __NVOC_CLASS_ChannelDescendant_TYPEDEF__ @@ -218,198 +229,198 @@ NV_STATUS __nvoc_objCreate_ChannelDescendant(ChannelDescendant**, Dynamic*, NvU3 // Wrapper macros -#define chandesGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__chandesGetSwMethods__ +#define chandesGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_vtable->__chandesGetSwMethods__ #define chandesGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) chandesGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) -#define chandesIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__chandesIsSwMethodStalling__ +#define chandesIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_vtable->__chandesIsSwMethodStalling__ #define chandesIsSwMethodStalling(pChannelDescendant, hHandle) chandesIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define chandesCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__chandesCheckMemInterUnmap__ +#define chandesCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_vtable->__chandesCheckMemInterUnmap__ #define chandesCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) chandesCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) -#define chandesControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define chandesControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define chandesControl(pGpuResource, pCallContext, pParams) chandesControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define chandesMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define chandesMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define chandesMap(pGpuResource, pCallContext, pParams, pCpuMapping) chandesMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define chandesUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define chandesUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define chandesUnmap(pGpuResource, pCallContext, pCpuMapping) chandesUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define chandesShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define chandesShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define chandesShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) chandesShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define chandesGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define chandesGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define chandesGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) chandesGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define chandesGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define chandesGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define chandesGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) chandesGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define chandesInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define chandesInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define chandesInternalControlForward(pGpuResource, command, pParams, size) chandesInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define chandesGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define chandesGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define chandesGetInternalObjectHandle(pGpuResource) chandesGetInternalObjectHandle_DISPATCH(pGpuResource) -#define chandesAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define chandesAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define chandesAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) chandesAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define chandesGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define chandesGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define chandesGetMemInterMapParams(pRmResource, pParams) chandesGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define chandesGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define chandesGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define chandesGetMemoryMappingDescriptor(pRmResource, ppMemDesc) chandesGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define chandesControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define chandesControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define chandesControlSerialization_Prologue(pResource, pCallContext, pParams) chandesControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define chandesControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define chandesControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define chandesControlSerialization_Epilogue(pResource, pCallContext, pParams) chandesControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define chandesControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define chandesControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define chandesControl_Prologue(pResource, pCallContext, pParams) chandesControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define chandesControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define chandesControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define chandesControl_Epilogue(pResource, pCallContext, pParams) chandesControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define chandesCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define chandesCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define chandesCanCopy(pResource) chandesCanCopy_DISPATCH(pResource) -#define chandesIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define chandesIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define chandesIsDuplicate(pResource, hMemory, pDuplicate) chandesIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define chandesPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define chandesPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define chandesPreDestruct(pResource) chandesPreDestruct_DISPATCH(pResource) -#define chandesControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define chandesControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define chandesControlFilter(pResource, pCallContext, pParams) chandesControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define chandesIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define chandesIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define chandesIsPartialUnmapSupported(pResource) chandesIsPartialUnmapSupported_DISPATCH(pResource) -#define chandesMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define chandesMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define chandesMapTo(pResource, pParams) chandesMapTo_DISPATCH(pResource, pParams) -#define chandesUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define chandesUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define chandesUnmapFrom(pResource, pParams) chandesUnmapFrom_DISPATCH(pResource, pParams) -#define chandesGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define chandesGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define chandesGetRefCount(pResource) chandesGetRefCount_DISPATCH(pResource) -#define chandesAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define chandesAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define chandesAddAdditionalDependants(pClient, pResource, pReference) chandesAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define chandesGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define chandesGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define chandesGetNotificationListPtr(pNotifier) chandesGetNotificationListPtr_DISPATCH(pNotifier) -#define chandesGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define chandesGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define chandesGetNotificationShare(pNotifier) chandesGetNotificationShare_DISPATCH(pNotifier) -#define chandesSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define chandesSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define chandesSetNotificationShare(pNotifier, pNotifShare) chandesSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define chandesUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define chandesUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define chandesUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) chandesUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define chandesGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define chandesGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define chandesGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) chandesGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS chandesGetSwMethods_DISPATCH(struct ChannelDescendant *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { - return pChannelDescendant->__chandesGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); + return pChannelDescendant->__nvoc_vtable->__chandesGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); } static inline NvBool chandesIsSwMethodStalling_DISPATCH(struct ChannelDescendant *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__chandesIsSwMethodStalling__(pChannelDescendant, hHandle); + return pChannelDescendant->__nvoc_vtable->__chandesIsSwMethodStalling__(pChannelDescendant, hHandle); } static inline NV_STATUS chandesCheckMemInterUnmap_DISPATCH(struct ChannelDescendant *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return pChannelDescendant->__chandesCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); + return pChannelDescendant->__nvoc_vtable->__chandesCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } static inline NV_STATUS chandesControl_DISPATCH(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__chandesControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__chandesControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS chandesMap_DISPATCH(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__chandesMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__chandesMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS chandesUnmap_DISPATCH(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__chandesUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__chandesUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool chandesShareCallback_DISPATCH(struct ChannelDescendant *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__chandesShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__chandesShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS chandesGetRegBaseOffsetAndSize_DISPATCH(struct ChannelDescendant *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__chandesGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__chandesGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS chandesGetMapAddrSpace_DISPATCH(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__chandesGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__chandesGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS chandesInternalControlForward_DISPATCH(struct ChannelDescendant *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__chandesInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__chandesInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle chandesGetInternalObjectHandle_DISPATCH(struct ChannelDescendant *pGpuResource) { - return pGpuResource->__chandesGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__chandesGetInternalObjectHandle__(pGpuResource); } static inline NvBool chandesAccessCallback_DISPATCH(struct ChannelDescendant *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__chandesAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__chandesAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS chandesGetMemInterMapParams_DISPATCH(struct ChannelDescendant *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__chandesGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__chandesGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS chandesGetMemoryMappingDescriptor_DISPATCH(struct ChannelDescendant *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__chandesGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__chandesGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS chandesControlSerialization_Prologue_DISPATCH(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__chandesControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__chandesControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void chandesControlSerialization_Epilogue_DISPATCH(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__chandesControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__chandesControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS chandesControl_Prologue_DISPATCH(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__chandesControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__chandesControl_Prologue__(pResource, pCallContext, pParams); } static inline void chandesControl_Epilogue_DISPATCH(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__chandesControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__chandesControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool chandesCanCopy_DISPATCH(struct ChannelDescendant *pResource) { - return pResource->__chandesCanCopy__(pResource); + return pResource->__nvoc_vtable->__chandesCanCopy__(pResource); } static inline NV_STATUS chandesIsDuplicate_DISPATCH(struct ChannelDescendant *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__chandesIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__chandesIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void chandesPreDestruct_DISPATCH(struct ChannelDescendant *pResource) { - pResource->__chandesPreDestruct__(pResource); + pResource->__nvoc_vtable->__chandesPreDestruct__(pResource); } static inline NV_STATUS chandesControlFilter_DISPATCH(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__chandesControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__chandesControlFilter__(pResource, pCallContext, pParams); } static inline NvBool chandesIsPartialUnmapSupported_DISPATCH(struct ChannelDescendant *pResource) { - return pResource->__chandesIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__chandesIsPartialUnmapSupported__(pResource); } static inline NV_STATUS chandesMapTo_DISPATCH(struct ChannelDescendant *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__chandesMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__chandesMapTo__(pResource, pParams); } static inline NV_STATUS chandesUnmapFrom_DISPATCH(struct ChannelDescendant *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__chandesUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__chandesUnmapFrom__(pResource, pParams); } static inline NvU32 chandesGetRefCount_DISPATCH(struct ChannelDescendant *pResource) { - return pResource->__chandesGetRefCount__(pResource); + return pResource->__nvoc_vtable->__chandesGetRefCount__(pResource); } static inline void chandesAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ChannelDescendant *pResource, RsResourceRef *pReference) { - pResource->__chandesAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__chandesAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * chandesGetNotificationListPtr_DISPATCH(struct ChannelDescendant *pNotifier) { - return pNotifier->__chandesGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__chandesGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * chandesGetNotificationShare_DISPATCH(struct ChannelDescendant *pNotifier) { - return pNotifier->__chandesGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__chandesGetNotificationShare__(pNotifier); } static inline void chandesSetNotificationShare_DISPATCH(struct ChannelDescendant *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__chandesSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__chandesSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS chandesUnregisterEvent_DISPATCH(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__chandesUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__chandesUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS chandesGetOrAllocNotifShare_DISPATCH(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__chandesGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__chandesGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } static inline void chandesIsolateOnDestruct_b3696a(struct ChannelDescendant *pChannelDescendant) { diff --git a/src/nvidia/generated/g_chips2halspec_nvoc.c b/src/nvidia/generated/g_chips2halspec_nvoc.c index 0e5ebe3bd8..d862cc8f76 100644 --- a/src/nvidia/generated/g_chips2halspec_nvoc.c +++ b/src/nvidia/generated/g_chips2halspec_nvoc.c @@ -154,7 +154,7 @@ void __nvoc_init_halspec_DispIpHal(DispIpHal *pDispIpHal, NvU32 ipver) // DISPv0000 else if(ipver == 0x0) { - pDispIpHal->__nvoc_HalVarIdx = 18; + pDispIpHal->__nvoc_HalVarIdx = 19; } } diff --git a/src/nvidia/generated/g_chips2halspec_nvoc.h b/src/nvidia/generated/g_chips2halspec_nvoc.h index 272ccc2d09..a5ceeb9cc7 100644 --- a/src/nvidia/generated/g_chips2halspec_nvoc.h +++ b/src/nvidia/generated/g_chips2halspec_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -45,7 +45,7 @@ void __nvoc_init_halspec_ChipHal(ChipHal*, NvU32, NvU32, NvU32); * For Legacy iGPUs, we have two type Tegra chips in Chips.pm * TEGRA_DGPU : The iGPU Core inside the Tegra Soc Chip with PCIE interface. * The behavior is more like a dGPU. Such chip is generally - * added to dGPU (CLASSIC-GPUS) chip family. E.g. GA10B + * added to dGPU (CLASSIC_GPUS) chip family. E.g. GA10B * This is generally the test chip used in MODS Arch validation * that shares the test infrastructure with dGPU. * diff --git a/src/nvidia/generated/g_chipset_nvoc.c b/src/nvidia/generated/g_chipset_nvoc.c index 3edb272845..1c06939038 100644 --- a/src/nvidia/generated/g_chipset_nvoc.c +++ b/src/nvidia/generated/g_chipset_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJCL = /*pExportInfo=*/ &__nvoc_export_info_OBJCL }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJCL = { /*numEntries=*/ 0, @@ -72,8 +76,8 @@ void __nvoc_dtor_OBJCL(OBJCL *pThis) { void __nvoc_init_dataField_OBJCL(OBJCL *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - pThis->setProperty(pThis, PDB_PROP_CL_HAS_RESIZABLE_BAR_ISSUE, ((NvBool)(0 != 0))); - pThis->setProperty(pThis, PDB_PROP_CL_BUG_3751839_GEN_SPEED_WAR, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_CL_HAS_RESIZABLE_BAR_ISSUE, NV_FALSE); + pThis->setProperty(pThis, PDB_PROP_CL_BUG_3751839_GEN_SPEED_WAR, NV_FALSE); } NV_STATUS __nvoc_ctor_Object(Object* ); diff --git a/src/nvidia/generated/g_chipset_nvoc.h b/src/nvidia/generated/g_chipset_nvoc.h index 78d0b432f5..4cd4d6387e 100644 --- a/src/nvidia/generated/g_chipset_nvoc.h +++ b/src/nvidia/generated/g_chipset_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -108,7 +108,8 @@ struct PCIECONFIGSPACEBASE #define CL_PCIE_ROOT_STATUS (CL_PCIE_BEGIN + 0x20) #define CL_PCIE_DEV_CAP_2 (CL_PCIE_BEGIN + 0x24) #define CL_PCIE_DEV_CTRL_2 (CL_PCIE_BEGIN + 0x28) -#define CL_PCIE_END (CL_PCIE_BEGIN + 0x2C) +#define CL_PCIE_LINK_CAP_2 (CL_PCIE_BEGIN + 0x2C) +#define CL_PCIE_END CL_PCIE_LINK_CAP_2 // PCI Express Capabilities #define CL_PCIE_CAP_SLOT NVBIT(24) @@ -276,7 +277,7 @@ struct OBJCL { struct Object *__nvoc_pbase_Object; // obj super struct OBJCL *__nvoc_pbase_OBJCL; // cl - // 37 PDB properties + // 36 PDB properties NvBool PDB_PROP_CL_PCIE_CONFIG_ACCESSIBLE; NvBool PDB_PROP_CL_DISABLE_BR03_FLOW_CONTROL; NvBool PDB_PROP_CL_ASLM_SUPPORTS_NV_LINK_UPGRADE; @@ -301,7 +302,6 @@ struct OBJCL { NvBool PDB_PROP_CL_INTEL_CPU_ROOTPORT1_NEEDS_H57_WAR; NvBool PDB_PROP_CL_PCIE_CONFIG_SKIP_MCFG_READ; NvBool PDB_PROP_CL_ON_PCIE_GEN3_PATSBURG; - NvBool PDB_PROP_CL_IS_EXTERNAL_GPU; NvBool PDB_PROP_CL_ALLOW_PCIE_GEN3_ON_PATSBURG_WITH_IVBE_CPU; NvBool PDB_PROP_CL_BUG_999673_P2P_ARBITRARY_SPLIT_WAR; NvBool PDB_PROP_CL_UPSTREAM_LTR_SUPPORTED; @@ -408,8 +408,8 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJCL; #define PDB_PROP_CL_BUG_1340801_DISABLE_GEN3_ON_GIGABYTE_SNIPER_3_BASE_NAME PDB_PROP_CL_BUG_1340801_DISABLE_GEN3_ON_GIGABYTE_SNIPER_3 #define PDB_PROP_CL_ASLM_SUPPORTS_HOT_RESET_BASE_CAST #define PDB_PROP_CL_ASLM_SUPPORTS_HOT_RESET_BASE_NAME PDB_PROP_CL_ASLM_SUPPORTS_HOT_RESET -#define PDB_PROP_CL_IS_EXTERNAL_GPU_BASE_CAST -#define PDB_PROP_CL_IS_EXTERNAL_GPU_BASE_NAME PDB_PROP_CL_IS_EXTERNAL_GPU +#define PDB_PROP_CL_BUG_3751839_GEN_SPEED_WAR_BASE_CAST +#define PDB_PROP_CL_BUG_3751839_GEN_SPEED_WAR_BASE_NAME PDB_PROP_CL_BUG_3751839_GEN_SPEED_WAR #define PDB_PROP_CL_ROOTPORT_NEEDS_NOSNOOP_WAR_BASE_CAST #define PDB_PROP_CL_ROOTPORT_NEEDS_NOSNOOP_WAR_BASE_NAME PDB_PROP_CL_ROOTPORT_NEEDS_NOSNOOP_WAR #define PDB_PROP_CL_PCIE_GEN1_GEN2_SWITCH_CHIPSET_DISABLED_BASE_CAST @@ -418,8 +418,6 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJCL; #define PDB_PROP_CL_FORCE_SNOOP_READS_AND_WRITES_WAR_BUG_410390_BASE_NAME PDB_PROP_CL_FORCE_SNOOP_READS_AND_WRITES_WAR_BUG_410390 #define PDB_PROP_CL_ASPM_L0S_CHIPSET_ENABLED_MOBILE_ONLY_BASE_CAST #define PDB_PROP_CL_ASPM_L0S_CHIPSET_ENABLED_MOBILE_ONLY_BASE_NAME PDB_PROP_CL_ASPM_L0S_CHIPSET_ENABLED_MOBILE_ONLY -#define PDB_PROP_CL_BUG_3751839_GEN_SPEED_WAR_BASE_CAST -#define PDB_PROP_CL_BUG_3751839_GEN_SPEED_WAR_BASE_NAME PDB_PROP_CL_BUG_3751839_GEN_SPEED_WAR #define PDB_PROP_CL_PCIE_NON_COHERENT_USE_TC0_ONLY_BASE_CAST #define PDB_PROP_CL_PCIE_NON_COHERENT_USE_TC0_ONLY_BASE_NAME PDB_PROP_CL_PCIE_NON_COHERENT_USE_TC0_ONLY #define PDB_PROP_CL_HAS_RESIZABLE_BAR_ISSUE_BASE_CAST diff --git a/src/nvidia/generated/g_client_nvoc.c b/src/nvidia/generated/g_client_nvoc.c index ab8e8d880e..7ab451f586 100644 --- a/src/nvidia/generated/g_client_nvoc.c +++ b/src/nvidia/generated/g_client_nvoc.c @@ -66,6 +66,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_UserInfo = /*pExportInfo=*/ &__nvoc_export_info_UserInfo }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_UserInfo = { /*numEntries=*/ 0, @@ -247,68 +251,84 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_RmClient = /*pExportInfo=*/ &__nvoc_export_info_RmClient }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_RmClient_clientValidate(struct RsClient *pClient, const API_SECURITY_INFO *pSecInfo); // this +NV_STATUS __nvoc_down_thunk_RmClient_clientValidateLocks(struct RsClient *pClient, struct RsServer *pServer, const struct CLIENT_ENTRY *pClientEntry); // this +NV_STATUS __nvoc_down_thunk_RmClient_clientFreeResource(struct RsClient *pClient, struct RsServer *pServer, struct RS_RES_FREE_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_down_thunk_RmClient_clientInterMap(struct RsClient *pClient, struct RsResourceRef *pMapperRef, struct RsResourceRef *pMappableRef, struct RS_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_down_thunk_RmClient_clientInterUnmap(struct RsClient *pClient, struct RsResourceRef *pMapperRef, struct RS_INTER_UNMAP_PARAMS *pParams); // this +NV_STATUS __nvoc_down_thunk_RmClient_clientPostProcessPendingFreeList(struct RsClient *pClient, struct RsResourceRef **ppFirstLowPriRef); // this +RS_PRIV_LEVEL __nvoc_down_thunk_RmClient_clientGetCachedPrivilege(struct RsClient *pClient); // this +NvBool __nvoc_down_thunk_RmClient_clientIsAdmin(struct RsClient *pClient, RS_PRIV_LEVEL privLevel); // this + // 8 down-thunk(s) defined to bridge methods in RmClient from superclasses // rmclientValidate: virtual override (client) base (client) -static NV_STATUS __nvoc_down_thunk_RmClient_clientValidate(struct RsClient *pClient, const API_SECURITY_INFO *pSecInfo) { +NV_STATUS __nvoc_down_thunk_RmClient_clientValidate(struct RsClient *pClient, const API_SECURITY_INFO *pSecInfo) { return rmclientValidate((struct RmClient *)(((unsigned char *) pClient) - __nvoc_rtti_RmClient_RsClient.offset), pSecInfo); } // rmclientValidateLocks: virtual override (client) base (client) -static NV_STATUS __nvoc_down_thunk_RmClient_clientValidateLocks(struct RsClient *pClient, struct RsServer *pServer, const struct CLIENT_ENTRY *pClientEntry) { +NV_STATUS __nvoc_down_thunk_RmClient_clientValidateLocks(struct RsClient *pClient, struct RsServer *pServer, const struct CLIENT_ENTRY *pClientEntry) { return rmclientValidateLocks((struct RmClient *)(((unsigned char *) pClient) - __nvoc_rtti_RmClient_RsClient.offset), pServer, pClientEntry); } // rmclientFreeResource: virtual override (client) base (client) -static NV_STATUS __nvoc_down_thunk_RmClient_clientFreeResource(struct RsClient *pClient, struct RsServer *pServer, struct RS_RES_FREE_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_down_thunk_RmClient_clientFreeResource(struct RsClient *pClient, struct RsServer *pServer, struct RS_RES_FREE_PARAMS_INTERNAL *pParams) { return rmclientFreeResource((struct RmClient *)(((unsigned char *) pClient) - __nvoc_rtti_RmClient_RsClient.offset), pServer, pParams); } // rmclientInterMap: virtual override (client) base (client) -static NV_STATUS __nvoc_down_thunk_RmClient_clientInterMap(struct RsClient *pClient, struct RsResourceRef *pMapperRef, struct RsResourceRef *pMappableRef, struct RS_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_down_thunk_RmClient_clientInterMap(struct RsClient *pClient, struct RsResourceRef *pMapperRef, struct RsResourceRef *pMappableRef, struct RS_INTER_MAP_PARAMS *pParams) { return rmclientInterMap((struct RmClient *)(((unsigned char *) pClient) - __nvoc_rtti_RmClient_RsClient.offset), pMapperRef, pMappableRef, pParams); } // rmclientInterUnmap: virtual override (client) base (client) -static NV_STATUS __nvoc_down_thunk_RmClient_clientInterUnmap(struct RsClient *pClient, struct RsResourceRef *pMapperRef, struct RS_INTER_UNMAP_PARAMS *pParams) { +NV_STATUS __nvoc_down_thunk_RmClient_clientInterUnmap(struct RsClient *pClient, struct RsResourceRef *pMapperRef, struct RS_INTER_UNMAP_PARAMS *pParams) { return rmclientInterUnmap((struct RmClient *)(((unsigned char *) pClient) - __nvoc_rtti_RmClient_RsClient.offset), pMapperRef, pParams); } // rmclientPostProcessPendingFreeList: virtual override (client) base (client) -static NV_STATUS __nvoc_down_thunk_RmClient_clientPostProcessPendingFreeList(struct RsClient *pClient, struct RsResourceRef **ppFirstLowPriRef) { +NV_STATUS __nvoc_down_thunk_RmClient_clientPostProcessPendingFreeList(struct RsClient *pClient, struct RsResourceRef **ppFirstLowPriRef) { return rmclientPostProcessPendingFreeList((struct RmClient *)(((unsigned char *) pClient) - __nvoc_rtti_RmClient_RsClient.offset), ppFirstLowPriRef); } // rmclientGetCachedPrivilege: virtual override (client) base (client) -static RS_PRIV_LEVEL __nvoc_down_thunk_RmClient_clientGetCachedPrivilege(struct RsClient *pClient) { +RS_PRIV_LEVEL __nvoc_down_thunk_RmClient_clientGetCachedPrivilege(struct RsClient *pClient) { return rmclientGetCachedPrivilege((struct RmClient *)(((unsigned char *) pClient) - __nvoc_rtti_RmClient_RsClient.offset)); } // rmclientIsAdmin: virtual override (client) base (client) -static NvBool __nvoc_down_thunk_RmClient_clientIsAdmin(struct RsClient *pClient, RS_PRIV_LEVEL privLevel) { +NvBool __nvoc_down_thunk_RmClient_clientIsAdmin(struct RsClient *pClient, RS_PRIV_LEVEL privLevel) { return rmclientIsAdmin((struct RmClient *)(((unsigned char *) pClient) - __nvoc_rtti_RmClient_RsClient.offset), privLevel); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NV_STATUS __nvoc_up_thunk_RsClient_rmclientDestructResourceRef(struct RmClient *pClient, RsServer *pServer, struct RsResourceRef *pResourceRef); // this +NV_STATUS __nvoc_up_thunk_RsClient_rmclientUnmapMemory(struct RmClient *pClient, struct RsResourceRef *pResourceRef, struct RS_LOCK_INFO *pLockInfo, struct RsCpuMapping **ppCpuMapping, API_SECURITY_INFO *pSecInfo); // this +NV_STATUS __nvoc_up_thunk_RsClient_rmclientValidateNewResourceHandle(struct RmClient *pClient, NvHandle hResource, NvBool bRestrict); // this +NV_STATUS __nvoc_up_thunk_RsClient_rmclientShareResource(struct RmClient *pClient, struct RsResourceRef *pResourceRef, RS_SHARE_POLICY *pSharePolicy, struct CALL_CONTEXT *pCallContext); // this + // 4 up-thunk(s) defined to bridge methods in RmClient to superclasses // rmclientDestructResourceRef: virtual inherited (client) base (client) -static NV_STATUS __nvoc_up_thunk_RsClient_rmclientDestructResourceRef(struct RmClient *pClient, RsServer *pServer, struct RsResourceRef *pResourceRef) { +NV_STATUS __nvoc_up_thunk_RsClient_rmclientDestructResourceRef(struct RmClient *pClient, RsServer *pServer, struct RsResourceRef *pResourceRef) { return clientDestructResourceRef((struct RsClient *)(((unsigned char *) pClient) + __nvoc_rtti_RmClient_RsClient.offset), pServer, pResourceRef); } // rmclientUnmapMemory: virtual inherited (client) base (client) -static NV_STATUS __nvoc_up_thunk_RsClient_rmclientUnmapMemory(struct RmClient *pClient, struct RsResourceRef *pResourceRef, struct RS_LOCK_INFO *pLockInfo, struct RsCpuMapping **ppCpuMapping, API_SECURITY_INFO *pSecInfo) { +NV_STATUS __nvoc_up_thunk_RsClient_rmclientUnmapMemory(struct RmClient *pClient, struct RsResourceRef *pResourceRef, struct RS_LOCK_INFO *pLockInfo, struct RsCpuMapping **ppCpuMapping, API_SECURITY_INFO *pSecInfo) { return clientUnmapMemory((struct RsClient *)(((unsigned char *) pClient) + __nvoc_rtti_RmClient_RsClient.offset), pResourceRef, pLockInfo, ppCpuMapping, pSecInfo); } // rmclientValidateNewResourceHandle: virtual inherited (client) base (client) -static NV_STATUS __nvoc_up_thunk_RsClient_rmclientValidateNewResourceHandle(struct RmClient *pClient, NvHandle hResource, NvBool bRestrict) { +NV_STATUS __nvoc_up_thunk_RsClient_rmclientValidateNewResourceHandle(struct RmClient *pClient, NvHandle hResource, NvBool bRestrict) { return clientValidateNewResourceHandle((struct RsClient *)(((unsigned char *) pClient) + __nvoc_rtti_RmClient_RsClient.offset), hResource, bRestrict); } // rmclientShareResource: virtual inherited (client) base (client) -static NV_STATUS __nvoc_up_thunk_RsClient_rmclientShareResource(struct RmClient *pClient, struct RsResourceRef *pResourceRef, RS_SHARE_POLICY *pSharePolicy, struct CALL_CONTEXT *pCallContext) { +NV_STATUS __nvoc_up_thunk_RsClient_rmclientShareResource(struct RmClient *pClient, struct RsResourceRef *pResourceRef, RS_SHARE_POLICY *pSharePolicy, struct CALL_CONTEXT *pCallContext) { return clientShareResource((struct RsClient *)(((unsigned char *) pClient) + __nvoc_rtti_RmClient_RsClient.offset), pResourceRef, pSharePolicy, pCallContext); } @@ -352,57 +372,43 @@ NV_STATUS __nvoc_ctor_RmClient(RmClient *pThis, struct PORT_MEM_ALLOCATOR * arg_ // Vtable initialization static void __nvoc_init_funcTable_RmClient_1(RmClient *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // rmclientValidate -- virtual override (client) base (client) - pThis->__rmclientValidate__ = &rmclientValidate_IMPL; - pThis->__nvoc_base_RsClient.__clientValidate__ = &__nvoc_down_thunk_RmClient_clientValidate; - - // rmclientValidateLocks -- virtual override (client) base (client) - pThis->__rmclientValidateLocks__ = &rmclientValidateLocks_IMPL; - pThis->__nvoc_base_RsClient.__clientValidateLocks__ = &__nvoc_down_thunk_RmClient_clientValidateLocks; - - // rmclientFreeResource -- virtual override (client) base (client) - pThis->__rmclientFreeResource__ = &rmclientFreeResource_IMPL; - pThis->__nvoc_base_RsClient.__clientFreeResource__ = &__nvoc_down_thunk_RmClient_clientFreeResource; - - // rmclientInterMap -- virtual override (client) base (client) - pThis->__rmclientInterMap__ = &rmclientInterMap_IMPL; - pThis->__nvoc_base_RsClient.__clientInterMap__ = &__nvoc_down_thunk_RmClient_clientInterMap; - - // rmclientInterUnmap -- virtual override (client) base (client) - pThis->__rmclientInterUnmap__ = &rmclientInterUnmap_IMPL; - pThis->__nvoc_base_RsClient.__clientInterUnmap__ = &__nvoc_down_thunk_RmClient_clientInterUnmap; - - // rmclientPostProcessPendingFreeList -- virtual override (client) base (client) - pThis->__rmclientPostProcessPendingFreeList__ = &rmclientPostProcessPendingFreeList_IMPL; - pThis->__nvoc_base_RsClient.__clientPostProcessPendingFreeList__ = &__nvoc_down_thunk_RmClient_clientPostProcessPendingFreeList; - - // rmclientGetCachedPrivilege -- virtual override (client) base (client) - pThis->__rmclientGetCachedPrivilege__ = &rmclientGetCachedPrivilege_IMPL; - pThis->__nvoc_base_RsClient.__clientGetCachedPrivilege__ = &__nvoc_down_thunk_RmClient_clientGetCachedPrivilege; - - // rmclientIsAdmin -- virtual override (client) base (client) - pThis->__rmclientIsAdmin__ = &rmclientIsAdmin_IMPL; - pThis->__nvoc_base_RsClient.__clientIsAdmin__ = &__nvoc_down_thunk_RmClient_clientIsAdmin; - - // rmclientDestructResourceRef -- virtual inherited (client) base (client) - pThis->__rmclientDestructResourceRef__ = &__nvoc_up_thunk_RsClient_rmclientDestructResourceRef; - - // rmclientUnmapMemory -- virtual inherited (client) base (client) - pThis->__rmclientUnmapMemory__ = &__nvoc_up_thunk_RsClient_rmclientUnmapMemory; - - // rmclientValidateNewResourceHandle -- virtual inherited (client) base (client) - pThis->__rmclientValidateNewResourceHandle__ = &__nvoc_up_thunk_RsClient_rmclientValidateNewResourceHandle; - - // rmclientShareResource -- virtual inherited (client) base (client) - pThis->__rmclientShareResource__ = &__nvoc_up_thunk_RsClient_rmclientShareResource; -} // End __nvoc_init_funcTable_RmClient_1 with approximately 20 basic block(s). +} // End __nvoc_init_funcTable_RmClient_1 // Initialize vtable(s) for 12 virtual method(s). void __nvoc_init_funcTable_RmClient(RmClient *pThis) { - // Initialize vtable(s) with 12 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__RmClient vtable = { + .__rmclientValidate__ = &rmclientValidate_IMPL, // virtual override (client) base (client) + .RsClient.__clientValidate__ = &__nvoc_down_thunk_RmClient_clientValidate, // virtual + .__rmclientValidateLocks__ = &rmclientValidateLocks_IMPL, // virtual override (client) base (client) + .RsClient.__clientValidateLocks__ = &__nvoc_down_thunk_RmClient_clientValidateLocks, // virtual + .__rmclientFreeResource__ = &rmclientFreeResource_IMPL, // virtual override (client) base (client) + .RsClient.__clientFreeResource__ = &__nvoc_down_thunk_RmClient_clientFreeResource, // virtual + .__rmclientInterMap__ = &rmclientInterMap_IMPL, // virtual override (client) base (client) + .RsClient.__clientInterMap__ = &__nvoc_down_thunk_RmClient_clientInterMap, // virtual + .__rmclientInterUnmap__ = &rmclientInterUnmap_IMPL, // virtual override (client) base (client) + .RsClient.__clientInterUnmap__ = &__nvoc_down_thunk_RmClient_clientInterUnmap, // virtual + .__rmclientPostProcessPendingFreeList__ = &rmclientPostProcessPendingFreeList_IMPL, // virtual override (client) base (client) + .RsClient.__clientPostProcessPendingFreeList__ = &__nvoc_down_thunk_RmClient_clientPostProcessPendingFreeList, // virtual + .__rmclientGetCachedPrivilege__ = &rmclientGetCachedPrivilege_IMPL, // virtual override (client) base (client) + .RsClient.__clientGetCachedPrivilege__ = &__nvoc_down_thunk_RmClient_clientGetCachedPrivilege, // virtual + .__rmclientIsAdmin__ = &rmclientIsAdmin_IMPL, // virtual override (client) base (client) + .RsClient.__clientIsAdmin__ = &__nvoc_down_thunk_RmClient_clientIsAdmin, // virtual + .__rmclientDestructResourceRef__ = &__nvoc_up_thunk_RsClient_rmclientDestructResourceRef, // virtual inherited (client) base (client) + .RsClient.__clientDestructResourceRef__ = &clientDestructResourceRef_IMPL, // virtual + .__rmclientUnmapMemory__ = &__nvoc_up_thunk_RsClient_rmclientUnmapMemory, // virtual inherited (client) base (client) + .RsClient.__clientUnmapMemory__ = &clientUnmapMemory_IMPL, // virtual + .__rmclientValidateNewResourceHandle__ = &__nvoc_up_thunk_RsClient_rmclientValidateNewResourceHandle, // virtual inherited (client) base (client) + .RsClient.__clientValidateNewResourceHandle__ = &clientValidateNewResourceHandle_IMPL, // virtual + .__rmclientShareResource__ = &__nvoc_up_thunk_RsClient_rmclientShareResource, // virtual inherited (client) base (client) + .RsClient.__clientShareResource__ = &clientShareResource_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RsClient.__nvoc_vtable = &vtable.RsClient; // (client) super + pThis->__nvoc_vtable = &vtable; // (rmclient) this __nvoc_init_funcTable_RmClient_1(pThis); } diff --git a/src/nvidia/generated/g_client_nvoc.h b/src/nvidia/generated/g_client_nvoc.h index 45085f2980..d94cfdfe8e 100644 --- a/src/nvidia/generated/g_client_nvoc.h +++ b/src/nvidia/generated/g_client_nvoc.h @@ -7,14 +7,14 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -146,10 +146,15 @@ void userinfoDestruct_IMPL(struct UserInfo *pUserInfo); #endif +// Metadata including vtable +struct NVOC_VTABLE__RmClient; + + struct RmClient { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__RmClient *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RsClient __nvoc_base_RsClient; @@ -159,20 +164,6 @@ struct RmClient { struct RsClient *__nvoc_pbase_RsClient; // client super struct RmClient *__nvoc_pbase_RmClient; // rmclient - // Vtable with 12 per-object function pointers - NV_STATUS (*__rmclientValidate__)(struct RmClient * /*this*/, const API_SECURITY_INFO *); // virtual override (client) base (client) - NV_STATUS (*__rmclientValidateLocks__)(struct RmClient * /*this*/, struct RsServer *, const struct CLIENT_ENTRY *); // virtual override (client) base (client) - NV_STATUS (*__rmclientFreeResource__)(struct RmClient * /*this*/, struct RsServer *, struct RS_RES_FREE_PARAMS_INTERNAL *); // virtual override (client) base (client) - NV_STATUS (*__rmclientInterMap__)(struct RmClient * /*this*/, struct RsResourceRef *, struct RsResourceRef *, struct RS_INTER_MAP_PARAMS *); // virtual override (client) base (client) - NV_STATUS (*__rmclientInterUnmap__)(struct RmClient * /*this*/, struct RsResourceRef *, struct RS_INTER_UNMAP_PARAMS *); // virtual override (client) base (client) - NV_STATUS (*__rmclientPostProcessPendingFreeList__)(struct RmClient * /*this*/, struct RsResourceRef **); // virtual override (client) base (client) - RS_PRIV_LEVEL (*__rmclientGetCachedPrivilege__)(struct RmClient * /*this*/); // virtual override (client) base (client) - NvBool (*__rmclientIsAdmin__)(struct RmClient * /*this*/, RS_PRIV_LEVEL); // virtual override (client) base (client) - NV_STATUS (*__rmclientDestructResourceRef__)(struct RmClient * /*this*/, RsServer *, struct RsResourceRef *); // virtual inherited (client) base (client) - NV_STATUS (*__rmclientUnmapMemory__)(struct RmClient * /*this*/, struct RsResourceRef *, struct RS_LOCK_INFO *, struct RsCpuMapping **, API_SECURITY_INFO *); // virtual inherited (client) base (client) - NV_STATUS (*__rmclientValidateNewResourceHandle__)(struct RmClient * /*this*/, NvHandle, NvBool); // virtual inherited (client) base (client) - NV_STATUS (*__rmclientShareResource__)(struct RmClient * /*this*/, struct RsResourceRef *, RS_SHARE_POLICY *, struct CALL_CONTEXT *); // virtual inherited (client) base (client) - // Data members RS_PRIV_LEVEL cachedPrivilege; NvBool bIsRootNonPriv; @@ -194,6 +185,25 @@ struct RmClient { NvS32 lockStressCounter; }; + +// Metadata including vtable with 12 function pointers plus superclass metadata +struct NVOC_VTABLE__RmClient { + const struct NVOC_VTABLE__RsClient RsClient; // (client) 12 function pointers + + NV_STATUS (*__rmclientValidate__)(struct RmClient * /*this*/, const API_SECURITY_INFO *); // virtual override (client) base (client) + NV_STATUS (*__rmclientValidateLocks__)(struct RmClient * /*this*/, struct RsServer *, const struct CLIENT_ENTRY *); // virtual override (client) base (client) + NV_STATUS (*__rmclientFreeResource__)(struct RmClient * /*this*/, struct RsServer *, struct RS_RES_FREE_PARAMS_INTERNAL *); // virtual override (client) base (client) + NV_STATUS (*__rmclientInterMap__)(struct RmClient * /*this*/, struct RsResourceRef *, struct RsResourceRef *, struct RS_INTER_MAP_PARAMS *); // virtual override (client) base (client) + NV_STATUS (*__rmclientInterUnmap__)(struct RmClient * /*this*/, struct RsResourceRef *, struct RS_INTER_UNMAP_PARAMS *); // virtual override (client) base (client) + NV_STATUS (*__rmclientPostProcessPendingFreeList__)(struct RmClient * /*this*/, struct RsResourceRef **); // virtual override (client) base (client) + RS_PRIV_LEVEL (*__rmclientGetCachedPrivilege__)(struct RmClient * /*this*/); // virtual override (client) base (client) + NvBool (*__rmclientIsAdmin__)(struct RmClient * /*this*/, RS_PRIV_LEVEL); // virtual override (client) base (client) + NV_STATUS (*__rmclientDestructResourceRef__)(struct RmClient * /*this*/, RsServer *, struct RsResourceRef *); // virtual inherited (client) base (client) + NV_STATUS (*__rmclientUnmapMemory__)(struct RmClient * /*this*/, struct RsResourceRef *, struct RS_LOCK_INFO *, struct RsCpuMapping **, API_SECURITY_INFO *); // virtual inherited (client) base (client) + NV_STATUS (*__rmclientValidateNewResourceHandle__)(struct RmClient * /*this*/, NvHandle, NvBool); // virtual inherited (client) base (client) + NV_STATUS (*__rmclientShareResource__)(struct RmClient * /*this*/, struct RsResourceRef *, RS_SHARE_POLICY *, struct CALL_CONTEXT *); // virtual inherited (client) base (client) +}; + #ifndef __NVOC_CLASS_RmClient_TYPEDEF__ #define __NVOC_CLASS_RmClient_TYPEDEF__ typedef struct RmClient RmClient; @@ -224,78 +234,78 @@ NV_STATUS __nvoc_objCreate_RmClient(RmClient**, Dynamic*, NvU32, struct PORT_MEM // Wrapper macros -#define rmclientValidate_FNPTR(pClient) pClient->__rmclientValidate__ +#define rmclientValidate_FNPTR(pClient) pClient->__nvoc_vtable->__rmclientValidate__ #define rmclientValidate(pClient, pSecInfo) rmclientValidate_DISPATCH(pClient, pSecInfo) -#define rmclientValidateLocks_FNPTR(pClient) pClient->__rmclientValidateLocks__ +#define rmclientValidateLocks_FNPTR(pClient) pClient->__nvoc_vtable->__rmclientValidateLocks__ #define rmclientValidateLocks(pClient, pServer, pClientEntry) rmclientValidateLocks_DISPATCH(pClient, pServer, pClientEntry) -#define rmclientFreeResource_FNPTR(pClient) pClient->__rmclientFreeResource__ +#define rmclientFreeResource_FNPTR(pClient) pClient->__nvoc_vtable->__rmclientFreeResource__ #define rmclientFreeResource(pClient, pServer, pParams) rmclientFreeResource_DISPATCH(pClient, pServer, pParams) -#define rmclientInterMap_FNPTR(pClient) pClient->__rmclientInterMap__ +#define rmclientInterMap_FNPTR(pClient) pClient->__nvoc_vtable->__rmclientInterMap__ #define rmclientInterMap(pClient, pMapperRef, pMappableRef, pParams) rmclientInterMap_DISPATCH(pClient, pMapperRef, pMappableRef, pParams) -#define rmclientInterUnmap_FNPTR(pClient) pClient->__rmclientInterUnmap__ +#define rmclientInterUnmap_FNPTR(pClient) pClient->__nvoc_vtable->__rmclientInterUnmap__ #define rmclientInterUnmap(pClient, pMapperRef, pParams) rmclientInterUnmap_DISPATCH(pClient, pMapperRef, pParams) -#define rmclientPostProcessPendingFreeList_FNPTR(pClient) pClient->__rmclientPostProcessPendingFreeList__ +#define rmclientPostProcessPendingFreeList_FNPTR(pClient) pClient->__nvoc_vtable->__rmclientPostProcessPendingFreeList__ #define rmclientPostProcessPendingFreeList(pClient, ppFirstLowPriRef) rmclientPostProcessPendingFreeList_DISPATCH(pClient, ppFirstLowPriRef) -#define rmclientGetCachedPrivilege_FNPTR(pClient) pClient->__rmclientGetCachedPrivilege__ +#define rmclientGetCachedPrivilege_FNPTR(pClient) pClient->__nvoc_vtable->__rmclientGetCachedPrivilege__ #define rmclientGetCachedPrivilege(pClient) rmclientGetCachedPrivilege_DISPATCH(pClient) -#define rmclientIsAdmin_FNPTR(pClient) pClient->__rmclientIsAdmin__ +#define rmclientIsAdmin_FNPTR(pClient) pClient->__nvoc_vtable->__rmclientIsAdmin__ #define rmclientIsAdmin(pClient, privLevel) rmclientIsAdmin_DISPATCH(pClient, privLevel) -#define rmclientDestructResourceRef_FNPTR(pClient) pClient->__nvoc_base_RsClient.__clientDestructResourceRef__ +#define rmclientDestructResourceRef_FNPTR(pClient) pClient->__nvoc_base_RsClient.__nvoc_vtable->__clientDestructResourceRef__ #define rmclientDestructResourceRef(pClient, pServer, pResourceRef) rmclientDestructResourceRef_DISPATCH(pClient, pServer, pResourceRef) -#define rmclientUnmapMemory_FNPTR(pClient) pClient->__nvoc_base_RsClient.__clientUnmapMemory__ +#define rmclientUnmapMemory_FNPTR(pClient) pClient->__nvoc_base_RsClient.__nvoc_vtable->__clientUnmapMemory__ #define rmclientUnmapMemory(pClient, pResourceRef, pLockInfo, ppCpuMapping, pSecInfo) rmclientUnmapMemory_DISPATCH(pClient, pResourceRef, pLockInfo, ppCpuMapping, pSecInfo) -#define rmclientValidateNewResourceHandle_FNPTR(pClient) pClient->__nvoc_base_RsClient.__clientValidateNewResourceHandle__ +#define rmclientValidateNewResourceHandle_FNPTR(pClient) pClient->__nvoc_base_RsClient.__nvoc_vtable->__clientValidateNewResourceHandle__ #define rmclientValidateNewResourceHandle(pClient, hResource, bRestrict) rmclientValidateNewResourceHandle_DISPATCH(pClient, hResource, bRestrict) -#define rmclientShareResource_FNPTR(pClient) pClient->__nvoc_base_RsClient.__clientShareResource__ +#define rmclientShareResource_FNPTR(pClient) pClient->__nvoc_base_RsClient.__nvoc_vtable->__clientShareResource__ #define rmclientShareResource(pClient, pResourceRef, pSharePolicy, pCallContext) rmclientShareResource_DISPATCH(pClient, pResourceRef, pSharePolicy, pCallContext) // Dispatch functions static inline NV_STATUS rmclientValidate_DISPATCH(struct RmClient *pClient, const API_SECURITY_INFO *pSecInfo) { - return pClient->__rmclientValidate__(pClient, pSecInfo); + return pClient->__nvoc_vtable->__rmclientValidate__(pClient, pSecInfo); } static inline NV_STATUS rmclientValidateLocks_DISPATCH(struct RmClient *pClient, struct RsServer *pServer, const struct CLIENT_ENTRY *pClientEntry) { - return pClient->__rmclientValidateLocks__(pClient, pServer, pClientEntry); + return pClient->__nvoc_vtable->__rmclientValidateLocks__(pClient, pServer, pClientEntry); } static inline NV_STATUS rmclientFreeResource_DISPATCH(struct RmClient *pClient, struct RsServer *pServer, struct RS_RES_FREE_PARAMS_INTERNAL *pParams) { - return pClient->__rmclientFreeResource__(pClient, pServer, pParams); + return pClient->__nvoc_vtable->__rmclientFreeResource__(pClient, pServer, pParams); } static inline NV_STATUS rmclientInterMap_DISPATCH(struct RmClient *pClient, struct RsResourceRef *pMapperRef, struct RsResourceRef *pMappableRef, struct RS_INTER_MAP_PARAMS *pParams) { - return pClient->__rmclientInterMap__(pClient, pMapperRef, pMappableRef, pParams); + return pClient->__nvoc_vtable->__rmclientInterMap__(pClient, pMapperRef, pMappableRef, pParams); } static inline NV_STATUS rmclientInterUnmap_DISPATCH(struct RmClient *pClient, struct RsResourceRef *pMapperRef, struct RS_INTER_UNMAP_PARAMS *pParams) { - return pClient->__rmclientInterUnmap__(pClient, pMapperRef, pParams); + return pClient->__nvoc_vtable->__rmclientInterUnmap__(pClient, pMapperRef, pParams); } static inline NV_STATUS rmclientPostProcessPendingFreeList_DISPATCH(struct RmClient *pClient, struct RsResourceRef **ppFirstLowPriRef) { - return pClient->__rmclientPostProcessPendingFreeList__(pClient, ppFirstLowPriRef); + return pClient->__nvoc_vtable->__rmclientPostProcessPendingFreeList__(pClient, ppFirstLowPriRef); } static inline RS_PRIV_LEVEL rmclientGetCachedPrivilege_DISPATCH(struct RmClient *pClient) { - return pClient->__rmclientGetCachedPrivilege__(pClient); + return pClient->__nvoc_vtable->__rmclientGetCachedPrivilege__(pClient); } static inline NvBool rmclientIsAdmin_DISPATCH(struct RmClient *pClient, RS_PRIV_LEVEL privLevel) { - return pClient->__rmclientIsAdmin__(pClient, privLevel); + return pClient->__nvoc_vtable->__rmclientIsAdmin__(pClient, privLevel); } static inline NV_STATUS rmclientDestructResourceRef_DISPATCH(struct RmClient *pClient, RsServer *pServer, struct RsResourceRef *pResourceRef) { - return pClient->__rmclientDestructResourceRef__(pClient, pServer, pResourceRef); + return pClient->__nvoc_vtable->__rmclientDestructResourceRef__(pClient, pServer, pResourceRef); } static inline NV_STATUS rmclientUnmapMemory_DISPATCH(struct RmClient *pClient, struct RsResourceRef *pResourceRef, struct RS_LOCK_INFO *pLockInfo, struct RsCpuMapping **ppCpuMapping, API_SECURITY_INFO *pSecInfo) { - return pClient->__rmclientUnmapMemory__(pClient, pResourceRef, pLockInfo, ppCpuMapping, pSecInfo); + return pClient->__nvoc_vtable->__rmclientUnmapMemory__(pClient, pResourceRef, pLockInfo, ppCpuMapping, pSecInfo); } static inline NV_STATUS rmclientValidateNewResourceHandle_DISPATCH(struct RmClient *pClient, NvHandle hResource, NvBool bRestrict) { - return pClient->__rmclientValidateNewResourceHandle__(pClient, hResource, bRestrict); + return pClient->__nvoc_vtable->__rmclientValidateNewResourceHandle__(pClient, hResource, bRestrict); } static inline NV_STATUS rmclientShareResource_DISPATCH(struct RmClient *pClient, struct RsResourceRef *pResourceRef, RS_SHARE_POLICY *pSharePolicy, struct CALL_CONTEXT *pCallContext) { - return pClient->__rmclientShareResource__(pClient, pResourceRef, pSharePolicy, pCallContext); + return pClient->__nvoc_vtable->__rmclientShareResource__(pClient, pResourceRef, pSharePolicy, pCallContext); } NV_STATUS rmclientValidate_IMPL(struct RmClient *pClient, const API_SECURITY_INFO *pSecInfo); @@ -387,7 +397,6 @@ void rmclientPromoteDebuggerStateByHandle(NvHandle hClient, NvU32 newMinimumStat void *rmclientGetSecurityTokenByHandle(NvHandle hClient); NV_STATUS rmclientUserClientSecurityCheckByHandle(NvHandle hClient, const API_SECURITY_INFO *pSecInfo); NvBool rmclientIsCapableOrAdminByHandle(NvHandle hClient, NvU32 capability, RS_PRIV_LEVEL privLevel); -NvBool rmclientIsCapableByHandle(NvHandle hClient, NvU32 capability); #endif diff --git a/src/nvidia/generated/g_client_resource_nvoc.c b/src/nvidia/generated/g_client_resource_nvoc.c index eee00d3834..5f287a3ca1 100644 --- a/src/nvidia/generated/g_client_resource_nvoc.c +++ b/src/nvidia/generated/g_client_resource_nvoc.c @@ -1716,123 +1716,173 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_RmClient }; +// Down-thunk(s) to bridge methods from ancestors (if any) +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NvBool __nvoc_down_thunk_RmClientResource_resAccessCallback(struct RsResource *pRmCliRes, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_down_thunk_RmClientResource_resShareCallback(struct RsResource *pRmCliRes, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_down_thunk_RmClientResource_resControl_Prologue(struct RsResource *pRmCliRes, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_down_thunk_RmClientResource_resControl_Epilogue(struct RsResource *pRmCliRes, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this + // 4 down-thunk(s) defined to bridge methods in RmClientResource from superclasses // cliresAccessCallback: virtual override (res) base (clientres) -static NvBool __nvoc_down_thunk_RmClientResource_resAccessCallback(struct RsResource *pRmCliRes, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_down_thunk_RmClientResource_resAccessCallback(struct RsResource *pRmCliRes, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return cliresAccessCallback((struct RmClientResource *)(((unsigned char *) pRmCliRes) - __nvoc_rtti_RmClientResource_RsResource.offset), pInvokingClient, pAllocParams, accessRight); } // cliresShareCallback: virtual override (res) base (clientres) -static NvBool __nvoc_down_thunk_RmClientResource_resShareCallback(struct RsResource *pRmCliRes, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_down_thunk_RmClientResource_resShareCallback(struct RsResource *pRmCliRes, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return cliresShareCallback((struct RmClientResource *)(((unsigned char *) pRmCliRes) - __nvoc_rtti_RmClientResource_RsResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // cliresControl_Prologue: virtual override (res) base (clientres) -static NV_STATUS __nvoc_down_thunk_RmClientResource_resControl_Prologue(struct RsResource *pRmCliRes, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_down_thunk_RmClientResource_resControl_Prologue(struct RsResource *pRmCliRes, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return cliresControl_Prologue((struct RmClientResource *)(((unsigned char *) pRmCliRes) - __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pParams); } // cliresControl_Epilogue: virtual override (res) base (clientres) -static void __nvoc_down_thunk_RmClientResource_resControl_Epilogue(struct RsResource *pRmCliRes, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_down_thunk_RmClientResource_resControl_Epilogue(struct RsResource *pRmCliRes, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { cliresControl_Epilogue((struct RmClientResource *)(((unsigned char *) pRmCliRes) - __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pParams); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_clientresCanCopy(struct RsClientResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_clientresIsDuplicate(struct RsClientResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_clientresPreDestruct(struct RsClientResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_clientresControl(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_clientresControlFilter(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_clientresControlSerialization_Prologue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RsResource_clientresControlSerialization_Epilogue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_clientresControl_Prologue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RsResource_clientresControl_Epilogue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_clientresMap(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_clientresUnmap(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_clientresIsPartialUnmapSupported(struct RsClientResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_clientresMapTo(struct RsClientResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_clientresUnmapFrom(struct RsClientResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_clientresGetRefCount(struct RsClientResource *pResource); // super +NvBool __nvoc_up_thunk_RsResource_clientresAccessCallback(struct RsClientResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RsResource_clientresShareCallback(struct RsClientResource *pResource, struct RsClient *pInvokingClient, RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +void __nvoc_up_thunk_RsResource_clientresAddAdditionalDependants(struct RsClient *pClient, struct RsClientResource *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_RsResource_cliresCanCopy(struct RmClientResource *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_cliresIsDuplicate(struct RmClientResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_cliresPreDestruct(struct RmClientResource *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_cliresControl(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_cliresControlFilter(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_cliresControlSerialization_Prologue(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RsResource_cliresControlSerialization_Epilogue(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_cliresMap(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_cliresUnmap(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_cliresIsPartialUnmapSupported(struct RmClientResource *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_cliresMapTo(struct RmClientResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_cliresUnmapFrom(struct RmClientResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_cliresGetRefCount(struct RmClientResource *pResource); // this +void __nvoc_up_thunk_RsResource_cliresAddAdditionalDependants(struct RsClient *pClient, struct RmClientResource *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_cliresGetNotificationListPtr(struct RmClientResource *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_cliresGetNotificationShare(struct RmClientResource *pNotifier); // this +void __nvoc_up_thunk_Notifier_cliresSetNotificationShare(struct RmClientResource *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_cliresUnregisterEvent(struct RmClientResource *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_cliresGetOrAllocNotifShare(struct RmClientResource *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 19 up-thunk(s) defined to bridge methods in RmClientResource to superclasses // cliresCanCopy: virtual inherited (res) base (clientres) -static NvBool __nvoc_up_thunk_RsResource_cliresCanCopy(struct RmClientResource *pResource) { +NvBool __nvoc_up_thunk_RsResource_cliresCanCopy(struct RmClientResource *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset)); } // cliresIsDuplicate: virtual inherited (res) base (clientres) -static NV_STATUS __nvoc_up_thunk_RsResource_cliresIsDuplicate(struct RmClientResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_cliresIsDuplicate(struct RmClientResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), hMemory, pDuplicate); } // cliresPreDestruct: virtual inherited (res) base (clientres) -static void __nvoc_up_thunk_RsResource_cliresPreDestruct(struct RmClientResource *pResource) { +void __nvoc_up_thunk_RsResource_cliresPreDestruct(struct RmClientResource *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset)); } // cliresControl: virtual inherited (res) base (clientres) -static NV_STATUS __nvoc_up_thunk_RsResource_cliresControl(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_cliresControl(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pParams); } // cliresControlFilter: virtual inherited (res) base (clientres) -static NV_STATUS __nvoc_up_thunk_RsResource_cliresControlFilter(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_cliresControlFilter(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pParams); } // cliresControlSerialization_Prologue: virtual inherited (res) base (clientres) -static NV_STATUS __nvoc_up_thunk_RsResource_cliresControlSerialization_Prologue(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_cliresControlSerialization_Prologue(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlSerialization_Prologue((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pParams); } // cliresControlSerialization_Epilogue: virtual inherited (res) base (clientres) -static void __nvoc_up_thunk_RsResource_cliresControlSerialization_Epilogue(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RsResource_cliresControlSerialization_Epilogue(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { resControlSerialization_Epilogue((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pParams); } // cliresMap: virtual inherited (res) base (clientres) -static NV_STATUS __nvoc_up_thunk_RsResource_cliresMap(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_cliresMap(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pParams, pCpuMapping); } // cliresUnmap: virtual inherited (res) base (clientres) -static NV_STATUS __nvoc_up_thunk_RsResource_cliresUnmap(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_cliresUnmap(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pCallContext, pCpuMapping); } // cliresIsPartialUnmapSupported: inline virtual inherited (res) base (clientres) body -static NvBool __nvoc_up_thunk_RsResource_cliresIsPartialUnmapSupported(struct RmClientResource *pResource) { +NvBool __nvoc_up_thunk_RsResource_cliresIsPartialUnmapSupported(struct RmClientResource *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset)); } // cliresMapTo: virtual inherited (res) base (clientres) -static NV_STATUS __nvoc_up_thunk_RsResource_cliresMapTo(struct RmClientResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_cliresMapTo(struct RmClientResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pParams); } // cliresUnmapFrom: virtual inherited (res) base (clientres) -static NV_STATUS __nvoc_up_thunk_RsResource_cliresUnmapFrom(struct RmClientResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_cliresUnmapFrom(struct RmClientResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pParams); } // cliresGetRefCount: virtual inherited (res) base (clientres) -static NvU32 __nvoc_up_thunk_RsResource_cliresGetRefCount(struct RmClientResource *pResource) { +NvU32 __nvoc_up_thunk_RsResource_cliresGetRefCount(struct RmClientResource *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset)); } // cliresAddAdditionalDependants: virtual inherited (res) base (clientres) -static void __nvoc_up_thunk_RsResource_cliresAddAdditionalDependants(struct RsClient *pClient, struct RmClientResource *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_cliresAddAdditionalDependants(struct RsClient *pClient, struct RmClientResource *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmClientResource_RsResource.offset), pReference); } // cliresGetNotificationListPtr: virtual inherited (notify) base (notify) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_cliresGetNotificationListPtr(struct RmClientResource *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_cliresGetNotificationListPtr(struct RmClientResource *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_RmClientResource_Notifier.offset)); } // cliresGetNotificationShare: virtual inherited (notify) base (notify) -static struct NotifShare * __nvoc_up_thunk_Notifier_cliresGetNotificationShare(struct RmClientResource *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_cliresGetNotificationShare(struct RmClientResource *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_RmClientResource_Notifier.offset)); } // cliresSetNotificationShare: virtual inherited (notify) base (notify) -static void __nvoc_up_thunk_Notifier_cliresSetNotificationShare(struct RmClientResource *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_cliresSetNotificationShare(struct RmClientResource *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_RmClientResource_Notifier.offset), pNotifShare); } // cliresUnregisterEvent: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_cliresUnregisterEvent(struct RmClientResource *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_cliresUnregisterEvent(struct RmClientResource *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_RmClientResource_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // cliresGetOrAllocNotifShare: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_cliresGetOrAllocNotifShare(struct RmClientResource *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_cliresGetOrAllocNotifShare(struct RmClientResource *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_RmClientResource_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -1891,22 +1941,6 @@ NV_STATUS __nvoc_ctor_RmClientResource(RmClientResource *pThis, struct CALL_CONT static void __nvoc_init_funcTable_RmClientResource_1(RmClientResource *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // cliresAccessCallback -- virtual override (res) base (clientres) - pThis->__cliresAccessCallback__ = &cliresAccessCallback_IMPL; - pThis->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmClientResource_resAccessCallback; - - // cliresShareCallback -- virtual override (res) base (clientres) - pThis->__cliresShareCallback__ = &cliresShareCallback_IMPL; - pThis->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmClientResource_resShareCallback; - - // cliresControl_Prologue -- virtual override (res) base (clientres) - pThis->__cliresControl_Prologue__ = &cliresControl_Prologue_IMPL; - pThis->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmClientResource_resControl_Prologue; - - // cliresControl_Epilogue -- virtual override (res) base (clientres) - pThis->__cliresControl_Epilogue__ = &cliresControl_Epilogue_IMPL; - pThis->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmClientResource_resControl_Epilogue; - // cliresCtrlCmdSystemGetCpuInfo -- exported (id=0x102) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__cliresCtrlCmdSystemGetCpuInfo__ = &cliresCtrlCmdSystemGetCpuInfo_IMPL; @@ -2441,70 +2475,307 @@ static void __nvoc_init_funcTable_RmClientResource_1(RmClientResource *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cliresCtrlCmdSystemPfmreqhndlrGetExtendedPerfSensorCounters__ = &cliresCtrlCmdSystemPfmreqhndlrGetExtendedPerfSensorCounters_IMPL; #endif - - // cliresCanCopy -- virtual inherited (res) base (clientres) - pThis->__cliresCanCopy__ = &__nvoc_up_thunk_RsResource_cliresCanCopy; - - // cliresIsDuplicate -- virtual inherited (res) base (clientres) - pThis->__cliresIsDuplicate__ = &__nvoc_up_thunk_RsResource_cliresIsDuplicate; - - // cliresPreDestruct -- virtual inherited (res) base (clientres) - pThis->__cliresPreDestruct__ = &__nvoc_up_thunk_RsResource_cliresPreDestruct; - - // cliresControl -- virtual inherited (res) base (clientres) - pThis->__cliresControl__ = &__nvoc_up_thunk_RsResource_cliresControl; - - // cliresControlFilter -- virtual inherited (res) base (clientres) - pThis->__cliresControlFilter__ = &__nvoc_up_thunk_RsResource_cliresControlFilter; - - // cliresControlSerialization_Prologue -- virtual inherited (res) base (clientres) - pThis->__cliresControlSerialization_Prologue__ = &__nvoc_up_thunk_RsResource_cliresControlSerialization_Prologue; - - // cliresControlSerialization_Epilogue -- virtual inherited (res) base (clientres) - pThis->__cliresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RsResource_cliresControlSerialization_Epilogue; - - // cliresMap -- virtual inherited (res) base (clientres) - pThis->__cliresMap__ = &__nvoc_up_thunk_RsResource_cliresMap; - - // cliresUnmap -- virtual inherited (res) base (clientres) - pThis->__cliresUnmap__ = &__nvoc_up_thunk_RsResource_cliresUnmap; - - // cliresIsPartialUnmapSupported -- inline virtual inherited (res) base (clientres) body - pThis->__cliresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_cliresIsPartialUnmapSupported; - - // cliresMapTo -- virtual inherited (res) base (clientres) - pThis->__cliresMapTo__ = &__nvoc_up_thunk_RsResource_cliresMapTo; - - // cliresUnmapFrom -- virtual inherited (res) base (clientres) - pThis->__cliresUnmapFrom__ = &__nvoc_up_thunk_RsResource_cliresUnmapFrom; - - // cliresGetRefCount -- virtual inherited (res) base (clientres) - pThis->__cliresGetRefCount__ = &__nvoc_up_thunk_RsResource_cliresGetRefCount; - - // cliresAddAdditionalDependants -- virtual inherited (res) base (clientres) - pThis->__cliresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_cliresAddAdditionalDependants; - - // cliresGetNotificationListPtr -- virtual inherited (notify) base (notify) - pThis->__cliresGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_cliresGetNotificationListPtr; - - // cliresGetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__cliresGetNotificationShare__ = &__nvoc_up_thunk_Notifier_cliresGetNotificationShare; - - // cliresSetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__cliresSetNotificationShare__ = &__nvoc_up_thunk_Notifier_cliresSetNotificationShare; - - // cliresUnregisterEvent -- virtual inherited (notify) base (notify) - pThis->__cliresUnregisterEvent__ = &__nvoc_up_thunk_Notifier_cliresUnregisterEvent; - - // cliresGetOrAllocNotifShare -- virtual inherited (notify) base (notify) - pThis->__cliresGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_cliresGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_RmClientResource_1 with approximately 134 basic block(s). +} // End __nvoc_init_funcTable_RmClientResource_1 with approximately 107 basic block(s). // Initialize vtable(s) for 130 virtual method(s). void __nvoc_init_funcTable_RmClientResource(RmClientResource *pThis) { - // Initialize vtable(s) with 130 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__RmClientResource vtable = { + .__cliresAccessCallback__ = &cliresAccessCallback_IMPL, // virtual override (res) base (clientres) + .RsClientResource.__clientresAccessCallback__ = &__nvoc_up_thunk_RsResource_clientresAccessCallback, // virtual inherited (res) base (res) + .RsClientResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmClientResource_resAccessCallback, // virtual + .__cliresShareCallback__ = &cliresShareCallback_IMPL, // virtual override (res) base (clientres) + .RsClientResource.__clientresShareCallback__ = &__nvoc_up_thunk_RsResource_clientresShareCallback, // virtual inherited (res) base (res) + .RsClientResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmClientResource_resShareCallback, // virtual + .__cliresControl_Prologue__ = &cliresControl_Prologue_IMPL, // virtual override (res) base (clientres) + .RsClientResource.__clientresControl_Prologue__ = &__nvoc_up_thunk_RsResource_clientresControl_Prologue, // virtual inherited (res) base (res) + .RsClientResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmClientResource_resControl_Prologue, // virtual + .__cliresControl_Epilogue__ = &cliresControl_Epilogue_IMPL, // virtual override (res) base (clientres) + .RsClientResource.__clientresControl_Epilogue__ = &__nvoc_up_thunk_RsResource_clientresControl_Epilogue, // virtual inherited (res) base (res) + .RsClientResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmClientResource_resControl_Epilogue, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40bu) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x105u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x107u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xbu) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14004u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14004u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x5u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x5u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__cliresCanCopy__ = &__nvoc_up_thunk_RsResource_cliresCanCopy, // virtual inherited (res) base (clientres) + .RsClientResource.__clientresCanCopy__ = &__nvoc_up_thunk_RsResource_clientresCanCopy, // virtual inherited (res) base (res) + .RsClientResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__cliresIsDuplicate__ = &__nvoc_up_thunk_RsResource_cliresIsDuplicate, // virtual inherited (res) base (clientres) + .RsClientResource.__clientresIsDuplicate__ = &__nvoc_up_thunk_RsResource_clientresIsDuplicate, // virtual inherited (res) base (res) + .RsClientResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__cliresPreDestruct__ = &__nvoc_up_thunk_RsResource_cliresPreDestruct, // virtual inherited (res) base (clientres) + .RsClientResource.__clientresPreDestruct__ = &__nvoc_up_thunk_RsResource_clientresPreDestruct, // virtual inherited (res) base (res) + .RsClientResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__cliresControl__ = &__nvoc_up_thunk_RsResource_cliresControl, // virtual inherited (res) base (clientres) + .RsClientResource.__clientresControl__ = &__nvoc_up_thunk_RsResource_clientresControl, // virtual inherited (res) base (res) + .RsClientResource.RsResource.__resControl__ = &resControl_IMPL, // virtual + .__cliresControlFilter__ = &__nvoc_up_thunk_RsResource_cliresControlFilter, // virtual inherited (res) base (clientres) + .RsClientResource.__clientresControlFilter__ = &__nvoc_up_thunk_RsResource_clientresControlFilter, // virtual inherited (res) base (res) + .RsClientResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__cliresControlSerialization_Prologue__ = &__nvoc_up_thunk_RsResource_cliresControlSerialization_Prologue, // virtual inherited (res) base (clientres) + .RsClientResource.__clientresControlSerialization_Prologue__ = &__nvoc_up_thunk_RsResource_clientresControlSerialization_Prologue, // virtual inherited (res) base (res) + .RsClientResource.RsResource.__resControlSerialization_Prologue__ = &resControlSerialization_Prologue_IMPL, // virtual + .__cliresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RsResource_cliresControlSerialization_Epilogue, // virtual inherited (res) base (clientres) + .RsClientResource.__clientresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RsResource_clientresControlSerialization_Epilogue, // virtual inherited (res) base (res) + .RsClientResource.RsResource.__resControlSerialization_Epilogue__ = &resControlSerialization_Epilogue_IMPL, // virtual + .__cliresMap__ = &__nvoc_up_thunk_RsResource_cliresMap, // virtual inherited (res) base (clientres) + .RsClientResource.__clientresMap__ = &__nvoc_up_thunk_RsResource_clientresMap, // virtual inherited (res) base (res) + .RsClientResource.RsResource.__resMap__ = &resMap_IMPL, // virtual + .__cliresUnmap__ = &__nvoc_up_thunk_RsResource_cliresUnmap, // virtual inherited (res) base (clientres) + .RsClientResource.__clientresUnmap__ = &__nvoc_up_thunk_RsResource_clientresUnmap, // virtual inherited (res) base (res) + .RsClientResource.RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__cliresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_cliresIsPartialUnmapSupported, // inline virtual inherited (res) base (clientres) body + .RsClientResource.__clientresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_clientresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .RsClientResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__cliresMapTo__ = &__nvoc_up_thunk_RsResource_cliresMapTo, // virtual inherited (res) base (clientres) + .RsClientResource.__clientresMapTo__ = &__nvoc_up_thunk_RsResource_clientresMapTo, // virtual inherited (res) base (res) + .RsClientResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__cliresUnmapFrom__ = &__nvoc_up_thunk_RsResource_cliresUnmapFrom, // virtual inherited (res) base (clientres) + .RsClientResource.__clientresUnmapFrom__ = &__nvoc_up_thunk_RsResource_clientresUnmapFrom, // virtual inherited (res) base (res) + .RsClientResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__cliresGetRefCount__ = &__nvoc_up_thunk_RsResource_cliresGetRefCount, // virtual inherited (res) base (clientres) + .RsClientResource.__clientresGetRefCount__ = &__nvoc_up_thunk_RsResource_clientresGetRefCount, // virtual inherited (res) base (res) + .RsClientResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__cliresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_cliresAddAdditionalDependants, // virtual inherited (res) base (clientres) + .RsClientResource.__clientresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_clientresAddAdditionalDependants, // virtual inherited (res) base (res) + .RsClientResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__cliresGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_cliresGetNotificationListPtr, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__cliresGetNotificationShare__ = &__nvoc_up_thunk_Notifier_cliresGetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__cliresSetNotificationShare__ = &__nvoc_up_thunk_Notifier_cliresSetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__cliresUnregisterEvent__ = &__nvoc_up_thunk_Notifier_cliresUnregisterEvent, // virtual inherited (notify) base (notify) + .Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__cliresGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_cliresGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.RsClientResource.RsResource; // (res) super^2 + pThis->__nvoc_base_RsClientResource.__nvoc_vtable = &vtable.RsClientResource; // (clientres) super + pThis->__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.Notifier.INotifier; // (inotify) super^2 + pThis->__nvoc_base_Notifier.__nvoc_vtable = &vtable.Notifier; // (notify) super + pThis->__nvoc_vtable = &vtable; // (clires) this + + // Initialize vtable(s) with 107 per-object function pointer(s). __nvoc_init_funcTable_RmClientResource_1(pThis); } diff --git a/src/nvidia/generated/g_client_resource_nvoc.h b/src/nvidia/generated/g_client_resource_nvoc.h index fde4a05685..204b5fe6bd 100644 --- a/src/nvidia/generated/g_client_resource_nvoc.h +++ b/src/nvidia/generated/g_client_resource_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -76,10 +76,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__RmClientResource; + + struct RmClientResource { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__RmClientResource *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RsClientResource __nvoc_base_RsClientResource; @@ -95,11 +100,7 @@ struct RmClientResource { struct Notifier *__nvoc_pbase_Notifier; // notify super struct RmClientResource *__nvoc_pbase_RmClientResource; // clires - // Vtable with 130 per-object function pointers - NvBool (*__cliresAccessCallback__)(struct RmClientResource * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual override (res) base (clientres) - NvBool (*__cliresShareCallback__)(struct RmClientResource * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual override (res) base (clientres) - NV_STATUS (*__cliresControl_Prologue__)(struct RmClientResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (clientres) - void (*__cliresControl_Epilogue__)(struct RmClientResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (clientres) + // Vtable with 107 per-object function pointers NV_STATUS (*__cliresCtrlCmdSystemGetCpuInfo__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GET_CPU_INFO_PARAMS *); // exported (id=0x102) NV_STATUS (*__cliresCtrlCmdSystemGetFeatures__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GET_FEATURES_PARAMS *); // exported (id=0x1f0) NV_STATUS (*__cliresCtrlCmdSystemGetBuildVersionV2__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_GET_BUILD_VERSION_V2_PARAMS *); // exported (id=0x13e) @@ -207,6 +208,18 @@ struct RmClientResource { NV_STATUS (*__cliresCtrlCmdSystemPfmreqhndlrBatchControl__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_BATCH_CONTROL_PARAMS *); // exported (id=0x141) NV_STATUS (*__cliresCtrlCmdSystemPfmreqhndlrGetPerfSensorCounters__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_PERF_SENSOR_COUNTERS_PARAMS *); // exported (id=0x146) NV_STATUS (*__cliresCtrlCmdSystemPfmreqhndlrGetExtendedPerfSensorCounters__)(struct RmClientResource * /*this*/, NV0000_CTRL_SYSTEM_PFM_REQ_HNDLR_GET_PERF_SENSOR_COUNTERS_PARAMS *); // exported (id=0x147) +}; + + +// Metadata including vtable with 23 function pointers plus superclass metadata +struct NVOC_VTABLE__RmClientResource { + const struct NVOC_VTABLE__RsClientResource RsClientResource; // (clientres) 18 function pointers + const struct NVOC_VTABLE__Notifier Notifier; // (notify) 5 function pointers + + NvBool (*__cliresAccessCallback__)(struct RmClientResource * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual override (res) base (clientres) + NvBool (*__cliresShareCallback__)(struct RmClientResource * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual override (res) base (clientres) + NV_STATUS (*__cliresControl_Prologue__)(struct RmClientResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (clientres) + void (*__cliresControl_Epilogue__)(struct RmClientResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (clientres) NvBool (*__cliresCanCopy__)(struct RmClientResource * /*this*/); // virtual inherited (res) base (clientres) NV_STATUS (*__cliresIsDuplicate__)(struct RmClientResource * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (clientres) void (*__cliresPreDestruct__)(struct RmClientResource * /*this*/); // virtual inherited (res) base (clientres) @@ -258,13 +271,13 @@ NV_STATUS __nvoc_objCreate_RmClientResource(RmClientResource**, Dynamic*, NvU32, // Wrapper macros -#define cliresAccessCallback_FNPTR(pRmCliRes) pRmCliRes->__cliresAccessCallback__ +#define cliresAccessCallback_FNPTR(pRmCliRes) pRmCliRes->__nvoc_vtable->__cliresAccessCallback__ #define cliresAccessCallback(pRmCliRes, pInvokingClient, pAllocParams, accessRight) cliresAccessCallback_DISPATCH(pRmCliRes, pInvokingClient, pAllocParams, accessRight) -#define cliresShareCallback_FNPTR(pRmCliRes) pRmCliRes->__cliresShareCallback__ +#define cliresShareCallback_FNPTR(pRmCliRes) pRmCliRes->__nvoc_vtable->__cliresShareCallback__ #define cliresShareCallback(pRmCliRes, pInvokingClient, pParentRef, pSharePolicy) cliresShareCallback_DISPATCH(pRmCliRes, pInvokingClient, pParentRef, pSharePolicy) -#define cliresControl_Prologue_FNPTR(pRmCliRes) pRmCliRes->__cliresControl_Prologue__ +#define cliresControl_Prologue_FNPTR(pRmCliRes) pRmCliRes->__nvoc_vtable->__cliresControl_Prologue__ #define cliresControl_Prologue(pRmCliRes, pCallContext, pParams) cliresControl_Prologue_DISPATCH(pRmCliRes, pCallContext, pParams) -#define cliresControl_Epilogue_FNPTR(pRmCliRes) pRmCliRes->__cliresControl_Epilogue__ +#define cliresControl_Epilogue_FNPTR(pRmCliRes) pRmCliRes->__nvoc_vtable->__cliresControl_Epilogue__ #define cliresControl_Epilogue(pRmCliRes, pCallContext, pParams) cliresControl_Epilogue_DISPATCH(pRmCliRes, pCallContext, pParams) #define cliresCtrlCmdSystemGetCpuInfo_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemGetCpuInfo__ #define cliresCtrlCmdSystemGetCpuInfo(pRmCliRes, pCpuInfoParams) cliresCtrlCmdSystemGetCpuInfo_DISPATCH(pRmCliRes, pCpuInfoParams) @@ -480,60 +493,60 @@ NV_STATUS __nvoc_objCreate_RmClientResource(RmClientResource**, Dynamic*, NvU32, #define cliresCtrlCmdSystemPfmreqhndlrGetPerfSensorCounters(pRmCliRes, pParams) cliresCtrlCmdSystemPfmreqhndlrGetPerfSensorCounters_DISPATCH(pRmCliRes, pParams) #define cliresCtrlCmdSystemPfmreqhndlrGetExtendedPerfSensorCounters_FNPTR(pRmCliRes) pRmCliRes->__cliresCtrlCmdSystemPfmreqhndlrGetExtendedPerfSensorCounters__ #define cliresCtrlCmdSystemPfmreqhndlrGetExtendedPerfSensorCounters(pRmCliRes, pParams) cliresCtrlCmdSystemPfmreqhndlrGetExtendedPerfSensorCounters_DISPATCH(pRmCliRes, pParams) -#define cliresCanCopy_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resCanCopy__ +#define cliresCanCopy_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define cliresCanCopy(pResource) cliresCanCopy_DISPATCH(pResource) -#define cliresIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define cliresIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define cliresIsDuplicate(pResource, hMemory, pDuplicate) cliresIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define cliresPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resPreDestruct__ +#define cliresPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define cliresPreDestruct(pResource) cliresPreDestruct_DISPATCH(pResource) -#define cliresControl_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resControl__ +#define cliresControl_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__nvoc_vtable->__resControl__ #define cliresControl(pResource, pCallContext, pParams) cliresControl_DISPATCH(pResource, pCallContext, pParams) -#define cliresControlFilter_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resControlFilter__ +#define cliresControlFilter_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define cliresControlFilter(pResource, pCallContext, pParams) cliresControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define cliresControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resControlSerialization_Prologue__ +#define cliresControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlSerialization_Prologue__ #define cliresControlSerialization_Prologue(pResource, pCallContext, pParams) cliresControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define cliresControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resControlSerialization_Epilogue__ +#define cliresControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlSerialization_Epilogue__ #define cliresControlSerialization_Epilogue(pResource, pCallContext, pParams) cliresControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define cliresMap_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resMap__ +#define cliresMap_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define cliresMap(pResource, pCallContext, pParams, pCpuMapping) cliresMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define cliresUnmap_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resUnmap__ +#define cliresUnmap_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define cliresUnmap(pResource, pCallContext, pCpuMapping) cliresUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define cliresIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define cliresIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define cliresIsPartialUnmapSupported(pResource) cliresIsPartialUnmapSupported_DISPATCH(pResource) -#define cliresMapTo_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resMapTo__ +#define cliresMapTo_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define cliresMapTo(pResource, pParams) cliresMapTo_DISPATCH(pResource, pParams) -#define cliresUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define cliresUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define cliresUnmapFrom(pResource, pParams) cliresUnmapFrom_DISPATCH(pResource, pParams) -#define cliresGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resGetRefCount__ +#define cliresGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define cliresGetRefCount(pResource) cliresGetRefCount_DISPATCH(pResource) -#define cliresAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define cliresAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RsClientResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define cliresAddAdditionalDependants(pClient, pResource, pReference) cliresAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define cliresGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define cliresGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define cliresGetNotificationListPtr(pNotifier) cliresGetNotificationListPtr_DISPATCH(pNotifier) -#define cliresGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define cliresGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define cliresGetNotificationShare(pNotifier) cliresGetNotificationShare_DISPATCH(pNotifier) -#define cliresSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define cliresSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define cliresSetNotificationShare(pNotifier, pNotifShare) cliresSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define cliresUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define cliresUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define cliresUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) cliresUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define cliresGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define cliresGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define cliresGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) cliresGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NvBool cliresAccessCallback_DISPATCH(struct RmClientResource *pRmCliRes, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pRmCliRes->__cliresAccessCallback__(pRmCliRes, pInvokingClient, pAllocParams, accessRight); + return pRmCliRes->__nvoc_vtable->__cliresAccessCallback__(pRmCliRes, pInvokingClient, pAllocParams, accessRight); } static inline NvBool cliresShareCallback_DISPATCH(struct RmClientResource *pRmCliRes, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pRmCliRes->__cliresShareCallback__(pRmCliRes, pInvokingClient, pParentRef, pSharePolicy); + return pRmCliRes->__nvoc_vtable->__cliresShareCallback__(pRmCliRes, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS cliresControl_Prologue_DISPATCH(struct RmClientResource *pRmCliRes, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pRmCliRes->__cliresControl_Prologue__(pRmCliRes, pCallContext, pParams); + return pRmCliRes->__nvoc_vtable->__cliresControl_Prologue__(pRmCliRes, pCallContext, pParams); } static inline void cliresControl_Epilogue_DISPATCH(struct RmClientResource *pRmCliRes, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pRmCliRes->__cliresControl_Epilogue__(pRmCliRes, pCallContext, pParams); + pRmCliRes->__nvoc_vtable->__cliresControl_Epilogue__(pRmCliRes, pCallContext, pParams); } static inline NV_STATUS cliresCtrlCmdSystemGetCpuInfo_DISPATCH(struct RmClientResource *pRmCliRes, NV0000_CTRL_SYSTEM_GET_CPU_INFO_PARAMS *pCpuInfoParams) { @@ -965,79 +978,79 @@ static inline NV_STATUS cliresCtrlCmdSystemPfmreqhndlrGetExtendedPerfSensorCount } static inline NvBool cliresCanCopy_DISPATCH(struct RmClientResource *pResource) { - return pResource->__cliresCanCopy__(pResource); + return pResource->__nvoc_vtable->__cliresCanCopy__(pResource); } static inline NV_STATUS cliresIsDuplicate_DISPATCH(struct RmClientResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__cliresIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__cliresIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void cliresPreDestruct_DISPATCH(struct RmClientResource *pResource) { - pResource->__cliresPreDestruct__(pResource); + pResource->__nvoc_vtable->__cliresPreDestruct__(pResource); } static inline NV_STATUS cliresControl_DISPATCH(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__cliresControl__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__cliresControl__(pResource, pCallContext, pParams); } static inline NV_STATUS cliresControlFilter_DISPATCH(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__cliresControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__cliresControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS cliresControlSerialization_Prologue_DISPATCH(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__cliresControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__cliresControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void cliresControlSerialization_Epilogue_DISPATCH(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__cliresControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__cliresControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS cliresMap_DISPATCH(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__cliresMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__cliresMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS cliresUnmap_DISPATCH(struct RmClientResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__cliresUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__cliresUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool cliresIsPartialUnmapSupported_DISPATCH(struct RmClientResource *pResource) { - return pResource->__cliresIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__cliresIsPartialUnmapSupported__(pResource); } static inline NV_STATUS cliresMapTo_DISPATCH(struct RmClientResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__cliresMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__cliresMapTo__(pResource, pParams); } static inline NV_STATUS cliresUnmapFrom_DISPATCH(struct RmClientResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__cliresUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__cliresUnmapFrom__(pResource, pParams); } static inline NvU32 cliresGetRefCount_DISPATCH(struct RmClientResource *pResource) { - return pResource->__cliresGetRefCount__(pResource); + return pResource->__nvoc_vtable->__cliresGetRefCount__(pResource); } static inline void cliresAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct RmClientResource *pResource, RsResourceRef *pReference) { - pResource->__cliresAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__cliresAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * cliresGetNotificationListPtr_DISPATCH(struct RmClientResource *pNotifier) { - return pNotifier->__cliresGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__cliresGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * cliresGetNotificationShare_DISPATCH(struct RmClientResource *pNotifier) { - return pNotifier->__cliresGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__cliresGetNotificationShare__(pNotifier); } static inline void cliresSetNotificationShare_DISPATCH(struct RmClientResource *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__cliresSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__cliresSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS cliresUnregisterEvent_DISPATCH(struct RmClientResource *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__cliresUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__cliresUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS cliresGetOrAllocNotifShare_DISPATCH(struct RmClientResource *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__cliresGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__cliresGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NvBool cliresAccessCallback_IMPL(struct RmClientResource *pRmCliRes, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); diff --git a/src/nvidia/generated/g_compute_instance_subscription_nvoc.c b/src/nvidia/generated/g_compute_instance_subscription_nvoc.c index ca2002d22a..cdff386048 100644 --- a/src/nvidia/generated/g_compute_instance_subscription_nvoc.c +++ b/src/nvidia/generated/g_compute_instance_subscription_nvoc.c @@ -117,133 +117,201 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ComputeI }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NvBool __nvoc_down_thunk_ComputeInstanceSubscription_resCanCopy(struct RsResource *arg_this); // this + // 1 down-thunk(s) defined to bridge methods in ComputeInstanceSubscription from superclasses // cisubscriptionCanCopy: virtual override (res) base (gpures) -static NvBool __nvoc_down_thunk_ComputeInstanceSubscription_resCanCopy(struct RsResource *arg_this) { +NvBool __nvoc_down_thunk_ComputeInstanceSubscription_resCanCopy(struct RsResource *arg_this) { return cisubscriptionCanCopy((struct ComputeInstanceSubscription *)(((unsigned char *) arg_this) - __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionControl(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionMap(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionUnmap(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_cisubscriptionShareCallback(struct ComputeInstanceSubscription *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionGetRegBaseOffsetAndSize(struct ComputeInstanceSubscription *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionGetMapAddrSpace(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionInternalControlForward(struct ComputeInstanceSubscription *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_cisubscriptionGetInternalObjectHandle(struct ComputeInstanceSubscription *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_cisubscriptionAccessCallback(struct ComputeInstanceSubscription *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_cisubscriptionGetMemInterMapParams(struct ComputeInstanceSubscription *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_cisubscriptionCheckMemInterUnmap(struct ComputeInstanceSubscription *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_cisubscriptionGetMemoryMappingDescriptor(struct ComputeInstanceSubscription *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_cisubscriptionControlSerialization_Prologue(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_cisubscriptionControlSerialization_Epilogue(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_cisubscriptionControl_Prologue(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_cisubscriptionControl_Epilogue(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_cisubscriptionIsDuplicate(struct ComputeInstanceSubscription *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_cisubscriptionPreDestruct(struct ComputeInstanceSubscription *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_cisubscriptionControlFilter(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_cisubscriptionIsPartialUnmapSupported(struct ComputeInstanceSubscription *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_cisubscriptionMapTo(struct ComputeInstanceSubscription *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_cisubscriptionUnmapFrom(struct ComputeInstanceSubscription *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_cisubscriptionGetRefCount(struct ComputeInstanceSubscription *pResource); // this +void __nvoc_up_thunk_RsResource_cisubscriptionAddAdditionalDependants(struct RsClient *pClient, struct ComputeInstanceSubscription *pResource, RsResourceRef *pReference); // this + // 24 up-thunk(s) defined to bridge methods in ComputeInstanceSubscription to superclasses // cisubscriptionControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionControl(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionControl(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset), pCallContext, pParams); } // cisubscriptionMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionMap(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionMap(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // cisubscriptionUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionUnmap(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionUnmap(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset), pCallContext, pCpuMapping); } // cisubscriptionShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_cisubscriptionShareCallback(struct ComputeInstanceSubscription *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_cisubscriptionShareCallback(struct ComputeInstanceSubscription *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // cisubscriptionGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionGetRegBaseOffsetAndSize(struct ComputeInstanceSubscription *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionGetRegBaseOffsetAndSize(struct ComputeInstanceSubscription *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset), pGpu, pOffset, pSize); } // cisubscriptionGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionGetMapAddrSpace(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionGetMapAddrSpace(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // cisubscriptionInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionInternalControlForward(struct ComputeInstanceSubscription *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_cisubscriptionInternalControlForward(struct ComputeInstanceSubscription *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset), command, pParams, size); } // cisubscriptionGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_cisubscriptionGetInternalObjectHandle(struct ComputeInstanceSubscription *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_cisubscriptionGetInternalObjectHandle(struct ComputeInstanceSubscription *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ComputeInstanceSubscription_GpuResource.offset)); } // cisubscriptionAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_cisubscriptionAccessCallback(struct ComputeInstanceSubscription *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_cisubscriptionAccessCallback(struct ComputeInstanceSubscription *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // cisubscriptionGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_cisubscriptionGetMemInterMapParams(struct ComputeInstanceSubscription *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_cisubscriptionGetMemInterMapParams(struct ComputeInstanceSubscription *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), pParams); } // cisubscriptionCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_cisubscriptionCheckMemInterUnmap(struct ComputeInstanceSubscription *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_cisubscriptionCheckMemInterUnmap(struct ComputeInstanceSubscription *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), bSubdeviceHandleProvided); } // cisubscriptionGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_cisubscriptionGetMemoryMappingDescriptor(struct ComputeInstanceSubscription *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_cisubscriptionGetMemoryMappingDescriptor(struct ComputeInstanceSubscription *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), ppMemDesc); } // cisubscriptionControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_cisubscriptionControlSerialization_Prologue(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_cisubscriptionControlSerialization_Prologue(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), pCallContext, pParams); } // cisubscriptionControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_cisubscriptionControlSerialization_Epilogue(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_cisubscriptionControlSerialization_Epilogue(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), pCallContext, pParams); } // cisubscriptionControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_cisubscriptionControl_Prologue(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_cisubscriptionControl_Prologue(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), pCallContext, pParams); } // cisubscriptionControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_cisubscriptionControl_Epilogue(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_cisubscriptionControl_Epilogue(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RmResource.offset), pCallContext, pParams); } // cisubscriptionIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_cisubscriptionIsDuplicate(struct ComputeInstanceSubscription *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_cisubscriptionIsDuplicate(struct ComputeInstanceSubscription *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset), hMemory, pDuplicate); } // cisubscriptionPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_cisubscriptionPreDestruct(struct ComputeInstanceSubscription *pResource) { +void __nvoc_up_thunk_RsResource_cisubscriptionPreDestruct(struct ComputeInstanceSubscription *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset)); } // cisubscriptionControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_cisubscriptionControlFilter(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_cisubscriptionControlFilter(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset), pCallContext, pParams); } // cisubscriptionIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_cisubscriptionIsPartialUnmapSupported(struct ComputeInstanceSubscription *pResource) { +NvBool __nvoc_up_thunk_RsResource_cisubscriptionIsPartialUnmapSupported(struct ComputeInstanceSubscription *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset)); } // cisubscriptionMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_cisubscriptionMapTo(struct ComputeInstanceSubscription *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_cisubscriptionMapTo(struct ComputeInstanceSubscription *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset), pParams); } // cisubscriptionUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_cisubscriptionUnmapFrom(struct ComputeInstanceSubscription *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_cisubscriptionUnmapFrom(struct ComputeInstanceSubscription *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset), pParams); } // cisubscriptionGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_cisubscriptionGetRefCount(struct ComputeInstanceSubscription *pResource) { +NvU32 __nvoc_up_thunk_RsResource_cisubscriptionGetRefCount(struct ComputeInstanceSubscription *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset)); } // cisubscriptionAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_cisubscriptionAddAdditionalDependants(struct RsClient *pClient, struct ComputeInstanceSubscription *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_cisubscriptionAddAdditionalDependants(struct RsClient *pClient, struct ComputeInstanceSubscription *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ComputeInstanceSubscription_RsResource.offset), pReference); } @@ -288,93 +356,118 @@ NV_STATUS __nvoc_ctor_ComputeInstanceSubscription(ComputeInstanceSubscription *p static void __nvoc_init_funcTable_ComputeInstanceSubscription_1(ComputeInstanceSubscription *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // cisubscriptionCanCopy -- virtual override (res) base (gpures) - pThis->__cisubscriptionCanCopy__ = &cisubscriptionCanCopy_IMPL; - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_ComputeInstanceSubscription_resCanCopy; - // cisubscriptionCtrlCmdGetUuid -- exported (id=0xc6380101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__cisubscriptionCtrlCmdGetUuid__ = &cisubscriptionCtrlCmdGetUuid_IMPL; #endif - - // cisubscriptionControl -- virtual inherited (gpures) base (gpures) - pThis->__cisubscriptionControl__ = &__nvoc_up_thunk_GpuResource_cisubscriptionControl; - - // cisubscriptionMap -- virtual inherited (gpures) base (gpures) - pThis->__cisubscriptionMap__ = &__nvoc_up_thunk_GpuResource_cisubscriptionMap; - - // cisubscriptionUnmap -- virtual inherited (gpures) base (gpures) - pThis->__cisubscriptionUnmap__ = &__nvoc_up_thunk_GpuResource_cisubscriptionUnmap; - - // cisubscriptionShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__cisubscriptionShareCallback__ = &__nvoc_up_thunk_GpuResource_cisubscriptionShareCallback; - - // cisubscriptionGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__cisubscriptionGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_cisubscriptionGetRegBaseOffsetAndSize; - - // cisubscriptionGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__cisubscriptionGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_cisubscriptionGetMapAddrSpace; - - // cisubscriptionInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__cisubscriptionInternalControlForward__ = &__nvoc_up_thunk_GpuResource_cisubscriptionInternalControlForward; - - // cisubscriptionGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__cisubscriptionGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_cisubscriptionGetInternalObjectHandle; - - // cisubscriptionAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__cisubscriptionAccessCallback__ = &__nvoc_up_thunk_RmResource_cisubscriptionAccessCallback; - - // cisubscriptionGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__cisubscriptionGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_cisubscriptionGetMemInterMapParams; - - // cisubscriptionCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__cisubscriptionCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_cisubscriptionCheckMemInterUnmap; - - // cisubscriptionGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__cisubscriptionGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_cisubscriptionGetMemoryMappingDescriptor; - - // cisubscriptionControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__cisubscriptionControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_cisubscriptionControlSerialization_Prologue; - - // cisubscriptionControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__cisubscriptionControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_cisubscriptionControlSerialization_Epilogue; - - // cisubscriptionControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__cisubscriptionControl_Prologue__ = &__nvoc_up_thunk_RmResource_cisubscriptionControl_Prologue; - - // cisubscriptionControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__cisubscriptionControl_Epilogue__ = &__nvoc_up_thunk_RmResource_cisubscriptionControl_Epilogue; - - // cisubscriptionIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__cisubscriptionIsDuplicate__ = &__nvoc_up_thunk_RsResource_cisubscriptionIsDuplicate; - - // cisubscriptionPreDestruct -- virtual inherited (res) base (gpures) - pThis->__cisubscriptionPreDestruct__ = &__nvoc_up_thunk_RsResource_cisubscriptionPreDestruct; - - // cisubscriptionControlFilter -- virtual inherited (res) base (gpures) - pThis->__cisubscriptionControlFilter__ = &__nvoc_up_thunk_RsResource_cisubscriptionControlFilter; - - // cisubscriptionIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__cisubscriptionIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_cisubscriptionIsPartialUnmapSupported; - - // cisubscriptionMapTo -- virtual inherited (res) base (gpures) - pThis->__cisubscriptionMapTo__ = &__nvoc_up_thunk_RsResource_cisubscriptionMapTo; - - // cisubscriptionUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__cisubscriptionUnmapFrom__ = &__nvoc_up_thunk_RsResource_cisubscriptionUnmapFrom; - - // cisubscriptionGetRefCount -- virtual inherited (res) base (gpures) - pThis->__cisubscriptionGetRefCount__ = &__nvoc_up_thunk_RsResource_cisubscriptionGetRefCount; - - // cisubscriptionAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__cisubscriptionAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_cisubscriptionAddAdditionalDependants; -} // End __nvoc_init_funcTable_ComputeInstanceSubscription_1 with approximately 27 basic block(s). +} // End __nvoc_init_funcTable_ComputeInstanceSubscription_1 with approximately 1 basic block(s). // Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_ComputeInstanceSubscription(ComputeInstanceSubscription *pThis) { - // Initialize vtable(s) with 26 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__ComputeInstanceSubscription vtable = { + .__cisubscriptionCanCopy__ = &cisubscriptionCanCopy_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_ComputeInstanceSubscription_resCanCopy, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__cisubscriptionControl__ = &__nvoc_up_thunk_GpuResource_cisubscriptionControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__cisubscriptionMap__ = &__nvoc_up_thunk_GpuResource_cisubscriptionMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__cisubscriptionUnmap__ = &__nvoc_up_thunk_GpuResource_cisubscriptionUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__cisubscriptionShareCallback__ = &__nvoc_up_thunk_GpuResource_cisubscriptionShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__cisubscriptionGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_cisubscriptionGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__cisubscriptionGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_cisubscriptionGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__cisubscriptionInternalControlForward__ = &__nvoc_up_thunk_GpuResource_cisubscriptionInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__cisubscriptionGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_cisubscriptionGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__cisubscriptionAccessCallback__ = &__nvoc_up_thunk_RmResource_cisubscriptionAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__cisubscriptionGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_cisubscriptionGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__cisubscriptionCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_cisubscriptionCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__cisubscriptionGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_cisubscriptionGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__cisubscriptionControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_cisubscriptionControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__cisubscriptionControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_cisubscriptionControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__cisubscriptionControl_Prologue__ = &__nvoc_up_thunk_RmResource_cisubscriptionControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__cisubscriptionControl_Epilogue__ = &__nvoc_up_thunk_RmResource_cisubscriptionControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__cisubscriptionIsDuplicate__ = &__nvoc_up_thunk_RsResource_cisubscriptionIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__cisubscriptionPreDestruct__ = &__nvoc_up_thunk_RsResource_cisubscriptionPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__cisubscriptionControlFilter__ = &__nvoc_up_thunk_RsResource_cisubscriptionControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__cisubscriptionIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_cisubscriptionIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__cisubscriptionMapTo__ = &__nvoc_up_thunk_RsResource_cisubscriptionMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__cisubscriptionUnmapFrom__ = &__nvoc_up_thunk_RsResource_cisubscriptionUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__cisubscriptionGetRefCount__ = &__nvoc_up_thunk_RsResource_cisubscriptionGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__cisubscriptionAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_cisubscriptionAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (cisubscription) this + + // Initialize vtable(s) with 1 per-object function pointer(s). __nvoc_init_funcTable_ComputeInstanceSubscription_1(pThis); } diff --git a/src/nvidia/generated/g_compute_instance_subscription_nvoc.h b/src/nvidia/generated/g_compute_instance_subscription_nvoc.h index b09305d38b..b8eb7f5187 100644 --- a/src/nvidia/generated/g_compute_instance_subscription_nvoc.h +++ b/src/nvidia/generated/g_compute_instance_subscription_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -69,10 +69,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__ComputeInstanceSubscription; + + struct ComputeInstanceSubscription { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__ComputeInstanceSubscription *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -85,33 +90,8 @@ struct ComputeInstanceSubscription { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct ComputeInstanceSubscription *__nvoc_pbase_ComputeInstanceSubscription; // cisubscription - // Vtable with 26 per-object function pointers - NvBool (*__cisubscriptionCanCopy__)(struct ComputeInstanceSubscription * /*this*/); // virtual override (res) base (gpures) + // Vtable with 1 per-object function pointer NV_STATUS (*__cisubscriptionCtrlCmdGetUuid__)(struct ComputeInstanceSubscription * /*this*/, NVC638_CTRL_GET_UUID_PARAMS *); // exported (id=0xc6380101) - NV_STATUS (*__cisubscriptionControl__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) - NV_STATUS (*__cisubscriptionMap__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) - NV_STATUS (*__cisubscriptionUnmap__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) - NvBool (*__cisubscriptionShareCallback__)(struct ComputeInstanceSubscription * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) - NV_STATUS (*__cisubscriptionGetRegBaseOffsetAndSize__)(struct ComputeInstanceSubscription * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) - NV_STATUS (*__cisubscriptionGetMapAddrSpace__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) - NV_STATUS (*__cisubscriptionInternalControlForward__)(struct ComputeInstanceSubscription * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) - NvHandle (*__cisubscriptionGetInternalObjectHandle__)(struct ComputeInstanceSubscription * /*this*/); // virtual inherited (gpures) base (gpures) - NvBool (*__cisubscriptionAccessCallback__)(struct ComputeInstanceSubscription * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__cisubscriptionGetMemInterMapParams__)(struct ComputeInstanceSubscription * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__cisubscriptionCheckMemInterUnmap__)(struct ComputeInstanceSubscription * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__cisubscriptionGetMemoryMappingDescriptor__)(struct ComputeInstanceSubscription * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__cisubscriptionControlSerialization_Prologue__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) - void (*__cisubscriptionControlSerialization_Epilogue__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__cisubscriptionControl_Prologue__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) - void (*__cisubscriptionControl_Epilogue__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__cisubscriptionIsDuplicate__)(struct ComputeInstanceSubscription * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) - void (*__cisubscriptionPreDestruct__)(struct ComputeInstanceSubscription * /*this*/); // virtual inherited (res) base (gpures) - NV_STATUS (*__cisubscriptionControlFilter__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) - NvBool (*__cisubscriptionIsPartialUnmapSupported__)(struct ComputeInstanceSubscription * /*this*/); // inline virtual inherited (res) base (gpures) body - NV_STATUS (*__cisubscriptionMapTo__)(struct ComputeInstanceSubscription * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) - NV_STATUS (*__cisubscriptionUnmapFrom__)(struct ComputeInstanceSubscription * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) - NvU32 (*__cisubscriptionGetRefCount__)(struct ComputeInstanceSubscription * /*this*/); // virtual inherited (res) base (gpures) - void (*__cisubscriptionAddAdditionalDependants__)(struct RsClient *, struct ComputeInstanceSubscription * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) // Data members MIG_COMPUTE_INSTANCE *PRIVATE_FIELD(pMIGComputeInstance); @@ -123,6 +103,7 @@ struct ComputeInstanceSubscription_PRIVATE { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__ComputeInstanceSubscription *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -135,9 +116,20 @@ struct ComputeInstanceSubscription_PRIVATE { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct ComputeInstanceSubscription *__nvoc_pbase_ComputeInstanceSubscription; // cisubscription - // Vtable with 26 per-object function pointers - NvBool (*__cisubscriptionCanCopy__)(struct ComputeInstanceSubscription * /*this*/); // virtual override (res) base (gpures) + // Vtable with 1 per-object function pointer NV_STATUS (*__cisubscriptionCtrlCmdGetUuid__)(struct ComputeInstanceSubscription * /*this*/, NVC638_CTRL_GET_UUID_PARAMS *); // exported (id=0xc6380101) + + // Data members + MIG_COMPUTE_INSTANCE *pMIGComputeInstance; + NvU64 dupedCapDescriptor; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__ComputeInstanceSubscription { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + + NvBool (*__cisubscriptionCanCopy__)(struct ComputeInstanceSubscription * /*this*/); // virtual override (res) base (gpures) NV_STATUS (*__cisubscriptionControl__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__cisubscriptionMap__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__cisubscriptionUnmap__)(struct ComputeInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -162,10 +154,6 @@ struct ComputeInstanceSubscription_PRIVATE { NV_STATUS (*__cisubscriptionUnmapFrom__)(struct ComputeInstanceSubscription * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__cisubscriptionGetRefCount__)(struct ComputeInstanceSubscription * /*this*/); // virtual inherited (res) base (gpures) void (*__cisubscriptionAddAdditionalDependants__)(struct RsClient *, struct ComputeInstanceSubscription * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - MIG_COMPUTE_INSTANCE *pMIGComputeInstance; - NvU64 dupedCapDescriptor; }; #ifndef __NVOC_CLASS_ComputeInstanceSubscription_TYPEDEF__ @@ -198,62 +186,62 @@ NV_STATUS __nvoc_objCreate_ComputeInstanceSubscription(ComputeInstanceSubscripti // Wrapper macros -#define cisubscriptionCanCopy_FNPTR(arg_this) arg_this->__cisubscriptionCanCopy__ +#define cisubscriptionCanCopy_FNPTR(arg_this) arg_this->__nvoc_vtable->__cisubscriptionCanCopy__ #define cisubscriptionCanCopy(arg_this) cisubscriptionCanCopy_DISPATCH(arg_this) #define cisubscriptionCtrlCmdGetUuid_FNPTR(arg_this) arg_this->__cisubscriptionCtrlCmdGetUuid__ #define cisubscriptionCtrlCmdGetUuid(arg_this, arg2) cisubscriptionCtrlCmdGetUuid_DISPATCH(arg_this, arg2) -#define cisubscriptionControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define cisubscriptionControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define cisubscriptionControl(pGpuResource, pCallContext, pParams) cisubscriptionControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define cisubscriptionMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define cisubscriptionMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define cisubscriptionMap(pGpuResource, pCallContext, pParams, pCpuMapping) cisubscriptionMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define cisubscriptionUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define cisubscriptionUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define cisubscriptionUnmap(pGpuResource, pCallContext, pCpuMapping) cisubscriptionUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define cisubscriptionShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define cisubscriptionShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define cisubscriptionShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) cisubscriptionShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define cisubscriptionGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define cisubscriptionGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define cisubscriptionGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) cisubscriptionGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define cisubscriptionGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define cisubscriptionGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define cisubscriptionGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) cisubscriptionGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define cisubscriptionInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define cisubscriptionInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define cisubscriptionInternalControlForward(pGpuResource, command, pParams, size) cisubscriptionInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define cisubscriptionGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define cisubscriptionGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define cisubscriptionGetInternalObjectHandle(pGpuResource) cisubscriptionGetInternalObjectHandle_DISPATCH(pGpuResource) -#define cisubscriptionAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define cisubscriptionAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define cisubscriptionAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) cisubscriptionAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define cisubscriptionGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define cisubscriptionGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define cisubscriptionGetMemInterMapParams(pRmResource, pParams) cisubscriptionGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define cisubscriptionCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define cisubscriptionCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define cisubscriptionCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) cisubscriptionCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define cisubscriptionGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define cisubscriptionGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define cisubscriptionGetMemoryMappingDescriptor(pRmResource, ppMemDesc) cisubscriptionGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define cisubscriptionControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define cisubscriptionControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define cisubscriptionControlSerialization_Prologue(pResource, pCallContext, pParams) cisubscriptionControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define cisubscriptionControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define cisubscriptionControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define cisubscriptionControlSerialization_Epilogue(pResource, pCallContext, pParams) cisubscriptionControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define cisubscriptionControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define cisubscriptionControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define cisubscriptionControl_Prologue(pResource, pCallContext, pParams) cisubscriptionControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define cisubscriptionControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define cisubscriptionControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define cisubscriptionControl_Epilogue(pResource, pCallContext, pParams) cisubscriptionControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define cisubscriptionIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define cisubscriptionIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define cisubscriptionIsDuplicate(pResource, hMemory, pDuplicate) cisubscriptionIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define cisubscriptionPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define cisubscriptionPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define cisubscriptionPreDestruct(pResource) cisubscriptionPreDestruct_DISPATCH(pResource) -#define cisubscriptionControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define cisubscriptionControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define cisubscriptionControlFilter(pResource, pCallContext, pParams) cisubscriptionControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define cisubscriptionIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define cisubscriptionIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define cisubscriptionIsPartialUnmapSupported(pResource) cisubscriptionIsPartialUnmapSupported_DISPATCH(pResource) -#define cisubscriptionMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define cisubscriptionMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define cisubscriptionMapTo(pResource, pParams) cisubscriptionMapTo_DISPATCH(pResource, pParams) -#define cisubscriptionUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define cisubscriptionUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define cisubscriptionUnmapFrom(pResource, pParams) cisubscriptionUnmapFrom_DISPATCH(pResource, pParams) -#define cisubscriptionGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define cisubscriptionGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define cisubscriptionGetRefCount(pResource) cisubscriptionGetRefCount_DISPATCH(pResource) -#define cisubscriptionAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define cisubscriptionAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define cisubscriptionAddAdditionalDependants(pClient, pResource, pReference) cisubscriptionAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool cisubscriptionCanCopy_DISPATCH(struct ComputeInstanceSubscription *arg_this) { - return arg_this->__cisubscriptionCanCopy__(arg_this); + return arg_this->__nvoc_vtable->__cisubscriptionCanCopy__(arg_this); } static inline NV_STATUS cisubscriptionCtrlCmdGetUuid_DISPATCH(struct ComputeInstanceSubscription *arg_this, NVC638_CTRL_GET_UUID_PARAMS *arg2) { @@ -261,99 +249,99 @@ static inline NV_STATUS cisubscriptionCtrlCmdGetUuid_DISPATCH(struct ComputeInst } static inline NV_STATUS cisubscriptionControl_DISPATCH(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__cisubscriptionControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__cisubscriptionControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS cisubscriptionMap_DISPATCH(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__cisubscriptionMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__cisubscriptionMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS cisubscriptionUnmap_DISPATCH(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__cisubscriptionUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__cisubscriptionUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool cisubscriptionShareCallback_DISPATCH(struct ComputeInstanceSubscription *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__cisubscriptionShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__cisubscriptionShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS cisubscriptionGetRegBaseOffsetAndSize_DISPATCH(struct ComputeInstanceSubscription *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__cisubscriptionGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__cisubscriptionGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS cisubscriptionGetMapAddrSpace_DISPATCH(struct ComputeInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__cisubscriptionGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__cisubscriptionGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS cisubscriptionInternalControlForward_DISPATCH(struct ComputeInstanceSubscription *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__cisubscriptionInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__cisubscriptionInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle cisubscriptionGetInternalObjectHandle_DISPATCH(struct ComputeInstanceSubscription *pGpuResource) { - return pGpuResource->__cisubscriptionGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__cisubscriptionGetInternalObjectHandle__(pGpuResource); } static inline NvBool cisubscriptionAccessCallback_DISPATCH(struct ComputeInstanceSubscription *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__cisubscriptionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__cisubscriptionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS cisubscriptionGetMemInterMapParams_DISPATCH(struct ComputeInstanceSubscription *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__cisubscriptionGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__cisubscriptionGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS cisubscriptionCheckMemInterUnmap_DISPATCH(struct ComputeInstanceSubscription *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__cisubscriptionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__cisubscriptionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS cisubscriptionGetMemoryMappingDescriptor_DISPATCH(struct ComputeInstanceSubscription *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__cisubscriptionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__cisubscriptionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS cisubscriptionControlSerialization_Prologue_DISPATCH(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__cisubscriptionControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__cisubscriptionControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void cisubscriptionControlSerialization_Epilogue_DISPATCH(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__cisubscriptionControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__cisubscriptionControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS cisubscriptionControl_Prologue_DISPATCH(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__cisubscriptionControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__cisubscriptionControl_Prologue__(pResource, pCallContext, pParams); } static inline void cisubscriptionControl_Epilogue_DISPATCH(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__cisubscriptionControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__cisubscriptionControl_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS cisubscriptionIsDuplicate_DISPATCH(struct ComputeInstanceSubscription *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__cisubscriptionIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__cisubscriptionIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void cisubscriptionPreDestruct_DISPATCH(struct ComputeInstanceSubscription *pResource) { - pResource->__cisubscriptionPreDestruct__(pResource); + pResource->__nvoc_vtable->__cisubscriptionPreDestruct__(pResource); } static inline NV_STATUS cisubscriptionControlFilter_DISPATCH(struct ComputeInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__cisubscriptionControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__cisubscriptionControlFilter__(pResource, pCallContext, pParams); } static inline NvBool cisubscriptionIsPartialUnmapSupported_DISPATCH(struct ComputeInstanceSubscription *pResource) { - return pResource->__cisubscriptionIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__cisubscriptionIsPartialUnmapSupported__(pResource); } static inline NV_STATUS cisubscriptionMapTo_DISPATCH(struct ComputeInstanceSubscription *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__cisubscriptionMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__cisubscriptionMapTo__(pResource, pParams); } static inline NV_STATUS cisubscriptionUnmapFrom_DISPATCH(struct ComputeInstanceSubscription *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__cisubscriptionUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__cisubscriptionUnmapFrom__(pResource, pParams); } static inline NvU32 cisubscriptionGetRefCount_DISPATCH(struct ComputeInstanceSubscription *pResource) { - return pResource->__cisubscriptionGetRefCount__(pResource); + return pResource->__nvoc_vtable->__cisubscriptionGetRefCount__(pResource); } static inline void cisubscriptionAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ComputeInstanceSubscription *pResource, RsResourceRef *pReference) { - pResource->__cisubscriptionAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__cisubscriptionAddAdditionalDependants__(pClient, pResource, pReference); } NvBool cisubscriptionCanCopy_IMPL(struct ComputeInstanceSubscription *arg1); diff --git a/src/nvidia/generated/g_conf_compute_api_nvoc.c b/src/nvidia/generated/g_conf_compute_api_nvoc.c index 1a306ca7ab..97ec968c55 100644 --- a/src/nvidia/generated/g_conf_compute_api_nvoc.c +++ b/src/nvidia/generated/g_conf_compute_api_nvoc.c @@ -258,110 +258,153 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Confiden }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_RmResource_confComputeApiAccessCallback(struct ConfidentialComputeApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_confComputeApiShareCallback(struct ConfidentialComputeApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_confComputeApiGetMemInterMapParams(struct ConfidentialComputeApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_confComputeApiCheckMemInterUnmap(struct ConfidentialComputeApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_confComputeApiGetMemoryMappingDescriptor(struct ConfidentialComputeApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_confComputeApiControlSerialization_Prologue(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_confComputeApiControlSerialization_Epilogue(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_confComputeApiControl_Prologue(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_confComputeApiControl_Epilogue(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_confComputeApiCanCopy(struct ConfidentialComputeApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiIsDuplicate(struct ConfidentialComputeApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_confComputeApiPreDestruct(struct ConfidentialComputeApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiControl(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiControlFilter(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiMap(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiUnmap(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_confComputeApiIsPartialUnmapSupported(struct ConfidentialComputeApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiMapTo(struct ConfidentialComputeApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiUnmapFrom(struct ConfidentialComputeApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_confComputeApiGetRefCount(struct ConfidentialComputeApi *pResource); // this +void __nvoc_up_thunk_RsResource_confComputeApiAddAdditionalDependants(struct RsClient *pClient, struct ConfidentialComputeApi *pResource, RsResourceRef *pReference); // this + // 21 up-thunk(s) defined to bridge methods in ConfidentialComputeApi to superclasses // confComputeApiAccessCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_confComputeApiAccessCallback(struct ConfidentialComputeApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_confComputeApiAccessCallback(struct ConfidentialComputeApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // confComputeApiShareCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_confComputeApiShareCallback(struct ConfidentialComputeApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_confComputeApiShareCallback(struct ConfidentialComputeApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // confComputeApiGetMemInterMapParams: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_confComputeApiGetMemInterMapParams(struct ConfidentialComputeApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_confComputeApiGetMemInterMapParams(struct ConfidentialComputeApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), pParams); } // confComputeApiCheckMemInterUnmap: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_confComputeApiCheckMemInterUnmap(struct ConfidentialComputeApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_confComputeApiCheckMemInterUnmap(struct ConfidentialComputeApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), bSubdeviceHandleProvided); } // confComputeApiGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_confComputeApiGetMemoryMappingDescriptor(struct ConfidentialComputeApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_confComputeApiGetMemoryMappingDescriptor(struct ConfidentialComputeApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), ppMemDesc); } // confComputeApiControlSerialization_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_confComputeApiControlSerialization_Prologue(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_confComputeApiControlSerialization_Prologue(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), pCallContext, pParams); } // confComputeApiControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_confComputeApiControlSerialization_Epilogue(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_confComputeApiControlSerialization_Epilogue(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), pCallContext, pParams); } // confComputeApiControl_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_confComputeApiControl_Prologue(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_confComputeApiControl_Prologue(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), pCallContext, pParams); } // confComputeApiControl_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_confComputeApiControl_Epilogue(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_confComputeApiControl_Epilogue(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RmResource.offset), pCallContext, pParams); } // confComputeApiCanCopy: virtual inherited (res) base (rmres) -static NvBool __nvoc_up_thunk_RsResource_confComputeApiCanCopy(struct ConfidentialComputeApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_confComputeApiCanCopy(struct ConfidentialComputeApi *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset)); } // confComputeApiIsDuplicate: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiIsDuplicate(struct ConfidentialComputeApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiIsDuplicate(struct ConfidentialComputeApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), hMemory, pDuplicate); } // confComputeApiPreDestruct: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_confComputeApiPreDestruct(struct ConfidentialComputeApi *pResource) { +void __nvoc_up_thunk_RsResource_confComputeApiPreDestruct(struct ConfidentialComputeApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset)); } // confComputeApiControl: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiControl(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiControl(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), pCallContext, pParams); } // confComputeApiControlFilter: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiControlFilter(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiControlFilter(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), pCallContext, pParams); } // confComputeApiMap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiMap(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiMap(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), pCallContext, pParams, pCpuMapping); } // confComputeApiUnmap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiUnmap(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiUnmap(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), pCallContext, pCpuMapping); } // confComputeApiIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body -static NvBool __nvoc_up_thunk_RsResource_confComputeApiIsPartialUnmapSupported(struct ConfidentialComputeApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_confComputeApiIsPartialUnmapSupported(struct ConfidentialComputeApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset)); } // confComputeApiMapTo: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiMapTo(struct ConfidentialComputeApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiMapTo(struct ConfidentialComputeApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), pParams); } // confComputeApiUnmapFrom: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiUnmapFrom(struct ConfidentialComputeApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_confComputeApiUnmapFrom(struct ConfidentialComputeApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), pParams); } // confComputeApiGetRefCount: virtual inherited (res) base (rmres) -static NvU32 __nvoc_up_thunk_RsResource_confComputeApiGetRefCount(struct ConfidentialComputeApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_confComputeApiGetRefCount(struct ConfidentialComputeApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset)); } // confComputeApiAddAdditionalDependants: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_confComputeApiAddAdditionalDependants(struct RsClient *pClient, struct ConfidentialComputeApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_confComputeApiAddAdditionalDependants(struct RsClient *pClient, struct ConfidentialComputeApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConfidentialComputeApi_RsResource.offset), pReference); } @@ -460,76 +503,104 @@ static void __nvoc_init_funcTable_ConfidentialComputeApi_1(ConfidentialComputeAp #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__confComputeApiCtrlCmdGpuGetKeyRotationState__ = &confComputeApiCtrlCmdGpuGetKeyRotationState_IMPL; #endif - - // confComputeApiAccessCallback -- virtual inherited (rmres) base (rmres) - pThis->__confComputeApiAccessCallback__ = &__nvoc_up_thunk_RmResource_confComputeApiAccessCallback; - - // confComputeApiShareCallback -- virtual inherited (rmres) base (rmres) - pThis->__confComputeApiShareCallback__ = &__nvoc_up_thunk_RmResource_confComputeApiShareCallback; - - // confComputeApiGetMemInterMapParams -- virtual inherited (rmres) base (rmres) - pThis->__confComputeApiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_confComputeApiGetMemInterMapParams; - - // confComputeApiCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) - pThis->__confComputeApiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_confComputeApiCheckMemInterUnmap; - - // confComputeApiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) - pThis->__confComputeApiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_confComputeApiGetMemoryMappingDescriptor; - - // confComputeApiControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__confComputeApiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_confComputeApiControlSerialization_Prologue; - - // confComputeApiControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__confComputeApiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_confComputeApiControlSerialization_Epilogue; - - // confComputeApiControl_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__confComputeApiControl_Prologue__ = &__nvoc_up_thunk_RmResource_confComputeApiControl_Prologue; - - // confComputeApiControl_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__confComputeApiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_confComputeApiControl_Epilogue; - - // confComputeApiCanCopy -- virtual inherited (res) base (rmres) - pThis->__confComputeApiCanCopy__ = &__nvoc_up_thunk_RsResource_confComputeApiCanCopy; - - // confComputeApiIsDuplicate -- virtual inherited (res) base (rmres) - pThis->__confComputeApiIsDuplicate__ = &__nvoc_up_thunk_RsResource_confComputeApiIsDuplicate; - - // confComputeApiPreDestruct -- virtual inherited (res) base (rmres) - pThis->__confComputeApiPreDestruct__ = &__nvoc_up_thunk_RsResource_confComputeApiPreDestruct; - - // confComputeApiControl -- virtual inherited (res) base (rmres) - pThis->__confComputeApiControl__ = &__nvoc_up_thunk_RsResource_confComputeApiControl; - - // confComputeApiControlFilter -- virtual inherited (res) base (rmres) - pThis->__confComputeApiControlFilter__ = &__nvoc_up_thunk_RsResource_confComputeApiControlFilter; - - // confComputeApiMap -- virtual inherited (res) base (rmres) - pThis->__confComputeApiMap__ = &__nvoc_up_thunk_RsResource_confComputeApiMap; - - // confComputeApiUnmap -- virtual inherited (res) base (rmres) - pThis->__confComputeApiUnmap__ = &__nvoc_up_thunk_RsResource_confComputeApiUnmap; - - // confComputeApiIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body - pThis->__confComputeApiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_confComputeApiIsPartialUnmapSupported; - - // confComputeApiMapTo -- virtual inherited (res) base (rmres) - pThis->__confComputeApiMapTo__ = &__nvoc_up_thunk_RsResource_confComputeApiMapTo; - - // confComputeApiUnmapFrom -- virtual inherited (res) base (rmres) - pThis->__confComputeApiUnmapFrom__ = &__nvoc_up_thunk_RsResource_confComputeApiUnmapFrom; - - // confComputeApiGetRefCount -- virtual inherited (res) base (rmres) - pThis->__confComputeApiGetRefCount__ = &__nvoc_up_thunk_RsResource_confComputeApiGetRefCount; - - // confComputeApiAddAdditionalDependants -- virtual inherited (res) base (rmres) - pThis->__confComputeApiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_confComputeApiAddAdditionalDependants; -} // End __nvoc_init_funcTable_ConfidentialComputeApi_1 with approximately 32 basic block(s). +} // End __nvoc_init_funcTable_ConfidentialComputeApi_1 with approximately 11 basic block(s). // Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_ConfidentialComputeApi(ConfidentialComputeApi *pThis) { - // Initialize vtable(s) with 32 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__ConfidentialComputeApi vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__confComputeApiAccessCallback__ = &__nvoc_up_thunk_RmResource_confComputeApiAccessCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__confComputeApiShareCallback__ = &__nvoc_up_thunk_RmResource_confComputeApiShareCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__confComputeApiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_confComputeApiGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__confComputeApiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_confComputeApiCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__confComputeApiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_confComputeApiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__confComputeApiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_confComputeApiControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__confComputeApiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_confComputeApiControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__confComputeApiControl_Prologue__ = &__nvoc_up_thunk_RmResource_confComputeApiControl_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__confComputeApiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_confComputeApiControl_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__confComputeApiCanCopy__ = &__nvoc_up_thunk_RsResource_confComputeApiCanCopy, // virtual inherited (res) base (rmres) + .RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__confComputeApiIsDuplicate__ = &__nvoc_up_thunk_RsResource_confComputeApiIsDuplicate, // virtual inherited (res) base (rmres) + .RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__confComputeApiPreDestruct__ = &__nvoc_up_thunk_RsResource_confComputeApiPreDestruct, // virtual inherited (res) base (rmres) + .RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__confComputeApiControl__ = &__nvoc_up_thunk_RsResource_confComputeApiControl, // virtual inherited (res) base (rmres) + .RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControl__ = &resControl_IMPL, // virtual + .__confComputeApiControlFilter__ = &__nvoc_up_thunk_RsResource_confComputeApiControlFilter, // virtual inherited (res) base (rmres) + .RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__confComputeApiMap__ = &__nvoc_up_thunk_RsResource_confComputeApiMap, // virtual inherited (res) base (rmres) + .RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMap__ = &resMap_IMPL, // virtual + .__confComputeApiUnmap__ = &__nvoc_up_thunk_RsResource_confComputeApiUnmap, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__confComputeApiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_confComputeApiIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__confComputeApiMapTo__ = &__nvoc_up_thunk_RsResource_confComputeApiMapTo, // virtual inherited (res) base (rmres) + .RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__confComputeApiUnmapFrom__ = &__nvoc_up_thunk_RsResource_confComputeApiUnmapFrom, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__confComputeApiGetRefCount__ = &__nvoc_up_thunk_RsResource_confComputeApiGetRefCount, // virtual inherited (res) base (rmres) + .RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__confComputeApiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_confComputeApiAddAdditionalDependants, // virtual inherited (res) base (rmres) + .RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.RmResource.RsResource; // (res) super^2 + pThis->__nvoc_base_RmResource.__nvoc_vtable = &vtable.RmResource; // (rmres) super + pThis->__nvoc_vtable = &vtable; // (confComputeApi) this + + // Initialize vtable(s) with 11 per-object function pointer(s). __nvoc_init_funcTable_ConfidentialComputeApi_1(pThis); } diff --git a/src/nvidia/generated/g_conf_compute_api_nvoc.h b/src/nvidia/generated/g_conf_compute_api_nvoc.h index 56c6b9cdcd..730bff44a7 100644 --- a/src/nvidia/generated/g_conf_compute_api_nvoc.h +++ b/src/nvidia/generated/g_conf_compute_api_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -67,10 +67,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__ConfidentialComputeApi; + + struct ConfidentialComputeApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__ConfidentialComputeApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; @@ -82,7 +87,7 @@ struct ConfidentialComputeApi { struct RmResource *__nvoc_pbase_RmResource; // rmres super struct ConfidentialComputeApi *__nvoc_pbase_ConfidentialComputeApi; // confComputeApi - // Vtable with 32 per-object function pointers + // Vtable with 11 per-object function pointers NV_STATUS (*__confComputeApiCtrlCmdSystemGetCapabilities__)(struct ConfidentialComputeApi * /*this*/, NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_CAPABILITIES_PARAMS *); // exported (id=0xcb330101) NV_STATUS (*__confComputeApiCtrlCmdSystemGetGpusState__)(struct ConfidentialComputeApi * /*this*/, NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_GPUS_STATE_PARAMS *); // exported (id=0xcb330104) NV_STATUS (*__confComputeApiCtrlCmdSystemSetGpusState__)(struct ConfidentialComputeApi * /*this*/, NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_SET_GPUS_STATE_PARAMS *); // exported (id=0xcb330105) @@ -94,6 +99,16 @@ struct ConfidentialComputeApi { NV_STATUS (*__confComputeApiCtrlCmdSystemGetSecurityPolicy__)(struct ConfidentialComputeApi * /*this*/, NV_CONF_COMPUTE_CTRL_GET_SECURITY_POLICY_PARAMS *); // exported (id=0xc56f010e) NV_STATUS (*__confComputeApiCtrlCmdSystemSetSecurityPolicy__)(struct ConfidentialComputeApi * /*this*/, NV_CONF_COMPUTE_CTRL_SET_SECURITY_POLICY_PARAMS *); // exported (id=0xc56f010d) NV_STATUS (*__confComputeApiCtrlCmdGpuGetKeyRotationState__)(struct ConfidentialComputeApi * /*this*/, NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_KEY_ROTATION_STATE_PARAMS *); // exported (id=0xcb33010c) + + // Data members + struct CONF_COMPUTE_CAPS *pCcCaps; +}; + + +// Metadata including vtable with 21 function pointers plus superclass metadata +struct NVOC_VTABLE__ConfidentialComputeApi { + const struct NVOC_VTABLE__RmResource RmResource; // (rmres) 21 function pointers + NvBool (*__confComputeApiAccessCallback__)(struct ConfidentialComputeApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) NvBool (*__confComputeApiShareCallback__)(struct ConfidentialComputeApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) NV_STATUS (*__confComputeApiGetMemInterMapParams__)(struct ConfidentialComputeApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) @@ -115,9 +130,6 @@ struct ConfidentialComputeApi { NV_STATUS (*__confComputeApiUnmapFrom__)(struct ConfidentialComputeApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) NvU32 (*__confComputeApiGetRefCount__)(struct ConfidentialComputeApi * /*this*/); // virtual inherited (res) base (rmres) void (*__confComputeApiAddAdditionalDependants__)(struct RsClient *, struct ConfidentialComputeApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) - - // Data members - struct CONF_COMPUTE_CAPS *pCcCaps; }; #ifndef __NVOC_CLASS_ConfidentialComputeApi_TYPEDEF__ @@ -172,47 +184,47 @@ NV_STATUS __nvoc_objCreate_ConfidentialComputeApi(ConfidentialComputeApi**, Dyna #define confComputeApiCtrlCmdSystemSetSecurityPolicy(pConfComputeApi, pParams) confComputeApiCtrlCmdSystemSetSecurityPolicy_DISPATCH(pConfComputeApi, pParams) #define confComputeApiCtrlCmdGpuGetKeyRotationState_FNPTR(pConfComputeApi) pConfComputeApi->__confComputeApiCtrlCmdGpuGetKeyRotationState__ #define confComputeApiCtrlCmdGpuGetKeyRotationState(pConfComputeApi, pParams) confComputeApiCtrlCmdGpuGetKeyRotationState_DISPATCH(pConfComputeApi, pParams) -#define confComputeApiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define confComputeApiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define confComputeApiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) confComputeApiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define confComputeApiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ +#define confComputeApiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define confComputeApiShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) confComputeApiShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define confComputeApiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define confComputeApiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define confComputeApiGetMemInterMapParams(pRmResource, pParams) confComputeApiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define confComputeApiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define confComputeApiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define confComputeApiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) confComputeApiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define confComputeApiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define confComputeApiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define confComputeApiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) confComputeApiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define confComputeApiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define confComputeApiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define confComputeApiControlSerialization_Prologue(pResource, pCallContext, pParams) confComputeApiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define confComputeApiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define confComputeApiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define confComputeApiControlSerialization_Epilogue(pResource, pCallContext, pParams) confComputeApiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define confComputeApiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ +#define confComputeApiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define confComputeApiControl_Prologue(pResource, pCallContext, pParams) confComputeApiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define confComputeApiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define confComputeApiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define confComputeApiControl_Epilogue(pResource, pCallContext, pParams) confComputeApiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define confComputeApiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define confComputeApiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define confComputeApiCanCopy(pResource) confComputeApiCanCopy_DISPATCH(pResource) -#define confComputeApiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define confComputeApiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define confComputeApiIsDuplicate(pResource, hMemory, pDuplicate) confComputeApiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define confComputeApiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define confComputeApiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define confComputeApiPreDestruct(pResource) confComputeApiPreDestruct_DISPATCH(pResource) -#define confComputeApiControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define confComputeApiControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControl__ #define confComputeApiControl(pResource, pCallContext, pParams) confComputeApiControl_DISPATCH(pResource, pCallContext, pParams) -#define confComputeApiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define confComputeApiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define confComputeApiControlFilter(pResource, pCallContext, pParams) confComputeApiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define confComputeApiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define confComputeApiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define confComputeApiMap(pResource, pCallContext, pParams, pCpuMapping) confComputeApiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define confComputeApiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define confComputeApiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define confComputeApiUnmap(pResource, pCallContext, pCpuMapping) confComputeApiUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define confComputeApiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define confComputeApiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define confComputeApiIsPartialUnmapSupported(pResource) confComputeApiIsPartialUnmapSupported_DISPATCH(pResource) -#define confComputeApiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define confComputeApiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define confComputeApiMapTo(pResource, pParams) confComputeApiMapTo_DISPATCH(pResource, pParams) -#define confComputeApiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define confComputeApiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define confComputeApiUnmapFrom(pResource, pParams) confComputeApiUnmapFrom_DISPATCH(pResource, pParams) -#define confComputeApiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define confComputeApiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define confComputeApiGetRefCount(pResource) confComputeApiGetRefCount_DISPATCH(pResource) -#define confComputeApiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define confComputeApiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define confComputeApiAddAdditionalDependants(pClient, pResource, pReference) confComputeApiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions @@ -261,87 +273,87 @@ static inline NV_STATUS confComputeApiCtrlCmdGpuGetKeyRotationState_DISPATCH(str } static inline NvBool confComputeApiAccessCallback_DISPATCH(struct ConfidentialComputeApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__confComputeApiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__confComputeApiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool confComputeApiShareCallback_DISPATCH(struct ConfidentialComputeApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__confComputeApiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__confComputeApiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS confComputeApiGetMemInterMapParams_DISPATCH(struct ConfidentialComputeApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__confComputeApiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__confComputeApiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS confComputeApiCheckMemInterUnmap_DISPATCH(struct ConfidentialComputeApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__confComputeApiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__confComputeApiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS confComputeApiGetMemoryMappingDescriptor_DISPATCH(struct ConfidentialComputeApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__confComputeApiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__confComputeApiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS confComputeApiControlSerialization_Prologue_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__confComputeApiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__confComputeApiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void confComputeApiControlSerialization_Epilogue_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__confComputeApiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__confComputeApiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS confComputeApiControl_Prologue_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__confComputeApiControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__confComputeApiControl_Prologue__(pResource, pCallContext, pParams); } static inline void confComputeApiControl_Epilogue_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__confComputeApiControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__confComputeApiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool confComputeApiCanCopy_DISPATCH(struct ConfidentialComputeApi *pResource) { - return pResource->__confComputeApiCanCopy__(pResource); + return pResource->__nvoc_vtable->__confComputeApiCanCopy__(pResource); } static inline NV_STATUS confComputeApiIsDuplicate_DISPATCH(struct ConfidentialComputeApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__confComputeApiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__confComputeApiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void confComputeApiPreDestruct_DISPATCH(struct ConfidentialComputeApi *pResource) { - pResource->__confComputeApiPreDestruct__(pResource); + pResource->__nvoc_vtable->__confComputeApiPreDestruct__(pResource); } static inline NV_STATUS confComputeApiControl_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__confComputeApiControl__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__confComputeApiControl__(pResource, pCallContext, pParams); } static inline NV_STATUS confComputeApiControlFilter_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__confComputeApiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__confComputeApiControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS confComputeApiMap_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__confComputeApiMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__confComputeApiMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS confComputeApiUnmap_DISPATCH(struct ConfidentialComputeApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__confComputeApiUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__confComputeApiUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool confComputeApiIsPartialUnmapSupported_DISPATCH(struct ConfidentialComputeApi *pResource) { - return pResource->__confComputeApiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__confComputeApiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS confComputeApiMapTo_DISPATCH(struct ConfidentialComputeApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__confComputeApiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__confComputeApiMapTo__(pResource, pParams); } static inline NV_STATUS confComputeApiUnmapFrom_DISPATCH(struct ConfidentialComputeApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__confComputeApiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__confComputeApiUnmapFrom__(pResource, pParams); } static inline NvU32 confComputeApiGetRefCount_DISPATCH(struct ConfidentialComputeApi *pResource) { - return pResource->__confComputeApiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__confComputeApiGetRefCount__(pResource); } static inline void confComputeApiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ConfidentialComputeApi *pResource, RsResourceRef *pReference) { - pResource->__confComputeApiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__confComputeApiAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS confComputeApiCtrlCmdSystemGetCapabilities_IMPL(struct ConfidentialComputeApi *pConfComputeApi, NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_CAPABILITIES_PARAMS *pParams); diff --git a/src/nvidia/generated/g_conf_compute_nvoc.c b/src/nvidia/generated/g_conf_compute_nvoc.c index a6303383cd..2a7fb3115a 100644 --- a/src/nvidia/generated/g_conf_compute_nvoc.c +++ b/src/nvidia/generated/g_conf_compute_nvoc.c @@ -66,78 +66,96 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_ConfidentialCompute = /*pExportInfo=*/ &__nvoc_export_info_ConfidentialCompute }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_ConfidentialCompute_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute, ENGDESCRIPTOR engDesc); // this +NV_STATUS __nvoc_down_thunk_ConfidentialCompute_engstateStatePreInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute); // this +NV_STATUS __nvoc_down_thunk_ConfidentialCompute_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute); // this +NV_STATUS __nvoc_down_thunk_ConfidentialCompute_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute, NvU32 flags); // this +NV_STATUS __nvoc_down_thunk_ConfidentialCompute_engstateStatePreUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute, NvU32 flags); // this + // 5 down-thunk(s) defined to bridge methods in ConfidentialCompute from superclasses // confComputeConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_ConfidentialCompute_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute, ENGDESCRIPTOR engDesc) { +NV_STATUS __nvoc_down_thunk_ConfidentialCompute_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute, ENGDESCRIPTOR engDesc) { return confComputeConstructEngine(pGpu, (struct ConfidentialCompute *)(((unsigned char *) pConfCompute) - __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset), engDesc); } // confComputeStatePreInitLocked: virtual halified (singleton optimized) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_ConfidentialCompute_engstateStatePreInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute) { +NV_STATUS __nvoc_down_thunk_ConfidentialCompute_engstateStatePreInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute) { return confComputeStatePreInitLocked(pGpu, (struct ConfidentialCompute *)(((unsigned char *) pConfCompute) - __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset)); } // confComputeStateInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_ConfidentialCompute_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute) { +NV_STATUS __nvoc_down_thunk_ConfidentialCompute_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute) { return confComputeStateInitLocked(pGpu, (struct ConfidentialCompute *)(((unsigned char *) pConfCompute) - __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset)); } // confComputeStatePostLoad: virtual halified (2 hals) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_ConfidentialCompute_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_ConfidentialCompute_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute, NvU32 flags) { return confComputeStatePostLoad(pGpu, (struct ConfidentialCompute *)(((unsigned char *) pConfCompute) - __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset), flags); } // confComputeStatePreUnload: virtual halified (2 hals) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_ConfidentialCompute_engstateStatePreUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_ConfidentialCompute_engstateStatePreUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pConfCompute, NvU32 flags) { return confComputeStatePreUnload(pGpu, (struct ConfidentialCompute *)(((unsigned char *) pConfCompute) - __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset), flags); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_confComputeInitMissing(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStatePreInitUnlocked(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStateInitUnlocked(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStatePreLoad(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStateLoad(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStateUnload(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStatePostUnload(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3); // this +void __nvoc_up_thunk_OBJENGSTATE_confComputeStateDestroy(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_confComputeIsPresent(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate); // this + // 9 up-thunk(s) defined to bridge methods in ConfidentialCompute to superclasses // confComputeInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_confComputeInitMissing(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_confComputeInitMissing(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset)); } // confComputeStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStatePreInitUnlocked(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStatePreInitUnlocked(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset)); } // confComputeStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStateInitUnlocked(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStateInitUnlocked(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset)); } // confComputeStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStatePreLoad(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStatePreLoad(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset), arg3); } // confComputeStateLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStateLoad(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStateLoad(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3) { return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset), arg3); } // confComputeStateUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStateUnload(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStateUnload(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3) { return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset), arg3); } // confComputeStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStatePostUnload(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_confComputeStatePostUnload(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset), arg3); } // confComputeStateDestroy: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_confComputeStateDestroy(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_confComputeStateDestroy(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate) { engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset)); } // confComputeIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_confComputeIsPresent(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_confComputeIsPresent(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_ConfidentialCompute_OBJENGSTATE.offset)); } @@ -170,23 +188,23 @@ void __nvoc_init_dataField_ConfidentialCompute(ConfidentialCompute *pThis, RmHal // NVOC Property Hal field -- PDB_PROP_CONFCOMPUTE_IS_MISSING if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_IS_MISSING, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_IS_MISSING, NV_TRUE); } else if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ { - pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_IS_MISSING, ((NvBool)(0 != 0))); - } - pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_ENABLED, ((NvBool)(0 != 0))); - pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_CC_FEATURE_ENABLED, ((NvBool)(0 != 0))); - pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_APM_FEATURE_ENABLED, ((NvBool)(0 != 0))); - pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_DEVTOOLS_MODE_ENABLED, ((NvBool)(0 != 0))); - pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_ENABLE_EARLY_INIT, ((NvBool)(0 != 0))); - pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_GPUS_READY_CHECK_ENABLED, ((NvBool)(0 == 0))); - pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_SPDM_ENABLED, ((NvBool)(0 != 0))); - pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_MULTI_GPU_PROTECTED_PCIE_MODE_ENABLED, ((NvBool)(0 != 0))); - pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED, ((NvBool)(0 != 0))); - pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_ENABLED, ((NvBool)(0 != 0))); - pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_INTERNAL_KEY_ROTATION_ENABLED, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_IS_MISSING, NV_FALSE); + } + pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_ENABLED, NV_FALSE); + pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_CC_FEATURE_ENABLED, NV_FALSE); + pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_APM_FEATURE_ENABLED, NV_FALSE); + pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_DEVTOOLS_MODE_ENABLED, NV_FALSE); + pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_ENABLE_EARLY_INIT, NV_FALSE); + pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_GPUS_READY_CHECK_ENABLED, NV_TRUE); + pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_SPDM_ENABLED, NV_FALSE); + pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_MULTI_GPU_PROTECTED_PCIE_MODE_ENABLED, NV_FALSE); + pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED, NV_FALSE); + pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_ENABLED, NV_FALSE); + pThis->setProperty(pThis, PDB_PROP_CONFCOMPUTE_INTERNAL_KEY_ROTATION_ENABLED, NV_FALSE); } NV_STATUS __nvoc_ctor_OBJENGSTATE(OBJENGSTATE* ); @@ -216,10 +234,6 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); - // confComputeConstructEngine -- virtual override (engstate) base (engstate) - pThis->__confComputeConstructEngine__ = &confComputeConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_ConfidentialCompute_engstateConstructEngine; - // confComputeDestruct -- halified (2 hals) override (engstate) base (engstate) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ { @@ -231,14 +245,6 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh pThis->__confComputeDestruct__ = &confComputeDestruct_b3696a; } - // confComputeStatePreInitLocked -- virtual halified (singleton optimized) override (engstate) base (engstate) body - pThis->__confComputeStatePreInitLocked__ = &confComputeStatePreInitLocked_56cd7a; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_ConfidentialCompute_engstateStatePreInitLocked; - - // confComputeStateInitLocked -- virtual override (engstate) base (engstate) - pThis->__confComputeStateInitLocked__ = &confComputeStateInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_ConfidentialCompute_engstateStateInitLocked; - // confComputeStatePostLoad -- virtual halified (2 hals) override (engstate) base (engstate) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ { @@ -249,7 +255,6 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh { pThis->__confComputeStatePostLoad__ = &confComputeStatePostLoad_56cd7a; } - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_ConfidentialCompute_engstateStatePostLoad; // confComputeStatePreUnload -- virtual halified (2 hals) override (engstate) base (engstate) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ @@ -261,7 +266,6 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh { pThis->__confComputeStatePreUnload__ = &confComputeStatePreUnload_56cd7a; } - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_down_thunk_ConfidentialCompute_engstateStatePreUnload; // confComputeSetErrorState -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ @@ -296,11 +300,30 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh pThis->__confComputeKeyStoreRetrieveViaKeyId__ = &confComputeKeyStoreRetrieveViaKeyId_46f6a7; } - // confComputeDeriveSecrets -- halified (2 hals) body - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ + // confComputeDeriveSecretsForCEKeySpace -- halified (3 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ + { + pThis->__confComputeDeriveSecretsForCEKeySpace__ = &confComputeDeriveSecretsForCEKeySpace_GH100; + } + else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__confComputeDeriveSecretsForCEKeySpace__ = &confComputeDeriveSecretsForCEKeySpace_GB100; + } + // default + else + { + pThis->__confComputeDeriveSecretsForCEKeySpace__ = &confComputeDeriveSecretsForCEKeySpace_46f6a7; + } + + // confComputeDeriveSecrets -- halified (3 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__confComputeDeriveSecrets__ = &confComputeDeriveSecrets_GH100; } + else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__confComputeDeriveSecrets__ = &confComputeDeriveSecrets_GB100; + } // default else { @@ -321,25 +344,74 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh // confComputeIsSpdmEnabled -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->__confComputeIsSpdmEnabled__ = &confComputeIsSpdmEnabled_cbe027; + pThis->__confComputeIsSpdmEnabled__ = &confComputeIsSpdmEnabled_88bc07; } // default else { - pThis->__confComputeIsSpdmEnabled__ = &confComputeIsSpdmEnabled_491d52; + pThis->__confComputeIsSpdmEnabled__ = &confComputeIsSpdmEnabled_3dd2c9; } - // confComputeGetEngineIdFromKeySpace -- halified (2 hals) body - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ + // confComputeGetEngineIdFromKeySpace -- halified (3 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { pThis->__confComputeGetEngineIdFromKeySpace__ = &confComputeGetEngineIdFromKeySpace_GH100; } + else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__confComputeGetEngineIdFromKeySpace__ = &confComputeGetEngineIdFromKeySpace_GB100; + } // default else { pThis->__confComputeGetEngineIdFromKeySpace__ = &confComputeGetEngineIdFromKeySpace_78ac8b; } + // confComputeGetKeySpaceFromKChannel -- halified (3 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ + { + pThis->__confComputeGetKeySpaceFromKChannel__ = &confComputeGetKeySpaceFromKChannel_GH100; + } + else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__confComputeGetKeySpaceFromKChannel__ = &confComputeGetKeySpaceFromKChannel_GB100; + } + // default + else + { + pThis->__confComputeGetKeySpaceFromKChannel__ = &confComputeGetKeySpaceFromKChannel_46f6a7; + } + + // confComputeGetLceKeyIdFromKChannel -- halified (3 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ + { + pThis->__confComputeGetLceKeyIdFromKChannel__ = &confComputeGetLceKeyIdFromKChannel_GH100; + } + else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__confComputeGetLceKeyIdFromKChannel__ = &confComputeGetLceKeyIdFromKChannel_GB100; + } + // default + else + { + pThis->__confComputeGetLceKeyIdFromKChannel__ = &confComputeGetLceKeyIdFromKChannel_46f6a7; + } + + // confComputeGetMaxCeKeySpaceIdx -- halified (3 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ + { + pThis->__confComputeGetMaxCeKeySpaceIdx__ = &confComputeGetMaxCeKeySpaceIdx_6c58cf; + } + else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__confComputeGetMaxCeKeySpaceIdx__ = &confComputeGetMaxCeKeySpaceIdx_e9bc01; + } + // default + else + { + pThis->__confComputeGetMaxCeKeySpaceIdx__ = &confComputeGetMaxCeKeySpaceIdx_4a4dee; + } + // confComputeGlobalKeyIsKernelPriv -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { @@ -348,7 +420,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh // default else { - pThis->__confComputeGlobalKeyIsKernelPriv__ = &confComputeGlobalKeyIsKernelPriv_491d52; + pThis->__confComputeGlobalKeyIsKernelPriv__ = &confComputeGlobalKeyIsKernelPriv_3dd2c9; } // confComputeGlobalKeyIsUvmKey -- halified (2 hals) body @@ -359,7 +431,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh // default else { - pThis->__confComputeGlobalKeyIsUvmKey__ = &confComputeGlobalKeyIsUvmKey_491d52; + pThis->__confComputeGlobalKeyIsUvmKey__ = &confComputeGlobalKeyIsUvmKey_3dd2c9; } // confComputeGetKeyPairByChannel -- halified (2 hals) body @@ -463,12 +535,12 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh } else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ { - pThis->__confComputeIsDebugModeEnabled__ = &confComputeIsDebugModeEnabled_cbe027; + pThis->__confComputeIsDebugModeEnabled__ = &confComputeIsDebugModeEnabled_88bc07; } // default else { - pThis->__confComputeIsDebugModeEnabled__ = &confComputeIsDebugModeEnabled_491d52; + pThis->__confComputeIsDebugModeEnabled__ = &confComputeIsDebugModeEnabled_3dd2c9; } // confComputeIsGpuCcCapable -- halified (3 hals) body @@ -478,12 +550,12 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh } else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ { - pThis->__confComputeIsGpuCcCapable__ = &confComputeIsGpuCcCapable_cbe027; + pThis->__confComputeIsGpuCcCapable__ = &confComputeIsGpuCcCapable_88bc07; } // default else { - pThis->__confComputeIsGpuCcCapable__ = &confComputeIsGpuCcCapable_491d52; + pThis->__confComputeIsGpuCcCapable__ = &confComputeIsGpuCcCapable_3dd2c9; } // confComputeEstablishSpdmSessionAndKeys -- halified (2 hals) body @@ -527,7 +599,7 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh // default else { - pThis->__confComputeKeyStoreIsValidGlobalKeyId__ = &confComputeKeyStoreIsValidGlobalKeyId_491d52; + pThis->__confComputeKeyStoreIsValidGlobalKeyId__ = &confComputeKeyStoreIsValidGlobalKeyId_3dd2c9; } // confComputeKeyStoreInit -- halified (2 hals) body @@ -584,40 +656,47 @@ static void __nvoc_init_funcTable_ConfidentialCompute_1(ConfidentialCompute *pTh { pThis->__confComputeKeyStoreClearExportMasterKey__ = &confComputeKeyStoreClearExportMasterKey_b3696a; } - - // confComputeInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__confComputeInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeInitMissing; - - // confComputeStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__confComputeStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeStatePreInitUnlocked; - - // confComputeStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__confComputeStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeStateInitUnlocked; - - // confComputeStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__confComputeStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeStatePreLoad; - - // confComputeStateLoad -- virtual inherited (engstate) base (engstate) - pThis->__confComputeStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeStateLoad; - - // confComputeStateUnload -- virtual inherited (engstate) base (engstate) - pThis->__confComputeStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeStateUnload; - - // confComputeStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__confComputeStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeStatePostUnload; - - // confComputeStateDestroy -- virtual inherited (engstate) base (engstate) - pThis->__confComputeStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeStateDestroy; - - // confComputeIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__confComputeIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeIsPresent; -} // End __nvoc_init_funcTable_ConfidentialCompute_1 with approximately 81 basic block(s). +} // End __nvoc_init_funcTable_ConfidentialCompute_1 with approximately 78 basic block(s). -// Initialize vtable(s) for 41 virtual method(s). +// Initialize vtable(s) for 45 virtual method(s). void __nvoc_init_funcTable_ConfidentialCompute(ConfidentialCompute *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 41 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__ConfidentialCompute vtable = { + .__confComputeConstructEngine__ = &confComputeConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_ConfidentialCompute_engstateConstructEngine, // virtual + .__confComputeStatePreInitLocked__ = &confComputeStatePreInitLocked_56cd7a, // virtual halified (singleton optimized) override (engstate) base (engstate) body + .OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_ConfidentialCompute_engstateStatePreInitLocked, // virtual + .__confComputeStateInitLocked__ = &confComputeStateInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_ConfidentialCompute_engstateStateInitLocked, // virtual + .OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_ConfidentialCompute_engstateStatePostLoad, // virtual + .OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_down_thunk_ConfidentialCompute_engstateStatePreUnload, // virtual + .__confComputeInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__confComputeStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__confComputeStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__confComputeStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__confComputeStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeStateLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &engstateStateLoad_IMPL, // virtual + .__confComputeStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeStateUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &engstateStateUnload_IMPL, // virtual + .__confComputeStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__confComputeStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeStateDestroy, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &engstateStateDestroy_IMPL, // virtual + .__confComputeIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_confComputeIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_vtable = &vtable; // (confCompute) this + + // Initialize vtable(s) with 33 per-object function pointer(s). __nvoc_init_funcTable_ConfidentialCompute_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_conf_compute_nvoc.h b/src/nvidia/generated/g_conf_compute_nvoc.h index 7fe477b3a5..8e2fa0d780 100644 --- a/src/nvidia/generated/g_conf_compute_nvoc.h +++ b/src/nvidia/generated/g_conf_compute_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -97,10 +97,15 @@ typedef struct #endif +// Metadata including vtable +struct NVOC_VTABLE__ConfidentialCompute; + + struct ConfidentialCompute { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__ConfidentialCompute *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -110,20 +115,21 @@ struct ConfidentialCompute { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct ConfidentialCompute *__nvoc_pbase_ConfidentialCompute; // confCompute - // Vtable with 41 per-object function pointers - NV_STATUS (*__confComputeConstructEngine__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + // Vtable with 33 per-object function pointers void (*__confComputeDestruct__)(struct ConfidentialCompute * /*this*/); // halified (2 hals) override (engstate) base (engstate) body - NV_STATUS (*__confComputeStatePreInitLocked__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // virtual halified (singleton optimized) override (engstate) base (engstate) body - NV_STATUS (*__confComputeStateInitLocked__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // virtual override (engstate) base (engstate) NV_STATUS (*__confComputeStatePostLoad__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/, NvU32); // virtual halified (2 hals) override (engstate) base (engstate) body NV_STATUS (*__confComputeStatePreUnload__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/, NvU32); // virtual halified (2 hals) override (engstate) base (engstate) body void (*__confComputeSetErrorState__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // halified (2 hals) body NV_STATUS (*__confComputeKeyStoreRetrieveViaChannel__)(struct ConfidentialCompute * /*this*/, struct KernelChannel *, ROTATE_IV_TYPE, NvBool, CC_KMB *); // halified (2 hals) body NV_STATUS (*__confComputeKeyStoreRetrieveViaKeyId__)(struct ConfidentialCompute * /*this*/, NvU32, ROTATE_IV_TYPE, NvBool, CC_KMB *); // halified (2 hals) body - NV_STATUS (*__confComputeDeriveSecrets__)(struct ConfidentialCompute * /*this*/, NvU32); // halified (2 hals) body + NV_STATUS (*__confComputeDeriveSecretsForCEKeySpace__)(struct ConfidentialCompute * /*this*/, RM_ENGINE_TYPE, NvU32); // halified (3 hals) body + NV_STATUS (*__confComputeDeriveSecrets__)(struct ConfidentialCompute * /*this*/, NvU32); // halified (3 hals) body NV_STATUS (*__confComputeUpdateSecrets__)(struct ConfidentialCompute * /*this*/, NvU32); // halified (2 hals) body NvBool (*__confComputeIsSpdmEnabled__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // halified (2 hals) body - RM_ENGINE_TYPE (*__confComputeGetEngineIdFromKeySpace__)(struct ConfidentialCompute * /*this*/, NvU32); // halified (2 hals) body + RM_ENGINE_TYPE (*__confComputeGetEngineIdFromKeySpace__)(struct ConfidentialCompute * /*this*/, NvU32); // halified (3 hals) body + NV_STATUS (*__confComputeGetKeySpaceFromKChannel__)(struct ConfidentialCompute * /*this*/, struct KernelChannel *, NvU16 *); // halified (3 hals) body + NV_STATUS (*__confComputeGetLceKeyIdFromKChannel__)(struct ConfidentialCompute * /*this*/, struct KernelChannel *, ROTATE_IV_TYPE, NvU16 *); // halified (3 hals) body + NvU32 (*__confComputeGetMaxCeKeySpaceIdx__)(struct ConfidentialCompute * /*this*/); // halified (3 hals) body NvBool (*__confComputeGlobalKeyIsKernelPriv__)(struct ConfidentialCompute * /*this*/, NvU32); // halified (2 hals) body NvBool (*__confComputeGlobalKeyIsUvmKey__)(struct ConfidentialCompute * /*this*/, NvU32); // halified (2 hals) body NV_STATUS (*__confComputeGetKeyPairByChannel__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/, struct KernelChannel *, NvU32 *, NvU32 *); // halified (2 hals) body @@ -143,15 +149,6 @@ struct ConfidentialCompute { void * (*__confComputeKeyStoreGetExportMasterKey__)(struct ConfidentialCompute * /*this*/); // halified (2 hals) body NV_STATUS (*__confComputeKeyStoreDeriveKey__)(struct ConfidentialCompute * /*this*/, NvU32); // halified (2 hals) body void (*__confComputeKeyStoreClearExportMasterKey__)(struct ConfidentialCompute * /*this*/); // halified (2 hals) body - void (*__confComputeInitMissing__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__confComputeStatePreInitUnlocked__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__confComputeStateInitUnlocked__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__confComputeStatePreLoad__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__confComputeStateLoad__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__confComputeStateUnload__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__confComputeStatePostUnload__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - void (*__confComputeStateDestroy__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // virtual inherited (engstate) base (engstate) - NvBool (*__confComputeIsPresent__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // virtual inherited (engstate) base (engstate) // 12 PDB properties NvBool PDB_PROP_CONFCOMPUTE_ENABLED; @@ -175,26 +172,44 @@ struct ConfidentialCompute { struct ccslContext_t *pNonReplayableFaultCcslCtx; struct ccslContext_t *pReplayableFaultCcslCtx; struct ccslContext_t *pGspSec2RpcCcslCtx; - NvU32 keyRotationCallbackCount[64]; NvBool bAcceptClientRequest; struct TMR_EVENT *pGspHeartbeatTimer; NvU32 heartbeatPeriodSec; NvU32 keyRotationEnableMask; NvU64 keyRotationInternalThreshold; NvU64 attackerAdvantage; - KEY_ROTATION_STATS_INFO aggregateStats[64]; + KEY_ROTATION_STATS_INFO aggregateStats[112]; NvU8 PRIVATE_FIELD(m_exportMasterKey)[32]; void *PRIVATE_FIELD(m_keySlot); - KEY_ROTATION_STATUS PRIVATE_FIELD(keyRotationState)[64]; - KEY_ROTATION_STATS_INFO PRIVATE_FIELD(freedChannelAggregateStats)[64]; - KEY_ROTATION_TIMEOUT_INFO PRIVATE_FIELD(keyRotationTimeoutInfo)[64]; - NvU32 PRIVATE_FIELD(keyRotationCount)[64]; + KEY_ROTATION_STATUS PRIVATE_FIELD(keyRotationState)[112]; + KEY_ROTATION_STATS_INFO PRIVATE_FIELD(freedChannelAggregateStats)[112]; + KEY_ROTATION_TIMEOUT_INFO PRIVATE_FIELD(keyRotationTimeoutInfo)[112]; + NvU32 PRIVATE_FIELD(keyRotationCount)[112]; NvU32 PRIVATE_FIELD(keyRotationTimeout); NvU64 PRIVATE_FIELD(keyRotationThresholdDelta); NvU64 PRIVATE_FIELD(keyRotationUpperThreshold); NvU64 PRIVATE_FIELD(keyRotationLowerThreshold); }; + +// Metadata including vtable with 12 function pointers plus superclass metadata +struct NVOC_VTABLE__ConfidentialCompute { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + + NV_STATUS (*__confComputeConstructEngine__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__confComputeStatePreInitLocked__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__confComputeStateInitLocked__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // virtual override (engstate) base (engstate) + void (*__confComputeInitMissing__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__confComputeStatePreInitUnlocked__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__confComputeStateInitUnlocked__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__confComputeStatePreLoad__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__confComputeStateLoad__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__confComputeStateUnload__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__confComputeStatePostUnload__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__confComputeStateDestroy__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__confComputeIsPresent__)(struct OBJGPU *, struct ConfidentialCompute * /*this*/); // virtual inherited (engstate) base (engstate) +}; + #ifndef __NVOC_CLASS_ConfidentialCompute_TYPEDEF__ #define __NVOC_CLASS_ConfidentialCompute_TYPEDEF__ typedef struct ConfidentialCompute ConfidentialCompute; @@ -251,14 +266,14 @@ NV_STATUS __nvoc_objCreate_ConfidentialCompute(ConfidentialCompute**, Dynamic*, // Wrapper macros -#define confComputeConstructEngine_FNPTR(pConfCompute) pConfCompute->__confComputeConstructEngine__ +#define confComputeConstructEngine_FNPTR(pConfCompute) pConfCompute->__nvoc_vtable->__confComputeConstructEngine__ #define confComputeConstructEngine(pGpu, pConfCompute, engDesc) confComputeConstructEngine_DISPATCH(pGpu, pConfCompute, engDesc) #define confComputeDestruct_FNPTR(pConfCompute) pConfCompute->__confComputeDestruct__ #define __nvoc_confComputeDestruct(pConfCompute) confComputeDestruct_DISPATCH(pConfCompute) -#define confComputeStatePreInitLocked_FNPTR(pConfCompute) pConfCompute->__confComputeStatePreInitLocked__ +#define confComputeStatePreInitLocked_FNPTR(pConfCompute) pConfCompute->__nvoc_vtable->__confComputeStatePreInitLocked__ #define confComputeStatePreInitLocked(pGpu, pConfCompute) confComputeStatePreInitLocked_DISPATCH(pGpu, pConfCompute) #define confComputeStatePreInitLocked_HAL(pGpu, pConfCompute) confComputeStatePreInitLocked_DISPATCH(pGpu, pConfCompute) -#define confComputeStateInitLocked_FNPTR(pConfCompute) pConfCompute->__confComputeStateInitLocked__ +#define confComputeStateInitLocked_FNPTR(pConfCompute) pConfCompute->__nvoc_vtable->__confComputeStateInitLocked__ #define confComputeStateInitLocked(pGpu, pConfCompute) confComputeStateInitLocked_DISPATCH(pGpu, pConfCompute) #define confComputeStatePostLoad_FNPTR(pConfCompute) pConfCompute->__confComputeStatePostLoad__ #define confComputeStatePostLoad(pGpu, pConfCompute, flags) confComputeStatePostLoad_DISPATCH(pGpu, pConfCompute, flags) @@ -275,6 +290,9 @@ NV_STATUS __nvoc_objCreate_ConfidentialCompute(ConfidentialCompute**, Dynamic*, #define confComputeKeyStoreRetrieveViaKeyId_FNPTR(pConfCompute) pConfCompute->__confComputeKeyStoreRetrieveViaKeyId__ #define confComputeKeyStoreRetrieveViaKeyId(pConfCompute, globalKeyId, rotateOperation, bIncludeIvOrNonce, keyMaterialBundle) confComputeKeyStoreRetrieveViaKeyId_DISPATCH(pConfCompute, globalKeyId, rotateOperation, bIncludeIvOrNonce, keyMaterialBundle) #define confComputeKeyStoreRetrieveViaKeyId_HAL(pConfCompute, globalKeyId, rotateOperation, bIncludeIvOrNonce, keyMaterialBundle) confComputeKeyStoreRetrieveViaKeyId_DISPATCH(pConfCompute, globalKeyId, rotateOperation, bIncludeIvOrNonce, keyMaterialBundle) +#define confComputeDeriveSecretsForCEKeySpace_FNPTR(pConfCompute) pConfCompute->__confComputeDeriveSecretsForCEKeySpace__ +#define confComputeDeriveSecretsForCEKeySpace(pConfCompute, ceRmEngineTypeIdx, ccKeyspaceIndex) confComputeDeriveSecretsForCEKeySpace_DISPATCH(pConfCompute, ceRmEngineTypeIdx, ccKeyspaceIndex) +#define confComputeDeriveSecretsForCEKeySpace_HAL(pConfCompute, ceRmEngineTypeIdx, ccKeyspaceIndex) confComputeDeriveSecretsForCEKeySpace_DISPATCH(pConfCompute, ceRmEngineTypeIdx, ccKeyspaceIndex) #define confComputeDeriveSecrets_FNPTR(pConfCompute) pConfCompute->__confComputeDeriveSecrets__ #define confComputeDeriveSecrets(pConfCompute, engine) confComputeDeriveSecrets_DISPATCH(pConfCompute, engine) #define confComputeDeriveSecrets_HAL(pConfCompute, engine) confComputeDeriveSecrets_DISPATCH(pConfCompute, engine) @@ -287,6 +305,15 @@ NV_STATUS __nvoc_objCreate_ConfidentialCompute(ConfidentialCompute**, Dynamic*, #define confComputeGetEngineIdFromKeySpace_FNPTR(pConfCompute) pConfCompute->__confComputeGetEngineIdFromKeySpace__ #define confComputeGetEngineIdFromKeySpace(pConfCompute, keySpace) confComputeGetEngineIdFromKeySpace_DISPATCH(pConfCompute, keySpace) #define confComputeGetEngineIdFromKeySpace_HAL(pConfCompute, keySpace) confComputeGetEngineIdFromKeySpace_DISPATCH(pConfCompute, keySpace) +#define confComputeGetKeySpaceFromKChannel_FNPTR(pConfCompute) pConfCompute->__confComputeGetKeySpaceFromKChannel__ +#define confComputeGetKeySpaceFromKChannel(pConfCompute, pKernelChannel, keyspace) confComputeGetKeySpaceFromKChannel_DISPATCH(pConfCompute, pKernelChannel, keyspace) +#define confComputeGetKeySpaceFromKChannel_HAL(pConfCompute, pKernelChannel, keyspace) confComputeGetKeySpaceFromKChannel_DISPATCH(pConfCompute, pKernelChannel, keyspace) +#define confComputeGetLceKeyIdFromKChannel_FNPTR(pConfCompute) pConfCompute->__confComputeGetLceKeyIdFromKChannel__ +#define confComputeGetLceKeyIdFromKChannel(pConfCompute, pKernelChannel, rotateOperation, pKeyId) confComputeGetLceKeyIdFromKChannel_DISPATCH(pConfCompute, pKernelChannel, rotateOperation, pKeyId) +#define confComputeGetLceKeyIdFromKChannel_HAL(pConfCompute, pKernelChannel, rotateOperation, pKeyId) confComputeGetLceKeyIdFromKChannel_DISPATCH(pConfCompute, pKernelChannel, rotateOperation, pKeyId) +#define confComputeGetMaxCeKeySpaceIdx_FNPTR(pConfCompute) pConfCompute->__confComputeGetMaxCeKeySpaceIdx__ +#define confComputeGetMaxCeKeySpaceIdx(pConfCompute) confComputeGetMaxCeKeySpaceIdx_DISPATCH(pConfCompute) +#define confComputeGetMaxCeKeySpaceIdx_HAL(pConfCompute) confComputeGetMaxCeKeySpaceIdx_DISPATCH(pConfCompute) #define confComputeGlobalKeyIsKernelPriv_FNPTR(pConfCompute) pConfCompute->__confComputeGlobalKeyIsKernelPriv__ #define confComputeGlobalKeyIsKernelPriv(pConfCompute, keyId) confComputeGlobalKeyIsKernelPriv_DISPATCH(pConfCompute, keyId) #define confComputeGlobalKeyIsKernelPriv_HAL(pConfCompute, keyId) confComputeGlobalKeyIsKernelPriv_DISPATCH(pConfCompute, keyId) @@ -344,28 +371,28 @@ NV_STATUS __nvoc_objCreate_ConfidentialCompute(ConfidentialCompute**, Dynamic*, #define confComputeKeyStoreClearExportMasterKey_FNPTR(pConfCompute) pConfCompute->__confComputeKeyStoreClearExportMasterKey__ #define confComputeKeyStoreClearExportMasterKey(pConfCompute) confComputeKeyStoreClearExportMasterKey_DISPATCH(pConfCompute) #define confComputeKeyStoreClearExportMasterKey_HAL(pConfCompute) confComputeKeyStoreClearExportMasterKey_DISPATCH(pConfCompute) -#define confComputeInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define confComputeInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define confComputeInitMissing(pGpu, pEngstate) confComputeInitMissing_DISPATCH(pGpu, pEngstate) -#define confComputeStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define confComputeStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define confComputeStatePreInitUnlocked(pGpu, pEngstate) confComputeStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define confComputeStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define confComputeStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define confComputeStateInitUnlocked(pGpu, pEngstate) confComputeStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define confComputeStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define confComputeStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define confComputeStatePreLoad(pGpu, pEngstate, arg3) confComputeStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define confComputeStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define confComputeStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateLoad__ #define confComputeStateLoad(pGpu, pEngstate, arg3) confComputeStateLoad_DISPATCH(pGpu, pEngstate, arg3) -#define confComputeStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define confComputeStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateUnload__ #define confComputeStateUnload(pGpu, pEngstate, arg3) confComputeStateUnload_DISPATCH(pGpu, pEngstate, arg3) -#define confComputeStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define confComputeStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define confComputeStatePostUnload(pGpu, pEngstate, arg3) confComputeStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define confComputeStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define confComputeStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateDestroy__ #define confComputeStateDestroy(pGpu, pEngstate) confComputeStateDestroy_DISPATCH(pGpu, pEngstate) -#define confComputeIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define confComputeIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define confComputeIsPresent(pGpu, pEngstate) confComputeIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS confComputeConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, ENGDESCRIPTOR engDesc) { - return pConfCompute->__confComputeConstructEngine__(pGpu, pConfCompute, engDesc); + return pConfCompute->__nvoc_vtable->__confComputeConstructEngine__(pGpu, pConfCompute, engDesc); } static inline void confComputeDestruct_DISPATCH(struct ConfidentialCompute *pConfCompute) { @@ -373,11 +400,11 @@ static inline void confComputeDestruct_DISPATCH(struct ConfidentialCompute *pCon } static inline NV_STATUS confComputeStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { - return pConfCompute->__confComputeStatePreInitLocked__(pGpu, pConfCompute); + return pConfCompute->__nvoc_vtable->__confComputeStatePreInitLocked__(pGpu, pConfCompute); } static inline NV_STATUS confComputeStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { - return pConfCompute->__confComputeStateInitLocked__(pGpu, pConfCompute); + return pConfCompute->__nvoc_vtable->__confComputeStateInitLocked__(pGpu, pConfCompute); } static inline NV_STATUS confComputeStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, NvU32 flags) { @@ -400,6 +427,10 @@ static inline NV_STATUS confComputeKeyStoreRetrieveViaKeyId_DISPATCH(struct Conf return pConfCompute->__confComputeKeyStoreRetrieveViaKeyId__(pConfCompute, globalKeyId, rotateOperation, bIncludeIvOrNonce, keyMaterialBundle); } +static inline NV_STATUS confComputeDeriveSecretsForCEKeySpace_DISPATCH(struct ConfidentialCompute *pConfCompute, RM_ENGINE_TYPE ceRmEngineTypeIdx, NvU32 ccKeyspaceIndex) { + return pConfCompute->__confComputeDeriveSecretsForCEKeySpace__(pConfCompute, ceRmEngineTypeIdx, ccKeyspaceIndex); +} + static inline NV_STATUS confComputeDeriveSecrets_DISPATCH(struct ConfidentialCompute *pConfCompute, NvU32 engine) { return pConfCompute->__confComputeDeriveSecrets__(pConfCompute, engine); } @@ -416,6 +447,18 @@ static inline RM_ENGINE_TYPE confComputeGetEngineIdFromKeySpace_DISPATCH(struct return pConfCompute->__confComputeGetEngineIdFromKeySpace__(pConfCompute, keySpace); } +static inline NV_STATUS confComputeGetKeySpaceFromKChannel_DISPATCH(struct ConfidentialCompute *pConfCompute, struct KernelChannel *pKernelChannel, NvU16 *keyspace) { + return pConfCompute->__confComputeGetKeySpaceFromKChannel__(pConfCompute, pKernelChannel, keyspace); +} + +static inline NV_STATUS confComputeGetLceKeyIdFromKChannel_DISPATCH(struct ConfidentialCompute *pConfCompute, struct KernelChannel *pKernelChannel, ROTATE_IV_TYPE rotateOperation, NvU16 *pKeyId) { + return pConfCompute->__confComputeGetLceKeyIdFromKChannel__(pConfCompute, pKernelChannel, rotateOperation, pKeyId); +} + +static inline NvU32 confComputeGetMaxCeKeySpaceIdx_DISPATCH(struct ConfidentialCompute *pConfCompute) { + return pConfCompute->__confComputeGetMaxCeKeySpaceIdx__(pConfCompute); +} + static inline NvBool confComputeGlobalKeyIsKernelPriv_DISPATCH(struct ConfidentialCompute *pConfCompute, NvU32 keyId) { return pConfCompute->__confComputeGlobalKeyIsKernelPriv__(pConfCompute, keyId); } @@ -493,39 +536,39 @@ static inline void confComputeKeyStoreClearExportMasterKey_DISPATCH(struct Confi } static inline void confComputeInitMissing_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate) { - pEngstate->__confComputeInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__confComputeInitMissing__(pGpu, pEngstate); } static inline NV_STATUS confComputeStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate) { - return pEngstate->__confComputeStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__confComputeStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS confComputeStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate) { - return pEngstate->__confComputeStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__confComputeStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS confComputeStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3) { - return pEngstate->__confComputeStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__confComputeStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS confComputeStateLoad_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3) { - return pEngstate->__confComputeStateLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__confComputeStateLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS confComputeStateUnload_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3) { - return pEngstate->__confComputeStateUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__confComputeStateUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS confComputeStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate, NvU32 arg3) { - return pEngstate->__confComputeStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__confComputeStatePostUnload__(pGpu, pEngstate, arg3); } static inline void confComputeStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate) { - pEngstate->__confComputeStateDestroy__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__confComputeStateDestroy__(pGpu, pEngstate); } static inline NvBool confComputeIsPresent_DISPATCH(struct OBJGPU *pGpu, struct ConfidentialCompute *pEngstate) { - return pEngstate->__confComputeIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__confComputeIsPresent__(pGpu, pEngstate); } NV_STATUS confComputeConstructEngine_IMPL(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, ENGDESCRIPTOR engDesc); @@ -572,8 +615,18 @@ static inline NV_STATUS confComputeKeyStoreRetrieveViaKeyId_46f6a7(struct Confid return NV_ERR_NOT_SUPPORTED; } +NV_STATUS confComputeDeriveSecretsForCEKeySpace_GH100(struct ConfidentialCompute *pConfCompute, RM_ENGINE_TYPE ceRmEngineTypeIdx, NvU32 ccKeyspaceIndex); + +NV_STATUS confComputeDeriveSecretsForCEKeySpace_GB100(struct ConfidentialCompute *pConfCompute, RM_ENGINE_TYPE ceRmEngineTypeIdx, NvU32 ccKeyspaceIndex); + +static inline NV_STATUS confComputeDeriveSecretsForCEKeySpace_46f6a7(struct ConfidentialCompute *pConfCompute, RM_ENGINE_TYPE ceRmEngineTypeIdx, NvU32 ccKeyspaceIndex) { + return NV_ERR_NOT_SUPPORTED; +} + NV_STATUS confComputeDeriveSecrets_GH100(struct ConfidentialCompute *pConfCompute, NvU32 engine); +NV_STATUS confComputeDeriveSecrets_GB100(struct ConfidentialCompute *pConfCompute, NvU32 engine); + static inline NV_STATUS confComputeDeriveSecrets_46f6a7(struct ConfidentialCompute *pConfCompute, NvU32 engine) { return NV_ERR_NOT_SUPPORTED; } @@ -584,30 +637,60 @@ static inline NV_STATUS confComputeUpdateSecrets_46f6a7(struct ConfidentialCompu return NV_ERR_NOT_SUPPORTED; } -static inline NvBool confComputeIsSpdmEnabled_cbe027(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { - return ((NvBool)(0 == 0)); +static inline NvBool confComputeIsSpdmEnabled_88bc07(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { + return NV_TRUE; } -static inline NvBool confComputeIsSpdmEnabled_491d52(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { - return ((NvBool)(0 != 0)); +static inline NvBool confComputeIsSpdmEnabled_3dd2c9(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { + return NV_FALSE; } RM_ENGINE_TYPE confComputeGetEngineIdFromKeySpace_GH100(struct ConfidentialCompute *pConfCompute, NvU32 keySpace); +RM_ENGINE_TYPE confComputeGetEngineIdFromKeySpace_GB100(struct ConfidentialCompute *pConfCompute, NvU32 keySpace); + static inline RM_ENGINE_TYPE confComputeGetEngineIdFromKeySpace_78ac8b(struct ConfidentialCompute *pConfCompute, NvU32 keySpace) { return RM_ENGINE_TYPE_NULL; } +NV_STATUS confComputeGetKeySpaceFromKChannel_GH100(struct ConfidentialCompute *pConfCompute, struct KernelChannel *pKernelChannel, NvU16 *keyspace); + +NV_STATUS confComputeGetKeySpaceFromKChannel_GB100(struct ConfidentialCompute *pConfCompute, struct KernelChannel *pKernelChannel, NvU16 *keyspace); + +static inline NV_STATUS confComputeGetKeySpaceFromKChannel_46f6a7(struct ConfidentialCompute *pConfCompute, struct KernelChannel *pKernelChannel, NvU16 *keyspace) { + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS confComputeGetLceKeyIdFromKChannel_GH100(struct ConfidentialCompute *pConfCompute, struct KernelChannel *pKernelChannel, ROTATE_IV_TYPE rotateOperation, NvU16 *pKeyId); + +NV_STATUS confComputeGetLceKeyIdFromKChannel_GB100(struct ConfidentialCompute *pConfCompute, struct KernelChannel *pKernelChannel, ROTATE_IV_TYPE rotateOperation, NvU16 *pKeyId); + +static inline NV_STATUS confComputeGetLceKeyIdFromKChannel_46f6a7(struct ConfidentialCompute *pConfCompute, struct KernelChannel *pKernelChannel, ROTATE_IV_TYPE rotateOperation, NvU16 *pKeyId) { + return NV_ERR_NOT_SUPPORTED; +} + +static inline NvU32 confComputeGetMaxCeKeySpaceIdx_6c58cf(struct ConfidentialCompute *pConfCompute) { + return CC_KEYSPACE_LCE7; +} + +static inline NvU32 confComputeGetMaxCeKeySpaceIdx_e9bc01(struct ConfidentialCompute *pConfCompute) { + return CC_KEYSPACE_LCE17; +} + +static inline NvU32 confComputeGetMaxCeKeySpaceIdx_4a4dee(struct ConfidentialCompute *pConfCompute) { + return 0; +} + NvBool confComputeGlobalKeyIsKernelPriv_GH100(struct ConfidentialCompute *pConfCompute, NvU32 keyId); -static inline NvBool confComputeGlobalKeyIsKernelPriv_491d52(struct ConfidentialCompute *pConfCompute, NvU32 keyId) { - return ((NvBool)(0 != 0)); +static inline NvBool confComputeGlobalKeyIsKernelPriv_3dd2c9(struct ConfidentialCompute *pConfCompute, NvU32 keyId) { + return NV_FALSE; } NvBool confComputeGlobalKeyIsUvmKey_GH100(struct ConfidentialCompute *pConfCompute, NvU32 keyId); -static inline NvBool confComputeGlobalKeyIsUvmKey_491d52(struct ConfidentialCompute *pConfCompute, NvU32 keyId) { - return ((NvBool)(0 != 0)); +static inline NvBool confComputeGlobalKeyIsUvmKey_3dd2c9(struct ConfidentialCompute *pConfCompute, NvU32 keyId) { + return NV_FALSE; } NV_STATUS confComputeGetKeyPairByChannel_GH100(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute, struct KernelChannel *pKernelChannel, NvU32 *pH2DKey, NvU32 *pD2HKey); @@ -652,22 +735,22 @@ static inline NV_STATUS confComputeEnableInternalKeyRotationSupport_56cd7a(struc NvBool confComputeIsDebugModeEnabled_GH100(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute); -static inline NvBool confComputeIsDebugModeEnabled_cbe027(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { - return ((NvBool)(0 == 0)); +static inline NvBool confComputeIsDebugModeEnabled_88bc07(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { + return NV_TRUE; } -static inline NvBool confComputeIsDebugModeEnabled_491d52(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { - return ((NvBool)(0 != 0)); +static inline NvBool confComputeIsDebugModeEnabled_3dd2c9(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { + return NV_FALSE; } NvBool confComputeIsGpuCcCapable_GH100(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute); -static inline NvBool confComputeIsGpuCcCapable_cbe027(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { - return ((NvBool)(0 == 0)); +static inline NvBool confComputeIsGpuCcCapable_88bc07(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { + return NV_TRUE; } -static inline NvBool confComputeIsGpuCcCapable_491d52(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { - return ((NvBool)(0 != 0)); +static inline NvBool confComputeIsGpuCcCapable_3dd2c9(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute) { + return NV_FALSE; } NV_STATUS confComputeEstablishSpdmSessionAndKeys_KERNEL(struct OBJGPU *pGpu, struct ConfidentialCompute *pConfCompute); @@ -690,8 +773,8 @@ static inline NV_STATUS confComputeKeyStoreUpdateKey_46f6a7(struct ConfidentialC NvBool confComputeKeyStoreIsValidGlobalKeyId_GH100(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId); -static inline NvBool confComputeKeyStoreIsValidGlobalKeyId_491d52(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId) { - return ((NvBool)(0 != 0)); +static inline NvBool confComputeKeyStoreIsValidGlobalKeyId_3dd2c9(struct ConfidentialCompute *pConfCompute, NvU32 globalKeyId) { + return NV_FALSE; } NV_STATUS confComputeKeyStoreInit_GH100(struct ConfidentialCompute *pConfCompute); diff --git a/src/nvidia/generated/g_console_mem_nvoc.c b/src/nvidia/generated/g_console_mem_nvoc.c index b0cff23271..f28d25a5dd 100644 --- a/src/nvidia/generated/g_console_mem_nvoc.c +++ b/src/nvidia/generated/g_console_mem_nvoc.c @@ -93,146 +93,239 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_ConsoleMemory = /*pExportInfo=*/ &__nvoc_export_info_ConsoleMemory }; +#if !defined(NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG) +#define NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(x) (0) +#endif + +static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ConsoleMemory[] = +{ + { /* [0] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) conmemCtrlCmdNotifyConsoleDisabled_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) + /*flags=*/ 0x0u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x760101u, + /*paramSize=*/ 0, + /*pClassInfo=*/ &(__nvoc_class_def_ConsoleMemory.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "conmemCtrlCmdNotifyConsoleDisabled" +#endif + }, + +}; + +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super +NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super +NvBool __nvoc_down_thunk_ConsoleMemory_resCanCopy(struct RsResource *pConsoleMemory); // this + // 1 down-thunk(s) defined to bridge methods in ConsoleMemory from superclasses // conmemCanCopy: virtual override (res) base (mem) -static NvBool __nvoc_down_thunk_ConsoleMemory_resCanCopy(struct RsResource *pConsoleMemory) { +NvBool __nvoc_down_thunk_ConsoleMemory_resCanCopy(struct RsResource *pConsoleMemory) { return conmemCanCopy((struct ConsoleMemory *)(((unsigned char *) pConsoleMemory) - __nvoc_rtti_ConsoleMemory_RsResource.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_Memory_conmemIsDuplicate(struct ConsoleMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate); // this +NV_STATUS __nvoc_up_thunk_Memory_conmemGetMapAddrSpace(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_Memory_conmemControl(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_conmemMap(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_conmemUnmap(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_conmemGetMemInterMapParams(struct ConsoleMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_conmemCheckMemInterUnmap(struct ConsoleMemory *pMemory, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_Memory_conmemGetMemoryMappingDescriptor(struct ConsoleMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_Memory_conmemCheckCopyPermissions(struct ConsoleMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // this +NV_STATUS __nvoc_up_thunk_Memory_conmemIsReady(struct ConsoleMemory *pMemory, NvBool bCopyConstructorContext); // this +NvBool __nvoc_up_thunk_Memory_conmemIsGpuMapAllowed(struct ConsoleMemory *pMemory, struct OBJGPU *pGpu); // this +NvBool __nvoc_up_thunk_Memory_conmemIsExportAllowed(struct ConsoleMemory *pMemory); // this +NvBool __nvoc_up_thunk_RmResource_conmemAccessCallback(struct ConsoleMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_conmemShareCallback(struct ConsoleMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_conmemControlSerialization_Prologue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_conmemControlSerialization_Epilogue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_conmemControl_Prologue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_conmemControl_Epilogue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RsResource_conmemPreDestruct(struct ConsoleMemory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_conmemControlFilter(struct ConsoleMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_conmemIsPartialUnmapSupported(struct ConsoleMemory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_conmemMapTo(struct ConsoleMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_conmemUnmapFrom(struct ConsoleMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_conmemGetRefCount(struct ConsoleMemory *pResource); // this +void __nvoc_up_thunk_RsResource_conmemAddAdditionalDependants(struct RsClient *pClient, struct ConsoleMemory *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in ConsoleMemory to superclasses // conmemIsDuplicate: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_conmemIsDuplicate(struct ConsoleMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_Memory_conmemIsDuplicate(struct ConsoleMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), hMemory, pDuplicate); } // conmemGetMapAddrSpace: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_conmemGetMapAddrSpace(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_Memory_conmemGetMapAddrSpace(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); } // conmemControl: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_conmemControl(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_conmemControl(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pCallContext, pParams); } // conmemMap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_conmemMap(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_conmemMap(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pCallContext, pParams, pCpuMapping); } // conmemUnmap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_conmemUnmap(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_conmemUnmap(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pCallContext, pCpuMapping); } // conmemGetMemInterMapParams: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_conmemGetMemInterMapParams(struct ConsoleMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_conmemGetMemInterMapParams(struct ConsoleMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pParams); } // conmemCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_conmemCheckMemInterUnmap(struct ConsoleMemory *pMemory, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_Memory_conmemCheckMemInterUnmap(struct ConsoleMemory *pMemory, NvBool bSubdeviceHandleProvided) { return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), bSubdeviceHandleProvided); } // conmemGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_conmemGetMemoryMappingDescriptor(struct ConsoleMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_Memory_conmemGetMemoryMappingDescriptor(struct ConsoleMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), ppMemDesc); } // conmemCheckCopyPermissions: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_conmemCheckCopyPermissions(struct ConsoleMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { +NV_STATUS __nvoc_up_thunk_Memory_conmemCheckCopyPermissions(struct ConsoleMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pDstGpu, pDstDevice); } // conmemIsReady: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_conmemIsReady(struct ConsoleMemory *pMemory, NvBool bCopyConstructorContext) { +NV_STATUS __nvoc_up_thunk_Memory_conmemIsReady(struct ConsoleMemory *pMemory, NvBool bCopyConstructorContext) { return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), bCopyConstructorContext); } // conmemIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_conmemIsGpuMapAllowed(struct ConsoleMemory *pMemory, struct OBJGPU *pGpu) { +NvBool __nvoc_up_thunk_Memory_conmemIsGpuMapAllowed(struct ConsoleMemory *pMemory, struct OBJGPU *pGpu) { return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pGpu); } // conmemIsExportAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_conmemIsExportAllowed(struct ConsoleMemory *pMemory) { +NvBool __nvoc_up_thunk_Memory_conmemIsExportAllowed(struct ConsoleMemory *pMemory) { return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset)); } // conmemAccessCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_conmemAccessCallback(struct ConsoleMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_conmemAccessCallback(struct ConsoleMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // conmemShareCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_conmemShareCallback(struct ConsoleMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_conmemShareCallback(struct ConsoleMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // conmemControlSerialization_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_conmemControlSerialization_Prologue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_conmemControlSerialization_Prologue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pCallContext, pParams); } // conmemControlSerialization_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_conmemControlSerialization_Epilogue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_conmemControlSerialization_Epilogue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pCallContext, pParams); } // conmemControl_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_conmemControl_Prologue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_conmemControl_Prologue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pCallContext, pParams); } // conmemControl_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_conmemControl_Epilogue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_conmemControl_Epilogue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pCallContext, pParams); } // conmemPreDestruct: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_conmemPreDestruct(struct ConsoleMemory *pResource) { +void __nvoc_up_thunk_RsResource_conmemPreDestruct(struct ConsoleMemory *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset)); } // conmemControlFilter: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_conmemControlFilter(struct ConsoleMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_conmemControlFilter(struct ConsoleMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset), pCallContext, pParams); } // conmemIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body -static NvBool __nvoc_up_thunk_RsResource_conmemIsPartialUnmapSupported(struct ConsoleMemory *pResource) { +NvBool __nvoc_up_thunk_RsResource_conmemIsPartialUnmapSupported(struct ConsoleMemory *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset)); } // conmemMapTo: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_conmemMapTo(struct ConsoleMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_conmemMapTo(struct ConsoleMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset), pParams); } // conmemUnmapFrom: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_conmemUnmapFrom(struct ConsoleMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_conmemUnmapFrom(struct ConsoleMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset), pParams); } // conmemGetRefCount: virtual inherited (res) base (mem) -static NvU32 __nvoc_up_thunk_RsResource_conmemGetRefCount(struct ConsoleMemory *pResource) { +NvU32 __nvoc_up_thunk_RsResource_conmemGetRefCount(struct ConsoleMemory *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset)); } // conmemAddAdditionalDependants: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_conmemAddAdditionalDependants(struct RsClient *pClient, struct ConsoleMemory *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_conmemAddAdditionalDependants(struct RsClient *pClient, struct ConsoleMemory *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset), pReference); } const struct NVOC_EXPORT_INFO __nvoc_export_info_ConsoleMemory = { - /*numEntries=*/ 0, - /*pExportEntries=*/ 0 + /*numEntries=*/ 1, + /*pExportEntries=*/ __nvoc_exported_method_def_ConsoleMemory }; void __nvoc_dtor_Memory(Memory*); @@ -268,91 +361,120 @@ NV_STATUS __nvoc_ctor_ConsoleMemory(ConsoleMemory *pThis, CALL_CONTEXT * arg_pCa static void __nvoc_init_funcTable_ConsoleMemory_1(ConsoleMemory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // conmemCanCopy -- virtual override (res) base (mem) - pThis->__conmemCanCopy__ = &conmemCanCopy_IMPL; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_ConsoleMemory_resCanCopy; - - // conmemIsDuplicate -- virtual inherited (mem) base (mem) - pThis->__conmemIsDuplicate__ = &__nvoc_up_thunk_Memory_conmemIsDuplicate; - - // conmemGetMapAddrSpace -- virtual inherited (mem) base (mem) - pThis->__conmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_conmemGetMapAddrSpace; - - // conmemControl -- virtual inherited (mem) base (mem) - pThis->__conmemControl__ = &__nvoc_up_thunk_Memory_conmemControl; - - // conmemMap -- virtual inherited (mem) base (mem) - pThis->__conmemMap__ = &__nvoc_up_thunk_Memory_conmemMap; - - // conmemUnmap -- virtual inherited (mem) base (mem) - pThis->__conmemUnmap__ = &__nvoc_up_thunk_Memory_conmemUnmap; - - // conmemGetMemInterMapParams -- virtual inherited (mem) base (mem) - pThis->__conmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_conmemGetMemInterMapParams; - - // conmemCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body - pThis->__conmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_conmemCheckMemInterUnmap; - - // conmemGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) - pThis->__conmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_conmemGetMemoryMappingDescriptor; - - // conmemCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body - pThis->__conmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_conmemCheckCopyPermissions; - - // conmemIsReady -- virtual inherited (mem) base (mem) - pThis->__conmemIsReady__ = &__nvoc_up_thunk_Memory_conmemIsReady; - - // conmemIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__conmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_conmemIsGpuMapAllowed; - - // conmemIsExportAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__conmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_conmemIsExportAllowed; - - // conmemAccessCallback -- virtual inherited (rmres) base (mem) - pThis->__conmemAccessCallback__ = &__nvoc_up_thunk_RmResource_conmemAccessCallback; - - // conmemShareCallback -- virtual inherited (rmres) base (mem) - pThis->__conmemShareCallback__ = &__nvoc_up_thunk_RmResource_conmemShareCallback; - - // conmemControlSerialization_Prologue -- virtual inherited (rmres) base (mem) - pThis->__conmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_conmemControlSerialization_Prologue; - - // conmemControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__conmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_conmemControlSerialization_Epilogue; - - // conmemControl_Prologue -- virtual inherited (rmres) base (mem) - pThis->__conmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_conmemControl_Prologue; - - // conmemControl_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__conmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_conmemControl_Epilogue; - - // conmemPreDestruct -- virtual inherited (res) base (mem) - pThis->__conmemPreDestruct__ = &__nvoc_up_thunk_RsResource_conmemPreDestruct; - - // conmemControlFilter -- virtual inherited (res) base (mem) - pThis->__conmemControlFilter__ = &__nvoc_up_thunk_RsResource_conmemControlFilter; - - // conmemIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body - pThis->__conmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_conmemIsPartialUnmapSupported; - - // conmemMapTo -- virtual inherited (res) base (mem) - pThis->__conmemMapTo__ = &__nvoc_up_thunk_RsResource_conmemMapTo; - - // conmemUnmapFrom -- virtual inherited (res) base (mem) - pThis->__conmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_conmemUnmapFrom; - - // conmemGetRefCount -- virtual inherited (res) base (mem) - pThis->__conmemGetRefCount__ = &__nvoc_up_thunk_RsResource_conmemGetRefCount; - - // conmemAddAdditionalDependants -- virtual inherited (res) base (mem) - pThis->__conmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_conmemAddAdditionalDependants; -} // End __nvoc_init_funcTable_ConsoleMemory_1 with approximately 27 basic block(s). + // conmemCtrlCmdNotifyConsoleDisabled -- exported (id=0x760101) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) + pThis->__conmemCtrlCmdNotifyConsoleDisabled__ = &conmemCtrlCmdNotifyConsoleDisabled_IMPL; +#endif +} // End __nvoc_init_funcTable_ConsoleMemory_1 with approximately 1 basic block(s). -// Initialize vtable(s) for 26 virtual method(s). +// Initialize vtable(s) for 27 virtual method(s). void __nvoc_init_funcTable_ConsoleMemory(ConsoleMemory *pThis) { - // Initialize vtable(s) with 26 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__ConsoleMemory vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif + .__conmemCanCopy__ = &conmemCanCopy_IMPL, // virtual override (res) base (mem) + .Memory.__memCanCopy__ = &__nvoc_up_thunk_RsResource_memCanCopy, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_ConsoleMemory_resCanCopy, // virtual + .__conmemIsDuplicate__ = &__nvoc_up_thunk_Memory_conmemIsDuplicate, // virtual inherited (mem) base (mem) + .Memory.__memIsDuplicate__ = &memIsDuplicate_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resIsDuplicate__ = &__nvoc_down_thunk_Memory_resIsDuplicate, // virtual + .__conmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_conmemGetMapAddrSpace, // virtual inherited (mem) base (mem) + .Memory.__memGetMapAddrSpace__ = &memGetMapAddrSpace_IMPL, // virtual + .__conmemControl__ = &__nvoc_up_thunk_Memory_conmemControl, // virtual inherited (mem) base (mem) + .Memory.__memControl__ = &memControl_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_Memory_resControl, // virtual + .__conmemMap__ = &__nvoc_up_thunk_Memory_conmemMap, // virtual inherited (mem) base (mem) + .Memory.__memMap__ = &memMap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_Memory_resMap, // virtual + .__conmemUnmap__ = &__nvoc_up_thunk_Memory_conmemUnmap, // virtual inherited (mem) base (mem) + .Memory.__memUnmap__ = &memUnmap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_Memory_resUnmap, // virtual + .__conmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_conmemGetMemInterMapParams, // virtual inherited (mem) base (mem) + .Memory.__memGetMemInterMapParams__ = &memGetMemInterMapParams_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_Memory_rmresGetMemInterMapParams, // virtual + .__conmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_conmemCheckMemInterUnmap, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckMemInterUnmap__ = &memCheckMemInterUnmap_ac1694, // inline virtual override (rmres) base (rmres) body + .Memory.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_Memory_rmresCheckMemInterUnmap, // virtual + .__conmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_conmemGetMemoryMappingDescriptor, // virtual inherited (mem) base (mem) + .Memory.__memGetMemoryMappingDescriptor__ = &memGetMemoryMappingDescriptor_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor, // virtual + .__conmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_conmemCheckCopyPermissions, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckCopyPermissions__ = &memCheckCopyPermissions_ac1694, // inline virtual body + .__conmemIsReady__ = &__nvoc_up_thunk_Memory_conmemIsReady, // virtual inherited (mem) base (mem) + .Memory.__memIsReady__ = &memIsReady_IMPL, // virtual + .__conmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_conmemIsGpuMapAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsGpuMapAllowed__ = &memIsGpuMapAllowed_e661f0, // inline virtual body + .__conmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_conmemIsExportAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsExportAllowed__ = &memIsExportAllowed_e661f0, // inline virtual body + .__conmemAccessCallback__ = &__nvoc_up_thunk_RmResource_conmemAccessCallback, // virtual inherited (rmres) base (mem) + .Memory.__memAccessCallback__ = &__nvoc_up_thunk_RmResource_memAccessCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__conmemShareCallback__ = &__nvoc_up_thunk_RmResource_conmemShareCallback, // virtual inherited (rmres) base (mem) + .Memory.__memShareCallback__ = &__nvoc_up_thunk_RmResource_memShareCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__conmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_conmemControlSerialization_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__conmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_conmemControlSerialization_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__conmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_conmemControl_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Prologue__ = &__nvoc_up_thunk_RmResource_memControl_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__conmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_conmemControl_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memControl_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__conmemPreDestruct__ = &__nvoc_up_thunk_RsResource_conmemPreDestruct, // virtual inherited (res) base (mem) + .Memory.__memPreDestruct__ = &__nvoc_up_thunk_RsResource_memPreDestruct, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__conmemControlFilter__ = &__nvoc_up_thunk_RsResource_conmemControlFilter, // virtual inherited (res) base (mem) + .Memory.__memControlFilter__ = &__nvoc_up_thunk_RsResource_memControlFilter, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__conmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_conmemIsPartialUnmapSupported, // inline virtual inherited (res) base (mem) body + .Memory.__memIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .Memory.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .Memory.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__conmemMapTo__ = &__nvoc_up_thunk_RsResource_conmemMapTo, // virtual inherited (res) base (mem) + .Memory.__memMapTo__ = &__nvoc_up_thunk_RsResource_memMapTo, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__conmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_conmemUnmapFrom, // virtual inherited (res) base (mem) + .Memory.__memUnmapFrom__ = &__nvoc_up_thunk_RsResource_memUnmapFrom, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__conmemGetRefCount__ = &__nvoc_up_thunk_RsResource_conmemGetRefCount, // virtual inherited (res) base (mem) + .Memory.__memGetRefCount__ = &__nvoc_up_thunk_RsResource_memGetRefCount, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__conmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_conmemAddAdditionalDependants, // virtual inherited (res) base (mem) + .Memory.__memAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memAddAdditionalDependants, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.Memory.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable = &vtable.Memory.RmResource; // (rmres) super^2 + pThis->__nvoc_base_Memory.__nvoc_vtable = &vtable.Memory; // (mem) super + pThis->__nvoc_vtable = &vtable; // (conmem) this + + // Initialize vtable(s) with 1 per-object function pointer(s). __nvoc_init_funcTable_ConsoleMemory_1(pThis); } diff --git a/src/nvidia/generated/g_console_mem_nvoc.h b/src/nvidia/generated/g_console_mem_nvoc.h index 2070f17bef..cf8961a5aa 100644 --- a/src/nvidia/generated/g_console_mem_nvoc.h +++ b/src/nvidia/generated/g_console_mem_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -43,6 +43,7 @@ extern "C" { #define _CONSOLE_MEMORY_H_ #include "mem_mgr/mem.h" +#include "ctrl/ctrl0076.h" /*! * This class is used to create hMemory referencing reserved console memory @@ -58,10 +59,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__ConsoleMemory; + + struct ConsoleMemory { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__ConsoleMemory *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; @@ -74,7 +80,15 @@ struct ConsoleMemory { struct Memory *__nvoc_pbase_Memory; // mem super struct ConsoleMemory *__nvoc_pbase_ConsoleMemory; // conmem - // Vtable with 26 per-object function pointers + // Vtable with 1 per-object function pointer + NV_STATUS (*__conmemCtrlCmdNotifyConsoleDisabled__)(struct ConsoleMemory * /*this*/); // exported (id=0x760101) +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__ConsoleMemory { + const struct NVOC_VTABLE__Memory Memory; // (mem) 26 function pointers + NvBool (*__conmemCanCopy__)(struct ConsoleMemory * /*this*/); // virtual override (res) base (mem) NV_STATUS (*__conmemIsDuplicate__)(struct ConsoleMemory * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) NV_STATUS (*__conmemGetMapAddrSpace__)(struct ConsoleMemory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (mem) @@ -133,164 +147,172 @@ NV_STATUS __nvoc_objCreate_ConsoleMemory(ConsoleMemory**, Dynamic*, NvU32, CALL_ // Wrapper macros -#define conmemCanCopy_FNPTR(pConsoleMemory) pConsoleMemory->__conmemCanCopy__ +#define conmemCtrlCmdNotifyConsoleDisabled_FNPTR(pConsoleMemory) pConsoleMemory->__conmemCtrlCmdNotifyConsoleDisabled__ +#define conmemCtrlCmdNotifyConsoleDisabled(pConsoleMemory) conmemCtrlCmdNotifyConsoleDisabled_DISPATCH(pConsoleMemory) +#define conmemCanCopy_FNPTR(pConsoleMemory) pConsoleMemory->__nvoc_vtable->__conmemCanCopy__ #define conmemCanCopy(pConsoleMemory) conmemCanCopy_DISPATCH(pConsoleMemory) -#define conmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define conmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsDuplicate__ #define conmemIsDuplicate(pMemory, hMemory, pDuplicate) conmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define conmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ +#define conmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMapAddrSpace__ #define conmemGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) conmemGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define conmemControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ +#define conmemControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memControl__ #define conmemControl(pMemory, pCallContext, pParams) conmemControl_DISPATCH(pMemory, pCallContext, pParams) -#define conmemMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define conmemMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memMap__ #define conmemMap(pMemory, pCallContext, pParams, pCpuMapping) conmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define conmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ +#define conmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memUnmap__ #define conmemUnmap(pMemory, pCallContext, pCpuMapping) conmemUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define conmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ +#define conmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemInterMapParams__ #define conmemGetMemInterMapParams(pMemory, pParams) conmemGetMemInterMapParams_DISPATCH(pMemory, pParams) -#define conmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define conmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckMemInterUnmap__ #define conmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) conmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define conmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ +#define conmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemoryMappingDescriptor__ #define conmemGetMemoryMappingDescriptor(pMemory, ppMemDesc) conmemGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define conmemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ +#define conmemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckCopyPermissions__ #define conmemCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) conmemCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define conmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define conmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsReady__ #define conmemIsReady(pMemory, bCopyConstructorContext) conmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) -#define conmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define conmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsGpuMapAllowed__ #define conmemIsGpuMapAllowed(pMemory, pGpu) conmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define conmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define conmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsExportAllowed__ #define conmemIsExportAllowed(pMemory) conmemIsExportAllowed_DISPATCH(pMemory) -#define conmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define conmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define conmemAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) conmemAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define conmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define conmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define conmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) conmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define conmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define conmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define conmemControlSerialization_Prologue(pResource, pCallContext, pParams) conmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define conmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define conmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define conmemControlSerialization_Epilogue(pResource, pCallContext, pParams) conmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define conmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define conmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define conmemControl_Prologue(pResource, pCallContext, pParams) conmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define conmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define conmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define conmemControl_Epilogue(pResource, pCallContext, pParams) conmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define conmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define conmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define conmemPreDestruct(pResource) conmemPreDestruct_DISPATCH(pResource) -#define conmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define conmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define conmemControlFilter(pResource, pCallContext, pParams) conmemControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define conmemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define conmemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define conmemIsPartialUnmapSupported(pResource) conmemIsPartialUnmapSupported_DISPATCH(pResource) -#define conmemMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define conmemMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define conmemMapTo(pResource, pParams) conmemMapTo_DISPATCH(pResource, pParams) -#define conmemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define conmemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define conmemUnmapFrom(pResource, pParams) conmemUnmapFrom_DISPATCH(pResource, pParams) -#define conmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define conmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define conmemGetRefCount(pResource) conmemGetRefCount_DISPATCH(pResource) -#define conmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define conmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define conmemAddAdditionalDependants(pClient, pResource, pReference) conmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions +static inline NV_STATUS conmemCtrlCmdNotifyConsoleDisabled_DISPATCH(struct ConsoleMemory *pConsoleMemory) { + return pConsoleMemory->__conmemCtrlCmdNotifyConsoleDisabled__(pConsoleMemory); +} + static inline NvBool conmemCanCopy_DISPATCH(struct ConsoleMemory *pConsoleMemory) { - return pConsoleMemory->__conmemCanCopy__(pConsoleMemory); + return pConsoleMemory->__nvoc_vtable->__conmemCanCopy__(pConsoleMemory); } static inline NV_STATUS conmemIsDuplicate_DISPATCH(struct ConsoleMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__conmemIsDuplicate__(pMemory, hMemory, pDuplicate); + return pMemory->__nvoc_vtable->__conmemIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS conmemGetMapAddrSpace_DISPATCH(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pMemory->__conmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); + return pMemory->__nvoc_vtable->__conmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS conmemControl_DISPATCH(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__conmemControl__(pMemory, pCallContext, pParams); + return pMemory->__nvoc_vtable->__conmemControl__(pMemory, pCallContext, pParams); } static inline NV_STATUS conmemMap_DISPATCH(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__conmemMap__(pMemory, pCallContext, pParams, pCpuMapping); + return pMemory->__nvoc_vtable->__conmemMap__(pMemory, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS conmemUnmap_DISPATCH(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__conmemUnmap__(pMemory, pCallContext, pCpuMapping); + return pMemory->__nvoc_vtable->__conmemUnmap__(pMemory, pCallContext, pCpuMapping); } static inline NV_STATUS conmemGetMemInterMapParams_DISPATCH(struct ConsoleMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__conmemGetMemInterMapParams__(pMemory, pParams); + return pMemory->__nvoc_vtable->__conmemGetMemInterMapParams__(pMemory, pParams); } static inline NV_STATUS conmemCheckMemInterUnmap_DISPATCH(struct ConsoleMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__conmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); + return pMemory->__nvoc_vtable->__conmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } static inline NV_STATUS conmemGetMemoryMappingDescriptor_DISPATCH(struct ConsoleMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__conmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); + return pMemory->__nvoc_vtable->__conmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } static inline NV_STATUS conmemCheckCopyPermissions_DISPATCH(struct ConsoleMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__conmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); + return pMemory->__nvoc_vtable->__conmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } static inline NV_STATUS conmemIsReady_DISPATCH(struct ConsoleMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__conmemIsReady__(pMemory, bCopyConstructorContext); + return pMemory->__nvoc_vtable->__conmemIsReady__(pMemory, bCopyConstructorContext); } static inline NvBool conmemIsGpuMapAllowed_DISPATCH(struct ConsoleMemory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__conmemIsGpuMapAllowed__(pMemory, pGpu); + return pMemory->__nvoc_vtable->__conmemIsGpuMapAllowed__(pMemory, pGpu); } static inline NvBool conmemIsExportAllowed_DISPATCH(struct ConsoleMemory *pMemory) { - return pMemory->__conmemIsExportAllowed__(pMemory); + return pMemory->__nvoc_vtable->__conmemIsExportAllowed__(pMemory); } static inline NvBool conmemAccessCallback_DISPATCH(struct ConsoleMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__conmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__conmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool conmemShareCallback_DISPATCH(struct ConsoleMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__conmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__conmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS conmemControlSerialization_Prologue_DISPATCH(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__conmemControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__conmemControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void conmemControlSerialization_Epilogue_DISPATCH(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__conmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__conmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS conmemControl_Prologue_DISPATCH(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__conmemControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__conmemControl_Prologue__(pResource, pCallContext, pParams); } static inline void conmemControl_Epilogue_DISPATCH(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__conmemControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__conmemControl_Epilogue__(pResource, pCallContext, pParams); } static inline void conmemPreDestruct_DISPATCH(struct ConsoleMemory *pResource) { - pResource->__conmemPreDestruct__(pResource); + pResource->__nvoc_vtable->__conmemPreDestruct__(pResource); } static inline NV_STATUS conmemControlFilter_DISPATCH(struct ConsoleMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__conmemControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__conmemControlFilter__(pResource, pCallContext, pParams); } static inline NvBool conmemIsPartialUnmapSupported_DISPATCH(struct ConsoleMemory *pResource) { - return pResource->__conmemIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__conmemIsPartialUnmapSupported__(pResource); } static inline NV_STATUS conmemMapTo_DISPATCH(struct ConsoleMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__conmemMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__conmemMapTo__(pResource, pParams); } static inline NV_STATUS conmemUnmapFrom_DISPATCH(struct ConsoleMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__conmemUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__conmemUnmapFrom__(pResource, pParams); } static inline NvU32 conmemGetRefCount_DISPATCH(struct ConsoleMemory *pResource) { - return pResource->__conmemGetRefCount__(pResource); + return pResource->__nvoc_vtable->__conmemGetRefCount__(pResource); } static inline void conmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ConsoleMemory *pResource, RsResourceRef *pReference) { - pResource->__conmemAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__conmemAddAdditionalDependants__(pClient, pResource, pReference); } +NV_STATUS conmemCtrlCmdNotifyConsoleDisabled_IMPL(struct ConsoleMemory *pConsoleMemory); + NvBool conmemCanCopy_IMPL(struct ConsoleMemory *pConsoleMemory); NV_STATUS conmemConstruct_IMPL(struct ConsoleMemory *arg_pConsoleMemory, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_context_dma_nvoc.c b/src/nvidia/generated/g_context_dma_nvoc.c index 100b939a75..d1683b1ad0 100644 --- a/src/nvidia/generated/g_context_dma_nvoc.c +++ b/src/nvidia/generated/g_context_dma_nvoc.c @@ -156,138 +156,191 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ContextD }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_down_thunk_ContextDma_resMapTo(struct RsResource *pContextDma, struct RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_down_thunk_ContextDma_resUnmapFrom(struct RsResource *pContextDma, struct RS_RES_UNMAP_FROM_PARAMS *pParams); // this + // 2 down-thunk(s) defined to bridge methods in ContextDma from superclasses // ctxdmaMapTo: virtual override (res) base (rmres) -static NV_STATUS __nvoc_down_thunk_ContextDma_resMapTo(struct RsResource *pContextDma, struct RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_down_thunk_ContextDma_resMapTo(struct RsResource *pContextDma, struct RS_RES_MAP_TO_PARAMS *pParams) { return ctxdmaMapTo((struct ContextDma *)(((unsigned char *) pContextDma) - __nvoc_rtti_ContextDma_RsResource.offset), pParams); } // ctxdmaUnmapFrom: virtual override (res) base (rmres) -static NV_STATUS __nvoc_down_thunk_ContextDma_resUnmapFrom(struct RsResource *pContextDma, struct RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_down_thunk_ContextDma_resUnmapFrom(struct RsResource *pContextDma, struct RS_RES_UNMAP_FROM_PARAMS *pParams) { return ctxdmaUnmapFrom((struct ContextDma *)(((unsigned char *) pContextDma) - __nvoc_rtti_ContextDma_RsResource.offset), pParams); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_RmResource_ctxdmaAccessCallback(struct ContextDma *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_ctxdmaShareCallback(struct ContextDma *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_ctxdmaGetMemInterMapParams(struct ContextDma *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_ctxdmaCheckMemInterUnmap(struct ContextDma *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_ctxdmaGetMemoryMappingDescriptor(struct ContextDma *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_ctxdmaControlSerialization_Prologue(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_ctxdmaControlSerialization_Epilogue(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_ctxdmaControl_Prologue(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_ctxdmaControl_Epilogue(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_ctxdmaCanCopy(struct ContextDma *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_ctxdmaIsDuplicate(struct ContextDma *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_ctxdmaPreDestruct(struct ContextDma *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_ctxdmaControl(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_ctxdmaControlFilter(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_ctxdmaMap(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_ctxdmaUnmap(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_ctxdmaIsPartialUnmapSupported(struct ContextDma *pResource); // this +NvU32 __nvoc_up_thunk_RsResource_ctxdmaGetRefCount(struct ContextDma *pResource); // this +void __nvoc_up_thunk_RsResource_ctxdmaAddAdditionalDependants(struct RsClient *pClient, struct ContextDma *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_ctxdmaGetNotificationListPtr(struct ContextDma *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_ctxdmaGetNotificationShare(struct ContextDma *pNotifier); // this +void __nvoc_up_thunk_Notifier_ctxdmaSetNotificationShare(struct ContextDma *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_ctxdmaUnregisterEvent(struct ContextDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_ctxdmaGetOrAllocNotifShare(struct ContextDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 24 up-thunk(s) defined to bridge methods in ContextDma to superclasses // ctxdmaAccessCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_ctxdmaAccessCallback(struct ContextDma *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_ctxdmaAccessCallback(struct ContextDma *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // ctxdmaShareCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_ctxdmaShareCallback(struct ContextDma *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_ctxdmaShareCallback(struct ContextDma *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // ctxdmaGetMemInterMapParams: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_ctxdmaGetMemInterMapParams(struct ContextDma *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_ctxdmaGetMemInterMapParams(struct ContextDma *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ContextDma_RmResource.offset), pParams); } // ctxdmaCheckMemInterUnmap: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_ctxdmaCheckMemInterUnmap(struct ContextDma *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_ctxdmaCheckMemInterUnmap(struct ContextDma *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ContextDma_RmResource.offset), bSubdeviceHandleProvided); } // ctxdmaGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_ctxdmaGetMemoryMappingDescriptor(struct ContextDma *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_ctxdmaGetMemoryMappingDescriptor(struct ContextDma *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ContextDma_RmResource.offset), ppMemDesc); } // ctxdmaControlSerialization_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_ctxdmaControlSerialization_Prologue(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_ctxdmaControlSerialization_Prologue(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RmResource.offset), pCallContext, pParams); } // ctxdmaControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_ctxdmaControlSerialization_Epilogue(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_ctxdmaControlSerialization_Epilogue(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RmResource.offset), pCallContext, pParams); } // ctxdmaControl_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_ctxdmaControl_Prologue(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_ctxdmaControl_Prologue(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RmResource.offset), pCallContext, pParams); } // ctxdmaControl_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_ctxdmaControl_Epilogue(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_ctxdmaControl_Epilogue(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RmResource.offset), pCallContext, pParams); } // ctxdmaCanCopy: virtual inherited (res) base (rmres) -static NvBool __nvoc_up_thunk_RsResource_ctxdmaCanCopy(struct ContextDma *pResource) { +NvBool __nvoc_up_thunk_RsResource_ctxdmaCanCopy(struct ContextDma *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RsResource.offset)); } // ctxdmaIsDuplicate: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_ctxdmaIsDuplicate(struct ContextDma *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_ctxdmaIsDuplicate(struct ContextDma *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RsResource.offset), hMemory, pDuplicate); } // ctxdmaPreDestruct: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_ctxdmaPreDestruct(struct ContextDma *pResource) { +void __nvoc_up_thunk_RsResource_ctxdmaPreDestruct(struct ContextDma *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RsResource.offset)); } // ctxdmaControl: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_ctxdmaControl(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_ctxdmaControl(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RsResource.offset), pCallContext, pParams); } // ctxdmaControlFilter: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_ctxdmaControlFilter(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_ctxdmaControlFilter(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RsResource.offset), pCallContext, pParams); } // ctxdmaMap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_ctxdmaMap(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_ctxdmaMap(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RsResource.offset), pCallContext, pParams, pCpuMapping); } // ctxdmaUnmap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_ctxdmaUnmap(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_ctxdmaUnmap(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RsResource.offset), pCallContext, pCpuMapping); } // ctxdmaIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body -static NvBool __nvoc_up_thunk_RsResource_ctxdmaIsPartialUnmapSupported(struct ContextDma *pResource) { +NvBool __nvoc_up_thunk_RsResource_ctxdmaIsPartialUnmapSupported(struct ContextDma *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RsResource.offset)); } // ctxdmaGetRefCount: virtual inherited (res) base (rmres) -static NvU32 __nvoc_up_thunk_RsResource_ctxdmaGetRefCount(struct ContextDma *pResource) { +NvU32 __nvoc_up_thunk_RsResource_ctxdmaGetRefCount(struct ContextDma *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RsResource.offset)); } // ctxdmaAddAdditionalDependants: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_ctxdmaAddAdditionalDependants(struct RsClient *pClient, struct ContextDma *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_ctxdmaAddAdditionalDependants(struct RsClient *pClient, struct ContextDma *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ContextDma_RsResource.offset), pReference); } // ctxdmaGetNotificationListPtr: virtual inherited (notify) base (notify) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_ctxdmaGetNotificationListPtr(struct ContextDma *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_ctxdmaGetNotificationListPtr(struct ContextDma *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_ContextDma_Notifier.offset)); } // ctxdmaGetNotificationShare: virtual inherited (notify) base (notify) -static struct NotifShare * __nvoc_up_thunk_Notifier_ctxdmaGetNotificationShare(struct ContextDma *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_ctxdmaGetNotificationShare(struct ContextDma *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_ContextDma_Notifier.offset)); } // ctxdmaSetNotificationShare: virtual inherited (notify) base (notify) -static void __nvoc_up_thunk_Notifier_ctxdmaSetNotificationShare(struct ContextDma *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_ctxdmaSetNotificationShare(struct ContextDma *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_ContextDma_Notifier.offset), pNotifShare); } // ctxdmaUnregisterEvent: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_ctxdmaUnregisterEvent(struct ContextDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_ctxdmaUnregisterEvent(struct ContextDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_ContextDma_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // ctxdmaGetOrAllocNotifShare: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_ctxdmaGetOrAllocNotifShare(struct ContextDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_ctxdmaGetOrAllocNotifShare(struct ContextDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_ContextDma_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -339,14 +392,6 @@ NV_STATUS __nvoc_ctor_ContextDma(ContextDma *pThis, struct CALL_CONTEXT * arg_pC static void __nvoc_init_funcTable_ContextDma_1(ContextDma *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // ctxdmaMapTo -- virtual override (res) base (rmres) - pThis->__ctxdmaMapTo__ = &ctxdmaMapTo_IMPL; - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ = &__nvoc_down_thunk_ContextDma_resMapTo; - - // ctxdmaUnmapFrom -- virtual override (res) base (rmres) - pThis->__ctxdmaUnmapFrom__ = &ctxdmaUnmapFrom_IMPL; - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ = &__nvoc_down_thunk_ContextDma_resUnmapFrom; - // ctxdmaCtrlCmdUpdateContextdma -- exported (id=0x20101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__ctxdmaCtrlCmdUpdateContextdma__ = &ctxdmaCtrlCmdUpdateContextdma_IMPL; @@ -361,85 +406,105 @@ static void __nvoc_init_funcTable_ContextDma_1(ContextDma *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__ctxdmaCtrlCmdUnbindContextdma__ = &ctxdmaCtrlCmdUnbindContextdma_IMPL; #endif - - // ctxdmaAccessCallback -- virtual inherited (rmres) base (rmres) - pThis->__ctxdmaAccessCallback__ = &__nvoc_up_thunk_RmResource_ctxdmaAccessCallback; - - // ctxdmaShareCallback -- virtual inherited (rmres) base (rmres) - pThis->__ctxdmaShareCallback__ = &__nvoc_up_thunk_RmResource_ctxdmaShareCallback; - - // ctxdmaGetMemInterMapParams -- virtual inherited (rmres) base (rmres) - pThis->__ctxdmaGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_ctxdmaGetMemInterMapParams; - - // ctxdmaCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) - pThis->__ctxdmaCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_ctxdmaCheckMemInterUnmap; - - // ctxdmaGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) - pThis->__ctxdmaGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_ctxdmaGetMemoryMappingDescriptor; - - // ctxdmaControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__ctxdmaControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_ctxdmaControlSerialization_Prologue; - - // ctxdmaControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__ctxdmaControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_ctxdmaControlSerialization_Epilogue; - - // ctxdmaControl_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__ctxdmaControl_Prologue__ = &__nvoc_up_thunk_RmResource_ctxdmaControl_Prologue; - - // ctxdmaControl_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__ctxdmaControl_Epilogue__ = &__nvoc_up_thunk_RmResource_ctxdmaControl_Epilogue; - - // ctxdmaCanCopy -- virtual inherited (res) base (rmres) - pThis->__ctxdmaCanCopy__ = &__nvoc_up_thunk_RsResource_ctxdmaCanCopy; - - // ctxdmaIsDuplicate -- virtual inherited (res) base (rmres) - pThis->__ctxdmaIsDuplicate__ = &__nvoc_up_thunk_RsResource_ctxdmaIsDuplicate; - - // ctxdmaPreDestruct -- virtual inherited (res) base (rmres) - pThis->__ctxdmaPreDestruct__ = &__nvoc_up_thunk_RsResource_ctxdmaPreDestruct; - - // ctxdmaControl -- virtual inherited (res) base (rmres) - pThis->__ctxdmaControl__ = &__nvoc_up_thunk_RsResource_ctxdmaControl; - - // ctxdmaControlFilter -- virtual inherited (res) base (rmres) - pThis->__ctxdmaControlFilter__ = &__nvoc_up_thunk_RsResource_ctxdmaControlFilter; - - // ctxdmaMap -- virtual inherited (res) base (rmres) - pThis->__ctxdmaMap__ = &__nvoc_up_thunk_RsResource_ctxdmaMap; - - // ctxdmaUnmap -- virtual inherited (res) base (rmres) - pThis->__ctxdmaUnmap__ = &__nvoc_up_thunk_RsResource_ctxdmaUnmap; - - // ctxdmaIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body - pThis->__ctxdmaIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_ctxdmaIsPartialUnmapSupported; - - // ctxdmaGetRefCount -- virtual inherited (res) base (rmres) - pThis->__ctxdmaGetRefCount__ = &__nvoc_up_thunk_RsResource_ctxdmaGetRefCount; - - // ctxdmaAddAdditionalDependants -- virtual inherited (res) base (rmres) - pThis->__ctxdmaAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_ctxdmaAddAdditionalDependants; - - // ctxdmaGetNotificationListPtr -- virtual inherited (notify) base (notify) - pThis->__ctxdmaGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_ctxdmaGetNotificationListPtr; - - // ctxdmaGetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__ctxdmaGetNotificationShare__ = &__nvoc_up_thunk_Notifier_ctxdmaGetNotificationShare; - - // ctxdmaSetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__ctxdmaSetNotificationShare__ = &__nvoc_up_thunk_Notifier_ctxdmaSetNotificationShare; - - // ctxdmaUnregisterEvent -- virtual inherited (notify) base (notify) - pThis->__ctxdmaUnregisterEvent__ = &__nvoc_up_thunk_Notifier_ctxdmaUnregisterEvent; - - // ctxdmaGetOrAllocNotifShare -- virtual inherited (notify) base (notify) - pThis->__ctxdmaGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_ctxdmaGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_ContextDma_1 with approximately 31 basic block(s). +} // End __nvoc_init_funcTable_ContextDma_1 with approximately 3 basic block(s). // Initialize vtable(s) for 29 virtual method(s). void __nvoc_init_funcTable_ContextDma(ContextDma *pThis) { - // Initialize vtable(s) with 29 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__ContextDma vtable = { + .__ctxdmaMapTo__ = &ctxdmaMapTo_IMPL, // virtual override (res) base (rmres) + .RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMapTo__ = &__nvoc_down_thunk_ContextDma_resMapTo, // virtual + .__ctxdmaUnmapFrom__ = &ctxdmaUnmapFrom_IMPL, // virtual override (res) base (rmres) + .RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmapFrom__ = &__nvoc_down_thunk_ContextDma_resUnmapFrom, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__ctxdmaAccessCallback__ = &__nvoc_up_thunk_RmResource_ctxdmaAccessCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__ctxdmaShareCallback__ = &__nvoc_up_thunk_RmResource_ctxdmaShareCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__ctxdmaGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_ctxdmaGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__ctxdmaCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_ctxdmaCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__ctxdmaGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_ctxdmaGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__ctxdmaControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_ctxdmaControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__ctxdmaControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_ctxdmaControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__ctxdmaControl_Prologue__ = &__nvoc_up_thunk_RmResource_ctxdmaControl_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__ctxdmaControl_Epilogue__ = &__nvoc_up_thunk_RmResource_ctxdmaControl_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__ctxdmaCanCopy__ = &__nvoc_up_thunk_RsResource_ctxdmaCanCopy, // virtual inherited (res) base (rmres) + .RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__ctxdmaIsDuplicate__ = &__nvoc_up_thunk_RsResource_ctxdmaIsDuplicate, // virtual inherited (res) base (rmres) + .RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__ctxdmaPreDestruct__ = &__nvoc_up_thunk_RsResource_ctxdmaPreDestruct, // virtual inherited (res) base (rmres) + .RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__ctxdmaControl__ = &__nvoc_up_thunk_RsResource_ctxdmaControl, // virtual inherited (res) base (rmres) + .RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControl__ = &resControl_IMPL, // virtual + .__ctxdmaControlFilter__ = &__nvoc_up_thunk_RsResource_ctxdmaControlFilter, // virtual inherited (res) base (rmres) + .RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__ctxdmaMap__ = &__nvoc_up_thunk_RsResource_ctxdmaMap, // virtual inherited (res) base (rmres) + .RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMap__ = &resMap_IMPL, // virtual + .__ctxdmaUnmap__ = &__nvoc_up_thunk_RsResource_ctxdmaUnmap, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__ctxdmaIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_ctxdmaIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__ctxdmaGetRefCount__ = &__nvoc_up_thunk_RsResource_ctxdmaGetRefCount, // virtual inherited (res) base (rmres) + .RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__ctxdmaAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_ctxdmaAddAdditionalDependants, // virtual inherited (res) base (rmres) + .RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__ctxdmaGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_ctxdmaGetNotificationListPtr, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__ctxdmaGetNotificationShare__ = &__nvoc_up_thunk_Notifier_ctxdmaGetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__ctxdmaSetNotificationShare__ = &__nvoc_up_thunk_Notifier_ctxdmaSetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__ctxdmaUnregisterEvent__ = &__nvoc_up_thunk_Notifier_ctxdmaUnregisterEvent, // virtual inherited (notify) base (notify) + .Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__ctxdmaGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_ctxdmaGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.RmResource.RsResource; // (res) super^2 + pThis->__nvoc_base_RmResource.__nvoc_vtable = &vtable.RmResource; // (rmres) super + pThis->__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.Notifier.INotifier; // (inotify) super^2 + pThis->__nvoc_base_Notifier.__nvoc_vtable = &vtable.Notifier; // (notify) super + pThis->__nvoc_vtable = &vtable; // (ctxdma) this + + // Initialize vtable(s) with 3 per-object function pointer(s). __nvoc_init_funcTable_ContextDma_1(pThis); } diff --git a/src/nvidia/generated/g_context_dma_nvoc.h b/src/nvidia/generated/g_context_dma_nvoc.h index 300473d5b0..8e015a3949 100644 --- a/src/nvidia/generated/g_context_dma_nvoc.h +++ b/src/nvidia/generated/g_context_dma_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -91,10 +91,15 @@ typedef struct Memory Memory; #endif +// Metadata including vtable +struct NVOC_VTABLE__ContextDma; + + struct ContextDma { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__ContextDma *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; @@ -109,12 +114,40 @@ struct ContextDma { struct Notifier *__nvoc_pbase_Notifier; // notify super struct ContextDma *__nvoc_pbase_ContextDma; // ctxdma - // Vtable with 29 per-object function pointers - NV_STATUS (*__ctxdmaMapTo__)(struct ContextDma * /*this*/, struct RS_RES_MAP_TO_PARAMS *); // virtual override (res) base (rmres) - NV_STATUS (*__ctxdmaUnmapFrom__)(struct ContextDma * /*this*/, struct RS_RES_UNMAP_FROM_PARAMS *); // virtual override (res) base (rmres) + // Vtable with 3 per-object function pointers NV_STATUS (*__ctxdmaCtrlCmdUpdateContextdma__)(struct ContextDma * /*this*/, NV0002_CTRL_UPDATE_CONTEXTDMA_PARAMS *); // exported (id=0x20101) NV_STATUS (*__ctxdmaCtrlCmdBindContextdma__)(struct ContextDma * /*this*/, NV0002_CTRL_BIND_CONTEXTDMA_PARAMS *); // exported (id=0x20102) NV_STATUS (*__ctxdmaCtrlCmdUnbindContextdma__)(struct ContextDma * /*this*/, NV0002_CTRL_UNBIND_CONTEXTDMA_PARAMS *); // exported (id=0x20103) + + // Data members + NvU32 Class; + NvU32 Flags; + NvBool bReadOnly; + NvU32 CacheSnoop; + NvU32 Type; + NvU64 Limit; + NV_ADDRESS_SPACE AddressSpace; + NvBool bUnicast; + void *KernelVAddr[8]; + void *KernelPriv; + NvU64 FbAperture[8]; + NvU64 FbApertureLen[8]; + struct Memory *pMemory; + struct MEMORY_DESCRIPTOR *pMemDesc; + NvU32 Instance[8]; + NvU32 InstRefCount[8]; + struct OBJGPU *pGpu; + struct Device *pDevice; +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__ContextDma { + const struct NVOC_VTABLE__RmResource RmResource; // (rmres) 21 function pointers + const struct NVOC_VTABLE__Notifier Notifier; // (notify) 5 function pointers + + NV_STATUS (*__ctxdmaMapTo__)(struct ContextDma * /*this*/, struct RS_RES_MAP_TO_PARAMS *); // virtual override (res) base (rmres) + NV_STATUS (*__ctxdmaUnmapFrom__)(struct ContextDma * /*this*/, struct RS_RES_UNMAP_FROM_PARAMS *); // virtual override (res) base (rmres) NvBool (*__ctxdmaAccessCallback__)(struct ContextDma * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) NvBool (*__ctxdmaShareCallback__)(struct ContextDma * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) NV_STATUS (*__ctxdmaGetMemInterMapParams__)(struct ContextDma * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) @@ -139,26 +172,6 @@ struct ContextDma { void (*__ctxdmaSetNotificationShare__)(struct ContextDma * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) NV_STATUS (*__ctxdmaUnregisterEvent__)(struct ContextDma * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) NV_STATUS (*__ctxdmaGetOrAllocNotifShare__)(struct ContextDma * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) - - // Data members - NvU32 Class; - NvU32 Flags; - NvBool bReadOnly; - NvU32 CacheSnoop; - NvU32 Type; - NvU64 Limit; - NV_ADDRESS_SPACE AddressSpace; - NvBool bUnicast; - void *KernelVAddr[8]; - void *KernelPriv; - NvU64 FbAperture[8]; - NvU64 FbApertureLen[8]; - struct Memory *pMemory; - struct MEMORY_DESCRIPTOR *pMemDesc; - NvU32 Instance[8]; - NvU32 InstRefCount[8]; - struct OBJGPU *pGpu; - struct Device *pDevice; }; #ifndef __NVOC_CLASS_ContextDma_TYPEDEF__ @@ -191,9 +204,9 @@ NV_STATUS __nvoc_objCreate_ContextDma(ContextDma**, Dynamic*, NvU32, struct CALL // Wrapper macros -#define ctxdmaMapTo_FNPTR(pContextDma) pContextDma->__ctxdmaMapTo__ +#define ctxdmaMapTo_FNPTR(pContextDma) pContextDma->__nvoc_vtable->__ctxdmaMapTo__ #define ctxdmaMapTo(pContextDma, pParams) ctxdmaMapTo_DISPATCH(pContextDma, pParams) -#define ctxdmaUnmapFrom_FNPTR(pContextDma) pContextDma->__ctxdmaUnmapFrom__ +#define ctxdmaUnmapFrom_FNPTR(pContextDma) pContextDma->__nvoc_vtable->__ctxdmaUnmapFrom__ #define ctxdmaUnmapFrom(pContextDma, pParams) ctxdmaUnmapFrom_DISPATCH(pContextDma, pParams) #define ctxdmaCtrlCmdUpdateContextdma_FNPTR(pContextDma) pContextDma->__ctxdmaCtrlCmdUpdateContextdma__ #define ctxdmaCtrlCmdUpdateContextdma(pContextDma, pUpdateCtxtDmaParams) ctxdmaCtrlCmdUpdateContextdma_DISPATCH(pContextDma, pUpdateCtxtDmaParams) @@ -201,62 +214,62 @@ NV_STATUS __nvoc_objCreate_ContextDma(ContextDma**, Dynamic*, NvU32, struct CALL #define ctxdmaCtrlCmdBindContextdma(pContextDma, pBindCtxtDmaParams) ctxdmaCtrlCmdBindContextdma_DISPATCH(pContextDma, pBindCtxtDmaParams) #define ctxdmaCtrlCmdUnbindContextdma_FNPTR(pContextDma) pContextDma->__ctxdmaCtrlCmdUnbindContextdma__ #define ctxdmaCtrlCmdUnbindContextdma(pContextDma, pUnbindCtxtDmaParams) ctxdmaCtrlCmdUnbindContextdma_DISPATCH(pContextDma, pUnbindCtxtDmaParams) -#define ctxdmaAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define ctxdmaAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define ctxdmaAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) ctxdmaAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define ctxdmaShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ +#define ctxdmaShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define ctxdmaShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) ctxdmaShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define ctxdmaGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define ctxdmaGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define ctxdmaGetMemInterMapParams(pRmResource, pParams) ctxdmaGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define ctxdmaCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define ctxdmaCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define ctxdmaCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) ctxdmaCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define ctxdmaGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define ctxdmaGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define ctxdmaGetMemoryMappingDescriptor(pRmResource, ppMemDesc) ctxdmaGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define ctxdmaControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define ctxdmaControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define ctxdmaControlSerialization_Prologue(pResource, pCallContext, pParams) ctxdmaControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define ctxdmaControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define ctxdmaControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define ctxdmaControlSerialization_Epilogue(pResource, pCallContext, pParams) ctxdmaControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define ctxdmaControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ +#define ctxdmaControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define ctxdmaControl_Prologue(pResource, pCallContext, pParams) ctxdmaControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define ctxdmaControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define ctxdmaControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define ctxdmaControl_Epilogue(pResource, pCallContext, pParams) ctxdmaControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define ctxdmaCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define ctxdmaCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define ctxdmaCanCopy(pResource) ctxdmaCanCopy_DISPATCH(pResource) -#define ctxdmaIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define ctxdmaIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define ctxdmaIsDuplicate(pResource, hMemory, pDuplicate) ctxdmaIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define ctxdmaPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define ctxdmaPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define ctxdmaPreDestruct(pResource) ctxdmaPreDestruct_DISPATCH(pResource) -#define ctxdmaControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define ctxdmaControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControl__ #define ctxdmaControl(pResource, pCallContext, pParams) ctxdmaControl_DISPATCH(pResource, pCallContext, pParams) -#define ctxdmaControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define ctxdmaControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define ctxdmaControlFilter(pResource, pCallContext, pParams) ctxdmaControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define ctxdmaMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define ctxdmaMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define ctxdmaMap(pResource, pCallContext, pParams, pCpuMapping) ctxdmaMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define ctxdmaUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define ctxdmaUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define ctxdmaUnmap(pResource, pCallContext, pCpuMapping) ctxdmaUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define ctxdmaIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define ctxdmaIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define ctxdmaIsPartialUnmapSupported(pResource) ctxdmaIsPartialUnmapSupported_DISPATCH(pResource) -#define ctxdmaGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define ctxdmaGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define ctxdmaGetRefCount(pResource) ctxdmaGetRefCount_DISPATCH(pResource) -#define ctxdmaAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define ctxdmaAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define ctxdmaAddAdditionalDependants(pClient, pResource, pReference) ctxdmaAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define ctxdmaGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define ctxdmaGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define ctxdmaGetNotificationListPtr(pNotifier) ctxdmaGetNotificationListPtr_DISPATCH(pNotifier) -#define ctxdmaGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define ctxdmaGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define ctxdmaGetNotificationShare(pNotifier) ctxdmaGetNotificationShare_DISPATCH(pNotifier) -#define ctxdmaSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define ctxdmaSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define ctxdmaSetNotificationShare(pNotifier, pNotifShare) ctxdmaSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define ctxdmaUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define ctxdmaUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define ctxdmaUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) ctxdmaUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define ctxdmaGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define ctxdmaGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define ctxdmaGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) ctxdmaGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS ctxdmaMapTo_DISPATCH(struct ContextDma *pContextDma, struct RS_RES_MAP_TO_PARAMS *pParams) { - return pContextDma->__ctxdmaMapTo__(pContextDma, pParams); + return pContextDma->__nvoc_vtable->__ctxdmaMapTo__(pContextDma, pParams); } static inline NV_STATUS ctxdmaUnmapFrom_DISPATCH(struct ContextDma *pContextDma, struct RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pContextDma->__ctxdmaUnmapFrom__(pContextDma, pParams); + return pContextDma->__nvoc_vtable->__ctxdmaUnmapFrom__(pContextDma, pParams); } static inline NV_STATUS ctxdmaCtrlCmdUpdateContextdma_DISPATCH(struct ContextDma *pContextDma, NV0002_CTRL_UPDATE_CONTEXTDMA_PARAMS *pUpdateCtxtDmaParams) { @@ -272,99 +285,99 @@ static inline NV_STATUS ctxdmaCtrlCmdUnbindContextdma_DISPATCH(struct ContextDma } static inline NvBool ctxdmaAccessCallback_DISPATCH(struct ContextDma *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__ctxdmaAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__ctxdmaAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool ctxdmaShareCallback_DISPATCH(struct ContextDma *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__ctxdmaShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__ctxdmaShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS ctxdmaGetMemInterMapParams_DISPATCH(struct ContextDma *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__ctxdmaGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__ctxdmaGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS ctxdmaCheckMemInterUnmap_DISPATCH(struct ContextDma *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__ctxdmaCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__ctxdmaCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS ctxdmaGetMemoryMappingDescriptor_DISPATCH(struct ContextDma *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__ctxdmaGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__ctxdmaGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS ctxdmaControlSerialization_Prologue_DISPATCH(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ctxdmaControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__ctxdmaControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void ctxdmaControlSerialization_Epilogue_DISPATCH(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__ctxdmaControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__ctxdmaControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS ctxdmaControl_Prologue_DISPATCH(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ctxdmaControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__ctxdmaControl_Prologue__(pResource, pCallContext, pParams); } static inline void ctxdmaControl_Epilogue_DISPATCH(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__ctxdmaControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__ctxdmaControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool ctxdmaCanCopy_DISPATCH(struct ContextDma *pResource) { - return pResource->__ctxdmaCanCopy__(pResource); + return pResource->__nvoc_vtable->__ctxdmaCanCopy__(pResource); } static inline NV_STATUS ctxdmaIsDuplicate_DISPATCH(struct ContextDma *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__ctxdmaIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__ctxdmaIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void ctxdmaPreDestruct_DISPATCH(struct ContextDma *pResource) { - pResource->__ctxdmaPreDestruct__(pResource); + pResource->__nvoc_vtable->__ctxdmaPreDestruct__(pResource); } static inline NV_STATUS ctxdmaControl_DISPATCH(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ctxdmaControl__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__ctxdmaControl__(pResource, pCallContext, pParams); } static inline NV_STATUS ctxdmaControlFilter_DISPATCH(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ctxdmaControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__ctxdmaControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS ctxdmaMap_DISPATCH(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__ctxdmaMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__ctxdmaMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS ctxdmaUnmap_DISPATCH(struct ContextDma *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__ctxdmaUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__ctxdmaUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool ctxdmaIsPartialUnmapSupported_DISPATCH(struct ContextDma *pResource) { - return pResource->__ctxdmaIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__ctxdmaIsPartialUnmapSupported__(pResource); } static inline NvU32 ctxdmaGetRefCount_DISPATCH(struct ContextDma *pResource) { - return pResource->__ctxdmaGetRefCount__(pResource); + return pResource->__nvoc_vtable->__ctxdmaGetRefCount__(pResource); } static inline void ctxdmaAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ContextDma *pResource, RsResourceRef *pReference) { - pResource->__ctxdmaAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__ctxdmaAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * ctxdmaGetNotificationListPtr_DISPATCH(struct ContextDma *pNotifier) { - return pNotifier->__ctxdmaGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__ctxdmaGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * ctxdmaGetNotificationShare_DISPATCH(struct ContextDma *pNotifier) { - return pNotifier->__ctxdmaGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__ctxdmaGetNotificationShare__(pNotifier); } static inline void ctxdmaSetNotificationShare_DISPATCH(struct ContextDma *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__ctxdmaSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__ctxdmaSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS ctxdmaUnregisterEvent_DISPATCH(struct ContextDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__ctxdmaUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__ctxdmaUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS ctxdmaGetOrAllocNotifShare_DISPATCH(struct ContextDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__ctxdmaGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__ctxdmaGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS ctxdmaMapTo_IMPL(struct ContextDma *pContextDma, struct RS_RES_MAP_TO_PARAMS *pParams); diff --git a/src/nvidia/generated/g_crashcat_engine_nvoc.c b/src/nvidia/generated/g_crashcat_engine_nvoc.c index 53698601c2..e62a231991 100644 --- a/src/nvidia/generated/g_crashcat_engine_nvoc.c +++ b/src/nvidia/generated/g_crashcat_engine_nvoc.c @@ -59,6 +59,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_CrashCatEngine = /*pExportInfo=*/ &__nvoc_export_info_CrashCatEngine }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_CrashCatEngine = { /*numEntries=*/ 0, @@ -91,43 +95,28 @@ NV_STATUS __nvoc_ctor_CrashCatEngine(CrashCatEngine *pThis) { // Vtable initialization static void __nvoc_init_funcTable_CrashCatEngine_1(CrashCatEngine *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // crashcatEngineUnload -- virtual - pThis->__crashcatEngineUnload__ = &crashcatEngineUnload_IMPL; - - // crashcatEngineConfigured -- pure virtual - pThis->__crashcatEngineConfigured__ = NULL; - - // crashcatEngineVprintf -- pure virtual - pThis->__crashcatEngineVprintf__ = NULL; - - // crashcatEnginePriRead -- pure virtual - pThis->__crashcatEnginePriRead__ = NULL; - - // crashcatEnginePriWrite -- pure virtual - pThis->__crashcatEnginePriWrite__ = NULL; - - // crashcatEngineMapBufferDescriptor -- pure virtual - pThis->__crashcatEngineMapBufferDescriptor__ = NULL; - - // crashcatEngineUnmapBufferDescriptor -- pure virtual - pThis->__crashcatEngineUnmapBufferDescriptor__ = NULL; - - // crashcatEngineSyncBufferDescriptor -- pure virtual - pThis->__crashcatEngineSyncBufferDescriptor__ = NULL; - - // crashcatEngineGetScratchOffsets -- pure virtual - pThis->__crashcatEngineGetScratchOffsets__ = NULL; - - // crashcatEngineGetWFL0Offset -- pure virtual - pThis->__crashcatEngineGetWFL0Offset__ = NULL; -} // End __nvoc_init_funcTable_CrashCatEngine_1 with approximately 10 basic block(s). +} // End __nvoc_init_funcTable_CrashCatEngine_1 // Initialize vtable(s) for 10 virtual method(s). void __nvoc_init_funcTable_CrashCatEngine(CrashCatEngine *pThis) { - // Initialize vtable(s) with 10 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__CrashCatEngine vtable = { + .__crashcatEngineUnload__ = &crashcatEngineUnload_IMPL, // virtual + .__crashcatEngineConfigured__ = NULL, // pure virtual + .__crashcatEngineVprintf__ = NULL, // pure virtual + .__crashcatEnginePriRead__ = NULL, // pure virtual + .__crashcatEnginePriWrite__ = NULL, // pure virtual + .__crashcatEngineMapBufferDescriptor__ = NULL, // pure virtual + .__crashcatEngineUnmapBufferDescriptor__ = NULL, // pure virtual + .__crashcatEngineSyncBufferDescriptor__ = NULL, // pure virtual + .__crashcatEngineGetScratchOffsets__ = NULL, // pure virtual + .__crashcatEngineGetWFL0Offset__ = NULL, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_vtable = &vtable; // (crashcatEngine) this __nvoc_init_funcTable_CrashCatEngine_1(pThis); } diff --git a/src/nvidia/generated/g_crashcat_engine_nvoc.h b/src/nvidia/generated/g_crashcat_engine_nvoc.h index cfe53e5589..bf778929e2 100644 --- a/src/nvidia/generated/g_crashcat_engine_nvoc.h +++ b/src/nvidia/generated/g_crashcat_engine_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -100,15 +100,29 @@ MAKE_INTRUSIVE_MAP(CrashCatMappedBufferMap, CrashCatBufferDescriptor, mappedBuff #endif +// Metadata including vtable +struct NVOC_VTABLE__CrashCatEngine; + + struct CrashCatEngine { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__CrashCatEngine *__nvoc_vtable; // Ancestor object pointers for `staticCast` feature struct CrashCatEngine *__nvoc_pbase_CrashCatEngine; // crashcatEngine - // Vtable with 10 per-object function pointers + // Data members + NvBool PRIVATE_FIELD(bEnabled); + struct CrashCatWayfinder *PRIVATE_FIELD(pWayfinder); + CrashCatRegisteredBufferMap PRIVATE_FIELD(registeredCrashBuffers); + CrashCatMappedBufferMap PRIVATE_FIELD(mappedCrashBuffers); +}; + + +// Metadata including vtable with 10 function pointers +struct NVOC_VTABLE__CrashCatEngine { void (*__crashcatEngineUnload__)(struct CrashCatEngine * /*this*/); // virtual NvBool (*__crashcatEngineConfigured__)(struct CrashCatEngine * /*this*/); // pure virtual void (*__crashcatEngineVprintf__)(struct CrashCatEngine * /*this*/, NvBool, const char *, va_list); // pure virtual @@ -119,12 +133,6 @@ struct CrashCatEngine { void (*__crashcatEngineSyncBufferDescriptor__)(struct CrashCatEngine * /*this*/, CrashCatBufferDescriptor *, NvU32, NvU32); // pure virtual const NvU32 * (*__crashcatEngineGetScratchOffsets__)(struct CrashCatEngine * /*this*/, NV_CRASHCAT_SCRATCH_GROUP_ID); // pure virtual NvU32 (*__crashcatEngineGetWFL0Offset__)(struct CrashCatEngine * /*this*/); // pure virtual - - // Data members - NvBool PRIVATE_FIELD(bEnabled); - struct CrashCatWayfinder *PRIVATE_FIELD(pWayfinder); - CrashCatRegisteredBufferMap PRIVATE_FIELD(registeredCrashBuffers); - CrashCatMappedBufferMap PRIVATE_FIELD(mappedCrashBuffers); }; #ifndef __NVOC_CLASS_CrashCatEngine_TYPEDEF__ @@ -157,66 +165,66 @@ NV_STATUS __nvoc_objCreate_CrashCatEngine(CrashCatEngine**, Dynamic*, NvU32); // Wrapper macros -#define crashcatEngineUnload_FNPTR(arg_this) arg_this->__crashcatEngineUnload__ +#define crashcatEngineUnload_FNPTR(arg_this) arg_this->__nvoc_vtable->__crashcatEngineUnload__ #define crashcatEngineUnload(arg_this) crashcatEngineUnload_DISPATCH(arg_this) -#define crashcatEngineConfigured_FNPTR(arg_this) arg_this->__crashcatEngineConfigured__ +#define crashcatEngineConfigured_FNPTR(arg_this) arg_this->__nvoc_vtable->__crashcatEngineConfigured__ #define crashcatEngineConfigured(arg_this) crashcatEngineConfigured_DISPATCH(arg_this) -#define crashcatEngineVprintf_FNPTR(arg_this) arg_this->__crashcatEngineVprintf__ +#define crashcatEngineVprintf_FNPTR(arg_this) arg_this->__nvoc_vtable->__crashcatEngineVprintf__ #define crashcatEngineVprintf(arg_this, bReportStart, fmt, args) crashcatEngineVprintf_DISPATCH(arg_this, bReportStart, fmt, args) -#define crashcatEnginePriRead_FNPTR(arg_this) arg_this->__crashcatEnginePriRead__ +#define crashcatEnginePriRead_FNPTR(arg_this) arg_this->__nvoc_vtable->__crashcatEnginePriRead__ #define crashcatEnginePriRead(arg_this, offset) crashcatEnginePriRead_DISPATCH(arg_this, offset) -#define crashcatEnginePriWrite_FNPTR(arg_this) arg_this->__crashcatEnginePriWrite__ +#define crashcatEnginePriWrite_FNPTR(arg_this) arg_this->__nvoc_vtable->__crashcatEnginePriWrite__ #define crashcatEnginePriWrite(arg_this, offset, data) crashcatEnginePriWrite_DISPATCH(arg_this, offset, data) -#define crashcatEngineMapBufferDescriptor_FNPTR(arg_this) arg_this->__crashcatEngineMapBufferDescriptor__ +#define crashcatEngineMapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_vtable->__crashcatEngineMapBufferDescriptor__ #define crashcatEngineMapBufferDescriptor(arg_this, pBufDesc) crashcatEngineMapBufferDescriptor_DISPATCH(arg_this, pBufDesc) -#define crashcatEngineUnmapBufferDescriptor_FNPTR(arg_this) arg_this->__crashcatEngineUnmapBufferDescriptor__ +#define crashcatEngineUnmapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_vtable->__crashcatEngineUnmapBufferDescriptor__ #define crashcatEngineUnmapBufferDescriptor(arg_this, pBufDesc) crashcatEngineUnmapBufferDescriptor_DISPATCH(arg_this, pBufDesc) -#define crashcatEngineSyncBufferDescriptor_FNPTR(arg_this) arg_this->__crashcatEngineSyncBufferDescriptor__ +#define crashcatEngineSyncBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_vtable->__crashcatEngineSyncBufferDescriptor__ #define crashcatEngineSyncBufferDescriptor(arg_this, pBufDesc, offset, size) crashcatEngineSyncBufferDescriptor_DISPATCH(arg_this, pBufDesc, offset, size) -#define crashcatEngineGetScratchOffsets_FNPTR(arg_this) arg_this->__crashcatEngineGetScratchOffsets__ +#define crashcatEngineGetScratchOffsets_FNPTR(arg_this) arg_this->__nvoc_vtable->__crashcatEngineGetScratchOffsets__ #define crashcatEngineGetScratchOffsets(arg_this, scratchId) crashcatEngineGetScratchOffsets_DISPATCH(arg_this, scratchId) -#define crashcatEngineGetWFL0Offset_FNPTR(arg_this) arg_this->__crashcatEngineGetWFL0Offset__ +#define crashcatEngineGetWFL0Offset_FNPTR(arg_this) arg_this->__nvoc_vtable->__crashcatEngineGetWFL0Offset__ #define crashcatEngineGetWFL0Offset(arg_this) crashcatEngineGetWFL0Offset_DISPATCH(arg_this) // Dispatch functions static inline void crashcatEngineUnload_DISPATCH(struct CrashCatEngine *arg_this) { - arg_this->__crashcatEngineUnload__(arg_this); + arg_this->__nvoc_vtable->__crashcatEngineUnload__(arg_this); } static inline NvBool crashcatEngineConfigured_DISPATCH(struct CrashCatEngine *arg_this) { - return arg_this->__crashcatEngineConfigured__(arg_this); + return arg_this->__nvoc_vtable->__crashcatEngineConfigured__(arg_this); } static inline void crashcatEngineVprintf_DISPATCH(struct CrashCatEngine *arg_this, NvBool bReportStart, const char *fmt, va_list args) { - arg_this->__crashcatEngineVprintf__(arg_this, bReportStart, fmt, args); + arg_this->__nvoc_vtable->__crashcatEngineVprintf__(arg_this, bReportStart, fmt, args); } static inline NvU32 crashcatEnginePriRead_DISPATCH(struct CrashCatEngine *arg_this, NvU32 offset) { - return arg_this->__crashcatEnginePriRead__(arg_this, offset); + return arg_this->__nvoc_vtable->__crashcatEnginePriRead__(arg_this, offset); } static inline void crashcatEnginePriWrite_DISPATCH(struct CrashCatEngine *arg_this, NvU32 offset, NvU32 data) { - arg_this->__crashcatEnginePriWrite__(arg_this, offset, data); + arg_this->__nvoc_vtable->__crashcatEnginePriWrite__(arg_this, offset, data); } static inline void * crashcatEngineMapBufferDescriptor_DISPATCH(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc) { - return arg_this->__crashcatEngineMapBufferDescriptor__(arg_this, pBufDesc); + return arg_this->__nvoc_vtable->__crashcatEngineMapBufferDescriptor__(arg_this, pBufDesc); } static inline void crashcatEngineUnmapBufferDescriptor_DISPATCH(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc) { - arg_this->__crashcatEngineUnmapBufferDescriptor__(arg_this, pBufDesc); + arg_this->__nvoc_vtable->__crashcatEngineUnmapBufferDescriptor__(arg_this, pBufDesc); } static inline void crashcatEngineSyncBufferDescriptor_DISPATCH(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { - arg_this->__crashcatEngineSyncBufferDescriptor__(arg_this, pBufDesc, offset, size); + arg_this->__nvoc_vtable->__crashcatEngineSyncBufferDescriptor__(arg_this, pBufDesc, offset, size); } static inline const NvU32 * crashcatEngineGetScratchOffsets_DISPATCH(struct CrashCatEngine *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchId) { - return arg_this->__crashcatEngineGetScratchOffsets__(arg_this, scratchId); + return arg_this->__nvoc_vtable->__crashcatEngineGetScratchOffsets__(arg_this, scratchId); } static inline NvU32 crashcatEngineGetWFL0Offset_DISPATCH(struct CrashCatEngine *arg_this) { - return arg_this->__crashcatEngineGetWFL0Offset__(arg_this); + return arg_this->__nvoc_vtable->__crashcatEngineGetWFL0Offset__(arg_this); } void crashcatEngineUnload_IMPL(struct CrashCatEngine *arg1); diff --git a/src/nvidia/generated/g_crashcat_queue_nvoc.c b/src/nvidia/generated/g_crashcat_queue_nvoc.c index 6759a9b208..3cde1592d1 100644 --- a/src/nvidia/generated/g_crashcat_queue_nvoc.c +++ b/src/nvidia/generated/g_crashcat_queue_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_CrashCatQueue = /*pExportInfo=*/ &__nvoc_export_info_CrashCatQueue }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_CrashCatQueue = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_crashcat_queue_nvoc.h b/src/nvidia/generated/g_crashcat_queue_nvoc.h index c32f2d4eca..5460d2963e 100644 --- a/src/nvidia/generated/g_crashcat_queue_nvoc.h +++ b/src/nvidia/generated/g_crashcat_queue_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_crashcat_report_nvoc.c b/src/nvidia/generated/g_crashcat_report_nvoc.c index 3f15776078..e6d6b23096 100644 --- a/src/nvidia/generated/g_crashcat_report_nvoc.c +++ b/src/nvidia/generated/g_crashcat_report_nvoc.c @@ -77,6 +77,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_CrashCatReport = /*pExportInfo=*/ &__nvoc_export_info_CrashCatReport }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_CrashCatReport = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_crashcat_report_nvoc.h b/src/nvidia/generated/g_crashcat_report_nvoc.h index 51a6f9782c..6493fb3110 100644 --- a/src/nvidia/generated/g_crashcat_report_nvoc.h +++ b/src/nvidia/generated/g_crashcat_report_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_crashcat_wayfinder_nvoc.c b/src/nvidia/generated/g_crashcat_wayfinder_nvoc.c index 31a712664e..ab9aedb076 100644 --- a/src/nvidia/generated/g_crashcat_wayfinder_nvoc.c +++ b/src/nvidia/generated/g_crashcat_wayfinder_nvoc.c @@ -67,6 +67,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_CrashCatWayfinder = /*pExportInfo=*/ &__nvoc_export_info_CrashCatWayfinder }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_CrashCatWayfinder = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_crashcat_wayfinder_nvoc.h b/src/nvidia/generated/g_crashcat_wayfinder_nvoc.h index b2bc03082a..3fb04722dd 100644 --- a/src/nvidia/generated/g_crashcat_wayfinder_nvoc.h +++ b/src/nvidia/generated/g_crashcat_wayfinder_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_dbgbuffer_nvoc.c b/src/nvidia/generated/g_dbgbuffer_nvoc.c index c66d500c11..85b693321e 100644 --- a/src/nvidia/generated/g_dbgbuffer_nvoc.c +++ b/src/nvidia/generated/g_dbgbuffer_nvoc.c @@ -93,133 +93,201 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_DebugBufferApi = /*pExportInfo=*/ &__nvoc_export_info_DebugBufferApi }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_DebugBufferApi_gpuresMap(struct GpuResource *pDebugBufferApi, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_down_thunk_DebugBufferApi_gpuresUnmap(struct GpuResource *pDebugBufferApi, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_down_thunk_DebugBufferApi_gpuresGetMapAddrSpace(struct GpuResource *pDebugBufferApi, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_down_thunk_DebugBufferApi_rmresGetMemoryMappingDescriptor(struct RmResource *pDebugBufferApi, MEMORY_DESCRIPTOR **ppMemDesc); // this + // 4 down-thunk(s) defined to bridge methods in DebugBufferApi from superclasses // dbgbufMap: virtual override (res) base (gpures) -static NV_STATUS __nvoc_down_thunk_DebugBufferApi_gpuresMap(struct GpuResource *pDebugBufferApi, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_down_thunk_DebugBufferApi_gpuresMap(struct GpuResource *pDebugBufferApi, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return dbgbufMap((struct DebugBufferApi *)(((unsigned char *) pDebugBufferApi) - __nvoc_rtti_DebugBufferApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // dbgbufUnmap: virtual override (res) base (gpures) -static NV_STATUS __nvoc_down_thunk_DebugBufferApi_gpuresUnmap(struct GpuResource *pDebugBufferApi, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_down_thunk_DebugBufferApi_gpuresUnmap(struct GpuResource *pDebugBufferApi, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return dbgbufUnmap((struct DebugBufferApi *)(((unsigned char *) pDebugBufferApi) - __nvoc_rtti_DebugBufferApi_GpuResource.offset), pCallContext, pCpuMapping); } // dbgbufGetMapAddrSpace: virtual override (gpures) base (gpures) -static NV_STATUS __nvoc_down_thunk_DebugBufferApi_gpuresGetMapAddrSpace(struct GpuResource *pDebugBufferApi, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_down_thunk_DebugBufferApi_gpuresGetMapAddrSpace(struct GpuResource *pDebugBufferApi, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return dbgbufGetMapAddrSpace((struct DebugBufferApi *)(((unsigned char *) pDebugBufferApi) - __nvoc_rtti_DebugBufferApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // dbgbufGetMemoryMappingDescriptor: virtual override (rmres) base (gpures) -static NV_STATUS __nvoc_down_thunk_DebugBufferApi_rmresGetMemoryMappingDescriptor(struct RmResource *pDebugBufferApi, MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_down_thunk_DebugBufferApi_rmresGetMemoryMappingDescriptor(struct RmResource *pDebugBufferApi, MEMORY_DESCRIPTOR **ppMemDesc) { return dbgbufGetMemoryMappingDescriptor((struct DebugBufferApi *)(((unsigned char *) pDebugBufferApi) - __nvoc_rtti_DebugBufferApi_RmResource.offset), ppMemDesc); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_dbgbufControl(struct DebugBufferApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_GpuResource_dbgbufShareCallback(struct DebugBufferApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dbgbufGetRegBaseOffsetAndSize(struct DebugBufferApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dbgbufInternalControlForward(struct DebugBufferApi *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_dbgbufGetInternalObjectHandle(struct DebugBufferApi *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_dbgbufAccessCallback(struct DebugBufferApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_dbgbufGetMemInterMapParams(struct DebugBufferApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_dbgbufCheckMemInterUnmap(struct DebugBufferApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_dbgbufControlSerialization_Prologue(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_dbgbufControlSerialization_Epilogue(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_dbgbufControl_Prologue(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_dbgbufControl_Epilogue(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_dbgbufCanCopy(struct DebugBufferApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dbgbufIsDuplicate(struct DebugBufferApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_dbgbufPreDestruct(struct DebugBufferApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dbgbufControlFilter(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_dbgbufIsPartialUnmapSupported(struct DebugBufferApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dbgbufMapTo(struct DebugBufferApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_dbgbufUnmapFrom(struct DebugBufferApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_dbgbufGetRefCount(struct DebugBufferApi *pResource); // this +void __nvoc_up_thunk_RsResource_dbgbufAddAdditionalDependants(struct RsClient *pClient, struct DebugBufferApi *pResource, RsResourceRef *pReference); // this + // 21 up-thunk(s) defined to bridge methods in DebugBufferApi to superclasses // dbgbufControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_dbgbufControl(struct DebugBufferApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_dbgbufControl(struct DebugBufferApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DebugBufferApi_GpuResource.offset), pCallContext, pParams); } // dbgbufShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_dbgbufShareCallback(struct DebugBufferApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_dbgbufShareCallback(struct DebugBufferApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DebugBufferApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // dbgbufGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_dbgbufGetRegBaseOffsetAndSize(struct DebugBufferApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_dbgbufGetRegBaseOffsetAndSize(struct DebugBufferApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DebugBufferApi_GpuResource.offset), pGpu, pOffset, pSize); } // dbgbufInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_dbgbufInternalControlForward(struct DebugBufferApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_dbgbufInternalControlForward(struct DebugBufferApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DebugBufferApi_GpuResource.offset), command, pParams, size); } // dbgbufGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_dbgbufGetInternalObjectHandle(struct DebugBufferApi *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_dbgbufGetInternalObjectHandle(struct DebugBufferApi *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DebugBufferApi_GpuResource.offset)); } // dbgbufAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_dbgbufAccessCallback(struct DebugBufferApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_dbgbufAccessCallback(struct DebugBufferApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // dbgbufGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_dbgbufGetMemInterMapParams(struct DebugBufferApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dbgbufGetMemInterMapParams(struct DebugBufferApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DebugBufferApi_RmResource.offset), pParams); } // dbgbufCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_dbgbufCheckMemInterUnmap(struct DebugBufferApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_dbgbufCheckMemInterUnmap(struct DebugBufferApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DebugBufferApi_RmResource.offset), bSubdeviceHandleProvided); } // dbgbufControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_dbgbufControlSerialization_Prologue(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dbgbufControlSerialization_Prologue(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RmResource.offset), pCallContext, pParams); } // dbgbufControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_dbgbufControlSerialization_Epilogue(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_dbgbufControlSerialization_Epilogue(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RmResource.offset), pCallContext, pParams); } // dbgbufControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_dbgbufControl_Prologue(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dbgbufControl_Prologue(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RmResource.offset), pCallContext, pParams); } // dbgbufControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_dbgbufControl_Epilogue(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_dbgbufControl_Epilogue(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RmResource.offset), pCallContext, pParams); } // dbgbufCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_dbgbufCanCopy(struct DebugBufferApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_dbgbufCanCopy(struct DebugBufferApi *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset)); } // dbgbufIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_dbgbufIsDuplicate(struct DebugBufferApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_dbgbufIsDuplicate(struct DebugBufferApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset), hMemory, pDuplicate); } // dbgbufPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_dbgbufPreDestruct(struct DebugBufferApi *pResource) { +void __nvoc_up_thunk_RsResource_dbgbufPreDestruct(struct DebugBufferApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset)); } // dbgbufControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_dbgbufControlFilter(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dbgbufControlFilter(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset), pCallContext, pParams); } // dbgbufIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_dbgbufIsPartialUnmapSupported(struct DebugBufferApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_dbgbufIsPartialUnmapSupported(struct DebugBufferApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset)); } // dbgbufMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_dbgbufMapTo(struct DebugBufferApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dbgbufMapTo(struct DebugBufferApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset), pParams); } // dbgbufUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_dbgbufUnmapFrom(struct DebugBufferApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dbgbufUnmapFrom(struct DebugBufferApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset), pParams); } // dbgbufGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_dbgbufGetRefCount(struct DebugBufferApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_dbgbufGetRefCount(struct DebugBufferApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset)); } // dbgbufAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_dbgbufAddAdditionalDependants(struct RsClient *pClient, struct DebugBufferApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_dbgbufAddAdditionalDependants(struct RsClient *pClient, struct DebugBufferApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DebugBufferApi_RsResource.offset), pReference); } @@ -263,92 +331,110 @@ NV_STATUS __nvoc_ctor_DebugBufferApi(DebugBufferApi *pThis, CALL_CONTEXT * arg_p // Vtable initialization static void __nvoc_init_funcTable_DebugBufferApi_1(DebugBufferApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // dbgbufMap -- virtual override (res) base (gpures) - pThis->__dbgbufMap__ = &dbgbufMap_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresMap__ = &__nvoc_down_thunk_DebugBufferApi_gpuresMap; - - // dbgbufUnmap -- virtual override (res) base (gpures) - pThis->__dbgbufUnmap__ = &dbgbufUnmap_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresUnmap__ = &__nvoc_down_thunk_DebugBufferApi_gpuresUnmap; - - // dbgbufGetMapAddrSpace -- virtual override (gpures) base (gpures) - pThis->__dbgbufGetMapAddrSpace__ = &dbgbufGetMapAddrSpace_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_down_thunk_DebugBufferApi_gpuresGetMapAddrSpace; - - // dbgbufGetMemoryMappingDescriptor -- virtual override (rmres) base (gpures) - pThis->__dbgbufGetMemoryMappingDescriptor__ = &dbgbufGetMemoryMappingDescriptor_IMPL; - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_DebugBufferApi_rmresGetMemoryMappingDescriptor; - - // dbgbufControl -- virtual inherited (gpures) base (gpures) - pThis->__dbgbufControl__ = &__nvoc_up_thunk_GpuResource_dbgbufControl; - - // dbgbufShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__dbgbufShareCallback__ = &__nvoc_up_thunk_GpuResource_dbgbufShareCallback; - - // dbgbufGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__dbgbufGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_dbgbufGetRegBaseOffsetAndSize; - - // dbgbufInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__dbgbufInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dbgbufInternalControlForward; - - // dbgbufGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__dbgbufGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dbgbufGetInternalObjectHandle; - - // dbgbufAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__dbgbufAccessCallback__ = &__nvoc_up_thunk_RmResource_dbgbufAccessCallback; - - // dbgbufGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__dbgbufGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dbgbufGetMemInterMapParams; - - // dbgbufCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__dbgbufCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dbgbufCheckMemInterUnmap; - - // dbgbufControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__dbgbufControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dbgbufControlSerialization_Prologue; - - // dbgbufControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__dbgbufControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dbgbufControlSerialization_Epilogue; - - // dbgbufControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__dbgbufControl_Prologue__ = &__nvoc_up_thunk_RmResource_dbgbufControl_Prologue; - - // dbgbufControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__dbgbufControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dbgbufControl_Epilogue; - - // dbgbufCanCopy -- virtual inherited (res) base (gpures) - pThis->__dbgbufCanCopy__ = &__nvoc_up_thunk_RsResource_dbgbufCanCopy; - - // dbgbufIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__dbgbufIsDuplicate__ = &__nvoc_up_thunk_RsResource_dbgbufIsDuplicate; - - // dbgbufPreDestruct -- virtual inherited (res) base (gpures) - pThis->__dbgbufPreDestruct__ = &__nvoc_up_thunk_RsResource_dbgbufPreDestruct; - - // dbgbufControlFilter -- virtual inherited (res) base (gpures) - pThis->__dbgbufControlFilter__ = &__nvoc_up_thunk_RsResource_dbgbufControlFilter; - - // dbgbufIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__dbgbufIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dbgbufIsPartialUnmapSupported; - - // dbgbufMapTo -- virtual inherited (res) base (gpures) - pThis->__dbgbufMapTo__ = &__nvoc_up_thunk_RsResource_dbgbufMapTo; - - // dbgbufUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__dbgbufUnmapFrom__ = &__nvoc_up_thunk_RsResource_dbgbufUnmapFrom; - - // dbgbufGetRefCount -- virtual inherited (res) base (gpures) - pThis->__dbgbufGetRefCount__ = &__nvoc_up_thunk_RsResource_dbgbufGetRefCount; - - // dbgbufAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__dbgbufAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dbgbufAddAdditionalDependants; -} // End __nvoc_init_funcTable_DebugBufferApi_1 with approximately 29 basic block(s). +} // End __nvoc_init_funcTable_DebugBufferApi_1 // Initialize vtable(s) for 25 virtual method(s). void __nvoc_init_funcTable_DebugBufferApi(DebugBufferApi *pThis) { - // Initialize vtable(s) with 25 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__DebugBufferApi vtable = { + .__dbgbufMap__ = &dbgbufMap_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresMap__ = &__nvoc_down_thunk_DebugBufferApi_gpuresMap, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__dbgbufUnmap__ = &dbgbufUnmap_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresUnmap__ = &__nvoc_down_thunk_DebugBufferApi_gpuresUnmap, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__dbgbufGetMapAddrSpace__ = &dbgbufGetMapAddrSpace_IMPL, // virtual override (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_down_thunk_DebugBufferApi_gpuresGetMapAddrSpace, // virtual + .__dbgbufGetMemoryMappingDescriptor__ = &dbgbufGetMemoryMappingDescriptor_IMPL, // virtual override (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_DebugBufferApi_rmresGetMemoryMappingDescriptor, // virtual + .__dbgbufControl__ = &__nvoc_up_thunk_GpuResource_dbgbufControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__dbgbufShareCallback__ = &__nvoc_up_thunk_GpuResource_dbgbufShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__dbgbufGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_dbgbufGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__dbgbufInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dbgbufInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__dbgbufGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dbgbufGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__dbgbufAccessCallback__ = &__nvoc_up_thunk_RmResource_dbgbufAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__dbgbufGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dbgbufGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__dbgbufCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dbgbufCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__dbgbufControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dbgbufControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__dbgbufControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dbgbufControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__dbgbufControl_Prologue__ = &__nvoc_up_thunk_RmResource_dbgbufControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__dbgbufControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dbgbufControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__dbgbufCanCopy__ = &__nvoc_up_thunk_RsResource_dbgbufCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__dbgbufIsDuplicate__ = &__nvoc_up_thunk_RsResource_dbgbufIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__dbgbufPreDestruct__ = &__nvoc_up_thunk_RsResource_dbgbufPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__dbgbufControlFilter__ = &__nvoc_up_thunk_RsResource_dbgbufControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__dbgbufIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dbgbufIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__dbgbufMapTo__ = &__nvoc_up_thunk_RsResource_dbgbufMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__dbgbufUnmapFrom__ = &__nvoc_up_thunk_RsResource_dbgbufUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__dbgbufGetRefCount__ = &__nvoc_up_thunk_RsResource_dbgbufGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__dbgbufAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dbgbufAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (dbgbuf) this __nvoc_init_funcTable_DebugBufferApi_1(pThis); } diff --git a/src/nvidia/generated/g_dbgbuffer_nvoc.h b/src/nvidia/generated/g_dbgbuffer_nvoc.h index 4606a5dea0..c0eb8108ab 100644 --- a/src/nvidia/generated/g_dbgbuffer_nvoc.h +++ b/src/nvidia/generated/g_dbgbuffer_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -66,10 +66,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__DebugBufferApi; + + struct DebugBufferApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__DebugBufferApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -82,7 +87,15 @@ struct DebugBufferApi { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct DebugBufferApi *__nvoc_pbase_DebugBufferApi; // dbgbuf - // Vtable with 25 per-object function pointers + // Data members + MEMORY_DESCRIPTOR *pMemDesc; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__DebugBufferApi { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + NV_STATUS (*__dbgbufMap__)(struct DebugBufferApi * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual override (res) base (gpures) NV_STATUS (*__dbgbufUnmap__)(struct DebugBufferApi * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual override (res) base (gpures) NV_STATUS (*__dbgbufGetMapAddrSpace__)(struct DebugBufferApi * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (gpures) base (gpures) @@ -108,9 +121,6 @@ struct DebugBufferApi { NV_STATUS (*__dbgbufUnmapFrom__)(struct DebugBufferApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__dbgbufGetRefCount__)(struct DebugBufferApi * /*this*/); // virtual inherited (res) base (gpures) void (*__dbgbufAddAdditionalDependants__)(struct RsClient *, struct DebugBufferApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - MEMORY_DESCRIPTOR *pMemDesc; }; #ifndef __NVOC_CLASS_DebugBufferApi_TYPEDEF__ @@ -143,156 +153,156 @@ NV_STATUS __nvoc_objCreate_DebugBufferApi(DebugBufferApi**, Dynamic*, NvU32, CAL // Wrapper macros -#define dbgbufMap_FNPTR(pDebugBufferApi) pDebugBufferApi->__dbgbufMap__ +#define dbgbufMap_FNPTR(pDebugBufferApi) pDebugBufferApi->__nvoc_vtable->__dbgbufMap__ #define dbgbufMap(pDebugBufferApi, pCallContext, pParams, pCpuMapping) dbgbufMap_DISPATCH(pDebugBufferApi, pCallContext, pParams, pCpuMapping) -#define dbgbufUnmap_FNPTR(pDebugBufferApi) pDebugBufferApi->__dbgbufUnmap__ +#define dbgbufUnmap_FNPTR(pDebugBufferApi) pDebugBufferApi->__nvoc_vtable->__dbgbufUnmap__ #define dbgbufUnmap(pDebugBufferApi, pCallContext, pCpuMapping) dbgbufUnmap_DISPATCH(pDebugBufferApi, pCallContext, pCpuMapping) -#define dbgbufGetMapAddrSpace_FNPTR(pDebugBufferApi) pDebugBufferApi->__dbgbufGetMapAddrSpace__ +#define dbgbufGetMapAddrSpace_FNPTR(pDebugBufferApi) pDebugBufferApi->__nvoc_vtable->__dbgbufGetMapAddrSpace__ #define dbgbufGetMapAddrSpace(pDebugBufferApi, pCallContext, mapFlags, pAddrSpace) dbgbufGetMapAddrSpace_DISPATCH(pDebugBufferApi, pCallContext, mapFlags, pAddrSpace) -#define dbgbufGetMemoryMappingDescriptor_FNPTR(pDebugBufferApi) pDebugBufferApi->__dbgbufGetMemoryMappingDescriptor__ +#define dbgbufGetMemoryMappingDescriptor_FNPTR(pDebugBufferApi) pDebugBufferApi->__nvoc_vtable->__dbgbufGetMemoryMappingDescriptor__ #define dbgbufGetMemoryMappingDescriptor(pDebugBufferApi, ppMemDesc) dbgbufGetMemoryMappingDescriptor_DISPATCH(pDebugBufferApi, ppMemDesc) -#define dbgbufControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define dbgbufControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define dbgbufControl(pGpuResource, pCallContext, pParams) dbgbufControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define dbgbufShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define dbgbufShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define dbgbufShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) dbgbufShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define dbgbufGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define dbgbufGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define dbgbufGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) dbgbufGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define dbgbufInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define dbgbufInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define dbgbufInternalControlForward(pGpuResource, command, pParams, size) dbgbufInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define dbgbufGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define dbgbufGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define dbgbufGetInternalObjectHandle(pGpuResource) dbgbufGetInternalObjectHandle_DISPATCH(pGpuResource) -#define dbgbufAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define dbgbufAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define dbgbufAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dbgbufAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define dbgbufGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define dbgbufGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define dbgbufGetMemInterMapParams(pRmResource, pParams) dbgbufGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define dbgbufCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define dbgbufCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define dbgbufCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dbgbufCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define dbgbufControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define dbgbufControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define dbgbufControlSerialization_Prologue(pResource, pCallContext, pParams) dbgbufControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define dbgbufControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define dbgbufControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define dbgbufControlSerialization_Epilogue(pResource, pCallContext, pParams) dbgbufControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define dbgbufControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define dbgbufControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define dbgbufControl_Prologue(pResource, pCallContext, pParams) dbgbufControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define dbgbufControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define dbgbufControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define dbgbufControl_Epilogue(pResource, pCallContext, pParams) dbgbufControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define dbgbufCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define dbgbufCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define dbgbufCanCopy(pResource) dbgbufCanCopy_DISPATCH(pResource) -#define dbgbufIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define dbgbufIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define dbgbufIsDuplicate(pResource, hMemory, pDuplicate) dbgbufIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define dbgbufPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define dbgbufPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define dbgbufPreDestruct(pResource) dbgbufPreDestruct_DISPATCH(pResource) -#define dbgbufControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define dbgbufControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define dbgbufControlFilter(pResource, pCallContext, pParams) dbgbufControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define dbgbufIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define dbgbufIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define dbgbufIsPartialUnmapSupported(pResource) dbgbufIsPartialUnmapSupported_DISPATCH(pResource) -#define dbgbufMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define dbgbufMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define dbgbufMapTo(pResource, pParams) dbgbufMapTo_DISPATCH(pResource, pParams) -#define dbgbufUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define dbgbufUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define dbgbufUnmapFrom(pResource, pParams) dbgbufUnmapFrom_DISPATCH(pResource, pParams) -#define dbgbufGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define dbgbufGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define dbgbufGetRefCount(pResource) dbgbufGetRefCount_DISPATCH(pResource) -#define dbgbufAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define dbgbufAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define dbgbufAddAdditionalDependants(pClient, pResource, pReference) dbgbufAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NV_STATUS dbgbufMap_DISPATCH(struct DebugBufferApi *pDebugBufferApi, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pDebugBufferApi->__dbgbufMap__(pDebugBufferApi, pCallContext, pParams, pCpuMapping); + return pDebugBufferApi->__nvoc_vtable->__dbgbufMap__(pDebugBufferApi, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS dbgbufUnmap_DISPATCH(struct DebugBufferApi *pDebugBufferApi, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pDebugBufferApi->__dbgbufUnmap__(pDebugBufferApi, pCallContext, pCpuMapping); + return pDebugBufferApi->__nvoc_vtable->__dbgbufUnmap__(pDebugBufferApi, pCallContext, pCpuMapping); } static inline NV_STATUS dbgbufGetMapAddrSpace_DISPATCH(struct DebugBufferApi *pDebugBufferApi, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pDebugBufferApi->__dbgbufGetMapAddrSpace__(pDebugBufferApi, pCallContext, mapFlags, pAddrSpace); + return pDebugBufferApi->__nvoc_vtable->__dbgbufGetMapAddrSpace__(pDebugBufferApi, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS dbgbufGetMemoryMappingDescriptor_DISPATCH(struct DebugBufferApi *pDebugBufferApi, MEMORY_DESCRIPTOR **ppMemDesc) { - return pDebugBufferApi->__dbgbufGetMemoryMappingDescriptor__(pDebugBufferApi, ppMemDesc); + return pDebugBufferApi->__nvoc_vtable->__dbgbufGetMemoryMappingDescriptor__(pDebugBufferApi, ppMemDesc); } static inline NV_STATUS dbgbufControl_DISPATCH(struct DebugBufferApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__dbgbufControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__dbgbufControl__(pGpuResource, pCallContext, pParams); } static inline NvBool dbgbufShareCallback_DISPATCH(struct DebugBufferApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__dbgbufShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__dbgbufShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS dbgbufGetRegBaseOffsetAndSize_DISPATCH(struct DebugBufferApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__dbgbufGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__dbgbufGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS dbgbufInternalControlForward_DISPATCH(struct DebugBufferApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__dbgbufInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__dbgbufInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle dbgbufGetInternalObjectHandle_DISPATCH(struct DebugBufferApi *pGpuResource) { - return pGpuResource->__dbgbufGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__dbgbufGetInternalObjectHandle__(pGpuResource); } static inline NvBool dbgbufAccessCallback_DISPATCH(struct DebugBufferApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__dbgbufAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__dbgbufAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS dbgbufGetMemInterMapParams_DISPATCH(struct DebugBufferApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__dbgbufGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__dbgbufGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS dbgbufCheckMemInterUnmap_DISPATCH(struct DebugBufferApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__dbgbufCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__dbgbufCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS dbgbufControlSerialization_Prologue_DISPATCH(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dbgbufControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dbgbufControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void dbgbufControlSerialization_Epilogue_DISPATCH(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dbgbufControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__dbgbufControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS dbgbufControl_Prologue_DISPATCH(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dbgbufControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dbgbufControl_Prologue__(pResource, pCallContext, pParams); } static inline void dbgbufControl_Epilogue_DISPATCH(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dbgbufControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__dbgbufControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool dbgbufCanCopy_DISPATCH(struct DebugBufferApi *pResource) { - return pResource->__dbgbufCanCopy__(pResource); + return pResource->__nvoc_vtable->__dbgbufCanCopy__(pResource); } static inline NV_STATUS dbgbufIsDuplicate_DISPATCH(struct DebugBufferApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__dbgbufIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__dbgbufIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void dbgbufPreDestruct_DISPATCH(struct DebugBufferApi *pResource) { - pResource->__dbgbufPreDestruct__(pResource); + pResource->__nvoc_vtable->__dbgbufPreDestruct__(pResource); } static inline NV_STATUS dbgbufControlFilter_DISPATCH(struct DebugBufferApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dbgbufControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dbgbufControlFilter__(pResource, pCallContext, pParams); } static inline NvBool dbgbufIsPartialUnmapSupported_DISPATCH(struct DebugBufferApi *pResource) { - return pResource->__dbgbufIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__dbgbufIsPartialUnmapSupported__(pResource); } static inline NV_STATUS dbgbufMapTo_DISPATCH(struct DebugBufferApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__dbgbufMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__dbgbufMapTo__(pResource, pParams); } static inline NV_STATUS dbgbufUnmapFrom_DISPATCH(struct DebugBufferApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__dbgbufUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__dbgbufUnmapFrom__(pResource, pParams); } static inline NvU32 dbgbufGetRefCount_DISPATCH(struct DebugBufferApi *pResource) { - return pResource->__dbgbufGetRefCount__(pResource); + return pResource->__nvoc_vtable->__dbgbufGetRefCount__(pResource); } static inline void dbgbufAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DebugBufferApi *pResource, RsResourceRef *pReference) { - pResource->__dbgbufAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__dbgbufAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS dbgbufMap_IMPL(struct DebugBufferApi *pDebugBufferApi, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); diff --git a/src/nvidia/generated/g_dce_client_nvoc.h b/src/nvidia/generated/g_dce_client_nvoc.h index 7fac067f5a..ca19f0c0e7 100644 --- a/src/nvidia/generated/g_dce_client_nvoc.h +++ b/src/nvidia/generated/g_dce_client_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -72,10 +72,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__OBJDCECLIENTRM; + + struct OBJDCECLIENTRM { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__OBJDCECLIENTRM *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -85,7 +90,17 @@ struct OBJDCECLIENTRM { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct OBJDCECLIENTRM *__nvoc_pbase_OBJDCECLIENTRM; // dceclient - // Vtable with 14 per-object function pointers + // Data members + struct OBJRPC *pRpc; + NvU32 clientId[2]; + NvU32 hInternalClient; +}; + + +// Metadata including vtable with 14 function pointers plus superclass metadata +struct NVOC_VTABLE__OBJDCECLIENTRM { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + NV_STATUS (*__dceclientConstructEngine__)(struct OBJGPU *, struct OBJDCECLIENTRM * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) void (*__dceclientStateDestroy__)(struct OBJGPU *, struct OBJDCECLIENTRM * /*this*/); // virtual override (engstate) base (engstate) NV_STATUS (*__dceclientStateLoad__)(struct OBJGPU *, struct OBJDCECLIENTRM * /*this*/, NvU32); // virtual override (engstate) base (engstate) @@ -100,11 +115,6 @@ struct OBJDCECLIENTRM { NV_STATUS (*__dceclientStatePreUnload__)(struct OBJGPU *, struct OBJDCECLIENTRM * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) NV_STATUS (*__dceclientStatePostUnload__)(struct OBJGPU *, struct OBJDCECLIENTRM * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) NvBool (*__dceclientIsPresent__)(struct OBJGPU *, struct OBJDCECLIENTRM * /*this*/); // virtual inherited (engstate) base (engstate) - - // Data members - struct OBJRPC *pRpc; - NvU32 clientId[2]; - NvU32 hInternalClient; }; #ifndef __NVOC_CLASS_OBJDCECLIENTRM_TYPEDEF__ @@ -141,90 +151,90 @@ NV_STATUS __nvoc_objCreate_OBJDCECLIENTRM(OBJDCECLIENTRM**, Dynamic*, NvU32); // Wrapper macros -#define dceclientConstructEngine_FNPTR(arg_this) arg_this->__dceclientConstructEngine__ +#define dceclientConstructEngine_FNPTR(arg_this) arg_this->__nvoc_vtable->__dceclientConstructEngine__ #define dceclientConstructEngine(arg1, arg_this, arg3) dceclientConstructEngine_DISPATCH(arg1, arg_this, arg3) -#define dceclientStateDestroy_FNPTR(arg_this) arg_this->__dceclientStateDestroy__ +#define dceclientStateDestroy_FNPTR(arg_this) arg_this->__nvoc_vtable->__dceclientStateDestroy__ #define dceclientStateDestroy(arg1, arg_this) dceclientStateDestroy_DISPATCH(arg1, arg_this) -#define dceclientStateLoad_FNPTR(arg_this) arg_this->__dceclientStateLoad__ +#define dceclientStateLoad_FNPTR(arg_this) arg_this->__nvoc_vtable->__dceclientStateLoad__ #define dceclientStateLoad(arg1, arg_this, arg3) dceclientStateLoad_DISPATCH(arg1, arg_this, arg3) -#define dceclientStateUnload_FNPTR(arg_this) arg_this->__dceclientStateUnload__ +#define dceclientStateUnload_FNPTR(arg_this) arg_this->__nvoc_vtable->__dceclientStateUnload__ #define dceclientStateUnload(arg1, arg_this, arg3) dceclientStateUnload_DISPATCH(arg1, arg_this, arg3) -#define dceclientInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define dceclientInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define dceclientInitMissing(pGpu, pEngstate) dceclientInitMissing_DISPATCH(pGpu, pEngstate) -#define dceclientStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define dceclientStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define dceclientStatePreInitLocked(pGpu, pEngstate) dceclientStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define dceclientStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define dceclientStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define dceclientStatePreInitUnlocked(pGpu, pEngstate) dceclientStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define dceclientStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define dceclientStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitLocked__ #define dceclientStateInitLocked(pGpu, pEngstate) dceclientStateInitLocked_DISPATCH(pGpu, pEngstate) -#define dceclientStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define dceclientStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define dceclientStateInitUnlocked(pGpu, pEngstate) dceclientStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define dceclientStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define dceclientStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define dceclientStatePreLoad(pGpu, pEngstate, arg3) dceclientStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define dceclientStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define dceclientStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostLoad__ #define dceclientStatePostLoad(pGpu, pEngstate, arg3) dceclientStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define dceclientStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define dceclientStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define dceclientStatePreUnload(pGpu, pEngstate, arg3) dceclientStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define dceclientStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define dceclientStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define dceclientStatePostUnload(pGpu, pEngstate, arg3) dceclientStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define dceclientIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define dceclientIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define dceclientIsPresent(pGpu, pEngstate) dceclientIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS dceclientConstructEngine_DISPATCH(struct OBJGPU *arg1, struct OBJDCECLIENTRM *arg_this, ENGDESCRIPTOR arg3) { - return arg_this->__dceclientConstructEngine__(arg1, arg_this, arg3); + return arg_this->__nvoc_vtable->__dceclientConstructEngine__(arg1, arg_this, arg3); } static inline void dceclientStateDestroy_DISPATCH(struct OBJGPU *arg1, struct OBJDCECLIENTRM *arg_this) { - arg_this->__dceclientStateDestroy__(arg1, arg_this); + arg_this->__nvoc_vtable->__dceclientStateDestroy__(arg1, arg_this); } static inline NV_STATUS dceclientStateLoad_DISPATCH(struct OBJGPU *arg1, struct OBJDCECLIENTRM *arg_this, NvU32 arg3) { - return arg_this->__dceclientStateLoad__(arg1, arg_this, arg3); + return arg_this->__nvoc_vtable->__dceclientStateLoad__(arg1, arg_this, arg3); } static inline NV_STATUS dceclientStateUnload_DISPATCH(struct OBJGPU *arg1, struct OBJDCECLIENTRM *arg_this, NvU32 arg3) { - return arg_this->__dceclientStateUnload__(arg1, arg_this, arg3); + return arg_this->__nvoc_vtable->__dceclientStateUnload__(arg1, arg_this, arg3); } static inline void dceclientInitMissing_DISPATCH(struct OBJGPU *pGpu, struct OBJDCECLIENTRM *pEngstate) { - pEngstate->__dceclientInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__dceclientInitMissing__(pGpu, pEngstate); } static inline NV_STATUS dceclientStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct OBJDCECLIENTRM *pEngstate) { - return pEngstate->__dceclientStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__dceclientStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS dceclientStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct OBJDCECLIENTRM *pEngstate) { - return pEngstate->__dceclientStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__dceclientStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS dceclientStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct OBJDCECLIENTRM *pEngstate) { - return pEngstate->__dceclientStateInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__dceclientStateInitLocked__(pGpu, pEngstate); } static inline NV_STATUS dceclientStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct OBJDCECLIENTRM *pEngstate) { - return pEngstate->__dceclientStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__dceclientStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS dceclientStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct OBJDCECLIENTRM *pEngstate, NvU32 arg3) { - return pEngstate->__dceclientStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__dceclientStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS dceclientStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct OBJDCECLIENTRM *pEngstate, NvU32 arg3) { - return pEngstate->__dceclientStatePostLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__dceclientStatePostLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS dceclientStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct OBJDCECLIENTRM *pEngstate, NvU32 arg3) { - return pEngstate->__dceclientStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__dceclientStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS dceclientStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct OBJDCECLIENTRM *pEngstate, NvU32 arg3) { - return pEngstate->__dceclientStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__dceclientStatePostUnload__(pGpu, pEngstate, arg3); } static inline NvBool dceclientIsPresent_DISPATCH(struct OBJGPU *pGpu, struct OBJDCECLIENTRM *pEngstate) { - return pEngstate->__dceclientIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__dceclientIsPresent__(pGpu, pEngstate); } NV_STATUS dceclientConstructEngine_IMPL(struct OBJGPU *arg1, struct OBJDCECLIENTRM *arg2, ENGDESCRIPTOR arg3); diff --git a/src/nvidia/generated/g_deferred_api_nvoc.c b/src/nvidia/generated/g_deferred_api_nvoc.c index 44c9586ca1..940fcebc1d 100644 --- a/src/nvidia/generated/g_deferred_api_nvoc.c +++ b/src/nvidia/generated/g_deferred_api_nvoc.c @@ -189,168 +189,278 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Deferred }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super^2 +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super^2 +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap(struct RmResource *pChannelDescendant, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_down_thunk_DeferredApiObject_chandesGetSwMethods(struct ChannelDescendant *pDeferredApi, const METHOD **ppMethods, NvU32 *pNumMethods); // this +NvBool __nvoc_down_thunk_DeferredApiObject_chandesIsSwMethodStalling(struct ChannelDescendant *pDeferredApi, NvU32 hDeferredApi); // this + // 2 down-thunk(s) defined to bridge methods in DeferredApiObject from superclasses // defapiGetSwMethods: virtual override (chandes) base (chandes) -static NV_STATUS __nvoc_down_thunk_DeferredApiObject_chandesGetSwMethods(struct ChannelDescendant *pDeferredApi, const METHOD **ppMethods, NvU32 *pNumMethods) { +NV_STATUS __nvoc_down_thunk_DeferredApiObject_chandesGetSwMethods(struct ChannelDescendant *pDeferredApi, const METHOD **ppMethods, NvU32 *pNumMethods) { return defapiGetSwMethods((struct DeferredApiObject *)(((unsigned char *) pDeferredApi) - __nvoc_rtti_DeferredApiObject_ChannelDescendant.offset), ppMethods, pNumMethods); } // defapiIsSwMethodStalling: virtual override (chandes) base (chandes) -static NvBool __nvoc_down_thunk_DeferredApiObject_chandesIsSwMethodStalling(struct ChannelDescendant *pDeferredApi, NvU32 hDeferredApi) { +NvBool __nvoc_down_thunk_DeferredApiObject_chandesIsSwMethodStalling(struct ChannelDescendant *pDeferredApi, NvU32 hDeferredApi) { return defapiIsSwMethodStalling((struct DeferredApiObject *)(((unsigned char *) pDeferredApi) - __nvoc_rtti_DeferredApiObject_ChannelDescendant.offset), hDeferredApi); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^3 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^3 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^3 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super^2 +NV_STATUS __nvoc_up_thunk_GpuResource_chandesControl(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesMap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesUnmap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_GpuResource_chandesShareCallback(struct ChannelDescendant *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize(struct ChannelDescendant *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesInternalControlForward(struct ChannelDescendant *pGpuResource, NvU32 command, void *pParams, NvU32 size); // super +NvHandle __nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle(struct ChannelDescendant *pGpuResource); // super +NvBool __nvoc_up_thunk_RmResource_chandesAccessCallback(struct ChannelDescendant *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemInterMapParams(struct ChannelDescendant *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor(struct ChannelDescendant *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControl_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControl_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesCanCopy(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesIsDuplicate(struct ChannelDescendant *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_chandesPreDestruct(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesControlFilter(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesMapTo(struct ChannelDescendant *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesUnmapFrom(struct ChannelDescendant *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_chandesGetRefCount(struct ChannelDescendant *pResource); // super +void __nvoc_up_thunk_RsResource_chandesAddAdditionalDependants(struct RsClient *pClient, struct ChannelDescendant *pResource, RsResourceRef *pReference); // super +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_chandesGetNotificationListPtr(struct ChannelDescendant *pNotifier); // super +struct NotifShare * __nvoc_up_thunk_Notifier_chandesGetNotificationShare(struct ChannelDescendant *pNotifier); // super +void __nvoc_up_thunk_Notifier_chandesSetNotificationShare(struct ChannelDescendant *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesUnregisterEvent(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_up_thunk_ChannelDescendant_defapiCheckMemInterUnmap(struct DeferredApiObject *pChannelDescendant, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_GpuResource_defapiControl(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_defapiMap(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_defapiUnmap(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_defapiShareCallback(struct DeferredApiObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_defapiGetRegBaseOffsetAndSize(struct DeferredApiObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_defapiGetMapAddrSpace(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_defapiInternalControlForward(struct DeferredApiObject *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_defapiGetInternalObjectHandle(struct DeferredApiObject *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_defapiAccessCallback(struct DeferredApiObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_defapiGetMemInterMapParams(struct DeferredApiObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_defapiGetMemoryMappingDescriptor(struct DeferredApiObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_defapiControlSerialization_Prologue(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_defapiControlSerialization_Epilogue(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_defapiControl_Prologue(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_defapiControl_Epilogue(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_defapiCanCopy(struct DeferredApiObject *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_defapiIsDuplicate(struct DeferredApiObject *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_defapiPreDestruct(struct DeferredApiObject *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_defapiControlFilter(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_defapiIsPartialUnmapSupported(struct DeferredApiObject *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_defapiMapTo(struct DeferredApiObject *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_defapiUnmapFrom(struct DeferredApiObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_defapiGetRefCount(struct DeferredApiObject *pResource); // this +void __nvoc_up_thunk_RsResource_defapiAddAdditionalDependants(struct RsClient *pClient, struct DeferredApiObject *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_defapiGetNotificationListPtr(struct DeferredApiObject *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_defapiGetNotificationShare(struct DeferredApiObject *pNotifier); // this +void __nvoc_up_thunk_Notifier_defapiSetNotificationShare(struct DeferredApiObject *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_defapiUnregisterEvent(struct DeferredApiObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_defapiGetOrAllocNotifShare(struct DeferredApiObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 30 up-thunk(s) defined to bridge methods in DeferredApiObject to superclasses // defapiCheckMemInterUnmap: virtual inherited (chandes) base (chandes) -static NV_STATUS __nvoc_up_thunk_ChannelDescendant_defapiCheckMemInterUnmap(struct DeferredApiObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_ChannelDescendant_defapiCheckMemInterUnmap(struct DeferredApiObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_DeferredApiObject_ChannelDescendant.offset), bSubdeviceHandleProvided); } // defapiControl: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_defapiControl(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_defapiControl(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset), pCallContext, pParams); } // defapiMap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_defapiMap(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_defapiMap(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // defapiUnmap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_defapiUnmap(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_defapiUnmap(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset), pCallContext, pCpuMapping); } // defapiShareCallback: virtual inherited (gpures) base (chandes) -static NvBool __nvoc_up_thunk_GpuResource_defapiShareCallback(struct DeferredApiObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_defapiShareCallback(struct DeferredApiObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // defapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_defapiGetRegBaseOffsetAndSize(struct DeferredApiObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_defapiGetRegBaseOffsetAndSize(struct DeferredApiObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset), pGpu, pOffset, pSize); } // defapiGetMapAddrSpace: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_defapiGetMapAddrSpace(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_defapiGetMapAddrSpace(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // defapiInternalControlForward: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_defapiInternalControlForward(struct DeferredApiObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_defapiInternalControlForward(struct DeferredApiObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset), command, pParams, size); } // defapiGetInternalObjectHandle: virtual inherited (gpures) base (chandes) -static NvHandle __nvoc_up_thunk_GpuResource_defapiGetInternalObjectHandle(struct DeferredApiObject *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_defapiGetInternalObjectHandle(struct DeferredApiObject *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DeferredApiObject_GpuResource.offset)); } // defapiAccessCallback: virtual inherited (rmres) base (chandes) -static NvBool __nvoc_up_thunk_RmResource_defapiAccessCallback(struct DeferredApiObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_defapiAccessCallback(struct DeferredApiObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // defapiGetMemInterMapParams: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_defapiGetMemInterMapParams(struct DeferredApiObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_defapiGetMemInterMapParams(struct DeferredApiObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DeferredApiObject_RmResource.offset), pParams); } // defapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_defapiGetMemoryMappingDescriptor(struct DeferredApiObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_defapiGetMemoryMappingDescriptor(struct DeferredApiObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DeferredApiObject_RmResource.offset), ppMemDesc); } // defapiControlSerialization_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_defapiControlSerialization_Prologue(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_defapiControlSerialization_Prologue(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RmResource.offset), pCallContext, pParams); } // defapiControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_defapiControlSerialization_Epilogue(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_defapiControlSerialization_Epilogue(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RmResource.offset), pCallContext, pParams); } // defapiControl_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_defapiControl_Prologue(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_defapiControl_Prologue(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RmResource.offset), pCallContext, pParams); } // defapiControl_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_defapiControl_Epilogue(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_defapiControl_Epilogue(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RmResource.offset), pCallContext, pParams); } // defapiCanCopy: virtual inherited (res) base (chandes) -static NvBool __nvoc_up_thunk_RsResource_defapiCanCopy(struct DeferredApiObject *pResource) { +NvBool __nvoc_up_thunk_RsResource_defapiCanCopy(struct DeferredApiObject *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset)); } // defapiIsDuplicate: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_defapiIsDuplicate(struct DeferredApiObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_defapiIsDuplicate(struct DeferredApiObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset), hMemory, pDuplicate); } // defapiPreDestruct: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_defapiPreDestruct(struct DeferredApiObject *pResource) { +void __nvoc_up_thunk_RsResource_defapiPreDestruct(struct DeferredApiObject *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset)); } // defapiControlFilter: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_defapiControlFilter(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_defapiControlFilter(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset), pCallContext, pParams); } // defapiIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body -static NvBool __nvoc_up_thunk_RsResource_defapiIsPartialUnmapSupported(struct DeferredApiObject *pResource) { +NvBool __nvoc_up_thunk_RsResource_defapiIsPartialUnmapSupported(struct DeferredApiObject *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset)); } // defapiMapTo: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_defapiMapTo(struct DeferredApiObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_defapiMapTo(struct DeferredApiObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset), pParams); } // defapiUnmapFrom: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_defapiUnmapFrom(struct DeferredApiObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_defapiUnmapFrom(struct DeferredApiObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset), pParams); } // defapiGetRefCount: virtual inherited (res) base (chandes) -static NvU32 __nvoc_up_thunk_RsResource_defapiGetRefCount(struct DeferredApiObject *pResource) { +NvU32 __nvoc_up_thunk_RsResource_defapiGetRefCount(struct DeferredApiObject *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset)); } // defapiAddAdditionalDependants: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_defapiAddAdditionalDependants(struct RsClient *pClient, struct DeferredApiObject *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_defapiAddAdditionalDependants(struct RsClient *pClient, struct DeferredApiObject *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DeferredApiObject_RsResource.offset), pReference); } // defapiGetNotificationListPtr: virtual inherited (notify) base (chandes) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_defapiGetNotificationListPtr(struct DeferredApiObject *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_defapiGetNotificationListPtr(struct DeferredApiObject *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DeferredApiObject_Notifier.offset)); } // defapiGetNotificationShare: virtual inherited (notify) base (chandes) -static struct NotifShare * __nvoc_up_thunk_Notifier_defapiGetNotificationShare(struct DeferredApiObject *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_defapiGetNotificationShare(struct DeferredApiObject *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DeferredApiObject_Notifier.offset)); } // defapiSetNotificationShare: virtual inherited (notify) base (chandes) -static void __nvoc_up_thunk_Notifier_defapiSetNotificationShare(struct DeferredApiObject *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_defapiSetNotificationShare(struct DeferredApiObject *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DeferredApiObject_Notifier.offset), pNotifShare); } // defapiUnregisterEvent: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_defapiUnregisterEvent(struct DeferredApiObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_defapiUnregisterEvent(struct DeferredApiObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DeferredApiObject_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // defapiGetOrAllocNotifShare: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_defapiGetOrAllocNotifShare(struct DeferredApiObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_defapiGetOrAllocNotifShare(struct DeferredApiObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DeferredApiObject_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -395,14 +505,6 @@ NV_STATUS __nvoc_ctor_DeferredApiObject(DeferredApiObject *pThis, RmHalspecOwner static void __nvoc_init_funcTable_DeferredApiObject_1(DeferredApiObject *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // defapiGetSwMethods -- virtual override (chandes) base (chandes) - pThis->__defapiGetSwMethods__ = &defapiGetSwMethods_IMPL; - pThis->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ = &__nvoc_down_thunk_DeferredApiObject_chandesGetSwMethods; - - // defapiIsSwMethodStalling -- virtual override (chandes) base (chandes) - pThis->__defapiIsSwMethodStalling__ = &defapiIsSwMethodStalling_IMPL; - pThis->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ = &__nvoc_down_thunk_DeferredApiObject_chandesIsSwMethodStalling; - // defapiCtrlCmdDeferredApi -- exported (id=0x50800101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) pThis->__defapiCtrlCmdDeferredApi__ = &defapiCtrlCmdDeferredApi_IMPL; @@ -422,103 +524,172 @@ static void __nvoc_init_funcTable_DeferredApiObject_1(DeferredApiObject *pThis) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) pThis->__defapiCtrlCmdRemoveApi__ = &defapiCtrlCmdRemoveApi_IMPL; #endif - - // defapiCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) - pThis->__defapiCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_defapiCheckMemInterUnmap; - - // defapiControl -- virtual inherited (gpures) base (chandes) - pThis->__defapiControl__ = &__nvoc_up_thunk_GpuResource_defapiControl; - - // defapiMap -- virtual inherited (gpures) base (chandes) - pThis->__defapiMap__ = &__nvoc_up_thunk_GpuResource_defapiMap; - - // defapiUnmap -- virtual inherited (gpures) base (chandes) - pThis->__defapiUnmap__ = &__nvoc_up_thunk_GpuResource_defapiUnmap; - - // defapiShareCallback -- virtual inherited (gpures) base (chandes) - pThis->__defapiShareCallback__ = &__nvoc_up_thunk_GpuResource_defapiShareCallback; - - // defapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) - pThis->__defapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_defapiGetRegBaseOffsetAndSize; - - // defapiGetMapAddrSpace -- virtual inherited (gpures) base (chandes) - pThis->__defapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_defapiGetMapAddrSpace; - - // defapiInternalControlForward -- virtual inherited (gpures) base (chandes) - pThis->__defapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_defapiInternalControlForward; - - // defapiGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) - pThis->__defapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_defapiGetInternalObjectHandle; - - // defapiAccessCallback -- virtual inherited (rmres) base (chandes) - pThis->__defapiAccessCallback__ = &__nvoc_up_thunk_RmResource_defapiAccessCallback; - - // defapiGetMemInterMapParams -- virtual inherited (rmres) base (chandes) - pThis->__defapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_defapiGetMemInterMapParams; - - // defapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) - pThis->__defapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_defapiGetMemoryMappingDescriptor; - - // defapiControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__defapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_defapiControlSerialization_Prologue; - - // defapiControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__defapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_defapiControlSerialization_Epilogue; - - // defapiControl_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__defapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_defapiControl_Prologue; - - // defapiControl_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__defapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_defapiControl_Epilogue; - - // defapiCanCopy -- virtual inherited (res) base (chandes) - pThis->__defapiCanCopy__ = &__nvoc_up_thunk_RsResource_defapiCanCopy; - - // defapiIsDuplicate -- virtual inherited (res) base (chandes) - pThis->__defapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_defapiIsDuplicate; - - // defapiPreDestruct -- virtual inherited (res) base (chandes) - pThis->__defapiPreDestruct__ = &__nvoc_up_thunk_RsResource_defapiPreDestruct; - - // defapiControlFilter -- virtual inherited (res) base (chandes) - pThis->__defapiControlFilter__ = &__nvoc_up_thunk_RsResource_defapiControlFilter; - - // defapiIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body - pThis->__defapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_defapiIsPartialUnmapSupported; - - // defapiMapTo -- virtual inherited (res) base (chandes) - pThis->__defapiMapTo__ = &__nvoc_up_thunk_RsResource_defapiMapTo; - - // defapiUnmapFrom -- virtual inherited (res) base (chandes) - pThis->__defapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_defapiUnmapFrom; - - // defapiGetRefCount -- virtual inherited (res) base (chandes) - pThis->__defapiGetRefCount__ = &__nvoc_up_thunk_RsResource_defapiGetRefCount; - - // defapiAddAdditionalDependants -- virtual inherited (res) base (chandes) - pThis->__defapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_defapiAddAdditionalDependants; - - // defapiGetNotificationListPtr -- virtual inherited (notify) base (chandes) - pThis->__defapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_defapiGetNotificationListPtr; - - // defapiGetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__defapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_defapiGetNotificationShare; - - // defapiSetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__defapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_defapiSetNotificationShare; - - // defapiUnregisterEvent -- virtual inherited (notify) base (chandes) - pThis->__defapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_defapiUnregisterEvent; - - // defapiGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) - pThis->__defapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_defapiGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_DeferredApiObject_1 with approximately 38 basic block(s). +} // End __nvoc_init_funcTable_DeferredApiObject_1 with approximately 4 basic block(s). // Initialize vtable(s) for 36 virtual method(s). void __nvoc_init_funcTable_DeferredApiObject(DeferredApiObject *pThis) { - // Initialize vtable(s) with 36 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__DeferredApiObject vtable = { + .__defapiGetSwMethods__ = &defapiGetSwMethods_IMPL, // virtual override (chandes) base (chandes) + .ChannelDescendant.__chandesGetSwMethods__ = &__nvoc_down_thunk_DeferredApiObject_chandesGetSwMethods, // virtual + .__defapiIsSwMethodStalling__ = &defapiIsSwMethodStalling_IMPL, // virtual override (chandes) base (chandes) + .ChannelDescendant.__chandesIsSwMethodStalling__ = &__nvoc_down_thunk_DeferredApiObject_chandesIsSwMethodStalling, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) +#endif + .__defapiCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_defapiCheckMemInterUnmap, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesCheckMemInterUnmap__ = &chandesCheckMemInterUnmap_IMPL, // virtual override (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap, // virtual + .__defapiControl__ = &__nvoc_up_thunk_GpuResource_defapiControl, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesControl__ = &__nvoc_up_thunk_GpuResource_chandesControl, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__defapiMap__ = &__nvoc_up_thunk_GpuResource_defapiMap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesMap__ = &__nvoc_up_thunk_GpuResource_chandesMap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__defapiUnmap__ = &__nvoc_up_thunk_GpuResource_defapiUnmap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesUnmap__ = &__nvoc_up_thunk_GpuResource_chandesUnmap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__defapiShareCallback__ = &__nvoc_up_thunk_GpuResource_defapiShareCallback, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesShareCallback__ = &__nvoc_up_thunk_GpuResource_chandesShareCallback, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__defapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_defapiGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__defapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_defapiGetMapAddrSpace, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__defapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_defapiInternalControlForward, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesInternalControlForward__ = &__nvoc_up_thunk_GpuResource_chandesInternalControlForward, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__defapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_defapiGetInternalObjectHandle, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__defapiAccessCallback__ = &__nvoc_up_thunk_RmResource_defapiAccessCallback, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesAccessCallback__ = &__nvoc_up_thunk_RmResource_chandesAccessCallback, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__defapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_defapiGetMemInterMapParams, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_chandesGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__defapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_defapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__defapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_defapiControlSerialization_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__defapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_defapiControlSerialization_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__defapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_defapiControl_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControl_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__defapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_defapiControl_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControl_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__defapiCanCopy__ = &__nvoc_up_thunk_RsResource_defapiCanCopy, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesCanCopy__ = &__nvoc_up_thunk_RsResource_chandesCanCopy, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__defapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_defapiIsDuplicate, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesIsDuplicate__ = &__nvoc_up_thunk_RsResource_chandesIsDuplicate, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__defapiPreDestruct__ = &__nvoc_up_thunk_RsResource_defapiPreDestruct, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesPreDestruct__ = &__nvoc_up_thunk_RsResource_chandesPreDestruct, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__defapiControlFilter__ = &__nvoc_up_thunk_RsResource_defapiControlFilter, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesControlFilter__ = &__nvoc_up_thunk_RsResource_chandesControlFilter, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__defapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_defapiIsPartialUnmapSupported, // inline virtual inherited (res) base (chandes) body + .ChannelDescendant.__chandesIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .ChannelDescendant.GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .ChannelDescendant.GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__defapiMapTo__ = &__nvoc_up_thunk_RsResource_defapiMapTo, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesMapTo__ = &__nvoc_up_thunk_RsResource_chandesMapTo, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__defapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_defapiUnmapFrom, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesUnmapFrom__ = &__nvoc_up_thunk_RsResource_chandesUnmapFrom, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__defapiGetRefCount__ = &__nvoc_up_thunk_RsResource_defapiGetRefCount, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesGetRefCount__ = &__nvoc_up_thunk_RsResource_chandesGetRefCount, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__defapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_defapiAddAdditionalDependants, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_chandesAddAdditionalDependants, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__defapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_defapiGetNotificationListPtr, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationListPtr, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__defapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_defapiGetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__defapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_defapiSetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesSetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesSetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__defapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_defapiUnregisterEvent, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesUnregisterEvent__ = &__nvoc_up_thunk_Notifier_chandesUnregisterEvent, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__defapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_defapiGetOrAllocNotifShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource.RsResource; // (res) super^4 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource; // (rmres) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource; // (gpures) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier.INotifier; // (inotify) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier; // (notify) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_vtable = &vtable.ChannelDescendant; // (chandes) super + pThis->__nvoc_vtable = &vtable; // (defapi) this + + // Initialize vtable(s) with 4 per-object function pointer(s). __nvoc_init_funcTable_DeferredApiObject_1(pThis); } diff --git a/src/nvidia/generated/g_deferred_api_nvoc.h b/src/nvidia/generated/g_deferred_api_nvoc.h index 8bcafde826..b77757ba8d 100644 --- a/src/nvidia/generated/g_deferred_api_nvoc.h +++ b/src/nvidia/generated/g_deferred_api_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -74,10 +74,15 @@ typedef struct _def_deferred_api_info #endif +// Metadata including vtable +struct NVOC_VTABLE__DeferredApiObject; + + struct DeferredApiObject { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__DeferredApiObject *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; @@ -93,13 +98,24 @@ struct DeferredApiObject { struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super struct DeferredApiObject *__nvoc_pbase_DeferredApiObject; // defapi - // Vtable with 36 per-object function pointers - NV_STATUS (*__defapiGetSwMethods__)(struct DeferredApiObject * /*this*/, const METHOD **, NvU32 *); // virtual override (chandes) base (chandes) - NvBool (*__defapiIsSwMethodStalling__)(struct DeferredApiObject * /*this*/, NvU32); // virtual override (chandes) base (chandes) + // Vtable with 4 per-object function pointers NV_STATUS (*__defapiCtrlCmdDeferredApi__)(struct DeferredApiObject * /*this*/, NV5080_CTRL_DEFERRED_API_PARAMS *); // exported (id=0x50800101) NV_STATUS (*__defapiCtrlCmdDeferredApiV2__)(struct DeferredApiObject * /*this*/, NV5080_CTRL_DEFERRED_API_V2_PARAMS *); // exported (id=0x50800103) NV_STATUS (*__defapiCtrlCmdDeferredApiInternal__)(struct DeferredApiObject * /*this*/, NV5080_CTRL_DEFERRED_API_INTERNAL_PARAMS *); // exported (id=0x50800104) NV_STATUS (*__defapiCtrlCmdRemoveApi__)(struct DeferredApiObject * /*this*/, NV5080_CTRL_REMOVE_API_PARAMS *); // exported (id=0x50800102) + + // Data members + PNODE DeferredApiList; + NvU32 NumWaitingOnTLBFlush; +}; + + +// Metadata including vtable with 32 function pointers plus superclass metadata +struct NVOC_VTABLE__DeferredApiObject { + const struct NVOC_VTABLE__ChannelDescendant ChannelDescendant; // (chandes) 32 function pointers + + NV_STATUS (*__defapiGetSwMethods__)(struct DeferredApiObject * /*this*/, const METHOD **, NvU32 *); // virtual override (chandes) base (chandes) + NvBool (*__defapiIsSwMethodStalling__)(struct DeferredApiObject * /*this*/, NvU32); // virtual override (chandes) base (chandes) NV_STATUS (*__defapiCheckMemInterUnmap__)(struct DeferredApiObject * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) NV_STATUS (*__defapiControl__)(struct DeferredApiObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (chandes) NV_STATUS (*__defapiMap__)(struct DeferredApiObject * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) @@ -130,10 +146,6 @@ struct DeferredApiObject { void (*__defapiSetNotificationShare__)(struct DeferredApiObject * /*this*/, struct NotifShare *); // virtual inherited (notify) base (chandes) NV_STATUS (*__defapiUnregisterEvent__)(struct DeferredApiObject * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (chandes) NV_STATUS (*__defapiGetOrAllocNotifShare__)(struct DeferredApiObject * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (chandes) - - // Data members - PNODE DeferredApiList; - NvU32 NumWaitingOnTLBFlush; }; #ifndef __NVOC_CLASS_DeferredApiObject_TYPEDEF__ @@ -166,9 +178,9 @@ NV_STATUS __nvoc_objCreate_DeferredApiObject(DeferredApiObject**, Dynamic*, NvU3 // Wrapper macros -#define defapiGetSwMethods_FNPTR(pDeferredApi) pDeferredApi->__defapiGetSwMethods__ +#define defapiGetSwMethods_FNPTR(pDeferredApi) pDeferredApi->__nvoc_vtable->__defapiGetSwMethods__ #define defapiGetSwMethods(pDeferredApi, ppMethods, pNumMethods) defapiGetSwMethods_DISPATCH(pDeferredApi, ppMethods, pNumMethods) -#define defapiIsSwMethodStalling_FNPTR(pDeferredApi) pDeferredApi->__defapiIsSwMethodStalling__ +#define defapiIsSwMethodStalling_FNPTR(pDeferredApi) pDeferredApi->__nvoc_vtable->__defapiIsSwMethodStalling__ #define defapiIsSwMethodStalling(pDeferredApi, hDeferredApi) defapiIsSwMethodStalling_DISPATCH(pDeferredApi, hDeferredApi) #define defapiCtrlCmdDeferredApi_FNPTR(pDeferredApiObj) pDeferredApiObj->__defapiCtrlCmdDeferredApi__ #define defapiCtrlCmdDeferredApi(pDeferredApiObj, pDeferredApi) defapiCtrlCmdDeferredApi_DISPATCH(pDeferredApiObj, pDeferredApi) @@ -178,74 +190,74 @@ NV_STATUS __nvoc_objCreate_DeferredApiObject(DeferredApiObject**, Dynamic*, NvU3 #define defapiCtrlCmdDeferredApiInternal(pDeferredApiObj, pDeferredApi) defapiCtrlCmdDeferredApiInternal_DISPATCH(pDeferredApiObj, pDeferredApi) #define defapiCtrlCmdRemoveApi_FNPTR(pDeferredApiObj) pDeferredApiObj->__defapiCtrlCmdRemoveApi__ #define defapiCtrlCmdRemoveApi(pDeferredApiObj, pRemoveApi) defapiCtrlCmdRemoveApi_DISPATCH(pDeferredApiObj, pRemoveApi) -#define defapiCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ +#define defapiCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesCheckMemInterUnmap__ #define defapiCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) defapiCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) -#define defapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define defapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define defapiControl(pGpuResource, pCallContext, pParams) defapiControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define defapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define defapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define defapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) defapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define defapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define defapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define defapiUnmap(pGpuResource, pCallContext, pCpuMapping) defapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define defapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ +#define defapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define defapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) defapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define defapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define defapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define defapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) defapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define defapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define defapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define defapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) defapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define defapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define defapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define defapiInternalControlForward(pGpuResource, command, pParams, size) defapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define defapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define defapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define defapiGetInternalObjectHandle(pGpuResource) defapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define defapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define defapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define defapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) defapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define defapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define defapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define defapiGetMemInterMapParams(pRmResource, pParams) defapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define defapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define defapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define defapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) defapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define defapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define defapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define defapiControlSerialization_Prologue(pResource, pCallContext, pParams) defapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define defapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define defapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define defapiControlSerialization_Epilogue(pResource, pCallContext, pParams) defapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define defapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define defapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define defapiControl_Prologue(pResource, pCallContext, pParams) defapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define defapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define defapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define defapiControl_Epilogue(pResource, pCallContext, pParams) defapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define defapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define defapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define defapiCanCopy(pResource) defapiCanCopy_DISPATCH(pResource) -#define defapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define defapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define defapiIsDuplicate(pResource, hMemory, pDuplicate) defapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define defapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define defapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define defapiPreDestruct(pResource) defapiPreDestruct_DISPATCH(pResource) -#define defapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define defapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define defapiControlFilter(pResource, pCallContext, pParams) defapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define defapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define defapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define defapiIsPartialUnmapSupported(pResource) defapiIsPartialUnmapSupported_DISPATCH(pResource) -#define defapiMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define defapiMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define defapiMapTo(pResource, pParams) defapiMapTo_DISPATCH(pResource, pParams) -#define defapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define defapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define defapiUnmapFrom(pResource, pParams) defapiUnmapFrom_DISPATCH(pResource, pParams) -#define defapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define defapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define defapiGetRefCount(pResource) defapiGetRefCount_DISPATCH(pResource) -#define defapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define defapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define defapiAddAdditionalDependants(pClient, pResource, pReference) defapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define defapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define defapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define defapiGetNotificationListPtr(pNotifier) defapiGetNotificationListPtr_DISPATCH(pNotifier) -#define defapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define defapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define defapiGetNotificationShare(pNotifier) defapiGetNotificationShare_DISPATCH(pNotifier) -#define defapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define defapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define defapiSetNotificationShare(pNotifier, pNotifShare) defapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define defapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define defapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define defapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) defapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define defapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define defapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define defapiGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) defapiGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS defapiGetSwMethods_DISPATCH(struct DeferredApiObject *pDeferredApi, const METHOD **ppMethods, NvU32 *pNumMethods) { - return pDeferredApi->__defapiGetSwMethods__(pDeferredApi, ppMethods, pNumMethods); + return pDeferredApi->__nvoc_vtable->__defapiGetSwMethods__(pDeferredApi, ppMethods, pNumMethods); } static inline NvBool defapiIsSwMethodStalling_DISPATCH(struct DeferredApiObject *pDeferredApi, NvU32 hDeferredApi) { - return pDeferredApi->__defapiIsSwMethodStalling__(pDeferredApi, hDeferredApi); + return pDeferredApi->__nvoc_vtable->__defapiIsSwMethodStalling__(pDeferredApi, hDeferredApi); } static inline NV_STATUS defapiCtrlCmdDeferredApi_DISPATCH(struct DeferredApiObject *pDeferredApiObj, NV5080_CTRL_DEFERRED_API_PARAMS *pDeferredApi) { @@ -265,123 +277,123 @@ static inline NV_STATUS defapiCtrlCmdRemoveApi_DISPATCH(struct DeferredApiObject } static inline NV_STATUS defapiCheckMemInterUnmap_DISPATCH(struct DeferredApiObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return pChannelDescendant->__defapiCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); + return pChannelDescendant->__nvoc_vtable->__defapiCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } static inline NV_STATUS defapiControl_DISPATCH(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__defapiControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__defapiControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS defapiMap_DISPATCH(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__defapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__defapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS defapiUnmap_DISPATCH(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__defapiUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__defapiUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool defapiShareCallback_DISPATCH(struct DeferredApiObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__defapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__defapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS defapiGetRegBaseOffsetAndSize_DISPATCH(struct DeferredApiObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__defapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__defapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS defapiGetMapAddrSpace_DISPATCH(struct DeferredApiObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__defapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__defapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS defapiInternalControlForward_DISPATCH(struct DeferredApiObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__defapiInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__defapiInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle defapiGetInternalObjectHandle_DISPATCH(struct DeferredApiObject *pGpuResource) { - return pGpuResource->__defapiGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__defapiGetInternalObjectHandle__(pGpuResource); } static inline NvBool defapiAccessCallback_DISPATCH(struct DeferredApiObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__defapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__defapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS defapiGetMemInterMapParams_DISPATCH(struct DeferredApiObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__defapiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__defapiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS defapiGetMemoryMappingDescriptor_DISPATCH(struct DeferredApiObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__defapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__defapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS defapiControlSerialization_Prologue_DISPATCH(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__defapiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__defapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void defapiControlSerialization_Epilogue_DISPATCH(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__defapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__defapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS defapiControl_Prologue_DISPATCH(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__defapiControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__defapiControl_Prologue__(pResource, pCallContext, pParams); } static inline void defapiControl_Epilogue_DISPATCH(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__defapiControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__defapiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool defapiCanCopy_DISPATCH(struct DeferredApiObject *pResource) { - return pResource->__defapiCanCopy__(pResource); + return pResource->__nvoc_vtable->__defapiCanCopy__(pResource); } static inline NV_STATUS defapiIsDuplicate_DISPATCH(struct DeferredApiObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__defapiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__defapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void defapiPreDestruct_DISPATCH(struct DeferredApiObject *pResource) { - pResource->__defapiPreDestruct__(pResource); + pResource->__nvoc_vtable->__defapiPreDestruct__(pResource); } static inline NV_STATUS defapiControlFilter_DISPATCH(struct DeferredApiObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__defapiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__defapiControlFilter__(pResource, pCallContext, pParams); } static inline NvBool defapiIsPartialUnmapSupported_DISPATCH(struct DeferredApiObject *pResource) { - return pResource->__defapiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__defapiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS defapiMapTo_DISPATCH(struct DeferredApiObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__defapiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__defapiMapTo__(pResource, pParams); } static inline NV_STATUS defapiUnmapFrom_DISPATCH(struct DeferredApiObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__defapiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__defapiUnmapFrom__(pResource, pParams); } static inline NvU32 defapiGetRefCount_DISPATCH(struct DeferredApiObject *pResource) { - return pResource->__defapiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__defapiGetRefCount__(pResource); } static inline void defapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DeferredApiObject *pResource, RsResourceRef *pReference) { - pResource->__defapiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__defapiAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * defapiGetNotificationListPtr_DISPATCH(struct DeferredApiObject *pNotifier) { - return pNotifier->__defapiGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__defapiGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * defapiGetNotificationShare_DISPATCH(struct DeferredApiObject *pNotifier) { - return pNotifier->__defapiGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__defapiGetNotificationShare__(pNotifier); } static inline void defapiSetNotificationShare_DISPATCH(struct DeferredApiObject *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__defapiSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__defapiSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS defapiUnregisterEvent_DISPATCH(struct DeferredApiObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__defapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__defapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS defapiGetOrAllocNotifShare_DISPATCH(struct DeferredApiObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__defapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__defapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS defapiGetSwMethods_IMPL(struct DeferredApiObject *pDeferredApi, const METHOD **ppMethods, NvU32 *pNumMethods); diff --git a/src/nvidia/generated/g_device_nvoc.c b/src/nvidia/generated/g_device_nvoc.c index 37adc5e45b..a8a311a483 100644 --- a/src/nvidia/generated/g_device_nvoc.c +++ b/src/nvidia/generated/g_device_nvoc.c @@ -102,21 +102,6 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] { /* [0] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) deviceCtrlCmdBifGetDmaBaseSysmemAddr_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) - /*flags=*/ 0x40u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x800103u, - /*paramSize=*/ sizeof(NV0080_CTRL_BIF_GET_DMA_BASE_SYSMEM_ADDR_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Device.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "deviceCtrlCmdBifGetDmaBaseSysmemAddr" -#endif - }, - { /* [1] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) - /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) deviceCtrlCmdBifAspmFeatureSupported_IMPL, #endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) @@ -129,7 +114,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdBifAspmFeatureSupported" #endif }, - { /* [2] */ + { /* [1] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -144,7 +129,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdBifAspmCyaUpdate" #endif }, - { /* [3] */ + { /* [2] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -159,7 +144,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdBifGetPciePowerControlMask" #endif }, - { /* [4] */ + { /* [3] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -174,7 +159,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdGpuGetClasslist" #endif }, - { /* [5] */ + { /* [4] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -189,7 +174,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdGpuGetNumSubdevices" #endif }, - { /* [6] */ + { /* [5] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x5u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -204,7 +189,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdGpuModifyGpuSwStatePersistence" #endif }, - { /* [7] */ + { /* [6] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -219,7 +204,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdGpuQueryGpuSwStatePersistence" #endif }, - { /* [8] */ + { /* [7] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -234,7 +219,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdGpuGetVirtualizationMode" #endif }, - { /* [9] */ + { /* [8] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -249,7 +234,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdGpuGetSparseTextureComputeMode" #endif }, - { /* [10] */ + { /* [9] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -264,7 +249,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdGpuSetSparseTextureComputeMode" #endif }, - { /* [11] */ + { /* [10] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -279,7 +264,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdGpuGetVgxCaps" #endif }, - { /* [12] */ + { /* [11] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -294,7 +279,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdGpuVirtualizationSwitchToVga" #endif }, - { /* [13] */ + { /* [12] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -309,7 +294,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdGpuGetSriovCaps" #endif }, - { /* [14] */ + { /* [13] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -324,7 +309,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdGpuGetClasslistV2" #endif }, - { /* [15] */ + { /* [14] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -339,7 +324,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdGpuGetFindSubDeviceHandle" #endif }, - { /* [16] */ + { /* [15] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40049u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -354,7 +339,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdGpuGetBrandCaps" #endif }, - { /* [17] */ + { /* [16] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -369,7 +354,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdGpuSetVgpuVfBar1Size" #endif }, - { /* [18] */ + { /* [17] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -384,7 +369,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdGpuSetVgpuHeterogeneousMode" #endif }, - { /* [19] */ + { /* [18] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -399,7 +384,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdGpuGetVgpuHeterogeneousMode" #endif }, - { /* [20] */ + { /* [19] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10au) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -414,7 +399,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdKGrGetCaps" #endif }, - { /* [21] */ + { /* [20] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -429,7 +414,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdKGrGetInfo" #endif }, - { /* [22] */ + { /* [21] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -444,7 +429,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdKGrGetTpcPartitionMode" #endif }, - { /* [23] */ + { /* [22] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -459,7 +444,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdKGrSetTpcPartitionMode" #endif }, - { /* [24] */ + { /* [23] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10au) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -474,7 +459,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdKGrGetCapsV2" #endif }, - { /* [25] */ + { /* [24] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -489,7 +474,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdKGrGetInfoV2" #endif }, - { /* [26] */ + { /* [25] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -504,7 +489,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdFbGetCaps" #endif }, - { /* [27] */ + { /* [26] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -519,7 +504,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdFbGetCompbitStoreInfo" #endif }, - { /* [28] */ + { /* [27] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -534,7 +519,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdFbGetCapsV2" #endif }, - { /* [29] */ + { /* [28] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -549,7 +534,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdSetDefaultVidmemPhysicality" #endif }, - { /* [30] */ + { /* [29] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -564,7 +549,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdHostGetCaps" #endif }, - { /* [31] */ + { /* [30] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x518u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -579,7 +564,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdHostGetCapsV2" #endif }, - { /* [32] */ + { /* [31] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -594,22 +579,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdFifoGetCaps" #endif }, - { /* [33] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) deviceCtrlCmdFifoStartSelectedChannels_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) - /*flags=*/ 0x48u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x801705u, - /*paramSize=*/ sizeof(NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Device.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "deviceCtrlCmdFifoStartSelectedChannels" -#endif - }, - { /* [34] */ + { /* [32] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40148u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -624,7 +594,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdFifoGetEngineContextProperties" #endif }, - { /* [35] */ + { /* [33] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -639,7 +609,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdFifoGetChannelList" #endif }, - { /* [36] */ + { /* [34] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40049u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -654,7 +624,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdFifoGetLatencyBufferSize" #endif }, - { /* [37] */ + { /* [35] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -669,7 +639,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdFifoSetChannelProperties" #endif }, - { /* [38] */ + { /* [36] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -684,7 +654,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdFifoStopRunlist" #endif }, - { /* [39] */ + { /* [37] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -699,7 +669,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdFifoStartRunlist" #endif }, - { /* [40] */ + { /* [38] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -714,7 +684,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdFifoGetCapsV2" #endif }, - { /* [41] */ + { /* [39] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -729,7 +699,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdFifoIdleChannels" #endif }, - { /* [42] */ + { /* [40] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -744,7 +714,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdDmaGetPteInfo" #endif }, - { /* [43] */ + { /* [41] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -759,7 +729,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdDmaFlush" #endif }, - { /* [44] */ + { /* [42] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -774,7 +744,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdDmaAdvSchedGetVaCaps" #endif }, - { /* [45] */ + { /* [43] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -789,7 +759,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdDmaGetPdeInfo" #endif }, - { /* [46] */ + { /* [44] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -804,7 +774,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdDmaSetPteInfo" #endif }, - { /* [47] */ + { /* [45] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -819,7 +789,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdDmaInvalidateTLB" #endif }, - { /* [48] */ + { /* [46] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -834,7 +804,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdDmaGetCaps" #endif }, - { /* [49] */ + { /* [47] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -849,7 +819,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdDmaSetVASpaceSize" #endif }, - { /* [50] */ + { /* [48] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -864,7 +834,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdDmaUpdatePde2" #endif }, - { /* [51] */ + { /* [49] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -879,7 +849,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdDmaEnablePrivilegedRange" #endif }, - { /* [52] */ + { /* [50] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c000u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -894,7 +864,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdDmaSetDefaultVASpace" #endif }, - { /* [53] */ + { /* [51] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14004u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -909,7 +879,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdDmaSetPageDirectory" #endif }, - { /* [54] */ + { /* [52] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14004u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -924,7 +894,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdDmaUnsetPageDirectory" #endif }, - { /* [55] */ + { /* [53] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -939,7 +909,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdKPerfCudaLimitSetControl" #endif }, - { /* [56] */ + { /* [54] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40148u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -954,7 +924,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdMsencGetCapsV2" #endif }, - { /* [57] */ + { /* [55] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40148u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -969,7 +939,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdBspGetCapsV2" #endif }, - { /* [58] */ + { /* [56] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -984,7 +954,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdOsUnixVTSwitch" #endif }, - { /* [59] */ + { /* [57] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -999,7 +969,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdOsUnixVTGetFBInfo" #endif }, - { /* [60] */ + { /* [58] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1014,7 +984,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdNvjpgGetCapsV2" #endif }, - { /* [61] */ + { /* [59] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1029,7 +999,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] /*func=*/ "deviceCtrlCmdInternalPerfCudaLimitDisable" #endif }, - { /* [62] */ + { /* [60] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1047,140 +1017,208 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Device[] }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_Device_gpuresControl(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_down_thunk_Device_gpuresInternalControlForward(struct GpuResource *pDevice, NvU32 command, void *pParams, NvU32 size); // this + // 2 down-thunk(s) defined to bridge methods in Device from superclasses // deviceControl: virtual override (res) base (gpures) -static NV_STATUS __nvoc_down_thunk_Device_gpuresControl(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_down_thunk_Device_gpuresControl(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return deviceControl((struct Device *)(((unsigned char *) pResource) - __nvoc_rtti_Device_GpuResource.offset), pCallContext, pParams); } // deviceInternalControlForward: virtual override (gpures) base (gpures) -static NV_STATUS __nvoc_down_thunk_Device_gpuresInternalControlForward(struct GpuResource *pDevice, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_down_thunk_Device_gpuresInternalControlForward(struct GpuResource *pDevice, NvU32 command, void *pParams, NvU32 size) { return deviceInternalControlForward((struct Device *)(((unsigned char *) pDevice) - __nvoc_rtti_Device_GpuResource.offset), command, pParams, size); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_deviceMap(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_deviceUnmap(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_deviceShareCallback(struct Device *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_deviceGetRegBaseOffsetAndSize(struct Device *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_deviceGetMapAddrSpace(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NvHandle __nvoc_up_thunk_GpuResource_deviceGetInternalObjectHandle(struct Device *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_deviceAccessCallback(struct Device *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_deviceGetMemInterMapParams(struct Device *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_deviceCheckMemInterUnmap(struct Device *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_deviceGetMemoryMappingDescriptor(struct Device *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_deviceControlSerialization_Prologue(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_deviceControlSerialization_Epilogue(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_deviceControl_Prologue(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_deviceControl_Epilogue(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_deviceCanCopy(struct Device *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_deviceIsDuplicate(struct Device *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_devicePreDestruct(struct Device *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_deviceControlFilter(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_deviceIsPartialUnmapSupported(struct Device *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_deviceMapTo(struct Device *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_deviceUnmapFrom(struct Device *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_deviceGetRefCount(struct Device *pResource); // this +void __nvoc_up_thunk_RsResource_deviceAddAdditionalDependants(struct RsClient *pClient, struct Device *pResource, RsResourceRef *pReference); // this + // 23 up-thunk(s) defined to bridge methods in Device to superclasses // deviceMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_deviceMap(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_deviceMap(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Device_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // deviceUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_deviceUnmap(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_deviceUnmap(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Device_GpuResource.offset), pCallContext, pCpuMapping); } // deviceShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_deviceShareCallback(struct Device *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_deviceShareCallback(struct Device *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Device_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // deviceGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_deviceGetRegBaseOffsetAndSize(struct Device *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_deviceGetRegBaseOffsetAndSize(struct Device *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Device_GpuResource.offset), pGpu, pOffset, pSize); } // deviceGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_deviceGetMapAddrSpace(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_deviceGetMapAddrSpace(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Device_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // deviceGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_deviceGetInternalObjectHandle(struct Device *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_deviceGetInternalObjectHandle(struct Device *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Device_GpuResource.offset)); } // deviceAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_deviceAccessCallback(struct Device *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_deviceAccessCallback(struct Device *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // deviceGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_deviceGetMemInterMapParams(struct Device *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_deviceGetMemInterMapParams(struct Device *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Device_RmResource.offset), pParams); } // deviceCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_deviceCheckMemInterUnmap(struct Device *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_deviceCheckMemInterUnmap(struct Device *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Device_RmResource.offset), bSubdeviceHandleProvided); } // deviceGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_deviceGetMemoryMappingDescriptor(struct Device *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_deviceGetMemoryMappingDescriptor(struct Device *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Device_RmResource.offset), ppMemDesc); } // deviceControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_deviceControlSerialization_Prologue(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_deviceControlSerialization_Prologue(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RmResource.offset), pCallContext, pParams); } // deviceControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_deviceControlSerialization_Epilogue(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_deviceControlSerialization_Epilogue(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RmResource.offset), pCallContext, pParams); } // deviceControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_deviceControl_Prologue(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_deviceControl_Prologue(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RmResource.offset), pCallContext, pParams); } // deviceControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_deviceControl_Epilogue(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_deviceControl_Epilogue(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RmResource.offset), pCallContext, pParams); } // deviceCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_deviceCanCopy(struct Device *pResource) { +NvBool __nvoc_up_thunk_RsResource_deviceCanCopy(struct Device *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RsResource.offset)); } // deviceIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_deviceIsDuplicate(struct Device *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_deviceIsDuplicate(struct Device *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RsResource.offset), hMemory, pDuplicate); } // devicePreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_devicePreDestruct(struct Device *pResource) { +void __nvoc_up_thunk_RsResource_devicePreDestruct(struct Device *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RsResource.offset)); } // deviceControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_deviceControlFilter(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_deviceControlFilter(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RsResource.offset), pCallContext, pParams); } // deviceIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_deviceIsPartialUnmapSupported(struct Device *pResource) { +NvBool __nvoc_up_thunk_RsResource_deviceIsPartialUnmapSupported(struct Device *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RsResource.offset)); } // deviceMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_deviceMapTo(struct Device *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_deviceMapTo(struct Device *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RsResource.offset), pParams); } // deviceUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_deviceUnmapFrom(struct Device *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_deviceUnmapFrom(struct Device *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RsResource.offset), pParams); } // deviceGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_deviceGetRefCount(struct Device *pResource) { +NvU32 __nvoc_up_thunk_RsResource_deviceGetRefCount(struct Device *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RsResource.offset)); } // deviceAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_deviceAddAdditionalDependants(struct RsClient *pClient, struct Device *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_deviceAddAdditionalDependants(struct RsClient *pClient, struct Device *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Device_RsResource.offset), pReference); } const struct NVOC_EXPORT_INFO __nvoc_export_info_Device = { - /*numEntries=*/ 63, + /*numEntries=*/ 61, /*pExportEntries=*/ __nvoc_exported_method_def_Device }; @@ -1228,19 +1266,6 @@ static void __nvoc_init_funcTable_Device_1(Device *pThis, RmHalspecOwner *pRmhal PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // deviceControl -- virtual override (res) base (gpures) - pThis->__deviceControl__ = &deviceControl_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresControl__ = &__nvoc_down_thunk_Device_gpuresControl; - - // deviceInternalControlForward -- virtual override (gpures) base (gpures) - pThis->__deviceInternalControlForward__ = &deviceInternalControlForward_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresInternalControlForward__ = &__nvoc_down_thunk_Device_gpuresInternalControlForward; - - // deviceCtrlCmdBifGetDmaBaseSysmemAddr -- exported (id=0x800103) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) - pThis->__deviceCtrlCmdBifGetDmaBaseSysmemAddr__ = &deviceCtrlCmdBifGetDmaBaseSysmemAddr_IMPL; -#endif - // deviceCtrlCmdBifAspmFeatureSupported -- exported (id=0x800104) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__deviceCtrlCmdBifAspmFeatureSupported__ = &deviceCtrlCmdBifAspmFeatureSupported_IMPL; @@ -1386,11 +1411,6 @@ static void __nvoc_init_funcTable_Device_1(Device *pThis, RmHalspecOwner *pRmhal pThis->__deviceCtrlCmdFifoGetCapsV2__ = &deviceCtrlCmdFifoGetCapsV2_IMPL; #endif - // deviceCtrlCmdFifoStartSelectedChannels -- exported (id=0x801705) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) - pThis->__deviceCtrlCmdFifoStartSelectedChannels__ = &deviceCtrlCmdFifoStartSelectedChannels_IMPL; -#endif - // deviceCtrlCmdFifoGetEngineContextProperties -- halified (2 hals) exported (id=0x801707) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { @@ -1590,82 +1610,218 @@ static void __nvoc_init_funcTable_Device_1(Device *pThis, RmHalspecOwner *pRmhal #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1u) pThis->__deviceCtrlCmdOsUnixVTGetFBInfo__ = &deviceCtrlCmdOsUnixVTGetFBInfo_IMPL; #endif +} // End __nvoc_init_funcTable_Device_1 with approximately 69 basic block(s). - // deviceMap -- virtual inherited (gpures) base (gpures) - pThis->__deviceMap__ = &__nvoc_up_thunk_GpuResource_deviceMap; - - // deviceUnmap -- virtual inherited (gpures) base (gpures) - pThis->__deviceUnmap__ = &__nvoc_up_thunk_GpuResource_deviceUnmap; - - // deviceShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__deviceShareCallback__ = &__nvoc_up_thunk_GpuResource_deviceShareCallback; - - // deviceGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__deviceGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_deviceGetRegBaseOffsetAndSize; - - // deviceGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__deviceGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_deviceGetMapAddrSpace; - - // deviceGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__deviceGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_deviceGetInternalObjectHandle; - - // deviceAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__deviceAccessCallback__ = &__nvoc_up_thunk_RmResource_deviceAccessCallback; - - // deviceGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__deviceGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_deviceGetMemInterMapParams; - - // deviceCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__deviceCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_deviceCheckMemInterUnmap; - // deviceGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__deviceGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_deviceGetMemoryMappingDescriptor; - - // deviceControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__deviceControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_deviceControlSerialization_Prologue; - - // deviceControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__deviceControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_deviceControlSerialization_Epilogue; - - // deviceControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__deviceControl_Prologue__ = &__nvoc_up_thunk_RmResource_deviceControl_Prologue; - - // deviceControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__deviceControl_Epilogue__ = &__nvoc_up_thunk_RmResource_deviceControl_Epilogue; - - // deviceCanCopy -- virtual inherited (res) base (gpures) - pThis->__deviceCanCopy__ = &__nvoc_up_thunk_RsResource_deviceCanCopy; - - // deviceIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__deviceIsDuplicate__ = &__nvoc_up_thunk_RsResource_deviceIsDuplicate; - - // devicePreDestruct -- virtual inherited (res) base (gpures) - pThis->__devicePreDestruct__ = &__nvoc_up_thunk_RsResource_devicePreDestruct; - - // deviceControlFilter -- virtual inherited (res) base (gpures) - pThis->__deviceControlFilter__ = &__nvoc_up_thunk_RsResource_deviceControlFilter; - - // deviceIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__deviceIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_deviceIsPartialUnmapSupported; - - // deviceMapTo -- virtual inherited (res) base (gpures) - pThis->__deviceMapTo__ = &__nvoc_up_thunk_RsResource_deviceMapTo; - - // deviceUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__deviceUnmapFrom__ = &__nvoc_up_thunk_RsResource_deviceUnmapFrom; - - // deviceGetRefCount -- virtual inherited (res) base (gpures) - pThis->__deviceGetRefCount__ = &__nvoc_up_thunk_RsResource_deviceGetRefCount; - - // deviceAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__deviceAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_deviceAddAdditionalDependants; -} // End __nvoc_init_funcTable_Device_1 with approximately 98 basic block(s). - - -// Initialize vtable(s) for 88 virtual method(s). +// Initialize vtable(s) for 86 virtual method(s). void __nvoc_init_funcTable_Device(Device *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 88 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__Device vtable = { + .__deviceControl__ = &deviceControl_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresControl__ = &__nvoc_down_thunk_Device_gpuresControl, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__deviceInternalControlForward__ = &deviceInternalControlForward_IMPL, // virtual override (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &__nvoc_down_thunk_Device_gpuresInternalControlForward, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14004u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14004u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c000u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10au) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10au) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x518u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x5u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1u) +#endif + .__deviceMap__ = &__nvoc_up_thunk_GpuResource_deviceMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__deviceUnmap__ = &__nvoc_up_thunk_GpuResource_deviceUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__deviceShareCallback__ = &__nvoc_up_thunk_GpuResource_deviceShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__deviceGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_deviceGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__deviceGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_deviceGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__deviceGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_deviceGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__deviceAccessCallback__ = &__nvoc_up_thunk_RmResource_deviceAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__deviceGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_deviceGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__deviceCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_deviceCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__deviceGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_deviceGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__deviceControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_deviceControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__deviceControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_deviceControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__deviceControl_Prologue__ = &__nvoc_up_thunk_RmResource_deviceControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__deviceControl_Epilogue__ = &__nvoc_up_thunk_RmResource_deviceControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__deviceCanCopy__ = &__nvoc_up_thunk_RsResource_deviceCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__deviceIsDuplicate__ = &__nvoc_up_thunk_RsResource_deviceIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__devicePreDestruct__ = &__nvoc_up_thunk_RsResource_devicePreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__deviceControlFilter__ = &__nvoc_up_thunk_RsResource_deviceControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__deviceIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_deviceIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__deviceMapTo__ = &__nvoc_up_thunk_RsResource_deviceMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__deviceUnmapFrom__ = &__nvoc_up_thunk_RsResource_deviceUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__deviceGetRefCount__ = &__nvoc_up_thunk_RsResource_deviceGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__deviceAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_deviceAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (device) this + + // Initialize vtable(s) with 61 per-object function pointer(s). __nvoc_init_funcTable_Device_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_device_nvoc.h b/src/nvidia/generated/g_device_nvoc.h index fe1c8486ac..5b1cb90406 100644 --- a/src/nvidia/generated/g_device_nvoc.h +++ b/src/nvidia/generated/g_device_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -88,10 +88,15 @@ typedef struct OBJVASPACE OBJVASPACE; #endif +// Metadata including vtable +struct NVOC_VTABLE__Device; + + struct Device { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__Device *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -104,10 +109,7 @@ struct Device { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct Device *__nvoc_pbase_Device; // device - // Vtable with 88 per-object function pointers - NV_STATUS (*__deviceControl__)(struct Device * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (gpures) - NV_STATUS (*__deviceInternalControlForward__)(struct Device * /*this*/, NvU32, void *, NvU32); // virtual override (gpures) base (gpures) - NV_STATUS (*__deviceCtrlCmdBifGetDmaBaseSysmemAddr__)(struct Device * /*this*/, NV0080_CTRL_BIF_GET_DMA_BASE_SYSMEM_ADDR_PARAMS *); // exported (id=0x800103) + // Vtable with 61 per-object function pointers NV_STATUS (*__deviceCtrlCmdBifAspmFeatureSupported__)(struct Device * /*this*/, NV0080_CTRL_BIF_SET_ASPM_FEATURE_PARAMS *); // exported (id=0x800104) NV_STATUS (*__deviceCtrlCmdBifAspmCyaUpdate__)(struct Device * /*this*/, NV0080_CTRL_BIF_ASPM_CYA_UPDATE_PARAMS *); // exported (id=0x800105) NV_STATUS (*__deviceCtrlCmdBifGetPciePowerControlMask__)(struct Device * /*this*/, NV0080_CTRL_CMD_BIF_GET_PCIE_POWER_CONTROL_MASK_PARAMS *); // exported (id=0x800106) @@ -136,7 +138,6 @@ struct Device { NV_STATUS (*__deviceCtrlCmdSetDefaultVidmemPhysicality__)(struct Device * /*this*/, NV0080_CTRL_FB_SET_DEFAULT_VIDMEM_PHYSICALITY_PARAMS *); // exported (id=0x801308) NV_STATUS (*__deviceCtrlCmdFifoGetCaps__)(struct Device * /*this*/, NV0080_CTRL_FIFO_GET_CAPS_PARAMS *); // exported (id=0x801701) NV_STATUS (*__deviceCtrlCmdFifoGetCapsV2__)(struct Device * /*this*/, NV0080_CTRL_FIFO_GET_CAPS_V2_PARAMS *); // exported (id=0x801713) - NV_STATUS (*__deviceCtrlCmdFifoStartSelectedChannels__)(struct Device * /*this*/, NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS *); // exported (id=0x801705) NV_STATUS (*__deviceCtrlCmdFifoGetEngineContextProperties__)(struct Device * /*this*/, NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS *); // halified (2 hals) exported (id=0x801707) body NV_STATUS (*__deviceCtrlCmdFifoStopRunlist__)(struct Device * /*this*/, NV0080_CTRL_FIFO_STOP_RUNLIST_PARAMS *); // exported (id=0x801711) NV_STATUS (*__deviceCtrlCmdFifoStartRunlist__)(struct Device * /*this*/, NV0080_CTRL_FIFO_START_RUNLIST_PARAMS *); // exported (id=0x801712) @@ -170,6 +171,36 @@ struct Device { NV_STATUS (*__deviceCtrlCmdNvjpgGetCapsV2__)(struct Device * /*this*/, NV0080_CTRL_NVJPG_GET_CAPS_V2_PARAMS *); // halified (2 hals) exported (id=0x801f02) body NV_STATUS (*__deviceCtrlCmdOsUnixVTSwitch__)(struct Device * /*this*/, NV0080_CTRL_OS_UNIX_VT_SWITCH_PARAMS *); // exported (id=0x801e01) NV_STATUS (*__deviceCtrlCmdOsUnixVTGetFBInfo__)(struct Device * /*this*/, NV0080_CTRL_OS_UNIX_VT_GET_FB_INFO_PARAMS *); // exported (id=0x801e02) + + // Data members + NvU32 deviceInst; + NvU32 PerfReqCnt; + PNODE DevMemoryTable; + NvBool bSliGpuBoostSyncActivate; + NvBool bPerfOptpActive; + NvU32 nPerfOptpRefCnt; + NvU32 nCudaLimitRefCnt; + struct OBJVASPACE *pVASpace; + NvHandle hClientShare; + NvHandle hTargetClient; + NvHandle hTargetDevice; + NvU32 deviceAllocFlags; + NvU32 deviceInternalAllocFlags; + NvU64 vaStartInternal; + NvU64 vaLimitInternal; + NvU64 vaSize; + NvU32 vaMode; + NvU32 defaultVidmemPhysicalityOverride; + struct KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__Device { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + + NV_STATUS (*__deviceControl__)(struct Device * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (gpures) + NV_STATUS (*__deviceInternalControlForward__)(struct Device * /*this*/, NvU32, void *, NvU32); // virtual override (gpures) base (gpures) NV_STATUS (*__deviceMap__)(struct Device * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__deviceUnmap__)(struct Device * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NvBool (*__deviceShareCallback__)(struct Device * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) @@ -193,27 +224,6 @@ struct Device { NV_STATUS (*__deviceUnmapFrom__)(struct Device * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__deviceGetRefCount__)(struct Device * /*this*/); // virtual inherited (res) base (gpures) void (*__deviceAddAdditionalDependants__)(struct RsClient *, struct Device * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - NvU32 deviceInst; - NvU32 PerfReqCnt; - PNODE DevMemoryTable; - NvBool bSliGpuBoostSyncActivate; - NvBool bPerfOptpActive; - NvU32 nPerfOptpRefCnt; - NvU32 nCudaLimitRefCnt; - struct OBJVASPACE *pVASpace; - NvHandle hClientShare; - NvHandle hTargetClient; - NvHandle hTargetDevice; - NvU32 deviceAllocFlags; - NvU32 deviceInternalAllocFlags; - NvU64 vaStartInternal; - NvU64 vaLimitInternal; - NvU64 vaSize; - NvU32 vaMode; - NvU32 defaultVidmemPhysicalityOverride; - struct KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice; }; #ifndef __NVOC_CLASS_Device_TYPEDEF__ @@ -246,12 +256,10 @@ NV_STATUS __nvoc_objCreate_Device(Device**, Dynamic*, NvU32, struct CALL_CONTEXT // Wrapper macros -#define deviceControl_FNPTR(pResource) pResource->__deviceControl__ +#define deviceControl_FNPTR(pResource) pResource->__nvoc_vtable->__deviceControl__ #define deviceControl(pResource, pCallContext, pParams) deviceControl_DISPATCH(pResource, pCallContext, pParams) -#define deviceInternalControlForward_FNPTR(pDevice) pDevice->__deviceInternalControlForward__ +#define deviceInternalControlForward_FNPTR(pDevice) pDevice->__nvoc_vtable->__deviceInternalControlForward__ #define deviceInternalControlForward(pDevice, command, pParams, size) deviceInternalControlForward_DISPATCH(pDevice, command, pParams, size) -#define deviceCtrlCmdBifGetDmaBaseSysmemAddr_FNPTR(pDevice) pDevice->__deviceCtrlCmdBifGetDmaBaseSysmemAddr__ -#define deviceCtrlCmdBifGetDmaBaseSysmemAddr(pDevice, pBifDmaBaseSysmemParams) deviceCtrlCmdBifGetDmaBaseSysmemAddr_DISPATCH(pDevice, pBifDmaBaseSysmemParams) #define deviceCtrlCmdBifAspmFeatureSupported_FNPTR(pDevice) pDevice->__deviceCtrlCmdBifAspmFeatureSupported__ #define deviceCtrlCmdBifAspmFeatureSupported(pDevice, pBifAspmParams) deviceCtrlCmdBifAspmFeatureSupported_DISPATCH(pDevice, pBifAspmParams) #define deviceCtrlCmdBifAspmCyaUpdate_FNPTR(pDevice) pDevice->__deviceCtrlCmdBifAspmCyaUpdate__ @@ -309,8 +317,6 @@ NV_STATUS __nvoc_objCreate_Device(Device**, Dynamic*, NvU32, struct CALL_CONTEXT #define deviceCtrlCmdFifoGetCaps(pDevice, pFifoCapsParams) deviceCtrlCmdFifoGetCaps_DISPATCH(pDevice, pFifoCapsParams) #define deviceCtrlCmdFifoGetCapsV2_FNPTR(pDevice) pDevice->__deviceCtrlCmdFifoGetCapsV2__ #define deviceCtrlCmdFifoGetCapsV2(pDevice, pFifoCapsParams) deviceCtrlCmdFifoGetCapsV2_DISPATCH(pDevice, pFifoCapsParams) -#define deviceCtrlCmdFifoStartSelectedChannels_FNPTR(pDevice) pDevice->__deviceCtrlCmdFifoStartSelectedChannels__ -#define deviceCtrlCmdFifoStartSelectedChannels(pDevice, pStartSel) deviceCtrlCmdFifoStartSelectedChannels_DISPATCH(pDevice, pStartSel) #define deviceCtrlCmdFifoGetEngineContextProperties_FNPTR(pDevice) pDevice->__deviceCtrlCmdFifoGetEngineContextProperties__ #define deviceCtrlCmdFifoGetEngineContextProperties(pDevice, pParams) deviceCtrlCmdFifoGetEngineContextProperties_DISPATCH(pDevice, pParams) #define deviceCtrlCmdFifoGetEngineContextProperties_HAL(pDevice, pParams) deviceCtrlCmdFifoGetEngineContextProperties_DISPATCH(pDevice, pParams) @@ -384,64 +390,60 @@ NV_STATUS __nvoc_objCreate_Device(Device**, Dynamic*, NvU32, struct CALL_CONTEXT #define deviceCtrlCmdOsUnixVTSwitch(pDevice, pParams) deviceCtrlCmdOsUnixVTSwitch_DISPATCH(pDevice, pParams) #define deviceCtrlCmdOsUnixVTGetFBInfo_FNPTR(pDevice) pDevice->__deviceCtrlCmdOsUnixVTGetFBInfo__ #define deviceCtrlCmdOsUnixVTGetFBInfo(pDevice, pParams) deviceCtrlCmdOsUnixVTGetFBInfo_DISPATCH(pDevice, pParams) -#define deviceMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define deviceMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define deviceMap(pGpuResource, pCallContext, pParams, pCpuMapping) deviceMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define deviceUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define deviceUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define deviceUnmap(pGpuResource, pCallContext, pCpuMapping) deviceUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define deviceShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define deviceShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define deviceShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) deviceShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define deviceGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define deviceGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define deviceGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) deviceGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define deviceGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define deviceGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define deviceGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) deviceGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define deviceGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define deviceGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define deviceGetInternalObjectHandle(pGpuResource) deviceGetInternalObjectHandle_DISPATCH(pGpuResource) -#define deviceAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define deviceAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define deviceAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) deviceAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define deviceGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define deviceGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define deviceGetMemInterMapParams(pRmResource, pParams) deviceGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define deviceCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define deviceCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define deviceCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) deviceCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define deviceGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define deviceGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define deviceGetMemoryMappingDescriptor(pRmResource, ppMemDesc) deviceGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define deviceControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define deviceControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define deviceControlSerialization_Prologue(pResource, pCallContext, pParams) deviceControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define deviceControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define deviceControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define deviceControlSerialization_Epilogue(pResource, pCallContext, pParams) deviceControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define deviceControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define deviceControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define deviceControl_Prologue(pResource, pCallContext, pParams) deviceControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define deviceControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define deviceControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define deviceControl_Epilogue(pResource, pCallContext, pParams) deviceControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define deviceCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define deviceCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define deviceCanCopy(pResource) deviceCanCopy_DISPATCH(pResource) -#define deviceIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define deviceIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define deviceIsDuplicate(pResource, hMemory, pDuplicate) deviceIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define devicePreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define devicePreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define devicePreDestruct(pResource) devicePreDestruct_DISPATCH(pResource) -#define deviceControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define deviceControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define deviceControlFilter(pResource, pCallContext, pParams) deviceControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define deviceIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define deviceIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define deviceIsPartialUnmapSupported(pResource) deviceIsPartialUnmapSupported_DISPATCH(pResource) -#define deviceMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define deviceMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define deviceMapTo(pResource, pParams) deviceMapTo_DISPATCH(pResource, pParams) -#define deviceUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define deviceUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define deviceUnmapFrom(pResource, pParams) deviceUnmapFrom_DISPATCH(pResource, pParams) -#define deviceGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define deviceGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define deviceGetRefCount(pResource) deviceGetRefCount_DISPATCH(pResource) -#define deviceAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define deviceAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define deviceAddAdditionalDependants(pClient, pResource, pReference) deviceAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NV_STATUS deviceControl_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__deviceControl__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__deviceControl__(pResource, pCallContext, pParams); } static inline NV_STATUS deviceInternalControlForward_DISPATCH(struct Device *pDevice, NvU32 command, void *pParams, NvU32 size) { - return pDevice->__deviceInternalControlForward__(pDevice, command, pParams, size); -} - -static inline NV_STATUS deviceCtrlCmdBifGetDmaBaseSysmemAddr_DISPATCH(struct Device *pDevice, NV0080_CTRL_BIF_GET_DMA_BASE_SYSMEM_ADDR_PARAMS *pBifDmaBaseSysmemParams) { - return pDevice->__deviceCtrlCmdBifGetDmaBaseSysmemAddr__(pDevice, pBifDmaBaseSysmemParams); + return pDevice->__nvoc_vtable->__deviceInternalControlForward__(pDevice, command, pParams, size); } static inline NV_STATUS deviceCtrlCmdBifAspmFeatureSupported_DISPATCH(struct Device *pDevice, NV0080_CTRL_BIF_SET_ASPM_FEATURE_PARAMS *pBifAspmParams) { @@ -556,10 +558,6 @@ static inline NV_STATUS deviceCtrlCmdFifoGetCapsV2_DISPATCH(struct Device *pDevi return pDevice->__deviceCtrlCmdFifoGetCapsV2__(pDevice, pFifoCapsParams); } -static inline NV_STATUS deviceCtrlCmdFifoStartSelectedChannels_DISPATCH(struct Device *pDevice, NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS *pStartSel) { - return pDevice->__deviceCtrlCmdFifoStartSelectedChannels__(pDevice, pStartSel); -} - static inline NV_STATUS deviceCtrlCmdFifoGetEngineContextProperties_DISPATCH(struct Device *pDevice, NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS *pParams) { return pDevice->__deviceCtrlCmdFifoGetEngineContextProperties__(pDevice, pParams); } @@ -693,103 +691,101 @@ static inline NV_STATUS deviceCtrlCmdOsUnixVTGetFBInfo_DISPATCH(struct Device *p } static inline NV_STATUS deviceMap_DISPATCH(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__deviceMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__deviceMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS deviceUnmap_DISPATCH(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__deviceUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__deviceUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool deviceShareCallback_DISPATCH(struct Device *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__deviceShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__deviceShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS deviceGetRegBaseOffsetAndSize_DISPATCH(struct Device *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__deviceGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__deviceGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS deviceGetMapAddrSpace_DISPATCH(struct Device *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__deviceGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__deviceGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NvHandle deviceGetInternalObjectHandle_DISPATCH(struct Device *pGpuResource) { - return pGpuResource->__deviceGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__deviceGetInternalObjectHandle__(pGpuResource); } static inline NvBool deviceAccessCallback_DISPATCH(struct Device *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__deviceAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__deviceAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS deviceGetMemInterMapParams_DISPATCH(struct Device *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__deviceGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__deviceGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS deviceCheckMemInterUnmap_DISPATCH(struct Device *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__deviceCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__deviceCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS deviceGetMemoryMappingDescriptor_DISPATCH(struct Device *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__deviceGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__deviceGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS deviceControlSerialization_Prologue_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__deviceControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__deviceControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void deviceControlSerialization_Epilogue_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__deviceControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__deviceControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS deviceControl_Prologue_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__deviceControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__deviceControl_Prologue__(pResource, pCallContext, pParams); } static inline void deviceControl_Epilogue_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__deviceControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__deviceControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool deviceCanCopy_DISPATCH(struct Device *pResource) { - return pResource->__deviceCanCopy__(pResource); + return pResource->__nvoc_vtable->__deviceCanCopy__(pResource); } static inline NV_STATUS deviceIsDuplicate_DISPATCH(struct Device *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__deviceIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__deviceIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void devicePreDestruct_DISPATCH(struct Device *pResource) { - pResource->__devicePreDestruct__(pResource); + pResource->__nvoc_vtable->__devicePreDestruct__(pResource); } static inline NV_STATUS deviceControlFilter_DISPATCH(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__deviceControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__deviceControlFilter__(pResource, pCallContext, pParams); } static inline NvBool deviceIsPartialUnmapSupported_DISPATCH(struct Device *pResource) { - return pResource->__deviceIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__deviceIsPartialUnmapSupported__(pResource); } static inline NV_STATUS deviceMapTo_DISPATCH(struct Device *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__deviceMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__deviceMapTo__(pResource, pParams); } static inline NV_STATUS deviceUnmapFrom_DISPATCH(struct Device *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__deviceUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__deviceUnmapFrom__(pResource, pParams); } static inline NvU32 deviceGetRefCount_DISPATCH(struct Device *pResource) { - return pResource->__deviceGetRefCount__(pResource); + return pResource->__nvoc_vtable->__deviceGetRefCount__(pResource); } static inline void deviceAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct Device *pResource, RsResourceRef *pReference) { - pResource->__deviceAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__deviceAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS deviceControl_IMPL(struct Device *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); NV_STATUS deviceInternalControlForward_IMPL(struct Device *pDevice, NvU32 command, void *pParams, NvU32 size); -NV_STATUS deviceCtrlCmdBifGetDmaBaseSysmemAddr_IMPL(struct Device *pDevice, NV0080_CTRL_BIF_GET_DMA_BASE_SYSMEM_ADDR_PARAMS *pBifDmaBaseSysmemParams); - NV_STATUS deviceCtrlCmdBifAspmFeatureSupported_IMPL(struct Device *pDevice, NV0080_CTRL_BIF_SET_ASPM_FEATURE_PARAMS *pBifAspmParams); NV_STATUS deviceCtrlCmdBifAspmCyaUpdate_IMPL(struct Device *pDevice, NV0080_CTRL_BIF_ASPM_CYA_UPDATE_PARAMS *pBifAspmCyaParams); @@ -850,8 +846,6 @@ NV_STATUS deviceCtrlCmdFifoGetCaps_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO NV_STATUS deviceCtrlCmdFifoGetCapsV2_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_GET_CAPS_V2_PARAMS *pFifoCapsParams); -NV_STATUS deviceCtrlCmdFifoStartSelectedChannels_IMPL(struct Device *pDevice, NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS *pStartSel); - NV_STATUS deviceCtrlCmdFifoGetEngineContextProperties_VF(struct Device *pDevice, NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS *pParams); static inline NV_STATUS deviceCtrlCmdFifoGetEngineContextProperties_92bfc3(struct Device *pDevice, NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS *pParams) { diff --git a/src/nvidia/generated/g_disp_capabilities_nvoc.c b/src/nvidia/generated/g_disp_capabilities_nvoc.c index d66f0e33b3..d7232349ed 100644 --- a/src/nvidia/generated/g_disp_capabilities_nvoc.c +++ b/src/nvidia/generated/g_disp_capabilities_nvoc.c @@ -93,133 +93,201 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_DispCapabilities = /*pExportInfo=*/ &__nvoc_export_info_DispCapabilities }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_DispCapabilities_gpuresGetRegBaseOffsetAndSize(struct GpuResource *pDispCapabilities, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this + // 1 down-thunk(s) defined to bridge methods in DispCapabilities from superclasses // dispcapGetRegBaseOffsetAndSize: virtual override (gpures) base (gpures) -static NV_STATUS __nvoc_down_thunk_DispCapabilities_gpuresGetRegBaseOffsetAndSize(struct GpuResource *pDispCapabilities, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_down_thunk_DispCapabilities_gpuresGetRegBaseOffsetAndSize(struct GpuResource *pDispCapabilities, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return dispcapGetRegBaseOffsetAndSize((struct DispCapabilities *)(((unsigned char *) pDispCapabilities) - __nvoc_rtti_DispCapabilities_GpuResource.offset), pGpu, pOffset, pSize); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_dispcapControl(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispcapMap(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispcapUnmap(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_dispcapShareCallback(struct DispCapabilities *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispcapGetMapAddrSpace(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispcapInternalControlForward(struct DispCapabilities *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_dispcapGetInternalObjectHandle(struct DispCapabilities *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_dispcapAccessCallback(struct DispCapabilities *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispcapGetMemInterMapParams(struct DispCapabilities *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispcapCheckMemInterUnmap(struct DispCapabilities *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispcapGetMemoryMappingDescriptor(struct DispCapabilities *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispcapControlSerialization_Prologue(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_dispcapControlSerialization_Epilogue(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispcapControl_Prologue(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_dispcapControl_Epilogue(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_dispcapCanCopy(struct DispCapabilities *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispcapIsDuplicate(struct DispCapabilities *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_dispcapPreDestruct(struct DispCapabilities *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispcapControlFilter(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_dispcapIsPartialUnmapSupported(struct DispCapabilities *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispcapMapTo(struct DispCapabilities *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispcapUnmapFrom(struct DispCapabilities *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_dispcapGetRefCount(struct DispCapabilities *pResource); // this +void __nvoc_up_thunk_RsResource_dispcapAddAdditionalDependants(struct RsClient *pClient, struct DispCapabilities *pResource, RsResourceRef *pReference); // this + // 24 up-thunk(s) defined to bridge methods in DispCapabilities to superclasses // dispcapControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispcapControl(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispcapControl(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispCapabilities_GpuResource.offset), pCallContext, pParams); } // dispcapMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispcapMap(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispcapMap(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispCapabilities_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // dispcapUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispcapUnmap(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispcapUnmap(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispCapabilities_GpuResource.offset), pCallContext, pCpuMapping); } // dispcapShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_dispcapShareCallback(struct DispCapabilities *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_dispcapShareCallback(struct DispCapabilities *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispCapabilities_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // dispcapGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispcapGetMapAddrSpace(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispcapGetMapAddrSpace(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispCapabilities_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // dispcapInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispcapInternalControlForward(struct DispCapabilities *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispcapInternalControlForward(struct DispCapabilities *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispCapabilities_GpuResource.offset), command, pParams, size); } // dispcapGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_dispcapGetInternalObjectHandle(struct DispCapabilities *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_dispcapGetInternalObjectHandle(struct DispCapabilities *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispCapabilities_GpuResource.offset)); } // dispcapAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_dispcapAccessCallback(struct DispCapabilities *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_dispcapAccessCallback(struct DispCapabilities *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // dispcapGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_dispcapGetMemInterMapParams(struct DispCapabilities *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispcapGetMemInterMapParams(struct DispCapabilities *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), pParams); } // dispcapCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_dispcapCheckMemInterUnmap(struct DispCapabilities *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_dispcapCheckMemInterUnmap(struct DispCapabilities *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), bSubdeviceHandleProvided); } // dispcapGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_dispcapGetMemoryMappingDescriptor(struct DispCapabilities *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_dispcapGetMemoryMappingDescriptor(struct DispCapabilities *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), ppMemDesc); } // dispcapControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_dispcapControlSerialization_Prologue(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispcapControlSerialization_Prologue(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), pCallContext, pParams); } // dispcapControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_dispcapControlSerialization_Epilogue(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_dispcapControlSerialization_Epilogue(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), pCallContext, pParams); } // dispcapControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_dispcapControl_Prologue(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispcapControl_Prologue(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), pCallContext, pParams); } // dispcapControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_dispcapControl_Epilogue(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_dispcapControl_Epilogue(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RmResource.offset), pCallContext, pParams); } // dispcapCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_dispcapCanCopy(struct DispCapabilities *pResource) { +NvBool __nvoc_up_thunk_RsResource_dispcapCanCopy(struct DispCapabilities *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset)); } // dispcapIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_dispcapIsDuplicate(struct DispCapabilities *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_dispcapIsDuplicate(struct DispCapabilities *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset), hMemory, pDuplicate); } // dispcapPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_dispcapPreDestruct(struct DispCapabilities *pResource) { +void __nvoc_up_thunk_RsResource_dispcapPreDestruct(struct DispCapabilities *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset)); } // dispcapControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_dispcapControlFilter(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispcapControlFilter(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset), pCallContext, pParams); } // dispcapIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_dispcapIsPartialUnmapSupported(struct DispCapabilities *pResource) { +NvBool __nvoc_up_thunk_RsResource_dispcapIsPartialUnmapSupported(struct DispCapabilities *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset)); } // dispcapMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_dispcapMapTo(struct DispCapabilities *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispcapMapTo(struct DispCapabilities *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset), pParams); } // dispcapUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_dispcapUnmapFrom(struct DispCapabilities *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispcapUnmapFrom(struct DispCapabilities *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset), pParams); } // dispcapGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_dispcapGetRefCount(struct DispCapabilities *pResource) { +NvU32 __nvoc_up_thunk_RsResource_dispcapGetRefCount(struct DispCapabilities *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset)); } // dispcapAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_dispcapAddAdditionalDependants(struct RsClient *pClient, struct DispCapabilities *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_dispcapAddAdditionalDependants(struct RsClient *pClient, struct DispCapabilities *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCapabilities_RsResource.offset), pReference); } @@ -262,89 +330,110 @@ NV_STATUS __nvoc_ctor_DispCapabilities(DispCapabilities *pThis, struct CALL_CONT // Vtable initialization static void __nvoc_init_funcTable_DispCapabilities_1(DispCapabilities *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // dispcapGetRegBaseOffsetAndSize -- virtual override (gpures) base (gpures) - pThis->__dispcapGetRegBaseOffsetAndSize__ = &dispcapGetRegBaseOffsetAndSize_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &__nvoc_down_thunk_DispCapabilities_gpuresGetRegBaseOffsetAndSize; - - // dispcapControl -- virtual inherited (gpures) base (gpures) - pThis->__dispcapControl__ = &__nvoc_up_thunk_GpuResource_dispcapControl; - - // dispcapMap -- virtual inherited (gpures) base (gpures) - pThis->__dispcapMap__ = &__nvoc_up_thunk_GpuResource_dispcapMap; - - // dispcapUnmap -- virtual inherited (gpures) base (gpures) - pThis->__dispcapUnmap__ = &__nvoc_up_thunk_GpuResource_dispcapUnmap; - - // dispcapShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__dispcapShareCallback__ = &__nvoc_up_thunk_GpuResource_dispcapShareCallback; - - // dispcapGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__dispcapGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_dispcapGetMapAddrSpace; - - // dispcapInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__dispcapInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dispcapInternalControlForward; - - // dispcapGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__dispcapGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dispcapGetInternalObjectHandle; - - // dispcapAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__dispcapAccessCallback__ = &__nvoc_up_thunk_RmResource_dispcapAccessCallback; - - // dispcapGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__dispcapGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispcapGetMemInterMapParams; - - // dispcapCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__dispcapCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispcapCheckMemInterUnmap; - - // dispcapGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__dispcapGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispcapGetMemoryMappingDescriptor; - - // dispcapControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__dispcapControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispcapControlSerialization_Prologue; - - // dispcapControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__dispcapControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispcapControlSerialization_Epilogue; - - // dispcapControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__dispcapControl_Prologue__ = &__nvoc_up_thunk_RmResource_dispcapControl_Prologue; - - // dispcapControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__dispcapControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dispcapControl_Epilogue; - - // dispcapCanCopy -- virtual inherited (res) base (gpures) - pThis->__dispcapCanCopy__ = &__nvoc_up_thunk_RsResource_dispcapCanCopy; - - // dispcapIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__dispcapIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispcapIsDuplicate; - - // dispcapPreDestruct -- virtual inherited (res) base (gpures) - pThis->__dispcapPreDestruct__ = &__nvoc_up_thunk_RsResource_dispcapPreDestruct; - - // dispcapControlFilter -- virtual inherited (res) base (gpures) - pThis->__dispcapControlFilter__ = &__nvoc_up_thunk_RsResource_dispcapControlFilter; - - // dispcapIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__dispcapIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispcapIsPartialUnmapSupported; - - // dispcapMapTo -- virtual inherited (res) base (gpures) - pThis->__dispcapMapTo__ = &__nvoc_up_thunk_RsResource_dispcapMapTo; - - // dispcapUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__dispcapUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispcapUnmapFrom; - - // dispcapGetRefCount -- virtual inherited (res) base (gpures) - pThis->__dispcapGetRefCount__ = &__nvoc_up_thunk_RsResource_dispcapGetRefCount; - - // dispcapAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__dispcapAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispcapAddAdditionalDependants; -} // End __nvoc_init_funcTable_DispCapabilities_1 with approximately 26 basic block(s). +} // End __nvoc_init_funcTable_DispCapabilities_1 // Initialize vtable(s) for 25 virtual method(s). void __nvoc_init_funcTable_DispCapabilities(DispCapabilities *pThis) { - // Initialize vtable(s) with 25 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__DispCapabilities vtable = { + .__dispcapGetRegBaseOffsetAndSize__ = &dispcapGetRegBaseOffsetAndSize_IMPL, // virtual override (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &__nvoc_down_thunk_DispCapabilities_gpuresGetRegBaseOffsetAndSize, // virtual + .__dispcapControl__ = &__nvoc_up_thunk_GpuResource_dispcapControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__dispcapMap__ = &__nvoc_up_thunk_GpuResource_dispcapMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__dispcapUnmap__ = &__nvoc_up_thunk_GpuResource_dispcapUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__dispcapShareCallback__ = &__nvoc_up_thunk_GpuResource_dispcapShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__dispcapGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_dispcapGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__dispcapInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dispcapInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__dispcapGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dispcapGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__dispcapAccessCallback__ = &__nvoc_up_thunk_RmResource_dispcapAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__dispcapGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispcapGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__dispcapCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispcapCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__dispcapGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispcapGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__dispcapControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispcapControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__dispcapControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispcapControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__dispcapControl_Prologue__ = &__nvoc_up_thunk_RmResource_dispcapControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__dispcapControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dispcapControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__dispcapCanCopy__ = &__nvoc_up_thunk_RsResource_dispcapCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__dispcapIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispcapIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__dispcapPreDestruct__ = &__nvoc_up_thunk_RsResource_dispcapPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__dispcapControlFilter__ = &__nvoc_up_thunk_RsResource_dispcapControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__dispcapIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispcapIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__dispcapMapTo__ = &__nvoc_up_thunk_RsResource_dispcapMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__dispcapUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispcapUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__dispcapGetRefCount__ = &__nvoc_up_thunk_RsResource_dispcapGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__dispcapAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispcapAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (dispcap) this __nvoc_init_funcTable_DispCapabilities_1(pThis); } diff --git a/src/nvidia/generated/g_disp_capabilities_nvoc.h b/src/nvidia/generated/g_disp_capabilities_nvoc.h index 7dfd925abd..23b4fa5dd7 100644 --- a/src/nvidia/generated/g_disp_capabilities_nvoc.h +++ b/src/nvidia/generated/g_disp_capabilities_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -65,10 +65,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__DispCapabilities; + + struct DispCapabilities { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__DispCapabilities *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -81,7 +86,16 @@ struct DispCapabilities { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct DispCapabilities *__nvoc_pbase_DispCapabilities; // dispcap - // Vtable with 25 per-object function pointers + // Data members + NvU32 ControlOffset; + NvU32 ControlLength; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__DispCapabilities { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + NV_STATUS (*__dispcapGetRegBaseOffsetAndSize__)(struct DispCapabilities * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual override (gpures) base (gpures) NV_STATUS (*__dispcapControl__)(struct DispCapabilities * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__dispcapMap__)(struct DispCapabilities * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -107,10 +121,6 @@ struct DispCapabilities { NV_STATUS (*__dispcapUnmapFrom__)(struct DispCapabilities * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__dispcapGetRefCount__)(struct DispCapabilities * /*this*/); // virtual inherited (res) base (gpures) void (*__dispcapAddAdditionalDependants__)(struct RsClient *, struct DispCapabilities * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - NvU32 ControlOffset; - NvU32 ControlLength; }; #ifndef __NVOC_CLASS_DispCapabilities_TYPEDEF__ @@ -143,156 +153,156 @@ NV_STATUS __nvoc_objCreate_DispCapabilities(DispCapabilities**, Dynamic*, NvU32, // Wrapper macros -#define dispcapGetRegBaseOffsetAndSize_FNPTR(pDispCapabilities) pDispCapabilities->__dispcapGetRegBaseOffsetAndSize__ +#define dispcapGetRegBaseOffsetAndSize_FNPTR(pDispCapabilities) pDispCapabilities->__nvoc_vtable->__dispcapGetRegBaseOffsetAndSize__ #define dispcapGetRegBaseOffsetAndSize(pDispCapabilities, pGpu, pOffset, pSize) dispcapGetRegBaseOffsetAndSize_DISPATCH(pDispCapabilities, pGpu, pOffset, pSize) -#define dispcapControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define dispcapControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define dispcapControl(pGpuResource, pCallContext, pParams) dispcapControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define dispcapMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define dispcapMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define dispcapMap(pGpuResource, pCallContext, pParams, pCpuMapping) dispcapMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define dispcapUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define dispcapUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define dispcapUnmap(pGpuResource, pCallContext, pCpuMapping) dispcapUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define dispcapShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define dispcapShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define dispcapShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) dispcapShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define dispcapGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define dispcapGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define dispcapGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) dispcapGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define dispcapInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define dispcapInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define dispcapInternalControlForward(pGpuResource, command, pParams, size) dispcapInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define dispcapGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define dispcapGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define dispcapGetInternalObjectHandle(pGpuResource) dispcapGetInternalObjectHandle_DISPATCH(pGpuResource) -#define dispcapAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define dispcapAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define dispcapAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispcapAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define dispcapGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define dispcapGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define dispcapGetMemInterMapParams(pRmResource, pParams) dispcapGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define dispcapCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define dispcapCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define dispcapCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispcapCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define dispcapGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define dispcapGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define dispcapGetMemoryMappingDescriptor(pRmResource, ppMemDesc) dispcapGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define dispcapControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define dispcapControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define dispcapControlSerialization_Prologue(pResource, pCallContext, pParams) dispcapControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define dispcapControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define dispcapControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define dispcapControlSerialization_Epilogue(pResource, pCallContext, pParams) dispcapControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define dispcapControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define dispcapControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define dispcapControl_Prologue(pResource, pCallContext, pParams) dispcapControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define dispcapControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define dispcapControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define dispcapControl_Epilogue(pResource, pCallContext, pParams) dispcapControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define dispcapCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define dispcapCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define dispcapCanCopy(pResource) dispcapCanCopy_DISPATCH(pResource) -#define dispcapIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define dispcapIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define dispcapIsDuplicate(pResource, hMemory, pDuplicate) dispcapIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define dispcapPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define dispcapPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define dispcapPreDestruct(pResource) dispcapPreDestruct_DISPATCH(pResource) -#define dispcapControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define dispcapControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define dispcapControlFilter(pResource, pCallContext, pParams) dispcapControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define dispcapIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define dispcapIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define dispcapIsPartialUnmapSupported(pResource) dispcapIsPartialUnmapSupported_DISPATCH(pResource) -#define dispcapMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define dispcapMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define dispcapMapTo(pResource, pParams) dispcapMapTo_DISPATCH(pResource, pParams) -#define dispcapUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define dispcapUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define dispcapUnmapFrom(pResource, pParams) dispcapUnmapFrom_DISPATCH(pResource, pParams) -#define dispcapGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define dispcapGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define dispcapGetRefCount(pResource) dispcapGetRefCount_DISPATCH(pResource) -#define dispcapAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define dispcapAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define dispcapAddAdditionalDependants(pClient, pResource, pReference) dispcapAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NV_STATUS dispcapGetRegBaseOffsetAndSize_DISPATCH(struct DispCapabilities *pDispCapabilities, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pDispCapabilities->__dispcapGetRegBaseOffsetAndSize__(pDispCapabilities, pGpu, pOffset, pSize); + return pDispCapabilities->__nvoc_vtable->__dispcapGetRegBaseOffsetAndSize__(pDispCapabilities, pGpu, pOffset, pSize); } static inline NV_STATUS dispcapControl_DISPATCH(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__dispcapControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__dispcapControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS dispcapMap_DISPATCH(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispcapMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__dispcapMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS dispcapUnmap_DISPATCH(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispcapUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__dispcapUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool dispcapShareCallback_DISPATCH(struct DispCapabilities *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__dispcapShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__dispcapShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS dispcapGetMapAddrSpace_DISPATCH(struct DispCapabilities *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__dispcapGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__dispcapGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS dispcapInternalControlForward_DISPATCH(struct DispCapabilities *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__dispcapInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__dispcapInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle dispcapGetInternalObjectHandle_DISPATCH(struct DispCapabilities *pGpuResource) { - return pGpuResource->__dispcapGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__dispcapGetInternalObjectHandle__(pGpuResource); } static inline NvBool dispcapAccessCallback_DISPATCH(struct DispCapabilities *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__dispcapAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__dispcapAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS dispcapGetMemInterMapParams_DISPATCH(struct DispCapabilities *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__dispcapGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__dispcapGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS dispcapCheckMemInterUnmap_DISPATCH(struct DispCapabilities *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__dispcapCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__dispcapCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS dispcapGetMemoryMappingDescriptor_DISPATCH(struct DispCapabilities *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__dispcapGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__dispcapGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS dispcapControlSerialization_Prologue_DISPATCH(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispcapControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispcapControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void dispcapControlSerialization_Epilogue_DISPATCH(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispcapControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__dispcapControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS dispcapControl_Prologue_DISPATCH(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispcapControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispcapControl_Prologue__(pResource, pCallContext, pParams); } static inline void dispcapControl_Epilogue_DISPATCH(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispcapControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__dispcapControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool dispcapCanCopy_DISPATCH(struct DispCapabilities *pResource) { - return pResource->__dispcapCanCopy__(pResource); + return pResource->__nvoc_vtable->__dispcapCanCopy__(pResource); } static inline NV_STATUS dispcapIsDuplicate_DISPATCH(struct DispCapabilities *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__dispcapIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__dispcapIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void dispcapPreDestruct_DISPATCH(struct DispCapabilities *pResource) { - pResource->__dispcapPreDestruct__(pResource); + pResource->__nvoc_vtable->__dispcapPreDestruct__(pResource); } static inline NV_STATUS dispcapControlFilter_DISPATCH(struct DispCapabilities *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispcapControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispcapControlFilter__(pResource, pCallContext, pParams); } static inline NvBool dispcapIsPartialUnmapSupported_DISPATCH(struct DispCapabilities *pResource) { - return pResource->__dispcapIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__dispcapIsPartialUnmapSupported__(pResource); } static inline NV_STATUS dispcapMapTo_DISPATCH(struct DispCapabilities *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__dispcapMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__dispcapMapTo__(pResource, pParams); } static inline NV_STATUS dispcapUnmapFrom_DISPATCH(struct DispCapabilities *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__dispcapUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__dispcapUnmapFrom__(pResource, pParams); } static inline NvU32 dispcapGetRefCount_DISPATCH(struct DispCapabilities *pResource) { - return pResource->__dispcapGetRefCount__(pResource); + return pResource->__nvoc_vtable->__dispcapGetRefCount__(pResource); } static inline void dispcapAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispCapabilities *pResource, RsResourceRef *pReference) { - pResource->__dispcapAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__dispcapAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS dispcapGetRegBaseOffsetAndSize_IMPL(struct DispCapabilities *pDispCapabilities, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); diff --git a/src/nvidia/generated/g_disp_channel_nvoc.c b/src/nvidia/generated/g_disp_channel_nvoc.c index 0f15407d2b..df4c6d6599 100644 --- a/src/nvidia/generated/g_disp_channel_nvoc.c +++ b/src/nvidia/generated/g_disp_channel_nvoc.c @@ -111,158 +111,236 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_DispChannel = /*pExportInfo=*/ &__nvoc_export_info_DispChannel }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_down_thunk_DispChannel_gpuresGetRegBaseOffsetAndSize(struct GpuResource *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this + // 1 down-thunk(s) defined to bridge methods in DispChannel from superclasses // dispchnGetRegBaseOffsetAndSize: virtual override (gpures) base (gpures) -static NV_STATUS __nvoc_down_thunk_DispChannel_gpuresGetRegBaseOffsetAndSize(struct GpuResource *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_down_thunk_DispChannel_gpuresGetRegBaseOffsetAndSize(struct GpuResource *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return dispchnGetRegBaseOffsetAndSize((struct DispChannel *)(((unsigned char *) pDispChannel) - __nvoc_rtti_DispChannel_GpuResource.offset), pGpu, pOffset, pSize); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnControl(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnMap(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnUnmap(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_dispchnShareCallback(struct DispChannel *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnGetMapAddrSpace(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnInternalControlForward(struct DispChannel *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_dispchnGetInternalObjectHandle(struct DispChannel *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_dispchnAccessCallback(struct DispChannel *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispchnGetMemInterMapParams(struct DispChannel *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispchnCheckMemInterUnmap(struct DispChannel *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispchnGetMemoryMappingDescriptor(struct DispChannel *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispchnControlSerialization_Prologue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_dispchnControlSerialization_Epilogue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispchnControl_Prologue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_dispchnControl_Epilogue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_dispchnCanCopy(struct DispChannel *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispchnIsDuplicate(struct DispChannel *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_dispchnPreDestruct(struct DispChannel *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispchnControlFilter(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_dispchnIsPartialUnmapSupported(struct DispChannel *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispchnMapTo(struct DispChannel *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispchnUnmapFrom(struct DispChannel *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_dispchnGetRefCount(struct DispChannel *pResource); // this +void __nvoc_up_thunk_RsResource_dispchnAddAdditionalDependants(struct RsClient *pClient, struct DispChannel *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispchnGetNotificationListPtr(struct DispChannel *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_dispchnGetNotificationShare(struct DispChannel *pNotifier); // this +void __nvoc_up_thunk_Notifier_dispchnSetNotificationShare(struct DispChannel *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_dispchnUnregisterEvent(struct DispChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_dispchnGetOrAllocNotifShare(struct DispChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 29 up-thunk(s) defined to bridge methods in DispChannel to superclasses // dispchnControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispchnControl(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnControl(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannel_GpuResource.offset), pCallContext, pParams); } // dispchnMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispchnMap(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnMap(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannel_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // dispchnUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispchnUnmap(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnUnmap(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannel_GpuResource.offset), pCallContext, pCpuMapping); } // dispchnShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_dispchnShareCallback(struct DispChannel *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_dispchnShareCallback(struct DispChannel *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannel_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // dispchnGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispchnGetMapAddrSpace(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnGetMapAddrSpace(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannel_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // dispchnInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispchnInternalControlForward(struct DispChannel *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnInternalControlForward(struct DispChannel *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannel_GpuResource.offset), command, pParams, size); } // dispchnGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_dispchnGetInternalObjectHandle(struct DispChannel *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_dispchnGetInternalObjectHandle(struct DispChannel *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannel_GpuResource.offset)); } // dispchnAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_dispchnAccessCallback(struct DispChannel *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_dispchnAccessCallback(struct DispChannel *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // dispchnGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_dispchnGetMemInterMapParams(struct DispChannel *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispchnGetMemInterMapParams(struct DispChannel *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispChannel_RmResource.offset), pParams); } // dispchnCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_dispchnCheckMemInterUnmap(struct DispChannel *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_dispchnCheckMemInterUnmap(struct DispChannel *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispChannel_RmResource.offset), bSubdeviceHandleProvided); } // dispchnGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_dispchnGetMemoryMappingDescriptor(struct DispChannel *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_dispchnGetMemoryMappingDescriptor(struct DispChannel *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispChannel_RmResource.offset), ppMemDesc); } // dispchnControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_dispchnControlSerialization_Prologue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispchnControlSerialization_Prologue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RmResource.offset), pCallContext, pParams); } // dispchnControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_dispchnControlSerialization_Epilogue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_dispchnControlSerialization_Epilogue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RmResource.offset), pCallContext, pParams); } // dispchnControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_dispchnControl_Prologue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispchnControl_Prologue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RmResource.offset), pCallContext, pParams); } // dispchnControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_dispchnControl_Epilogue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_dispchnControl_Epilogue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RmResource.offset), pCallContext, pParams); } // dispchnCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_dispchnCanCopy(struct DispChannel *pResource) { +NvBool __nvoc_up_thunk_RsResource_dispchnCanCopy(struct DispChannel *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RsResource.offset)); } // dispchnIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_dispchnIsDuplicate(struct DispChannel *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_dispchnIsDuplicate(struct DispChannel *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RsResource.offset), hMemory, pDuplicate); } // dispchnPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_dispchnPreDestruct(struct DispChannel *pResource) { +void __nvoc_up_thunk_RsResource_dispchnPreDestruct(struct DispChannel *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RsResource.offset)); } // dispchnControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_dispchnControlFilter(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispchnControlFilter(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RsResource.offset), pCallContext, pParams); } // dispchnIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_dispchnIsPartialUnmapSupported(struct DispChannel *pResource) { +NvBool __nvoc_up_thunk_RsResource_dispchnIsPartialUnmapSupported(struct DispChannel *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RsResource.offset)); } // dispchnMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_dispchnMapTo(struct DispChannel *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispchnMapTo(struct DispChannel *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RsResource.offset), pParams); } // dispchnUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_dispchnUnmapFrom(struct DispChannel *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispchnUnmapFrom(struct DispChannel *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RsResource.offset), pParams); } // dispchnGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_dispchnGetRefCount(struct DispChannel *pResource) { +NvU32 __nvoc_up_thunk_RsResource_dispchnGetRefCount(struct DispChannel *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RsResource.offset)); } // dispchnAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_dispchnAddAdditionalDependants(struct RsClient *pClient, struct DispChannel *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_dispchnAddAdditionalDependants(struct RsClient *pClient, struct DispChannel *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannel_RsResource.offset), pReference); } // dispchnGetNotificationListPtr: virtual inherited (notify) base (notify) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispchnGetNotificationListPtr(struct DispChannel *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispchnGetNotificationListPtr(struct DispChannel *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannel_Notifier.offset)); } // dispchnGetNotificationShare: virtual inherited (notify) base (notify) -static struct NotifShare * __nvoc_up_thunk_Notifier_dispchnGetNotificationShare(struct DispChannel *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_dispchnGetNotificationShare(struct DispChannel *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannel_Notifier.offset)); } // dispchnSetNotificationShare: virtual inherited (notify) base (notify) -static void __nvoc_up_thunk_Notifier_dispchnSetNotificationShare(struct DispChannel *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_dispchnSetNotificationShare(struct DispChannel *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannel_Notifier.offset), pNotifShare); } // dispchnUnregisterEvent: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_dispchnUnregisterEvent(struct DispChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_dispchnUnregisterEvent(struct DispChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannel_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // dispchnGetOrAllocNotifShare: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_dispchnGetOrAllocNotifShare(struct DispChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_dispchnGetOrAllocNotifShare(struct DispChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannel_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -313,104 +391,127 @@ NV_STATUS __nvoc_ctor_DispChannel(DispChannel *pThis, struct CALL_CONTEXT * arg_ // Vtable initialization static void __nvoc_init_funcTable_DispChannel_1(DispChannel *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // dispchnGetRegBaseOffsetAndSize -- virtual override (gpures) base (gpures) - pThis->__dispchnGetRegBaseOffsetAndSize__ = &dispchnGetRegBaseOffsetAndSize_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &__nvoc_down_thunk_DispChannel_gpuresGetRegBaseOffsetAndSize; - - // dispchnControl -- virtual inherited (gpures) base (gpures) - pThis->__dispchnControl__ = &__nvoc_up_thunk_GpuResource_dispchnControl; - - // dispchnMap -- virtual inherited (gpures) base (gpures) - pThis->__dispchnMap__ = &__nvoc_up_thunk_GpuResource_dispchnMap; - - // dispchnUnmap -- virtual inherited (gpures) base (gpures) - pThis->__dispchnUnmap__ = &__nvoc_up_thunk_GpuResource_dispchnUnmap; - - // dispchnShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__dispchnShareCallback__ = &__nvoc_up_thunk_GpuResource_dispchnShareCallback; - - // dispchnGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__dispchnGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_dispchnGetMapAddrSpace; - - // dispchnInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__dispchnInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dispchnInternalControlForward; - - // dispchnGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__dispchnGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dispchnGetInternalObjectHandle; - - // dispchnAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__dispchnAccessCallback__ = &__nvoc_up_thunk_RmResource_dispchnAccessCallback; - - // dispchnGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__dispchnGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispchnGetMemInterMapParams; - - // dispchnCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__dispchnCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispchnCheckMemInterUnmap; - - // dispchnGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__dispchnGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispchnGetMemoryMappingDescriptor; - - // dispchnControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__dispchnControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispchnControlSerialization_Prologue; - - // dispchnControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__dispchnControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispchnControlSerialization_Epilogue; - - // dispchnControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__dispchnControl_Prologue__ = &__nvoc_up_thunk_RmResource_dispchnControl_Prologue; - - // dispchnControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__dispchnControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dispchnControl_Epilogue; - - // dispchnCanCopy -- virtual inherited (res) base (gpures) - pThis->__dispchnCanCopy__ = &__nvoc_up_thunk_RsResource_dispchnCanCopy; - - // dispchnIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__dispchnIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispchnIsDuplicate; - - // dispchnPreDestruct -- virtual inherited (res) base (gpures) - pThis->__dispchnPreDestruct__ = &__nvoc_up_thunk_RsResource_dispchnPreDestruct; - - // dispchnControlFilter -- virtual inherited (res) base (gpures) - pThis->__dispchnControlFilter__ = &__nvoc_up_thunk_RsResource_dispchnControlFilter; - - // dispchnIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__dispchnIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispchnIsPartialUnmapSupported; - - // dispchnMapTo -- virtual inherited (res) base (gpures) - pThis->__dispchnMapTo__ = &__nvoc_up_thunk_RsResource_dispchnMapTo; - - // dispchnUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__dispchnUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispchnUnmapFrom; - - // dispchnGetRefCount -- virtual inherited (res) base (gpures) - pThis->__dispchnGetRefCount__ = &__nvoc_up_thunk_RsResource_dispchnGetRefCount; - - // dispchnAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__dispchnAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispchnAddAdditionalDependants; - - // dispchnGetNotificationListPtr -- virtual inherited (notify) base (notify) - pThis->__dispchnGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispchnGetNotificationListPtr; - - // dispchnGetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__dispchnGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispchnGetNotificationShare; - - // dispchnSetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__dispchnSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispchnSetNotificationShare; - - // dispchnUnregisterEvent -- virtual inherited (notify) base (notify) - pThis->__dispchnUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispchnUnregisterEvent; - - // dispchnGetOrAllocNotifShare -- virtual inherited (notify) base (notify) - pThis->__dispchnGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispchnGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_DispChannel_1 with approximately 31 basic block(s). +} // End __nvoc_init_funcTable_DispChannel_1 // Initialize vtable(s) for 30 virtual method(s). void __nvoc_init_funcTable_DispChannel(DispChannel *pThis) { - // Initialize vtable(s) with 30 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__DispChannel vtable = { + .__dispchnGetRegBaseOffsetAndSize__ = &dispchnGetRegBaseOffsetAndSize_IMPL, // virtual override (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &__nvoc_down_thunk_DispChannel_gpuresGetRegBaseOffsetAndSize, // virtual + .__dispchnControl__ = &__nvoc_up_thunk_GpuResource_dispchnControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__dispchnMap__ = &__nvoc_up_thunk_GpuResource_dispchnMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__dispchnUnmap__ = &__nvoc_up_thunk_GpuResource_dispchnUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__dispchnShareCallback__ = &__nvoc_up_thunk_GpuResource_dispchnShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__dispchnGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_dispchnGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__dispchnInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dispchnInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__dispchnGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dispchnGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__dispchnAccessCallback__ = &__nvoc_up_thunk_RmResource_dispchnAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__dispchnGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispchnGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__dispchnCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispchnCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__dispchnGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispchnGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__dispchnControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispchnControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__dispchnControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispchnControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__dispchnControl_Prologue__ = &__nvoc_up_thunk_RmResource_dispchnControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__dispchnControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dispchnControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__dispchnCanCopy__ = &__nvoc_up_thunk_RsResource_dispchnCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__dispchnIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispchnIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__dispchnPreDestruct__ = &__nvoc_up_thunk_RsResource_dispchnPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__dispchnControlFilter__ = &__nvoc_up_thunk_RsResource_dispchnControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__dispchnIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispchnIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__dispchnMapTo__ = &__nvoc_up_thunk_RsResource_dispchnMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__dispchnUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispchnUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__dispchnGetRefCount__ = &__nvoc_up_thunk_RsResource_dispchnGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__dispchnAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispchnAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__dispchnGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispchnGetNotificationListPtr, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__dispchnGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispchnGetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__dispchnSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispchnSetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__dispchnUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispchnUnregisterEvent, // virtual inherited (notify) base (notify) + .Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__dispchnGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispchnGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.Notifier.INotifier; // (inotify) super^2 + pThis->__nvoc_base_Notifier.__nvoc_vtable = &vtable.Notifier; // (notify) super + pThis->__nvoc_vtable = &vtable; // (dispchn) this __nvoc_init_funcTable_DispChannel_1(pThis); } @@ -612,155 +713,263 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_DispChannelPio = /*pExportInfo=*/ &__nvoc_export_info_DispChannelPio }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super^2 +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super^2 +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_DispChannel_gpuresGetRegBaseOffsetAndSize(struct GpuResource *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^3 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^3 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^3 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super^2 +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnControl(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnMap(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnUnmap(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_GpuResource_dispchnShareCallback(struct DispChannel *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnGetMapAddrSpace(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnInternalControlForward(struct DispChannel *pGpuResource, NvU32 command, void *pParams, NvU32 size); // super +NvHandle __nvoc_up_thunk_GpuResource_dispchnGetInternalObjectHandle(struct DispChannel *pGpuResource); // super +NvBool __nvoc_up_thunk_RmResource_dispchnAccessCallback(struct DispChannel *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispchnGetMemInterMapParams(struct DispChannel *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispchnCheckMemInterUnmap(struct DispChannel *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispchnGetMemoryMappingDescriptor(struct DispChannel *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispchnControlSerialization_Prologue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_dispchnControlSerialization_Epilogue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispchnControl_Prologue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_dispchnControl_Epilogue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_dispchnCanCopy(struct DispChannel *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispchnIsDuplicate(struct DispChannel *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_dispchnPreDestruct(struct DispChannel *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispchnControlFilter(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_dispchnIsPartialUnmapSupported(struct DispChannel *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispchnMapTo(struct DispChannel *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispchnUnmapFrom(struct DispChannel *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_dispchnGetRefCount(struct DispChannel *pResource); // super +void __nvoc_up_thunk_RsResource_dispchnAddAdditionalDependants(struct RsClient *pClient, struct DispChannel *pResource, RsResourceRef *pReference); // super +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispchnGetNotificationListPtr(struct DispChannel *pNotifier); // super +struct NotifShare * __nvoc_up_thunk_Notifier_dispchnGetNotificationShare(struct DispChannel *pNotifier); // super +void __nvoc_up_thunk_Notifier_dispchnSetNotificationShare(struct DispChannel *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_up_thunk_Notifier_dispchnUnregisterEvent(struct DispChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_up_thunk_Notifier_dispchnGetOrAllocNotifShare(struct DispChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_up_thunk_DispChannel_dispchnpioGetRegBaseOffsetAndSize(struct DispChannelPio *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnpioControl(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnpioMap(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnpioUnmap(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_dispchnpioShareCallback(struct DispChannelPio *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnpioGetMapAddrSpace(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnpioInternalControlForward(struct DispChannelPio *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_dispchnpioGetInternalObjectHandle(struct DispChannelPio *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_dispchnpioAccessCallback(struct DispChannelPio *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispchnpioGetMemInterMapParams(struct DispChannelPio *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispchnpioCheckMemInterUnmap(struct DispChannelPio *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispchnpioGetMemoryMappingDescriptor(struct DispChannelPio *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispchnpioControlSerialization_Prologue(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_dispchnpioControlSerialization_Epilogue(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispchnpioControl_Prologue(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_dispchnpioControl_Epilogue(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_dispchnpioCanCopy(struct DispChannelPio *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispchnpioIsDuplicate(struct DispChannelPio *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_dispchnpioPreDestruct(struct DispChannelPio *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispchnpioControlFilter(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_dispchnpioIsPartialUnmapSupported(struct DispChannelPio *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispchnpioMapTo(struct DispChannelPio *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispchnpioUnmapFrom(struct DispChannelPio *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_dispchnpioGetRefCount(struct DispChannelPio *pResource); // this +void __nvoc_up_thunk_RsResource_dispchnpioAddAdditionalDependants(struct RsClient *pClient, struct DispChannelPio *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispchnpioGetNotificationListPtr(struct DispChannelPio *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_dispchnpioGetNotificationShare(struct DispChannelPio *pNotifier); // this +void __nvoc_up_thunk_Notifier_dispchnpioSetNotificationShare(struct DispChannelPio *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_dispchnpioUnregisterEvent(struct DispChannelPio *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_dispchnpioGetOrAllocNotifShare(struct DispChannelPio *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 30 up-thunk(s) defined to bridge methods in DispChannelPio to superclasses // dispchnpioGetRegBaseOffsetAndSize: virtual inherited (dispchn) base (dispchn) -static NV_STATUS __nvoc_up_thunk_DispChannel_dispchnpioGetRegBaseOffsetAndSize(struct DispChannelPio *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_DispChannel_dispchnpioGetRegBaseOffsetAndSize(struct DispChannelPio *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return dispchnGetRegBaseOffsetAndSize((struct DispChannel *)(((unsigned char *) pDispChannel) + __nvoc_rtti_DispChannelPio_DispChannel.offset), pGpu, pOffset, pSize); } // dispchnpioControl: virtual inherited (gpures) base (dispchn) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispchnpioControl(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnpioControl(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelPio_GpuResource.offset), pCallContext, pParams); } // dispchnpioMap: virtual inherited (gpures) base (dispchn) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispchnpioMap(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnpioMap(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelPio_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // dispchnpioUnmap: virtual inherited (gpures) base (dispchn) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispchnpioUnmap(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnpioUnmap(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelPio_GpuResource.offset), pCallContext, pCpuMapping); } // dispchnpioShareCallback: virtual inherited (gpures) base (dispchn) -static NvBool __nvoc_up_thunk_GpuResource_dispchnpioShareCallback(struct DispChannelPio *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_dispchnpioShareCallback(struct DispChannelPio *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelPio_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // dispchnpioGetMapAddrSpace: virtual inherited (gpures) base (dispchn) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispchnpioGetMapAddrSpace(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnpioGetMapAddrSpace(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelPio_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // dispchnpioInternalControlForward: virtual inherited (gpures) base (dispchn) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispchnpioInternalControlForward(struct DispChannelPio *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnpioInternalControlForward(struct DispChannelPio *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelPio_GpuResource.offset), command, pParams, size); } // dispchnpioGetInternalObjectHandle: virtual inherited (gpures) base (dispchn) -static NvHandle __nvoc_up_thunk_GpuResource_dispchnpioGetInternalObjectHandle(struct DispChannelPio *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_dispchnpioGetInternalObjectHandle(struct DispChannelPio *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelPio_GpuResource.offset)); } // dispchnpioAccessCallback: virtual inherited (rmres) base (dispchn) -static NvBool __nvoc_up_thunk_RmResource_dispchnpioAccessCallback(struct DispChannelPio *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_dispchnpioAccessCallback(struct DispChannelPio *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // dispchnpioGetMemInterMapParams: virtual inherited (rmres) base (dispchn) -static NV_STATUS __nvoc_up_thunk_RmResource_dispchnpioGetMemInterMapParams(struct DispChannelPio *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispchnpioGetMemInterMapParams(struct DispChannelPio *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), pParams); } // dispchnpioCheckMemInterUnmap: virtual inherited (rmres) base (dispchn) -static NV_STATUS __nvoc_up_thunk_RmResource_dispchnpioCheckMemInterUnmap(struct DispChannelPio *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_dispchnpioCheckMemInterUnmap(struct DispChannelPio *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), bSubdeviceHandleProvided); } // dispchnpioGetMemoryMappingDescriptor: virtual inherited (rmres) base (dispchn) -static NV_STATUS __nvoc_up_thunk_RmResource_dispchnpioGetMemoryMappingDescriptor(struct DispChannelPio *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_dispchnpioGetMemoryMappingDescriptor(struct DispChannelPio *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), ppMemDesc); } // dispchnpioControlSerialization_Prologue: virtual inherited (rmres) base (dispchn) -static NV_STATUS __nvoc_up_thunk_RmResource_dispchnpioControlSerialization_Prologue(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispchnpioControlSerialization_Prologue(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), pCallContext, pParams); } // dispchnpioControlSerialization_Epilogue: virtual inherited (rmres) base (dispchn) -static void __nvoc_up_thunk_RmResource_dispchnpioControlSerialization_Epilogue(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_dispchnpioControlSerialization_Epilogue(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), pCallContext, pParams); } // dispchnpioControl_Prologue: virtual inherited (rmres) base (dispchn) -static NV_STATUS __nvoc_up_thunk_RmResource_dispchnpioControl_Prologue(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispchnpioControl_Prologue(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), pCallContext, pParams); } // dispchnpioControl_Epilogue: virtual inherited (rmres) base (dispchn) -static void __nvoc_up_thunk_RmResource_dispchnpioControl_Epilogue(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_dispchnpioControl_Epilogue(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RmResource.offset), pCallContext, pParams); } // dispchnpioCanCopy: virtual inherited (res) base (dispchn) -static NvBool __nvoc_up_thunk_RsResource_dispchnpioCanCopy(struct DispChannelPio *pResource) { +NvBool __nvoc_up_thunk_RsResource_dispchnpioCanCopy(struct DispChannelPio *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset)); } // dispchnpioIsDuplicate: virtual inherited (res) base (dispchn) -static NV_STATUS __nvoc_up_thunk_RsResource_dispchnpioIsDuplicate(struct DispChannelPio *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_dispchnpioIsDuplicate(struct DispChannelPio *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset), hMemory, pDuplicate); } // dispchnpioPreDestruct: virtual inherited (res) base (dispchn) -static void __nvoc_up_thunk_RsResource_dispchnpioPreDestruct(struct DispChannelPio *pResource) { +void __nvoc_up_thunk_RsResource_dispchnpioPreDestruct(struct DispChannelPio *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset)); } // dispchnpioControlFilter: virtual inherited (res) base (dispchn) -static NV_STATUS __nvoc_up_thunk_RsResource_dispchnpioControlFilter(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispchnpioControlFilter(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset), pCallContext, pParams); } // dispchnpioIsPartialUnmapSupported: inline virtual inherited (res) base (dispchn) body -static NvBool __nvoc_up_thunk_RsResource_dispchnpioIsPartialUnmapSupported(struct DispChannelPio *pResource) { +NvBool __nvoc_up_thunk_RsResource_dispchnpioIsPartialUnmapSupported(struct DispChannelPio *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset)); } // dispchnpioMapTo: virtual inherited (res) base (dispchn) -static NV_STATUS __nvoc_up_thunk_RsResource_dispchnpioMapTo(struct DispChannelPio *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispchnpioMapTo(struct DispChannelPio *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset), pParams); } // dispchnpioUnmapFrom: virtual inherited (res) base (dispchn) -static NV_STATUS __nvoc_up_thunk_RsResource_dispchnpioUnmapFrom(struct DispChannelPio *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispchnpioUnmapFrom(struct DispChannelPio *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset), pParams); } // dispchnpioGetRefCount: virtual inherited (res) base (dispchn) -static NvU32 __nvoc_up_thunk_RsResource_dispchnpioGetRefCount(struct DispChannelPio *pResource) { +NvU32 __nvoc_up_thunk_RsResource_dispchnpioGetRefCount(struct DispChannelPio *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset)); } // dispchnpioAddAdditionalDependants: virtual inherited (res) base (dispchn) -static void __nvoc_up_thunk_RsResource_dispchnpioAddAdditionalDependants(struct RsClient *pClient, struct DispChannelPio *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_dispchnpioAddAdditionalDependants(struct RsClient *pClient, struct DispChannelPio *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelPio_RsResource.offset), pReference); } // dispchnpioGetNotificationListPtr: virtual inherited (notify) base (dispchn) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispchnpioGetNotificationListPtr(struct DispChannelPio *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispchnpioGetNotificationListPtr(struct DispChannelPio *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannelPio_Notifier.offset)); } // dispchnpioGetNotificationShare: virtual inherited (notify) base (dispchn) -static struct NotifShare * __nvoc_up_thunk_Notifier_dispchnpioGetNotificationShare(struct DispChannelPio *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_dispchnpioGetNotificationShare(struct DispChannelPio *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannelPio_Notifier.offset)); } // dispchnpioSetNotificationShare: virtual inherited (notify) base (dispchn) -static void __nvoc_up_thunk_Notifier_dispchnpioSetNotificationShare(struct DispChannelPio *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_dispchnpioSetNotificationShare(struct DispChannelPio *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannelPio_Notifier.offset), pNotifShare); } // dispchnpioUnregisterEvent: virtual inherited (notify) base (dispchn) -static NV_STATUS __nvoc_up_thunk_Notifier_dispchnpioUnregisterEvent(struct DispChannelPio *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_dispchnpioUnregisterEvent(struct DispChannelPio *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannelPio_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // dispchnpioGetOrAllocNotifShare: virtual inherited (notify) base (dispchn) -static NV_STATUS __nvoc_up_thunk_Notifier_dispchnpioGetOrAllocNotifShare(struct DispChannelPio *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_dispchnpioGetOrAllocNotifShare(struct DispChannelPio *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannelPio_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -784,7 +993,7 @@ void __nvoc_init_dataField_DispChannelPio(DispChannelPio *pThis) { NV_STATUS __nvoc_ctor_DispChannel(DispChannel* , struct CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *, NvU32); NV_STATUS __nvoc_ctor_DispChannelPio(DispChannelPio *pThis, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams) { NV_STATUS status = NV_OK; - status = __nvoc_ctor_DispChannel(&pThis->__nvoc_base_DispChannel, arg_pCallContext, arg_pParams, ((NvBool)(0 != 0))); + status = __nvoc_ctor_DispChannel(&pThis->__nvoc_base_DispChannel, arg_pCallContext, arg_pParams, NV_FALSE); if (status != NV_OK) goto __nvoc_ctor_DispChannelPio_fail_DispChannel; __nvoc_init_dataField_DispChannelPio(pThis); @@ -803,103 +1012,158 @@ NV_STATUS __nvoc_ctor_DispChannelPio(DispChannelPio *pThis, struct CALL_CONTEXT // Vtable initialization static void __nvoc_init_funcTable_DispChannelPio_1(DispChannelPio *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // dispchnpioGetRegBaseOffsetAndSize -- virtual inherited (dispchn) base (dispchn) - pThis->__dispchnpioGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_DispChannel_dispchnpioGetRegBaseOffsetAndSize; - - // dispchnpioControl -- virtual inherited (gpures) base (dispchn) - pThis->__dispchnpioControl__ = &__nvoc_up_thunk_GpuResource_dispchnpioControl; - - // dispchnpioMap -- virtual inherited (gpures) base (dispchn) - pThis->__dispchnpioMap__ = &__nvoc_up_thunk_GpuResource_dispchnpioMap; - - // dispchnpioUnmap -- virtual inherited (gpures) base (dispchn) - pThis->__dispchnpioUnmap__ = &__nvoc_up_thunk_GpuResource_dispchnpioUnmap; - - // dispchnpioShareCallback -- virtual inherited (gpures) base (dispchn) - pThis->__dispchnpioShareCallback__ = &__nvoc_up_thunk_GpuResource_dispchnpioShareCallback; - - // dispchnpioGetMapAddrSpace -- virtual inherited (gpures) base (dispchn) - pThis->__dispchnpioGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_dispchnpioGetMapAddrSpace; - - // dispchnpioInternalControlForward -- virtual inherited (gpures) base (dispchn) - pThis->__dispchnpioInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dispchnpioInternalControlForward; - - // dispchnpioGetInternalObjectHandle -- virtual inherited (gpures) base (dispchn) - pThis->__dispchnpioGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dispchnpioGetInternalObjectHandle; - - // dispchnpioAccessCallback -- virtual inherited (rmres) base (dispchn) - pThis->__dispchnpioAccessCallback__ = &__nvoc_up_thunk_RmResource_dispchnpioAccessCallback; - - // dispchnpioGetMemInterMapParams -- virtual inherited (rmres) base (dispchn) - pThis->__dispchnpioGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispchnpioGetMemInterMapParams; - - // dispchnpioCheckMemInterUnmap -- virtual inherited (rmres) base (dispchn) - pThis->__dispchnpioCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispchnpioCheckMemInterUnmap; - - // dispchnpioGetMemoryMappingDescriptor -- virtual inherited (rmres) base (dispchn) - pThis->__dispchnpioGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispchnpioGetMemoryMappingDescriptor; - - // dispchnpioControlSerialization_Prologue -- virtual inherited (rmres) base (dispchn) - pThis->__dispchnpioControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispchnpioControlSerialization_Prologue; - - // dispchnpioControlSerialization_Epilogue -- virtual inherited (rmres) base (dispchn) - pThis->__dispchnpioControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispchnpioControlSerialization_Epilogue; - - // dispchnpioControl_Prologue -- virtual inherited (rmres) base (dispchn) - pThis->__dispchnpioControl_Prologue__ = &__nvoc_up_thunk_RmResource_dispchnpioControl_Prologue; - - // dispchnpioControl_Epilogue -- virtual inherited (rmres) base (dispchn) - pThis->__dispchnpioControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dispchnpioControl_Epilogue; - - // dispchnpioCanCopy -- virtual inherited (res) base (dispchn) - pThis->__dispchnpioCanCopy__ = &__nvoc_up_thunk_RsResource_dispchnpioCanCopy; - - // dispchnpioIsDuplicate -- virtual inherited (res) base (dispchn) - pThis->__dispchnpioIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispchnpioIsDuplicate; - - // dispchnpioPreDestruct -- virtual inherited (res) base (dispchn) - pThis->__dispchnpioPreDestruct__ = &__nvoc_up_thunk_RsResource_dispchnpioPreDestruct; - - // dispchnpioControlFilter -- virtual inherited (res) base (dispchn) - pThis->__dispchnpioControlFilter__ = &__nvoc_up_thunk_RsResource_dispchnpioControlFilter; - - // dispchnpioIsPartialUnmapSupported -- inline virtual inherited (res) base (dispchn) body - pThis->__dispchnpioIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispchnpioIsPartialUnmapSupported; - - // dispchnpioMapTo -- virtual inherited (res) base (dispchn) - pThis->__dispchnpioMapTo__ = &__nvoc_up_thunk_RsResource_dispchnpioMapTo; - - // dispchnpioUnmapFrom -- virtual inherited (res) base (dispchn) - pThis->__dispchnpioUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispchnpioUnmapFrom; - - // dispchnpioGetRefCount -- virtual inherited (res) base (dispchn) - pThis->__dispchnpioGetRefCount__ = &__nvoc_up_thunk_RsResource_dispchnpioGetRefCount; - - // dispchnpioAddAdditionalDependants -- virtual inherited (res) base (dispchn) - pThis->__dispchnpioAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispchnpioAddAdditionalDependants; - - // dispchnpioGetNotificationListPtr -- virtual inherited (notify) base (dispchn) - pThis->__dispchnpioGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispchnpioGetNotificationListPtr; - - // dispchnpioGetNotificationShare -- virtual inherited (notify) base (dispchn) - pThis->__dispchnpioGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispchnpioGetNotificationShare; - - // dispchnpioSetNotificationShare -- virtual inherited (notify) base (dispchn) - pThis->__dispchnpioSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispchnpioSetNotificationShare; - - // dispchnpioUnregisterEvent -- virtual inherited (notify) base (dispchn) - pThis->__dispchnpioUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispchnpioUnregisterEvent; - - // dispchnpioGetOrAllocNotifShare -- virtual inherited (notify) base (dispchn) - pThis->__dispchnpioGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispchnpioGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_DispChannelPio_1 with approximately 30 basic block(s). +} // End __nvoc_init_funcTable_DispChannelPio_1 // Initialize vtable(s) for 30 virtual method(s). void __nvoc_init_funcTable_DispChannelPio(DispChannelPio *pThis) { - // Initialize vtable(s) with 30 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__DispChannelPio vtable = { + .__dispchnpioGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_DispChannel_dispchnpioGetRegBaseOffsetAndSize, // virtual inherited (dispchn) base (dispchn) + .DispChannel.__dispchnGetRegBaseOffsetAndSize__ = &dispchnGetRegBaseOffsetAndSize_IMPL, // virtual override (gpures) base (gpures) + .DispChannel.GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &__nvoc_down_thunk_DispChannel_gpuresGetRegBaseOffsetAndSize, // virtual + .__dispchnpioControl__ = &__nvoc_up_thunk_GpuResource_dispchnpioControl, // virtual inherited (gpures) base (dispchn) + .DispChannel.__dispchnControl__ = &__nvoc_up_thunk_GpuResource_dispchnControl, // virtual inherited (gpures) base (gpures) + .DispChannel.GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__dispchnpioMap__ = &__nvoc_up_thunk_GpuResource_dispchnpioMap, // virtual inherited (gpures) base (dispchn) + .DispChannel.__dispchnMap__ = &__nvoc_up_thunk_GpuResource_dispchnMap, // virtual inherited (gpures) base (gpures) + .DispChannel.GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__dispchnpioUnmap__ = &__nvoc_up_thunk_GpuResource_dispchnpioUnmap, // virtual inherited (gpures) base (dispchn) + .DispChannel.__dispchnUnmap__ = &__nvoc_up_thunk_GpuResource_dispchnUnmap, // virtual inherited (gpures) base (gpures) + .DispChannel.GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__dispchnpioShareCallback__ = &__nvoc_up_thunk_GpuResource_dispchnpioShareCallback, // virtual inherited (gpures) base (dispchn) + .DispChannel.__dispchnShareCallback__ = &__nvoc_up_thunk_GpuResource_dispchnShareCallback, // virtual inherited (gpures) base (gpures) + .DispChannel.GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__dispchnpioGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_dispchnpioGetMapAddrSpace, // virtual inherited (gpures) base (dispchn) + .DispChannel.__dispchnGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_dispchnGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .DispChannel.GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__dispchnpioInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dispchnpioInternalControlForward, // virtual inherited (gpures) base (dispchn) + .DispChannel.__dispchnInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dispchnInternalControlForward, // virtual inherited (gpures) base (gpures) + .DispChannel.GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__dispchnpioGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dispchnpioGetInternalObjectHandle, // virtual inherited (gpures) base (dispchn) + .DispChannel.__dispchnGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dispchnGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .DispChannel.GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__dispchnpioAccessCallback__ = &__nvoc_up_thunk_RmResource_dispchnpioAccessCallback, // virtual inherited (rmres) base (dispchn) + .DispChannel.__dispchnAccessCallback__ = &__nvoc_up_thunk_RmResource_dispchnAccessCallback, // virtual inherited (rmres) base (gpures) + .DispChannel.GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__dispchnpioGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispchnpioGetMemInterMapParams, // virtual inherited (rmres) base (dispchn) + .DispChannel.__dispchnGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispchnGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .DispChannel.GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__dispchnpioCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispchnpioCheckMemInterUnmap, // virtual inherited (rmres) base (dispchn) + .DispChannel.__dispchnCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispchnCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .DispChannel.GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__dispchnpioGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispchnpioGetMemoryMappingDescriptor, // virtual inherited (rmres) base (dispchn) + .DispChannel.__dispchnGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispchnGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .DispChannel.GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__dispchnpioControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispchnpioControlSerialization_Prologue, // virtual inherited (rmres) base (dispchn) + .DispChannel.__dispchnControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispchnControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .DispChannel.GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__dispchnpioControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispchnpioControlSerialization_Epilogue, // virtual inherited (rmres) base (dispchn) + .DispChannel.__dispchnControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispchnControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .DispChannel.GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__dispchnpioControl_Prologue__ = &__nvoc_up_thunk_RmResource_dispchnpioControl_Prologue, // virtual inherited (rmres) base (dispchn) + .DispChannel.__dispchnControl_Prologue__ = &__nvoc_up_thunk_RmResource_dispchnControl_Prologue, // virtual inherited (rmres) base (gpures) + .DispChannel.GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__dispchnpioControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dispchnpioControl_Epilogue, // virtual inherited (rmres) base (dispchn) + .DispChannel.__dispchnControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dispchnControl_Epilogue, // virtual inherited (rmres) base (gpures) + .DispChannel.GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__dispchnpioCanCopy__ = &__nvoc_up_thunk_RsResource_dispchnpioCanCopy, // virtual inherited (res) base (dispchn) + .DispChannel.__dispchnCanCopy__ = &__nvoc_up_thunk_RsResource_dispchnCanCopy, // virtual inherited (res) base (gpures) + .DispChannel.GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__dispchnpioIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispchnpioIsDuplicate, // virtual inherited (res) base (dispchn) + .DispChannel.__dispchnIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispchnIsDuplicate, // virtual inherited (res) base (gpures) + .DispChannel.GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__dispchnpioPreDestruct__ = &__nvoc_up_thunk_RsResource_dispchnpioPreDestruct, // virtual inherited (res) base (dispchn) + .DispChannel.__dispchnPreDestruct__ = &__nvoc_up_thunk_RsResource_dispchnPreDestruct, // virtual inherited (res) base (gpures) + .DispChannel.GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__dispchnpioControlFilter__ = &__nvoc_up_thunk_RsResource_dispchnpioControlFilter, // virtual inherited (res) base (dispchn) + .DispChannel.__dispchnControlFilter__ = &__nvoc_up_thunk_RsResource_dispchnControlFilter, // virtual inherited (res) base (gpures) + .DispChannel.GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__dispchnpioIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispchnpioIsPartialUnmapSupported, // inline virtual inherited (res) base (dispchn) body + .DispChannel.__dispchnIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispchnIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .DispChannel.GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .DispChannel.GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .DispChannel.GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__dispchnpioMapTo__ = &__nvoc_up_thunk_RsResource_dispchnpioMapTo, // virtual inherited (res) base (dispchn) + .DispChannel.__dispchnMapTo__ = &__nvoc_up_thunk_RsResource_dispchnMapTo, // virtual inherited (res) base (gpures) + .DispChannel.GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__dispchnpioUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispchnpioUnmapFrom, // virtual inherited (res) base (dispchn) + .DispChannel.__dispchnUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispchnUnmapFrom, // virtual inherited (res) base (gpures) + .DispChannel.GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__dispchnpioGetRefCount__ = &__nvoc_up_thunk_RsResource_dispchnpioGetRefCount, // virtual inherited (res) base (dispchn) + .DispChannel.__dispchnGetRefCount__ = &__nvoc_up_thunk_RsResource_dispchnGetRefCount, // virtual inherited (res) base (gpures) + .DispChannel.GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__dispchnpioAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispchnpioAddAdditionalDependants, // virtual inherited (res) base (dispchn) + .DispChannel.__dispchnAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispchnAddAdditionalDependants, // virtual inherited (res) base (gpures) + .DispChannel.GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__dispchnpioGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispchnpioGetNotificationListPtr, // virtual inherited (notify) base (dispchn) + .DispChannel.__dispchnGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispchnGetNotificationListPtr, // virtual inherited (notify) base (notify) + .DispChannel.Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .DispChannel.Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__dispchnpioGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispchnpioGetNotificationShare, // virtual inherited (notify) base (dispchn) + .DispChannel.__dispchnGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispchnGetNotificationShare, // virtual inherited (notify) base (notify) + .DispChannel.Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .DispChannel.Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__dispchnpioSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispchnpioSetNotificationShare, // virtual inherited (notify) base (dispchn) + .DispChannel.__dispchnSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispchnSetNotificationShare, // virtual inherited (notify) base (notify) + .DispChannel.Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .DispChannel.Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__dispchnpioUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispchnpioUnregisterEvent, // virtual inherited (notify) base (dispchn) + .DispChannel.__dispchnUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispchnUnregisterEvent, // virtual inherited (notify) base (notify) + .DispChannel.Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .DispChannel.Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__dispchnpioGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispchnpioGetOrAllocNotifShare, // virtual inherited (notify) base (dispchn) + .DispChannel.__dispchnGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispchnGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .DispChannel.Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .DispChannel.Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.DispChannel.GpuResource.RmResource.RsResource; // (res) super^4 + pThis->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.DispChannel.GpuResource.RmResource; // (rmres) super^3 + pThis->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_vtable = &vtable.DispChannel.GpuResource; // (gpures) super^2 + pThis->__nvoc_base_DispChannel.__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.DispChannel.Notifier.INotifier; // (inotify) super^3 + pThis->__nvoc_base_DispChannel.__nvoc_base_Notifier.__nvoc_vtable = &vtable.DispChannel.Notifier; // (notify) super^2 + pThis->__nvoc_base_DispChannel.__nvoc_vtable = &vtable.DispChannel; // (dispchn) super + pThis->__nvoc_vtable = &vtable; // (dispchnpio) this __nvoc_init_funcTable_DispChannelPio_1(pThis); } @@ -1099,155 +1363,263 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_DispChannelDma = /*pExportInfo=*/ &__nvoc_export_info_DispChannelDma }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super^2 +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super^2 +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_DispChannel_gpuresGetRegBaseOffsetAndSize(struct GpuResource *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^3 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^3 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^3 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super^2 +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnControl(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnMap(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnUnmap(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_GpuResource_dispchnShareCallback(struct DispChannel *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnGetMapAddrSpace(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super +NV_STATUS __nvoc_up_thunk_GpuResource_dispchnInternalControlForward(struct DispChannel *pGpuResource, NvU32 command, void *pParams, NvU32 size); // super +NvHandle __nvoc_up_thunk_GpuResource_dispchnGetInternalObjectHandle(struct DispChannel *pGpuResource); // super +NvBool __nvoc_up_thunk_RmResource_dispchnAccessCallback(struct DispChannel *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispchnGetMemInterMapParams(struct DispChannel *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispchnCheckMemInterUnmap(struct DispChannel *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispchnGetMemoryMappingDescriptor(struct DispChannel *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispchnControlSerialization_Prologue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_dispchnControlSerialization_Epilogue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispchnControl_Prologue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_dispchnControl_Epilogue(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_dispchnCanCopy(struct DispChannel *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispchnIsDuplicate(struct DispChannel *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_dispchnPreDestruct(struct DispChannel *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispchnControlFilter(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_dispchnIsPartialUnmapSupported(struct DispChannel *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispchnMapTo(struct DispChannel *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispchnUnmapFrom(struct DispChannel *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_dispchnGetRefCount(struct DispChannel *pResource); // super +void __nvoc_up_thunk_RsResource_dispchnAddAdditionalDependants(struct RsClient *pClient, struct DispChannel *pResource, RsResourceRef *pReference); // super +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispchnGetNotificationListPtr(struct DispChannel *pNotifier); // super +struct NotifShare * __nvoc_up_thunk_Notifier_dispchnGetNotificationShare(struct DispChannel *pNotifier); // super +void __nvoc_up_thunk_Notifier_dispchnSetNotificationShare(struct DispChannel *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_up_thunk_Notifier_dispchnUnregisterEvent(struct DispChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_up_thunk_Notifier_dispchnGetOrAllocNotifShare(struct DispChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_up_thunk_DispChannel_dispchndmaGetRegBaseOffsetAndSize(struct DispChannelDma *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispchndmaControl(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispchndmaMap(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispchndmaUnmap(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_dispchndmaShareCallback(struct DispChannelDma *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispchndmaGetMapAddrSpace(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispchndmaInternalControlForward(struct DispChannelDma *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_dispchndmaGetInternalObjectHandle(struct DispChannelDma *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_dispchndmaAccessCallback(struct DispChannelDma *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispchndmaGetMemInterMapParams(struct DispChannelDma *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispchndmaCheckMemInterUnmap(struct DispChannelDma *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispchndmaGetMemoryMappingDescriptor(struct DispChannelDma *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispchndmaControlSerialization_Prologue(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_dispchndmaControlSerialization_Epilogue(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispchndmaControl_Prologue(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_dispchndmaControl_Epilogue(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_dispchndmaCanCopy(struct DispChannelDma *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispchndmaIsDuplicate(struct DispChannelDma *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_dispchndmaPreDestruct(struct DispChannelDma *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispchndmaControlFilter(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_dispchndmaIsPartialUnmapSupported(struct DispChannelDma *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispchndmaMapTo(struct DispChannelDma *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispchndmaUnmapFrom(struct DispChannelDma *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_dispchndmaGetRefCount(struct DispChannelDma *pResource); // this +void __nvoc_up_thunk_RsResource_dispchndmaAddAdditionalDependants(struct RsClient *pClient, struct DispChannelDma *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispchndmaGetNotificationListPtr(struct DispChannelDma *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_dispchndmaGetNotificationShare(struct DispChannelDma *pNotifier); // this +void __nvoc_up_thunk_Notifier_dispchndmaSetNotificationShare(struct DispChannelDma *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_dispchndmaUnregisterEvent(struct DispChannelDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_dispchndmaGetOrAllocNotifShare(struct DispChannelDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 30 up-thunk(s) defined to bridge methods in DispChannelDma to superclasses // dispchndmaGetRegBaseOffsetAndSize: virtual inherited (dispchn) base (dispchn) -static NV_STATUS __nvoc_up_thunk_DispChannel_dispchndmaGetRegBaseOffsetAndSize(struct DispChannelDma *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_DispChannel_dispchndmaGetRegBaseOffsetAndSize(struct DispChannelDma *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return dispchnGetRegBaseOffsetAndSize((struct DispChannel *)(((unsigned char *) pDispChannel) + __nvoc_rtti_DispChannelDma_DispChannel.offset), pGpu, pOffset, pSize); } // dispchndmaControl: virtual inherited (gpures) base (dispchn) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispchndmaControl(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispchndmaControl(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelDma_GpuResource.offset), pCallContext, pParams); } // dispchndmaMap: virtual inherited (gpures) base (dispchn) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispchndmaMap(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispchndmaMap(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelDma_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // dispchndmaUnmap: virtual inherited (gpures) base (dispchn) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispchndmaUnmap(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispchndmaUnmap(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelDma_GpuResource.offset), pCallContext, pCpuMapping); } // dispchndmaShareCallback: virtual inherited (gpures) base (dispchn) -static NvBool __nvoc_up_thunk_GpuResource_dispchndmaShareCallback(struct DispChannelDma *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_dispchndmaShareCallback(struct DispChannelDma *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelDma_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // dispchndmaGetMapAddrSpace: virtual inherited (gpures) base (dispchn) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispchndmaGetMapAddrSpace(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispchndmaGetMapAddrSpace(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelDma_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // dispchndmaInternalControlForward: virtual inherited (gpures) base (dispchn) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispchndmaInternalControlForward(struct DispChannelDma *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispchndmaInternalControlForward(struct DispChannelDma *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelDma_GpuResource.offset), command, pParams, size); } // dispchndmaGetInternalObjectHandle: virtual inherited (gpures) base (dispchn) -static NvHandle __nvoc_up_thunk_GpuResource_dispchndmaGetInternalObjectHandle(struct DispChannelDma *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_dispchndmaGetInternalObjectHandle(struct DispChannelDma *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispChannelDma_GpuResource.offset)); } // dispchndmaAccessCallback: virtual inherited (rmres) base (dispchn) -static NvBool __nvoc_up_thunk_RmResource_dispchndmaAccessCallback(struct DispChannelDma *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_dispchndmaAccessCallback(struct DispChannelDma *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // dispchndmaGetMemInterMapParams: virtual inherited (rmres) base (dispchn) -static NV_STATUS __nvoc_up_thunk_RmResource_dispchndmaGetMemInterMapParams(struct DispChannelDma *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispchndmaGetMemInterMapParams(struct DispChannelDma *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), pParams); } // dispchndmaCheckMemInterUnmap: virtual inherited (rmres) base (dispchn) -static NV_STATUS __nvoc_up_thunk_RmResource_dispchndmaCheckMemInterUnmap(struct DispChannelDma *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_dispchndmaCheckMemInterUnmap(struct DispChannelDma *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), bSubdeviceHandleProvided); } // dispchndmaGetMemoryMappingDescriptor: virtual inherited (rmres) base (dispchn) -static NV_STATUS __nvoc_up_thunk_RmResource_dispchndmaGetMemoryMappingDescriptor(struct DispChannelDma *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_dispchndmaGetMemoryMappingDescriptor(struct DispChannelDma *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), ppMemDesc); } // dispchndmaControlSerialization_Prologue: virtual inherited (rmres) base (dispchn) -static NV_STATUS __nvoc_up_thunk_RmResource_dispchndmaControlSerialization_Prologue(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispchndmaControlSerialization_Prologue(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), pCallContext, pParams); } // dispchndmaControlSerialization_Epilogue: virtual inherited (rmres) base (dispchn) -static void __nvoc_up_thunk_RmResource_dispchndmaControlSerialization_Epilogue(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_dispchndmaControlSerialization_Epilogue(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), pCallContext, pParams); } // dispchndmaControl_Prologue: virtual inherited (rmres) base (dispchn) -static NV_STATUS __nvoc_up_thunk_RmResource_dispchndmaControl_Prologue(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispchndmaControl_Prologue(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), pCallContext, pParams); } // dispchndmaControl_Epilogue: virtual inherited (rmres) base (dispchn) -static void __nvoc_up_thunk_RmResource_dispchndmaControl_Epilogue(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_dispchndmaControl_Epilogue(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RmResource.offset), pCallContext, pParams); } // dispchndmaCanCopy: virtual inherited (res) base (dispchn) -static NvBool __nvoc_up_thunk_RsResource_dispchndmaCanCopy(struct DispChannelDma *pResource) { +NvBool __nvoc_up_thunk_RsResource_dispchndmaCanCopy(struct DispChannelDma *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset)); } // dispchndmaIsDuplicate: virtual inherited (res) base (dispchn) -static NV_STATUS __nvoc_up_thunk_RsResource_dispchndmaIsDuplicate(struct DispChannelDma *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_dispchndmaIsDuplicate(struct DispChannelDma *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset), hMemory, pDuplicate); } // dispchndmaPreDestruct: virtual inherited (res) base (dispchn) -static void __nvoc_up_thunk_RsResource_dispchndmaPreDestruct(struct DispChannelDma *pResource) { +void __nvoc_up_thunk_RsResource_dispchndmaPreDestruct(struct DispChannelDma *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset)); } // dispchndmaControlFilter: virtual inherited (res) base (dispchn) -static NV_STATUS __nvoc_up_thunk_RsResource_dispchndmaControlFilter(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispchndmaControlFilter(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset), pCallContext, pParams); } // dispchndmaIsPartialUnmapSupported: inline virtual inherited (res) base (dispchn) body -static NvBool __nvoc_up_thunk_RsResource_dispchndmaIsPartialUnmapSupported(struct DispChannelDma *pResource) { +NvBool __nvoc_up_thunk_RsResource_dispchndmaIsPartialUnmapSupported(struct DispChannelDma *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset)); } // dispchndmaMapTo: virtual inherited (res) base (dispchn) -static NV_STATUS __nvoc_up_thunk_RsResource_dispchndmaMapTo(struct DispChannelDma *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispchndmaMapTo(struct DispChannelDma *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset), pParams); } // dispchndmaUnmapFrom: virtual inherited (res) base (dispchn) -static NV_STATUS __nvoc_up_thunk_RsResource_dispchndmaUnmapFrom(struct DispChannelDma *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispchndmaUnmapFrom(struct DispChannelDma *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset), pParams); } // dispchndmaGetRefCount: virtual inherited (res) base (dispchn) -static NvU32 __nvoc_up_thunk_RsResource_dispchndmaGetRefCount(struct DispChannelDma *pResource) { +NvU32 __nvoc_up_thunk_RsResource_dispchndmaGetRefCount(struct DispChannelDma *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset)); } // dispchndmaAddAdditionalDependants: virtual inherited (res) base (dispchn) -static void __nvoc_up_thunk_RsResource_dispchndmaAddAdditionalDependants(struct RsClient *pClient, struct DispChannelDma *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_dispchndmaAddAdditionalDependants(struct RsClient *pClient, struct DispChannelDma *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispChannelDma_RsResource.offset), pReference); } // dispchndmaGetNotificationListPtr: virtual inherited (notify) base (dispchn) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispchndmaGetNotificationListPtr(struct DispChannelDma *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispchndmaGetNotificationListPtr(struct DispChannelDma *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannelDma_Notifier.offset)); } // dispchndmaGetNotificationShare: virtual inherited (notify) base (dispchn) -static struct NotifShare * __nvoc_up_thunk_Notifier_dispchndmaGetNotificationShare(struct DispChannelDma *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_dispchndmaGetNotificationShare(struct DispChannelDma *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannelDma_Notifier.offset)); } // dispchndmaSetNotificationShare: virtual inherited (notify) base (dispchn) -static void __nvoc_up_thunk_Notifier_dispchndmaSetNotificationShare(struct DispChannelDma *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_dispchndmaSetNotificationShare(struct DispChannelDma *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannelDma_Notifier.offset), pNotifShare); } // dispchndmaUnregisterEvent: virtual inherited (notify) base (dispchn) -static NV_STATUS __nvoc_up_thunk_Notifier_dispchndmaUnregisterEvent(struct DispChannelDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_dispchndmaUnregisterEvent(struct DispChannelDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannelDma_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // dispchndmaGetOrAllocNotifShare: virtual inherited (notify) base (dispchn) -static NV_STATUS __nvoc_up_thunk_Notifier_dispchndmaGetOrAllocNotifShare(struct DispChannelDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_dispchndmaGetOrAllocNotifShare(struct DispChannelDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispChannelDma_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -1271,7 +1643,7 @@ void __nvoc_init_dataField_DispChannelDma(DispChannelDma *pThis) { NV_STATUS __nvoc_ctor_DispChannel(DispChannel* , struct CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *, NvU32); NV_STATUS __nvoc_ctor_DispChannelDma(DispChannelDma *pThis, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams) { NV_STATUS status = NV_OK; - status = __nvoc_ctor_DispChannel(&pThis->__nvoc_base_DispChannel, arg_pCallContext, arg_pParams, ((NvBool)(0 == 0))); + status = __nvoc_ctor_DispChannel(&pThis->__nvoc_base_DispChannel, arg_pCallContext, arg_pParams, NV_TRUE); if (status != NV_OK) goto __nvoc_ctor_DispChannelDma_fail_DispChannel; __nvoc_init_dataField_DispChannelDma(pThis); @@ -1290,103 +1662,158 @@ NV_STATUS __nvoc_ctor_DispChannelDma(DispChannelDma *pThis, struct CALL_CONTEXT // Vtable initialization static void __nvoc_init_funcTable_DispChannelDma_1(DispChannelDma *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // dispchndmaGetRegBaseOffsetAndSize -- virtual inherited (dispchn) base (dispchn) - pThis->__dispchndmaGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_DispChannel_dispchndmaGetRegBaseOffsetAndSize; - - // dispchndmaControl -- virtual inherited (gpures) base (dispchn) - pThis->__dispchndmaControl__ = &__nvoc_up_thunk_GpuResource_dispchndmaControl; - - // dispchndmaMap -- virtual inherited (gpures) base (dispchn) - pThis->__dispchndmaMap__ = &__nvoc_up_thunk_GpuResource_dispchndmaMap; - - // dispchndmaUnmap -- virtual inherited (gpures) base (dispchn) - pThis->__dispchndmaUnmap__ = &__nvoc_up_thunk_GpuResource_dispchndmaUnmap; - - // dispchndmaShareCallback -- virtual inherited (gpures) base (dispchn) - pThis->__dispchndmaShareCallback__ = &__nvoc_up_thunk_GpuResource_dispchndmaShareCallback; - - // dispchndmaGetMapAddrSpace -- virtual inherited (gpures) base (dispchn) - pThis->__dispchndmaGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_dispchndmaGetMapAddrSpace; - - // dispchndmaInternalControlForward -- virtual inherited (gpures) base (dispchn) - pThis->__dispchndmaInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dispchndmaInternalControlForward; - - // dispchndmaGetInternalObjectHandle -- virtual inherited (gpures) base (dispchn) - pThis->__dispchndmaGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dispchndmaGetInternalObjectHandle; - - // dispchndmaAccessCallback -- virtual inherited (rmres) base (dispchn) - pThis->__dispchndmaAccessCallback__ = &__nvoc_up_thunk_RmResource_dispchndmaAccessCallback; - - // dispchndmaGetMemInterMapParams -- virtual inherited (rmres) base (dispchn) - pThis->__dispchndmaGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispchndmaGetMemInterMapParams; - - // dispchndmaCheckMemInterUnmap -- virtual inherited (rmres) base (dispchn) - pThis->__dispchndmaCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispchndmaCheckMemInterUnmap; - - // dispchndmaGetMemoryMappingDescriptor -- virtual inherited (rmres) base (dispchn) - pThis->__dispchndmaGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispchndmaGetMemoryMappingDescriptor; - - // dispchndmaControlSerialization_Prologue -- virtual inherited (rmres) base (dispchn) - pThis->__dispchndmaControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispchndmaControlSerialization_Prologue; - - // dispchndmaControlSerialization_Epilogue -- virtual inherited (rmres) base (dispchn) - pThis->__dispchndmaControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispchndmaControlSerialization_Epilogue; - - // dispchndmaControl_Prologue -- virtual inherited (rmres) base (dispchn) - pThis->__dispchndmaControl_Prologue__ = &__nvoc_up_thunk_RmResource_dispchndmaControl_Prologue; - - // dispchndmaControl_Epilogue -- virtual inherited (rmres) base (dispchn) - pThis->__dispchndmaControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dispchndmaControl_Epilogue; - - // dispchndmaCanCopy -- virtual inherited (res) base (dispchn) - pThis->__dispchndmaCanCopy__ = &__nvoc_up_thunk_RsResource_dispchndmaCanCopy; - - // dispchndmaIsDuplicate -- virtual inherited (res) base (dispchn) - pThis->__dispchndmaIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispchndmaIsDuplicate; - - // dispchndmaPreDestruct -- virtual inherited (res) base (dispchn) - pThis->__dispchndmaPreDestruct__ = &__nvoc_up_thunk_RsResource_dispchndmaPreDestruct; - - // dispchndmaControlFilter -- virtual inherited (res) base (dispchn) - pThis->__dispchndmaControlFilter__ = &__nvoc_up_thunk_RsResource_dispchndmaControlFilter; - - // dispchndmaIsPartialUnmapSupported -- inline virtual inherited (res) base (dispchn) body - pThis->__dispchndmaIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispchndmaIsPartialUnmapSupported; - - // dispchndmaMapTo -- virtual inherited (res) base (dispchn) - pThis->__dispchndmaMapTo__ = &__nvoc_up_thunk_RsResource_dispchndmaMapTo; - - // dispchndmaUnmapFrom -- virtual inherited (res) base (dispchn) - pThis->__dispchndmaUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispchndmaUnmapFrom; - - // dispchndmaGetRefCount -- virtual inherited (res) base (dispchn) - pThis->__dispchndmaGetRefCount__ = &__nvoc_up_thunk_RsResource_dispchndmaGetRefCount; - - // dispchndmaAddAdditionalDependants -- virtual inherited (res) base (dispchn) - pThis->__dispchndmaAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispchndmaAddAdditionalDependants; - - // dispchndmaGetNotificationListPtr -- virtual inherited (notify) base (dispchn) - pThis->__dispchndmaGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispchndmaGetNotificationListPtr; - - // dispchndmaGetNotificationShare -- virtual inherited (notify) base (dispchn) - pThis->__dispchndmaGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispchndmaGetNotificationShare; - - // dispchndmaSetNotificationShare -- virtual inherited (notify) base (dispchn) - pThis->__dispchndmaSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispchndmaSetNotificationShare; - - // dispchndmaUnregisterEvent -- virtual inherited (notify) base (dispchn) - pThis->__dispchndmaUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispchndmaUnregisterEvent; - - // dispchndmaGetOrAllocNotifShare -- virtual inherited (notify) base (dispchn) - pThis->__dispchndmaGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispchndmaGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_DispChannelDma_1 with approximately 30 basic block(s). +} // End __nvoc_init_funcTable_DispChannelDma_1 // Initialize vtable(s) for 30 virtual method(s). void __nvoc_init_funcTable_DispChannelDma(DispChannelDma *pThis) { - // Initialize vtable(s) with 30 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__DispChannelDma vtable = { + .__dispchndmaGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_DispChannel_dispchndmaGetRegBaseOffsetAndSize, // virtual inherited (dispchn) base (dispchn) + .DispChannel.__dispchnGetRegBaseOffsetAndSize__ = &dispchnGetRegBaseOffsetAndSize_IMPL, // virtual override (gpures) base (gpures) + .DispChannel.GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &__nvoc_down_thunk_DispChannel_gpuresGetRegBaseOffsetAndSize, // virtual + .__dispchndmaControl__ = &__nvoc_up_thunk_GpuResource_dispchndmaControl, // virtual inherited (gpures) base (dispchn) + .DispChannel.__dispchnControl__ = &__nvoc_up_thunk_GpuResource_dispchnControl, // virtual inherited (gpures) base (gpures) + .DispChannel.GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__dispchndmaMap__ = &__nvoc_up_thunk_GpuResource_dispchndmaMap, // virtual inherited (gpures) base (dispchn) + .DispChannel.__dispchnMap__ = &__nvoc_up_thunk_GpuResource_dispchnMap, // virtual inherited (gpures) base (gpures) + .DispChannel.GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__dispchndmaUnmap__ = &__nvoc_up_thunk_GpuResource_dispchndmaUnmap, // virtual inherited (gpures) base (dispchn) + .DispChannel.__dispchnUnmap__ = &__nvoc_up_thunk_GpuResource_dispchnUnmap, // virtual inherited (gpures) base (gpures) + .DispChannel.GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__dispchndmaShareCallback__ = &__nvoc_up_thunk_GpuResource_dispchndmaShareCallback, // virtual inherited (gpures) base (dispchn) + .DispChannel.__dispchnShareCallback__ = &__nvoc_up_thunk_GpuResource_dispchnShareCallback, // virtual inherited (gpures) base (gpures) + .DispChannel.GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__dispchndmaGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_dispchndmaGetMapAddrSpace, // virtual inherited (gpures) base (dispchn) + .DispChannel.__dispchnGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_dispchnGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .DispChannel.GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__dispchndmaInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dispchndmaInternalControlForward, // virtual inherited (gpures) base (dispchn) + .DispChannel.__dispchnInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dispchnInternalControlForward, // virtual inherited (gpures) base (gpures) + .DispChannel.GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__dispchndmaGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dispchndmaGetInternalObjectHandle, // virtual inherited (gpures) base (dispchn) + .DispChannel.__dispchnGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dispchnGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .DispChannel.GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__dispchndmaAccessCallback__ = &__nvoc_up_thunk_RmResource_dispchndmaAccessCallback, // virtual inherited (rmres) base (dispchn) + .DispChannel.__dispchnAccessCallback__ = &__nvoc_up_thunk_RmResource_dispchnAccessCallback, // virtual inherited (rmres) base (gpures) + .DispChannel.GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__dispchndmaGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispchndmaGetMemInterMapParams, // virtual inherited (rmres) base (dispchn) + .DispChannel.__dispchnGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispchnGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .DispChannel.GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__dispchndmaCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispchndmaCheckMemInterUnmap, // virtual inherited (rmres) base (dispchn) + .DispChannel.__dispchnCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispchnCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .DispChannel.GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__dispchndmaGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispchndmaGetMemoryMappingDescriptor, // virtual inherited (rmres) base (dispchn) + .DispChannel.__dispchnGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispchnGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .DispChannel.GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__dispchndmaControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispchndmaControlSerialization_Prologue, // virtual inherited (rmres) base (dispchn) + .DispChannel.__dispchnControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispchnControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .DispChannel.GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__dispchndmaControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispchndmaControlSerialization_Epilogue, // virtual inherited (rmres) base (dispchn) + .DispChannel.__dispchnControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispchnControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .DispChannel.GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__dispchndmaControl_Prologue__ = &__nvoc_up_thunk_RmResource_dispchndmaControl_Prologue, // virtual inherited (rmres) base (dispchn) + .DispChannel.__dispchnControl_Prologue__ = &__nvoc_up_thunk_RmResource_dispchnControl_Prologue, // virtual inherited (rmres) base (gpures) + .DispChannel.GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__dispchndmaControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dispchndmaControl_Epilogue, // virtual inherited (rmres) base (dispchn) + .DispChannel.__dispchnControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dispchnControl_Epilogue, // virtual inherited (rmres) base (gpures) + .DispChannel.GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__dispchndmaCanCopy__ = &__nvoc_up_thunk_RsResource_dispchndmaCanCopy, // virtual inherited (res) base (dispchn) + .DispChannel.__dispchnCanCopy__ = &__nvoc_up_thunk_RsResource_dispchnCanCopy, // virtual inherited (res) base (gpures) + .DispChannel.GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__dispchndmaIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispchndmaIsDuplicate, // virtual inherited (res) base (dispchn) + .DispChannel.__dispchnIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispchnIsDuplicate, // virtual inherited (res) base (gpures) + .DispChannel.GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__dispchndmaPreDestruct__ = &__nvoc_up_thunk_RsResource_dispchndmaPreDestruct, // virtual inherited (res) base (dispchn) + .DispChannel.__dispchnPreDestruct__ = &__nvoc_up_thunk_RsResource_dispchnPreDestruct, // virtual inherited (res) base (gpures) + .DispChannel.GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__dispchndmaControlFilter__ = &__nvoc_up_thunk_RsResource_dispchndmaControlFilter, // virtual inherited (res) base (dispchn) + .DispChannel.__dispchnControlFilter__ = &__nvoc_up_thunk_RsResource_dispchnControlFilter, // virtual inherited (res) base (gpures) + .DispChannel.GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__dispchndmaIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispchndmaIsPartialUnmapSupported, // inline virtual inherited (res) base (dispchn) body + .DispChannel.__dispchnIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispchnIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .DispChannel.GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .DispChannel.GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .DispChannel.GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__dispchndmaMapTo__ = &__nvoc_up_thunk_RsResource_dispchndmaMapTo, // virtual inherited (res) base (dispchn) + .DispChannel.__dispchnMapTo__ = &__nvoc_up_thunk_RsResource_dispchnMapTo, // virtual inherited (res) base (gpures) + .DispChannel.GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__dispchndmaUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispchndmaUnmapFrom, // virtual inherited (res) base (dispchn) + .DispChannel.__dispchnUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispchnUnmapFrom, // virtual inherited (res) base (gpures) + .DispChannel.GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__dispchndmaGetRefCount__ = &__nvoc_up_thunk_RsResource_dispchndmaGetRefCount, // virtual inherited (res) base (dispchn) + .DispChannel.__dispchnGetRefCount__ = &__nvoc_up_thunk_RsResource_dispchnGetRefCount, // virtual inherited (res) base (gpures) + .DispChannel.GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__dispchndmaAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispchndmaAddAdditionalDependants, // virtual inherited (res) base (dispchn) + .DispChannel.__dispchnAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispchnAddAdditionalDependants, // virtual inherited (res) base (gpures) + .DispChannel.GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .DispChannel.GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .DispChannel.GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__dispchndmaGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispchndmaGetNotificationListPtr, // virtual inherited (notify) base (dispchn) + .DispChannel.__dispchnGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispchnGetNotificationListPtr, // virtual inherited (notify) base (notify) + .DispChannel.Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .DispChannel.Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__dispchndmaGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispchndmaGetNotificationShare, // virtual inherited (notify) base (dispchn) + .DispChannel.__dispchnGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispchnGetNotificationShare, // virtual inherited (notify) base (notify) + .DispChannel.Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .DispChannel.Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__dispchndmaSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispchndmaSetNotificationShare, // virtual inherited (notify) base (dispchn) + .DispChannel.__dispchnSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispchnSetNotificationShare, // virtual inherited (notify) base (notify) + .DispChannel.Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .DispChannel.Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__dispchndmaUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispchndmaUnregisterEvent, // virtual inherited (notify) base (dispchn) + .DispChannel.__dispchnUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispchnUnregisterEvent, // virtual inherited (notify) base (notify) + .DispChannel.Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .DispChannel.Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__dispchndmaGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispchndmaGetOrAllocNotifShare, // virtual inherited (notify) base (dispchn) + .DispChannel.__dispchnGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispchnGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .DispChannel.Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .DispChannel.Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.DispChannel.GpuResource.RmResource.RsResource; // (res) super^4 + pThis->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.DispChannel.GpuResource.RmResource; // (rmres) super^3 + pThis->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_vtable = &vtable.DispChannel.GpuResource; // (gpures) super^2 + pThis->__nvoc_base_DispChannel.__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.DispChannel.Notifier.INotifier; // (inotify) super^3 + pThis->__nvoc_base_DispChannel.__nvoc_base_Notifier.__nvoc_vtable = &vtable.DispChannel.Notifier; // (notify) super^2 + pThis->__nvoc_base_DispChannel.__nvoc_vtable = &vtable.DispChannel; // (dispchn) super + pThis->__nvoc_vtable = &vtable; // (dispchndma) this __nvoc_init_funcTable_DispChannelDma_1(pThis); } diff --git a/src/nvidia/generated/g_disp_channel_nvoc.h b/src/nvidia/generated/g_disp_channel_nvoc.h index 9ddf23adcb..c477091f3a 100644 --- a/src/nvidia/generated/g_disp_channel_nvoc.h +++ b/src/nvidia/generated/g_disp_channel_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -93,10 +93,15 @@ typedef struct DispObject DispObject; #endif +// Metadata including vtable +struct NVOC_VTABLE__DispChannel; + + struct DispChannel { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__DispChannel *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -112,7 +117,23 @@ struct DispChannel { struct Notifier *__nvoc_pbase_Notifier; // notify super struct DispChannel *__nvoc_pbase_DispChannel; // dispchn - // Vtable with 30 per-object function pointers + // Data members + struct DispObject *pDispObject; + NvU32 DispClass; + NvU32 InstanceNumber; + NvP64 pControl; + NvP64 pPriv; + NvU32 ControlOffset; + NvU32 ControlLength; + NvBool bIsDma; +}; + + +// Metadata including vtable with 30 function pointers plus superclass metadata +struct NVOC_VTABLE__DispChannel { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + const struct NVOC_VTABLE__Notifier Notifier; // (notify) 5 function pointers + NV_STATUS (*__dispchnGetRegBaseOffsetAndSize__)(struct DispChannel * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual override (gpures) base (gpures) NV_STATUS (*__dispchnControl__)(struct DispChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__dispchnMap__)(struct DispChannel * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -143,16 +164,6 @@ struct DispChannel { void (*__dispchnSetNotificationShare__)(struct DispChannel * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) NV_STATUS (*__dispchnUnregisterEvent__)(struct DispChannel * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) NV_STATUS (*__dispchnGetOrAllocNotifShare__)(struct DispChannel * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) - - // Data members - struct DispObject *pDispObject; - NvU32 DispClass; - NvU32 InstanceNumber; - NvP64 pControl; - NvP64 pPriv; - NvU32 ControlOffset; - NvU32 ControlLength; - NvBool bIsDma; }; #ifndef __NVOC_CLASS_DispChannel_TYPEDEF__ @@ -185,186 +196,186 @@ NV_STATUS __nvoc_objCreate_DispChannel(DispChannel**, Dynamic*, NvU32, struct CA // Wrapper macros -#define dispchnGetRegBaseOffsetAndSize_FNPTR(pDispChannel) pDispChannel->__dispchnGetRegBaseOffsetAndSize__ +#define dispchnGetRegBaseOffsetAndSize_FNPTR(pDispChannel) pDispChannel->__nvoc_vtable->__dispchnGetRegBaseOffsetAndSize__ #define dispchnGetRegBaseOffsetAndSize(pDispChannel, pGpu, pOffset, pSize) dispchnGetRegBaseOffsetAndSize_DISPATCH(pDispChannel, pGpu, pOffset, pSize) -#define dispchnControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define dispchnControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define dispchnControl(pGpuResource, pCallContext, pParams) dispchnControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define dispchnMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define dispchnMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define dispchnMap(pGpuResource, pCallContext, pParams, pCpuMapping) dispchnMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define dispchnUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define dispchnUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define dispchnUnmap(pGpuResource, pCallContext, pCpuMapping) dispchnUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define dispchnShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define dispchnShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define dispchnShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) dispchnShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define dispchnGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define dispchnGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define dispchnGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) dispchnGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define dispchnInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define dispchnInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define dispchnInternalControlForward(pGpuResource, command, pParams, size) dispchnInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define dispchnGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define dispchnGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define dispchnGetInternalObjectHandle(pGpuResource) dispchnGetInternalObjectHandle_DISPATCH(pGpuResource) -#define dispchnAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define dispchnAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define dispchnAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispchnAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define dispchnGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define dispchnGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define dispchnGetMemInterMapParams(pRmResource, pParams) dispchnGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define dispchnCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define dispchnCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define dispchnCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispchnCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define dispchnGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define dispchnGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define dispchnGetMemoryMappingDescriptor(pRmResource, ppMemDesc) dispchnGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define dispchnControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define dispchnControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define dispchnControlSerialization_Prologue(pResource, pCallContext, pParams) dispchnControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define dispchnControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define dispchnControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define dispchnControlSerialization_Epilogue(pResource, pCallContext, pParams) dispchnControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define dispchnControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define dispchnControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define dispchnControl_Prologue(pResource, pCallContext, pParams) dispchnControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define dispchnControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define dispchnControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define dispchnControl_Epilogue(pResource, pCallContext, pParams) dispchnControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define dispchnCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define dispchnCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define dispchnCanCopy(pResource) dispchnCanCopy_DISPATCH(pResource) -#define dispchnIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define dispchnIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define dispchnIsDuplicate(pResource, hMemory, pDuplicate) dispchnIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define dispchnPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define dispchnPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define dispchnPreDestruct(pResource) dispchnPreDestruct_DISPATCH(pResource) -#define dispchnControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define dispchnControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define dispchnControlFilter(pResource, pCallContext, pParams) dispchnControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define dispchnIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define dispchnIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define dispchnIsPartialUnmapSupported(pResource) dispchnIsPartialUnmapSupported_DISPATCH(pResource) -#define dispchnMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define dispchnMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define dispchnMapTo(pResource, pParams) dispchnMapTo_DISPATCH(pResource, pParams) -#define dispchnUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define dispchnUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define dispchnUnmapFrom(pResource, pParams) dispchnUnmapFrom_DISPATCH(pResource, pParams) -#define dispchnGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define dispchnGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define dispchnGetRefCount(pResource) dispchnGetRefCount_DISPATCH(pResource) -#define dispchnAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define dispchnAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define dispchnAddAdditionalDependants(pClient, pResource, pReference) dispchnAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define dispchnGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define dispchnGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define dispchnGetNotificationListPtr(pNotifier) dispchnGetNotificationListPtr_DISPATCH(pNotifier) -#define dispchnGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define dispchnGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define dispchnGetNotificationShare(pNotifier) dispchnGetNotificationShare_DISPATCH(pNotifier) -#define dispchnSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define dispchnSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define dispchnSetNotificationShare(pNotifier, pNotifShare) dispchnSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define dispchnUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define dispchnUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define dispchnUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispchnUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define dispchnGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define dispchnGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define dispchnGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) dispchnGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS dispchnGetRegBaseOffsetAndSize_DISPATCH(struct DispChannel *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pDispChannel->__dispchnGetRegBaseOffsetAndSize__(pDispChannel, pGpu, pOffset, pSize); + return pDispChannel->__nvoc_vtable->__dispchnGetRegBaseOffsetAndSize__(pDispChannel, pGpu, pOffset, pSize); } static inline NV_STATUS dispchnControl_DISPATCH(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__dispchnControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__dispchnControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS dispchnMap_DISPATCH(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispchnMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__dispchnMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS dispchnUnmap_DISPATCH(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispchnUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__dispchnUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool dispchnShareCallback_DISPATCH(struct DispChannel *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__dispchnShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__dispchnShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS dispchnGetMapAddrSpace_DISPATCH(struct DispChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__dispchnGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__dispchnGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS dispchnInternalControlForward_DISPATCH(struct DispChannel *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__dispchnInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__dispchnInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle dispchnGetInternalObjectHandle_DISPATCH(struct DispChannel *pGpuResource) { - return pGpuResource->__dispchnGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__dispchnGetInternalObjectHandle__(pGpuResource); } static inline NvBool dispchnAccessCallback_DISPATCH(struct DispChannel *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__dispchnAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__dispchnAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS dispchnGetMemInterMapParams_DISPATCH(struct DispChannel *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__dispchnGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__dispchnGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS dispchnCheckMemInterUnmap_DISPATCH(struct DispChannel *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__dispchnCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__dispchnCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS dispchnGetMemoryMappingDescriptor_DISPATCH(struct DispChannel *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__dispchnGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__dispchnGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS dispchnControlSerialization_Prologue_DISPATCH(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispchnControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispchnControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void dispchnControlSerialization_Epilogue_DISPATCH(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispchnControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__dispchnControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS dispchnControl_Prologue_DISPATCH(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispchnControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispchnControl_Prologue__(pResource, pCallContext, pParams); } static inline void dispchnControl_Epilogue_DISPATCH(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispchnControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__dispchnControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool dispchnCanCopy_DISPATCH(struct DispChannel *pResource) { - return pResource->__dispchnCanCopy__(pResource); + return pResource->__nvoc_vtable->__dispchnCanCopy__(pResource); } static inline NV_STATUS dispchnIsDuplicate_DISPATCH(struct DispChannel *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__dispchnIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__dispchnIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void dispchnPreDestruct_DISPATCH(struct DispChannel *pResource) { - pResource->__dispchnPreDestruct__(pResource); + pResource->__nvoc_vtable->__dispchnPreDestruct__(pResource); } static inline NV_STATUS dispchnControlFilter_DISPATCH(struct DispChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispchnControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispchnControlFilter__(pResource, pCallContext, pParams); } static inline NvBool dispchnIsPartialUnmapSupported_DISPATCH(struct DispChannel *pResource) { - return pResource->__dispchnIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__dispchnIsPartialUnmapSupported__(pResource); } static inline NV_STATUS dispchnMapTo_DISPATCH(struct DispChannel *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__dispchnMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__dispchnMapTo__(pResource, pParams); } static inline NV_STATUS dispchnUnmapFrom_DISPATCH(struct DispChannel *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__dispchnUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__dispchnUnmapFrom__(pResource, pParams); } static inline NvU32 dispchnGetRefCount_DISPATCH(struct DispChannel *pResource) { - return pResource->__dispchnGetRefCount__(pResource); + return pResource->__nvoc_vtable->__dispchnGetRefCount__(pResource); } static inline void dispchnAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispChannel *pResource, RsResourceRef *pReference) { - pResource->__dispchnAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__dispchnAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * dispchnGetNotificationListPtr_DISPATCH(struct DispChannel *pNotifier) { - return pNotifier->__dispchnGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__dispchnGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * dispchnGetNotificationShare_DISPATCH(struct DispChannel *pNotifier) { - return pNotifier->__dispchnGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__dispchnGetNotificationShare__(pNotifier); } static inline void dispchnSetNotificationShare_DISPATCH(struct DispChannel *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__dispchnSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__dispchnSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS dispchnUnregisterEvent_DISPATCH(struct DispChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__dispchnUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__dispchnUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS dispchnGetOrAllocNotifShare_DISPATCH(struct DispChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__dispchnGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__dispchnGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS dispchnGetRegBaseOffsetAndSize_IMPL(struct DispChannel *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); @@ -435,10 +446,15 @@ NV_STATUS dispchnGetByHandle_IMPL(struct RsClient *pClient, NvHandle hDisplayCha #endif +// Metadata including vtable +struct NVOC_VTABLE__DispChannelPio; + + struct DispChannelPio { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__DispChannelPio *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct DispChannel __nvoc_base_DispChannel; @@ -453,8 +469,13 @@ struct DispChannelPio { struct Notifier *__nvoc_pbase_Notifier; // notify super^2 struct DispChannel *__nvoc_pbase_DispChannel; // dispchn super struct DispChannelPio *__nvoc_pbase_DispChannelPio; // dispchnpio +}; + + +// Metadata including vtable with 30 function pointers plus superclass metadata +struct NVOC_VTABLE__DispChannelPio { + const struct NVOC_VTABLE__DispChannel DispChannel; // (dispchn) 30 function pointers - // Vtable with 30 per-object function pointers NV_STATUS (*__dispchnpioGetRegBaseOffsetAndSize__)(struct DispChannelPio * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (dispchn) base (dispchn) NV_STATUS (*__dispchnpioControl__)(struct DispChannelPio * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (dispchn) NV_STATUS (*__dispchnpioMap__)(struct DispChannelPio * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (dispchn) @@ -517,186 +538,186 @@ NV_STATUS __nvoc_objCreate_DispChannelPio(DispChannelPio**, Dynamic*, NvU32, str // Wrapper macros -#define dispchnpioGetRegBaseOffsetAndSize_FNPTR(pDispChannel) pDispChannel->__nvoc_base_DispChannel.__dispchnGetRegBaseOffsetAndSize__ +#define dispchnpioGetRegBaseOffsetAndSize_FNPTR(pDispChannel) pDispChannel->__nvoc_base_DispChannel.__nvoc_vtable->__dispchnGetRegBaseOffsetAndSize__ #define dispchnpioGetRegBaseOffsetAndSize(pDispChannel, pGpu, pOffset, pSize) dispchnpioGetRegBaseOffsetAndSize_DISPATCH(pDispChannel, pGpu, pOffset, pSize) -#define dispchnpioControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresControl__ +#define dispchnpioControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define dispchnpioControl(pGpuResource, pCallContext, pParams) dispchnpioControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define dispchnpioMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresMap__ +#define dispchnpioMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define dispchnpioMap(pGpuResource, pCallContext, pParams, pCpuMapping) dispchnpioMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define dispchnpioUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresUnmap__ +#define dispchnpioUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define dispchnpioUnmap(pGpuResource, pCallContext, pCpuMapping) dispchnpioUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define dispchnpioShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresShareCallback__ +#define dispchnpioShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define dispchnpioShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) dispchnpioShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define dispchnpioGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define dispchnpioGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define dispchnpioGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) dispchnpioGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define dispchnpioInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define dispchnpioInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define dispchnpioInternalControlForward(pGpuResource, command, pParams, size) dispchnpioInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define dispchnpioGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define dispchnpioGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define dispchnpioGetInternalObjectHandle(pGpuResource) dispchnpioGetInternalObjectHandle_DISPATCH(pGpuResource) -#define dispchnpioAccessCallback_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define dispchnpioAccessCallback_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define dispchnpioAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispchnpioAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define dispchnpioGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define dispchnpioGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define dispchnpioGetMemInterMapParams(pRmResource, pParams) dispchnpioGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define dispchnpioCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define dispchnpioCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define dispchnpioCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispchnpioCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define dispchnpioGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define dispchnpioGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define dispchnpioGetMemoryMappingDescriptor(pRmResource, ppMemDesc) dispchnpioGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define dispchnpioControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define dispchnpioControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define dispchnpioControlSerialization_Prologue(pResource, pCallContext, pParams) dispchnpioControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define dispchnpioControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define dispchnpioControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define dispchnpioControlSerialization_Epilogue(pResource, pCallContext, pParams) dispchnpioControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define dispchnpioControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define dispchnpioControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define dispchnpioControl_Prologue(pResource, pCallContext, pParams) dispchnpioControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define dispchnpioControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define dispchnpioControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define dispchnpioControl_Epilogue(pResource, pCallContext, pParams) dispchnpioControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define dispchnpioCanCopy_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define dispchnpioCanCopy_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define dispchnpioCanCopy(pResource) dispchnpioCanCopy_DISPATCH(pResource) -#define dispchnpioIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define dispchnpioIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define dispchnpioIsDuplicate(pResource, hMemory, pDuplicate) dispchnpioIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define dispchnpioPreDestruct_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define dispchnpioPreDestruct_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define dispchnpioPreDestruct(pResource) dispchnpioPreDestruct_DISPATCH(pResource) -#define dispchnpioControlFilter_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define dispchnpioControlFilter_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define dispchnpioControlFilter(pResource, pCallContext, pParams) dispchnpioControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define dispchnpioIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define dispchnpioIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define dispchnpioIsPartialUnmapSupported(pResource) dispchnpioIsPartialUnmapSupported_DISPATCH(pResource) -#define dispchnpioMapTo_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define dispchnpioMapTo_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define dispchnpioMapTo(pResource, pParams) dispchnpioMapTo_DISPATCH(pResource, pParams) -#define dispchnpioUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define dispchnpioUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define dispchnpioUnmapFrom(pResource, pParams) dispchnpioUnmapFrom_DISPATCH(pResource, pParams) -#define dispchnpioGetRefCount_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define dispchnpioGetRefCount_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define dispchnpioGetRefCount(pResource) dispchnpioGetRefCount_DISPATCH(pResource) -#define dispchnpioAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define dispchnpioAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define dispchnpioAddAdditionalDependants(pClient, pResource, pReference) dispchnpioAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define dispchnpioGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define dispchnpioGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define dispchnpioGetNotificationListPtr(pNotifier) dispchnpioGetNotificationListPtr_DISPATCH(pNotifier) -#define dispchnpioGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define dispchnpioGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define dispchnpioGetNotificationShare(pNotifier) dispchnpioGetNotificationShare_DISPATCH(pNotifier) -#define dispchnpioSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define dispchnpioSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define dispchnpioSetNotificationShare(pNotifier, pNotifShare) dispchnpioSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define dispchnpioUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define dispchnpioUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define dispchnpioUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispchnpioUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define dispchnpioGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define dispchnpioGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define dispchnpioGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) dispchnpioGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS dispchnpioGetRegBaseOffsetAndSize_DISPATCH(struct DispChannelPio *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pDispChannel->__dispchnpioGetRegBaseOffsetAndSize__(pDispChannel, pGpu, pOffset, pSize); + return pDispChannel->__nvoc_vtable->__dispchnpioGetRegBaseOffsetAndSize__(pDispChannel, pGpu, pOffset, pSize); } static inline NV_STATUS dispchnpioControl_DISPATCH(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__dispchnpioControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__dispchnpioControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS dispchnpioMap_DISPATCH(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispchnpioMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__dispchnpioMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS dispchnpioUnmap_DISPATCH(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispchnpioUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__dispchnpioUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool dispchnpioShareCallback_DISPATCH(struct DispChannelPio *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__dispchnpioShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__dispchnpioShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS dispchnpioGetMapAddrSpace_DISPATCH(struct DispChannelPio *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__dispchnpioGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__dispchnpioGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS dispchnpioInternalControlForward_DISPATCH(struct DispChannelPio *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__dispchnpioInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__dispchnpioInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle dispchnpioGetInternalObjectHandle_DISPATCH(struct DispChannelPio *pGpuResource) { - return pGpuResource->__dispchnpioGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__dispchnpioGetInternalObjectHandle__(pGpuResource); } static inline NvBool dispchnpioAccessCallback_DISPATCH(struct DispChannelPio *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__dispchnpioAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__dispchnpioAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS dispchnpioGetMemInterMapParams_DISPATCH(struct DispChannelPio *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__dispchnpioGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__dispchnpioGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS dispchnpioCheckMemInterUnmap_DISPATCH(struct DispChannelPio *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__dispchnpioCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__dispchnpioCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS dispchnpioGetMemoryMappingDescriptor_DISPATCH(struct DispChannelPio *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__dispchnpioGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__dispchnpioGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS dispchnpioControlSerialization_Prologue_DISPATCH(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispchnpioControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispchnpioControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void dispchnpioControlSerialization_Epilogue_DISPATCH(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispchnpioControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__dispchnpioControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS dispchnpioControl_Prologue_DISPATCH(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispchnpioControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispchnpioControl_Prologue__(pResource, pCallContext, pParams); } static inline void dispchnpioControl_Epilogue_DISPATCH(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispchnpioControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__dispchnpioControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool dispchnpioCanCopy_DISPATCH(struct DispChannelPio *pResource) { - return pResource->__dispchnpioCanCopy__(pResource); + return pResource->__nvoc_vtable->__dispchnpioCanCopy__(pResource); } static inline NV_STATUS dispchnpioIsDuplicate_DISPATCH(struct DispChannelPio *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__dispchnpioIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__dispchnpioIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void dispchnpioPreDestruct_DISPATCH(struct DispChannelPio *pResource) { - pResource->__dispchnpioPreDestruct__(pResource); + pResource->__nvoc_vtable->__dispchnpioPreDestruct__(pResource); } static inline NV_STATUS dispchnpioControlFilter_DISPATCH(struct DispChannelPio *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispchnpioControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispchnpioControlFilter__(pResource, pCallContext, pParams); } static inline NvBool dispchnpioIsPartialUnmapSupported_DISPATCH(struct DispChannelPio *pResource) { - return pResource->__dispchnpioIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__dispchnpioIsPartialUnmapSupported__(pResource); } static inline NV_STATUS dispchnpioMapTo_DISPATCH(struct DispChannelPio *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__dispchnpioMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__dispchnpioMapTo__(pResource, pParams); } static inline NV_STATUS dispchnpioUnmapFrom_DISPATCH(struct DispChannelPio *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__dispchnpioUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__dispchnpioUnmapFrom__(pResource, pParams); } static inline NvU32 dispchnpioGetRefCount_DISPATCH(struct DispChannelPio *pResource) { - return pResource->__dispchnpioGetRefCount__(pResource); + return pResource->__nvoc_vtable->__dispchnpioGetRefCount__(pResource); } static inline void dispchnpioAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispChannelPio *pResource, RsResourceRef *pReference) { - pResource->__dispchnpioAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__dispchnpioAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * dispchnpioGetNotificationListPtr_DISPATCH(struct DispChannelPio *pNotifier) { - return pNotifier->__dispchnpioGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__dispchnpioGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * dispchnpioGetNotificationShare_DISPATCH(struct DispChannelPio *pNotifier) { - return pNotifier->__dispchnpioGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__dispchnpioGetNotificationShare__(pNotifier); } static inline void dispchnpioSetNotificationShare_DISPATCH(struct DispChannelPio *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__dispchnpioSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__dispchnpioSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS dispchnpioUnregisterEvent_DISPATCH(struct DispChannelPio *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__dispchnpioUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__dispchnpioUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS dispchnpioGetOrAllocNotifShare_DISPATCH(struct DispChannelPio *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__dispchnpioGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__dispchnpioGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS dispchnpioConstruct_IMPL(struct DispChannelPio *arg_pDispChannelPio, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); @@ -719,10 +740,15 @@ NV_STATUS dispchnpioConstruct_IMPL(struct DispChannelPio *arg_pDispChannelPio, s #endif +// Metadata including vtable +struct NVOC_VTABLE__DispChannelDma; + + struct DispChannelDma { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__DispChannelDma *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct DispChannel __nvoc_base_DispChannel; @@ -737,8 +763,13 @@ struct DispChannelDma { struct Notifier *__nvoc_pbase_Notifier; // notify super^2 struct DispChannel *__nvoc_pbase_DispChannel; // dispchn super struct DispChannelDma *__nvoc_pbase_DispChannelDma; // dispchndma +}; + + +// Metadata including vtable with 30 function pointers plus superclass metadata +struct NVOC_VTABLE__DispChannelDma { + const struct NVOC_VTABLE__DispChannel DispChannel; // (dispchn) 30 function pointers - // Vtable with 30 per-object function pointers NV_STATUS (*__dispchndmaGetRegBaseOffsetAndSize__)(struct DispChannelDma * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (dispchn) base (dispchn) NV_STATUS (*__dispchndmaControl__)(struct DispChannelDma * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (dispchn) NV_STATUS (*__dispchndmaMap__)(struct DispChannelDma * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (dispchn) @@ -801,186 +832,186 @@ NV_STATUS __nvoc_objCreate_DispChannelDma(DispChannelDma**, Dynamic*, NvU32, str // Wrapper macros -#define dispchndmaGetRegBaseOffsetAndSize_FNPTR(pDispChannel) pDispChannel->__nvoc_base_DispChannel.__dispchnGetRegBaseOffsetAndSize__ +#define dispchndmaGetRegBaseOffsetAndSize_FNPTR(pDispChannel) pDispChannel->__nvoc_base_DispChannel.__nvoc_vtable->__dispchnGetRegBaseOffsetAndSize__ #define dispchndmaGetRegBaseOffsetAndSize(pDispChannel, pGpu, pOffset, pSize) dispchndmaGetRegBaseOffsetAndSize_DISPATCH(pDispChannel, pGpu, pOffset, pSize) -#define dispchndmaControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresControl__ +#define dispchndmaControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define dispchndmaControl(pGpuResource, pCallContext, pParams) dispchndmaControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define dispchndmaMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresMap__ +#define dispchndmaMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define dispchndmaMap(pGpuResource, pCallContext, pParams, pCpuMapping) dispchndmaMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define dispchndmaUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresUnmap__ +#define dispchndmaUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define dispchndmaUnmap(pGpuResource, pCallContext, pCpuMapping) dispchndmaUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define dispchndmaShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresShareCallback__ +#define dispchndmaShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define dispchndmaShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) dispchndmaShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define dispchndmaGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define dispchndmaGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define dispchndmaGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) dispchndmaGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define dispchndmaInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define dispchndmaInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define dispchndmaInternalControlForward(pGpuResource, command, pParams, size) dispchndmaInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define dispchndmaGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define dispchndmaGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define dispchndmaGetInternalObjectHandle(pGpuResource) dispchndmaGetInternalObjectHandle_DISPATCH(pGpuResource) -#define dispchndmaAccessCallback_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define dispchndmaAccessCallback_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define dispchndmaAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispchndmaAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define dispchndmaGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define dispchndmaGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define dispchndmaGetMemInterMapParams(pRmResource, pParams) dispchndmaGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define dispchndmaCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define dispchndmaCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define dispchndmaCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispchndmaCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define dispchndmaGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define dispchndmaGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define dispchndmaGetMemoryMappingDescriptor(pRmResource, ppMemDesc) dispchndmaGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define dispchndmaControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define dispchndmaControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define dispchndmaControlSerialization_Prologue(pResource, pCallContext, pParams) dispchndmaControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define dispchndmaControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define dispchndmaControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define dispchndmaControlSerialization_Epilogue(pResource, pCallContext, pParams) dispchndmaControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define dispchndmaControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define dispchndmaControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define dispchndmaControl_Prologue(pResource, pCallContext, pParams) dispchndmaControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define dispchndmaControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define dispchndmaControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define dispchndmaControl_Epilogue(pResource, pCallContext, pParams) dispchndmaControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define dispchndmaCanCopy_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define dispchndmaCanCopy_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define dispchndmaCanCopy(pResource) dispchndmaCanCopy_DISPATCH(pResource) -#define dispchndmaIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define dispchndmaIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define dispchndmaIsDuplicate(pResource, hMemory, pDuplicate) dispchndmaIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define dispchndmaPreDestruct_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define dispchndmaPreDestruct_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define dispchndmaPreDestruct(pResource) dispchndmaPreDestruct_DISPATCH(pResource) -#define dispchndmaControlFilter_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define dispchndmaControlFilter_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define dispchndmaControlFilter(pResource, pCallContext, pParams) dispchndmaControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define dispchndmaIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define dispchndmaIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define dispchndmaIsPartialUnmapSupported(pResource) dispchndmaIsPartialUnmapSupported_DISPATCH(pResource) -#define dispchndmaMapTo_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define dispchndmaMapTo_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define dispchndmaMapTo(pResource, pParams) dispchndmaMapTo_DISPATCH(pResource, pParams) -#define dispchndmaUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define dispchndmaUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define dispchndmaUnmapFrom(pResource, pParams) dispchndmaUnmapFrom_DISPATCH(pResource, pParams) -#define dispchndmaGetRefCount_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define dispchndmaGetRefCount_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define dispchndmaGetRefCount(pResource) dispchndmaGetRefCount_DISPATCH(pResource) -#define dispchndmaAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define dispchndmaAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_DispChannel.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define dispchndmaAddAdditionalDependants(pClient, pResource, pReference) dispchndmaAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define dispchndmaGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define dispchndmaGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define dispchndmaGetNotificationListPtr(pNotifier) dispchndmaGetNotificationListPtr_DISPATCH(pNotifier) -#define dispchndmaGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define dispchndmaGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define dispchndmaGetNotificationShare(pNotifier) dispchndmaGetNotificationShare_DISPATCH(pNotifier) -#define dispchndmaSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define dispchndmaSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define dispchndmaSetNotificationShare(pNotifier, pNotifShare) dispchndmaSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define dispchndmaUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define dispchndmaUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define dispchndmaUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispchndmaUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define dispchndmaGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define dispchndmaGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispChannel.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define dispchndmaGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) dispchndmaGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS dispchndmaGetRegBaseOffsetAndSize_DISPATCH(struct DispChannelDma *pDispChannel, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pDispChannel->__dispchndmaGetRegBaseOffsetAndSize__(pDispChannel, pGpu, pOffset, pSize); + return pDispChannel->__nvoc_vtable->__dispchndmaGetRegBaseOffsetAndSize__(pDispChannel, pGpu, pOffset, pSize); } static inline NV_STATUS dispchndmaControl_DISPATCH(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__dispchndmaControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__dispchndmaControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS dispchndmaMap_DISPATCH(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispchndmaMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__dispchndmaMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS dispchndmaUnmap_DISPATCH(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispchndmaUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__dispchndmaUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool dispchndmaShareCallback_DISPATCH(struct DispChannelDma *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__dispchndmaShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__dispchndmaShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS dispchndmaGetMapAddrSpace_DISPATCH(struct DispChannelDma *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__dispchndmaGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__dispchndmaGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS dispchndmaInternalControlForward_DISPATCH(struct DispChannelDma *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__dispchndmaInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__dispchndmaInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle dispchndmaGetInternalObjectHandle_DISPATCH(struct DispChannelDma *pGpuResource) { - return pGpuResource->__dispchndmaGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__dispchndmaGetInternalObjectHandle__(pGpuResource); } static inline NvBool dispchndmaAccessCallback_DISPATCH(struct DispChannelDma *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__dispchndmaAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__dispchndmaAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS dispchndmaGetMemInterMapParams_DISPATCH(struct DispChannelDma *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__dispchndmaGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__dispchndmaGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS dispchndmaCheckMemInterUnmap_DISPATCH(struct DispChannelDma *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__dispchndmaCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__dispchndmaCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS dispchndmaGetMemoryMappingDescriptor_DISPATCH(struct DispChannelDma *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__dispchndmaGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__dispchndmaGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS dispchndmaControlSerialization_Prologue_DISPATCH(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispchndmaControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispchndmaControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void dispchndmaControlSerialization_Epilogue_DISPATCH(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispchndmaControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__dispchndmaControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS dispchndmaControl_Prologue_DISPATCH(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispchndmaControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispchndmaControl_Prologue__(pResource, pCallContext, pParams); } static inline void dispchndmaControl_Epilogue_DISPATCH(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispchndmaControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__dispchndmaControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool dispchndmaCanCopy_DISPATCH(struct DispChannelDma *pResource) { - return pResource->__dispchndmaCanCopy__(pResource); + return pResource->__nvoc_vtable->__dispchndmaCanCopy__(pResource); } static inline NV_STATUS dispchndmaIsDuplicate_DISPATCH(struct DispChannelDma *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__dispchndmaIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__dispchndmaIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void dispchndmaPreDestruct_DISPATCH(struct DispChannelDma *pResource) { - pResource->__dispchndmaPreDestruct__(pResource); + pResource->__nvoc_vtable->__dispchndmaPreDestruct__(pResource); } static inline NV_STATUS dispchndmaControlFilter_DISPATCH(struct DispChannelDma *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispchndmaControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispchndmaControlFilter__(pResource, pCallContext, pParams); } static inline NvBool dispchndmaIsPartialUnmapSupported_DISPATCH(struct DispChannelDma *pResource) { - return pResource->__dispchndmaIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__dispchndmaIsPartialUnmapSupported__(pResource); } static inline NV_STATUS dispchndmaMapTo_DISPATCH(struct DispChannelDma *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__dispchndmaMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__dispchndmaMapTo__(pResource, pParams); } static inline NV_STATUS dispchndmaUnmapFrom_DISPATCH(struct DispChannelDma *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__dispchndmaUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__dispchndmaUnmapFrom__(pResource, pParams); } static inline NvU32 dispchndmaGetRefCount_DISPATCH(struct DispChannelDma *pResource) { - return pResource->__dispchndmaGetRefCount__(pResource); + return pResource->__nvoc_vtable->__dispchndmaGetRefCount__(pResource); } static inline void dispchndmaAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispChannelDma *pResource, RsResourceRef *pReference) { - pResource->__dispchndmaAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__dispchndmaAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * dispchndmaGetNotificationListPtr_DISPATCH(struct DispChannelDma *pNotifier) { - return pNotifier->__dispchndmaGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__dispchndmaGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * dispchndmaGetNotificationShare_DISPATCH(struct DispChannelDma *pNotifier) { - return pNotifier->__dispchndmaGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__dispchndmaGetNotificationShare__(pNotifier); } static inline void dispchndmaSetNotificationShare_DISPATCH(struct DispChannelDma *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__dispchndmaSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__dispchndmaSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS dispchndmaUnregisterEvent_DISPATCH(struct DispChannelDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__dispchndmaUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__dispchndmaUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS dispchndmaGetOrAllocNotifShare_DISPATCH(struct DispChannelDma *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__dispchndmaGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__dispchndmaGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS dispchndmaConstruct_IMPL(struct DispChannelDma *arg_pDispChannelDma, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_disp_inst_mem_nvoc.c b/src/nvidia/generated/g_disp_inst_mem_nvoc.c index 0c45983970..80370291a8 100644 --- a/src/nvidia/generated/g_disp_inst_mem_nvoc.c +++ b/src/nvidia/generated/g_disp_inst_mem_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_DisplayInstanceMemory = /*pExportInfo=*/ &__nvoc_export_info_DisplayInstanceMemory }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_DisplayInstanceMemory = { /*numEntries=*/ 0, @@ -108,7 +112,7 @@ static void __nvoc_init_funcTable_DisplayInstanceMemory_1(DisplayInstanceMemory PORT_UNREFERENCED_VARIABLE(dispIpHal_HalVarIdx); // instmemGetSize -- halified (2 hals) body - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00080000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__instmemGetSize__ = &instmemGetSize_f2d351; } @@ -118,7 +122,7 @@ static void __nvoc_init_funcTable_DisplayInstanceMemory_1(DisplayInstanceMemory } // instmemGetHashTableBaseAddr -- halified (2 hals) body - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00080000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__instmemGetHashTableBaseAddr__ = &instmemGetHashTableBaseAddr_4a4dee; } @@ -128,9 +132,9 @@ static void __nvoc_init_funcTable_DisplayInstanceMemory_1(DisplayInstanceMemory } // instmemIsValid -- halified (2 hals) body - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00080000UL) )) /* DispIpHal: DISPv0000 */ { - pThis->__instmemIsValid__ = &instmemIsValid_491d52; + pThis->__instmemIsValid__ = &instmemIsValid_3dd2c9; } else { @@ -138,7 +142,7 @@ static void __nvoc_init_funcTable_DisplayInstanceMemory_1(DisplayInstanceMemory } // instmemGenerateHashTableData -- halified (2 hals) body - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00080000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__instmemGenerateHashTableData__ = &instmemGenerateHashTableData_4a4dee; } @@ -148,7 +152,7 @@ static void __nvoc_init_funcTable_DisplayInstanceMemory_1(DisplayInstanceMemory } // instmemHashFunc -- halified (2 hals) body - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00080000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__instmemHashFunc__ = &instmemHashFunc_46f6a7; } @@ -158,7 +162,7 @@ static void __nvoc_init_funcTable_DisplayInstanceMemory_1(DisplayInstanceMemory } // instmemCommitContextDma -- halified (2 hals) body - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00080000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__instmemCommitContextDma__ = &instmemCommitContextDma_46f6a7; } @@ -168,7 +172,7 @@ static void __nvoc_init_funcTable_DisplayInstanceMemory_1(DisplayInstanceMemory } // instmemUpdateContextDma -- halified (2 hals) body - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00080000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__instmemUpdateContextDma__ = &instmemUpdateContextDma_46f6a7; } diff --git a/src/nvidia/generated/g_disp_inst_mem_nvoc.h b/src/nvidia/generated/g_disp_inst_mem_nvoc.h index 543ad905dd..78a3effd35 100644 --- a/src/nvidia/generated/g_disp_inst_mem_nvoc.h +++ b/src/nvidia/generated/g_disp_inst_mem_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -248,8 +248,8 @@ static inline NvU32 instmemGetHashTableBaseAddr_4a4dee(OBJGPU *pGpu, struct Disp NvBool instmemIsValid_v03_00(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, NvU32 offset); -static inline NvBool instmemIsValid_491d52(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, NvU32 offset) { - return ((NvBool)(0 != 0)); +static inline NvBool instmemIsValid_3dd2c9(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, NvU32 offset) { + return NV_FALSE; } NvU32 instmemGenerateHashTableData_v03_00(OBJGPU *pGpu, struct DisplayInstanceMemory *pInstMem, NvU32 hClient, NvU32 offset, NvU32 dispChannelNum); diff --git a/src/nvidia/generated/g_disp_objs_nvoc.c b/src/nvidia/generated/g_disp_objs_nvoc.c index 140b91cb7b..a82d96a6f8 100644 --- a/src/nvidia/generated/g_disp_objs_nvoc.c +++ b/src/nvidia/generated/g_disp_objs_nvoc.c @@ -102,138 +102,191 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_DisplayApi = /*pExportInfo=*/ &__nvoc_export_info_DisplayApi }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_down_thunk_DisplayApi_resControl(struct RsResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_down_thunk_DisplayApi_rmresControl_Prologue(struct RmResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); // this +void __nvoc_down_thunk_DisplayApi_rmresControl_Epilogue(struct RmResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); // this + // 3 down-thunk(s) defined to bridge methods in DisplayApi from superclasses // dispapiControl: virtual override (res) base (rmres) -static NV_STATUS __nvoc_down_thunk_DisplayApi_resControl(struct RsResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_down_thunk_DisplayApi_resControl(struct RsResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return dispapiControl((struct DisplayApi *)(((unsigned char *) pDisplayApi) - __nvoc_rtti_DisplayApi_RsResource.offset), pCallContext, pParams); } // dispapiControl_Prologue: virtual override (res) base (rmres) -static NV_STATUS __nvoc_down_thunk_DisplayApi_rmresControl_Prologue(struct RmResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { +NV_STATUS __nvoc_down_thunk_DisplayApi_rmresControl_Prologue(struct RmResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { return dispapiControl_Prologue((struct DisplayApi *)(((unsigned char *) pDisplayApi) - __nvoc_rtti_DisplayApi_RmResource.offset), pCallContext, pRsParams); } // dispapiControl_Epilogue: virtual override (res) base (rmres) -static void __nvoc_down_thunk_DisplayApi_rmresControl_Epilogue(struct RmResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { +void __nvoc_down_thunk_DisplayApi_rmresControl_Epilogue(struct RmResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { dispapiControl_Epilogue((struct DisplayApi *)(((unsigned char *) pDisplayApi) - __nvoc_rtti_DisplayApi_RmResource.offset), pCallContext, pRsParams); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_RmResource_dispapiAccessCallback(struct DisplayApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_dispapiShareCallback(struct DisplayApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispapiGetMemInterMapParams(struct DisplayApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispapiCheckMemInterUnmap(struct DisplayApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispapiGetMemoryMappingDescriptor(struct DisplayApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispapiControlSerialization_Prologue(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_dispapiControlSerialization_Epilogue(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_dispapiCanCopy(struct DisplayApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispapiIsDuplicate(struct DisplayApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_dispapiPreDestruct(struct DisplayApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispapiControlFilter(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispapiMap(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispapiUnmap(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_dispapiIsPartialUnmapSupported(struct DisplayApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispapiMapTo(struct DisplayApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispapiUnmapFrom(struct DisplayApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_dispapiGetRefCount(struct DisplayApi *pResource); // this +void __nvoc_up_thunk_RsResource_dispapiAddAdditionalDependants(struct RsClient *pClient, struct DisplayApi *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispapiGetNotificationListPtr(struct DisplayApi *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_dispapiGetNotificationShare(struct DisplayApi *pNotifier); // this +void __nvoc_up_thunk_Notifier_dispapiSetNotificationShare(struct DisplayApi *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_dispapiUnregisterEvent(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_dispapiGetOrAllocNotifShare(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 23 up-thunk(s) defined to bridge methods in DisplayApi to superclasses // dispapiAccessCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_dispapiAccessCallback(struct DisplayApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_dispapiAccessCallback(struct DisplayApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // dispapiShareCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_dispapiShareCallback(struct DisplayApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_dispapiShareCallback(struct DisplayApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // dispapiGetMemInterMapParams: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_dispapiGetMemInterMapParams(struct DisplayApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispapiGetMemInterMapParams(struct DisplayApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DisplayApi_RmResource.offset), pParams); } // dispapiCheckMemInterUnmap: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_dispapiCheckMemInterUnmap(struct DisplayApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_dispapiCheckMemInterUnmap(struct DisplayApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DisplayApi_RmResource.offset), bSubdeviceHandleProvided); } // dispapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_dispapiGetMemoryMappingDescriptor(struct DisplayApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_dispapiGetMemoryMappingDescriptor(struct DisplayApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DisplayApi_RmResource.offset), ppMemDesc); } // dispapiControlSerialization_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_dispapiControlSerialization_Prologue(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispapiControlSerialization_Prologue(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RmResource.offset), pCallContext, pParams); } // dispapiControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_dispapiControlSerialization_Epilogue(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_dispapiControlSerialization_Epilogue(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RmResource.offset), pCallContext, pParams); } // dispapiCanCopy: virtual inherited (res) base (rmres) -static NvBool __nvoc_up_thunk_RsResource_dispapiCanCopy(struct DisplayApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_dispapiCanCopy(struct DisplayApi *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RsResource.offset)); } // dispapiIsDuplicate: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_dispapiIsDuplicate(struct DisplayApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_dispapiIsDuplicate(struct DisplayApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RsResource.offset), hMemory, pDuplicate); } // dispapiPreDestruct: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_dispapiPreDestruct(struct DisplayApi *pResource) { +void __nvoc_up_thunk_RsResource_dispapiPreDestruct(struct DisplayApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RsResource.offset)); } // dispapiControlFilter: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_dispapiControlFilter(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispapiControlFilter(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RsResource.offset), pCallContext, pParams); } // dispapiMap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_dispapiMap(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_dispapiMap(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RsResource.offset), pCallContext, pParams, pCpuMapping); } // dispapiUnmap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_dispapiUnmap(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_dispapiUnmap(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RsResource.offset), pCallContext, pCpuMapping); } // dispapiIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body -static NvBool __nvoc_up_thunk_RsResource_dispapiIsPartialUnmapSupported(struct DisplayApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_dispapiIsPartialUnmapSupported(struct DisplayApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RsResource.offset)); } // dispapiMapTo: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_dispapiMapTo(struct DisplayApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispapiMapTo(struct DisplayApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RsResource.offset), pParams); } // dispapiUnmapFrom: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_dispapiUnmapFrom(struct DisplayApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispapiUnmapFrom(struct DisplayApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RsResource.offset), pParams); } // dispapiGetRefCount: virtual inherited (res) base (rmres) -static NvU32 __nvoc_up_thunk_RsResource_dispapiGetRefCount(struct DisplayApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_dispapiGetRefCount(struct DisplayApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RsResource.offset)); } // dispapiAddAdditionalDependants: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_dispapiAddAdditionalDependants(struct RsClient *pClient, struct DisplayApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_dispapiAddAdditionalDependants(struct RsClient *pClient, struct DisplayApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DisplayApi_RsResource.offset), pReference); } // dispapiGetNotificationListPtr: virtual inherited (notify) base (notify) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispapiGetNotificationListPtr(struct DisplayApi *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispapiGetNotificationListPtr(struct DisplayApi *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DisplayApi_Notifier.offset)); } // dispapiGetNotificationShare: virtual inherited (notify) base (notify) -static struct NotifShare * __nvoc_up_thunk_Notifier_dispapiGetNotificationShare(struct DisplayApi *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_dispapiGetNotificationShare(struct DisplayApi *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DisplayApi_Notifier.offset)); } // dispapiSetNotificationShare: virtual inherited (notify) base (notify) -static void __nvoc_up_thunk_Notifier_dispapiSetNotificationShare(struct DisplayApi *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_dispapiSetNotificationShare(struct DisplayApi *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DisplayApi_Notifier.offset), pNotifShare); } // dispapiUnregisterEvent: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_dispapiUnregisterEvent(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_dispapiUnregisterEvent(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DisplayApi_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // dispapiGetOrAllocNotifShare: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_dispapiGetOrAllocNotifShare(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_dispapiGetOrAllocNotifShare(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DisplayApi_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -294,94 +347,97 @@ static void __nvoc_init_funcTable_DisplayApi_1(DisplayApi *pThis, RmHalspecOwner PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - - // dispapiControl -- virtual override (res) base (rmres) - pThis->__dispapiControl__ = &dispapiControl_IMPL; - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ = &__nvoc_down_thunk_DisplayApi_resControl; - - // dispapiControl_Prologue -- virtual override (res) base (rmres) - pThis->__dispapiControl_Prologue__ = &dispapiControl_Prologue_IMPL; - pThis->__nvoc_base_RmResource.__rmresControl_Prologue__ = &__nvoc_down_thunk_DisplayApi_rmresControl_Prologue; - - // dispapiControl_Epilogue -- virtual override (res) base (rmres) - pThis->__dispapiControl_Epilogue__ = &dispapiControl_Epilogue_IMPL; - pThis->__nvoc_base_RmResource.__rmresControl_Epilogue__ = &__nvoc_down_thunk_DisplayApi_rmresControl_Epilogue; - - // dispapiAccessCallback -- virtual inherited (rmres) base (rmres) - pThis->__dispapiAccessCallback__ = &__nvoc_up_thunk_RmResource_dispapiAccessCallback; - - // dispapiShareCallback -- virtual inherited (rmres) base (rmres) - pThis->__dispapiShareCallback__ = &__nvoc_up_thunk_RmResource_dispapiShareCallback; - - // dispapiGetMemInterMapParams -- virtual inherited (rmres) base (rmres) - pThis->__dispapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispapiGetMemInterMapParams; - - // dispapiCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) - pThis->__dispapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispapiCheckMemInterUnmap; - - // dispapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) - pThis->__dispapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispapiGetMemoryMappingDescriptor; - - // dispapiControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__dispapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispapiControlSerialization_Prologue; - - // dispapiControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__dispapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispapiControlSerialization_Epilogue; - - // dispapiCanCopy -- virtual inherited (res) base (rmres) - pThis->__dispapiCanCopy__ = &__nvoc_up_thunk_RsResource_dispapiCanCopy; - - // dispapiIsDuplicate -- virtual inherited (res) base (rmres) - pThis->__dispapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispapiIsDuplicate; - - // dispapiPreDestruct -- virtual inherited (res) base (rmres) - pThis->__dispapiPreDestruct__ = &__nvoc_up_thunk_RsResource_dispapiPreDestruct; - - // dispapiControlFilter -- virtual inherited (res) base (rmres) - pThis->__dispapiControlFilter__ = &__nvoc_up_thunk_RsResource_dispapiControlFilter; - - // dispapiMap -- virtual inherited (res) base (rmres) - pThis->__dispapiMap__ = &__nvoc_up_thunk_RsResource_dispapiMap; - - // dispapiUnmap -- virtual inherited (res) base (rmres) - pThis->__dispapiUnmap__ = &__nvoc_up_thunk_RsResource_dispapiUnmap; - - // dispapiIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body - pThis->__dispapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispapiIsPartialUnmapSupported; - - // dispapiMapTo -- virtual inherited (res) base (rmres) - pThis->__dispapiMapTo__ = &__nvoc_up_thunk_RsResource_dispapiMapTo; - - // dispapiUnmapFrom -- virtual inherited (res) base (rmres) - pThis->__dispapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispapiUnmapFrom; - - // dispapiGetRefCount -- virtual inherited (res) base (rmres) - pThis->__dispapiGetRefCount__ = &__nvoc_up_thunk_RsResource_dispapiGetRefCount; - - // dispapiAddAdditionalDependants -- virtual inherited (res) base (rmres) - pThis->__dispapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispapiAddAdditionalDependants; - - // dispapiGetNotificationListPtr -- virtual inherited (notify) base (notify) - pThis->__dispapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispapiGetNotificationListPtr; - - // dispapiGetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__dispapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispapiGetNotificationShare; - - // dispapiSetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__dispapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispapiSetNotificationShare; - - // dispapiUnregisterEvent -- virtual inherited (notify) base (notify) - pThis->__dispapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispapiUnregisterEvent; - - // dispapiGetOrAllocNotifShare -- virtual inherited (notify) base (notify) - pThis->__dispapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispapiGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_DisplayApi_1 with approximately 29 basic block(s). +} // End __nvoc_init_funcTable_DisplayApi_1 // Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_DisplayApi(DisplayApi *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 26 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__DisplayApi vtable = { + .__dispapiControl__ = &dispapiControl_IMPL, // virtual override (res) base (rmres) + .RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_DisplayApi_resControl, // virtual + .__dispapiControl_Prologue__ = &dispapiControl_Prologue_IMPL, // virtual override (res) base (rmres) + .RmResource.__rmresControl_Prologue__ = &__nvoc_down_thunk_DisplayApi_rmresControl_Prologue, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__dispapiControl_Epilogue__ = &dispapiControl_Epilogue_IMPL, // virtual override (res) base (rmres) + .RmResource.__rmresControl_Epilogue__ = &__nvoc_down_thunk_DisplayApi_rmresControl_Epilogue, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__dispapiAccessCallback__ = &__nvoc_up_thunk_RmResource_dispapiAccessCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__dispapiShareCallback__ = &__nvoc_up_thunk_RmResource_dispapiShareCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__dispapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispapiGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__dispapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispapiCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__dispapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__dispapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispapiControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__dispapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispapiControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__dispapiCanCopy__ = &__nvoc_up_thunk_RsResource_dispapiCanCopy, // virtual inherited (res) base (rmres) + .RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__dispapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispapiIsDuplicate, // virtual inherited (res) base (rmres) + .RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__dispapiPreDestruct__ = &__nvoc_up_thunk_RsResource_dispapiPreDestruct, // virtual inherited (res) base (rmres) + .RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__dispapiControlFilter__ = &__nvoc_up_thunk_RsResource_dispapiControlFilter, // virtual inherited (res) base (rmres) + .RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__dispapiMap__ = &__nvoc_up_thunk_RsResource_dispapiMap, // virtual inherited (res) base (rmres) + .RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMap__ = &resMap_IMPL, // virtual + .__dispapiUnmap__ = &__nvoc_up_thunk_RsResource_dispapiUnmap, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__dispapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispapiIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__dispapiMapTo__ = &__nvoc_up_thunk_RsResource_dispapiMapTo, // virtual inherited (res) base (rmres) + .RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__dispapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispapiUnmapFrom, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__dispapiGetRefCount__ = &__nvoc_up_thunk_RsResource_dispapiGetRefCount, // virtual inherited (res) base (rmres) + .RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__dispapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispapiAddAdditionalDependants, // virtual inherited (res) base (rmres) + .RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__dispapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispapiGetNotificationListPtr, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__dispapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispapiGetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__dispapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispapiSetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__dispapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispapiUnregisterEvent, // virtual inherited (notify) base (notify) + .Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__dispapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispapiGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.RmResource.RsResource; // (res) super^2 + pThis->__nvoc_base_RmResource.__nvoc_vtable = &vtable.RmResource; // (rmres) super + pThis->__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.Notifier.INotifier; // (inotify) super^2 + pThis->__nvoc_base_Notifier.__nvoc_vtable = &vtable.Notifier; // (notify) super + pThis->__nvoc_vtable = &vtable; // (dispapi) this __nvoc_init_funcTable_DisplayApi_1(pThis, pRmhalspecowner); } @@ -889,135 +945,214 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispObje }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super^2 +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super^2 +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_DisplayApi_resControl(struct RsResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_DisplayApi_rmresControl_Prologue(struct RmResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); // super +void __nvoc_down_thunk_DisplayApi_rmresControl_Epilogue(struct RmResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_dispapiAccessCallback(struct DisplayApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_dispapiShareCallback(struct DisplayApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispapiGetMemInterMapParams(struct DisplayApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispapiCheckMemInterUnmap(struct DisplayApi *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispapiGetMemoryMappingDescriptor(struct DisplayApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispapiControlSerialization_Prologue(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_dispapiControlSerialization_Epilogue(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_dispapiCanCopy(struct DisplayApi *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispapiIsDuplicate(struct DisplayApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_dispapiPreDestruct(struct DisplayApi *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispapiControlFilter(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispapiMap(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispapiUnmap(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_dispapiIsPartialUnmapSupported(struct DisplayApi *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispapiMapTo(struct DisplayApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispapiUnmapFrom(struct DisplayApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_dispapiGetRefCount(struct DisplayApi *pResource); // super +void __nvoc_up_thunk_RsResource_dispapiAddAdditionalDependants(struct RsClient *pClient, struct DisplayApi *pResource, RsResourceRef *pReference); // super +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispapiGetNotificationListPtr(struct DisplayApi *pNotifier); // super +struct NotifShare * __nvoc_up_thunk_Notifier_dispapiGetNotificationShare(struct DisplayApi *pNotifier); // super +void __nvoc_up_thunk_Notifier_dispapiSetNotificationShare(struct DisplayApi *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_up_thunk_Notifier_dispapiUnregisterEvent(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_up_thunk_Notifier_dispapiGetOrAllocNotifShare(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_up_thunk_DisplayApi_dispobjControl(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_DisplayApi_dispobjControl_Prologue(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); // this +void __nvoc_up_thunk_DisplayApi_dispobjControl_Epilogue(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); // this +NvBool __nvoc_up_thunk_RmResource_dispobjAccessCallback(struct DispObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_dispobjShareCallback(struct DispObject *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispobjGetMemInterMapParams(struct DispObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispobjCheckMemInterUnmap(struct DispObject *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispobjGetMemoryMappingDescriptor(struct DispObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispobjControlSerialization_Prologue(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_dispobjControlSerialization_Epilogue(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_dispobjCanCopy(struct DispObject *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispobjIsDuplicate(struct DispObject *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_dispobjPreDestruct(struct DispObject *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispobjControlFilter(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispobjMap(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispobjUnmap(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_dispobjIsPartialUnmapSupported(struct DispObject *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispobjMapTo(struct DispObject *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispobjUnmapFrom(struct DispObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_dispobjGetRefCount(struct DispObject *pResource); // this +void __nvoc_up_thunk_RsResource_dispobjAddAdditionalDependants(struct RsClient *pClient, struct DispObject *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispobjGetNotificationListPtr(struct DispObject *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_dispobjGetNotificationShare(struct DispObject *pNotifier); // this +void __nvoc_up_thunk_Notifier_dispobjSetNotificationShare(struct DispObject *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_dispobjUnregisterEvent(struct DispObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_dispobjGetOrAllocNotifShare(struct DispObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 26 up-thunk(s) defined to bridge methods in DispObject to superclasses // dispobjControl: virtual inherited (dispapi) base (dispapi) -static NV_STATUS __nvoc_up_thunk_DisplayApi_dispobjControl(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_DisplayApi_dispobjControl(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return dispapiControl((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_DispObject_DisplayApi.offset), pCallContext, pParams); } // dispobjControl_Prologue: virtual inherited (dispapi) base (dispapi) -static NV_STATUS __nvoc_up_thunk_DisplayApi_dispobjControl_Prologue(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { +NV_STATUS __nvoc_up_thunk_DisplayApi_dispobjControl_Prologue(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { return dispapiControl_Prologue((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_DispObject_DisplayApi.offset), pCallContext, pRsParams); } // dispobjControl_Epilogue: virtual inherited (dispapi) base (dispapi) -static void __nvoc_up_thunk_DisplayApi_dispobjControl_Epilogue(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { +void __nvoc_up_thunk_DisplayApi_dispobjControl_Epilogue(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { dispapiControl_Epilogue((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_DispObject_DisplayApi.offset), pCallContext, pRsParams); } // dispobjAccessCallback: virtual inherited (rmres) base (dispapi) -static NvBool __nvoc_up_thunk_RmResource_dispobjAccessCallback(struct DispObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_dispobjAccessCallback(struct DispObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // dispobjShareCallback: virtual inherited (rmres) base (dispapi) -static NvBool __nvoc_up_thunk_RmResource_dispobjShareCallback(struct DispObject *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_dispobjShareCallback(struct DispObject *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // dispobjGetMemInterMapParams: virtual inherited (rmres) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RmResource_dispobjGetMemInterMapParams(struct DispObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispobjGetMemInterMapParams(struct DispObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispObject_RmResource.offset), pParams); } // dispobjCheckMemInterUnmap: virtual inherited (rmres) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RmResource_dispobjCheckMemInterUnmap(struct DispObject *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_dispobjCheckMemInterUnmap(struct DispObject *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispObject_RmResource.offset), bSubdeviceHandleProvided); } // dispobjGetMemoryMappingDescriptor: virtual inherited (rmres) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RmResource_dispobjGetMemoryMappingDescriptor(struct DispObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_dispobjGetMemoryMappingDescriptor(struct DispObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispObject_RmResource.offset), ppMemDesc); } // dispobjControlSerialization_Prologue: virtual inherited (rmres) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RmResource_dispobjControlSerialization_Prologue(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispobjControlSerialization_Prologue(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RmResource.offset), pCallContext, pParams); } // dispobjControlSerialization_Epilogue: virtual inherited (rmres) base (dispapi) -static void __nvoc_up_thunk_RmResource_dispobjControlSerialization_Epilogue(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_dispobjControlSerialization_Epilogue(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RmResource.offset), pCallContext, pParams); } // dispobjCanCopy: virtual inherited (res) base (dispapi) -static NvBool __nvoc_up_thunk_RsResource_dispobjCanCopy(struct DispObject *pResource) { +NvBool __nvoc_up_thunk_RsResource_dispobjCanCopy(struct DispObject *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RsResource.offset)); } // dispobjIsDuplicate: virtual inherited (res) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RsResource_dispobjIsDuplicate(struct DispObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_dispobjIsDuplicate(struct DispObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RsResource.offset), hMemory, pDuplicate); } // dispobjPreDestruct: virtual inherited (res) base (dispapi) -static void __nvoc_up_thunk_RsResource_dispobjPreDestruct(struct DispObject *pResource) { +void __nvoc_up_thunk_RsResource_dispobjPreDestruct(struct DispObject *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RsResource.offset)); } // dispobjControlFilter: virtual inherited (res) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RsResource_dispobjControlFilter(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispobjControlFilter(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RsResource.offset), pCallContext, pParams); } // dispobjMap: virtual inherited (res) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RsResource_dispobjMap(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_dispobjMap(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RsResource.offset), pCallContext, pParams, pCpuMapping); } // dispobjUnmap: virtual inherited (res) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RsResource_dispobjUnmap(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_dispobjUnmap(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RsResource.offset), pCallContext, pCpuMapping); } // dispobjIsPartialUnmapSupported: inline virtual inherited (res) base (dispapi) body -static NvBool __nvoc_up_thunk_RsResource_dispobjIsPartialUnmapSupported(struct DispObject *pResource) { +NvBool __nvoc_up_thunk_RsResource_dispobjIsPartialUnmapSupported(struct DispObject *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RsResource.offset)); } // dispobjMapTo: virtual inherited (res) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RsResource_dispobjMapTo(struct DispObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispobjMapTo(struct DispObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RsResource.offset), pParams); } // dispobjUnmapFrom: virtual inherited (res) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RsResource_dispobjUnmapFrom(struct DispObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispobjUnmapFrom(struct DispObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RsResource.offset), pParams); } // dispobjGetRefCount: virtual inherited (res) base (dispapi) -static NvU32 __nvoc_up_thunk_RsResource_dispobjGetRefCount(struct DispObject *pResource) { +NvU32 __nvoc_up_thunk_RsResource_dispobjGetRefCount(struct DispObject *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RsResource.offset)); } // dispobjAddAdditionalDependants: virtual inherited (res) base (dispapi) -static void __nvoc_up_thunk_RsResource_dispobjAddAdditionalDependants(struct RsClient *pClient, struct DispObject *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_dispobjAddAdditionalDependants(struct RsClient *pClient, struct DispObject *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispObject_RsResource.offset), pReference); } // dispobjGetNotificationListPtr: virtual inherited (notify) base (dispapi) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispobjGetNotificationListPtr(struct DispObject *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispobjGetNotificationListPtr(struct DispObject *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispObject_Notifier.offset)); } // dispobjGetNotificationShare: virtual inherited (notify) base (dispapi) -static struct NotifShare * __nvoc_up_thunk_Notifier_dispobjGetNotificationShare(struct DispObject *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_dispobjGetNotificationShare(struct DispObject *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispObject_Notifier.offset)); } // dispobjSetNotificationShare: virtual inherited (notify) base (dispapi) -static void __nvoc_up_thunk_Notifier_dispobjSetNotificationShare(struct DispObject *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_dispobjSetNotificationShare(struct DispObject *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispObject_Notifier.offset), pNotifShare); } // dispobjUnregisterEvent: virtual inherited (notify) base (dispapi) -static NV_STATUS __nvoc_up_thunk_Notifier_dispobjUnregisterEvent(struct DispObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_dispobjUnregisterEvent(struct DispObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispObject_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // dispobjGetOrAllocNotifShare: virtual inherited (notify) base (dispapi) -static NV_STATUS __nvoc_up_thunk_Notifier_dispobjGetOrAllocNotifShare(struct DispObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_dispobjGetOrAllocNotifShare(struct DispObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispObject_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -1170,91 +1305,166 @@ static void __nvoc_init_funcTable_DispObject_1(DispObject *pThis, RmHalspecOwner #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__dispobjCtrlCmdEventSetTrigger__ = &dispobjCtrlCmdEventSetTrigger_IMPL; #endif - - // dispobjControl -- virtual inherited (dispapi) base (dispapi) - pThis->__dispobjControl__ = &__nvoc_up_thunk_DisplayApi_dispobjControl; - - // dispobjControl_Prologue -- virtual inherited (dispapi) base (dispapi) - pThis->__dispobjControl_Prologue__ = &__nvoc_up_thunk_DisplayApi_dispobjControl_Prologue; - - // dispobjControl_Epilogue -- virtual inherited (dispapi) base (dispapi) - pThis->__dispobjControl_Epilogue__ = &__nvoc_up_thunk_DisplayApi_dispobjControl_Epilogue; - - // dispobjAccessCallback -- virtual inherited (rmres) base (dispapi) - pThis->__dispobjAccessCallback__ = &__nvoc_up_thunk_RmResource_dispobjAccessCallback; - - // dispobjShareCallback -- virtual inherited (rmres) base (dispapi) - pThis->__dispobjShareCallback__ = &__nvoc_up_thunk_RmResource_dispobjShareCallback; - - // dispobjGetMemInterMapParams -- virtual inherited (rmres) base (dispapi) - pThis->__dispobjGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispobjGetMemInterMapParams; - - // dispobjCheckMemInterUnmap -- virtual inherited (rmres) base (dispapi) - pThis->__dispobjCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispobjCheckMemInterUnmap; - - // dispobjGetMemoryMappingDescriptor -- virtual inherited (rmres) base (dispapi) - pThis->__dispobjGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispobjGetMemoryMappingDescriptor; - - // dispobjControlSerialization_Prologue -- virtual inherited (rmres) base (dispapi) - pThis->__dispobjControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispobjControlSerialization_Prologue; - - // dispobjControlSerialization_Epilogue -- virtual inherited (rmres) base (dispapi) - pThis->__dispobjControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispobjControlSerialization_Epilogue; - - // dispobjCanCopy -- virtual inherited (res) base (dispapi) - pThis->__dispobjCanCopy__ = &__nvoc_up_thunk_RsResource_dispobjCanCopy; - - // dispobjIsDuplicate -- virtual inherited (res) base (dispapi) - pThis->__dispobjIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispobjIsDuplicate; - - // dispobjPreDestruct -- virtual inherited (res) base (dispapi) - pThis->__dispobjPreDestruct__ = &__nvoc_up_thunk_RsResource_dispobjPreDestruct; - - // dispobjControlFilter -- virtual inherited (res) base (dispapi) - pThis->__dispobjControlFilter__ = &__nvoc_up_thunk_RsResource_dispobjControlFilter; - - // dispobjMap -- virtual inherited (res) base (dispapi) - pThis->__dispobjMap__ = &__nvoc_up_thunk_RsResource_dispobjMap; - - // dispobjUnmap -- virtual inherited (res) base (dispapi) - pThis->__dispobjUnmap__ = &__nvoc_up_thunk_RsResource_dispobjUnmap; - - // dispobjIsPartialUnmapSupported -- inline virtual inherited (res) base (dispapi) body - pThis->__dispobjIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispobjIsPartialUnmapSupported; - - // dispobjMapTo -- virtual inherited (res) base (dispapi) - pThis->__dispobjMapTo__ = &__nvoc_up_thunk_RsResource_dispobjMapTo; - - // dispobjUnmapFrom -- virtual inherited (res) base (dispapi) - pThis->__dispobjUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispobjUnmapFrom; - - // dispobjGetRefCount -- virtual inherited (res) base (dispapi) - pThis->__dispobjGetRefCount__ = &__nvoc_up_thunk_RsResource_dispobjGetRefCount; - - // dispobjAddAdditionalDependants -- virtual inherited (res) base (dispapi) - pThis->__dispobjAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispobjAddAdditionalDependants; - - // dispobjGetNotificationListPtr -- virtual inherited (notify) base (dispapi) - pThis->__dispobjGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispobjGetNotificationListPtr; - - // dispobjGetNotificationShare -- virtual inherited (notify) base (dispapi) - pThis->__dispobjGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispobjGetNotificationShare; - - // dispobjSetNotificationShare -- virtual inherited (notify) base (dispapi) - pThis->__dispobjSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispobjSetNotificationShare; - - // dispobjUnregisterEvent -- virtual inherited (notify) base (dispapi) - pThis->__dispobjUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispobjUnregisterEvent; - - // dispobjGetOrAllocNotifShare -- virtual inherited (notify) base (dispapi) - pThis->__dispobjGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispobjGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_DispObject_1 with approximately 46 basic block(s). +} // End __nvoc_init_funcTable_DispObject_1 with approximately 20 basic block(s). // Initialize vtable(s) for 46 virtual method(s). void __nvoc_init_funcTable_DispObject(DispObject *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 46 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__DispObject vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__dispobjControl__ = &__nvoc_up_thunk_DisplayApi_dispobjControl, // virtual inherited (dispapi) base (dispapi) + .DisplayApi.__dispapiControl__ = &dispapiControl_IMPL, // virtual override (res) base (rmres) + .DisplayApi.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_DisplayApi_resControl, // virtual + .__dispobjControl_Prologue__ = &__nvoc_up_thunk_DisplayApi_dispobjControl_Prologue, // virtual inherited (dispapi) base (dispapi) + .DisplayApi.__dispapiControl_Prologue__ = &dispapiControl_Prologue_IMPL, // virtual override (res) base (rmres) + .DisplayApi.RmResource.__rmresControl_Prologue__ = &__nvoc_down_thunk_DisplayApi_rmresControl_Prologue, // virtual override (res) base (res) + .DisplayApi.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__dispobjControl_Epilogue__ = &__nvoc_up_thunk_DisplayApi_dispobjControl_Epilogue, // virtual inherited (dispapi) base (dispapi) + .DisplayApi.__dispapiControl_Epilogue__ = &dispapiControl_Epilogue_IMPL, // virtual override (res) base (rmres) + .DisplayApi.RmResource.__rmresControl_Epilogue__ = &__nvoc_down_thunk_DisplayApi_rmresControl_Epilogue, // virtual override (res) base (res) + .DisplayApi.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__dispobjAccessCallback__ = &__nvoc_up_thunk_RmResource_dispobjAccessCallback, // virtual inherited (rmres) base (dispapi) + .DisplayApi.__dispapiAccessCallback__ = &__nvoc_up_thunk_RmResource_dispapiAccessCallback, // virtual inherited (rmres) base (rmres) + .DisplayApi.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .DisplayApi.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__dispobjShareCallback__ = &__nvoc_up_thunk_RmResource_dispobjShareCallback, // virtual inherited (rmres) base (dispapi) + .DisplayApi.__dispapiShareCallback__ = &__nvoc_up_thunk_RmResource_dispapiShareCallback, // virtual inherited (rmres) base (rmres) + .DisplayApi.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .DisplayApi.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__dispobjGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispobjGetMemInterMapParams, // virtual inherited (rmres) base (dispapi) + .DisplayApi.__dispapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispapiGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .DisplayApi.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__dispobjCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispobjCheckMemInterUnmap, // virtual inherited (rmres) base (dispapi) + .DisplayApi.__dispapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispapiCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .DisplayApi.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__dispobjGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispobjGetMemoryMappingDescriptor, // virtual inherited (rmres) base (dispapi) + .DisplayApi.__dispapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .DisplayApi.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__dispobjControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispobjControlSerialization_Prologue, // virtual inherited (rmres) base (dispapi) + .DisplayApi.__dispapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispapiControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .DisplayApi.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .DisplayApi.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__dispobjControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispobjControlSerialization_Epilogue, // virtual inherited (rmres) base (dispapi) + .DisplayApi.__dispapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispapiControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .DisplayApi.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .DisplayApi.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__dispobjCanCopy__ = &__nvoc_up_thunk_RsResource_dispobjCanCopy, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiCanCopy__ = &__nvoc_up_thunk_RsResource_dispapiCanCopy, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__dispobjIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispobjIsDuplicate, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispapiIsDuplicate, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__dispobjPreDestruct__ = &__nvoc_up_thunk_RsResource_dispobjPreDestruct, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiPreDestruct__ = &__nvoc_up_thunk_RsResource_dispapiPreDestruct, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__dispobjControlFilter__ = &__nvoc_up_thunk_RsResource_dispobjControlFilter, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiControlFilter__ = &__nvoc_up_thunk_RsResource_dispapiControlFilter, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__dispobjMap__ = &__nvoc_up_thunk_RsResource_dispobjMap, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiMap__ = &__nvoc_up_thunk_RsResource_dispapiMap, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resMap__ = &resMap_IMPL, // virtual + .__dispobjUnmap__ = &__nvoc_up_thunk_RsResource_dispobjUnmap, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiUnmap__ = &__nvoc_up_thunk_RsResource_dispapiUnmap, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__dispobjIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispobjIsPartialUnmapSupported, // inline virtual inherited (res) base (dispapi) body + .DisplayApi.__dispapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispapiIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .DisplayApi.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .DisplayApi.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__dispobjMapTo__ = &__nvoc_up_thunk_RsResource_dispobjMapTo, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiMapTo__ = &__nvoc_up_thunk_RsResource_dispapiMapTo, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__dispobjUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispobjUnmapFrom, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispapiUnmapFrom, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__dispobjGetRefCount__ = &__nvoc_up_thunk_RsResource_dispobjGetRefCount, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiGetRefCount__ = &__nvoc_up_thunk_RsResource_dispapiGetRefCount, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__dispobjAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispobjAddAdditionalDependants, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispapiAddAdditionalDependants, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__dispobjGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispobjGetNotificationListPtr, // virtual inherited (notify) base (dispapi) + .DisplayApi.__dispapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispapiGetNotificationListPtr, // virtual inherited (notify) base (notify) + .DisplayApi.Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .DisplayApi.Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__dispobjGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispobjGetNotificationShare, // virtual inherited (notify) base (dispapi) + .DisplayApi.__dispapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispapiGetNotificationShare, // virtual inherited (notify) base (notify) + .DisplayApi.Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .DisplayApi.Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__dispobjSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispobjSetNotificationShare, // virtual inherited (notify) base (dispapi) + .DisplayApi.__dispapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispapiSetNotificationShare, // virtual inherited (notify) base (notify) + .DisplayApi.Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .DisplayApi.Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__dispobjUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispobjUnregisterEvent, // virtual inherited (notify) base (dispapi) + .DisplayApi.__dispapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispapiUnregisterEvent, // virtual inherited (notify) base (notify) + .DisplayApi.Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .DisplayApi.Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__dispobjGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispobjGetOrAllocNotifShare, // virtual inherited (notify) base (dispapi) + .DisplayApi.__dispapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispapiGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .DisplayApi.Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .DisplayApi.Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.DisplayApi.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable = &vtable.DisplayApi.RmResource; // (rmres) super^2 + pThis->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.DisplayApi.Notifier.INotifier; // (inotify) super^3 + pThis->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable = &vtable.DisplayApi.Notifier; // (notify) super^2 + pThis->__nvoc_base_DisplayApi.__nvoc_vtable = &vtable.DisplayApi; // (dispapi) super + pThis->__nvoc_vtable = &vtable; // (dispobj) this + + // Initialize vtable(s) with 20 per-object function pointer(s). __nvoc_init_funcTable_DispObject_1(pThis, pRmhalspecowner); } @@ -1575,135 +1785,240 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_NvDispAp }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super^3 +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super^3 +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super^3 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super^3 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super^3 +NV_STATUS __nvoc_down_thunk_DisplayApi_resControl(struct RsResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_DisplayApi_rmresControl_Prologue(struct RmResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); // super^2 +void __nvoc_down_thunk_DisplayApi_rmresControl_Epilogue(struct RmResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); // super^2 + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^3 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^3 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^3 +NvBool __nvoc_up_thunk_RmResource_dispapiAccessCallback(struct DisplayApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_up_thunk_RmResource_dispapiShareCallback(struct DisplayApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_dispapiGetMemInterMapParams(struct DisplayApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_dispapiCheckMemInterUnmap(struct DisplayApi *pRmResource, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_dispapiGetMemoryMappingDescriptor(struct DisplayApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_dispapiControlSerialization_Prologue(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_dispapiControlSerialization_Epilogue(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_dispapiCanCopy(struct DisplayApi *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_dispapiIsDuplicate(struct DisplayApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_dispapiPreDestruct(struct DisplayApi *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_dispapiControlFilter(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_dispapiMap(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_dispapiUnmap(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_dispapiIsPartialUnmapSupported(struct DisplayApi *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_dispapiMapTo(struct DisplayApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_dispapiUnmapFrom(struct DisplayApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_dispapiGetRefCount(struct DisplayApi *pResource); // super^2 +void __nvoc_up_thunk_RsResource_dispapiAddAdditionalDependants(struct RsClient *pClient, struct DisplayApi *pResource, RsResourceRef *pReference); // super^2 +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispapiGetNotificationListPtr(struct DisplayApi *pNotifier); // super^2 +struct NotifShare * __nvoc_up_thunk_Notifier_dispapiGetNotificationShare(struct DisplayApi *pNotifier); // super^2 +void __nvoc_up_thunk_Notifier_dispapiSetNotificationShare(struct DisplayApi *pNotifier, struct NotifShare *pNotifShare); // super^2 +NV_STATUS __nvoc_up_thunk_Notifier_dispapiUnregisterEvent(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super^2 +NV_STATUS __nvoc_up_thunk_Notifier_dispapiGetOrAllocNotifShare(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super^2 +NV_STATUS __nvoc_up_thunk_DisplayApi_dispobjControl(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_DisplayApi_dispobjControl_Prologue(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); // super +void __nvoc_up_thunk_DisplayApi_dispobjControl_Epilogue(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); // super +NvBool __nvoc_up_thunk_RmResource_dispobjAccessCallback(struct DispObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_dispobjShareCallback(struct DispObject *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispobjGetMemInterMapParams(struct DispObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispobjCheckMemInterUnmap(struct DispObject *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispobjGetMemoryMappingDescriptor(struct DispObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispobjControlSerialization_Prologue(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_dispobjControlSerialization_Epilogue(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_dispobjCanCopy(struct DispObject *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispobjIsDuplicate(struct DispObject *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_dispobjPreDestruct(struct DispObject *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispobjControlFilter(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispobjMap(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispobjUnmap(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_dispobjIsPartialUnmapSupported(struct DispObject *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispobjMapTo(struct DispObject *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispobjUnmapFrom(struct DispObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_dispobjGetRefCount(struct DispObject *pResource); // super +void __nvoc_up_thunk_RsResource_dispobjAddAdditionalDependants(struct RsClient *pClient, struct DispObject *pResource, RsResourceRef *pReference); // super +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispobjGetNotificationListPtr(struct DispObject *pNotifier); // super +struct NotifShare * __nvoc_up_thunk_Notifier_dispobjGetNotificationShare(struct DispObject *pNotifier); // super +void __nvoc_up_thunk_Notifier_dispobjSetNotificationShare(struct DispObject *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_up_thunk_Notifier_dispobjUnregisterEvent(struct DispObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_up_thunk_Notifier_dispobjGetOrAllocNotifShare(struct DispObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_up_thunk_DisplayApi_nvdispapiControl(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_DisplayApi_nvdispapiControl_Prologue(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); // this +void __nvoc_up_thunk_DisplayApi_nvdispapiControl_Epilogue(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); // this +NvBool __nvoc_up_thunk_RmResource_nvdispapiAccessCallback(struct NvDispApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_nvdispapiShareCallback(struct NvDispApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_nvdispapiGetMemInterMapParams(struct NvDispApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_nvdispapiCheckMemInterUnmap(struct NvDispApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_nvdispapiGetMemoryMappingDescriptor(struct NvDispApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_nvdispapiControlSerialization_Prologue(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_nvdispapiControlSerialization_Epilogue(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_nvdispapiCanCopy(struct NvDispApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiIsDuplicate(struct NvDispApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_nvdispapiPreDestruct(struct NvDispApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiControlFilter(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiMap(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiUnmap(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_nvdispapiIsPartialUnmapSupported(struct NvDispApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiMapTo(struct NvDispApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiUnmapFrom(struct NvDispApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_nvdispapiGetRefCount(struct NvDispApi *pResource); // this +void __nvoc_up_thunk_RsResource_nvdispapiAddAdditionalDependants(struct RsClient *pClient, struct NvDispApi *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_nvdispapiGetNotificationListPtr(struct NvDispApi *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_nvdispapiGetNotificationShare(struct NvDispApi *pNotifier); // this +void __nvoc_up_thunk_Notifier_nvdispapiSetNotificationShare(struct NvDispApi *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_nvdispapiUnregisterEvent(struct NvDispApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_nvdispapiGetOrAllocNotifShare(struct NvDispApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 26 up-thunk(s) defined to bridge methods in NvDispApi to superclasses // nvdispapiControl: virtual inherited (dispapi) base (dispobj) -static NV_STATUS __nvoc_up_thunk_DisplayApi_nvdispapiControl(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_DisplayApi_nvdispapiControl(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return dispapiControl((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_NvDispApi_DisplayApi.offset), pCallContext, pParams); } // nvdispapiControl_Prologue: virtual inherited (dispapi) base (dispobj) -static NV_STATUS __nvoc_up_thunk_DisplayApi_nvdispapiControl_Prologue(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { +NV_STATUS __nvoc_up_thunk_DisplayApi_nvdispapiControl_Prologue(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { return dispapiControl_Prologue((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_NvDispApi_DisplayApi.offset), pCallContext, pRsParams); } // nvdispapiControl_Epilogue: virtual inherited (dispapi) base (dispobj) -static void __nvoc_up_thunk_DisplayApi_nvdispapiControl_Epilogue(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { +void __nvoc_up_thunk_DisplayApi_nvdispapiControl_Epilogue(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { dispapiControl_Epilogue((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_NvDispApi_DisplayApi.offset), pCallContext, pRsParams); } // nvdispapiAccessCallback: virtual inherited (rmres) base (dispobj) -static NvBool __nvoc_up_thunk_RmResource_nvdispapiAccessCallback(struct NvDispApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_nvdispapiAccessCallback(struct NvDispApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // nvdispapiShareCallback: virtual inherited (rmres) base (dispobj) -static NvBool __nvoc_up_thunk_RmResource_nvdispapiShareCallback(struct NvDispApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_nvdispapiShareCallback(struct NvDispApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // nvdispapiGetMemInterMapParams: virtual inherited (rmres) base (dispobj) -static NV_STATUS __nvoc_up_thunk_RmResource_nvdispapiGetMemInterMapParams(struct NvDispApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_nvdispapiGetMemInterMapParams(struct NvDispApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvDispApi_RmResource.offset), pParams); } // nvdispapiCheckMemInterUnmap: virtual inherited (rmres) base (dispobj) -static NV_STATUS __nvoc_up_thunk_RmResource_nvdispapiCheckMemInterUnmap(struct NvDispApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_nvdispapiCheckMemInterUnmap(struct NvDispApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvDispApi_RmResource.offset), bSubdeviceHandleProvided); } // nvdispapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (dispobj) -static NV_STATUS __nvoc_up_thunk_RmResource_nvdispapiGetMemoryMappingDescriptor(struct NvDispApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_nvdispapiGetMemoryMappingDescriptor(struct NvDispApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvDispApi_RmResource.offset), ppMemDesc); } // nvdispapiControlSerialization_Prologue: virtual inherited (rmres) base (dispobj) -static NV_STATUS __nvoc_up_thunk_RmResource_nvdispapiControlSerialization_Prologue(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_nvdispapiControlSerialization_Prologue(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RmResource.offset), pCallContext, pParams); } // nvdispapiControlSerialization_Epilogue: virtual inherited (rmres) base (dispobj) -static void __nvoc_up_thunk_RmResource_nvdispapiControlSerialization_Epilogue(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_nvdispapiControlSerialization_Epilogue(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RmResource.offset), pCallContext, pParams); } // nvdispapiCanCopy: virtual inherited (res) base (dispobj) -static NvBool __nvoc_up_thunk_RsResource_nvdispapiCanCopy(struct NvDispApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_nvdispapiCanCopy(struct NvDispApi *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RsResource.offset)); } // nvdispapiIsDuplicate: virtual inherited (res) base (dispobj) -static NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiIsDuplicate(struct NvDispApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiIsDuplicate(struct NvDispApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RsResource.offset), hMemory, pDuplicate); } // nvdispapiPreDestruct: virtual inherited (res) base (dispobj) -static void __nvoc_up_thunk_RsResource_nvdispapiPreDestruct(struct NvDispApi *pResource) { +void __nvoc_up_thunk_RsResource_nvdispapiPreDestruct(struct NvDispApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RsResource.offset)); } // nvdispapiControlFilter: virtual inherited (res) base (dispobj) -static NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiControlFilter(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiControlFilter(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RsResource.offset), pCallContext, pParams); } // nvdispapiMap: virtual inherited (res) base (dispobj) -static NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiMap(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiMap(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RsResource.offset), pCallContext, pParams, pCpuMapping); } // nvdispapiUnmap: virtual inherited (res) base (dispobj) -static NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiUnmap(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiUnmap(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RsResource.offset), pCallContext, pCpuMapping); } // nvdispapiIsPartialUnmapSupported: inline virtual inherited (res) base (dispobj) body -static NvBool __nvoc_up_thunk_RsResource_nvdispapiIsPartialUnmapSupported(struct NvDispApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_nvdispapiIsPartialUnmapSupported(struct NvDispApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RsResource.offset)); } // nvdispapiMapTo: virtual inherited (res) base (dispobj) -static NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiMapTo(struct NvDispApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiMapTo(struct NvDispApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RsResource.offset), pParams); } // nvdispapiUnmapFrom: virtual inherited (res) base (dispobj) -static NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiUnmapFrom(struct NvDispApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_nvdispapiUnmapFrom(struct NvDispApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RsResource.offset), pParams); } // nvdispapiGetRefCount: virtual inherited (res) base (dispobj) -static NvU32 __nvoc_up_thunk_RsResource_nvdispapiGetRefCount(struct NvDispApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_nvdispapiGetRefCount(struct NvDispApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RsResource.offset)); } // nvdispapiAddAdditionalDependants: virtual inherited (res) base (dispobj) -static void __nvoc_up_thunk_RsResource_nvdispapiAddAdditionalDependants(struct RsClient *pClient, struct NvDispApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_nvdispapiAddAdditionalDependants(struct RsClient *pClient, struct NvDispApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvDispApi_RsResource.offset), pReference); } // nvdispapiGetNotificationListPtr: virtual inherited (notify) base (dispobj) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_nvdispapiGetNotificationListPtr(struct NvDispApi *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_nvdispapiGetNotificationListPtr(struct NvDispApi *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvDispApi_Notifier.offset)); } // nvdispapiGetNotificationShare: virtual inherited (notify) base (dispobj) -static struct NotifShare * __nvoc_up_thunk_Notifier_nvdispapiGetNotificationShare(struct NvDispApi *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_nvdispapiGetNotificationShare(struct NvDispApi *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvDispApi_Notifier.offset)); } // nvdispapiSetNotificationShare: virtual inherited (notify) base (dispobj) -static void __nvoc_up_thunk_Notifier_nvdispapiSetNotificationShare(struct NvDispApi *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_nvdispapiSetNotificationShare(struct NvDispApi *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvDispApi_Notifier.offset), pNotifShare); } // nvdispapiUnregisterEvent: virtual inherited (notify) base (dispobj) -static NV_STATUS __nvoc_up_thunk_Notifier_nvdispapiUnregisterEvent(struct NvDispApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_nvdispapiUnregisterEvent(struct NvDispApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvDispApi_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // nvdispapiGetOrAllocNotifShare: virtual inherited (notify) base (dispobj) -static NV_STATUS __nvoc_up_thunk_Notifier_nvdispapiGetOrAllocNotifShare(struct NvDispApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_nvdispapiGetOrAllocNotifShare(struct NvDispApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvDispApi_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -1781,91 +2096,167 @@ static void __nvoc_init_funcTable_NvDispApi_1(NvDispApi *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__nvdispapiCtrlCmdSetForceModeswitchFlagsOverrides__ = &nvdispapiCtrlCmdSetForceModeswitchFlagsOverrides_IMPL; #endif - - // nvdispapiControl -- virtual inherited (dispapi) base (dispobj) - pThis->__nvdispapiControl__ = &__nvoc_up_thunk_DisplayApi_nvdispapiControl; - - // nvdispapiControl_Prologue -- virtual inherited (dispapi) base (dispobj) - pThis->__nvdispapiControl_Prologue__ = &__nvoc_up_thunk_DisplayApi_nvdispapiControl_Prologue; - - // nvdispapiControl_Epilogue -- virtual inherited (dispapi) base (dispobj) - pThis->__nvdispapiControl_Epilogue__ = &__nvoc_up_thunk_DisplayApi_nvdispapiControl_Epilogue; - - // nvdispapiAccessCallback -- virtual inherited (rmres) base (dispobj) - pThis->__nvdispapiAccessCallback__ = &__nvoc_up_thunk_RmResource_nvdispapiAccessCallback; - - // nvdispapiShareCallback -- virtual inherited (rmres) base (dispobj) - pThis->__nvdispapiShareCallback__ = &__nvoc_up_thunk_RmResource_nvdispapiShareCallback; - - // nvdispapiGetMemInterMapParams -- virtual inherited (rmres) base (dispobj) - pThis->__nvdispapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_nvdispapiGetMemInterMapParams; - - // nvdispapiCheckMemInterUnmap -- virtual inherited (rmres) base (dispobj) - pThis->__nvdispapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_nvdispapiCheckMemInterUnmap; - - // nvdispapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (dispobj) - pThis->__nvdispapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_nvdispapiGetMemoryMappingDescriptor; - - // nvdispapiControlSerialization_Prologue -- virtual inherited (rmres) base (dispobj) - pThis->__nvdispapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_nvdispapiControlSerialization_Prologue; - - // nvdispapiControlSerialization_Epilogue -- virtual inherited (rmres) base (dispobj) - pThis->__nvdispapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_nvdispapiControlSerialization_Epilogue; - - // nvdispapiCanCopy -- virtual inherited (res) base (dispobj) - pThis->__nvdispapiCanCopy__ = &__nvoc_up_thunk_RsResource_nvdispapiCanCopy; - - // nvdispapiIsDuplicate -- virtual inherited (res) base (dispobj) - pThis->__nvdispapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_nvdispapiIsDuplicate; - - // nvdispapiPreDestruct -- virtual inherited (res) base (dispobj) - pThis->__nvdispapiPreDestruct__ = &__nvoc_up_thunk_RsResource_nvdispapiPreDestruct; - - // nvdispapiControlFilter -- virtual inherited (res) base (dispobj) - pThis->__nvdispapiControlFilter__ = &__nvoc_up_thunk_RsResource_nvdispapiControlFilter; - - // nvdispapiMap -- virtual inherited (res) base (dispobj) - pThis->__nvdispapiMap__ = &__nvoc_up_thunk_RsResource_nvdispapiMap; - - // nvdispapiUnmap -- virtual inherited (res) base (dispobj) - pThis->__nvdispapiUnmap__ = &__nvoc_up_thunk_RsResource_nvdispapiUnmap; - - // nvdispapiIsPartialUnmapSupported -- inline virtual inherited (res) base (dispobj) body - pThis->__nvdispapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_nvdispapiIsPartialUnmapSupported; - - // nvdispapiMapTo -- virtual inherited (res) base (dispobj) - pThis->__nvdispapiMapTo__ = &__nvoc_up_thunk_RsResource_nvdispapiMapTo; - - // nvdispapiUnmapFrom -- virtual inherited (res) base (dispobj) - pThis->__nvdispapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_nvdispapiUnmapFrom; - - // nvdispapiGetRefCount -- virtual inherited (res) base (dispobj) - pThis->__nvdispapiGetRefCount__ = &__nvoc_up_thunk_RsResource_nvdispapiGetRefCount; - - // nvdispapiAddAdditionalDependants -- virtual inherited (res) base (dispobj) - pThis->__nvdispapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_nvdispapiAddAdditionalDependants; - - // nvdispapiGetNotificationListPtr -- virtual inherited (notify) base (dispobj) - pThis->__nvdispapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_nvdispapiGetNotificationListPtr; - - // nvdispapiGetNotificationShare -- virtual inherited (notify) base (dispobj) - pThis->__nvdispapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_nvdispapiGetNotificationShare; - - // nvdispapiSetNotificationShare -- virtual inherited (notify) base (dispobj) - pThis->__nvdispapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_nvdispapiSetNotificationShare; - - // nvdispapiUnregisterEvent -- virtual inherited (notify) base (dispobj) - pThis->__nvdispapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_nvdispapiUnregisterEvent; - - // nvdispapiGetOrAllocNotifShare -- virtual inherited (notify) base (dispobj) - pThis->__nvdispapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_nvdispapiGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_NvDispApi_1 with approximately 33 basic block(s). +} // End __nvoc_init_funcTable_NvDispApi_1 with approximately 7 basic block(s). // Initialize vtable(s) for 33 virtual method(s). void __nvoc_init_funcTable_NvDispApi(NvDispApi *pThis) { - // Initialize vtable(s) with 33 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__NvDispApi vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif + .__nvdispapiControl__ = &__nvoc_up_thunk_DisplayApi_nvdispapiControl, // virtual inherited (dispapi) base (dispobj) + .DispObject.__dispobjControl__ = &__nvoc_up_thunk_DisplayApi_dispobjControl, // virtual inherited (dispapi) base (dispapi) + .DispObject.DisplayApi.__dispapiControl__ = &dispapiControl_IMPL, // virtual override (res) base (rmres) + .DispObject.DisplayApi.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .DispObject.DisplayApi.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_DisplayApi_resControl, // virtual + .__nvdispapiControl_Prologue__ = &__nvoc_up_thunk_DisplayApi_nvdispapiControl_Prologue, // virtual inherited (dispapi) base (dispobj) + .DispObject.__dispobjControl_Prologue__ = &__nvoc_up_thunk_DisplayApi_dispobjControl_Prologue, // virtual inherited (dispapi) base (dispapi) + .DispObject.DisplayApi.__dispapiControl_Prologue__ = &dispapiControl_Prologue_IMPL, // virtual override (res) base (rmres) + .DispObject.DisplayApi.RmResource.__rmresControl_Prologue__ = &__nvoc_down_thunk_DisplayApi_rmresControl_Prologue, // virtual override (res) base (res) + .DispObject.DisplayApi.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__nvdispapiControl_Epilogue__ = &__nvoc_up_thunk_DisplayApi_nvdispapiControl_Epilogue, // virtual inherited (dispapi) base (dispobj) + .DispObject.__dispobjControl_Epilogue__ = &__nvoc_up_thunk_DisplayApi_dispobjControl_Epilogue, // virtual inherited (dispapi) base (dispapi) + .DispObject.DisplayApi.__dispapiControl_Epilogue__ = &dispapiControl_Epilogue_IMPL, // virtual override (res) base (rmres) + .DispObject.DisplayApi.RmResource.__rmresControl_Epilogue__ = &__nvoc_down_thunk_DisplayApi_rmresControl_Epilogue, // virtual override (res) base (res) + .DispObject.DisplayApi.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__nvdispapiAccessCallback__ = &__nvoc_up_thunk_RmResource_nvdispapiAccessCallback, // virtual inherited (rmres) base (dispobj) + .DispObject.__dispobjAccessCallback__ = &__nvoc_up_thunk_RmResource_dispobjAccessCallback, // virtual inherited (rmres) base (dispapi) + .DispObject.DisplayApi.__dispapiAccessCallback__ = &__nvoc_up_thunk_RmResource_dispapiAccessCallback, // virtual inherited (rmres) base (rmres) + .DispObject.DisplayApi.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .DispObject.DisplayApi.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__nvdispapiShareCallback__ = &__nvoc_up_thunk_RmResource_nvdispapiShareCallback, // virtual inherited (rmres) base (dispobj) + .DispObject.__dispobjShareCallback__ = &__nvoc_up_thunk_RmResource_dispobjShareCallback, // virtual inherited (rmres) base (dispapi) + .DispObject.DisplayApi.__dispapiShareCallback__ = &__nvoc_up_thunk_RmResource_dispapiShareCallback, // virtual inherited (rmres) base (rmres) + .DispObject.DisplayApi.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .DispObject.DisplayApi.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__nvdispapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_nvdispapiGetMemInterMapParams, // virtual inherited (rmres) base (dispobj) + .DispObject.__dispobjGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispobjGetMemInterMapParams, // virtual inherited (rmres) base (dispapi) + .DispObject.DisplayApi.__dispapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispapiGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .DispObject.DisplayApi.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__nvdispapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_nvdispapiCheckMemInterUnmap, // virtual inherited (rmres) base (dispobj) + .DispObject.__dispobjCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispobjCheckMemInterUnmap, // virtual inherited (rmres) base (dispapi) + .DispObject.DisplayApi.__dispapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispapiCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .DispObject.DisplayApi.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__nvdispapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_nvdispapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (dispobj) + .DispObject.__dispobjGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispobjGetMemoryMappingDescriptor, // virtual inherited (rmres) base (dispapi) + .DispObject.DisplayApi.__dispapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .DispObject.DisplayApi.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__nvdispapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_nvdispapiControlSerialization_Prologue, // virtual inherited (rmres) base (dispobj) + .DispObject.__dispobjControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispobjControlSerialization_Prologue, // virtual inherited (rmres) base (dispapi) + .DispObject.DisplayApi.__dispapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispapiControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .DispObject.DisplayApi.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .DispObject.DisplayApi.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__nvdispapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_nvdispapiControlSerialization_Epilogue, // virtual inherited (rmres) base (dispobj) + .DispObject.__dispobjControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispobjControlSerialization_Epilogue, // virtual inherited (rmres) base (dispapi) + .DispObject.DisplayApi.__dispapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispapiControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .DispObject.DisplayApi.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .DispObject.DisplayApi.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__nvdispapiCanCopy__ = &__nvoc_up_thunk_RsResource_nvdispapiCanCopy, // virtual inherited (res) base (dispobj) + .DispObject.__dispobjCanCopy__ = &__nvoc_up_thunk_RsResource_dispobjCanCopy, // virtual inherited (res) base (dispapi) + .DispObject.DisplayApi.__dispapiCanCopy__ = &__nvoc_up_thunk_RsResource_dispapiCanCopy, // virtual inherited (res) base (rmres) + .DispObject.DisplayApi.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .DispObject.DisplayApi.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__nvdispapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_nvdispapiIsDuplicate, // virtual inherited (res) base (dispobj) + .DispObject.__dispobjIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispobjIsDuplicate, // virtual inherited (res) base (dispapi) + .DispObject.DisplayApi.__dispapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispapiIsDuplicate, // virtual inherited (res) base (rmres) + .DispObject.DisplayApi.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .DispObject.DisplayApi.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__nvdispapiPreDestruct__ = &__nvoc_up_thunk_RsResource_nvdispapiPreDestruct, // virtual inherited (res) base (dispobj) + .DispObject.__dispobjPreDestruct__ = &__nvoc_up_thunk_RsResource_dispobjPreDestruct, // virtual inherited (res) base (dispapi) + .DispObject.DisplayApi.__dispapiPreDestruct__ = &__nvoc_up_thunk_RsResource_dispapiPreDestruct, // virtual inherited (res) base (rmres) + .DispObject.DisplayApi.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .DispObject.DisplayApi.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__nvdispapiControlFilter__ = &__nvoc_up_thunk_RsResource_nvdispapiControlFilter, // virtual inherited (res) base (dispobj) + .DispObject.__dispobjControlFilter__ = &__nvoc_up_thunk_RsResource_dispobjControlFilter, // virtual inherited (res) base (dispapi) + .DispObject.DisplayApi.__dispapiControlFilter__ = &__nvoc_up_thunk_RsResource_dispapiControlFilter, // virtual inherited (res) base (rmres) + .DispObject.DisplayApi.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .DispObject.DisplayApi.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__nvdispapiMap__ = &__nvoc_up_thunk_RsResource_nvdispapiMap, // virtual inherited (res) base (dispobj) + .DispObject.__dispobjMap__ = &__nvoc_up_thunk_RsResource_dispobjMap, // virtual inherited (res) base (dispapi) + .DispObject.DisplayApi.__dispapiMap__ = &__nvoc_up_thunk_RsResource_dispapiMap, // virtual inherited (res) base (rmres) + .DispObject.DisplayApi.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .DispObject.DisplayApi.RmResource.RsResource.__resMap__ = &resMap_IMPL, // virtual + .__nvdispapiUnmap__ = &__nvoc_up_thunk_RsResource_nvdispapiUnmap, // virtual inherited (res) base (dispobj) + .DispObject.__dispobjUnmap__ = &__nvoc_up_thunk_RsResource_dispobjUnmap, // virtual inherited (res) base (dispapi) + .DispObject.DisplayApi.__dispapiUnmap__ = &__nvoc_up_thunk_RsResource_dispapiUnmap, // virtual inherited (res) base (rmres) + .DispObject.DisplayApi.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .DispObject.DisplayApi.RmResource.RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__nvdispapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_nvdispapiIsPartialUnmapSupported, // inline virtual inherited (res) base (dispobj) body + .DispObject.__dispobjIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispobjIsPartialUnmapSupported, // inline virtual inherited (res) base (dispapi) body + .DispObject.DisplayApi.__dispapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispapiIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .DispObject.DisplayApi.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .DispObject.DisplayApi.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__nvdispapiMapTo__ = &__nvoc_up_thunk_RsResource_nvdispapiMapTo, // virtual inherited (res) base (dispobj) + .DispObject.__dispobjMapTo__ = &__nvoc_up_thunk_RsResource_dispobjMapTo, // virtual inherited (res) base (dispapi) + .DispObject.DisplayApi.__dispapiMapTo__ = &__nvoc_up_thunk_RsResource_dispapiMapTo, // virtual inherited (res) base (rmres) + .DispObject.DisplayApi.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .DispObject.DisplayApi.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__nvdispapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_nvdispapiUnmapFrom, // virtual inherited (res) base (dispobj) + .DispObject.__dispobjUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispobjUnmapFrom, // virtual inherited (res) base (dispapi) + .DispObject.DisplayApi.__dispapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispapiUnmapFrom, // virtual inherited (res) base (rmres) + .DispObject.DisplayApi.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .DispObject.DisplayApi.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__nvdispapiGetRefCount__ = &__nvoc_up_thunk_RsResource_nvdispapiGetRefCount, // virtual inherited (res) base (dispobj) + .DispObject.__dispobjGetRefCount__ = &__nvoc_up_thunk_RsResource_dispobjGetRefCount, // virtual inherited (res) base (dispapi) + .DispObject.DisplayApi.__dispapiGetRefCount__ = &__nvoc_up_thunk_RsResource_dispapiGetRefCount, // virtual inherited (res) base (rmres) + .DispObject.DisplayApi.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .DispObject.DisplayApi.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__nvdispapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_nvdispapiAddAdditionalDependants, // virtual inherited (res) base (dispobj) + .DispObject.__dispobjAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispobjAddAdditionalDependants, // virtual inherited (res) base (dispapi) + .DispObject.DisplayApi.__dispapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispapiAddAdditionalDependants, // virtual inherited (res) base (rmres) + .DispObject.DisplayApi.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .DispObject.DisplayApi.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__nvdispapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_nvdispapiGetNotificationListPtr, // virtual inherited (notify) base (dispobj) + .DispObject.__dispobjGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispobjGetNotificationListPtr, // virtual inherited (notify) base (dispapi) + .DispObject.DisplayApi.__dispapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispapiGetNotificationListPtr, // virtual inherited (notify) base (notify) + .DispObject.DisplayApi.Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .DispObject.DisplayApi.Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__nvdispapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_nvdispapiGetNotificationShare, // virtual inherited (notify) base (dispobj) + .DispObject.__dispobjGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispobjGetNotificationShare, // virtual inherited (notify) base (dispapi) + .DispObject.DisplayApi.__dispapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispapiGetNotificationShare, // virtual inherited (notify) base (notify) + .DispObject.DisplayApi.Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .DispObject.DisplayApi.Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__nvdispapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_nvdispapiSetNotificationShare, // virtual inherited (notify) base (dispobj) + .DispObject.__dispobjSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispobjSetNotificationShare, // virtual inherited (notify) base (dispapi) + .DispObject.DisplayApi.__dispapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispapiSetNotificationShare, // virtual inherited (notify) base (notify) + .DispObject.DisplayApi.Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .DispObject.DisplayApi.Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__nvdispapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_nvdispapiUnregisterEvent, // virtual inherited (notify) base (dispobj) + .DispObject.__dispobjUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispobjUnregisterEvent, // virtual inherited (notify) base (dispapi) + .DispObject.DisplayApi.__dispapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispapiUnregisterEvent, // virtual inherited (notify) base (notify) + .DispObject.DisplayApi.Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .DispObject.DisplayApi.Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__nvdispapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_nvdispapiGetOrAllocNotifShare, // virtual inherited (notify) base (dispobj) + .DispObject.__dispobjGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispobjGetOrAllocNotifShare, // virtual inherited (notify) base (dispapi) + .DispObject.DisplayApi.__dispapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispapiGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .DispObject.DisplayApi.Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .DispObject.DisplayApi.Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.DispObject.DisplayApi.RmResource.RsResource; // (res) super^4 + pThis->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable = &vtable.DispObject.DisplayApi.RmResource; // (rmres) super^3 + pThis->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.DispObject.DisplayApi.Notifier.INotifier; // (inotify) super^4 + pThis->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable = &vtable.DispObject.DisplayApi.Notifier; // (notify) super^3 + pThis->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_vtable = &vtable.DispObject.DisplayApi; // (dispapi) super^2 + pThis->__nvoc_base_DispObject.__nvoc_vtable = &vtable.DispObject; // (dispobj) super + pThis->__nvoc_vtable = &vtable; // (nvdispapi) this + + // Initialize vtable(s) with 7 per-object function pointer(s). __nvoc_init_funcTable_NvDispApi_1(pThis); } @@ -2133,135 +2524,214 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispSwOb }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super^2 +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super^2 +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_DisplayApi_resControl(struct RsResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_DisplayApi_rmresControl_Prologue(struct RmResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); // super +void __nvoc_down_thunk_DisplayApi_rmresControl_Epilogue(struct RmResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_dispapiAccessCallback(struct DisplayApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_dispapiShareCallback(struct DisplayApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispapiGetMemInterMapParams(struct DisplayApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispapiCheckMemInterUnmap(struct DisplayApi *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispapiGetMemoryMappingDescriptor(struct DisplayApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispapiControlSerialization_Prologue(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_dispapiControlSerialization_Epilogue(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_dispapiCanCopy(struct DisplayApi *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispapiIsDuplicate(struct DisplayApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_dispapiPreDestruct(struct DisplayApi *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispapiControlFilter(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispapiMap(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispapiUnmap(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_dispapiIsPartialUnmapSupported(struct DisplayApi *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispapiMapTo(struct DisplayApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispapiUnmapFrom(struct DisplayApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_dispapiGetRefCount(struct DisplayApi *pResource); // super +void __nvoc_up_thunk_RsResource_dispapiAddAdditionalDependants(struct RsClient *pClient, struct DisplayApi *pResource, RsResourceRef *pReference); // super +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispapiGetNotificationListPtr(struct DisplayApi *pNotifier); // super +struct NotifShare * __nvoc_up_thunk_Notifier_dispapiGetNotificationShare(struct DisplayApi *pNotifier); // super +void __nvoc_up_thunk_Notifier_dispapiSetNotificationShare(struct DisplayApi *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_up_thunk_Notifier_dispapiUnregisterEvent(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_up_thunk_Notifier_dispapiGetOrAllocNotifShare(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_up_thunk_DisplayApi_dispswobjControl(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_DisplayApi_dispswobjControl_Prologue(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); // this +void __nvoc_up_thunk_DisplayApi_dispswobjControl_Epilogue(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); // this +NvBool __nvoc_up_thunk_RmResource_dispswobjAccessCallback(struct DispSwObj *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_dispswobjShareCallback(struct DispSwObj *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispswobjGetMemInterMapParams(struct DispSwObj *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispswobjCheckMemInterUnmap(struct DispSwObj *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispswobjGetMemoryMappingDescriptor(struct DispSwObj *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispswobjControlSerialization_Prologue(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_dispswobjControlSerialization_Epilogue(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_dispswobjCanCopy(struct DispSwObj *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispswobjIsDuplicate(struct DispSwObj *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_dispswobjPreDestruct(struct DispSwObj *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispswobjControlFilter(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispswobjMap(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispswobjUnmap(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_dispswobjIsPartialUnmapSupported(struct DispSwObj *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispswobjMapTo(struct DispSwObj *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispswobjUnmapFrom(struct DispSwObj *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_dispswobjGetRefCount(struct DispSwObj *pResource); // this +void __nvoc_up_thunk_RsResource_dispswobjAddAdditionalDependants(struct RsClient *pClient, struct DispSwObj *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispswobjGetNotificationListPtr(struct DispSwObj *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_dispswobjGetNotificationShare(struct DispSwObj *pNotifier); // this +void __nvoc_up_thunk_Notifier_dispswobjSetNotificationShare(struct DispSwObj *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_dispswobjUnregisterEvent(struct DispSwObj *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_dispswobjGetOrAllocNotifShare(struct DispSwObj *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 26 up-thunk(s) defined to bridge methods in DispSwObj to superclasses // dispswobjControl: virtual inherited (dispapi) base (dispapi) -static NV_STATUS __nvoc_up_thunk_DisplayApi_dispswobjControl(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_DisplayApi_dispswobjControl(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return dispapiControl((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_DispSwObj_DisplayApi.offset), pCallContext, pParams); } // dispswobjControl_Prologue: virtual inherited (dispapi) base (dispapi) -static NV_STATUS __nvoc_up_thunk_DisplayApi_dispswobjControl_Prologue(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { +NV_STATUS __nvoc_up_thunk_DisplayApi_dispswobjControl_Prologue(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { return dispapiControl_Prologue((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_DispSwObj_DisplayApi.offset), pCallContext, pRsParams); } // dispswobjControl_Epilogue: virtual inherited (dispapi) base (dispapi) -static void __nvoc_up_thunk_DisplayApi_dispswobjControl_Epilogue(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { +void __nvoc_up_thunk_DisplayApi_dispswobjControl_Epilogue(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { dispapiControl_Epilogue((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_DispSwObj_DisplayApi.offset), pCallContext, pRsParams); } // dispswobjAccessCallback: virtual inherited (rmres) base (dispapi) -static NvBool __nvoc_up_thunk_RmResource_dispswobjAccessCallback(struct DispSwObj *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_dispswobjAccessCallback(struct DispSwObj *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // dispswobjShareCallback: virtual inherited (rmres) base (dispapi) -static NvBool __nvoc_up_thunk_RmResource_dispswobjShareCallback(struct DispSwObj *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_dispswobjShareCallback(struct DispSwObj *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // dispswobjGetMemInterMapParams: virtual inherited (rmres) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RmResource_dispswobjGetMemInterMapParams(struct DispSwObj *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispswobjGetMemInterMapParams(struct DispSwObj *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispSwObj_RmResource.offset), pParams); } // dispswobjCheckMemInterUnmap: virtual inherited (rmres) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RmResource_dispswobjCheckMemInterUnmap(struct DispSwObj *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_dispswobjCheckMemInterUnmap(struct DispSwObj *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispSwObj_RmResource.offset), bSubdeviceHandleProvided); } // dispswobjGetMemoryMappingDescriptor: virtual inherited (rmres) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RmResource_dispswobjGetMemoryMappingDescriptor(struct DispSwObj *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_dispswobjGetMemoryMappingDescriptor(struct DispSwObj *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispSwObj_RmResource.offset), ppMemDesc); } // dispswobjControlSerialization_Prologue: virtual inherited (rmres) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RmResource_dispswobjControlSerialization_Prologue(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispswobjControlSerialization_Prologue(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RmResource.offset), pCallContext, pParams); } // dispswobjControlSerialization_Epilogue: virtual inherited (rmres) base (dispapi) -static void __nvoc_up_thunk_RmResource_dispswobjControlSerialization_Epilogue(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_dispswobjControlSerialization_Epilogue(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RmResource.offset), pCallContext, pParams); } // dispswobjCanCopy: virtual inherited (res) base (dispapi) -static NvBool __nvoc_up_thunk_RsResource_dispswobjCanCopy(struct DispSwObj *pResource) { +NvBool __nvoc_up_thunk_RsResource_dispswobjCanCopy(struct DispSwObj *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RsResource.offset)); } // dispswobjIsDuplicate: virtual inherited (res) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RsResource_dispswobjIsDuplicate(struct DispSwObj *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_dispswobjIsDuplicate(struct DispSwObj *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RsResource.offset), hMemory, pDuplicate); } // dispswobjPreDestruct: virtual inherited (res) base (dispapi) -static void __nvoc_up_thunk_RsResource_dispswobjPreDestruct(struct DispSwObj *pResource) { +void __nvoc_up_thunk_RsResource_dispswobjPreDestruct(struct DispSwObj *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RsResource.offset)); } // dispswobjControlFilter: virtual inherited (res) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RsResource_dispswobjControlFilter(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispswobjControlFilter(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RsResource.offset), pCallContext, pParams); } // dispswobjMap: virtual inherited (res) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RsResource_dispswobjMap(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_dispswobjMap(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RsResource.offset), pCallContext, pParams, pCpuMapping); } // dispswobjUnmap: virtual inherited (res) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RsResource_dispswobjUnmap(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_dispswobjUnmap(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RsResource.offset), pCallContext, pCpuMapping); } // dispswobjIsPartialUnmapSupported: inline virtual inherited (res) base (dispapi) body -static NvBool __nvoc_up_thunk_RsResource_dispswobjIsPartialUnmapSupported(struct DispSwObj *pResource) { +NvBool __nvoc_up_thunk_RsResource_dispswobjIsPartialUnmapSupported(struct DispSwObj *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RsResource.offset)); } // dispswobjMapTo: virtual inherited (res) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RsResource_dispswobjMapTo(struct DispSwObj *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispswobjMapTo(struct DispSwObj *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RsResource.offset), pParams); } // dispswobjUnmapFrom: virtual inherited (res) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RsResource_dispswobjUnmapFrom(struct DispSwObj *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispswobjUnmapFrom(struct DispSwObj *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RsResource.offset), pParams); } // dispswobjGetRefCount: virtual inherited (res) base (dispapi) -static NvU32 __nvoc_up_thunk_RsResource_dispswobjGetRefCount(struct DispSwObj *pResource) { +NvU32 __nvoc_up_thunk_RsResource_dispswobjGetRefCount(struct DispSwObj *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RsResource.offset)); } // dispswobjAddAdditionalDependants: virtual inherited (res) base (dispapi) -static void __nvoc_up_thunk_RsResource_dispswobjAddAdditionalDependants(struct RsClient *pClient, struct DispSwObj *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_dispswobjAddAdditionalDependants(struct RsClient *pClient, struct DispSwObj *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObj_RsResource.offset), pReference); } // dispswobjGetNotificationListPtr: virtual inherited (notify) base (dispapi) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispswobjGetNotificationListPtr(struct DispSwObj *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispswobjGetNotificationListPtr(struct DispSwObj *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispSwObj_Notifier.offset)); } // dispswobjGetNotificationShare: virtual inherited (notify) base (dispapi) -static struct NotifShare * __nvoc_up_thunk_Notifier_dispswobjGetNotificationShare(struct DispSwObj *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_dispswobjGetNotificationShare(struct DispSwObj *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispSwObj_Notifier.offset)); } // dispswobjSetNotificationShare: virtual inherited (notify) base (dispapi) -static void __nvoc_up_thunk_Notifier_dispswobjSetNotificationShare(struct DispSwObj *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_dispswobjSetNotificationShare(struct DispSwObj *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispSwObj_Notifier.offset), pNotifShare); } // dispswobjUnregisterEvent: virtual inherited (notify) base (dispapi) -static NV_STATUS __nvoc_up_thunk_Notifier_dispswobjUnregisterEvent(struct DispSwObj *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_dispswobjUnregisterEvent(struct DispSwObj *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispSwObj_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // dispswobjGetOrAllocNotifShare: virtual inherited (notify) base (dispapi) -static NV_STATUS __nvoc_up_thunk_Notifier_dispswobjGetOrAllocNotifShare(struct DispSwObj *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_dispswobjGetOrAllocNotifShare(struct DispSwObj *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispSwObj_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -2324,91 +2794,134 @@ static void __nvoc_init_funcTable_DispSwObj_1(DispSwObj *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x49u) pThis->__dispswobjCtrlCmdGetActiveViewportPointIn__ = &dispswobjCtrlCmdGetActiveViewportPointIn_IMPL; #endif - - // dispswobjControl -- virtual inherited (dispapi) base (dispapi) - pThis->__dispswobjControl__ = &__nvoc_up_thunk_DisplayApi_dispswobjControl; - - // dispswobjControl_Prologue -- virtual inherited (dispapi) base (dispapi) - pThis->__dispswobjControl_Prologue__ = &__nvoc_up_thunk_DisplayApi_dispswobjControl_Prologue; - - // dispswobjControl_Epilogue -- virtual inherited (dispapi) base (dispapi) - pThis->__dispswobjControl_Epilogue__ = &__nvoc_up_thunk_DisplayApi_dispswobjControl_Epilogue; - - // dispswobjAccessCallback -- virtual inherited (rmres) base (dispapi) - pThis->__dispswobjAccessCallback__ = &__nvoc_up_thunk_RmResource_dispswobjAccessCallback; - - // dispswobjShareCallback -- virtual inherited (rmres) base (dispapi) - pThis->__dispswobjShareCallback__ = &__nvoc_up_thunk_RmResource_dispswobjShareCallback; - - // dispswobjGetMemInterMapParams -- virtual inherited (rmres) base (dispapi) - pThis->__dispswobjGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispswobjGetMemInterMapParams; - - // dispswobjCheckMemInterUnmap -- virtual inherited (rmres) base (dispapi) - pThis->__dispswobjCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispswobjCheckMemInterUnmap; - - // dispswobjGetMemoryMappingDescriptor -- virtual inherited (rmres) base (dispapi) - pThis->__dispswobjGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispswobjGetMemoryMappingDescriptor; - - // dispswobjControlSerialization_Prologue -- virtual inherited (rmres) base (dispapi) - pThis->__dispswobjControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispswobjControlSerialization_Prologue; - - // dispswobjControlSerialization_Epilogue -- virtual inherited (rmres) base (dispapi) - pThis->__dispswobjControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispswobjControlSerialization_Epilogue; - - // dispswobjCanCopy -- virtual inherited (res) base (dispapi) - pThis->__dispswobjCanCopy__ = &__nvoc_up_thunk_RsResource_dispswobjCanCopy; - - // dispswobjIsDuplicate -- virtual inherited (res) base (dispapi) - pThis->__dispswobjIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispswobjIsDuplicate; - - // dispswobjPreDestruct -- virtual inherited (res) base (dispapi) - pThis->__dispswobjPreDestruct__ = &__nvoc_up_thunk_RsResource_dispswobjPreDestruct; - - // dispswobjControlFilter -- virtual inherited (res) base (dispapi) - pThis->__dispswobjControlFilter__ = &__nvoc_up_thunk_RsResource_dispswobjControlFilter; - - // dispswobjMap -- virtual inherited (res) base (dispapi) - pThis->__dispswobjMap__ = &__nvoc_up_thunk_RsResource_dispswobjMap; - - // dispswobjUnmap -- virtual inherited (res) base (dispapi) - pThis->__dispswobjUnmap__ = &__nvoc_up_thunk_RsResource_dispswobjUnmap; - - // dispswobjIsPartialUnmapSupported -- inline virtual inherited (res) base (dispapi) body - pThis->__dispswobjIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispswobjIsPartialUnmapSupported; - - // dispswobjMapTo -- virtual inherited (res) base (dispapi) - pThis->__dispswobjMapTo__ = &__nvoc_up_thunk_RsResource_dispswobjMapTo; - - // dispswobjUnmapFrom -- virtual inherited (res) base (dispapi) - pThis->__dispswobjUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispswobjUnmapFrom; - - // dispswobjGetRefCount -- virtual inherited (res) base (dispapi) - pThis->__dispswobjGetRefCount__ = &__nvoc_up_thunk_RsResource_dispswobjGetRefCount; - - // dispswobjAddAdditionalDependants -- virtual inherited (res) base (dispapi) - pThis->__dispswobjAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispswobjAddAdditionalDependants; - - // dispswobjGetNotificationListPtr -- virtual inherited (notify) base (dispapi) - pThis->__dispswobjGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispswobjGetNotificationListPtr; - - // dispswobjGetNotificationShare -- virtual inherited (notify) base (dispapi) - pThis->__dispswobjGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispswobjGetNotificationShare; - - // dispswobjSetNotificationShare -- virtual inherited (notify) base (dispapi) - pThis->__dispswobjSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispswobjSetNotificationShare; - - // dispswobjUnregisterEvent -- virtual inherited (notify) base (dispapi) - pThis->__dispswobjUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispswobjUnregisterEvent; - - // dispswobjGetOrAllocNotifShare -- virtual inherited (notify) base (dispapi) - pThis->__dispswobjGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispswobjGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_DispSwObj_1 with approximately 30 basic block(s). +} // End __nvoc_init_funcTable_DispSwObj_1 with approximately 4 basic block(s). // Initialize vtable(s) for 30 virtual method(s). void __nvoc_init_funcTable_DispSwObj(DispSwObj *pThis) { - // Initialize vtable(s) with 30 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__DispSwObj vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x49u) +#endif + .__dispswobjControl__ = &__nvoc_up_thunk_DisplayApi_dispswobjControl, // virtual inherited (dispapi) base (dispapi) + .DisplayApi.__dispapiControl__ = &dispapiControl_IMPL, // virtual override (res) base (rmres) + .DisplayApi.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_DisplayApi_resControl, // virtual + .__dispswobjControl_Prologue__ = &__nvoc_up_thunk_DisplayApi_dispswobjControl_Prologue, // virtual inherited (dispapi) base (dispapi) + .DisplayApi.__dispapiControl_Prologue__ = &dispapiControl_Prologue_IMPL, // virtual override (res) base (rmres) + .DisplayApi.RmResource.__rmresControl_Prologue__ = &__nvoc_down_thunk_DisplayApi_rmresControl_Prologue, // virtual override (res) base (res) + .DisplayApi.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__dispswobjControl_Epilogue__ = &__nvoc_up_thunk_DisplayApi_dispswobjControl_Epilogue, // virtual inherited (dispapi) base (dispapi) + .DisplayApi.__dispapiControl_Epilogue__ = &dispapiControl_Epilogue_IMPL, // virtual override (res) base (rmres) + .DisplayApi.RmResource.__rmresControl_Epilogue__ = &__nvoc_down_thunk_DisplayApi_rmresControl_Epilogue, // virtual override (res) base (res) + .DisplayApi.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__dispswobjAccessCallback__ = &__nvoc_up_thunk_RmResource_dispswobjAccessCallback, // virtual inherited (rmres) base (dispapi) + .DisplayApi.__dispapiAccessCallback__ = &__nvoc_up_thunk_RmResource_dispapiAccessCallback, // virtual inherited (rmres) base (rmres) + .DisplayApi.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .DisplayApi.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__dispswobjShareCallback__ = &__nvoc_up_thunk_RmResource_dispswobjShareCallback, // virtual inherited (rmres) base (dispapi) + .DisplayApi.__dispapiShareCallback__ = &__nvoc_up_thunk_RmResource_dispapiShareCallback, // virtual inherited (rmres) base (rmres) + .DisplayApi.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .DisplayApi.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__dispswobjGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispswobjGetMemInterMapParams, // virtual inherited (rmres) base (dispapi) + .DisplayApi.__dispapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispapiGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .DisplayApi.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__dispswobjCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispswobjCheckMemInterUnmap, // virtual inherited (rmres) base (dispapi) + .DisplayApi.__dispapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispapiCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .DisplayApi.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__dispswobjGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispswobjGetMemoryMappingDescriptor, // virtual inherited (rmres) base (dispapi) + .DisplayApi.__dispapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .DisplayApi.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__dispswobjControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispswobjControlSerialization_Prologue, // virtual inherited (rmres) base (dispapi) + .DisplayApi.__dispapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispapiControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .DisplayApi.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .DisplayApi.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__dispswobjControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispswobjControlSerialization_Epilogue, // virtual inherited (rmres) base (dispapi) + .DisplayApi.__dispapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispapiControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .DisplayApi.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .DisplayApi.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__dispswobjCanCopy__ = &__nvoc_up_thunk_RsResource_dispswobjCanCopy, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiCanCopy__ = &__nvoc_up_thunk_RsResource_dispapiCanCopy, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__dispswobjIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispswobjIsDuplicate, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispapiIsDuplicate, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__dispswobjPreDestruct__ = &__nvoc_up_thunk_RsResource_dispswobjPreDestruct, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiPreDestruct__ = &__nvoc_up_thunk_RsResource_dispapiPreDestruct, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__dispswobjControlFilter__ = &__nvoc_up_thunk_RsResource_dispswobjControlFilter, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiControlFilter__ = &__nvoc_up_thunk_RsResource_dispapiControlFilter, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__dispswobjMap__ = &__nvoc_up_thunk_RsResource_dispswobjMap, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiMap__ = &__nvoc_up_thunk_RsResource_dispapiMap, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resMap__ = &resMap_IMPL, // virtual + .__dispswobjUnmap__ = &__nvoc_up_thunk_RsResource_dispswobjUnmap, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiUnmap__ = &__nvoc_up_thunk_RsResource_dispapiUnmap, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__dispswobjIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispswobjIsPartialUnmapSupported, // inline virtual inherited (res) base (dispapi) body + .DisplayApi.__dispapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispapiIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .DisplayApi.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .DisplayApi.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__dispswobjMapTo__ = &__nvoc_up_thunk_RsResource_dispswobjMapTo, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiMapTo__ = &__nvoc_up_thunk_RsResource_dispapiMapTo, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__dispswobjUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispswobjUnmapFrom, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispapiUnmapFrom, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__dispswobjGetRefCount__ = &__nvoc_up_thunk_RsResource_dispswobjGetRefCount, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiGetRefCount__ = &__nvoc_up_thunk_RsResource_dispapiGetRefCount, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__dispswobjAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispswobjAddAdditionalDependants, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispapiAddAdditionalDependants, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__dispswobjGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispswobjGetNotificationListPtr, // virtual inherited (notify) base (dispapi) + .DisplayApi.__dispapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispapiGetNotificationListPtr, // virtual inherited (notify) base (notify) + .DisplayApi.Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .DisplayApi.Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__dispswobjGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispswobjGetNotificationShare, // virtual inherited (notify) base (dispapi) + .DisplayApi.__dispapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispapiGetNotificationShare, // virtual inherited (notify) base (notify) + .DisplayApi.Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .DisplayApi.Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__dispswobjSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispswobjSetNotificationShare, // virtual inherited (notify) base (dispapi) + .DisplayApi.__dispapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispapiSetNotificationShare, // virtual inherited (notify) base (notify) + .DisplayApi.Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .DisplayApi.Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__dispswobjUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispswobjUnregisterEvent, // virtual inherited (notify) base (dispapi) + .DisplayApi.__dispapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispapiUnregisterEvent, // virtual inherited (notify) base (notify) + .DisplayApi.Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .DisplayApi.Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__dispswobjGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispswobjGetOrAllocNotifShare, // virtual inherited (notify) base (dispapi) + .DisplayApi.__dispapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispapiGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .DisplayApi.Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .DisplayApi.Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.DisplayApi.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable = &vtable.DisplayApi.RmResource; // (rmres) super^2 + pThis->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.DisplayApi.Notifier.INotifier; // (inotify) super^3 + pThis->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable = &vtable.DisplayApi.Notifier; // (notify) super^2 + pThis->__nvoc_base_DisplayApi.__nvoc_vtable = &vtable.DisplayApi; // (dispapi) super + pThis->__nvoc_vtable = &vtable; // (dispswobj) this + + // Initialize vtable(s) with 4 per-object function pointer(s). __nvoc_init_funcTable_DispSwObj_1(pThis); } @@ -3108,6 +3621,36 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm #endif }, { /* [33] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x730157u, + /*paramSize=*/ sizeof(NV0073_CTRL_SYSTEM_INTERNAL_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth" +#endif + }, + { /* [34] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdSystemNotifyDrrMscgWar_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x730158u, + /*paramSize=*/ sizeof(NV0073_CTRL_CMD_SYSTEM_NOTIFY_DRR_MSCG_WAR_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "dispcmnCtrlCmdSystemNotifyDrrMscgWar" +#endif + }, + { /* [35] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3122,7 +3665,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificGetI2cPortid" #endif }, - { /* [34] */ + { /* [36] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x46u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3137,7 +3680,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificGetType" #endif }, - { /* [35] */ + { /* [37] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3152,7 +3695,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificFakeDevice" #endif }, - { /* [36] */ + { /* [38] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3167,7 +3710,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificGetEdidV2" #endif }, - { /* [37] */ + { /* [39] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3182,7 +3725,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetEdidV2" #endif }, - { /* [38] */ + { /* [40] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3197,7 +3740,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificGetConnectorData" #endif }, - { /* [39] */ + { /* [41] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3212,7 +3755,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetHdmiEnable" #endif }, - { /* [40] */ + { /* [42] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3227,7 +3770,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificCtrlHdmi" #endif }, - { /* [41] */ + { /* [43] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3242,7 +3785,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetHdmiAudioMutestream" #endif }, - { /* [42] */ + { /* [44] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3257,7 +3800,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetAcpiIdMapping" #endif }, - { /* [43] */ + { /* [45] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3272,7 +3815,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificGetAcpiDodDisplayPortAttachment" #endif }, - { /* [44] */ + { /* [46] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3287,7 +3830,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificGetAllHeadMask" #endif }, - { /* [45] */ + { /* [47] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3302,7 +3845,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetOdPacket" #endif }, - { /* [46] */ + { /* [48] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3317,7 +3860,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetOdPacketCtrl" #endif }, - { /* [47] */ + { /* [49] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3332,7 +3875,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificGetPclkLimit" #endif }, - { /* [48] */ + { /* [50] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x46u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3347,7 +3890,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificOrGetInfo" #endif }, - { /* [49] */ + { /* [51] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3362,7 +3905,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificGetBacklightBrightness" #endif }, - { /* [50] */ + { /* [52] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3377,7 +3920,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetBacklightBrightness" #endif }, - { /* [51] */ + { /* [53] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3392,7 +3935,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetHdmiSinkCaps" #endif }, - { /* [52] */ + { /* [54] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3407,7 +3950,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetMonitorPower" #endif }, - { /* [53] */ + { /* [55] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3422,7 +3965,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetHdmiFrlLinkConfig" #endif }, - { /* [54] */ + { /* [56] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3437,7 +3980,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificApplyEdidOverrideV2" #endif }, - { /* [55] */ + { /* [57] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3452,7 +3995,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificGetHdmiGpuCaps" #endif }, - { /* [56] */ + { /* [58] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3467,7 +4010,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificDisplayChange" #endif }, - { /* [57] */ + { /* [59] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3482,7 +4025,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificGetHdmiScdcData" #endif }, - { /* [58] */ + { /* [60] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3497,7 +4040,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificIsDirectmodeDisplay" #endif }, - { /* [59] */ + { /* [61] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3512,7 +4055,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetHdmiFrlCapacityComputation" #endif }, - { /* [60] */ + { /* [62] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3527,7 +4070,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificSetSharedGenericPacket" #endif }, - { /* [61] */ + { /* [63] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3542,7 +4085,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificAcquireSharedGenericPacket" #endif }, - { /* [62] */ + { /* [64] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3557,7 +4100,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificReleaseSharedGenericPacket" #endif }, - { /* [63] */ + { /* [65] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3572,7 +4115,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificDispI2cReadWrite" #endif }, - { /* [64] */ + { /* [66] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3587,7 +4130,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificGetValidHeadWindowAssignment" #endif }, - { /* [65] */ + { /* [67] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3602,7 +4145,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdSpecificDefaultAdaptivesyncDisplay" #endif }, - { /* [66] */ + { /* [68] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3617,7 +4160,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdInternalGetHotplugUnplugState" #endif }, - { /* [67] */ + { /* [69] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3632,7 +4175,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdInternalVRRSetRgLineActive" #endif }, - { /* [68] */ + { /* [70] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3647,7 +4190,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdInternalDfpGetDispMuxStatus" #endif }, - { /* [69] */ + { /* [71] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3662,7 +4205,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdInternalVblankSemControlEnable" #endif }, - { /* [70] */ + { /* [72] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3677,7 +4220,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdInternalDfpSwitchDispMux" #endif }, - { /* [71] */ + { /* [73] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3692,7 +4235,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdFrlConfigMacroPad" #endif }, - { /* [72] */ + { /* [74] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3707,7 +4250,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpGetInfo" #endif }, - { /* [73] */ + { /* [75] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3722,7 +4265,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpGetDisplayportDongleInfo" #endif }, - { /* [74] */ + { /* [76] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3737,7 +4280,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpSetEldAudioCaps" #endif }, - { /* [75] */ + { /* [77] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3752,7 +4295,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpGetSpreadSpectrum" #endif }, - { /* [76] */ + { /* [78] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3767,7 +4310,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpUpdateDynamicDfpCache" #endif }, - { /* [77] */ + { /* [79] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3782,7 +4325,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpSetAudioEnable" #endif }, - { /* [78] */ + { /* [80] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3797,7 +4340,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpAssignSor" #endif }, - { /* [79] */ + { /* [81] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3812,7 +4355,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpGetPadlinkMask" #endif }, - { /* [80] */ + { /* [82] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3827,7 +4370,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpGetLcdGpioPinNum" #endif }, - { /* [81] */ + { /* [83] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3842,7 +4385,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpConfigTwoHeadOneOr" #endif }, - { /* [82] */ + { /* [84] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3857,7 +4400,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpDscCrcControl" #endif }, - { /* [83] */ + { /* [85] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3872,7 +4415,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpInitMuxData" #endif }, - { /* [84] */ + { /* [86] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3887,7 +4430,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpSwitchDispMux" #endif }, - { /* [85] */ + { /* [87] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3902,7 +4445,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpRunPreDispMuxOperations" #endif }, - { /* [86] */ + { /* [88] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3917,7 +4460,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpRunPostDispMuxOperations" #endif }, - { /* [87] */ + { /* [89] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3932,7 +4475,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpGetDispMuxStatus" #endif }, - { /* [88] */ + { /* [90] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3947,7 +4490,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpGetDsiModeTiming" #endif }, - { /* [89] */ + { /* [91] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x42u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3962,7 +4505,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpGetFixedModeTiming" #endif }, - { /* [90] */ + { /* [92] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3977,7 +4520,22 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpEdpDriverUnload" #endif }, - { /* [91] */ + { /* [93] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDfpSetForceBlackPixels_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x731179u, + /*paramSize=*/ sizeof(NV0073_CTRL_DFP_SET_FORCE_BLACK_PIXELS_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "dispcmnCtrlCmdDfpSetForceBlackPixels" +#endif + }, + { /* [94] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x844u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3992,7 +4550,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpAuxchCtrl" #endif }, - { /* [92] */ + { /* [95] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4007,7 +4565,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpAuxchSetSema" #endif }, - { /* [93] */ + { /* [96] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x844u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4022,7 +4580,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpCtrl" #endif }, - { /* [94] */ + { /* [97] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4037,7 +4595,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpGetLaneData" #endif }, - { /* [95] */ + { /* [98] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4052,7 +4610,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSetLaneData" #endif }, - { /* [96] */ + { /* [99] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4067,7 +4625,22 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSetTestpattern" #endif }, - { /* [97] */ + { /* [100] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) dispcmnCtrlCmdDpGetTestpattern_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x731348u, + /*paramSize=*/ sizeof(NV0073_CTRL_DP_GET_TESTPATTERN_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "dispcmnCtrlCmdDpGetTestpattern" +#endif + }, + { /* [101] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4082,7 +4655,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSetPreemphasisDrivecurrentPostcursor2Data" #endif }, - { /* [98] */ + { /* [102] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4097,7 +4670,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data" #endif }, - { /* [99] */ + { /* [103] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4112,7 +4685,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpMainLinkCtrl" #endif }, - { /* [100] */ + { /* [104] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4127,7 +4700,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSetAudioMuteStream" #endif }, - { /* [101] */ + { /* [105] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4142,7 +4715,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpASSRCtrl" #endif }, - { /* [102] */ + { /* [106] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4157,7 +4730,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpTopologyAllocateDisplayId" #endif }, - { /* [103] */ + { /* [107] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4172,7 +4745,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpTopologyFreeDisplayId" #endif }, - { /* [104] */ + { /* [108] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4187,7 +4760,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpGetLinkConfig" #endif }, - { /* [105] */ + { /* [109] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4202,7 +4775,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpGetEDPData" #endif }, - { /* [106] */ + { /* [110] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4217,7 +4790,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpConfigStream" #endif }, - { /* [107] */ + { /* [111] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4232,7 +4805,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSetRateGov" #endif }, - { /* [108] */ + { /* [112] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4247,7 +4820,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSetManualDisplayPort" #endif }, - { /* [109] */ + { /* [113] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4262,7 +4835,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSetEcf" #endif }, - { /* [110] */ + { /* [114] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4277,7 +4850,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSendACT" #endif }, - { /* [111] */ + { /* [115] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x46u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4292,7 +4865,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpGetCaps" #endif }, - { /* [112] */ + { /* [116] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4307,7 +4880,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpGenerateFakeInterrupt" #endif }, - { /* [113] */ + { /* [117] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4322,7 +4895,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpConfigRadScratchReg" #endif }, - { /* [114] */ + { /* [118] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4337,7 +4910,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpConfigSingleHeadMultiStream" #endif }, - { /* [115] */ + { /* [119] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4352,7 +4925,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSetTriggerSelect" #endif }, - { /* [116] */ + { /* [120] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4367,7 +4940,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSetTriggerAll" #endif }, - { /* [117] */ + { /* [121] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4382,7 +4955,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpGetAuxLogData" #endif }, - { /* [118] */ + { /* [122] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4397,7 +4970,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpConfigIndexedLinkRates" #endif }, - { /* [119] */ + { /* [123] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4412,7 +4985,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSetStereoMSAProperties" #endif }, - { /* [120] */ + { /* [124] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4427,7 +5000,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpConfigureFec" #endif }, - { /* [121] */ + { /* [125] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4442,7 +5015,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpConfigMacroPad" #endif }, - { /* [122] */ + { /* [126] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4457,7 +5030,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpAuxchI2cTransferCtrl" #endif }, - { /* [123] */ + { /* [127] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x844u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4472,7 +5045,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpEnableVrr" #endif }, - { /* [124] */ + { /* [128] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4487,7 +5060,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpGetGenericInfoframe" #endif }, - { /* [125] */ + { /* [129] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4502,7 +5075,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpGetMsaAttributes" #endif }, - { /* [126] */ + { /* [130] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4517,7 +5090,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpInternalLcdOverdrive" #endif }, - { /* [127] */ + { /* [131] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4532,7 +5105,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDpSetMSAPropertiesv2" #endif }, - { /* [128] */ + { /* [132] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4547,7 +5120,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm /*func=*/ "dispcmnCtrlCmdDfpVariableBacklightCtrl" #endif }, - { /* [129] */ + { /* [133] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4565,142 +5138,221 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super^2 +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super^2 +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_DisplayApi_resControl(struct RsResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_DisplayApi_rmresControl_Prologue(struct RmResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); // super +void __nvoc_down_thunk_DisplayApi_rmresControl_Epilogue(struct RmResource *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_dispapiAccessCallback(struct DisplayApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_dispapiShareCallback(struct DisplayApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispapiGetMemInterMapParams(struct DisplayApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispapiCheckMemInterUnmap(struct DisplayApi *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispapiGetMemoryMappingDescriptor(struct DisplayApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_dispapiControlSerialization_Prologue(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_dispapiControlSerialization_Epilogue(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_dispapiCanCopy(struct DisplayApi *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispapiIsDuplicate(struct DisplayApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_dispapiPreDestruct(struct DisplayApi *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispapiControlFilter(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispapiMap(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispapiUnmap(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_dispapiIsPartialUnmapSupported(struct DisplayApi *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispapiMapTo(struct DisplayApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_dispapiUnmapFrom(struct DisplayApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_dispapiGetRefCount(struct DisplayApi *pResource); // super +void __nvoc_up_thunk_RsResource_dispapiAddAdditionalDependants(struct RsClient *pClient, struct DisplayApi *pResource, RsResourceRef *pReference); // super +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispapiGetNotificationListPtr(struct DisplayApi *pNotifier); // super +struct NotifShare * __nvoc_up_thunk_Notifier_dispapiGetNotificationShare(struct DisplayApi *pNotifier); // super +void __nvoc_up_thunk_Notifier_dispapiSetNotificationShare(struct DisplayApi *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_up_thunk_Notifier_dispapiUnregisterEvent(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_up_thunk_Notifier_dispapiGetOrAllocNotifShare(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_up_thunk_DisplayApi_dispcmnControl(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_DisplayApi_dispcmnControl_Prologue(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); // this +void __nvoc_up_thunk_DisplayApi_dispcmnControl_Epilogue(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams); // this +NvBool __nvoc_up_thunk_RmResource_dispcmnAccessCallback(struct DispCommon *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_dispcmnShareCallback(struct DispCommon *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispcmnGetMemInterMapParams(struct DispCommon *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispcmnCheckMemInterUnmap(struct DispCommon *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispcmnGetMemoryMappingDescriptor(struct DispCommon *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispcmnControlSerialization_Prologue(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_dispcmnControlSerialization_Epilogue(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_dispcmnCanCopy(struct DispCommon *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispcmnIsDuplicate(struct DispCommon *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_dispcmnPreDestruct(struct DispCommon *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispcmnControlFilter(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispcmnMap(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispcmnUnmap(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_dispcmnIsPartialUnmapSupported(struct DispCommon *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispcmnMapTo(struct DispCommon *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispcmnUnmapFrom(struct DispCommon *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_dispcmnGetRefCount(struct DispCommon *pResource); // this +void __nvoc_up_thunk_RsResource_dispcmnAddAdditionalDependants(struct RsClient *pClient, struct DispCommon *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispcmnGetNotificationListPtr(struct DispCommon *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_dispcmnGetNotificationShare(struct DispCommon *pNotifier); // this +void __nvoc_up_thunk_Notifier_dispcmnSetNotificationShare(struct DispCommon *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_dispcmnUnregisterEvent(struct DispCommon *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_dispcmnGetOrAllocNotifShare(struct DispCommon *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 26 up-thunk(s) defined to bridge methods in DispCommon to superclasses // dispcmnControl: virtual inherited (dispapi) base (dispapi) -static NV_STATUS __nvoc_up_thunk_DisplayApi_dispcmnControl(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_DisplayApi_dispcmnControl(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return dispapiControl((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_DispCommon_DisplayApi.offset), pCallContext, pParams); } // dispcmnControl_Prologue: virtual inherited (dispapi) base (dispapi) -static NV_STATUS __nvoc_up_thunk_DisplayApi_dispcmnControl_Prologue(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { +NV_STATUS __nvoc_up_thunk_DisplayApi_dispcmnControl_Prologue(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { return dispapiControl_Prologue((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_DispCommon_DisplayApi.offset), pCallContext, pRsParams); } // dispcmnControl_Epilogue: virtual inherited (dispapi) base (dispapi) -static void __nvoc_up_thunk_DisplayApi_dispcmnControl_Epilogue(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { +void __nvoc_up_thunk_DisplayApi_dispcmnControl_Epilogue(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { dispapiControl_Epilogue((struct DisplayApi *)(((unsigned char *) pDisplayApi) + __nvoc_rtti_DispCommon_DisplayApi.offset), pCallContext, pRsParams); } // dispcmnAccessCallback: virtual inherited (rmres) base (dispapi) -static NvBool __nvoc_up_thunk_RmResource_dispcmnAccessCallback(struct DispCommon *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_dispcmnAccessCallback(struct DispCommon *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // dispcmnShareCallback: virtual inherited (rmres) base (dispapi) -static NvBool __nvoc_up_thunk_RmResource_dispcmnShareCallback(struct DispCommon *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_dispcmnShareCallback(struct DispCommon *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // dispcmnGetMemInterMapParams: virtual inherited (rmres) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RmResource_dispcmnGetMemInterMapParams(struct DispCommon *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispcmnGetMemInterMapParams(struct DispCommon *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispCommon_RmResource.offset), pParams); } // dispcmnCheckMemInterUnmap: virtual inherited (rmres) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RmResource_dispcmnCheckMemInterUnmap(struct DispCommon *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_dispcmnCheckMemInterUnmap(struct DispCommon *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispCommon_RmResource.offset), bSubdeviceHandleProvided); } // dispcmnGetMemoryMappingDescriptor: virtual inherited (rmres) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RmResource_dispcmnGetMemoryMappingDescriptor(struct DispCommon *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_dispcmnGetMemoryMappingDescriptor(struct DispCommon *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispCommon_RmResource.offset), ppMemDesc); } // dispcmnControlSerialization_Prologue: virtual inherited (rmres) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RmResource_dispcmnControlSerialization_Prologue(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispcmnControlSerialization_Prologue(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RmResource.offset), pCallContext, pParams); } // dispcmnControlSerialization_Epilogue: virtual inherited (rmres) base (dispapi) -static void __nvoc_up_thunk_RmResource_dispcmnControlSerialization_Epilogue(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_dispcmnControlSerialization_Epilogue(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RmResource.offset), pCallContext, pParams); } // dispcmnCanCopy: virtual inherited (res) base (dispapi) -static NvBool __nvoc_up_thunk_RsResource_dispcmnCanCopy(struct DispCommon *pResource) { +NvBool __nvoc_up_thunk_RsResource_dispcmnCanCopy(struct DispCommon *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RsResource.offset)); } // dispcmnIsDuplicate: virtual inherited (res) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RsResource_dispcmnIsDuplicate(struct DispCommon *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_dispcmnIsDuplicate(struct DispCommon *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RsResource.offset), hMemory, pDuplicate); } // dispcmnPreDestruct: virtual inherited (res) base (dispapi) -static void __nvoc_up_thunk_RsResource_dispcmnPreDestruct(struct DispCommon *pResource) { +void __nvoc_up_thunk_RsResource_dispcmnPreDestruct(struct DispCommon *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RsResource.offset)); } // dispcmnControlFilter: virtual inherited (res) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RsResource_dispcmnControlFilter(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispcmnControlFilter(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RsResource.offset), pCallContext, pParams); } // dispcmnMap: virtual inherited (res) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RsResource_dispcmnMap(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_dispcmnMap(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RsResource.offset), pCallContext, pParams, pCpuMapping); } // dispcmnUnmap: virtual inherited (res) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RsResource_dispcmnUnmap(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_dispcmnUnmap(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RsResource.offset), pCallContext, pCpuMapping); } // dispcmnIsPartialUnmapSupported: inline virtual inherited (res) base (dispapi) body -static NvBool __nvoc_up_thunk_RsResource_dispcmnIsPartialUnmapSupported(struct DispCommon *pResource) { +NvBool __nvoc_up_thunk_RsResource_dispcmnIsPartialUnmapSupported(struct DispCommon *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RsResource.offset)); } // dispcmnMapTo: virtual inherited (res) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RsResource_dispcmnMapTo(struct DispCommon *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispcmnMapTo(struct DispCommon *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RsResource.offset), pParams); } // dispcmnUnmapFrom: virtual inherited (res) base (dispapi) -static NV_STATUS __nvoc_up_thunk_RsResource_dispcmnUnmapFrom(struct DispCommon *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispcmnUnmapFrom(struct DispCommon *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RsResource.offset), pParams); } // dispcmnGetRefCount: virtual inherited (res) base (dispapi) -static NvU32 __nvoc_up_thunk_RsResource_dispcmnGetRefCount(struct DispCommon *pResource) { +NvU32 __nvoc_up_thunk_RsResource_dispcmnGetRefCount(struct DispCommon *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RsResource.offset)); } // dispcmnAddAdditionalDependants: virtual inherited (res) base (dispapi) -static void __nvoc_up_thunk_RsResource_dispcmnAddAdditionalDependants(struct RsClient *pClient, struct DispCommon *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_dispcmnAddAdditionalDependants(struct RsClient *pClient, struct DispCommon *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispCommon_RsResource.offset), pReference); } // dispcmnGetNotificationListPtr: virtual inherited (notify) base (dispapi) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispcmnGetNotificationListPtr(struct DispCommon *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispcmnGetNotificationListPtr(struct DispCommon *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispCommon_Notifier.offset)); } // dispcmnGetNotificationShare: virtual inherited (notify) base (dispapi) -static struct NotifShare * __nvoc_up_thunk_Notifier_dispcmnGetNotificationShare(struct DispCommon *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_dispcmnGetNotificationShare(struct DispCommon *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispCommon_Notifier.offset)); } // dispcmnSetNotificationShare: virtual inherited (notify) base (dispapi) -static void __nvoc_up_thunk_Notifier_dispcmnSetNotificationShare(struct DispCommon *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_dispcmnSetNotificationShare(struct DispCommon *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispCommon_Notifier.offset), pNotifShare); } // dispcmnUnregisterEvent: virtual inherited (notify) base (dispapi) -static NV_STATUS __nvoc_up_thunk_Notifier_dispcmnUnregisterEvent(struct DispCommon *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_dispcmnUnregisterEvent(struct DispCommon *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispCommon_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // dispcmnGetOrAllocNotifShare: virtual inherited (notify) base (dispapi) -static NV_STATUS __nvoc_up_thunk_Notifier_dispcmnGetOrAllocNotifShare(struct DispCommon *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_dispcmnGetOrAllocNotifShare(struct DispCommon *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispCommon_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } const struct NVOC_EXPORT_INFO __nvoc_export_info_DispCommon = { - /*numEntries=*/ 130, + /*numEntries=*/ 134, /*pExportEntries=*/ __nvoc_exported_method_def_DispCommon }; @@ -4757,6 +5409,11 @@ static void __nvoc_init_funcTable_DispCommon_1(DispCommon *pThis) { pThis->__dispcmnCtrlCmdSystemGetHotplugState__ = &dispcmnCtrlCmdSystemGetHotplugState_IMPL; #endif + // dispcmnCtrlCmdSystemNotifyDrrMscgWar -- exported (id=0x730158) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + pThis->__dispcmnCtrlCmdSystemNotifyDrrMscgWar__ = &dispcmnCtrlCmdSystemNotifyDrrMscgWar_IMPL; +#endif + // dispcmnCtrlCmdSystemGetInternalDisplays -- exported (id=0x730116) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) pThis->__dispcmnCtrlCmdSystemGetInternalDisplays__ = &dispcmnCtrlCmdSystemGetInternalDisplays_IMPL; @@ -4992,6 +5649,11 @@ static void __nvoc_init_funcTable_DispCommon_1(DispCommon *pThis) { pThis->__dispcmnCtrlCmdSystemAllocateDisplayBandwidth__ = &dispcmnCtrlCmdSystemAllocateDisplayBandwidth_IMPL; #endif + // dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth -- exported (id=0x730157) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + pThis->__dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth__ = &dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth_IMPL; +#endif + // dispcmnCtrlCmdSystemGetHotplugConfig -- exported (id=0x730109) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdSystemGetHotplugConfig__ = &dispcmnCtrlCmdSystemGetHotplugConfig_IMPL; @@ -5162,6 +5824,11 @@ static void __nvoc_init_funcTable_DispCommon_1(DispCommon *pThis) { pThis->__dispcmnCtrlCmdDfpEdpDriverUnload__ = &dispcmnCtrlCmdDfpEdpDriverUnload_IMPL; #endif + // dispcmnCtrlCmdDfpSetForceBlackPixels -- exported (id=0x731179) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + pThis->__dispcmnCtrlCmdDfpSetForceBlackPixels__ = &dispcmnCtrlCmdDfpSetForceBlackPixels_IMPL; +#endif + // dispcmnCtrlCmdDfpGetInfo -- exported (id=0x731140) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) pThis->__dispcmnCtrlCmdDfpGetInfo__ = &dispcmnCtrlCmdDfpGetInfo_IMPL; @@ -5247,6 +5914,11 @@ static void __nvoc_init_funcTable_DispCommon_1(DispCommon *pThis) { pThis->__dispcmnCtrlCmdDpSetLaneData__ = &dispcmnCtrlCmdDpSetLaneData_IMPL; #endif + // dispcmnCtrlCmdDpGetTestpattern -- exported (id=0x731348) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + pThis->__dispcmnCtrlCmdDpGetTestpattern__ = &dispcmnCtrlCmdDpGetTestpattern_IMPL; +#endif + // dispcmnCtrlCmdDpSetTestpattern -- exported (id=0x731347) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpSetTestpattern__ = &dispcmnCtrlCmdDpSetTestpattern_IMPL; @@ -5386,91 +6058,394 @@ static void __nvoc_init_funcTable_DispCommon_1(DispCommon *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data__ = &dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data_IMPL; #endif +} // End __nvoc_init_funcTable_DispCommon_1 with approximately 134 basic block(s). - // dispcmnControl -- virtual inherited (dispapi) base (dispapi) - pThis->__dispcmnControl__ = &__nvoc_up_thunk_DisplayApi_dispcmnControl; - - // dispcmnControl_Prologue -- virtual inherited (dispapi) base (dispapi) - pThis->__dispcmnControl_Prologue__ = &__nvoc_up_thunk_DisplayApi_dispcmnControl_Prologue; - - // dispcmnControl_Epilogue -- virtual inherited (dispapi) base (dispapi) - pThis->__dispcmnControl_Epilogue__ = &__nvoc_up_thunk_DisplayApi_dispcmnControl_Epilogue; - - // dispcmnAccessCallback -- virtual inherited (rmres) base (dispapi) - pThis->__dispcmnAccessCallback__ = &__nvoc_up_thunk_RmResource_dispcmnAccessCallback; - - // dispcmnShareCallback -- virtual inherited (rmres) base (dispapi) - pThis->__dispcmnShareCallback__ = &__nvoc_up_thunk_RmResource_dispcmnShareCallback; - - // dispcmnGetMemInterMapParams -- virtual inherited (rmres) base (dispapi) - pThis->__dispcmnGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispcmnGetMemInterMapParams; - - // dispcmnCheckMemInterUnmap -- virtual inherited (rmres) base (dispapi) - pThis->__dispcmnCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispcmnCheckMemInterUnmap; - - // dispcmnGetMemoryMappingDescriptor -- virtual inherited (rmres) base (dispapi) - pThis->__dispcmnGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispcmnGetMemoryMappingDescriptor; - - // dispcmnControlSerialization_Prologue -- virtual inherited (rmres) base (dispapi) - pThis->__dispcmnControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispcmnControlSerialization_Prologue; - - // dispcmnControlSerialization_Epilogue -- virtual inherited (rmres) base (dispapi) - pThis->__dispcmnControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispcmnControlSerialization_Epilogue; - - // dispcmnCanCopy -- virtual inherited (res) base (dispapi) - pThis->__dispcmnCanCopy__ = &__nvoc_up_thunk_RsResource_dispcmnCanCopy; - - // dispcmnIsDuplicate -- virtual inherited (res) base (dispapi) - pThis->__dispcmnIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispcmnIsDuplicate; - // dispcmnPreDestruct -- virtual inherited (res) base (dispapi) - pThis->__dispcmnPreDestruct__ = &__nvoc_up_thunk_RsResource_dispcmnPreDestruct; - - // dispcmnControlFilter -- virtual inherited (res) base (dispapi) - pThis->__dispcmnControlFilter__ = &__nvoc_up_thunk_RsResource_dispcmnControlFilter; - - // dispcmnMap -- virtual inherited (res) base (dispapi) - pThis->__dispcmnMap__ = &__nvoc_up_thunk_RsResource_dispcmnMap; - - // dispcmnUnmap -- virtual inherited (res) base (dispapi) - pThis->__dispcmnUnmap__ = &__nvoc_up_thunk_RsResource_dispcmnUnmap; - - // dispcmnIsPartialUnmapSupported -- inline virtual inherited (res) base (dispapi) body - pThis->__dispcmnIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispcmnIsPartialUnmapSupported; - - // dispcmnMapTo -- virtual inherited (res) base (dispapi) - pThis->__dispcmnMapTo__ = &__nvoc_up_thunk_RsResource_dispcmnMapTo; - - // dispcmnUnmapFrom -- virtual inherited (res) base (dispapi) - pThis->__dispcmnUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispcmnUnmapFrom; - - // dispcmnGetRefCount -- virtual inherited (res) base (dispapi) - pThis->__dispcmnGetRefCount__ = &__nvoc_up_thunk_RsResource_dispcmnGetRefCount; - - // dispcmnAddAdditionalDependants -- virtual inherited (res) base (dispapi) - pThis->__dispcmnAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispcmnAddAdditionalDependants; - - // dispcmnGetNotificationListPtr -- virtual inherited (notify) base (dispapi) - pThis->__dispcmnGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispcmnGetNotificationListPtr; - - // dispcmnGetNotificationShare -- virtual inherited (notify) base (dispapi) - pThis->__dispcmnGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispcmnGetNotificationShare; - - // dispcmnSetNotificationShare -- virtual inherited (notify) base (dispapi) - pThis->__dispcmnSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispcmnSetNotificationShare; - - // dispcmnUnregisterEvent -- virtual inherited (notify) base (dispapi) - pThis->__dispcmnUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispcmnUnregisterEvent; - - // dispcmnGetOrAllocNotifShare -- virtual inherited (notify) base (dispapi) - pThis->__dispcmnGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispcmnGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_DispCommon_1 with approximately 156 basic block(s). - - -// Initialize vtable(s) for 156 virtual method(s). +// Initialize vtable(s) for 160 virtual method(s). void __nvoc_init_funcTable_DispCommon(DispCommon *pThis) { - // Initialize vtable(s) with 156 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__DispCommon vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x844u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xau) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x848u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x46u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x46u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x42u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x844u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x844u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x46u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif + .__dispcmnControl__ = &__nvoc_up_thunk_DisplayApi_dispcmnControl, // virtual inherited (dispapi) base (dispapi) + .DisplayApi.__dispapiControl__ = &dispapiControl_IMPL, // virtual override (res) base (rmres) + .DisplayApi.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_DisplayApi_resControl, // virtual + .__dispcmnControl_Prologue__ = &__nvoc_up_thunk_DisplayApi_dispcmnControl_Prologue, // virtual inherited (dispapi) base (dispapi) + .DisplayApi.__dispapiControl_Prologue__ = &dispapiControl_Prologue_IMPL, // virtual override (res) base (rmres) + .DisplayApi.RmResource.__rmresControl_Prologue__ = &__nvoc_down_thunk_DisplayApi_rmresControl_Prologue, // virtual override (res) base (res) + .DisplayApi.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__dispcmnControl_Epilogue__ = &__nvoc_up_thunk_DisplayApi_dispcmnControl_Epilogue, // virtual inherited (dispapi) base (dispapi) + .DisplayApi.__dispapiControl_Epilogue__ = &dispapiControl_Epilogue_IMPL, // virtual override (res) base (rmres) + .DisplayApi.RmResource.__rmresControl_Epilogue__ = &__nvoc_down_thunk_DisplayApi_rmresControl_Epilogue, // virtual override (res) base (res) + .DisplayApi.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__dispcmnAccessCallback__ = &__nvoc_up_thunk_RmResource_dispcmnAccessCallback, // virtual inherited (rmres) base (dispapi) + .DisplayApi.__dispapiAccessCallback__ = &__nvoc_up_thunk_RmResource_dispapiAccessCallback, // virtual inherited (rmres) base (rmres) + .DisplayApi.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .DisplayApi.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__dispcmnShareCallback__ = &__nvoc_up_thunk_RmResource_dispcmnShareCallback, // virtual inherited (rmres) base (dispapi) + .DisplayApi.__dispapiShareCallback__ = &__nvoc_up_thunk_RmResource_dispapiShareCallback, // virtual inherited (rmres) base (rmres) + .DisplayApi.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .DisplayApi.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__dispcmnGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispcmnGetMemInterMapParams, // virtual inherited (rmres) base (dispapi) + .DisplayApi.__dispapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispapiGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .DisplayApi.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__dispcmnCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispcmnCheckMemInterUnmap, // virtual inherited (rmres) base (dispapi) + .DisplayApi.__dispapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispapiCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .DisplayApi.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__dispcmnGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispcmnGetMemoryMappingDescriptor, // virtual inherited (rmres) base (dispapi) + .DisplayApi.__dispapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .DisplayApi.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__dispcmnControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispcmnControlSerialization_Prologue, // virtual inherited (rmres) base (dispapi) + .DisplayApi.__dispapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispapiControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .DisplayApi.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .DisplayApi.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__dispcmnControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispcmnControlSerialization_Epilogue, // virtual inherited (rmres) base (dispapi) + .DisplayApi.__dispapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispapiControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .DisplayApi.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .DisplayApi.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__dispcmnCanCopy__ = &__nvoc_up_thunk_RsResource_dispcmnCanCopy, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiCanCopy__ = &__nvoc_up_thunk_RsResource_dispapiCanCopy, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__dispcmnIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispcmnIsDuplicate, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispapiIsDuplicate, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__dispcmnPreDestruct__ = &__nvoc_up_thunk_RsResource_dispcmnPreDestruct, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiPreDestruct__ = &__nvoc_up_thunk_RsResource_dispapiPreDestruct, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__dispcmnControlFilter__ = &__nvoc_up_thunk_RsResource_dispcmnControlFilter, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiControlFilter__ = &__nvoc_up_thunk_RsResource_dispapiControlFilter, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__dispcmnMap__ = &__nvoc_up_thunk_RsResource_dispcmnMap, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiMap__ = &__nvoc_up_thunk_RsResource_dispapiMap, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resMap__ = &resMap_IMPL, // virtual + .__dispcmnUnmap__ = &__nvoc_up_thunk_RsResource_dispcmnUnmap, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiUnmap__ = &__nvoc_up_thunk_RsResource_dispapiUnmap, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__dispcmnIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispcmnIsPartialUnmapSupported, // inline virtual inherited (res) base (dispapi) body + .DisplayApi.__dispapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispapiIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .DisplayApi.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .DisplayApi.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__dispcmnMapTo__ = &__nvoc_up_thunk_RsResource_dispcmnMapTo, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiMapTo__ = &__nvoc_up_thunk_RsResource_dispapiMapTo, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__dispcmnUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispcmnUnmapFrom, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispapiUnmapFrom, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__dispcmnGetRefCount__ = &__nvoc_up_thunk_RsResource_dispcmnGetRefCount, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiGetRefCount__ = &__nvoc_up_thunk_RsResource_dispapiGetRefCount, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__dispcmnAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispcmnAddAdditionalDependants, // virtual inherited (res) base (dispapi) + .DisplayApi.__dispapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispapiAddAdditionalDependants, // virtual inherited (res) base (rmres) + .DisplayApi.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .DisplayApi.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__dispcmnGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispcmnGetNotificationListPtr, // virtual inherited (notify) base (dispapi) + .DisplayApi.__dispapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispapiGetNotificationListPtr, // virtual inherited (notify) base (notify) + .DisplayApi.Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .DisplayApi.Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__dispcmnGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispcmnGetNotificationShare, // virtual inherited (notify) base (dispapi) + .DisplayApi.__dispapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispapiGetNotificationShare, // virtual inherited (notify) base (notify) + .DisplayApi.Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .DisplayApi.Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__dispcmnSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispcmnSetNotificationShare, // virtual inherited (notify) base (dispapi) + .DisplayApi.__dispapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispapiSetNotificationShare, // virtual inherited (notify) base (notify) + .DisplayApi.Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .DisplayApi.Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__dispcmnUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispcmnUnregisterEvent, // virtual inherited (notify) base (dispapi) + .DisplayApi.__dispapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispapiUnregisterEvent, // virtual inherited (notify) base (notify) + .DisplayApi.Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .DisplayApi.Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__dispcmnGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispcmnGetOrAllocNotifShare, // virtual inherited (notify) base (dispapi) + .DisplayApi.__dispapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispapiGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .DisplayApi.Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .DisplayApi.Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.DisplayApi.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable = &vtable.DisplayApi.RmResource; // (rmres) super^2 + pThis->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.DisplayApi.Notifier.INotifier; // (inotify) super^3 + pThis->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable = &vtable.DisplayApi.Notifier; // (notify) super^2 + pThis->__nvoc_base_DisplayApi.__nvoc_vtable = &vtable.DisplayApi; // (dispapi) super + pThis->__nvoc_vtable = &vtable; // (dispcmn) this + + // Initialize vtable(s) with 134 per-object function pointer(s). __nvoc_init_funcTable_DispCommon_1(pThis); } diff --git a/src/nvidia/generated/g_disp_objs_nvoc.h b/src/nvidia/generated/g_disp_objs_nvoc.h index 4e53665b9d..045a20e0ff 100644 --- a/src/nvidia/generated/g_disp_objs_nvoc.h +++ b/src/nvidia/generated/g_disp_objs_nvoc.h @@ -7,14 +7,14 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -108,10 +108,15 @@ typedef struct DispChannel DispChannel; #endif +// Metadata including vtable +struct NVOC_VTABLE__DisplayApi; + + struct DisplayApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__DisplayApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; @@ -126,7 +131,22 @@ struct DisplayApi { struct Notifier *__nvoc_pbase_Notifier; // notify super struct DisplayApi *__nvoc_pbase_DisplayApi; // dispapi - // Vtable with 26 per-object function pointers + // Data members + struct OBJGPU *pGpuInRmctrl; + struct OBJGPUGRP *pGpuGrp; + NvBool bBcResource; + NvU32 *pNotifyActions[8]; + NvU32 numNotifiers; + NvHandle hNotifierMemory; + struct Memory *pNotifierMemory; +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__DisplayApi { + const struct NVOC_VTABLE__RmResource RmResource; // (rmres) 21 function pointers + const struct NVOC_VTABLE__Notifier Notifier; // (notify) 5 function pointers + NV_STATUS (*__dispapiControl__)(struct DisplayApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (rmres) NV_STATUS (*__dispapiControl_Prologue__)(struct DisplayApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (rmres) void (*__dispapiControl_Epilogue__)(struct DisplayApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (rmres) @@ -153,15 +173,6 @@ struct DisplayApi { void (*__dispapiSetNotificationShare__)(struct DisplayApi * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) NV_STATUS (*__dispapiUnregisterEvent__)(struct DisplayApi * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) NV_STATUS (*__dispapiGetOrAllocNotifShare__)(struct DisplayApi * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) - - // Data members - struct OBJGPU *pGpuInRmctrl; - struct OBJGPUGRP *pGpuGrp; - NvBool bBcResource; - NvU32 *pNotifyActions[8]; - NvU32 numNotifiers; - NvHandle hNotifierMemory; - struct Memory *pNotifierMemory; }; #ifndef __NVOC_CLASS_DisplayApi_TYPEDEF__ @@ -194,162 +205,162 @@ NV_STATUS __nvoc_objCreate_DisplayApi(DisplayApi**, Dynamic*, NvU32, struct CALL // Wrapper macros -#define dispapiControl_FNPTR(pDisplayApi) pDisplayApi->__dispapiControl__ +#define dispapiControl_FNPTR(pDisplayApi) pDisplayApi->__nvoc_vtable->__dispapiControl__ #define dispapiControl(pDisplayApi, pCallContext, pParams) dispapiControl_DISPATCH(pDisplayApi, pCallContext, pParams) -#define dispapiControl_Prologue_FNPTR(pDisplayApi) pDisplayApi->__dispapiControl_Prologue__ +#define dispapiControl_Prologue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_vtable->__dispapiControl_Prologue__ #define dispapiControl_Prologue(pDisplayApi, pCallContext, pRsParams) dispapiControl_Prologue_DISPATCH(pDisplayApi, pCallContext, pRsParams) -#define dispapiControl_Epilogue_FNPTR(pDisplayApi) pDisplayApi->__dispapiControl_Epilogue__ +#define dispapiControl_Epilogue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_vtable->__dispapiControl_Epilogue__ #define dispapiControl_Epilogue(pDisplayApi, pCallContext, pRsParams) dispapiControl_Epilogue_DISPATCH(pDisplayApi, pCallContext, pRsParams) -#define dispapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define dispapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define dispapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define dispapiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ +#define dispapiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define dispapiShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) dispapiShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define dispapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define dispapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define dispapiGetMemInterMapParams(pRmResource, pParams) dispapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define dispapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define dispapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define dispapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define dispapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define dispapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define dispapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) dispapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define dispapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define dispapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define dispapiControlSerialization_Prologue(pResource, pCallContext, pParams) dispapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define dispapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define dispapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define dispapiControlSerialization_Epilogue(pResource, pCallContext, pParams) dispapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define dispapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define dispapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define dispapiCanCopy(pResource) dispapiCanCopy_DISPATCH(pResource) -#define dispapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define dispapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define dispapiIsDuplicate(pResource, hMemory, pDuplicate) dispapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define dispapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define dispapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define dispapiPreDestruct(pResource) dispapiPreDestruct_DISPATCH(pResource) -#define dispapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define dispapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define dispapiControlFilter(pResource, pCallContext, pParams) dispapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define dispapiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define dispapiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define dispapiMap(pResource, pCallContext, pParams, pCpuMapping) dispapiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define dispapiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define dispapiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define dispapiUnmap(pResource, pCallContext, pCpuMapping) dispapiUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define dispapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define dispapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define dispapiIsPartialUnmapSupported(pResource) dispapiIsPartialUnmapSupported_DISPATCH(pResource) -#define dispapiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define dispapiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define dispapiMapTo(pResource, pParams) dispapiMapTo_DISPATCH(pResource, pParams) -#define dispapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define dispapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define dispapiUnmapFrom(pResource, pParams) dispapiUnmapFrom_DISPATCH(pResource, pParams) -#define dispapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define dispapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define dispapiGetRefCount(pResource) dispapiGetRefCount_DISPATCH(pResource) -#define dispapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define dispapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define dispapiAddAdditionalDependants(pClient, pResource, pReference) dispapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define dispapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define dispapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define dispapiGetNotificationListPtr(pNotifier) dispapiGetNotificationListPtr_DISPATCH(pNotifier) -#define dispapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define dispapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define dispapiGetNotificationShare(pNotifier) dispapiGetNotificationShare_DISPATCH(pNotifier) -#define dispapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define dispapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define dispapiSetNotificationShare(pNotifier, pNotifShare) dispapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define dispapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define dispapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define dispapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define dispapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define dispapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define dispapiGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) dispapiGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS dispapiControl_DISPATCH(struct DisplayApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pDisplayApi->__dispapiControl__(pDisplayApi, pCallContext, pParams); + return pDisplayApi->__nvoc_vtable->__dispapiControl__(pDisplayApi, pCallContext, pParams); } static inline NV_STATUS dispapiControl_Prologue_DISPATCH(struct DisplayApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - return pDisplayApi->__dispapiControl_Prologue__(pDisplayApi, pCallContext, pRsParams); + return pDisplayApi->__nvoc_vtable->__dispapiControl_Prologue__(pDisplayApi, pCallContext, pRsParams); } static inline void dispapiControl_Epilogue_DISPATCH(struct DisplayApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - pDisplayApi->__dispapiControl_Epilogue__(pDisplayApi, pCallContext, pRsParams); + pDisplayApi->__nvoc_vtable->__dispapiControl_Epilogue__(pDisplayApi, pCallContext, pRsParams); } static inline NvBool dispapiAccessCallback_DISPATCH(struct DisplayApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__dispapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__dispapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool dispapiShareCallback_DISPATCH(struct DisplayApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__dispapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__dispapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS dispapiGetMemInterMapParams_DISPATCH(struct DisplayApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__dispapiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__dispapiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS dispapiCheckMemInterUnmap_DISPATCH(struct DisplayApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__dispapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__dispapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS dispapiGetMemoryMappingDescriptor_DISPATCH(struct DisplayApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__dispapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__dispapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS dispapiControlSerialization_Prologue_DISPATCH(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispapiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void dispapiControlSerialization_Epilogue_DISPATCH(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__dispapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool dispapiCanCopy_DISPATCH(struct DisplayApi *pResource) { - return pResource->__dispapiCanCopy__(pResource); + return pResource->__nvoc_vtable->__dispapiCanCopy__(pResource); } static inline NV_STATUS dispapiIsDuplicate_DISPATCH(struct DisplayApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__dispapiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__dispapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void dispapiPreDestruct_DISPATCH(struct DisplayApi *pResource) { - pResource->__dispapiPreDestruct__(pResource); + pResource->__nvoc_vtable->__dispapiPreDestruct__(pResource); } static inline NV_STATUS dispapiControlFilter_DISPATCH(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispapiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispapiControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS dispapiMap_DISPATCH(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__dispapiMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__dispapiMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS dispapiUnmap_DISPATCH(struct DisplayApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__dispapiUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__dispapiUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool dispapiIsPartialUnmapSupported_DISPATCH(struct DisplayApi *pResource) { - return pResource->__dispapiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__dispapiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS dispapiMapTo_DISPATCH(struct DisplayApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__dispapiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__dispapiMapTo__(pResource, pParams); } static inline NV_STATUS dispapiUnmapFrom_DISPATCH(struct DisplayApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__dispapiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__dispapiUnmapFrom__(pResource, pParams); } static inline NvU32 dispapiGetRefCount_DISPATCH(struct DisplayApi *pResource) { - return pResource->__dispapiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__dispapiGetRefCount__(pResource); } static inline void dispapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DisplayApi *pResource, RsResourceRef *pReference) { - pResource->__dispapiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__dispapiAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * dispapiGetNotificationListPtr_DISPATCH(struct DisplayApi *pNotifier) { - return pNotifier->__dispapiGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__dispapiGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * dispapiGetNotificationShare_DISPATCH(struct DisplayApi *pNotifier) { - return pNotifier->__dispapiGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__dispapiGetNotificationShare__(pNotifier); } static inline void dispapiSetNotificationShare_DISPATCH(struct DisplayApi *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__dispapiSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__dispapiSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS dispapiUnregisterEvent_DISPATCH(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__dispapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__dispapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS dispapiGetOrAllocNotifShare_DISPATCH(struct DisplayApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__dispapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__dispapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS dispapiSetUnicastAndSynchronize_KERNEL(struct DisplayApi *pDisplayApi, struct OBJGPUGRP *pGpuGroup, struct OBJGPU **ppGpu, OBJDISP **ppDisp, NvU32 subDeviceInstance); @@ -410,10 +421,15 @@ static inline NV_STATUS dispapiCtrlCmdEventSetNotification(struct DisplayApi *pD #endif +// Metadata including vtable +struct NVOC_VTABLE__DispObject; + + struct DispObject { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__DispObject *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct DisplayApi __nvoc_base_DisplayApi; @@ -428,7 +444,7 @@ struct DispObject { struct DisplayApi *__nvoc_pbase_DisplayApi; // dispapi super struct DispObject *__nvoc_pbase_DispObject; // dispobj - // Vtable with 46 per-object function pointers + // Vtable with 20 per-object function pointers NV_STATUS (*__dispobjCtrlCmdGetPinsetCount__)(struct DispObject * /*this*/, NV5070_CTRL_GET_PINSET_COUNT_PARAMS *); // exported (id=0x50700115) NV_STATUS (*__dispobjCtrlCmdGetPinsetPeer__)(struct DispObject * /*this*/, NV5070_CTRL_GET_PINSET_PEER_PARAMS *); // exported (id=0x50700116) NV_STATUS (*__dispobjCtrlCmdSetMempoolWARForBlitTearing__)(struct DispObject * /*this*/, NV5070_CTRL_SET_MEMPOOL_WAR_FOR_BLIT_TEARING_PARAMS *); // exported (id=0x50700119) @@ -449,6 +465,16 @@ struct DispObject { NV_STATUS (*__dispobjCtrlCmdSetSorFlushMode__)(struct DispObject * /*this*/, NV5070_CTRL_SET_SOR_FLUSH_MODE_PARAMS *); // exported (id=0x50700457) NV_STATUS (*__dispobjCtrlCmdSystemGetCapsV2__)(struct DispObject * /*this*/, NV5070_CTRL_SYSTEM_GET_CAPS_V2_PARAMS *); // exported (id=0x50700709) NV_STATUS (*__dispobjCtrlCmdEventSetTrigger__)(struct DispObject * /*this*/); // exported (id=0x50700902) + + // Data members + NvU32 rmFreeFlags; +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__DispObject { + const struct NVOC_VTABLE__DisplayApi DisplayApi; // (dispapi) 26 function pointers + NV_STATUS (*__dispobjControl__)(struct DispObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispapi) NV_STATUS (*__dispobjControl_Prologue__)(struct DispObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispapi) void (*__dispobjControl_Epilogue__)(struct DispObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispapi) @@ -475,9 +501,6 @@ struct DispObject { void (*__dispobjSetNotificationShare__)(struct DispObject * /*this*/, struct NotifShare *); // virtual inherited (notify) base (dispapi) NV_STATUS (*__dispobjUnregisterEvent__)(struct DispObject * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (dispapi) NV_STATUS (*__dispobjGetOrAllocNotifShare__)(struct DispObject * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (dispapi) - - // Data members - NvU32 rmFreeFlags; }; #ifndef __NVOC_CLASS_DispObject_TYPEDEF__ @@ -550,57 +573,57 @@ NV_STATUS __nvoc_objCreate_DispObject(DispObject**, Dynamic*, NvU32, struct CALL #define dispobjCtrlCmdSystemGetCapsV2(pDispObject, pCapsParams) dispobjCtrlCmdSystemGetCapsV2_DISPATCH(pDispObject, pCapsParams) #define dispobjCtrlCmdEventSetTrigger_FNPTR(pDispObject) pDispObject->__dispobjCtrlCmdEventSetTrigger__ #define dispobjCtrlCmdEventSetTrigger(pDispObject) dispobjCtrlCmdEventSetTrigger_DISPATCH(pDispObject) -#define dispobjControl_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__dispapiControl__ +#define dispobjControl_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__nvoc_vtable->__dispapiControl__ #define dispobjControl(pDisplayApi, pCallContext, pParams) dispobjControl_DISPATCH(pDisplayApi, pCallContext, pParams) -#define dispobjControl_Prologue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__dispapiControl_Prologue__ +#define dispobjControl_Prologue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__nvoc_vtable->__dispapiControl_Prologue__ #define dispobjControl_Prologue(pDisplayApi, pCallContext, pRsParams) dispobjControl_Prologue_DISPATCH(pDisplayApi, pCallContext, pRsParams) -#define dispobjControl_Epilogue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__dispapiControl_Epilogue__ +#define dispobjControl_Epilogue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__nvoc_vtable->__dispapiControl_Epilogue__ #define dispobjControl_Epilogue(pDisplayApi, pCallContext, pRsParams) dispobjControl_Epilogue_DISPATCH(pDisplayApi, pCallContext, pRsParams) -#define dispobjAccessCallback_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresAccessCallback__ +#define dispobjAccessCallback_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define dispobjAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispobjAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define dispobjShareCallback_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresShareCallback__ +#define dispobjShareCallback_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define dispobjShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) dispobjShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define dispobjGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define dispobjGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define dispobjGetMemInterMapParams(pRmResource, pParams) dispobjGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define dispobjCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define dispobjCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define dispobjCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispobjCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define dispobjGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define dispobjGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define dispobjGetMemoryMappingDescriptor(pRmResource, ppMemDesc) dispobjGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define dispobjControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define dispobjControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define dispobjControlSerialization_Prologue(pResource, pCallContext, pParams) dispobjControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define dispobjControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define dispobjControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define dispobjControlSerialization_Epilogue(pResource, pCallContext, pParams) dispobjControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define dispobjCanCopy_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define dispobjCanCopy_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define dispobjCanCopy(pResource) dispobjCanCopy_DISPATCH(pResource) -#define dispobjIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define dispobjIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define dispobjIsDuplicate(pResource, hMemory, pDuplicate) dispobjIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define dispobjPreDestruct_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define dispobjPreDestruct_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define dispobjPreDestruct(pResource) dispobjPreDestruct_DISPATCH(pResource) -#define dispobjControlFilter_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define dispobjControlFilter_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define dispobjControlFilter(pResource, pCallContext, pParams) dispobjControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define dispobjMap_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define dispobjMap_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define dispobjMap(pResource, pCallContext, pParams, pCpuMapping) dispobjMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define dispobjUnmap_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define dispobjUnmap_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define dispobjUnmap(pResource, pCallContext, pCpuMapping) dispobjUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define dispobjIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define dispobjIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define dispobjIsPartialUnmapSupported(pResource) dispobjIsPartialUnmapSupported_DISPATCH(pResource) -#define dispobjMapTo_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define dispobjMapTo_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define dispobjMapTo(pResource, pParams) dispobjMapTo_DISPATCH(pResource, pParams) -#define dispobjUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define dispobjUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define dispobjUnmapFrom(pResource, pParams) dispobjUnmapFrom_DISPATCH(pResource, pParams) -#define dispobjGetRefCount_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define dispobjGetRefCount_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define dispobjGetRefCount(pResource) dispobjGetRefCount_DISPATCH(pResource) -#define dispobjAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define dispobjAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define dispobjAddAdditionalDependants(pClient, pResource, pReference) dispobjAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define dispobjGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define dispobjGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define dispobjGetNotificationListPtr(pNotifier) dispobjGetNotificationListPtr_DISPATCH(pNotifier) -#define dispobjGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define dispobjGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define dispobjGetNotificationShare(pNotifier) dispobjGetNotificationShare_DISPATCH(pNotifier) -#define dispobjSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define dispobjSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define dispobjSetNotificationShare(pNotifier, pNotifShare) dispobjSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define dispobjUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define dispobjUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define dispobjUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispobjUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define dispobjGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define dispobjGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define dispobjGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) dispobjGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions @@ -685,107 +708,107 @@ static inline NV_STATUS dispobjCtrlCmdEventSetTrigger_DISPATCH(struct DispObject } static inline NV_STATUS dispobjControl_DISPATCH(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pDisplayApi->__dispobjControl__(pDisplayApi, pCallContext, pParams); + return pDisplayApi->__nvoc_vtable->__dispobjControl__(pDisplayApi, pCallContext, pParams); } static inline NV_STATUS dispobjControl_Prologue_DISPATCH(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - return pDisplayApi->__dispobjControl_Prologue__(pDisplayApi, pCallContext, pRsParams); + return pDisplayApi->__nvoc_vtable->__dispobjControl_Prologue__(pDisplayApi, pCallContext, pRsParams); } static inline void dispobjControl_Epilogue_DISPATCH(struct DispObject *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - pDisplayApi->__dispobjControl_Epilogue__(pDisplayApi, pCallContext, pRsParams); + pDisplayApi->__nvoc_vtable->__dispobjControl_Epilogue__(pDisplayApi, pCallContext, pRsParams); } static inline NvBool dispobjAccessCallback_DISPATCH(struct DispObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__dispobjAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__dispobjAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool dispobjShareCallback_DISPATCH(struct DispObject *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__dispobjShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__dispobjShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS dispobjGetMemInterMapParams_DISPATCH(struct DispObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__dispobjGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__dispobjGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS dispobjCheckMemInterUnmap_DISPATCH(struct DispObject *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__dispobjCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__dispobjCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS dispobjGetMemoryMappingDescriptor_DISPATCH(struct DispObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__dispobjGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__dispobjGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS dispobjControlSerialization_Prologue_DISPATCH(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispobjControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispobjControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void dispobjControlSerialization_Epilogue_DISPATCH(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispobjControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__dispobjControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool dispobjCanCopy_DISPATCH(struct DispObject *pResource) { - return pResource->__dispobjCanCopy__(pResource); + return pResource->__nvoc_vtable->__dispobjCanCopy__(pResource); } static inline NV_STATUS dispobjIsDuplicate_DISPATCH(struct DispObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__dispobjIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__dispobjIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void dispobjPreDestruct_DISPATCH(struct DispObject *pResource) { - pResource->__dispobjPreDestruct__(pResource); + pResource->__nvoc_vtable->__dispobjPreDestruct__(pResource); } static inline NV_STATUS dispobjControlFilter_DISPATCH(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispobjControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispobjControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS dispobjMap_DISPATCH(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__dispobjMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__dispobjMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS dispobjUnmap_DISPATCH(struct DispObject *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__dispobjUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__dispobjUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool dispobjIsPartialUnmapSupported_DISPATCH(struct DispObject *pResource) { - return pResource->__dispobjIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__dispobjIsPartialUnmapSupported__(pResource); } static inline NV_STATUS dispobjMapTo_DISPATCH(struct DispObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__dispobjMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__dispobjMapTo__(pResource, pParams); } static inline NV_STATUS dispobjUnmapFrom_DISPATCH(struct DispObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__dispobjUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__dispobjUnmapFrom__(pResource, pParams); } static inline NvU32 dispobjGetRefCount_DISPATCH(struct DispObject *pResource) { - return pResource->__dispobjGetRefCount__(pResource); + return pResource->__nvoc_vtable->__dispobjGetRefCount__(pResource); } static inline void dispobjAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispObject *pResource, RsResourceRef *pReference) { - pResource->__dispobjAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__dispobjAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * dispobjGetNotificationListPtr_DISPATCH(struct DispObject *pNotifier) { - return pNotifier->__dispobjGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__dispobjGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * dispobjGetNotificationShare_DISPATCH(struct DispObject *pNotifier) { - return pNotifier->__dispobjGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__dispobjGetNotificationShare__(pNotifier); } static inline void dispobjSetNotificationShare_DISPATCH(struct DispObject *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__dispobjSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__dispobjSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS dispobjUnregisterEvent_DISPATCH(struct DispObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__dispobjUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__dispobjUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS dispobjGetOrAllocNotifShare_DISPATCH(struct DispObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__dispobjGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__dispobjGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS dispobjConstructHal_IMPL(struct DispObject *pDispObject, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); @@ -893,10 +916,15 @@ static inline NvBool dispobjGetRmFreeFlags(struct DispObject *pDispObject) { #endif +// Metadata including vtable +struct NVOC_VTABLE__NvDispApi; + + struct NvDispApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__NvDispApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct DispObject __nvoc_base_DispObject; @@ -912,7 +940,7 @@ struct NvDispApi { struct DispObject *__nvoc_pbase_DispObject; // dispobj super struct NvDispApi *__nvoc_pbase_NvDispApi; // nvdispapi - // Vtable with 33 per-object function pointers + // Vtable with 7 per-object function pointers NV_STATUS (*__nvdispapiCtrlCmdIdleChannel__)(struct NvDispApi * /*this*/, NVC370_CTRL_IDLE_CHANNEL_PARAMS *); // exported (id=0xc3700101) NV_STATUS (*__nvdispapiCtrlCmdSetAccl__)(struct NvDispApi * /*this*/, NVC370_CTRL_SET_ACCL_PARAMS *); // exported (id=0xc3700102) NV_STATUS (*__nvdispapiCtrlCmdGetAccl__)(struct NvDispApi * /*this*/, NVC370_CTRL_GET_ACCL_PARAMS *); // exported (id=0xc3700103) @@ -920,6 +948,13 @@ struct NvDispApi { NV_STATUS (*__nvdispapiCtrlCmdSetSwaprdyGpioWar__)(struct NvDispApi * /*this*/, NVC370_CTRL_SET_SWAPRDY_GPIO_WAR_PARAMS *); // exported (id=0xc3700202) NV_STATUS (*__nvdispapiCtrlCmdGetLockpinsCaps__)(struct NvDispApi * /*this*/, NVC370_CTRL_GET_LOCKPINS_CAPS_PARAMS *); // exported (id=0xc3700201) NV_STATUS (*__nvdispapiCtrlCmdSetForceModeswitchFlagsOverrides__)(struct NvDispApi * /*this*/, NVC370_CTRL_CMD_SET_FORCE_MODESWITCH_FLAGS_OVERRIDES_PARAMS *); // exported (id=0xc3700602) +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__NvDispApi { + const struct NVOC_VTABLE__DispObject DispObject; // (dispobj) 26 function pointers + NV_STATUS (*__nvdispapiControl__)(struct NvDispApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispobj) NV_STATUS (*__nvdispapiControl_Prologue__)(struct NvDispApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispobj) void (*__nvdispapiControl_Epilogue__)(struct NvDispApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispobj) @@ -992,57 +1027,57 @@ NV_STATUS __nvoc_objCreate_NvDispApi(NvDispApi**, Dynamic*, NvU32, struct CALL_C #define nvdispapiCtrlCmdGetLockpinsCaps(pNvDispApi, pParams) nvdispapiCtrlCmdGetLockpinsCaps_DISPATCH(pNvDispApi, pParams) #define nvdispapiCtrlCmdSetForceModeswitchFlagsOverrides_FNPTR(pNvDispApi) pNvDispApi->__nvdispapiCtrlCmdSetForceModeswitchFlagsOverrides__ #define nvdispapiCtrlCmdSetForceModeswitchFlagsOverrides(pNvDispApi, pParams) nvdispapiCtrlCmdSetForceModeswitchFlagsOverrides_DISPATCH(pNvDispApi, pParams) -#define nvdispapiControl_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__dispapiControl__ +#define nvdispapiControl_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_vtable->__dispapiControl__ #define nvdispapiControl(pDisplayApi, pCallContext, pParams) nvdispapiControl_DISPATCH(pDisplayApi, pCallContext, pParams) -#define nvdispapiControl_Prologue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__dispapiControl_Prologue__ +#define nvdispapiControl_Prologue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_vtable->__dispapiControl_Prologue__ #define nvdispapiControl_Prologue(pDisplayApi, pCallContext, pRsParams) nvdispapiControl_Prologue_DISPATCH(pDisplayApi, pCallContext, pRsParams) -#define nvdispapiControl_Epilogue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__dispapiControl_Epilogue__ +#define nvdispapiControl_Epilogue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_vtable->__dispapiControl_Epilogue__ #define nvdispapiControl_Epilogue(pDisplayApi, pCallContext, pRsParams) nvdispapiControl_Epilogue_DISPATCH(pDisplayApi, pCallContext, pRsParams) -#define nvdispapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresAccessCallback__ +#define nvdispapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define nvdispapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) nvdispapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define nvdispapiShareCallback_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresShareCallback__ +#define nvdispapiShareCallback_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define nvdispapiShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) nvdispapiShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define nvdispapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define nvdispapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define nvdispapiGetMemInterMapParams(pRmResource, pParams) nvdispapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define nvdispapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define nvdispapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define nvdispapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) nvdispapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define nvdispapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define nvdispapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define nvdispapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) nvdispapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define nvdispapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define nvdispapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define nvdispapiControlSerialization_Prologue(pResource, pCallContext, pParams) nvdispapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define nvdispapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define nvdispapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define nvdispapiControlSerialization_Epilogue(pResource, pCallContext, pParams) nvdispapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define nvdispapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define nvdispapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define nvdispapiCanCopy(pResource) nvdispapiCanCopy_DISPATCH(pResource) -#define nvdispapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define nvdispapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define nvdispapiIsDuplicate(pResource, hMemory, pDuplicate) nvdispapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define nvdispapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define nvdispapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define nvdispapiPreDestruct(pResource) nvdispapiPreDestruct_DISPATCH(pResource) -#define nvdispapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define nvdispapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define nvdispapiControlFilter(pResource, pCallContext, pParams) nvdispapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define nvdispapiMap_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define nvdispapiMap_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define nvdispapiMap(pResource, pCallContext, pParams, pCpuMapping) nvdispapiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define nvdispapiUnmap_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define nvdispapiUnmap_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define nvdispapiUnmap(pResource, pCallContext, pCpuMapping) nvdispapiUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define nvdispapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define nvdispapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define nvdispapiIsPartialUnmapSupported(pResource) nvdispapiIsPartialUnmapSupported_DISPATCH(pResource) -#define nvdispapiMapTo_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define nvdispapiMapTo_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define nvdispapiMapTo(pResource, pParams) nvdispapiMapTo_DISPATCH(pResource, pParams) -#define nvdispapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define nvdispapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define nvdispapiUnmapFrom(pResource, pParams) nvdispapiUnmapFrom_DISPATCH(pResource, pParams) -#define nvdispapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define nvdispapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define nvdispapiGetRefCount(pResource) nvdispapiGetRefCount_DISPATCH(pResource) -#define nvdispapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define nvdispapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define nvdispapiAddAdditionalDependants(pClient, pResource, pReference) nvdispapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define nvdispapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define nvdispapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define nvdispapiGetNotificationListPtr(pNotifier) nvdispapiGetNotificationListPtr_DISPATCH(pNotifier) -#define nvdispapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define nvdispapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define nvdispapiGetNotificationShare(pNotifier) nvdispapiGetNotificationShare_DISPATCH(pNotifier) -#define nvdispapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define nvdispapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define nvdispapiSetNotificationShare(pNotifier, pNotifShare) nvdispapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define nvdispapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define nvdispapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define nvdispapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) nvdispapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define nvdispapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define nvdispapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DispObject.__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define nvdispapiGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) nvdispapiGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions @@ -1075,107 +1110,107 @@ static inline NV_STATUS nvdispapiCtrlCmdSetForceModeswitchFlagsOverrides_DISPATC } static inline NV_STATUS nvdispapiControl_DISPATCH(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pDisplayApi->__nvdispapiControl__(pDisplayApi, pCallContext, pParams); + return pDisplayApi->__nvoc_vtable->__nvdispapiControl__(pDisplayApi, pCallContext, pParams); } static inline NV_STATUS nvdispapiControl_Prologue_DISPATCH(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - return pDisplayApi->__nvdispapiControl_Prologue__(pDisplayApi, pCallContext, pRsParams); + return pDisplayApi->__nvoc_vtable->__nvdispapiControl_Prologue__(pDisplayApi, pCallContext, pRsParams); } static inline void nvdispapiControl_Epilogue_DISPATCH(struct NvDispApi *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - pDisplayApi->__nvdispapiControl_Epilogue__(pDisplayApi, pCallContext, pRsParams); + pDisplayApi->__nvoc_vtable->__nvdispapiControl_Epilogue__(pDisplayApi, pCallContext, pRsParams); } static inline NvBool nvdispapiAccessCallback_DISPATCH(struct NvDispApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__nvdispapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__nvdispapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool nvdispapiShareCallback_DISPATCH(struct NvDispApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__nvdispapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__nvdispapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS nvdispapiGetMemInterMapParams_DISPATCH(struct NvDispApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__nvdispapiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__nvdispapiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS nvdispapiCheckMemInterUnmap_DISPATCH(struct NvDispApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__nvdispapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__nvdispapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS nvdispapiGetMemoryMappingDescriptor_DISPATCH(struct NvDispApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__nvdispapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__nvdispapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS nvdispapiControlSerialization_Prologue_DISPATCH(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvdispapiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__nvdispapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void nvdispapiControlSerialization_Epilogue_DISPATCH(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__nvdispapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__nvdispapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool nvdispapiCanCopy_DISPATCH(struct NvDispApi *pResource) { - return pResource->__nvdispapiCanCopy__(pResource); + return pResource->__nvoc_vtable->__nvdispapiCanCopy__(pResource); } static inline NV_STATUS nvdispapiIsDuplicate_DISPATCH(struct NvDispApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__nvdispapiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__nvdispapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void nvdispapiPreDestruct_DISPATCH(struct NvDispApi *pResource) { - pResource->__nvdispapiPreDestruct__(pResource); + pResource->__nvoc_vtable->__nvdispapiPreDestruct__(pResource); } static inline NV_STATUS nvdispapiControlFilter_DISPATCH(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvdispapiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__nvdispapiControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS nvdispapiMap_DISPATCH(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__nvdispapiMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__nvdispapiMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS nvdispapiUnmap_DISPATCH(struct NvDispApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__nvdispapiUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__nvdispapiUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool nvdispapiIsPartialUnmapSupported_DISPATCH(struct NvDispApi *pResource) { - return pResource->__nvdispapiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__nvdispapiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS nvdispapiMapTo_DISPATCH(struct NvDispApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__nvdispapiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__nvdispapiMapTo__(pResource, pParams); } static inline NV_STATUS nvdispapiUnmapFrom_DISPATCH(struct NvDispApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__nvdispapiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__nvdispapiUnmapFrom__(pResource, pParams); } static inline NvU32 nvdispapiGetRefCount_DISPATCH(struct NvDispApi *pResource) { - return pResource->__nvdispapiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__nvdispapiGetRefCount__(pResource); } static inline void nvdispapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct NvDispApi *pResource, RsResourceRef *pReference) { - pResource->__nvdispapiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__nvdispapiAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * nvdispapiGetNotificationListPtr_DISPATCH(struct NvDispApi *pNotifier) { - return pNotifier->__nvdispapiGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__nvdispapiGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * nvdispapiGetNotificationShare_DISPATCH(struct NvDispApi *pNotifier) { - return pNotifier->__nvdispapiGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__nvdispapiGetNotificationShare__(pNotifier); } static inline void nvdispapiSetNotificationShare_DISPATCH(struct NvDispApi *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__nvdispapiSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__nvdispapiSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS nvdispapiUnregisterEvent_DISPATCH(struct NvDispApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__nvdispapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__nvdispapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS nvdispapiGetOrAllocNotifShare_DISPATCH(struct NvDispApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__nvdispapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__nvdispapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS nvdispapiCtrlCmdIdleChannel_IMPL(struct NvDispApi *pNvDispApi, NVC370_CTRL_IDLE_CHANNEL_PARAMS *pParams); @@ -1219,10 +1254,15 @@ NV_STATUS nvdispapiConstruct_IMPL(struct NvDispApi *arg_pNvdispApi, struct CALL_ #endif +// Metadata including vtable +struct NVOC_VTABLE__DispSwObj; + + struct DispSwObj { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__DispSwObj *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct DisplayApi __nvoc_base_DisplayApi; @@ -1237,11 +1277,18 @@ struct DispSwObj { struct DisplayApi *__nvoc_pbase_DisplayApi; // dispapi super struct DispSwObj *__nvoc_pbase_DispSwObj; // dispswobj - // Vtable with 30 per-object function pointers + // Vtable with 4 per-object function pointers NV_STATUS (*__dispswobjCtrlCmdIsModePossible__)(struct DispSwObj * /*this*/, NVC372_CTRL_IS_MODE_POSSIBLE_PARAMS *); // exported (id=0xc3720101) NV_STATUS (*__dispswobjCtrlCmdIsModePossibleOrSettings__)(struct DispSwObj * /*this*/, NVC372_CTRL_IS_MODE_POSSIBLE_OR_SETTINGS_PARAMS *); // exported (id=0xc3720102) NV_STATUS (*__dispswobjCtrlCmdVideoAdaptiveRefreshRate__)(struct DispSwObj * /*this*/, NVC372_CTRL_CMD_VIDEO_ADAPTIVE_REFRESH_RATE_PARAMS *); // exported (id=0xc3720103) NV_STATUS (*__dispswobjCtrlCmdGetActiveViewportPointIn__)(struct DispSwObj * /*this*/, NVC372_CTRL_CMD_GET_ACTIVE_VIEWPORT_POINT_IN_PARAMS *); // exported (id=0xc3720104) +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__DispSwObj { + const struct NVOC_VTABLE__DisplayApi DisplayApi; // (dispapi) 26 function pointers + NV_STATUS (*__dispswobjControl__)(struct DispSwObj * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispapi) NV_STATUS (*__dispswobjControl_Prologue__)(struct DispSwObj * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispapi) void (*__dispswobjControl_Epilogue__)(struct DispSwObj * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispapi) @@ -1308,57 +1355,57 @@ NV_STATUS __nvoc_objCreate_DispSwObj(DispSwObj**, Dynamic*, NvU32, struct CALL_C #define dispswobjCtrlCmdVideoAdaptiveRefreshRate(pDispSwObj, pParams) dispswobjCtrlCmdVideoAdaptiveRefreshRate_DISPATCH(pDispSwObj, pParams) #define dispswobjCtrlCmdGetActiveViewportPointIn_FNPTR(pDispSwObj) pDispSwObj->__dispswobjCtrlCmdGetActiveViewportPointIn__ #define dispswobjCtrlCmdGetActiveViewportPointIn(pDispSwObj, pParams) dispswobjCtrlCmdGetActiveViewportPointIn_DISPATCH(pDispSwObj, pParams) -#define dispswobjControl_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__dispapiControl__ +#define dispswobjControl_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__nvoc_vtable->__dispapiControl__ #define dispswobjControl(pDisplayApi, pCallContext, pParams) dispswobjControl_DISPATCH(pDisplayApi, pCallContext, pParams) -#define dispswobjControl_Prologue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__dispapiControl_Prologue__ +#define dispswobjControl_Prologue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__nvoc_vtable->__dispapiControl_Prologue__ #define dispswobjControl_Prologue(pDisplayApi, pCallContext, pRsParams) dispswobjControl_Prologue_DISPATCH(pDisplayApi, pCallContext, pRsParams) -#define dispswobjControl_Epilogue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__dispapiControl_Epilogue__ +#define dispswobjControl_Epilogue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__nvoc_vtable->__dispapiControl_Epilogue__ #define dispswobjControl_Epilogue(pDisplayApi, pCallContext, pRsParams) dispswobjControl_Epilogue_DISPATCH(pDisplayApi, pCallContext, pRsParams) -#define dispswobjAccessCallback_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresAccessCallback__ +#define dispswobjAccessCallback_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define dispswobjAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispswobjAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define dispswobjShareCallback_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresShareCallback__ +#define dispswobjShareCallback_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define dispswobjShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) dispswobjShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define dispswobjGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define dispswobjGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define dispswobjGetMemInterMapParams(pRmResource, pParams) dispswobjGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define dispswobjCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define dispswobjCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define dispswobjCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispswobjCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define dispswobjGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define dispswobjGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define dispswobjGetMemoryMappingDescriptor(pRmResource, ppMemDesc) dispswobjGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define dispswobjControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define dispswobjControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define dispswobjControlSerialization_Prologue(pResource, pCallContext, pParams) dispswobjControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define dispswobjControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define dispswobjControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define dispswobjControlSerialization_Epilogue(pResource, pCallContext, pParams) dispswobjControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define dispswobjCanCopy_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define dispswobjCanCopy_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define dispswobjCanCopy(pResource) dispswobjCanCopy_DISPATCH(pResource) -#define dispswobjIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define dispswobjIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define dispswobjIsDuplicate(pResource, hMemory, pDuplicate) dispswobjIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define dispswobjPreDestruct_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define dispswobjPreDestruct_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define dispswobjPreDestruct(pResource) dispswobjPreDestruct_DISPATCH(pResource) -#define dispswobjControlFilter_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define dispswobjControlFilter_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define dispswobjControlFilter(pResource, pCallContext, pParams) dispswobjControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define dispswobjMap_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define dispswobjMap_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define dispswobjMap(pResource, pCallContext, pParams, pCpuMapping) dispswobjMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define dispswobjUnmap_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define dispswobjUnmap_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define dispswobjUnmap(pResource, pCallContext, pCpuMapping) dispswobjUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define dispswobjIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define dispswobjIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define dispswobjIsPartialUnmapSupported(pResource) dispswobjIsPartialUnmapSupported_DISPATCH(pResource) -#define dispswobjMapTo_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define dispswobjMapTo_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define dispswobjMapTo(pResource, pParams) dispswobjMapTo_DISPATCH(pResource, pParams) -#define dispswobjUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define dispswobjUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define dispswobjUnmapFrom(pResource, pParams) dispswobjUnmapFrom_DISPATCH(pResource, pParams) -#define dispswobjGetRefCount_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define dispswobjGetRefCount_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define dispswobjGetRefCount(pResource) dispswobjGetRefCount_DISPATCH(pResource) -#define dispswobjAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define dispswobjAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define dispswobjAddAdditionalDependants(pClient, pResource, pReference) dispswobjAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define dispswobjGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define dispswobjGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define dispswobjGetNotificationListPtr(pNotifier) dispswobjGetNotificationListPtr_DISPATCH(pNotifier) -#define dispswobjGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define dispswobjGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define dispswobjGetNotificationShare(pNotifier) dispswobjGetNotificationShare_DISPATCH(pNotifier) -#define dispswobjSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define dispswobjSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define dispswobjSetNotificationShare(pNotifier, pNotifShare) dispswobjSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define dispswobjUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define dispswobjUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define dispswobjUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispswobjUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define dispswobjGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define dispswobjGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define dispswobjGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) dispswobjGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions @@ -1379,107 +1426,107 @@ static inline NV_STATUS dispswobjCtrlCmdGetActiveViewportPointIn_DISPATCH(struct } static inline NV_STATUS dispswobjControl_DISPATCH(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pDisplayApi->__dispswobjControl__(pDisplayApi, pCallContext, pParams); + return pDisplayApi->__nvoc_vtable->__dispswobjControl__(pDisplayApi, pCallContext, pParams); } static inline NV_STATUS dispswobjControl_Prologue_DISPATCH(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - return pDisplayApi->__dispswobjControl_Prologue__(pDisplayApi, pCallContext, pRsParams); + return pDisplayApi->__nvoc_vtable->__dispswobjControl_Prologue__(pDisplayApi, pCallContext, pRsParams); } static inline void dispswobjControl_Epilogue_DISPATCH(struct DispSwObj *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - pDisplayApi->__dispswobjControl_Epilogue__(pDisplayApi, pCallContext, pRsParams); + pDisplayApi->__nvoc_vtable->__dispswobjControl_Epilogue__(pDisplayApi, pCallContext, pRsParams); } static inline NvBool dispswobjAccessCallback_DISPATCH(struct DispSwObj *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__dispswobjAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__dispswobjAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool dispswobjShareCallback_DISPATCH(struct DispSwObj *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__dispswobjShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__dispswobjShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS dispswobjGetMemInterMapParams_DISPATCH(struct DispSwObj *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__dispswobjGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__dispswobjGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS dispswobjCheckMemInterUnmap_DISPATCH(struct DispSwObj *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__dispswobjCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__dispswobjCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS dispswobjGetMemoryMappingDescriptor_DISPATCH(struct DispSwObj *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__dispswobjGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__dispswobjGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS dispswobjControlSerialization_Prologue_DISPATCH(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispswobjControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispswobjControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void dispswobjControlSerialization_Epilogue_DISPATCH(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispswobjControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__dispswobjControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool dispswobjCanCopy_DISPATCH(struct DispSwObj *pResource) { - return pResource->__dispswobjCanCopy__(pResource); + return pResource->__nvoc_vtable->__dispswobjCanCopy__(pResource); } static inline NV_STATUS dispswobjIsDuplicate_DISPATCH(struct DispSwObj *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__dispswobjIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__dispswobjIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void dispswobjPreDestruct_DISPATCH(struct DispSwObj *pResource) { - pResource->__dispswobjPreDestruct__(pResource); + pResource->__nvoc_vtable->__dispswobjPreDestruct__(pResource); } static inline NV_STATUS dispswobjControlFilter_DISPATCH(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispswobjControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispswobjControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS dispswobjMap_DISPATCH(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__dispswobjMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__dispswobjMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS dispswobjUnmap_DISPATCH(struct DispSwObj *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__dispswobjUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__dispswobjUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool dispswobjIsPartialUnmapSupported_DISPATCH(struct DispSwObj *pResource) { - return pResource->__dispswobjIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__dispswobjIsPartialUnmapSupported__(pResource); } static inline NV_STATUS dispswobjMapTo_DISPATCH(struct DispSwObj *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__dispswobjMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__dispswobjMapTo__(pResource, pParams); } static inline NV_STATUS dispswobjUnmapFrom_DISPATCH(struct DispSwObj *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__dispswobjUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__dispswobjUnmapFrom__(pResource, pParams); } static inline NvU32 dispswobjGetRefCount_DISPATCH(struct DispSwObj *pResource) { - return pResource->__dispswobjGetRefCount__(pResource); + return pResource->__nvoc_vtable->__dispswobjGetRefCount__(pResource); } static inline void dispswobjAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispSwObj *pResource, RsResourceRef *pReference) { - pResource->__dispswobjAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__dispswobjAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * dispswobjGetNotificationListPtr_DISPATCH(struct DispSwObj *pNotifier) { - return pNotifier->__dispswobjGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__dispswobjGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * dispswobjGetNotificationShare_DISPATCH(struct DispSwObj *pNotifier) { - return pNotifier->__dispswobjGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__dispswobjGetNotificationShare__(pNotifier); } static inline void dispswobjSetNotificationShare_DISPATCH(struct DispSwObj *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__dispswobjSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__dispswobjSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS dispswobjUnregisterEvent_DISPATCH(struct DispSwObj *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__dispswobjUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__dispswobjUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS dispswobjGetOrAllocNotifShare_DISPATCH(struct DispSwObj *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__dispswobjGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__dispswobjGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS dispswobjCtrlCmdIsModePossible_IMPL(struct DispSwObj *pDispSwObj, NVC372_CTRL_IS_MODE_POSSIBLE_PARAMS *pParams); @@ -1513,10 +1560,15 @@ NV_STATUS dispswobjConstruct_IMPL(struct DispSwObj *arg_pDispSwObj, struct CALL_ #endif +// Metadata including vtable +struct NVOC_VTABLE__DispCommon; + + struct DispCommon { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__DispCommon *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct DisplayApi __nvoc_base_DisplayApi; @@ -1531,11 +1583,12 @@ struct DispCommon { struct DisplayApi *__nvoc_pbase_DisplayApi; // dispapi super struct DispCommon *__nvoc_pbase_DispCommon; // dispcmn - // Vtable with 156 per-object function pointers + // Vtable with 134 per-object function pointers NV_STATUS (*__dispcmnCtrlCmdSystemGetVblankCounter__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_VBLANK_COUNTER_PARAMS *); // exported (id=0x730105) NV_STATUS (*__dispcmnCtrlCmdSystemGetVblankEnable__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_VBLANK_ENABLE_PARAMS *); // exported (id=0x730106) NV_STATUS (*__dispcmnCtrlCmdSystemCheckSidebandSrSupport__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT_PARAMS *); // exported (id=0x73014c) NV_STATUS (*__dispcmnCtrlCmdSystemGetHotplugState__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_HOTPLUG_STATE_PARAMS *); // exported (id=0x73010a) + NV_STATUS (*__dispcmnCtrlCmdSystemNotifyDrrMscgWar__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_SYSTEM_NOTIFY_DRR_MSCG_WAR_PARAMS *); // exported (id=0x730158) NV_STATUS (*__dispcmnCtrlCmdSystemGetInternalDisplays__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_INTERNAL_DISPLAYS_PARAMS *); // exported (id=0x730116) NV_STATUS (*__dispcmnCtrlCmdSystemGetConnectorTable__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_CONNECTOR_TABLE_PARAMS *); // exported (id=0x73011d) NV_STATUS (*__dispcmnCtrlCmdSystemVrrDisplayInfo__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_VRR_DISPLAY_INFO_PARAMS *); // exported (id=0x73012c) @@ -1583,6 +1636,7 @@ struct DispCommon { NV_STATUS (*__dispcmnCtrlCmdSystemQueryDisplayIdsWithMux__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX_PARAMS *); // exported (id=0x73013d) NV_STATUS (*__dispcmnCtrlCmdSystemCheckSidebandI2cSupport__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT_PARAMS *); // exported (id=0x73014b) NV_STATUS (*__dispcmnCtrlCmdSystemAllocateDisplayBandwidth__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS *); // exported (id=0x730143) + NV_STATUS (*__dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_INTERNAL_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS *); // exported (id=0x730157) NV_STATUS (*__dispcmnCtrlCmdSystemGetHotplugConfig__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS *); // exported (id=0x730109) NV_STATUS (*__dispcmnCtrlCmdSystemGetHotplugEventConfig__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS *); // exported (id=0x730144) NV_STATUS (*__dispcmnCtrlCmdSystemSetHotplugEventConfig__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS *); // exported (id=0x730145) @@ -1617,6 +1671,7 @@ struct DispCommon { NV_STATUS (*__dispcmnCtrlCmdSpecificGetValidHeadWindowAssignment__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_GET_VALID_HEAD_WINDOW_ASSIGNMENT_PARAMS *); // exported (id=0x7302ad) NV_STATUS (*__dispcmnCtrlCmdSpecificSetHdmiAudioMutestream__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_SPECIFIC_SET_HDMI_AUDIO_MUTESTREAM_PARAMS *); // exported (id=0x730275) NV_STATUS (*__dispcmnCtrlCmdDfpEdpDriverUnload__)(struct DispCommon * /*this*/, NV0073_CTRL_DFP_EDP_DRIVER_UNLOAD_PARAMS *); // exported (id=0x731176) + NV_STATUS (*__dispcmnCtrlCmdDfpSetForceBlackPixels__)(struct DispCommon * /*this*/, NV0073_CTRL_DFP_SET_FORCE_BLACK_PIXELS_PARAMS *); // exported (id=0x731179) NV_STATUS (*__dispcmnCtrlCmdDfpGetInfo__)(struct DispCommon * /*this*/, NV0073_CTRL_DFP_GET_INFO_PARAMS *); // exported (id=0x731140) NV_STATUS (*__dispcmnCtrlCmdDfpGetDisplayportDongleInfo__)(struct DispCommon * /*this*/, NV0073_CTRL_DFP_GET_DISPLAYPORT_DONGLE_INFO_PARAMS *); // exported (id=0x731142) NV_STATUS (*__dispcmnCtrlCmdDfpSetEldAudioCaps__)(struct DispCommon * /*this*/, NV0073_CTRL_DFP_SET_ELD_AUDIO_CAP_PARAMS *); // exported (id=0x731144) @@ -1634,6 +1689,7 @@ struct DispCommon { NV_STATUS (*__dispcmnCtrlCmdDpCtrl__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_CTRL_PARAMS *); // exported (id=0x731343) NV_STATUS (*__dispcmnCtrlCmdDpGetLaneData__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_LANE_DATA_PARAMS *); // exported (id=0x731345) NV_STATUS (*__dispcmnCtrlCmdDpSetLaneData__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_LANE_DATA_PARAMS *); // exported (id=0x731346) + NV_STATUS (*__dispcmnCtrlCmdDpGetTestpattern__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_GET_TESTPATTERN_PARAMS *); // exported (id=0x731348) NV_STATUS (*__dispcmnCtrlCmdDpSetTestpattern__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS *); // exported (id=0x731347) NV_STATUS (*__dispcmnCtrlCmdDpMainLinkCtrl__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_MAIN_LINK_CTRL_PARAMS *); // exported (id=0x731356) NV_STATUS (*__dispcmnCtrlCmdDpSetAudioMuteStream__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_SET_AUDIO_MUTESTREAM_PARAMS *); // exported (id=0x731359) @@ -1662,6 +1718,17 @@ struct DispCommon { NV_STATUS (*__dispcmnCtrlCmdDpConfigMacroPad__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_PARAMS *); // exported (id=0x73137b) NV_STATUS (*__dispcmnCtrlCmdDpSetPreemphasisDrivecurrentPostcursor2Data__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_SET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS *); // exported (id=0x731351) NV_STATUS (*__dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data__)(struct DispCommon * /*this*/, NV0073_CTRL_DP_GET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS *); // exported (id=0x731352) + + // Data members + NvU32 hotPlugMaskToBeReported; + NvU32 hotUnplugMaskToBeReported; +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__DispCommon { + const struct NVOC_VTABLE__DisplayApi DisplayApi; // (dispapi) 26 function pointers + NV_STATUS (*__dispcmnControl__)(struct DispCommon * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispapi) NV_STATUS (*__dispcmnControl_Prologue__)(struct DispCommon * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispapi) void (*__dispcmnControl_Epilogue__)(struct DispCommon * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (dispapi) base (dispapi) @@ -1688,10 +1755,6 @@ struct DispCommon { void (*__dispcmnSetNotificationShare__)(struct DispCommon * /*this*/, struct NotifShare *); // virtual inherited (notify) base (dispapi) NV_STATUS (*__dispcmnUnregisterEvent__)(struct DispCommon * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (dispapi) NV_STATUS (*__dispcmnGetOrAllocNotifShare__)(struct DispCommon * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (dispapi) - - // Data members - NvU32 hotPlugMaskToBeReported; - NvU32 hotUnplugMaskToBeReported; }; #ifndef __NVOC_CLASS_DispCommon_TYPEDEF__ @@ -1732,6 +1795,8 @@ NV_STATUS __nvoc_objCreate_DispCommon(DispCommon**, Dynamic*, NvU32, struct CALL #define dispcmnCtrlCmdSystemCheckSidebandSrSupport(pDispCommon, pParams) dispcmnCtrlCmdSystemCheckSidebandSrSupport_DISPATCH(pDispCommon, pParams) #define dispcmnCtrlCmdSystemGetHotplugState_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetHotplugState__ #define dispcmnCtrlCmdSystemGetHotplugState(pDispCommon, pHotplugParams) dispcmnCtrlCmdSystemGetHotplugState_DISPATCH(pDispCommon, pHotplugParams) +#define dispcmnCtrlCmdSystemNotifyDrrMscgWar_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemNotifyDrrMscgWar__ +#define dispcmnCtrlCmdSystemNotifyDrrMscgWar(pDispCommon, pDrrMscgParams) dispcmnCtrlCmdSystemNotifyDrrMscgWar_DISPATCH(pDispCommon, pDrrMscgParams) #define dispcmnCtrlCmdSystemGetInternalDisplays_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetInternalDisplays__ #define dispcmnCtrlCmdSystemGetInternalDisplays(pDispCommon, pInternalDisplaysParams) dispcmnCtrlCmdSystemGetInternalDisplays_DISPATCH(pDispCommon, pInternalDisplaysParams) #define dispcmnCtrlCmdSystemGetConnectorTable_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetConnectorTable__ @@ -1826,6 +1891,8 @@ NV_STATUS __nvoc_objCreate_DispCommon(DispCommon**, Dynamic*, NvU32, struct CALL #define dispcmnCtrlCmdSystemCheckSidebandI2cSupport(pDispCommon, pParams) dispcmnCtrlCmdSystemCheckSidebandI2cSupport_DISPATCH(pDispCommon, pParams) #define dispcmnCtrlCmdSystemAllocateDisplayBandwidth_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemAllocateDisplayBandwidth__ #define dispcmnCtrlCmdSystemAllocateDisplayBandwidth(pDispCommon, pParams) dispcmnCtrlCmdSystemAllocateDisplayBandwidth_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth__ +#define dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth(pDispCommon, pParams) dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth_DISPATCH(pDispCommon, pParams) #define dispcmnCtrlCmdSystemGetHotplugConfig_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetHotplugConfig__ #define dispcmnCtrlCmdSystemGetHotplugConfig(pDispCommon, pHotplugParams) dispcmnCtrlCmdSystemGetHotplugConfig_DISPATCH(pDispCommon, pHotplugParams) #define dispcmnCtrlCmdSystemGetHotplugEventConfig_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetHotplugEventConfig__ @@ -1894,6 +1961,8 @@ NV_STATUS __nvoc_objCreate_DispCommon(DispCommon**, Dynamic*, NvU32, struct CALL #define dispcmnCtrlCmdSpecificSetHdmiAudioMutestream(pDispCommon, pParams) dispcmnCtrlCmdSpecificSetHdmiAudioMutestream_DISPATCH(pDispCommon, pParams) #define dispcmnCtrlCmdDfpEdpDriverUnload_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpEdpDriverUnload__ #define dispcmnCtrlCmdDfpEdpDriverUnload(pDispCommon, pParams) dispcmnCtrlCmdDfpEdpDriverUnload_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDfpSetForceBlackPixels_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpSetForceBlackPixels__ +#define dispcmnCtrlCmdDfpSetForceBlackPixels(pDispCommon, pParams) dispcmnCtrlCmdDfpSetForceBlackPixels_DISPATCH(pDispCommon, pParams) #define dispcmnCtrlCmdDfpGetInfo_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpGetInfo__ #define dispcmnCtrlCmdDfpGetInfo(pDispCommon, pParams) dispcmnCtrlCmdDfpGetInfo_DISPATCH(pDispCommon, pParams) #define dispcmnCtrlCmdDfpGetDisplayportDongleInfo_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDfpGetDisplayportDongleInfo__ @@ -1928,6 +1997,8 @@ NV_STATUS __nvoc_objCreate_DispCommon(DispCommon**, Dynamic*, NvU32, struct CALL #define dispcmnCtrlCmdDpGetLaneData(pDispCommon, pParams) dispcmnCtrlCmdDpGetLaneData_DISPATCH(pDispCommon, pParams) #define dispcmnCtrlCmdDpSetLaneData_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpSetLaneData__ #define dispcmnCtrlCmdDpSetLaneData(pDispCommon, pParams) dispcmnCtrlCmdDpSetLaneData_DISPATCH(pDispCommon, pParams) +#define dispcmnCtrlCmdDpGetTestpattern_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpGetTestpattern__ +#define dispcmnCtrlCmdDpGetTestpattern(pDispCommon, pParams) dispcmnCtrlCmdDpGetTestpattern_DISPATCH(pDispCommon, pParams) #define dispcmnCtrlCmdDpSetTestpattern_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpSetTestpattern__ #define dispcmnCtrlCmdDpSetTestpattern(pDispCommon, pParams) dispcmnCtrlCmdDpSetTestpattern_DISPATCH(pDispCommon, pParams) #define dispcmnCtrlCmdDpMainLinkCtrl_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpMainLinkCtrl__ @@ -1984,57 +2055,57 @@ NV_STATUS __nvoc_objCreate_DispCommon(DispCommon**, Dynamic*, NvU32, struct CALL #define dispcmnCtrlCmdDpSetPreemphasisDrivecurrentPostcursor2Data(pDispCommon, pParams) dispcmnCtrlCmdDpSetPreemphasisDrivecurrentPostcursor2Data_DISPATCH(pDispCommon, pParams) #define dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data__ #define dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data(pDispCommon, pParams) dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data_DISPATCH(pDispCommon, pParams) -#define dispcmnControl_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__dispapiControl__ +#define dispcmnControl_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__nvoc_vtable->__dispapiControl__ #define dispcmnControl(pDisplayApi, pCallContext, pParams) dispcmnControl_DISPATCH(pDisplayApi, pCallContext, pParams) -#define dispcmnControl_Prologue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__dispapiControl_Prologue__ +#define dispcmnControl_Prologue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__nvoc_vtable->__dispapiControl_Prologue__ #define dispcmnControl_Prologue(pDisplayApi, pCallContext, pRsParams) dispcmnControl_Prologue_DISPATCH(pDisplayApi, pCallContext, pRsParams) -#define dispcmnControl_Epilogue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__dispapiControl_Epilogue__ +#define dispcmnControl_Epilogue_FNPTR(pDisplayApi) pDisplayApi->__nvoc_base_DisplayApi.__nvoc_vtable->__dispapiControl_Epilogue__ #define dispcmnControl_Epilogue(pDisplayApi, pCallContext, pRsParams) dispcmnControl_Epilogue_DISPATCH(pDisplayApi, pCallContext, pRsParams) -#define dispcmnAccessCallback_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresAccessCallback__ +#define dispcmnAccessCallback_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define dispcmnAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispcmnAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define dispcmnShareCallback_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresShareCallback__ +#define dispcmnShareCallback_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define dispcmnShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) dispcmnShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define dispcmnGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define dispcmnGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define dispcmnGetMemInterMapParams(pRmResource, pParams) dispcmnGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define dispcmnCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define dispcmnCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define dispcmnCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispcmnCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define dispcmnGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define dispcmnGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define dispcmnGetMemoryMappingDescriptor(pRmResource, ppMemDesc) dispcmnGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define dispcmnControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define dispcmnControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define dispcmnControlSerialization_Prologue(pResource, pCallContext, pParams) dispcmnControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define dispcmnControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define dispcmnControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define dispcmnControlSerialization_Epilogue(pResource, pCallContext, pParams) dispcmnControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define dispcmnCanCopy_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define dispcmnCanCopy_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define dispcmnCanCopy(pResource) dispcmnCanCopy_DISPATCH(pResource) -#define dispcmnIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define dispcmnIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define dispcmnIsDuplicate(pResource, hMemory, pDuplicate) dispcmnIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define dispcmnPreDestruct_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define dispcmnPreDestruct_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define dispcmnPreDestruct(pResource) dispcmnPreDestruct_DISPATCH(pResource) -#define dispcmnControlFilter_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define dispcmnControlFilter_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define dispcmnControlFilter(pResource, pCallContext, pParams) dispcmnControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define dispcmnMap_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define dispcmnMap_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define dispcmnMap(pResource, pCallContext, pParams, pCpuMapping) dispcmnMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define dispcmnUnmap_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define dispcmnUnmap_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define dispcmnUnmap(pResource, pCallContext, pCpuMapping) dispcmnUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define dispcmnIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define dispcmnIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define dispcmnIsPartialUnmapSupported(pResource) dispcmnIsPartialUnmapSupported_DISPATCH(pResource) -#define dispcmnMapTo_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define dispcmnMapTo_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define dispcmnMapTo(pResource, pParams) dispcmnMapTo_DISPATCH(pResource, pParams) -#define dispcmnUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define dispcmnUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define dispcmnUnmapFrom(pResource, pParams) dispcmnUnmapFrom_DISPATCH(pResource, pParams) -#define dispcmnGetRefCount_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define dispcmnGetRefCount_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define dispcmnGetRefCount(pResource) dispcmnGetRefCount_DISPATCH(pResource) -#define dispcmnAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define dispcmnAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_DisplayApi.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define dispcmnAddAdditionalDependants(pClient, pResource, pReference) dispcmnAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define dispcmnGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define dispcmnGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define dispcmnGetNotificationListPtr(pNotifier) dispcmnGetNotificationListPtr_DISPATCH(pNotifier) -#define dispcmnGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define dispcmnGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define dispcmnGetNotificationShare(pNotifier) dispcmnGetNotificationShare_DISPATCH(pNotifier) -#define dispcmnSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define dispcmnSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define dispcmnSetNotificationShare(pNotifier, pNotifShare) dispcmnSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define dispcmnUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define dispcmnUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define dispcmnUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispcmnUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define dispcmnGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define dispcmnGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_DisplayApi.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define dispcmnGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) dispcmnGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions @@ -2054,6 +2125,10 @@ static inline NV_STATUS dispcmnCtrlCmdSystemGetHotplugState_DISPATCH(struct Disp return pDispCommon->__dispcmnCtrlCmdSystemGetHotplugState__(pDispCommon, pHotplugParams); } +static inline NV_STATUS dispcmnCtrlCmdSystemNotifyDrrMscgWar_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_NOTIFY_DRR_MSCG_WAR_PARAMS *pDrrMscgParams) { + return pDispCommon->__dispcmnCtrlCmdSystemNotifyDrrMscgWar__(pDispCommon, pDrrMscgParams); +} + static inline NV_STATUS dispcmnCtrlCmdSystemGetInternalDisplays_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_INTERNAL_DISPLAYS_PARAMS *pInternalDisplaysParams) { return pDispCommon->__dispcmnCtrlCmdSystemGetInternalDisplays__(pDispCommon, pInternalDisplaysParams); } @@ -2242,6 +2317,10 @@ static inline NV_STATUS dispcmnCtrlCmdSystemAllocateDisplayBandwidth_DISPATCH(st return pDispCommon->__dispcmnCtrlCmdSystemAllocateDisplayBandwidth__(pDispCommon, pParams); } +static inline NV_STATUS dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_INTERNAL_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS *pParams) { + return pDispCommon->__dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth__(pDispCommon, pParams); +} + static inline NV_STATUS dispcmnCtrlCmdSystemGetHotplugConfig_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS *pHotplugParams) { return pDispCommon->__dispcmnCtrlCmdSystemGetHotplugConfig__(pDispCommon, pHotplugParams); } @@ -2378,6 +2457,10 @@ static inline NV_STATUS dispcmnCtrlCmdDfpEdpDriverUnload_DISPATCH(struct DispCom return pDispCommon->__dispcmnCtrlCmdDfpEdpDriverUnload__(pDispCommon, pParams); } +static inline NV_STATUS dispcmnCtrlCmdDfpSetForceBlackPixels_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_SET_FORCE_BLACK_PIXELS_PARAMS *pParams) { + return pDispCommon->__dispcmnCtrlCmdDfpSetForceBlackPixels__(pDispCommon, pParams); +} + static inline NV_STATUS dispcmnCtrlCmdDfpGetInfo_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_GET_INFO_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDfpGetInfo__(pDispCommon, pParams); } @@ -2446,6 +2529,10 @@ static inline NV_STATUS dispcmnCtrlCmdDpSetLaneData_DISPATCH(struct DispCommon * return pDispCommon->__dispcmnCtrlCmdDpSetLaneData__(pDispCommon, pParams); } +static inline NV_STATUS dispcmnCtrlCmdDpGetTestpattern_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DP_GET_TESTPATTERN_PARAMS *pParams) { + return pDispCommon->__dispcmnCtrlCmdDpGetTestpattern__(pDispCommon, pParams); +} + static inline NV_STATUS dispcmnCtrlCmdDpSetTestpattern_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS *pParams) { return pDispCommon->__dispcmnCtrlCmdDpSetTestpattern__(pDispCommon, pParams); } @@ -2559,107 +2646,107 @@ static inline NV_STATUS dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Dat } static inline NV_STATUS dispcmnControl_DISPATCH(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pDisplayApi->__dispcmnControl__(pDisplayApi, pCallContext, pParams); + return pDisplayApi->__nvoc_vtable->__dispcmnControl__(pDisplayApi, pCallContext, pParams); } static inline NV_STATUS dispcmnControl_Prologue_DISPATCH(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - return pDisplayApi->__dispcmnControl_Prologue__(pDisplayApi, pCallContext, pRsParams); + return pDisplayApi->__nvoc_vtable->__dispcmnControl_Prologue__(pDisplayApi, pCallContext, pRsParams); } static inline void dispcmnControl_Epilogue_DISPATCH(struct DispCommon *pDisplayApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pRsParams) { - pDisplayApi->__dispcmnControl_Epilogue__(pDisplayApi, pCallContext, pRsParams); + pDisplayApi->__nvoc_vtable->__dispcmnControl_Epilogue__(pDisplayApi, pCallContext, pRsParams); } static inline NvBool dispcmnAccessCallback_DISPATCH(struct DispCommon *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__dispcmnAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__dispcmnAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool dispcmnShareCallback_DISPATCH(struct DispCommon *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__dispcmnShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__dispcmnShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS dispcmnGetMemInterMapParams_DISPATCH(struct DispCommon *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__dispcmnGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__dispcmnGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS dispcmnCheckMemInterUnmap_DISPATCH(struct DispCommon *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__dispcmnCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__dispcmnCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS dispcmnGetMemoryMappingDescriptor_DISPATCH(struct DispCommon *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__dispcmnGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__dispcmnGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS dispcmnControlSerialization_Prologue_DISPATCH(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispcmnControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispcmnControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void dispcmnControlSerialization_Epilogue_DISPATCH(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispcmnControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__dispcmnControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool dispcmnCanCopy_DISPATCH(struct DispCommon *pResource) { - return pResource->__dispcmnCanCopy__(pResource); + return pResource->__nvoc_vtable->__dispcmnCanCopy__(pResource); } static inline NV_STATUS dispcmnIsDuplicate_DISPATCH(struct DispCommon *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__dispcmnIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__dispcmnIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void dispcmnPreDestruct_DISPATCH(struct DispCommon *pResource) { - pResource->__dispcmnPreDestruct__(pResource); + pResource->__nvoc_vtable->__dispcmnPreDestruct__(pResource); } static inline NV_STATUS dispcmnControlFilter_DISPATCH(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispcmnControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispcmnControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS dispcmnMap_DISPATCH(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__dispcmnMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__dispcmnMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS dispcmnUnmap_DISPATCH(struct DispCommon *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__dispcmnUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__dispcmnUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool dispcmnIsPartialUnmapSupported_DISPATCH(struct DispCommon *pResource) { - return pResource->__dispcmnIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__dispcmnIsPartialUnmapSupported__(pResource); } static inline NV_STATUS dispcmnMapTo_DISPATCH(struct DispCommon *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__dispcmnMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__dispcmnMapTo__(pResource, pParams); } static inline NV_STATUS dispcmnUnmapFrom_DISPATCH(struct DispCommon *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__dispcmnUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__dispcmnUnmapFrom__(pResource, pParams); } static inline NvU32 dispcmnGetRefCount_DISPATCH(struct DispCommon *pResource) { - return pResource->__dispcmnGetRefCount__(pResource); + return pResource->__nvoc_vtable->__dispcmnGetRefCount__(pResource); } static inline void dispcmnAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispCommon *pResource, RsResourceRef *pReference) { - pResource->__dispcmnAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__dispcmnAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * dispcmnGetNotificationListPtr_DISPATCH(struct DispCommon *pNotifier) { - return pNotifier->__dispcmnGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__dispcmnGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * dispcmnGetNotificationShare_DISPATCH(struct DispCommon *pNotifier) { - return pNotifier->__dispcmnGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__dispcmnGetNotificationShare__(pNotifier); } static inline void dispcmnSetNotificationShare_DISPATCH(struct DispCommon *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__dispcmnSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__dispcmnSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS dispcmnUnregisterEvent_DISPATCH(struct DispCommon *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__dispcmnUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__dispcmnUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS dispcmnGetOrAllocNotifShare_DISPATCH(struct DispCommon *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__dispcmnGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__dispcmnGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS dispcmnCtrlCmdSystemGetVblankCounter_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_VBLANK_COUNTER_PARAMS *pVBCounterParams); @@ -2670,6 +2757,8 @@ NV_STATUS dispcmnCtrlCmdSystemCheckSidebandSrSupport_IMPL(struct DispCommon *pDi NV_STATUS dispcmnCtrlCmdSystemGetHotplugState_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_HOTPLUG_STATE_PARAMS *pHotplugParams); +NV_STATUS dispcmnCtrlCmdSystemNotifyDrrMscgWar_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_CMD_SYSTEM_NOTIFY_DRR_MSCG_WAR_PARAMS *pDrrMscgParams); + NV_STATUS dispcmnCtrlCmdSystemGetInternalDisplays_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_INTERNAL_DISPLAYS_PARAMS *pInternalDisplaysParams); NV_STATUS dispcmnCtrlCmdSystemGetConnectorTable_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_CONNECTOR_TABLE_PARAMS *pParams); @@ -2764,6 +2853,8 @@ NV_STATUS dispcmnCtrlCmdSystemCheckSidebandI2cSupport_IMPL(struct DispCommon *pD NV_STATUS dispcmnCtrlCmdSystemAllocateDisplayBandwidth_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS *pParams); +NV_STATUS dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_INTERNAL_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS *pParams); + NV_STATUS dispcmnCtrlCmdSystemGetHotplugConfig_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS *pHotplugParams); NV_STATUS dispcmnCtrlCmdSystemGetHotplugEventConfig_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS *pParams); @@ -2832,6 +2923,8 @@ NV_STATUS dispcmnCtrlCmdSpecificSetHdmiAudioMutestream_IMPL(struct DispCommon *p NV_STATUS dispcmnCtrlCmdDfpEdpDriverUnload_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_EDP_DRIVER_UNLOAD_PARAMS *pParams); +NV_STATUS dispcmnCtrlCmdDfpSetForceBlackPixels_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_SET_FORCE_BLACK_PIXELS_PARAMS *pParams); + NV_STATUS dispcmnCtrlCmdDfpGetInfo_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_GET_INFO_PARAMS *pParams); NV_STATUS dispcmnCtrlCmdDfpGetDisplayportDongleInfo_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DFP_GET_DISPLAYPORT_DONGLE_INFO_PARAMS *pParams); @@ -2866,6 +2959,8 @@ NV_STATUS dispcmnCtrlCmdDpGetLaneData_IMPL(struct DispCommon *pDispCommon, NV007 NV_STATUS dispcmnCtrlCmdDpSetLaneData_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_LANE_DATA_PARAMS *pParams); +NV_STATUS dispcmnCtrlCmdDpGetTestpattern_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_GET_TESTPATTERN_PARAMS *pParams); + NV_STATUS dispcmnCtrlCmdDpSetTestpattern_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS *pParams); NV_STATUS dispcmnCtrlCmdDpMainLinkCtrl_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_DP_MAIN_LINK_CTRL_PARAMS *pParams); @@ -2943,21 +3038,6 @@ void dispcmnGetByDevice_IMPL(struct RsClient *pClient, NvHandle hDevice, struct */ NV_STATUS CliFindDispChannelInfo(NvHandle, NvHandle, struct DispChannel **ppDispChannel, NvHandle*); -/** - * @warning This function is deprecated! Please use dispcmnGetByHandle. - */ -NvBool CliGetDispCommonInfo(NvHandle, NvHandle, struct DisplayApi **); - -/** - * @warning This function is deprecated! Please use dispobjGetByHandle. - */ -NvBool CliGetDispInfo(NvHandle, NvHandle, struct DisplayApi **); - -/** - * @warning This function is deprecated! Please use dispobjGetByHandle. - */ -struct DisplayApi *CliGetDispFromDispHandle(NvHandle hClient, NvHandle hDisp); - #endif // DISP_OBJS_H #ifdef __cplusplus diff --git a/src/nvidia/generated/g_disp_sf_user_nvoc.c b/src/nvidia/generated/g_disp_sf_user_nvoc.c index 9fb97f80aa..1ce22d6c54 100644 --- a/src/nvidia/generated/g_disp_sf_user_nvoc.c +++ b/src/nvidia/generated/g_disp_sf_user_nvoc.c @@ -93,133 +93,201 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_DispSfUser = /*pExportInfo=*/ &__nvoc_export_info_DispSfUser }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_DispSfUser_gpuresGetRegBaseOffsetAndSize(struct GpuResource *pDispSfUser, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this + // 1 down-thunk(s) defined to bridge methods in DispSfUser from superclasses // dispsfGetRegBaseOffsetAndSize: virtual override (gpures) base (gpures) -static NV_STATUS __nvoc_down_thunk_DispSfUser_gpuresGetRegBaseOffsetAndSize(struct GpuResource *pDispSfUser, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_down_thunk_DispSfUser_gpuresGetRegBaseOffsetAndSize(struct GpuResource *pDispSfUser, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return dispsfGetRegBaseOffsetAndSize((struct DispSfUser *)(((unsigned char *) pDispSfUser) - __nvoc_rtti_DispSfUser_GpuResource.offset), pGpu, pOffset, pSize); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_dispsfControl(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispsfMap(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispsfUnmap(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_dispsfShareCallback(struct DispSfUser *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispsfGetMapAddrSpace(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispsfInternalControlForward(struct DispSfUser *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_dispsfGetInternalObjectHandle(struct DispSfUser *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_dispsfAccessCallback(struct DispSfUser *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispsfGetMemInterMapParams(struct DispSfUser *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispsfCheckMemInterUnmap(struct DispSfUser *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispsfGetMemoryMappingDescriptor(struct DispSfUser *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispsfControlSerialization_Prologue(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_dispsfControlSerialization_Epilogue(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispsfControl_Prologue(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_dispsfControl_Epilogue(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_dispsfCanCopy(struct DispSfUser *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispsfIsDuplicate(struct DispSfUser *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_dispsfPreDestruct(struct DispSfUser *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispsfControlFilter(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_dispsfIsPartialUnmapSupported(struct DispSfUser *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispsfMapTo(struct DispSfUser *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispsfUnmapFrom(struct DispSfUser *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_dispsfGetRefCount(struct DispSfUser *pResource); // this +void __nvoc_up_thunk_RsResource_dispsfAddAdditionalDependants(struct RsClient *pClient, struct DispSfUser *pResource, RsResourceRef *pReference); // this + // 24 up-thunk(s) defined to bridge methods in DispSfUser to superclasses // dispsfControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispsfControl(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispsfControl(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSfUser_GpuResource.offset), pCallContext, pParams); } // dispsfMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispsfMap(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispsfMap(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSfUser_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // dispsfUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispsfUnmap(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispsfUnmap(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSfUser_GpuResource.offset), pCallContext, pCpuMapping); } // dispsfShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_dispsfShareCallback(struct DispSfUser *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_dispsfShareCallback(struct DispSfUser *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSfUser_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // dispsfGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispsfGetMapAddrSpace(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispsfGetMapAddrSpace(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSfUser_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // dispsfInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispsfInternalControlForward(struct DispSfUser *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispsfInternalControlForward(struct DispSfUser *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSfUser_GpuResource.offset), command, pParams, size); } // dispsfGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_dispsfGetInternalObjectHandle(struct DispSfUser *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_dispsfGetInternalObjectHandle(struct DispSfUser *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSfUser_GpuResource.offset)); } // dispsfAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_dispsfAccessCallback(struct DispSfUser *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_dispsfAccessCallback(struct DispSfUser *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // dispsfGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_dispsfGetMemInterMapParams(struct DispSfUser *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispsfGetMemInterMapParams(struct DispSfUser *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispSfUser_RmResource.offset), pParams); } // dispsfCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_dispsfCheckMemInterUnmap(struct DispSfUser *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_dispsfCheckMemInterUnmap(struct DispSfUser *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispSfUser_RmResource.offset), bSubdeviceHandleProvided); } // dispsfGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_dispsfGetMemoryMappingDescriptor(struct DispSfUser *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_dispsfGetMemoryMappingDescriptor(struct DispSfUser *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispSfUser_RmResource.offset), ppMemDesc); } // dispsfControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_dispsfControlSerialization_Prologue(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispsfControlSerialization_Prologue(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RmResource.offset), pCallContext, pParams); } // dispsfControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_dispsfControlSerialization_Epilogue(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_dispsfControlSerialization_Epilogue(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RmResource.offset), pCallContext, pParams); } // dispsfControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_dispsfControl_Prologue(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispsfControl_Prologue(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RmResource.offset), pCallContext, pParams); } // dispsfControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_dispsfControl_Epilogue(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_dispsfControl_Epilogue(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RmResource.offset), pCallContext, pParams); } // dispsfCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_dispsfCanCopy(struct DispSfUser *pResource) { +NvBool __nvoc_up_thunk_RsResource_dispsfCanCopy(struct DispSfUser *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RsResource.offset)); } // dispsfIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_dispsfIsDuplicate(struct DispSfUser *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_dispsfIsDuplicate(struct DispSfUser *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RsResource.offset), hMemory, pDuplicate); } // dispsfPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_dispsfPreDestruct(struct DispSfUser *pResource) { +void __nvoc_up_thunk_RsResource_dispsfPreDestruct(struct DispSfUser *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RsResource.offset)); } // dispsfControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_dispsfControlFilter(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispsfControlFilter(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RsResource.offset), pCallContext, pParams); } // dispsfIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_dispsfIsPartialUnmapSupported(struct DispSfUser *pResource) { +NvBool __nvoc_up_thunk_RsResource_dispsfIsPartialUnmapSupported(struct DispSfUser *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RsResource.offset)); } // dispsfMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_dispsfMapTo(struct DispSfUser *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispsfMapTo(struct DispSfUser *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RsResource.offset), pParams); } // dispsfUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_dispsfUnmapFrom(struct DispSfUser *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispsfUnmapFrom(struct DispSfUser *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RsResource.offset), pParams); } // dispsfGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_dispsfGetRefCount(struct DispSfUser *pResource) { +NvU32 __nvoc_up_thunk_RsResource_dispsfGetRefCount(struct DispSfUser *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RsResource.offset)); } // dispsfAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_dispsfAddAdditionalDependants(struct RsClient *pClient, struct DispSfUser *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_dispsfAddAdditionalDependants(struct RsClient *pClient, struct DispSfUser *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSfUser_RsResource.offset), pReference); } @@ -262,89 +330,110 @@ NV_STATUS __nvoc_ctor_DispSfUser(DispSfUser *pThis, struct CALL_CONTEXT * arg_pC // Vtable initialization static void __nvoc_init_funcTable_DispSfUser_1(DispSfUser *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // dispsfGetRegBaseOffsetAndSize -- virtual override (gpures) base (gpures) - pThis->__dispsfGetRegBaseOffsetAndSize__ = &dispsfGetRegBaseOffsetAndSize_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &__nvoc_down_thunk_DispSfUser_gpuresGetRegBaseOffsetAndSize; - - // dispsfControl -- virtual inherited (gpures) base (gpures) - pThis->__dispsfControl__ = &__nvoc_up_thunk_GpuResource_dispsfControl; - - // dispsfMap -- virtual inherited (gpures) base (gpures) - pThis->__dispsfMap__ = &__nvoc_up_thunk_GpuResource_dispsfMap; - - // dispsfUnmap -- virtual inherited (gpures) base (gpures) - pThis->__dispsfUnmap__ = &__nvoc_up_thunk_GpuResource_dispsfUnmap; - - // dispsfShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__dispsfShareCallback__ = &__nvoc_up_thunk_GpuResource_dispsfShareCallback; - - // dispsfGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__dispsfGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_dispsfGetMapAddrSpace; - - // dispsfInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__dispsfInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dispsfInternalControlForward; - - // dispsfGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__dispsfGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dispsfGetInternalObjectHandle; - - // dispsfAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__dispsfAccessCallback__ = &__nvoc_up_thunk_RmResource_dispsfAccessCallback; - - // dispsfGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__dispsfGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispsfGetMemInterMapParams; - - // dispsfCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__dispsfCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispsfCheckMemInterUnmap; - - // dispsfGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__dispsfGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispsfGetMemoryMappingDescriptor; - - // dispsfControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__dispsfControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispsfControlSerialization_Prologue; - - // dispsfControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__dispsfControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispsfControlSerialization_Epilogue; - - // dispsfControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__dispsfControl_Prologue__ = &__nvoc_up_thunk_RmResource_dispsfControl_Prologue; - - // dispsfControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__dispsfControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dispsfControl_Epilogue; - - // dispsfCanCopy -- virtual inherited (res) base (gpures) - pThis->__dispsfCanCopy__ = &__nvoc_up_thunk_RsResource_dispsfCanCopy; - - // dispsfIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__dispsfIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispsfIsDuplicate; - - // dispsfPreDestruct -- virtual inherited (res) base (gpures) - pThis->__dispsfPreDestruct__ = &__nvoc_up_thunk_RsResource_dispsfPreDestruct; - - // dispsfControlFilter -- virtual inherited (res) base (gpures) - pThis->__dispsfControlFilter__ = &__nvoc_up_thunk_RsResource_dispsfControlFilter; - - // dispsfIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__dispsfIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispsfIsPartialUnmapSupported; - - // dispsfMapTo -- virtual inherited (res) base (gpures) - pThis->__dispsfMapTo__ = &__nvoc_up_thunk_RsResource_dispsfMapTo; - - // dispsfUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__dispsfUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispsfUnmapFrom; - - // dispsfGetRefCount -- virtual inherited (res) base (gpures) - pThis->__dispsfGetRefCount__ = &__nvoc_up_thunk_RsResource_dispsfGetRefCount; - - // dispsfAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__dispsfAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispsfAddAdditionalDependants; -} // End __nvoc_init_funcTable_DispSfUser_1 with approximately 26 basic block(s). +} // End __nvoc_init_funcTable_DispSfUser_1 // Initialize vtable(s) for 25 virtual method(s). void __nvoc_init_funcTable_DispSfUser(DispSfUser *pThis) { - // Initialize vtable(s) with 25 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__DispSfUser vtable = { + .__dispsfGetRegBaseOffsetAndSize__ = &dispsfGetRegBaseOffsetAndSize_IMPL, // virtual override (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &__nvoc_down_thunk_DispSfUser_gpuresGetRegBaseOffsetAndSize, // virtual + .__dispsfControl__ = &__nvoc_up_thunk_GpuResource_dispsfControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__dispsfMap__ = &__nvoc_up_thunk_GpuResource_dispsfMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__dispsfUnmap__ = &__nvoc_up_thunk_GpuResource_dispsfUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__dispsfShareCallback__ = &__nvoc_up_thunk_GpuResource_dispsfShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__dispsfGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_dispsfGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__dispsfInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dispsfInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__dispsfGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dispsfGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__dispsfAccessCallback__ = &__nvoc_up_thunk_RmResource_dispsfAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__dispsfGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispsfGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__dispsfCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_dispsfCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__dispsfGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispsfGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__dispsfControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispsfControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__dispsfControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispsfControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__dispsfControl_Prologue__ = &__nvoc_up_thunk_RmResource_dispsfControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__dispsfControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dispsfControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__dispsfCanCopy__ = &__nvoc_up_thunk_RsResource_dispsfCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__dispsfIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispsfIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__dispsfPreDestruct__ = &__nvoc_up_thunk_RsResource_dispsfPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__dispsfControlFilter__ = &__nvoc_up_thunk_RsResource_dispsfControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__dispsfIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispsfIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__dispsfMapTo__ = &__nvoc_up_thunk_RsResource_dispsfMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__dispsfUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispsfUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__dispsfGetRefCount__ = &__nvoc_up_thunk_RsResource_dispsfGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__dispsfAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispsfAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (dispsf) this __nvoc_init_funcTable_DispSfUser_1(pThis); } diff --git a/src/nvidia/generated/g_disp_sf_user_nvoc.h b/src/nvidia/generated/g_disp_sf_user_nvoc.h index ed38b1b58e..941aaf31b4 100644 --- a/src/nvidia/generated/g_disp_sf_user_nvoc.h +++ b/src/nvidia/generated/g_disp_sf_user_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -65,10 +65,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__DispSfUser; + + struct DispSfUser { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__DispSfUser *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -81,7 +86,16 @@ struct DispSfUser { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct DispSfUser *__nvoc_pbase_DispSfUser; // dispsf - // Vtable with 25 per-object function pointers + // Data members + NvU32 ControlOffset; + NvU32 ControlLength; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__DispSfUser { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + NV_STATUS (*__dispsfGetRegBaseOffsetAndSize__)(struct DispSfUser * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual override (gpures) base (gpures) NV_STATUS (*__dispsfControl__)(struct DispSfUser * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__dispsfMap__)(struct DispSfUser * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -107,10 +121,6 @@ struct DispSfUser { NV_STATUS (*__dispsfUnmapFrom__)(struct DispSfUser * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__dispsfGetRefCount__)(struct DispSfUser * /*this*/); // virtual inherited (res) base (gpures) void (*__dispsfAddAdditionalDependants__)(struct RsClient *, struct DispSfUser * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - NvU32 ControlOffset; - NvU32 ControlLength; }; #ifndef __NVOC_CLASS_DispSfUser_TYPEDEF__ @@ -143,156 +153,156 @@ NV_STATUS __nvoc_objCreate_DispSfUser(DispSfUser**, Dynamic*, NvU32, struct CALL // Wrapper macros -#define dispsfGetRegBaseOffsetAndSize_FNPTR(pDispSfUser) pDispSfUser->__dispsfGetRegBaseOffsetAndSize__ +#define dispsfGetRegBaseOffsetAndSize_FNPTR(pDispSfUser) pDispSfUser->__nvoc_vtable->__dispsfGetRegBaseOffsetAndSize__ #define dispsfGetRegBaseOffsetAndSize(pDispSfUser, pGpu, pOffset, pSize) dispsfGetRegBaseOffsetAndSize_DISPATCH(pDispSfUser, pGpu, pOffset, pSize) -#define dispsfControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define dispsfControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define dispsfControl(pGpuResource, pCallContext, pParams) dispsfControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define dispsfMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define dispsfMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define dispsfMap(pGpuResource, pCallContext, pParams, pCpuMapping) dispsfMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define dispsfUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define dispsfUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define dispsfUnmap(pGpuResource, pCallContext, pCpuMapping) dispsfUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define dispsfShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define dispsfShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define dispsfShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) dispsfShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define dispsfGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define dispsfGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define dispsfGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) dispsfGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define dispsfInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define dispsfInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define dispsfInternalControlForward(pGpuResource, command, pParams, size) dispsfInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define dispsfGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define dispsfGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define dispsfGetInternalObjectHandle(pGpuResource) dispsfGetInternalObjectHandle_DISPATCH(pGpuResource) -#define dispsfAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define dispsfAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define dispsfAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispsfAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define dispsfGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define dispsfGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define dispsfGetMemInterMapParams(pRmResource, pParams) dispsfGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define dispsfCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define dispsfCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define dispsfCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) dispsfCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define dispsfGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define dispsfGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define dispsfGetMemoryMappingDescriptor(pRmResource, ppMemDesc) dispsfGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define dispsfControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define dispsfControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define dispsfControlSerialization_Prologue(pResource, pCallContext, pParams) dispsfControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define dispsfControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define dispsfControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define dispsfControlSerialization_Epilogue(pResource, pCallContext, pParams) dispsfControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define dispsfControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define dispsfControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define dispsfControl_Prologue(pResource, pCallContext, pParams) dispsfControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define dispsfControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define dispsfControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define dispsfControl_Epilogue(pResource, pCallContext, pParams) dispsfControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define dispsfCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define dispsfCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define dispsfCanCopy(pResource) dispsfCanCopy_DISPATCH(pResource) -#define dispsfIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define dispsfIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define dispsfIsDuplicate(pResource, hMemory, pDuplicate) dispsfIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define dispsfPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define dispsfPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define dispsfPreDestruct(pResource) dispsfPreDestruct_DISPATCH(pResource) -#define dispsfControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define dispsfControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define dispsfControlFilter(pResource, pCallContext, pParams) dispsfControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define dispsfIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define dispsfIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define dispsfIsPartialUnmapSupported(pResource) dispsfIsPartialUnmapSupported_DISPATCH(pResource) -#define dispsfMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define dispsfMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define dispsfMapTo(pResource, pParams) dispsfMapTo_DISPATCH(pResource, pParams) -#define dispsfUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define dispsfUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define dispsfUnmapFrom(pResource, pParams) dispsfUnmapFrom_DISPATCH(pResource, pParams) -#define dispsfGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define dispsfGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define dispsfGetRefCount(pResource) dispsfGetRefCount_DISPATCH(pResource) -#define dispsfAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define dispsfAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define dispsfAddAdditionalDependants(pClient, pResource, pReference) dispsfAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NV_STATUS dispsfGetRegBaseOffsetAndSize_DISPATCH(struct DispSfUser *pDispSfUser, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pDispSfUser->__dispsfGetRegBaseOffsetAndSize__(pDispSfUser, pGpu, pOffset, pSize); + return pDispSfUser->__nvoc_vtable->__dispsfGetRegBaseOffsetAndSize__(pDispSfUser, pGpu, pOffset, pSize); } static inline NV_STATUS dispsfControl_DISPATCH(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__dispsfControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__dispsfControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS dispsfMap_DISPATCH(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispsfMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__dispsfMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS dispsfUnmap_DISPATCH(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispsfUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__dispsfUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool dispsfShareCallback_DISPATCH(struct DispSfUser *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__dispsfShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__dispsfShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS dispsfGetMapAddrSpace_DISPATCH(struct DispSfUser *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__dispsfGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__dispsfGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS dispsfInternalControlForward_DISPATCH(struct DispSfUser *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__dispsfInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__dispsfInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle dispsfGetInternalObjectHandle_DISPATCH(struct DispSfUser *pGpuResource) { - return pGpuResource->__dispsfGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__dispsfGetInternalObjectHandle__(pGpuResource); } static inline NvBool dispsfAccessCallback_DISPATCH(struct DispSfUser *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__dispsfAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__dispsfAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS dispsfGetMemInterMapParams_DISPATCH(struct DispSfUser *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__dispsfGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__dispsfGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS dispsfCheckMemInterUnmap_DISPATCH(struct DispSfUser *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__dispsfCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__dispsfCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS dispsfGetMemoryMappingDescriptor_DISPATCH(struct DispSfUser *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__dispsfGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__dispsfGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS dispsfControlSerialization_Prologue_DISPATCH(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispsfControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispsfControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void dispsfControlSerialization_Epilogue_DISPATCH(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispsfControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__dispsfControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS dispsfControl_Prologue_DISPATCH(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispsfControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispsfControl_Prologue__(pResource, pCallContext, pParams); } static inline void dispsfControl_Epilogue_DISPATCH(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispsfControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__dispsfControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool dispsfCanCopy_DISPATCH(struct DispSfUser *pResource) { - return pResource->__dispsfCanCopy__(pResource); + return pResource->__nvoc_vtable->__dispsfCanCopy__(pResource); } static inline NV_STATUS dispsfIsDuplicate_DISPATCH(struct DispSfUser *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__dispsfIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__dispsfIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void dispsfPreDestruct_DISPATCH(struct DispSfUser *pResource) { - pResource->__dispsfPreDestruct__(pResource); + pResource->__nvoc_vtable->__dispsfPreDestruct__(pResource); } static inline NV_STATUS dispsfControlFilter_DISPATCH(struct DispSfUser *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispsfControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispsfControlFilter__(pResource, pCallContext, pParams); } static inline NvBool dispsfIsPartialUnmapSupported_DISPATCH(struct DispSfUser *pResource) { - return pResource->__dispsfIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__dispsfIsPartialUnmapSupported__(pResource); } static inline NV_STATUS dispsfMapTo_DISPATCH(struct DispSfUser *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__dispsfMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__dispsfMapTo__(pResource, pParams); } static inline NV_STATUS dispsfUnmapFrom_DISPATCH(struct DispSfUser *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__dispsfUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__dispsfUnmapFrom__(pResource, pParams); } static inline NvU32 dispsfGetRefCount_DISPATCH(struct DispSfUser *pResource) { - return pResource->__dispsfGetRefCount__(pResource); + return pResource->__nvoc_vtable->__dispsfGetRefCount__(pResource); } static inline void dispsfAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispSfUser *pResource, RsResourceRef *pReference) { - pResource->__dispsfAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__dispsfAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS dispsfGetRegBaseOffsetAndSize_IMPL(struct DispSfUser *pDispSfUser, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); diff --git a/src/nvidia/generated/g_dispsw_nvoc.c b/src/nvidia/generated/g_dispsw_nvoc.c index 651f515d1e..4a345e9ab6 100644 --- a/src/nvidia/generated/g_dispsw_nvoc.c +++ b/src/nvidia/generated/g_dispsw_nvoc.c @@ -144,168 +144,278 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispSwOb }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super^2 +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super^2 +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap(struct RmResource *pChannelDescendant, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_down_thunk_DispSwObject_chandesGetSwMethods(struct ChannelDescendant *pDispSw, const METHOD **ppMethods, NvU32 *pNumMethods); // this + // 1 down-thunk(s) defined to bridge methods in DispSwObject from superclasses // dispswGetSwMethods: virtual halified (singleton optimized) override (chandes) base (chandes) body -static NV_STATUS __nvoc_down_thunk_DispSwObject_chandesGetSwMethods(struct ChannelDescendant *pDispSw, const METHOD **ppMethods, NvU32 *pNumMethods) { +NV_STATUS __nvoc_down_thunk_DispSwObject_chandesGetSwMethods(struct ChannelDescendant *pDispSw, const METHOD **ppMethods, NvU32 *pNumMethods) { return dispswGetSwMethods((struct DispSwObject *)(((unsigned char *) pDispSw) - __nvoc_rtti_DispSwObject_ChannelDescendant.offset), ppMethods, pNumMethods); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^3 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^3 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^3 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super^2 +NV_STATUS __nvoc_up_thunk_GpuResource_chandesControl(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesMap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesUnmap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_GpuResource_chandesShareCallback(struct ChannelDescendant *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize(struct ChannelDescendant *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesInternalControlForward(struct ChannelDescendant *pGpuResource, NvU32 command, void *pParams, NvU32 size); // super +NvHandle __nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle(struct ChannelDescendant *pGpuResource); // super +NvBool __nvoc_up_thunk_RmResource_chandesAccessCallback(struct ChannelDescendant *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemInterMapParams(struct ChannelDescendant *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor(struct ChannelDescendant *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControl_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControl_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesCanCopy(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesIsDuplicate(struct ChannelDescendant *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_chandesPreDestruct(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesControlFilter(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesMapTo(struct ChannelDescendant *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesUnmapFrom(struct ChannelDescendant *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_chandesGetRefCount(struct ChannelDescendant *pResource); // super +void __nvoc_up_thunk_RsResource_chandesAddAdditionalDependants(struct RsClient *pClient, struct ChannelDescendant *pResource, RsResourceRef *pReference); // super +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_chandesGetNotificationListPtr(struct ChannelDescendant *pNotifier); // super +struct NotifShare * __nvoc_up_thunk_Notifier_chandesGetNotificationShare(struct ChannelDescendant *pNotifier); // super +void __nvoc_up_thunk_Notifier_chandesSetNotificationShare(struct ChannelDescendant *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesUnregisterEvent(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NvBool __nvoc_up_thunk_ChannelDescendant_dispswIsSwMethodStalling(struct DispSwObject *pChannelDescendant, NvU32 hHandle); // this +NV_STATUS __nvoc_up_thunk_ChannelDescendant_dispswCheckMemInterUnmap(struct DispSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispswControl(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispswMap(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispswUnmap(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_dispswShareCallback(struct DispSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispswGetRegBaseOffsetAndSize(struct DispSwObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispswGetMapAddrSpace(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_dispswInternalControlForward(struct DispSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_dispswGetInternalObjectHandle(struct DispSwObject *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_dispswAccessCallback(struct DispSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispswGetMemInterMapParams(struct DispSwObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispswGetMemoryMappingDescriptor(struct DispSwObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispswControlSerialization_Prologue(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_dispswControlSerialization_Epilogue(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_dispswControl_Prologue(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_dispswControl_Epilogue(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_dispswCanCopy(struct DispSwObject *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispswIsDuplicate(struct DispSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_dispswPreDestruct(struct DispSwObject *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispswControlFilter(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_dispswIsPartialUnmapSupported(struct DispSwObject *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispswMapTo(struct DispSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_dispswUnmapFrom(struct DispSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_dispswGetRefCount(struct DispSwObject *pResource); // this +void __nvoc_up_thunk_RsResource_dispswAddAdditionalDependants(struct RsClient *pClient, struct DispSwObject *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispswGetNotificationListPtr(struct DispSwObject *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_dispswGetNotificationShare(struct DispSwObject *pNotifier); // this +void __nvoc_up_thunk_Notifier_dispswSetNotificationShare(struct DispSwObject *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_dispswUnregisterEvent(struct DispSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_dispswGetOrAllocNotifShare(struct DispSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 31 up-thunk(s) defined to bridge methods in DispSwObject to superclasses // dispswIsSwMethodStalling: virtual inherited (chandes) base (chandes) -static NvBool __nvoc_up_thunk_ChannelDescendant_dispswIsSwMethodStalling(struct DispSwObject *pChannelDescendant, NvU32 hHandle) { +NvBool __nvoc_up_thunk_ChannelDescendant_dispswIsSwMethodStalling(struct DispSwObject *pChannelDescendant, NvU32 hHandle) { return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_DispSwObject_ChannelDescendant.offset), hHandle); } // dispswCheckMemInterUnmap: virtual inherited (chandes) base (chandes) -static NV_STATUS __nvoc_up_thunk_ChannelDescendant_dispswCheckMemInterUnmap(struct DispSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_ChannelDescendant_dispswCheckMemInterUnmap(struct DispSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_DispSwObject_ChannelDescendant.offset), bSubdeviceHandleProvided); } // dispswControl: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispswControl(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispswControl(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset), pCallContext, pParams); } // dispswMap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispswMap(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispswMap(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // dispswUnmap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispswUnmap(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispswUnmap(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset), pCallContext, pCpuMapping); } // dispswShareCallback: virtual inherited (gpures) base (chandes) -static NvBool __nvoc_up_thunk_GpuResource_dispswShareCallback(struct DispSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_dispswShareCallback(struct DispSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // dispswGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispswGetRegBaseOffsetAndSize(struct DispSwObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispswGetRegBaseOffsetAndSize(struct DispSwObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset), pGpu, pOffset, pSize); } // dispswGetMapAddrSpace: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispswGetMapAddrSpace(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispswGetMapAddrSpace(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // dispswInternalControlForward: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_dispswInternalControlForward(struct DispSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_dispswInternalControlForward(struct DispSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset), command, pParams, size); } // dispswGetInternalObjectHandle: virtual inherited (gpures) base (chandes) -static NvHandle __nvoc_up_thunk_GpuResource_dispswGetInternalObjectHandle(struct DispSwObject *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_dispswGetInternalObjectHandle(struct DispSwObject *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DispSwObject_GpuResource.offset)); } // dispswAccessCallback: virtual inherited (rmres) base (chandes) -static NvBool __nvoc_up_thunk_RmResource_dispswAccessCallback(struct DispSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_dispswAccessCallback(struct DispSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // dispswGetMemInterMapParams: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_dispswGetMemInterMapParams(struct DispSwObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispswGetMemInterMapParams(struct DispSwObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispSwObject_RmResource.offset), pParams); } // dispswGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_dispswGetMemoryMappingDescriptor(struct DispSwObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_dispswGetMemoryMappingDescriptor(struct DispSwObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DispSwObject_RmResource.offset), ppMemDesc); } // dispswControlSerialization_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_dispswControlSerialization_Prologue(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispswControlSerialization_Prologue(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RmResource.offset), pCallContext, pParams); } // dispswControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_dispswControlSerialization_Epilogue(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_dispswControlSerialization_Epilogue(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RmResource.offset), pCallContext, pParams); } // dispswControl_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_dispswControl_Prologue(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_dispswControl_Prologue(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RmResource.offset), pCallContext, pParams); } // dispswControl_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_dispswControl_Epilogue(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_dispswControl_Epilogue(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RmResource.offset), pCallContext, pParams); } // dispswCanCopy: virtual inherited (res) base (chandes) -static NvBool __nvoc_up_thunk_RsResource_dispswCanCopy(struct DispSwObject *pResource) { +NvBool __nvoc_up_thunk_RsResource_dispswCanCopy(struct DispSwObject *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RsResource.offset)); } // dispswIsDuplicate: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_dispswIsDuplicate(struct DispSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_dispswIsDuplicate(struct DispSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RsResource.offset), hMemory, pDuplicate); } // dispswPreDestruct: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_dispswPreDestruct(struct DispSwObject *pResource) { +void __nvoc_up_thunk_RsResource_dispswPreDestruct(struct DispSwObject *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RsResource.offset)); } // dispswControlFilter: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_dispswControlFilter(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispswControlFilter(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RsResource.offset), pCallContext, pParams); } // dispswIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body -static NvBool __nvoc_up_thunk_RsResource_dispswIsPartialUnmapSupported(struct DispSwObject *pResource) { +NvBool __nvoc_up_thunk_RsResource_dispswIsPartialUnmapSupported(struct DispSwObject *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RsResource.offset)); } // dispswMapTo: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_dispswMapTo(struct DispSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispswMapTo(struct DispSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RsResource.offset), pParams); } // dispswUnmapFrom: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_dispswUnmapFrom(struct DispSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_dispswUnmapFrom(struct DispSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RsResource.offset), pParams); } // dispswGetRefCount: virtual inherited (res) base (chandes) -static NvU32 __nvoc_up_thunk_RsResource_dispswGetRefCount(struct DispSwObject *pResource) { +NvU32 __nvoc_up_thunk_RsResource_dispswGetRefCount(struct DispSwObject *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RsResource.offset)); } // dispswAddAdditionalDependants: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_dispswAddAdditionalDependants(struct RsClient *pClient, struct DispSwObject *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_dispswAddAdditionalDependants(struct RsClient *pClient, struct DispSwObject *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DispSwObject_RsResource.offset), pReference); } // dispswGetNotificationListPtr: virtual inherited (notify) base (chandes) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispswGetNotificationListPtr(struct DispSwObject *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_dispswGetNotificationListPtr(struct DispSwObject *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispSwObject_Notifier.offset)); } // dispswGetNotificationShare: virtual inherited (notify) base (chandes) -static struct NotifShare * __nvoc_up_thunk_Notifier_dispswGetNotificationShare(struct DispSwObject *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_dispswGetNotificationShare(struct DispSwObject *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispSwObject_Notifier.offset)); } // dispswSetNotificationShare: virtual inherited (notify) base (chandes) -static void __nvoc_up_thunk_Notifier_dispswSetNotificationShare(struct DispSwObject *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_dispswSetNotificationShare(struct DispSwObject *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispSwObject_Notifier.offset), pNotifShare); } // dispswUnregisterEvent: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_dispswUnregisterEvent(struct DispSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_dispswUnregisterEvent(struct DispSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispSwObject_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // dispswGetOrAllocNotifShare: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_dispswGetOrAllocNotifShare(struct DispSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_dispswGetOrAllocNotifShare(struct DispSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DispSwObject_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -360,114 +470,170 @@ static void __nvoc_init_funcTable_DispSwObject_1(DispSwObject *pThis, RmHalspecO PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // dispswGetSwMethods -- virtual halified (singleton optimized) override (chandes) base (chandes) body - pThis->__dispswGetSwMethods__ = &dispswGetSwMethods_46f6a7; - pThis->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ = &__nvoc_down_thunk_DispSwObject_chandesGetSwMethods; - // dispswCtrlCmdNotifyOnVblank -- exported (id=0x90720101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__dispswCtrlCmdNotifyOnVblank__ = &dispswCtrlCmdNotifyOnVblank_IMPL; #endif - - // dispswIsSwMethodStalling -- virtual inherited (chandes) base (chandes) - pThis->__dispswIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_dispswIsSwMethodStalling; - - // dispswCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) - pThis->__dispswCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_dispswCheckMemInterUnmap; - - // dispswControl -- virtual inherited (gpures) base (chandes) - pThis->__dispswControl__ = &__nvoc_up_thunk_GpuResource_dispswControl; - - // dispswMap -- virtual inherited (gpures) base (chandes) - pThis->__dispswMap__ = &__nvoc_up_thunk_GpuResource_dispswMap; - - // dispswUnmap -- virtual inherited (gpures) base (chandes) - pThis->__dispswUnmap__ = &__nvoc_up_thunk_GpuResource_dispswUnmap; - - // dispswShareCallback -- virtual inherited (gpures) base (chandes) - pThis->__dispswShareCallback__ = &__nvoc_up_thunk_GpuResource_dispswShareCallback; - - // dispswGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) - pThis->__dispswGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_dispswGetRegBaseOffsetAndSize; - - // dispswGetMapAddrSpace -- virtual inherited (gpures) base (chandes) - pThis->__dispswGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_dispswGetMapAddrSpace; - - // dispswInternalControlForward -- virtual inherited (gpures) base (chandes) - pThis->__dispswInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dispswInternalControlForward; - - // dispswGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) - pThis->__dispswGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dispswGetInternalObjectHandle; - - // dispswAccessCallback -- virtual inherited (rmres) base (chandes) - pThis->__dispswAccessCallback__ = &__nvoc_up_thunk_RmResource_dispswAccessCallback; - - // dispswGetMemInterMapParams -- virtual inherited (rmres) base (chandes) - pThis->__dispswGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispswGetMemInterMapParams; - - // dispswGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) - pThis->__dispswGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispswGetMemoryMappingDescriptor; - - // dispswControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__dispswControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispswControlSerialization_Prologue; - - // dispswControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__dispswControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispswControlSerialization_Epilogue; - - // dispswControl_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__dispswControl_Prologue__ = &__nvoc_up_thunk_RmResource_dispswControl_Prologue; - - // dispswControl_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__dispswControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dispswControl_Epilogue; - - // dispswCanCopy -- virtual inherited (res) base (chandes) - pThis->__dispswCanCopy__ = &__nvoc_up_thunk_RsResource_dispswCanCopy; - - // dispswIsDuplicate -- virtual inherited (res) base (chandes) - pThis->__dispswIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispswIsDuplicate; - - // dispswPreDestruct -- virtual inherited (res) base (chandes) - pThis->__dispswPreDestruct__ = &__nvoc_up_thunk_RsResource_dispswPreDestruct; - - // dispswControlFilter -- virtual inherited (res) base (chandes) - pThis->__dispswControlFilter__ = &__nvoc_up_thunk_RsResource_dispswControlFilter; - - // dispswIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body - pThis->__dispswIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispswIsPartialUnmapSupported; - - // dispswMapTo -- virtual inherited (res) base (chandes) - pThis->__dispswMapTo__ = &__nvoc_up_thunk_RsResource_dispswMapTo; - - // dispswUnmapFrom -- virtual inherited (res) base (chandes) - pThis->__dispswUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispswUnmapFrom; - - // dispswGetRefCount -- virtual inherited (res) base (chandes) - pThis->__dispswGetRefCount__ = &__nvoc_up_thunk_RsResource_dispswGetRefCount; - - // dispswAddAdditionalDependants -- virtual inherited (res) base (chandes) - pThis->__dispswAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispswAddAdditionalDependants; - - // dispswGetNotificationListPtr -- virtual inherited (notify) base (chandes) - pThis->__dispswGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispswGetNotificationListPtr; - - // dispswGetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__dispswGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispswGetNotificationShare; - - // dispswSetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__dispswSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispswSetNotificationShare; - - // dispswUnregisterEvent -- virtual inherited (notify) base (chandes) - pThis->__dispswUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispswUnregisterEvent; - - // dispswGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) - pThis->__dispswGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispswGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_DispSwObject_1 with approximately 34 basic block(s). +} // End __nvoc_init_funcTable_DispSwObject_1 with approximately 1 basic block(s). // Initialize vtable(s) for 33 virtual method(s). void __nvoc_init_funcTable_DispSwObject(DispSwObject *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 33 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__DispSwObject vtable = { + .__dispswGetSwMethods__ = &dispswGetSwMethods_46f6a7, // virtual halified (singleton optimized) override (chandes) base (chandes) body + .ChannelDescendant.__chandesGetSwMethods__ = &__nvoc_down_thunk_DispSwObject_chandesGetSwMethods, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif + .__dispswIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_dispswIsSwMethodStalling, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesIsSwMethodStalling__ = &chandesIsSwMethodStalling_IMPL, // virtual + .__dispswCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_dispswCheckMemInterUnmap, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesCheckMemInterUnmap__ = &chandesCheckMemInterUnmap_IMPL, // virtual override (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap, // virtual + .__dispswControl__ = &__nvoc_up_thunk_GpuResource_dispswControl, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesControl__ = &__nvoc_up_thunk_GpuResource_chandesControl, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__dispswMap__ = &__nvoc_up_thunk_GpuResource_dispswMap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesMap__ = &__nvoc_up_thunk_GpuResource_chandesMap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__dispswUnmap__ = &__nvoc_up_thunk_GpuResource_dispswUnmap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesUnmap__ = &__nvoc_up_thunk_GpuResource_chandesUnmap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__dispswShareCallback__ = &__nvoc_up_thunk_GpuResource_dispswShareCallback, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesShareCallback__ = &__nvoc_up_thunk_GpuResource_chandesShareCallback, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__dispswGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_dispswGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__dispswGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_dispswGetMapAddrSpace, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__dispswInternalControlForward__ = &__nvoc_up_thunk_GpuResource_dispswInternalControlForward, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesInternalControlForward__ = &__nvoc_up_thunk_GpuResource_chandesInternalControlForward, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__dispswGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_dispswGetInternalObjectHandle, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__dispswAccessCallback__ = &__nvoc_up_thunk_RmResource_dispswAccessCallback, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesAccessCallback__ = &__nvoc_up_thunk_RmResource_chandesAccessCallback, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__dispswGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_dispswGetMemInterMapParams, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_chandesGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__dispswGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_dispswGetMemoryMappingDescriptor, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__dispswControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_dispswControlSerialization_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__dispswControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_dispswControlSerialization_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__dispswControl_Prologue__ = &__nvoc_up_thunk_RmResource_dispswControl_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControl_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__dispswControl_Epilogue__ = &__nvoc_up_thunk_RmResource_dispswControl_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControl_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__dispswCanCopy__ = &__nvoc_up_thunk_RsResource_dispswCanCopy, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesCanCopy__ = &__nvoc_up_thunk_RsResource_chandesCanCopy, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__dispswIsDuplicate__ = &__nvoc_up_thunk_RsResource_dispswIsDuplicate, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesIsDuplicate__ = &__nvoc_up_thunk_RsResource_chandesIsDuplicate, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__dispswPreDestruct__ = &__nvoc_up_thunk_RsResource_dispswPreDestruct, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesPreDestruct__ = &__nvoc_up_thunk_RsResource_chandesPreDestruct, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__dispswControlFilter__ = &__nvoc_up_thunk_RsResource_dispswControlFilter, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesControlFilter__ = &__nvoc_up_thunk_RsResource_chandesControlFilter, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__dispswIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_dispswIsPartialUnmapSupported, // inline virtual inherited (res) base (chandes) body + .ChannelDescendant.__chandesIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .ChannelDescendant.GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .ChannelDescendant.GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__dispswMapTo__ = &__nvoc_up_thunk_RsResource_dispswMapTo, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesMapTo__ = &__nvoc_up_thunk_RsResource_chandesMapTo, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__dispswUnmapFrom__ = &__nvoc_up_thunk_RsResource_dispswUnmapFrom, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesUnmapFrom__ = &__nvoc_up_thunk_RsResource_chandesUnmapFrom, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__dispswGetRefCount__ = &__nvoc_up_thunk_RsResource_dispswGetRefCount, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesGetRefCount__ = &__nvoc_up_thunk_RsResource_chandesGetRefCount, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__dispswAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_dispswAddAdditionalDependants, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_chandesAddAdditionalDependants, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__dispswGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_dispswGetNotificationListPtr, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationListPtr, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__dispswGetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispswGetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__dispswSetNotificationShare__ = &__nvoc_up_thunk_Notifier_dispswSetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesSetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesSetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__dispswUnregisterEvent__ = &__nvoc_up_thunk_Notifier_dispswUnregisterEvent, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesUnregisterEvent__ = &__nvoc_up_thunk_Notifier_chandesUnregisterEvent, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__dispswGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_dispswGetOrAllocNotifShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource.RsResource; // (res) super^4 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource; // (rmres) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource; // (gpures) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier.INotifier; // (inotify) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier; // (notify) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_vtable = &vtable.ChannelDescendant; // (chandes) super + pThis->__nvoc_vtable = &vtable; // (dispsw) this + + // Initialize vtable(s) with 1 per-object function pointer(s). __nvoc_init_funcTable_DispSwObject_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_dispsw_nvoc.h b/src/nvidia/generated/g_dispsw_nvoc.h index 4659625443..7805a019cb 100644 --- a/src/nvidia/generated/g_dispsw_nvoc.h +++ b/src/nvidia/generated/g_dispsw_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -123,10 +123,15 @@ NV_STATUS dispswReleaseSemaphoreAndNotifierFill(struct OBJGPU *pGpu, #endif +// Metadata including vtable +struct NVOC_VTABLE__DispSwObject; + + struct DispSwObject { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__DispSwObject *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; @@ -142,9 +147,22 @@ struct DispSwObject { struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super struct DispSwObject *__nvoc_pbase_DispSwObject; // dispsw - // Vtable with 33 per-object function pointers - NV_STATUS (*__dispswGetSwMethods__)(struct DispSwObject * /*this*/, const METHOD **, NvU32 *); // virtual halified (singleton optimized) override (chandes) base (chandes) body + // Vtable with 1 per-object function pointer NV_STATUS (*__dispswCtrlCmdNotifyOnVblank__)(struct DispSwObject * /*this*/, NV9072_CTRL_CMD_NOTIFY_ON_VBLANK_PARAMS *); // exported (id=0x90720101) + + // Data members + NvU32 Flags; + DISPCOMMONOBJECT DispCommon; + struct DISP_SW_OBJECT_NOTIFY NotifyOnVBlank; + NvU32 PresentInterval; +}; + + +// Metadata including vtable with 32 function pointers plus superclass metadata +struct NVOC_VTABLE__DispSwObject { + const struct NVOC_VTABLE__ChannelDescendant ChannelDescendant; // (chandes) 32 function pointers + + NV_STATUS (*__dispswGetSwMethods__)(struct DispSwObject * /*this*/, const METHOD **, NvU32 *); // virtual halified (singleton optimized) override (chandes) base (chandes) body NvBool (*__dispswIsSwMethodStalling__)(struct DispSwObject * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) NV_STATUS (*__dispswCheckMemInterUnmap__)(struct DispSwObject * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) NV_STATUS (*__dispswControl__)(struct DispSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (chandes) @@ -176,12 +194,6 @@ struct DispSwObject { void (*__dispswSetNotificationShare__)(struct DispSwObject * /*this*/, struct NotifShare *); // virtual inherited (notify) base (chandes) NV_STATUS (*__dispswUnregisterEvent__)(struct DispSwObject * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (chandes) NV_STATUS (*__dispswGetOrAllocNotifShare__)(struct DispSwObject * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (chandes) - - // Data members - NvU32 Flags; - DISPCOMMONOBJECT DispCommon; - struct DISP_SW_OBJECT_NOTIFY NotifyOnVBlank; - NvU32 PresentInterval; }; #ifndef __NVOC_CLASS_DispSwObject_TYPEDEF__ @@ -214,77 +226,77 @@ NV_STATUS __nvoc_objCreate_DispSwObject(DispSwObject**, Dynamic*, NvU32, CALL_CO // Wrapper macros -#define dispswGetSwMethods_FNPTR(pDispSw) pDispSw->__dispswGetSwMethods__ +#define dispswGetSwMethods_FNPTR(pDispSw) pDispSw->__nvoc_vtable->__dispswGetSwMethods__ #define dispswGetSwMethods(pDispSw, ppMethods, pNumMethods) dispswGetSwMethods_DISPATCH(pDispSw, ppMethods, pNumMethods) #define dispswGetSwMethods_HAL(pDispSw, ppMethods, pNumMethods) dispswGetSwMethods_DISPATCH(pDispSw, ppMethods, pNumMethods) #define dispswCtrlCmdNotifyOnVblank_FNPTR(pDispSwObject) pDispSwObject->__dispswCtrlCmdNotifyOnVblank__ #define dispswCtrlCmdNotifyOnVblank(pDispSwObject, pNotifyParams) dispswCtrlCmdNotifyOnVblank_DISPATCH(pDispSwObject, pNotifyParams) -#define dispswIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ +#define dispswIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesIsSwMethodStalling__ #define dispswIsSwMethodStalling(pChannelDescendant, hHandle) dispswIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define dispswCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ +#define dispswCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesCheckMemInterUnmap__ #define dispswCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) dispswCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) -#define dispswControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define dispswControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define dispswControl(pGpuResource, pCallContext, pParams) dispswControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define dispswMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define dispswMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define dispswMap(pGpuResource, pCallContext, pParams, pCpuMapping) dispswMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define dispswUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define dispswUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define dispswUnmap(pGpuResource, pCallContext, pCpuMapping) dispswUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define dispswShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ +#define dispswShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define dispswShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) dispswShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define dispswGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define dispswGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define dispswGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) dispswGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define dispswGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define dispswGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define dispswGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) dispswGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define dispswInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define dispswInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define dispswInternalControlForward(pGpuResource, command, pParams, size) dispswInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define dispswGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define dispswGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define dispswGetInternalObjectHandle(pGpuResource) dispswGetInternalObjectHandle_DISPATCH(pGpuResource) -#define dispswAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define dispswAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define dispswAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) dispswAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define dispswGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define dispswGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define dispswGetMemInterMapParams(pRmResource, pParams) dispswGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define dispswGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define dispswGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define dispswGetMemoryMappingDescriptor(pRmResource, ppMemDesc) dispswGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define dispswControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define dispswControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define dispswControlSerialization_Prologue(pResource, pCallContext, pParams) dispswControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define dispswControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define dispswControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define dispswControlSerialization_Epilogue(pResource, pCallContext, pParams) dispswControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define dispswControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define dispswControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define dispswControl_Prologue(pResource, pCallContext, pParams) dispswControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define dispswControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define dispswControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define dispswControl_Epilogue(pResource, pCallContext, pParams) dispswControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define dispswCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define dispswCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define dispswCanCopy(pResource) dispswCanCopy_DISPATCH(pResource) -#define dispswIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define dispswIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define dispswIsDuplicate(pResource, hMemory, pDuplicate) dispswIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define dispswPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define dispswPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define dispswPreDestruct(pResource) dispswPreDestruct_DISPATCH(pResource) -#define dispswControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define dispswControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define dispswControlFilter(pResource, pCallContext, pParams) dispswControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define dispswIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define dispswIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define dispswIsPartialUnmapSupported(pResource) dispswIsPartialUnmapSupported_DISPATCH(pResource) -#define dispswMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define dispswMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define dispswMapTo(pResource, pParams) dispswMapTo_DISPATCH(pResource, pParams) -#define dispswUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define dispswUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define dispswUnmapFrom(pResource, pParams) dispswUnmapFrom_DISPATCH(pResource, pParams) -#define dispswGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define dispswGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define dispswGetRefCount(pResource) dispswGetRefCount_DISPATCH(pResource) -#define dispswAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define dispswAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define dispswAddAdditionalDependants(pClient, pResource, pReference) dispswAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define dispswGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define dispswGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define dispswGetNotificationListPtr(pNotifier) dispswGetNotificationListPtr_DISPATCH(pNotifier) -#define dispswGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define dispswGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define dispswGetNotificationShare(pNotifier) dispswGetNotificationShare_DISPATCH(pNotifier) -#define dispswSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define dispswSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define dispswSetNotificationShare(pNotifier, pNotifShare) dispswSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define dispswUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define dispswUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define dispswUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) dispswUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define dispswGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define dispswGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define dispswGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) dispswGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS dispswGetSwMethods_DISPATCH(struct DispSwObject *pDispSw, const METHOD **ppMethods, NvU32 *pNumMethods) { - return pDispSw->__dispswGetSwMethods__(pDispSw, ppMethods, pNumMethods); + return pDispSw->__nvoc_vtable->__dispswGetSwMethods__(pDispSw, ppMethods, pNumMethods); } static inline NV_STATUS dispswCtrlCmdNotifyOnVblank_DISPATCH(struct DispSwObject *pDispSwObject, NV9072_CTRL_CMD_NOTIFY_ON_VBLANK_PARAMS *pNotifyParams) { @@ -292,127 +304,127 @@ static inline NV_STATUS dispswCtrlCmdNotifyOnVblank_DISPATCH(struct DispSwObject } static inline NvBool dispswIsSwMethodStalling_DISPATCH(struct DispSwObject *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__dispswIsSwMethodStalling__(pChannelDescendant, hHandle); + return pChannelDescendant->__nvoc_vtable->__dispswIsSwMethodStalling__(pChannelDescendant, hHandle); } static inline NV_STATUS dispswCheckMemInterUnmap_DISPATCH(struct DispSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return pChannelDescendant->__dispswCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); + return pChannelDescendant->__nvoc_vtable->__dispswCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } static inline NV_STATUS dispswControl_DISPATCH(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__dispswControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__dispswControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS dispswMap_DISPATCH(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispswMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__dispswMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS dispswUnmap_DISPATCH(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__dispswUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__dispswUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool dispswShareCallback_DISPATCH(struct DispSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__dispswShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__dispswShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS dispswGetRegBaseOffsetAndSize_DISPATCH(struct DispSwObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__dispswGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__dispswGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS dispswGetMapAddrSpace_DISPATCH(struct DispSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__dispswGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__dispswGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS dispswInternalControlForward_DISPATCH(struct DispSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__dispswInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__dispswInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle dispswGetInternalObjectHandle_DISPATCH(struct DispSwObject *pGpuResource) { - return pGpuResource->__dispswGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__dispswGetInternalObjectHandle__(pGpuResource); } static inline NvBool dispswAccessCallback_DISPATCH(struct DispSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__dispswAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__dispswAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS dispswGetMemInterMapParams_DISPATCH(struct DispSwObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__dispswGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__dispswGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS dispswGetMemoryMappingDescriptor_DISPATCH(struct DispSwObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__dispswGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__dispswGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS dispswControlSerialization_Prologue_DISPATCH(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispswControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispswControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void dispswControlSerialization_Epilogue_DISPATCH(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispswControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__dispswControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS dispswControl_Prologue_DISPATCH(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispswControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispswControl_Prologue__(pResource, pCallContext, pParams); } static inline void dispswControl_Epilogue_DISPATCH(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__dispswControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__dispswControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool dispswCanCopy_DISPATCH(struct DispSwObject *pResource) { - return pResource->__dispswCanCopy__(pResource); + return pResource->__nvoc_vtable->__dispswCanCopy__(pResource); } static inline NV_STATUS dispswIsDuplicate_DISPATCH(struct DispSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__dispswIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__dispswIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void dispswPreDestruct_DISPATCH(struct DispSwObject *pResource) { - pResource->__dispswPreDestruct__(pResource); + pResource->__nvoc_vtable->__dispswPreDestruct__(pResource); } static inline NV_STATUS dispswControlFilter_DISPATCH(struct DispSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__dispswControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__dispswControlFilter__(pResource, pCallContext, pParams); } static inline NvBool dispswIsPartialUnmapSupported_DISPATCH(struct DispSwObject *pResource) { - return pResource->__dispswIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__dispswIsPartialUnmapSupported__(pResource); } static inline NV_STATUS dispswMapTo_DISPATCH(struct DispSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__dispswMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__dispswMapTo__(pResource, pParams); } static inline NV_STATUS dispswUnmapFrom_DISPATCH(struct DispSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__dispswUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__dispswUnmapFrom__(pResource, pParams); } static inline NvU32 dispswGetRefCount_DISPATCH(struct DispSwObject *pResource) { - return pResource->__dispswGetRefCount__(pResource); + return pResource->__nvoc_vtable->__dispswGetRefCount__(pResource); } static inline void dispswAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DispSwObject *pResource, RsResourceRef *pReference) { - pResource->__dispswAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__dispswAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * dispswGetNotificationListPtr_DISPATCH(struct DispSwObject *pNotifier) { - return pNotifier->__dispswGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__dispswGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * dispswGetNotificationShare_DISPATCH(struct DispSwObject *pNotifier) { - return pNotifier->__dispswGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__dispswGetNotificationShare__(pNotifier); } static inline void dispswSetNotificationShare_DISPATCH(struct DispSwObject *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__dispswSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__dispswSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS dispswUnregisterEvent_DISPATCH(struct DispSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__dispswUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__dispswUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS dispswGetOrAllocNotifShare_DISPATCH(struct DispSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__dispswGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__dispswGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } static inline NV_STATUS dispswGetSwMethods_46f6a7(struct DispSwObject *pDispSw, const METHOD **ppMethods, NvU32 *pNumMethods) { diff --git a/src/nvidia/generated/g_egm_mem_nvoc.c b/src/nvidia/generated/g_egm_mem_nvoc.c index 25875b9b4d..7328f181fa 100644 --- a/src/nvidia/generated/g_egm_mem_nvoc.c +++ b/src/nvidia/generated/g_egm_mem_nvoc.c @@ -102,135 +102,230 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_ExtendedGpuMemory = /*pExportInfo=*/ &__nvoc_export_info_ExtendedGpuMemory }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NvBool __nvoc_down_thunk_StandardMemory_resCanCopy(struct RsResource *pStandardMemory); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^3 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^3 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^3 +NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource); // super^2 +void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource); // super^2 +void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference); // super^2 +NV_STATUS __nvoc_up_thunk_Memory_stdmemIsDuplicate(struct StandardMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMapAddrSpace(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemControl(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemMap(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemUnmap(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMemInterMapParams(struct StandardMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemCheckMemInterUnmap(struct StandardMemory *pMemory, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMemoryMappingDescriptor(struct StandardMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemCheckCopyPermissions(struct StandardMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemIsReady(struct StandardMemory *pMemory, NvBool bCopyConstructorContext); // super +NvBool __nvoc_up_thunk_Memory_stdmemIsGpuMapAllowed(struct StandardMemory *pMemory, struct OBJGPU *pGpu); // super +NvBool __nvoc_up_thunk_Memory_stdmemIsExportAllowed(struct StandardMemory *pMemory); // super +NvBool __nvoc_up_thunk_RmResource_stdmemAccessCallback(struct StandardMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_stdmemShareCallback(struct StandardMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_stdmemControlSerialization_Prologue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_stdmemControlSerialization_Epilogue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_stdmemControl_Prologue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_stdmemControl_Epilogue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RsResource_stdmemPreDestruct(struct StandardMemory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_stdmemControlFilter(struct StandardMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_stdmemIsPartialUnmapSupported(struct StandardMemory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_stdmemMapTo(struct StandardMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_stdmemUnmapFrom(struct StandardMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_stdmemGetRefCount(struct StandardMemory *pResource); // super +void __nvoc_up_thunk_RsResource_stdmemAddAdditionalDependants(struct RsClient *pClient, struct StandardMemory *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_StandardMemory_egmmemCanCopy(struct ExtendedGpuMemory *pStandardMemory); // this +NV_STATUS __nvoc_up_thunk_Memory_egmmemIsDuplicate(struct ExtendedGpuMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate); // this +NV_STATUS __nvoc_up_thunk_Memory_egmmemGetMapAddrSpace(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_Memory_egmmemControl(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_egmmemMap(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_egmmemUnmap(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_egmmemGetMemInterMapParams(struct ExtendedGpuMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_egmmemCheckMemInterUnmap(struct ExtendedGpuMemory *pMemory, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_Memory_egmmemGetMemoryMappingDescriptor(struct ExtendedGpuMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_Memory_egmmemCheckCopyPermissions(struct ExtendedGpuMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // this +NV_STATUS __nvoc_up_thunk_Memory_egmmemIsReady(struct ExtendedGpuMemory *pMemory, NvBool bCopyConstructorContext); // this +NvBool __nvoc_up_thunk_Memory_egmmemIsGpuMapAllowed(struct ExtendedGpuMemory *pMemory, struct OBJGPU *pGpu); // this +NvBool __nvoc_up_thunk_Memory_egmmemIsExportAllowed(struct ExtendedGpuMemory *pMemory); // this +NvBool __nvoc_up_thunk_RmResource_egmmemAccessCallback(struct ExtendedGpuMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_egmmemShareCallback(struct ExtendedGpuMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_egmmemControlSerialization_Prologue(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_egmmemControlSerialization_Epilogue(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_egmmemControl_Prologue(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_egmmemControl_Epilogue(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RsResource_egmmemPreDestruct(struct ExtendedGpuMemory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_egmmemControlFilter(struct ExtendedGpuMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_egmmemIsPartialUnmapSupported(struct ExtendedGpuMemory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_egmmemMapTo(struct ExtendedGpuMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_egmmemUnmapFrom(struct ExtendedGpuMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_egmmemGetRefCount(struct ExtendedGpuMemory *pResource); // this +void __nvoc_up_thunk_RsResource_egmmemAddAdditionalDependants(struct RsClient *pClient, struct ExtendedGpuMemory *pResource, RsResourceRef *pReference); // this + // 26 up-thunk(s) defined to bridge methods in ExtendedGpuMemory to superclasses // egmmemCanCopy: virtual inherited (stdmem) base (stdmem) -static NvBool __nvoc_up_thunk_StandardMemory_egmmemCanCopy(struct ExtendedGpuMemory *pStandardMemory) { +NvBool __nvoc_up_thunk_StandardMemory_egmmemCanCopy(struct ExtendedGpuMemory *pStandardMemory) { return stdmemCanCopy((struct StandardMemory *)(((unsigned char *) pStandardMemory) + __nvoc_rtti_ExtendedGpuMemory_StandardMemory.offset)); } // egmmemIsDuplicate: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_egmmemIsDuplicate(struct ExtendedGpuMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_Memory_egmmemIsDuplicate(struct ExtendedGpuMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), hMemory, pDuplicate); } // egmmemGetMapAddrSpace: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_egmmemGetMapAddrSpace(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_Memory_egmmemGetMapAddrSpace(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); } // egmmemControl: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_egmmemControl(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_egmmemControl(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), pCallContext, pParams); } // egmmemMap: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_egmmemMap(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_egmmemMap(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), pCallContext, pParams, pCpuMapping); } // egmmemUnmap: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_egmmemUnmap(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_egmmemUnmap(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), pCallContext, pCpuMapping); } // egmmemGetMemInterMapParams: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_egmmemGetMemInterMapParams(struct ExtendedGpuMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_egmmemGetMemInterMapParams(struct ExtendedGpuMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), pParams); } // egmmemCheckMemInterUnmap: inline virtual inherited (mem) base (stdmem) body -static NV_STATUS __nvoc_up_thunk_Memory_egmmemCheckMemInterUnmap(struct ExtendedGpuMemory *pMemory, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_Memory_egmmemCheckMemInterUnmap(struct ExtendedGpuMemory *pMemory, NvBool bSubdeviceHandleProvided) { return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), bSubdeviceHandleProvided); } // egmmemGetMemoryMappingDescriptor: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_egmmemGetMemoryMappingDescriptor(struct ExtendedGpuMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_Memory_egmmemGetMemoryMappingDescriptor(struct ExtendedGpuMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), ppMemDesc); } // egmmemCheckCopyPermissions: inline virtual inherited (mem) base (stdmem) body -static NV_STATUS __nvoc_up_thunk_Memory_egmmemCheckCopyPermissions(struct ExtendedGpuMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { +NV_STATUS __nvoc_up_thunk_Memory_egmmemCheckCopyPermissions(struct ExtendedGpuMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), pDstGpu, pDstDevice); } // egmmemIsReady: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_egmmemIsReady(struct ExtendedGpuMemory *pMemory, NvBool bCopyConstructorContext) { +NV_STATUS __nvoc_up_thunk_Memory_egmmemIsReady(struct ExtendedGpuMemory *pMemory, NvBool bCopyConstructorContext) { return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), bCopyConstructorContext); } // egmmemIsGpuMapAllowed: inline virtual inherited (mem) base (stdmem) body -static NvBool __nvoc_up_thunk_Memory_egmmemIsGpuMapAllowed(struct ExtendedGpuMemory *pMemory, struct OBJGPU *pGpu) { +NvBool __nvoc_up_thunk_Memory_egmmemIsGpuMapAllowed(struct ExtendedGpuMemory *pMemory, struct OBJGPU *pGpu) { return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset), pGpu); } // egmmemIsExportAllowed: inline virtual inherited (mem) base (stdmem) body -static NvBool __nvoc_up_thunk_Memory_egmmemIsExportAllowed(struct ExtendedGpuMemory *pMemory) { +NvBool __nvoc_up_thunk_Memory_egmmemIsExportAllowed(struct ExtendedGpuMemory *pMemory) { return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_ExtendedGpuMemory_Memory.offset)); } // egmmemAccessCallback: virtual inherited (rmres) base (stdmem) -static NvBool __nvoc_up_thunk_RmResource_egmmemAccessCallback(struct ExtendedGpuMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_egmmemAccessCallback(struct ExtendedGpuMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // egmmemShareCallback: virtual inherited (rmres) base (stdmem) -static NvBool __nvoc_up_thunk_RmResource_egmmemShareCallback(struct ExtendedGpuMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_egmmemShareCallback(struct ExtendedGpuMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // egmmemControlSerialization_Prologue: virtual inherited (rmres) base (stdmem) -static NV_STATUS __nvoc_up_thunk_RmResource_egmmemControlSerialization_Prologue(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_egmmemControlSerialization_Prologue(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RmResource.offset), pCallContext, pParams); } // egmmemControlSerialization_Epilogue: virtual inherited (rmres) base (stdmem) -static void __nvoc_up_thunk_RmResource_egmmemControlSerialization_Epilogue(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_egmmemControlSerialization_Epilogue(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RmResource.offset), pCallContext, pParams); } // egmmemControl_Prologue: virtual inherited (rmres) base (stdmem) -static NV_STATUS __nvoc_up_thunk_RmResource_egmmemControl_Prologue(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_egmmemControl_Prologue(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RmResource.offset), pCallContext, pParams); } // egmmemControl_Epilogue: virtual inherited (rmres) base (stdmem) -static void __nvoc_up_thunk_RmResource_egmmemControl_Epilogue(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_egmmemControl_Epilogue(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RmResource.offset), pCallContext, pParams); } // egmmemPreDestruct: virtual inherited (res) base (stdmem) -static void __nvoc_up_thunk_RsResource_egmmemPreDestruct(struct ExtendedGpuMemory *pResource) { +void __nvoc_up_thunk_RsResource_egmmemPreDestruct(struct ExtendedGpuMemory *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RsResource.offset)); } // egmmemControlFilter: virtual inherited (res) base (stdmem) -static NV_STATUS __nvoc_up_thunk_RsResource_egmmemControlFilter(struct ExtendedGpuMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_egmmemControlFilter(struct ExtendedGpuMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RsResource.offset), pCallContext, pParams); } // egmmemIsPartialUnmapSupported: inline virtual inherited (res) base (stdmem) body -static NvBool __nvoc_up_thunk_RsResource_egmmemIsPartialUnmapSupported(struct ExtendedGpuMemory *pResource) { +NvBool __nvoc_up_thunk_RsResource_egmmemIsPartialUnmapSupported(struct ExtendedGpuMemory *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RsResource.offset)); } // egmmemMapTo: virtual inherited (res) base (stdmem) -static NV_STATUS __nvoc_up_thunk_RsResource_egmmemMapTo(struct ExtendedGpuMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_egmmemMapTo(struct ExtendedGpuMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RsResource.offset), pParams); } // egmmemUnmapFrom: virtual inherited (res) base (stdmem) -static NV_STATUS __nvoc_up_thunk_RsResource_egmmemUnmapFrom(struct ExtendedGpuMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_egmmemUnmapFrom(struct ExtendedGpuMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RsResource.offset), pParams); } // egmmemGetRefCount: virtual inherited (res) base (stdmem) -static NvU32 __nvoc_up_thunk_RsResource_egmmemGetRefCount(struct ExtendedGpuMemory *pResource) { +NvU32 __nvoc_up_thunk_RsResource_egmmemGetRefCount(struct ExtendedGpuMemory *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RsResource.offset)); } // egmmemAddAdditionalDependants: virtual inherited (res) base (stdmem) -static void __nvoc_up_thunk_RsResource_egmmemAddAdditionalDependants(struct RsClient *pClient, struct ExtendedGpuMemory *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_egmmemAddAdditionalDependants(struct RsClient *pClient, struct ExtendedGpuMemory *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ExtendedGpuMemory_RsResource.offset), pReference); } @@ -273,91 +368,139 @@ NV_STATUS __nvoc_ctor_ExtendedGpuMemory(ExtendedGpuMemory *pThis, CALL_CONTEXT * // Vtable initialization static void __nvoc_init_funcTable_ExtendedGpuMemory_1(ExtendedGpuMemory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // egmmemCanCopy -- virtual inherited (stdmem) base (stdmem) - pThis->__egmmemCanCopy__ = &__nvoc_up_thunk_StandardMemory_egmmemCanCopy; - - // egmmemIsDuplicate -- virtual inherited (mem) base (stdmem) - pThis->__egmmemIsDuplicate__ = &__nvoc_up_thunk_Memory_egmmemIsDuplicate; - - // egmmemGetMapAddrSpace -- virtual inherited (mem) base (stdmem) - pThis->__egmmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_egmmemGetMapAddrSpace; - - // egmmemControl -- virtual inherited (mem) base (stdmem) - pThis->__egmmemControl__ = &__nvoc_up_thunk_Memory_egmmemControl; - - // egmmemMap -- virtual inherited (mem) base (stdmem) - pThis->__egmmemMap__ = &__nvoc_up_thunk_Memory_egmmemMap; - - // egmmemUnmap -- virtual inherited (mem) base (stdmem) - pThis->__egmmemUnmap__ = &__nvoc_up_thunk_Memory_egmmemUnmap; - - // egmmemGetMemInterMapParams -- virtual inherited (mem) base (stdmem) - pThis->__egmmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_egmmemGetMemInterMapParams; - - // egmmemCheckMemInterUnmap -- inline virtual inherited (mem) base (stdmem) body - pThis->__egmmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_egmmemCheckMemInterUnmap; - - // egmmemGetMemoryMappingDescriptor -- virtual inherited (mem) base (stdmem) - pThis->__egmmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_egmmemGetMemoryMappingDescriptor; - - // egmmemCheckCopyPermissions -- inline virtual inherited (mem) base (stdmem) body - pThis->__egmmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_egmmemCheckCopyPermissions; - - // egmmemIsReady -- virtual inherited (mem) base (stdmem) - pThis->__egmmemIsReady__ = &__nvoc_up_thunk_Memory_egmmemIsReady; - - // egmmemIsGpuMapAllowed -- inline virtual inherited (mem) base (stdmem) body - pThis->__egmmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_egmmemIsGpuMapAllowed; - - // egmmemIsExportAllowed -- inline virtual inherited (mem) base (stdmem) body - pThis->__egmmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_egmmemIsExportAllowed; - - // egmmemAccessCallback -- virtual inherited (rmres) base (stdmem) - pThis->__egmmemAccessCallback__ = &__nvoc_up_thunk_RmResource_egmmemAccessCallback; - - // egmmemShareCallback -- virtual inherited (rmres) base (stdmem) - pThis->__egmmemShareCallback__ = &__nvoc_up_thunk_RmResource_egmmemShareCallback; - - // egmmemControlSerialization_Prologue -- virtual inherited (rmres) base (stdmem) - pThis->__egmmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_egmmemControlSerialization_Prologue; - - // egmmemControlSerialization_Epilogue -- virtual inherited (rmres) base (stdmem) - pThis->__egmmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_egmmemControlSerialization_Epilogue; - - // egmmemControl_Prologue -- virtual inherited (rmres) base (stdmem) - pThis->__egmmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_egmmemControl_Prologue; - - // egmmemControl_Epilogue -- virtual inherited (rmres) base (stdmem) - pThis->__egmmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_egmmemControl_Epilogue; - - // egmmemPreDestruct -- virtual inherited (res) base (stdmem) - pThis->__egmmemPreDestruct__ = &__nvoc_up_thunk_RsResource_egmmemPreDestruct; - - // egmmemControlFilter -- virtual inherited (res) base (stdmem) - pThis->__egmmemControlFilter__ = &__nvoc_up_thunk_RsResource_egmmemControlFilter; - - // egmmemIsPartialUnmapSupported -- inline virtual inherited (res) base (stdmem) body - pThis->__egmmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_egmmemIsPartialUnmapSupported; - - // egmmemMapTo -- virtual inherited (res) base (stdmem) - pThis->__egmmemMapTo__ = &__nvoc_up_thunk_RsResource_egmmemMapTo; - - // egmmemUnmapFrom -- virtual inherited (res) base (stdmem) - pThis->__egmmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_egmmemUnmapFrom; - - // egmmemGetRefCount -- virtual inherited (res) base (stdmem) - pThis->__egmmemGetRefCount__ = &__nvoc_up_thunk_RsResource_egmmemGetRefCount; - - // egmmemAddAdditionalDependants -- virtual inherited (res) base (stdmem) - pThis->__egmmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_egmmemAddAdditionalDependants; -} // End __nvoc_init_funcTable_ExtendedGpuMemory_1 with approximately 26 basic block(s). +} // End __nvoc_init_funcTable_ExtendedGpuMemory_1 // Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_ExtendedGpuMemory(ExtendedGpuMemory *pThis) { - // Initialize vtable(s) with 26 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__ExtendedGpuMemory vtable = { + .__egmmemCanCopy__ = &__nvoc_up_thunk_StandardMemory_egmmemCanCopy, // virtual inherited (stdmem) base (stdmem) + .StandardMemory.__stdmemCanCopy__ = &stdmemCanCopy_IMPL, // virtual override (res) base (mem) + .StandardMemory.Memory.__memCanCopy__ = &__nvoc_up_thunk_RsResource_memCanCopy, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_StandardMemory_resCanCopy, // virtual + .__egmmemIsDuplicate__ = &__nvoc_up_thunk_Memory_egmmemIsDuplicate, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemIsDuplicate__ = &__nvoc_up_thunk_Memory_stdmemIsDuplicate, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memIsDuplicate__ = &memIsDuplicate_IMPL, // virtual override (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resIsDuplicate__ = &__nvoc_down_thunk_Memory_resIsDuplicate, // virtual + .__egmmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_egmmemGetMapAddrSpace, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_stdmemGetMapAddrSpace, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memGetMapAddrSpace__ = &memGetMapAddrSpace_IMPL, // virtual + .__egmmemControl__ = &__nvoc_up_thunk_Memory_egmmemControl, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemControl__ = &__nvoc_up_thunk_Memory_stdmemControl, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memControl__ = &memControl_IMPL, // virtual override (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_Memory_resControl, // virtual + .__egmmemMap__ = &__nvoc_up_thunk_Memory_egmmemMap, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemMap__ = &__nvoc_up_thunk_Memory_stdmemMap, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memMap__ = &memMap_IMPL, // virtual override (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_Memory_resMap, // virtual + .__egmmemUnmap__ = &__nvoc_up_thunk_Memory_egmmemUnmap, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemUnmap__ = &__nvoc_up_thunk_Memory_stdmemUnmap, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memUnmap__ = &memUnmap_IMPL, // virtual override (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_Memory_resUnmap, // virtual + .__egmmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_egmmemGetMemInterMapParams, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_stdmemGetMemInterMapParams, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memGetMemInterMapParams__ = &memGetMemInterMapParams_IMPL, // virtual override (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_Memory_rmresGetMemInterMapParams, // virtual + .__egmmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_egmmemCheckMemInterUnmap, // inline virtual inherited (mem) base (stdmem) body + .StandardMemory.__stdmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_stdmemCheckMemInterUnmap, // inline virtual inherited (mem) base (mem) body + .StandardMemory.Memory.__memCheckMemInterUnmap__ = &memCheckMemInterUnmap_ac1694, // inline virtual override (rmres) base (rmres) body + .StandardMemory.Memory.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_Memory_rmresCheckMemInterUnmap, // virtual + .__egmmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_egmmemGetMemoryMappingDescriptor, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_stdmemGetMemoryMappingDescriptor, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memGetMemoryMappingDescriptor__ = &memGetMemoryMappingDescriptor_IMPL, // virtual override (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor, // virtual + .__egmmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_egmmemCheckCopyPermissions, // inline virtual inherited (mem) base (stdmem) body + .StandardMemory.__stdmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_stdmemCheckCopyPermissions, // inline virtual inherited (mem) base (mem) body + .StandardMemory.Memory.__memCheckCopyPermissions__ = &memCheckCopyPermissions_ac1694, // inline virtual body + .__egmmemIsReady__ = &__nvoc_up_thunk_Memory_egmmemIsReady, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemIsReady__ = &__nvoc_up_thunk_Memory_stdmemIsReady, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memIsReady__ = &memIsReady_IMPL, // virtual + .__egmmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_egmmemIsGpuMapAllowed, // inline virtual inherited (mem) base (stdmem) body + .StandardMemory.__stdmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_stdmemIsGpuMapAllowed, // inline virtual inherited (mem) base (mem) body + .StandardMemory.Memory.__memIsGpuMapAllowed__ = &memIsGpuMapAllowed_e661f0, // inline virtual body + .__egmmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_egmmemIsExportAllowed, // inline virtual inherited (mem) base (stdmem) body + .StandardMemory.__stdmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_stdmemIsExportAllowed, // inline virtual inherited (mem) base (mem) body + .StandardMemory.Memory.__memIsExportAllowed__ = &memIsExportAllowed_e661f0, // inline virtual body + .__egmmemAccessCallback__ = &__nvoc_up_thunk_RmResource_egmmemAccessCallback, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemAccessCallback__ = &__nvoc_up_thunk_RmResource_stdmemAccessCallback, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memAccessCallback__ = &__nvoc_up_thunk_RmResource_memAccessCallback, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__egmmemShareCallback__ = &__nvoc_up_thunk_RmResource_egmmemShareCallback, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemShareCallback__ = &__nvoc_up_thunk_RmResource_stdmemShareCallback, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memShareCallback__ = &__nvoc_up_thunk_RmResource_memShareCallback, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__egmmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_egmmemControlSerialization_Prologue, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_stdmemControlSerialization_Prologue, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__egmmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_egmmemControlSerialization_Epilogue, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_stdmemControlSerialization_Epilogue, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__egmmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_egmmemControl_Prologue, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_stdmemControl_Prologue, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memControl_Prologue__ = &__nvoc_up_thunk_RmResource_memControl_Prologue, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__egmmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_egmmemControl_Epilogue, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_stdmemControl_Epilogue, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memControl_Epilogue, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__egmmemPreDestruct__ = &__nvoc_up_thunk_RsResource_egmmemPreDestruct, // virtual inherited (res) base (stdmem) + .StandardMemory.__stdmemPreDestruct__ = &__nvoc_up_thunk_RsResource_stdmemPreDestruct, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memPreDestruct__ = &__nvoc_up_thunk_RsResource_memPreDestruct, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__egmmemControlFilter__ = &__nvoc_up_thunk_RsResource_egmmemControlFilter, // virtual inherited (res) base (stdmem) + .StandardMemory.__stdmemControlFilter__ = &__nvoc_up_thunk_RsResource_stdmemControlFilter, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memControlFilter__ = &__nvoc_up_thunk_RsResource_memControlFilter, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__egmmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_egmmemIsPartialUnmapSupported, // inline virtual inherited (res) base (stdmem) body + .StandardMemory.__stdmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_stdmemIsPartialUnmapSupported, // inline virtual inherited (res) base (mem) body + .StandardMemory.Memory.__memIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .StandardMemory.Memory.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .StandardMemory.Memory.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__egmmemMapTo__ = &__nvoc_up_thunk_RsResource_egmmemMapTo, // virtual inherited (res) base (stdmem) + .StandardMemory.__stdmemMapTo__ = &__nvoc_up_thunk_RsResource_stdmemMapTo, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memMapTo__ = &__nvoc_up_thunk_RsResource_memMapTo, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__egmmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_egmmemUnmapFrom, // virtual inherited (res) base (stdmem) + .StandardMemory.__stdmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_stdmemUnmapFrom, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memUnmapFrom__ = &__nvoc_up_thunk_RsResource_memUnmapFrom, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__egmmemGetRefCount__ = &__nvoc_up_thunk_RsResource_egmmemGetRefCount, // virtual inherited (res) base (stdmem) + .StandardMemory.__stdmemGetRefCount__ = &__nvoc_up_thunk_RsResource_stdmemGetRefCount, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memGetRefCount__ = &__nvoc_up_thunk_RsResource_memGetRefCount, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__egmmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_egmmemAddAdditionalDependants, // virtual inherited (res) base (stdmem) + .StandardMemory.__stdmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_stdmemAddAdditionalDependants, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memAddAdditionalDependants, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.StandardMemory.Memory.RmResource.RsResource; // (res) super^4 + pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable = &vtable.StandardMemory.Memory.RmResource; // (rmres) super^3 + pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable = &vtable.StandardMemory.Memory; // (mem) super^2 + pThis->__nvoc_base_StandardMemory.__nvoc_vtable = &vtable.StandardMemory; // (stdmem) super + pThis->__nvoc_vtable = &vtable; // (egmmem) this __nvoc_init_funcTable_ExtendedGpuMemory_1(pThis); } diff --git a/src/nvidia/generated/g_egm_mem_nvoc.h b/src/nvidia/generated/g_egm_mem_nvoc.h index 34c54129af..add7842d7f 100644 --- a/src/nvidia/generated/g_egm_mem_nvoc.h +++ b/src/nvidia/generated/g_egm_mem_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -61,10 +61,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__ExtendedGpuMemory; + + struct ExtendedGpuMemory { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__ExtendedGpuMemory *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct StandardMemory __nvoc_base_StandardMemory; @@ -77,8 +82,13 @@ struct ExtendedGpuMemory { struct Memory *__nvoc_pbase_Memory; // mem super^2 struct StandardMemory *__nvoc_pbase_StandardMemory; // stdmem super struct ExtendedGpuMemory *__nvoc_pbase_ExtendedGpuMemory; // egmmem +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__ExtendedGpuMemory { + const struct NVOC_VTABLE__StandardMemory StandardMemory; // (stdmem) 26 function pointers - // Vtable with 26 per-object function pointers NvBool (*__egmmemCanCopy__)(struct ExtendedGpuMemory * /*this*/); // virtual inherited (stdmem) base (stdmem) NV_STATUS (*__egmmemIsDuplicate__)(struct ExtendedGpuMemory * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (stdmem) NV_STATUS (*__egmmemGetMapAddrSpace__)(struct ExtendedGpuMemory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (stdmem) @@ -137,162 +147,162 @@ NV_STATUS __nvoc_objCreate_ExtendedGpuMemory(ExtendedGpuMemory**, Dynamic*, NvU3 // Wrapper macros -#define egmmemCanCopy_FNPTR(pStandardMemory) pStandardMemory->__nvoc_base_StandardMemory.__stdmemCanCopy__ +#define egmmemCanCopy_FNPTR(pStandardMemory) pStandardMemory->__nvoc_base_StandardMemory.__nvoc_vtable->__stdmemCanCopy__ #define egmmemCanCopy(pStandardMemory) egmmemCanCopy_DISPATCH(pStandardMemory) -#define egmmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsDuplicate__ +#define egmmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memIsDuplicate__ #define egmmemIsDuplicate(pMemory, hMemory, pDuplicate) egmmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define egmmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMapAddrSpace__ +#define egmmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memGetMapAddrSpace__ #define egmmemGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) egmmemGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define egmmemControl_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memControl__ +#define egmmemControl_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memControl__ #define egmmemControl(pMemory, pCallContext, pParams) egmmemControl_DISPATCH(pMemory, pCallContext, pParams) -#define egmmemMap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memMap__ +#define egmmemMap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memMap__ #define egmmemMap(pMemory, pCallContext, pParams, pCpuMapping) egmmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define egmmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memUnmap__ +#define egmmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memUnmap__ #define egmmemUnmap(pMemory, pCallContext, pCpuMapping) egmmemUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define egmmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMemInterMapParams__ +#define egmmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memGetMemInterMapParams__ #define egmmemGetMemInterMapParams(pMemory, pParams) egmmemGetMemInterMapParams_DISPATCH(pMemory, pParams) -#define egmmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define egmmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memCheckMemInterUnmap__ #define egmmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) egmmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define egmmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ +#define egmmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memGetMemoryMappingDescriptor__ #define egmmemGetMemoryMappingDescriptor(pMemory, ppMemDesc) egmmemGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define egmmemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memCheckCopyPermissions__ +#define egmmemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memCheckCopyPermissions__ #define egmmemCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) egmmemCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define egmmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsReady__ +#define egmmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memIsReady__ #define egmmemIsReady(pMemory, bCopyConstructorContext) egmmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) -#define egmmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define egmmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memIsGpuMapAllowed__ #define egmmemIsGpuMapAllowed(pMemory, pGpu) egmmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define egmmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsExportAllowed__ +#define egmmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memIsExportAllowed__ #define egmmemIsExportAllowed(pMemory) egmmemIsExportAllowed_DISPATCH(pMemory) -#define egmmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define egmmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define egmmemAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) egmmemAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define egmmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define egmmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define egmmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) egmmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define egmmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define egmmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define egmmemControlSerialization_Prologue(pResource, pCallContext, pParams) egmmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define egmmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define egmmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define egmmemControlSerialization_Epilogue(pResource, pCallContext, pParams) egmmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define egmmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define egmmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define egmmemControl_Prologue(pResource, pCallContext, pParams) egmmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define egmmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define egmmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define egmmemControl_Epilogue(pResource, pCallContext, pParams) egmmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define egmmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define egmmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define egmmemPreDestruct(pResource) egmmemPreDestruct_DISPATCH(pResource) -#define egmmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define egmmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define egmmemControlFilter(pResource, pCallContext, pParams) egmmemControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define egmmemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define egmmemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define egmmemIsPartialUnmapSupported(pResource) egmmemIsPartialUnmapSupported_DISPATCH(pResource) -#define egmmemMapTo_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define egmmemMapTo_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define egmmemMapTo(pResource, pParams) egmmemMapTo_DISPATCH(pResource, pParams) -#define egmmemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define egmmemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define egmmemUnmapFrom(pResource, pParams) egmmemUnmapFrom_DISPATCH(pResource, pParams) -#define egmmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define egmmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define egmmemGetRefCount(pResource) egmmemGetRefCount_DISPATCH(pResource) -#define egmmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define egmmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define egmmemAddAdditionalDependants(pClient, pResource, pReference) egmmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool egmmemCanCopy_DISPATCH(struct ExtendedGpuMemory *pStandardMemory) { - return pStandardMemory->__egmmemCanCopy__(pStandardMemory); + return pStandardMemory->__nvoc_vtable->__egmmemCanCopy__(pStandardMemory); } static inline NV_STATUS egmmemIsDuplicate_DISPATCH(struct ExtendedGpuMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__egmmemIsDuplicate__(pMemory, hMemory, pDuplicate); + return pMemory->__nvoc_vtable->__egmmemIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS egmmemGetMapAddrSpace_DISPATCH(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pMemory->__egmmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); + return pMemory->__nvoc_vtable->__egmmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS egmmemControl_DISPATCH(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__egmmemControl__(pMemory, pCallContext, pParams); + return pMemory->__nvoc_vtable->__egmmemControl__(pMemory, pCallContext, pParams); } static inline NV_STATUS egmmemMap_DISPATCH(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__egmmemMap__(pMemory, pCallContext, pParams, pCpuMapping); + return pMemory->__nvoc_vtable->__egmmemMap__(pMemory, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS egmmemUnmap_DISPATCH(struct ExtendedGpuMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__egmmemUnmap__(pMemory, pCallContext, pCpuMapping); + return pMemory->__nvoc_vtable->__egmmemUnmap__(pMemory, pCallContext, pCpuMapping); } static inline NV_STATUS egmmemGetMemInterMapParams_DISPATCH(struct ExtendedGpuMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__egmmemGetMemInterMapParams__(pMemory, pParams); + return pMemory->__nvoc_vtable->__egmmemGetMemInterMapParams__(pMemory, pParams); } static inline NV_STATUS egmmemCheckMemInterUnmap_DISPATCH(struct ExtendedGpuMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__egmmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); + return pMemory->__nvoc_vtable->__egmmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } static inline NV_STATUS egmmemGetMemoryMappingDescriptor_DISPATCH(struct ExtendedGpuMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__egmmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); + return pMemory->__nvoc_vtable->__egmmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } static inline NV_STATUS egmmemCheckCopyPermissions_DISPATCH(struct ExtendedGpuMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__egmmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); + return pMemory->__nvoc_vtable->__egmmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } static inline NV_STATUS egmmemIsReady_DISPATCH(struct ExtendedGpuMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__egmmemIsReady__(pMemory, bCopyConstructorContext); + return pMemory->__nvoc_vtable->__egmmemIsReady__(pMemory, bCopyConstructorContext); } static inline NvBool egmmemIsGpuMapAllowed_DISPATCH(struct ExtendedGpuMemory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__egmmemIsGpuMapAllowed__(pMemory, pGpu); + return pMemory->__nvoc_vtable->__egmmemIsGpuMapAllowed__(pMemory, pGpu); } static inline NvBool egmmemIsExportAllowed_DISPATCH(struct ExtendedGpuMemory *pMemory) { - return pMemory->__egmmemIsExportAllowed__(pMemory); + return pMemory->__nvoc_vtable->__egmmemIsExportAllowed__(pMemory); } static inline NvBool egmmemAccessCallback_DISPATCH(struct ExtendedGpuMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__egmmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__egmmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool egmmemShareCallback_DISPATCH(struct ExtendedGpuMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__egmmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__egmmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS egmmemControlSerialization_Prologue_DISPATCH(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__egmmemControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__egmmemControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void egmmemControlSerialization_Epilogue_DISPATCH(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__egmmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__egmmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS egmmemControl_Prologue_DISPATCH(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__egmmemControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__egmmemControl_Prologue__(pResource, pCallContext, pParams); } static inline void egmmemControl_Epilogue_DISPATCH(struct ExtendedGpuMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__egmmemControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__egmmemControl_Epilogue__(pResource, pCallContext, pParams); } static inline void egmmemPreDestruct_DISPATCH(struct ExtendedGpuMemory *pResource) { - pResource->__egmmemPreDestruct__(pResource); + pResource->__nvoc_vtable->__egmmemPreDestruct__(pResource); } static inline NV_STATUS egmmemControlFilter_DISPATCH(struct ExtendedGpuMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__egmmemControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__egmmemControlFilter__(pResource, pCallContext, pParams); } static inline NvBool egmmemIsPartialUnmapSupported_DISPATCH(struct ExtendedGpuMemory *pResource) { - return pResource->__egmmemIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__egmmemIsPartialUnmapSupported__(pResource); } static inline NV_STATUS egmmemMapTo_DISPATCH(struct ExtendedGpuMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__egmmemMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__egmmemMapTo__(pResource, pParams); } static inline NV_STATUS egmmemUnmapFrom_DISPATCH(struct ExtendedGpuMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__egmmemUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__egmmemUnmapFrom__(pResource, pParams); } static inline NvU32 egmmemGetRefCount_DISPATCH(struct ExtendedGpuMemory *pResource) { - return pResource->__egmmemGetRefCount__(pResource); + return pResource->__nvoc_vtable->__egmmemGetRefCount__(pResource); } static inline void egmmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ExtendedGpuMemory *pResource, RsResourceRef *pReference) { - pResource->__egmmemAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__egmmemAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS egmmemConstruct_IMPL(struct ExtendedGpuMemory *arg_pStandardMemory, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_eng_desc_nvoc.h b/src/nvidia/generated/g_eng_desc_nvoc.h index 2501abb90c..fa9161dcc5 100644 --- a/src/nvidia/generated/g_eng_desc_nvoc.h +++ b/src/nvidia/generated/g_eng_desc_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -41,6 +41,7 @@ extern "C" { #ifndef _ENG_DESC_H_ #define _ENG_DESC_H_ + #include "core/core.h" // @@ -58,7 +59,7 @@ extern "C" { #define ENGDESC_FIELD(desc, field) (((desc) >> SF_SHIFT(ENGDESC ## field)) & \ SF_MASK(ENGDESC ## field)) -typedef NvU32 ENGDESCRIPTOR, *PENGDESCRIPTOR; +typedef NvU32 ENGDESCRIPTOR; // @@ -948,7 +949,6 @@ typedef struct KernelPmu KernelPmu; #endif /* __nvoc_class_id_KernelPmu */ - struct Lpwr; #ifndef __NVOC_CLASS_Lpwr_TYPEDEF__ @@ -1505,175 +1505,282 @@ typedef struct KernelCcu KernelCcu; #endif /* __nvoc_class_id_KernelCcu */ +#define ENG_CLASS_INVALID classId(OBJINVALID) +#define ENG_CLASS_SW classId(OBJSWENG) +#define ENG_CLASS_GPU classId(OBJGPU) +#define ENG_CLASS_FLCN classId(Falcon) +#define ENG_CLASS_MC classId(OBJMC) +#define ENG_CLASS_KERNEL_MC classId(KernelMc) +#define ENG_CLASS_PRIV_RING classId(PrivRing) +#define ENG_CLASS_SW_INTR classId(SwIntr) +#define ENG_CLASS_MEMORY_SYSTEM classId(MemorySystem) +#define ENG_CLASS_KERNEL_MEMORY_SYSTEM classId(KernelMemorySystem) +#define ENG_CLASS_MEMORY_MANAGER classId(MemoryManager) +#define ENG_CLASS_FBFLCN classId(OBJFBFLCN) +#define ENG_CLASS_TMR classId(OBJTMR) +#define ENG_CLASS_DMA classId(VirtMemAllocator) +#define ENG_CLASS_KERNEL_FIFO classId(KernelFifo) +#define ENG_CLASS_FIFO classId(OBJFIFO) +#define ENG_CLASS_OS classId(OBJOS) +#define ENG_CLASS_BUS classId(OBJBUS) +#define ENG_CLASS_KERNEL_BUS classId(KernelBus) +#define ENG_CLASS_INFOROM classId(OBJINFOROM) +#define ENG_CLASS_PERF classId(Perf) +#define ENG_CLASS_KERNEL_PERF classId(KernelPerf) +#define ENG_CLASS_PXUC classId(Pxuc) +#define ENG_CLASS_BIF classId(OBJBIF) +#define ENG_CLASS_KERNEL_BIF classId(KernelBif) +#define ENG_CLASS_HSHUBMANAGER classId(OBJHSHUBMANAGER) +#define ENG_CLASS_SF classId(OBJSF) +#define ENG_CLASS_GPIO classId(OBJGPIO) +#define ENG_CLASS_CLK classId(ClockManager) +#define ENG_CLASS_KERNEL_DISPLAY classId(KernelDisplay) +#define ENG_CLASS_DISP classId(OBJDISP) +#define ENG_CLASS_DPU classId(OBJDPU) +#define ENG_CLASS_DIP classId(OBJDIP) +#define ENG_CLASS_FAN classId(Fan) +#define ENG_CLASS_INST classId(DisplayInstanceMemory) +#define ENG_CLASS_KERNEL_HEAD classId(KernelHead) +#define ENG_CLASS_VOLT classId(OBJVOLT) +#define ENG_CLASS_INTR classId(Intr) +#define ENG_CLASS_HDA classId(OBJHDA) +#define ENG_CLASS_I2C classId(I2c) +#define ENG_CLASS_KERNEL_RC classId(KernelRc) +#define ENG_CLASS_RC classId(OBJRC) +#define ENG_CLASS_SOR classId(OBJSOR) +#define ENG_CLASS_DAC classId(OBJDAC) +#define ENG_CLASS_PIOR classId(OBJPIOR) +#define ENG_CLASS_HEAD classId(OBJHEAD) +#define ENG_CLASS_VGA classId(OBJVGA) +#define ENG_CLASS_STEREO classId(Stereo) +#define ENG_CLASS_OR classId(OBJOR) +#define ENG_CLASS_BSP classId(OBJBSP) +#define ENG_CLASS_CIPHER classId(OBJCIPHER) +#define ENG_CLASS_FUSE classId(OBJFUSE) +#define ENG_CLASS_HDCP classId(OBJHDCP) +#define ENG_CLASS_HDMI classId(OBJHDMI) +#define ENG_CLASS_THERM classId(Therm) +#define ENG_CLASS_SEQ classId(OBJSEQ) +#define ENG_CLASS_DPAUX classId(OBJDPAUX) +#define ENG_CLASS_PMU classId(Pmu) +#define ENG_CLASS_KERNEL_PMU classId(KernelPmu) +#define ENG_CLASS_LPWR classId(Lpwr) +#define ENG_CLASS_ISOHUB classId(OBJISOHUB) +#define ENG_CLASS_PMGR classId(Pmgr) +#define ENG_CLASS_HDACODEC classId(OBJHDACODEC) +#define ENG_CLASS_SPI classId(Spi) +#define ENG_CLASS_UVM classId(OBJUVM) +#define ENG_CLASS_SEC2 classId(OBJSEC2) +#define ENG_CLASS_PMS classId(OBJPMS) +#define ENG_CLASS_ENGSTATE classId(OBJENGSTATE) +#define ENG_CLASS_LSFM classId(OBJLSFM) +#define ENG_CLASS_ACR classId(OBJACR) +#define ENG_CLASS_GPULOG classId(OBJGPULOG) +#define ENG_CLASS_NVLINK classId(Nvlink) +#define ENG_CLASS_HWPM classId(OBJHWPM) +#define ENG_CLASS_KERNEL_HWPM classId(KernelHwpm) +#define ENG_CLASS_GPUMON classId(OBJGPUMON) +#define ENG_CLASS_GRIDDISPLAYLESS classId(OBJGRIDDISPLAYLESS) +#define ENG_CLASS_VMMU classId(OBJVMMU) +#define ENG_CLASS_NVJPG classId(OBJNVJPG) +#define ENG_CLASS_GSP classId(Gsp) +#define ENG_CLASS_FSP classId(OBJFSP) +#define ENG_CLASS_KERNEL_FSP classId(KernelFsp) +#define ENG_CLASS_KERNEL_GSP classId(KernelGsp) +#define ENG_CLASS_KERNEL_SEC2 classId(KernelSec2) +#define ENG_CLASS_DISPMACRO classId(OBJDISPMACRO) +#define ENG_CLASS_NNE classId(OBJNNE) +#define ENG_CLASS_SMBPBI classId(Smbpbi) +#define ENG_CLASS_DSI classId(OBJDSI) +#define ENG_CLASS_DCECLIENTRM classId(OBJDCECLIENTRM) +#define ENG_CLASS_DCB classId(OBJDCB) +#define ENG_CLASS_KERNEL_NVLINK classId(KernelNvlink) +#define ENG_CLASS_GMMU classId(OBJGMMU) +#define ENG_CLASS_KERNEL_GMMU classId(KernelGmmu) +#define ENG_CLASS_CONF_COMPUTE classId(ConfidentialCompute) +#define ENG_CLASS_KERNEL_CCU classId(KernelCcu) +#define ENG_CLASS_CE classId(OBJCE) +#define ENG_CLASS_MSENC classId(OBJMSENC) +#define ENG_CLASS_NVDEC classId(OBJBSP) +#define ENG_CLASS_GR classId(Graphics) +#define ENG_CLASS_NVJPEG classId(OBJNVJPG) +#define ENG_CLASS_FECS classId(FECS) +#define ENG_CLASS_GPCCS classId(GPCCS) +#define ENG_CLASS_IOCTRL classId(Ioctrl) +#define ENG_CLASS_HSHUB classId(Hshub) +#define ENG_CLASS_KERNEL_IOCTRL classId(KernelIoctrl) +#define ENG_CLASS_OFA classId(OBJOFA) + + // // Engine tags to be used by both RM/HAL to reference specific engines. // // These values are used in the engine descriptor table // as well as in the class descriptor table. // -#define ENG_INVALID MKENGDESC(classId(OBJINVALID), 0) -#define ENG_SW MKENGDESC(classId(OBJSWENG), 0) -#define ENG_GPU MKENGDESC(classId(OBJGPU), 0) -#define ENG_FLCN MKENGDESC(classId(Falcon), 0) -#define ENG_MC MKENGDESC(classId(OBJMC), 0) -#define ENG_KERNEL_MC MKENGDESC(classId(KernelMc), 0) -#define ENG_PRIV_RING MKENGDESC(classId(PrivRing), 0) -#define ENG_SW_INTR MKENGDESC(classId(SwIntr), 0) -#define ENG_MEMORY_SYSTEM MKENGDESC(classId(MemorySystem), 0) -#define ENG_KERNEL_MEMORY_SYSTEM MKENGDESC(classId(KernelMemorySystem), 0) -#define ENG_MEMORY_MANAGER MKENGDESC(classId(MemoryManager), 0) -#define ENG_FBFLCN MKENGDESC(classId(OBJFBFLCN), 0) -#define ENG_TMR MKENGDESC(classId(OBJTMR), 0) -#define ENG_DMA MKENGDESC(classId(VirtMemAllocator), 0) -#define ENG_KERNEL_FIFO MKENGDESC(classId(KernelFifo), 0) -#define ENG_FIFO MKENGDESC(classId(OBJFIFO), 0) -#define ENG_OS MKENGDESC(classId(OBJOS), 0) -#define ENG_BUS MKENGDESC(classId(OBJBUS), 0) -#define ENG_KERNEL_BUS MKENGDESC(classId(KernelBus), 0) -#define ENG_INFOROM MKENGDESC(classId(OBJINFOROM), 0) -#define ENG_PERF MKENGDESC(classId(Perf), 0) -#define ENG_KERNEL_PERF MKENGDESC(classId(KernelPerf), 0) -#define ENG_PXUC MKENGDESC(classId(Pxuc), 0) -#define ENG_BIF MKENGDESC(classId(OBJBIF), 0) -#define ENG_KERNEL_BIF MKENGDESC(classId(KernelBif), 0) -#define ENG_HSHUBMANAGER MKENGDESC(classId(OBJHSHUBMANAGER), 0) -#define ENG_SF MKENGDESC(classId(OBJSF), 0) -#define ENG_GPIO MKENGDESC(classId(OBJGPIO), 0) -#define ENG_CLK MKENGDESC(classId(ClockManager), 0) -#define ENG_KERNEL_DISPLAY MKENGDESC(classId(KernelDisplay), 0) -#define ENG_DISP MKENGDESC(classId(OBJDISP), 0) -#define ENG_DPU MKENGDESC(classId(OBJDPU), 0) -#define ENG_DIP MKENGDESC(classId(OBJDIP), 0) -#define ENG_FAN MKENGDESC(classId(Fan), 0) -#define ENG_INST MKENGDESC(classId(DisplayInstanceMemory), 0) -#define ENG_KERNEL_HEAD MKENGDESC(classId(KernelHead), 0) -#define ENG_VOLT MKENGDESC(classId(OBJVOLT), 0) -#define ENG_INTR MKENGDESC(classId(Intr), 0) -#define ENG_HDA MKENGDESC(classId(OBJHDA), 0) -#define ENG_I2C MKENGDESC(classId(I2c), 0) -#define ENG_KERNEL_RC MKENGDESC(classId(KernelRc), 0) -#define ENG_RC MKENGDESC(classId(OBJRC), 0) -#define ENG_SOR MKENGDESC(classId(OBJSOR), 0) -#define ENG_DAC MKENGDESC(classId(OBJDAC), 0) -#define ENG_PIOR MKENGDESC(classId(OBJPIOR), 0) -#define ENG_HEAD MKENGDESC(classId(OBJHEAD), 0) -#define ENG_VGA MKENGDESC(classId(OBJVGA), 0) -#define ENG_STEREO MKENGDESC(classId(Stereo), 0) -#define ENG_OR MKENGDESC(classId(OBJOR), 0) -#define ENG_BSP MKENGDESC(classId(OBJBSP), 0) -#define ENG_CIPHER MKENGDESC(classId(OBJCIPHER), 0) -#define ENG_FUSE MKENGDESC(classId(OBJFUSE), 0) -#define ENG_HDCP MKENGDESC(classId(OBJHDCP), 0) -#define ENG_HDMI MKENGDESC(classId(OBJHDMI), 0) -#define ENG_THERM MKENGDESC(classId(Therm), 0) -#define ENG_SEQ MKENGDESC(classId(OBJSEQ), 0) -#define ENG_DPAUX MKENGDESC(classId(OBJDPAUX), 0) -#define ENG_PMU MKENGDESC(classId(Pmu), 0) -#define ENG_KERNEL_PMU MKENGDESC(classId(KernelPmu), 0) -#define ENG_LPWR MKENGDESC(classId(Lpwr), 0) -#define ENG_ISOHUB MKENGDESC(classId(OBJISOHUB), 0) -#define ENG_PMGR MKENGDESC(classId(Pmgr), 0) -#define ENG_HDACODEC MKENGDESC(classId(OBJHDACODEC), 0) -#define ENG_SPI MKENGDESC(classId(Spi), 0) -#define ENG_UVM MKENGDESC(classId(OBJUVM), 0) -#define ENG_SEC2 MKENGDESC(classId(OBJSEC2), 0) -#define ENG_PMS MKENGDESC(classId(OBJPMS), 0) -#define ENG_ENGSTATE MKENGDESC(classId(OBJENGSTATE), 0) -#define ENG_LSFM MKENGDESC(classId(OBJLSFM), 0) -#define ENG_ACR MKENGDESC(classId(OBJACR), 0) -#define ENG_GPULOG MKENGDESC(classId(OBJGPULOG), 0) -#define ENG_NVLINK MKENGDESC(classId(Nvlink), 0) -#define ENG_HWPM MKENGDESC(classId(OBJHWPM), 0) -#define ENG_KERNEL_HWPM MKENGDESC(classId(KernelHwpm), 0) -#define ENG_GPUMON MKENGDESC(classId(OBJGPUMON), 0) -#define ENG_GRIDDISPLAYLESS MKENGDESC(classId(OBJGRIDDISPLAYLESS), 0) -#define ENG_VMMU MKENGDESC(classId(OBJVMMU), 0) -#define ENG_NVJPG MKENGDESC(classId(OBJNVJPG), 0) -#define ENG_GSP MKENGDESC(classId(Gsp), 0) -#define ENG_FSP MKENGDESC(classId(OBJFSP), 0) -#define ENG_KERNEL_FSP MKENGDESC(classId(KernelFsp), 0) -#define ENG_KERNEL_GSP MKENGDESC(classId(KernelGsp), 0) -#define ENG_KERNEL_SEC2 MKENGDESC(classId(KernelSec2), 0) -#define ENG_DISPMACRO MKENGDESC(classId(OBJDISPMACRO), 0) -#define ENG_NNE MKENGDESC(classId(OBJNNE), 0) -#define ENG_SMBPBI MKENGDESC(classId(Smbpbi), 0) -#define ENG_DSI MKENGDESC(classId(OBJDSI), 0) -#define ENG_DCECLIENTRM MKENGDESC(classId(OBJDCECLIENTRM), 0) -#define ENG_DCB MKENGDESC(classId(OBJDCB), 0) -#define ENG_KERNEL_NVLINK MKENGDESC(classId(KernelNvlink), 0) -#define ENG_GMMU MKENGDESC(classId(OBJGMMU), 0) -#define ENG_KERNEL_GMMU MKENGDESC(classId(KernelGmmu), 0) -#define ENG_CONF_COMPUTE MKENGDESC(classId(ConfidentialCompute), 0) -#define ENG_KERNEL_CCU MKENGDESC(classId(KernelCcu), 0) +#define ENG_INVALID MKENGDESC(ENG_CLASS_INVALID, 0) +#define ENG_SW MKENGDESC(ENG_CLASS_SW, 0) +#define ENG_GPU MKENGDESC(ENG_CLASS_GPU, 0) +#define ENG_FLCN MKENGDESC(ENG_CLASS_FLCN, 0) +#define ENG_MC MKENGDESC(ENG_CLASS_MC, 0) +#define ENG_KERNEL_MC MKENGDESC(ENG_CLASS_KERNEL_MC, 0) +#define ENG_PRIV_RING MKENGDESC(ENG_CLASS_PRIV_RING, 0) +#define ENG_SW_INTR MKENGDESC(ENG_CLASS_SW_INTR, 0) +#define ENG_MEMORY_SYSTEM MKENGDESC(ENG_CLASS_MEMORY_SYSTEM, 0) +#define ENG_KERNEL_MEMORY_SYSTEM MKENGDESC(ENG_CLASS_KERNEL_MEMORY_SYSTEM, 0) +#define ENG_MEMORY_MANAGER MKENGDESC(ENG_CLASS_MEMORY_MANAGER, 0) +#define ENG_FBFLCN MKENGDESC(ENG_CLASS_FBFLCN, 0) +#define ENG_TMR MKENGDESC(ENG_CLASS_TMR, 0) +#define ENG_DMA MKENGDESC(ENG_CLASS_DMA, 0) +#define ENG_KERNEL_FIFO MKENGDESC(ENG_CLASS_KERNEL_FIFO, 0) +#define ENG_FIFO MKENGDESC(ENG_CLASS_FIFO, 0) +#define ENG_OS MKENGDESC(ENG_CLASS_OS, 0) +#define ENG_BUS MKENGDESC(ENG_CLASS_BUS, 0) +#define ENG_KERNEL_BUS MKENGDESC(ENG_CLASS_KERNEL_BUS, 0) +#define ENG_INFOROM MKENGDESC(ENG_CLASS_INFOROM, 0) +#define ENG_PERF MKENGDESC(ENG_CLASS_PERF, 0) +#define ENG_KERNEL_PERF MKENGDESC(ENG_CLASS_KERNEL_PERF, 0) +#define ENG_PXUC MKENGDESC(ENG_CLASS_PXUC, 0) +#define ENG_BIF MKENGDESC(ENG_CLASS_BIF, 0) +#define ENG_KERNEL_BIF MKENGDESC(ENG_CLASS_KERNEL_BIF, 0) +#define ENG_HSHUBMANAGER MKENGDESC(ENG_CLASS_HSHUBMANAGER, 0) +#define ENG_SF MKENGDESC(ENG_CLASS_SF, 0) +#define ENG_GPIO MKENGDESC(ENG_CLASS_GPIO, 0) +#define ENG_CLK MKENGDESC(ENG_CLASS_CLK, 0) +#define ENG_KERNEL_DISPLAY MKENGDESC(ENG_CLASS_KERNEL_DISPLAY, 0) +#define ENG_DISP MKENGDESC(ENG_CLASS_DISP, 0) +#define ENG_DPU MKENGDESC(ENG_CLASS_DPU, 0) +#define ENG_DIP MKENGDESC(ENG_CLASS_DIP, 0) +#define ENG_FAN MKENGDESC(ENG_CLASS_FAN, 0) +#define ENG_INST MKENGDESC(ENG_CLASS_INST, 0) +#define ENG_KERNEL_HEAD MKENGDESC(ENG_CLASS_KERNEL_HEAD, 0) +#define ENG_VOLT MKENGDESC(ENG_CLASS_VOLT, 0) +#define ENG_INTR MKENGDESC(ENG_CLASS_INTR, 0) +#define ENG_HDA MKENGDESC(ENG_CLASS_HDA, 0) +#define ENG_I2C MKENGDESC(ENG_CLASS_I2C, 0) +#define ENG_KERNEL_RC MKENGDESC(ENG_CLASS_KERNEL_RC, 0) +#define ENG_RC MKENGDESC(ENG_CLASS_RC, 0) +#define ENG_SOR MKENGDESC(ENG_CLASS_SOR, 0) +#define ENG_DAC MKENGDESC(ENG_CLASS_DAC, 0) +#define ENG_PIOR MKENGDESC(ENG_CLASS_PIOR, 0) +#define ENG_HEAD MKENGDESC(ENG_CLASS_HEAD, 0) +#define ENG_VGA MKENGDESC(ENG_CLASS_VGA, 0) +#define ENG_STEREO MKENGDESC(ENG_CLASS_STEREO, 0) +#define ENG_OR MKENGDESC(ENG_CLASS_OR, 0) +#define ENG_BSP MKENGDESC(ENG_CLASS_BSP, 0) +#define ENG_CIPHER MKENGDESC(ENG_CLASS_CIPHER, 0) +#define ENG_FUSE MKENGDESC(ENG_CLASS_FUSE, 0) +#define ENG_HDCP MKENGDESC(ENG_CLASS_HDCP, 0) +#define ENG_HDMI MKENGDESC(ENG_CLASS_HDMI, 0) +#define ENG_THERM MKENGDESC(ENG_CLASS_THERM, 0) +#define ENG_SEQ MKENGDESC(ENG_CLASS_SEQ, 0) +#define ENG_DPAUX MKENGDESC(ENG_CLASS_DPAUX, 0) +#define ENG_PMU MKENGDESC(ENG_CLASS_PMU, 0) +#define ENG_KERNEL_PMU MKENGDESC(ENG_CLASS_KERNEL_PMU, 0) +#define ENG_LPWR MKENGDESC(ENG_CLASS_LPWR, 0) +#define ENG_ISOHUB MKENGDESC(ENG_CLASS_ISOHUB, 0) +#define ENG_PMGR MKENGDESC(ENG_CLASS_PMGR, 0) +#define ENG_HDACODEC MKENGDESC(ENG_CLASS_HDACODEC, 0) +#define ENG_SPI MKENGDESC(ENG_CLASS_SPI, 0) +#define ENG_UVM MKENGDESC(ENG_CLASS_UVM, 0) +#define ENG_SEC2 MKENGDESC(ENG_CLASS_SEC2, 0) +#define ENG_PMS MKENGDESC(ENG_CLASS_PMS, 0) +#define ENG_ENGSTATE MKENGDESC(ENG_CLASS_ENGSTATE, 0) +#define ENG_LSFM MKENGDESC(ENG_CLASS_LSFM, 0) +#define ENG_ACR MKENGDESC(ENG_CLASS_ACR, 0) +#define ENG_GPULOG MKENGDESC(ENG_CLASS_GPULOG, 0) +#define ENG_NVLINK MKENGDESC(ENG_CLASS_NVLINK, 0) +#define ENG_HWPM MKENGDESC(ENG_CLASS_HWPM, 0) +#define ENG_KERNEL_HWPM MKENGDESC(ENG_CLASS_KERNEL_HWPM, 0) +#define ENG_GPUMON MKENGDESC(ENG_CLASS_GPUMON, 0) +#define ENG_GRIDDISPLAYLESS MKENGDESC(ENG_CLASS_GRIDDISPLAYLESS, 0) +#define ENG_VMMU MKENGDESC(ENG_CLASS_VMMU, 0) +#define ENG_NVJPG MKENGDESC(ENG_CLASS_NVJPG, 0) +#define ENG_GSP MKENGDESC(ENG_CLASS_GSP, 0) +#define ENG_FSP MKENGDESC(ENG_CLASS_FSP, 0) +#define ENG_KERNEL_FSP MKENGDESC(ENG_CLASS_KERNEL_FSP, 0) +#define ENG_KERNEL_GSP MKENGDESC(ENG_CLASS_KERNEL_GSP, 0) +#define ENG_KERNEL_SEC2 MKENGDESC(ENG_CLASS_KERNEL_SEC2, 0) +#define ENG_DISPMACRO MKENGDESC(ENG_CLASS_DISPMACRO, 0) +#define ENG_NNE MKENGDESC(ENG_CLASS_NNE, 0) +#define ENG_SMBPBI MKENGDESC(ENG_CLASS_SMBPBI, 0) +#define ENG_DSI MKENGDESC(ENG_CLASS_DSI, 0) +#define ENG_DCECLIENTRM MKENGDESC(ENG_CLASS_DCECLIENTRM, 0) +#define ENG_DCB MKENGDESC(ENG_CLASS_DCB, 0) +#define ENG_KERNEL_NVLINK MKENGDESC(ENG_CLASS_KERNEL_NVLINK, 0) +#define ENG_GMMU MKENGDESC(ENG_CLASS_GMMU, 0) +#define ENG_KERNEL_GMMU MKENGDESC(ENG_CLASS_KERNEL_GMMU, 0) +#define ENG_CONF_COMPUTE MKENGDESC(ENG_CLASS_CONF_COMPUTE, 0) +#define ENG_KERNEL_CCU MKENGDESC(ENG_CLASS_KERNEL_CCU, 0) // Indexed GSPLITE Engine Tag Reference // Indexed CE engine tag reference -#define ENG_CE(x) MKENGDESC(classId(OBJCE), x) +#define ENG_CE(x) MKENGDESC(ENG_CLASS_CE, x) #define ENG_CE__SIZE_1 20 #define IS_CE(engDesc) (ENGDESC_FIELD(engDesc, _CLASS) == classId(OBJCE)) #define GET_CE_IDX(engDesc) ENGDESC_FIELD(engDesc, _INST) // Indexed MSENC Engine Tag Reference -#define ENG_MSENC(x) MKENGDESC(classId(OBJMSENC), x) +#define ENG_MSENC(x) MKENGDESC(ENG_CLASS_MSENC, x) #define ENG_MSENC__SIZE_1 3 #define IS_MSENC(engDesc) (ENGDESC_FIELD(engDesc, _CLASS) == classId(OBJMSENC)) #define GET_MSENC_IDX(engDesc) ENGDESC_FIELD(engDesc, _INST) // Indexed BSP/NVDEC Engine Tag Reference -#define ENG_NVDEC(x) MKENGDESC(classId(OBJBSP), x) +#define ENG_NVDEC(x) MKENGDESC(ENG_CLASS_NVDEC, x) #define ENG_NVDEC__SIZE_1 8 #define IS_NVDEC(engDesc) (ENGDESC_FIELD(engDesc, _CLASS) == classId(OBJBSP)) #define GET_NVDEC_IDX(engDesc) ENGDESC_FIELD(engDesc, _INST) // Indexed GR engine tag reference -#define ENG_GR(x) MKENGDESC(classId(Graphics), x) +#define ENG_GR(x) MKENGDESC(ENG_CLASS_GR, x) #define ENG_GR__SIZE_1 8 #define IS_GR(engDesc) (ENGDESC_FIELD(engDesc, _CLASS) == classId(Graphics)) #define GET_GR_IDX(engDesc) ENGDESC_FIELD(engDesc, _INST) // Indexed NVJPEG Engine Tag Reference -#define ENG_NVJPEG(x) MKENGDESC(classId(OBJNVJPG), x) +#define ENG_NVJPEG(x) MKENGDESC(ENG_CLASS_NVJPEG, x) #define ENG_NVJPEG__SIZE_1 8 #define IS_NVJPEG(engDesc) (ENGDESC_FIELD(engDesc, _CLASS) == classId(OBJNVJPG)) #define GET_NVJPEG_IDX(engDesc) ENGDESC_FIELD(engDesc, _INST) // Indexed FECS engine tag reference -#define ENG_FECS(x) MKENGDESC(classId(FECS), x) +#define ENG_FECS(x) MKENGDESC(ENG_CLASS_FECS, x) #define ENG_FECS__SIZE_1 8 #define IS_FECS(engDesc) (ENGDESC_FIELD(engDesc, _CLASS) == classId(FECS)) #define GET_FECS_IDX(engDesc) ENGDESC_FIELD(engDesc, _INST) // Indexed GPCCS engine tag reference -#define ENG_GPCCS(x) MKENGDESC(classId(GPCCS), x) +#define ENG_GPCCS(x) MKENGDESC(ENG_CLASS_GPCCS, x) #define ENG_GPCCS__SIZE_1 8 #define IS_GPCCS(engDesc) (ENGDESC_FIELD(engDesc, _CLASS) == classId(GPCCS)) #define GET_GPCCS_IDX(engDesc) ENGDESC_FIELD(engDesc, _INST) // Indexed IOCTRL engine tag reference -#define ENG_IOCTRL(x) MKENGDESC(classId(Ioctrl), x) +#define ENG_IOCTRL(x) MKENGDESC(ENG_CLASS_IOCTRL, x) #define ENG_IOCTRL__SIZE_1 3 #define IS_IOCTRL(engDesc) (ENGDESC_FIELD(engDesc, _CLASS) == classId(Ioctrl)) #define GET_IOCTRL_IDX(engDesc) ENGDESC_FIELD(engDesc, _INST) // Indexed HSHUB engine tag reference -#define ENG_HSHUB(x) MKENGDESC(classId(Hshub), x) -// Bug 3748354 - Use this new value for all chips once Blackwell is released +#define ENG_HSHUB(x) MKENGDESC(ENG_CLASS_HSHUB, x) #define ENG_HSHUB__SIZE_1 12 #define IS_HSHUB(engDesc) (ENGDESC_FIELD(engDesc, _CLASS) == classId(Hshub)) #define GET_HSHUB_IDX(engDesc) ENGDESC_FIELD(engDesc, _INST) // Indexed IOCTRL engine tag reference -#define ENG_KERNEL_IOCTRL(x) MKENGDESC(classId(KernelIoctrl), x) +#define ENG_KERNEL_IOCTRL(x) MKENGDESC(ENG_CLASS_KERNEL_IOCTRL, x) #define ENG_KERNEL_IOCTRL__SIZE_1 3 #define IS_KERNEL_IOCTRL(engDesc) (ENGDESC_FIELD(engDesc, _CLASS) == classId(KernelIoctrl)) #define GET_KERNEL_IOCTRL_IDX(engDesc) ENGDESC_FIELD(engDesc, _INST) // Indexed OFA engine tag reference -#define ENG_OFA(x) MKENGDESC(classId(OBJOFA), x) +#define ENG_OFA(x) MKENGDESC(ENG_CLASS_OFA, x) #define ENG_OFA__SIZE_1 2 #define IS_OFA(engDesc) (ENGDESC_FIELD(engDesc, _CLASS) == classId(OBJOFA)) #define GET_OFA_IDX(engDesc) ENGDESC_FIELD(engDesc, _INST) + #endif // _ENG_DESC_H_ #ifdef __cplusplus diff --git a/src/nvidia/generated/g_eng_state_nvoc.c b/src/nvidia/generated/g_eng_state_nvoc.c index 8c01a4473b..1ecbc76b92 100644 --- a/src/nvidia/generated/g_eng_state_nvoc.c +++ b/src/nvidia/generated/g_eng_state_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJENGSTATE = /*pExportInfo=*/ &__nvoc_export_info_OBJENGSTATE }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJENGSTATE = { /*numEntries=*/ 0, @@ -91,55 +95,32 @@ NV_STATUS __nvoc_ctor_OBJENGSTATE(OBJENGSTATE *pThis) { // Vtable initialization static void __nvoc_init_funcTable_OBJENGSTATE_1(OBJENGSTATE *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // engstateConstructEngine -- virtual - pThis->__engstateConstructEngine__ = &engstateConstructEngine_IMPL; - - // engstateInitMissing -- virtual - pThis->__engstateInitMissing__ = &engstateInitMissing_IMPL; - - // engstateStatePreInitLocked -- virtual - pThis->__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL; - - // engstateStatePreInitUnlocked -- virtual - pThis->__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL; - - // engstateStateInitLocked -- virtual - pThis->__engstateStateInitLocked__ = &engstateStateInitLocked_IMPL; - - // engstateStateInitUnlocked -- virtual - pThis->__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL; - - // engstateStatePreLoad -- virtual - pThis->__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL; - - // engstateStateLoad -- virtual - pThis->__engstateStateLoad__ = &engstateStateLoad_IMPL; - - // engstateStatePostLoad -- virtual - pThis->__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL; - - // engstateStatePreUnload -- virtual - pThis->__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL; - - // engstateStateUnload -- virtual - pThis->__engstateStateUnload__ = &engstateStateUnload_IMPL; - - // engstateStatePostUnload -- virtual - pThis->__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL; - - // engstateStateDestroy -- virtual - pThis->__engstateStateDestroy__ = &engstateStateDestroy_IMPL; - - // engstateIsPresent -- virtual - pThis->__engstateIsPresent__ = &engstateIsPresent_IMPL; -} // End __nvoc_init_funcTable_OBJENGSTATE_1 with approximately 14 basic block(s). +} // End __nvoc_init_funcTable_OBJENGSTATE_1 // Initialize vtable(s) for 14 virtual method(s). void __nvoc_init_funcTable_OBJENGSTATE(OBJENGSTATE *pThis) { - // Initialize vtable(s) with 14 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__OBJENGSTATE vtable = { + .__engstateConstructEngine__ = &engstateConstructEngine_IMPL, // virtual + .__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__engstateStateInitLocked__ = &engstateStateInitLocked_IMPL, // virtual + .__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__engstateStateLoad__ = &engstateStateLoad_IMPL, // virtual + .__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL, // virtual + .__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__engstateStateUnload__ = &engstateStateUnload_IMPL, // virtual + .__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__engstateStateDestroy__ = &engstateStateDestroy_IMPL, // virtual + .__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_vtable = &vtable; // (engstate) this __nvoc_init_funcTable_OBJENGSTATE_1(pThis); } diff --git a/src/nvidia/generated/g_eng_state_nvoc.h b/src/nvidia/generated/g_eng_state_nvoc.h index 5f6a1160e7..f20088ad00 100644 --- a/src/nvidia/generated/g_eng_state_nvoc.h +++ b/src/nvidia/generated/g_eng_state_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -101,10 +101,15 @@ typedef struct ENGSTATE_TRANSITION_DATA #endif +// Metadata including vtable +struct NVOC_VTABLE__OBJENGSTATE; + + struct OBJENGSTATE { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__OBJENGSTATE *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; @@ -113,7 +118,21 @@ struct OBJENGSTATE { struct Object *__nvoc_pbase_Object; // obj super struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate - // Vtable with 14 per-object function pointers + // 1 PDB property + NvBool PDB_PROP_ENGSTATE_IS_MISSING; + + // Data members + ENGDESCRIPTOR engDesc; + struct OBJGPU *pGpu; + ENGSTATE_STATE currentState; + ENGSTATE_STATS stats[11]; + char name[100]; +}; + + +// Metadata including vtable with 14 function pointers plus superclass metadata +struct NVOC_VTABLE__OBJENGSTATE { + NV_STATUS (*__engstateConstructEngine__)(struct OBJGPU *, struct OBJENGSTATE * /*this*/, ENGDESCRIPTOR); // virtual void (*__engstateInitMissing__)(struct OBJGPU *, struct OBJENGSTATE * /*this*/); // virtual NV_STATUS (*__engstateStatePreInitLocked__)(struct OBJGPU *, struct OBJENGSTATE * /*this*/); // virtual @@ -128,16 +147,6 @@ struct OBJENGSTATE { NV_STATUS (*__engstateStatePostUnload__)(struct OBJGPU *, struct OBJENGSTATE * /*this*/, NvU32); // virtual void (*__engstateStateDestroy__)(struct OBJGPU *, struct OBJENGSTATE * /*this*/); // virtual NvBool (*__engstateIsPresent__)(struct OBJGPU *, struct OBJENGSTATE * /*this*/); // virtual - - // 1 PDB property - NvBool PDB_PROP_ENGSTATE_IS_MISSING; - - // Data members - ENGDESCRIPTOR engDesc; - struct OBJGPU *pGpu; - ENGSTATE_STATE currentState; - ENGSTATE_STATS stats[11]; - char name[100]; }; #ifndef __NVOC_CLASS_OBJENGSTATE_TYPEDEF__ @@ -174,90 +183,90 @@ NV_STATUS __nvoc_objCreate_OBJENGSTATE(OBJENGSTATE**, Dynamic*, NvU32); // Wrapper macros -#define engstateConstructEngine_FNPTR(pEngstate) pEngstate->__engstateConstructEngine__ +#define engstateConstructEngine_FNPTR(pEngstate) pEngstate->__nvoc_vtable->__engstateConstructEngine__ #define engstateConstructEngine(pGpu, pEngstate, arg3) engstateConstructEngine_DISPATCH(pGpu, pEngstate, arg3) -#define engstateInitMissing_FNPTR(pEngstate) pEngstate->__engstateInitMissing__ +#define engstateInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_vtable->__engstateInitMissing__ #define engstateInitMissing(pGpu, pEngstate) engstateInitMissing_DISPATCH(pGpu, pEngstate) -#define engstateStatePreInitLocked_FNPTR(pEngstate) pEngstate->__engstateStatePreInitLocked__ +#define engstateStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_vtable->__engstateStatePreInitLocked__ #define engstateStatePreInitLocked(pGpu, pEngstate) engstateStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define engstateStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__engstateStatePreInitUnlocked__ +#define engstateStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_vtable->__engstateStatePreInitUnlocked__ #define engstateStatePreInitUnlocked(pGpu, pEngstate) engstateStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define engstateStateInitLocked_FNPTR(pEngstate) pEngstate->__engstateStateInitLocked__ +#define engstateStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_vtable->__engstateStateInitLocked__ #define engstateStateInitLocked(pGpu, pEngstate) engstateStateInitLocked_DISPATCH(pGpu, pEngstate) -#define engstateStateInitUnlocked_FNPTR(pEngstate) pEngstate->__engstateStateInitUnlocked__ +#define engstateStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_vtable->__engstateStateInitUnlocked__ #define engstateStateInitUnlocked(pGpu, pEngstate) engstateStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define engstateStatePreLoad_FNPTR(pEngstate) pEngstate->__engstateStatePreLoad__ +#define engstateStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_vtable->__engstateStatePreLoad__ #define engstateStatePreLoad(pGpu, pEngstate, arg3) engstateStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define engstateStateLoad_FNPTR(pEngstate) pEngstate->__engstateStateLoad__ +#define engstateStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_vtable->__engstateStateLoad__ #define engstateStateLoad(pGpu, pEngstate, arg3) engstateStateLoad_DISPATCH(pGpu, pEngstate, arg3) -#define engstateStatePostLoad_FNPTR(pEngstate) pEngstate->__engstateStatePostLoad__ +#define engstateStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_vtable->__engstateStatePostLoad__ #define engstateStatePostLoad(pGpu, pEngstate, arg3) engstateStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define engstateStatePreUnload_FNPTR(pEngstate) pEngstate->__engstateStatePreUnload__ +#define engstateStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_vtable->__engstateStatePreUnload__ #define engstateStatePreUnload(pGpu, pEngstate, arg3) engstateStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define engstateStateUnload_FNPTR(pEngstate) pEngstate->__engstateStateUnload__ +#define engstateStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_vtable->__engstateStateUnload__ #define engstateStateUnload(pGpu, pEngstate, arg3) engstateStateUnload_DISPATCH(pGpu, pEngstate, arg3) -#define engstateStatePostUnload_FNPTR(pEngstate) pEngstate->__engstateStatePostUnload__ +#define engstateStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_vtable->__engstateStatePostUnload__ #define engstateStatePostUnload(pGpu, pEngstate, arg3) engstateStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define engstateStateDestroy_FNPTR(pEngstate) pEngstate->__engstateStateDestroy__ +#define engstateStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_vtable->__engstateStateDestroy__ #define engstateStateDestroy(pGpu, pEngstate) engstateStateDestroy_DISPATCH(pGpu, pEngstate) -#define engstateIsPresent_FNPTR(pEngstate) pEngstate->__engstateIsPresent__ +#define engstateIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_vtable->__engstateIsPresent__ #define engstateIsPresent(pGpu, pEngstate) engstateIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS engstateConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct OBJENGSTATE *pEngstate, ENGDESCRIPTOR arg3) { - return pEngstate->__engstateConstructEngine__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__engstateConstructEngine__(pGpu, pEngstate, arg3); } static inline void engstateInitMissing_DISPATCH(struct OBJGPU *pGpu, struct OBJENGSTATE *pEngstate) { - pEngstate->__engstateInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__engstateInitMissing__(pGpu, pEngstate); } static inline NV_STATUS engstateStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct OBJENGSTATE *pEngstate) { - return pEngstate->__engstateStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__engstateStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS engstateStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct OBJENGSTATE *pEngstate) { - return pEngstate->__engstateStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__engstateStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS engstateStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct OBJENGSTATE *pEngstate) { - return pEngstate->__engstateStateInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__engstateStateInitLocked__(pGpu, pEngstate); } static inline NV_STATUS engstateStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct OBJENGSTATE *pEngstate) { - return pEngstate->__engstateStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__engstateStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS engstateStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct OBJENGSTATE *pEngstate, NvU32 arg3) { - return pEngstate->__engstateStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__engstateStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS engstateStateLoad_DISPATCH(struct OBJGPU *pGpu, struct OBJENGSTATE *pEngstate, NvU32 arg3) { - return pEngstate->__engstateStateLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__engstateStateLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS engstateStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct OBJENGSTATE *pEngstate, NvU32 arg3) { - return pEngstate->__engstateStatePostLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__engstateStatePostLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS engstateStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct OBJENGSTATE *pEngstate, NvU32 arg3) { - return pEngstate->__engstateStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__engstateStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS engstateStateUnload_DISPATCH(struct OBJGPU *pGpu, struct OBJENGSTATE *pEngstate, NvU32 arg3) { - return pEngstate->__engstateStateUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__engstateStateUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS engstateStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct OBJENGSTATE *pEngstate, NvU32 arg3) { - return pEngstate->__engstateStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__engstateStatePostUnload__(pGpu, pEngstate, arg3); } static inline void engstateStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct OBJENGSTATE *pEngstate) { - pEngstate->__engstateStateDestroy__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__engstateStateDestroy__(pGpu, pEngstate); } static inline NvBool engstateIsPresent_DISPATCH(struct OBJGPU *pGpu, struct OBJENGSTATE *pEngstate) { - return pEngstate->__engstateIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__engstateIsPresent__(pGpu, pEngstate); } NV_STATUS engstateConstructEngine_IMPL(struct OBJGPU *pGpu, struct OBJENGSTATE *pEngstate, ENGDESCRIPTOR arg3); diff --git a/src/nvidia/generated/g_event_buffer_nvoc.c b/src/nvidia/generated/g_event_buffer_nvoc.c index 5a93f93bc6..ae92e41529 100644 --- a/src/nvidia/generated/g_event_buffer_nvoc.c +++ b/src/nvidia/generated/g_event_buffer_nvoc.c @@ -153,110 +153,153 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_EventBuf }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_RmResource_eventbufferAccessCallback(struct EventBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_eventbufferShareCallback(struct EventBuffer *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_eventbufferGetMemInterMapParams(struct EventBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_eventbufferCheckMemInterUnmap(struct EventBuffer *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_eventbufferGetMemoryMappingDescriptor(struct EventBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_eventbufferControlSerialization_Prologue(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_eventbufferControlSerialization_Epilogue(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_eventbufferControl_Prologue(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_eventbufferControl_Epilogue(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_eventbufferCanCopy(struct EventBuffer *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_eventbufferIsDuplicate(struct EventBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_eventbufferPreDestruct(struct EventBuffer *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_eventbufferControl(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_eventbufferControlFilter(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_eventbufferMap(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_eventbufferUnmap(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_eventbufferIsPartialUnmapSupported(struct EventBuffer *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_eventbufferMapTo(struct EventBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_eventbufferUnmapFrom(struct EventBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_eventbufferGetRefCount(struct EventBuffer *pResource); // this +void __nvoc_up_thunk_RsResource_eventbufferAddAdditionalDependants(struct RsClient *pClient, struct EventBuffer *pResource, RsResourceRef *pReference); // this + // 21 up-thunk(s) defined to bridge methods in EventBuffer to superclasses // eventbufferAccessCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_eventbufferAccessCallback(struct EventBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_eventbufferAccessCallback(struct EventBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // eventbufferShareCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_eventbufferShareCallback(struct EventBuffer *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_eventbufferShareCallback(struct EventBuffer *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // eventbufferGetMemInterMapParams: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_eventbufferGetMemInterMapParams(struct EventBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_eventbufferGetMemInterMapParams(struct EventBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_EventBuffer_RmResource.offset), pParams); } // eventbufferCheckMemInterUnmap: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_eventbufferCheckMemInterUnmap(struct EventBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_eventbufferCheckMemInterUnmap(struct EventBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_EventBuffer_RmResource.offset), bSubdeviceHandleProvided); } // eventbufferGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_eventbufferGetMemoryMappingDescriptor(struct EventBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_eventbufferGetMemoryMappingDescriptor(struct EventBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_EventBuffer_RmResource.offset), ppMemDesc); } // eventbufferControlSerialization_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_eventbufferControlSerialization_Prologue(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_eventbufferControlSerialization_Prologue(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RmResource.offset), pCallContext, pParams); } // eventbufferControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_eventbufferControlSerialization_Epilogue(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_eventbufferControlSerialization_Epilogue(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RmResource.offset), pCallContext, pParams); } // eventbufferControl_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_eventbufferControl_Prologue(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_eventbufferControl_Prologue(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RmResource.offset), pCallContext, pParams); } // eventbufferControl_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_eventbufferControl_Epilogue(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_eventbufferControl_Epilogue(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RmResource.offset), pCallContext, pParams); } // eventbufferCanCopy: virtual inherited (res) base (rmres) -static NvBool __nvoc_up_thunk_RsResource_eventbufferCanCopy(struct EventBuffer *pResource) { +NvBool __nvoc_up_thunk_RsResource_eventbufferCanCopy(struct EventBuffer *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset)); } // eventbufferIsDuplicate: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_eventbufferIsDuplicate(struct EventBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_eventbufferIsDuplicate(struct EventBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), hMemory, pDuplicate); } // eventbufferPreDestruct: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_eventbufferPreDestruct(struct EventBuffer *pResource) { +void __nvoc_up_thunk_RsResource_eventbufferPreDestruct(struct EventBuffer *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset)); } // eventbufferControl: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_eventbufferControl(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_eventbufferControl(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), pCallContext, pParams); } // eventbufferControlFilter: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_eventbufferControlFilter(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_eventbufferControlFilter(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), pCallContext, pParams); } // eventbufferMap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_eventbufferMap(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_eventbufferMap(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), pCallContext, pParams, pCpuMapping); } // eventbufferUnmap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_eventbufferUnmap(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_eventbufferUnmap(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), pCallContext, pCpuMapping); } // eventbufferIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body -static NvBool __nvoc_up_thunk_RsResource_eventbufferIsPartialUnmapSupported(struct EventBuffer *pResource) { +NvBool __nvoc_up_thunk_RsResource_eventbufferIsPartialUnmapSupported(struct EventBuffer *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset)); } // eventbufferMapTo: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_eventbufferMapTo(struct EventBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_eventbufferMapTo(struct EventBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), pParams); } // eventbufferUnmapFrom: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_eventbufferUnmapFrom(struct EventBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_eventbufferUnmapFrom(struct EventBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), pParams); } // eventbufferGetRefCount: virtual inherited (res) base (rmres) -static NvU32 __nvoc_up_thunk_RsResource_eventbufferGetRefCount(struct EventBuffer *pResource) { +NvU32 __nvoc_up_thunk_RsResource_eventbufferGetRefCount(struct EventBuffer *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset)); } // eventbufferAddAdditionalDependants: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_eventbufferAddAdditionalDependants(struct RsClient *pClient, struct EventBuffer *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_eventbufferAddAdditionalDependants(struct RsClient *pClient, struct EventBuffer *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_EventBuffer_RsResource.offset), pReference); } @@ -320,76 +363,90 @@ static void __nvoc_init_funcTable_EventBuffer_1(EventBuffer *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__eventbuffertBufferCtrlCmdPostTelemetryEvent__ = &eventbuffertBufferCtrlCmdPostTelemetryEvent_IMPL; #endif - - // eventbufferAccessCallback -- virtual inherited (rmres) base (rmres) - pThis->__eventbufferAccessCallback__ = &__nvoc_up_thunk_RmResource_eventbufferAccessCallback; - - // eventbufferShareCallback -- virtual inherited (rmres) base (rmres) - pThis->__eventbufferShareCallback__ = &__nvoc_up_thunk_RmResource_eventbufferShareCallback; - - // eventbufferGetMemInterMapParams -- virtual inherited (rmres) base (rmres) - pThis->__eventbufferGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_eventbufferGetMemInterMapParams; - - // eventbufferCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) - pThis->__eventbufferCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_eventbufferCheckMemInterUnmap; - - // eventbufferGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) - pThis->__eventbufferGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_eventbufferGetMemoryMappingDescriptor; - - // eventbufferControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__eventbufferControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_eventbufferControlSerialization_Prologue; - - // eventbufferControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__eventbufferControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_eventbufferControlSerialization_Epilogue; - - // eventbufferControl_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__eventbufferControl_Prologue__ = &__nvoc_up_thunk_RmResource_eventbufferControl_Prologue; - - // eventbufferControl_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__eventbufferControl_Epilogue__ = &__nvoc_up_thunk_RmResource_eventbufferControl_Epilogue; - - // eventbufferCanCopy -- virtual inherited (res) base (rmres) - pThis->__eventbufferCanCopy__ = &__nvoc_up_thunk_RsResource_eventbufferCanCopy; - - // eventbufferIsDuplicate -- virtual inherited (res) base (rmres) - pThis->__eventbufferIsDuplicate__ = &__nvoc_up_thunk_RsResource_eventbufferIsDuplicate; - - // eventbufferPreDestruct -- virtual inherited (res) base (rmres) - pThis->__eventbufferPreDestruct__ = &__nvoc_up_thunk_RsResource_eventbufferPreDestruct; - - // eventbufferControl -- virtual inherited (res) base (rmres) - pThis->__eventbufferControl__ = &__nvoc_up_thunk_RsResource_eventbufferControl; - - // eventbufferControlFilter -- virtual inherited (res) base (rmres) - pThis->__eventbufferControlFilter__ = &__nvoc_up_thunk_RsResource_eventbufferControlFilter; - - // eventbufferMap -- virtual inherited (res) base (rmres) - pThis->__eventbufferMap__ = &__nvoc_up_thunk_RsResource_eventbufferMap; - - // eventbufferUnmap -- virtual inherited (res) base (rmres) - pThis->__eventbufferUnmap__ = &__nvoc_up_thunk_RsResource_eventbufferUnmap; - - // eventbufferIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body - pThis->__eventbufferIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_eventbufferIsPartialUnmapSupported; - - // eventbufferMapTo -- virtual inherited (res) base (rmres) - pThis->__eventbufferMapTo__ = &__nvoc_up_thunk_RsResource_eventbufferMapTo; - - // eventbufferUnmapFrom -- virtual inherited (res) base (rmres) - pThis->__eventbufferUnmapFrom__ = &__nvoc_up_thunk_RsResource_eventbufferUnmapFrom; - - // eventbufferGetRefCount -- virtual inherited (res) base (rmres) - pThis->__eventbufferGetRefCount__ = &__nvoc_up_thunk_RsResource_eventbufferGetRefCount; - - // eventbufferAddAdditionalDependants -- virtual inherited (res) base (rmres) - pThis->__eventbufferAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_eventbufferAddAdditionalDependants; -} // End __nvoc_init_funcTable_EventBuffer_1 with approximately 25 basic block(s). +} // End __nvoc_init_funcTable_EventBuffer_1 with approximately 4 basic block(s). // Initialize vtable(s) for 25 virtual method(s). void __nvoc_init_funcTable_EventBuffer(EventBuffer *pThis) { - // Initialize vtable(s) with 25 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__EventBuffer vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__eventbufferAccessCallback__ = &__nvoc_up_thunk_RmResource_eventbufferAccessCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__eventbufferShareCallback__ = &__nvoc_up_thunk_RmResource_eventbufferShareCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__eventbufferGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_eventbufferGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__eventbufferCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_eventbufferCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__eventbufferGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_eventbufferGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__eventbufferControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_eventbufferControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__eventbufferControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_eventbufferControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__eventbufferControl_Prologue__ = &__nvoc_up_thunk_RmResource_eventbufferControl_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__eventbufferControl_Epilogue__ = &__nvoc_up_thunk_RmResource_eventbufferControl_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__eventbufferCanCopy__ = &__nvoc_up_thunk_RsResource_eventbufferCanCopy, // virtual inherited (res) base (rmres) + .RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__eventbufferIsDuplicate__ = &__nvoc_up_thunk_RsResource_eventbufferIsDuplicate, // virtual inherited (res) base (rmres) + .RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__eventbufferPreDestruct__ = &__nvoc_up_thunk_RsResource_eventbufferPreDestruct, // virtual inherited (res) base (rmres) + .RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__eventbufferControl__ = &__nvoc_up_thunk_RsResource_eventbufferControl, // virtual inherited (res) base (rmres) + .RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControl__ = &resControl_IMPL, // virtual + .__eventbufferControlFilter__ = &__nvoc_up_thunk_RsResource_eventbufferControlFilter, // virtual inherited (res) base (rmres) + .RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__eventbufferMap__ = &__nvoc_up_thunk_RsResource_eventbufferMap, // virtual inherited (res) base (rmres) + .RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMap__ = &resMap_IMPL, // virtual + .__eventbufferUnmap__ = &__nvoc_up_thunk_RsResource_eventbufferUnmap, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__eventbufferIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_eventbufferIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__eventbufferMapTo__ = &__nvoc_up_thunk_RsResource_eventbufferMapTo, // virtual inherited (res) base (rmres) + .RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__eventbufferUnmapFrom__ = &__nvoc_up_thunk_RsResource_eventbufferUnmapFrom, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__eventbufferGetRefCount__ = &__nvoc_up_thunk_RsResource_eventbufferGetRefCount, // virtual inherited (res) base (rmres) + .RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__eventbufferAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_eventbufferAddAdditionalDependants, // virtual inherited (res) base (rmres) + .RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.RmResource.RsResource; // (res) super^2 + pThis->__nvoc_base_RmResource.__nvoc_vtable = &vtable.RmResource; // (rmres) super + pThis->__nvoc_vtable = &vtable; // (eventbuffer) this + + // Initialize vtable(s) with 4 per-object function pointer(s). __nvoc_init_funcTable_EventBuffer_1(pThis); } diff --git a/src/nvidia/generated/g_event_buffer_nvoc.h b/src/nvidia/generated/g_event_buffer_nvoc.h index 183859d11c..283976b024 100644 --- a/src/nvidia/generated/g_event_buffer_nvoc.h +++ b/src/nvidia/generated/g_event_buffer_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -88,10 +88,15 @@ typedef struct #endif +// Metadata including vtable +struct NVOC_VTABLE__EventBuffer; + + struct EventBuffer { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__EventBuffer *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; @@ -103,32 +108,11 @@ struct EventBuffer { struct RmResource *__nvoc_pbase_RmResource; // rmres super struct EventBuffer *__nvoc_pbase_EventBuffer; // eventbuffer - // Vtable with 25 per-object function pointers + // Vtable with 4 per-object function pointers NV_STATUS (*__eventbuffertBufferCtrlCmdEnableEvent__)(struct EventBuffer * /*this*/, NV_EVENT_BUFFER_CTRL_CMD_ENABLE_EVENTS_PARAMS *); // exported (id=0x90cd0101) NV_STATUS (*__eventbuffertBufferCtrlCmdUpdateGet__)(struct EventBuffer * /*this*/, NV_EVENT_BUFFER_CTRL_CMD_UPDATE_GET_PARAMS *); // exported (id=0x90cd0102) NV_STATUS (*__eventbuffertBufferCtrlCmdFlush__)(struct EventBuffer * /*this*/); // exported (id=0x90cd0104) NV_STATUS (*__eventbuffertBufferCtrlCmdPostTelemetryEvent__)(struct EventBuffer * /*this*/, NV_EVENT_BUFFER_CTRL_CMD_POST_TELEMETRY_EVENT_PARAMS *); // exported (id=0x90cd0105) - NvBool (*__eventbufferAccessCallback__)(struct EventBuffer * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) - NvBool (*__eventbufferShareCallback__)(struct EventBuffer * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) - NV_STATUS (*__eventbufferGetMemInterMapParams__)(struct EventBuffer * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) - NV_STATUS (*__eventbufferCheckMemInterUnmap__)(struct EventBuffer * /*this*/, NvBool); // virtual inherited (rmres) base (rmres) - NV_STATUS (*__eventbufferGetMemoryMappingDescriptor__)(struct EventBuffer * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (rmres) - NV_STATUS (*__eventbufferControlSerialization_Prologue__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) - void (*__eventbufferControlSerialization_Epilogue__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) - NV_STATUS (*__eventbufferControl_Prologue__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) - void (*__eventbufferControl_Epilogue__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) - NvBool (*__eventbufferCanCopy__)(struct EventBuffer * /*this*/); // virtual inherited (res) base (rmres) - NV_STATUS (*__eventbufferIsDuplicate__)(struct EventBuffer * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (rmres) - void (*__eventbufferPreDestruct__)(struct EventBuffer * /*this*/); // virtual inherited (res) base (rmres) - NV_STATUS (*__eventbufferControl__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) - NV_STATUS (*__eventbufferControlFilter__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) - NV_STATUS (*__eventbufferMap__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (rmres) - NV_STATUS (*__eventbufferUnmap__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (rmres) - NvBool (*__eventbufferIsPartialUnmapSupported__)(struct EventBuffer * /*this*/); // inline virtual inherited (res) base (rmres) body - NV_STATUS (*__eventbufferMapTo__)(struct EventBuffer * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (rmres) - NV_STATUS (*__eventbufferUnmapFrom__)(struct EventBuffer * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) - NvU32 (*__eventbufferGetRefCount__)(struct EventBuffer * /*this*/); // virtual inherited (res) base (rmres) - void (*__eventbufferAddAdditionalDependants__)(struct RsClient *, struct EventBuffer * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) // Data members struct MEMORY_DESCRIPTOR *pHeaderDesc; @@ -153,6 +137,34 @@ struct EventBuffer { NvHandle hInternalBuffer; }; + +// Metadata including vtable with 21 function pointers plus superclass metadata +struct NVOC_VTABLE__EventBuffer { + const struct NVOC_VTABLE__RmResource RmResource; // (rmres) 21 function pointers + + NvBool (*__eventbufferAccessCallback__)(struct EventBuffer * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) + NvBool (*__eventbufferShareCallback__)(struct EventBuffer * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__eventbufferGetMemInterMapParams__)(struct EventBuffer * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__eventbufferCheckMemInterUnmap__)(struct EventBuffer * /*this*/, NvBool); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__eventbufferGetMemoryMappingDescriptor__)(struct EventBuffer * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__eventbufferControlSerialization_Prologue__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__eventbufferControlSerialization_Epilogue__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__eventbufferControl_Prologue__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__eventbufferControl_Epilogue__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NvBool (*__eventbufferCanCopy__)(struct EventBuffer * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__eventbufferIsDuplicate__)(struct EventBuffer * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (rmres) + void (*__eventbufferPreDestruct__)(struct EventBuffer * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__eventbufferControl__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__eventbufferControlFilter__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NV_STATUS (*__eventbufferMap__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NV_STATUS (*__eventbufferUnmap__)(struct EventBuffer * /*this*/, struct CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (res) base (rmres) + NvBool (*__eventbufferIsPartialUnmapSupported__)(struct EventBuffer * /*this*/); // inline virtual inherited (res) base (rmres) body + NV_STATUS (*__eventbufferMapTo__)(struct EventBuffer * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (rmres) + NV_STATUS (*__eventbufferUnmapFrom__)(struct EventBuffer * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) + NvU32 (*__eventbufferGetRefCount__)(struct EventBuffer * /*this*/); // virtual inherited (res) base (rmres) + void (*__eventbufferAddAdditionalDependants__)(struct RsClient *, struct EventBuffer * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) +}; + #ifndef __NVOC_CLASS_EventBuffer_TYPEDEF__ #define __NVOC_CLASS_EventBuffer_TYPEDEF__ typedef struct EventBuffer EventBuffer; @@ -191,47 +203,47 @@ NV_STATUS __nvoc_objCreate_EventBuffer(EventBuffer**, Dynamic*, NvU32, struct CA #define eventbuffertBufferCtrlCmdFlush(pEventBuffer) eventbuffertBufferCtrlCmdFlush_DISPATCH(pEventBuffer) #define eventbuffertBufferCtrlCmdPostTelemetryEvent_FNPTR(pEventBuffer) pEventBuffer->__eventbuffertBufferCtrlCmdPostTelemetryEvent__ #define eventbuffertBufferCtrlCmdPostTelemetryEvent(pEventBuffer, pPostTelemetryEvent) eventbuffertBufferCtrlCmdPostTelemetryEvent_DISPATCH(pEventBuffer, pPostTelemetryEvent) -#define eventbufferAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define eventbufferAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define eventbufferAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) eventbufferAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define eventbufferShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ +#define eventbufferShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define eventbufferShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) eventbufferShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define eventbufferGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define eventbufferGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define eventbufferGetMemInterMapParams(pRmResource, pParams) eventbufferGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define eventbufferCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define eventbufferCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define eventbufferCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) eventbufferCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define eventbufferGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define eventbufferGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define eventbufferGetMemoryMappingDescriptor(pRmResource, ppMemDesc) eventbufferGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define eventbufferControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define eventbufferControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define eventbufferControlSerialization_Prologue(pResource, pCallContext, pParams) eventbufferControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define eventbufferControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define eventbufferControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define eventbufferControlSerialization_Epilogue(pResource, pCallContext, pParams) eventbufferControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define eventbufferControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ +#define eventbufferControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define eventbufferControl_Prologue(pResource, pCallContext, pParams) eventbufferControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define eventbufferControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define eventbufferControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define eventbufferControl_Epilogue(pResource, pCallContext, pParams) eventbufferControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define eventbufferCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define eventbufferCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define eventbufferCanCopy(pResource) eventbufferCanCopy_DISPATCH(pResource) -#define eventbufferIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define eventbufferIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define eventbufferIsDuplicate(pResource, hMemory, pDuplicate) eventbufferIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define eventbufferPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define eventbufferPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define eventbufferPreDestruct(pResource) eventbufferPreDestruct_DISPATCH(pResource) -#define eventbufferControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define eventbufferControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControl__ #define eventbufferControl(pResource, pCallContext, pParams) eventbufferControl_DISPATCH(pResource, pCallContext, pParams) -#define eventbufferControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define eventbufferControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define eventbufferControlFilter(pResource, pCallContext, pParams) eventbufferControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define eventbufferMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define eventbufferMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define eventbufferMap(pResource, pCallContext, pParams, pCpuMapping) eventbufferMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define eventbufferUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define eventbufferUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define eventbufferUnmap(pResource, pCallContext, pCpuMapping) eventbufferUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define eventbufferIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define eventbufferIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define eventbufferIsPartialUnmapSupported(pResource) eventbufferIsPartialUnmapSupported_DISPATCH(pResource) -#define eventbufferMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define eventbufferMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define eventbufferMapTo(pResource, pParams) eventbufferMapTo_DISPATCH(pResource, pParams) -#define eventbufferUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define eventbufferUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define eventbufferUnmapFrom(pResource, pParams) eventbufferUnmapFrom_DISPATCH(pResource, pParams) -#define eventbufferGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define eventbufferGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define eventbufferGetRefCount(pResource) eventbufferGetRefCount_DISPATCH(pResource) -#define eventbufferAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define eventbufferAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define eventbufferAddAdditionalDependants(pClient, pResource, pReference) eventbufferAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions @@ -252,87 +264,87 @@ static inline NV_STATUS eventbuffertBufferCtrlCmdPostTelemetryEvent_DISPATCH(str } static inline NvBool eventbufferAccessCallback_DISPATCH(struct EventBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__eventbufferAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__eventbufferAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool eventbufferShareCallback_DISPATCH(struct EventBuffer *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__eventbufferShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__eventbufferShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS eventbufferGetMemInterMapParams_DISPATCH(struct EventBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__eventbufferGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__eventbufferGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS eventbufferCheckMemInterUnmap_DISPATCH(struct EventBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__eventbufferCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__eventbufferCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS eventbufferGetMemoryMappingDescriptor_DISPATCH(struct EventBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__eventbufferGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__eventbufferGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS eventbufferControlSerialization_Prologue_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__eventbufferControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__eventbufferControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void eventbufferControlSerialization_Epilogue_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__eventbufferControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__eventbufferControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS eventbufferControl_Prologue_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__eventbufferControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__eventbufferControl_Prologue__(pResource, pCallContext, pParams); } static inline void eventbufferControl_Epilogue_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__eventbufferControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__eventbufferControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool eventbufferCanCopy_DISPATCH(struct EventBuffer *pResource) { - return pResource->__eventbufferCanCopy__(pResource); + return pResource->__nvoc_vtable->__eventbufferCanCopy__(pResource); } static inline NV_STATUS eventbufferIsDuplicate_DISPATCH(struct EventBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__eventbufferIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__eventbufferIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void eventbufferPreDestruct_DISPATCH(struct EventBuffer *pResource) { - pResource->__eventbufferPreDestruct__(pResource); + pResource->__nvoc_vtable->__eventbufferPreDestruct__(pResource); } static inline NV_STATUS eventbufferControl_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__eventbufferControl__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__eventbufferControl__(pResource, pCallContext, pParams); } static inline NV_STATUS eventbufferControlFilter_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__eventbufferControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__eventbufferControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS eventbufferMap_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__eventbufferMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__eventbufferMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS eventbufferUnmap_DISPATCH(struct EventBuffer *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__eventbufferUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__eventbufferUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool eventbufferIsPartialUnmapSupported_DISPATCH(struct EventBuffer *pResource) { - return pResource->__eventbufferIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__eventbufferIsPartialUnmapSupported__(pResource); } static inline NV_STATUS eventbufferMapTo_DISPATCH(struct EventBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__eventbufferMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__eventbufferMapTo__(pResource, pParams); } static inline NV_STATUS eventbufferUnmapFrom_DISPATCH(struct EventBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__eventbufferUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__eventbufferUnmapFrom__(pResource, pParams); } static inline NvU32 eventbufferGetRefCount_DISPATCH(struct EventBuffer *pResource) { - return pResource->__eventbufferGetRefCount__(pResource); + return pResource->__nvoc_vtable->__eventbufferGetRefCount__(pResource); } static inline void eventbufferAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct EventBuffer *pResource, RsResourceRef *pReference) { - pResource->__eventbufferAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__eventbufferAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS eventbuffertBufferCtrlCmdEnableEvent_IMPL(struct EventBuffer *pEventBuffer, NV_EVENT_BUFFER_CTRL_CMD_ENABLE_EVENTS_PARAMS *pEnableParams); diff --git a/src/nvidia/generated/g_event_nvoc.c b/src/nvidia/generated/g_event_nvoc.c index 2d10b52663..19c33d872c 100644 --- a/src/nvidia/generated/g_event_nvoc.c +++ b/src/nvidia/generated/g_event_nvoc.c @@ -66,6 +66,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_NotifShare = /*pExportInfo=*/ &__nvoc_export_info_NotifShare }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_NotifShare = { /*numEntries=*/ 0, @@ -265,110 +269,153 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_Event = /*pExportInfo=*/ &__nvoc_export_info_Event }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_RmResource_eventAccessCallback(struct Event *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_eventShareCallback(struct Event *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_eventGetMemInterMapParams(struct Event *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_eventCheckMemInterUnmap(struct Event *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_eventGetMemoryMappingDescriptor(struct Event *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_eventControlSerialization_Prologue(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_eventControlSerialization_Epilogue(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_eventControl_Prologue(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_eventControl_Epilogue(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_eventCanCopy(struct Event *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_eventIsDuplicate(struct Event *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_eventPreDestruct(struct Event *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_eventControl(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_eventControlFilter(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_eventMap(struct Event *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_eventUnmap(struct Event *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_eventIsPartialUnmapSupported(struct Event *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_eventMapTo(struct Event *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_eventUnmapFrom(struct Event *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_eventGetRefCount(struct Event *pResource); // this +void __nvoc_up_thunk_RsResource_eventAddAdditionalDependants(struct RsClient *pClient, struct Event *pResource, RsResourceRef *pReference); // this + // 21 up-thunk(s) defined to bridge methods in Event to superclasses // eventAccessCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_eventAccessCallback(struct Event *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_eventAccessCallback(struct Event *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // eventShareCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_eventShareCallback(struct Event *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_eventShareCallback(struct Event *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // eventGetMemInterMapParams: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_eventGetMemInterMapParams(struct Event *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_eventGetMemInterMapParams(struct Event *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Event_RmResource.offset), pParams); } // eventCheckMemInterUnmap: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_eventCheckMemInterUnmap(struct Event *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_eventCheckMemInterUnmap(struct Event *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Event_RmResource.offset), bSubdeviceHandleProvided); } // eventGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_eventGetMemoryMappingDescriptor(struct Event *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_eventGetMemoryMappingDescriptor(struct Event *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Event_RmResource.offset), ppMemDesc); } // eventControlSerialization_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_eventControlSerialization_Prologue(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_eventControlSerialization_Prologue(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RmResource.offset), pCallContext, pParams); } // eventControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_eventControlSerialization_Epilogue(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_eventControlSerialization_Epilogue(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RmResource.offset), pCallContext, pParams); } // eventControl_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_eventControl_Prologue(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_eventControl_Prologue(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RmResource.offset), pCallContext, pParams); } // eventControl_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_eventControl_Epilogue(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_eventControl_Epilogue(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RmResource.offset), pCallContext, pParams); } // eventCanCopy: virtual inherited (res) base (rmres) -static NvBool __nvoc_up_thunk_RsResource_eventCanCopy(struct Event *pResource) { +NvBool __nvoc_up_thunk_RsResource_eventCanCopy(struct Event *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset)); } // eventIsDuplicate: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_eventIsDuplicate(struct Event *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_eventIsDuplicate(struct Event *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset), hMemory, pDuplicate); } // eventPreDestruct: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_eventPreDestruct(struct Event *pResource) { +void __nvoc_up_thunk_RsResource_eventPreDestruct(struct Event *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset)); } // eventControl: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_eventControl(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_eventControl(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset), pCallContext, pParams); } // eventControlFilter: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_eventControlFilter(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_eventControlFilter(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset), pCallContext, pParams); } // eventMap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_eventMap(struct Event *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_eventMap(struct Event *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset), pCallContext, pParams, pCpuMapping); } // eventUnmap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_eventUnmap(struct Event *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_eventUnmap(struct Event *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset), pCallContext, pCpuMapping); } // eventIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body -static NvBool __nvoc_up_thunk_RsResource_eventIsPartialUnmapSupported(struct Event *pResource) { +NvBool __nvoc_up_thunk_RsResource_eventIsPartialUnmapSupported(struct Event *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset)); } // eventMapTo: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_eventMapTo(struct Event *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_eventMapTo(struct Event *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset), pParams); } // eventUnmapFrom: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_eventUnmapFrom(struct Event *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_eventUnmapFrom(struct Event *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset), pParams); } // eventGetRefCount: virtual inherited (res) base (rmres) -static NvU32 __nvoc_up_thunk_RsResource_eventGetRefCount(struct Event *pResource) { +NvU32 __nvoc_up_thunk_RsResource_eventGetRefCount(struct Event *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset)); } // eventAddAdditionalDependants: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_eventAddAdditionalDependants(struct RsClient *pClient, struct Event *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_eventAddAdditionalDependants(struct RsClient *pClient, struct Event *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Event_RsResource.offset), pReference); } @@ -412,76 +459,80 @@ NV_STATUS __nvoc_ctor_Event(Event *pThis, struct CALL_CONTEXT * arg_pCallContext // Vtable initialization static void __nvoc_init_funcTable_Event_1(Event *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // eventAccessCallback -- virtual inherited (rmres) base (rmres) - pThis->__eventAccessCallback__ = &__nvoc_up_thunk_RmResource_eventAccessCallback; - - // eventShareCallback -- virtual inherited (rmres) base (rmres) - pThis->__eventShareCallback__ = &__nvoc_up_thunk_RmResource_eventShareCallback; - - // eventGetMemInterMapParams -- virtual inherited (rmres) base (rmres) - pThis->__eventGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_eventGetMemInterMapParams; - - // eventCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) - pThis->__eventCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_eventCheckMemInterUnmap; - - // eventGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) - pThis->__eventGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_eventGetMemoryMappingDescriptor; - - // eventControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__eventControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_eventControlSerialization_Prologue; - - // eventControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__eventControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_eventControlSerialization_Epilogue; - - // eventControl_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__eventControl_Prologue__ = &__nvoc_up_thunk_RmResource_eventControl_Prologue; - - // eventControl_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__eventControl_Epilogue__ = &__nvoc_up_thunk_RmResource_eventControl_Epilogue; - - // eventCanCopy -- virtual inherited (res) base (rmres) - pThis->__eventCanCopy__ = &__nvoc_up_thunk_RsResource_eventCanCopy; - - // eventIsDuplicate -- virtual inherited (res) base (rmres) - pThis->__eventIsDuplicate__ = &__nvoc_up_thunk_RsResource_eventIsDuplicate; - - // eventPreDestruct -- virtual inherited (res) base (rmres) - pThis->__eventPreDestruct__ = &__nvoc_up_thunk_RsResource_eventPreDestruct; - - // eventControl -- virtual inherited (res) base (rmres) - pThis->__eventControl__ = &__nvoc_up_thunk_RsResource_eventControl; - - // eventControlFilter -- virtual inherited (res) base (rmres) - pThis->__eventControlFilter__ = &__nvoc_up_thunk_RsResource_eventControlFilter; - - // eventMap -- virtual inherited (res) base (rmres) - pThis->__eventMap__ = &__nvoc_up_thunk_RsResource_eventMap; - - // eventUnmap -- virtual inherited (res) base (rmres) - pThis->__eventUnmap__ = &__nvoc_up_thunk_RsResource_eventUnmap; - - // eventIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body - pThis->__eventIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_eventIsPartialUnmapSupported; - - // eventMapTo -- virtual inherited (res) base (rmres) - pThis->__eventMapTo__ = &__nvoc_up_thunk_RsResource_eventMapTo; - - // eventUnmapFrom -- virtual inherited (res) base (rmres) - pThis->__eventUnmapFrom__ = &__nvoc_up_thunk_RsResource_eventUnmapFrom; - - // eventGetRefCount -- virtual inherited (res) base (rmres) - pThis->__eventGetRefCount__ = &__nvoc_up_thunk_RsResource_eventGetRefCount; - - // eventAddAdditionalDependants -- virtual inherited (res) base (rmres) - pThis->__eventAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_eventAddAdditionalDependants; -} // End __nvoc_init_funcTable_Event_1 with approximately 21 basic block(s). +} // End __nvoc_init_funcTable_Event_1 // Initialize vtable(s) for 21 virtual method(s). void __nvoc_init_funcTable_Event(Event *pThis) { - // Initialize vtable(s) with 21 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__Event vtable = { + .__eventAccessCallback__ = &__nvoc_up_thunk_RmResource_eventAccessCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__eventShareCallback__ = &__nvoc_up_thunk_RmResource_eventShareCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__eventGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_eventGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__eventCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_eventCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__eventGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_eventGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__eventControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_eventControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__eventControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_eventControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__eventControl_Prologue__ = &__nvoc_up_thunk_RmResource_eventControl_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__eventControl_Epilogue__ = &__nvoc_up_thunk_RmResource_eventControl_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__eventCanCopy__ = &__nvoc_up_thunk_RsResource_eventCanCopy, // virtual inherited (res) base (rmres) + .RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__eventIsDuplicate__ = &__nvoc_up_thunk_RsResource_eventIsDuplicate, // virtual inherited (res) base (rmres) + .RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__eventPreDestruct__ = &__nvoc_up_thunk_RsResource_eventPreDestruct, // virtual inherited (res) base (rmres) + .RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__eventControl__ = &__nvoc_up_thunk_RsResource_eventControl, // virtual inherited (res) base (rmres) + .RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControl__ = &resControl_IMPL, // virtual + .__eventControlFilter__ = &__nvoc_up_thunk_RsResource_eventControlFilter, // virtual inherited (res) base (rmres) + .RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__eventMap__ = &__nvoc_up_thunk_RsResource_eventMap, // virtual inherited (res) base (rmres) + .RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMap__ = &resMap_IMPL, // virtual + .__eventUnmap__ = &__nvoc_up_thunk_RsResource_eventUnmap, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__eventIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_eventIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__eventMapTo__ = &__nvoc_up_thunk_RsResource_eventMapTo, // virtual inherited (res) base (rmres) + .RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__eventUnmapFrom__ = &__nvoc_up_thunk_RsResource_eventUnmapFrom, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__eventGetRefCount__ = &__nvoc_up_thunk_RsResource_eventGetRefCount, // virtual inherited (res) base (rmres) + .RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__eventAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_eventAddAdditionalDependants, // virtual inherited (res) base (rmres) + .RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.RmResource.RsResource; // (res) super^2 + pThis->__nvoc_base_RmResource.__nvoc_vtable = &vtable.RmResource; // (rmres) super + pThis->__nvoc_vtable = &vtable; // (event) this __nvoc_init_funcTable_Event_1(pThis); } @@ -612,6 +663,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_INotifier = /*pExportInfo=*/ &__nvoc_export_info_INotifier }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_INotifier = { /*numEntries=*/ 0, @@ -644,28 +699,23 @@ NV_STATUS __nvoc_ctor_INotifier(INotifier *pThis, struct CALL_CONTEXT * arg_pCal // Vtable initialization static void __nvoc_init_funcTable_INotifier_1(INotifier *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // inotifyGetNotificationListPtr -- pure virtual - pThis->__inotifyGetNotificationListPtr__ = NULL; - - // inotifySetNotificationShare -- pure virtual - pThis->__inotifySetNotificationShare__ = NULL; - - // inotifyGetNotificationShare -- pure virtual - pThis->__inotifyGetNotificationShare__ = NULL; - - // inotifyUnregisterEvent -- pure virtual - pThis->__inotifyUnregisterEvent__ = NULL; - - // inotifyGetOrAllocNotifShare -- pure virtual - pThis->__inotifyGetOrAllocNotifShare__ = NULL; -} // End __nvoc_init_funcTable_INotifier_1 with approximately 5 basic block(s). +} // End __nvoc_init_funcTable_INotifier_1 // Initialize vtable(s) for 5 virtual method(s). void __nvoc_init_funcTable_INotifier(INotifier *pThis) { - // Initialize vtable(s) with 5 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__INotifier vtable = { + .__inotifyGetNotificationListPtr__ = NULL, // pure virtual + .__inotifySetNotificationShare__ = NULL, // pure virtual + .__inotifyGetNotificationShare__ = NULL, // pure virtual + .__inotifyUnregisterEvent__ = NULL, // pure virtual + .__inotifyGetOrAllocNotifShare__ = NULL, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_vtable = &vtable; // (inotify) this __nvoc_init_funcTable_INotifier_1(pThis); } @@ -725,34 +775,43 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_Notifier = /*pExportInfo=*/ &__nvoc_export_info_Notifier }; +// Down-thunk(s) to bridge methods from ancestors (if any) +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // this +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // this +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 5 down-thunk(s) defined to bridge methods in Notifier from superclasses // notifyGetNotificationListPtr: virtual override (inotify) base (inotify) -static PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier) { +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) - __nvoc_rtti_Notifier_INotifier.offset)); } // notifyGetNotificationShare: virtual override (inotify) base (inotify) -static struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier) { +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) - __nvoc_rtti_Notifier_INotifier.offset)); } // notifySetNotificationShare: virtual override (inotify) base (inotify) -static void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) - __nvoc_rtti_Notifier_INotifier.offset), pNotifShare); } // notifyUnregisterEvent: virtual override (inotify) base (inotify) -static NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) - __nvoc_rtti_Notifier_INotifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // notifyGetOrAllocNotifShare: virtual override (inotify) base (inotify) -static NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) - __nvoc_rtti_Notifier_INotifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_Notifier = { /*numEntries=*/ 0, @@ -792,33 +851,29 @@ NV_STATUS __nvoc_ctor_Notifier(Notifier *pThis, struct CALL_CONTEXT * arg_pCallC // Vtable initialization static void __nvoc_init_funcTable_Notifier_1(Notifier *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // notifyGetNotificationListPtr -- virtual override (inotify) base (inotify) - pThis->__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL; - pThis->__nvoc_base_INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr; - - // notifyGetNotificationShare -- virtual override (inotify) base (inotify) - pThis->__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL; - pThis->__nvoc_base_INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare; - - // notifySetNotificationShare -- virtual override (inotify) base (inotify) - pThis->__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL; - pThis->__nvoc_base_INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare; - - // notifyUnregisterEvent -- virtual override (inotify) base (inotify) - pThis->__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL; - pThis->__nvoc_base_INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent; - - // notifyGetOrAllocNotifShare -- virtual override (inotify) base (inotify) - pThis->__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL; - pThis->__nvoc_base_INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_Notifier_1 with approximately 10 basic block(s). +} // End __nvoc_init_funcTable_Notifier_1 // Initialize vtable(s) for 5 virtual method(s). void __nvoc_init_funcTable_Notifier(Notifier *pThis) { - // Initialize vtable(s) with 5 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__Notifier vtable = { + .__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_INotifier.__nvoc_vtable = &vtable.INotifier; // (inotify) super + pThis->__nvoc_vtable = &vtable; // (notify) this __nvoc_init_funcTable_Notifier_1(pThis); } diff --git a/src/nvidia/generated/g_event_nvoc.h b/src/nvidia/generated/g_event_nvoc.h index 6e9df81b81..fe733ec192 100644 --- a/src/nvidia/generated/g_event_nvoc.h +++ b/src/nvidia/generated/g_event_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -201,10 +201,15 @@ void shrnotifDestruct_IMPL(struct NotifShare *pNotifShare); #endif +// Metadata including vtable +struct NVOC_VTABLE__Event; + + struct Event { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__Event *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; @@ -216,7 +221,18 @@ struct Event { struct RmResource *__nvoc_pbase_RmResource; // rmres super struct Event *__nvoc_pbase_Event; // event - // Vtable with 21 per-object function pointers + // Data members + struct NotifShare *pNotifierShare; + NvHandle hNotifierClient; + NvHandle hNotifierResource; + NvHandle hEvent; +}; + + +// Metadata including vtable with 21 function pointers plus superclass metadata +struct NVOC_VTABLE__Event { + const struct NVOC_VTABLE__RmResource RmResource; // (rmres) 21 function pointers + NvBool (*__eventAccessCallback__)(struct Event * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) NvBool (*__eventShareCallback__)(struct Event * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) NV_STATUS (*__eventGetMemInterMapParams__)(struct Event * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) @@ -238,12 +254,6 @@ struct Event { NV_STATUS (*__eventUnmapFrom__)(struct Event * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) NvU32 (*__eventGetRefCount__)(struct Event * /*this*/); // virtual inherited (res) base (rmres) void (*__eventAddAdditionalDependants__)(struct RsClient *, struct Event * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) - - // Data members - struct NotifShare *pNotifierShare; - NvHandle hNotifierClient; - NvHandle hNotifierResource; - NvHandle hEvent; }; #ifndef __NVOC_CLASS_Event_TYPEDEF__ @@ -276,132 +286,132 @@ NV_STATUS __nvoc_objCreate_Event(Event**, Dynamic*, NvU32, struct CALL_CONTEXT * // Wrapper macros -#define eventAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define eventAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define eventAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) eventAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define eventShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ +#define eventShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define eventShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) eventShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define eventGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define eventGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define eventGetMemInterMapParams(pRmResource, pParams) eventGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define eventCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define eventCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define eventCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) eventCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define eventGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define eventGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define eventGetMemoryMappingDescriptor(pRmResource, ppMemDesc) eventGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define eventControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define eventControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define eventControlSerialization_Prologue(pResource, pCallContext, pParams) eventControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define eventControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define eventControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define eventControlSerialization_Epilogue(pResource, pCallContext, pParams) eventControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define eventControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ +#define eventControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define eventControl_Prologue(pResource, pCallContext, pParams) eventControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define eventControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define eventControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define eventControl_Epilogue(pResource, pCallContext, pParams) eventControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define eventCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define eventCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define eventCanCopy(pResource) eventCanCopy_DISPATCH(pResource) -#define eventIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define eventIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define eventIsDuplicate(pResource, hMemory, pDuplicate) eventIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define eventPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define eventPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define eventPreDestruct(pResource) eventPreDestruct_DISPATCH(pResource) -#define eventControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define eventControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControl__ #define eventControl(pResource, pCallContext, pParams) eventControl_DISPATCH(pResource, pCallContext, pParams) -#define eventControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define eventControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define eventControlFilter(pResource, pCallContext, pParams) eventControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define eventMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define eventMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define eventMap(pResource, pCallContext, pParams, pCpuMapping) eventMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define eventUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define eventUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define eventUnmap(pResource, pCallContext, pCpuMapping) eventUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define eventIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define eventIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define eventIsPartialUnmapSupported(pResource) eventIsPartialUnmapSupported_DISPATCH(pResource) -#define eventMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define eventMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define eventMapTo(pResource, pParams) eventMapTo_DISPATCH(pResource, pParams) -#define eventUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define eventUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define eventUnmapFrom(pResource, pParams) eventUnmapFrom_DISPATCH(pResource, pParams) -#define eventGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define eventGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define eventGetRefCount(pResource) eventGetRefCount_DISPATCH(pResource) -#define eventAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define eventAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define eventAddAdditionalDependants(pClient, pResource, pReference) eventAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool eventAccessCallback_DISPATCH(struct Event *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__eventAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__eventAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool eventShareCallback_DISPATCH(struct Event *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__eventShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__eventShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS eventGetMemInterMapParams_DISPATCH(struct Event *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__eventGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__eventGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS eventCheckMemInterUnmap_DISPATCH(struct Event *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__eventCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__eventCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS eventGetMemoryMappingDescriptor_DISPATCH(struct Event *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__eventGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__eventGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS eventControlSerialization_Prologue_DISPATCH(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__eventControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__eventControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void eventControlSerialization_Epilogue_DISPATCH(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__eventControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__eventControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS eventControl_Prologue_DISPATCH(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__eventControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__eventControl_Prologue__(pResource, pCallContext, pParams); } static inline void eventControl_Epilogue_DISPATCH(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__eventControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__eventControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool eventCanCopy_DISPATCH(struct Event *pResource) { - return pResource->__eventCanCopy__(pResource); + return pResource->__nvoc_vtable->__eventCanCopy__(pResource); } static inline NV_STATUS eventIsDuplicate_DISPATCH(struct Event *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__eventIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__eventIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void eventPreDestruct_DISPATCH(struct Event *pResource) { - pResource->__eventPreDestruct__(pResource); + pResource->__nvoc_vtable->__eventPreDestruct__(pResource); } static inline NV_STATUS eventControl_DISPATCH(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__eventControl__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__eventControl__(pResource, pCallContext, pParams); } static inline NV_STATUS eventControlFilter_DISPATCH(struct Event *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__eventControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__eventControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS eventMap_DISPATCH(struct Event *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__eventMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__eventMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS eventUnmap_DISPATCH(struct Event *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__eventUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__eventUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool eventIsPartialUnmapSupported_DISPATCH(struct Event *pResource) { - return pResource->__eventIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__eventIsPartialUnmapSupported__(pResource); } static inline NV_STATUS eventMapTo_DISPATCH(struct Event *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__eventMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__eventMapTo__(pResource, pParams); } static inline NV_STATUS eventUnmapFrom_DISPATCH(struct Event *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__eventUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__eventUnmapFrom__(pResource, pParams); } static inline NvU32 eventGetRefCount_DISPATCH(struct Event *pResource) { - return pResource->__eventGetRefCount__(pResource); + return pResource->__nvoc_vtable->__eventGetRefCount__(pResource); } static inline void eventAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct Event *pResource, RsResourceRef *pReference) { - pResource->__eventAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__eventAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS eventConstruct_IMPL(struct Event *arg_pEvent, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); @@ -441,15 +451,23 @@ NV_STATUS eventGetByHandle_IMPL(struct RsClient *pClient, NvHandle hEvent, NvU32 #endif +// Metadata including vtable +struct NVOC_VTABLE__INotifier; + + struct INotifier { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__INotifier *__nvoc_vtable; // Ancestor object pointers for `staticCast` feature struct INotifier *__nvoc_pbase_INotifier; // inotify +}; - // Vtable with 5 per-object function pointers + +// Metadata including vtable with 5 function pointers +struct NVOC_VTABLE__INotifier { PEVENTNOTIFICATION * (*__inotifyGetNotificationListPtr__)(struct INotifier * /*this*/); // pure virtual void (*__inotifySetNotificationShare__)(struct INotifier * /*this*/, struct NotifShare *); // pure virtual struct NotifShare * (*__inotifyGetNotificationShare__)(struct INotifier * /*this*/); // pure virtual @@ -487,36 +505,36 @@ NV_STATUS __nvoc_objCreate_INotifier(INotifier**, Dynamic*, NvU32, struct CALL_C // Wrapper macros -#define inotifyGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__inotifyGetNotificationListPtr__ +#define inotifyGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_vtable->__inotifyGetNotificationListPtr__ #define inotifyGetNotificationListPtr(pNotifier) inotifyGetNotificationListPtr_DISPATCH(pNotifier) -#define inotifySetNotificationShare_FNPTR(pNotifier) pNotifier->__inotifySetNotificationShare__ +#define inotifySetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_vtable->__inotifySetNotificationShare__ #define inotifySetNotificationShare(pNotifier, pNotifShare) inotifySetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define inotifyGetNotificationShare_FNPTR(pNotifier) pNotifier->__inotifyGetNotificationShare__ +#define inotifyGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_vtable->__inotifyGetNotificationShare__ #define inotifyGetNotificationShare(pNotifier) inotifyGetNotificationShare_DISPATCH(pNotifier) -#define inotifyUnregisterEvent_FNPTR(pNotifier) pNotifier->__inotifyUnregisterEvent__ +#define inotifyUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_vtable->__inotifyUnregisterEvent__ #define inotifyUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) inotifyUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define inotifyGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__inotifyGetOrAllocNotifShare__ +#define inotifyGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_vtable->__inotifyGetOrAllocNotifShare__ #define inotifyGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) inotifyGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline PEVENTNOTIFICATION * inotifyGetNotificationListPtr_DISPATCH(struct INotifier *pNotifier) { - return pNotifier->__inotifyGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__inotifyGetNotificationListPtr__(pNotifier); } static inline void inotifySetNotificationShare_DISPATCH(struct INotifier *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__inotifySetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__inotifySetNotificationShare__(pNotifier, pNotifShare); } static inline struct NotifShare * inotifyGetNotificationShare_DISPATCH(struct INotifier *pNotifier) { - return pNotifier->__inotifyGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__inotifyGetNotificationShare__(pNotifier); } static inline NV_STATUS inotifyUnregisterEvent_DISPATCH(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__inotifyUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__inotifyUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS inotifyGetOrAllocNotifShare_DISPATCH(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__inotifyGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__inotifyGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS inotifyConstruct_IMPL(struct INotifier *arg_pNotifier, struct CALL_CONTEXT *arg_pCallContext); @@ -553,10 +571,15 @@ static inline PEVENTNOTIFICATION inotifyGetNotificationList(struct INotifier *pN #endif +// Metadata including vtable +struct NVOC_VTABLE__Notifier; + + struct Notifier { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__Notifier *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct INotifier __nvoc_base_INotifier; @@ -565,15 +588,20 @@ struct Notifier { struct INotifier *__nvoc_pbase_INotifier; // inotify super struct Notifier *__nvoc_pbase_Notifier; // notify - // Vtable with 5 per-object function pointers + // Data members + struct NotifShare *pNotifierShare; +}; + + +// Metadata including vtable with 5 function pointers plus superclass metadata +struct NVOC_VTABLE__Notifier { + const struct NVOC_VTABLE__INotifier INotifier; // (inotify) 5 function pointers + PEVENTNOTIFICATION * (*__notifyGetNotificationListPtr__)(struct Notifier * /*this*/); // virtual override (inotify) base (inotify) struct NotifShare * (*__notifyGetNotificationShare__)(struct Notifier * /*this*/); // virtual override (inotify) base (inotify) void (*__notifySetNotificationShare__)(struct Notifier * /*this*/, struct NotifShare *); // virtual override (inotify) base (inotify) NV_STATUS (*__notifyUnregisterEvent__)(struct Notifier * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual override (inotify) base (inotify) NV_STATUS (*__notifyGetOrAllocNotifShare__)(struct Notifier * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual override (inotify) base (inotify) - - // Data members - struct NotifShare *pNotifierShare; }; #ifndef __NVOC_CLASS_Notifier_TYPEDEF__ @@ -606,36 +634,36 @@ NV_STATUS __nvoc_objCreate_Notifier(Notifier**, Dynamic*, NvU32, struct CALL_CON // Wrapper macros -#define notifyGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__notifyGetNotificationListPtr__ +#define notifyGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_vtable->__notifyGetNotificationListPtr__ #define notifyGetNotificationListPtr(pNotifier) notifyGetNotificationListPtr_DISPATCH(pNotifier) -#define notifyGetNotificationShare_FNPTR(pNotifier) pNotifier->__notifyGetNotificationShare__ +#define notifyGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_vtable->__notifyGetNotificationShare__ #define notifyGetNotificationShare(pNotifier) notifyGetNotificationShare_DISPATCH(pNotifier) -#define notifySetNotificationShare_FNPTR(pNotifier) pNotifier->__notifySetNotificationShare__ +#define notifySetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_vtable->__notifySetNotificationShare__ #define notifySetNotificationShare(pNotifier, pNotifShare) notifySetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define notifyUnregisterEvent_FNPTR(pNotifier) pNotifier->__notifyUnregisterEvent__ +#define notifyUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_vtable->__notifyUnregisterEvent__ #define notifyUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) notifyUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define notifyGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__notifyGetOrAllocNotifShare__ +#define notifyGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define notifyGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) notifyGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline PEVENTNOTIFICATION * notifyGetNotificationListPtr_DISPATCH(struct Notifier *pNotifier) { - return pNotifier->__notifyGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__notifyGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * notifyGetNotificationShare_DISPATCH(struct Notifier *pNotifier) { - return pNotifier->__notifyGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__notifyGetNotificationShare__(pNotifier); } static inline void notifySetNotificationShare_DISPATCH(struct Notifier *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__notifySetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__notifySetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS notifyUnregisterEvent_DISPATCH(struct Notifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__notifyUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__notifyUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS notifyGetOrAllocNotifShare_DISPATCH(struct Notifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__notifyGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__notifyGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } PEVENTNOTIFICATION *notifyGetNotificationListPtr_IMPL(struct Notifier *pNotifier); diff --git a/src/nvidia/generated/g_fabric_nvoc.c b/src/nvidia/generated/g_fabric_nvoc.c index bfb9e93fac..c4e5d97515 100644 --- a/src/nvidia/generated/g_fabric_nvoc.c +++ b/src/nvidia/generated/g_fabric_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_Fabric = /*pExportInfo=*/ &__nvoc_export_info_Fabric }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_Fabric = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_fabric_nvoc.h b/src/nvidia/generated/g_fabric_nvoc.h index cb1491a857..c5e7eb3396 100644 --- a/src/nvidia/generated/g_fabric_nvoc.h +++ b/src/nvidia/generated/g_fabric_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_fabric_vaspace_nvoc.c b/src/nvidia/generated/g_fabric_vaspace_nvoc.c index f5cb19b311..f16a494ee9 100644 --- a/src/nvidia/generated/g_fabric_vaspace_nvoc.c +++ b/src/nvidia/generated/g_fabric_vaspace_nvoc.c @@ -66,153 +66,186 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_FABRIC_VASPACE = /*pExportInfo=*/ &__nvoc_export_info_FABRIC_VASPACE }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceConstruct_(struct OBJVASPACE *pFabricVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags); // this +NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceAlloc(struct OBJVASPACE *pFabricVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSize, VAS_ALLOC_FLAGS flags, NvU64 *pAddr); // this +NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceFree(struct OBJVASPACE *pFabricVAS, NvU64 vAddr); // this +NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceMap(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags); // this +void __nvoc_down_thunk_FABRIC_VASPACE_vaspaceUnmap(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi); // this +NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceApplyDefaultAlignment(struct OBJVASPACE *pFabricVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask); // this +NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceGetVasInfo(struct OBJVASPACE *pFabricVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams); // this +NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspacePinRootPageDir(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu); // this +void __nvoc_down_thunk_FABRIC_VASPACE_vaspaceUnpinRootPageDir(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu); // this +void __nvoc_down_thunk_FABRIC_VASPACE_vaspaceInvalidateTlb(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type); // this + // 10 down-thunk(s) defined to bridge methods in FABRIC_VASPACE from superclasses // fabricvaspaceConstruct_: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceConstruct_(struct OBJVASPACE *pFabricVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceConstruct_(struct OBJVASPACE *pFabricVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags) { return fabricvaspaceConstruct_((struct FABRIC_VASPACE *)(((unsigned char *) pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags); } // fabricvaspaceAlloc: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceAlloc(struct OBJVASPACE *pFabricVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSize, VAS_ALLOC_FLAGS flags, NvU64 *pAddr) { +NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceAlloc(struct OBJVASPACE *pFabricVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSize, VAS_ALLOC_FLAGS flags, NvU64 *pAddr) { return fabricvaspaceAlloc((struct FABRIC_VASPACE *)(((unsigned char *) pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), size, align, rangeLo, rangeHi, pageSize, flags, pAddr); } // fabricvaspaceFree: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceFree(struct OBJVASPACE *pFabricVAS, NvU64 vAddr) { +NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceFree(struct OBJVASPACE *pFabricVAS, NvU64 vAddr) { return fabricvaspaceFree((struct FABRIC_VASPACE *)(((unsigned char *) pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), vAddr); } // fabricvaspaceMap: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceMap(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { +NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceMap(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { return fabricvaspaceMap((struct FABRIC_VASPACE *)(((unsigned char *) pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu, vaLo, vaHi, pTarget, flags); } // fabricvaspaceUnmap: virtual override (vaspace) base (vaspace) -static void __nvoc_down_thunk_FABRIC_VASPACE_vaspaceUnmap(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { +void __nvoc_down_thunk_FABRIC_VASPACE_vaspaceUnmap(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { fabricvaspaceUnmap((struct FABRIC_VASPACE *)(((unsigned char *) pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu, vaLo, vaHi); } // fabricvaspaceApplyDefaultAlignment: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceApplyDefaultAlignment(struct OBJVASPACE *pFabricVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask) { +NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceApplyDefaultAlignment(struct OBJVASPACE *pFabricVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask) { return fabricvaspaceApplyDefaultAlignment((struct FABRIC_VASPACE *)(((unsigned char *) pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pAllocInfo, pAlign, pSize, pPageSizeLockMask); } // fabricvaspaceGetVasInfo: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceGetVasInfo(struct OBJVASPACE *pFabricVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams) { +NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspaceGetVasInfo(struct OBJVASPACE *pFabricVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams) { return fabricvaspaceGetVasInfo((struct FABRIC_VASPACE *)(((unsigned char *) pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pParams); } // fabricvaspacePinRootPageDir: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspacePinRootPageDir(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu) { +NV_STATUS __nvoc_down_thunk_FABRIC_VASPACE_vaspacePinRootPageDir(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu) { return fabricvaspacePinRootPageDir((struct FABRIC_VASPACE *)(((unsigned char *) pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu); } // fabricvaspaceUnpinRootPageDir: virtual override (vaspace) base (vaspace) -static void __nvoc_down_thunk_FABRIC_VASPACE_vaspaceUnpinRootPageDir(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu) { +void __nvoc_down_thunk_FABRIC_VASPACE_vaspaceUnpinRootPageDir(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu) { fabricvaspaceUnpinRootPageDir((struct FABRIC_VASPACE *)(((unsigned char *) pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu); } // fabricvaspaceInvalidateTlb: virtual override (vaspace) base (vaspace) -static void __nvoc_down_thunk_FABRIC_VASPACE_vaspaceInvalidateTlb(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type) { +void __nvoc_down_thunk_FABRIC_VASPACE_vaspaceInvalidateTlb(struct OBJVASPACE *pFabricVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type) { fabricvaspaceInvalidateTlb((struct FABRIC_VASPACE *)(((unsigned char *) pFabricVAS) - __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu, type); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceIncAllocRefCnt(struct FABRIC_VASPACE *pVAS, NvU64 vAddr); // this +NvU64 __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetVaStart(struct FABRIC_VASPACE *pVAS); // this +NvU64 __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetVaLimit(struct FABRIC_VASPACE *pVAS); // this +NvU32 __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetFlags(struct FABRIC_VASPACE *pVAS); // this +NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceReserveMempool(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags); // this +OBJEHEAP * __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetHeap(struct FABRIC_VASPACE *pVAS); // this +NvU64 __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetMapPageSize(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, EMEMBLOCK *pMemBlock); // this +NvU64 __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetBigPageSize(struct FABRIC_VASPACE *pVAS); // this +NvBool __nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsMirrored(struct FABRIC_VASPACE *pVAS); // this +NvBool __nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsFaultCapable(struct FABRIC_VASPACE *pVAS); // this +NvBool __nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsExternallyOwned(struct FABRIC_VASPACE *pVAS); // this +NvBool __nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsAtsEnabled(struct FABRIC_VASPACE *pVAS); // this +NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPasid(struct FABRIC_VASPACE *pVAS, NvU32 *pPasid); // this +PMEMORY_DESCRIPTOR __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPageDirBase(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu); // this +PMEMORY_DESCRIPTOR __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetKernelPageDirBase(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu); // this +NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPageTableInfo(struct FABRIC_VASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPteInfo(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr); // this +NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceSetPteInfo(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceFreeV2(struct FABRIC_VASPACE *pVAS, NvU64 vAddr, NvU64 *pSize); // this + // 19 up-thunk(s) defined to bridge methods in FABRIC_VASPACE to superclasses // fabricvaspaceIncAllocRefCnt: inline virtual inherited (vaspace) base (vaspace) body -static NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceIncAllocRefCnt(struct FABRIC_VASPACE *pVAS, NvU64 vAddr) { +NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceIncAllocRefCnt(struct FABRIC_VASPACE *pVAS, NvU64 vAddr) { return vaspaceIncAllocRefCnt((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), vAddr); } // fabricvaspaceGetVaStart: virtual inherited (vaspace) base (vaspace) -static NvU64 __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetVaStart(struct FABRIC_VASPACE *pVAS) { +NvU64 __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetVaStart(struct FABRIC_VASPACE *pVAS) { return vaspaceGetVaStart((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); } // fabricvaspaceGetVaLimit: virtual inherited (vaspace) base (vaspace) -static NvU64 __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetVaLimit(struct FABRIC_VASPACE *pVAS) { +NvU64 __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetVaLimit(struct FABRIC_VASPACE *pVAS) { return vaspaceGetVaLimit((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); } // fabricvaspaceGetFlags: inline virtual inherited (vaspace) base (vaspace) body -static NvU32 __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetFlags(struct FABRIC_VASPACE *pVAS) { +NvU32 __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetFlags(struct FABRIC_VASPACE *pVAS) { return vaspaceGetFlags((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); } // fabricvaspaceReserveMempool: inline virtual inherited (vaspace) base (vaspace) body -static NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceReserveMempool(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { +NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceReserveMempool(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { return vaspaceReserveMempool((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu, pDevice, size, pageSizeLockMask, flags); } // fabricvaspaceGetHeap: inline virtual inherited (vaspace) base (vaspace) body -static OBJEHEAP * __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetHeap(struct FABRIC_VASPACE *pVAS) { +OBJEHEAP * __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetHeap(struct FABRIC_VASPACE *pVAS) { return vaspaceGetHeap((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); } // fabricvaspaceGetMapPageSize: inline virtual inherited (vaspace) base (vaspace) body -static NvU64 __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetMapPageSize(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, EMEMBLOCK *pMemBlock) { +NvU64 __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetMapPageSize(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, EMEMBLOCK *pMemBlock) { return vaspaceGetMapPageSize((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu, pMemBlock); } // fabricvaspaceGetBigPageSize: inline virtual inherited (vaspace) base (vaspace) body -static NvU64 __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetBigPageSize(struct FABRIC_VASPACE *pVAS) { +NvU64 __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetBigPageSize(struct FABRIC_VASPACE *pVAS) { return vaspaceGetBigPageSize((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); } // fabricvaspaceIsMirrored: inline virtual inherited (vaspace) base (vaspace) body -static NvBool __nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsMirrored(struct FABRIC_VASPACE *pVAS) { +NvBool __nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsMirrored(struct FABRIC_VASPACE *pVAS) { return vaspaceIsMirrored((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); } // fabricvaspaceIsFaultCapable: inline virtual inherited (vaspace) base (vaspace) body -static NvBool __nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsFaultCapable(struct FABRIC_VASPACE *pVAS) { +NvBool __nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsFaultCapable(struct FABRIC_VASPACE *pVAS) { return vaspaceIsFaultCapable((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); } // fabricvaspaceIsExternallyOwned: inline virtual inherited (vaspace) base (vaspace) body -static NvBool __nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsExternallyOwned(struct FABRIC_VASPACE *pVAS) { +NvBool __nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsExternallyOwned(struct FABRIC_VASPACE *pVAS) { return vaspaceIsExternallyOwned((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); } // fabricvaspaceIsAtsEnabled: inline virtual inherited (vaspace) base (vaspace) body -static NvBool __nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsAtsEnabled(struct FABRIC_VASPACE *pVAS) { +NvBool __nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsAtsEnabled(struct FABRIC_VASPACE *pVAS) { return vaspaceIsAtsEnabled((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset)); } // fabricvaspaceGetPasid: inline virtual inherited (vaspace) base (vaspace) body -static NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPasid(struct FABRIC_VASPACE *pVAS, NvU32 *pPasid) { +NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPasid(struct FABRIC_VASPACE *pVAS, NvU32 *pPasid) { return vaspaceGetPasid((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pPasid); } // fabricvaspaceGetPageDirBase: inline virtual inherited (vaspace) base (vaspace) body -static PMEMORY_DESCRIPTOR __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPageDirBase(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu) { +PMEMORY_DESCRIPTOR __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPageDirBase(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu) { return vaspaceGetPageDirBase((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu); } // fabricvaspaceGetKernelPageDirBase: inline virtual inherited (vaspace) base (vaspace) body -static PMEMORY_DESCRIPTOR __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetKernelPageDirBase(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu) { +PMEMORY_DESCRIPTOR __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetKernelPageDirBase(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu) { return vaspaceGetKernelPageDirBase((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu); } // fabricvaspaceGetPageTableInfo: inline virtual inherited (vaspace) base (vaspace) body -static NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPageTableInfo(struct FABRIC_VASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPageTableInfo(struct FABRIC_VASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { return vaspaceGetPageTableInfo((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pParams); } // fabricvaspaceGetPteInfo: inline virtual inherited (vaspace) base (vaspace) body -static NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPteInfo(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { +NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPteInfo(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { return vaspaceGetPteInfo((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu, pParams, pPhysAddr); } // fabricvaspaceSetPteInfo: inline virtual inherited (vaspace) base (vaspace) body -static NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceSetPteInfo(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceSetPteInfo(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { return vaspaceSetPteInfo((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), pGpu, pParams); } // fabricvaspaceFreeV2: inline virtual inherited (vaspace) base (vaspace) body -static NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceFreeV2(struct FABRIC_VASPACE *pVAS, NvU64 vAddr, NvU64 *pSize) { +NV_STATUS __nvoc_up_thunk_OBJVASPACE_fabricvaspaceFreeV2(struct FABRIC_VASPACE *pVAS, NvU64 vAddr, NvU64 *pSize) { return vaspaceFreeV2((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_FABRIC_VASPACE_OBJVASPACE.offset), vAddr, pSize); } @@ -251,110 +284,77 @@ NV_STATUS __nvoc_ctor_FABRIC_VASPACE(FABRIC_VASPACE *pThis) { // Vtable initialization static void __nvoc_init_funcTable_FABRIC_VASPACE_1(FABRIC_VASPACE *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // fabricvaspaceConstruct_ -- virtual override (vaspace) base (vaspace) - pThis->__fabricvaspaceConstruct___ = &fabricvaspaceConstruct__IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceConstruct___ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceConstruct_; - - // fabricvaspaceAlloc -- virtual override (vaspace) base (vaspace) - pThis->__fabricvaspaceAlloc__ = &fabricvaspaceAlloc_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceAlloc__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceAlloc; - - // fabricvaspaceFree -- virtual override (vaspace) base (vaspace) - pThis->__fabricvaspaceFree__ = &fabricvaspaceFree_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceFree__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceFree; - - // fabricvaspaceMap -- virtual override (vaspace) base (vaspace) - pThis->__fabricvaspaceMap__ = &fabricvaspaceMap_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceMap__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceMap; - - // fabricvaspaceUnmap -- virtual override (vaspace) base (vaspace) - pThis->__fabricvaspaceUnmap__ = &fabricvaspaceUnmap_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceUnmap__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceUnmap; - - // fabricvaspaceApplyDefaultAlignment -- virtual override (vaspace) base (vaspace) - pThis->__fabricvaspaceApplyDefaultAlignment__ = &fabricvaspaceApplyDefaultAlignment_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceApplyDefaultAlignment__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceApplyDefaultAlignment; - - // fabricvaspaceGetVasInfo -- virtual override (vaspace) base (vaspace) - pThis->__fabricvaspaceGetVasInfo__ = &fabricvaspaceGetVasInfo_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetVasInfo__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceGetVasInfo; - - // fabricvaspacePinRootPageDir -- virtual override (vaspace) base (vaspace) - pThis->__fabricvaspacePinRootPageDir__ = &fabricvaspacePinRootPageDir_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspacePinRootPageDir__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspacePinRootPageDir; - - // fabricvaspaceUnpinRootPageDir -- virtual override (vaspace) base (vaspace) - pThis->__fabricvaspaceUnpinRootPageDir__ = &fabricvaspaceUnpinRootPageDir_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceUnpinRootPageDir__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceUnpinRootPageDir; - - // fabricvaspaceInvalidateTlb -- virtual override (vaspace) base (vaspace) - pThis->__fabricvaspaceInvalidateTlb__ = &fabricvaspaceInvalidateTlb_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceInvalidateTlb__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceInvalidateTlb; - - // fabricvaspaceIncAllocRefCnt -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__fabricvaspaceIncAllocRefCnt__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceIncAllocRefCnt; - - // fabricvaspaceGetVaStart -- virtual inherited (vaspace) base (vaspace) - pThis->__fabricvaspaceGetVaStart__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetVaStart; - - // fabricvaspaceGetVaLimit -- virtual inherited (vaspace) base (vaspace) - pThis->__fabricvaspaceGetVaLimit__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetVaLimit; - - // fabricvaspaceGetFlags -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__fabricvaspaceGetFlags__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetFlags; - - // fabricvaspaceReserveMempool -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__fabricvaspaceReserveMempool__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceReserveMempool; - - // fabricvaspaceGetHeap -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__fabricvaspaceGetHeap__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetHeap; - - // fabricvaspaceGetMapPageSize -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__fabricvaspaceGetMapPageSize__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetMapPageSize; - - // fabricvaspaceGetBigPageSize -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__fabricvaspaceGetBigPageSize__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetBigPageSize; - - // fabricvaspaceIsMirrored -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__fabricvaspaceIsMirrored__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsMirrored; - - // fabricvaspaceIsFaultCapable -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__fabricvaspaceIsFaultCapable__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsFaultCapable; - - // fabricvaspaceIsExternallyOwned -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__fabricvaspaceIsExternallyOwned__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsExternallyOwned; - - // fabricvaspaceIsAtsEnabled -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__fabricvaspaceIsAtsEnabled__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsAtsEnabled; - - // fabricvaspaceGetPasid -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__fabricvaspaceGetPasid__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPasid; - - // fabricvaspaceGetPageDirBase -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__fabricvaspaceGetPageDirBase__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPageDirBase; - - // fabricvaspaceGetKernelPageDirBase -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__fabricvaspaceGetKernelPageDirBase__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetKernelPageDirBase; - - // fabricvaspaceGetPageTableInfo -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__fabricvaspaceGetPageTableInfo__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPageTableInfo; - - // fabricvaspaceGetPteInfo -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__fabricvaspaceGetPteInfo__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPteInfo; - - // fabricvaspaceSetPteInfo -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__fabricvaspaceSetPteInfo__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceSetPteInfo; - - // fabricvaspaceFreeV2 -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__fabricvaspaceFreeV2__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceFreeV2; -} // End __nvoc_init_funcTable_FABRIC_VASPACE_1 with approximately 39 basic block(s). +} // End __nvoc_init_funcTable_FABRIC_VASPACE_1 // Initialize vtable(s) for 29 virtual method(s). void __nvoc_init_funcTable_FABRIC_VASPACE(FABRIC_VASPACE *pThis) { - // Initialize vtable(s) with 29 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__FABRIC_VASPACE vtable = { + .__fabricvaspaceConstruct___ = &fabricvaspaceConstruct__IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceConstruct___ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceConstruct_, // pure virtual + .__fabricvaspaceAlloc__ = &fabricvaspaceAlloc_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceAlloc__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceAlloc, // pure virtual + .__fabricvaspaceFree__ = &fabricvaspaceFree_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceFree__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceFree, // pure virtual + .__fabricvaspaceMap__ = &fabricvaspaceMap_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceMap__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceMap, // inline virtual body + .__fabricvaspaceUnmap__ = &fabricvaspaceUnmap_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceUnmap__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceUnmap, // inline virtual body + .__fabricvaspaceApplyDefaultAlignment__ = &fabricvaspaceApplyDefaultAlignment_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceApplyDefaultAlignment__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceApplyDefaultAlignment, // pure virtual + .__fabricvaspaceGetVasInfo__ = &fabricvaspaceGetVasInfo_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceGetVasInfo__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceGetVasInfo, // pure virtual + .__fabricvaspacePinRootPageDir__ = &fabricvaspacePinRootPageDir_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspacePinRootPageDir__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspacePinRootPageDir, // inline virtual body + .__fabricvaspaceUnpinRootPageDir__ = &fabricvaspaceUnpinRootPageDir_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceUnpinRootPageDir__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceUnpinRootPageDir, // inline virtual body + .__fabricvaspaceInvalidateTlb__ = &fabricvaspaceInvalidateTlb_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceInvalidateTlb__ = &__nvoc_down_thunk_FABRIC_VASPACE_vaspaceInvalidateTlb, // virtual + .__fabricvaspaceIncAllocRefCnt__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceIncAllocRefCnt, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceIncAllocRefCnt__ = &vaspaceIncAllocRefCnt_14ee5e, // inline virtual body + .__fabricvaspaceGetVaStart__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetVaStart, // virtual inherited (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceGetVaStart__ = &vaspaceGetVaStart_IMPL, // virtual + .__fabricvaspaceGetVaLimit__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetVaLimit, // virtual inherited (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceGetVaLimit__ = &vaspaceGetVaLimit_IMPL, // virtual + .__fabricvaspaceGetFlags__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetFlags, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceGetFlags__ = &vaspaceGetFlags_edd98b, // inline virtual body + .__fabricvaspaceReserveMempool__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceReserveMempool, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceReserveMempool__ = &vaspaceReserveMempool_ac1694, // inline virtual body + .__fabricvaspaceGetHeap__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetHeap, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceGetHeap__ = &vaspaceGetHeap_9451a7, // inline virtual body + .__fabricvaspaceGetMapPageSize__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetMapPageSize, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceGetMapPageSize__ = &vaspaceGetMapPageSize_c26fae, // inline virtual body + .__fabricvaspaceGetBigPageSize__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetBigPageSize, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceGetBigPageSize__ = &vaspaceGetBigPageSize_c26fae, // inline virtual body + .__fabricvaspaceIsMirrored__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsMirrored, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceIsMirrored__ = &vaspaceIsMirrored_2fa1ff, // inline virtual body + .__fabricvaspaceIsFaultCapable__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsFaultCapable, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceIsFaultCapable__ = &vaspaceIsFaultCapable_2fa1ff, // inline virtual body + .__fabricvaspaceIsExternallyOwned__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsExternallyOwned, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceIsExternallyOwned__ = &vaspaceIsExternallyOwned_2fa1ff, // inline virtual body + .__fabricvaspaceIsAtsEnabled__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceIsAtsEnabled, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceIsAtsEnabled__ = &vaspaceIsAtsEnabled_2fa1ff, // inline virtual body + .__fabricvaspaceGetPasid__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPasid, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceGetPasid__ = &vaspaceGetPasid_14ee5e, // inline virtual body + .__fabricvaspaceGetPageDirBase__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPageDirBase, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceGetPageDirBase__ = &vaspaceGetPageDirBase_9451a7, // inline virtual body + .__fabricvaspaceGetKernelPageDirBase__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetKernelPageDirBase, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceGetKernelPageDirBase__ = &vaspaceGetKernelPageDirBase_9451a7, // inline virtual body + .__fabricvaspaceGetPageTableInfo__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPageTableInfo, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceGetPageTableInfo__ = &vaspaceGetPageTableInfo_14ee5e, // inline virtual body + .__fabricvaspaceGetPteInfo__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceGetPteInfo, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceGetPteInfo__ = &vaspaceGetPteInfo_14ee5e, // inline virtual body + .__fabricvaspaceSetPteInfo__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceSetPteInfo, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceSetPteInfo__ = &vaspaceSetPteInfo_14ee5e, // inline virtual body + .__fabricvaspaceFreeV2__ = &__nvoc_up_thunk_OBJVASPACE_fabricvaspaceFreeV2, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceFreeV2__ = &vaspaceFreeV2_14ee5e, // inline virtual body + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJVASPACE.__nvoc_vtable = &vtable.OBJVASPACE; // (vaspace) super + pThis->__nvoc_vtable = &vtable; // (fabricvaspace) this __nvoc_init_funcTable_FABRIC_VASPACE_1(pThis); } diff --git a/src/nvidia/generated/g_fabric_vaspace_nvoc.h b/src/nvidia/generated/g_fabric_vaspace_nvoc.h index 6a80ab003e..46de819157 100644 --- a/src/nvidia/generated/g_fabric_vaspace_nvoc.h +++ b/src/nvidia/generated/g_fabric_vaspace_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -85,10 +85,15 @@ typedef struct #endif +// Metadata including vtable +struct NVOC_VTABLE__FABRIC_VASPACE; + + struct FABRIC_VASPACE { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__FABRIC_VASPACE *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJVASPACE __nvoc_base_OBJVASPACE; @@ -98,7 +103,25 @@ struct FABRIC_VASPACE { struct OBJVASPACE *__nvoc_pbase_OBJVASPACE; // vaspace super struct FABRIC_VASPACE *__nvoc_pbase_FABRIC_VASPACE; // fabricvaspace - // Vtable with 29 per-object function pointers + // Data members + struct OBJVASPACE *pGVAS; + NvU32 flags; + NvHandle hClient; + NvHandle hDevice; + NODE *pFabricVaToGpaMap; + NvU64 ucFabricBase; + NvU64 ucFabricLimit; + NvU64 ucFabricInUseSize; + NvU64 ucFabricFreeSize; + NvU32 gfid; + NvBool bRpcAlloc; +}; + + +// Metadata including vtable with 29 function pointers plus superclass metadata +struct NVOC_VTABLE__FABRIC_VASPACE { + const struct NVOC_VTABLE__OBJVASPACE OBJVASPACE; // (vaspace) 29 function pointers + NV_STATUS (*__fabricvaspaceConstruct___)(struct FABRIC_VASPACE * /*this*/, NvU32, NvU32, NvU64, NvU64, NvU64, NvU64, NvU32); // virtual override (vaspace) base (vaspace) NV_STATUS (*__fabricvaspaceAlloc__)(struct FABRIC_VASPACE * /*this*/, NvU64, NvU64, NvU64, NvU64, NvU64, VAS_ALLOC_FLAGS, NvU64 *); // virtual override (vaspace) base (vaspace) NV_STATUS (*__fabricvaspaceFree__)(struct FABRIC_VASPACE * /*this*/, NvU64); // virtual override (vaspace) base (vaspace) @@ -128,19 +151,6 @@ struct FABRIC_VASPACE { NV_STATUS (*__fabricvaspaceGetPteInfo__)(struct FABRIC_VASPACE * /*this*/, struct OBJGPU *, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *, RmPhysAddr *); // inline virtual inherited (vaspace) base (vaspace) body NV_STATUS (*__fabricvaspaceSetPteInfo__)(struct FABRIC_VASPACE * /*this*/, struct OBJGPU *, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *); // inline virtual inherited (vaspace) base (vaspace) body NV_STATUS (*__fabricvaspaceFreeV2__)(struct FABRIC_VASPACE * /*this*/, NvU64, NvU64 *); // inline virtual inherited (vaspace) base (vaspace) body - - // Data members - struct OBJVASPACE *pGVAS; - NvU32 flags; - NvHandle hClient; - NvHandle hDevice; - NODE *pFabricVaToGpaMap; - NvU64 ucFabricBase; - NvU64 ucFabricLimit; - NvU64 ucFabricInUseSize; - NvU64 ucFabricFreeSize; - NvU32 gfid; - NvBool bRpcAlloc; }; #ifndef __NVOC_CLASS_FABRIC_VASPACE_TYPEDEF__ @@ -173,180 +183,180 @@ NV_STATUS __nvoc_objCreate_FABRIC_VASPACE(FABRIC_VASPACE**, Dynamic*, NvU32); // Wrapper macros -#define fabricvaspaceConstruct__FNPTR(pFabricVAS) pFabricVAS->__fabricvaspaceConstruct___ +#define fabricvaspaceConstruct__FNPTR(pFabricVAS) pFabricVAS->__nvoc_vtable->__fabricvaspaceConstruct___ #define fabricvaspaceConstruct_(pFabricVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags) fabricvaspaceConstruct__DISPATCH(pFabricVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags) -#define fabricvaspaceAlloc_FNPTR(pFabricVAS) pFabricVAS->__fabricvaspaceAlloc__ +#define fabricvaspaceAlloc_FNPTR(pFabricVAS) pFabricVAS->__nvoc_vtable->__fabricvaspaceAlloc__ #define fabricvaspaceAlloc(pFabricVAS, size, align, rangeLo, rangeHi, pageSize, flags, pAddr) fabricvaspaceAlloc_DISPATCH(pFabricVAS, size, align, rangeLo, rangeHi, pageSize, flags, pAddr) -#define fabricvaspaceFree_FNPTR(pFabricVAS) pFabricVAS->__fabricvaspaceFree__ +#define fabricvaspaceFree_FNPTR(pFabricVAS) pFabricVAS->__nvoc_vtable->__fabricvaspaceFree__ #define fabricvaspaceFree(pFabricVAS, vAddr) fabricvaspaceFree_DISPATCH(pFabricVAS, vAddr) -#define fabricvaspaceMap_FNPTR(pFabricVAS) pFabricVAS->__fabricvaspaceMap__ +#define fabricvaspaceMap_FNPTR(pFabricVAS) pFabricVAS->__nvoc_vtable->__fabricvaspaceMap__ #define fabricvaspaceMap(pFabricVAS, pGpu, vaLo, vaHi, pTarget, flags) fabricvaspaceMap_DISPATCH(pFabricVAS, pGpu, vaLo, vaHi, pTarget, flags) -#define fabricvaspaceUnmap_FNPTR(pFabricVAS) pFabricVAS->__fabricvaspaceUnmap__ +#define fabricvaspaceUnmap_FNPTR(pFabricVAS) pFabricVAS->__nvoc_vtable->__fabricvaspaceUnmap__ #define fabricvaspaceUnmap(pFabricVAS, pGpu, vaLo, vaHi) fabricvaspaceUnmap_DISPATCH(pFabricVAS, pGpu, vaLo, vaHi) -#define fabricvaspaceApplyDefaultAlignment_FNPTR(pFabricVAS) pFabricVAS->__fabricvaspaceApplyDefaultAlignment__ +#define fabricvaspaceApplyDefaultAlignment_FNPTR(pFabricVAS) pFabricVAS->__nvoc_vtable->__fabricvaspaceApplyDefaultAlignment__ #define fabricvaspaceApplyDefaultAlignment(pFabricVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask) fabricvaspaceApplyDefaultAlignment_DISPATCH(pFabricVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask) -#define fabricvaspaceGetVasInfo_FNPTR(pFabricVAS) pFabricVAS->__fabricvaspaceGetVasInfo__ +#define fabricvaspaceGetVasInfo_FNPTR(pFabricVAS) pFabricVAS->__nvoc_vtable->__fabricvaspaceGetVasInfo__ #define fabricvaspaceGetVasInfo(pFabricVAS, pParams) fabricvaspaceGetVasInfo_DISPATCH(pFabricVAS, pParams) -#define fabricvaspacePinRootPageDir_FNPTR(pFabricVAS) pFabricVAS->__fabricvaspacePinRootPageDir__ +#define fabricvaspacePinRootPageDir_FNPTR(pFabricVAS) pFabricVAS->__nvoc_vtable->__fabricvaspacePinRootPageDir__ #define fabricvaspacePinRootPageDir(pFabricVAS, pGpu) fabricvaspacePinRootPageDir_DISPATCH(pFabricVAS, pGpu) -#define fabricvaspaceUnpinRootPageDir_FNPTR(pFabricVAS) pFabricVAS->__fabricvaspaceUnpinRootPageDir__ +#define fabricvaspaceUnpinRootPageDir_FNPTR(pFabricVAS) pFabricVAS->__nvoc_vtable->__fabricvaspaceUnpinRootPageDir__ #define fabricvaspaceUnpinRootPageDir(pFabricVAS, pGpu) fabricvaspaceUnpinRootPageDir_DISPATCH(pFabricVAS, pGpu) -#define fabricvaspaceInvalidateTlb_FNPTR(pFabricVAS) pFabricVAS->__fabricvaspaceInvalidateTlb__ +#define fabricvaspaceInvalidateTlb_FNPTR(pFabricVAS) pFabricVAS->__nvoc_vtable->__fabricvaspaceInvalidateTlb__ #define fabricvaspaceInvalidateTlb(pFabricVAS, pGpu, type) fabricvaspaceInvalidateTlb_DISPATCH(pFabricVAS, pGpu, type) -#define fabricvaspaceIncAllocRefCnt_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceIncAllocRefCnt__ +#define fabricvaspaceIncAllocRefCnt_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceIncAllocRefCnt__ #define fabricvaspaceIncAllocRefCnt(pVAS, vAddr) fabricvaspaceIncAllocRefCnt_DISPATCH(pVAS, vAddr) -#define fabricvaspaceGetVaStart_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetVaStart__ +#define fabricvaspaceGetVaStart_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceGetVaStart__ #define fabricvaspaceGetVaStart(pVAS) fabricvaspaceGetVaStart_DISPATCH(pVAS) -#define fabricvaspaceGetVaLimit_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetVaLimit__ +#define fabricvaspaceGetVaLimit_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceGetVaLimit__ #define fabricvaspaceGetVaLimit(pVAS) fabricvaspaceGetVaLimit_DISPATCH(pVAS) -#define fabricvaspaceGetFlags_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetFlags__ +#define fabricvaspaceGetFlags_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceGetFlags__ #define fabricvaspaceGetFlags(pVAS) fabricvaspaceGetFlags_DISPATCH(pVAS) -#define fabricvaspaceReserveMempool_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceReserveMempool__ +#define fabricvaspaceReserveMempool_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceReserveMempool__ #define fabricvaspaceReserveMempool(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags) fabricvaspaceReserveMempool_DISPATCH(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags) -#define fabricvaspaceGetHeap_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetHeap__ +#define fabricvaspaceGetHeap_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceGetHeap__ #define fabricvaspaceGetHeap(pVAS) fabricvaspaceGetHeap_DISPATCH(pVAS) -#define fabricvaspaceGetMapPageSize_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetMapPageSize__ +#define fabricvaspaceGetMapPageSize_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceGetMapPageSize__ #define fabricvaspaceGetMapPageSize(pVAS, pGpu, pMemBlock) fabricvaspaceGetMapPageSize_DISPATCH(pVAS, pGpu, pMemBlock) -#define fabricvaspaceGetBigPageSize_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetBigPageSize__ +#define fabricvaspaceGetBigPageSize_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceGetBigPageSize__ #define fabricvaspaceGetBigPageSize(pVAS) fabricvaspaceGetBigPageSize_DISPATCH(pVAS) -#define fabricvaspaceIsMirrored_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceIsMirrored__ +#define fabricvaspaceIsMirrored_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceIsMirrored__ #define fabricvaspaceIsMirrored(pVAS) fabricvaspaceIsMirrored_DISPATCH(pVAS) -#define fabricvaspaceIsFaultCapable_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceIsFaultCapable__ +#define fabricvaspaceIsFaultCapable_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceIsFaultCapable__ #define fabricvaspaceIsFaultCapable(pVAS) fabricvaspaceIsFaultCapable_DISPATCH(pVAS) -#define fabricvaspaceIsExternallyOwned_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceIsExternallyOwned__ +#define fabricvaspaceIsExternallyOwned_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceIsExternallyOwned__ #define fabricvaspaceIsExternallyOwned(pVAS) fabricvaspaceIsExternallyOwned_DISPATCH(pVAS) -#define fabricvaspaceIsAtsEnabled_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceIsAtsEnabled__ +#define fabricvaspaceIsAtsEnabled_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceIsAtsEnabled__ #define fabricvaspaceIsAtsEnabled(pVAS) fabricvaspaceIsAtsEnabled_DISPATCH(pVAS) -#define fabricvaspaceGetPasid_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetPasid__ +#define fabricvaspaceGetPasid_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceGetPasid__ #define fabricvaspaceGetPasid(pVAS, pPasid) fabricvaspaceGetPasid_DISPATCH(pVAS, pPasid) -#define fabricvaspaceGetPageDirBase_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetPageDirBase__ +#define fabricvaspaceGetPageDirBase_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceGetPageDirBase__ #define fabricvaspaceGetPageDirBase(pVAS, pGpu) fabricvaspaceGetPageDirBase_DISPATCH(pVAS, pGpu) -#define fabricvaspaceGetKernelPageDirBase_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetKernelPageDirBase__ +#define fabricvaspaceGetKernelPageDirBase_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceGetKernelPageDirBase__ #define fabricvaspaceGetKernelPageDirBase(pVAS, pGpu) fabricvaspaceGetKernelPageDirBase_DISPATCH(pVAS, pGpu) -#define fabricvaspaceGetPageTableInfo_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetPageTableInfo__ +#define fabricvaspaceGetPageTableInfo_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceGetPageTableInfo__ #define fabricvaspaceGetPageTableInfo(pVAS, pParams) fabricvaspaceGetPageTableInfo_DISPATCH(pVAS, pParams) -#define fabricvaspaceGetPteInfo_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetPteInfo__ +#define fabricvaspaceGetPteInfo_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceGetPteInfo__ #define fabricvaspaceGetPteInfo(pVAS, pGpu, pParams, pPhysAddr) fabricvaspaceGetPteInfo_DISPATCH(pVAS, pGpu, pParams, pPhysAddr) -#define fabricvaspaceSetPteInfo_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceSetPteInfo__ +#define fabricvaspaceSetPteInfo_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceSetPteInfo__ #define fabricvaspaceSetPteInfo(pVAS, pGpu, pParams) fabricvaspaceSetPteInfo_DISPATCH(pVAS, pGpu, pParams) -#define fabricvaspaceFreeV2_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceFreeV2__ +#define fabricvaspaceFreeV2_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceFreeV2__ #define fabricvaspaceFreeV2(pVAS, vAddr, pSize) fabricvaspaceFreeV2_DISPATCH(pVAS, vAddr, pSize) // Dispatch functions static inline NV_STATUS fabricvaspaceConstruct__DISPATCH(struct FABRIC_VASPACE *pFabricVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags) { - return pFabricVAS->__fabricvaspaceConstruct___(pFabricVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags); + return pFabricVAS->__nvoc_vtable->__fabricvaspaceConstruct___(pFabricVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags); } static inline NV_STATUS fabricvaspaceAlloc_DISPATCH(struct FABRIC_VASPACE *pFabricVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSize, VAS_ALLOC_FLAGS flags, NvU64 *pAddr) { - return pFabricVAS->__fabricvaspaceAlloc__(pFabricVAS, size, align, rangeLo, rangeHi, pageSize, flags, pAddr); + return pFabricVAS->__nvoc_vtable->__fabricvaspaceAlloc__(pFabricVAS, size, align, rangeLo, rangeHi, pageSize, flags, pAddr); } static inline NV_STATUS fabricvaspaceFree_DISPATCH(struct FABRIC_VASPACE *pFabricVAS, NvU64 vAddr) { - return pFabricVAS->__fabricvaspaceFree__(pFabricVAS, vAddr); + return pFabricVAS->__nvoc_vtable->__fabricvaspaceFree__(pFabricVAS, vAddr); } static inline NV_STATUS fabricvaspaceMap_DISPATCH(struct FABRIC_VASPACE *pFabricVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { - return pFabricVAS->__fabricvaspaceMap__(pFabricVAS, pGpu, vaLo, vaHi, pTarget, flags); + return pFabricVAS->__nvoc_vtable->__fabricvaspaceMap__(pFabricVAS, pGpu, vaLo, vaHi, pTarget, flags); } static inline void fabricvaspaceUnmap_DISPATCH(struct FABRIC_VASPACE *pFabricVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { - pFabricVAS->__fabricvaspaceUnmap__(pFabricVAS, pGpu, vaLo, vaHi); + pFabricVAS->__nvoc_vtable->__fabricvaspaceUnmap__(pFabricVAS, pGpu, vaLo, vaHi); } static inline NV_STATUS fabricvaspaceApplyDefaultAlignment_DISPATCH(struct FABRIC_VASPACE *pFabricVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask) { - return pFabricVAS->__fabricvaspaceApplyDefaultAlignment__(pFabricVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask); + return pFabricVAS->__nvoc_vtable->__fabricvaspaceApplyDefaultAlignment__(pFabricVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask); } static inline NV_STATUS fabricvaspaceGetVasInfo_DISPATCH(struct FABRIC_VASPACE *pFabricVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams) { - return pFabricVAS->__fabricvaspaceGetVasInfo__(pFabricVAS, pParams); + return pFabricVAS->__nvoc_vtable->__fabricvaspaceGetVasInfo__(pFabricVAS, pParams); } static inline NV_STATUS fabricvaspacePinRootPageDir_DISPATCH(struct FABRIC_VASPACE *pFabricVAS, struct OBJGPU *pGpu) { - return pFabricVAS->__fabricvaspacePinRootPageDir__(pFabricVAS, pGpu); + return pFabricVAS->__nvoc_vtable->__fabricvaspacePinRootPageDir__(pFabricVAS, pGpu); } static inline void fabricvaspaceUnpinRootPageDir_DISPATCH(struct FABRIC_VASPACE *pFabricVAS, struct OBJGPU *pGpu) { - pFabricVAS->__fabricvaspaceUnpinRootPageDir__(pFabricVAS, pGpu); + pFabricVAS->__nvoc_vtable->__fabricvaspaceUnpinRootPageDir__(pFabricVAS, pGpu); } static inline void fabricvaspaceInvalidateTlb_DISPATCH(struct FABRIC_VASPACE *pFabricVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type) { - pFabricVAS->__fabricvaspaceInvalidateTlb__(pFabricVAS, pGpu, type); + pFabricVAS->__nvoc_vtable->__fabricvaspaceInvalidateTlb__(pFabricVAS, pGpu, type); } static inline NV_STATUS fabricvaspaceIncAllocRefCnt_DISPATCH(struct FABRIC_VASPACE *pVAS, NvU64 vAddr) { - return pVAS->__fabricvaspaceIncAllocRefCnt__(pVAS, vAddr); + return pVAS->__nvoc_vtable->__fabricvaspaceIncAllocRefCnt__(pVAS, vAddr); } static inline NvU64 fabricvaspaceGetVaStart_DISPATCH(struct FABRIC_VASPACE *pVAS) { - return pVAS->__fabricvaspaceGetVaStart__(pVAS); + return pVAS->__nvoc_vtable->__fabricvaspaceGetVaStart__(pVAS); } static inline NvU64 fabricvaspaceGetVaLimit_DISPATCH(struct FABRIC_VASPACE *pVAS) { - return pVAS->__fabricvaspaceGetVaLimit__(pVAS); + return pVAS->__nvoc_vtable->__fabricvaspaceGetVaLimit__(pVAS); } static inline NvU32 fabricvaspaceGetFlags_DISPATCH(struct FABRIC_VASPACE *pVAS) { - return pVAS->__fabricvaspaceGetFlags__(pVAS); + return pVAS->__nvoc_vtable->__fabricvaspaceGetFlags__(pVAS); } static inline NV_STATUS fabricvaspaceReserveMempool_DISPATCH(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { - return pVAS->__fabricvaspaceReserveMempool__(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags); + return pVAS->__nvoc_vtable->__fabricvaspaceReserveMempool__(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags); } static inline OBJEHEAP * fabricvaspaceGetHeap_DISPATCH(struct FABRIC_VASPACE *pVAS) { - return pVAS->__fabricvaspaceGetHeap__(pVAS); + return pVAS->__nvoc_vtable->__fabricvaspaceGetHeap__(pVAS); } static inline NvU64 fabricvaspaceGetMapPageSize_DISPATCH(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, EMEMBLOCK *pMemBlock) { - return pVAS->__fabricvaspaceGetMapPageSize__(pVAS, pGpu, pMemBlock); + return pVAS->__nvoc_vtable->__fabricvaspaceGetMapPageSize__(pVAS, pGpu, pMemBlock); } static inline NvU64 fabricvaspaceGetBigPageSize_DISPATCH(struct FABRIC_VASPACE *pVAS) { - return pVAS->__fabricvaspaceGetBigPageSize__(pVAS); + return pVAS->__nvoc_vtable->__fabricvaspaceGetBigPageSize__(pVAS); } static inline NvBool fabricvaspaceIsMirrored_DISPATCH(struct FABRIC_VASPACE *pVAS) { - return pVAS->__fabricvaspaceIsMirrored__(pVAS); + return pVAS->__nvoc_vtable->__fabricvaspaceIsMirrored__(pVAS); } static inline NvBool fabricvaspaceIsFaultCapable_DISPATCH(struct FABRIC_VASPACE *pVAS) { - return pVAS->__fabricvaspaceIsFaultCapable__(pVAS); + return pVAS->__nvoc_vtable->__fabricvaspaceIsFaultCapable__(pVAS); } static inline NvBool fabricvaspaceIsExternallyOwned_DISPATCH(struct FABRIC_VASPACE *pVAS) { - return pVAS->__fabricvaspaceIsExternallyOwned__(pVAS); + return pVAS->__nvoc_vtable->__fabricvaspaceIsExternallyOwned__(pVAS); } static inline NvBool fabricvaspaceIsAtsEnabled_DISPATCH(struct FABRIC_VASPACE *pVAS) { - return pVAS->__fabricvaspaceIsAtsEnabled__(pVAS); + return pVAS->__nvoc_vtable->__fabricvaspaceIsAtsEnabled__(pVAS); } static inline NV_STATUS fabricvaspaceGetPasid_DISPATCH(struct FABRIC_VASPACE *pVAS, NvU32 *pPasid) { - return pVAS->__fabricvaspaceGetPasid__(pVAS, pPasid); + return pVAS->__nvoc_vtable->__fabricvaspaceGetPasid__(pVAS, pPasid); } static inline PMEMORY_DESCRIPTOR fabricvaspaceGetPageDirBase_DISPATCH(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu) { - return pVAS->__fabricvaspaceGetPageDirBase__(pVAS, pGpu); + return pVAS->__nvoc_vtable->__fabricvaspaceGetPageDirBase__(pVAS, pGpu); } static inline PMEMORY_DESCRIPTOR fabricvaspaceGetKernelPageDirBase_DISPATCH(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu) { - return pVAS->__fabricvaspaceGetKernelPageDirBase__(pVAS, pGpu); + return pVAS->__nvoc_vtable->__fabricvaspaceGetKernelPageDirBase__(pVAS, pGpu); } static inline NV_STATUS fabricvaspaceGetPageTableInfo_DISPATCH(struct FABRIC_VASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { - return pVAS->__fabricvaspaceGetPageTableInfo__(pVAS, pParams); + return pVAS->__nvoc_vtable->__fabricvaspaceGetPageTableInfo__(pVAS, pParams); } static inline NV_STATUS fabricvaspaceGetPteInfo_DISPATCH(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { - return pVAS->__fabricvaspaceGetPteInfo__(pVAS, pGpu, pParams, pPhysAddr); + return pVAS->__nvoc_vtable->__fabricvaspaceGetPteInfo__(pVAS, pGpu, pParams, pPhysAddr); } static inline NV_STATUS fabricvaspaceSetPteInfo_DISPATCH(struct FABRIC_VASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { - return pVAS->__fabricvaspaceSetPteInfo__(pVAS, pGpu, pParams); + return pVAS->__nvoc_vtable->__fabricvaspaceSetPteInfo__(pVAS, pGpu, pParams); } static inline NV_STATUS fabricvaspaceFreeV2_DISPATCH(struct FABRIC_VASPACE *pVAS, NvU64 vAddr, NvU64 *pSize) { - return pVAS->__fabricvaspaceFreeV2__(pVAS, vAddr, pSize); + return pVAS->__nvoc_vtable->__fabricvaspaceFreeV2__(pVAS, vAddr, pSize); } NV_STATUS fabricvaspaceConstruct__IMPL(struct FABRIC_VASPACE *pFabricVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags); diff --git a/src/nvidia/generated/g_fbsr_nvoc.c b/src/nvidia/generated/g_fbsr_nvoc.c index beac370954..c914029020 100644 --- a/src/nvidia/generated/g_fbsr_nvoc.c +++ b/src/nvidia/generated/g_fbsr_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJFBSR = /*pExportInfo=*/ &__nvoc_export_info_OBJFBSR }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJFBSR = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_fbsr_nvoc.h b/src/nvidia/generated/g_fbsr_nvoc.h index 1ccc4473cb..a0ebbf1d43 100644 --- a/src/nvidia/generated/g_fbsr_nvoc.h +++ b/src/nvidia/generated/g_fbsr_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_fecs_event_list_nvoc.h b/src/nvidia/generated/g_fecs_event_list_nvoc.h index 382e67f8f9..f419897339 100644 --- a/src/nvidia/generated/g_fecs_event_list_nvoc.h +++ b/src/nvidia/generated/g_fecs_event_list_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_fla_mem_nvoc.c b/src/nvidia/generated/g_fla_mem_nvoc.c index 17e7e08fc7..e9f2d75e52 100644 --- a/src/nvidia/generated/g_fla_mem_nvoc.c +++ b/src/nvidia/generated/g_fla_mem_nvoc.c @@ -93,138 +93,207 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_FlaMemory = /*pExportInfo=*/ &__nvoc_export_info_FlaMemory }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super +NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super +NvBool __nvoc_down_thunk_FlaMemory_resCanCopy(struct RsResource *pFlaMemory); // this + // 1 down-thunk(s) defined to bridge methods in FlaMemory from superclasses // flamemCanCopy: virtual override (res) base (mem) -static NvBool __nvoc_down_thunk_FlaMemory_resCanCopy(struct RsResource *pFlaMemory) { +NvBool __nvoc_down_thunk_FlaMemory_resCanCopy(struct RsResource *pFlaMemory) { return flamemCanCopy((struct FlaMemory *)(((unsigned char *) pFlaMemory) - __nvoc_rtti_FlaMemory_RsResource.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_Memory_flamemIsDuplicate(struct FlaMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate); // this +NV_STATUS __nvoc_up_thunk_Memory_flamemGetMapAddrSpace(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_Memory_flamemControl(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_flamemMap(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_flamemUnmap(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_flamemGetMemInterMapParams(struct FlaMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_flamemCheckMemInterUnmap(struct FlaMemory *pMemory, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_Memory_flamemGetMemoryMappingDescriptor(struct FlaMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_Memory_flamemCheckCopyPermissions(struct FlaMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // this +NV_STATUS __nvoc_up_thunk_Memory_flamemIsReady(struct FlaMemory *pMemory, NvBool bCopyConstructorContext); // this +NvBool __nvoc_up_thunk_Memory_flamemIsGpuMapAllowed(struct FlaMemory *pMemory, struct OBJGPU *pGpu); // this +NvBool __nvoc_up_thunk_Memory_flamemIsExportAllowed(struct FlaMemory *pMemory); // this +NvBool __nvoc_up_thunk_RmResource_flamemAccessCallback(struct FlaMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_flamemShareCallback(struct FlaMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_flamemControlSerialization_Prologue(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_flamemControlSerialization_Epilogue(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_flamemControl_Prologue(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_flamemControl_Epilogue(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RsResource_flamemPreDestruct(struct FlaMemory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_flamemControlFilter(struct FlaMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_flamemIsPartialUnmapSupported(struct FlaMemory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_flamemMapTo(struct FlaMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_flamemUnmapFrom(struct FlaMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_flamemGetRefCount(struct FlaMemory *pResource); // this +void __nvoc_up_thunk_RsResource_flamemAddAdditionalDependants(struct RsClient *pClient, struct FlaMemory *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in FlaMemory to superclasses // flamemIsDuplicate: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_flamemIsDuplicate(struct FlaMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_Memory_flamemIsDuplicate(struct FlaMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), hMemory, pDuplicate); } // flamemGetMapAddrSpace: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_flamemGetMapAddrSpace(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_Memory_flamemGetMapAddrSpace(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); } // flamemControl: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_flamemControl(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_flamemControl(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), pCallContext, pParams); } // flamemMap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_flamemMap(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_flamemMap(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), pCallContext, pParams, pCpuMapping); } // flamemUnmap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_flamemUnmap(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_flamemUnmap(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), pCallContext, pCpuMapping); } // flamemGetMemInterMapParams: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_flamemGetMemInterMapParams(struct FlaMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_flamemGetMemInterMapParams(struct FlaMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), pParams); } // flamemCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_flamemCheckMemInterUnmap(struct FlaMemory *pMemory, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_Memory_flamemCheckMemInterUnmap(struct FlaMemory *pMemory, NvBool bSubdeviceHandleProvided) { return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), bSubdeviceHandleProvided); } // flamemGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_flamemGetMemoryMappingDescriptor(struct FlaMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_Memory_flamemGetMemoryMappingDescriptor(struct FlaMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), ppMemDesc); } // flamemCheckCopyPermissions: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_flamemCheckCopyPermissions(struct FlaMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { +NV_STATUS __nvoc_up_thunk_Memory_flamemCheckCopyPermissions(struct FlaMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), pDstGpu, pDstDevice); } // flamemIsReady: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_flamemIsReady(struct FlaMemory *pMemory, NvBool bCopyConstructorContext) { +NV_STATUS __nvoc_up_thunk_Memory_flamemIsReady(struct FlaMemory *pMemory, NvBool bCopyConstructorContext) { return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), bCopyConstructorContext); } // flamemIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_flamemIsGpuMapAllowed(struct FlaMemory *pMemory, struct OBJGPU *pGpu) { +NvBool __nvoc_up_thunk_Memory_flamemIsGpuMapAllowed(struct FlaMemory *pMemory, struct OBJGPU *pGpu) { return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset), pGpu); } // flamemIsExportAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_flamemIsExportAllowed(struct FlaMemory *pMemory) { +NvBool __nvoc_up_thunk_Memory_flamemIsExportAllowed(struct FlaMemory *pMemory) { return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_FlaMemory_Memory.offset)); } // flamemAccessCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_flamemAccessCallback(struct FlaMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_flamemAccessCallback(struct FlaMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // flamemShareCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_flamemShareCallback(struct FlaMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_flamemShareCallback(struct FlaMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // flamemControlSerialization_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_flamemControlSerialization_Prologue(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_flamemControlSerialization_Prologue(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RmResource.offset), pCallContext, pParams); } // flamemControlSerialization_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_flamemControlSerialization_Epilogue(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_flamemControlSerialization_Epilogue(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RmResource.offset), pCallContext, pParams); } // flamemControl_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_flamemControl_Prologue(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_flamemControl_Prologue(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RmResource.offset), pCallContext, pParams); } // flamemControl_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_flamemControl_Epilogue(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_flamemControl_Epilogue(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RmResource.offset), pCallContext, pParams); } // flamemPreDestruct: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_flamemPreDestruct(struct FlaMemory *pResource) { +void __nvoc_up_thunk_RsResource_flamemPreDestruct(struct FlaMemory *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RsResource.offset)); } // flamemControlFilter: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_flamemControlFilter(struct FlaMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_flamemControlFilter(struct FlaMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RsResource.offset), pCallContext, pParams); } // flamemIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body -static NvBool __nvoc_up_thunk_RsResource_flamemIsPartialUnmapSupported(struct FlaMemory *pResource) { +NvBool __nvoc_up_thunk_RsResource_flamemIsPartialUnmapSupported(struct FlaMemory *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RsResource.offset)); } // flamemMapTo: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_flamemMapTo(struct FlaMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_flamemMapTo(struct FlaMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RsResource.offset), pParams); } // flamemUnmapFrom: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_flamemUnmapFrom(struct FlaMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_flamemUnmapFrom(struct FlaMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RsResource.offset), pParams); } // flamemGetRefCount: virtual inherited (res) base (mem) -static NvU32 __nvoc_up_thunk_RsResource_flamemGetRefCount(struct FlaMemory *pResource) { +NvU32 __nvoc_up_thunk_RsResource_flamemGetRefCount(struct FlaMemory *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RsResource.offset)); } // flamemAddAdditionalDependants: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_flamemAddAdditionalDependants(struct RsClient *pClient, struct FlaMemory *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_flamemAddAdditionalDependants(struct RsClient *pClient, struct FlaMemory *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FlaMemory_RsResource.offset), pReference); } @@ -268,95 +337,113 @@ NV_STATUS __nvoc_ctor_FlaMemory(FlaMemory *pThis, CALL_CONTEXT * arg_pCallContex // Vtable initialization static void __nvoc_init_funcTable_FlaMemory_1(FlaMemory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // flamemCanCopy -- virtual override (res) base (mem) - pThis->__flamemCanCopy__ = &flamemCanCopy_IMPL; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_FlaMemory_resCanCopy; - - // flamemCopyConstruct -- virtual override (mem) base (mem) - pThis->__flamemCopyConstruct__ = &flamemCopyConstruct_IMPL; - - // flamemIsDuplicate -- virtual inherited (mem) base (mem) - pThis->__flamemIsDuplicate__ = &__nvoc_up_thunk_Memory_flamemIsDuplicate; - - // flamemGetMapAddrSpace -- virtual inherited (mem) base (mem) - pThis->__flamemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_flamemGetMapAddrSpace; - - // flamemControl -- virtual inherited (mem) base (mem) - pThis->__flamemControl__ = &__nvoc_up_thunk_Memory_flamemControl; - - // flamemMap -- virtual inherited (mem) base (mem) - pThis->__flamemMap__ = &__nvoc_up_thunk_Memory_flamemMap; - - // flamemUnmap -- virtual inherited (mem) base (mem) - pThis->__flamemUnmap__ = &__nvoc_up_thunk_Memory_flamemUnmap; - - // flamemGetMemInterMapParams -- virtual inherited (mem) base (mem) - pThis->__flamemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_flamemGetMemInterMapParams; - - // flamemCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body - pThis->__flamemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_flamemCheckMemInterUnmap; - - // flamemGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) - pThis->__flamemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_flamemGetMemoryMappingDescriptor; - - // flamemCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body - pThis->__flamemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_flamemCheckCopyPermissions; - - // flamemIsReady -- virtual inherited (mem) base (mem) - pThis->__flamemIsReady__ = &__nvoc_up_thunk_Memory_flamemIsReady; - - // flamemIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__flamemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_flamemIsGpuMapAllowed; - - // flamemIsExportAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__flamemIsExportAllowed__ = &__nvoc_up_thunk_Memory_flamemIsExportAllowed; - - // flamemAccessCallback -- virtual inherited (rmres) base (mem) - pThis->__flamemAccessCallback__ = &__nvoc_up_thunk_RmResource_flamemAccessCallback; - - // flamemShareCallback -- virtual inherited (rmres) base (mem) - pThis->__flamemShareCallback__ = &__nvoc_up_thunk_RmResource_flamemShareCallback; - - // flamemControlSerialization_Prologue -- virtual inherited (rmres) base (mem) - pThis->__flamemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_flamemControlSerialization_Prologue; - - // flamemControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__flamemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_flamemControlSerialization_Epilogue; - - // flamemControl_Prologue -- virtual inherited (rmres) base (mem) - pThis->__flamemControl_Prologue__ = &__nvoc_up_thunk_RmResource_flamemControl_Prologue; - - // flamemControl_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__flamemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_flamemControl_Epilogue; - - // flamemPreDestruct -- virtual inherited (res) base (mem) - pThis->__flamemPreDestruct__ = &__nvoc_up_thunk_RsResource_flamemPreDestruct; - - // flamemControlFilter -- virtual inherited (res) base (mem) - pThis->__flamemControlFilter__ = &__nvoc_up_thunk_RsResource_flamemControlFilter; - - // flamemIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body - pThis->__flamemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_flamemIsPartialUnmapSupported; - - // flamemMapTo -- virtual inherited (res) base (mem) - pThis->__flamemMapTo__ = &__nvoc_up_thunk_RsResource_flamemMapTo; - - // flamemUnmapFrom -- virtual inherited (res) base (mem) - pThis->__flamemUnmapFrom__ = &__nvoc_up_thunk_RsResource_flamemUnmapFrom; - - // flamemGetRefCount -- virtual inherited (res) base (mem) - pThis->__flamemGetRefCount__ = &__nvoc_up_thunk_RsResource_flamemGetRefCount; - - // flamemAddAdditionalDependants -- virtual inherited (res) base (mem) - pThis->__flamemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_flamemAddAdditionalDependants; -} // End __nvoc_init_funcTable_FlaMemory_1 with approximately 28 basic block(s). +} // End __nvoc_init_funcTable_FlaMemory_1 // Initialize vtable(s) for 27 virtual method(s). void __nvoc_init_funcTable_FlaMemory(FlaMemory *pThis) { - // Initialize vtable(s) with 27 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__FlaMemory vtable = { + .__flamemCanCopy__ = &flamemCanCopy_IMPL, // virtual override (res) base (mem) + .Memory.__memCanCopy__ = &__nvoc_up_thunk_RsResource_memCanCopy, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_FlaMemory_resCanCopy, // virtual + .__flamemCopyConstruct__ = &flamemCopyConstruct_IMPL, // virtual override (mem) base (mem) + .__flamemIsDuplicate__ = &__nvoc_up_thunk_Memory_flamemIsDuplicate, // virtual inherited (mem) base (mem) + .Memory.__memIsDuplicate__ = &memIsDuplicate_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resIsDuplicate__ = &__nvoc_down_thunk_Memory_resIsDuplicate, // virtual + .__flamemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_flamemGetMapAddrSpace, // virtual inherited (mem) base (mem) + .Memory.__memGetMapAddrSpace__ = &memGetMapAddrSpace_IMPL, // virtual + .__flamemControl__ = &__nvoc_up_thunk_Memory_flamemControl, // virtual inherited (mem) base (mem) + .Memory.__memControl__ = &memControl_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_Memory_resControl, // virtual + .__flamemMap__ = &__nvoc_up_thunk_Memory_flamemMap, // virtual inherited (mem) base (mem) + .Memory.__memMap__ = &memMap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_Memory_resMap, // virtual + .__flamemUnmap__ = &__nvoc_up_thunk_Memory_flamemUnmap, // virtual inherited (mem) base (mem) + .Memory.__memUnmap__ = &memUnmap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_Memory_resUnmap, // virtual + .__flamemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_flamemGetMemInterMapParams, // virtual inherited (mem) base (mem) + .Memory.__memGetMemInterMapParams__ = &memGetMemInterMapParams_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_Memory_rmresGetMemInterMapParams, // virtual + .__flamemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_flamemCheckMemInterUnmap, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckMemInterUnmap__ = &memCheckMemInterUnmap_ac1694, // inline virtual override (rmres) base (rmres) body + .Memory.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_Memory_rmresCheckMemInterUnmap, // virtual + .__flamemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_flamemGetMemoryMappingDescriptor, // virtual inherited (mem) base (mem) + .Memory.__memGetMemoryMappingDescriptor__ = &memGetMemoryMappingDescriptor_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor, // virtual + .__flamemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_flamemCheckCopyPermissions, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckCopyPermissions__ = &memCheckCopyPermissions_ac1694, // inline virtual body + .__flamemIsReady__ = &__nvoc_up_thunk_Memory_flamemIsReady, // virtual inherited (mem) base (mem) + .Memory.__memIsReady__ = &memIsReady_IMPL, // virtual + .__flamemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_flamemIsGpuMapAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsGpuMapAllowed__ = &memIsGpuMapAllowed_e661f0, // inline virtual body + .__flamemIsExportAllowed__ = &__nvoc_up_thunk_Memory_flamemIsExportAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsExportAllowed__ = &memIsExportAllowed_e661f0, // inline virtual body + .__flamemAccessCallback__ = &__nvoc_up_thunk_RmResource_flamemAccessCallback, // virtual inherited (rmres) base (mem) + .Memory.__memAccessCallback__ = &__nvoc_up_thunk_RmResource_memAccessCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__flamemShareCallback__ = &__nvoc_up_thunk_RmResource_flamemShareCallback, // virtual inherited (rmres) base (mem) + .Memory.__memShareCallback__ = &__nvoc_up_thunk_RmResource_memShareCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__flamemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_flamemControlSerialization_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__flamemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_flamemControlSerialization_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__flamemControl_Prologue__ = &__nvoc_up_thunk_RmResource_flamemControl_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Prologue__ = &__nvoc_up_thunk_RmResource_memControl_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__flamemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_flamemControl_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memControl_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__flamemPreDestruct__ = &__nvoc_up_thunk_RsResource_flamemPreDestruct, // virtual inherited (res) base (mem) + .Memory.__memPreDestruct__ = &__nvoc_up_thunk_RsResource_memPreDestruct, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__flamemControlFilter__ = &__nvoc_up_thunk_RsResource_flamemControlFilter, // virtual inherited (res) base (mem) + .Memory.__memControlFilter__ = &__nvoc_up_thunk_RsResource_memControlFilter, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__flamemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_flamemIsPartialUnmapSupported, // inline virtual inherited (res) base (mem) body + .Memory.__memIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .Memory.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .Memory.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__flamemMapTo__ = &__nvoc_up_thunk_RsResource_flamemMapTo, // virtual inherited (res) base (mem) + .Memory.__memMapTo__ = &__nvoc_up_thunk_RsResource_memMapTo, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__flamemUnmapFrom__ = &__nvoc_up_thunk_RsResource_flamemUnmapFrom, // virtual inherited (res) base (mem) + .Memory.__memUnmapFrom__ = &__nvoc_up_thunk_RsResource_memUnmapFrom, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__flamemGetRefCount__ = &__nvoc_up_thunk_RsResource_flamemGetRefCount, // virtual inherited (res) base (mem) + .Memory.__memGetRefCount__ = &__nvoc_up_thunk_RsResource_memGetRefCount, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__flamemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_flamemAddAdditionalDependants, // virtual inherited (res) base (mem) + .Memory.__memAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memAddAdditionalDependants, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.Memory.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable = &vtable.Memory.RmResource; // (rmres) super^2 + pThis->__nvoc_base_Memory.__nvoc_vtable = &vtable.Memory; // (mem) super + pThis->__nvoc_vtable = &vtable; // (flamem) this __nvoc_init_funcTable_FlaMemory_1(pThis); } diff --git a/src/nvidia/generated/g_fla_mem_nvoc.h b/src/nvidia/generated/g_fla_mem_nvoc.h index ca73e219ff..b78d57c4ac 100644 --- a/src/nvidia/generated/g_fla_mem_nvoc.h +++ b/src/nvidia/generated/g_fla_mem_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -58,10 +58,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__FlaMemory; + + struct FlaMemory { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__FlaMemory *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; @@ -74,7 +79,17 @@ struct FlaMemory { struct Memory *__nvoc_pbase_Memory; // mem super struct FlaMemory *__nvoc_pbase_FlaMemory; // flamem - // Vtable with 27 per-object function pointers + // Data members + NvU32 peerDeviceInst; + NvU32 peerGpuInst; + NvHandle hDupedExportMemory; +}; + + +// Metadata including vtable with 27 function pointers plus superclass metadata +struct NVOC_VTABLE__FlaMemory { + const struct NVOC_VTABLE__Memory Memory; // (mem) 26 function pointers + NvBool (*__flamemCanCopy__)(struct FlaMemory * /*this*/); // virtual override (res) base (mem) NV_STATUS (*__flamemCopyConstruct__)(struct FlaMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); // virtual override (mem) base (mem) NV_STATUS (*__flamemIsDuplicate__)(struct FlaMemory * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) @@ -102,11 +117,6 @@ struct FlaMemory { NV_STATUS (*__flamemUnmapFrom__)(struct FlaMemory * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (mem) NvU32 (*__flamemGetRefCount__)(struct FlaMemory * /*this*/); // virtual inherited (res) base (mem) void (*__flamemAddAdditionalDependants__)(struct RsClient *, struct FlaMemory * /*this*/, RsResourceRef *); // virtual inherited (res) base (mem) - - // Data members - NvU32 peerDeviceInst; - NvU32 peerGpuInst; - NvHandle hDupedExportMemory; }; #ifndef __NVOC_CLASS_FlaMemory_TYPEDEF__ @@ -139,168 +149,168 @@ NV_STATUS __nvoc_objCreate_FlaMemory(FlaMemory**, Dynamic*, NvU32, CALL_CONTEXT // Wrapper macros -#define flamemCanCopy_FNPTR(pFlaMemory) pFlaMemory->__flamemCanCopy__ +#define flamemCanCopy_FNPTR(pFlaMemory) pFlaMemory->__nvoc_vtable->__flamemCanCopy__ #define flamemCanCopy(pFlaMemory) flamemCanCopy_DISPATCH(pFlaMemory) -#define flamemCopyConstruct_FNPTR(pFlaMemory) pFlaMemory->__flamemCopyConstruct__ +#define flamemCopyConstruct_FNPTR(pFlaMemory) pFlaMemory->__nvoc_vtable->__flamemCopyConstruct__ #define flamemCopyConstruct(pFlaMemory, pCallContext, pParams) flamemCopyConstruct_DISPATCH(pFlaMemory, pCallContext, pParams) -#define flamemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define flamemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsDuplicate__ #define flamemIsDuplicate(pMemory, hMemory, pDuplicate) flamemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define flamemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ +#define flamemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMapAddrSpace__ #define flamemGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) flamemGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define flamemControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ +#define flamemControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memControl__ #define flamemControl(pMemory, pCallContext, pParams) flamemControl_DISPATCH(pMemory, pCallContext, pParams) -#define flamemMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define flamemMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memMap__ #define flamemMap(pMemory, pCallContext, pParams, pCpuMapping) flamemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define flamemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ +#define flamemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memUnmap__ #define flamemUnmap(pMemory, pCallContext, pCpuMapping) flamemUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define flamemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ +#define flamemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemInterMapParams__ #define flamemGetMemInterMapParams(pMemory, pParams) flamemGetMemInterMapParams_DISPATCH(pMemory, pParams) -#define flamemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define flamemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckMemInterUnmap__ #define flamemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) flamemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define flamemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ +#define flamemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemoryMappingDescriptor__ #define flamemGetMemoryMappingDescriptor(pMemory, ppMemDesc) flamemGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define flamemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ +#define flamemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckCopyPermissions__ #define flamemCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) flamemCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define flamemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define flamemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsReady__ #define flamemIsReady(pMemory, bCopyConstructorContext) flamemIsReady_DISPATCH(pMemory, bCopyConstructorContext) -#define flamemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define flamemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsGpuMapAllowed__ #define flamemIsGpuMapAllowed(pMemory, pGpu) flamemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define flamemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define flamemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsExportAllowed__ #define flamemIsExportAllowed(pMemory) flamemIsExportAllowed_DISPATCH(pMemory) -#define flamemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define flamemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define flamemAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) flamemAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define flamemShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define flamemShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define flamemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) flamemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define flamemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define flamemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define flamemControlSerialization_Prologue(pResource, pCallContext, pParams) flamemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define flamemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define flamemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define flamemControlSerialization_Epilogue(pResource, pCallContext, pParams) flamemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define flamemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define flamemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define flamemControl_Prologue(pResource, pCallContext, pParams) flamemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define flamemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define flamemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define flamemControl_Epilogue(pResource, pCallContext, pParams) flamemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define flamemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define flamemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define flamemPreDestruct(pResource) flamemPreDestruct_DISPATCH(pResource) -#define flamemControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define flamemControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define flamemControlFilter(pResource, pCallContext, pParams) flamemControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define flamemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define flamemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define flamemIsPartialUnmapSupported(pResource) flamemIsPartialUnmapSupported_DISPATCH(pResource) -#define flamemMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define flamemMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define flamemMapTo(pResource, pParams) flamemMapTo_DISPATCH(pResource, pParams) -#define flamemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define flamemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define flamemUnmapFrom(pResource, pParams) flamemUnmapFrom_DISPATCH(pResource, pParams) -#define flamemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define flamemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define flamemGetRefCount(pResource) flamemGetRefCount_DISPATCH(pResource) -#define flamemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define flamemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define flamemAddAdditionalDependants(pClient, pResource, pReference) flamemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool flamemCanCopy_DISPATCH(struct FlaMemory *pFlaMemory) { - return pFlaMemory->__flamemCanCopy__(pFlaMemory); + return pFlaMemory->__nvoc_vtable->__flamemCanCopy__(pFlaMemory); } static inline NV_STATUS flamemCopyConstruct_DISPATCH(struct FlaMemory *pFlaMemory, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { - return pFlaMemory->__flamemCopyConstruct__(pFlaMemory, pCallContext, pParams); + return pFlaMemory->__nvoc_vtable->__flamemCopyConstruct__(pFlaMemory, pCallContext, pParams); } static inline NV_STATUS flamemIsDuplicate_DISPATCH(struct FlaMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__flamemIsDuplicate__(pMemory, hMemory, pDuplicate); + return pMemory->__nvoc_vtable->__flamemIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS flamemGetMapAddrSpace_DISPATCH(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pMemory->__flamemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); + return pMemory->__nvoc_vtable->__flamemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS flamemControl_DISPATCH(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__flamemControl__(pMemory, pCallContext, pParams); + return pMemory->__nvoc_vtable->__flamemControl__(pMemory, pCallContext, pParams); } static inline NV_STATUS flamemMap_DISPATCH(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__flamemMap__(pMemory, pCallContext, pParams, pCpuMapping); + return pMemory->__nvoc_vtable->__flamemMap__(pMemory, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS flamemUnmap_DISPATCH(struct FlaMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__flamemUnmap__(pMemory, pCallContext, pCpuMapping); + return pMemory->__nvoc_vtable->__flamemUnmap__(pMemory, pCallContext, pCpuMapping); } static inline NV_STATUS flamemGetMemInterMapParams_DISPATCH(struct FlaMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__flamemGetMemInterMapParams__(pMemory, pParams); + return pMemory->__nvoc_vtable->__flamemGetMemInterMapParams__(pMemory, pParams); } static inline NV_STATUS flamemCheckMemInterUnmap_DISPATCH(struct FlaMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__flamemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); + return pMemory->__nvoc_vtable->__flamemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } static inline NV_STATUS flamemGetMemoryMappingDescriptor_DISPATCH(struct FlaMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__flamemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); + return pMemory->__nvoc_vtable->__flamemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } static inline NV_STATUS flamemCheckCopyPermissions_DISPATCH(struct FlaMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__flamemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); + return pMemory->__nvoc_vtable->__flamemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } static inline NV_STATUS flamemIsReady_DISPATCH(struct FlaMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__flamemIsReady__(pMemory, bCopyConstructorContext); + return pMemory->__nvoc_vtable->__flamemIsReady__(pMemory, bCopyConstructorContext); } static inline NvBool flamemIsGpuMapAllowed_DISPATCH(struct FlaMemory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__flamemIsGpuMapAllowed__(pMemory, pGpu); + return pMemory->__nvoc_vtable->__flamemIsGpuMapAllowed__(pMemory, pGpu); } static inline NvBool flamemIsExportAllowed_DISPATCH(struct FlaMemory *pMemory) { - return pMemory->__flamemIsExportAllowed__(pMemory); + return pMemory->__nvoc_vtable->__flamemIsExportAllowed__(pMemory); } static inline NvBool flamemAccessCallback_DISPATCH(struct FlaMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__flamemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__flamemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool flamemShareCallback_DISPATCH(struct FlaMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__flamemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__flamemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS flamemControlSerialization_Prologue_DISPATCH(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__flamemControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__flamemControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void flamemControlSerialization_Epilogue_DISPATCH(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__flamemControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__flamemControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS flamemControl_Prologue_DISPATCH(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__flamemControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__flamemControl_Prologue__(pResource, pCallContext, pParams); } static inline void flamemControl_Epilogue_DISPATCH(struct FlaMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__flamemControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__flamemControl_Epilogue__(pResource, pCallContext, pParams); } static inline void flamemPreDestruct_DISPATCH(struct FlaMemory *pResource) { - pResource->__flamemPreDestruct__(pResource); + pResource->__nvoc_vtable->__flamemPreDestruct__(pResource); } static inline NV_STATUS flamemControlFilter_DISPATCH(struct FlaMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__flamemControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__flamemControlFilter__(pResource, pCallContext, pParams); } static inline NvBool flamemIsPartialUnmapSupported_DISPATCH(struct FlaMemory *pResource) { - return pResource->__flamemIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__flamemIsPartialUnmapSupported__(pResource); } static inline NV_STATUS flamemMapTo_DISPATCH(struct FlaMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__flamemMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__flamemMapTo__(pResource, pParams); } static inline NV_STATUS flamemUnmapFrom_DISPATCH(struct FlaMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__flamemUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__flamemUnmapFrom__(pResource, pParams); } static inline NvU32 flamemGetRefCount_DISPATCH(struct FlaMemory *pResource) { - return pResource->__flamemGetRefCount__(pResource); + return pResource->__nvoc_vtable->__flamemGetRefCount__(pResource); } static inline void flamemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct FlaMemory *pResource, RsResourceRef *pReference) { - pResource->__flamemAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__flamemAddAdditionalDependants__(pClient, pResource, pReference); } NvBool flamemCanCopy_IMPL(struct FlaMemory *pFlaMemory); diff --git a/src/nvidia/generated/g_fm_session_api_nvoc.c b/src/nvidia/generated/g_fm_session_api_nvoc.c index 2f43c774d9..b81035bf35 100644 --- a/src/nvidia/generated/g_fm_session_api_nvoc.c +++ b/src/nvidia/generated/g_fm_session_api_nvoc.c @@ -123,110 +123,153 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_FmSessio }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_RmResource_fmsessionapiAccessCallback(struct FmSessionApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_fmsessionapiShareCallback(struct FmSessionApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_fmsessionapiGetMemInterMapParams(struct FmSessionApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_fmsessionapiCheckMemInterUnmap(struct FmSessionApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_fmsessionapiGetMemoryMappingDescriptor(struct FmSessionApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_fmsessionapiControlSerialization_Prologue(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_fmsessionapiControlSerialization_Epilogue(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_fmsessionapiControl_Prologue(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_fmsessionapiControl_Epilogue(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_fmsessionapiCanCopy(struct FmSessionApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiIsDuplicate(struct FmSessionApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_fmsessionapiPreDestruct(struct FmSessionApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiControl(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiControlFilter(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiMap(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiUnmap(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_fmsessionapiIsPartialUnmapSupported(struct FmSessionApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiMapTo(struct FmSessionApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiUnmapFrom(struct FmSessionApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_fmsessionapiGetRefCount(struct FmSessionApi *pResource); // this +void __nvoc_up_thunk_RsResource_fmsessionapiAddAdditionalDependants(struct RsClient *pClient, struct FmSessionApi *pResource, RsResourceRef *pReference); // this + // 21 up-thunk(s) defined to bridge methods in FmSessionApi to superclasses // fmsessionapiAccessCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_fmsessionapiAccessCallback(struct FmSessionApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_fmsessionapiAccessCallback(struct FmSessionApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // fmsessionapiShareCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_fmsessionapiShareCallback(struct FmSessionApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_fmsessionapiShareCallback(struct FmSessionApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // fmsessionapiGetMemInterMapParams: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_fmsessionapiGetMemInterMapParams(struct FmSessionApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_fmsessionapiGetMemInterMapParams(struct FmSessionApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), pParams); } // fmsessionapiCheckMemInterUnmap: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_fmsessionapiCheckMemInterUnmap(struct FmSessionApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_fmsessionapiCheckMemInterUnmap(struct FmSessionApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), bSubdeviceHandleProvided); } // fmsessionapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_fmsessionapiGetMemoryMappingDescriptor(struct FmSessionApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_fmsessionapiGetMemoryMappingDescriptor(struct FmSessionApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), ppMemDesc); } // fmsessionapiControlSerialization_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_fmsessionapiControlSerialization_Prologue(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_fmsessionapiControlSerialization_Prologue(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), pCallContext, pParams); } // fmsessionapiControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_fmsessionapiControlSerialization_Epilogue(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_fmsessionapiControlSerialization_Epilogue(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), pCallContext, pParams); } // fmsessionapiControl_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_fmsessionapiControl_Prologue(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_fmsessionapiControl_Prologue(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), pCallContext, pParams); } // fmsessionapiControl_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_fmsessionapiControl_Epilogue(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_fmsessionapiControl_Epilogue(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RmResource.offset), pCallContext, pParams); } // fmsessionapiCanCopy: virtual inherited (res) base (rmres) -static NvBool __nvoc_up_thunk_RsResource_fmsessionapiCanCopy(struct FmSessionApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_fmsessionapiCanCopy(struct FmSessionApi *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset)); } // fmsessionapiIsDuplicate: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiIsDuplicate(struct FmSessionApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiIsDuplicate(struct FmSessionApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), hMemory, pDuplicate); } // fmsessionapiPreDestruct: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_fmsessionapiPreDestruct(struct FmSessionApi *pResource) { +void __nvoc_up_thunk_RsResource_fmsessionapiPreDestruct(struct FmSessionApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset)); } // fmsessionapiControl: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiControl(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiControl(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), pCallContext, pParams); } // fmsessionapiControlFilter: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiControlFilter(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiControlFilter(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), pCallContext, pParams); } // fmsessionapiMap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiMap(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiMap(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), pCallContext, pParams, pCpuMapping); } // fmsessionapiUnmap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiUnmap(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiUnmap(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), pCallContext, pCpuMapping); } // fmsessionapiIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body -static NvBool __nvoc_up_thunk_RsResource_fmsessionapiIsPartialUnmapSupported(struct FmSessionApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_fmsessionapiIsPartialUnmapSupported(struct FmSessionApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset)); } // fmsessionapiMapTo: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiMapTo(struct FmSessionApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiMapTo(struct FmSessionApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), pParams); } // fmsessionapiUnmapFrom: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiUnmapFrom(struct FmSessionApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_fmsessionapiUnmapFrom(struct FmSessionApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), pParams); } // fmsessionapiGetRefCount: virtual inherited (res) base (rmres) -static NvU32 __nvoc_up_thunk_RsResource_fmsessionapiGetRefCount(struct FmSessionApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_fmsessionapiGetRefCount(struct FmSessionApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset)); } // fmsessionapiAddAdditionalDependants: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_fmsessionapiAddAdditionalDependants(struct RsClient *pClient, struct FmSessionApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_fmsessionapiAddAdditionalDependants(struct RsClient *pClient, struct FmSessionApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_FmSessionApi_RsResource.offset), pReference); } @@ -280,76 +323,86 @@ static void __nvoc_init_funcTable_FmSessionApi_1(FmSessionApi *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__fmsessionapiCtrlCmdClearFmState__ = &fmsessionapiCtrlCmdClearFmState_IMPL; #endif - - // fmsessionapiAccessCallback -- virtual inherited (rmres) base (rmres) - pThis->__fmsessionapiAccessCallback__ = &__nvoc_up_thunk_RmResource_fmsessionapiAccessCallback; - - // fmsessionapiShareCallback -- virtual inherited (rmres) base (rmres) - pThis->__fmsessionapiShareCallback__ = &__nvoc_up_thunk_RmResource_fmsessionapiShareCallback; - - // fmsessionapiGetMemInterMapParams -- virtual inherited (rmres) base (rmres) - pThis->__fmsessionapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_fmsessionapiGetMemInterMapParams; - - // fmsessionapiCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) - pThis->__fmsessionapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_fmsessionapiCheckMemInterUnmap; - - // fmsessionapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) - pThis->__fmsessionapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_fmsessionapiGetMemoryMappingDescriptor; - - // fmsessionapiControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__fmsessionapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_fmsessionapiControlSerialization_Prologue; - - // fmsessionapiControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__fmsessionapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_fmsessionapiControlSerialization_Epilogue; - - // fmsessionapiControl_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__fmsessionapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_fmsessionapiControl_Prologue; - - // fmsessionapiControl_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__fmsessionapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_fmsessionapiControl_Epilogue; - - // fmsessionapiCanCopy -- virtual inherited (res) base (rmres) - pThis->__fmsessionapiCanCopy__ = &__nvoc_up_thunk_RsResource_fmsessionapiCanCopy; - - // fmsessionapiIsDuplicate -- virtual inherited (res) base (rmres) - pThis->__fmsessionapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_fmsessionapiIsDuplicate; - - // fmsessionapiPreDestruct -- virtual inherited (res) base (rmres) - pThis->__fmsessionapiPreDestruct__ = &__nvoc_up_thunk_RsResource_fmsessionapiPreDestruct; - - // fmsessionapiControl -- virtual inherited (res) base (rmres) - pThis->__fmsessionapiControl__ = &__nvoc_up_thunk_RsResource_fmsessionapiControl; - - // fmsessionapiControlFilter -- virtual inherited (res) base (rmres) - pThis->__fmsessionapiControlFilter__ = &__nvoc_up_thunk_RsResource_fmsessionapiControlFilter; - - // fmsessionapiMap -- virtual inherited (res) base (rmres) - pThis->__fmsessionapiMap__ = &__nvoc_up_thunk_RsResource_fmsessionapiMap; - - // fmsessionapiUnmap -- virtual inherited (res) base (rmres) - pThis->__fmsessionapiUnmap__ = &__nvoc_up_thunk_RsResource_fmsessionapiUnmap; - - // fmsessionapiIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body - pThis->__fmsessionapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_fmsessionapiIsPartialUnmapSupported; - - // fmsessionapiMapTo -- virtual inherited (res) base (rmres) - pThis->__fmsessionapiMapTo__ = &__nvoc_up_thunk_RsResource_fmsessionapiMapTo; - - // fmsessionapiUnmapFrom -- virtual inherited (res) base (rmres) - pThis->__fmsessionapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_fmsessionapiUnmapFrom; - - // fmsessionapiGetRefCount -- virtual inherited (res) base (rmres) - pThis->__fmsessionapiGetRefCount__ = &__nvoc_up_thunk_RsResource_fmsessionapiGetRefCount; - - // fmsessionapiAddAdditionalDependants -- virtual inherited (res) base (rmres) - pThis->__fmsessionapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_fmsessionapiAddAdditionalDependants; -} // End __nvoc_init_funcTable_FmSessionApi_1 with approximately 23 basic block(s). +} // End __nvoc_init_funcTable_FmSessionApi_1 with approximately 2 basic block(s). // Initialize vtable(s) for 23 virtual method(s). void __nvoc_init_funcTable_FmSessionApi(FmSessionApi *pThis) { - // Initialize vtable(s) with 23 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__FmSessionApi vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__fmsessionapiAccessCallback__ = &__nvoc_up_thunk_RmResource_fmsessionapiAccessCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__fmsessionapiShareCallback__ = &__nvoc_up_thunk_RmResource_fmsessionapiShareCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__fmsessionapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_fmsessionapiGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__fmsessionapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_fmsessionapiCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__fmsessionapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_fmsessionapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__fmsessionapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_fmsessionapiControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__fmsessionapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_fmsessionapiControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__fmsessionapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_fmsessionapiControl_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__fmsessionapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_fmsessionapiControl_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__fmsessionapiCanCopy__ = &__nvoc_up_thunk_RsResource_fmsessionapiCanCopy, // virtual inherited (res) base (rmres) + .RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__fmsessionapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_fmsessionapiIsDuplicate, // virtual inherited (res) base (rmres) + .RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__fmsessionapiPreDestruct__ = &__nvoc_up_thunk_RsResource_fmsessionapiPreDestruct, // virtual inherited (res) base (rmres) + .RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__fmsessionapiControl__ = &__nvoc_up_thunk_RsResource_fmsessionapiControl, // virtual inherited (res) base (rmres) + .RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControl__ = &resControl_IMPL, // virtual + .__fmsessionapiControlFilter__ = &__nvoc_up_thunk_RsResource_fmsessionapiControlFilter, // virtual inherited (res) base (rmres) + .RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__fmsessionapiMap__ = &__nvoc_up_thunk_RsResource_fmsessionapiMap, // virtual inherited (res) base (rmres) + .RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMap__ = &resMap_IMPL, // virtual + .__fmsessionapiUnmap__ = &__nvoc_up_thunk_RsResource_fmsessionapiUnmap, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__fmsessionapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_fmsessionapiIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__fmsessionapiMapTo__ = &__nvoc_up_thunk_RsResource_fmsessionapiMapTo, // virtual inherited (res) base (rmres) + .RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__fmsessionapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_fmsessionapiUnmapFrom, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__fmsessionapiGetRefCount__ = &__nvoc_up_thunk_RsResource_fmsessionapiGetRefCount, // virtual inherited (res) base (rmres) + .RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__fmsessionapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_fmsessionapiAddAdditionalDependants, // virtual inherited (res) base (rmres) + .RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.RmResource.RsResource; // (res) super^2 + pThis->__nvoc_base_RmResource.__nvoc_vtable = &vtable.RmResource; // (rmres) super + pThis->__nvoc_vtable = &vtable; // (fmsessionapi) this + + // Initialize vtable(s) with 2 per-object function pointer(s). __nvoc_init_funcTable_FmSessionApi_1(pThis); } diff --git a/src/nvidia/generated/g_fm_session_api_nvoc.h b/src/nvidia/generated/g_fm_session_api_nvoc.h index 3873d3a6be..6a0547e9b1 100644 --- a/src/nvidia/generated/g_fm_session_api_nvoc.h +++ b/src/nvidia/generated/g_fm_session_api_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -82,10 +82,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__FmSessionApi; + + struct FmSessionApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__FmSessionApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; @@ -97,9 +102,19 @@ struct FmSessionApi { struct RmResource *__nvoc_pbase_RmResource; // rmres super struct FmSessionApi *__nvoc_pbase_FmSessionApi; // fmsessionapi - // Vtable with 23 per-object function pointers + // Vtable with 2 per-object function pointers NV_STATUS (*__fmsessionapiCtrlCmdSetFmState__)(struct FmSessionApi * /*this*/); // exported (id=0xf0101) NV_STATUS (*__fmsessionapiCtrlCmdClearFmState__)(struct FmSessionApi * /*this*/); // exported (id=0xf0102) + + // Data members + NvU64 dupedCapDescriptor; +}; + + +// Metadata including vtable with 21 function pointers plus superclass metadata +struct NVOC_VTABLE__FmSessionApi { + const struct NVOC_VTABLE__RmResource RmResource; // (rmres) 21 function pointers + NvBool (*__fmsessionapiAccessCallback__)(struct FmSessionApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) NvBool (*__fmsessionapiShareCallback__)(struct FmSessionApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) NV_STATUS (*__fmsessionapiGetMemInterMapParams__)(struct FmSessionApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) @@ -121,9 +136,6 @@ struct FmSessionApi { NV_STATUS (*__fmsessionapiUnmapFrom__)(struct FmSessionApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) NvU32 (*__fmsessionapiGetRefCount__)(struct FmSessionApi * /*this*/); // virtual inherited (res) base (rmres) void (*__fmsessionapiAddAdditionalDependants__)(struct RsClient *, struct FmSessionApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) - - // Data members - NvU64 dupedCapDescriptor; }; #ifndef __NVOC_CLASS_FmSessionApi_TYPEDEF__ @@ -160,47 +172,47 @@ NV_STATUS __nvoc_objCreate_FmSessionApi(FmSessionApi**, Dynamic*, NvU32, struct #define fmsessionapiCtrlCmdSetFmState(pFmSessionApi) fmsessionapiCtrlCmdSetFmState_DISPATCH(pFmSessionApi) #define fmsessionapiCtrlCmdClearFmState_FNPTR(pFmSessionApi) pFmSessionApi->__fmsessionapiCtrlCmdClearFmState__ #define fmsessionapiCtrlCmdClearFmState(pFmSessionApi) fmsessionapiCtrlCmdClearFmState_DISPATCH(pFmSessionApi) -#define fmsessionapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define fmsessionapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define fmsessionapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) fmsessionapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define fmsessionapiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ +#define fmsessionapiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define fmsessionapiShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) fmsessionapiShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define fmsessionapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define fmsessionapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define fmsessionapiGetMemInterMapParams(pRmResource, pParams) fmsessionapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define fmsessionapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define fmsessionapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define fmsessionapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) fmsessionapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define fmsessionapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define fmsessionapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define fmsessionapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) fmsessionapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define fmsessionapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define fmsessionapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define fmsessionapiControlSerialization_Prologue(pResource, pCallContext, pParams) fmsessionapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define fmsessionapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define fmsessionapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define fmsessionapiControlSerialization_Epilogue(pResource, pCallContext, pParams) fmsessionapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define fmsessionapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ +#define fmsessionapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define fmsessionapiControl_Prologue(pResource, pCallContext, pParams) fmsessionapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define fmsessionapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define fmsessionapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define fmsessionapiControl_Epilogue(pResource, pCallContext, pParams) fmsessionapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define fmsessionapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define fmsessionapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define fmsessionapiCanCopy(pResource) fmsessionapiCanCopy_DISPATCH(pResource) -#define fmsessionapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define fmsessionapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define fmsessionapiIsDuplicate(pResource, hMemory, pDuplicate) fmsessionapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define fmsessionapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define fmsessionapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define fmsessionapiPreDestruct(pResource) fmsessionapiPreDestruct_DISPATCH(pResource) -#define fmsessionapiControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define fmsessionapiControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControl__ #define fmsessionapiControl(pResource, pCallContext, pParams) fmsessionapiControl_DISPATCH(pResource, pCallContext, pParams) -#define fmsessionapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define fmsessionapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define fmsessionapiControlFilter(pResource, pCallContext, pParams) fmsessionapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define fmsessionapiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define fmsessionapiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define fmsessionapiMap(pResource, pCallContext, pParams, pCpuMapping) fmsessionapiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define fmsessionapiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define fmsessionapiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define fmsessionapiUnmap(pResource, pCallContext, pCpuMapping) fmsessionapiUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define fmsessionapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define fmsessionapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define fmsessionapiIsPartialUnmapSupported(pResource) fmsessionapiIsPartialUnmapSupported_DISPATCH(pResource) -#define fmsessionapiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define fmsessionapiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define fmsessionapiMapTo(pResource, pParams) fmsessionapiMapTo_DISPATCH(pResource, pParams) -#define fmsessionapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define fmsessionapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define fmsessionapiUnmapFrom(pResource, pParams) fmsessionapiUnmapFrom_DISPATCH(pResource, pParams) -#define fmsessionapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define fmsessionapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define fmsessionapiGetRefCount(pResource) fmsessionapiGetRefCount_DISPATCH(pResource) -#define fmsessionapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define fmsessionapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define fmsessionapiAddAdditionalDependants(pClient, pResource, pReference) fmsessionapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions @@ -213,87 +225,87 @@ static inline NV_STATUS fmsessionapiCtrlCmdClearFmState_DISPATCH(struct FmSessio } static inline NvBool fmsessionapiAccessCallback_DISPATCH(struct FmSessionApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__fmsessionapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__fmsessionapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool fmsessionapiShareCallback_DISPATCH(struct FmSessionApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__fmsessionapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__fmsessionapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS fmsessionapiGetMemInterMapParams_DISPATCH(struct FmSessionApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__fmsessionapiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__fmsessionapiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS fmsessionapiCheckMemInterUnmap_DISPATCH(struct FmSessionApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__fmsessionapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__fmsessionapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS fmsessionapiGetMemoryMappingDescriptor_DISPATCH(struct FmSessionApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__fmsessionapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__fmsessionapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS fmsessionapiControlSerialization_Prologue_DISPATCH(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__fmsessionapiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__fmsessionapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void fmsessionapiControlSerialization_Epilogue_DISPATCH(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__fmsessionapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__fmsessionapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS fmsessionapiControl_Prologue_DISPATCH(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__fmsessionapiControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__fmsessionapiControl_Prologue__(pResource, pCallContext, pParams); } static inline void fmsessionapiControl_Epilogue_DISPATCH(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__fmsessionapiControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__fmsessionapiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool fmsessionapiCanCopy_DISPATCH(struct FmSessionApi *pResource) { - return pResource->__fmsessionapiCanCopy__(pResource); + return pResource->__nvoc_vtable->__fmsessionapiCanCopy__(pResource); } static inline NV_STATUS fmsessionapiIsDuplicate_DISPATCH(struct FmSessionApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__fmsessionapiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__fmsessionapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void fmsessionapiPreDestruct_DISPATCH(struct FmSessionApi *pResource) { - pResource->__fmsessionapiPreDestruct__(pResource); + pResource->__nvoc_vtable->__fmsessionapiPreDestruct__(pResource); } static inline NV_STATUS fmsessionapiControl_DISPATCH(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__fmsessionapiControl__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__fmsessionapiControl__(pResource, pCallContext, pParams); } static inline NV_STATUS fmsessionapiControlFilter_DISPATCH(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__fmsessionapiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__fmsessionapiControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS fmsessionapiMap_DISPATCH(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__fmsessionapiMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__fmsessionapiMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS fmsessionapiUnmap_DISPATCH(struct FmSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__fmsessionapiUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__fmsessionapiUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool fmsessionapiIsPartialUnmapSupported_DISPATCH(struct FmSessionApi *pResource) { - return pResource->__fmsessionapiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__fmsessionapiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS fmsessionapiMapTo_DISPATCH(struct FmSessionApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__fmsessionapiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__fmsessionapiMapTo__(pResource, pParams); } static inline NV_STATUS fmsessionapiUnmapFrom_DISPATCH(struct FmSessionApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__fmsessionapiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__fmsessionapiUnmapFrom__(pResource, pParams); } static inline NvU32 fmsessionapiGetRefCount_DISPATCH(struct FmSessionApi *pResource) { - return pResource->__fmsessionapiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__fmsessionapiGetRefCount__(pResource); } static inline void fmsessionapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct FmSessionApi *pResource, RsResourceRef *pReference) { - pResource->__fmsessionapiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__fmsessionapiAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS fmsessionapiCtrlCmdSetFmState_IMPL(struct FmSessionApi *pFmSessionApi); diff --git a/src/nvidia/generated/g_generic_engine_nvoc.c b/src/nvidia/generated/g_generic_engine_nvoc.c index e1e46c1b6d..2fa9a3cb9d 100644 --- a/src/nvidia/generated/g_generic_engine_nvoc.c +++ b/src/nvidia/generated/g_generic_engine_nvoc.c @@ -142,145 +142,228 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GenericE /*pClassInfo=*/ &(__nvoc_class_def_GenericEngineApi.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "genapiCtrlCmdBBXGetLastFlushTime" +#endif + }, + { /* [3] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x58u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) genapiCtrlCmdBBXIsNVMFlushEnabled_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x58u) + /*flags=*/ 0x58u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x90e70119u, + /*paramSize=*/ sizeof(NV90E7_CTRL_BBX_IS_NVM_FLUSH_ENABLED_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_GenericEngineApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "genapiCtrlCmdBBXIsNVMFlushEnabled" #endif }, }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_GenericEngineApi_gpuresMap(struct GpuResource *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_down_thunk_GenericEngineApi_gpuresGetMapAddrSpace(struct GpuResource *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_down_thunk_GenericEngineApi_gpuresControl(struct GpuResource *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this + // 3 down-thunk(s) defined to bridge methods in GenericEngineApi from superclasses // genapiMap: virtual override (res) base (gpures) -static NV_STATUS __nvoc_down_thunk_GenericEngineApi_gpuresMap(struct GpuResource *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_down_thunk_GenericEngineApi_gpuresMap(struct GpuResource *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return genapiMap((struct GenericEngineApi *)(((unsigned char *) pGenericEngineApi) - __nvoc_rtti_GenericEngineApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // genapiGetMapAddrSpace: virtual override (gpures) base (gpures) -static NV_STATUS __nvoc_down_thunk_GenericEngineApi_gpuresGetMapAddrSpace(struct GpuResource *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_down_thunk_GenericEngineApi_gpuresGetMapAddrSpace(struct GpuResource *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return genapiGetMapAddrSpace((struct GenericEngineApi *)(((unsigned char *) pGenericEngineApi) - __nvoc_rtti_GenericEngineApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // genapiControl: virtual override (res) base (gpures) -static NV_STATUS __nvoc_down_thunk_GenericEngineApi_gpuresControl(struct GpuResource *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_down_thunk_GenericEngineApi_gpuresControl(struct GpuResource *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return genapiControl((struct GenericEngineApi *)(((unsigned char *) pGenericEngineApi) - __nvoc_rtti_GenericEngineApi_GpuResource.offset), pCallContext, pParams); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_genapiUnmap(struct GenericEngineApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_genapiShareCallback(struct GenericEngineApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_genapiGetRegBaseOffsetAndSize(struct GenericEngineApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_genapiInternalControlForward(struct GenericEngineApi *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_genapiGetInternalObjectHandle(struct GenericEngineApi *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_genapiAccessCallback(struct GenericEngineApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_genapiGetMemInterMapParams(struct GenericEngineApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_genapiCheckMemInterUnmap(struct GenericEngineApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_genapiGetMemoryMappingDescriptor(struct GenericEngineApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_genapiControlSerialization_Prologue(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_genapiControlSerialization_Epilogue(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_genapiControl_Prologue(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_genapiControl_Epilogue(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_genapiCanCopy(struct GenericEngineApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_genapiIsDuplicate(struct GenericEngineApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_genapiPreDestruct(struct GenericEngineApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_genapiControlFilter(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_genapiIsPartialUnmapSupported(struct GenericEngineApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_genapiMapTo(struct GenericEngineApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_genapiUnmapFrom(struct GenericEngineApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_genapiGetRefCount(struct GenericEngineApi *pResource); // this +void __nvoc_up_thunk_RsResource_genapiAddAdditionalDependants(struct RsClient *pClient, struct GenericEngineApi *pResource, RsResourceRef *pReference); // this + // 22 up-thunk(s) defined to bridge methods in GenericEngineApi to superclasses // genapiUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_genapiUnmap(struct GenericEngineApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_genapiUnmap(struct GenericEngineApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GenericEngineApi_GpuResource.offset), pCallContext, pCpuMapping); } // genapiShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_genapiShareCallback(struct GenericEngineApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_genapiShareCallback(struct GenericEngineApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GenericEngineApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // genapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_genapiGetRegBaseOffsetAndSize(struct GenericEngineApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_genapiGetRegBaseOffsetAndSize(struct GenericEngineApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GenericEngineApi_GpuResource.offset), pGpu, pOffset, pSize); } // genapiInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_genapiInternalControlForward(struct GenericEngineApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_genapiInternalControlForward(struct GenericEngineApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GenericEngineApi_GpuResource.offset), command, pParams, size); } // genapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_genapiGetInternalObjectHandle(struct GenericEngineApi *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_genapiGetInternalObjectHandle(struct GenericEngineApi *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GenericEngineApi_GpuResource.offset)); } // genapiAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_genapiAccessCallback(struct GenericEngineApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_genapiAccessCallback(struct GenericEngineApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // genapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_genapiGetMemInterMapParams(struct GenericEngineApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_genapiGetMemInterMapParams(struct GenericEngineApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), pParams); } // genapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_genapiCheckMemInterUnmap(struct GenericEngineApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_genapiCheckMemInterUnmap(struct GenericEngineApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), bSubdeviceHandleProvided); } // genapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_genapiGetMemoryMappingDescriptor(struct GenericEngineApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_genapiGetMemoryMappingDescriptor(struct GenericEngineApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), ppMemDesc); } // genapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_genapiControlSerialization_Prologue(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_genapiControlSerialization_Prologue(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), pCallContext, pParams); } // genapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_genapiControlSerialization_Epilogue(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_genapiControlSerialization_Epilogue(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), pCallContext, pParams); } // genapiControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_genapiControl_Prologue(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_genapiControl_Prologue(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), pCallContext, pParams); } // genapiControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_genapiControl_Epilogue(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_genapiControl_Epilogue(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RmResource.offset), pCallContext, pParams); } // genapiCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_genapiCanCopy(struct GenericEngineApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_genapiCanCopy(struct GenericEngineApi *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset)); } // genapiIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_genapiIsDuplicate(struct GenericEngineApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_genapiIsDuplicate(struct GenericEngineApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset), hMemory, pDuplicate); } // genapiPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_genapiPreDestruct(struct GenericEngineApi *pResource) { +void __nvoc_up_thunk_RsResource_genapiPreDestruct(struct GenericEngineApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset)); } // genapiControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_genapiControlFilter(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_genapiControlFilter(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset), pCallContext, pParams); } // genapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_genapiIsPartialUnmapSupported(struct GenericEngineApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_genapiIsPartialUnmapSupported(struct GenericEngineApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset)); } // genapiMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_genapiMapTo(struct GenericEngineApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_genapiMapTo(struct GenericEngineApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset), pParams); } // genapiUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_genapiUnmapFrom(struct GenericEngineApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_genapiUnmapFrom(struct GenericEngineApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset), pParams); } // genapiGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_genapiGetRefCount(struct GenericEngineApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_genapiGetRefCount(struct GenericEngineApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset)); } // genapiAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_genapiAddAdditionalDependants(struct RsClient *pClient, struct GenericEngineApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_genapiAddAdditionalDependants(struct RsClient *pClient, struct GenericEngineApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GenericEngineApi_RsResource.offset), pReference); } const struct NVOC_EXPORT_INFO __nvoc_export_info_GenericEngineApi = { - /*numEntries=*/ 3, + /*numEntries=*/ 4, /*pExportEntries=*/ __nvoc_exported_method_def_GenericEngineApi }; @@ -318,18 +401,6 @@ NV_STATUS __nvoc_ctor_GenericEngineApi(GenericEngineApi *pThis, struct CALL_CONT static void __nvoc_init_funcTable_GenericEngineApi_1(GenericEngineApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // genapiMap -- virtual override (res) base (gpures) - pThis->__genapiMap__ = &genapiMap_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresMap__ = &__nvoc_down_thunk_GenericEngineApi_gpuresMap; - - // genapiGetMapAddrSpace -- virtual override (gpures) base (gpures) - pThis->__genapiGetMapAddrSpace__ = &genapiGetMapAddrSpace_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_down_thunk_GenericEngineApi_gpuresGetMapAddrSpace; - - // genapiControl -- virtual override (res) base (gpures) - pThis->__genapiControl__ = &genapiControl_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresControl__ = &__nvoc_down_thunk_GenericEngineApi_gpuresControl; - // genapiCtrlCmdMasterGetErrorIntrOffsetMask -- exported (id=0x90e60101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__genapiCtrlCmdMasterGetErrorIntrOffsetMask__ = &genapiCtrlCmdMasterGetErrorIntrOffsetMask_IMPL; @@ -345,78 +416,124 @@ static void __nvoc_init_funcTable_GenericEngineApi_1(GenericEngineApi *pThis) { pThis->__genapiCtrlCmdBBXGetLastFlushTime__ = &genapiCtrlCmdBBXGetLastFlushTime_IMPL; #endif - // genapiUnmap -- virtual inherited (gpures) base (gpures) - pThis->__genapiUnmap__ = &__nvoc_up_thunk_GpuResource_genapiUnmap; - - // genapiShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__genapiShareCallback__ = &__nvoc_up_thunk_GpuResource_genapiShareCallback; - - // genapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__genapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_genapiGetRegBaseOffsetAndSize; - - // genapiInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__genapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_genapiInternalControlForward; - - // genapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__genapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_genapiGetInternalObjectHandle; - - // genapiAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__genapiAccessCallback__ = &__nvoc_up_thunk_RmResource_genapiAccessCallback; - - // genapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__genapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_genapiGetMemInterMapParams; - - // genapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__genapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_genapiCheckMemInterUnmap; - - // genapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__genapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_genapiGetMemoryMappingDescriptor; - - // genapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__genapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_genapiControlSerialization_Prologue; - - // genapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__genapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_genapiControlSerialization_Epilogue; - - // genapiControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__genapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_genapiControl_Prologue; - - // genapiControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__genapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_genapiControl_Epilogue; - - // genapiCanCopy -- virtual inherited (res) base (gpures) - pThis->__genapiCanCopy__ = &__nvoc_up_thunk_RsResource_genapiCanCopy; - - // genapiIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__genapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_genapiIsDuplicate; - - // genapiPreDestruct -- virtual inherited (res) base (gpures) - pThis->__genapiPreDestruct__ = &__nvoc_up_thunk_RsResource_genapiPreDestruct; - - // genapiControlFilter -- virtual inherited (res) base (gpures) - pThis->__genapiControlFilter__ = &__nvoc_up_thunk_RsResource_genapiControlFilter; - - // genapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__genapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_genapiIsPartialUnmapSupported; - - // genapiMapTo -- virtual inherited (res) base (gpures) - pThis->__genapiMapTo__ = &__nvoc_up_thunk_RsResource_genapiMapTo; - - // genapiUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__genapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_genapiUnmapFrom; - - // genapiGetRefCount -- virtual inherited (res) base (gpures) - pThis->__genapiGetRefCount__ = &__nvoc_up_thunk_RsResource_genapiGetRefCount; - - // genapiAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__genapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_genapiAddAdditionalDependants; -} // End __nvoc_init_funcTable_GenericEngineApi_1 with approximately 31 basic block(s). + // genapiCtrlCmdBBXIsNVMFlushEnabled -- exported (id=0x90e70119) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x58u) + pThis->__genapiCtrlCmdBBXIsNVMFlushEnabled__ = &genapiCtrlCmdBBXIsNVMFlushEnabled_IMPL; +#endif +} // End __nvoc_init_funcTable_GenericEngineApi_1 with approximately 4 basic block(s). -// Initialize vtable(s) for 28 virtual method(s). +// Initialize vtable(s) for 29 virtual method(s). void __nvoc_init_funcTable_GenericEngineApi(GenericEngineApi *pThis) { - // Initialize vtable(s) with 28 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__GenericEngineApi vtable = { + .__genapiMap__ = &genapiMap_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresMap__ = &__nvoc_down_thunk_GenericEngineApi_gpuresMap, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__genapiGetMapAddrSpace__ = &genapiGetMapAddrSpace_IMPL, // virtual override (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_down_thunk_GenericEngineApi_gpuresGetMapAddrSpace, // virtual + .__genapiControl__ = &genapiControl_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresControl__ = &__nvoc_down_thunk_GenericEngineApi_gpuresControl, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x58u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x58u) +#endif + .__genapiUnmap__ = &__nvoc_up_thunk_GpuResource_genapiUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__genapiShareCallback__ = &__nvoc_up_thunk_GpuResource_genapiShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__genapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_genapiGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__genapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_genapiInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__genapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_genapiGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__genapiAccessCallback__ = &__nvoc_up_thunk_RmResource_genapiAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__genapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_genapiGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__genapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_genapiCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__genapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_genapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__genapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_genapiControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__genapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_genapiControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__genapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_genapiControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__genapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_genapiControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__genapiCanCopy__ = &__nvoc_up_thunk_RsResource_genapiCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__genapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_genapiIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__genapiPreDestruct__ = &__nvoc_up_thunk_RsResource_genapiPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__genapiControlFilter__ = &__nvoc_up_thunk_RsResource_genapiControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__genapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_genapiIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__genapiMapTo__ = &__nvoc_up_thunk_RsResource_genapiMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__genapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_genapiUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__genapiGetRefCount__ = &__nvoc_up_thunk_RsResource_genapiGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__genapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_genapiAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (genapi) this + + // Initialize vtable(s) with 4 per-object function pointer(s). __nvoc_init_funcTable_GenericEngineApi_1(pThis); } diff --git a/src/nvidia/generated/g_generic_engine_nvoc.h b/src/nvidia/generated/g_generic_engine_nvoc.h index 6df7c04736..8c0ecdfd8c 100644 --- a/src/nvidia/generated/g_generic_engine_nvoc.h +++ b/src/nvidia/generated/g_generic_engine_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -62,10 +62,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__GenericEngineApi; + + struct GenericEngineApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__GenericEngineApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -78,13 +83,21 @@ struct GenericEngineApi { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct GenericEngineApi *__nvoc_pbase_GenericEngineApi; // genapi - // Vtable with 28 per-object function pointers - NV_STATUS (*__genapiMap__)(struct GenericEngineApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual override (res) base (gpures) - NV_STATUS (*__genapiGetMapAddrSpace__)(struct GenericEngineApi * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (gpures) base (gpures) - NV_STATUS (*__genapiControl__)(struct GenericEngineApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (gpures) + // Vtable with 4 per-object function pointers NV_STATUS (*__genapiCtrlCmdMasterGetErrorIntrOffsetMask__)(struct GenericEngineApi * /*this*/, NV90E6_CTRL_MASTER_GET_ERROR_INTR_OFFSET_MASK_PARAMS *); // exported (id=0x90e60101) NV_STATUS (*__genapiCtrlCmdMasterGetVirtualFunctionErrorContIntrMask__)(struct GenericEngineApi * /*this*/, NV90E6_CTRL_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK_PARAMS *); // exported (id=0x90e60102) NV_STATUS (*__genapiCtrlCmdBBXGetLastFlushTime__)(struct GenericEngineApi * /*this*/, NV90E7_CTRL_BBX_GET_LAST_FLUSH_TIME_PARAMS *); // exported (id=0x90e70113) + NV_STATUS (*__genapiCtrlCmdBBXIsNVMFlushEnabled__)(struct GenericEngineApi * /*this*/, NV90E7_CTRL_BBX_IS_NVM_FLUSH_ENABLED_PARAMS *); // exported (id=0x90e70119) +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__GenericEngineApi { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + + NV_STATUS (*__genapiMap__)(struct GenericEngineApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual override (res) base (gpures) + NV_STATUS (*__genapiGetMapAddrSpace__)(struct GenericEngineApi * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (gpures) base (gpures) + NV_STATUS (*__genapiControl__)(struct GenericEngineApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (gpures) NV_STATUS (*__genapiUnmap__)(struct GenericEngineApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NvBool (*__genapiShareCallback__)(struct GenericEngineApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__genapiGetRegBaseOffsetAndSize__)(struct GenericEngineApi * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) @@ -139,11 +152,11 @@ NV_STATUS __nvoc_objCreate_GenericEngineApi(GenericEngineApi**, Dynamic*, NvU32, // Wrapper macros -#define genapiMap_FNPTR(pGenericEngineApi) pGenericEngineApi->__genapiMap__ +#define genapiMap_FNPTR(pGenericEngineApi) pGenericEngineApi->__nvoc_vtable->__genapiMap__ #define genapiMap(pGenericEngineApi, pCallContext, pParams, pCpuMapping) genapiMap_DISPATCH(pGenericEngineApi, pCallContext, pParams, pCpuMapping) -#define genapiGetMapAddrSpace_FNPTR(pGenericEngineApi) pGenericEngineApi->__genapiGetMapAddrSpace__ +#define genapiGetMapAddrSpace_FNPTR(pGenericEngineApi) pGenericEngineApi->__nvoc_vtable->__genapiGetMapAddrSpace__ #define genapiGetMapAddrSpace(pGenericEngineApi, pCallContext, mapFlags, pAddrSpace) genapiGetMapAddrSpace_DISPATCH(pGenericEngineApi, pCallContext, mapFlags, pAddrSpace) -#define genapiControl_FNPTR(pGenericEngineApi) pGenericEngineApi->__genapiControl__ +#define genapiControl_FNPTR(pGenericEngineApi) pGenericEngineApi->__nvoc_vtable->__genapiControl__ #define genapiControl(pGenericEngineApi, pCallContext, pParams) genapiControl_DISPATCH(pGenericEngineApi, pCallContext, pParams) #define genapiCtrlCmdMasterGetErrorIntrOffsetMask_FNPTR(pGenericEngineApi) pGenericEngineApi->__genapiCtrlCmdMasterGetErrorIntrOffsetMask__ #define genapiCtrlCmdMasterGetErrorIntrOffsetMask(pGenericEngineApi, pParams) genapiCtrlCmdMasterGetErrorIntrOffsetMask_DISPATCH(pGenericEngineApi, pParams) @@ -151,62 +164,64 @@ NV_STATUS __nvoc_objCreate_GenericEngineApi(GenericEngineApi**, Dynamic*, NvU32, #define genapiCtrlCmdMasterGetVirtualFunctionErrorContIntrMask(pGenericEngineApi, pParams) genapiCtrlCmdMasterGetVirtualFunctionErrorContIntrMask_DISPATCH(pGenericEngineApi, pParams) #define genapiCtrlCmdBBXGetLastFlushTime_FNPTR(pGenericEngineApi) pGenericEngineApi->__genapiCtrlCmdBBXGetLastFlushTime__ #define genapiCtrlCmdBBXGetLastFlushTime(pGenericEngineApi, pParams) genapiCtrlCmdBBXGetLastFlushTime_DISPATCH(pGenericEngineApi, pParams) -#define genapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define genapiCtrlCmdBBXIsNVMFlushEnabled_FNPTR(pGenericEngineApi) pGenericEngineApi->__genapiCtrlCmdBBXIsNVMFlushEnabled__ +#define genapiCtrlCmdBBXIsNVMFlushEnabled(pGenericEngineApi, pParams) genapiCtrlCmdBBXIsNVMFlushEnabled_DISPATCH(pGenericEngineApi, pParams) +#define genapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define genapiUnmap(pGpuResource, pCallContext, pCpuMapping) genapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define genapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define genapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define genapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) genapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define genapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define genapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define genapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) genapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define genapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define genapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define genapiInternalControlForward(pGpuResource, command, pParams, size) genapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define genapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define genapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define genapiGetInternalObjectHandle(pGpuResource) genapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define genapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define genapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define genapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) genapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define genapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define genapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define genapiGetMemInterMapParams(pRmResource, pParams) genapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define genapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define genapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define genapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) genapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define genapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define genapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define genapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) genapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define genapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define genapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define genapiControlSerialization_Prologue(pResource, pCallContext, pParams) genapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define genapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define genapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define genapiControlSerialization_Epilogue(pResource, pCallContext, pParams) genapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define genapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define genapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define genapiControl_Prologue(pResource, pCallContext, pParams) genapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define genapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define genapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define genapiControl_Epilogue(pResource, pCallContext, pParams) genapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define genapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define genapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define genapiCanCopy(pResource) genapiCanCopy_DISPATCH(pResource) -#define genapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define genapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define genapiIsDuplicate(pResource, hMemory, pDuplicate) genapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define genapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define genapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define genapiPreDestruct(pResource) genapiPreDestruct_DISPATCH(pResource) -#define genapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define genapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define genapiControlFilter(pResource, pCallContext, pParams) genapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define genapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define genapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define genapiIsPartialUnmapSupported(pResource) genapiIsPartialUnmapSupported_DISPATCH(pResource) -#define genapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define genapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define genapiMapTo(pResource, pParams) genapiMapTo_DISPATCH(pResource, pParams) -#define genapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define genapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define genapiUnmapFrom(pResource, pParams) genapiUnmapFrom_DISPATCH(pResource, pParams) -#define genapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define genapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define genapiGetRefCount(pResource) genapiGetRefCount_DISPATCH(pResource) -#define genapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define genapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define genapiAddAdditionalDependants(pClient, pResource, pReference) genapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NV_STATUS genapiMap_DISPATCH(struct GenericEngineApi *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGenericEngineApi->__genapiMap__(pGenericEngineApi, pCallContext, pParams, pCpuMapping); + return pGenericEngineApi->__nvoc_vtable->__genapiMap__(pGenericEngineApi, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS genapiGetMapAddrSpace_DISPATCH(struct GenericEngineApi *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGenericEngineApi->__genapiGetMapAddrSpace__(pGenericEngineApi, pCallContext, mapFlags, pAddrSpace); + return pGenericEngineApi->__nvoc_vtable->__genapiGetMapAddrSpace__(pGenericEngineApi, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS genapiControl_DISPATCH(struct GenericEngineApi *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGenericEngineApi->__genapiControl__(pGenericEngineApi, pCallContext, pParams); + return pGenericEngineApi->__nvoc_vtable->__genapiControl__(pGenericEngineApi, pCallContext, pParams); } static inline NV_STATUS genapiCtrlCmdMasterGetErrorIntrOffsetMask_DISPATCH(struct GenericEngineApi *pGenericEngineApi, NV90E6_CTRL_MASTER_GET_ERROR_INTR_OFFSET_MASK_PARAMS *pParams) { @@ -221,92 +236,96 @@ static inline NV_STATUS genapiCtrlCmdBBXGetLastFlushTime_DISPATCH(struct Generic return pGenericEngineApi->__genapiCtrlCmdBBXGetLastFlushTime__(pGenericEngineApi, pParams); } +static inline NV_STATUS genapiCtrlCmdBBXIsNVMFlushEnabled_DISPATCH(struct GenericEngineApi *pGenericEngineApi, NV90E7_CTRL_BBX_IS_NVM_FLUSH_ENABLED_PARAMS *pParams) { + return pGenericEngineApi->__genapiCtrlCmdBBXIsNVMFlushEnabled__(pGenericEngineApi, pParams); +} + static inline NV_STATUS genapiUnmap_DISPATCH(struct GenericEngineApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__genapiUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__genapiUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool genapiShareCallback_DISPATCH(struct GenericEngineApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__genapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__genapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS genapiGetRegBaseOffsetAndSize_DISPATCH(struct GenericEngineApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__genapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__genapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS genapiInternalControlForward_DISPATCH(struct GenericEngineApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__genapiInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__genapiInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle genapiGetInternalObjectHandle_DISPATCH(struct GenericEngineApi *pGpuResource) { - return pGpuResource->__genapiGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__genapiGetInternalObjectHandle__(pGpuResource); } static inline NvBool genapiAccessCallback_DISPATCH(struct GenericEngineApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__genapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__genapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS genapiGetMemInterMapParams_DISPATCH(struct GenericEngineApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__genapiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__genapiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS genapiCheckMemInterUnmap_DISPATCH(struct GenericEngineApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__genapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__genapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS genapiGetMemoryMappingDescriptor_DISPATCH(struct GenericEngineApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__genapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__genapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS genapiControlSerialization_Prologue_DISPATCH(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__genapiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__genapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void genapiControlSerialization_Epilogue_DISPATCH(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__genapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__genapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS genapiControl_Prologue_DISPATCH(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__genapiControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__genapiControl_Prologue__(pResource, pCallContext, pParams); } static inline void genapiControl_Epilogue_DISPATCH(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__genapiControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__genapiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool genapiCanCopy_DISPATCH(struct GenericEngineApi *pResource) { - return pResource->__genapiCanCopy__(pResource); + return pResource->__nvoc_vtable->__genapiCanCopy__(pResource); } static inline NV_STATUS genapiIsDuplicate_DISPATCH(struct GenericEngineApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__genapiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__genapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void genapiPreDestruct_DISPATCH(struct GenericEngineApi *pResource) { - pResource->__genapiPreDestruct__(pResource); + pResource->__nvoc_vtable->__genapiPreDestruct__(pResource); } static inline NV_STATUS genapiControlFilter_DISPATCH(struct GenericEngineApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__genapiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__genapiControlFilter__(pResource, pCallContext, pParams); } static inline NvBool genapiIsPartialUnmapSupported_DISPATCH(struct GenericEngineApi *pResource) { - return pResource->__genapiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__genapiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS genapiMapTo_DISPATCH(struct GenericEngineApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__genapiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__genapiMapTo__(pResource, pParams); } static inline NV_STATUS genapiUnmapFrom_DISPATCH(struct GenericEngineApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__genapiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__genapiUnmapFrom__(pResource, pParams); } static inline NvU32 genapiGetRefCount_DISPATCH(struct GenericEngineApi *pResource) { - return pResource->__genapiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__genapiGetRefCount__(pResource); } static inline void genapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct GenericEngineApi *pResource, RsResourceRef *pReference) { - pResource->__genapiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__genapiAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS genapiMap_IMPL(struct GenericEngineApi *pGenericEngineApi, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); @@ -321,6 +340,8 @@ NV_STATUS genapiCtrlCmdMasterGetVirtualFunctionErrorContIntrMask_IMPL(struct Gen NV_STATUS genapiCtrlCmdBBXGetLastFlushTime_IMPL(struct GenericEngineApi *pGenericEngineApi, NV90E7_CTRL_BBX_GET_LAST_FLUSH_TIME_PARAMS *pParams); +NV_STATUS genapiCtrlCmdBBXIsNVMFlushEnabled_IMPL(struct GenericEngineApi *pGenericEngineApi, NV90E7_CTRL_BBX_IS_NVM_FLUSH_ENABLED_PARAMS *pParams); + NV_STATUS genapiConstruct_IMPL(struct GenericEngineApi *arg_pGenericEngineApi, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_genapiConstruct(arg_pGenericEngineApi, arg_pCallContext, arg_pParams) genapiConstruct_IMPL(arg_pGenericEngineApi, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_gpu_access_nvoc.c b/src/nvidia/generated/g_gpu_access_nvoc.c index ad0f6cb1e5..0b4ef1e2b2 100644 --- a/src/nvidia/generated/g_gpu_access_nvoc.c +++ b/src/nvidia/generated/g_gpu_access_nvoc.c @@ -66,49 +66,61 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_IoAperture = /*pExportInfo=*/ &__nvoc_export_info_IoAperture }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvU8 __nvoc_down_thunk_IoAperture_regaprtReadReg08(struct RegisterAperture *pAperture, NvU32 addr); // this +NvU16 __nvoc_down_thunk_IoAperture_regaprtReadReg16(struct RegisterAperture *pAperture, NvU32 addr); // this +NvU32 __nvoc_down_thunk_IoAperture_regaprtReadReg32(struct RegisterAperture *pAperture, NvU32 addr); // this +void __nvoc_down_thunk_IoAperture_regaprtWriteReg08(struct RegisterAperture *pAperture, NvU32 addr, NvV8 value); // this +void __nvoc_down_thunk_IoAperture_regaprtWriteReg16(struct RegisterAperture *pAperture, NvU32 addr, NvV16 value); // this +void __nvoc_down_thunk_IoAperture_regaprtWriteReg32(struct RegisterAperture *pAperture, NvU32 addr, NvV32 value); // this +void __nvoc_down_thunk_IoAperture_regaprtWriteReg32Uc(struct RegisterAperture *pAperture, NvU32 addr, NvV32 value); // this +NvBool __nvoc_down_thunk_IoAperture_regaprtIsRegValid(struct RegisterAperture *pAperture, NvU32 addr); // this + // 8 down-thunk(s) defined to bridge methods in IoAperture from superclasses // ioaprtReadReg08: virtual override (regaprt) base (regaprt) -static NvU8 __nvoc_down_thunk_IoAperture_regaprtReadReg08(struct RegisterAperture *pAperture, NvU32 addr) { +NvU8 __nvoc_down_thunk_IoAperture_regaprtReadReg08(struct RegisterAperture *pAperture, NvU32 addr) { return ioaprtReadReg08((struct IoAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr); } // ioaprtReadReg16: virtual override (regaprt) base (regaprt) -static NvU16 __nvoc_down_thunk_IoAperture_regaprtReadReg16(struct RegisterAperture *pAperture, NvU32 addr) { +NvU16 __nvoc_down_thunk_IoAperture_regaprtReadReg16(struct RegisterAperture *pAperture, NvU32 addr) { return ioaprtReadReg16((struct IoAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr); } // ioaprtReadReg32: virtual override (regaprt) base (regaprt) -static NvU32 __nvoc_down_thunk_IoAperture_regaprtReadReg32(struct RegisterAperture *pAperture, NvU32 addr) { +NvU32 __nvoc_down_thunk_IoAperture_regaprtReadReg32(struct RegisterAperture *pAperture, NvU32 addr) { return ioaprtReadReg32((struct IoAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr); } // ioaprtWriteReg08: virtual override (regaprt) base (regaprt) -static void __nvoc_down_thunk_IoAperture_regaprtWriteReg08(struct RegisterAperture *pAperture, NvU32 addr, NvV8 value) { +void __nvoc_down_thunk_IoAperture_regaprtWriteReg08(struct RegisterAperture *pAperture, NvU32 addr, NvV8 value) { ioaprtWriteReg08((struct IoAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr, value); } // ioaprtWriteReg16: virtual override (regaprt) base (regaprt) -static void __nvoc_down_thunk_IoAperture_regaprtWriteReg16(struct RegisterAperture *pAperture, NvU32 addr, NvV16 value) { +void __nvoc_down_thunk_IoAperture_regaprtWriteReg16(struct RegisterAperture *pAperture, NvU32 addr, NvV16 value) { ioaprtWriteReg16((struct IoAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr, value); } // ioaprtWriteReg32: virtual override (regaprt) base (regaprt) -static void __nvoc_down_thunk_IoAperture_regaprtWriteReg32(struct RegisterAperture *pAperture, NvU32 addr, NvV32 value) { +void __nvoc_down_thunk_IoAperture_regaprtWriteReg32(struct RegisterAperture *pAperture, NvU32 addr, NvV32 value) { ioaprtWriteReg32((struct IoAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr, value); } // ioaprtWriteReg32Uc: virtual override (regaprt) base (regaprt) -static void __nvoc_down_thunk_IoAperture_regaprtWriteReg32Uc(struct RegisterAperture *pAperture, NvU32 addr, NvV32 value) { +void __nvoc_down_thunk_IoAperture_regaprtWriteReg32Uc(struct RegisterAperture *pAperture, NvU32 addr, NvV32 value) { ioaprtWriteReg32Uc((struct IoAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr, value); } // ioaprtIsRegValid: virtual override (regaprt) base (regaprt) -static NvBool __nvoc_down_thunk_IoAperture_regaprtIsRegValid(struct RegisterAperture *pAperture, NvU32 addr) { +NvBool __nvoc_down_thunk_IoAperture_regaprtIsRegValid(struct RegisterAperture *pAperture, NvU32 addr) { return ioaprtIsRegValid((struct IoAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_IoAperture_RegisterAperture.offset), addr); } +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_IoAperture = { /*numEntries=*/ 0, @@ -154,45 +166,35 @@ NV_STATUS __nvoc_ctor_IoAperture(IoAperture *pThis, struct IoAperture * arg_pPar // Vtable initialization static void __nvoc_init_funcTable_IoAperture_1(IoAperture *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // ioaprtReadReg08 -- virtual override (regaprt) base (regaprt) - pThis->__ioaprtReadReg08__ = &ioaprtReadReg08_IMPL; - pThis->__nvoc_base_RegisterAperture.__regaprtReadReg08__ = &__nvoc_down_thunk_IoAperture_regaprtReadReg08; - - // ioaprtReadReg16 -- virtual override (regaprt) base (regaprt) - pThis->__ioaprtReadReg16__ = &ioaprtReadReg16_IMPL; - pThis->__nvoc_base_RegisterAperture.__regaprtReadReg16__ = &__nvoc_down_thunk_IoAperture_regaprtReadReg16; - - // ioaprtReadReg32 -- virtual override (regaprt) base (regaprt) - pThis->__ioaprtReadReg32__ = &ioaprtReadReg32_IMPL; - pThis->__nvoc_base_RegisterAperture.__regaprtReadReg32__ = &__nvoc_down_thunk_IoAperture_regaprtReadReg32; - - // ioaprtWriteReg08 -- virtual override (regaprt) base (regaprt) - pThis->__ioaprtWriteReg08__ = &ioaprtWriteReg08_IMPL; - pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg08__ = &__nvoc_down_thunk_IoAperture_regaprtWriteReg08; - - // ioaprtWriteReg16 -- virtual override (regaprt) base (regaprt) - pThis->__ioaprtWriteReg16__ = &ioaprtWriteReg16_IMPL; - pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg16__ = &__nvoc_down_thunk_IoAperture_regaprtWriteReg16; - - // ioaprtWriteReg32 -- virtual override (regaprt) base (regaprt) - pThis->__ioaprtWriteReg32__ = &ioaprtWriteReg32_IMPL; - pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg32__ = &__nvoc_down_thunk_IoAperture_regaprtWriteReg32; - - // ioaprtWriteReg32Uc -- virtual override (regaprt) base (regaprt) - pThis->__ioaprtWriteReg32Uc__ = &ioaprtWriteReg32Uc_IMPL; - pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg32Uc__ = &__nvoc_down_thunk_IoAperture_regaprtWriteReg32Uc; - - // ioaprtIsRegValid -- virtual override (regaprt) base (regaprt) - pThis->__ioaprtIsRegValid__ = &ioaprtIsRegValid_IMPL; - pThis->__nvoc_base_RegisterAperture.__regaprtIsRegValid__ = &__nvoc_down_thunk_IoAperture_regaprtIsRegValid; -} // End __nvoc_init_funcTable_IoAperture_1 with approximately 16 basic block(s). +} // End __nvoc_init_funcTable_IoAperture_1 // Initialize vtable(s) for 8 virtual method(s). void __nvoc_init_funcTable_IoAperture(IoAperture *pThis) { - // Initialize vtable(s) with 8 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__IoAperture vtable = { + .__ioaprtReadReg08__ = &ioaprtReadReg08_IMPL, // virtual override (regaprt) base (regaprt) + .RegisterAperture.__regaprtReadReg08__ = &__nvoc_down_thunk_IoAperture_regaprtReadReg08, // pure virtual + .__ioaprtReadReg16__ = &ioaprtReadReg16_IMPL, // virtual override (regaprt) base (regaprt) + .RegisterAperture.__regaprtReadReg16__ = &__nvoc_down_thunk_IoAperture_regaprtReadReg16, // pure virtual + .__ioaprtReadReg32__ = &ioaprtReadReg32_IMPL, // virtual override (regaprt) base (regaprt) + .RegisterAperture.__regaprtReadReg32__ = &__nvoc_down_thunk_IoAperture_regaprtReadReg32, // pure virtual + .__ioaprtWriteReg08__ = &ioaprtWriteReg08_IMPL, // virtual override (regaprt) base (regaprt) + .RegisterAperture.__regaprtWriteReg08__ = &__nvoc_down_thunk_IoAperture_regaprtWriteReg08, // pure virtual + .__ioaprtWriteReg16__ = &ioaprtWriteReg16_IMPL, // virtual override (regaprt) base (regaprt) + .RegisterAperture.__regaprtWriteReg16__ = &__nvoc_down_thunk_IoAperture_regaprtWriteReg16, // pure virtual + .__ioaprtWriteReg32__ = &ioaprtWriteReg32_IMPL, // virtual override (regaprt) base (regaprt) + .RegisterAperture.__regaprtWriteReg32__ = &__nvoc_down_thunk_IoAperture_regaprtWriteReg32, // pure virtual + .__ioaprtWriteReg32Uc__ = &ioaprtWriteReg32Uc_IMPL, // virtual override (regaprt) base (regaprt) + .RegisterAperture.__regaprtWriteReg32Uc__ = &__nvoc_down_thunk_IoAperture_regaprtWriteReg32Uc, // pure virtual + .__ioaprtIsRegValid__ = &ioaprtIsRegValid_IMPL, // virtual override (regaprt) base (regaprt) + .RegisterAperture.__regaprtIsRegValid__ = &__nvoc_down_thunk_IoAperture_regaprtIsRegValid, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RegisterAperture.__nvoc_vtable = &vtable.RegisterAperture; // (regaprt) super + pThis->__nvoc_vtable = &vtable; // (ioaprt) this __nvoc_init_funcTable_IoAperture_1(pThis); } @@ -340,49 +342,61 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_SwBcAperture = /*pExportInfo=*/ &__nvoc_export_info_SwBcAperture }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvU8 __nvoc_down_thunk_SwBcAperture_regaprtReadReg08(struct RegisterAperture *pAperture, NvU32 addr); // this +NvU16 __nvoc_down_thunk_SwBcAperture_regaprtReadReg16(struct RegisterAperture *pAperture, NvU32 addr); // this +NvU32 __nvoc_down_thunk_SwBcAperture_regaprtReadReg32(struct RegisterAperture *pAperture, NvU32 addr); // this +void __nvoc_down_thunk_SwBcAperture_regaprtWriteReg08(struct RegisterAperture *pAperture, NvU32 addr, NvV8 value); // this +void __nvoc_down_thunk_SwBcAperture_regaprtWriteReg16(struct RegisterAperture *pAperture, NvU32 addr, NvV16 value); // this +void __nvoc_down_thunk_SwBcAperture_regaprtWriteReg32(struct RegisterAperture *pAperture, NvU32 addr, NvV32 value); // this +void __nvoc_down_thunk_SwBcAperture_regaprtWriteReg32Uc(struct RegisterAperture *pAperture, NvU32 addr, NvV32 value); // this +NvBool __nvoc_down_thunk_SwBcAperture_regaprtIsRegValid(struct RegisterAperture *pAperture, NvU32 addr); // this + // 8 down-thunk(s) defined to bridge methods in SwBcAperture from superclasses // swbcaprtReadReg08: virtual override (regaprt) base (regaprt) -static NvU8 __nvoc_down_thunk_SwBcAperture_regaprtReadReg08(struct RegisterAperture *pAperture, NvU32 addr) { +NvU8 __nvoc_down_thunk_SwBcAperture_regaprtReadReg08(struct RegisterAperture *pAperture, NvU32 addr) { return swbcaprtReadReg08((struct SwBcAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr); } // swbcaprtReadReg16: virtual override (regaprt) base (regaprt) -static NvU16 __nvoc_down_thunk_SwBcAperture_regaprtReadReg16(struct RegisterAperture *pAperture, NvU32 addr) { +NvU16 __nvoc_down_thunk_SwBcAperture_regaprtReadReg16(struct RegisterAperture *pAperture, NvU32 addr) { return swbcaprtReadReg16((struct SwBcAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr); } // swbcaprtReadReg32: virtual override (regaprt) base (regaprt) -static NvU32 __nvoc_down_thunk_SwBcAperture_regaprtReadReg32(struct RegisterAperture *pAperture, NvU32 addr) { +NvU32 __nvoc_down_thunk_SwBcAperture_regaprtReadReg32(struct RegisterAperture *pAperture, NvU32 addr) { return swbcaprtReadReg32((struct SwBcAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr); } // swbcaprtWriteReg08: virtual override (regaprt) base (regaprt) -static void __nvoc_down_thunk_SwBcAperture_regaprtWriteReg08(struct RegisterAperture *pAperture, NvU32 addr, NvV8 value) { +void __nvoc_down_thunk_SwBcAperture_regaprtWriteReg08(struct RegisterAperture *pAperture, NvU32 addr, NvV8 value) { swbcaprtWriteReg08((struct SwBcAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr, value); } // swbcaprtWriteReg16: virtual override (regaprt) base (regaprt) -static void __nvoc_down_thunk_SwBcAperture_regaprtWriteReg16(struct RegisterAperture *pAperture, NvU32 addr, NvV16 value) { +void __nvoc_down_thunk_SwBcAperture_regaprtWriteReg16(struct RegisterAperture *pAperture, NvU32 addr, NvV16 value) { swbcaprtWriteReg16((struct SwBcAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr, value); } // swbcaprtWriteReg32: virtual override (regaprt) base (regaprt) -static void __nvoc_down_thunk_SwBcAperture_regaprtWriteReg32(struct RegisterAperture *pAperture, NvU32 addr, NvV32 value) { +void __nvoc_down_thunk_SwBcAperture_regaprtWriteReg32(struct RegisterAperture *pAperture, NvU32 addr, NvV32 value) { swbcaprtWriteReg32((struct SwBcAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr, value); } // swbcaprtWriteReg32Uc: virtual override (regaprt) base (regaprt) -static void __nvoc_down_thunk_SwBcAperture_regaprtWriteReg32Uc(struct RegisterAperture *pAperture, NvU32 addr, NvV32 value) { +void __nvoc_down_thunk_SwBcAperture_regaprtWriteReg32Uc(struct RegisterAperture *pAperture, NvU32 addr, NvV32 value) { swbcaprtWriteReg32Uc((struct SwBcAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr, value); } // swbcaprtIsRegValid: virtual override (regaprt) base (regaprt) -static NvBool __nvoc_down_thunk_SwBcAperture_regaprtIsRegValid(struct RegisterAperture *pAperture, NvU32 addr) { +NvBool __nvoc_down_thunk_SwBcAperture_regaprtIsRegValid(struct RegisterAperture *pAperture, NvU32 addr) { return swbcaprtIsRegValid((struct SwBcAperture *)(((unsigned char *) pAperture) - __nvoc_rtti_SwBcAperture_RegisterAperture.offset), addr); } +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_SwBcAperture = { /*numEntries=*/ 0, @@ -428,45 +442,35 @@ NV_STATUS __nvoc_ctor_SwBcAperture(SwBcAperture *pThis, struct IoAperture * arg_ // Vtable initialization static void __nvoc_init_funcTable_SwBcAperture_1(SwBcAperture *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // swbcaprtReadReg08 -- virtual override (regaprt) base (regaprt) - pThis->__swbcaprtReadReg08__ = &swbcaprtReadReg08_IMPL; - pThis->__nvoc_base_RegisterAperture.__regaprtReadReg08__ = &__nvoc_down_thunk_SwBcAperture_regaprtReadReg08; - - // swbcaprtReadReg16 -- virtual override (regaprt) base (regaprt) - pThis->__swbcaprtReadReg16__ = &swbcaprtReadReg16_IMPL; - pThis->__nvoc_base_RegisterAperture.__regaprtReadReg16__ = &__nvoc_down_thunk_SwBcAperture_regaprtReadReg16; - - // swbcaprtReadReg32 -- virtual override (regaprt) base (regaprt) - pThis->__swbcaprtReadReg32__ = &swbcaprtReadReg32_IMPL; - pThis->__nvoc_base_RegisterAperture.__regaprtReadReg32__ = &__nvoc_down_thunk_SwBcAperture_regaprtReadReg32; - - // swbcaprtWriteReg08 -- virtual override (regaprt) base (regaprt) - pThis->__swbcaprtWriteReg08__ = &swbcaprtWriteReg08_IMPL; - pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg08__ = &__nvoc_down_thunk_SwBcAperture_regaprtWriteReg08; - - // swbcaprtWriteReg16 -- virtual override (regaprt) base (regaprt) - pThis->__swbcaprtWriteReg16__ = &swbcaprtWriteReg16_IMPL; - pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg16__ = &__nvoc_down_thunk_SwBcAperture_regaprtWriteReg16; - - // swbcaprtWriteReg32 -- virtual override (regaprt) base (regaprt) - pThis->__swbcaprtWriteReg32__ = &swbcaprtWriteReg32_IMPL; - pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg32__ = &__nvoc_down_thunk_SwBcAperture_regaprtWriteReg32; - - // swbcaprtWriteReg32Uc -- virtual override (regaprt) base (regaprt) - pThis->__swbcaprtWriteReg32Uc__ = &swbcaprtWriteReg32Uc_IMPL; - pThis->__nvoc_base_RegisterAperture.__regaprtWriteReg32Uc__ = &__nvoc_down_thunk_SwBcAperture_regaprtWriteReg32Uc; - - // swbcaprtIsRegValid -- virtual override (regaprt) base (regaprt) - pThis->__swbcaprtIsRegValid__ = &swbcaprtIsRegValid_IMPL; - pThis->__nvoc_base_RegisterAperture.__regaprtIsRegValid__ = &__nvoc_down_thunk_SwBcAperture_regaprtIsRegValid; -} // End __nvoc_init_funcTable_SwBcAperture_1 with approximately 16 basic block(s). +} // End __nvoc_init_funcTable_SwBcAperture_1 // Initialize vtable(s) for 8 virtual method(s). void __nvoc_init_funcTable_SwBcAperture(SwBcAperture *pThis) { - // Initialize vtable(s) with 8 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__SwBcAperture vtable = { + .__swbcaprtReadReg08__ = &swbcaprtReadReg08_IMPL, // virtual override (regaprt) base (regaprt) + .RegisterAperture.__regaprtReadReg08__ = &__nvoc_down_thunk_SwBcAperture_regaprtReadReg08, // pure virtual + .__swbcaprtReadReg16__ = &swbcaprtReadReg16_IMPL, // virtual override (regaprt) base (regaprt) + .RegisterAperture.__regaprtReadReg16__ = &__nvoc_down_thunk_SwBcAperture_regaprtReadReg16, // pure virtual + .__swbcaprtReadReg32__ = &swbcaprtReadReg32_IMPL, // virtual override (regaprt) base (regaprt) + .RegisterAperture.__regaprtReadReg32__ = &__nvoc_down_thunk_SwBcAperture_regaprtReadReg32, // pure virtual + .__swbcaprtWriteReg08__ = &swbcaprtWriteReg08_IMPL, // virtual override (regaprt) base (regaprt) + .RegisterAperture.__regaprtWriteReg08__ = &__nvoc_down_thunk_SwBcAperture_regaprtWriteReg08, // pure virtual + .__swbcaprtWriteReg16__ = &swbcaprtWriteReg16_IMPL, // virtual override (regaprt) base (regaprt) + .RegisterAperture.__regaprtWriteReg16__ = &__nvoc_down_thunk_SwBcAperture_regaprtWriteReg16, // pure virtual + .__swbcaprtWriteReg32__ = &swbcaprtWriteReg32_IMPL, // virtual override (regaprt) base (regaprt) + .RegisterAperture.__regaprtWriteReg32__ = &__nvoc_down_thunk_SwBcAperture_regaprtWriteReg32, // pure virtual + .__swbcaprtWriteReg32Uc__ = &swbcaprtWriteReg32Uc_IMPL, // virtual override (regaprt) base (regaprt) + .RegisterAperture.__regaprtWriteReg32Uc__ = &__nvoc_down_thunk_SwBcAperture_regaprtWriteReg32Uc, // pure virtual + .__swbcaprtIsRegValid__ = &swbcaprtIsRegValid_IMPL, // virtual override (regaprt) base (regaprt) + .RegisterAperture.__regaprtIsRegValid__ = &__nvoc_down_thunk_SwBcAperture_regaprtIsRegValid, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RegisterAperture.__nvoc_vtable = &vtable.RegisterAperture; // (regaprt) super + pThis->__nvoc_vtable = &vtable; // (swbcaprt) this __nvoc_init_funcTable_SwBcAperture_1(pThis); } diff --git a/src/nvidia/generated/g_gpu_access_nvoc.h b/src/nvidia/generated/g_gpu_access_nvoc.h index c899186327..bf749f0356 100644 --- a/src/nvidia/generated/g_gpu_access_nvoc.h +++ b/src/nvidia/generated/g_gpu_access_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -49,6 +49,7 @@ extern "C" { #define MEM_RD08(a) (*(const volatile NvU8 *)(a)) #define MEM_RD16(a) (*(const volatile NvU16 *)(a)) #define MEM_RD32(a) (*(const volatile NvU32 *)(a)) +#define MEM_RD64(a) (*(const volatile NvU64 *)(a)) #define MEM_WR08(a, d) do { *(volatile NvU8 *)(a) = (d); } while (0) #define MEM_WR16(a, d) do { *(volatile NvU16 *)(a) = (d); } while (0) #define MEM_WR32(a, d) do { *(volatile NvU32 *)(a) = (d); } while (0) @@ -351,9 +352,9 @@ void gpuRegWr32Uc_dumpinfo(const char *func, const char *addrStr, const char *v #define PCI_FUNCTION_BUS_CFG_WR32_EX(g,f,r,d,t) gpuWriteFunctionConfigRegEx_HAL(g, f, r, d, t) -#define GPU_BUS_CFG_CYCLE_RD32(g,r,d) gpuReadBusConfigCycle(g, r, d) -#define GPU_BUS_CFG_CYCLE_WR32(g,r,d) gpuWriteBusConfigCycle(g, r, d) -#define GPU_BUS_CFG_CYCLE_FLD_WR_DRF_DEF(g,x,d,r,f,c) gpuWriteBusConfigCycle(g, NV##d##r,(x &~(GPU_DRF_MASK(NV##d##r##f)<__ioaprtReadReg08__ +#define ioaprtReadReg08_FNPTR(pAperture) pAperture->__nvoc_vtable->__ioaprtReadReg08__ #define ioaprtReadReg08(pAperture, addr) ioaprtReadReg08_DISPATCH(pAperture, addr) -#define ioaprtReadReg16_FNPTR(pAperture) pAperture->__ioaprtReadReg16__ +#define ioaprtReadReg16_FNPTR(pAperture) pAperture->__nvoc_vtable->__ioaprtReadReg16__ #define ioaprtReadReg16(pAperture, addr) ioaprtReadReg16_DISPATCH(pAperture, addr) -#define ioaprtReadReg32_FNPTR(pAperture) pAperture->__ioaprtReadReg32__ +#define ioaprtReadReg32_FNPTR(pAperture) pAperture->__nvoc_vtable->__ioaprtReadReg32__ #define ioaprtReadReg32(pAperture, addr) ioaprtReadReg32_DISPATCH(pAperture, addr) -#define ioaprtWriteReg08_FNPTR(pAperture) pAperture->__ioaprtWriteReg08__ +#define ioaprtWriteReg08_FNPTR(pAperture) pAperture->__nvoc_vtable->__ioaprtWriteReg08__ #define ioaprtWriteReg08(pAperture, addr, value) ioaprtWriteReg08_DISPATCH(pAperture, addr, value) -#define ioaprtWriteReg16_FNPTR(pAperture) pAperture->__ioaprtWriteReg16__ +#define ioaprtWriteReg16_FNPTR(pAperture) pAperture->__nvoc_vtable->__ioaprtWriteReg16__ #define ioaprtWriteReg16(pAperture, addr, value) ioaprtWriteReg16_DISPATCH(pAperture, addr, value) -#define ioaprtWriteReg32_FNPTR(pAperture) pAperture->__ioaprtWriteReg32__ +#define ioaprtWriteReg32_FNPTR(pAperture) pAperture->__nvoc_vtable->__ioaprtWriteReg32__ #define ioaprtWriteReg32(pAperture, addr, value) ioaprtWriteReg32_DISPATCH(pAperture, addr, value) -#define ioaprtWriteReg32Uc_FNPTR(pAperture) pAperture->__ioaprtWriteReg32Uc__ +#define ioaprtWriteReg32Uc_FNPTR(pAperture) pAperture->__nvoc_vtable->__ioaprtWriteReg32Uc__ #define ioaprtWriteReg32Uc(pAperture, addr, value) ioaprtWriteReg32Uc_DISPATCH(pAperture, addr, value) -#define ioaprtIsRegValid_FNPTR(pAperture) pAperture->__ioaprtIsRegValid__ +#define ioaprtIsRegValid_FNPTR(pAperture) pAperture->__nvoc_vtable->__ioaprtIsRegValid__ #define ioaprtIsRegValid(pAperture, addr) ioaprtIsRegValid_DISPATCH(pAperture, addr) // Dispatch functions static inline NvU8 ioaprtReadReg08_DISPATCH(struct IoAperture *pAperture, NvU32 addr) { - return pAperture->__ioaprtReadReg08__(pAperture, addr); + return pAperture->__nvoc_vtable->__ioaprtReadReg08__(pAperture, addr); } static inline NvU16 ioaprtReadReg16_DISPATCH(struct IoAperture *pAperture, NvU32 addr) { - return pAperture->__ioaprtReadReg16__(pAperture, addr); + return pAperture->__nvoc_vtable->__ioaprtReadReg16__(pAperture, addr); } static inline NvU32 ioaprtReadReg32_DISPATCH(struct IoAperture *pAperture, NvU32 addr) { - return pAperture->__ioaprtReadReg32__(pAperture, addr); + return pAperture->__nvoc_vtable->__ioaprtReadReg32__(pAperture, addr); } static inline void ioaprtWriteReg08_DISPATCH(struct IoAperture *pAperture, NvU32 addr, NvV8 value) { - pAperture->__ioaprtWriteReg08__(pAperture, addr, value); + pAperture->__nvoc_vtable->__ioaprtWriteReg08__(pAperture, addr, value); } static inline void ioaprtWriteReg16_DISPATCH(struct IoAperture *pAperture, NvU32 addr, NvV16 value) { - pAperture->__ioaprtWriteReg16__(pAperture, addr, value); + pAperture->__nvoc_vtable->__ioaprtWriteReg16__(pAperture, addr, value); } static inline void ioaprtWriteReg32_DISPATCH(struct IoAperture *pAperture, NvU32 addr, NvV32 value) { - pAperture->__ioaprtWriteReg32__(pAperture, addr, value); + pAperture->__nvoc_vtable->__ioaprtWriteReg32__(pAperture, addr, value); } static inline void ioaprtWriteReg32Uc_DISPATCH(struct IoAperture *pAperture, NvU32 addr, NvV32 value) { - pAperture->__ioaprtWriteReg32Uc__(pAperture, addr, value); + pAperture->__nvoc_vtable->__ioaprtWriteReg32Uc__(pAperture, addr, value); } static inline NvBool ioaprtIsRegValid_DISPATCH(struct IoAperture *pAperture, NvU32 addr) { - return pAperture->__ioaprtIsRegValid__(pAperture, addr); + return pAperture->__nvoc_vtable->__ioaprtIsRegValid__(pAperture, addr); } NvU8 ioaprtReadReg08_IMPL(struct IoAperture *pAperture, NvU32 addr); @@ -561,10 +572,15 @@ NV_STATUS ioaprtInit(struct IoAperture *pAperture, struct IoAperture *pParentApe #endif +// Metadata including vtable +struct NVOC_VTABLE__SwBcAperture; + + struct SwBcAperture { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__SwBcAperture *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; @@ -575,7 +591,16 @@ struct SwBcAperture { struct RegisterAperture *__nvoc_pbase_RegisterAperture; // regaprt super struct SwBcAperture *__nvoc_pbase_SwBcAperture; // swbcaprt - // Vtable with 8 per-object function pointers + // Data members + struct IoAperture *pApertures; + NvU32 numApertures; +}; + + +// Metadata including vtable with 8 function pointers plus superclass metadata +struct NVOC_VTABLE__SwBcAperture { + const struct NVOC_VTABLE__RegisterAperture RegisterAperture; // (regaprt) 8 function pointers + NvU8 (*__swbcaprtReadReg08__)(struct SwBcAperture * /*this*/, NvU32); // virtual override (regaprt) base (regaprt) NvU16 (*__swbcaprtReadReg16__)(struct SwBcAperture * /*this*/, NvU32); // virtual override (regaprt) base (regaprt) NvU32 (*__swbcaprtReadReg32__)(struct SwBcAperture * /*this*/, NvU32); // virtual override (regaprt) base (regaprt) @@ -584,10 +609,6 @@ struct SwBcAperture { void (*__swbcaprtWriteReg32__)(struct SwBcAperture * /*this*/, NvU32, NvV32); // virtual override (regaprt) base (regaprt) void (*__swbcaprtWriteReg32Uc__)(struct SwBcAperture * /*this*/, NvU32, NvV32); // virtual override (regaprt) base (regaprt) NvBool (*__swbcaprtIsRegValid__)(struct SwBcAperture * /*this*/, NvU32); // virtual override (regaprt) base (regaprt) - - // Data members - struct IoAperture *pApertures; - NvU32 numApertures; }; #ifndef __NVOC_CLASS_SwBcAperture_TYPEDEF__ @@ -620,54 +641,54 @@ NV_STATUS __nvoc_objCreate_SwBcAperture(SwBcAperture**, Dynamic*, NvU32, struct // Wrapper macros -#define swbcaprtReadReg08_FNPTR(pAperture) pAperture->__swbcaprtReadReg08__ +#define swbcaprtReadReg08_FNPTR(pAperture) pAperture->__nvoc_vtable->__swbcaprtReadReg08__ #define swbcaprtReadReg08(pAperture, addr) swbcaprtReadReg08_DISPATCH(pAperture, addr) -#define swbcaprtReadReg16_FNPTR(pAperture) pAperture->__swbcaprtReadReg16__ +#define swbcaprtReadReg16_FNPTR(pAperture) pAperture->__nvoc_vtable->__swbcaprtReadReg16__ #define swbcaprtReadReg16(pAperture, addr) swbcaprtReadReg16_DISPATCH(pAperture, addr) -#define swbcaprtReadReg32_FNPTR(pAperture) pAperture->__swbcaprtReadReg32__ +#define swbcaprtReadReg32_FNPTR(pAperture) pAperture->__nvoc_vtable->__swbcaprtReadReg32__ #define swbcaprtReadReg32(pAperture, addr) swbcaprtReadReg32_DISPATCH(pAperture, addr) -#define swbcaprtWriteReg08_FNPTR(pAperture) pAperture->__swbcaprtWriteReg08__ +#define swbcaprtWriteReg08_FNPTR(pAperture) pAperture->__nvoc_vtable->__swbcaprtWriteReg08__ #define swbcaprtWriteReg08(pAperture, addr, value) swbcaprtWriteReg08_DISPATCH(pAperture, addr, value) -#define swbcaprtWriteReg16_FNPTR(pAperture) pAperture->__swbcaprtWriteReg16__ +#define swbcaprtWriteReg16_FNPTR(pAperture) pAperture->__nvoc_vtable->__swbcaprtWriteReg16__ #define swbcaprtWriteReg16(pAperture, addr, value) swbcaprtWriteReg16_DISPATCH(pAperture, addr, value) -#define swbcaprtWriteReg32_FNPTR(pAperture) pAperture->__swbcaprtWriteReg32__ +#define swbcaprtWriteReg32_FNPTR(pAperture) pAperture->__nvoc_vtable->__swbcaprtWriteReg32__ #define swbcaprtWriteReg32(pAperture, addr, value) swbcaprtWriteReg32_DISPATCH(pAperture, addr, value) -#define swbcaprtWriteReg32Uc_FNPTR(pAperture) pAperture->__swbcaprtWriteReg32Uc__ +#define swbcaprtWriteReg32Uc_FNPTR(pAperture) pAperture->__nvoc_vtable->__swbcaprtWriteReg32Uc__ #define swbcaprtWriteReg32Uc(pAperture, addr, value) swbcaprtWriteReg32Uc_DISPATCH(pAperture, addr, value) -#define swbcaprtIsRegValid_FNPTR(pAperture) pAperture->__swbcaprtIsRegValid__ +#define swbcaprtIsRegValid_FNPTR(pAperture) pAperture->__nvoc_vtable->__swbcaprtIsRegValid__ #define swbcaprtIsRegValid(pAperture, addr) swbcaprtIsRegValid_DISPATCH(pAperture, addr) // Dispatch functions static inline NvU8 swbcaprtReadReg08_DISPATCH(struct SwBcAperture *pAperture, NvU32 addr) { - return pAperture->__swbcaprtReadReg08__(pAperture, addr); + return pAperture->__nvoc_vtable->__swbcaprtReadReg08__(pAperture, addr); } static inline NvU16 swbcaprtReadReg16_DISPATCH(struct SwBcAperture *pAperture, NvU32 addr) { - return pAperture->__swbcaprtReadReg16__(pAperture, addr); + return pAperture->__nvoc_vtable->__swbcaprtReadReg16__(pAperture, addr); } static inline NvU32 swbcaprtReadReg32_DISPATCH(struct SwBcAperture *pAperture, NvU32 addr) { - return pAperture->__swbcaprtReadReg32__(pAperture, addr); + return pAperture->__nvoc_vtable->__swbcaprtReadReg32__(pAperture, addr); } static inline void swbcaprtWriteReg08_DISPATCH(struct SwBcAperture *pAperture, NvU32 addr, NvV8 value) { - pAperture->__swbcaprtWriteReg08__(pAperture, addr, value); + pAperture->__nvoc_vtable->__swbcaprtWriteReg08__(pAperture, addr, value); } static inline void swbcaprtWriteReg16_DISPATCH(struct SwBcAperture *pAperture, NvU32 addr, NvV16 value) { - pAperture->__swbcaprtWriteReg16__(pAperture, addr, value); + pAperture->__nvoc_vtable->__swbcaprtWriteReg16__(pAperture, addr, value); } static inline void swbcaprtWriteReg32_DISPATCH(struct SwBcAperture *pAperture, NvU32 addr, NvV32 value) { - pAperture->__swbcaprtWriteReg32__(pAperture, addr, value); + pAperture->__nvoc_vtable->__swbcaprtWriteReg32__(pAperture, addr, value); } static inline void swbcaprtWriteReg32Uc_DISPATCH(struct SwBcAperture *pAperture, NvU32 addr, NvV32 value) { - pAperture->__swbcaprtWriteReg32Uc__(pAperture, addr, value); + pAperture->__nvoc_vtable->__swbcaprtWriteReg32Uc__(pAperture, addr, value); } static inline NvBool swbcaprtIsRegValid_DISPATCH(struct SwBcAperture *pAperture, NvU32 addr) { - return pAperture->__swbcaprtIsRegValid__(pAperture, addr); + return pAperture->__nvoc_vtable->__swbcaprtIsRegValid__(pAperture, addr); } NvU8 swbcaprtReadReg08_IMPL(struct SwBcAperture *pAperture, NvU32 addr); diff --git a/src/nvidia/generated/g_gpu_acct_nvoc.c b/src/nvidia/generated/g_gpu_acct_nvoc.c index 22fa845b86..9d0b0221c2 100644 --- a/src/nvidia/generated/g_gpu_acct_nvoc.c +++ b/src/nvidia/generated/g_gpu_acct_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_GpuAccounting = /*pExportInfo=*/ &__nvoc_export_info_GpuAccounting }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_GpuAccounting = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_gpu_acct_nvoc.h b/src/nvidia/generated/g_gpu_acct_nvoc.h index 7f2bbe0806..7eac02ec66 100644 --- a/src/nvidia/generated/g_gpu_acct_nvoc.h +++ b/src/nvidia/generated/g_gpu_acct_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_gpu_boost_mgr_nvoc.c b/src/nvidia/generated/g_gpu_boost_mgr_nvoc.c index b688f2b56d..f9b025e570 100644 --- a/src/nvidia/generated/g_gpu_boost_mgr_nvoc.c +++ b/src/nvidia/generated/g_gpu_boost_mgr_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPUBOOSTMGR = /*pExportInfo=*/ &__nvoc_export_info_OBJGPUBOOSTMGR }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJGPUBOOSTMGR = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_gpu_boost_mgr_nvoc.h b/src/nvidia/generated/g_gpu_boost_mgr_nvoc.h index 637aa429fb..e96396bcae 100644 --- a/src/nvidia/generated/g_gpu_boost_mgr_nvoc.h +++ b/src/nvidia/generated/g_gpu_boost_mgr_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_gpu_db_nvoc.c b/src/nvidia/generated/g_gpu_db_nvoc.c index 90c297a646..f9a404a3b4 100644 --- a/src/nvidia/generated/g_gpu_db_nvoc.c +++ b/src/nvidia/generated/g_gpu_db_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_GpuDb = /*pExportInfo=*/ &__nvoc_export_info_GpuDb }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_GpuDb = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_gpu_db_nvoc.h b/src/nvidia/generated/g_gpu_db_nvoc.h index def236f8b9..cf81aaebf6 100644 --- a/src/nvidia/generated/g_gpu_db_nvoc.h +++ b/src/nvidia/generated/g_gpu_db_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_gpu_group_nvoc.c b/src/nvidia/generated/g_gpu_group_nvoc.c index a95469201f..d0ca2d314b 100644 --- a/src/nvidia/generated/g_gpu_group_nvoc.c +++ b/src/nvidia/generated/g_gpu_group_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPUGRP = /*pExportInfo=*/ &__nvoc_export_info_OBJGPUGRP }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJGPUGRP = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_gpu_group_nvoc.h b/src/nvidia/generated/g_gpu_group_nvoc.h index 4be10b50e0..3cbe45be87 100644 --- a/src/nvidia/generated/g_gpu_group_nvoc.h +++ b/src/nvidia/generated/g_gpu_group_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_gpu_halspec_nvoc.c b/src/nvidia/generated/g_gpu_halspec_nvoc.c index dec7db4926..f619a00918 100644 --- a/src/nvidia/generated/g_gpu_halspec_nvoc.c +++ b/src/nvidia/generated/g_gpu_halspec_nvoc.c @@ -53,6 +53,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_RmHalspecOwner = /*pExportInfo=*/ &__nvoc_export_info_RmHalspecOwner }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_RmHalspecOwner = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_gpu_halspec_nvoc.h b/src/nvidia/generated/g_gpu_halspec_nvoc.h index 9165a8ce59..3e308718c2 100644 --- a/src/nvidia/generated/g_gpu_halspec_nvoc.h +++ b/src/nvidia/generated/g_gpu_halspec_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_gpu_instance_subscription_nvoc.c b/src/nvidia/generated/g_gpu_instance_subscription_nvoc.c index f2d5377390..baf1413f69 100644 --- a/src/nvidia/generated/g_gpu_instance_subscription_nvoc.c +++ b/src/nvidia/generated/g_gpu_instance_subscription_nvoc.c @@ -222,133 +222,201 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GPUInsta }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NvBool __nvoc_down_thunk_GPUInstanceSubscription_resCanCopy(struct RsResource *arg_this); // this + // 1 down-thunk(s) defined to bridge methods in GPUInstanceSubscription from superclasses // gisubscriptionCanCopy: virtual override (res) base (gpures) -static NvBool __nvoc_down_thunk_GPUInstanceSubscription_resCanCopy(struct RsResource *arg_this) { +NvBool __nvoc_down_thunk_GPUInstanceSubscription_resCanCopy(struct RsResource *arg_this) { return gisubscriptionCanCopy((struct GPUInstanceSubscription *)(((unsigned char *) arg_this) - __nvoc_rtti_GPUInstanceSubscription_RsResource.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionControl(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionMap(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionUnmap(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_gisubscriptionShareCallback(struct GPUInstanceSubscription *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionGetRegBaseOffsetAndSize(struct GPUInstanceSubscription *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionGetMapAddrSpace(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionInternalControlForward(struct GPUInstanceSubscription *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_gisubscriptionGetInternalObjectHandle(struct GPUInstanceSubscription *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_gisubscriptionAccessCallback(struct GPUInstanceSubscription *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_gisubscriptionGetMemInterMapParams(struct GPUInstanceSubscription *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_gisubscriptionCheckMemInterUnmap(struct GPUInstanceSubscription *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_gisubscriptionGetMemoryMappingDescriptor(struct GPUInstanceSubscription *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_gisubscriptionControlSerialization_Prologue(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_gisubscriptionControlSerialization_Epilogue(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_gisubscriptionControl_Prologue(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_gisubscriptionControl_Epilogue(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_gisubscriptionIsDuplicate(struct GPUInstanceSubscription *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_gisubscriptionPreDestruct(struct GPUInstanceSubscription *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_gisubscriptionControlFilter(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_gisubscriptionIsPartialUnmapSupported(struct GPUInstanceSubscription *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_gisubscriptionMapTo(struct GPUInstanceSubscription *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_gisubscriptionUnmapFrom(struct GPUInstanceSubscription *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_gisubscriptionGetRefCount(struct GPUInstanceSubscription *pResource); // this +void __nvoc_up_thunk_RsResource_gisubscriptionAddAdditionalDependants(struct RsClient *pClient, struct GPUInstanceSubscription *pResource, RsResourceRef *pReference); // this + // 24 up-thunk(s) defined to bridge methods in GPUInstanceSubscription to superclasses // gisubscriptionControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionControl(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionControl(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset), pCallContext, pParams); } // gisubscriptionMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionMap(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionMap(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // gisubscriptionUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionUnmap(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionUnmap(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset), pCallContext, pCpuMapping); } // gisubscriptionShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_gisubscriptionShareCallback(struct GPUInstanceSubscription *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_gisubscriptionShareCallback(struct GPUInstanceSubscription *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // gisubscriptionGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionGetRegBaseOffsetAndSize(struct GPUInstanceSubscription *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionGetRegBaseOffsetAndSize(struct GPUInstanceSubscription *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset), pGpu, pOffset, pSize); } // gisubscriptionGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionGetMapAddrSpace(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionGetMapAddrSpace(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // gisubscriptionInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionInternalControlForward(struct GPUInstanceSubscription *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_gisubscriptionInternalControlForward(struct GPUInstanceSubscription *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset), command, pParams, size); } // gisubscriptionGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_gisubscriptionGetInternalObjectHandle(struct GPUInstanceSubscription *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_gisubscriptionGetInternalObjectHandle(struct GPUInstanceSubscription *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_GPUInstanceSubscription_GpuResource.offset)); } // gisubscriptionAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_gisubscriptionAccessCallback(struct GPUInstanceSubscription *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_gisubscriptionAccessCallback(struct GPUInstanceSubscription *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // gisubscriptionGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_gisubscriptionGetMemInterMapParams(struct GPUInstanceSubscription *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_gisubscriptionGetMemInterMapParams(struct GPUInstanceSubscription *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), pParams); } // gisubscriptionCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_gisubscriptionCheckMemInterUnmap(struct GPUInstanceSubscription *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_gisubscriptionCheckMemInterUnmap(struct GPUInstanceSubscription *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), bSubdeviceHandleProvided); } // gisubscriptionGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_gisubscriptionGetMemoryMappingDescriptor(struct GPUInstanceSubscription *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_gisubscriptionGetMemoryMappingDescriptor(struct GPUInstanceSubscription *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), ppMemDesc); } // gisubscriptionControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_gisubscriptionControlSerialization_Prologue(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_gisubscriptionControlSerialization_Prologue(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), pCallContext, pParams); } // gisubscriptionControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_gisubscriptionControlSerialization_Epilogue(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_gisubscriptionControlSerialization_Epilogue(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), pCallContext, pParams); } // gisubscriptionControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_gisubscriptionControl_Prologue(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_gisubscriptionControl_Prologue(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), pCallContext, pParams); } // gisubscriptionControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_gisubscriptionControl_Epilogue(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_gisubscriptionControl_Epilogue(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RmResource.offset), pCallContext, pParams); } // gisubscriptionIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_gisubscriptionIsDuplicate(struct GPUInstanceSubscription *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_gisubscriptionIsDuplicate(struct GPUInstanceSubscription *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset), hMemory, pDuplicate); } // gisubscriptionPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_gisubscriptionPreDestruct(struct GPUInstanceSubscription *pResource) { +void __nvoc_up_thunk_RsResource_gisubscriptionPreDestruct(struct GPUInstanceSubscription *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset)); } // gisubscriptionControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_gisubscriptionControlFilter(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_gisubscriptionControlFilter(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset), pCallContext, pParams); } // gisubscriptionIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_gisubscriptionIsPartialUnmapSupported(struct GPUInstanceSubscription *pResource) { +NvBool __nvoc_up_thunk_RsResource_gisubscriptionIsPartialUnmapSupported(struct GPUInstanceSubscription *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset)); } // gisubscriptionMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_gisubscriptionMapTo(struct GPUInstanceSubscription *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_gisubscriptionMapTo(struct GPUInstanceSubscription *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset), pParams); } // gisubscriptionUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_gisubscriptionUnmapFrom(struct GPUInstanceSubscription *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_gisubscriptionUnmapFrom(struct GPUInstanceSubscription *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset), pParams); } // gisubscriptionGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_gisubscriptionGetRefCount(struct GPUInstanceSubscription *pResource) { +NvU32 __nvoc_up_thunk_RsResource_gisubscriptionGetRefCount(struct GPUInstanceSubscription *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset)); } // gisubscriptionAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_gisubscriptionAddAdditionalDependants(struct RsClient *pClient, struct GPUInstanceSubscription *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_gisubscriptionAddAdditionalDependants(struct RsClient *pClient, struct GPUInstanceSubscription *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GPUInstanceSubscription_RsResource.offset), pReference); } @@ -393,10 +461,6 @@ NV_STATUS __nvoc_ctor_GPUInstanceSubscription(GPUInstanceSubscription *pThis, CA static void __nvoc_init_funcTable_GPUInstanceSubscription_1(GPUInstanceSubscription *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // gisubscriptionCanCopy -- virtual override (res) base (gpures) - pThis->__gisubscriptionCanCopy__ = &gisubscriptionCanCopy_IMPL; - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_GPUInstanceSubscription_resCanCopy; - // gisubscriptionCtrlCmdExecPartitionsCreate -- exported (id=0xc6370101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gisubscriptionCtrlCmdExecPartitionsCreate__ = &gisubscriptionCtrlCmdExecPartitionsCreate_IMPL; @@ -436,85 +500,128 @@ static void __nvoc_init_funcTable_GPUInstanceSubscription_1(GPUInstanceSubscript #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gisubscriptionCtrlCmdGetUuid__ = &gisubscriptionCtrlCmdGetUuid_IMPL; #endif - - // gisubscriptionControl -- virtual inherited (gpures) base (gpures) - pThis->__gisubscriptionControl__ = &__nvoc_up_thunk_GpuResource_gisubscriptionControl; - - // gisubscriptionMap -- virtual inherited (gpures) base (gpures) - pThis->__gisubscriptionMap__ = &__nvoc_up_thunk_GpuResource_gisubscriptionMap; - - // gisubscriptionUnmap -- virtual inherited (gpures) base (gpures) - pThis->__gisubscriptionUnmap__ = &__nvoc_up_thunk_GpuResource_gisubscriptionUnmap; - - // gisubscriptionShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__gisubscriptionShareCallback__ = &__nvoc_up_thunk_GpuResource_gisubscriptionShareCallback; - - // gisubscriptionGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__gisubscriptionGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_gisubscriptionGetRegBaseOffsetAndSize; - - // gisubscriptionGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__gisubscriptionGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_gisubscriptionGetMapAddrSpace; - - // gisubscriptionInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__gisubscriptionInternalControlForward__ = &__nvoc_up_thunk_GpuResource_gisubscriptionInternalControlForward; - - // gisubscriptionGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__gisubscriptionGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_gisubscriptionGetInternalObjectHandle; - - // gisubscriptionAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__gisubscriptionAccessCallback__ = &__nvoc_up_thunk_RmResource_gisubscriptionAccessCallback; - - // gisubscriptionGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__gisubscriptionGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gisubscriptionGetMemInterMapParams; - - // gisubscriptionCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__gisubscriptionCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gisubscriptionCheckMemInterUnmap; - - // gisubscriptionGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__gisubscriptionGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gisubscriptionGetMemoryMappingDescriptor; - - // gisubscriptionControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__gisubscriptionControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gisubscriptionControlSerialization_Prologue; - - // gisubscriptionControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__gisubscriptionControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gisubscriptionControlSerialization_Epilogue; - - // gisubscriptionControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__gisubscriptionControl_Prologue__ = &__nvoc_up_thunk_RmResource_gisubscriptionControl_Prologue; - - // gisubscriptionControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__gisubscriptionControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gisubscriptionControl_Epilogue; - - // gisubscriptionIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__gisubscriptionIsDuplicate__ = &__nvoc_up_thunk_RsResource_gisubscriptionIsDuplicate; - - // gisubscriptionPreDestruct -- virtual inherited (res) base (gpures) - pThis->__gisubscriptionPreDestruct__ = &__nvoc_up_thunk_RsResource_gisubscriptionPreDestruct; - - // gisubscriptionControlFilter -- virtual inherited (res) base (gpures) - pThis->__gisubscriptionControlFilter__ = &__nvoc_up_thunk_RsResource_gisubscriptionControlFilter; - - // gisubscriptionIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__gisubscriptionIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gisubscriptionIsPartialUnmapSupported; - - // gisubscriptionMapTo -- virtual inherited (res) base (gpures) - pThis->__gisubscriptionMapTo__ = &__nvoc_up_thunk_RsResource_gisubscriptionMapTo; - - // gisubscriptionUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__gisubscriptionUnmapFrom__ = &__nvoc_up_thunk_RsResource_gisubscriptionUnmapFrom; - - // gisubscriptionGetRefCount -- virtual inherited (res) base (gpures) - pThis->__gisubscriptionGetRefCount__ = &__nvoc_up_thunk_RsResource_gisubscriptionGetRefCount; - - // gisubscriptionAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__gisubscriptionAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gisubscriptionAddAdditionalDependants; -} // End __nvoc_init_funcTable_GPUInstanceSubscription_1 with approximately 34 basic block(s). +} // End __nvoc_init_funcTable_GPUInstanceSubscription_1 with approximately 8 basic block(s). // Initialize vtable(s) for 33 virtual method(s). void __nvoc_init_funcTable_GPUInstanceSubscription(GPUInstanceSubscription *pThis) { - // Initialize vtable(s) with 33 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__GPUInstanceSubscription vtable = { + .__gisubscriptionCanCopy__ = &gisubscriptionCanCopy_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_GPUInstanceSubscription_resCanCopy, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__gisubscriptionControl__ = &__nvoc_up_thunk_GpuResource_gisubscriptionControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__gisubscriptionMap__ = &__nvoc_up_thunk_GpuResource_gisubscriptionMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__gisubscriptionUnmap__ = &__nvoc_up_thunk_GpuResource_gisubscriptionUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__gisubscriptionShareCallback__ = &__nvoc_up_thunk_GpuResource_gisubscriptionShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__gisubscriptionGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_gisubscriptionGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__gisubscriptionGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_gisubscriptionGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__gisubscriptionInternalControlForward__ = &__nvoc_up_thunk_GpuResource_gisubscriptionInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__gisubscriptionGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_gisubscriptionGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__gisubscriptionAccessCallback__ = &__nvoc_up_thunk_RmResource_gisubscriptionAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__gisubscriptionGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gisubscriptionGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__gisubscriptionCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gisubscriptionCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__gisubscriptionGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gisubscriptionGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__gisubscriptionControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gisubscriptionControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__gisubscriptionControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gisubscriptionControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__gisubscriptionControl_Prologue__ = &__nvoc_up_thunk_RmResource_gisubscriptionControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__gisubscriptionControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gisubscriptionControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__gisubscriptionIsDuplicate__ = &__nvoc_up_thunk_RsResource_gisubscriptionIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__gisubscriptionPreDestruct__ = &__nvoc_up_thunk_RsResource_gisubscriptionPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__gisubscriptionControlFilter__ = &__nvoc_up_thunk_RsResource_gisubscriptionControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__gisubscriptionIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gisubscriptionIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__gisubscriptionMapTo__ = &__nvoc_up_thunk_RsResource_gisubscriptionMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__gisubscriptionUnmapFrom__ = &__nvoc_up_thunk_RsResource_gisubscriptionUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__gisubscriptionGetRefCount__ = &__nvoc_up_thunk_RsResource_gisubscriptionGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__gisubscriptionAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gisubscriptionAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (gisubscription) this + + // Initialize vtable(s) with 8 per-object function pointer(s). __nvoc_init_funcTable_GPUInstanceSubscription_1(pThis); } diff --git a/src/nvidia/generated/g_gpu_instance_subscription_nvoc.h b/src/nvidia/generated/g_gpu_instance_subscription_nvoc.h index 29eddfc527..cef03a128d 100644 --- a/src/nvidia/generated/g_gpu_instance_subscription_nvoc.h +++ b/src/nvidia/generated/g_gpu_instance_subscription_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -68,10 +68,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__GPUInstanceSubscription; + + struct GPUInstanceSubscription { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__GPUInstanceSubscription *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -84,8 +89,7 @@ struct GPUInstanceSubscription { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct GPUInstanceSubscription *__nvoc_pbase_GPUInstanceSubscription; // gisubscription - // Vtable with 33 per-object function pointers - NvBool (*__gisubscriptionCanCopy__)(struct GPUInstanceSubscription * /*this*/); // virtual override (res) base (gpures) + // Vtable with 8 per-object function pointers NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsCreate__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_CREATE_PARAMS *); // exported (id=0xc6370101) NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsDelete__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_DELETE_PARAMS *); // exported (id=0xc6370102) NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsGet__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_GET_PARAMS *); // exported (id=0xc6370103) @@ -94,30 +98,6 @@ struct GPUInstanceSubscription { NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsExport__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_IMPORT_EXPORT_PARAMS *); // exported (id=0xc6370105) NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsImport__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_IMPORT_EXPORT_PARAMS *); // exported (id=0xc6370106) NV_STATUS (*__gisubscriptionCtrlCmdGetUuid__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_GET_UUID_PARAMS *); // exported (id=0xc63701aa) - NV_STATUS (*__gisubscriptionControl__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) - NV_STATUS (*__gisubscriptionMap__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) - NV_STATUS (*__gisubscriptionUnmap__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) - NvBool (*__gisubscriptionShareCallback__)(struct GPUInstanceSubscription * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) - NV_STATUS (*__gisubscriptionGetRegBaseOffsetAndSize__)(struct GPUInstanceSubscription * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) - NV_STATUS (*__gisubscriptionGetMapAddrSpace__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) - NV_STATUS (*__gisubscriptionInternalControlForward__)(struct GPUInstanceSubscription * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) - NvHandle (*__gisubscriptionGetInternalObjectHandle__)(struct GPUInstanceSubscription * /*this*/); // virtual inherited (gpures) base (gpures) - NvBool (*__gisubscriptionAccessCallback__)(struct GPUInstanceSubscription * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__gisubscriptionGetMemInterMapParams__)(struct GPUInstanceSubscription * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__gisubscriptionCheckMemInterUnmap__)(struct GPUInstanceSubscription * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__gisubscriptionGetMemoryMappingDescriptor__)(struct GPUInstanceSubscription * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__gisubscriptionControlSerialization_Prologue__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) - void (*__gisubscriptionControlSerialization_Epilogue__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__gisubscriptionControl_Prologue__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) - void (*__gisubscriptionControl_Epilogue__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__gisubscriptionIsDuplicate__)(struct GPUInstanceSubscription * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) - void (*__gisubscriptionPreDestruct__)(struct GPUInstanceSubscription * /*this*/); // virtual inherited (res) base (gpures) - NV_STATUS (*__gisubscriptionControlFilter__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) - NvBool (*__gisubscriptionIsPartialUnmapSupported__)(struct GPUInstanceSubscription * /*this*/); // inline virtual inherited (res) base (gpures) body - NV_STATUS (*__gisubscriptionMapTo__)(struct GPUInstanceSubscription * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) - NV_STATUS (*__gisubscriptionUnmapFrom__)(struct GPUInstanceSubscription * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) - NvU32 (*__gisubscriptionGetRefCount__)(struct GPUInstanceSubscription * /*this*/); // virtual inherited (res) base (gpures) - void (*__gisubscriptionAddAdditionalDependants__)(struct RsClient *, struct GPUInstanceSubscription * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) // Data members KERNEL_MIG_GPU_INSTANCE *PRIVATE_FIELD(pKernelMIGGpuInstance); @@ -131,6 +111,7 @@ struct GPUInstanceSubscription_PRIVATE { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__GPUInstanceSubscription *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -143,8 +124,7 @@ struct GPUInstanceSubscription_PRIVATE { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct GPUInstanceSubscription *__nvoc_pbase_GPUInstanceSubscription; // gisubscription - // Vtable with 33 per-object function pointers - NvBool (*__gisubscriptionCanCopy__)(struct GPUInstanceSubscription * /*this*/); // virtual override (res) base (gpures) + // Vtable with 8 per-object function pointers NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsCreate__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_CREATE_PARAMS *); // exported (id=0xc6370101) NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsDelete__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_DELETE_PARAMS *); // exported (id=0xc6370102) NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsGet__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_GET_PARAMS *); // exported (id=0xc6370103) @@ -153,6 +133,20 @@ struct GPUInstanceSubscription_PRIVATE { NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsExport__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_IMPORT_EXPORT_PARAMS *); // exported (id=0xc6370105) NV_STATUS (*__gisubscriptionCtrlCmdExecPartitionsImport__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_EXEC_PARTITIONS_IMPORT_EXPORT_PARAMS *); // exported (id=0xc6370106) NV_STATUS (*__gisubscriptionCtrlCmdGetUuid__)(struct GPUInstanceSubscription * /*this*/, NVC637_CTRL_GET_UUID_PARAMS *); // exported (id=0xc63701aa) + + // Data members + KERNEL_MIG_GPU_INSTANCE *pKernelMIGGpuInstance; + NvBool bDeviceProfiling; + NvBool bIsDuped; + NvU64 dupedCapDescriptor; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__GPUInstanceSubscription { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + + NvBool (*__gisubscriptionCanCopy__)(struct GPUInstanceSubscription * /*this*/); // virtual override (res) base (gpures) NV_STATUS (*__gisubscriptionControl__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__gisubscriptionMap__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__gisubscriptionUnmap__)(struct GPUInstanceSubscription * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -177,12 +171,6 @@ struct GPUInstanceSubscription_PRIVATE { NV_STATUS (*__gisubscriptionUnmapFrom__)(struct GPUInstanceSubscription * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__gisubscriptionGetRefCount__)(struct GPUInstanceSubscription * /*this*/); // virtual inherited (res) base (gpures) void (*__gisubscriptionAddAdditionalDependants__)(struct RsClient *, struct GPUInstanceSubscription * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - KERNEL_MIG_GPU_INSTANCE *pKernelMIGGpuInstance; - NvBool bDeviceProfiling; - NvBool bIsDuped; - NvU64 dupedCapDescriptor; }; #ifndef __NVOC_CLASS_GPUInstanceSubscription_TYPEDEF__ @@ -215,7 +203,7 @@ NV_STATUS __nvoc_objCreate_GPUInstanceSubscription(GPUInstanceSubscription**, Dy // Wrapper macros -#define gisubscriptionCanCopy_FNPTR(arg_this) arg_this->__gisubscriptionCanCopy__ +#define gisubscriptionCanCopy_FNPTR(arg_this) arg_this->__nvoc_vtable->__gisubscriptionCanCopy__ #define gisubscriptionCanCopy(arg_this) gisubscriptionCanCopy_DISPATCH(arg_this) #define gisubscriptionCtrlCmdExecPartitionsCreate_FNPTR(arg_this) arg_this->__gisubscriptionCtrlCmdExecPartitionsCreate__ #define gisubscriptionCtrlCmdExecPartitionsCreate(arg_this, arg2) gisubscriptionCtrlCmdExecPartitionsCreate_DISPATCH(arg_this, arg2) @@ -233,58 +221,58 @@ NV_STATUS __nvoc_objCreate_GPUInstanceSubscription(GPUInstanceSubscription**, Dy #define gisubscriptionCtrlCmdExecPartitionsImport(arg_this, arg2) gisubscriptionCtrlCmdExecPartitionsImport_DISPATCH(arg_this, arg2) #define gisubscriptionCtrlCmdGetUuid_FNPTR(arg_this) arg_this->__gisubscriptionCtrlCmdGetUuid__ #define gisubscriptionCtrlCmdGetUuid(arg_this, arg2) gisubscriptionCtrlCmdGetUuid_DISPATCH(arg_this, arg2) -#define gisubscriptionControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define gisubscriptionControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define gisubscriptionControl(pGpuResource, pCallContext, pParams) gisubscriptionControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define gisubscriptionMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define gisubscriptionMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define gisubscriptionMap(pGpuResource, pCallContext, pParams, pCpuMapping) gisubscriptionMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define gisubscriptionUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define gisubscriptionUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define gisubscriptionUnmap(pGpuResource, pCallContext, pCpuMapping) gisubscriptionUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define gisubscriptionShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define gisubscriptionShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define gisubscriptionShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) gisubscriptionShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define gisubscriptionGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define gisubscriptionGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define gisubscriptionGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) gisubscriptionGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define gisubscriptionGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define gisubscriptionGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define gisubscriptionGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) gisubscriptionGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define gisubscriptionInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define gisubscriptionInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define gisubscriptionInternalControlForward(pGpuResource, command, pParams, size) gisubscriptionInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define gisubscriptionGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define gisubscriptionGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define gisubscriptionGetInternalObjectHandle(pGpuResource) gisubscriptionGetInternalObjectHandle_DISPATCH(pGpuResource) -#define gisubscriptionAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define gisubscriptionAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define gisubscriptionAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) gisubscriptionAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define gisubscriptionGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define gisubscriptionGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define gisubscriptionGetMemInterMapParams(pRmResource, pParams) gisubscriptionGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define gisubscriptionCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define gisubscriptionCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define gisubscriptionCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) gisubscriptionCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define gisubscriptionGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define gisubscriptionGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define gisubscriptionGetMemoryMappingDescriptor(pRmResource, ppMemDesc) gisubscriptionGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define gisubscriptionControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define gisubscriptionControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define gisubscriptionControlSerialization_Prologue(pResource, pCallContext, pParams) gisubscriptionControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define gisubscriptionControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define gisubscriptionControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define gisubscriptionControlSerialization_Epilogue(pResource, pCallContext, pParams) gisubscriptionControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define gisubscriptionControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define gisubscriptionControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define gisubscriptionControl_Prologue(pResource, pCallContext, pParams) gisubscriptionControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define gisubscriptionControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define gisubscriptionControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define gisubscriptionControl_Epilogue(pResource, pCallContext, pParams) gisubscriptionControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define gisubscriptionIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define gisubscriptionIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define gisubscriptionIsDuplicate(pResource, hMemory, pDuplicate) gisubscriptionIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define gisubscriptionPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define gisubscriptionPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define gisubscriptionPreDestruct(pResource) gisubscriptionPreDestruct_DISPATCH(pResource) -#define gisubscriptionControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define gisubscriptionControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define gisubscriptionControlFilter(pResource, pCallContext, pParams) gisubscriptionControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define gisubscriptionIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define gisubscriptionIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define gisubscriptionIsPartialUnmapSupported(pResource) gisubscriptionIsPartialUnmapSupported_DISPATCH(pResource) -#define gisubscriptionMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define gisubscriptionMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define gisubscriptionMapTo(pResource, pParams) gisubscriptionMapTo_DISPATCH(pResource, pParams) -#define gisubscriptionUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define gisubscriptionUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define gisubscriptionUnmapFrom(pResource, pParams) gisubscriptionUnmapFrom_DISPATCH(pResource, pParams) -#define gisubscriptionGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define gisubscriptionGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define gisubscriptionGetRefCount(pResource) gisubscriptionGetRefCount_DISPATCH(pResource) -#define gisubscriptionAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define gisubscriptionAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define gisubscriptionAddAdditionalDependants(pClient, pResource, pReference) gisubscriptionAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool gisubscriptionCanCopy_DISPATCH(struct GPUInstanceSubscription *arg_this) { - return arg_this->__gisubscriptionCanCopy__(arg_this); + return arg_this->__nvoc_vtable->__gisubscriptionCanCopy__(arg_this); } static inline NV_STATUS gisubscriptionCtrlCmdExecPartitionsCreate_DISPATCH(struct GPUInstanceSubscription *arg_this, NVC637_CTRL_EXEC_PARTITIONS_CREATE_PARAMS *arg2) { @@ -320,99 +308,99 @@ static inline NV_STATUS gisubscriptionCtrlCmdGetUuid_DISPATCH(struct GPUInstance } static inline NV_STATUS gisubscriptionControl_DISPATCH(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__gisubscriptionControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__gisubscriptionControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS gisubscriptionMap_DISPATCH(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__gisubscriptionMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__gisubscriptionMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS gisubscriptionUnmap_DISPATCH(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__gisubscriptionUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__gisubscriptionUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool gisubscriptionShareCallback_DISPATCH(struct GPUInstanceSubscription *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__gisubscriptionShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__gisubscriptionShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS gisubscriptionGetRegBaseOffsetAndSize_DISPATCH(struct GPUInstanceSubscription *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__gisubscriptionGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__gisubscriptionGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS gisubscriptionGetMapAddrSpace_DISPATCH(struct GPUInstanceSubscription *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__gisubscriptionGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__gisubscriptionGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS gisubscriptionInternalControlForward_DISPATCH(struct GPUInstanceSubscription *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__gisubscriptionInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__gisubscriptionInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle gisubscriptionGetInternalObjectHandle_DISPATCH(struct GPUInstanceSubscription *pGpuResource) { - return pGpuResource->__gisubscriptionGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__gisubscriptionGetInternalObjectHandle__(pGpuResource); } static inline NvBool gisubscriptionAccessCallback_DISPATCH(struct GPUInstanceSubscription *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__gisubscriptionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__gisubscriptionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS gisubscriptionGetMemInterMapParams_DISPATCH(struct GPUInstanceSubscription *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__gisubscriptionGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__gisubscriptionGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS gisubscriptionCheckMemInterUnmap_DISPATCH(struct GPUInstanceSubscription *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__gisubscriptionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__gisubscriptionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS gisubscriptionGetMemoryMappingDescriptor_DISPATCH(struct GPUInstanceSubscription *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__gisubscriptionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__gisubscriptionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS gisubscriptionControlSerialization_Prologue_DISPATCH(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gisubscriptionControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__gisubscriptionControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void gisubscriptionControlSerialization_Epilogue_DISPATCH(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__gisubscriptionControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__gisubscriptionControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS gisubscriptionControl_Prologue_DISPATCH(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gisubscriptionControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__gisubscriptionControl_Prologue__(pResource, pCallContext, pParams); } static inline void gisubscriptionControl_Epilogue_DISPATCH(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__gisubscriptionControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__gisubscriptionControl_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS gisubscriptionIsDuplicate_DISPATCH(struct GPUInstanceSubscription *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__gisubscriptionIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__gisubscriptionIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void gisubscriptionPreDestruct_DISPATCH(struct GPUInstanceSubscription *pResource) { - pResource->__gisubscriptionPreDestruct__(pResource); + pResource->__nvoc_vtable->__gisubscriptionPreDestruct__(pResource); } static inline NV_STATUS gisubscriptionControlFilter_DISPATCH(struct GPUInstanceSubscription *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gisubscriptionControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__gisubscriptionControlFilter__(pResource, pCallContext, pParams); } static inline NvBool gisubscriptionIsPartialUnmapSupported_DISPATCH(struct GPUInstanceSubscription *pResource) { - return pResource->__gisubscriptionIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__gisubscriptionIsPartialUnmapSupported__(pResource); } static inline NV_STATUS gisubscriptionMapTo_DISPATCH(struct GPUInstanceSubscription *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__gisubscriptionMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__gisubscriptionMapTo__(pResource, pParams); } static inline NV_STATUS gisubscriptionUnmapFrom_DISPATCH(struct GPUInstanceSubscription *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__gisubscriptionUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__gisubscriptionUnmapFrom__(pResource, pParams); } static inline NvU32 gisubscriptionGetRefCount_DISPATCH(struct GPUInstanceSubscription *pResource) { - return pResource->__gisubscriptionGetRefCount__(pResource); + return pResource->__nvoc_vtable->__gisubscriptionGetRefCount__(pResource); } static inline void gisubscriptionAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct GPUInstanceSubscription *pResource, RsResourceRef *pReference) { - pResource->__gisubscriptionAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__gisubscriptionAddAdditionalDependants__(pClient, pResource, pReference); } NvBool gisubscriptionCanCopy_IMPL(struct GPUInstanceSubscription *arg1); diff --git a/src/nvidia/generated/g_gpu_mgmt_api_nvoc.c b/src/nvidia/generated/g_gpu_mgmt_api_nvoc.c index 991fbf824c..60750abd07 100644 --- a/src/nvidia/generated/g_gpu_mgmt_api_nvoc.c +++ b/src/nvidia/generated/g_gpu_mgmt_api_nvoc.c @@ -108,110 +108,153 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GpuManag }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_RmResource_gpumgmtapiAccessCallback(struct GpuManagementApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_gpumgmtapiShareCallback(struct GpuManagementApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_gpumgmtapiGetMemInterMapParams(struct GpuManagementApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_gpumgmtapiCheckMemInterUnmap(struct GpuManagementApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_gpumgmtapiGetMemoryMappingDescriptor(struct GpuManagementApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_gpumgmtapiControlSerialization_Prologue(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_gpumgmtapiControlSerialization_Epilogue(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_gpumgmtapiControl_Prologue(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_gpumgmtapiControl_Epilogue(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_gpumgmtapiCanCopy(struct GpuManagementApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiIsDuplicate(struct GpuManagementApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_gpumgmtapiPreDestruct(struct GpuManagementApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiControl(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiControlFilter(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiMap(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiUnmap(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_gpumgmtapiIsPartialUnmapSupported(struct GpuManagementApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiMapTo(struct GpuManagementApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiUnmapFrom(struct GpuManagementApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_gpumgmtapiGetRefCount(struct GpuManagementApi *pResource); // this +void __nvoc_up_thunk_RsResource_gpumgmtapiAddAdditionalDependants(struct RsClient *pClient, struct GpuManagementApi *pResource, RsResourceRef *pReference); // this + // 21 up-thunk(s) defined to bridge methods in GpuManagementApi to superclasses // gpumgmtapiAccessCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_gpumgmtapiAccessCallback(struct GpuManagementApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_gpumgmtapiAccessCallback(struct GpuManagementApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // gpumgmtapiShareCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_gpumgmtapiShareCallback(struct GpuManagementApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_gpumgmtapiShareCallback(struct GpuManagementApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // gpumgmtapiGetMemInterMapParams: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_gpumgmtapiGetMemInterMapParams(struct GpuManagementApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_gpumgmtapiGetMemInterMapParams(struct GpuManagementApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), pParams); } // gpumgmtapiCheckMemInterUnmap: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_gpumgmtapiCheckMemInterUnmap(struct GpuManagementApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_gpumgmtapiCheckMemInterUnmap(struct GpuManagementApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), bSubdeviceHandleProvided); } // gpumgmtapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_gpumgmtapiGetMemoryMappingDescriptor(struct GpuManagementApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_gpumgmtapiGetMemoryMappingDescriptor(struct GpuManagementApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), ppMemDesc); } // gpumgmtapiControlSerialization_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_gpumgmtapiControlSerialization_Prologue(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_gpumgmtapiControlSerialization_Prologue(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), pCallContext, pParams); } // gpumgmtapiControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_gpumgmtapiControlSerialization_Epilogue(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_gpumgmtapiControlSerialization_Epilogue(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), pCallContext, pParams); } // gpumgmtapiControl_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_gpumgmtapiControl_Prologue(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_gpumgmtapiControl_Prologue(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), pCallContext, pParams); } // gpumgmtapiControl_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_gpumgmtapiControl_Epilogue(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_gpumgmtapiControl_Epilogue(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RmResource.offset), pCallContext, pParams); } // gpumgmtapiCanCopy: virtual inherited (res) base (rmres) -static NvBool __nvoc_up_thunk_RsResource_gpumgmtapiCanCopy(struct GpuManagementApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_gpumgmtapiCanCopy(struct GpuManagementApi *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset)); } // gpumgmtapiIsDuplicate: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiIsDuplicate(struct GpuManagementApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiIsDuplicate(struct GpuManagementApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), hMemory, pDuplicate); } // gpumgmtapiPreDestruct: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_gpumgmtapiPreDestruct(struct GpuManagementApi *pResource) { +void __nvoc_up_thunk_RsResource_gpumgmtapiPreDestruct(struct GpuManagementApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset)); } // gpumgmtapiControl: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiControl(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiControl(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), pCallContext, pParams); } // gpumgmtapiControlFilter: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiControlFilter(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiControlFilter(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), pCallContext, pParams); } // gpumgmtapiMap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiMap(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiMap(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), pCallContext, pParams, pCpuMapping); } // gpumgmtapiUnmap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiUnmap(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiUnmap(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), pCallContext, pCpuMapping); } // gpumgmtapiIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body -static NvBool __nvoc_up_thunk_RsResource_gpumgmtapiIsPartialUnmapSupported(struct GpuManagementApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_gpumgmtapiIsPartialUnmapSupported(struct GpuManagementApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset)); } // gpumgmtapiMapTo: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiMapTo(struct GpuManagementApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiMapTo(struct GpuManagementApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), pParams); } // gpumgmtapiUnmapFrom: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiUnmapFrom(struct GpuManagementApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_gpumgmtapiUnmapFrom(struct GpuManagementApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), pParams); } // gpumgmtapiGetRefCount: virtual inherited (res) base (rmres) -static NvU32 __nvoc_up_thunk_RsResource_gpumgmtapiGetRefCount(struct GpuManagementApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_gpumgmtapiGetRefCount(struct GpuManagementApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset)); } // gpumgmtapiAddAdditionalDependants: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_gpumgmtapiAddAdditionalDependants(struct RsClient *pClient, struct GpuManagementApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_gpumgmtapiAddAdditionalDependants(struct RsClient *pClient, struct GpuManagementApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuManagementApi_RsResource.offset), pReference); } @@ -260,76 +303,84 @@ static void __nvoc_init_funcTable_GpuManagementApi_1(GpuManagementApi *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) pThis->__gpumgmtapiCtrlCmdSetShutdownState__ = &gpumgmtapiCtrlCmdSetShutdownState_IMPL; #endif - - // gpumgmtapiAccessCallback -- virtual inherited (rmres) base (rmres) - pThis->__gpumgmtapiAccessCallback__ = &__nvoc_up_thunk_RmResource_gpumgmtapiAccessCallback; - - // gpumgmtapiShareCallback -- virtual inherited (rmres) base (rmres) - pThis->__gpumgmtapiShareCallback__ = &__nvoc_up_thunk_RmResource_gpumgmtapiShareCallback; - - // gpumgmtapiGetMemInterMapParams -- virtual inherited (rmres) base (rmres) - pThis->__gpumgmtapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpumgmtapiGetMemInterMapParams; - - // gpumgmtapiCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) - pThis->__gpumgmtapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpumgmtapiCheckMemInterUnmap; - - // gpumgmtapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) - pThis->__gpumgmtapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpumgmtapiGetMemoryMappingDescriptor; - - // gpumgmtapiControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__gpumgmtapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpumgmtapiControlSerialization_Prologue; - - // gpumgmtapiControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__gpumgmtapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpumgmtapiControlSerialization_Epilogue; - - // gpumgmtapiControl_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__gpumgmtapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpumgmtapiControl_Prologue; - - // gpumgmtapiControl_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__gpumgmtapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpumgmtapiControl_Epilogue; - - // gpumgmtapiCanCopy -- virtual inherited (res) base (rmres) - pThis->__gpumgmtapiCanCopy__ = &__nvoc_up_thunk_RsResource_gpumgmtapiCanCopy; - - // gpumgmtapiIsDuplicate -- virtual inherited (res) base (rmres) - pThis->__gpumgmtapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpumgmtapiIsDuplicate; - - // gpumgmtapiPreDestruct -- virtual inherited (res) base (rmres) - pThis->__gpumgmtapiPreDestruct__ = &__nvoc_up_thunk_RsResource_gpumgmtapiPreDestruct; - - // gpumgmtapiControl -- virtual inherited (res) base (rmres) - pThis->__gpumgmtapiControl__ = &__nvoc_up_thunk_RsResource_gpumgmtapiControl; - - // gpumgmtapiControlFilter -- virtual inherited (res) base (rmres) - pThis->__gpumgmtapiControlFilter__ = &__nvoc_up_thunk_RsResource_gpumgmtapiControlFilter; - - // gpumgmtapiMap -- virtual inherited (res) base (rmres) - pThis->__gpumgmtapiMap__ = &__nvoc_up_thunk_RsResource_gpumgmtapiMap; - - // gpumgmtapiUnmap -- virtual inherited (res) base (rmres) - pThis->__gpumgmtapiUnmap__ = &__nvoc_up_thunk_RsResource_gpumgmtapiUnmap; - - // gpumgmtapiIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body - pThis->__gpumgmtapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpumgmtapiIsPartialUnmapSupported; - - // gpumgmtapiMapTo -- virtual inherited (res) base (rmres) - pThis->__gpumgmtapiMapTo__ = &__nvoc_up_thunk_RsResource_gpumgmtapiMapTo; - - // gpumgmtapiUnmapFrom -- virtual inherited (res) base (rmres) - pThis->__gpumgmtapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpumgmtapiUnmapFrom; - - // gpumgmtapiGetRefCount -- virtual inherited (res) base (rmres) - pThis->__gpumgmtapiGetRefCount__ = &__nvoc_up_thunk_RsResource_gpumgmtapiGetRefCount; - - // gpumgmtapiAddAdditionalDependants -- virtual inherited (res) base (rmres) - pThis->__gpumgmtapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpumgmtapiAddAdditionalDependants; -} // End __nvoc_init_funcTable_GpuManagementApi_1 with approximately 22 basic block(s). +} // End __nvoc_init_funcTable_GpuManagementApi_1 with approximately 1 basic block(s). // Initialize vtable(s) for 22 virtual method(s). void __nvoc_init_funcTable_GpuManagementApi(GpuManagementApi *pThis) { - // Initialize vtable(s) with 22 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__GpuManagementApi vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) +#endif + .__gpumgmtapiAccessCallback__ = &__nvoc_up_thunk_RmResource_gpumgmtapiAccessCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__gpumgmtapiShareCallback__ = &__nvoc_up_thunk_RmResource_gpumgmtapiShareCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__gpumgmtapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpumgmtapiGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__gpumgmtapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpumgmtapiCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__gpumgmtapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpumgmtapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__gpumgmtapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpumgmtapiControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__gpumgmtapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpumgmtapiControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__gpumgmtapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpumgmtapiControl_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__gpumgmtapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpumgmtapiControl_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__gpumgmtapiCanCopy__ = &__nvoc_up_thunk_RsResource_gpumgmtapiCanCopy, // virtual inherited (res) base (rmres) + .RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__gpumgmtapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpumgmtapiIsDuplicate, // virtual inherited (res) base (rmres) + .RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__gpumgmtapiPreDestruct__ = &__nvoc_up_thunk_RsResource_gpumgmtapiPreDestruct, // virtual inherited (res) base (rmres) + .RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__gpumgmtapiControl__ = &__nvoc_up_thunk_RsResource_gpumgmtapiControl, // virtual inherited (res) base (rmres) + .RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControl__ = &resControl_IMPL, // virtual + .__gpumgmtapiControlFilter__ = &__nvoc_up_thunk_RsResource_gpumgmtapiControlFilter, // virtual inherited (res) base (rmres) + .RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__gpumgmtapiMap__ = &__nvoc_up_thunk_RsResource_gpumgmtapiMap, // virtual inherited (res) base (rmres) + .RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMap__ = &resMap_IMPL, // virtual + .__gpumgmtapiUnmap__ = &__nvoc_up_thunk_RsResource_gpumgmtapiUnmap, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__gpumgmtapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpumgmtapiIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__gpumgmtapiMapTo__ = &__nvoc_up_thunk_RsResource_gpumgmtapiMapTo, // virtual inherited (res) base (rmres) + .RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__gpumgmtapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpumgmtapiUnmapFrom, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__gpumgmtapiGetRefCount__ = &__nvoc_up_thunk_RsResource_gpumgmtapiGetRefCount, // virtual inherited (res) base (rmres) + .RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__gpumgmtapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpumgmtapiAddAdditionalDependants, // virtual inherited (res) base (rmres) + .RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.RmResource.RsResource; // (res) super^2 + pThis->__nvoc_base_RmResource.__nvoc_vtable = &vtable.RmResource; // (rmres) super + pThis->__nvoc_vtable = &vtable; // (gpumgmtapi) this + + // Initialize vtable(s) with 1 per-object function pointer(s). __nvoc_init_funcTable_GpuManagementApi_1(pThis); } diff --git a/src/nvidia/generated/g_gpu_mgmt_api_nvoc.h b/src/nvidia/generated/g_gpu_mgmt_api_nvoc.h index 5b3db5c473..52be41ff98 100644 --- a/src/nvidia/generated/g_gpu_mgmt_api_nvoc.h +++ b/src/nvidia/generated/g_gpu_mgmt_api_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -66,10 +66,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__GpuManagementApi; + + struct GpuManagementApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__GpuManagementApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; @@ -81,8 +86,15 @@ struct GpuManagementApi { struct RmResource *__nvoc_pbase_RmResource; // rmres super struct GpuManagementApi *__nvoc_pbase_GpuManagementApi; // gpumgmtapi - // Vtable with 22 per-object function pointers + // Vtable with 1 per-object function pointer NV_STATUS (*__gpumgmtapiCtrlCmdSetShutdownState__)(struct GpuManagementApi * /*this*/, NV0020_CTRL_GPU_MGMT_SET_SHUTDOWN_STATE_PARAMS *); // exported (id=0x200101) +}; + + +// Metadata including vtable with 21 function pointers plus superclass metadata +struct NVOC_VTABLE__GpuManagementApi { + const struct NVOC_VTABLE__RmResource RmResource; // (rmres) 21 function pointers + NvBool (*__gpumgmtapiAccessCallback__)(struct GpuManagementApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) NvBool (*__gpumgmtapiShareCallback__)(struct GpuManagementApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) NV_STATUS (*__gpumgmtapiGetMemInterMapParams__)(struct GpuManagementApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) @@ -138,47 +150,47 @@ NV_STATUS __nvoc_objCreate_GpuManagementApi(GpuManagementApi**, Dynamic*, NvU32, // Wrapper macros #define gpumgmtapiCtrlCmdSetShutdownState_FNPTR(pGpuMgmt) pGpuMgmt->__gpumgmtapiCtrlCmdSetShutdownState__ #define gpumgmtapiCtrlCmdSetShutdownState(pGpuMgmt, pParams) gpumgmtapiCtrlCmdSetShutdownState_DISPATCH(pGpuMgmt, pParams) -#define gpumgmtapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define gpumgmtapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define gpumgmtapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) gpumgmtapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define gpumgmtapiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ +#define gpumgmtapiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define gpumgmtapiShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) gpumgmtapiShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define gpumgmtapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define gpumgmtapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define gpumgmtapiGetMemInterMapParams(pRmResource, pParams) gpumgmtapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define gpumgmtapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define gpumgmtapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define gpumgmtapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) gpumgmtapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define gpumgmtapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define gpumgmtapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define gpumgmtapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) gpumgmtapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define gpumgmtapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define gpumgmtapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define gpumgmtapiControlSerialization_Prologue(pResource, pCallContext, pParams) gpumgmtapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define gpumgmtapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define gpumgmtapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define gpumgmtapiControlSerialization_Epilogue(pResource, pCallContext, pParams) gpumgmtapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define gpumgmtapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ +#define gpumgmtapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define gpumgmtapiControl_Prologue(pResource, pCallContext, pParams) gpumgmtapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define gpumgmtapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define gpumgmtapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define gpumgmtapiControl_Epilogue(pResource, pCallContext, pParams) gpumgmtapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define gpumgmtapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define gpumgmtapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define gpumgmtapiCanCopy(pResource) gpumgmtapiCanCopy_DISPATCH(pResource) -#define gpumgmtapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define gpumgmtapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define gpumgmtapiIsDuplicate(pResource, hMemory, pDuplicate) gpumgmtapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define gpumgmtapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define gpumgmtapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define gpumgmtapiPreDestruct(pResource) gpumgmtapiPreDestruct_DISPATCH(pResource) -#define gpumgmtapiControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define gpumgmtapiControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControl__ #define gpumgmtapiControl(pResource, pCallContext, pParams) gpumgmtapiControl_DISPATCH(pResource, pCallContext, pParams) -#define gpumgmtapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define gpumgmtapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define gpumgmtapiControlFilter(pResource, pCallContext, pParams) gpumgmtapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define gpumgmtapiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define gpumgmtapiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define gpumgmtapiMap(pResource, pCallContext, pParams, pCpuMapping) gpumgmtapiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define gpumgmtapiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define gpumgmtapiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define gpumgmtapiUnmap(pResource, pCallContext, pCpuMapping) gpumgmtapiUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define gpumgmtapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define gpumgmtapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define gpumgmtapiIsPartialUnmapSupported(pResource) gpumgmtapiIsPartialUnmapSupported_DISPATCH(pResource) -#define gpumgmtapiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define gpumgmtapiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define gpumgmtapiMapTo(pResource, pParams) gpumgmtapiMapTo_DISPATCH(pResource, pParams) -#define gpumgmtapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define gpumgmtapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define gpumgmtapiUnmapFrom(pResource, pParams) gpumgmtapiUnmapFrom_DISPATCH(pResource, pParams) -#define gpumgmtapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define gpumgmtapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define gpumgmtapiGetRefCount(pResource) gpumgmtapiGetRefCount_DISPATCH(pResource) -#define gpumgmtapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define gpumgmtapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define gpumgmtapiAddAdditionalDependants(pClient, pResource, pReference) gpumgmtapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions @@ -187,87 +199,87 @@ static inline NV_STATUS gpumgmtapiCtrlCmdSetShutdownState_DISPATCH(struct GpuMan } static inline NvBool gpumgmtapiAccessCallback_DISPATCH(struct GpuManagementApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__gpumgmtapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__gpumgmtapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool gpumgmtapiShareCallback_DISPATCH(struct GpuManagementApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__gpumgmtapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__gpumgmtapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS gpumgmtapiGetMemInterMapParams_DISPATCH(struct GpuManagementApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__gpumgmtapiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__gpumgmtapiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS gpumgmtapiCheckMemInterUnmap_DISPATCH(struct GpuManagementApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__gpumgmtapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__gpumgmtapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS gpumgmtapiGetMemoryMappingDescriptor_DISPATCH(struct GpuManagementApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__gpumgmtapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__gpumgmtapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS gpumgmtapiControlSerialization_Prologue_DISPATCH(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gpumgmtapiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__gpumgmtapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void gpumgmtapiControlSerialization_Epilogue_DISPATCH(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__gpumgmtapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__gpumgmtapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS gpumgmtapiControl_Prologue_DISPATCH(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gpumgmtapiControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__gpumgmtapiControl_Prologue__(pResource, pCallContext, pParams); } static inline void gpumgmtapiControl_Epilogue_DISPATCH(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__gpumgmtapiControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__gpumgmtapiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool gpumgmtapiCanCopy_DISPATCH(struct GpuManagementApi *pResource) { - return pResource->__gpumgmtapiCanCopy__(pResource); + return pResource->__nvoc_vtable->__gpumgmtapiCanCopy__(pResource); } static inline NV_STATUS gpumgmtapiIsDuplicate_DISPATCH(struct GpuManagementApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__gpumgmtapiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__gpumgmtapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void gpumgmtapiPreDestruct_DISPATCH(struct GpuManagementApi *pResource) { - pResource->__gpumgmtapiPreDestruct__(pResource); + pResource->__nvoc_vtable->__gpumgmtapiPreDestruct__(pResource); } static inline NV_STATUS gpumgmtapiControl_DISPATCH(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gpumgmtapiControl__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__gpumgmtapiControl__(pResource, pCallContext, pParams); } static inline NV_STATUS gpumgmtapiControlFilter_DISPATCH(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gpumgmtapiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__gpumgmtapiControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS gpumgmtapiMap_DISPATCH(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__gpumgmtapiMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__gpumgmtapiMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS gpumgmtapiUnmap_DISPATCH(struct GpuManagementApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__gpumgmtapiUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__gpumgmtapiUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool gpumgmtapiIsPartialUnmapSupported_DISPATCH(struct GpuManagementApi *pResource) { - return pResource->__gpumgmtapiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__gpumgmtapiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS gpumgmtapiMapTo_DISPATCH(struct GpuManagementApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__gpumgmtapiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__gpumgmtapiMapTo__(pResource, pParams); } static inline NV_STATUS gpumgmtapiUnmapFrom_DISPATCH(struct GpuManagementApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__gpumgmtapiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__gpumgmtapiUnmapFrom__(pResource, pParams); } static inline NvU32 gpumgmtapiGetRefCount_DISPATCH(struct GpuManagementApi *pResource) { - return pResource->__gpumgmtapiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__gpumgmtapiGetRefCount__(pResource); } static inline void gpumgmtapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct GpuManagementApi *pResource, RsResourceRef *pReference) { - pResource->__gpumgmtapiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__gpumgmtapiAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS gpumgmtapiCtrlCmdSetShutdownState_IMPL(struct GpuManagementApi *pGpuMgmt, NV0020_CTRL_GPU_MGMT_SET_SHUTDOWN_STATE_PARAMS *pParams); diff --git a/src/nvidia/generated/g_gpu_mgr_nvoc.c b/src/nvidia/generated/g_gpu_mgr_nvoc.c index 07b550ea32..b052ac457e 100644 --- a/src/nvidia/generated/g_gpu_mgr_nvoc.c +++ b/src/nvidia/generated/g_gpu_mgr_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPUMGR = /*pExportInfo=*/ &__nvoc_export_info_OBJGPUMGR }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJGPUMGR = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_gpu_mgr_nvoc.h b/src/nvidia/generated/g_gpu_mgr_nvoc.h index d471d53e27..e9913dabe8 100644 --- a/src/nvidia/generated/g_gpu_mgr_nvoc.h +++ b/src/nvidia/generated/g_gpu_mgr_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -154,11 +154,19 @@ typedef struct CONF_COMPUTE_CAPS // // GPU NVLINK reduced bandwidth mode // -#define GPU_NVLINK_BW_MODE_FULL (0x0) -#define GPU_NVLINK_BW_MODE_OFF (0x1) -#define GPU_NVLINK_BW_MODE_MIN (0x2) -#define GPU_NVLINK_BW_MODE_HALF (0x3) -#define GPU_NVLINK_BW_MODE_3QUARTER (0x4) +#define NV_GPU_NVLINK_BW_MODE_LINK_COUNT 7:3 +#define NV_GPU_NVLINK_BW_MODE 2:0 // Legacy bw mode +#define GPU_NVLINK_BW_MODE_FULL (0x0) +#define GPU_NVLINK_BW_MODE_OFF (0x1) +#define GPU_NVLINK_BW_MODE_MIN (0x2) +#define GPU_NVLINK_BW_MODE_HALF (0x3) +#define GPU_NVLINK_BW_MODE_3QUARTER (0x4) +#define GPU_NVLINK_BW_MODE_LINK_COUNT (0x5) // Indicates link count should be used instead of legacy bw modes + +// RBM settings +#define GPU_NVLINK_BW_MODE_SCOPE_UNSET (0x0) +#define GPU_NVLINK_BW_MODE_SCOPE_PER_NODE (0x1) // Set per node with legacy bw modes +#define GPU_NVLINK_BW_MODE_SCOPE_PER_GPU (0x2) // Set per gpu with link count typedef struct NVLINK_TOPOLOGY_PARAMS { @@ -186,6 +194,18 @@ typedef struct _def_gpu_nvlink_topology_info NVLINK_TOPOLOGY_PARAMS params; } NVLINK_TOPOLOGY_INFO, *PNVLINK_TOPOLOGY_INFO; +typedef struct NVLINK_UNCONTAINED_ERROR_RECOVERY_INFO +{ + NvBool bValid; + NvU64 DomainBusDevice; + NvU64 startTime; + volatile NvU32 active; + volatile NvU32 rcCompleted; + volatile NvU32 uvmIdle; + volatile NvU32 recoveryReady; + NvU8 uuid[RM_SHA1_GID_SIZE]; +} NVLINK_UNCONTAINED_ERROR_RECOVERY_INFO; + typedef struct { OBJGPU *pGpu; @@ -315,6 +335,8 @@ struct OBJGPUMGR { NvU8 powerDisconnectedGpuBus[32]; NVLINK_TOPOLOGY_INFO nvlinkTopologyInfo[32]; NvU8 nvlinkBwMode; + NvU8 bwModeScope; + NVLINK_UNCONTAINED_ERROR_RECOVERY_INFO nvlinkUncontainedErrorRecoveryInfo[32]; GPUMGR_SAVE_MIG_INSTANCE_TOPOLOGY MIGTopologyInfo[32]; void *cachedMIGInfoLock; GPUMGR_CACHED_MIG_STATE cachedMIGInfo[32]; @@ -403,6 +425,9 @@ NvBool gpumgrGetSystemNvlinkTopo_IMPL(NvU64 DomainBusDevice, struct NVLINK_TOPOL void gpumgrUpdateSystemNvlinkTopo_IMPL(NvU64 DomainBusDevice, struct NVLINK_TOPOLOGY_PARAMS *pTopoParams); #define gpumgrUpdateSystemNvlinkTopo(DomainBusDevice, pTopoParams) gpumgrUpdateSystemNvlinkTopo_IMPL(DomainBusDevice, pTopoParams) +NVLINK_UNCONTAINED_ERROR_RECOVERY_INFO *gpumgrGetNvlinkRecoveryInfo_IMPL(NvU64 DomainBusDevice); + +#define gpumgrGetNvlinkRecoveryInfo(DomainBusDevice) gpumgrGetNvlinkRecoveryInfo_IMPL(DomainBusDevice) NV_STATUS gpumgrSetGpuInitDisabledNvlinks_IMPL(NvU32 gpuId, NvU32 mask, NvBool bSkipHwNvlinkDisable); #define gpumgrSetGpuInitDisabledNvlinks(gpuId, mask, bSkipHwNvlinkDisable) gpumgrSetGpuInitDisabledNvlinks_IMPL(gpuId, mask, bSkipHwNvlinkDisable) @@ -412,12 +437,18 @@ NV_STATUS gpumgrGetGpuInitDisabledNvlinks_IMPL(NvU32 gpuId, NvU32 *pMask, NvBool NvU8 gpumgrGetGpuNvlinkBwMode_IMPL(void); #define gpumgrGetGpuNvlinkBwMode() gpumgrGetGpuNvlinkBwMode_IMPL() +NvU8 gpumgrGetGpuNvlinkBwModeScope_IMPL(void); + +#define gpumgrGetGpuNvlinkBwModeScope() gpumgrGetGpuNvlinkBwModeScope_IMPL() void gpumgrSetGpuNvlinkBwModeFromRegistry_IMPL(struct OBJGPU *pGpu); #define gpumgrSetGpuNvlinkBwModeFromRegistry(pGpu) gpumgrSetGpuNvlinkBwModeFromRegistry_IMPL(pGpu) NV_STATUS gpumgrSetGpuNvlinkBwMode_IMPL(NvU8 mode); #define gpumgrSetGpuNvlinkBwMode(mode) gpumgrSetGpuNvlinkBwMode_IMPL(mode) +NV_STATUS gpumgrSetGpuNvlinkBwModePerGpu_IMPL(struct OBJGPU *pGpu, NvU8 mode); + +#define gpumgrSetGpuNvlinkBwModePerGpu(pGpu, mode) gpumgrSetGpuNvlinkBwModePerGpu_IMPL(pGpu, mode) NvBool gpumgrCheckIndirectPeer_IMPL(struct OBJGPU *pGpu, struct OBJGPU *pRemoteGpu); #define gpumgrCheckIndirectPeer(pGpu, pRemoteGpu) gpumgrCheckIndirectPeer_IMPL(pGpu, pRemoteGpu) diff --git a/src/nvidia/generated/g_gpu_nvoc.c b/src/nvidia/generated/g_gpu_nvoc.c index 7075de2002..feba1a5164 100644 --- a/src/nvidia/generated/g_gpu_nvoc.c +++ b/src/nvidia/generated/g_gpu_nvoc.c @@ -79,6 +79,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPU = /*pExportInfo=*/ &__nvoc_export_info_OBJGPU }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJGPU = { /*numEntries=*/ 0, @@ -106,216 +110,228 @@ void __nvoc_init_dataField_OBJGPU(OBJGPU *pThis) { PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - pThis->setProperty(pThis, PDB_PROP_GPU_IS_CONNECTED, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_IS_CONNECTED, NV_TRUE); // NVOC Property Hal field -- PDB_PROP_GPU_TEGRA_SOC_NVDISPLAY // default { - pThis->setProperty(pThis, PDB_PROP_GPU_TEGRA_SOC_NVDISPLAY, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_TEGRA_SOC_NVDISPLAY, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_GPU_TEGRA_SOC_IGPU // default { - pThis->setProperty(pThis, PDB_PROP_GPU_TEGRA_SOC_IGPU, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_TEGRA_SOC_IGPU, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_GPU_ATS_SUPPORTED // default { - pThis->setProperty(pThis, PDB_PROP_GPU_ATS_SUPPORTED, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_ATS_SUPPORTED, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_GPU_BUG_3007008_EMULATE_VF_MMU_TLB_INVALIDATE if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ { - pThis->setProperty(pThis, PDB_PROP_GPU_BUG_3007008_EMULATE_VF_MMU_TLB_INVALIDATE, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_BUG_3007008_EMULATE_VF_MMU_TLB_INVALIDATE, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_GPU_BUG_3007008_EMULATE_VF_MMU_TLB_INVALIDATE, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_BUG_3007008_EMULATE_VF_MMU_TLB_INVALIDATE, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_GPU_ZERO_FB // default { - pThis->setProperty(pThis, PDB_PROP_GPU_ZERO_FB, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_ZERO_FB, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_GPU_CAN_OPTIMIZE_COMPUTE_USE_CASE // default { - pThis->setProperty(pThis, PDB_PROP_GPU_CAN_OPTIMIZE_COMPUTE_USE_CASE, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_CAN_OPTIMIZE_COMPUTE_USE_CASE, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_GPU_MIG_SUPPORTED if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000400UL) )) /* ChipHal: GA100 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_GPU_MIG_SUPPORTED, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_MIG_SUPPORTED, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_GPU_MIG_SUPPORTED, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_MIG_SUPPORTED, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_GPU_VC_CAPABILITY_SUPPORTED if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ { - pThis->setProperty(pThis, PDB_PROP_GPU_VC_CAPABILITY_SUPPORTED, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_VC_CAPABILITY_SUPPORTED, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_GPU_VC_CAPABILITY_SUPPORTED, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_VC_CAPABILITY_SUPPORTED, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_GPU_RESETLESS_MIG_SUPPORTED if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_GPU_RESETLESS_MIG_SUPPORTED, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_RESETLESS_MIG_SUPPORTED, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_GPU_RESETLESS_MIG_SUPPORTED, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_RESETLESS_MIG_SUPPORTED, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_GPU_IS_COT_ENABLED if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_GPU_IS_COT_ENABLED, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_IS_COT_ENABLED, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_GPU_IS_COT_ENABLED, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_IS_COT_ENABLED, NV_FALSE); } // Hal field -- bIsFlexibleFlaSupported if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->bIsFlexibleFlaSupported = ((NvBool)(0 == 0)); + pThis->bIsFlexibleFlaSupported = NV_TRUE; } // default else { - pThis->bIsFlexibleFlaSupported = ((NvBool)(0 != 0)); + pThis->bIsFlexibleFlaSupported = NV_FALSE; } // NVOC Property Hal field -- PDB_PROP_GPU_SRIOV_SYSMEM_DIRTY_PAGE_TRACKING_ENABLED if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_GPU_SRIOV_SYSMEM_DIRTY_PAGE_TRACKING_ENABLED, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_SRIOV_SYSMEM_DIRTY_PAGE_TRACKING_ENABLED, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_GPU_SRIOV_SYSMEM_DIRTY_PAGE_TRACKING_ENABLED, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_SRIOV_SYSMEM_DIRTY_PAGE_TRACKING_ENABLED, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_GPU_VGPU_OFFLOAD_CAPABLE if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f00000UL) )) /* ChipHal: AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_GPU_VGPU_OFFLOAD_CAPABLE, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_VGPU_OFFLOAD_CAPABLE, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_GPU_VGPU_OFFLOAD_CAPABLE, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_VGPU_OFFLOAD_CAPABLE, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_GPU_UNIX_DYNAMIC_POWER_SUPPORTED if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_GPU_UNIX_DYNAMIC_POWER_SUPPORTED, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_UNIX_DYNAMIC_POWER_SUPPORTED, NV_TRUE); } // NVOC Property Hal field -- PDB_PROP_GPU_SKIP_CE_MAPPINGS_NO_NVLINK if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_GPU_SKIP_CE_MAPPINGS_NO_NVLINK, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_SKIP_CE_MAPPINGS_NO_NVLINK, NV_FALSE); } // default else { - pThis->setProperty(pThis, PDB_PROP_GPU_SKIP_CE_MAPPINGS_NO_NVLINK, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_SKIP_CE_MAPPINGS_NO_NVLINK, NV_TRUE); } - pThis->setProperty(pThis, PDB_PROP_GPU_OPTIMUS_GOLD_CFG_SPACE_RESTORE, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_OPTIMUS_GOLD_CFG_SPACE_RESTORE, NV_TRUE); // NVOC Property Hal field -- PDB_PROP_GPU_CC_FEATURE_CAPABLE if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_GPU_CC_FEATURE_CAPABLE, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_CC_FEATURE_CAPABLE, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_GPU_CC_FEATURE_CAPABLE, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_CC_FEATURE_CAPABLE, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_GPU_APM_FEATURE_CAPABLE if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ { - pThis->setProperty(pThis, PDB_PROP_GPU_APM_FEATURE_CAPABLE, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_APM_FEATURE_CAPABLE, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_GPU_APM_FEATURE_CAPABLE, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_APM_FEATURE_CAPABLE, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_GPU_EXTENDED_GSP_RM_INITIALIZATION_TIMEOUT_FOR_VGX if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_GPU_EXTENDED_GSP_RM_INITIALIZATION_TIMEOUT_FOR_VGX, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_EXTENDED_GSP_RM_INITIALIZATION_TIMEOUT_FOR_VGX, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_GPU_EXTENDED_GSP_RM_INITIALIZATION_TIMEOUT_FOR_VGX, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_EXTENDED_GSP_RM_INITIALIZATION_TIMEOUT_FOR_VGX, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_GPU_CHIP_SUPPORTS_RTD3_DEF if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_GPU_CHIP_SUPPORTS_RTD3_DEF, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_CHIP_SUPPORTS_RTD3_DEF, NV_TRUE); } // NVOC Property Hal field -- PDB_PROP_GPU_IS_SOC_SDM // default { - pThis->setProperty(pThis, PDB_PROP_GPU_IS_SOC_SDM, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_IS_SOC_SDM, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_GPU_DISP_PB_REQUIRES_SMMU_BYPASS - pThis->setProperty(pThis, PDB_PROP_GPU_DISP_PB_REQUIRES_SMMU_BYPASS, ((NvBool)(0 == 0))); - pThis->setProperty(pThis, PDB_PROP_GPU_FASTPATH_SEQ_ENABLED, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_GPU_DISP_PB_REQUIRES_SMMU_BYPASS, NV_TRUE); + pThis->setProperty(pThis, PDB_PROP_GPU_FASTPATH_SEQ_ENABLED, NV_FALSE); + pThis->setProperty(pThis, PDB_PROP_GPU_RECOVERY_DRAIN_P2P_REQUIRED, NV_FALSE); + + // NVOC Property Hal field -- PDB_PROP_GPU_RUSD_POLLING_SUPPORT_MONOLITHIC + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ + { + pThis->setProperty(pThis, PDB_PROP_GPU_RUSD_POLLING_SUPPORT_MONOLITHIC, NV_TRUE); + } + // default + else + { + pThis->setProperty(pThis, PDB_PROP_GPU_RUSD_POLLING_SUPPORT_MONOLITHIC, NV_FALSE); + } pThis->deviceInstance = 32; // Hal field -- isVirtual if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->isVirtual = ((NvBool)(0 == 0)); + pThis->isVirtual = NV_TRUE; } else if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ { - pThis->isVirtual = ((NvBool)(0 != 0)); + pThis->isVirtual = NV_FALSE; } // Hal field -- isGspClient if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ { - pThis->isGspClient = ((NvBool)(0 == 0)); + pThis->isGspClient = NV_TRUE; } else if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->isGspClient = ((NvBool)(0 != 0)); + pThis->isGspClient = NV_FALSE; } - pThis->bIsDebugModeEnabled = ((NvBool)(0 != 0)); + pThis->bIsDebugModeEnabled = NV_FALSE; pThis->numOfMclkLockRequests = 0U; @@ -334,139 +350,137 @@ void __nvoc_init_dataField_OBJGPU(OBJGPU *pThis) { pThis->gpuGroupCount = 1; } - pThis->bIsMigRm = ((NvBool)(0 != 0)); + pThis->bIsMigRm = NV_FALSE; // Hal field -- bUnifiedMemorySpaceEnabled // default { - pThis->bUnifiedMemorySpaceEnabled = ((NvBool)(0 != 0)); + pThis->bUnifiedMemorySpaceEnabled = NV_FALSE; } // Hal field -- bWarBug200577889SriovHeavyEnabled - pThis->bWarBug200577889SriovHeavyEnabled = ((NvBool)(0 != 0)); + pThis->bWarBug200577889SriovHeavyEnabled = NV_FALSE; // Hal field -- bNonPowerOf2ChannelCountSupported if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ { - pThis->bNonPowerOf2ChannelCountSupported = ((NvBool)(0 == 0)); + pThis->bNonPowerOf2ChannelCountSupported = NV_TRUE; } // default else { - pThis->bNonPowerOf2ChannelCountSupported = ((NvBool)(0 != 0)); + pThis->bNonPowerOf2ChannelCountSupported = NV_FALSE; } // Hal field -- bWarBug4347206PowerCycleOnUnload // default { - pThis->bWarBug4347206PowerCycleOnUnload = ((NvBool)(0 != 0)); + pThis->bWarBug4347206PowerCycleOnUnload = NV_FALSE; } // Hal field -- bNeed4kPageIsolation // default { - pThis->bNeed4kPageIsolation = ((NvBool)(0 != 0)); + pThis->bNeed4kPageIsolation = NV_FALSE; } // Hal field -- bInstLoc47bitPaWar if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bInstLoc47bitPaWar = ((NvBool)(0 == 0)); + pThis->bInstLoc47bitPaWar = NV_TRUE; } // Hal field -- bIsBarPteInSysmemSupported // default { - pThis->bIsBarPteInSysmemSupported = ((NvBool)(0 != 0)); + pThis->bIsBarPteInSysmemSupported = NV_FALSE; } // Hal field -- bClientRmAllocatedCtxBuffer if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bClientRmAllocatedCtxBuffer = ((NvBool)(0 == 0)); + pThis->bClientRmAllocatedCtxBuffer = NV_TRUE; } // default else { - pThis->bClientRmAllocatedCtxBuffer = ((NvBool)(0 != 0)); + pThis->bClientRmAllocatedCtxBuffer = NV_FALSE; } - pThis->bIterativeMmuWalker = ((NvBool)(0 == 0)); - // Hal field -- bVidmemPreservationBrokenBug3172217 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->bVidmemPreservationBrokenBug3172217 = ((NvBool)(0 == 0)); + pThis->bVidmemPreservationBrokenBug3172217 = NV_TRUE; } // default else { - pThis->bVidmemPreservationBrokenBug3172217 = ((NvBool)(0 != 0)); + pThis->bVidmemPreservationBrokenBug3172217 = NV_FALSE; } // Hal field -- bInstanceMemoryAlwaysCached // default { - pThis->bInstanceMemoryAlwaysCached = ((NvBool)(0 != 0)); + pThis->bInstanceMemoryAlwaysCached = NV_FALSE; } // Hal field -- bComputePolicyTimesliceSupported if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bComputePolicyTimesliceSupported = ((NvBool)(0 == 0)); + pThis->bComputePolicyTimesliceSupported = NV_TRUE; } // Hal field -- bSriovCapable if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bSriovCapable = ((NvBool)(0 == 0)); + pThis->bSriovCapable = NV_TRUE; } // Hal field -- bRecheckSliSupportAtResume if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bRecheckSliSupportAtResume = ((NvBool)(0 == 0)); + pThis->bRecheckSliSupportAtResume = NV_TRUE; } // Hal field -- bGpuNvEncAv1Supported if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x81f00000UL) )) /* ChipHal: AD102 | AD103 | AD104 | AD106 | AD107 | GB102 */ { - pThis->bGpuNvEncAv1Supported = ((NvBool)(0 == 0)); + pThis->bGpuNvEncAv1Supported = NV_TRUE; } // default else { - pThis->bGpuNvEncAv1Supported = ((NvBool)(0 != 0)); + pThis->bGpuNvEncAv1Supported = NV_FALSE; } - pThis->bIsGspOwnedFaultBuffersEnabled = ((NvBool)(0 != 0)); + pThis->bIsGspOwnedFaultBuffersEnabled = NV_FALSE; // Hal field -- bVfResizableBAR1Supported if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->bVfResizableBAR1Supported = ((NvBool)(0 == 0)); + pThis->bVfResizableBAR1Supported = NV_TRUE; } // default else { - pThis->bVfResizableBAR1Supported = ((NvBool)(0 != 0)); + pThis->bVfResizableBAR1Supported = NV_FALSE; } // Hal field -- bVoltaHubIntrSupported if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bVoltaHubIntrSupported = ((NvBool)(0 == 0)); + pThis->bVoltaHubIntrSupported = NV_TRUE; } // Hal field -- bUsePmcDeviceEnableForHostEngine if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bUsePmcDeviceEnableForHostEngine = ((NvBool)(0 == 0)); + pThis->bUsePmcDeviceEnableForHostEngine = NV_TRUE; } // default else { - pThis->bUsePmcDeviceEnableForHostEngine = ((NvBool)(0 != 0)); + pThis->bUsePmcDeviceEnableForHostEngine = NV_FALSE; } } @@ -522,8 +536,13 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuGetDeviceInfoTableSectionInfos__ = &gpuGetDeviceInfoTableSectionInfos_46f6a7; } - // gpuParseDeviceInfoTableSection -- halified (2 hals) body - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ + // gpuParseDeviceInfoTableSection -- halified (3 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + // default + pThis->__gpuParseDeviceInfoTableSection__ = &gpuParseDeviceInfoTableSection_46f6a7; + } + else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ { // default pThis->__gpuParseDeviceInfoTableSection__ = &gpuParseDeviceInfoTableSection_46f6a7; @@ -592,6 +611,130 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuGetRtd3GC6Data__ = &gpuGetRtd3GC6Data_FWCLIENT; } + // gpuSetResetScratchBit -- halified (2 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__gpuSetResetScratchBit__ = &gpuSetResetScratchBit_46f6a7; + } + else + { + pThis->__gpuSetResetScratchBit__ = &gpuSetResetScratchBit_GP100; + } + + // gpuGetResetScratchBit -- halified (2 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__gpuGetResetScratchBit__ = &gpuGetResetScratchBit_46f6a7; + } + else + { + pThis->__gpuGetResetScratchBit__ = &gpuGetResetScratchBit_GP100; + } + + // gpuResetRequiredStateChanged -- halified (2 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__gpuResetRequiredStateChanged__ = &gpuResetRequiredStateChanged_46f6a7; + } + else + { + pThis->__gpuResetRequiredStateChanged__ = &gpuResetRequiredStateChanged_FWCLIENT; + } + + // gpuMarkDeviceForReset -- halified (2 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__gpuMarkDeviceForReset__ = &gpuMarkDeviceForReset_46f6a7; + } + else + { + pThis->__gpuMarkDeviceForReset__ = &gpuMarkDeviceForReset_IMPL; + } + + // gpuUnmarkDeviceForReset -- halified (2 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__gpuUnmarkDeviceForReset__ = &gpuUnmarkDeviceForReset_46f6a7; + } + else + { + pThis->__gpuUnmarkDeviceForReset__ = &gpuUnmarkDeviceForReset_IMPL; + } + + // gpuIsDeviceMarkedForReset -- halified (2 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__gpuIsDeviceMarkedForReset__ = &gpuIsDeviceMarkedForReset_46f6a7; + } + else + { + pThis->__gpuIsDeviceMarkedForReset__ = &gpuIsDeviceMarkedForReset_IMPL; + } + + // gpuSetDrainAndResetScratchBit -- halified (3 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__gpuSetDrainAndResetScratchBit__ = &gpuSetDrainAndResetScratchBit_46f6a7; + } + else + { + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ + { + pThis->__gpuSetDrainAndResetScratchBit__ = &gpuSetDrainAndResetScratchBit_46f6a7; + } + else + { + pThis->__gpuSetDrainAndResetScratchBit__ = &gpuSetDrainAndResetScratchBit_GA100; + } + } + + // gpuGetDrainAndResetScratchBit -- halified (3 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__gpuGetDrainAndResetScratchBit__ = &gpuGetDrainAndResetScratchBit_46f6a7; + } + else + { + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ + { + pThis->__gpuGetDrainAndResetScratchBit__ = &gpuGetDrainAndResetScratchBit_46f6a7; + } + else + { + pThis->__gpuGetDrainAndResetScratchBit__ = &gpuGetDrainAndResetScratchBit_GA100; + } + } + + // gpuMarkDeviceForDrainAndReset -- halified (2 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__gpuMarkDeviceForDrainAndReset__ = &gpuMarkDeviceForDrainAndReset_46f6a7; + } + else + { + pThis->__gpuMarkDeviceForDrainAndReset__ = &gpuMarkDeviceForDrainAndReset_IMPL; + } + + // gpuUnmarkDeviceForDrainAndReset -- halified (2 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__gpuUnmarkDeviceForDrainAndReset__ = &gpuUnmarkDeviceForDrainAndReset_46f6a7; + } + else + { + pThis->__gpuUnmarkDeviceForDrainAndReset__ = &gpuUnmarkDeviceForDrainAndReset_IMPL; + } + + // gpuIsDeviceMarkedForDrainAndReset -- halified (2 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__gpuIsDeviceMarkedForDrainAndReset__ = &gpuIsDeviceMarkedForDrainAndReset_46f6a7; + } + else + { + pThis->__gpuIsDeviceMarkedForDrainAndReset__ = &gpuIsDeviceMarkedForDrainAndReset_IMPL; + } + // gpuPowerOff -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { @@ -677,6 +820,39 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuReadPassThruConfigReg__ = &gpuReadPassThruConfigReg_46f6a7; } + // gpuConfigAccessSanityCheck -- halified (2 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__gpuConfigAccessSanityCheck__ = &gpuConfigAccessSanityCheck_GB100; + } + // default + else + { + pThis->__gpuConfigAccessSanityCheck__ = &gpuConfigAccessSanityCheck_56cd7a; + } + + // gpuReadBusConfigCycle -- halified (2 hals) + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__gpuReadBusConfigCycle__ = &gpuReadBusConfigCycle_GB100; + } + // default + else + { + pThis->__gpuReadBusConfigCycle__ = &gpuReadBusConfigCycle_GM107; + } + + // gpuWriteBusConfigCycle -- halified (2 hals) + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__gpuWriteBusConfigCycle__ = &gpuWriteBusConfigCycle_GB100; + } + // default + else + { + pThis->__gpuWriteBusConfigCycle__ = &gpuWriteBusConfigCycle_GM107; + } + // gpuGetIdInfo -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { @@ -906,7 +1082,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { // gpuFuseSupportsDisplay -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000400UL) )) /* ChipHal: GA100 | GH100 | GB100 | GB102 */ { - pThis->__gpuFuseSupportsDisplay__ = &gpuFuseSupportsDisplay_491d52; + pThis->__gpuFuseSupportsDisplay__ = &gpuFuseSupportsDisplay_3dd2c9; } else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { @@ -935,7 +1111,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { // default else { - pThis->__gpuIsGspToBootInInstInSysMode__ = &gpuIsGspToBootInInstInSysMode_491d52; + pThis->__gpuIsGspToBootInInstInSysMode__ = &gpuIsGspToBootInInstInSysMode_3dd2c9; } // gpuCheckPageRetirementSupport -- halified (2 hals) body @@ -951,7 +1127,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { // gpuIsInternalSku -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__gpuIsInternalSku__ = &gpuIsInternalSku_491d52; + pThis->__gpuIsInternalSku__ = &gpuIsInternalSku_3dd2c9; } else { @@ -977,7 +1153,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { // default else { - pThis->__gpuCheckIfFbhubPoisonIntrPending__ = &gpuCheckIfFbhubPoisonIntrPending_491d52; + pThis->__gpuCheckIfFbhubPoisonIntrPending__ = &gpuCheckIfFbhubPoisonIntrPending_3dd2c9; } // gpuGetSriovCaps -- halified (2 hals) body @@ -995,7 +1171,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { { if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { - pThis->__gpuCheckIsP2PAllocated__ = &gpuCheckIsP2PAllocated_108313; + pThis->__gpuCheckIsP2PAllocated__ = &gpuCheckIsP2PAllocated_86b752; } else { @@ -1004,7 +1180,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { } else { - pThis->__gpuCheckIsP2PAllocated__ = &gpuCheckIsP2PAllocated_491d52; + pThis->__gpuCheckIsP2PAllocated__ = &gpuCheckIsP2PAllocated_3dd2c9; } // gpuPrePowerOff -- halified (2 hals) body @@ -1049,7 +1225,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { // default else { - pThis->__gpuIsAtsSupportedWithSmcMemPartitioning__ = &gpuIsAtsSupportedWithSmcMemPartitioning_491d52; + pThis->__gpuIsAtsSupportedWithSmcMemPartitioning__ = &gpuIsAtsSupportedWithSmcMemPartitioning_3dd2c9; } // gpuIsGlobalPoisonFuseEnabled -- halified (2 hals) @@ -1073,6 +1249,17 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { pThis->__gpuDetermineSelfHostedMode__ = &gpuDetermineSelfHostedMode_b3696a; } + // gpuDetermineSelfHostedSocType -- halified (2 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ + { + pThis->__gpuDetermineSelfHostedSocType__ = &gpuDetermineSelfHostedSocType_GH100; + } + // default + else + { + pThis->__gpuDetermineSelfHostedSocType__ = &gpuDetermineSelfHostedSocType_997682; + } + // gpuDetermineMIGSupport -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { @@ -1114,18 +1301,18 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { // gpuIsSliCapableWithoutDisplay -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->__gpuIsSliCapableWithoutDisplay__ = &gpuIsSliCapableWithoutDisplay_cbe027; + pThis->__gpuIsSliCapableWithoutDisplay__ = &gpuIsSliCapableWithoutDisplay_88bc07; } // default else { - pThis->__gpuIsSliCapableWithoutDisplay__ = &gpuIsSliCapableWithoutDisplay_491d52; + pThis->__gpuIsSliCapableWithoutDisplay__ = &gpuIsSliCapableWithoutDisplay_3dd2c9; } // gpuIsCCEnabledInHw -- halified (4 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__gpuIsCCEnabledInHw__ = &gpuIsCCEnabledInHw_491d52; + pThis->__gpuIsCCEnabledInHw__ = &gpuIsCCEnabledInHw_3dd2c9; } else { @@ -1140,14 +1327,14 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { // default else { - pThis->__gpuIsCCEnabledInHw__ = &gpuIsCCEnabledInHw_491d52; + pThis->__gpuIsCCEnabledInHw__ = &gpuIsCCEnabledInHw_3dd2c9; } } // gpuIsDevModeEnabledInHw -- halified (4 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__gpuIsDevModeEnabledInHw__ = &gpuIsDevModeEnabledInHw_491d52; + pThis->__gpuIsDevModeEnabledInHw__ = &gpuIsDevModeEnabledInHw_3dd2c9; } else { @@ -1162,14 +1349,14 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { // default else { - pThis->__gpuIsDevModeEnabledInHw__ = &gpuIsDevModeEnabledInHw_491d52; + pThis->__gpuIsDevModeEnabledInHw__ = &gpuIsDevModeEnabledInHw_3dd2c9; } } // gpuIsProtectedPcieEnabledInHw -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__gpuIsProtectedPcieEnabledInHw__ = &gpuIsProtectedPcieEnabledInHw_491d52; + pThis->__gpuIsProtectedPcieEnabledInHw__ = &gpuIsProtectedPcieEnabledInHw_3dd2c9; } else { @@ -1180,7 +1367,7 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { // default else { - pThis->__gpuIsProtectedPcieEnabledInHw__ = &gpuIsProtectedPcieEnabledInHw_491d52; + pThis->__gpuIsProtectedPcieEnabledInHw__ = &gpuIsProtectedPcieEnabledInHw_3dd2c9; } } @@ -1192,24 +1379,28 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { // default else { - pThis->__gpuIsCtxBufAllocInPmaSupported__ = &gpuIsCtxBufAllocInPmaSupported_491d52; + pThis->__gpuIsCtxBufAllocInPmaSupported__ = &gpuIsCtxBufAllocInPmaSupported_3dd2c9; } - // gpuUpdateErrorContainmentState -- halified (3 hals) body - if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + // gpuUpdateErrorContainmentState -- halified (2 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ - { - pThis->__gpuUpdateErrorContainmentState__ = &gpuUpdateErrorContainmentState_f91eed; - } - else - { - pThis->__gpuUpdateErrorContainmentState__ = &gpuUpdateErrorContainmentState_GA100; - } + pThis->__gpuUpdateErrorContainmentState__ = &gpuUpdateErrorContainmentState_f91eed; + } + else + { + pThis->__gpuUpdateErrorContainmentState__ = &gpuUpdateErrorContainmentState_GA100; + } + + // gpuSetPartitionErrorAttribution -- halified (2 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__gpuSetPartitionErrorAttribution__ = &gpuSetPartitionErrorAttribution_KERNEL; } + // default else { - pThis->__gpuUpdateErrorContainmentState__ = &gpuUpdateErrorContainmentState_c04480; + pThis->__gpuSetPartitionErrorAttribution__ = &gpuSetPartitionErrorAttribution_c04480; } // gpuWaitForGfwBootComplete -- halified (3 hals) body @@ -1230,22 +1421,33 @@ static void __nvoc_init_funcTable_OBJGPU_1(OBJGPU *pThis) { } } + // gpuIsFlcnRiscvParityError -- halified (2 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__gpuIsFlcnRiscvParityError__ = &gpuIsFlcnRiscvParityError_GB100; + } + // default + else + { + pThis->__gpuIsFlcnRiscvParityError__ = &gpuIsFlcnRiscvParityError_3dd2c9; + } + // gpuGetIsCmpSku -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__gpuGetIsCmpSku__ = &gpuGetIsCmpSku_491d52; + pThis->__gpuGetIsCmpSku__ = &gpuGetIsCmpSku_3dd2c9; } else { - pThis->__gpuGetIsCmpSku__ = &gpuGetIsCmpSku_ceaee8; + pThis->__gpuGetIsCmpSku__ = &gpuGetIsCmpSku_72a2e1; } -} // End __nvoc_init_funcTable_OBJGPU_1 with approximately 143 basic block(s). +} // End __nvoc_init_funcTable_OBJGPU_1 with approximately 179 basic block(s). -// Initialize vtable(s) for 56 virtual method(s). +// Initialize vtable(s) for 73 virtual method(s). void __nvoc_init_funcTable_OBJGPU(OBJGPU *pThis) { - // Initialize vtable(s) with 56 per-object function pointer(s). + // Initialize vtable(s) with 73 per-object function pointer(s). __nvoc_init_funcTable_OBJGPU_1(pThis); } diff --git a/src/nvidia/generated/g_gpu_nvoc.h b/src/nvidia/generated/g_gpu_nvoc.h index fefe20cf3c..f1c3cc99a5 100644 --- a/src/nvidia/generated/g_gpu_nvoc.h +++ b/src/nvidia/generated/g_gpu_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -92,11 +92,11 @@ typedef struct GPUATTACHARG GPUATTACHARG; #include "core/hal.h" #include "core/system.h" #include "diagnostics/traceable.h" -#include "gpu/error_cont.h" #include "gpu/gpu_halspec.h" #include "gpu/gpu_resource_desc.h" #include "gpu/gpu_uuid.h" #include "gpu/mem_mgr/mem_desc.h" +#include "kernel/gpu/error_cont.h" #include "kernel/gpu/gpu_engine_type.h" #include "nvoc/utility.h" #include "prereq_tracker/prereq_tracker.h" @@ -598,7 +598,7 @@ typedef struct typedef struct { - PCLASSDESCRIPTOR pClasses; + CLASSDESCRIPTOR *pClasses; NvU32 *pSuppressClasses; NvU32 numClasses; NvBool bSuppressRead; @@ -609,10 +609,10 @@ typedef struct const CLASSDESCRIPTOR *pClassDescriptors; NvU32 numClassDescriptors; - PENGDESCRIPTOR pEngineInitDescriptors; - PENGDESCRIPTOR pEngineDestroyDescriptors; - PENGDESCRIPTOR pEngineLoadDescriptors; - PENGDESCRIPTOR pEngineUnloadDescriptors; + ENGDESCRIPTOR *pEngineInitDescriptors; + ENGDESCRIPTOR *pEngineDestroyDescriptors; + ENGDESCRIPTOR *pEngineLoadDescriptors; + ENGDESCRIPTOR *pEngineUnloadDescriptors; NvU32 numEngineDescriptors; } GPU_ENGINE_ORDER, *PGPU_ENGINE_ORDER; @@ -741,6 +741,7 @@ typedef struct NvU32 platformId; // used to identify soc NvU32 implementationId; // soc-specific NvU32 revisionId; // soc-revision + NvU32 chipId; // platform (architecture) + implementation PMCBOOT0 pmcBoot0; PMCBOOT42 pmcBoot42; NvU8 subRevision; // sub-revision (NV_FUSE_OPT_SUBREVISION on GPU) @@ -818,7 +819,6 @@ typedef struct #define GPU_MAX_MSENCS NV2080_CTRL_CMD_INTERNAL_MAX_MSENCS #define GPU_MAX_NVDECS NV2080_CTRL_CMD_INTERNAL_MAX_BSPS #define GPU_MAX_NVJPGS 8 -// Bug 3748354 - Use this new value for all chips once Blackwell is released #define GPU_MAX_HSHUBS 12 #define GPU_MAX_OFAS 2 #define GPU_MAX_GSPLITES 4 @@ -900,9 +900,33 @@ typedef struct NvU32 maxDevices; NvU32 maxRows; NvU32 maxRowsPerDevice; + NvU32 priBase; + NvU32 dieletId; } DeviceInfoTableSection; MAKE_VECTOR(DeviceInfoTableSectionVec, DeviceInfoTableSection); +typedef enum +{ + SCHED_POLICY_DEFAULT = 0, + SCHED_POLICY_BEST_EFFORT = 1, + SCHED_POLICY_VGPU_EQUAL_SHARE = 2, + SCHED_POLICY_VGPU_FIXED_SHARE = 3, +} SCHED_POLICY; + +// Scratch bits +#define NV_PBUS_SW_RESET_BITS_SCRATCH_REG 30 + +typedef enum +{ + NV_PM_DEPTH_NONE = 0, + NV_PM_DEPTH_OS_LAYER = 1, + NV_PM_DEPTH_SR_META = 2, + NV_PM_DEPTH_STATE_LOAD = 3, +} NV_PM_DEPTH; + +// Recovery action init value +#define GPU_RECOVERY_ACTION_UNKNOWN 0xff + // // The actual GPU object definition // @@ -942,14 +966,13 @@ union __nvoc_inner_struc_OBJGPU_1__ { struct OBJUVM *pUvm; struct NvDebugDump *pNvd; struct KernelNvlink *pKernelNvlink; - struct OBJGPUMON *pGpuMon; struct KernelHwpm *pKernelHwpm; struct OBJSWENG *pSwEng; struct KernelFsp *pKernelFsp; struct ConfidentialCompute *pConfCompute; struct KernelCcu *pKernelCcu; } named; - Dynamic *pChild[56]; + Dynamic *pChild[55]; }; @@ -970,14 +993,25 @@ struct OBJGPU { struct OBJTRACEABLE *__nvoc_pbase_OBJTRACEABLE; // traceable super struct OBJGPU *__nvoc_pbase_OBJGPU; // gpu - // Vtable with 56 per-object function pointers + // Vtable with 73 per-object function pointers NV_STATUS (*__gpuGetDeviceInfoTableSectionInfos__)(struct OBJGPU * /*this*/, DeviceInfoTableSectionVec *); // halified (2 hals) body - NV_STATUS (*__gpuParseDeviceInfoTableSection__)(struct OBJGPU * /*this*/, DeviceInfoEntryVec *, const DeviceInfoTableSection *); // halified (2 hals) body + NV_STATUS (*__gpuParseDeviceInfoTableSection__)(struct OBJGPU * /*this*/, DeviceInfoEntryVec *, const DeviceInfoTableSection *, const NvU8 *); // halified (3 hals) body NV_STATUS (*__gpuConstructDeviceInfoTable__)(struct OBJGPU * /*this*/); // halified (3 hals) body NV_STATUS (*__gpuGetNameString__)(struct OBJGPU * /*this*/, NvU32, void *); // halified (2 hals) NV_STATUS (*__gpuGetShortNameString__)(struct OBJGPU * /*this*/, NvU8 *); // halified (2 hals) NV_STATUS (*__gpuInitBranding__)(struct OBJGPU * /*this*/); // halified (2 hals) body void (*__gpuGetRtd3GC6Data__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NV_STATUS (*__gpuSetResetScratchBit__)(struct OBJGPU * /*this*/, NvBool); // halified (2 hals) body + NV_STATUS (*__gpuGetResetScratchBit__)(struct OBJGPU * /*this*/, NvBool *); // halified (2 hals) body + NV_STATUS (*__gpuResetRequiredStateChanged__)(struct OBJGPU * /*this*/, NvBool); // halified (2 hals) body + NV_STATUS (*__gpuMarkDeviceForReset__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NV_STATUS (*__gpuUnmarkDeviceForReset__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NV_STATUS (*__gpuIsDeviceMarkedForReset__)(struct OBJGPU * /*this*/, NvBool *); // halified (2 hals) body + NV_STATUS (*__gpuSetDrainAndResetScratchBit__)(struct OBJGPU * /*this*/, NvBool); // halified (3 hals) body + NV_STATUS (*__gpuGetDrainAndResetScratchBit__)(struct OBJGPU * /*this*/, NvBool *); // halified (3 hals) body + NV_STATUS (*__gpuMarkDeviceForDrainAndReset__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NV_STATUS (*__gpuUnmarkDeviceForDrainAndReset__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NV_STATUS (*__gpuIsDeviceMarkedForDrainAndReset__)(struct OBJGPU * /*this*/, NvBool *); // halified (2 hals) body NV_STATUS (*__gpuPowerOff__)(struct OBJGPU * /*this*/); // halified (2 hals) body NV_STATUS (*__gpuWriteBusConfigReg__)(struct OBJGPU * /*this*/, NvU32, NvU32); // halified (2 hals) body NV_STATUS (*__gpuReadBusConfigReg__)(struct OBJGPU * /*this*/, NvU32, NvU32 *); // halified (2 hals) body @@ -986,6 +1020,9 @@ struct OBJGPU { NV_STATUS (*__gpuWriteFunctionConfigReg__)(struct OBJGPU * /*this*/, NvU32, NvU32, NvU32); // halified (2 hals) body NV_STATUS (*__gpuWriteFunctionConfigRegEx__)(struct OBJGPU * /*this*/, NvU32, NvU32, NvU32, THREAD_STATE_NODE *); // halified (2 hals) body NV_STATUS (*__gpuReadPassThruConfigReg__)(struct OBJGPU * /*this*/, NvU32, NvU32 *); // halified (3 hals) body + NV_STATUS (*__gpuConfigAccessSanityCheck__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NV_STATUS (*__gpuReadBusConfigCycle__)(struct OBJGPU * /*this*/, NvU32, NvU32 *); // halified (2 hals) + NV_STATUS (*__gpuWriteBusConfigCycle__)(struct OBJGPU * /*this*/, NvU32, NvU32); // halified (2 hals) void (*__gpuGetIdInfo__)(struct OBJGPU * /*this*/); // halified (3 hals) body NV_STATUS (*__gpuGenGidData__)(struct OBJGPU * /*this*/, NvU8 *, NvU32, NvU32); // halified (2 hals) body NvU8 (*__gpuGetChipSubRev__)(struct OBJGPU * /*this*/); // halified (2 hals) body @@ -1016,6 +1053,7 @@ struct OBJGPU { NvBool (*__gpuIsAtsSupportedWithSmcMemPartitioning__)(struct OBJGPU * /*this*/); // halified (2 hals) body NvBool (*__gpuIsGlobalPoisonFuseEnabled__)(struct OBJGPU * /*this*/); // halified (2 hals) void (*__gpuDetermineSelfHostedMode__)(struct OBJGPU * /*this*/); // halified (2 hals) body + NvU32 (*__gpuDetermineSelfHostedSocType__)(struct OBJGPU * /*this*/); // halified (2 hals) body void (*__gpuDetermineMIGSupport__)(struct OBJGPU * /*this*/); // halified (3 hals) body NV_STATUS (*__gpuInitOptimusSettings__)(struct OBJGPU * /*this*/); // halified (2 hals) body NV_STATUS (*__gpuDeinitOptimusSettings__)(struct OBJGPU * /*this*/); // halified (2 hals) body @@ -1024,11 +1062,13 @@ struct OBJGPU { NvBool (*__gpuIsDevModeEnabledInHw__)(struct OBJGPU * /*this*/); // halified (4 hals) body NvBool (*__gpuIsProtectedPcieEnabledInHw__)(struct OBJGPU * /*this*/); // halified (3 hals) body NvBool (*__gpuIsCtxBufAllocInPmaSupported__)(struct OBJGPU * /*this*/); // halified (2 hals) body - NV_STATUS (*__gpuUpdateErrorContainmentState__)(struct OBJGPU * /*this*/, NV_ERROR_CONT_ERR_ID, NV_ERROR_CONT_LOCATION, NvU32 *); // halified (3 hals) body + NV_STATUS (*__gpuUpdateErrorContainmentState__)(struct OBJGPU * /*this*/, NV_ERROR_CONT_ERR_ID, NV_ERROR_CONT_LOCATION, NvU32 *); // halified (2 hals) body + NV_STATUS (*__gpuSetPartitionErrorAttribution__)(struct OBJGPU * /*this*/, NV_ERROR_CONT_ERR_ID, NV_ERROR_CONT_LOCATION, NvU32); // halified (2 hals) body NV_STATUS (*__gpuWaitForGfwBootComplete__)(struct OBJGPU * /*this*/); // halified (3 hals) body + NvBool (*__gpuIsFlcnRiscvParityError__)(struct OBJGPU * /*this*/, NvU32); // halified (2 hals) body NvBool (*__gpuGetIsCmpSku__)(struct OBJGPU * /*this*/); // halified (2 hals) body - // 100 PDB properties + // 103 PDB properties NvBool PDB_PROP_GPU_HIGH_SPEED_BRIDGE_CONNECTED; NvBool PDB_PROP_GPU_IN_STANDBY; NvBool PDB_PROP_GPU_IN_HIBERNATE; @@ -1087,6 +1127,7 @@ struct OBJGPU { NvBool PDB_PROP_GPU_DO_NOT_CHECK_REG_ACCESS_IN_PM_CODEPATH; NvBool PDB_PROP_GPU_EXTERNAL_HEAP_CONTROL; NvBool PDB_PROP_GPU_IS_MOBILE; + NvBool PDB_PROP_GPU_IS_EXTERNAL_GPU; NvBool PDB_PROP_GPU_RTD3_GC6_SUPPORTED; NvBool PDB_PROP_GPU_RTD3_GC6_ACTIVE; NvBool PDB_PROP_GPU_FAST_GC6_ACTIVE; @@ -1129,6 +1170,8 @@ struct OBJGPU { NvBool PDB_PROP_GPU_FORCE_PERF_BIOS_LEVEL; NvBool PDB_PROP_GPU_FASTPATH_SEQ_ENABLED; NvBool PDB_PROP_GPU_PREPARING_FULLCHIP_RESET; + NvBool PDB_PROP_GPU_RECOVERY_DRAIN_P2P_REQUIRED; + NvBool PDB_PROP_GPU_RUSD_POLLING_SUPPORT_MONOLITHIC; // Data members NvBool bVideoLinkDisabled; @@ -1136,6 +1179,7 @@ struct OBJGPU { NvU32 moduleId; NvU8 nvswitchSupport; NvBool bIsFlexibleFlaSupported; + NV2080_CTRL_GPU_RECOVERY_ACTION currentRecoveryAction; OS_GPU_INFO *pOsGpuInfo; OS_RM_CAPS *pOsRmCaps; NvU32 halImpl; @@ -1154,8 +1198,8 @@ struct OBJGPU { NvU32 gpuPhysicalId; NvU32 gpuTerminatedLinkMask; NvBool gpuLinkTerminationEnabled; - NvU32 subdeviceInstanceOverrideMask; NvBool gspRmInitialized; + NV_PM_DEPTH powerManagementDepth; _GPU_PCIE_PEER_CLIQUE pciePeerClique; NvU32 i2cPortForExtdev; GPUIDINFO idInfo; @@ -1209,6 +1253,7 @@ struct OBJGPU { RmCtrlDeferredCmd pRmCtrlDeferredCmd[2]; ACPI_DATA acpi; ACPI_METHOD_DATA acpiMethodData; + NvBool bSystemHasMux; NV2080_CTRL_INTERNAL_INIT_BRIGHTC_STATE_LOAD_PARAMS backLightMethodData; NvU32 activeFifoEventMthdNotifiers; struct Falcon *constructedFalcons[70]; @@ -1301,7 +1346,6 @@ struct OBJGPU { NvBool bIsBarPteInSysmemSupported; NvBool bRegUsesGlobalSurfaceOverrides; NvBool bClientRmAllocatedCtxBuffer; - NvBool bIterativeMmuWalker; NvBool bEccPageRetirementWithSliAllowed; NvBool bVidmemPreservationBrokenBug3172217; NvBool bInstanceMemoryAlwaysCached; @@ -1316,7 +1360,6 @@ struct OBJGPU { NvBool bIsTitan; NvBool bIsTesla; NvBool bComputePolicyTimesliceSupported; - NvBool bGlobalPoisonFuseEnabled; RmPhysAddr simAccessBufPhysAddr; RmPhysAddr notifyOpSharedSurfacePhysAddr; NvU32 fabricProbeRegKeyOverride; @@ -1330,7 +1373,6 @@ struct OBJGPU { NvBool bIsGspOwnedFaultBuffersEnabled; NvBool bVfResizableBAR1Supported; NvBool bVoltaHubIntrSupported; - NvBool bAmpereErrorContainmentXidEnabled; NvBool bUsePmcDeviceEnableForHostEngine; _GPU_GC6_STATE gc6State; }; @@ -1398,6 +1440,8 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPU; #define PDB_PROP_GPU_IN_SECONDARY_BUS_RESET_BASE_NAME PDB_PROP_GPU_IN_SECONDARY_BUS_RESET #define PDB_PROP_GPU_OPTIMIZE_SPARSE_TEXTURE_BY_DEFAULT_BASE_CAST #define PDB_PROP_GPU_OPTIMIZE_SPARSE_TEXTURE_BY_DEFAULT_BASE_NAME PDB_PROP_GPU_OPTIMIZE_SPARSE_TEXTURE_BY_DEFAULT +#define PDB_PROP_GPU_RECOVERY_DRAIN_P2P_REQUIRED_BASE_CAST +#define PDB_PROP_GPU_RECOVERY_DRAIN_P2P_REQUIRED_BASE_NAME PDB_PROP_GPU_RECOVERY_DRAIN_P2P_REQUIRED #define PDB_PROP_GPU_IS_CONNECTED_BASE_CAST #define PDB_PROP_GPU_IS_CONNECTED_BASE_NAME PDB_PROP_GPU_IS_CONNECTED #define PDB_PROP_GPU_RTD3_GC6_ACTIVE_BASE_CAST @@ -1410,6 +1454,8 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPU; #define PDB_PROP_GPU_UNIX_DYNAMIC_POWER_SUPPORTED_BASE_NAME PDB_PROP_GPU_UNIX_DYNAMIC_POWER_SUPPORTED #define PDB_PROP_GPU_GCOFF_STATE_ENTERING_BASE_CAST #define PDB_PROP_GPU_GCOFF_STATE_ENTERING_BASE_NAME PDB_PROP_GPU_GCOFF_STATE_ENTERING +#define PDB_PROP_GPU_RUSD_POLLING_SUPPORT_MONOLITHIC_BASE_CAST +#define PDB_PROP_GPU_RUSD_POLLING_SUPPORT_MONOLITHIC_BASE_NAME PDB_PROP_GPU_RUSD_POLLING_SUPPORT_MONOLITHIC #define PDB_PROP_GPU_CAN_OPTIMIZE_COMPUTE_USE_CASE_BASE_CAST #define PDB_PROP_GPU_CAN_OPTIMIZE_COMPUTE_USE_CASE_BASE_NAME PDB_PROP_GPU_CAN_OPTIMIZE_COMPUTE_USE_CASE #define PDB_PROP_GPU_ACCOUNTING_ON_BASE_CAST @@ -1438,6 +1484,8 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPU; #define PDB_PROP_GPU_IS_ALL_INST_IN_SYSMEM_BASE_NAME PDB_PROP_GPU_IS_ALL_INST_IN_SYSMEM #define PDB_PROP_GPU_UPSTREAM_PORT_L1_POR_SUPPORTED_BASE_CAST #define PDB_PROP_GPU_UPSTREAM_PORT_L1_POR_SUPPORTED_BASE_NAME PDB_PROP_GPU_UPSTREAM_PORT_L1_POR_SUPPORTED +#define PDB_PROP_GPU_IS_EXTERNAL_GPU_BASE_CAST +#define PDB_PROP_GPU_IS_EXTERNAL_GPU_BASE_NAME PDB_PROP_GPU_IS_EXTERNAL_GPU #define PDB_PROP_GPU_EMULATION_BASE_CAST #define PDB_PROP_GPU_EMULATION_BASE_NAME PDB_PROP_GPU_EMULATION #define PDB_PROP_GPU_APM_FEATURE_CAPABLE_BASE_CAST @@ -1575,8 +1623,8 @@ NV_STATUS __nvoc_objCreate_OBJGPU(OBJGPU**, Dynamic*, NvU32, #define gpuGetDeviceInfoTableSectionInfos(pGpu, pVec) gpuGetDeviceInfoTableSectionInfos_DISPATCH(pGpu, pVec) #define gpuGetDeviceInfoTableSectionInfos_HAL(pGpu, pVec) gpuGetDeviceInfoTableSectionInfos_DISPATCH(pGpu, pVec) #define gpuParseDeviceInfoTableSection_FNPTR(pGpu) pGpu->__gpuParseDeviceInfoTableSection__ -#define gpuParseDeviceInfoTableSection(pGpu, pTable, pSection) gpuParseDeviceInfoTableSection_DISPATCH(pGpu, pTable, pSection) -#define gpuParseDeviceInfoTableSection_HAL(pGpu, pTable, pSection) gpuParseDeviceInfoTableSection_DISPATCH(pGpu, pTable, pSection) +#define gpuParseDeviceInfoTableSection(pGpu, pTable, pSection, pAccumulatedUnitCount) gpuParseDeviceInfoTableSection_DISPATCH(pGpu, pTable, pSection, pAccumulatedUnitCount) +#define gpuParseDeviceInfoTableSection_HAL(pGpu, pTable, pSection, pAccumulatedUnitCount) gpuParseDeviceInfoTableSection_DISPATCH(pGpu, pTable, pSection, pAccumulatedUnitCount) #define gpuConstructDeviceInfoTable_FNPTR(pGpu) pGpu->__gpuConstructDeviceInfoTable__ #define gpuConstructDeviceInfoTable(pGpu) gpuConstructDeviceInfoTable_DISPATCH(pGpu) #define gpuConstructDeviceInfoTable_HAL(pGpu) gpuConstructDeviceInfoTable_DISPATCH(pGpu) @@ -1592,6 +1640,39 @@ NV_STATUS __nvoc_objCreate_OBJGPU(OBJGPU**, Dynamic*, NvU32, #define gpuGetRtd3GC6Data_FNPTR(pGpu) pGpu->__gpuGetRtd3GC6Data__ #define gpuGetRtd3GC6Data(pGpu) gpuGetRtd3GC6Data_DISPATCH(pGpu) #define gpuGetRtd3GC6Data_HAL(pGpu) gpuGetRtd3GC6Data_DISPATCH(pGpu) +#define gpuSetResetScratchBit_FNPTR(pGpu) pGpu->__gpuSetResetScratchBit__ +#define gpuSetResetScratchBit(pGpu, bResetRequired) gpuSetResetScratchBit_DISPATCH(pGpu, bResetRequired) +#define gpuSetResetScratchBit_HAL(pGpu, bResetRequired) gpuSetResetScratchBit_DISPATCH(pGpu, bResetRequired) +#define gpuGetResetScratchBit_FNPTR(pGpu) pGpu->__gpuGetResetScratchBit__ +#define gpuGetResetScratchBit(pGpu, pbResetRequired) gpuGetResetScratchBit_DISPATCH(pGpu, pbResetRequired) +#define gpuGetResetScratchBit_HAL(pGpu, pbResetRequired) gpuGetResetScratchBit_DISPATCH(pGpu, pbResetRequired) +#define gpuResetRequiredStateChanged_FNPTR(pGpu) pGpu->__gpuResetRequiredStateChanged__ +#define gpuResetRequiredStateChanged(pGpu, newState) gpuResetRequiredStateChanged_DISPATCH(pGpu, newState) +#define gpuResetRequiredStateChanged_HAL(pGpu, newState) gpuResetRequiredStateChanged_DISPATCH(pGpu, newState) +#define gpuMarkDeviceForReset_FNPTR(pGpu) pGpu->__gpuMarkDeviceForReset__ +#define gpuMarkDeviceForReset(pGpu) gpuMarkDeviceForReset_DISPATCH(pGpu) +#define gpuMarkDeviceForReset_HAL(pGpu) gpuMarkDeviceForReset_DISPATCH(pGpu) +#define gpuUnmarkDeviceForReset_FNPTR(pGpu) pGpu->__gpuUnmarkDeviceForReset__ +#define gpuUnmarkDeviceForReset(pGpu) gpuUnmarkDeviceForReset_DISPATCH(pGpu) +#define gpuUnmarkDeviceForReset_HAL(pGpu) gpuUnmarkDeviceForReset_DISPATCH(pGpu) +#define gpuIsDeviceMarkedForReset_FNPTR(pGpu) pGpu->__gpuIsDeviceMarkedForReset__ +#define gpuIsDeviceMarkedForReset(pGpu, pbResetRequired) gpuIsDeviceMarkedForReset_DISPATCH(pGpu, pbResetRequired) +#define gpuIsDeviceMarkedForReset_HAL(pGpu, pbResetRequired) gpuIsDeviceMarkedForReset_DISPATCH(pGpu, pbResetRequired) +#define gpuSetDrainAndResetScratchBit_FNPTR(pGpu) pGpu->__gpuSetDrainAndResetScratchBit__ +#define gpuSetDrainAndResetScratchBit(pGpu, bDrainRecommended) gpuSetDrainAndResetScratchBit_DISPATCH(pGpu, bDrainRecommended) +#define gpuSetDrainAndResetScratchBit_HAL(pGpu, bDrainRecommended) gpuSetDrainAndResetScratchBit_DISPATCH(pGpu, bDrainRecommended) +#define gpuGetDrainAndResetScratchBit_FNPTR(pGpu) pGpu->__gpuGetDrainAndResetScratchBit__ +#define gpuGetDrainAndResetScratchBit(pGpu, pbDrainRecommended) gpuGetDrainAndResetScratchBit_DISPATCH(pGpu, pbDrainRecommended) +#define gpuGetDrainAndResetScratchBit_HAL(pGpu, pbDrainRecommended) gpuGetDrainAndResetScratchBit_DISPATCH(pGpu, pbDrainRecommended) +#define gpuMarkDeviceForDrainAndReset_FNPTR(pGpu) pGpu->__gpuMarkDeviceForDrainAndReset__ +#define gpuMarkDeviceForDrainAndReset(pGpu) gpuMarkDeviceForDrainAndReset_DISPATCH(pGpu) +#define gpuMarkDeviceForDrainAndReset_HAL(pGpu) gpuMarkDeviceForDrainAndReset_DISPATCH(pGpu) +#define gpuUnmarkDeviceForDrainAndReset_FNPTR(pGpu) pGpu->__gpuUnmarkDeviceForDrainAndReset__ +#define gpuUnmarkDeviceForDrainAndReset(pGpu) gpuUnmarkDeviceForDrainAndReset_DISPATCH(pGpu) +#define gpuUnmarkDeviceForDrainAndReset_HAL(pGpu) gpuUnmarkDeviceForDrainAndReset_DISPATCH(pGpu) +#define gpuIsDeviceMarkedForDrainAndReset_FNPTR(pGpu) pGpu->__gpuIsDeviceMarkedForDrainAndReset__ +#define gpuIsDeviceMarkedForDrainAndReset(pGpu, pbDrainRecommended) gpuIsDeviceMarkedForDrainAndReset_DISPATCH(pGpu, pbDrainRecommended) +#define gpuIsDeviceMarkedForDrainAndReset_HAL(pGpu, pbDrainRecommended) gpuIsDeviceMarkedForDrainAndReset_DISPATCH(pGpu, pbDrainRecommended) #define gpuPowerOff_FNPTR(pGpu) pGpu->__gpuPowerOff__ #define gpuPowerOff(pGpu) gpuPowerOff_DISPATCH(pGpu) #define gpuPowerOff_HAL(pGpu) gpuPowerOff_DISPATCH(pGpu) @@ -1616,6 +1697,15 @@ NV_STATUS __nvoc_objCreate_OBJGPU(OBJGPU**, Dynamic*, NvU32, #define gpuReadPassThruConfigReg_FNPTR(pGpu) pGpu->__gpuReadPassThruConfigReg__ #define gpuReadPassThruConfigReg(pGpu, index, data) gpuReadPassThruConfigReg_DISPATCH(pGpu, index, data) #define gpuReadPassThruConfigReg_HAL(pGpu, index, data) gpuReadPassThruConfigReg_DISPATCH(pGpu, index, data) +#define gpuConfigAccessSanityCheck_FNPTR(pGpu) pGpu->__gpuConfigAccessSanityCheck__ +#define gpuConfigAccessSanityCheck(pGpu) gpuConfigAccessSanityCheck_DISPATCH(pGpu) +#define gpuConfigAccessSanityCheck_HAL(pGpu) gpuConfigAccessSanityCheck_DISPATCH(pGpu) +#define gpuReadBusConfigCycle_FNPTR(pGpu) pGpu->__gpuReadBusConfigCycle__ +#define gpuReadBusConfigCycle(pGpu, hwDefAddr, pData) gpuReadBusConfigCycle_DISPATCH(pGpu, hwDefAddr, pData) +#define gpuReadBusConfigCycle_HAL(pGpu, hwDefAddr, pData) gpuReadBusConfigCycle_DISPATCH(pGpu, hwDefAddr, pData) +#define gpuWriteBusConfigCycle_FNPTR(pGpu) pGpu->__gpuWriteBusConfigCycle__ +#define gpuWriteBusConfigCycle(pGpu, hwDefAddr, value) gpuWriteBusConfigCycle_DISPATCH(pGpu, hwDefAddr, value) +#define gpuWriteBusConfigCycle_HAL(pGpu, hwDefAddr, value) gpuWriteBusConfigCycle_DISPATCH(pGpu, hwDefAddr, value) #define gpuGetIdInfo_FNPTR(pGpu) pGpu->__gpuGetIdInfo__ #define gpuGetIdInfo(pGpu) gpuGetIdInfo_DISPATCH(pGpu) #define gpuGetIdInfo_HAL(pGpu) gpuGetIdInfo_DISPATCH(pGpu) @@ -1706,6 +1796,9 @@ NV_STATUS __nvoc_objCreate_OBJGPU(OBJGPU**, Dynamic*, NvU32, #define gpuDetermineSelfHostedMode_FNPTR(pGpu) pGpu->__gpuDetermineSelfHostedMode__ #define gpuDetermineSelfHostedMode(pGpu) gpuDetermineSelfHostedMode_DISPATCH(pGpu) #define gpuDetermineSelfHostedMode_HAL(pGpu) gpuDetermineSelfHostedMode_DISPATCH(pGpu) +#define gpuDetermineSelfHostedSocType_FNPTR(pGpu) pGpu->__gpuDetermineSelfHostedSocType__ +#define gpuDetermineSelfHostedSocType(pGpu) gpuDetermineSelfHostedSocType_DISPATCH(pGpu) +#define gpuDetermineSelfHostedSocType_HAL(pGpu) gpuDetermineSelfHostedSocType_DISPATCH(pGpu) #define gpuDetermineMIGSupport_FNPTR(pGpu) pGpu->__gpuDetermineMIGSupport__ #define gpuDetermineMIGSupport(pGpu) gpuDetermineMIGSupport_DISPATCH(pGpu) #define gpuDetermineMIGSupport_HAL(pGpu) gpuDetermineMIGSupport_DISPATCH(pGpu) @@ -1733,9 +1826,15 @@ NV_STATUS __nvoc_objCreate_OBJGPU(OBJGPU**, Dynamic*, NvU32, #define gpuUpdateErrorContainmentState_FNPTR(pGpu) pGpu->__gpuUpdateErrorContainmentState__ #define gpuUpdateErrorContainmentState(pGpu, arg2, arg3, arg4) gpuUpdateErrorContainmentState_DISPATCH(pGpu, arg2, arg3, arg4) #define gpuUpdateErrorContainmentState_HAL(pGpu, arg2, arg3, arg4) gpuUpdateErrorContainmentState_DISPATCH(pGpu, arg2, arg3, arg4) +#define gpuSetPartitionErrorAttribution_FNPTR(pGpu) pGpu->__gpuSetPartitionErrorAttribution__ +#define gpuSetPartitionErrorAttribution(pGpu, arg2, arg3, arg4) gpuSetPartitionErrorAttribution_DISPATCH(pGpu, arg2, arg3, arg4) +#define gpuSetPartitionErrorAttribution_HAL(pGpu, arg2, arg3, arg4) gpuSetPartitionErrorAttribution_DISPATCH(pGpu, arg2, arg3, arg4) #define gpuWaitForGfwBootComplete_FNPTR(pGpu) pGpu->__gpuWaitForGfwBootComplete__ #define gpuWaitForGfwBootComplete(pGpu) gpuWaitForGfwBootComplete_DISPATCH(pGpu) #define gpuWaitForGfwBootComplete_HAL(pGpu) gpuWaitForGfwBootComplete_DISPATCH(pGpu) +#define gpuIsFlcnRiscvParityError_FNPTR(pGpu) pGpu->__gpuIsFlcnRiscvParityError__ +#define gpuIsFlcnRiscvParityError(pGpu, errStatus) gpuIsFlcnRiscvParityError_DISPATCH(pGpu, errStatus) +#define gpuIsFlcnRiscvParityError_HAL(pGpu, errStatus) gpuIsFlcnRiscvParityError_DISPATCH(pGpu, errStatus) #define gpuGetIsCmpSku_FNPTR(pGpu) pGpu->__gpuGetIsCmpSku__ #define gpuGetIsCmpSku(pGpu) gpuGetIsCmpSku_DISPATCH(pGpu) #define gpuGetIsCmpSku_HAL(pGpu) gpuGetIsCmpSku_DISPATCH(pGpu) @@ -1745,8 +1844,8 @@ static inline NV_STATUS gpuGetDeviceInfoTableSectionInfos_DISPATCH(struct OBJGPU return pGpu->__gpuGetDeviceInfoTableSectionInfos__(pGpu, pVec); } -static inline NV_STATUS gpuParseDeviceInfoTableSection_DISPATCH(struct OBJGPU *pGpu, DeviceInfoEntryVec *pTable, const DeviceInfoTableSection *pSection) { - return pGpu->__gpuParseDeviceInfoTableSection__(pGpu, pTable, pSection); +static inline NV_STATUS gpuParseDeviceInfoTableSection_DISPATCH(struct OBJGPU *pGpu, DeviceInfoEntryVec *pTable, const DeviceInfoTableSection *pSection, const NvU8 *pAccumulatedUnitCount) { + return pGpu->__gpuParseDeviceInfoTableSection__(pGpu, pTable, pSection, pAccumulatedUnitCount); } static inline NV_STATUS gpuConstructDeviceInfoTable_DISPATCH(struct OBJGPU *pGpu) { @@ -1769,6 +1868,50 @@ static inline void gpuGetRtd3GC6Data_DISPATCH(struct OBJGPU *pGpu) { pGpu->__gpuGetRtd3GC6Data__(pGpu); } +static inline NV_STATUS gpuSetResetScratchBit_DISPATCH(struct OBJGPU *pGpu, NvBool bResetRequired) { + return pGpu->__gpuSetResetScratchBit__(pGpu, bResetRequired); +} + +static inline NV_STATUS gpuGetResetScratchBit_DISPATCH(struct OBJGPU *pGpu, NvBool *pbResetRequired) { + return pGpu->__gpuGetResetScratchBit__(pGpu, pbResetRequired); +} + +static inline NV_STATUS gpuResetRequiredStateChanged_DISPATCH(struct OBJGPU *pGpu, NvBool newState) { + return pGpu->__gpuResetRequiredStateChanged__(pGpu, newState); +} + +static inline NV_STATUS gpuMarkDeviceForReset_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuMarkDeviceForReset__(pGpu); +} + +static inline NV_STATUS gpuUnmarkDeviceForReset_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuUnmarkDeviceForReset__(pGpu); +} + +static inline NV_STATUS gpuIsDeviceMarkedForReset_DISPATCH(struct OBJGPU *pGpu, NvBool *pbResetRequired) { + return pGpu->__gpuIsDeviceMarkedForReset__(pGpu, pbResetRequired); +} + +static inline NV_STATUS gpuSetDrainAndResetScratchBit_DISPATCH(struct OBJGPU *pGpu, NvBool bDrainRecommended) { + return pGpu->__gpuSetDrainAndResetScratchBit__(pGpu, bDrainRecommended); +} + +static inline NV_STATUS gpuGetDrainAndResetScratchBit_DISPATCH(struct OBJGPU *pGpu, NvBool *pbDrainRecommended) { + return pGpu->__gpuGetDrainAndResetScratchBit__(pGpu, pbDrainRecommended); +} + +static inline NV_STATUS gpuMarkDeviceForDrainAndReset_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuMarkDeviceForDrainAndReset__(pGpu); +} + +static inline NV_STATUS gpuUnmarkDeviceForDrainAndReset_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuUnmarkDeviceForDrainAndReset__(pGpu); +} + +static inline NV_STATUS gpuIsDeviceMarkedForDrainAndReset_DISPATCH(struct OBJGPU *pGpu, NvBool *pbDrainRecommended) { + return pGpu->__gpuIsDeviceMarkedForDrainAndReset__(pGpu, pbDrainRecommended); +} + static inline NV_STATUS gpuPowerOff_DISPATCH(struct OBJGPU *pGpu) { return pGpu->__gpuPowerOff__(pGpu); } @@ -1801,6 +1944,18 @@ static inline NV_STATUS gpuReadPassThruConfigReg_DISPATCH(struct OBJGPU *pGpu, N return pGpu->__gpuReadPassThruConfigReg__(pGpu, index, data); } +static inline NV_STATUS gpuConfigAccessSanityCheck_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuConfigAccessSanityCheck__(pGpu); +} + +static inline NV_STATUS gpuReadBusConfigCycle_DISPATCH(struct OBJGPU *pGpu, NvU32 hwDefAddr, NvU32 *pData) { + return pGpu->__gpuReadBusConfigCycle__(pGpu, hwDefAddr, pData); +} + +static inline NV_STATUS gpuWriteBusConfigCycle_DISPATCH(struct OBJGPU *pGpu, NvU32 hwDefAddr, NvU32 value) { + return pGpu->__gpuWriteBusConfigCycle__(pGpu, hwDefAddr, value); +} + static inline void gpuGetIdInfo_DISPATCH(struct OBJGPU *pGpu) { pGpu->__gpuGetIdInfo__(pGpu); } @@ -1921,6 +2076,10 @@ static inline void gpuDetermineSelfHostedMode_DISPATCH(struct OBJGPU *pGpu) { pGpu->__gpuDetermineSelfHostedMode__(pGpu); } +static inline NvU32 gpuDetermineSelfHostedSocType_DISPATCH(struct OBJGPU *pGpu) { + return pGpu->__gpuDetermineSelfHostedSocType__(pGpu); +} + static inline void gpuDetermineMIGSupport_DISPATCH(struct OBJGPU *pGpu) { pGpu->__gpuDetermineMIGSupport__(pGpu); } @@ -1957,10 +2116,18 @@ static inline NV_STATUS gpuUpdateErrorContainmentState_DISPATCH(struct OBJGPU *p return pGpu->__gpuUpdateErrorContainmentState__(pGpu, arg2, arg3, arg4); } +static inline NV_STATUS gpuSetPartitionErrorAttribution_DISPATCH(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg2, NV_ERROR_CONT_LOCATION arg3, NvU32 arg4) { + return pGpu->__gpuSetPartitionErrorAttribution__(pGpu, arg2, arg3, arg4); +} + static inline NV_STATUS gpuWaitForGfwBootComplete_DISPATCH(struct OBJGPU *pGpu) { return pGpu->__gpuWaitForGfwBootComplete__(pGpu); } +static inline NvBool gpuIsFlcnRiscvParityError_DISPATCH(struct OBJGPU *pGpu, NvU32 errStatus) { + return pGpu->__gpuIsFlcnRiscvParityError__(pGpu, errStatus); +} + static inline NvBool gpuGetIsCmpSku_DISPATCH(struct OBJGPU *pGpu) { return pGpu->__gpuGetIsCmpSku__(pGpu); } @@ -2356,117 +2523,91 @@ static inline RmPhysAddr gpuGetDmaEndAddress(struct OBJGPU *pGpu) { #define gpuGetDmaEndAddress_HAL(pGpu) gpuGetDmaEndAddress(pGpu) -static inline NV_STATUS gpuSetStateResetRequired_395e98(struct OBJGPU *pGpu, NvU32 exceptType) { - return NV_ERR_NOT_SUPPORTED; -} +NV_STATUS gpuReadPBusScratch_TU102(struct OBJGPU *pGpu, NvU8 index); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuSetStateResetRequired(struct OBJGPU *pGpu, NvU32 exceptType) { +static inline NV_STATUS gpuReadPBusScratch(struct OBJGPU *pGpu, NvU8 index) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuSetStateResetRequired(pGpu, exceptType) gpuSetStateResetRequired_395e98(pGpu, exceptType) +#define gpuReadPBusScratch(pGpu, index) gpuReadPBusScratch_TU102(pGpu, index) #endif //__nvoc_gpu_h_disabled -#define gpuSetStateResetRequired_HAL(pGpu, exceptType) gpuSetStateResetRequired(pGpu, exceptType) +#define gpuReadPBusScratch_HAL(pGpu, index) gpuReadPBusScratch(pGpu, index) -static inline NV_STATUS gpuMarkDeviceForReset_395e98(struct OBJGPU *pGpu) { - return NV_ERR_NOT_SUPPORTED; -} +void gpuWritePBusScratch_TU102(struct OBJGPU *pGpu, NvU8 index, NvU32 data); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuMarkDeviceForReset(struct OBJGPU *pGpu) { +static inline void gpuWritePBusScratch(struct OBJGPU *pGpu, NvU8 index, NvU32 data) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); - return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuMarkDeviceForReset(pGpu) gpuMarkDeviceForReset_395e98(pGpu) +#define gpuWritePBusScratch(pGpu, index, data) gpuWritePBusScratch_TU102(pGpu, index, data) #endif //__nvoc_gpu_h_disabled -#define gpuMarkDeviceForReset_HAL(pGpu) gpuMarkDeviceForReset(pGpu) +#define gpuWritePBusScratch_HAL(pGpu, index, data) gpuWritePBusScratch(pGpu, index, data) -static inline NV_STATUS gpuUnmarkDeviceForReset_395e98(struct OBJGPU *pGpu) { +static inline NV_STATUS gpuSetStateResetRequired_46f6a7(struct OBJGPU *pGpu, NvU32 exceptType) { return NV_ERR_NOT_SUPPORTED; } #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuUnmarkDeviceForReset(struct OBJGPU *pGpu) { +static inline NV_STATUS gpuSetStateResetRequired(struct OBJGPU *pGpu, NvU32 exceptType) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuUnmarkDeviceForReset(pGpu) gpuUnmarkDeviceForReset_395e98(pGpu) +#define gpuSetStateResetRequired(pGpu, exceptType) gpuSetStateResetRequired_46f6a7(pGpu, exceptType) #endif //__nvoc_gpu_h_disabled -#define gpuUnmarkDeviceForReset_HAL(pGpu) gpuUnmarkDeviceForReset(pGpu) +#define gpuSetStateResetRequired_HAL(pGpu, exceptType) gpuSetStateResetRequired(pGpu, exceptType) -static inline NV_STATUS gpuIsDeviceMarkedForReset_395e98(struct OBJGPU *pGpu, NvBool *pbResetRequired) { - return NV_ERR_NOT_SUPPORTED; -} +void gpuGetRecoveryAction_IMPL(struct OBJGPU *pGpu, NV2080_CTRL_GPU_GET_RECOVERY_ACTION_PARAMS *pParams); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuIsDeviceMarkedForReset(struct OBJGPU *pGpu, NvBool *pbResetRequired) { +static inline void gpuGetRecoveryAction(struct OBJGPU *pGpu, NV2080_CTRL_GPU_GET_RECOVERY_ACTION_PARAMS *pParams) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); - return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuIsDeviceMarkedForReset(pGpu, pbResetRequired) gpuIsDeviceMarkedForReset_395e98(pGpu, pbResetRequired) +#define gpuGetRecoveryAction(pGpu, pParams) gpuGetRecoveryAction_IMPL(pGpu, pParams) #endif //__nvoc_gpu_h_disabled -#define gpuIsDeviceMarkedForReset_HAL(pGpu, pbResetRequired) gpuIsDeviceMarkedForReset(pGpu, pbResetRequired) +#define gpuGetRecoveryAction_HAL(pGpu, pParams) gpuGetRecoveryAction(pGpu, pParams) -static inline NV_STATUS gpuMarkDeviceForDrainAndReset_395e98(struct OBJGPU *pGpu) { - return NV_ERR_NOT_SUPPORTED; -} +void gpuRefreshRecoveryAction_UCODE(struct OBJGPU *pGpu, NvBool inLock); - -#ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuMarkDeviceForDrainAndReset(struct OBJGPU *pGpu) { - NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); - return NV_ERR_NOT_SUPPORTED; -} -#else //__nvoc_gpu_h_disabled -#define gpuMarkDeviceForDrainAndReset(pGpu) gpuMarkDeviceForDrainAndReset_395e98(pGpu) -#endif //__nvoc_gpu_h_disabled - -#define gpuMarkDeviceForDrainAndReset_HAL(pGpu) gpuMarkDeviceForDrainAndReset(pGpu) - -static inline NV_STATUS gpuUnmarkDeviceForDrainAndReset_395e98(struct OBJGPU *pGpu) { - return NV_ERR_NOT_SUPPORTED; -} +void gpuRefreshRecoveryAction_KERNEL(struct OBJGPU *pGpu, NvBool inLock); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuUnmarkDeviceForDrainAndReset(struct OBJGPU *pGpu) { +static inline void gpuRefreshRecoveryAction(struct OBJGPU *pGpu, NvBool inLock) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); - return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuUnmarkDeviceForDrainAndReset(pGpu) gpuUnmarkDeviceForDrainAndReset_395e98(pGpu) +#define gpuRefreshRecoveryAction(pGpu, inLock) gpuRefreshRecoveryAction_KERNEL(pGpu, inLock) #endif //__nvoc_gpu_h_disabled -#define gpuUnmarkDeviceForDrainAndReset_HAL(pGpu) gpuUnmarkDeviceForDrainAndReset(pGpu) +#define gpuRefreshRecoveryAction_HAL(pGpu, inLock) gpuRefreshRecoveryAction(pGpu, inLock) -static inline NV_STATUS gpuIsDeviceMarkedForDrainAndReset_395e98(struct OBJGPU *pGpu, NvBool *pbDrainRecommended) { - return NV_ERR_NOT_SUPPORTED; -} +void gpuSetRecoveryDrainP2P_UCODE(struct OBJGPU *pGpu, NvBool bDrainP2P); + +void gpuSetRecoveryDrainP2P_KERNEL(struct OBJGPU *pGpu, NvBool bDrainP2P); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuIsDeviceMarkedForDrainAndReset(struct OBJGPU *pGpu, NvBool *pbDrainRecommended) { +static inline void gpuSetRecoveryDrainP2P(struct OBJGPU *pGpu, NvBool bDrainP2P) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); - return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_gpu_h_disabled -#define gpuIsDeviceMarkedForDrainAndReset(pGpu, pbDrainRecommended) gpuIsDeviceMarkedForDrainAndReset_395e98(pGpu, pbDrainRecommended) +#define gpuSetRecoveryDrainP2P(pGpu, bDrainP2P) gpuSetRecoveryDrainP2P_KERNEL(pGpu, bDrainP2P) #endif //__nvoc_gpu_h_disabled -#define gpuIsDeviceMarkedForDrainAndReset_HAL(pGpu, pbDrainRecommended) gpuIsDeviceMarkedForDrainAndReset(pGpu, pbDrainRecommended) +#define gpuSetRecoveryDrainP2P_HAL(pGpu, bDrainP2P) gpuSetRecoveryDrainP2P(pGpu, bDrainP2P) static inline NV_STATUS gpuPrivSecInitRegistryOverrides_56cd7a(struct OBJGPU *pGpu) { return NV_OK; @@ -2661,8 +2802,8 @@ static inline NV_STATUS gpuJtVersionSanityCheck(struct OBJGPU *pGpu) { #define gpuJtVersionSanityCheck_HAL(pGpu) gpuJtVersionSanityCheck(pGpu) -static inline NvBool gpuCompletedGC6PowerOff_cbe027(struct OBJGPU *pGpu) { - return ((NvBool)(0 == 0)); +static inline NvBool gpuCompletedGC6PowerOff_88bc07(struct OBJGPU *pGpu) { + return NV_TRUE; } NvBool gpuCompletedGC6PowerOff_GV100(struct OBJGPU *pGpu); @@ -2674,13 +2815,13 @@ static inline NvBool gpuCompletedGC6PowerOff(struct OBJGPU *pGpu) { return NV_FALSE; } #else //__nvoc_gpu_h_disabled -#define gpuCompletedGC6PowerOff(pGpu) gpuCompletedGC6PowerOff_cbe027(pGpu) +#define gpuCompletedGC6PowerOff(pGpu) gpuCompletedGC6PowerOff_88bc07(pGpu) #endif //__nvoc_gpu_h_disabled #define gpuCompletedGC6PowerOff_HAL(pGpu) gpuCompletedGC6PowerOff(pGpu) -static inline NvBool gpuIsACPIPatchRequiredForBug2473619_491d52(struct OBJGPU *pGpu) { - return ((NvBool)(0 != 0)); +static inline NvBool gpuIsACPIPatchRequiredForBug2473619_3dd2c9(struct OBJGPU *pGpu) { + return NV_FALSE; } @@ -2690,7 +2831,7 @@ static inline NvBool gpuIsACPIPatchRequiredForBug2473619(struct OBJGPU *pGpu) { return NV_FALSE; } #else //__nvoc_gpu_h_disabled -#define gpuIsACPIPatchRequiredForBug2473619(pGpu) gpuIsACPIPatchRequiredForBug2473619_491d52(pGpu) +#define gpuIsACPIPatchRequiredForBug2473619(pGpu) gpuIsACPIPatchRequiredForBug2473619_3dd2c9(pGpu) #endif //__nvoc_gpu_h_disabled #define gpuIsACPIPatchRequiredForBug2473619_HAL(pGpu) gpuIsACPIPatchRequiredForBug2473619(pGpu) @@ -2892,6 +3033,20 @@ static inline NvU32 gpuGetLitterValues(struct OBJGPU *pGpu, NvU32 index) { #define gpuGetLitterValues_HAL(pGpu, index) gpuGetLitterValues(pGpu, index) +NvBool gpuIsAmpereErrorContainmentXidEnabled_KERNEL(struct OBJGPU *pGpu); + + +#ifdef __nvoc_gpu_h_disabled +static inline NvBool gpuIsAmpereErrorContainmentXidEnabled(struct OBJGPU *pGpu) { + NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); + return NV_FALSE; +} +#else //__nvoc_gpu_h_disabled +#define gpuIsAmpereErrorContainmentXidEnabled(pGpu) gpuIsAmpereErrorContainmentXidEnabled_KERNEL(pGpu) +#endif //__nvoc_gpu_h_disabled + +#define gpuIsAmpereErrorContainmentXidEnabled_HAL(pGpu) gpuIsAmpereErrorContainmentXidEnabled(pGpu) + static inline NV_STATUS gpuSetCacheOnlyModeOverrides_56cd7a(struct OBJGPU *pGpu) { return NV_OK; } @@ -2928,6 +3083,8 @@ static inline NV_STATUS gpuSetVFBarSizes_46f6a7(struct OBJGPU *pGpu, NV0080_CTRL NV_STATUS gpuSetVFBarSizes_GA102(struct OBJGPU *pGpu, NV0080_CTRL_GPU_SET_VGPU_VF_BAR1_SIZE_PARAMS *arg2); +NV_STATUS gpuSetVFBarSizes_GH100(struct OBJGPU *pGpu, NV0080_CTRL_GPU_SET_VGPU_VF_BAR1_SIZE_PARAMS *arg2); + #ifdef __nvoc_gpu_h_disabled static inline NV_STATUS gpuSetVFBarSizes(struct OBJGPU *pGpu, NV0080_CTRL_GPU_SET_VGPU_VF_BAR1_SIZE_PARAMS *arg2) { @@ -2972,24 +3129,6 @@ static inline NV_STATUS gpuLoadFailurePathTest(struct OBJGPU *pGpu, NvU32 engSta #define gpuLoadFailurePathTest_HAL(pGpu, engStage, engDescIdx, bStopTest) gpuLoadFailurePathTest(pGpu, engStage, engDescIdx, bStopTest) -static inline NV_STATUS gpuSetPartitionErrorAttribution_c04480(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg2, NV_ERROR_CONT_LOCATION arg3, NvU32 arg4) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); -} - -NV_STATUS gpuSetPartitionErrorAttribution_GA100(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg2, NV_ERROR_CONT_LOCATION arg3, NvU32 arg4); - - -#ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuSetPartitionErrorAttribution(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg2, NV_ERROR_CONT_LOCATION arg3, NvU32 arg4) { - NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); - return NV_ERR_NOT_SUPPORTED; -} -#else //__nvoc_gpu_h_disabled -#define gpuSetPartitionErrorAttribution(pGpu, arg2, arg3, arg4) gpuSetPartitionErrorAttribution_c04480(pGpu, arg2, arg3, arg4) -#endif //__nvoc_gpu_h_disabled - -#define gpuSetPartitionErrorAttribution_HAL(pGpu, arg2, arg3, arg4) gpuSetPartitionErrorAttribution(pGpu, arg2, arg3, arg4) - NV_STATUS gpuCreateRusdMemory_IMPL(struct OBJGPU *pGpu); @@ -3040,7 +3179,7 @@ static inline NV_STATUS gpuGetDeviceInfoTableSectionInfos_46f6a7(struct OBJGPU * return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS gpuParseDeviceInfoTableSection_46f6a7(struct OBJGPU *pGpu, DeviceInfoEntryVec *pTable, const DeviceInfoTableSection *pSection) { +static inline NV_STATUS gpuParseDeviceInfoTableSection_46f6a7(struct OBJGPU *pGpu, DeviceInfoEntryVec *pTable, const DeviceInfoTableSection *pSection, const NvU8 *pAccumulatedUnitCount) { return NV_ERR_NOT_SUPPORTED; } @@ -3076,6 +3215,72 @@ static inline void gpuGetRtd3GC6Data_b3696a(struct OBJGPU *pGpu) { return; } +static inline NV_STATUS gpuSetResetScratchBit_46f6a7(struct OBJGPU *pGpu, NvBool bResetRequired) { + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS gpuSetResetScratchBit_GP100(struct OBJGPU *pGpu, NvBool bResetRequired); + +static inline NV_STATUS gpuGetResetScratchBit_46f6a7(struct OBJGPU *pGpu, NvBool *pbResetRequired) { + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS gpuGetResetScratchBit_GP100(struct OBJGPU *pGpu, NvBool *pbResetRequired); + +static inline NV_STATUS gpuResetRequiredStateChanged_46f6a7(struct OBJGPU *pGpu, NvBool newState) { + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS gpuResetRequiredStateChanged_FWCLIENT(struct OBJGPU *pGpu, NvBool newState); + +static inline NV_STATUS gpuMarkDeviceForReset_46f6a7(struct OBJGPU *pGpu) { + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS gpuMarkDeviceForReset_IMPL(struct OBJGPU *pGpu); + +static inline NV_STATUS gpuUnmarkDeviceForReset_46f6a7(struct OBJGPU *pGpu) { + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS gpuUnmarkDeviceForReset_IMPL(struct OBJGPU *pGpu); + +static inline NV_STATUS gpuIsDeviceMarkedForReset_46f6a7(struct OBJGPU *pGpu, NvBool *pbResetRequired) { + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS gpuIsDeviceMarkedForReset_IMPL(struct OBJGPU *pGpu, NvBool *pbResetRequired); + +static inline NV_STATUS gpuSetDrainAndResetScratchBit_46f6a7(struct OBJGPU *pGpu, NvBool bDrainRecommended) { + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS gpuSetDrainAndResetScratchBit_GA100(struct OBJGPU *pGpu, NvBool bDrainRecommended); + +static inline NV_STATUS gpuGetDrainAndResetScratchBit_46f6a7(struct OBJGPU *pGpu, NvBool *pbDrainRecommended) { + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS gpuGetDrainAndResetScratchBit_GA100(struct OBJGPU *pGpu, NvBool *pbDrainRecommended); + +static inline NV_STATUS gpuMarkDeviceForDrainAndReset_46f6a7(struct OBJGPU *pGpu) { + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS gpuMarkDeviceForDrainAndReset_IMPL(struct OBJGPU *pGpu); + +static inline NV_STATUS gpuUnmarkDeviceForDrainAndReset_46f6a7(struct OBJGPU *pGpu) { + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS gpuUnmarkDeviceForDrainAndReset_IMPL(struct OBJGPU *pGpu); + +static inline NV_STATUS gpuIsDeviceMarkedForDrainAndReset_46f6a7(struct OBJGPU *pGpu, NvBool *pbDrainRecommended) { + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS gpuIsDeviceMarkedForDrainAndReset_IMPL(struct OBJGPU *pGpu, NvBool *pbDrainRecommended); + NV_STATUS gpuPowerOff_KERNEL(struct OBJGPU *pGpu); static inline NV_STATUS gpuPowerOff_46f6a7(struct OBJGPU *pGpu) { @@ -3122,6 +3327,20 @@ static inline NV_STATUS gpuReadPassThruConfigReg_46f6a7(struct OBJGPU *pGpu, NvU return NV_ERR_NOT_SUPPORTED; } +NV_STATUS gpuConfigAccessSanityCheck_GB100(struct OBJGPU *pGpu); + +static inline NV_STATUS gpuConfigAccessSanityCheck_56cd7a(struct OBJGPU *pGpu) { + return NV_OK; +} + +NV_STATUS gpuReadBusConfigCycle_GB100(struct OBJGPU *pGpu, NvU32 hwDefAddr, NvU32 *pData); + +NV_STATUS gpuReadBusConfigCycle_GM107(struct OBJGPU *pGpu, NvU32 hwDefAddr, NvU32 *pData); + +NV_STATUS gpuWriteBusConfigCycle_GB100(struct OBJGPU *pGpu, NvU32 hwDefAddr, NvU32 value); + +NV_STATUS gpuWriteBusConfigCycle_GM107(struct OBJGPU *pGpu, NvU32 hwDefAddr, NvU32 value); + void gpuGetIdInfo_GM107(struct OBJGPU *pGpu); void gpuGetIdInfo_GH100(struct OBJGPU *pGpu); @@ -3247,8 +3466,8 @@ NvBool gpuFuseSupportsDisplay_GM107(struct OBJGPU *pGpu); NvBool gpuFuseSupportsDisplay_GA100(struct OBJGPU *pGpu); -static inline NvBool gpuFuseSupportsDisplay_491d52(struct OBJGPU *pGpu) { - return ((NvBool)(0 != 0)); +static inline NvBool gpuFuseSupportsDisplay_3dd2c9(struct OBJGPU *pGpu) { + return NV_FALSE; } NvU64 gpuGetActiveFBIOs_VF(struct OBJGPU *pGpu); @@ -3259,8 +3478,8 @@ NvU64 gpuGetActiveFBIOs_GM107(struct OBJGPU *pGpu); NvBool gpuIsGspToBootInInstInSysMode_GH100(struct OBJGPU *pGpu); -static inline NvBool gpuIsGspToBootInInstInSysMode_491d52(struct OBJGPU *pGpu) { - return ((NvBool)(0 != 0)); +static inline NvBool gpuIsGspToBootInInstInSysMode_3dd2c9(struct OBJGPU *pGpu) { + return NV_FALSE; } NvBool gpuCheckPageRetirementSupport_VF(struct OBJGPU *pGpu); @@ -3269,8 +3488,8 @@ NvBool gpuCheckPageRetirementSupport_GSPCLIENT(struct OBJGPU *pGpu); NvBool gpuCheckPageRetirementSupport_GV100(struct OBJGPU *pGpu); -static inline NvBool gpuIsInternalSku_491d52(struct OBJGPU *pGpu) { - return ((NvBool)(0 != 0)); +static inline NvBool gpuIsInternalSku_3dd2c9(struct OBJGPU *pGpu) { + return NV_FALSE; } NvBool gpuIsInternalSku_FWCLIENT(struct OBJGPU *pGpu); @@ -3285,8 +3504,8 @@ static inline NV_STATUS gpuClearFbhubPoisonIntrForBug2924523_56cd7a(struct OBJGP NvBool gpuCheckIfFbhubPoisonIntrPending_GA100(struct OBJGPU *pGpu); -static inline NvBool gpuCheckIfFbhubPoisonIntrPending_491d52(struct OBJGPU *pGpu) { - return ((NvBool)(0 != 0)); +static inline NvBool gpuCheckIfFbhubPoisonIntrPending_3dd2c9(struct OBJGPU *pGpu) { + return NV_FALSE; } static inline NV_STATUS gpuGetSriovCaps_46f6a7(struct OBJGPU *pGpu, NV0080_CTRL_GPU_GET_SRIOV_CAPS_PARAMS *arg2) { @@ -3295,14 +3514,14 @@ static inline NV_STATUS gpuGetSriovCaps_46f6a7(struct OBJGPU *pGpu, NV0080_CTRL_ NV_STATUS gpuGetSriovCaps_TU102(struct OBJGPU *pGpu, NV0080_CTRL_GPU_GET_SRIOV_CAPS_PARAMS *arg2); -static inline NvBool gpuCheckIsP2PAllocated_491d52(struct OBJGPU *pGpu) { - return ((NvBool)(0 != 0)); +static inline NvBool gpuCheckIsP2PAllocated_3dd2c9(struct OBJGPU *pGpu) { + return NV_FALSE; } NvBool gpuCheckIsP2PAllocated_GA100(struct OBJGPU *pGpu); -static inline NvBool gpuCheckIsP2PAllocated_108313(struct OBJGPU *pGpu) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 != 0))); +static inline NvBool gpuCheckIsP2PAllocated_86b752(struct OBJGPU *pGpu) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_FALSE); } static inline NV_STATUS gpuPrePowerOff_56cd7a(struct OBJGPU *pGpu) { @@ -3331,8 +3550,8 @@ static inline NvU64 gpuGetFlaVasSize_474d46(struct OBJGPU *pGpu, NvBool bNvswitc NvBool gpuIsAtsSupportedWithSmcMemPartitioning_GH100(struct OBJGPU *pGpu); -static inline NvBool gpuIsAtsSupportedWithSmcMemPartitioning_491d52(struct OBJGPU *pGpu) { - return ((NvBool)(0 != 0)); +static inline NvBool gpuIsAtsSupportedWithSmcMemPartitioning_3dd2c9(struct OBJGPU *pGpu) { + return NV_FALSE; } NvBool gpuIsGlobalPoisonFuseEnabled_VF(struct OBJGPU *pGpu); @@ -3347,6 +3566,12 @@ static inline void gpuDetermineSelfHostedMode_b3696a(struct OBJGPU *pGpu) { void gpuDetermineSelfHostedMode_KERNEL_GH100(struct OBJGPU *pGpu); +NvU32 gpuDetermineSelfHostedSocType_GH100(struct OBJGPU *pGpu); + +static inline NvU32 gpuDetermineSelfHostedSocType_997682(struct OBJGPU *pGpu) { + return NV0000_CTRL_SYSTEM_SH_SOC_TYPE_NA; +} + void gpuDetermineMIGSupport_GH100(struct OBJGPU *pGpu); static inline void gpuDetermineMIGSupport_b3696a(struct OBJGPU *pGpu) { @@ -3367,44 +3592,40 @@ static inline NV_STATUS gpuDeinitOptimusSettings_56cd7a(struct OBJGPU *pGpu) { NV_STATUS gpuDeinitOptimusSettings_IMPL(struct OBJGPU *pGpu); -static inline NvBool gpuIsSliCapableWithoutDisplay_cbe027(struct OBJGPU *pGpu) { - return ((NvBool)(0 == 0)); +static inline NvBool gpuIsSliCapableWithoutDisplay_88bc07(struct OBJGPU *pGpu) { + return NV_TRUE; } -static inline NvBool gpuIsSliCapableWithoutDisplay_491d52(struct OBJGPU *pGpu) { - return ((NvBool)(0 != 0)); +static inline NvBool gpuIsSliCapableWithoutDisplay_3dd2c9(struct OBJGPU *pGpu) { + return NV_FALSE; } -static inline NvBool gpuIsCCEnabledInHw_491d52(struct OBJGPU *pGpu) { - return ((NvBool)(0 != 0)); +static inline NvBool gpuIsCCEnabledInHw_3dd2c9(struct OBJGPU *pGpu) { + return NV_FALSE; } NvBool gpuIsCCEnabledInHw_GH100(struct OBJGPU *pGpu); NvBool gpuIsCCEnabledInHw_GB100(struct OBJGPU *pGpu); -static inline NvBool gpuIsDevModeEnabledInHw_491d52(struct OBJGPU *pGpu) { - return ((NvBool)(0 != 0)); +static inline NvBool gpuIsDevModeEnabledInHw_3dd2c9(struct OBJGPU *pGpu) { + return NV_FALSE; } NvBool gpuIsDevModeEnabledInHw_GH100(struct OBJGPU *pGpu); NvBool gpuIsDevModeEnabledInHw_GB100(struct OBJGPU *pGpu); -static inline NvBool gpuIsProtectedPcieEnabledInHw_491d52(struct OBJGPU *pGpu) { - return ((NvBool)(0 != 0)); +static inline NvBool gpuIsProtectedPcieEnabledInHw_3dd2c9(struct OBJGPU *pGpu) { + return NV_FALSE; } NvBool gpuIsProtectedPcieEnabledInHw_GH100(struct OBJGPU *pGpu); NvBool gpuIsCtxBufAllocInPmaSupported_GA100(struct OBJGPU *pGpu); -static inline NvBool gpuIsCtxBufAllocInPmaSupported_491d52(struct OBJGPU *pGpu) { - return ((NvBool)(0 != 0)); -} - -static inline NV_STATUS gpuUpdateErrorContainmentState_c04480(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg2, NV_ERROR_CONT_LOCATION arg3, NvU32 *arg4) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +static inline NvBool gpuIsCtxBufAllocInPmaSupported_3dd2c9(struct OBJGPU *pGpu) { + return NV_FALSE; } NV_STATUS gpuUpdateErrorContainmentState_GA100(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg2, NV_ERROR_CONT_LOCATION arg3, NvU32 *arg4); @@ -3413,36 +3634,50 @@ static inline NV_STATUS gpuUpdateErrorContainmentState_f91eed(struct OBJGPU *pGp NV_ASSERT_OR_RETURN_PRECOMP(0, NV_OK); } +NV_STATUS gpuSetPartitionErrorAttribution_KERNEL(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg2, NV_ERROR_CONT_LOCATION arg3, NvU32 arg4); + +static inline NV_STATUS gpuSetPartitionErrorAttribution_c04480(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg2, NV_ERROR_CONT_LOCATION arg3, NvU32 arg4) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +} + +NV_STATUS gpuSetPartitionErrorAttribution_GA100(struct OBJGPU *pGpu, NV_ERROR_CONT_ERR_ID arg2, NV_ERROR_CONT_LOCATION arg3, NvU32 arg4); + NV_STATUS gpuWaitForGfwBootComplete_TU102(struct OBJGPU *pGpu); static inline NV_STATUS gpuWaitForGfwBootComplete_5baef9(struct OBJGPU *pGpu) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -static inline NvBool gpuGetIsCmpSku_ceaee8(struct OBJGPU *pGpu) { +NvBool gpuIsFlcnRiscvParityError_GB100(struct OBJGPU *pGpu, NvU32 errStatus); + +static inline NvBool gpuIsFlcnRiscvParityError_3dd2c9(struct OBJGPU *pGpu, NvU32 errStatus) { + return NV_FALSE; +} + +static inline NvBool gpuGetIsCmpSku_72a2e1(struct OBJGPU *pGpu) { NV_ASSERT_PRECOMP(0); - return ((NvBool)(0 != 0)); + return NV_FALSE; } -static inline NvBool gpuGetIsCmpSku_491d52(struct OBJGPU *pGpu) { - return ((NvBool)(0 != 0)); +static inline NvBool gpuGetIsCmpSku_3dd2c9(struct OBJGPU *pGpu) { + return NV_FALSE; } NvBool gpuGetIsCmpSku_GV100(struct OBJGPU *pGpu); -static inline PENGDESCRIPTOR gpuGetInitEngineDescriptors(struct OBJGPU *pGpu) { +static inline ENGDESCRIPTOR *gpuGetInitEngineDescriptors(struct OBJGPU *pGpu) { return pGpu->engineOrder.pEngineInitDescriptors; } -static inline PENGDESCRIPTOR gpuGetLoadEngineDescriptors(struct OBJGPU *pGpu) { +static inline ENGDESCRIPTOR *gpuGetLoadEngineDescriptors(struct OBJGPU *pGpu) { return pGpu->engineOrder.pEngineLoadDescriptors; } -static inline PENGDESCRIPTOR gpuGetUnloadEngineDescriptors(struct OBJGPU *pGpu) { +static inline ENGDESCRIPTOR *gpuGetUnloadEngineDescriptors(struct OBJGPU *pGpu) { return pGpu->engineOrder.pEngineUnloadDescriptors; } -static inline PENGDESCRIPTOR gpuGetDestroyEngineDescriptors(struct OBJGPU *pGpu) { +static inline ENGDESCRIPTOR *gpuGetDestroyEngineDescriptors(struct OBJGPU *pGpu) { return pGpu->engineOrder.pEngineDestroyDescriptors; } @@ -3482,10 +3717,6 @@ static inline RmPhysAddr gpuGetDmaStartAddress(struct OBJGPU *pGpu) { return pGpu->dmaStartAddress; } -static inline NV_STATUS gpuFreeEventHandle(struct OBJGPU *pGpu) { - return NV_OK; -} - static inline NvU32 gpuGetChipMajRev(struct OBJGPU *pGpu) { return pGpu->chipInfo.pmcBoot42.majorRev; } @@ -3506,6 +3737,10 @@ static inline NvU32 gpuGetChipArch(struct OBJGPU *pGpu) { return pGpu->chipInfo.platformId; } +static inline NvU32 gpuGetChipId(struct OBJGPU *pGpu) { + return pGpu->chipInfo.chipId; +} + static inline NvU32 gpuGetChipMinExtRev(struct OBJGPU *pGpu) { return pGpu->chipInfo.pmcBoot42.minorExtRev; } @@ -3610,10 +3845,6 @@ static inline NvBool gpuIsClientRmAllocatedCtxBufferEnabled(struct OBJGPU *pGpu) return pGpu->bClientRmAllocatedCtxBuffer; } -static inline NvBool gpuIsIterativeMmuWalkerEnabled(struct OBJGPU *pGpu) { - return pGpu->bIterativeMmuWalker; -} - static inline NvBool gpuIsEccPageRetirementWithSliAllowed(struct OBJGPU *pGpu) { return pGpu->bEccPageRetirementWithSliAllowed; } @@ -3678,10 +3909,6 @@ static inline NvBool gpuIsVoltaHubIntrSupported(struct OBJGPU *pGpu) { return pGpu->bVoltaHubIntrSupported; } -static inline NvBool gpuIsAmpereErrorContainmentXidEnabled(struct OBJGPU *pGpu) { - return pGpu->bAmpereErrorContainmentXidEnabled; -} - static inline NvBool gpuIsUsePmcDeviceEnableForHostEngineEnabled(struct OBJGPU *pGpu) { return pGpu->bUsePmcDeviceEnableForHostEngine; } @@ -3941,10 +4168,10 @@ static inline NvBool gpuIsClassSupported(struct OBJGPU *pGpu, NvU32 arg2) { #define gpuIsClassSupported(pGpu, arg2) gpuIsClassSupported_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuGetClassByClassId_IMPL(struct OBJGPU *pGpu, NvU32 arg2, PCLASSDESCRIPTOR *arg3); +NV_STATUS gpuGetClassByClassId_IMPL(struct OBJGPU *pGpu, NvU32 arg2, CLASSDESCRIPTOR **arg3); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuGetClassByClassId(struct OBJGPU *pGpu, NvU32 arg2, PCLASSDESCRIPTOR *arg3) { +static inline NV_STATUS gpuGetClassByClassId(struct OBJGPU *pGpu, NvU32 arg2, CLASSDESCRIPTOR **arg3) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } @@ -3952,10 +4179,10 @@ static inline NV_STATUS gpuGetClassByClassId(struct OBJGPU *pGpu, NvU32 arg2, PC #define gpuGetClassByClassId(pGpu, arg2, arg3) gpuGetClassByClassId_IMPL(pGpu, arg2, arg3) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuGetClassByEngineAndClassId_IMPL(struct OBJGPU *pGpu, NvU32 arg2, NvU32 arg3, PCLASSDESCRIPTOR *arg4); +NV_STATUS gpuGetClassByEngineAndClassId_IMPL(struct OBJGPU *pGpu, NvU32 arg2, NvU32 arg3, CLASSDESCRIPTOR **arg4); #ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuGetClassByEngineAndClassId(struct OBJGPU *pGpu, NvU32 arg2, NvU32 arg3, PCLASSDESCRIPTOR *arg4) { +static inline NV_STATUS gpuGetClassByEngineAndClassId(struct OBJGPU *pGpu, NvU32 arg2, NvU32 arg3, CLASSDESCRIPTOR **arg4) { NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); return NV_ERR_NOT_SUPPORTED; } @@ -4061,28 +4288,6 @@ static inline NvBool gpuIsEngDescSupported(struct OBJGPU *pGpu, NvU32 arg2) { #define gpuIsEngDescSupported(pGpu, arg2) gpuIsEngDescSupported_IMPL(pGpu, arg2) #endif //__nvoc_gpu_h_disabled -NV_STATUS gpuReadBusConfigCycle_IMPL(struct OBJGPU *pGpu, NvU32 index, NvU32 *pData); - -#ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuReadBusConfigCycle(struct OBJGPU *pGpu, NvU32 index, NvU32 *pData) { - NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); - return NV_ERR_NOT_SUPPORTED; -} -#else //__nvoc_gpu_h_disabled -#define gpuReadBusConfigCycle(pGpu, index, pData) gpuReadBusConfigCycle_IMPL(pGpu, index, pData) -#endif //__nvoc_gpu_h_disabled - -NV_STATUS gpuWriteBusConfigCycle_IMPL(struct OBJGPU *pGpu, NvU32 index, NvU32 value); - -#ifdef __nvoc_gpu_h_disabled -static inline NV_STATUS gpuWriteBusConfigCycle(struct OBJGPU *pGpu, NvU32 index, NvU32 value) { - NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); - return NV_ERR_NOT_SUPPORTED; -} -#else //__nvoc_gpu_h_disabled -#define gpuWriteBusConfigCycle(pGpu, index, value) gpuWriteBusConfigCycle_IMPL(pGpu, index, value) -#endif //__nvoc_gpu_h_disabled - RM_ENGINE_TYPE gpuGetRmEngineType_IMPL(NvU32 index); #define gpuGetRmEngineType(index) gpuGetRmEngineType_IMPL(index) @@ -4098,6 +4303,9 @@ void gpuGetNv2080EngineTypeList_IMPL(RM_ENGINE_TYPE *pRmEngineList, NvU32 engine NV_STATUS gpuGetRmEngineTypeCapMask_IMPL(NvU32 *NV2080EngineTypeCap, NvU32 capSize, NvU32 *RmEngineTypeCap); #define gpuGetRmEngineTypeCapMask(NV2080EngineTypeCap, capSize, RmEngineTypeCap) gpuGetRmEngineTypeCapMask_IMPL(NV2080EngineTypeCap, capSize, RmEngineTypeCap) +const char *gpuRmEngineTypeToString_IMPL(RM_ENGINE_TYPE engineType); + +#define gpuRmEngineTypeToString(engineType) gpuRmEngineTypeToString_IMPL(engineType) BRANDING_TYPE gpuDetectBranding_IMPL(struct OBJGPU *pGpu); #ifdef __nvoc_gpu_h_disabled @@ -4787,6 +4995,27 @@ static inline NV_STATUS gpuDisableAccounting(struct OBJGPU *arg1, NvBool bForce) #define gpuDisableAccounting(arg1, bForce) gpuDisableAccounting_IMPL(arg1, bForce) #endif //__nvoc_gpu_h_disabled +const char *gpuGetSchedulerPolicy_IMPL(struct OBJGPU *pGpu, NvU32 *pSchedPolicy); + +#ifdef __nvoc_gpu_h_disabled +static inline const char *gpuGetSchedulerPolicy(struct OBJGPU *pGpu, NvU32 *pSchedPolicy) { + NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); + return NULL; +} +#else //__nvoc_gpu_h_disabled +#define gpuGetSchedulerPolicy(pGpu, pSchedPolicy) gpuGetSchedulerPolicy_IMPL(pGpu, pSchedPolicy) +#endif //__nvoc_gpu_h_disabled + +void gpuApplySchedulerPolicy_IMPL(struct OBJGPU *pGpu); + +#ifdef __nvoc_gpu_h_disabled +static inline void gpuApplySchedulerPolicy(struct OBJGPU *pGpu) { + NV_ASSERT_FAILED_PRECOMP("OBJGPU was disabled!"); +} +#else //__nvoc_gpu_h_disabled +#define gpuApplySchedulerPolicy(pGpu) gpuApplySchedulerPolicy_IMPL(pGpu) +#endif //__nvoc_gpu_h_disabled + #undef PRIVATE_FIELD @@ -4851,14 +5080,8 @@ gpuGetSubdeviceMask struct OBJGPU *pGpu ) { - NvU32 subdeviceMask = 1 << pGpu->subdeviceInstance; - - if (pGpu->subdeviceInstanceOverrideMask != 0) - { - subdeviceMask = pGpu->subdeviceInstanceOverrideMask; - } - return subdeviceMask; + return 1 << pGpu->subdeviceInstance; } static NV_INLINE NvU32 diff --git a/src/nvidia/generated/g_gpu_resource_nvoc.c b/src/nvidia/generated/g_gpu_resource_nvoc.c index 62c26b666f..374b1cfda1 100644 --- a/src/nvidia/generated/g_gpu_resource_nvoc.c +++ b/src/nvidia/generated/g_gpu_resource_nvoc.c @@ -84,113 +84,156 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_GpuResource = /*pExportInfo=*/ &__nvoc_export_info_GpuResource }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this + // 4 down-thunk(s) defined to bridge methods in GpuResource from superclasses // gpuresControl: virtual override (res) base (rmres) -static NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) - __nvoc_rtti_GpuResource_RsResource.offset), pCallContext, pParams); } // gpuresMap: virtual override (res) base (rmres) -static NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) - __nvoc_rtti_GpuResource_RsResource.offset), pCallContext, pParams, pCpuMapping); } // gpuresUnmap: virtual override (res) base (rmres) -static NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) - __nvoc_rtti_GpuResource_RsResource.offset), pCallContext, pCpuMapping); } // gpuresShareCallback: virtual override (res) base (rmres) -static NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) - __nvoc_rtti_GpuResource_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // this +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // this + // 17 up-thunk(s) defined to bridge methods in GpuResource to superclasses // gpuresAccessCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // gpuresGetMemInterMapParams: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GpuResource_RmResource.offset), pParams); } // gpuresCheckMemInterUnmap: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GpuResource_RmResource.offset), bSubdeviceHandleProvided); } // gpuresGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GpuResource_RmResource.offset), ppMemDesc); } // gpuresControlSerialization_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RmResource.offset), pCallContext, pParams); } // gpuresControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RmResource.offset), pCallContext, pParams); } // gpuresControl_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RmResource.offset), pCallContext, pParams); } // gpuresControl_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RmResource.offset), pCallContext, pParams); } // gpuresCanCopy: virtual inherited (res) base (rmres) -static NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource) { +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RsResource.offset)); } // gpuresIsDuplicate: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RsResource.offset), hMemory, pDuplicate); } // gpuresPreDestruct: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource) { +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RsResource.offset)); } // gpuresControlFilter: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RsResource.offset), pCallContext, pParams); } // gpuresIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body -static NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource) { +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RsResource.offset)); } // gpuresMapTo: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RsResource.offset), pParams); } // gpuresUnmapFrom: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RsResource.offset), pParams); } // gpuresGetRefCount: virtual inherited (res) base (rmres) -static NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource) { +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RsResource.offset)); } // gpuresAddAdditionalDependants: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuResource_RsResource.offset), pReference); } @@ -233,92 +276,84 @@ NV_STATUS __nvoc_ctor_GpuResource(GpuResource *pThis, struct CALL_CONTEXT * arg_ // Vtable initialization static void __nvoc_init_funcTable_GpuResource_1(GpuResource *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // gpuresControl -- virtual override (res) base (rmres) - pThis->__gpuresControl__ = &gpuresControl_IMPL; - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl; - - // gpuresMap -- virtual override (res) base (rmres) - pThis->__gpuresMap__ = &gpuresMap_IMPL; - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap; - - // gpuresUnmap -- virtual override (res) base (rmres) - pThis->__gpuresUnmap__ = &gpuresUnmap_IMPL; - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap; - - // gpuresShareCallback -- virtual override (res) base (rmres) - pThis->__gpuresShareCallback__ = &gpuresShareCallback_IMPL; - pThis->__nvoc_base_RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback; - - // gpuresGetRegBaseOffsetAndSize -- virtual - pThis->__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL; - - // gpuresGetMapAddrSpace -- virtual - pThis->__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL; - - // gpuresInternalControlForward -- virtual - pThis->__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL; - - // gpuresGetInternalObjectHandle -- virtual - pThis->__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL; - - // gpuresAccessCallback -- virtual inherited (rmres) base (rmres) - pThis->__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback; - - // gpuresGetMemInterMapParams -- virtual inherited (rmres) base (rmres) - pThis->__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams; - - // gpuresCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) - pThis->__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap; - - // gpuresGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) - pThis->__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor; - - // gpuresControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue; - - // gpuresControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue; - - // gpuresControl_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue; - - // gpuresControl_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue; - - // gpuresCanCopy -- virtual inherited (res) base (rmres) - pThis->__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy; - - // gpuresIsDuplicate -- virtual inherited (res) base (rmres) - pThis->__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate; - - // gpuresPreDestruct -- virtual inherited (res) base (rmres) - pThis->__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct; - - // gpuresControlFilter -- virtual inherited (res) base (rmres) - pThis->__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter; - - // gpuresIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body - pThis->__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported; - - // gpuresMapTo -- virtual inherited (res) base (rmres) - pThis->__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo; - - // gpuresUnmapFrom -- virtual inherited (res) base (rmres) - pThis->__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom; - - // gpuresGetRefCount -- virtual inherited (res) base (rmres) - pThis->__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount; - - // gpuresAddAdditionalDependants -- virtual inherited (res) base (rmres) - pThis->__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants; -} // End __nvoc_init_funcTable_GpuResource_1 with approximately 29 basic block(s). +} // End __nvoc_init_funcTable_GpuResource_1 // Initialize vtable(s) for 25 virtual method(s). void __nvoc_init_funcTable_GpuResource(GpuResource *pThis) { - // Initialize vtable(s) with 25 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__GpuResource vtable = { + .__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.RmResource.RsResource; // (res) super^2 + pThis->__nvoc_base_RmResource.__nvoc_vtable = &vtable.RmResource; // (rmres) super + pThis->__nvoc_vtable = &vtable; // (gpures) this __nvoc_init_funcTable_GpuResource_1(pThis); } diff --git a/src/nvidia/generated/g_gpu_resource_nvoc.h b/src/nvidia/generated/g_gpu_resource_nvoc.h index 244a31b260..659b49f8e5 100644 --- a/src/nvidia/generated/g_gpu_resource_nvoc.h +++ b/src/nvidia/generated/g_gpu_resource_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -107,10 +107,15 @@ typedef struct Subdevice Subdevice; #endif +// Metadata including vtable +struct NVOC_VTABLE__GpuResource; + + struct GpuResource { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__GpuResource *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; @@ -122,7 +127,19 @@ struct GpuResource { struct RmResource *__nvoc_pbase_RmResource; // rmres super struct GpuResource *__nvoc_pbase_GpuResource; // gpures - // Vtable with 25 per-object function pointers + // Data members + struct OBJGPUGRP *pGpuGrp; + struct OBJGPU *pGpu; + struct Device *pDevice; + struct Subdevice *pSubdevice; + NvBool bBcResource; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__GpuResource { + const struct NVOC_VTABLE__RmResource RmResource; // (rmres) 21 function pointers + NV_STATUS (*__gpuresControl__)(struct GpuResource * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (rmres) NV_STATUS (*__gpuresMap__)(struct GpuResource * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual override (res) base (rmres) NV_STATUS (*__gpuresUnmap__)(struct GpuResource * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual override (res) base (rmres) @@ -148,13 +165,6 @@ struct GpuResource { NV_STATUS (*__gpuresUnmapFrom__)(struct GpuResource * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) NvU32 (*__gpuresGetRefCount__)(struct GpuResource * /*this*/); // virtual inherited (res) base (rmres) void (*__gpuresAddAdditionalDependants__)(struct RsClient *, struct GpuResource * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) - - // Data members - struct OBJGPUGRP *pGpuGrp; - struct OBJGPU *pGpu; - struct Device *pDevice; - struct Subdevice *pSubdevice; - NvBool bBcResource; }; #ifndef __NVOC_CLASS_GpuResource_TYPEDEF__ @@ -187,156 +197,156 @@ NV_STATUS __nvoc_objCreate_GpuResource(GpuResource**, Dynamic*, NvU32, struct CA // Wrapper macros -#define gpuresControl_FNPTR(pGpuResource) pGpuResource->__gpuresControl__ +#define gpuresControl_FNPTR(pGpuResource) pGpuResource->__nvoc_vtable->__gpuresControl__ #define gpuresControl(pGpuResource, pCallContext, pParams) gpuresControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define gpuresMap_FNPTR(pGpuResource) pGpuResource->__gpuresMap__ +#define gpuresMap_FNPTR(pGpuResource) pGpuResource->__nvoc_vtable->__gpuresMap__ #define gpuresMap(pGpuResource, pCallContext, pParams, pCpuMapping) gpuresMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define gpuresUnmap_FNPTR(pGpuResource) pGpuResource->__gpuresUnmap__ +#define gpuresUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_vtable->__gpuresUnmap__ #define gpuresUnmap(pGpuResource, pCallContext, pCpuMapping) gpuresUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define gpuresShareCallback_FNPTR(pGpuResource) pGpuResource->__gpuresShareCallback__ +#define gpuresShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_vtable->__gpuresShareCallback__ #define gpuresShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) gpuresShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define gpuresGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__gpuresGetRegBaseOffsetAndSize__ +#define gpuresGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define gpuresGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) gpuresGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define gpuresGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__gpuresGetMapAddrSpace__ +#define gpuresGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_vtable->__gpuresGetMapAddrSpace__ #define gpuresGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) gpuresGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define gpuresInternalControlForward_FNPTR(pGpuResource) pGpuResource->__gpuresInternalControlForward__ +#define gpuresInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_vtable->__gpuresInternalControlForward__ #define gpuresInternalControlForward(pGpuResource, command, pParams, size) gpuresInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define gpuresGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__gpuresGetInternalObjectHandle__ +#define gpuresGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define gpuresGetInternalObjectHandle(pGpuResource) gpuresGetInternalObjectHandle_DISPATCH(pGpuResource) -#define gpuresAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define gpuresAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define gpuresAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) gpuresAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define gpuresGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define gpuresGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define gpuresGetMemInterMapParams(pRmResource, pParams) gpuresGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define gpuresCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define gpuresCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define gpuresCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) gpuresCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define gpuresGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define gpuresGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define gpuresGetMemoryMappingDescriptor(pRmResource, ppMemDesc) gpuresGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define gpuresControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define gpuresControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define gpuresControlSerialization_Prologue(pResource, pCallContext, pParams) gpuresControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define gpuresControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define gpuresControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define gpuresControlSerialization_Epilogue(pResource, pCallContext, pParams) gpuresControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define gpuresControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ +#define gpuresControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define gpuresControl_Prologue(pResource, pCallContext, pParams) gpuresControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define gpuresControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define gpuresControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define gpuresControl_Epilogue(pResource, pCallContext, pParams) gpuresControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define gpuresCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define gpuresCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define gpuresCanCopy(pResource) gpuresCanCopy_DISPATCH(pResource) -#define gpuresIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define gpuresIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define gpuresIsDuplicate(pResource, hMemory, pDuplicate) gpuresIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define gpuresPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define gpuresPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define gpuresPreDestruct(pResource) gpuresPreDestruct_DISPATCH(pResource) -#define gpuresControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define gpuresControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define gpuresControlFilter(pResource, pCallContext, pParams) gpuresControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define gpuresIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define gpuresIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define gpuresIsPartialUnmapSupported(pResource) gpuresIsPartialUnmapSupported_DISPATCH(pResource) -#define gpuresMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define gpuresMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define gpuresMapTo(pResource, pParams) gpuresMapTo_DISPATCH(pResource, pParams) -#define gpuresUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define gpuresUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define gpuresUnmapFrom(pResource, pParams) gpuresUnmapFrom_DISPATCH(pResource, pParams) -#define gpuresGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define gpuresGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define gpuresGetRefCount(pResource) gpuresGetRefCount_DISPATCH(pResource) -#define gpuresAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define gpuresAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define gpuresAddAdditionalDependants(pClient, pResource, pReference) gpuresAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NV_STATUS gpuresControl_DISPATCH(struct GpuResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__gpuresControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__gpuresControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS gpuresMap_DISPATCH(struct GpuResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__gpuresMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__gpuresMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS gpuresUnmap_DISPATCH(struct GpuResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__gpuresUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__gpuresUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool gpuresShareCallback_DISPATCH(struct GpuResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__gpuresShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__gpuresShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS gpuresGetRegBaseOffsetAndSize_DISPATCH(struct GpuResource *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__gpuresGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS gpuresGetMapAddrSpace_DISPATCH(struct GpuResource *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__gpuresGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__gpuresGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS gpuresInternalControlForward_DISPATCH(struct GpuResource *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__gpuresInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__gpuresInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle gpuresGetInternalObjectHandle_DISPATCH(struct GpuResource *pGpuResource) { - return pGpuResource->__gpuresGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__gpuresGetInternalObjectHandle__(pGpuResource); } static inline NvBool gpuresAccessCallback_DISPATCH(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__gpuresAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__gpuresAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS gpuresGetMemInterMapParams_DISPATCH(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__gpuresGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__gpuresGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS gpuresCheckMemInterUnmap_DISPATCH(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__gpuresCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__gpuresCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS gpuresGetMemoryMappingDescriptor_DISPATCH(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__gpuresGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__gpuresGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS gpuresControlSerialization_Prologue_DISPATCH(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gpuresControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__gpuresControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void gpuresControlSerialization_Epilogue_DISPATCH(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__gpuresControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__gpuresControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS gpuresControl_Prologue_DISPATCH(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gpuresControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__gpuresControl_Prologue__(pResource, pCallContext, pParams); } static inline void gpuresControl_Epilogue_DISPATCH(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__gpuresControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__gpuresControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool gpuresCanCopy_DISPATCH(struct GpuResource *pResource) { - return pResource->__gpuresCanCopy__(pResource); + return pResource->__nvoc_vtable->__gpuresCanCopy__(pResource); } static inline NV_STATUS gpuresIsDuplicate_DISPATCH(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__gpuresIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__gpuresIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void gpuresPreDestruct_DISPATCH(struct GpuResource *pResource) { - pResource->__gpuresPreDestruct__(pResource); + pResource->__nvoc_vtable->__gpuresPreDestruct__(pResource); } static inline NV_STATUS gpuresControlFilter_DISPATCH(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gpuresControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__gpuresControlFilter__(pResource, pCallContext, pParams); } static inline NvBool gpuresIsPartialUnmapSupported_DISPATCH(struct GpuResource *pResource) { - return pResource->__gpuresIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__gpuresIsPartialUnmapSupported__(pResource); } static inline NV_STATUS gpuresMapTo_DISPATCH(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__gpuresMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__gpuresMapTo__(pResource, pParams); } static inline NV_STATUS gpuresUnmapFrom_DISPATCH(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__gpuresUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__gpuresUnmapFrom__(pResource, pParams); } static inline NvU32 gpuresGetRefCount_DISPATCH(struct GpuResource *pResource) { - return pResource->__gpuresGetRefCount__(pResource); + return pResource->__nvoc_vtable->__gpuresGetRefCount__(pResource); } static inline void gpuresAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference) { - pResource->__gpuresAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__gpuresAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS gpuresControl_IMPL(struct GpuResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); diff --git a/src/nvidia/generated/g_gpu_user_shared_data_nvoc.c b/src/nvidia/generated/g_gpu_user_shared_data_nvoc.c index 6cd0df601e..deeb839ca9 100644 --- a/src/nvidia/generated/g_gpu_user_shared_data_nvoc.c +++ b/src/nvidia/generated/g_gpu_user_shared_data_nvoc.c @@ -117,138 +117,207 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GpuUserS }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super +NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super +NvBool __nvoc_down_thunk_GpuUserSharedData_resCanCopy(struct RsResource *pData); // this + // 1 down-thunk(s) defined to bridge methods in GpuUserSharedData from superclasses // gpushareddataCanCopy: virtual override (res) base (mem) -static NvBool __nvoc_down_thunk_GpuUserSharedData_resCanCopy(struct RsResource *pData) { +NvBool __nvoc_down_thunk_GpuUserSharedData_resCanCopy(struct RsResource *pData) { return gpushareddataCanCopy((struct GpuUserSharedData *)(((unsigned char *) pData) - __nvoc_rtti_GpuUserSharedData_RsResource.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_Memory_gpushareddataIsDuplicate(struct GpuUserSharedData *pMemory, NvHandle hMemory, NvBool *pDuplicate); // this +NV_STATUS __nvoc_up_thunk_Memory_gpushareddataGetMapAddrSpace(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_Memory_gpushareddataControl(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_gpushareddataMap(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_gpushareddataUnmap(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_gpushareddataGetMemInterMapParams(struct GpuUserSharedData *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_gpushareddataCheckMemInterUnmap(struct GpuUserSharedData *pMemory, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_Memory_gpushareddataGetMemoryMappingDescriptor(struct GpuUserSharedData *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_Memory_gpushareddataCheckCopyPermissions(struct GpuUserSharedData *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // this +NV_STATUS __nvoc_up_thunk_Memory_gpushareddataIsReady(struct GpuUserSharedData *pMemory, NvBool bCopyConstructorContext); // this +NvBool __nvoc_up_thunk_Memory_gpushareddataIsGpuMapAllowed(struct GpuUserSharedData *pMemory, struct OBJGPU *pGpu); // this +NvBool __nvoc_up_thunk_Memory_gpushareddataIsExportAllowed(struct GpuUserSharedData *pMemory); // this +NvBool __nvoc_up_thunk_RmResource_gpushareddataAccessCallback(struct GpuUserSharedData *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_gpushareddataShareCallback(struct GpuUserSharedData *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_gpushareddataControlSerialization_Prologue(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_gpushareddataControlSerialization_Epilogue(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_gpushareddataControl_Prologue(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_gpushareddataControl_Epilogue(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RsResource_gpushareddataPreDestruct(struct GpuUserSharedData *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_gpushareddataControlFilter(struct GpuUserSharedData *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_gpushareddataIsPartialUnmapSupported(struct GpuUserSharedData *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_gpushareddataMapTo(struct GpuUserSharedData *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_gpushareddataUnmapFrom(struct GpuUserSharedData *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_gpushareddataGetRefCount(struct GpuUserSharedData *pResource); // this +void __nvoc_up_thunk_RsResource_gpushareddataAddAdditionalDependants(struct RsClient *pClient, struct GpuUserSharedData *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in GpuUserSharedData to superclasses // gpushareddataIsDuplicate: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_gpushareddataIsDuplicate(struct GpuUserSharedData *pMemory, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_Memory_gpushareddataIsDuplicate(struct GpuUserSharedData *pMemory, NvHandle hMemory, NvBool *pDuplicate) { return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), hMemory, pDuplicate); } // gpushareddataGetMapAddrSpace: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_gpushareddataGetMapAddrSpace(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_Memory_gpushareddataGetMapAddrSpace(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), pCallContext, mapFlags, pAddrSpace); } // gpushareddataControl: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_gpushareddataControl(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_gpushareddataControl(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), pCallContext, pParams); } // gpushareddataMap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_gpushareddataMap(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_gpushareddataMap(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), pCallContext, pParams, pCpuMapping); } // gpushareddataUnmap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_gpushareddataUnmap(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_gpushareddataUnmap(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), pCallContext, pCpuMapping); } // gpushareddataGetMemInterMapParams: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_gpushareddataGetMemInterMapParams(struct GpuUserSharedData *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_gpushareddataGetMemInterMapParams(struct GpuUserSharedData *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), pParams); } // gpushareddataCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_gpushareddataCheckMemInterUnmap(struct GpuUserSharedData *pMemory, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_Memory_gpushareddataCheckMemInterUnmap(struct GpuUserSharedData *pMemory, NvBool bSubdeviceHandleProvided) { return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), bSubdeviceHandleProvided); } // gpushareddataGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_gpushareddataGetMemoryMappingDescriptor(struct GpuUserSharedData *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_Memory_gpushareddataGetMemoryMappingDescriptor(struct GpuUserSharedData *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), ppMemDesc); } // gpushareddataCheckCopyPermissions: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_gpushareddataCheckCopyPermissions(struct GpuUserSharedData *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { +NV_STATUS __nvoc_up_thunk_Memory_gpushareddataCheckCopyPermissions(struct GpuUserSharedData *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), pDstGpu, pDstDevice); } // gpushareddataIsReady: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_gpushareddataIsReady(struct GpuUserSharedData *pMemory, NvBool bCopyConstructorContext) { +NV_STATUS __nvoc_up_thunk_Memory_gpushareddataIsReady(struct GpuUserSharedData *pMemory, NvBool bCopyConstructorContext) { return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), bCopyConstructorContext); } // gpushareddataIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_gpushareddataIsGpuMapAllowed(struct GpuUserSharedData *pMemory, struct OBJGPU *pGpu) { +NvBool __nvoc_up_thunk_Memory_gpushareddataIsGpuMapAllowed(struct GpuUserSharedData *pMemory, struct OBJGPU *pGpu) { return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset), pGpu); } // gpushareddataIsExportAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_gpushareddataIsExportAllowed(struct GpuUserSharedData *pMemory) { +NvBool __nvoc_up_thunk_Memory_gpushareddataIsExportAllowed(struct GpuUserSharedData *pMemory) { return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_GpuUserSharedData_Memory.offset)); } // gpushareddataAccessCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_gpushareddataAccessCallback(struct GpuUserSharedData *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_gpushareddataAccessCallback(struct GpuUserSharedData *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // gpushareddataShareCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_gpushareddataShareCallback(struct GpuUserSharedData *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_gpushareddataShareCallback(struct GpuUserSharedData *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // gpushareddataControlSerialization_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_gpushareddataControlSerialization_Prologue(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_gpushareddataControlSerialization_Prologue(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RmResource.offset), pCallContext, pParams); } // gpushareddataControlSerialization_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_gpushareddataControlSerialization_Epilogue(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_gpushareddataControlSerialization_Epilogue(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RmResource.offset), pCallContext, pParams); } // gpushareddataControl_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_gpushareddataControl_Prologue(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_gpushareddataControl_Prologue(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RmResource.offset), pCallContext, pParams); } // gpushareddataControl_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_gpushareddataControl_Epilogue(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_gpushareddataControl_Epilogue(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RmResource.offset), pCallContext, pParams); } // gpushareddataPreDestruct: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_gpushareddataPreDestruct(struct GpuUserSharedData *pResource) { +void __nvoc_up_thunk_RsResource_gpushareddataPreDestruct(struct GpuUserSharedData *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RsResource.offset)); } // gpushareddataControlFilter: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_gpushareddataControlFilter(struct GpuUserSharedData *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_gpushareddataControlFilter(struct GpuUserSharedData *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RsResource.offset), pCallContext, pParams); } // gpushareddataIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body -static NvBool __nvoc_up_thunk_RsResource_gpushareddataIsPartialUnmapSupported(struct GpuUserSharedData *pResource) { +NvBool __nvoc_up_thunk_RsResource_gpushareddataIsPartialUnmapSupported(struct GpuUserSharedData *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RsResource.offset)); } // gpushareddataMapTo: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_gpushareddataMapTo(struct GpuUserSharedData *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_gpushareddataMapTo(struct GpuUserSharedData *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RsResource.offset), pParams); } // gpushareddataUnmapFrom: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_gpushareddataUnmapFrom(struct GpuUserSharedData *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_gpushareddataUnmapFrom(struct GpuUserSharedData *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RsResource.offset), pParams); } // gpushareddataGetRefCount: virtual inherited (res) base (mem) -static NvU32 __nvoc_up_thunk_RsResource_gpushareddataGetRefCount(struct GpuUserSharedData *pResource) { +NvU32 __nvoc_up_thunk_RsResource_gpushareddataGetRefCount(struct GpuUserSharedData *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RsResource.offset)); } // gpushareddataAddAdditionalDependants: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_gpushareddataAddAdditionalDependants(struct RsClient *pClient, struct GpuUserSharedData *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_gpushareddataAddAdditionalDependants(struct RsClient *pClient, struct GpuUserSharedData *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GpuUserSharedData_RsResource.offset), pReference); } @@ -293,96 +362,120 @@ NV_STATUS __nvoc_ctor_GpuUserSharedData(GpuUserSharedData *pThis, CALL_CONTEXT * static void __nvoc_init_funcTable_GpuUserSharedData_1(GpuUserSharedData *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // gpushareddataCanCopy -- virtual override (res) base (mem) - pThis->__gpushareddataCanCopy__ = &gpushareddataCanCopy_IMPL; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_GpuUserSharedData_resCanCopy; - // gpushareddataCtrlCmdRequestDataPoll -- exported (id=0xde0001) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gpushareddataCtrlCmdRequestDataPoll__ = &gpushareddataCtrlCmdRequestDataPoll_IMPL; #endif - - // gpushareddataIsDuplicate -- virtual inherited (mem) base (mem) - pThis->__gpushareddataIsDuplicate__ = &__nvoc_up_thunk_Memory_gpushareddataIsDuplicate; - - // gpushareddataGetMapAddrSpace -- virtual inherited (mem) base (mem) - pThis->__gpushareddataGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_gpushareddataGetMapAddrSpace; - - // gpushareddataControl -- virtual inherited (mem) base (mem) - pThis->__gpushareddataControl__ = &__nvoc_up_thunk_Memory_gpushareddataControl; - - // gpushareddataMap -- virtual inherited (mem) base (mem) - pThis->__gpushareddataMap__ = &__nvoc_up_thunk_Memory_gpushareddataMap; - - // gpushareddataUnmap -- virtual inherited (mem) base (mem) - pThis->__gpushareddataUnmap__ = &__nvoc_up_thunk_Memory_gpushareddataUnmap; - - // gpushareddataGetMemInterMapParams -- virtual inherited (mem) base (mem) - pThis->__gpushareddataGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_gpushareddataGetMemInterMapParams; - - // gpushareddataCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body - pThis->__gpushareddataCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_gpushareddataCheckMemInterUnmap; - - // gpushareddataGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) - pThis->__gpushareddataGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_gpushareddataGetMemoryMappingDescriptor; - - // gpushareddataCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body - pThis->__gpushareddataCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_gpushareddataCheckCopyPermissions; - - // gpushareddataIsReady -- virtual inherited (mem) base (mem) - pThis->__gpushareddataIsReady__ = &__nvoc_up_thunk_Memory_gpushareddataIsReady; - - // gpushareddataIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__gpushareddataIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_gpushareddataIsGpuMapAllowed; - - // gpushareddataIsExportAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__gpushareddataIsExportAllowed__ = &__nvoc_up_thunk_Memory_gpushareddataIsExportAllowed; - - // gpushareddataAccessCallback -- virtual inherited (rmres) base (mem) - pThis->__gpushareddataAccessCallback__ = &__nvoc_up_thunk_RmResource_gpushareddataAccessCallback; - - // gpushareddataShareCallback -- virtual inherited (rmres) base (mem) - pThis->__gpushareddataShareCallback__ = &__nvoc_up_thunk_RmResource_gpushareddataShareCallback; - - // gpushareddataControlSerialization_Prologue -- virtual inherited (rmres) base (mem) - pThis->__gpushareddataControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpushareddataControlSerialization_Prologue; - - // gpushareddataControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__gpushareddataControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpushareddataControlSerialization_Epilogue; - - // gpushareddataControl_Prologue -- virtual inherited (rmres) base (mem) - pThis->__gpushareddataControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpushareddataControl_Prologue; - - // gpushareddataControl_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__gpushareddataControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpushareddataControl_Epilogue; - - // gpushareddataPreDestruct -- virtual inherited (res) base (mem) - pThis->__gpushareddataPreDestruct__ = &__nvoc_up_thunk_RsResource_gpushareddataPreDestruct; - - // gpushareddataControlFilter -- virtual inherited (res) base (mem) - pThis->__gpushareddataControlFilter__ = &__nvoc_up_thunk_RsResource_gpushareddataControlFilter; - - // gpushareddataIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body - pThis->__gpushareddataIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpushareddataIsPartialUnmapSupported; - - // gpushareddataMapTo -- virtual inherited (res) base (mem) - pThis->__gpushareddataMapTo__ = &__nvoc_up_thunk_RsResource_gpushareddataMapTo; - - // gpushareddataUnmapFrom -- virtual inherited (res) base (mem) - pThis->__gpushareddataUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpushareddataUnmapFrom; - - // gpushareddataGetRefCount -- virtual inherited (res) base (mem) - pThis->__gpushareddataGetRefCount__ = &__nvoc_up_thunk_RsResource_gpushareddataGetRefCount; - - // gpushareddataAddAdditionalDependants -- virtual inherited (res) base (mem) - pThis->__gpushareddataAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpushareddataAddAdditionalDependants; -} // End __nvoc_init_funcTable_GpuUserSharedData_1 with approximately 28 basic block(s). +} // End __nvoc_init_funcTable_GpuUserSharedData_1 with approximately 1 basic block(s). // Initialize vtable(s) for 27 virtual method(s). void __nvoc_init_funcTable_GpuUserSharedData(GpuUserSharedData *pThis) { - // Initialize vtable(s) with 27 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__GpuUserSharedData vtable = { + .__gpushareddataCanCopy__ = &gpushareddataCanCopy_IMPL, // virtual override (res) base (mem) + .Memory.__memCanCopy__ = &__nvoc_up_thunk_RsResource_memCanCopy, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_GpuUserSharedData_resCanCopy, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__gpushareddataIsDuplicate__ = &__nvoc_up_thunk_Memory_gpushareddataIsDuplicate, // virtual inherited (mem) base (mem) + .Memory.__memIsDuplicate__ = &memIsDuplicate_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resIsDuplicate__ = &__nvoc_down_thunk_Memory_resIsDuplicate, // virtual + .__gpushareddataGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_gpushareddataGetMapAddrSpace, // virtual inherited (mem) base (mem) + .Memory.__memGetMapAddrSpace__ = &memGetMapAddrSpace_IMPL, // virtual + .__gpushareddataControl__ = &__nvoc_up_thunk_Memory_gpushareddataControl, // virtual inherited (mem) base (mem) + .Memory.__memControl__ = &memControl_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_Memory_resControl, // virtual + .__gpushareddataMap__ = &__nvoc_up_thunk_Memory_gpushareddataMap, // virtual inherited (mem) base (mem) + .Memory.__memMap__ = &memMap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_Memory_resMap, // virtual + .__gpushareddataUnmap__ = &__nvoc_up_thunk_Memory_gpushareddataUnmap, // virtual inherited (mem) base (mem) + .Memory.__memUnmap__ = &memUnmap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_Memory_resUnmap, // virtual + .__gpushareddataGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_gpushareddataGetMemInterMapParams, // virtual inherited (mem) base (mem) + .Memory.__memGetMemInterMapParams__ = &memGetMemInterMapParams_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_Memory_rmresGetMemInterMapParams, // virtual + .__gpushareddataCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_gpushareddataCheckMemInterUnmap, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckMemInterUnmap__ = &memCheckMemInterUnmap_ac1694, // inline virtual override (rmres) base (rmres) body + .Memory.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_Memory_rmresCheckMemInterUnmap, // virtual + .__gpushareddataGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_gpushareddataGetMemoryMappingDescriptor, // virtual inherited (mem) base (mem) + .Memory.__memGetMemoryMappingDescriptor__ = &memGetMemoryMappingDescriptor_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor, // virtual + .__gpushareddataCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_gpushareddataCheckCopyPermissions, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckCopyPermissions__ = &memCheckCopyPermissions_ac1694, // inline virtual body + .__gpushareddataIsReady__ = &__nvoc_up_thunk_Memory_gpushareddataIsReady, // virtual inherited (mem) base (mem) + .Memory.__memIsReady__ = &memIsReady_IMPL, // virtual + .__gpushareddataIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_gpushareddataIsGpuMapAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsGpuMapAllowed__ = &memIsGpuMapAllowed_e661f0, // inline virtual body + .__gpushareddataIsExportAllowed__ = &__nvoc_up_thunk_Memory_gpushareddataIsExportAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsExportAllowed__ = &memIsExportAllowed_e661f0, // inline virtual body + .__gpushareddataAccessCallback__ = &__nvoc_up_thunk_RmResource_gpushareddataAccessCallback, // virtual inherited (rmres) base (mem) + .Memory.__memAccessCallback__ = &__nvoc_up_thunk_RmResource_memAccessCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__gpushareddataShareCallback__ = &__nvoc_up_thunk_RmResource_gpushareddataShareCallback, // virtual inherited (rmres) base (mem) + .Memory.__memShareCallback__ = &__nvoc_up_thunk_RmResource_memShareCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__gpushareddataControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpushareddataControlSerialization_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__gpushareddataControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpushareddataControlSerialization_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__gpushareddataControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpushareddataControl_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Prologue__ = &__nvoc_up_thunk_RmResource_memControl_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__gpushareddataControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpushareddataControl_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memControl_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__gpushareddataPreDestruct__ = &__nvoc_up_thunk_RsResource_gpushareddataPreDestruct, // virtual inherited (res) base (mem) + .Memory.__memPreDestruct__ = &__nvoc_up_thunk_RsResource_memPreDestruct, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__gpushareddataControlFilter__ = &__nvoc_up_thunk_RsResource_gpushareddataControlFilter, // virtual inherited (res) base (mem) + .Memory.__memControlFilter__ = &__nvoc_up_thunk_RsResource_memControlFilter, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__gpushareddataIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpushareddataIsPartialUnmapSupported, // inline virtual inherited (res) base (mem) body + .Memory.__memIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .Memory.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .Memory.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__gpushareddataMapTo__ = &__nvoc_up_thunk_RsResource_gpushareddataMapTo, // virtual inherited (res) base (mem) + .Memory.__memMapTo__ = &__nvoc_up_thunk_RsResource_memMapTo, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__gpushareddataUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpushareddataUnmapFrom, // virtual inherited (res) base (mem) + .Memory.__memUnmapFrom__ = &__nvoc_up_thunk_RsResource_memUnmapFrom, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__gpushareddataGetRefCount__ = &__nvoc_up_thunk_RsResource_gpushareddataGetRefCount, // virtual inherited (res) base (mem) + .Memory.__memGetRefCount__ = &__nvoc_up_thunk_RsResource_memGetRefCount, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__gpushareddataAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpushareddataAddAdditionalDependants, // virtual inherited (res) base (mem) + .Memory.__memAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memAddAdditionalDependants, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.Memory.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable = &vtable.Memory.RmResource; // (rmres) super^2 + pThis->__nvoc_base_Memory.__nvoc_vtable = &vtable.Memory; // (mem) super + pThis->__nvoc_vtable = &vtable; // (gpushareddata) this + + // Initialize vtable(s) with 1 per-object function pointer(s). __nvoc_init_funcTable_GpuUserSharedData_1(pThis); } diff --git a/src/nvidia/generated/g_gpu_user_shared_data_nvoc.h b/src/nvidia/generated/g_gpu_user_shared_data_nvoc.h index f114759e28..29897478bf 100644 --- a/src/nvidia/generated/g_gpu_user_shared_data_nvoc.h +++ b/src/nvidia/generated/g_gpu_user_shared_data_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -66,10 +66,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__GpuUserSharedData; + + struct GpuUserSharedData { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__GpuUserSharedData *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; @@ -82,9 +87,19 @@ struct GpuUserSharedData { struct Memory *__nvoc_pbase_Memory; // mem super struct GpuUserSharedData *__nvoc_pbase_GpuUserSharedData; // gpushareddata - // Vtable with 27 per-object function pointers - NvBool (*__gpushareddataCanCopy__)(struct GpuUserSharedData * /*this*/); // virtual override (res) base (mem) + // Vtable with 1 per-object function pointer NV_STATUS (*__gpushareddataCtrlCmdRequestDataPoll__)(struct GpuUserSharedData * /*this*/, NV00DE_CTRL_REQUEST_DATA_POLL_PARAMS *); // exported (id=0xde0001) + + // Data members + NvU64 polledDataMask; +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__GpuUserSharedData { + const struct NVOC_VTABLE__Memory Memory; // (mem) 26 function pointers + + NvBool (*__gpushareddataCanCopy__)(struct GpuUserSharedData * /*this*/); // virtual override (res) base (mem) NV_STATUS (*__gpushareddataIsDuplicate__)(struct GpuUserSharedData * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) NV_STATUS (*__gpushareddataGetMapAddrSpace__)(struct GpuUserSharedData * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (mem) NV_STATUS (*__gpushareddataControl__)(struct GpuUserSharedData * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (mem) base (mem) @@ -110,9 +125,6 @@ struct GpuUserSharedData { NV_STATUS (*__gpushareddataUnmapFrom__)(struct GpuUserSharedData * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (mem) NvU32 (*__gpushareddataGetRefCount__)(struct GpuUserSharedData * /*this*/); // virtual inherited (res) base (mem) void (*__gpushareddataAddAdditionalDependants__)(struct RsClient *, struct GpuUserSharedData * /*this*/, RsResourceRef *); // virtual inherited (res) base (mem) - - // Data members - NvU64 polledDataMask; }; #ifndef __NVOC_CLASS_GpuUserSharedData_TYPEDEF__ @@ -145,64 +157,64 @@ NV_STATUS __nvoc_objCreate_GpuUserSharedData(GpuUserSharedData**, Dynamic*, NvU3 // Wrapper macros -#define gpushareddataCanCopy_FNPTR(pData) pData->__gpushareddataCanCopy__ +#define gpushareddataCanCopy_FNPTR(pData) pData->__nvoc_vtable->__gpushareddataCanCopy__ #define gpushareddataCanCopy(pData) gpushareddataCanCopy_DISPATCH(pData) #define gpushareddataCtrlCmdRequestDataPoll_FNPTR(pData) pData->__gpushareddataCtrlCmdRequestDataPoll__ #define gpushareddataCtrlCmdRequestDataPoll(pData, pParams) gpushareddataCtrlCmdRequestDataPoll_DISPATCH(pData, pParams) -#define gpushareddataIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define gpushareddataIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsDuplicate__ #define gpushareddataIsDuplicate(pMemory, hMemory, pDuplicate) gpushareddataIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define gpushareddataGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ +#define gpushareddataGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMapAddrSpace__ #define gpushareddataGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) gpushareddataGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define gpushareddataControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ +#define gpushareddataControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memControl__ #define gpushareddataControl(pMemory, pCallContext, pParams) gpushareddataControl_DISPATCH(pMemory, pCallContext, pParams) -#define gpushareddataMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define gpushareddataMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memMap__ #define gpushareddataMap(pMemory, pCallContext, pParams, pCpuMapping) gpushareddataMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define gpushareddataUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ +#define gpushareddataUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memUnmap__ #define gpushareddataUnmap(pMemory, pCallContext, pCpuMapping) gpushareddataUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define gpushareddataGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ +#define gpushareddataGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemInterMapParams__ #define gpushareddataGetMemInterMapParams(pMemory, pParams) gpushareddataGetMemInterMapParams_DISPATCH(pMemory, pParams) -#define gpushareddataCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define gpushareddataCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckMemInterUnmap__ #define gpushareddataCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) gpushareddataCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define gpushareddataGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ +#define gpushareddataGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemoryMappingDescriptor__ #define gpushareddataGetMemoryMappingDescriptor(pMemory, ppMemDesc) gpushareddataGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define gpushareddataCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ +#define gpushareddataCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckCopyPermissions__ #define gpushareddataCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) gpushareddataCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define gpushareddataIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define gpushareddataIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsReady__ #define gpushareddataIsReady(pMemory, bCopyConstructorContext) gpushareddataIsReady_DISPATCH(pMemory, bCopyConstructorContext) -#define gpushareddataIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define gpushareddataIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsGpuMapAllowed__ #define gpushareddataIsGpuMapAllowed(pMemory, pGpu) gpushareddataIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define gpushareddataIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define gpushareddataIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsExportAllowed__ #define gpushareddataIsExportAllowed(pMemory) gpushareddataIsExportAllowed_DISPATCH(pMemory) -#define gpushareddataAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define gpushareddataAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define gpushareddataAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) gpushareddataAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define gpushareddataShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define gpushareddataShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define gpushareddataShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) gpushareddataShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define gpushareddataControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define gpushareddataControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define gpushareddataControlSerialization_Prologue(pResource, pCallContext, pParams) gpushareddataControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define gpushareddataControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define gpushareddataControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define gpushareddataControlSerialization_Epilogue(pResource, pCallContext, pParams) gpushareddataControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define gpushareddataControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define gpushareddataControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define gpushareddataControl_Prologue(pResource, pCallContext, pParams) gpushareddataControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define gpushareddataControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define gpushareddataControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define gpushareddataControl_Epilogue(pResource, pCallContext, pParams) gpushareddataControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define gpushareddataPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define gpushareddataPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define gpushareddataPreDestruct(pResource) gpushareddataPreDestruct_DISPATCH(pResource) -#define gpushareddataControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define gpushareddataControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define gpushareddataControlFilter(pResource, pCallContext, pParams) gpushareddataControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define gpushareddataIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define gpushareddataIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define gpushareddataIsPartialUnmapSupported(pResource) gpushareddataIsPartialUnmapSupported_DISPATCH(pResource) -#define gpushareddataMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define gpushareddataMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define gpushareddataMapTo(pResource, pParams) gpushareddataMapTo_DISPATCH(pResource, pParams) -#define gpushareddataUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define gpushareddataUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define gpushareddataUnmapFrom(pResource, pParams) gpushareddataUnmapFrom_DISPATCH(pResource, pParams) -#define gpushareddataGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define gpushareddataGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define gpushareddataGetRefCount(pResource) gpushareddataGetRefCount_DISPATCH(pResource) -#define gpushareddataAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define gpushareddataAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define gpushareddataAddAdditionalDependants(pClient, pResource, pReference) gpushareddataAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool gpushareddataCanCopy_DISPATCH(struct GpuUserSharedData *pData) { - return pData->__gpushareddataCanCopy__(pData); + return pData->__nvoc_vtable->__gpushareddataCanCopy__(pData); } static inline NV_STATUS gpushareddataCtrlCmdRequestDataPoll_DISPATCH(struct GpuUserSharedData *pData, NV00DE_CTRL_REQUEST_DATA_POLL_PARAMS *pParams) { @@ -210,103 +222,103 @@ static inline NV_STATUS gpushareddataCtrlCmdRequestDataPoll_DISPATCH(struct GpuU } static inline NV_STATUS gpushareddataIsDuplicate_DISPATCH(struct GpuUserSharedData *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__gpushareddataIsDuplicate__(pMemory, hMemory, pDuplicate); + return pMemory->__nvoc_vtable->__gpushareddataIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS gpushareddataGetMapAddrSpace_DISPATCH(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pMemory->__gpushareddataGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); + return pMemory->__nvoc_vtable->__gpushareddataGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS gpushareddataControl_DISPATCH(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__gpushareddataControl__(pMemory, pCallContext, pParams); + return pMemory->__nvoc_vtable->__gpushareddataControl__(pMemory, pCallContext, pParams); } static inline NV_STATUS gpushareddataMap_DISPATCH(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__gpushareddataMap__(pMemory, pCallContext, pParams, pCpuMapping); + return pMemory->__nvoc_vtable->__gpushareddataMap__(pMemory, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS gpushareddataUnmap_DISPATCH(struct GpuUserSharedData *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__gpushareddataUnmap__(pMemory, pCallContext, pCpuMapping); + return pMemory->__nvoc_vtable->__gpushareddataUnmap__(pMemory, pCallContext, pCpuMapping); } static inline NV_STATUS gpushareddataGetMemInterMapParams_DISPATCH(struct GpuUserSharedData *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__gpushareddataGetMemInterMapParams__(pMemory, pParams); + return pMemory->__nvoc_vtable->__gpushareddataGetMemInterMapParams__(pMemory, pParams); } static inline NV_STATUS gpushareddataCheckMemInterUnmap_DISPATCH(struct GpuUserSharedData *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__gpushareddataCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); + return pMemory->__nvoc_vtable->__gpushareddataCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } static inline NV_STATUS gpushareddataGetMemoryMappingDescriptor_DISPATCH(struct GpuUserSharedData *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__gpushareddataGetMemoryMappingDescriptor__(pMemory, ppMemDesc); + return pMemory->__nvoc_vtable->__gpushareddataGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } static inline NV_STATUS gpushareddataCheckCopyPermissions_DISPATCH(struct GpuUserSharedData *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__gpushareddataCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); + return pMemory->__nvoc_vtable->__gpushareddataCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } static inline NV_STATUS gpushareddataIsReady_DISPATCH(struct GpuUserSharedData *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__gpushareddataIsReady__(pMemory, bCopyConstructorContext); + return pMemory->__nvoc_vtable->__gpushareddataIsReady__(pMemory, bCopyConstructorContext); } static inline NvBool gpushareddataIsGpuMapAllowed_DISPATCH(struct GpuUserSharedData *pMemory, struct OBJGPU *pGpu) { - return pMemory->__gpushareddataIsGpuMapAllowed__(pMemory, pGpu); + return pMemory->__nvoc_vtable->__gpushareddataIsGpuMapAllowed__(pMemory, pGpu); } static inline NvBool gpushareddataIsExportAllowed_DISPATCH(struct GpuUserSharedData *pMemory) { - return pMemory->__gpushareddataIsExportAllowed__(pMemory); + return pMemory->__nvoc_vtable->__gpushareddataIsExportAllowed__(pMemory); } static inline NvBool gpushareddataAccessCallback_DISPATCH(struct GpuUserSharedData *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__gpushareddataAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__gpushareddataAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool gpushareddataShareCallback_DISPATCH(struct GpuUserSharedData *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__gpushareddataShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__gpushareddataShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS gpushareddataControlSerialization_Prologue_DISPATCH(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gpushareddataControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__gpushareddataControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void gpushareddataControlSerialization_Epilogue_DISPATCH(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__gpushareddataControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__gpushareddataControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS gpushareddataControl_Prologue_DISPATCH(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gpushareddataControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__gpushareddataControl_Prologue__(pResource, pCallContext, pParams); } static inline void gpushareddataControl_Epilogue_DISPATCH(struct GpuUserSharedData *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__gpushareddataControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__gpushareddataControl_Epilogue__(pResource, pCallContext, pParams); } static inline void gpushareddataPreDestruct_DISPATCH(struct GpuUserSharedData *pResource) { - pResource->__gpushareddataPreDestruct__(pResource); + pResource->__nvoc_vtable->__gpushareddataPreDestruct__(pResource); } static inline NV_STATUS gpushareddataControlFilter_DISPATCH(struct GpuUserSharedData *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gpushareddataControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__gpushareddataControlFilter__(pResource, pCallContext, pParams); } static inline NvBool gpushareddataIsPartialUnmapSupported_DISPATCH(struct GpuUserSharedData *pResource) { - return pResource->__gpushareddataIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__gpushareddataIsPartialUnmapSupported__(pResource); } static inline NV_STATUS gpushareddataMapTo_DISPATCH(struct GpuUserSharedData *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__gpushareddataMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__gpushareddataMapTo__(pResource, pParams); } static inline NV_STATUS gpushareddataUnmapFrom_DISPATCH(struct GpuUserSharedData *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__gpushareddataUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__gpushareddataUnmapFrom__(pResource, pParams); } static inline NvU32 gpushareddataGetRefCount_DISPATCH(struct GpuUserSharedData *pResource) { - return pResource->__gpushareddataGetRefCount__(pResource); + return pResource->__nvoc_vtable->__gpushareddataGetRefCount__(pResource); } static inline void gpushareddataAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct GpuUserSharedData *pResource, RsResourceRef *pReference) { - pResource->__gpushareddataAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__gpushareddataAddAdditionalDependants__(pClient, pResource, pReference); } NvBool gpushareddataCanCopy_IMPL(struct GpuUserSharedData *pData); diff --git a/src/nvidia/generated/g_gpu_vaspace_nvoc.c b/src/nvidia/generated/g_gpu_vaspace_nvoc.c index eadf8d25da..f00b5198d2 100644 --- a/src/nvidia/generated/g_gpu_vaspace_nvoc.c +++ b/src/nvidia/generated/g_gpu_vaspace_nvoc.c @@ -66,153 +66,186 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGVASPACE = /*pExportInfo=*/ &__nvoc_export_info_OBJGVASPACE }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceConstruct_(struct OBJVASPACE *pGVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags); // this +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceReserveMempool(struct OBJVASPACE *pGVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags); // this +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceAlloc(struct OBJVASPACE *pVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSizeLockMask, VAS_ALLOC_FLAGS flags, NvU64 *pAddr); // this +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceFree(struct OBJVASPACE *pVAS, NvU64 vAddr); // this +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceApplyDefaultAlignment(struct OBJVASPACE *pVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask); // this +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceIncAllocRefCnt(struct OBJVASPACE *pVAS, NvU64 vAddr); // this +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceMap(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags); // this +void __nvoc_down_thunk_OBJGVASPACE_vaspaceUnmap(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi); // this +OBJEHEAP * __nvoc_down_thunk_OBJGVASPACE_vaspaceGetHeap(struct OBJVASPACE *pVAS); // this +NvU64 __nvoc_down_thunk_OBJGVASPACE_vaspaceGetMapPageSize(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, EMEMBLOCK *pMemBlock); // this +NvU64 __nvoc_down_thunk_OBJGVASPACE_vaspaceGetBigPageSize(struct OBJVASPACE *pVAS); // this +NvU32 __nvoc_down_thunk_OBJGVASPACE_vaspaceGetFlags(struct OBJVASPACE *pVAS); // this +NvBool __nvoc_down_thunk_OBJGVASPACE_vaspaceIsMirrored(struct OBJVASPACE *pVAS); // this +NvBool __nvoc_down_thunk_OBJGVASPACE_vaspaceIsFaultCapable(struct OBJVASPACE *pVAS); // this +NvBool __nvoc_down_thunk_OBJGVASPACE_vaspaceIsExternallyOwned(struct OBJVASPACE *pVAS); // this +NvBool __nvoc_down_thunk_OBJGVASPACE_vaspaceIsAtsEnabled(struct OBJVASPACE *pVAS); // this +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceGetPasid(struct OBJVASPACE *pVAS, NvU32 *pPasid); // this +PMEMORY_DESCRIPTOR __nvoc_down_thunk_OBJGVASPACE_vaspaceGetPageDirBase(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu); // this +PMEMORY_DESCRIPTOR __nvoc_down_thunk_OBJGVASPACE_vaspaceGetKernelPageDirBase(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu); // this +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspacePinRootPageDir(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu); // this +void __nvoc_down_thunk_OBJGVASPACE_vaspaceUnpinRootPageDir(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu); // this +void __nvoc_down_thunk_OBJGVASPACE_vaspaceInvalidateTlb(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type); // this +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceGetVasInfo(struct OBJVASPACE *pVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams); // this +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceGetPageTableInfo(struct OBJVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams); // this +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceGetPteInfo(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr); // this +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceSetPteInfo(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams); // this +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceFreeV2(struct OBJVASPACE *pGVAS, NvU64 vAddr, NvU64 *pSize); // this + // 27 down-thunk(s) defined to bridge methods in OBJGVASPACE from superclasses // gvaspaceConstruct_: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceConstruct_(struct OBJVASPACE *pGVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceConstruct_(struct OBJVASPACE *pGVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags) { return gvaspaceConstruct_((struct OBJGVASPACE *)(((unsigned char *) pGVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags); } // gvaspaceReserveMempool: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceReserveMempool(struct OBJVASPACE *pGVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceReserveMempool(struct OBJVASPACE *pGVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { return gvaspaceReserveMempool((struct OBJGVASPACE *)(((unsigned char *) pGVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu, pDevice, size, pageSizeLockMask, flags); } // gvaspaceAlloc: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceAlloc(struct OBJVASPACE *pVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSizeLockMask, VAS_ALLOC_FLAGS flags, NvU64 *pAddr) { +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceAlloc(struct OBJVASPACE *pVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSizeLockMask, VAS_ALLOC_FLAGS flags, NvU64 *pAddr) { return gvaspaceAlloc((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr); } // gvaspaceFree: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceFree(struct OBJVASPACE *pVAS, NvU64 vAddr) { +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceFree(struct OBJVASPACE *pVAS, NvU64 vAddr) { return gvaspaceFree((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), vAddr); } // gvaspaceApplyDefaultAlignment: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceApplyDefaultAlignment(struct OBJVASPACE *pVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask) { +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceApplyDefaultAlignment(struct OBJVASPACE *pVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask) { return gvaspaceApplyDefaultAlignment((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pAllocInfo, pAlign, pSize, pPageSizeLockMask); } // gvaspaceIncAllocRefCnt: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceIncAllocRefCnt(struct OBJVASPACE *pVAS, NvU64 vAddr) { +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceIncAllocRefCnt(struct OBJVASPACE *pVAS, NvU64 vAddr) { return gvaspaceIncAllocRefCnt((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), vAddr); } // gvaspaceMap: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceMap(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceMap(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { return gvaspaceMap((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu, vaLo, vaHi, pTarget, flags); } // gvaspaceUnmap: virtual override (vaspace) base (vaspace) -static void __nvoc_down_thunk_OBJGVASPACE_vaspaceUnmap(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { +void __nvoc_down_thunk_OBJGVASPACE_vaspaceUnmap(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { gvaspaceUnmap((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu, vaLo, vaHi); } // gvaspaceGetHeap: virtual override (vaspace) base (vaspace) -static OBJEHEAP * __nvoc_down_thunk_OBJGVASPACE_vaspaceGetHeap(struct OBJVASPACE *pVAS) { +OBJEHEAP * __nvoc_down_thunk_OBJGVASPACE_vaspaceGetHeap(struct OBJVASPACE *pVAS) { return gvaspaceGetHeap((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); } // gvaspaceGetMapPageSize: virtual override (vaspace) base (vaspace) -static NvU64 __nvoc_down_thunk_OBJGVASPACE_vaspaceGetMapPageSize(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, EMEMBLOCK *pMemBlock) { +NvU64 __nvoc_down_thunk_OBJGVASPACE_vaspaceGetMapPageSize(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, EMEMBLOCK *pMemBlock) { return gvaspaceGetMapPageSize((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu, pMemBlock); } // gvaspaceGetBigPageSize: virtual override (vaspace) base (vaspace) -static NvU64 __nvoc_down_thunk_OBJGVASPACE_vaspaceGetBigPageSize(struct OBJVASPACE *pVAS) { +NvU64 __nvoc_down_thunk_OBJGVASPACE_vaspaceGetBigPageSize(struct OBJVASPACE *pVAS) { return gvaspaceGetBigPageSize((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); } // gvaspaceGetFlags: virtual override (vaspace) base (vaspace) -static NvU32 __nvoc_down_thunk_OBJGVASPACE_vaspaceGetFlags(struct OBJVASPACE *pVAS) { +NvU32 __nvoc_down_thunk_OBJGVASPACE_vaspaceGetFlags(struct OBJVASPACE *pVAS) { return gvaspaceGetFlags((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); } // gvaspaceIsMirrored: virtual override (vaspace) base (vaspace) -static NvBool __nvoc_down_thunk_OBJGVASPACE_vaspaceIsMirrored(struct OBJVASPACE *pVAS) { +NvBool __nvoc_down_thunk_OBJGVASPACE_vaspaceIsMirrored(struct OBJVASPACE *pVAS) { return gvaspaceIsMirrored((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); } // gvaspaceIsFaultCapable: virtual override (vaspace) base (vaspace) -static NvBool __nvoc_down_thunk_OBJGVASPACE_vaspaceIsFaultCapable(struct OBJVASPACE *pVAS) { +NvBool __nvoc_down_thunk_OBJGVASPACE_vaspaceIsFaultCapable(struct OBJVASPACE *pVAS) { return gvaspaceIsFaultCapable((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); } // gvaspaceIsExternallyOwned: virtual override (vaspace) base (vaspace) -static NvBool __nvoc_down_thunk_OBJGVASPACE_vaspaceIsExternallyOwned(struct OBJVASPACE *pVAS) { +NvBool __nvoc_down_thunk_OBJGVASPACE_vaspaceIsExternallyOwned(struct OBJVASPACE *pVAS) { return gvaspaceIsExternallyOwned((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); } // gvaspaceIsAtsEnabled: virtual override (vaspace) base (vaspace) -static NvBool __nvoc_down_thunk_OBJGVASPACE_vaspaceIsAtsEnabled(struct OBJVASPACE *pVAS) { +NvBool __nvoc_down_thunk_OBJGVASPACE_vaspaceIsAtsEnabled(struct OBJVASPACE *pVAS) { return gvaspaceIsAtsEnabled((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); } // gvaspaceGetPasid: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceGetPasid(struct OBJVASPACE *pVAS, NvU32 *pPasid) { +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceGetPasid(struct OBJVASPACE *pVAS, NvU32 *pPasid) { return gvaspaceGetPasid((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pPasid); } // gvaspaceGetPageDirBase: virtual override (vaspace) base (vaspace) -static PMEMORY_DESCRIPTOR __nvoc_down_thunk_OBJGVASPACE_vaspaceGetPageDirBase(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { +PMEMORY_DESCRIPTOR __nvoc_down_thunk_OBJGVASPACE_vaspaceGetPageDirBase(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { return gvaspaceGetPageDirBase((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu); } // gvaspaceGetKernelPageDirBase: virtual override (vaspace) base (vaspace) -static PMEMORY_DESCRIPTOR __nvoc_down_thunk_OBJGVASPACE_vaspaceGetKernelPageDirBase(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { +PMEMORY_DESCRIPTOR __nvoc_down_thunk_OBJGVASPACE_vaspaceGetKernelPageDirBase(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { return gvaspaceGetKernelPageDirBase((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu); } // gvaspacePinRootPageDir: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspacePinRootPageDir(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspacePinRootPageDir(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { return gvaspacePinRootPageDir((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu); } // gvaspaceUnpinRootPageDir: virtual override (vaspace) base (vaspace) -static void __nvoc_down_thunk_OBJGVASPACE_vaspaceUnpinRootPageDir(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { +void __nvoc_down_thunk_OBJGVASPACE_vaspaceUnpinRootPageDir(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { gvaspaceUnpinRootPageDir((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu); } // gvaspaceInvalidateTlb: virtual override (vaspace) base (vaspace) -static void __nvoc_down_thunk_OBJGVASPACE_vaspaceInvalidateTlb(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type) { +void __nvoc_down_thunk_OBJGVASPACE_vaspaceInvalidateTlb(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type) { gvaspaceInvalidateTlb((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu, type); } // gvaspaceGetVasInfo: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceGetVasInfo(struct OBJVASPACE *pVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams) { +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceGetVasInfo(struct OBJVASPACE *pVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams) { return gvaspaceGetVasInfo((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pParams); } // gvaspaceGetPageTableInfo: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceGetPageTableInfo(struct OBJVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceGetPageTableInfo(struct OBJVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { return gvaspaceGetPageTableInfo((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pParams); } // gvaspaceGetPteInfo: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceGetPteInfo(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceGetPteInfo(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { return gvaspaceGetPteInfo((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu, pParams, pPhysAddr); } // gvaspaceSetPteInfo: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceSetPteInfo(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceSetPteInfo(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { return gvaspaceSetPteInfo((struct OBJGVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), pGpu, pParams); } // gvaspaceFreeV2: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceFreeV2(struct OBJVASPACE *pGVAS, NvU64 vAddr, NvU64 *pSize) { +NV_STATUS __nvoc_down_thunk_OBJGVASPACE_vaspaceFreeV2(struct OBJVASPACE *pGVAS, NvU64 vAddr, NvU64 *pSize) { return gvaspaceFreeV2((struct OBJGVASPACE *)(((unsigned char *) pGVAS) - __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset), vAddr, pSize); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvU64 __nvoc_up_thunk_OBJVASPACE_gvaspaceGetVaStart(struct OBJGVASPACE *pVAS); // this +NvU64 __nvoc_up_thunk_OBJVASPACE_gvaspaceGetVaLimit(struct OBJGVASPACE *pVAS); // this + // 2 up-thunk(s) defined to bridge methods in OBJGVASPACE to superclasses // gvaspaceGetVaStart: virtual inherited (vaspace) base (vaspace) -static NvU64 __nvoc_up_thunk_OBJVASPACE_gvaspaceGetVaStart(struct OBJGVASPACE *pVAS) { +NvU64 __nvoc_up_thunk_OBJVASPACE_gvaspaceGetVaStart(struct OBJGVASPACE *pVAS) { return vaspaceGetVaStart((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); } // gvaspaceGetVaLimit: virtual inherited (vaspace) base (vaspace) -static NvU64 __nvoc_up_thunk_OBJVASPACE_gvaspaceGetVaLimit(struct OBJGVASPACE *pVAS) { +NvU64 __nvoc_up_thunk_OBJVASPACE_gvaspaceGetVaLimit(struct OBJGVASPACE *pVAS) { return vaspaceGetVaLimit((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJGVASPACE_OBJVASPACE.offset)); } @@ -251,127 +284,77 @@ NV_STATUS __nvoc_ctor_OBJGVASPACE(OBJGVASPACE *pThis) { // Vtable initialization static void __nvoc_init_funcTable_OBJGVASPACE_1(OBJGVASPACE *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // gvaspaceConstruct_ -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceConstruct___ = &gvaspaceConstruct__IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceConstruct___ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceConstruct_; - - // gvaspaceReserveMempool -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceReserveMempool__ = &gvaspaceReserveMempool_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceReserveMempool__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceReserveMempool; - - // gvaspaceAlloc -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceAlloc__ = &gvaspaceAlloc_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceAlloc__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceAlloc; - - // gvaspaceFree -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceFree__ = &gvaspaceFree_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceFree__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceFree; - - // gvaspaceApplyDefaultAlignment -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceApplyDefaultAlignment__ = &gvaspaceApplyDefaultAlignment_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceApplyDefaultAlignment__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceApplyDefaultAlignment; - - // gvaspaceIncAllocRefCnt -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceIncAllocRefCnt__ = &gvaspaceIncAllocRefCnt_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceIncAllocRefCnt__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceIncAllocRefCnt; - - // gvaspaceMap -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceMap__ = &gvaspaceMap_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceMap__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceMap; - - // gvaspaceUnmap -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceUnmap__ = &gvaspaceUnmap_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceUnmap__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceUnmap; - - // gvaspaceGetHeap -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceGetHeap__ = &gvaspaceGetHeap_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetHeap__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetHeap; - - // gvaspaceGetMapPageSize -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceGetMapPageSize__ = &gvaspaceGetMapPageSize_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetMapPageSize__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetMapPageSize; - - // gvaspaceGetBigPageSize -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceGetBigPageSize__ = &gvaspaceGetBigPageSize_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetBigPageSize__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetBigPageSize; - - // gvaspaceGetFlags -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceGetFlags__ = &gvaspaceGetFlags_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetFlags__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetFlags; - - // gvaspaceIsMirrored -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceIsMirrored__ = &gvaspaceIsMirrored_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceIsMirrored__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceIsMirrored; - - // gvaspaceIsFaultCapable -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceIsFaultCapable__ = &gvaspaceIsFaultCapable_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceIsFaultCapable__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceIsFaultCapable; - - // gvaspaceIsExternallyOwned -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceIsExternallyOwned__ = &gvaspaceIsExternallyOwned_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceIsExternallyOwned__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceIsExternallyOwned; - - // gvaspaceIsAtsEnabled -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceIsAtsEnabled__ = &gvaspaceIsAtsEnabled_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceIsAtsEnabled__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceIsAtsEnabled; - - // gvaspaceGetPasid -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceGetPasid__ = &gvaspaceGetPasid_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetPasid__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetPasid; - - // gvaspaceGetPageDirBase -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceGetPageDirBase__ = &gvaspaceGetPageDirBase_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetPageDirBase__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetPageDirBase; - - // gvaspaceGetKernelPageDirBase -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceGetKernelPageDirBase__ = &gvaspaceGetKernelPageDirBase_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetKernelPageDirBase__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetKernelPageDirBase; - - // gvaspacePinRootPageDir -- virtual override (vaspace) base (vaspace) - pThis->__gvaspacePinRootPageDir__ = &gvaspacePinRootPageDir_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspacePinRootPageDir__ = &__nvoc_down_thunk_OBJGVASPACE_vaspacePinRootPageDir; - - // gvaspaceUnpinRootPageDir -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceUnpinRootPageDir__ = &gvaspaceUnpinRootPageDir_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceUnpinRootPageDir__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceUnpinRootPageDir; - - // gvaspaceInvalidateTlb -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceInvalidateTlb__ = &gvaspaceInvalidateTlb_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceInvalidateTlb__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceInvalidateTlb; - - // gvaspaceGetVasInfo -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceGetVasInfo__ = &gvaspaceGetVasInfo_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetVasInfo__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetVasInfo; - - // gvaspaceGetPageTableInfo -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceGetPageTableInfo__ = &gvaspaceGetPageTableInfo_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetPageTableInfo__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetPageTableInfo; - - // gvaspaceGetPteInfo -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceGetPteInfo__ = &gvaspaceGetPteInfo_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetPteInfo__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetPteInfo; - - // gvaspaceSetPteInfo -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceSetPteInfo__ = &gvaspaceSetPteInfo_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceSetPteInfo__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceSetPteInfo; - - // gvaspaceFreeV2 -- virtual override (vaspace) base (vaspace) - pThis->__gvaspaceFreeV2__ = &gvaspaceFreeV2_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceFreeV2__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceFreeV2; - - // gvaspaceGetVaStart -- virtual inherited (vaspace) base (vaspace) - pThis->__gvaspaceGetVaStart__ = &__nvoc_up_thunk_OBJVASPACE_gvaspaceGetVaStart; - - // gvaspaceGetVaLimit -- virtual inherited (vaspace) base (vaspace) - pThis->__gvaspaceGetVaLimit__ = &__nvoc_up_thunk_OBJVASPACE_gvaspaceGetVaLimit; -} // End __nvoc_init_funcTable_OBJGVASPACE_1 with approximately 56 basic block(s). +} // End __nvoc_init_funcTable_OBJGVASPACE_1 // Initialize vtable(s) for 29 virtual method(s). void __nvoc_init_funcTable_OBJGVASPACE(OBJGVASPACE *pThis) { - // Initialize vtable(s) with 29 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__OBJGVASPACE vtable = { + .__gvaspaceConstruct___ = &gvaspaceConstruct__IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceConstruct___ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceConstruct_, // pure virtual + .__gvaspaceReserveMempool__ = &gvaspaceReserveMempool_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceReserveMempool__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceReserveMempool, // inline virtual body + .__gvaspaceAlloc__ = &gvaspaceAlloc_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceAlloc__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceAlloc, // pure virtual + .__gvaspaceFree__ = &gvaspaceFree_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceFree__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceFree, // pure virtual + .__gvaspaceApplyDefaultAlignment__ = &gvaspaceApplyDefaultAlignment_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceApplyDefaultAlignment__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceApplyDefaultAlignment, // pure virtual + .__gvaspaceIncAllocRefCnt__ = &gvaspaceIncAllocRefCnt_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceIncAllocRefCnt__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceIncAllocRefCnt, // inline virtual body + .__gvaspaceMap__ = &gvaspaceMap_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceMap__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceMap, // inline virtual body + .__gvaspaceUnmap__ = &gvaspaceUnmap_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceUnmap__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceUnmap, // inline virtual body + .__gvaspaceGetHeap__ = &gvaspaceGetHeap_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceGetHeap__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetHeap, // inline virtual body + .__gvaspaceGetMapPageSize__ = &gvaspaceGetMapPageSize_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceGetMapPageSize__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetMapPageSize, // inline virtual body + .__gvaspaceGetBigPageSize__ = &gvaspaceGetBigPageSize_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceGetBigPageSize__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetBigPageSize, // inline virtual body + .__gvaspaceGetFlags__ = &gvaspaceGetFlags_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceGetFlags__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetFlags, // inline virtual body + .__gvaspaceIsMirrored__ = &gvaspaceIsMirrored_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceIsMirrored__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceIsMirrored, // inline virtual body + .__gvaspaceIsFaultCapable__ = &gvaspaceIsFaultCapable_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceIsFaultCapable__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceIsFaultCapable, // inline virtual body + .__gvaspaceIsExternallyOwned__ = &gvaspaceIsExternallyOwned_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceIsExternallyOwned__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceIsExternallyOwned, // inline virtual body + .__gvaspaceIsAtsEnabled__ = &gvaspaceIsAtsEnabled_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceIsAtsEnabled__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceIsAtsEnabled, // inline virtual body + .__gvaspaceGetPasid__ = &gvaspaceGetPasid_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceGetPasid__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetPasid, // inline virtual body + .__gvaspaceGetPageDirBase__ = &gvaspaceGetPageDirBase_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceGetPageDirBase__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetPageDirBase, // inline virtual body + .__gvaspaceGetKernelPageDirBase__ = &gvaspaceGetKernelPageDirBase_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceGetKernelPageDirBase__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetKernelPageDirBase, // inline virtual body + .__gvaspacePinRootPageDir__ = &gvaspacePinRootPageDir_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspacePinRootPageDir__ = &__nvoc_down_thunk_OBJGVASPACE_vaspacePinRootPageDir, // inline virtual body + .__gvaspaceUnpinRootPageDir__ = &gvaspaceUnpinRootPageDir_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceUnpinRootPageDir__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceUnpinRootPageDir, // inline virtual body + .__gvaspaceInvalidateTlb__ = &gvaspaceInvalidateTlb_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceInvalidateTlb__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceInvalidateTlb, // virtual + .__gvaspaceGetVasInfo__ = &gvaspaceGetVasInfo_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceGetVasInfo__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetVasInfo, // pure virtual + .__gvaspaceGetPageTableInfo__ = &gvaspaceGetPageTableInfo_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceGetPageTableInfo__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetPageTableInfo, // inline virtual body + .__gvaspaceGetPteInfo__ = &gvaspaceGetPteInfo_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceGetPteInfo__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceGetPteInfo, // inline virtual body + .__gvaspaceSetPteInfo__ = &gvaspaceSetPteInfo_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceSetPteInfo__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceSetPteInfo, // inline virtual body + .__gvaspaceFreeV2__ = &gvaspaceFreeV2_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceFreeV2__ = &__nvoc_down_thunk_OBJGVASPACE_vaspaceFreeV2, // inline virtual body + .__gvaspaceGetVaStart__ = &__nvoc_up_thunk_OBJVASPACE_gvaspaceGetVaStart, // virtual inherited (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceGetVaStart__ = &vaspaceGetVaStart_IMPL, // virtual + .__gvaspaceGetVaLimit__ = &__nvoc_up_thunk_OBJVASPACE_gvaspaceGetVaLimit, // virtual inherited (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceGetVaLimit__ = &vaspaceGetVaLimit_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJVASPACE.__nvoc_vtable = &vtable.OBJVASPACE; // (vaspace) super + pThis->__nvoc_vtable = &vtable; // (gvaspace) this __nvoc_init_funcTable_OBJGVASPACE_1(pThis); } diff --git a/src/nvidia/generated/g_gpu_vaspace_nvoc.h b/src/nvidia/generated/g_gpu_vaspace_nvoc.h index cb84508000..24be8b3f2c 100644 --- a/src/nvidia/generated/g_gpu_vaspace_nvoc.h +++ b/src/nvidia/generated/g_gpu_vaspace_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -230,10 +230,15 @@ struct MMU_WALK_USER_CTX #endif +// Metadata including vtable +struct NVOC_VTABLE__OBJGVASPACE; + + struct OBJGVASPACE { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__OBJGVASPACE *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJVASPACE __nvoc_base_OBJVASPACE; @@ -243,7 +248,37 @@ struct OBJGVASPACE { struct OBJVASPACE *__nvoc_pbase_OBJVASPACE; // vaspace super struct OBJGVASPACE *__nvoc_pbase_OBJGVASPACE; // gvaspace - // Vtable with 29 per-object function pointers + // Data members + OBJEHEAP *pHeap; + NvU64 bigPageSize; + NvU64 compPageSize; + NvU64 extManagedAlign; + NvU32 flags; + NvU64 partialPtVaRangeSize; + NvU64 partialPtVaRangeBase[5]; + NvU32 numPartialPtRanges; + NvBool bIsMirrored; + NvBool bIsFaultCapable; + NvBool bIsExternallyOwned; + MEMORY_DESCRIPTOR *pExternalPDB; + NvBool bIsAtsEnabled; + NvU32 processAddrSpaceId; + NvU64 vaLimitMax; + GVAS_GPU_STATE *pGpuStates; + GVAS_CHANGRP_MAP chanGrpMap; + NvU64 vaStartInternal; + NvU64 vaLimitInternal; + NvBool bRMInternalRestrictedVaRange; + NvU64 vaStartServerRMOwned; + NvU64 vaLimitServerRMOwned; + RM_POOL_ALLOC_MEM_RESERVE_INFO *pPageTableMemPool; +}; + + +// Metadata including vtable with 29 function pointers plus superclass metadata +struct NVOC_VTABLE__OBJGVASPACE { + const struct NVOC_VTABLE__OBJVASPACE OBJVASPACE; // (vaspace) 29 function pointers + NV_STATUS (*__gvaspaceConstruct___)(struct OBJGVASPACE * /*this*/, NvU32, NvU32, NvU64, NvU64, NvU64, NvU64, NvU32); // virtual override (vaspace) base (vaspace) NV_STATUS (*__gvaspaceReserveMempool__)(struct OBJGVASPACE * /*this*/, struct OBJGPU *, struct Device *, NvU64, NvU64, NvU32); // virtual override (vaspace) base (vaspace) NV_STATUS (*__gvaspaceAlloc__)(struct OBJGVASPACE * /*this*/, NvU64, NvU64, NvU64, NvU64, NvU64, VAS_ALLOC_FLAGS, NvU64 *); // virtual override (vaspace) base (vaspace) @@ -273,31 +308,6 @@ struct OBJGVASPACE { NV_STATUS (*__gvaspaceFreeV2__)(struct OBJGVASPACE * /*this*/, NvU64, NvU64 *); // virtual override (vaspace) base (vaspace) NvU64 (*__gvaspaceGetVaStart__)(struct OBJGVASPACE * /*this*/); // virtual inherited (vaspace) base (vaspace) NvU64 (*__gvaspaceGetVaLimit__)(struct OBJGVASPACE * /*this*/); // virtual inherited (vaspace) base (vaspace) - - // Data members - OBJEHEAP *pHeap; - NvU64 bigPageSize; - NvU64 compPageSize; - NvU64 extManagedAlign; - NvU32 flags; - NvU64 partialPtVaRangeSize; - NvU64 partialPtVaRangeBase[5]; - NvU32 numPartialPtRanges; - NvBool bIsMirrored; - NvBool bIsFaultCapable; - NvBool bIsExternallyOwned; - MEMORY_DESCRIPTOR *pExternalPDB; - NvBool bIsAtsEnabled; - NvU32 processAddrSpaceId; - NvU64 vaLimitMax; - GVAS_GPU_STATE *pGpuStates; - GVAS_CHANGRP_MAP chanGrpMap; - NvU64 vaStartInternal; - NvU64 vaLimitInternal; - NvBool bRMInternalRestrictedVaRange; - NvU64 vaStartServerRMOwned; - NvU64 vaLimitServerRMOwned; - RM_POOL_ALLOC_MEM_RESERVE_INFO *pPageTableMemPool; }; #ifndef __NVOC_CLASS_OBJGVASPACE_TYPEDEF__ @@ -330,180 +340,180 @@ NV_STATUS __nvoc_objCreate_OBJGVASPACE(OBJGVASPACE**, Dynamic*, NvU32); // Wrapper macros -#define gvaspaceConstruct__FNPTR(pGVAS) pGVAS->__gvaspaceConstruct___ +#define gvaspaceConstruct__FNPTR(pGVAS) pGVAS->__nvoc_vtable->__gvaspaceConstruct___ #define gvaspaceConstruct_(pGVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags) gvaspaceConstruct__DISPATCH(pGVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags) -#define gvaspaceReserveMempool_FNPTR(pGVAS) pGVAS->__gvaspaceReserveMempool__ +#define gvaspaceReserveMempool_FNPTR(pGVAS) pGVAS->__nvoc_vtable->__gvaspaceReserveMempool__ #define gvaspaceReserveMempool(pGVAS, pGpu, pDevice, size, pageSizeLockMask, flags) gvaspaceReserveMempool_DISPATCH(pGVAS, pGpu, pDevice, size, pageSizeLockMask, flags) -#define gvaspaceAlloc_FNPTR(pVAS) pVAS->__gvaspaceAlloc__ +#define gvaspaceAlloc_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceAlloc__ #define gvaspaceAlloc(pVAS, size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr) gvaspaceAlloc_DISPATCH(pVAS, size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr) -#define gvaspaceFree_FNPTR(pVAS) pVAS->__gvaspaceFree__ +#define gvaspaceFree_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceFree__ #define gvaspaceFree(pVAS, vAddr) gvaspaceFree_DISPATCH(pVAS, vAddr) -#define gvaspaceApplyDefaultAlignment_FNPTR(pVAS) pVAS->__gvaspaceApplyDefaultAlignment__ +#define gvaspaceApplyDefaultAlignment_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceApplyDefaultAlignment__ #define gvaspaceApplyDefaultAlignment(pVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask) gvaspaceApplyDefaultAlignment_DISPATCH(pVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask) -#define gvaspaceIncAllocRefCnt_FNPTR(pVAS) pVAS->__gvaspaceIncAllocRefCnt__ +#define gvaspaceIncAllocRefCnt_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceIncAllocRefCnt__ #define gvaspaceIncAllocRefCnt(pVAS, vAddr) gvaspaceIncAllocRefCnt_DISPATCH(pVAS, vAddr) -#define gvaspaceMap_FNPTR(pVAS) pVAS->__gvaspaceMap__ +#define gvaspaceMap_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceMap__ #define gvaspaceMap(pVAS, pGpu, vaLo, vaHi, pTarget, flags) gvaspaceMap_DISPATCH(pVAS, pGpu, vaLo, vaHi, pTarget, flags) -#define gvaspaceUnmap_FNPTR(pVAS) pVAS->__gvaspaceUnmap__ +#define gvaspaceUnmap_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceUnmap__ #define gvaspaceUnmap(pVAS, pGpu, vaLo, vaHi) gvaspaceUnmap_DISPATCH(pVAS, pGpu, vaLo, vaHi) -#define gvaspaceGetHeap_FNPTR(pVAS) pVAS->__gvaspaceGetHeap__ +#define gvaspaceGetHeap_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceGetHeap__ #define gvaspaceGetHeap(pVAS) gvaspaceGetHeap_DISPATCH(pVAS) -#define gvaspaceGetMapPageSize_FNPTR(pVAS) pVAS->__gvaspaceGetMapPageSize__ +#define gvaspaceGetMapPageSize_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceGetMapPageSize__ #define gvaspaceGetMapPageSize(pVAS, pGpu, pMemBlock) gvaspaceGetMapPageSize_DISPATCH(pVAS, pGpu, pMemBlock) -#define gvaspaceGetBigPageSize_FNPTR(pVAS) pVAS->__gvaspaceGetBigPageSize__ +#define gvaspaceGetBigPageSize_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceGetBigPageSize__ #define gvaspaceGetBigPageSize(pVAS) gvaspaceGetBigPageSize_DISPATCH(pVAS) -#define gvaspaceGetFlags_FNPTR(pVAS) pVAS->__gvaspaceGetFlags__ +#define gvaspaceGetFlags_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceGetFlags__ #define gvaspaceGetFlags(pVAS) gvaspaceGetFlags_DISPATCH(pVAS) -#define gvaspaceIsMirrored_FNPTR(pVAS) pVAS->__gvaspaceIsMirrored__ +#define gvaspaceIsMirrored_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceIsMirrored__ #define gvaspaceIsMirrored(pVAS) gvaspaceIsMirrored_DISPATCH(pVAS) -#define gvaspaceIsFaultCapable_FNPTR(pVAS) pVAS->__gvaspaceIsFaultCapable__ +#define gvaspaceIsFaultCapable_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceIsFaultCapable__ #define gvaspaceIsFaultCapable(pVAS) gvaspaceIsFaultCapable_DISPATCH(pVAS) -#define gvaspaceIsExternallyOwned_FNPTR(pVAS) pVAS->__gvaspaceIsExternallyOwned__ +#define gvaspaceIsExternallyOwned_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceIsExternallyOwned__ #define gvaspaceIsExternallyOwned(pVAS) gvaspaceIsExternallyOwned_DISPATCH(pVAS) -#define gvaspaceIsAtsEnabled_FNPTR(pVAS) pVAS->__gvaspaceIsAtsEnabled__ +#define gvaspaceIsAtsEnabled_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceIsAtsEnabled__ #define gvaspaceIsAtsEnabled(pVAS) gvaspaceIsAtsEnabled_DISPATCH(pVAS) -#define gvaspaceGetPasid_FNPTR(pVAS) pVAS->__gvaspaceGetPasid__ +#define gvaspaceGetPasid_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceGetPasid__ #define gvaspaceGetPasid(pVAS, pPasid) gvaspaceGetPasid_DISPATCH(pVAS, pPasid) -#define gvaspaceGetPageDirBase_FNPTR(pVAS) pVAS->__gvaspaceGetPageDirBase__ +#define gvaspaceGetPageDirBase_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceGetPageDirBase__ #define gvaspaceGetPageDirBase(pVAS, pGpu) gvaspaceGetPageDirBase_DISPATCH(pVAS, pGpu) -#define gvaspaceGetKernelPageDirBase_FNPTR(pVAS) pVAS->__gvaspaceGetKernelPageDirBase__ +#define gvaspaceGetKernelPageDirBase_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceGetKernelPageDirBase__ #define gvaspaceGetKernelPageDirBase(pVAS, pGpu) gvaspaceGetKernelPageDirBase_DISPATCH(pVAS, pGpu) -#define gvaspacePinRootPageDir_FNPTR(pVAS) pVAS->__gvaspacePinRootPageDir__ +#define gvaspacePinRootPageDir_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspacePinRootPageDir__ #define gvaspacePinRootPageDir(pVAS, pGpu) gvaspacePinRootPageDir_DISPATCH(pVAS, pGpu) -#define gvaspaceUnpinRootPageDir_FNPTR(pVAS) pVAS->__gvaspaceUnpinRootPageDir__ +#define gvaspaceUnpinRootPageDir_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceUnpinRootPageDir__ #define gvaspaceUnpinRootPageDir(pVAS, pGpu) gvaspaceUnpinRootPageDir_DISPATCH(pVAS, pGpu) -#define gvaspaceInvalidateTlb_FNPTR(pVAS) pVAS->__gvaspaceInvalidateTlb__ +#define gvaspaceInvalidateTlb_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceInvalidateTlb__ #define gvaspaceInvalidateTlb(pVAS, pGpu, type) gvaspaceInvalidateTlb_DISPATCH(pVAS, pGpu, type) -#define gvaspaceGetVasInfo_FNPTR(pVAS) pVAS->__gvaspaceGetVasInfo__ +#define gvaspaceGetVasInfo_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceGetVasInfo__ #define gvaspaceGetVasInfo(pVAS, pParams) gvaspaceGetVasInfo_DISPATCH(pVAS, pParams) -#define gvaspaceGetPageTableInfo_FNPTR(pVAS) pVAS->__gvaspaceGetPageTableInfo__ +#define gvaspaceGetPageTableInfo_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceGetPageTableInfo__ #define gvaspaceGetPageTableInfo(pVAS, pParams) gvaspaceGetPageTableInfo_DISPATCH(pVAS, pParams) -#define gvaspaceGetPteInfo_FNPTR(pVAS) pVAS->__gvaspaceGetPteInfo__ +#define gvaspaceGetPteInfo_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceGetPteInfo__ #define gvaspaceGetPteInfo(pVAS, pGpu, pParams, pPhysAddr) gvaspaceGetPteInfo_DISPATCH(pVAS, pGpu, pParams, pPhysAddr) -#define gvaspaceSetPteInfo_FNPTR(pVAS) pVAS->__gvaspaceSetPteInfo__ +#define gvaspaceSetPteInfo_FNPTR(pVAS) pVAS->__nvoc_vtable->__gvaspaceSetPteInfo__ #define gvaspaceSetPteInfo(pVAS, pGpu, pParams) gvaspaceSetPteInfo_DISPATCH(pVAS, pGpu, pParams) -#define gvaspaceFreeV2_FNPTR(pGVAS) pGVAS->__gvaspaceFreeV2__ +#define gvaspaceFreeV2_FNPTR(pGVAS) pGVAS->__nvoc_vtable->__gvaspaceFreeV2__ #define gvaspaceFreeV2(pGVAS, vAddr, pSize) gvaspaceFreeV2_DISPATCH(pGVAS, vAddr, pSize) -#define gvaspaceGetVaStart_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetVaStart__ +#define gvaspaceGetVaStart_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceGetVaStart__ #define gvaspaceGetVaStart(pVAS) gvaspaceGetVaStart_DISPATCH(pVAS) -#define gvaspaceGetVaLimit_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetVaLimit__ +#define gvaspaceGetVaLimit_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceGetVaLimit__ #define gvaspaceGetVaLimit(pVAS) gvaspaceGetVaLimit_DISPATCH(pVAS) // Dispatch functions static inline NV_STATUS gvaspaceConstruct__DISPATCH(struct OBJGVASPACE *pGVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags) { - return pGVAS->__gvaspaceConstruct___(pGVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags); + return pGVAS->__nvoc_vtable->__gvaspaceConstruct___(pGVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags); } static inline NV_STATUS gvaspaceReserveMempool_DISPATCH(struct OBJGVASPACE *pGVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { - return pGVAS->__gvaspaceReserveMempool__(pGVAS, pGpu, pDevice, size, pageSizeLockMask, flags); + return pGVAS->__nvoc_vtable->__gvaspaceReserveMempool__(pGVAS, pGpu, pDevice, size, pageSizeLockMask, flags); } static inline NV_STATUS gvaspaceAlloc_DISPATCH(struct OBJGVASPACE *pVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSizeLockMask, VAS_ALLOC_FLAGS flags, NvU64 *pAddr) { - return pVAS->__gvaspaceAlloc__(pVAS, size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr); + return pVAS->__nvoc_vtable->__gvaspaceAlloc__(pVAS, size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr); } static inline NV_STATUS gvaspaceFree_DISPATCH(struct OBJGVASPACE *pVAS, NvU64 vAddr) { - return pVAS->__gvaspaceFree__(pVAS, vAddr); + return pVAS->__nvoc_vtable->__gvaspaceFree__(pVAS, vAddr); } static inline NV_STATUS gvaspaceApplyDefaultAlignment_DISPATCH(struct OBJGVASPACE *pVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask) { - return pVAS->__gvaspaceApplyDefaultAlignment__(pVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask); + return pVAS->__nvoc_vtable->__gvaspaceApplyDefaultAlignment__(pVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask); } static inline NV_STATUS gvaspaceIncAllocRefCnt_DISPATCH(struct OBJGVASPACE *pVAS, NvU64 vAddr) { - return pVAS->__gvaspaceIncAllocRefCnt__(pVAS, vAddr); + return pVAS->__nvoc_vtable->__gvaspaceIncAllocRefCnt__(pVAS, vAddr); } static inline NV_STATUS gvaspaceMap_DISPATCH(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { - return pVAS->__gvaspaceMap__(pVAS, pGpu, vaLo, vaHi, pTarget, flags); + return pVAS->__nvoc_vtable->__gvaspaceMap__(pVAS, pGpu, vaLo, vaHi, pTarget, flags); } static inline void gvaspaceUnmap_DISPATCH(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { - pVAS->__gvaspaceUnmap__(pVAS, pGpu, vaLo, vaHi); + pVAS->__nvoc_vtable->__gvaspaceUnmap__(pVAS, pGpu, vaLo, vaHi); } static inline OBJEHEAP * gvaspaceGetHeap_DISPATCH(struct OBJGVASPACE *pVAS) { - return pVAS->__gvaspaceGetHeap__(pVAS); + return pVAS->__nvoc_vtable->__gvaspaceGetHeap__(pVAS); } static inline NvU64 gvaspaceGetMapPageSize_DISPATCH(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, EMEMBLOCK *pMemBlock) { - return pVAS->__gvaspaceGetMapPageSize__(pVAS, pGpu, pMemBlock); + return pVAS->__nvoc_vtable->__gvaspaceGetMapPageSize__(pVAS, pGpu, pMemBlock); } static inline NvU64 gvaspaceGetBigPageSize_DISPATCH(struct OBJGVASPACE *pVAS) { - return pVAS->__gvaspaceGetBigPageSize__(pVAS); + return pVAS->__nvoc_vtable->__gvaspaceGetBigPageSize__(pVAS); } static inline NvU32 gvaspaceGetFlags_DISPATCH(struct OBJGVASPACE *pVAS) { - return pVAS->__gvaspaceGetFlags__(pVAS); + return pVAS->__nvoc_vtable->__gvaspaceGetFlags__(pVAS); } static inline NvBool gvaspaceIsMirrored_DISPATCH(struct OBJGVASPACE *pVAS) { - return pVAS->__gvaspaceIsMirrored__(pVAS); + return pVAS->__nvoc_vtable->__gvaspaceIsMirrored__(pVAS); } static inline NvBool gvaspaceIsFaultCapable_DISPATCH(struct OBJGVASPACE *pVAS) { - return pVAS->__gvaspaceIsFaultCapable__(pVAS); + return pVAS->__nvoc_vtable->__gvaspaceIsFaultCapable__(pVAS); } static inline NvBool gvaspaceIsExternallyOwned_DISPATCH(struct OBJGVASPACE *pVAS) { - return pVAS->__gvaspaceIsExternallyOwned__(pVAS); + return pVAS->__nvoc_vtable->__gvaspaceIsExternallyOwned__(pVAS); } static inline NvBool gvaspaceIsAtsEnabled_DISPATCH(struct OBJGVASPACE *pVAS) { - return pVAS->__gvaspaceIsAtsEnabled__(pVAS); + return pVAS->__nvoc_vtable->__gvaspaceIsAtsEnabled__(pVAS); } static inline NV_STATUS gvaspaceGetPasid_DISPATCH(struct OBJGVASPACE *pVAS, NvU32 *pPasid) { - return pVAS->__gvaspaceGetPasid__(pVAS, pPasid); + return pVAS->__nvoc_vtable->__gvaspaceGetPasid__(pVAS, pPasid); } static inline PMEMORY_DESCRIPTOR gvaspaceGetPageDirBase_DISPATCH(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu) { - return pVAS->__gvaspaceGetPageDirBase__(pVAS, pGpu); + return pVAS->__nvoc_vtable->__gvaspaceGetPageDirBase__(pVAS, pGpu); } static inline PMEMORY_DESCRIPTOR gvaspaceGetKernelPageDirBase_DISPATCH(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu) { - return pVAS->__gvaspaceGetKernelPageDirBase__(pVAS, pGpu); + return pVAS->__nvoc_vtable->__gvaspaceGetKernelPageDirBase__(pVAS, pGpu); } static inline NV_STATUS gvaspacePinRootPageDir_DISPATCH(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu) { - return pVAS->__gvaspacePinRootPageDir__(pVAS, pGpu); + return pVAS->__nvoc_vtable->__gvaspacePinRootPageDir__(pVAS, pGpu); } static inline void gvaspaceUnpinRootPageDir_DISPATCH(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu) { - pVAS->__gvaspaceUnpinRootPageDir__(pVAS, pGpu); + pVAS->__nvoc_vtable->__gvaspaceUnpinRootPageDir__(pVAS, pGpu); } static inline void gvaspaceInvalidateTlb_DISPATCH(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type) { - pVAS->__gvaspaceInvalidateTlb__(pVAS, pGpu, type); + pVAS->__nvoc_vtable->__gvaspaceInvalidateTlb__(pVAS, pGpu, type); } static inline NV_STATUS gvaspaceGetVasInfo_DISPATCH(struct OBJGVASPACE *pVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams) { - return pVAS->__gvaspaceGetVasInfo__(pVAS, pParams); + return pVAS->__nvoc_vtable->__gvaspaceGetVasInfo__(pVAS, pParams); } static inline NV_STATUS gvaspaceGetPageTableInfo_DISPATCH(struct OBJGVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { - return pVAS->__gvaspaceGetPageTableInfo__(pVAS, pParams); + return pVAS->__nvoc_vtable->__gvaspaceGetPageTableInfo__(pVAS, pParams); } static inline NV_STATUS gvaspaceGetPteInfo_DISPATCH(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { - return pVAS->__gvaspaceGetPteInfo__(pVAS, pGpu, pParams, pPhysAddr); + return pVAS->__nvoc_vtable->__gvaspaceGetPteInfo__(pVAS, pGpu, pParams, pPhysAddr); } static inline NV_STATUS gvaspaceSetPteInfo_DISPATCH(struct OBJGVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { - return pVAS->__gvaspaceSetPteInfo__(pVAS, pGpu, pParams); + return pVAS->__nvoc_vtable->__gvaspaceSetPteInfo__(pVAS, pGpu, pParams); } static inline NV_STATUS gvaspaceFreeV2_DISPATCH(struct OBJGVASPACE *pGVAS, NvU64 vAddr, NvU64 *pSize) { - return pGVAS->__gvaspaceFreeV2__(pGVAS, vAddr, pSize); + return pGVAS->__nvoc_vtable->__gvaspaceFreeV2__(pGVAS, vAddr, pSize); } static inline NvU64 gvaspaceGetVaStart_DISPATCH(struct OBJGVASPACE *pVAS) { - return pVAS->__gvaspaceGetVaStart__(pVAS); + return pVAS->__nvoc_vtable->__gvaspaceGetVaStart__(pVAS); } static inline NvU64 gvaspaceGetVaLimit_DISPATCH(struct OBJGVASPACE *pVAS) { - return pVAS->__gvaspaceGetVaLimit__(pVAS); + return pVAS->__nvoc_vtable->__gvaspaceGetVaLimit__(pVAS); } NV_STATUS gvaspaceConstruct__IMPL(struct OBJGVASPACE *pGVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags); diff --git a/src/nvidia/generated/g_gsync_api_nvoc.c b/src/nvidia/generated/g_gsync_api_nvoc.c index 63880a6b7f..a31f350633 100644 --- a/src/nvidia/generated/g_gsync_api_nvoc.c +++ b/src/nvidia/generated/g_gsync_api_nvoc.c @@ -546,138 +546,191 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_GSyncApi }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_down_thunk_GSyncApi_resControl(struct RsResource *pGsyncApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this + // 1 down-thunk(s) defined to bridge methods in GSyncApi from superclasses // gsyncapiControl: virtual override (res) base (rmres) -static NV_STATUS __nvoc_down_thunk_GSyncApi_resControl(struct RsResource *pGsyncApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_down_thunk_GSyncApi_resControl(struct RsResource *pGsyncApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gsyncapiControl((struct GSyncApi *)(((unsigned char *) pGsyncApi) - __nvoc_rtti_GSyncApi_RsResource.offset), pCallContext, pParams); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_RmResource_gsyncapiAccessCallback(struct GSyncApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_gsyncapiShareCallback(struct GSyncApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_gsyncapiGetMemInterMapParams(struct GSyncApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_gsyncapiCheckMemInterUnmap(struct GSyncApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_gsyncapiGetMemoryMappingDescriptor(struct GSyncApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_gsyncapiControlSerialization_Prologue(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_gsyncapiControlSerialization_Epilogue(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_gsyncapiControl_Prologue(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_gsyncapiControl_Epilogue(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_gsyncapiCanCopy(struct GSyncApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiIsDuplicate(struct GSyncApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_gsyncapiPreDestruct(struct GSyncApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiControlFilter(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiMap(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiUnmap(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_gsyncapiIsPartialUnmapSupported(struct GSyncApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiMapTo(struct GSyncApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiUnmapFrom(struct GSyncApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_gsyncapiGetRefCount(struct GSyncApi *pResource); // this +void __nvoc_up_thunk_RsResource_gsyncapiAddAdditionalDependants(struct RsClient *pClient, struct GSyncApi *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_gsyncapiGetNotificationListPtr(struct GSyncApi *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_gsyncapiGetNotificationShare(struct GSyncApi *pNotifier); // this +void __nvoc_up_thunk_Notifier_gsyncapiSetNotificationShare(struct GSyncApi *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_gsyncapiUnregisterEvent(struct GSyncApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_gsyncapiGetOrAllocNotifShare(struct GSyncApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 25 up-thunk(s) defined to bridge methods in GSyncApi to superclasses // gsyncapiAccessCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_gsyncapiAccessCallback(struct GSyncApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_gsyncapiAccessCallback(struct GSyncApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // gsyncapiShareCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_gsyncapiShareCallback(struct GSyncApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_gsyncapiShareCallback(struct GSyncApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // gsyncapiGetMemInterMapParams: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_gsyncapiGetMemInterMapParams(struct GSyncApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_gsyncapiGetMemInterMapParams(struct GSyncApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GSyncApi_RmResource.offset), pParams); } // gsyncapiCheckMemInterUnmap: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_gsyncapiCheckMemInterUnmap(struct GSyncApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_gsyncapiCheckMemInterUnmap(struct GSyncApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GSyncApi_RmResource.offset), bSubdeviceHandleProvided); } // gsyncapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_gsyncapiGetMemoryMappingDescriptor(struct GSyncApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_gsyncapiGetMemoryMappingDescriptor(struct GSyncApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_GSyncApi_RmResource.offset), ppMemDesc); } // gsyncapiControlSerialization_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_gsyncapiControlSerialization_Prologue(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_gsyncapiControlSerialization_Prologue(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RmResource.offset), pCallContext, pParams); } // gsyncapiControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_gsyncapiControlSerialization_Epilogue(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_gsyncapiControlSerialization_Epilogue(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RmResource.offset), pCallContext, pParams); } // gsyncapiControl_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_gsyncapiControl_Prologue(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_gsyncapiControl_Prologue(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RmResource.offset), pCallContext, pParams); } // gsyncapiControl_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_gsyncapiControl_Epilogue(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_gsyncapiControl_Epilogue(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RmResource.offset), pCallContext, pParams); } // gsyncapiCanCopy: virtual inherited (res) base (rmres) -static NvBool __nvoc_up_thunk_RsResource_gsyncapiCanCopy(struct GSyncApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_gsyncapiCanCopy(struct GSyncApi *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RsResource.offset)); } // gsyncapiIsDuplicate: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiIsDuplicate(struct GSyncApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiIsDuplicate(struct GSyncApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RsResource.offset), hMemory, pDuplicate); } // gsyncapiPreDestruct: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_gsyncapiPreDestruct(struct GSyncApi *pResource) { +void __nvoc_up_thunk_RsResource_gsyncapiPreDestruct(struct GSyncApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RsResource.offset)); } // gsyncapiControlFilter: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiControlFilter(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiControlFilter(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RsResource.offset), pCallContext, pParams); } // gsyncapiMap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiMap(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiMap(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RsResource.offset), pCallContext, pParams, pCpuMapping); } // gsyncapiUnmap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiUnmap(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiUnmap(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RsResource.offset), pCallContext, pCpuMapping); } // gsyncapiIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body -static NvBool __nvoc_up_thunk_RsResource_gsyncapiIsPartialUnmapSupported(struct GSyncApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_gsyncapiIsPartialUnmapSupported(struct GSyncApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RsResource.offset)); } // gsyncapiMapTo: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiMapTo(struct GSyncApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiMapTo(struct GSyncApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RsResource.offset), pParams); } // gsyncapiUnmapFrom: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiUnmapFrom(struct GSyncApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_gsyncapiUnmapFrom(struct GSyncApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RsResource.offset), pParams); } // gsyncapiGetRefCount: virtual inherited (res) base (rmres) -static NvU32 __nvoc_up_thunk_RsResource_gsyncapiGetRefCount(struct GSyncApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_gsyncapiGetRefCount(struct GSyncApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RsResource.offset)); } // gsyncapiAddAdditionalDependants: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_gsyncapiAddAdditionalDependants(struct RsClient *pClient, struct GSyncApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_gsyncapiAddAdditionalDependants(struct RsClient *pClient, struct GSyncApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_GSyncApi_RsResource.offset), pReference); } // gsyncapiGetNotificationListPtr: virtual inherited (notify) base (notify) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_gsyncapiGetNotificationListPtr(struct GSyncApi *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_gsyncapiGetNotificationListPtr(struct GSyncApi *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_GSyncApi_Notifier.offset)); } // gsyncapiGetNotificationShare: virtual inherited (notify) base (notify) -static struct NotifShare * __nvoc_up_thunk_Notifier_gsyncapiGetNotificationShare(struct GSyncApi *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_gsyncapiGetNotificationShare(struct GSyncApi *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_GSyncApi_Notifier.offset)); } // gsyncapiSetNotificationShare: virtual inherited (notify) base (notify) -static void __nvoc_up_thunk_Notifier_gsyncapiSetNotificationShare(struct GSyncApi *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_gsyncapiSetNotificationShare(struct GSyncApi *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_GSyncApi_Notifier.offset), pNotifShare); } // gsyncapiUnregisterEvent: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_gsyncapiUnregisterEvent(struct GSyncApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_gsyncapiUnregisterEvent(struct GSyncApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_GSyncApi_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // gsyncapiGetOrAllocNotifShare: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_gsyncapiGetOrAllocNotifShare(struct GSyncApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_gsyncapiGetOrAllocNotifShare(struct GSyncApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_GSyncApi_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -728,10 +781,6 @@ NV_STATUS __nvoc_ctor_GSyncApi(GSyncApi *pThis, struct CALL_CONTEXT * arg_pCallC static void __nvoc_init_funcTable_GSyncApi_1(GSyncApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // gsyncapiControl -- virtual override (res) base (rmres) - pThis->__gsyncapiControl__ = &gsyncapiControl_IMPL; - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ = &__nvoc_down_thunk_GSyncApi_resControl; - // gsyncapiCtrlCmdGsyncGetVersion -- exported (id=0x30f10101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__gsyncapiCtrlCmdGsyncGetVersion__ = &gsyncapiCtrlCmdGsyncGetVersion_IMPL; @@ -876,88 +925,157 @@ static void __nvoc_init_funcTable_GSyncApi_1(GSyncApi *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__gsyncapiCtrlCmdGsyncSetHouseSyncMode__ = &gsyncapiCtrlCmdGsyncSetHouseSyncMode_IMPL; #endif - - // gsyncapiAccessCallback -- virtual inherited (rmres) base (rmres) - pThis->__gsyncapiAccessCallback__ = &__nvoc_up_thunk_RmResource_gsyncapiAccessCallback; - - // gsyncapiShareCallback -- virtual inherited (rmres) base (rmres) - pThis->__gsyncapiShareCallback__ = &__nvoc_up_thunk_RmResource_gsyncapiShareCallback; - - // gsyncapiGetMemInterMapParams -- virtual inherited (rmres) base (rmres) - pThis->__gsyncapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gsyncapiGetMemInterMapParams; - - // gsyncapiCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) - pThis->__gsyncapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gsyncapiCheckMemInterUnmap; - - // gsyncapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) - pThis->__gsyncapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gsyncapiGetMemoryMappingDescriptor; - - // gsyncapiControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__gsyncapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gsyncapiControlSerialization_Prologue; - - // gsyncapiControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__gsyncapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gsyncapiControlSerialization_Epilogue; - - // gsyncapiControl_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__gsyncapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_gsyncapiControl_Prologue; - - // gsyncapiControl_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__gsyncapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gsyncapiControl_Epilogue; - - // gsyncapiCanCopy -- virtual inherited (res) base (rmres) - pThis->__gsyncapiCanCopy__ = &__nvoc_up_thunk_RsResource_gsyncapiCanCopy; - - // gsyncapiIsDuplicate -- virtual inherited (res) base (rmres) - pThis->__gsyncapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_gsyncapiIsDuplicate; - - // gsyncapiPreDestruct -- virtual inherited (res) base (rmres) - pThis->__gsyncapiPreDestruct__ = &__nvoc_up_thunk_RsResource_gsyncapiPreDestruct; - - // gsyncapiControlFilter -- virtual inherited (res) base (rmres) - pThis->__gsyncapiControlFilter__ = &__nvoc_up_thunk_RsResource_gsyncapiControlFilter; - - // gsyncapiMap -- virtual inherited (res) base (rmres) - pThis->__gsyncapiMap__ = &__nvoc_up_thunk_RsResource_gsyncapiMap; - - // gsyncapiUnmap -- virtual inherited (res) base (rmres) - pThis->__gsyncapiUnmap__ = &__nvoc_up_thunk_RsResource_gsyncapiUnmap; - - // gsyncapiIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body - pThis->__gsyncapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gsyncapiIsPartialUnmapSupported; - - // gsyncapiMapTo -- virtual inherited (res) base (rmres) - pThis->__gsyncapiMapTo__ = &__nvoc_up_thunk_RsResource_gsyncapiMapTo; - - // gsyncapiUnmapFrom -- virtual inherited (res) base (rmres) - pThis->__gsyncapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_gsyncapiUnmapFrom; - - // gsyncapiGetRefCount -- virtual inherited (res) base (rmres) - pThis->__gsyncapiGetRefCount__ = &__nvoc_up_thunk_RsResource_gsyncapiGetRefCount; - - // gsyncapiAddAdditionalDependants -- virtual inherited (res) base (rmres) - pThis->__gsyncapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gsyncapiAddAdditionalDependants; - - // gsyncapiGetNotificationListPtr -- virtual inherited (notify) base (notify) - pThis->__gsyncapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_gsyncapiGetNotificationListPtr; - - // gsyncapiGetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__gsyncapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_gsyncapiGetNotificationShare; - - // gsyncapiSetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__gsyncapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_gsyncapiSetNotificationShare; - - // gsyncapiUnregisterEvent -- virtual inherited (notify) base (notify) - pThis->__gsyncapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_gsyncapiUnregisterEvent; - - // gsyncapiGetOrAllocNotifShare -- virtual inherited (notify) base (notify) - pThis->__gsyncapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_gsyncapiGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_GSyncApi_1 with approximately 56 basic block(s). +} // End __nvoc_init_funcTable_GSyncApi_1 with approximately 29 basic block(s). // Initialize vtable(s) for 55 virtual method(s). void __nvoc_init_funcTable_GSyncApi(GSyncApi *pThis) { - // Initialize vtable(s) with 55 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__GSyncApi vtable = { + .__gsyncapiControl__ = &gsyncapiControl_IMPL, // virtual override (res) base (rmres) + .RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GSyncApi_resControl, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif + .__gsyncapiAccessCallback__ = &__nvoc_up_thunk_RmResource_gsyncapiAccessCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__gsyncapiShareCallback__ = &__nvoc_up_thunk_RmResource_gsyncapiShareCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__gsyncapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gsyncapiGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__gsyncapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gsyncapiCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__gsyncapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gsyncapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__gsyncapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gsyncapiControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__gsyncapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gsyncapiControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__gsyncapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_gsyncapiControl_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__gsyncapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gsyncapiControl_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__gsyncapiCanCopy__ = &__nvoc_up_thunk_RsResource_gsyncapiCanCopy, // virtual inherited (res) base (rmres) + .RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__gsyncapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_gsyncapiIsDuplicate, // virtual inherited (res) base (rmres) + .RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__gsyncapiPreDestruct__ = &__nvoc_up_thunk_RsResource_gsyncapiPreDestruct, // virtual inherited (res) base (rmres) + .RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__gsyncapiControlFilter__ = &__nvoc_up_thunk_RsResource_gsyncapiControlFilter, // virtual inherited (res) base (rmres) + .RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__gsyncapiMap__ = &__nvoc_up_thunk_RsResource_gsyncapiMap, // virtual inherited (res) base (rmres) + .RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMap__ = &resMap_IMPL, // virtual + .__gsyncapiUnmap__ = &__nvoc_up_thunk_RsResource_gsyncapiUnmap, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__gsyncapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gsyncapiIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__gsyncapiMapTo__ = &__nvoc_up_thunk_RsResource_gsyncapiMapTo, // virtual inherited (res) base (rmres) + .RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__gsyncapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_gsyncapiUnmapFrom, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__gsyncapiGetRefCount__ = &__nvoc_up_thunk_RsResource_gsyncapiGetRefCount, // virtual inherited (res) base (rmres) + .RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__gsyncapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gsyncapiAddAdditionalDependants, // virtual inherited (res) base (rmres) + .RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__gsyncapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_gsyncapiGetNotificationListPtr, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__gsyncapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_gsyncapiGetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__gsyncapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_gsyncapiSetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__gsyncapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_gsyncapiUnregisterEvent, // virtual inherited (notify) base (notify) + .Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__gsyncapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_gsyncapiGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.RmResource.RsResource; // (res) super^2 + pThis->__nvoc_base_RmResource.__nvoc_vtable = &vtable.RmResource; // (rmres) super + pThis->__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.Notifier.INotifier; // (inotify) super^2 + pThis->__nvoc_base_Notifier.__nvoc_vtable = &vtable.Notifier; // (notify) super + pThis->__nvoc_vtable = &vtable; // (gsyncapi) this + + // Initialize vtable(s) with 29 per-object function pointer(s). __nvoc_init_funcTable_GSyncApi_1(pThis); } diff --git a/src/nvidia/generated/g_gsync_api_nvoc.h b/src/nvidia/generated/g_gsync_api_nvoc.h index 7e13e6b908..72f2d89713 100644 --- a/src/nvidia/generated/g_gsync_api_nvoc.h +++ b/src/nvidia/generated/g_gsync_api_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -62,10 +62,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__GSyncApi; + + struct GSyncApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__GSyncApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; @@ -80,8 +85,7 @@ struct GSyncApi { struct Notifier *__nvoc_pbase_Notifier; // notify super struct GSyncApi *__nvoc_pbase_GSyncApi; // gsyncapi - // Vtable with 55 per-object function pointers - NV_STATUS (*__gsyncapiControl__)(struct GSyncApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (rmres) + // Vtable with 29 per-object function pointers NV_STATUS (*__gsyncapiCtrlCmdGsyncGetVersion__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_GET_VERSION_PARAMS *); // exported (id=0x30f10101) NV_STATUS (*__gsyncapiCtrlCmdGetGsyncGpuTopology__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GET_GSYNC_GPU_TOPOLOGY_PARAMS *); // exported (id=0x30f10106) NV_STATUS (*__gsyncapiCtrlCmdGsyncGetStatusSignals__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_GET_STATUS_SIGNALS_PARAMS *); // exported (id=0x30f10102) @@ -111,6 +115,23 @@ struct GSyncApi { NV_STATUS (*__gsyncapiCtrlCmdGsyncConfigFlash__)(struct GSyncApi * /*this*/, NV30F1_CTRL_CMD_GSYNC_CONFIG_FLASH_PARAMS *); // exported (id=0x30f10186) NV_STATUS (*__gsyncapiCtrlCmdGsyncGetHouseSyncMode__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_HOUSE_SYNC_MODE_PARAMS *); // exported (id=0x30f10187) NV_STATUS (*__gsyncapiCtrlCmdGsyncSetHouseSyncMode__)(struct GSyncApi * /*this*/, NV30F1_CTRL_GSYNC_HOUSE_SYNC_MODE_PARAMS *); // exported (id=0x30f10188) + + // Data members + NvU32 instance; + NvU32 classNum; + NvU32 notifyAction; + NvU32 lastEventNotified; + PEVENTNOTIFICATION pEventByType[9]; + NvBool oldEventNotification; +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__GSyncApi { + const struct NVOC_VTABLE__RmResource RmResource; // (rmres) 21 function pointers + const struct NVOC_VTABLE__Notifier Notifier; // (notify) 5 function pointers + + NV_STATUS (*__gsyncapiControl__)(struct GSyncApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (rmres) NvBool (*__gsyncapiAccessCallback__)(struct GSyncApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) NvBool (*__gsyncapiShareCallback__)(struct GSyncApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) NV_STATUS (*__gsyncapiGetMemInterMapParams__)(struct GSyncApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) @@ -136,14 +157,6 @@ struct GSyncApi { void (*__gsyncapiSetNotificationShare__)(struct GSyncApi * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) NV_STATUS (*__gsyncapiUnregisterEvent__)(struct GSyncApi * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) NV_STATUS (*__gsyncapiGetOrAllocNotifShare__)(struct GSyncApi * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) - - // Data members - NvU32 instance; - NvU32 classNum; - NvU32 notifyAction; - NvU32 lastEventNotified; - PEVENTNOTIFICATION pEventByType[9]; - NvBool oldEventNotification; }; #ifndef __NVOC_CLASS_GSyncApi_TYPEDEF__ @@ -176,7 +189,7 @@ NV_STATUS __nvoc_objCreate_GSyncApi(GSyncApi**, Dynamic*, NvU32, struct CALL_CON // Wrapper macros -#define gsyncapiControl_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiControl__ +#define gsyncapiControl_FNPTR(pGsyncApi) pGsyncApi->__nvoc_vtable->__gsyncapiControl__ #define gsyncapiControl(pGsyncApi, pCallContext, pParams) gsyncapiControl_DISPATCH(pGsyncApi, pCallContext, pParams) #define gsyncapiCtrlCmdGsyncGetVersion_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncGetVersion__ #define gsyncapiCtrlCmdGsyncGetVersion(pGsyncApi, pGsyncGetVersionParams) gsyncapiCtrlCmdGsyncGetVersion_DISPATCH(pGsyncApi, pGsyncGetVersionParams) @@ -236,60 +249,60 @@ NV_STATUS __nvoc_objCreate_GSyncApi(GSyncApi**, Dynamic*, NvU32, struct CALL_CON #define gsyncapiCtrlCmdGsyncGetHouseSyncMode(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncGetHouseSyncMode_DISPATCH(pGsyncApi, pParams) #define gsyncapiCtrlCmdGsyncSetHouseSyncMode_FNPTR(pGsyncApi) pGsyncApi->__gsyncapiCtrlCmdGsyncSetHouseSyncMode__ #define gsyncapiCtrlCmdGsyncSetHouseSyncMode(pGsyncApi, pParams) gsyncapiCtrlCmdGsyncSetHouseSyncMode_DISPATCH(pGsyncApi, pParams) -#define gsyncapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define gsyncapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define gsyncapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) gsyncapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define gsyncapiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ +#define gsyncapiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define gsyncapiShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) gsyncapiShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define gsyncapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define gsyncapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define gsyncapiGetMemInterMapParams(pRmResource, pParams) gsyncapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define gsyncapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define gsyncapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define gsyncapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) gsyncapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define gsyncapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define gsyncapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define gsyncapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) gsyncapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define gsyncapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define gsyncapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define gsyncapiControlSerialization_Prologue(pResource, pCallContext, pParams) gsyncapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define gsyncapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define gsyncapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define gsyncapiControlSerialization_Epilogue(pResource, pCallContext, pParams) gsyncapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define gsyncapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ +#define gsyncapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define gsyncapiControl_Prologue(pResource, pCallContext, pParams) gsyncapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define gsyncapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define gsyncapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define gsyncapiControl_Epilogue(pResource, pCallContext, pParams) gsyncapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define gsyncapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define gsyncapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define gsyncapiCanCopy(pResource) gsyncapiCanCopy_DISPATCH(pResource) -#define gsyncapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define gsyncapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define gsyncapiIsDuplicate(pResource, hMemory, pDuplicate) gsyncapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define gsyncapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define gsyncapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define gsyncapiPreDestruct(pResource) gsyncapiPreDestruct_DISPATCH(pResource) -#define gsyncapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define gsyncapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define gsyncapiControlFilter(pResource, pCallContext, pParams) gsyncapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define gsyncapiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define gsyncapiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define gsyncapiMap(pResource, pCallContext, pParams, pCpuMapping) gsyncapiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define gsyncapiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define gsyncapiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define gsyncapiUnmap(pResource, pCallContext, pCpuMapping) gsyncapiUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define gsyncapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define gsyncapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define gsyncapiIsPartialUnmapSupported(pResource) gsyncapiIsPartialUnmapSupported_DISPATCH(pResource) -#define gsyncapiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define gsyncapiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define gsyncapiMapTo(pResource, pParams) gsyncapiMapTo_DISPATCH(pResource, pParams) -#define gsyncapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define gsyncapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define gsyncapiUnmapFrom(pResource, pParams) gsyncapiUnmapFrom_DISPATCH(pResource, pParams) -#define gsyncapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define gsyncapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define gsyncapiGetRefCount(pResource) gsyncapiGetRefCount_DISPATCH(pResource) -#define gsyncapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define gsyncapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define gsyncapiAddAdditionalDependants(pClient, pResource, pReference) gsyncapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define gsyncapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define gsyncapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define gsyncapiGetNotificationListPtr(pNotifier) gsyncapiGetNotificationListPtr_DISPATCH(pNotifier) -#define gsyncapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define gsyncapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define gsyncapiGetNotificationShare(pNotifier) gsyncapiGetNotificationShare_DISPATCH(pNotifier) -#define gsyncapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define gsyncapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define gsyncapiSetNotificationShare(pNotifier, pNotifShare) gsyncapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define gsyncapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define gsyncapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define gsyncapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) gsyncapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define gsyncapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define gsyncapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define gsyncapiGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) gsyncapiGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS gsyncapiControl_DISPATCH(struct GSyncApi *pGsyncApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGsyncApi->__gsyncapiControl__(pGsyncApi, pCallContext, pParams); + return pGsyncApi->__nvoc_vtable->__gsyncapiControl__(pGsyncApi, pCallContext, pParams); } static inline NV_STATUS gsyncapiCtrlCmdGsyncGetVersion_DISPATCH(struct GSyncApi *pGsyncApi, NV30F1_CTRL_GSYNC_GET_VERSION_PARAMS *pGsyncGetVersionParams) { @@ -409,103 +422,103 @@ static inline NV_STATUS gsyncapiCtrlCmdGsyncSetHouseSyncMode_DISPATCH(struct GSy } static inline NvBool gsyncapiAccessCallback_DISPATCH(struct GSyncApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__gsyncapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__gsyncapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool gsyncapiShareCallback_DISPATCH(struct GSyncApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__gsyncapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__gsyncapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS gsyncapiGetMemInterMapParams_DISPATCH(struct GSyncApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__gsyncapiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__gsyncapiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS gsyncapiCheckMemInterUnmap_DISPATCH(struct GSyncApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__gsyncapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__gsyncapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS gsyncapiGetMemoryMappingDescriptor_DISPATCH(struct GSyncApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__gsyncapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__gsyncapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS gsyncapiControlSerialization_Prologue_DISPATCH(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gsyncapiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__gsyncapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void gsyncapiControlSerialization_Epilogue_DISPATCH(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__gsyncapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__gsyncapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS gsyncapiControl_Prologue_DISPATCH(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gsyncapiControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__gsyncapiControl_Prologue__(pResource, pCallContext, pParams); } static inline void gsyncapiControl_Epilogue_DISPATCH(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__gsyncapiControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__gsyncapiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool gsyncapiCanCopy_DISPATCH(struct GSyncApi *pResource) { - return pResource->__gsyncapiCanCopy__(pResource); + return pResource->__nvoc_vtable->__gsyncapiCanCopy__(pResource); } static inline NV_STATUS gsyncapiIsDuplicate_DISPATCH(struct GSyncApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__gsyncapiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__gsyncapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void gsyncapiPreDestruct_DISPATCH(struct GSyncApi *pResource) { - pResource->__gsyncapiPreDestruct__(pResource); + pResource->__nvoc_vtable->__gsyncapiPreDestruct__(pResource); } static inline NV_STATUS gsyncapiControlFilter_DISPATCH(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__gsyncapiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__gsyncapiControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS gsyncapiMap_DISPATCH(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__gsyncapiMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__gsyncapiMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS gsyncapiUnmap_DISPATCH(struct GSyncApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__gsyncapiUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__gsyncapiUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool gsyncapiIsPartialUnmapSupported_DISPATCH(struct GSyncApi *pResource) { - return pResource->__gsyncapiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__gsyncapiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS gsyncapiMapTo_DISPATCH(struct GSyncApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__gsyncapiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__gsyncapiMapTo__(pResource, pParams); } static inline NV_STATUS gsyncapiUnmapFrom_DISPATCH(struct GSyncApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__gsyncapiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__gsyncapiUnmapFrom__(pResource, pParams); } static inline NvU32 gsyncapiGetRefCount_DISPATCH(struct GSyncApi *pResource) { - return pResource->__gsyncapiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__gsyncapiGetRefCount__(pResource); } static inline void gsyncapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct GSyncApi *pResource, RsResourceRef *pReference) { - pResource->__gsyncapiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__gsyncapiAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * gsyncapiGetNotificationListPtr_DISPATCH(struct GSyncApi *pNotifier) { - return pNotifier->__gsyncapiGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__gsyncapiGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * gsyncapiGetNotificationShare_DISPATCH(struct GSyncApi *pNotifier) { - return pNotifier->__gsyncapiGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__gsyncapiGetNotificationShare__(pNotifier); } static inline void gsyncapiSetNotificationShare_DISPATCH(struct GSyncApi *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__gsyncapiSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__gsyncapiSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS gsyncapiUnregisterEvent_DISPATCH(struct GSyncApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__gsyncapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__gsyncapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS gsyncapiGetOrAllocNotifShare_DISPATCH(struct GSyncApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__gsyncapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__gsyncapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS gsyncapiControl_IMPL(struct GSyncApi *pGsyncApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); diff --git a/src/nvidia/generated/g_gsync_nvoc.c b/src/nvidia/generated/g_gsync_nvoc.c index 4aaa528350..39e9d95cb7 100644 --- a/src/nvidia/generated/g_gsync_nvoc.c +++ b/src/nvidia/generated/g_gsync_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGSYNCMGR = /*pExportInfo=*/ &__nvoc_export_info_OBJGSYNCMGR }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJGSYNCMGR = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_gsync_nvoc.h b/src/nvidia/generated/g_gsync_nvoc.h index 8617d510c9..848419779b 100644 --- a/src/nvidia/generated/g_gsync_nvoc.h +++ b/src/nvidia/generated/g_gsync_nvoc.h @@ -7,14 +7,14 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2006-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2006-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -112,6 +112,9 @@ typedef enum { refSetCommit = 2, } REFTYPE; +// Pre-define to use OBJGSYNC references in API calls +typedef struct _def_gsync OBJGSYNC; + typedef NV30F1_CTRL_GSYNC_GET_OPTIMIZED_TIMING_PARAMS GSYNCTIMINGPARAMS; typedef NV30F1_CTRL_GSYNC_GET_CAPS_PARAMS GSYNCCAPSPARAMS; @@ -136,7 +139,7 @@ typedef NV_STATUS GsyncGetInterlaceMode (struct OBJGPU *, PDACEXTERNALDEVICE, N typedef NV_STATUS GsyncSetInterlaceMode (struct OBJGPU *, PDACEXTERNALDEVICE, NvU32); typedef NV_STATUS GsyncRefSwapBarrier (struct OBJGPU *, PDACEXTERNALDEVICE, REFTYPE, NvBool *); typedef NV_STATUS GsyncRefSignal (struct OBJGPU *, PDACEXTERNALDEVICE, REFTYPE, GSYNCSYNCSIGNAL, NvBool TestRate, NvU32 *); -typedef NV_STATUS GsyncRefMaster (struct OBJGPU *, PDACEXTERNALDEVICE, REFTYPE, NvU32 *, NvU32 *, NvBool, NvBool); +typedef NV_STATUS GsyncRefMaster (struct OBJGPU *, OBJGSYNC *, REFTYPE, NvU32 *, NvU32 *, NvBool, NvBool); typedef NV_STATUS GsyncRefSlaves (struct OBJGPU *, PDACEXTERNALDEVICE, REFTYPE, NvU32 *, NvU32 *); typedef NV_STATUS GsyncGetCplStatus (struct OBJGPU *, PDACEXTERNALDEVICE, GSYNCSTATUS, NvU32 *); typedef NV_STATUS GsyncSetWatchdog (struct OBJGPU *, PDACEXTERNALDEVICE, NvU32); @@ -151,6 +154,7 @@ typedef NV_STATUS GsyncGetHouseSyncMode (struct OBJGPU *, PDACEXTERNALDEVICE, N typedef NV_STATUS GsyncSetHouseSyncMode (struct OBJGPU *, PDACEXTERNALDEVICE, NvU8); typedef NV_STATUS GsyncGetMulDiv (struct OBJGPU *, DACEXTERNALDEVICE *, NV30F1_CTRL_GSYNC_MULTIPLY_DIVIDE_SETTINGS *); typedef NV_STATUS GsyncSetMulDiv (struct OBJGPU *, DACEXTERNALDEVICE *, NV30F1_CTRL_GSYNC_MULTIPLY_DIVIDE_SETTINGS *); +typedef NV_STATUS GsyncSetRasterSyncDecodeMode (struct OBJGPU *, DACEXTERNALDEVICE *); typedef struct GSYNC_HAL_IFACES { @@ -188,6 +192,7 @@ typedef struct GSYNC_HAL_IFACES { GsyncSetHouseSyncMode *gsyncSetHouseSyncMode; GsyncGetMulDiv *gsyncGetMulDiv; GsyncSetMulDiv *gsyncSetMulDiv; + GsyncSetRasterSyncDecodeMode *gsyncSetRasterSyncDecodeMode; } GSYNC_HAL_IFACES; diff --git a/src/nvidia/generated/g_hal_mgr_nvoc.c b/src/nvidia/generated/g_hal_mgr_nvoc.c index 11ff428541..831025cc76 100644 --- a/src/nvidia/generated/g_hal_mgr_nvoc.c +++ b/src/nvidia/generated/g_hal_mgr_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJHALMGR = /*pExportInfo=*/ &__nvoc_export_info_OBJHALMGR }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJHALMGR = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_hal_mgr_nvoc.h b/src/nvidia/generated/g_hal_mgr_nvoc.h index c7e610035c..4914677ccd 100644 --- a/src/nvidia/generated/g_hal_mgr_nvoc.h +++ b/src/nvidia/generated/g_hal_mgr_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_hal_nvoc.c b/src/nvidia/generated/g_hal_nvoc.c index d17e67e41f..0e6b914847 100644 --- a/src/nvidia/generated/g_hal_nvoc.c +++ b/src/nvidia/generated/g_hal_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJHAL = /*pExportInfo=*/ &__nvoc_export_info_OBJHAL }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJHAL = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_hal_nvoc.h b/src/nvidia/generated/g_hal_nvoc.h index 25ecbc195a..2c60d7fc88 100644 --- a/src/nvidia/generated/g_hal_nvoc.h +++ b/src/nvidia/generated/g_hal_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_hal_stubs.h b/src/nvidia/generated/g_hal_stubs.h index 14becc2e02..95ab4427de 100644 --- a/src/nvidia/generated/g_hal_stubs.h +++ b/src/nvidia/generated/g_hal_stubs.h @@ -140,7 +140,7 @@ NV_STATUS rpcCtrlDbgReadSingleSmErrorState_STUB( NV_STATUS rpcDisableChannels_STUB( POBJGPU pGpu, POBJRPC pRpc, - NvU32 arg3 + void *pArg3 ) { return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION; @@ -961,6 +961,16 @@ NV_STATUS rpcCtrlStopChannel_STUB( return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION; } +// RPC:hal:CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102 +NV_STATUS rpcCtrlCmdInternalControlGspTrace_STUB( + POBJGPU pGpu, + POBJRPC pRpc, + NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE_PARAMS *pArg3 +) +{ + return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION; +} + // RPC:hal:SET_SURFACE_PROPERTIES - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102 NV_STATUS rpcSetSurfaceProperties_STUB( POBJGPU pGpu, diff --git a/src/nvidia/generated/g_hda_codec_api_nvoc.c b/src/nvidia/generated/g_hda_codec_api_nvoc.c index 96bb01a586..4fef9ad13e 100644 --- a/src/nvidia/generated/g_hda_codec_api_nvoc.c +++ b/src/nvidia/generated/g_hda_codec_api_nvoc.c @@ -93,130 +93,198 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_Hdacodec = /*pExportInfo=*/ &__nvoc_export_info_Hdacodec }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecControl(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecMap(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecUnmap(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_hdacodecShareCallback(struct Hdacodec *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecGetRegBaseOffsetAndSize(struct Hdacodec *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecGetMapAddrSpace(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecInternalControlForward(struct Hdacodec *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_hdacodecGetInternalObjectHandle(struct Hdacodec *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_hdacodecAccessCallback(struct Hdacodec *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_hdacodecGetMemInterMapParams(struct Hdacodec *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_hdacodecCheckMemInterUnmap(struct Hdacodec *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_hdacodecGetMemoryMappingDescriptor(struct Hdacodec *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_hdacodecControlSerialization_Prologue(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_hdacodecControlSerialization_Epilogue(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_hdacodecControl_Prologue(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_hdacodecControl_Epilogue(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_hdacodecCanCopy(struct Hdacodec *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_hdacodecIsDuplicate(struct Hdacodec *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_hdacodecPreDestruct(struct Hdacodec *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_hdacodecControlFilter(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_hdacodecIsPartialUnmapSupported(struct Hdacodec *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_hdacodecMapTo(struct Hdacodec *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_hdacodecUnmapFrom(struct Hdacodec *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_hdacodecGetRefCount(struct Hdacodec *pResource); // this +void __nvoc_up_thunk_RsResource_hdacodecAddAdditionalDependants(struct RsClient *pClient, struct Hdacodec *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in Hdacodec to superclasses // hdacodecControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecControl(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecControl(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset), pCallContext, pParams); } // hdacodecMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecMap(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecMap(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // hdacodecUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecUnmap(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecUnmap(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset), pCallContext, pCpuMapping); } // hdacodecShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_hdacodecShareCallback(struct Hdacodec *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_hdacodecShareCallback(struct Hdacodec *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // hdacodecGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecGetRegBaseOffsetAndSize(struct Hdacodec *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecGetRegBaseOffsetAndSize(struct Hdacodec *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset), pGpu, pOffset, pSize); } // hdacodecGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecGetMapAddrSpace(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecGetMapAddrSpace(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // hdacodecInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecInternalControlForward(struct Hdacodec *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_hdacodecInternalControlForward(struct Hdacodec *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset), command, pParams, size); } // hdacodecGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_hdacodecGetInternalObjectHandle(struct Hdacodec *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_hdacodecGetInternalObjectHandle(struct Hdacodec *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Hdacodec_GpuResource.offset)); } // hdacodecAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_hdacodecAccessCallback(struct Hdacodec *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_hdacodecAccessCallback(struct Hdacodec *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // hdacodecGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_hdacodecGetMemInterMapParams(struct Hdacodec *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_hdacodecGetMemInterMapParams(struct Hdacodec *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Hdacodec_RmResource.offset), pParams); } // hdacodecCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_hdacodecCheckMemInterUnmap(struct Hdacodec *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_hdacodecCheckMemInterUnmap(struct Hdacodec *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Hdacodec_RmResource.offset), bSubdeviceHandleProvided); } // hdacodecGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_hdacodecGetMemoryMappingDescriptor(struct Hdacodec *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_hdacodecGetMemoryMappingDescriptor(struct Hdacodec *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Hdacodec_RmResource.offset), ppMemDesc); } // hdacodecControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_hdacodecControlSerialization_Prologue(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_hdacodecControlSerialization_Prologue(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RmResource.offset), pCallContext, pParams); } // hdacodecControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_hdacodecControlSerialization_Epilogue(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_hdacodecControlSerialization_Epilogue(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RmResource.offset), pCallContext, pParams); } // hdacodecControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_hdacodecControl_Prologue(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_hdacodecControl_Prologue(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RmResource.offset), pCallContext, pParams); } // hdacodecControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_hdacodecControl_Epilogue(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_hdacodecControl_Epilogue(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RmResource.offset), pCallContext, pParams); } // hdacodecCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_hdacodecCanCopy(struct Hdacodec *pResource) { +NvBool __nvoc_up_thunk_RsResource_hdacodecCanCopy(struct Hdacodec *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RsResource.offset)); } // hdacodecIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_hdacodecIsDuplicate(struct Hdacodec *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_hdacodecIsDuplicate(struct Hdacodec *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RsResource.offset), hMemory, pDuplicate); } // hdacodecPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_hdacodecPreDestruct(struct Hdacodec *pResource) { +void __nvoc_up_thunk_RsResource_hdacodecPreDestruct(struct Hdacodec *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RsResource.offset)); } // hdacodecControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_hdacodecControlFilter(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_hdacodecControlFilter(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RsResource.offset), pCallContext, pParams); } // hdacodecIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_hdacodecIsPartialUnmapSupported(struct Hdacodec *pResource) { +NvBool __nvoc_up_thunk_RsResource_hdacodecIsPartialUnmapSupported(struct Hdacodec *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RsResource.offset)); } // hdacodecMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_hdacodecMapTo(struct Hdacodec *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_hdacodecMapTo(struct Hdacodec *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RsResource.offset), pParams); } // hdacodecUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_hdacodecUnmapFrom(struct Hdacodec *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_hdacodecUnmapFrom(struct Hdacodec *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RsResource.offset), pParams); } // hdacodecGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_hdacodecGetRefCount(struct Hdacodec *pResource) { +NvU32 __nvoc_up_thunk_RsResource_hdacodecGetRefCount(struct Hdacodec *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RsResource.offset)); } // hdacodecAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_hdacodecAddAdditionalDependants(struct RsClient *pClient, struct Hdacodec *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_hdacodecAddAdditionalDependants(struct RsClient *pClient, struct Hdacodec *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Hdacodec_RsResource.offset), pReference); } @@ -259,88 +327,110 @@ NV_STATUS __nvoc_ctor_Hdacodec(Hdacodec *pThis, struct CALL_CONTEXT * arg_pCallC // Vtable initialization static void __nvoc_init_funcTable_Hdacodec_1(Hdacodec *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // hdacodecControl -- virtual inherited (gpures) base (gpures) - pThis->__hdacodecControl__ = &__nvoc_up_thunk_GpuResource_hdacodecControl; - - // hdacodecMap -- virtual inherited (gpures) base (gpures) - pThis->__hdacodecMap__ = &__nvoc_up_thunk_GpuResource_hdacodecMap; - - // hdacodecUnmap -- virtual inherited (gpures) base (gpures) - pThis->__hdacodecUnmap__ = &__nvoc_up_thunk_GpuResource_hdacodecUnmap; - - // hdacodecShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__hdacodecShareCallback__ = &__nvoc_up_thunk_GpuResource_hdacodecShareCallback; - - // hdacodecGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__hdacodecGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_hdacodecGetRegBaseOffsetAndSize; - - // hdacodecGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__hdacodecGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_hdacodecGetMapAddrSpace; - - // hdacodecInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__hdacodecInternalControlForward__ = &__nvoc_up_thunk_GpuResource_hdacodecInternalControlForward; - - // hdacodecGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__hdacodecGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_hdacodecGetInternalObjectHandle; - - // hdacodecAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__hdacodecAccessCallback__ = &__nvoc_up_thunk_RmResource_hdacodecAccessCallback; - - // hdacodecGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__hdacodecGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_hdacodecGetMemInterMapParams; - - // hdacodecCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__hdacodecCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_hdacodecCheckMemInterUnmap; - - // hdacodecGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__hdacodecGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_hdacodecGetMemoryMappingDescriptor; - - // hdacodecControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__hdacodecControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_hdacodecControlSerialization_Prologue; - - // hdacodecControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__hdacodecControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_hdacodecControlSerialization_Epilogue; - - // hdacodecControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__hdacodecControl_Prologue__ = &__nvoc_up_thunk_RmResource_hdacodecControl_Prologue; - - // hdacodecControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__hdacodecControl_Epilogue__ = &__nvoc_up_thunk_RmResource_hdacodecControl_Epilogue; - - // hdacodecCanCopy -- virtual inherited (res) base (gpures) - pThis->__hdacodecCanCopy__ = &__nvoc_up_thunk_RsResource_hdacodecCanCopy; - - // hdacodecIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__hdacodecIsDuplicate__ = &__nvoc_up_thunk_RsResource_hdacodecIsDuplicate; - - // hdacodecPreDestruct -- virtual inherited (res) base (gpures) - pThis->__hdacodecPreDestruct__ = &__nvoc_up_thunk_RsResource_hdacodecPreDestruct; - - // hdacodecControlFilter -- virtual inherited (res) base (gpures) - pThis->__hdacodecControlFilter__ = &__nvoc_up_thunk_RsResource_hdacodecControlFilter; - - // hdacodecIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__hdacodecIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_hdacodecIsPartialUnmapSupported; - - // hdacodecMapTo -- virtual inherited (res) base (gpures) - pThis->__hdacodecMapTo__ = &__nvoc_up_thunk_RsResource_hdacodecMapTo; - - // hdacodecUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__hdacodecUnmapFrom__ = &__nvoc_up_thunk_RsResource_hdacodecUnmapFrom; - - // hdacodecGetRefCount -- virtual inherited (res) base (gpures) - pThis->__hdacodecGetRefCount__ = &__nvoc_up_thunk_RsResource_hdacodecGetRefCount; - - // hdacodecAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__hdacodecAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_hdacodecAddAdditionalDependants; -} // End __nvoc_init_funcTable_Hdacodec_1 with approximately 25 basic block(s). +} // End __nvoc_init_funcTable_Hdacodec_1 // Initialize vtable(s) for 25 virtual method(s). void __nvoc_init_funcTable_Hdacodec(Hdacodec *pThis) { - // Initialize vtable(s) with 25 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__Hdacodec vtable = { + .__hdacodecControl__ = &__nvoc_up_thunk_GpuResource_hdacodecControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__hdacodecMap__ = &__nvoc_up_thunk_GpuResource_hdacodecMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__hdacodecUnmap__ = &__nvoc_up_thunk_GpuResource_hdacodecUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__hdacodecShareCallback__ = &__nvoc_up_thunk_GpuResource_hdacodecShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__hdacodecGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_hdacodecGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__hdacodecGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_hdacodecGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__hdacodecInternalControlForward__ = &__nvoc_up_thunk_GpuResource_hdacodecInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__hdacodecGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_hdacodecGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__hdacodecAccessCallback__ = &__nvoc_up_thunk_RmResource_hdacodecAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__hdacodecGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_hdacodecGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__hdacodecCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_hdacodecCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__hdacodecGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_hdacodecGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__hdacodecControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_hdacodecControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__hdacodecControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_hdacodecControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__hdacodecControl_Prologue__ = &__nvoc_up_thunk_RmResource_hdacodecControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__hdacodecControl_Epilogue__ = &__nvoc_up_thunk_RmResource_hdacodecControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__hdacodecCanCopy__ = &__nvoc_up_thunk_RsResource_hdacodecCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__hdacodecIsDuplicate__ = &__nvoc_up_thunk_RsResource_hdacodecIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__hdacodecPreDestruct__ = &__nvoc_up_thunk_RsResource_hdacodecPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__hdacodecControlFilter__ = &__nvoc_up_thunk_RsResource_hdacodecControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__hdacodecIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_hdacodecIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__hdacodecMapTo__ = &__nvoc_up_thunk_RsResource_hdacodecMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__hdacodecUnmapFrom__ = &__nvoc_up_thunk_RsResource_hdacodecUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__hdacodecGetRefCount__ = &__nvoc_up_thunk_RsResource_hdacodecGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__hdacodecAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_hdacodecAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (hdacodec) this __nvoc_init_funcTable_Hdacodec_1(pThis); } diff --git a/src/nvidia/generated/g_hda_codec_api_nvoc.h b/src/nvidia/generated/g_hda_codec_api_nvoc.h index 7ae8322f52..a90c819264 100644 --- a/src/nvidia/generated/g_hda_codec_api_nvoc.h +++ b/src/nvidia/generated/g_hda_codec_api_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -59,10 +59,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__Hdacodec; + + struct Hdacodec { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__Hdacodec *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -74,8 +79,13 @@ struct Hdacodec { struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct Hdacodec *__nvoc_pbase_Hdacodec; // hdacodec +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__Hdacodec { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers - // Vtable with 25 per-object function pointers NV_STATUS (*__hdacodecControl__)(struct Hdacodec * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__hdacodecMap__)(struct Hdacodec * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__hdacodecUnmap__)(struct Hdacodec * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -133,156 +143,156 @@ NV_STATUS __nvoc_objCreate_Hdacodec(Hdacodec**, Dynamic*, NvU32, struct CALL_CON // Wrapper macros -#define hdacodecControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define hdacodecControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define hdacodecControl(pGpuResource, pCallContext, pParams) hdacodecControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define hdacodecMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define hdacodecMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define hdacodecMap(pGpuResource, pCallContext, pParams, pCpuMapping) hdacodecMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define hdacodecUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define hdacodecUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define hdacodecUnmap(pGpuResource, pCallContext, pCpuMapping) hdacodecUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define hdacodecShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define hdacodecShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define hdacodecShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) hdacodecShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define hdacodecGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define hdacodecGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define hdacodecGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) hdacodecGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define hdacodecGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define hdacodecGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define hdacodecGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) hdacodecGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define hdacodecInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define hdacodecInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define hdacodecInternalControlForward(pGpuResource, command, pParams, size) hdacodecInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define hdacodecGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define hdacodecGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define hdacodecGetInternalObjectHandle(pGpuResource) hdacodecGetInternalObjectHandle_DISPATCH(pGpuResource) -#define hdacodecAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define hdacodecAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define hdacodecAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) hdacodecAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define hdacodecGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define hdacodecGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define hdacodecGetMemInterMapParams(pRmResource, pParams) hdacodecGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define hdacodecCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define hdacodecCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define hdacodecCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) hdacodecCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define hdacodecGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define hdacodecGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define hdacodecGetMemoryMappingDescriptor(pRmResource, ppMemDesc) hdacodecGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define hdacodecControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define hdacodecControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define hdacodecControlSerialization_Prologue(pResource, pCallContext, pParams) hdacodecControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define hdacodecControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define hdacodecControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define hdacodecControlSerialization_Epilogue(pResource, pCallContext, pParams) hdacodecControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define hdacodecControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define hdacodecControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define hdacodecControl_Prologue(pResource, pCallContext, pParams) hdacodecControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define hdacodecControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define hdacodecControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define hdacodecControl_Epilogue(pResource, pCallContext, pParams) hdacodecControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define hdacodecCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define hdacodecCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define hdacodecCanCopy(pResource) hdacodecCanCopy_DISPATCH(pResource) -#define hdacodecIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define hdacodecIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define hdacodecIsDuplicate(pResource, hMemory, pDuplicate) hdacodecIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define hdacodecPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define hdacodecPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define hdacodecPreDestruct(pResource) hdacodecPreDestruct_DISPATCH(pResource) -#define hdacodecControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define hdacodecControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define hdacodecControlFilter(pResource, pCallContext, pParams) hdacodecControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define hdacodecIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define hdacodecIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define hdacodecIsPartialUnmapSupported(pResource) hdacodecIsPartialUnmapSupported_DISPATCH(pResource) -#define hdacodecMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define hdacodecMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define hdacodecMapTo(pResource, pParams) hdacodecMapTo_DISPATCH(pResource, pParams) -#define hdacodecUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define hdacodecUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define hdacodecUnmapFrom(pResource, pParams) hdacodecUnmapFrom_DISPATCH(pResource, pParams) -#define hdacodecGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define hdacodecGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define hdacodecGetRefCount(pResource) hdacodecGetRefCount_DISPATCH(pResource) -#define hdacodecAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define hdacodecAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define hdacodecAddAdditionalDependants(pClient, pResource, pReference) hdacodecAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NV_STATUS hdacodecControl_DISPATCH(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__hdacodecControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__hdacodecControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS hdacodecMap_DISPATCH(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__hdacodecMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__hdacodecMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS hdacodecUnmap_DISPATCH(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__hdacodecUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__hdacodecUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool hdacodecShareCallback_DISPATCH(struct Hdacodec *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__hdacodecShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__hdacodecShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS hdacodecGetRegBaseOffsetAndSize_DISPATCH(struct Hdacodec *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__hdacodecGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__hdacodecGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS hdacodecGetMapAddrSpace_DISPATCH(struct Hdacodec *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__hdacodecGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__hdacodecGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS hdacodecInternalControlForward_DISPATCH(struct Hdacodec *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__hdacodecInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__hdacodecInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle hdacodecGetInternalObjectHandle_DISPATCH(struct Hdacodec *pGpuResource) { - return pGpuResource->__hdacodecGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__hdacodecGetInternalObjectHandle__(pGpuResource); } static inline NvBool hdacodecAccessCallback_DISPATCH(struct Hdacodec *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__hdacodecAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__hdacodecAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS hdacodecGetMemInterMapParams_DISPATCH(struct Hdacodec *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__hdacodecGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__hdacodecGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS hdacodecCheckMemInterUnmap_DISPATCH(struct Hdacodec *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__hdacodecCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__hdacodecCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS hdacodecGetMemoryMappingDescriptor_DISPATCH(struct Hdacodec *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__hdacodecGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__hdacodecGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS hdacodecControlSerialization_Prologue_DISPATCH(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__hdacodecControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__hdacodecControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void hdacodecControlSerialization_Epilogue_DISPATCH(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__hdacodecControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__hdacodecControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS hdacodecControl_Prologue_DISPATCH(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__hdacodecControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__hdacodecControl_Prologue__(pResource, pCallContext, pParams); } static inline void hdacodecControl_Epilogue_DISPATCH(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__hdacodecControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__hdacodecControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool hdacodecCanCopy_DISPATCH(struct Hdacodec *pResource) { - return pResource->__hdacodecCanCopy__(pResource); + return pResource->__nvoc_vtable->__hdacodecCanCopy__(pResource); } static inline NV_STATUS hdacodecIsDuplicate_DISPATCH(struct Hdacodec *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__hdacodecIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__hdacodecIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void hdacodecPreDestruct_DISPATCH(struct Hdacodec *pResource) { - pResource->__hdacodecPreDestruct__(pResource); + pResource->__nvoc_vtable->__hdacodecPreDestruct__(pResource); } static inline NV_STATUS hdacodecControlFilter_DISPATCH(struct Hdacodec *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__hdacodecControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__hdacodecControlFilter__(pResource, pCallContext, pParams); } static inline NvBool hdacodecIsPartialUnmapSupported_DISPATCH(struct Hdacodec *pResource) { - return pResource->__hdacodecIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__hdacodecIsPartialUnmapSupported__(pResource); } static inline NV_STATUS hdacodecMapTo_DISPATCH(struct Hdacodec *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__hdacodecMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__hdacodecMapTo__(pResource, pParams); } static inline NV_STATUS hdacodecUnmapFrom_DISPATCH(struct Hdacodec *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__hdacodecUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__hdacodecUnmapFrom__(pResource, pParams); } static inline NvU32 hdacodecGetRefCount_DISPATCH(struct Hdacodec *pResource) { - return pResource->__hdacodecGetRefCount__(pResource); + return pResource->__nvoc_vtable->__hdacodecGetRefCount__(pResource); } static inline void hdacodecAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct Hdacodec *pResource, RsResourceRef *pReference) { - pResource->__hdacodecAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__hdacodecAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS hdacodecConstruct_IMPL(struct Hdacodec *arg_pHdacodecApi, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_heap_nvoc.c b/src/nvidia/generated/g_heap_nvoc.c index 9b2b9573df..0e34da6f89 100644 --- a/src/nvidia/generated/g_heap_nvoc.c +++ b/src/nvidia/generated/g_heap_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_Heap = /*pExportInfo=*/ &__nvoc_export_info_Heap }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_Heap = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_heap_nvoc.h b/src/nvidia/generated/g_heap_nvoc.h index aea649622c..3481fb7c4a 100644 --- a/src/nvidia/generated/g_heap_nvoc.h +++ b/src/nvidia/generated/g_heap_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -445,6 +445,16 @@ static inline NV_STATUS heapInfo(struct Heap *arg1, NvU64 *arg2, NvU64 *arg3, Nv #define heapInfo(arg1, arg2, arg3, arg4, arg5, arg6) heapInfo_IMPL(arg1, arg2, arg3, arg4, arg5, arg6) #endif //__nvoc_heap_h_disabled +void heapGetClientAddrSpaceSize_IMPL(struct OBJGPU *arg1, struct Heap *arg2, NvU64 *arg3); + +#ifdef __nvoc_heap_h_disabled +static inline void heapGetClientAddrSpaceSize(struct OBJGPU *arg1, struct Heap *arg2, NvU64 *arg3) { + NV_ASSERT_FAILED_PRECOMP("Heap was disabled!"); +} +#else //__nvoc_heap_h_disabled +#define heapGetClientAddrSpaceSize(arg1, arg2, arg3) heapGetClientAddrSpaceSize_IMPL(arg1, arg2, arg3) +#endif //__nvoc_heap_h_disabled + NV_STATUS heapInfoTypeAllocBlocks_IMPL(struct Heap *arg1, NvU32 arg2, NvU64 *arg3); #ifdef __nvoc_heap_h_disabled diff --git a/src/nvidia/generated/g_host_eng_nvoc.c b/src/nvidia/generated/g_host_eng_nvoc.c index 441831201e..6c5245d7f1 100644 --- a/src/nvidia/generated/g_host_eng_nvoc.c +++ b/src/nvidia/generated/g_host_eng_nvoc.c @@ -49,6 +49,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJHOSTENG = /*pExportInfo=*/ &__nvoc_export_info_OBJHOSTENG }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJHOSTENG = { /*numEntries=*/ 0, @@ -76,16 +80,19 @@ NV_STATUS __nvoc_ctor_OBJHOSTENG(OBJHOSTENG *pThis) { // Vtable initialization static void __nvoc_init_funcTable_OBJHOSTENG_1(OBJHOSTENG *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // hostengHaltAndReset -- virtual - pThis->__hostengHaltAndReset__ = &hostengHaltAndReset_IMPL; -} // End __nvoc_init_funcTable_OBJHOSTENG_1 with approximately 1 basic block(s). +} // End __nvoc_init_funcTable_OBJHOSTENG_1 // Initialize vtable(s) for 1 virtual method(s). void __nvoc_init_funcTable_OBJHOSTENG(OBJHOSTENG *pThis) { - // Initialize vtable(s) with 1 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__OBJHOSTENG vtable = { + .__hostengHaltAndReset__ = &hostengHaltAndReset_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_vtable = &vtable; // (hosteng) this __nvoc_init_funcTable_OBJHOSTENG_1(pThis); } diff --git a/src/nvidia/generated/g_host_eng_nvoc.h b/src/nvidia/generated/g_host_eng_nvoc.h index 5419c96afe..bd25f80695 100644 --- a/src/nvidia/generated/g_host_eng_nvoc.h +++ b/src/nvidia/generated/g_host_eng_nvoc.h @@ -7,14 +7,14 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2013-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2013-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -52,8 +52,6 @@ extern "C" { #include "kernel/gpu/fifo/kernel_channel.h" -typedef struct OBJHOSTENG *POBJHOSTENG; - /*! * Interface class for all Hosteng modules. */ @@ -68,15 +66,23 @@ typedef struct OBJHOSTENG *POBJHOSTENG; #endif +// Metadata including vtable +struct NVOC_VTABLE__OBJHOSTENG; + + struct OBJHOSTENG { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__OBJHOSTENG *__nvoc_vtable; // Ancestor object pointers for `staticCast` feature struct OBJHOSTENG *__nvoc_pbase_OBJHOSTENG; // hosteng +}; + - // Vtable with 1 per-object function pointer +// Metadata including vtable with 1 function pointer +struct NVOC_VTABLE__OBJHOSTENG { NV_STATUS (*__hostengHaltAndReset__)(struct OBJGPU *, struct OBJHOSTENG * /*this*/, RMTIMEOUT *); // virtual }; @@ -110,12 +116,12 @@ NV_STATUS __nvoc_objCreate_OBJHOSTENG(OBJHOSTENG**, Dynamic*, NvU32); // Wrapper macros -#define hostengHaltAndReset_FNPTR(pHosteng) pHosteng->__hostengHaltAndReset__ +#define hostengHaltAndReset_FNPTR(pHosteng) pHosteng->__nvoc_vtable->__hostengHaltAndReset__ #define hostengHaltAndReset(pGpu, pHosteng, pRmTimeout) hostengHaltAndReset_DISPATCH(pGpu, pHosteng, pRmTimeout) // Dispatch functions static inline NV_STATUS hostengHaltAndReset_DISPATCH(struct OBJGPU *pGpu, struct OBJHOSTENG *pHosteng, RMTIMEOUT *pRmTimeout) { - return pHosteng->__hostengHaltAndReset__(pGpu, pHosteng, pRmTimeout); + return pHosteng->__nvoc_vtable->__hostengHaltAndReset__(pGpu, pHosteng, pRmTimeout); } NV_STATUS hostengHaltAndReset_IMPL(struct OBJGPU *pGpu, struct OBJHOSTENG *pHosteng, RMTIMEOUT *pRmTimeout); diff --git a/src/nvidia/generated/g_hw_resources_nvoc.c b/src/nvidia/generated/g_hw_resources_nvoc.c index f7c4ee85c7..84105c16d3 100644 --- a/src/nvidia/generated/g_hw_resources_nvoc.c +++ b/src/nvidia/generated/g_hw_resources_nvoc.c @@ -93,138 +93,207 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryHwResources = /*pExportInfo=*/ &__nvoc_export_info_MemoryHwResources }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super +NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super +NvBool __nvoc_down_thunk_MemoryHwResources_resCanCopy(struct RsResource *pMemoryHwResources); // this + // 1 down-thunk(s) defined to bridge methods in MemoryHwResources from superclasses // hwresCanCopy: virtual override (res) base (mem) -static NvBool __nvoc_down_thunk_MemoryHwResources_resCanCopy(struct RsResource *pMemoryHwResources) { +NvBool __nvoc_down_thunk_MemoryHwResources_resCanCopy(struct RsResource *pMemoryHwResources) { return hwresCanCopy((struct MemoryHwResources *)(((unsigned char *) pMemoryHwResources) - __nvoc_rtti_MemoryHwResources_RsResource.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_Memory_hwresIsDuplicate(struct MemoryHwResources *pMemory, NvHandle hMemory, NvBool *pDuplicate); // this +NV_STATUS __nvoc_up_thunk_Memory_hwresGetMapAddrSpace(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_Memory_hwresControl(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_hwresMap(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_hwresUnmap(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_hwresGetMemInterMapParams(struct MemoryHwResources *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_hwresCheckMemInterUnmap(struct MemoryHwResources *pMemory, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_Memory_hwresGetMemoryMappingDescriptor(struct MemoryHwResources *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_Memory_hwresCheckCopyPermissions(struct MemoryHwResources *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // this +NV_STATUS __nvoc_up_thunk_Memory_hwresIsReady(struct MemoryHwResources *pMemory, NvBool bCopyConstructorContext); // this +NvBool __nvoc_up_thunk_Memory_hwresIsGpuMapAllowed(struct MemoryHwResources *pMemory, struct OBJGPU *pGpu); // this +NvBool __nvoc_up_thunk_Memory_hwresIsExportAllowed(struct MemoryHwResources *pMemory); // this +NvBool __nvoc_up_thunk_RmResource_hwresAccessCallback(struct MemoryHwResources *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_hwresShareCallback(struct MemoryHwResources *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_hwresControlSerialization_Prologue(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_hwresControlSerialization_Epilogue(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_hwresControl_Prologue(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_hwresControl_Epilogue(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RsResource_hwresPreDestruct(struct MemoryHwResources *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_hwresControlFilter(struct MemoryHwResources *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_hwresIsPartialUnmapSupported(struct MemoryHwResources *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_hwresMapTo(struct MemoryHwResources *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_hwresUnmapFrom(struct MemoryHwResources *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_hwresGetRefCount(struct MemoryHwResources *pResource); // this +void __nvoc_up_thunk_RsResource_hwresAddAdditionalDependants(struct RsClient *pClient, struct MemoryHwResources *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in MemoryHwResources to superclasses // hwresIsDuplicate: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_hwresIsDuplicate(struct MemoryHwResources *pMemory, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_Memory_hwresIsDuplicate(struct MemoryHwResources *pMemory, NvHandle hMemory, NvBool *pDuplicate) { return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), hMemory, pDuplicate); } // hwresGetMapAddrSpace: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_hwresGetMapAddrSpace(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_Memory_hwresGetMapAddrSpace(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), pCallContext, mapFlags, pAddrSpace); } // hwresControl: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_hwresControl(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_hwresControl(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), pCallContext, pParams); } // hwresMap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_hwresMap(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_hwresMap(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), pCallContext, pParams, pCpuMapping); } // hwresUnmap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_hwresUnmap(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_hwresUnmap(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), pCallContext, pCpuMapping); } // hwresGetMemInterMapParams: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_hwresGetMemInterMapParams(struct MemoryHwResources *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_hwresGetMemInterMapParams(struct MemoryHwResources *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), pParams); } // hwresCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_hwresCheckMemInterUnmap(struct MemoryHwResources *pMemory, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_Memory_hwresCheckMemInterUnmap(struct MemoryHwResources *pMemory, NvBool bSubdeviceHandleProvided) { return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), bSubdeviceHandleProvided); } // hwresGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_hwresGetMemoryMappingDescriptor(struct MemoryHwResources *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_Memory_hwresGetMemoryMappingDescriptor(struct MemoryHwResources *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), ppMemDesc); } // hwresCheckCopyPermissions: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_hwresCheckCopyPermissions(struct MemoryHwResources *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { +NV_STATUS __nvoc_up_thunk_Memory_hwresCheckCopyPermissions(struct MemoryHwResources *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), pDstGpu, pDstDevice); } // hwresIsReady: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_hwresIsReady(struct MemoryHwResources *pMemory, NvBool bCopyConstructorContext) { +NV_STATUS __nvoc_up_thunk_Memory_hwresIsReady(struct MemoryHwResources *pMemory, NvBool bCopyConstructorContext) { return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), bCopyConstructorContext); } // hwresIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_hwresIsGpuMapAllowed(struct MemoryHwResources *pMemory, struct OBJGPU *pGpu) { +NvBool __nvoc_up_thunk_Memory_hwresIsGpuMapAllowed(struct MemoryHwResources *pMemory, struct OBJGPU *pGpu) { return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset), pGpu); } // hwresIsExportAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_hwresIsExportAllowed(struct MemoryHwResources *pMemory) { +NvBool __nvoc_up_thunk_Memory_hwresIsExportAllowed(struct MemoryHwResources *pMemory) { return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryHwResources_Memory.offset)); } // hwresAccessCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_hwresAccessCallback(struct MemoryHwResources *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_hwresAccessCallback(struct MemoryHwResources *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // hwresShareCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_hwresShareCallback(struct MemoryHwResources *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_hwresShareCallback(struct MemoryHwResources *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // hwresControlSerialization_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_hwresControlSerialization_Prologue(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_hwresControlSerialization_Prologue(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RmResource.offset), pCallContext, pParams); } // hwresControlSerialization_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_hwresControlSerialization_Epilogue(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_hwresControlSerialization_Epilogue(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RmResource.offset), pCallContext, pParams); } // hwresControl_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_hwresControl_Prologue(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_hwresControl_Prologue(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RmResource.offset), pCallContext, pParams); } // hwresControl_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_hwresControl_Epilogue(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_hwresControl_Epilogue(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RmResource.offset), pCallContext, pParams); } // hwresPreDestruct: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_hwresPreDestruct(struct MemoryHwResources *pResource) { +void __nvoc_up_thunk_RsResource_hwresPreDestruct(struct MemoryHwResources *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RsResource.offset)); } // hwresControlFilter: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_hwresControlFilter(struct MemoryHwResources *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_hwresControlFilter(struct MemoryHwResources *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RsResource.offset), pCallContext, pParams); } // hwresIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body -static NvBool __nvoc_up_thunk_RsResource_hwresIsPartialUnmapSupported(struct MemoryHwResources *pResource) { +NvBool __nvoc_up_thunk_RsResource_hwresIsPartialUnmapSupported(struct MemoryHwResources *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RsResource.offset)); } // hwresMapTo: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_hwresMapTo(struct MemoryHwResources *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_hwresMapTo(struct MemoryHwResources *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RsResource.offset), pParams); } // hwresUnmapFrom: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_hwresUnmapFrom(struct MemoryHwResources *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_hwresUnmapFrom(struct MemoryHwResources *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RsResource.offset), pParams); } // hwresGetRefCount: virtual inherited (res) base (mem) -static NvU32 __nvoc_up_thunk_RsResource_hwresGetRefCount(struct MemoryHwResources *pResource) { +NvU32 __nvoc_up_thunk_RsResource_hwresGetRefCount(struct MemoryHwResources *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RsResource.offset)); } // hwresAddAdditionalDependants: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_hwresAddAdditionalDependants(struct RsClient *pClient, struct MemoryHwResources *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_hwresAddAdditionalDependants(struct RsClient *pClient, struct MemoryHwResources *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryHwResources_RsResource.offset), pReference); } @@ -268,92 +337,112 @@ NV_STATUS __nvoc_ctor_MemoryHwResources(MemoryHwResources *pThis, CALL_CONTEXT * // Vtable initialization static void __nvoc_init_funcTable_MemoryHwResources_1(MemoryHwResources *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // hwresCanCopy -- virtual override (res) base (mem) - pThis->__hwresCanCopy__ = &hwresCanCopy_IMPL; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_MemoryHwResources_resCanCopy; - - // hwresIsDuplicate -- virtual inherited (mem) base (mem) - pThis->__hwresIsDuplicate__ = &__nvoc_up_thunk_Memory_hwresIsDuplicate; - - // hwresGetMapAddrSpace -- virtual inherited (mem) base (mem) - pThis->__hwresGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_hwresGetMapAddrSpace; - - // hwresControl -- virtual inherited (mem) base (mem) - pThis->__hwresControl__ = &__nvoc_up_thunk_Memory_hwresControl; - - // hwresMap -- virtual inherited (mem) base (mem) - pThis->__hwresMap__ = &__nvoc_up_thunk_Memory_hwresMap; - - // hwresUnmap -- virtual inherited (mem) base (mem) - pThis->__hwresUnmap__ = &__nvoc_up_thunk_Memory_hwresUnmap; - - // hwresGetMemInterMapParams -- virtual inherited (mem) base (mem) - pThis->__hwresGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_hwresGetMemInterMapParams; - - // hwresCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body - pThis->__hwresCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_hwresCheckMemInterUnmap; - - // hwresGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) - pThis->__hwresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_hwresGetMemoryMappingDescriptor; - - // hwresCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body - pThis->__hwresCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_hwresCheckCopyPermissions; - - // hwresIsReady -- virtual inherited (mem) base (mem) - pThis->__hwresIsReady__ = &__nvoc_up_thunk_Memory_hwresIsReady; - - // hwresIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__hwresIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_hwresIsGpuMapAllowed; - - // hwresIsExportAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__hwresIsExportAllowed__ = &__nvoc_up_thunk_Memory_hwresIsExportAllowed; - - // hwresAccessCallback -- virtual inherited (rmres) base (mem) - pThis->__hwresAccessCallback__ = &__nvoc_up_thunk_RmResource_hwresAccessCallback; - - // hwresShareCallback -- virtual inherited (rmres) base (mem) - pThis->__hwresShareCallback__ = &__nvoc_up_thunk_RmResource_hwresShareCallback; - - // hwresControlSerialization_Prologue -- virtual inherited (rmres) base (mem) - pThis->__hwresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_hwresControlSerialization_Prologue; - - // hwresControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__hwresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_hwresControlSerialization_Epilogue; - - // hwresControl_Prologue -- virtual inherited (rmres) base (mem) - pThis->__hwresControl_Prologue__ = &__nvoc_up_thunk_RmResource_hwresControl_Prologue; - - // hwresControl_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__hwresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_hwresControl_Epilogue; - - // hwresPreDestruct -- virtual inherited (res) base (mem) - pThis->__hwresPreDestruct__ = &__nvoc_up_thunk_RsResource_hwresPreDestruct; - - // hwresControlFilter -- virtual inherited (res) base (mem) - pThis->__hwresControlFilter__ = &__nvoc_up_thunk_RsResource_hwresControlFilter; - - // hwresIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body - pThis->__hwresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_hwresIsPartialUnmapSupported; - - // hwresMapTo -- virtual inherited (res) base (mem) - pThis->__hwresMapTo__ = &__nvoc_up_thunk_RsResource_hwresMapTo; - - // hwresUnmapFrom -- virtual inherited (res) base (mem) - pThis->__hwresUnmapFrom__ = &__nvoc_up_thunk_RsResource_hwresUnmapFrom; - - // hwresGetRefCount -- virtual inherited (res) base (mem) - pThis->__hwresGetRefCount__ = &__nvoc_up_thunk_RsResource_hwresGetRefCount; - - // hwresAddAdditionalDependants -- virtual inherited (res) base (mem) - pThis->__hwresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_hwresAddAdditionalDependants; -} // End __nvoc_init_funcTable_MemoryHwResources_1 with approximately 27 basic block(s). +} // End __nvoc_init_funcTable_MemoryHwResources_1 // Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_MemoryHwResources(MemoryHwResources *pThis) { - // Initialize vtable(s) with 26 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__MemoryHwResources vtable = { + .__hwresCanCopy__ = &hwresCanCopy_IMPL, // virtual override (res) base (mem) + .Memory.__memCanCopy__ = &__nvoc_up_thunk_RsResource_memCanCopy, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_MemoryHwResources_resCanCopy, // virtual + .__hwresIsDuplicate__ = &__nvoc_up_thunk_Memory_hwresIsDuplicate, // virtual inherited (mem) base (mem) + .Memory.__memIsDuplicate__ = &memIsDuplicate_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resIsDuplicate__ = &__nvoc_down_thunk_Memory_resIsDuplicate, // virtual + .__hwresGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_hwresGetMapAddrSpace, // virtual inherited (mem) base (mem) + .Memory.__memGetMapAddrSpace__ = &memGetMapAddrSpace_IMPL, // virtual + .__hwresControl__ = &__nvoc_up_thunk_Memory_hwresControl, // virtual inherited (mem) base (mem) + .Memory.__memControl__ = &memControl_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_Memory_resControl, // virtual + .__hwresMap__ = &__nvoc_up_thunk_Memory_hwresMap, // virtual inherited (mem) base (mem) + .Memory.__memMap__ = &memMap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_Memory_resMap, // virtual + .__hwresUnmap__ = &__nvoc_up_thunk_Memory_hwresUnmap, // virtual inherited (mem) base (mem) + .Memory.__memUnmap__ = &memUnmap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_Memory_resUnmap, // virtual + .__hwresGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_hwresGetMemInterMapParams, // virtual inherited (mem) base (mem) + .Memory.__memGetMemInterMapParams__ = &memGetMemInterMapParams_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_Memory_rmresGetMemInterMapParams, // virtual + .__hwresCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_hwresCheckMemInterUnmap, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckMemInterUnmap__ = &memCheckMemInterUnmap_ac1694, // inline virtual override (rmres) base (rmres) body + .Memory.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_Memory_rmresCheckMemInterUnmap, // virtual + .__hwresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_hwresGetMemoryMappingDescriptor, // virtual inherited (mem) base (mem) + .Memory.__memGetMemoryMappingDescriptor__ = &memGetMemoryMappingDescriptor_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor, // virtual + .__hwresCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_hwresCheckCopyPermissions, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckCopyPermissions__ = &memCheckCopyPermissions_ac1694, // inline virtual body + .__hwresIsReady__ = &__nvoc_up_thunk_Memory_hwresIsReady, // virtual inherited (mem) base (mem) + .Memory.__memIsReady__ = &memIsReady_IMPL, // virtual + .__hwresIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_hwresIsGpuMapAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsGpuMapAllowed__ = &memIsGpuMapAllowed_e661f0, // inline virtual body + .__hwresIsExportAllowed__ = &__nvoc_up_thunk_Memory_hwresIsExportAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsExportAllowed__ = &memIsExportAllowed_e661f0, // inline virtual body + .__hwresAccessCallback__ = &__nvoc_up_thunk_RmResource_hwresAccessCallback, // virtual inherited (rmres) base (mem) + .Memory.__memAccessCallback__ = &__nvoc_up_thunk_RmResource_memAccessCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__hwresShareCallback__ = &__nvoc_up_thunk_RmResource_hwresShareCallback, // virtual inherited (rmres) base (mem) + .Memory.__memShareCallback__ = &__nvoc_up_thunk_RmResource_memShareCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__hwresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_hwresControlSerialization_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__hwresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_hwresControlSerialization_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__hwresControl_Prologue__ = &__nvoc_up_thunk_RmResource_hwresControl_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Prologue__ = &__nvoc_up_thunk_RmResource_memControl_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__hwresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_hwresControl_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memControl_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__hwresPreDestruct__ = &__nvoc_up_thunk_RsResource_hwresPreDestruct, // virtual inherited (res) base (mem) + .Memory.__memPreDestruct__ = &__nvoc_up_thunk_RsResource_memPreDestruct, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__hwresControlFilter__ = &__nvoc_up_thunk_RsResource_hwresControlFilter, // virtual inherited (res) base (mem) + .Memory.__memControlFilter__ = &__nvoc_up_thunk_RsResource_memControlFilter, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__hwresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_hwresIsPartialUnmapSupported, // inline virtual inherited (res) base (mem) body + .Memory.__memIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .Memory.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .Memory.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__hwresMapTo__ = &__nvoc_up_thunk_RsResource_hwresMapTo, // virtual inherited (res) base (mem) + .Memory.__memMapTo__ = &__nvoc_up_thunk_RsResource_memMapTo, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__hwresUnmapFrom__ = &__nvoc_up_thunk_RsResource_hwresUnmapFrom, // virtual inherited (res) base (mem) + .Memory.__memUnmapFrom__ = &__nvoc_up_thunk_RsResource_memUnmapFrom, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__hwresGetRefCount__ = &__nvoc_up_thunk_RsResource_hwresGetRefCount, // virtual inherited (res) base (mem) + .Memory.__memGetRefCount__ = &__nvoc_up_thunk_RsResource_memGetRefCount, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__hwresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_hwresAddAdditionalDependants, // virtual inherited (res) base (mem) + .Memory.__memAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memAddAdditionalDependants, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.Memory.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable = &vtable.Memory.RmResource; // (rmres) super^2 + pThis->__nvoc_base_Memory.__nvoc_vtable = &vtable.Memory; // (mem) super + pThis->__nvoc_vtable = &vtable; // (hwres) this __nvoc_init_funcTable_MemoryHwResources_1(pThis); } diff --git a/src/nvidia/generated/g_hw_resources_nvoc.h b/src/nvidia/generated/g_hw_resources_nvoc.h index 244673ee6b..6b82cae010 100644 --- a/src/nvidia/generated/g_hw_resources_nvoc.h +++ b/src/nvidia/generated/g_hw_resources_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -58,10 +58,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__MemoryHwResources; + + struct MemoryHwResources { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__MemoryHwResources *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; @@ -73,8 +78,13 @@ struct MemoryHwResources { struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 struct Memory *__nvoc_pbase_Memory; // mem super struct MemoryHwResources *__nvoc_pbase_MemoryHwResources; // hwres +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__MemoryHwResources { + const struct NVOC_VTABLE__Memory Memory; // (mem) 26 function pointers - // Vtable with 26 per-object function pointers NvBool (*__hwresCanCopy__)(struct MemoryHwResources * /*this*/); // virtual override (res) base (mem) NV_STATUS (*__hwresIsDuplicate__)(struct MemoryHwResources * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) NV_STATUS (*__hwresGetMapAddrSpace__)(struct MemoryHwResources * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (mem) @@ -133,162 +143,162 @@ NV_STATUS __nvoc_objCreate_MemoryHwResources(MemoryHwResources**, Dynamic*, NvU3 // Wrapper macros -#define hwresCanCopy_FNPTR(pMemoryHwResources) pMemoryHwResources->__hwresCanCopy__ +#define hwresCanCopy_FNPTR(pMemoryHwResources) pMemoryHwResources->__nvoc_vtable->__hwresCanCopy__ #define hwresCanCopy(pMemoryHwResources) hwresCanCopy_DISPATCH(pMemoryHwResources) -#define hwresIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define hwresIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsDuplicate__ #define hwresIsDuplicate(pMemory, hMemory, pDuplicate) hwresIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define hwresGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ +#define hwresGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMapAddrSpace__ #define hwresGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) hwresGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define hwresControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ +#define hwresControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memControl__ #define hwresControl(pMemory, pCallContext, pParams) hwresControl_DISPATCH(pMemory, pCallContext, pParams) -#define hwresMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define hwresMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memMap__ #define hwresMap(pMemory, pCallContext, pParams, pCpuMapping) hwresMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define hwresUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ +#define hwresUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memUnmap__ #define hwresUnmap(pMemory, pCallContext, pCpuMapping) hwresUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define hwresGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ +#define hwresGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemInterMapParams__ #define hwresGetMemInterMapParams(pMemory, pParams) hwresGetMemInterMapParams_DISPATCH(pMemory, pParams) -#define hwresCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define hwresCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckMemInterUnmap__ #define hwresCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) hwresCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define hwresGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ +#define hwresGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemoryMappingDescriptor__ #define hwresGetMemoryMappingDescriptor(pMemory, ppMemDesc) hwresGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define hwresCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ +#define hwresCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckCopyPermissions__ #define hwresCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) hwresCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define hwresIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define hwresIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsReady__ #define hwresIsReady(pMemory, bCopyConstructorContext) hwresIsReady_DISPATCH(pMemory, bCopyConstructorContext) -#define hwresIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define hwresIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsGpuMapAllowed__ #define hwresIsGpuMapAllowed(pMemory, pGpu) hwresIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define hwresIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define hwresIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsExportAllowed__ #define hwresIsExportAllowed(pMemory) hwresIsExportAllowed_DISPATCH(pMemory) -#define hwresAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define hwresAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define hwresAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) hwresAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define hwresShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define hwresShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define hwresShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) hwresShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define hwresControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define hwresControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define hwresControlSerialization_Prologue(pResource, pCallContext, pParams) hwresControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define hwresControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define hwresControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define hwresControlSerialization_Epilogue(pResource, pCallContext, pParams) hwresControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define hwresControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define hwresControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define hwresControl_Prologue(pResource, pCallContext, pParams) hwresControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define hwresControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define hwresControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define hwresControl_Epilogue(pResource, pCallContext, pParams) hwresControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define hwresPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define hwresPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define hwresPreDestruct(pResource) hwresPreDestruct_DISPATCH(pResource) -#define hwresControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define hwresControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define hwresControlFilter(pResource, pCallContext, pParams) hwresControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define hwresIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define hwresIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define hwresIsPartialUnmapSupported(pResource) hwresIsPartialUnmapSupported_DISPATCH(pResource) -#define hwresMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define hwresMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define hwresMapTo(pResource, pParams) hwresMapTo_DISPATCH(pResource, pParams) -#define hwresUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define hwresUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define hwresUnmapFrom(pResource, pParams) hwresUnmapFrom_DISPATCH(pResource, pParams) -#define hwresGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define hwresGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define hwresGetRefCount(pResource) hwresGetRefCount_DISPATCH(pResource) -#define hwresAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define hwresAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define hwresAddAdditionalDependants(pClient, pResource, pReference) hwresAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool hwresCanCopy_DISPATCH(struct MemoryHwResources *pMemoryHwResources) { - return pMemoryHwResources->__hwresCanCopy__(pMemoryHwResources); + return pMemoryHwResources->__nvoc_vtable->__hwresCanCopy__(pMemoryHwResources); } static inline NV_STATUS hwresIsDuplicate_DISPATCH(struct MemoryHwResources *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__hwresIsDuplicate__(pMemory, hMemory, pDuplicate); + return pMemory->__nvoc_vtable->__hwresIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS hwresGetMapAddrSpace_DISPATCH(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pMemory->__hwresGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); + return pMemory->__nvoc_vtable->__hwresGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS hwresControl_DISPATCH(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__hwresControl__(pMemory, pCallContext, pParams); + return pMemory->__nvoc_vtable->__hwresControl__(pMemory, pCallContext, pParams); } static inline NV_STATUS hwresMap_DISPATCH(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__hwresMap__(pMemory, pCallContext, pParams, pCpuMapping); + return pMemory->__nvoc_vtable->__hwresMap__(pMemory, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS hwresUnmap_DISPATCH(struct MemoryHwResources *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__hwresUnmap__(pMemory, pCallContext, pCpuMapping); + return pMemory->__nvoc_vtable->__hwresUnmap__(pMemory, pCallContext, pCpuMapping); } static inline NV_STATUS hwresGetMemInterMapParams_DISPATCH(struct MemoryHwResources *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__hwresGetMemInterMapParams__(pMemory, pParams); + return pMemory->__nvoc_vtable->__hwresGetMemInterMapParams__(pMemory, pParams); } static inline NV_STATUS hwresCheckMemInterUnmap_DISPATCH(struct MemoryHwResources *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__hwresCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); + return pMemory->__nvoc_vtable->__hwresCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } static inline NV_STATUS hwresGetMemoryMappingDescriptor_DISPATCH(struct MemoryHwResources *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__hwresGetMemoryMappingDescriptor__(pMemory, ppMemDesc); + return pMemory->__nvoc_vtable->__hwresGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } static inline NV_STATUS hwresCheckCopyPermissions_DISPATCH(struct MemoryHwResources *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__hwresCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); + return pMemory->__nvoc_vtable->__hwresCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } static inline NV_STATUS hwresIsReady_DISPATCH(struct MemoryHwResources *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__hwresIsReady__(pMemory, bCopyConstructorContext); + return pMemory->__nvoc_vtable->__hwresIsReady__(pMemory, bCopyConstructorContext); } static inline NvBool hwresIsGpuMapAllowed_DISPATCH(struct MemoryHwResources *pMemory, struct OBJGPU *pGpu) { - return pMemory->__hwresIsGpuMapAllowed__(pMemory, pGpu); + return pMemory->__nvoc_vtable->__hwresIsGpuMapAllowed__(pMemory, pGpu); } static inline NvBool hwresIsExportAllowed_DISPATCH(struct MemoryHwResources *pMemory) { - return pMemory->__hwresIsExportAllowed__(pMemory); + return pMemory->__nvoc_vtable->__hwresIsExportAllowed__(pMemory); } static inline NvBool hwresAccessCallback_DISPATCH(struct MemoryHwResources *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__hwresAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__hwresAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool hwresShareCallback_DISPATCH(struct MemoryHwResources *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__hwresShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__hwresShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS hwresControlSerialization_Prologue_DISPATCH(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__hwresControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__hwresControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void hwresControlSerialization_Epilogue_DISPATCH(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__hwresControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__hwresControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS hwresControl_Prologue_DISPATCH(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__hwresControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__hwresControl_Prologue__(pResource, pCallContext, pParams); } static inline void hwresControl_Epilogue_DISPATCH(struct MemoryHwResources *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__hwresControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__hwresControl_Epilogue__(pResource, pCallContext, pParams); } static inline void hwresPreDestruct_DISPATCH(struct MemoryHwResources *pResource) { - pResource->__hwresPreDestruct__(pResource); + pResource->__nvoc_vtable->__hwresPreDestruct__(pResource); } static inline NV_STATUS hwresControlFilter_DISPATCH(struct MemoryHwResources *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__hwresControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__hwresControlFilter__(pResource, pCallContext, pParams); } static inline NvBool hwresIsPartialUnmapSupported_DISPATCH(struct MemoryHwResources *pResource) { - return pResource->__hwresIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__hwresIsPartialUnmapSupported__(pResource); } static inline NV_STATUS hwresMapTo_DISPATCH(struct MemoryHwResources *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__hwresMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__hwresMapTo__(pResource, pParams); } static inline NV_STATUS hwresUnmapFrom_DISPATCH(struct MemoryHwResources *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__hwresUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__hwresUnmapFrom__(pResource, pParams); } static inline NvU32 hwresGetRefCount_DISPATCH(struct MemoryHwResources *pResource) { - return pResource->__hwresGetRefCount__(pResource); + return pResource->__nvoc_vtable->__hwresGetRefCount__(pResource); } static inline void hwresAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryHwResources *pResource, RsResourceRef *pReference) { - pResource->__hwresAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__hwresAddAdditionalDependants__(pClient, pResource, pReference); } NvBool hwresCanCopy_IMPL(struct MemoryHwResources *pMemoryHwResources); diff --git a/src/nvidia/generated/g_hypervisor_nvoc.c b/src/nvidia/generated/g_hypervisor_nvoc.c index be9fa18908..f3c0f487bf 100644 --- a/src/nvidia/generated/g_hypervisor_nvoc.c +++ b/src/nvidia/generated/g_hypervisor_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJHYPERVISOR = /*pExportInfo=*/ &__nvoc_export_info_OBJHYPERVISOR }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJHYPERVISOR = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_hypervisor_nvoc.h b/src/nvidia/generated/g_hypervisor_nvoc.h index b243385d40..62d67d5c52 100644 --- a/src/nvidia/generated/g_hypervisor_nvoc.h +++ b/src/nvidia/generated/g_hypervisor_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_i2c_api_nvoc.c b/src/nvidia/generated/g_i2c_api_nvoc.c index 1decb26902..81d8dd53cd 100644 --- a/src/nvidia/generated/g_i2c_api_nvoc.c +++ b/src/nvidia/generated/g_i2c_api_nvoc.c @@ -177,130 +177,198 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_I2cApi[] }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_i2capiControl(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_i2capiMap(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_i2capiUnmap(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_i2capiShareCallback(struct I2cApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_i2capiGetRegBaseOffsetAndSize(struct I2cApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_i2capiGetMapAddrSpace(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_i2capiInternalControlForward(struct I2cApi *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_i2capiGetInternalObjectHandle(struct I2cApi *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_i2capiAccessCallback(struct I2cApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_i2capiGetMemInterMapParams(struct I2cApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_i2capiCheckMemInterUnmap(struct I2cApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_i2capiGetMemoryMappingDescriptor(struct I2cApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_i2capiControlSerialization_Prologue(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_i2capiControlSerialization_Epilogue(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_i2capiControl_Prologue(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_i2capiControl_Epilogue(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_i2capiCanCopy(struct I2cApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_i2capiIsDuplicate(struct I2cApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_i2capiPreDestruct(struct I2cApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_i2capiControlFilter(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_i2capiIsPartialUnmapSupported(struct I2cApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_i2capiMapTo(struct I2cApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_i2capiUnmapFrom(struct I2cApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_i2capiGetRefCount(struct I2cApi *pResource); // this +void __nvoc_up_thunk_RsResource_i2capiAddAdditionalDependants(struct RsClient *pClient, struct I2cApi *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in I2cApi to superclasses // i2capiControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_i2capiControl(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_i2capiControl(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset), pCallContext, pParams); } // i2capiMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_i2capiMap(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_i2capiMap(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // i2capiUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_i2capiUnmap(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_i2capiUnmap(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset), pCallContext, pCpuMapping); } // i2capiShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_i2capiShareCallback(struct I2cApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_i2capiShareCallback(struct I2cApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // i2capiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_i2capiGetRegBaseOffsetAndSize(struct I2cApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_i2capiGetRegBaseOffsetAndSize(struct I2cApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset), pGpu, pOffset, pSize); } // i2capiGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_i2capiGetMapAddrSpace(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_i2capiGetMapAddrSpace(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // i2capiInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_i2capiInternalControlForward(struct I2cApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_i2capiInternalControlForward(struct I2cApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset), command, pParams, size); } // i2capiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_i2capiGetInternalObjectHandle(struct I2cApi *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_i2capiGetInternalObjectHandle(struct I2cApi *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_I2cApi_GpuResource.offset)); } // i2capiAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_i2capiAccessCallback(struct I2cApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_i2capiAccessCallback(struct I2cApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // i2capiGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_i2capiGetMemInterMapParams(struct I2cApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_i2capiGetMemInterMapParams(struct I2cApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_I2cApi_RmResource.offset), pParams); } // i2capiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_i2capiCheckMemInterUnmap(struct I2cApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_i2capiCheckMemInterUnmap(struct I2cApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_I2cApi_RmResource.offset), bSubdeviceHandleProvided); } // i2capiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_i2capiGetMemoryMappingDescriptor(struct I2cApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_i2capiGetMemoryMappingDescriptor(struct I2cApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_I2cApi_RmResource.offset), ppMemDesc); } // i2capiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_i2capiControlSerialization_Prologue(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_i2capiControlSerialization_Prologue(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RmResource.offset), pCallContext, pParams); } // i2capiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_i2capiControlSerialization_Epilogue(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_i2capiControlSerialization_Epilogue(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RmResource.offset), pCallContext, pParams); } // i2capiControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_i2capiControl_Prologue(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_i2capiControl_Prologue(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RmResource.offset), pCallContext, pParams); } // i2capiControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_i2capiControl_Epilogue(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_i2capiControl_Epilogue(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RmResource.offset), pCallContext, pParams); } // i2capiCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_i2capiCanCopy(struct I2cApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_i2capiCanCopy(struct I2cApi *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RsResource.offset)); } // i2capiIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_i2capiIsDuplicate(struct I2cApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_i2capiIsDuplicate(struct I2cApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RsResource.offset), hMemory, pDuplicate); } // i2capiPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_i2capiPreDestruct(struct I2cApi *pResource) { +void __nvoc_up_thunk_RsResource_i2capiPreDestruct(struct I2cApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RsResource.offset)); } // i2capiControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_i2capiControlFilter(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_i2capiControlFilter(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RsResource.offset), pCallContext, pParams); } // i2capiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_i2capiIsPartialUnmapSupported(struct I2cApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_i2capiIsPartialUnmapSupported(struct I2cApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RsResource.offset)); } // i2capiMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_i2capiMapTo(struct I2cApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_i2capiMapTo(struct I2cApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RsResource.offset), pParams); } // i2capiUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_i2capiUnmapFrom(struct I2cApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_i2capiUnmapFrom(struct I2cApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RsResource.offset), pParams); } // i2capiGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_i2capiGetRefCount(struct I2cApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_i2capiGetRefCount(struct I2cApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RsResource.offset)); } // i2capiAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_i2capiAddAdditionalDependants(struct RsClient *pClient, struct I2cApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_i2capiAddAdditionalDependants(struct RsClient *pClient, struct I2cApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_I2cApi_RsResource.offset), pReference); } @@ -369,88 +437,122 @@ static void __nvoc_init_funcTable_I2cApi_1(I2cApi *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__i2capiCtrlCmdI2cTransaction__ = &i2capiCtrlCmdI2cTransaction_IMPL; #endif - - // i2capiControl -- virtual inherited (gpures) base (gpures) - pThis->__i2capiControl__ = &__nvoc_up_thunk_GpuResource_i2capiControl; - - // i2capiMap -- virtual inherited (gpures) base (gpures) - pThis->__i2capiMap__ = &__nvoc_up_thunk_GpuResource_i2capiMap; - - // i2capiUnmap -- virtual inherited (gpures) base (gpures) - pThis->__i2capiUnmap__ = &__nvoc_up_thunk_GpuResource_i2capiUnmap; - - // i2capiShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__i2capiShareCallback__ = &__nvoc_up_thunk_GpuResource_i2capiShareCallback; - - // i2capiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__i2capiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_i2capiGetRegBaseOffsetAndSize; - - // i2capiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__i2capiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_i2capiGetMapAddrSpace; - - // i2capiInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__i2capiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_i2capiInternalControlForward; - - // i2capiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__i2capiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_i2capiGetInternalObjectHandle; - - // i2capiAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__i2capiAccessCallback__ = &__nvoc_up_thunk_RmResource_i2capiAccessCallback; - - // i2capiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__i2capiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_i2capiGetMemInterMapParams; - - // i2capiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__i2capiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_i2capiCheckMemInterUnmap; - - // i2capiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__i2capiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_i2capiGetMemoryMappingDescriptor; - - // i2capiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__i2capiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_i2capiControlSerialization_Prologue; - - // i2capiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__i2capiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_i2capiControlSerialization_Epilogue; - - // i2capiControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__i2capiControl_Prologue__ = &__nvoc_up_thunk_RmResource_i2capiControl_Prologue; - - // i2capiControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__i2capiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_i2capiControl_Epilogue; - - // i2capiCanCopy -- virtual inherited (res) base (gpures) - pThis->__i2capiCanCopy__ = &__nvoc_up_thunk_RsResource_i2capiCanCopy; - - // i2capiIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__i2capiIsDuplicate__ = &__nvoc_up_thunk_RsResource_i2capiIsDuplicate; - - // i2capiPreDestruct -- virtual inherited (res) base (gpures) - pThis->__i2capiPreDestruct__ = &__nvoc_up_thunk_RsResource_i2capiPreDestruct; - - // i2capiControlFilter -- virtual inherited (res) base (gpures) - pThis->__i2capiControlFilter__ = &__nvoc_up_thunk_RsResource_i2capiControlFilter; - - // i2capiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__i2capiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_i2capiIsPartialUnmapSupported; - - // i2capiMapTo -- virtual inherited (res) base (gpures) - pThis->__i2capiMapTo__ = &__nvoc_up_thunk_RsResource_i2capiMapTo; - - // i2capiUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__i2capiUnmapFrom__ = &__nvoc_up_thunk_RsResource_i2capiUnmapFrom; - - // i2capiGetRefCount -- virtual inherited (res) base (gpures) - pThis->__i2capiGetRefCount__ = &__nvoc_up_thunk_RsResource_i2capiGetRefCount; - - // i2capiAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__i2capiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_i2capiAddAdditionalDependants; -} // End __nvoc_init_funcTable_I2cApi_1 with approximately 30 basic block(s). +} // End __nvoc_init_funcTable_I2cApi_1 with approximately 5 basic block(s). // Initialize vtable(s) for 30 virtual method(s). void __nvoc_init_funcTable_I2cApi(I2cApi *pThis) { - // Initialize vtable(s) with 30 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__I2cApi vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif + .__i2capiControl__ = &__nvoc_up_thunk_GpuResource_i2capiControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__i2capiMap__ = &__nvoc_up_thunk_GpuResource_i2capiMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__i2capiUnmap__ = &__nvoc_up_thunk_GpuResource_i2capiUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__i2capiShareCallback__ = &__nvoc_up_thunk_GpuResource_i2capiShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__i2capiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_i2capiGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__i2capiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_i2capiGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__i2capiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_i2capiInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__i2capiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_i2capiGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__i2capiAccessCallback__ = &__nvoc_up_thunk_RmResource_i2capiAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__i2capiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_i2capiGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__i2capiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_i2capiCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__i2capiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_i2capiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__i2capiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_i2capiControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__i2capiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_i2capiControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__i2capiControl_Prologue__ = &__nvoc_up_thunk_RmResource_i2capiControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__i2capiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_i2capiControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__i2capiCanCopy__ = &__nvoc_up_thunk_RsResource_i2capiCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__i2capiIsDuplicate__ = &__nvoc_up_thunk_RsResource_i2capiIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__i2capiPreDestruct__ = &__nvoc_up_thunk_RsResource_i2capiPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__i2capiControlFilter__ = &__nvoc_up_thunk_RsResource_i2capiControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__i2capiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_i2capiIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__i2capiMapTo__ = &__nvoc_up_thunk_RsResource_i2capiMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__i2capiUnmapFrom__ = &__nvoc_up_thunk_RsResource_i2capiUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__i2capiGetRefCount__ = &__nvoc_up_thunk_RsResource_i2capiGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__i2capiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_i2capiAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (i2capi) this + + // Initialize vtable(s) with 5 per-object function pointer(s). __nvoc_init_funcTable_I2cApi_1(pThis); } diff --git a/src/nvidia/generated/g_i2c_api_nvoc.h b/src/nvidia/generated/g_i2c_api_nvoc.h index e44a2ea1c3..4aa0bb5f2e 100644 --- a/src/nvidia/generated/g_i2c_api_nvoc.h +++ b/src/nvidia/generated/g_i2c_api_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -60,10 +60,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__I2cApi; + + struct I2cApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__I2cApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -76,12 +81,19 @@ struct I2cApi { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct I2cApi *__nvoc_pbase_I2cApi; // i2capi - // Vtable with 30 per-object function pointers + // Vtable with 5 per-object function pointers NV_STATUS (*__i2capiCtrlCmdI2cGetPortInfo__)(struct I2cApi * /*this*/, NV402C_CTRL_I2C_GET_PORT_INFO_PARAMS *); // exported (id=0x402c0101) NV_STATUS (*__i2capiCtrlCmdI2cIndexed__)(struct I2cApi * /*this*/, NV402C_CTRL_I2C_INDEXED_PARAMS *); // exported (id=0x402c0102) NV_STATUS (*__i2capiCtrlCmdI2cGetPortSpeed__)(struct I2cApi * /*this*/, NV402C_CTRL_I2C_GET_PORT_SPEED_PARAMS *); // exported (id=0x402c0103) NV_STATUS (*__i2capiCtrlCmdI2cTableGetDevInfo__)(struct I2cApi * /*this*/, NV402C_CTRL_I2C_TABLE_GET_DEV_INFO_PARAMS *); // exported (id=0x402c0104) NV_STATUS (*__i2capiCtrlCmdI2cTransaction__)(struct I2cApi * /*this*/, NV402C_CTRL_I2C_TRANSACTION_PARAMS *); // exported (id=0x402c0105) +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__I2cApi { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + NV_STATUS (*__i2capiControl__)(struct I2cApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__i2capiMap__)(struct I2cApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__i2capiUnmap__)(struct I2cApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -149,55 +161,55 @@ NV_STATUS __nvoc_objCreate_I2cApi(I2cApi**, Dynamic*, NvU32, struct CALL_CONTEXT #define i2capiCtrlCmdI2cTableGetDevInfo(pI2cApi, pParams) i2capiCtrlCmdI2cTableGetDevInfo_DISPATCH(pI2cApi, pParams) #define i2capiCtrlCmdI2cTransaction_FNPTR(pI2cApi) pI2cApi->__i2capiCtrlCmdI2cTransaction__ #define i2capiCtrlCmdI2cTransaction(pI2cApi, pParams) i2capiCtrlCmdI2cTransaction_DISPATCH(pI2cApi, pParams) -#define i2capiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define i2capiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define i2capiControl(pGpuResource, pCallContext, pParams) i2capiControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define i2capiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define i2capiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define i2capiMap(pGpuResource, pCallContext, pParams, pCpuMapping) i2capiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define i2capiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define i2capiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define i2capiUnmap(pGpuResource, pCallContext, pCpuMapping) i2capiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define i2capiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define i2capiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define i2capiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) i2capiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define i2capiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define i2capiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define i2capiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) i2capiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define i2capiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define i2capiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define i2capiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) i2capiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define i2capiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define i2capiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define i2capiInternalControlForward(pGpuResource, command, pParams, size) i2capiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define i2capiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define i2capiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define i2capiGetInternalObjectHandle(pGpuResource) i2capiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define i2capiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define i2capiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define i2capiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) i2capiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define i2capiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define i2capiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define i2capiGetMemInterMapParams(pRmResource, pParams) i2capiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define i2capiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define i2capiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define i2capiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) i2capiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define i2capiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define i2capiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define i2capiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) i2capiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define i2capiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define i2capiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define i2capiControlSerialization_Prologue(pResource, pCallContext, pParams) i2capiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define i2capiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define i2capiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define i2capiControlSerialization_Epilogue(pResource, pCallContext, pParams) i2capiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define i2capiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define i2capiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define i2capiControl_Prologue(pResource, pCallContext, pParams) i2capiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define i2capiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define i2capiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define i2capiControl_Epilogue(pResource, pCallContext, pParams) i2capiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define i2capiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define i2capiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define i2capiCanCopy(pResource) i2capiCanCopy_DISPATCH(pResource) -#define i2capiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define i2capiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define i2capiIsDuplicate(pResource, hMemory, pDuplicate) i2capiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define i2capiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define i2capiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define i2capiPreDestruct(pResource) i2capiPreDestruct_DISPATCH(pResource) -#define i2capiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define i2capiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define i2capiControlFilter(pResource, pCallContext, pParams) i2capiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define i2capiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define i2capiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define i2capiIsPartialUnmapSupported(pResource) i2capiIsPartialUnmapSupported_DISPATCH(pResource) -#define i2capiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define i2capiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define i2capiMapTo(pResource, pParams) i2capiMapTo_DISPATCH(pResource, pParams) -#define i2capiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define i2capiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define i2capiUnmapFrom(pResource, pParams) i2capiUnmapFrom_DISPATCH(pResource, pParams) -#define i2capiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define i2capiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define i2capiGetRefCount(pResource) i2capiGetRefCount_DISPATCH(pResource) -#define i2capiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define i2capiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define i2capiAddAdditionalDependants(pClient, pResource, pReference) i2capiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions @@ -222,103 +234,103 @@ static inline NV_STATUS i2capiCtrlCmdI2cTransaction_DISPATCH(struct I2cApi *pI2c } static inline NV_STATUS i2capiControl_DISPATCH(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__i2capiControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__i2capiControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS i2capiMap_DISPATCH(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__i2capiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__i2capiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS i2capiUnmap_DISPATCH(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__i2capiUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__i2capiUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool i2capiShareCallback_DISPATCH(struct I2cApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__i2capiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__i2capiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS i2capiGetRegBaseOffsetAndSize_DISPATCH(struct I2cApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__i2capiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__i2capiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS i2capiGetMapAddrSpace_DISPATCH(struct I2cApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__i2capiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__i2capiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS i2capiInternalControlForward_DISPATCH(struct I2cApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__i2capiInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__i2capiInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle i2capiGetInternalObjectHandle_DISPATCH(struct I2cApi *pGpuResource) { - return pGpuResource->__i2capiGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__i2capiGetInternalObjectHandle__(pGpuResource); } static inline NvBool i2capiAccessCallback_DISPATCH(struct I2cApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__i2capiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__i2capiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS i2capiGetMemInterMapParams_DISPATCH(struct I2cApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__i2capiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__i2capiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS i2capiCheckMemInterUnmap_DISPATCH(struct I2cApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__i2capiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__i2capiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS i2capiGetMemoryMappingDescriptor_DISPATCH(struct I2cApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__i2capiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__i2capiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS i2capiControlSerialization_Prologue_DISPATCH(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__i2capiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__i2capiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void i2capiControlSerialization_Epilogue_DISPATCH(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__i2capiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__i2capiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS i2capiControl_Prologue_DISPATCH(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__i2capiControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__i2capiControl_Prologue__(pResource, pCallContext, pParams); } static inline void i2capiControl_Epilogue_DISPATCH(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__i2capiControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__i2capiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool i2capiCanCopy_DISPATCH(struct I2cApi *pResource) { - return pResource->__i2capiCanCopy__(pResource); + return pResource->__nvoc_vtable->__i2capiCanCopy__(pResource); } static inline NV_STATUS i2capiIsDuplicate_DISPATCH(struct I2cApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__i2capiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__i2capiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void i2capiPreDestruct_DISPATCH(struct I2cApi *pResource) { - pResource->__i2capiPreDestruct__(pResource); + pResource->__nvoc_vtable->__i2capiPreDestruct__(pResource); } static inline NV_STATUS i2capiControlFilter_DISPATCH(struct I2cApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__i2capiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__i2capiControlFilter__(pResource, pCallContext, pParams); } static inline NvBool i2capiIsPartialUnmapSupported_DISPATCH(struct I2cApi *pResource) { - return pResource->__i2capiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__i2capiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS i2capiMapTo_DISPATCH(struct I2cApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__i2capiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__i2capiMapTo__(pResource, pParams); } static inline NV_STATUS i2capiUnmapFrom_DISPATCH(struct I2cApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__i2capiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__i2capiUnmapFrom__(pResource, pParams); } static inline NvU32 i2capiGetRefCount_DISPATCH(struct I2cApi *pResource) { - return pResource->__i2capiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__i2capiGetRefCount__(pResource); } static inline void i2capiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct I2cApi *pResource, RsResourceRef *pReference) { - pResource->__i2capiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__i2capiAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS i2capiCtrlCmdI2cGetPortInfo_IMPL(struct I2cApi *pI2cApi, NV402C_CTRL_I2C_GET_PORT_INFO_PARAMS *pParams); diff --git a/src/nvidia/generated/g_imex_session_api_nvoc.c b/src/nvidia/generated/g_imex_session_api_nvoc.c index d5117240ad..c1f8ff3608 100644 --- a/src/nvidia/generated/g_imex_session_api_nvoc.c +++ b/src/nvidia/generated/g_imex_session_api_nvoc.c @@ -138,110 +138,153 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ImexSess }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_RmResource_imexsessionapiAccessCallback(struct ImexSessionApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_imexsessionapiShareCallback(struct ImexSessionApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_imexsessionapiGetMemInterMapParams(struct ImexSessionApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_imexsessionapiCheckMemInterUnmap(struct ImexSessionApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_imexsessionapiGetMemoryMappingDescriptor(struct ImexSessionApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_imexsessionapiControlSerialization_Prologue(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_imexsessionapiControlSerialization_Epilogue(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_imexsessionapiControl_Prologue(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_imexsessionapiControl_Epilogue(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_imexsessionapiCanCopy(struct ImexSessionApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiIsDuplicate(struct ImexSessionApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_imexsessionapiPreDestruct(struct ImexSessionApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiControl(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiControlFilter(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiMap(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiUnmap(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_imexsessionapiIsPartialUnmapSupported(struct ImexSessionApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiMapTo(struct ImexSessionApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiUnmapFrom(struct ImexSessionApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_imexsessionapiGetRefCount(struct ImexSessionApi *pResource); // this +void __nvoc_up_thunk_RsResource_imexsessionapiAddAdditionalDependants(struct RsClient *pClient, struct ImexSessionApi *pResource, RsResourceRef *pReference); // this + // 21 up-thunk(s) defined to bridge methods in ImexSessionApi to superclasses // imexsessionapiAccessCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_imexsessionapiAccessCallback(struct ImexSessionApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_imexsessionapiAccessCallback(struct ImexSessionApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // imexsessionapiShareCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_imexsessionapiShareCallback(struct ImexSessionApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_imexsessionapiShareCallback(struct ImexSessionApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // imexsessionapiGetMemInterMapParams: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_imexsessionapiGetMemInterMapParams(struct ImexSessionApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_imexsessionapiGetMemInterMapParams(struct ImexSessionApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), pParams); } // imexsessionapiCheckMemInterUnmap: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_imexsessionapiCheckMemInterUnmap(struct ImexSessionApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_imexsessionapiCheckMemInterUnmap(struct ImexSessionApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), bSubdeviceHandleProvided); } // imexsessionapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_imexsessionapiGetMemoryMappingDescriptor(struct ImexSessionApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_imexsessionapiGetMemoryMappingDescriptor(struct ImexSessionApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), ppMemDesc); } // imexsessionapiControlSerialization_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_imexsessionapiControlSerialization_Prologue(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_imexsessionapiControlSerialization_Prologue(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), pCallContext, pParams); } // imexsessionapiControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_imexsessionapiControlSerialization_Epilogue(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_imexsessionapiControlSerialization_Epilogue(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), pCallContext, pParams); } // imexsessionapiControl_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_imexsessionapiControl_Prologue(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_imexsessionapiControl_Prologue(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), pCallContext, pParams); } // imexsessionapiControl_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_imexsessionapiControl_Epilogue(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_imexsessionapiControl_Epilogue(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RmResource.offset), pCallContext, pParams); } // imexsessionapiCanCopy: virtual inherited (res) base (rmres) -static NvBool __nvoc_up_thunk_RsResource_imexsessionapiCanCopy(struct ImexSessionApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_imexsessionapiCanCopy(struct ImexSessionApi *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset)); } // imexsessionapiIsDuplicate: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiIsDuplicate(struct ImexSessionApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiIsDuplicate(struct ImexSessionApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), hMemory, pDuplicate); } // imexsessionapiPreDestruct: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_imexsessionapiPreDestruct(struct ImexSessionApi *pResource) { +void __nvoc_up_thunk_RsResource_imexsessionapiPreDestruct(struct ImexSessionApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset)); } // imexsessionapiControl: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiControl(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiControl(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), pCallContext, pParams); } // imexsessionapiControlFilter: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiControlFilter(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiControlFilter(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), pCallContext, pParams); } // imexsessionapiMap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiMap(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiMap(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), pCallContext, pParams, pCpuMapping); } // imexsessionapiUnmap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiUnmap(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiUnmap(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), pCallContext, pCpuMapping); } // imexsessionapiIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body -static NvBool __nvoc_up_thunk_RsResource_imexsessionapiIsPartialUnmapSupported(struct ImexSessionApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_imexsessionapiIsPartialUnmapSupported(struct ImexSessionApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset)); } // imexsessionapiMapTo: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiMapTo(struct ImexSessionApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiMapTo(struct ImexSessionApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), pParams); } // imexsessionapiUnmapFrom: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiUnmapFrom(struct ImexSessionApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_imexsessionapiUnmapFrom(struct ImexSessionApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), pParams); } // imexsessionapiGetRefCount: virtual inherited (res) base (rmres) -static NvU32 __nvoc_up_thunk_RsResource_imexsessionapiGetRefCount(struct ImexSessionApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_imexsessionapiGetRefCount(struct ImexSessionApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset)); } // imexsessionapiAddAdditionalDependants: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_imexsessionapiAddAdditionalDependants(struct RsClient *pClient, struct ImexSessionApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_imexsessionapiAddAdditionalDependants(struct RsClient *pClient, struct ImexSessionApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ImexSessionApi_RsResource.offset), pReference); } @@ -300,76 +343,88 @@ static void __nvoc_init_funcTable_ImexSessionApi_1(ImexSessionApi *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__imexsessionapiCtrlCmdDisableImporters__ = &imexsessionapiCtrlCmdDisableImporters_IMPL; #endif - - // imexsessionapiAccessCallback -- virtual inherited (rmres) base (rmres) - pThis->__imexsessionapiAccessCallback__ = &__nvoc_up_thunk_RmResource_imexsessionapiAccessCallback; - - // imexsessionapiShareCallback -- virtual inherited (rmres) base (rmres) - pThis->__imexsessionapiShareCallback__ = &__nvoc_up_thunk_RmResource_imexsessionapiShareCallback; - - // imexsessionapiGetMemInterMapParams -- virtual inherited (rmres) base (rmres) - pThis->__imexsessionapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_imexsessionapiGetMemInterMapParams; - - // imexsessionapiCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) - pThis->__imexsessionapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_imexsessionapiCheckMemInterUnmap; - - // imexsessionapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) - pThis->__imexsessionapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_imexsessionapiGetMemoryMappingDescriptor; - - // imexsessionapiControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__imexsessionapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_imexsessionapiControlSerialization_Prologue; - - // imexsessionapiControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__imexsessionapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_imexsessionapiControlSerialization_Epilogue; - - // imexsessionapiControl_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__imexsessionapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_imexsessionapiControl_Prologue; - - // imexsessionapiControl_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__imexsessionapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_imexsessionapiControl_Epilogue; - - // imexsessionapiCanCopy -- virtual inherited (res) base (rmres) - pThis->__imexsessionapiCanCopy__ = &__nvoc_up_thunk_RsResource_imexsessionapiCanCopy; - - // imexsessionapiIsDuplicate -- virtual inherited (res) base (rmres) - pThis->__imexsessionapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_imexsessionapiIsDuplicate; - - // imexsessionapiPreDestruct -- virtual inherited (res) base (rmres) - pThis->__imexsessionapiPreDestruct__ = &__nvoc_up_thunk_RsResource_imexsessionapiPreDestruct; - - // imexsessionapiControl -- virtual inherited (res) base (rmres) - pThis->__imexsessionapiControl__ = &__nvoc_up_thunk_RsResource_imexsessionapiControl; - - // imexsessionapiControlFilter -- virtual inherited (res) base (rmres) - pThis->__imexsessionapiControlFilter__ = &__nvoc_up_thunk_RsResource_imexsessionapiControlFilter; - - // imexsessionapiMap -- virtual inherited (res) base (rmres) - pThis->__imexsessionapiMap__ = &__nvoc_up_thunk_RsResource_imexsessionapiMap; - - // imexsessionapiUnmap -- virtual inherited (res) base (rmres) - pThis->__imexsessionapiUnmap__ = &__nvoc_up_thunk_RsResource_imexsessionapiUnmap; - - // imexsessionapiIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body - pThis->__imexsessionapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_imexsessionapiIsPartialUnmapSupported; - - // imexsessionapiMapTo -- virtual inherited (res) base (rmres) - pThis->__imexsessionapiMapTo__ = &__nvoc_up_thunk_RsResource_imexsessionapiMapTo; - - // imexsessionapiUnmapFrom -- virtual inherited (res) base (rmres) - pThis->__imexsessionapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_imexsessionapiUnmapFrom; - - // imexsessionapiGetRefCount -- virtual inherited (res) base (rmres) - pThis->__imexsessionapiGetRefCount__ = &__nvoc_up_thunk_RsResource_imexsessionapiGetRefCount; - - // imexsessionapiAddAdditionalDependants -- virtual inherited (res) base (rmres) - pThis->__imexsessionapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_imexsessionapiAddAdditionalDependants; -} // End __nvoc_init_funcTable_ImexSessionApi_1 with approximately 24 basic block(s). +} // End __nvoc_init_funcTable_ImexSessionApi_1 with approximately 3 basic block(s). // Initialize vtable(s) for 24 virtual method(s). void __nvoc_init_funcTable_ImexSessionApi(ImexSessionApi *pThis) { - // Initialize vtable(s) with 24 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__ImexSessionApi vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__imexsessionapiAccessCallback__ = &__nvoc_up_thunk_RmResource_imexsessionapiAccessCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__imexsessionapiShareCallback__ = &__nvoc_up_thunk_RmResource_imexsessionapiShareCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__imexsessionapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_imexsessionapiGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__imexsessionapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_imexsessionapiCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__imexsessionapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_imexsessionapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__imexsessionapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_imexsessionapiControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__imexsessionapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_imexsessionapiControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__imexsessionapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_imexsessionapiControl_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__imexsessionapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_imexsessionapiControl_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__imexsessionapiCanCopy__ = &__nvoc_up_thunk_RsResource_imexsessionapiCanCopy, // virtual inherited (res) base (rmres) + .RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__imexsessionapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_imexsessionapiIsDuplicate, // virtual inherited (res) base (rmres) + .RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__imexsessionapiPreDestruct__ = &__nvoc_up_thunk_RsResource_imexsessionapiPreDestruct, // virtual inherited (res) base (rmres) + .RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__imexsessionapiControl__ = &__nvoc_up_thunk_RsResource_imexsessionapiControl, // virtual inherited (res) base (rmres) + .RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControl__ = &resControl_IMPL, // virtual + .__imexsessionapiControlFilter__ = &__nvoc_up_thunk_RsResource_imexsessionapiControlFilter, // virtual inherited (res) base (rmres) + .RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__imexsessionapiMap__ = &__nvoc_up_thunk_RsResource_imexsessionapiMap, // virtual inherited (res) base (rmres) + .RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMap__ = &resMap_IMPL, // virtual + .__imexsessionapiUnmap__ = &__nvoc_up_thunk_RsResource_imexsessionapiUnmap, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__imexsessionapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_imexsessionapiIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__imexsessionapiMapTo__ = &__nvoc_up_thunk_RsResource_imexsessionapiMapTo, // virtual inherited (res) base (rmres) + .RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__imexsessionapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_imexsessionapiUnmapFrom, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__imexsessionapiGetRefCount__ = &__nvoc_up_thunk_RsResource_imexsessionapiGetRefCount, // virtual inherited (res) base (rmres) + .RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__imexsessionapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_imexsessionapiAddAdditionalDependants, // virtual inherited (res) base (rmres) + .RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.RmResource.RsResource; // (res) super^2 + pThis->__nvoc_base_RmResource.__nvoc_vtable = &vtable.RmResource; // (rmres) super + pThis->__nvoc_vtable = &vtable; // (imexsessionapi) this + + // Initialize vtable(s) with 3 per-object function pointer(s). __nvoc_init_funcTable_ImexSessionApi_1(pThis); } diff --git a/src/nvidia/generated/g_imex_session_api_nvoc.h b/src/nvidia/generated/g_imex_session_api_nvoc.h index 4464467a1c..58d0c229f9 100644 --- a/src/nvidia/generated/g_imex_session_api_nvoc.h +++ b/src/nvidia/generated/g_imex_session_api_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -82,10 +82,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__ImexSessionApi; + + struct ImexSessionApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__ImexSessionApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; @@ -97,10 +102,21 @@ struct ImexSessionApi { struct RmResource *__nvoc_pbase_RmResource; // rmres super struct ImexSessionApi *__nvoc_pbase_ImexSessionApi; // imexsessionapi - // Vtable with 24 per-object function pointers + // Vtable with 3 per-object function pointers NV_STATUS (*__imexsessionapiCtrlCmdGetFabricEvents__)(struct ImexSessionApi * /*this*/, NV00F1_CTRL_GET_FABRIC_EVENTS_PARAMS *); // exported (id=0xf10001) NV_STATUS (*__imexsessionapiCtrlCmdFinishMemUnimport__)(struct ImexSessionApi * /*this*/, NV00F1_CTRL_FINISH_MEM_UNIMPORT_PARAMS *); // exported (id=0xf10002) NV_STATUS (*__imexsessionapiCtrlCmdDisableImporters__)(struct ImexSessionApi * /*this*/, NV00F1_CTRL_DISABLE_IMPORTERS_PARAMS *); // exported (id=0xf10003) + + // Data members + NvU64 dupedCapDescriptor; + NvU32 PRIVATE_FIELD(flags); +}; + + +// Metadata including vtable with 21 function pointers plus superclass metadata +struct NVOC_VTABLE__ImexSessionApi { + const struct NVOC_VTABLE__RmResource RmResource; // (rmres) 21 function pointers + NvBool (*__imexsessionapiAccessCallback__)(struct ImexSessionApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) NvBool (*__imexsessionapiShareCallback__)(struct ImexSessionApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) NV_STATUS (*__imexsessionapiGetMemInterMapParams__)(struct ImexSessionApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) @@ -122,10 +138,6 @@ struct ImexSessionApi { NV_STATUS (*__imexsessionapiUnmapFrom__)(struct ImexSessionApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) NvU32 (*__imexsessionapiGetRefCount__)(struct ImexSessionApi * /*this*/); // virtual inherited (res) base (rmres) void (*__imexsessionapiAddAdditionalDependants__)(struct RsClient *, struct ImexSessionApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) - - // Data members - NvU64 dupedCapDescriptor; - NvU32 PRIVATE_FIELD(flags); }; #ifndef __NVOC_CLASS_ImexSessionApi_TYPEDEF__ @@ -164,47 +176,47 @@ NV_STATUS __nvoc_objCreate_ImexSessionApi(ImexSessionApi**, Dynamic*, NvU32, str #define imexsessionapiCtrlCmdFinishMemUnimport(pImexSessionApi, pParams) imexsessionapiCtrlCmdFinishMemUnimport_DISPATCH(pImexSessionApi, pParams) #define imexsessionapiCtrlCmdDisableImporters_FNPTR(pImexSessionApi) pImexSessionApi->__imexsessionapiCtrlCmdDisableImporters__ #define imexsessionapiCtrlCmdDisableImporters(pImexSessionApi, pParams) imexsessionapiCtrlCmdDisableImporters_DISPATCH(pImexSessionApi, pParams) -#define imexsessionapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define imexsessionapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define imexsessionapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) imexsessionapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define imexsessionapiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ +#define imexsessionapiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define imexsessionapiShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) imexsessionapiShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define imexsessionapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define imexsessionapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define imexsessionapiGetMemInterMapParams(pRmResource, pParams) imexsessionapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define imexsessionapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define imexsessionapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define imexsessionapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) imexsessionapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define imexsessionapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define imexsessionapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define imexsessionapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) imexsessionapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define imexsessionapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define imexsessionapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define imexsessionapiControlSerialization_Prologue(pResource, pCallContext, pParams) imexsessionapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define imexsessionapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define imexsessionapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define imexsessionapiControlSerialization_Epilogue(pResource, pCallContext, pParams) imexsessionapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define imexsessionapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ +#define imexsessionapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define imexsessionapiControl_Prologue(pResource, pCallContext, pParams) imexsessionapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define imexsessionapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define imexsessionapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define imexsessionapiControl_Epilogue(pResource, pCallContext, pParams) imexsessionapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define imexsessionapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define imexsessionapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define imexsessionapiCanCopy(pResource) imexsessionapiCanCopy_DISPATCH(pResource) -#define imexsessionapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define imexsessionapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define imexsessionapiIsDuplicate(pResource, hMemory, pDuplicate) imexsessionapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define imexsessionapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define imexsessionapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define imexsessionapiPreDestruct(pResource) imexsessionapiPreDestruct_DISPATCH(pResource) -#define imexsessionapiControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define imexsessionapiControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControl__ #define imexsessionapiControl(pResource, pCallContext, pParams) imexsessionapiControl_DISPATCH(pResource, pCallContext, pParams) -#define imexsessionapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define imexsessionapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define imexsessionapiControlFilter(pResource, pCallContext, pParams) imexsessionapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define imexsessionapiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define imexsessionapiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define imexsessionapiMap(pResource, pCallContext, pParams, pCpuMapping) imexsessionapiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define imexsessionapiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define imexsessionapiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define imexsessionapiUnmap(pResource, pCallContext, pCpuMapping) imexsessionapiUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define imexsessionapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define imexsessionapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define imexsessionapiIsPartialUnmapSupported(pResource) imexsessionapiIsPartialUnmapSupported_DISPATCH(pResource) -#define imexsessionapiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define imexsessionapiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define imexsessionapiMapTo(pResource, pParams) imexsessionapiMapTo_DISPATCH(pResource, pParams) -#define imexsessionapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define imexsessionapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define imexsessionapiUnmapFrom(pResource, pParams) imexsessionapiUnmapFrom_DISPATCH(pResource, pParams) -#define imexsessionapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define imexsessionapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define imexsessionapiGetRefCount(pResource) imexsessionapiGetRefCount_DISPATCH(pResource) -#define imexsessionapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define imexsessionapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define imexsessionapiAddAdditionalDependants(pClient, pResource, pReference) imexsessionapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions @@ -221,87 +233,87 @@ static inline NV_STATUS imexsessionapiCtrlCmdDisableImporters_DISPATCH(struct Im } static inline NvBool imexsessionapiAccessCallback_DISPATCH(struct ImexSessionApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__imexsessionapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__imexsessionapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool imexsessionapiShareCallback_DISPATCH(struct ImexSessionApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__imexsessionapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__imexsessionapiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS imexsessionapiGetMemInterMapParams_DISPATCH(struct ImexSessionApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__imexsessionapiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__imexsessionapiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS imexsessionapiCheckMemInterUnmap_DISPATCH(struct ImexSessionApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__imexsessionapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__imexsessionapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS imexsessionapiGetMemoryMappingDescriptor_DISPATCH(struct ImexSessionApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__imexsessionapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__imexsessionapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS imexsessionapiControlSerialization_Prologue_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__imexsessionapiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__imexsessionapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void imexsessionapiControlSerialization_Epilogue_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__imexsessionapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__imexsessionapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS imexsessionapiControl_Prologue_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__imexsessionapiControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__imexsessionapiControl_Prologue__(pResource, pCallContext, pParams); } static inline void imexsessionapiControl_Epilogue_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__imexsessionapiControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__imexsessionapiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool imexsessionapiCanCopy_DISPATCH(struct ImexSessionApi *pResource) { - return pResource->__imexsessionapiCanCopy__(pResource); + return pResource->__nvoc_vtable->__imexsessionapiCanCopy__(pResource); } static inline NV_STATUS imexsessionapiIsDuplicate_DISPATCH(struct ImexSessionApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__imexsessionapiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__imexsessionapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void imexsessionapiPreDestruct_DISPATCH(struct ImexSessionApi *pResource) { - pResource->__imexsessionapiPreDestruct__(pResource); + pResource->__nvoc_vtable->__imexsessionapiPreDestruct__(pResource); } static inline NV_STATUS imexsessionapiControl_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__imexsessionapiControl__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__imexsessionapiControl__(pResource, pCallContext, pParams); } static inline NV_STATUS imexsessionapiControlFilter_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__imexsessionapiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__imexsessionapiControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS imexsessionapiMap_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__imexsessionapiMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__imexsessionapiMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS imexsessionapiUnmap_DISPATCH(struct ImexSessionApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__imexsessionapiUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__imexsessionapiUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool imexsessionapiIsPartialUnmapSupported_DISPATCH(struct ImexSessionApi *pResource) { - return pResource->__imexsessionapiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__imexsessionapiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS imexsessionapiMapTo_DISPATCH(struct ImexSessionApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__imexsessionapiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__imexsessionapiMapTo__(pResource, pParams); } static inline NV_STATUS imexsessionapiUnmapFrom_DISPATCH(struct ImexSessionApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__imexsessionapiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__imexsessionapiUnmapFrom__(pResource, pParams); } static inline NvU32 imexsessionapiGetRefCount_DISPATCH(struct ImexSessionApi *pResource) { - return pResource->__imexsessionapiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__imexsessionapiGetRefCount__(pResource); } static inline void imexsessionapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ImexSessionApi *pResource, RsResourceRef *pReference) { - pResource->__imexsessionapiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__imexsessionapiAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS imexsessionapiCtrlCmdGetFabricEvents_IMPL(struct ImexSessionApi *pImexSessionApi, NV00F1_CTRL_GET_FABRIC_EVENTS_PARAMS *pParams); diff --git a/src/nvidia/generated/g_intr_nvoc.c b/src/nvidia/generated/g_intr_nvoc.c index e563e879cf..2827163dcc 100644 --- a/src/nvidia/generated/g_intr_nvoc.c +++ b/src/nvidia/generated/g_intr_nvoc.c @@ -66,78 +66,96 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_Intr = /*pExportInfo=*/ &__nvoc_export_info_Intr }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_Intr_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pIntr, ENGDESCRIPTOR arg3); // this +NV_STATUS __nvoc_down_thunk_Intr_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pIntr); // this +NV_STATUS __nvoc_down_thunk_Intr_engstateStateInitUnlocked(OBJGPU *pGpu, struct OBJENGSTATE *pIntr); // this +NV_STATUS __nvoc_down_thunk_Intr_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pIntr); // this +void __nvoc_down_thunk_Intr_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pIntr); // this +NV_STATUS __nvoc_down_thunk_Intr_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pIntr, NvU32 arg3); // this +NV_STATUS __nvoc_down_thunk_Intr_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pIntr, NvU32 arg3); // this + // 7 down-thunk(s) defined to bridge methods in Intr from superclasses // intrConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_Intr_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pIntr, ENGDESCRIPTOR arg3) { +NV_STATUS __nvoc_down_thunk_Intr_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pIntr, ENGDESCRIPTOR arg3) { return intrConstructEngine(pGpu, (struct Intr *)(((unsigned char *) pIntr) - __nvoc_rtti_Intr_OBJENGSTATE.offset), arg3); } // intrStatePreInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_Intr_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pIntr) { +NV_STATUS __nvoc_down_thunk_Intr_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pIntr) { return intrStatePreInitLocked(pGpu, (struct Intr *)(((unsigned char *) pIntr) - __nvoc_rtti_Intr_OBJENGSTATE.offset)); } // intrStateInitUnlocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_Intr_engstateStateInitUnlocked(OBJGPU *pGpu, struct OBJENGSTATE *pIntr) { +NV_STATUS __nvoc_down_thunk_Intr_engstateStateInitUnlocked(OBJGPU *pGpu, struct OBJENGSTATE *pIntr) { return intrStateInitUnlocked(pGpu, (struct Intr *)(((unsigned char *) pIntr) - __nvoc_rtti_Intr_OBJENGSTATE.offset)); } // intrStateInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_Intr_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pIntr) { +NV_STATUS __nvoc_down_thunk_Intr_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pIntr) { return intrStateInitLocked(pGpu, (struct Intr *)(((unsigned char *) pIntr) - __nvoc_rtti_Intr_OBJENGSTATE.offset)); } // intrStateDestroy: virtual override (engstate) base (engstate) -static void __nvoc_down_thunk_Intr_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pIntr) { +void __nvoc_down_thunk_Intr_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pIntr) { intrStateDestroy(pGpu, (struct Intr *)(((unsigned char *) pIntr) - __nvoc_rtti_Intr_OBJENGSTATE.offset)); } // intrStateLoad: virtual halified (singleton optimized) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_Intr_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pIntr, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_Intr_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pIntr, NvU32 arg3) { return intrStateLoad(pGpu, (struct Intr *)(((unsigned char *) pIntr) - __nvoc_rtti_Intr_OBJENGSTATE.offset), arg3); } // intrStateUnload: virtual halified (singleton optimized) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_Intr_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pIntr, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_Intr_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pIntr, NvU32 arg3) { return intrStateUnload(pGpu, (struct Intr *)(((unsigned char *) pIntr) - __nvoc_rtti_Intr_OBJENGSTATE.offset), arg3); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_intrInitMissing(struct OBJGPU *pGpu, struct Intr *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_intrStatePreInitUnlocked(struct OBJGPU *pGpu, struct Intr *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_intrStatePreLoad(struct OBJGPU *pGpu, struct Intr *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_intrStatePostLoad(struct OBJGPU *pGpu, struct Intr *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_intrStatePreUnload(struct OBJGPU *pGpu, struct Intr *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_intrStatePostUnload(struct OBJGPU *pGpu, struct Intr *pEngstate, NvU32 arg3); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_intrIsPresent(struct OBJGPU *pGpu, struct Intr *pEngstate); // this + // 7 up-thunk(s) defined to bridge methods in Intr to superclasses // intrInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_intrInitMissing(struct OBJGPU *pGpu, struct Intr *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_intrInitMissing(struct OBJGPU *pGpu, struct Intr *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_Intr_OBJENGSTATE.offset)); } // intrStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_intrStatePreInitUnlocked(struct OBJGPU *pGpu, struct Intr *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_intrStatePreInitUnlocked(struct OBJGPU *pGpu, struct Intr *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_Intr_OBJENGSTATE.offset)); } // intrStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_intrStatePreLoad(struct OBJGPU *pGpu, struct Intr *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_intrStatePreLoad(struct OBJGPU *pGpu, struct Intr *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_Intr_OBJENGSTATE.offset), arg3); } // intrStatePostLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_intrStatePostLoad(struct OBJGPU *pGpu, struct Intr *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_intrStatePostLoad(struct OBJGPU *pGpu, struct Intr *pEngstate, NvU32 arg3) { return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_Intr_OBJENGSTATE.offset), arg3); } // intrStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_intrStatePreUnload(struct OBJGPU *pGpu, struct Intr *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_intrStatePreUnload(struct OBJGPU *pGpu, struct Intr *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_Intr_OBJENGSTATE.offset), arg3); } // intrStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_intrStatePostUnload(struct OBJGPU *pGpu, struct Intr *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_intrStatePostUnload(struct OBJGPU *pGpu, struct Intr *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_Intr_OBJENGSTATE.offset), arg3); } // intrIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_intrIsPresent(struct OBJGPU *pGpu, struct Intr *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_intrIsPresent(struct OBJGPU *pGpu, struct Intr *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_Intr_OBJENGSTATE.offset)); } @@ -170,62 +188,62 @@ void __nvoc_init_dataField_Intr(Intr *pThis, RmHalspecOwner *pRmhalspecowner) { // NVOC Property Hal field -- PDB_PROP_INTR_HOST_DRIVEN_ENGINES_REMOVED_FROM_PMC if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_INTR_HOST_DRIVEN_ENGINES_REMOVED_FROM_PMC, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_INTR_HOST_DRIVEN_ENGINES_REMOVED_FROM_PMC, NV_TRUE); } // NVOC Property Hal field -- PDB_PROP_INTR_READ_ONLY_EVEN_NUMBERED_INTR_LEAF_REGS if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { - pThis->setProperty(pThis, PDB_PROP_INTR_READ_ONLY_EVEN_NUMBERED_INTR_LEAF_REGS, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_INTR_READ_ONLY_EVEN_NUMBERED_INTR_LEAF_REGS, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_INTR_READ_ONLY_EVEN_NUMBERED_INTR_LEAF_REGS, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_INTR_READ_ONLY_EVEN_NUMBERED_INTR_LEAF_REGS, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_INTR_ENUMERATIONS_ON_ENGINE_RESET if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ { - pThis->setProperty(pThis, PDB_PROP_INTR_ENUMERATIONS_ON_ENGINE_RESET, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_INTR_ENUMERATIONS_ON_ENGINE_RESET, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_INTR_ENUMERATIONS_ON_ENGINE_RESET, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_INTR_ENUMERATIONS_ON_ENGINE_RESET, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_INTR_SIMPLIFIED_VBLANK_HANDLING_FOR_CTRL_TREE if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_INTR_SIMPLIFIED_VBLANK_HANDLING_FOR_CTRL_TREE, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_INTR_SIMPLIFIED_VBLANK_HANDLING_FOR_CTRL_TREE, NV_TRUE); } // NVOC Property Hal field -- PDB_PROP_INTR_MASK_SUPPORTED if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_INTR_MASK_SUPPORTED, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_INTR_MASK_SUPPORTED, NV_TRUE); } // Hal field -- bDefaultNonstallNotify if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bDefaultNonstallNotify = ((NvBool)(0 == 0)); + pThis->bDefaultNonstallNotify = NV_TRUE; } // Hal field -- bUseLegacyVectorAssignment if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { - pThis->bUseLegacyVectorAssignment = ((NvBool)(0 != 0)); + pThis->bUseLegacyVectorAssignment = NV_FALSE; } else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ { - pThis->bUseLegacyVectorAssignment = ((NvBool)(0 != 0)); + pThis->bUseLegacyVectorAssignment = NV_FALSE; } // default else { - pThis->bUseLegacyVectorAssignment = ((NvBool)(0 == 0)); + pThis->bUseLegacyVectorAssignment = NV_TRUE; } } @@ -256,26 +274,6 @@ static void __nvoc_init_funcTable_Intr_1(Intr *pThis, RmHalspecOwner *pRmhalspec PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // intrConstructEngine -- virtual override (engstate) base (engstate) - pThis->__intrConstructEngine__ = &intrConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_Intr_engstateConstructEngine; - - // intrStatePreInitLocked -- virtual override (engstate) base (engstate) - pThis->__intrStatePreInitLocked__ = &intrStatePreInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_Intr_engstateStatePreInitLocked; - - // intrStateInitUnlocked -- virtual override (engstate) base (engstate) - pThis->__intrStateInitUnlocked__ = &intrStateInitUnlocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ = &__nvoc_down_thunk_Intr_engstateStateInitUnlocked; - - // intrStateInitLocked -- virtual override (engstate) base (engstate) - pThis->__intrStateInitLocked__ = &intrStateInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_Intr_engstateStateInitLocked; - - // intrStateDestroy -- virtual override (engstate) base (engstate) - pThis->__intrStateDestroy__ = &intrStateDestroy_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_Intr_engstateStateDestroy; - // intrDecodeStallIntrEn -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { @@ -417,14 +415,6 @@ static void __nvoc_init_funcTable_Intr_1(Intr *pThis, RmHalspecOwner *pRmhalspec pThis->__intrSanityCheckEngineIntrNotificationVector__ = &intrSanityCheckEngineIntrNotificationVector_b3696a; } - // intrStateLoad -- virtual halified (singleton optimized) override (engstate) base (engstate) body - pThis->__intrStateLoad__ = &intrStateLoad_TU102; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_Intr_engstateStateLoad; - - // intrStateUnload -- virtual halified (singleton optimized) override (engstate) base (engstate) body - pThis->__intrStateUnload__ = &intrStateUnload_TU102; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_Intr_engstateStateUnload; - // intrInitSubtreeMap -- halified (3 hals) body if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ && (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ )) { @@ -481,34 +471,49 @@ static void __nvoc_init_funcTable_Intr_1(Intr *pThis, RmHalspecOwner *pRmhalspec { pThis->__intrGetIntrEnFromHw__ = &intrGetIntrEnFromHw_b2b553; } - - // intrInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__intrInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_intrInitMissing; - - // intrStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__intrStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_intrStatePreInitUnlocked; - - // intrStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__intrStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_intrStatePreLoad; - - // intrStatePostLoad -- virtual inherited (engstate) base (engstate) - pThis->__intrStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_intrStatePostLoad; - - // intrStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__intrStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_intrStatePreUnload; - - // intrStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__intrStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_intrStatePostUnload; - - // intrIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__intrIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_intrIsPresent; -} // End __nvoc_init_funcTable_Intr_1 with approximately 60 basic block(s). +} // End __nvoc_init_funcTable_Intr_1 with approximately 39 basic block(s). // Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_Intr(Intr *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 32 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__Intr vtable = { + .__intrConstructEngine__ = &intrConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_Intr_engstateConstructEngine, // virtual + .__intrStatePreInitLocked__ = &intrStatePreInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_Intr_engstateStatePreInitLocked, // virtual + .__intrStateInitUnlocked__ = &intrStateInitUnlocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &__nvoc_down_thunk_Intr_engstateStateInitUnlocked, // virtual + .__intrStateInitLocked__ = &intrStateInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_Intr_engstateStateInitLocked, // virtual + .__intrStateDestroy__ = &intrStateDestroy_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_Intr_engstateStateDestroy, // virtual + .__intrStateLoad__ = &intrStateLoad_TU102, // virtual halified (singleton optimized) override (engstate) base (engstate) body + .OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_Intr_engstateStateLoad, // virtual + .__intrStateUnload__ = &intrStateUnload_TU102, // virtual halified (singleton optimized) override (engstate) base (engstate) body + .OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_Intr_engstateStateUnload, // virtual + .__intrInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_intrInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__intrStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_intrStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__intrStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_intrStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__intrStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_intrStatePostLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL, // virtual + .__intrStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_intrStatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__intrStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_intrStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__intrIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_intrIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_vtable = &vtable; // (intr) this + + // Initialize vtable(s) with 18 per-object function pointer(s). __nvoc_init_funcTable_Intr_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_intr_nvoc.h b/src/nvidia/generated/g_intr_nvoc.h index f2a74b3999..cc4d981177 100644 --- a/src/nvidia/generated/g_intr_nvoc.h +++ b/src/nvidia/generated/g_intr_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -271,10 +271,15 @@ typedef struct Device Device; #endif +// Metadata including vtable +struct NVOC_VTABLE__Intr; + + struct Intr { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__Intr *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -284,12 +289,7 @@ struct Intr { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct Intr *__nvoc_pbase_Intr; // intr - // Vtable with 32 per-object function pointers - NV_STATUS (*__intrConstructEngine__)(OBJGPU *, struct Intr * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) - NV_STATUS (*__intrStatePreInitLocked__)(OBJGPU *, struct Intr * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__intrStateInitUnlocked__)(OBJGPU *, struct Intr * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__intrStateInitLocked__)(OBJGPU *, struct Intr * /*this*/); // virtual override (engstate) base (engstate) - void (*__intrStateDestroy__)(OBJGPU *, struct Intr * /*this*/); // virtual override (engstate) base (engstate) + // Vtable with 18 per-object function pointers NvU32 (*__intrDecodeStallIntrEn__)(OBJGPU *, struct Intr * /*this*/, NvU32); // halified (2 hals) body void (*__intrServiceVirtual__)(OBJGPU *, struct Intr * /*this*/); // halified (2 hals) body NV_STATUS (*__intrTriggerPrivDoorbell__)(OBJGPU *, struct Intr * /*this*/, NvU32); // halified (2 hals) body @@ -303,20 +303,11 @@ struct Intr { NvU64 (*__intrGetIntrTopNonStallMask__)(OBJGPU *, struct Intr * /*this*/); // halified (2 hals) body void (*__intrSanityCheckEngineIntrStallVector__)(OBJGPU *, struct Intr * /*this*/, NvU32, NvU16); // halified (3 hals) body void (*__intrSanityCheckEngineIntrNotificationVector__)(OBJGPU *, struct Intr * /*this*/, NvU32, NvU16); // halified (3 hals) body - NV_STATUS (*__intrStateLoad__)(OBJGPU *, struct Intr * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body - NV_STATUS (*__intrStateUnload__)(OBJGPU *, struct Intr * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body NV_STATUS (*__intrInitSubtreeMap__)(OBJGPU *, struct Intr * /*this*/); // halified (3 hals) body NV_STATUS (*__intrInitInterruptTable__)(OBJGPU *, struct Intr * /*this*/); // halified (2 hals) NV_STATUS (*__intrSetIntrMask__)(OBJGPU *, struct Intr * /*this*/, union MC_ENGINE_BITVECTOR *, struct THREAD_STATE_NODE *); // halified (2 hals) body void (*__intrSetIntrEnInHw__)(OBJGPU *, struct Intr * /*this*/, NvU32, struct THREAD_STATE_NODE *); // halified (2 hals) body NvU32 (*__intrGetIntrEnFromHw__)(OBJGPU *, struct Intr * /*this*/, struct THREAD_STATE_NODE *); // halified (2 hals) body - void (*__intrInitMissing__)(struct OBJGPU *, struct Intr * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__intrStatePreInitUnlocked__)(struct OBJGPU *, struct Intr * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__intrStatePreLoad__)(struct OBJGPU *, struct Intr * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__intrStatePostLoad__)(struct OBJGPU *, struct Intr * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__intrStatePreUnload__)(struct OBJGPU *, struct Intr * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__intrStatePostUnload__)(struct OBJGPU *, struct Intr * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NvBool (*__intrIsPresent__)(struct OBJGPU *, struct Intr * /*this*/); // virtual inherited (engstate) base (engstate) // 8 PDB properties NvBool PDB_PROP_INTR_ENABLE_DETAILED_LOGS; @@ -358,6 +349,27 @@ struct Intr { NvU32 saveIntrEn0; }; + +// Metadata including vtable with 14 function pointers plus superclass metadata +struct NVOC_VTABLE__Intr { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + + NV_STATUS (*__intrConstructEngine__)(OBJGPU *, struct Intr * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__intrStatePreInitLocked__)(OBJGPU *, struct Intr * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__intrStateInitUnlocked__)(OBJGPU *, struct Intr * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__intrStateInitLocked__)(OBJGPU *, struct Intr * /*this*/); // virtual override (engstate) base (engstate) + void (*__intrStateDestroy__)(OBJGPU *, struct Intr * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__intrStateLoad__)(OBJGPU *, struct Intr * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__intrStateUnload__)(OBJGPU *, struct Intr * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + void (*__intrInitMissing__)(struct OBJGPU *, struct Intr * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__intrStatePreInitUnlocked__)(struct OBJGPU *, struct Intr * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__intrStatePreLoad__)(struct OBJGPU *, struct Intr * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__intrStatePostLoad__)(struct OBJGPU *, struct Intr * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__intrStatePreUnload__)(struct OBJGPU *, struct Intr * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__intrStatePostUnload__)(struct OBJGPU *, struct Intr * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__intrIsPresent__)(struct OBJGPU *, struct Intr * /*this*/); // virtual inherited (engstate) base (engstate) +}; + #ifndef __NVOC_CLASS_Intr_TYPEDEF__ #define __NVOC_CLASS_Intr_TYPEDEF__ typedef struct Intr Intr; @@ -408,15 +420,15 @@ NV_STATUS __nvoc_objCreate_Intr(Intr**, Dynamic*, NvU32); // Wrapper macros -#define intrConstructEngine_FNPTR(pIntr) pIntr->__intrConstructEngine__ +#define intrConstructEngine_FNPTR(pIntr) pIntr->__nvoc_vtable->__intrConstructEngine__ #define intrConstructEngine(pGpu, pIntr, arg3) intrConstructEngine_DISPATCH(pGpu, pIntr, arg3) -#define intrStatePreInitLocked_FNPTR(pIntr) pIntr->__intrStatePreInitLocked__ +#define intrStatePreInitLocked_FNPTR(pIntr) pIntr->__nvoc_vtable->__intrStatePreInitLocked__ #define intrStatePreInitLocked(pGpu, pIntr) intrStatePreInitLocked_DISPATCH(pGpu, pIntr) -#define intrStateInitUnlocked_FNPTR(pIntr) pIntr->__intrStateInitUnlocked__ +#define intrStateInitUnlocked_FNPTR(pIntr) pIntr->__nvoc_vtable->__intrStateInitUnlocked__ #define intrStateInitUnlocked(pGpu, pIntr) intrStateInitUnlocked_DISPATCH(pGpu, pIntr) -#define intrStateInitLocked_FNPTR(pIntr) pIntr->__intrStateInitLocked__ +#define intrStateInitLocked_FNPTR(pIntr) pIntr->__nvoc_vtable->__intrStateInitLocked__ #define intrStateInitLocked(pGpu, pIntr) intrStateInitLocked_DISPATCH(pGpu, pIntr) -#define intrStateDestroy_FNPTR(pIntr) pIntr->__intrStateDestroy__ +#define intrStateDestroy_FNPTR(pIntr) pIntr->__nvoc_vtable->__intrStateDestroy__ #define intrStateDestroy(pGpu, pIntr) intrStateDestroy_DISPATCH(pGpu, pIntr) #define intrDecodeStallIntrEn_FNPTR(pIntr) pIntr->__intrDecodeStallIntrEn__ #define intrDecodeStallIntrEn(pGpu, pIntr, arg3) intrDecodeStallIntrEn_DISPATCH(pGpu, pIntr, arg3) @@ -457,10 +469,10 @@ NV_STATUS __nvoc_objCreate_Intr(Intr**, Dynamic*, NvU32); #define intrSanityCheckEngineIntrNotificationVector_FNPTR(pIntr) pIntr->__intrSanityCheckEngineIntrNotificationVector__ #define intrSanityCheckEngineIntrNotificationVector(pGpu, pIntr, vector, mcEngine) intrSanityCheckEngineIntrNotificationVector_DISPATCH(pGpu, pIntr, vector, mcEngine) #define intrSanityCheckEngineIntrNotificationVector_HAL(pGpu, pIntr, vector, mcEngine) intrSanityCheckEngineIntrNotificationVector_DISPATCH(pGpu, pIntr, vector, mcEngine) -#define intrStateLoad_FNPTR(pIntr) pIntr->__intrStateLoad__ +#define intrStateLoad_FNPTR(pIntr) pIntr->__nvoc_vtable->__intrStateLoad__ #define intrStateLoad(pGpu, pIntr, arg3) intrStateLoad_DISPATCH(pGpu, pIntr, arg3) #define intrStateLoad_HAL(pGpu, pIntr, arg3) intrStateLoad_DISPATCH(pGpu, pIntr, arg3) -#define intrStateUnload_FNPTR(pIntr) pIntr->__intrStateUnload__ +#define intrStateUnload_FNPTR(pIntr) pIntr->__nvoc_vtable->__intrStateUnload__ #define intrStateUnload(pGpu, pIntr, arg3) intrStateUnload_DISPATCH(pGpu, pIntr, arg3) #define intrStateUnload_HAL(pGpu, pIntr, arg3) intrStateUnload_DISPATCH(pGpu, pIntr, arg3) #define intrInitSubtreeMap_FNPTR(pIntr) pIntr->__intrInitSubtreeMap__ @@ -478,40 +490,40 @@ NV_STATUS __nvoc_objCreate_Intr(Intr**, Dynamic*, NvU32); #define intrGetIntrEnFromHw_FNPTR(pIntr) pIntr->__intrGetIntrEnFromHw__ #define intrGetIntrEnFromHw(pGpu, pIntr, arg3) intrGetIntrEnFromHw_DISPATCH(pGpu, pIntr, arg3) #define intrGetIntrEnFromHw_HAL(pGpu, pIntr, arg3) intrGetIntrEnFromHw_DISPATCH(pGpu, pIntr, arg3) -#define intrInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define intrInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define intrInitMissing(pGpu, pEngstate) intrInitMissing_DISPATCH(pGpu, pEngstate) -#define intrStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define intrStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define intrStatePreInitUnlocked(pGpu, pEngstate) intrStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define intrStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define intrStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define intrStatePreLoad(pGpu, pEngstate, arg3) intrStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define intrStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define intrStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostLoad__ #define intrStatePostLoad(pGpu, pEngstate, arg3) intrStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define intrStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define intrStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define intrStatePreUnload(pGpu, pEngstate, arg3) intrStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define intrStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define intrStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define intrStatePostUnload(pGpu, pEngstate, arg3) intrStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define intrIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define intrIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define intrIsPresent(pGpu, pEngstate) intrIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS intrConstructEngine_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, ENGDESCRIPTOR arg3) { - return pIntr->__intrConstructEngine__(pGpu, pIntr, arg3); + return pIntr->__nvoc_vtable->__intrConstructEngine__(pGpu, pIntr, arg3); } static inline NV_STATUS intrStatePreInitLocked_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { - return pIntr->__intrStatePreInitLocked__(pGpu, pIntr); + return pIntr->__nvoc_vtable->__intrStatePreInitLocked__(pGpu, pIntr); } static inline NV_STATUS intrStateInitUnlocked_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { - return pIntr->__intrStateInitUnlocked__(pGpu, pIntr); + return pIntr->__nvoc_vtable->__intrStateInitUnlocked__(pGpu, pIntr); } static inline NV_STATUS intrStateInitLocked_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { - return pIntr->__intrStateInitLocked__(pGpu, pIntr); + return pIntr->__nvoc_vtable->__intrStateInitLocked__(pGpu, pIntr); } static inline void intrStateDestroy_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { - pIntr->__intrStateDestroy__(pGpu, pIntr); + pIntr->__nvoc_vtable->__intrStateDestroy__(pGpu, pIntr); } static inline NvU32 intrDecodeStallIntrEn_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3) { @@ -567,11 +579,11 @@ static inline void intrSanityCheckEngineIntrNotificationVector_DISPATCH(OBJGPU * } static inline NV_STATUS intrStateLoad_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3) { - return pIntr->__intrStateLoad__(pGpu, pIntr, arg3); + return pIntr->__nvoc_vtable->__intrStateLoad__(pGpu, pIntr, arg3); } static inline NV_STATUS intrStateUnload_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr, NvU32 arg3) { - return pIntr->__intrStateUnload__(pGpu, pIntr, arg3); + return pIntr->__nvoc_vtable->__intrStateUnload__(pGpu, pIntr, arg3); } static inline NV_STATUS intrInitSubtreeMap_DISPATCH(OBJGPU *pGpu, struct Intr *pIntr) { @@ -595,31 +607,31 @@ static inline NvU32 intrGetIntrEnFromHw_DISPATCH(OBJGPU *pGpu, struct Intr *pInt } static inline void intrInitMissing_DISPATCH(struct OBJGPU *pGpu, struct Intr *pEngstate) { - pEngstate->__intrInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__intrInitMissing__(pGpu, pEngstate); } static inline NV_STATUS intrStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct Intr *pEngstate) { - return pEngstate->__intrStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__intrStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS intrStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct Intr *pEngstate, NvU32 arg3) { - return pEngstate->__intrStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__intrStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS intrStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct Intr *pEngstate, NvU32 arg3) { - return pEngstate->__intrStatePostLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__intrStatePostLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS intrStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct Intr *pEngstate, NvU32 arg3) { - return pEngstate->__intrStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__intrStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS intrStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct Intr *pEngstate, NvU32 arg3) { - return pEngstate->__intrStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__intrStatePostUnload__(pGpu, pEngstate, arg3); } static inline NvBool intrIsPresent_DISPATCH(struct OBJGPU *pGpu, struct Intr *pEngstate) { - return pEngstate->__intrIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__intrIsPresent__(pGpu, pEngstate); } NV_STATUS intrCheckFecsEventbufferPending_IMPL(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *arg3, NvBool *arg4); @@ -1461,8 +1473,8 @@ static inline NV_STATUS intrGetNvlinkIntrMaskOffset(OBJGPU *pGpu, struct Intr *p #define intrGetNvlinkIntrMaskOffset_HAL(pGpu, pIntr, arg3, arg4) intrGetNvlinkIntrMaskOffset(pGpu, pIntr, arg3, arg4) -static inline NvBool intrRequiresPossibleErrorNotifier_491d52(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *pEngines) { - return ((NvBool)(0 != 0)); +static inline NvBool intrRequiresPossibleErrorNotifier_3dd2c9(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *pEngines) { + return NV_FALSE; } NvBool intrRequiresPossibleErrorNotifier_TU102(OBJGPU *pGpu, struct Intr *pIntr, union MC_ENGINE_BITVECTOR *pEngines); @@ -1478,7 +1490,7 @@ static inline NvBool intrRequiresPossibleErrorNotifier(OBJGPU *pGpu, struct Intr return NV_FALSE; } #else //__nvoc_intr_h_disabled -#define intrRequiresPossibleErrorNotifier(pGpu, pIntr, pEngines) intrRequiresPossibleErrorNotifier_491d52(pGpu, pIntr, pEngines) +#define intrRequiresPossibleErrorNotifier(pGpu, pIntr, pEngines) intrRequiresPossibleErrorNotifier_3dd2c9(pGpu, pIntr, pEngines) #endif //__nvoc_intr_h_disabled #define intrRequiresPossibleErrorNotifier_HAL(pGpu, pIntr, pEngines) intrRequiresPossibleErrorNotifier(pGpu, pIntr, pEngines) diff --git a/src/nvidia/generated/g_intr_service_nvoc.c b/src/nvidia/generated/g_intr_service_nvoc.c index a6c4cb8d29..6d7c4de9ba 100644 --- a/src/nvidia/generated/g_intr_service_nvoc.c +++ b/src/nvidia/generated/g_intr_service_nvoc.c @@ -49,6 +49,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_IntrService = /*pExportInfo=*/ &__nvoc_export_info_IntrService }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_IntrService = { /*numEntries=*/ 0, @@ -76,25 +80,22 @@ NV_STATUS __nvoc_ctor_IntrService(IntrService *pThis) { // Vtable initialization static void __nvoc_init_funcTable_IntrService_1(IntrService *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // intrservRegisterIntrService -- virtual - pThis->__intrservRegisterIntrService__ = &intrservRegisterIntrService_IMPL; - - // intrservClearInterrupt -- virtual - pThis->__intrservClearInterrupt__ = &intrservClearInterrupt_IMPL; - - // intrservServiceInterrupt -- virtual - pThis->__intrservServiceInterrupt__ = &intrservServiceInterrupt_IMPL; - - // intrservServiceNotificationInterrupt -- virtual - pThis->__intrservServiceNotificationInterrupt__ = &intrservServiceNotificationInterrupt_IMPL; -} // End __nvoc_init_funcTable_IntrService_1 with approximately 4 basic block(s). +} // End __nvoc_init_funcTable_IntrService_1 // Initialize vtable(s) for 4 virtual method(s). void __nvoc_init_funcTable_IntrService(IntrService *pThis) { - // Initialize vtable(s) with 4 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__IntrService vtable = { + .__intrservRegisterIntrService__ = &intrservRegisterIntrService_IMPL, // virtual + .__intrservClearInterrupt__ = &intrservClearInterrupt_IMPL, // virtual + .__intrservServiceInterrupt__ = &intrservServiceInterrupt_IMPL, // virtual + .__intrservServiceNotificationInterrupt__ = &intrservServiceNotificationInterrupt_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_vtable = &vtable; // (intrserv) this __nvoc_init_funcTable_IntrService_1(pThis); } diff --git a/src/nvidia/generated/g_intr_service_nvoc.h b/src/nvidia/generated/g_intr_service_nvoc.h index 6592315b59..dc8200db43 100644 --- a/src/nvidia/generated/g_intr_service_nvoc.h +++ b/src/nvidia/generated/g_intr_service_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -96,15 +96,23 @@ typedef struct { #endif +// Metadata including vtable +struct NVOC_VTABLE__IntrService; + + struct IntrService { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__IntrService *__nvoc_vtable; // Ancestor object pointers for `staticCast` feature struct IntrService *__nvoc_pbase_IntrService; // intrserv +}; + - // Vtable with 4 per-object function pointers +// Metadata including vtable with 4 function pointers +struct NVOC_VTABLE__IntrService { void (*__intrservRegisterIntrService__)(struct OBJGPU *, struct IntrService * /*this*/, IntrServiceRecord *); // virtual NvBool (*__intrservClearInterrupt__)(struct OBJGPU *, struct IntrService * /*this*/, IntrServiceClearInterruptArguments *); // virtual NvU32 (*__intrservServiceInterrupt__)(struct OBJGPU *, struct IntrService * /*this*/, IntrServiceServiceInterruptArguments *); // virtual @@ -141,30 +149,30 @@ NV_STATUS __nvoc_objCreate_IntrService(IntrService**, Dynamic*, NvU32); // Wrapper macros -#define intrservRegisterIntrService_FNPTR(pIntrService) pIntrService->__intrservRegisterIntrService__ +#define intrservRegisterIntrService_FNPTR(pIntrService) pIntrService->__nvoc_vtable->__intrservRegisterIntrService__ #define intrservRegisterIntrService(pGpu, pIntrService, pRecords) intrservRegisterIntrService_DISPATCH(pGpu, pIntrService, pRecords) -#define intrservClearInterrupt_FNPTR(pIntrService) pIntrService->__intrservClearInterrupt__ +#define intrservClearInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_vtable->__intrservClearInterrupt__ #define intrservClearInterrupt(pGpu, pIntrService, pParams) intrservClearInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define intrservServiceInterrupt_FNPTR(pIntrService) pIntrService->__intrservServiceInterrupt__ +#define intrservServiceInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_vtable->__intrservServiceInterrupt__ #define intrservServiceInterrupt(pGpu, pIntrService, pParams) intrservServiceInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define intrservServiceNotificationInterrupt_FNPTR(pIntrService) pIntrService->__intrservServiceNotificationInterrupt__ +#define intrservServiceNotificationInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_vtable->__intrservServiceNotificationInterrupt__ #define intrservServiceNotificationInterrupt(pGpu, pIntrService, pParams) intrservServiceNotificationInterrupt_DISPATCH(pGpu, pIntrService, pParams) // Dispatch functions static inline void intrservRegisterIntrService_DISPATCH(struct OBJGPU *pGpu, struct IntrService *pIntrService, IntrServiceRecord pRecords[175]) { - pIntrService->__intrservRegisterIntrService__(pGpu, pIntrService, pRecords); + pIntrService->__nvoc_vtable->__intrservRegisterIntrService__(pGpu, pIntrService, pRecords); } static inline NvBool intrservClearInterrupt_DISPATCH(struct OBJGPU *pGpu, struct IntrService *pIntrService, IntrServiceClearInterruptArguments *pParams) { - return pIntrService->__intrservClearInterrupt__(pGpu, pIntrService, pParams); + return pIntrService->__nvoc_vtable->__intrservClearInterrupt__(pGpu, pIntrService, pParams); } static inline NvU32 intrservServiceInterrupt_DISPATCH(struct OBJGPU *pGpu, struct IntrService *pIntrService, IntrServiceServiceInterruptArguments *pParams) { - return pIntrService->__intrservServiceInterrupt__(pGpu, pIntrService, pParams); + return pIntrService->__nvoc_vtable->__intrservServiceInterrupt__(pGpu, pIntrService, pParams); } static inline NV_STATUS intrservServiceNotificationInterrupt_DISPATCH(struct OBJGPU *pGpu, struct IntrService *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { - return pIntrService->__intrservServiceNotificationInterrupt__(pGpu, pIntrService, pParams); + return pIntrService->__nvoc_vtable->__intrservServiceNotificationInterrupt__(pGpu, pIntrService, pParams); } void intrservRegisterIntrService_IMPL(struct OBJGPU *pGpu, struct IntrService *pIntrService, IntrServiceRecord pRecords[175]); diff --git a/src/nvidia/generated/g_io_vaspace_nvoc.c b/src/nvidia/generated/g_io_vaspace_nvoc.c index 658d9d9a4f..298b8de077 100644 --- a/src/nvidia/generated/g_io_vaspace_nvoc.c +++ b/src/nvidia/generated/g_io_vaspace_nvoc.c @@ -66,153 +66,186 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJIOVASPACE = /*pExportInfo=*/ &__nvoc_export_info_OBJIOVASPACE }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceConstruct_(struct OBJVASPACE *pVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags); // this +NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceAlloc(struct OBJVASPACE *pVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSizeLockMask, VAS_ALLOC_FLAGS flags, NvU64 *pAddr); // this +NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceFree(struct OBJVASPACE *pVAS, NvU64 vAddr); // this +NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceApplyDefaultAlignment(struct OBJVASPACE *pVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask); // this +NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceIncAllocRefCnt(struct OBJVASPACE *pVAS, NvU64 vAddr); // this +NvU64 __nvoc_down_thunk_OBJIOVASPACE_vaspaceGetVaStart(struct OBJVASPACE *pVAS); // this +NvU64 __nvoc_down_thunk_OBJIOVASPACE_vaspaceGetVaLimit(struct OBJVASPACE *pVAS); // this +NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceGetVasInfo(struct OBJVASPACE *pVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams); // this + // 8 down-thunk(s) defined to bridge methods in OBJIOVASPACE from superclasses // iovaspaceConstruct_: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceConstruct_(struct OBJVASPACE *pVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceConstruct_(struct OBJVASPACE *pVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags) { return iovaspaceConstruct_((struct OBJIOVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags); } // iovaspaceAlloc: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceAlloc(struct OBJVASPACE *pVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSizeLockMask, VAS_ALLOC_FLAGS flags, NvU64 *pAddr) { +NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceAlloc(struct OBJVASPACE *pVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSizeLockMask, VAS_ALLOC_FLAGS flags, NvU64 *pAddr) { return iovaspaceAlloc((struct OBJIOVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr); } // iovaspaceFree: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceFree(struct OBJVASPACE *pVAS, NvU64 vAddr) { +NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceFree(struct OBJVASPACE *pVAS, NvU64 vAddr) { return iovaspaceFree((struct OBJIOVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), vAddr); } // iovaspaceApplyDefaultAlignment: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceApplyDefaultAlignment(struct OBJVASPACE *pVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask) { +NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceApplyDefaultAlignment(struct OBJVASPACE *pVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask) { return iovaspaceApplyDefaultAlignment((struct OBJIOVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pAllocInfo, pAlign, pSize, pPageSizeLockMask); } // iovaspaceIncAllocRefCnt: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceIncAllocRefCnt(struct OBJVASPACE *pVAS, NvU64 vAddr) { +NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceIncAllocRefCnt(struct OBJVASPACE *pVAS, NvU64 vAddr) { return iovaspaceIncAllocRefCnt((struct OBJIOVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), vAddr); } // iovaspaceGetVaStart: virtual override (vaspace) base (vaspace) -static NvU64 __nvoc_down_thunk_OBJIOVASPACE_vaspaceGetVaStart(struct OBJVASPACE *pVAS) { +NvU64 __nvoc_down_thunk_OBJIOVASPACE_vaspaceGetVaStart(struct OBJVASPACE *pVAS) { return iovaspaceGetVaStart((struct OBJIOVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); } // iovaspaceGetVaLimit: virtual override (vaspace) base (vaspace) -static NvU64 __nvoc_down_thunk_OBJIOVASPACE_vaspaceGetVaLimit(struct OBJVASPACE *pVAS) { +NvU64 __nvoc_down_thunk_OBJIOVASPACE_vaspaceGetVaLimit(struct OBJVASPACE *pVAS) { return iovaspaceGetVaLimit((struct OBJIOVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); } // iovaspaceGetVasInfo: virtual override (vaspace) base (vaspace) -static NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceGetVasInfo(struct OBJVASPACE *pVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams) { +NV_STATUS __nvoc_down_thunk_OBJIOVASPACE_vaspaceGetVasInfo(struct OBJVASPACE *pVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams) { return iovaspaceGetVasInfo((struct OBJIOVASPACE *)(((unsigned char *) pVAS) - __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pParams); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvU32 __nvoc_up_thunk_OBJVASPACE_iovaspaceGetFlags(struct OBJIOVASPACE *pVAS); // this +NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceMap(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags); // this +void __nvoc_up_thunk_OBJVASPACE_iovaspaceUnmap(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi); // this +NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceReserveMempool(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags); // this +OBJEHEAP * __nvoc_up_thunk_OBJVASPACE_iovaspaceGetHeap(struct OBJIOVASPACE *pVAS); // this +NvU64 __nvoc_up_thunk_OBJVASPACE_iovaspaceGetMapPageSize(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, EMEMBLOCK *pMemBlock); // this +NvU64 __nvoc_up_thunk_OBJVASPACE_iovaspaceGetBigPageSize(struct OBJIOVASPACE *pVAS); // this +NvBool __nvoc_up_thunk_OBJVASPACE_iovaspaceIsMirrored(struct OBJIOVASPACE *pVAS); // this +NvBool __nvoc_up_thunk_OBJVASPACE_iovaspaceIsFaultCapable(struct OBJIOVASPACE *pVAS); // this +NvBool __nvoc_up_thunk_OBJVASPACE_iovaspaceIsExternallyOwned(struct OBJIOVASPACE *pVAS); // this +NvBool __nvoc_up_thunk_OBJVASPACE_iovaspaceIsAtsEnabled(struct OBJIOVASPACE *pVAS); // this +NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceGetPasid(struct OBJIOVASPACE *pVAS, NvU32 *pPasid); // this +PMEMORY_DESCRIPTOR __nvoc_up_thunk_OBJVASPACE_iovaspaceGetPageDirBase(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu); // this +PMEMORY_DESCRIPTOR __nvoc_up_thunk_OBJVASPACE_iovaspaceGetKernelPageDirBase(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu); // this +NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspacePinRootPageDir(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu); // this +void __nvoc_up_thunk_OBJVASPACE_iovaspaceUnpinRootPageDir(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu); // this +void __nvoc_up_thunk_OBJVASPACE_iovaspaceInvalidateTlb(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type); // this +NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceGetPageTableInfo(struct OBJIOVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceGetPteInfo(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr); // this +NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceSetPteInfo(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceFreeV2(struct OBJIOVASPACE *pVAS, NvU64 vAddr, NvU64 *pSize); // this + // 21 up-thunk(s) defined to bridge methods in OBJIOVASPACE to superclasses // iovaspaceGetFlags: inline virtual inherited (vaspace) base (vaspace) body -static NvU32 __nvoc_up_thunk_OBJVASPACE_iovaspaceGetFlags(struct OBJIOVASPACE *pVAS) { +NvU32 __nvoc_up_thunk_OBJVASPACE_iovaspaceGetFlags(struct OBJIOVASPACE *pVAS) { return vaspaceGetFlags((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); } // iovaspaceMap: inline virtual inherited (vaspace) base (vaspace) body -static NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceMap(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { +NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceMap(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { return vaspaceMap((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu, vaLo, vaHi, pTarget, flags); } // iovaspaceUnmap: inline virtual inherited (vaspace) base (vaspace) body -static void __nvoc_up_thunk_OBJVASPACE_iovaspaceUnmap(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { +void __nvoc_up_thunk_OBJVASPACE_iovaspaceUnmap(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { vaspaceUnmap((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu, vaLo, vaHi); } // iovaspaceReserveMempool: inline virtual inherited (vaspace) base (vaspace) body -static NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceReserveMempool(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { +NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceReserveMempool(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { return vaspaceReserveMempool((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu, pDevice, size, pageSizeLockMask, flags); } // iovaspaceGetHeap: inline virtual inherited (vaspace) base (vaspace) body -static OBJEHEAP * __nvoc_up_thunk_OBJVASPACE_iovaspaceGetHeap(struct OBJIOVASPACE *pVAS) { +OBJEHEAP * __nvoc_up_thunk_OBJVASPACE_iovaspaceGetHeap(struct OBJIOVASPACE *pVAS) { return vaspaceGetHeap((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); } // iovaspaceGetMapPageSize: inline virtual inherited (vaspace) base (vaspace) body -static NvU64 __nvoc_up_thunk_OBJVASPACE_iovaspaceGetMapPageSize(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, EMEMBLOCK *pMemBlock) { +NvU64 __nvoc_up_thunk_OBJVASPACE_iovaspaceGetMapPageSize(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, EMEMBLOCK *pMemBlock) { return vaspaceGetMapPageSize((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu, pMemBlock); } // iovaspaceGetBigPageSize: inline virtual inherited (vaspace) base (vaspace) body -static NvU64 __nvoc_up_thunk_OBJVASPACE_iovaspaceGetBigPageSize(struct OBJIOVASPACE *pVAS) { +NvU64 __nvoc_up_thunk_OBJVASPACE_iovaspaceGetBigPageSize(struct OBJIOVASPACE *pVAS) { return vaspaceGetBigPageSize((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); } // iovaspaceIsMirrored: inline virtual inherited (vaspace) base (vaspace) body -static NvBool __nvoc_up_thunk_OBJVASPACE_iovaspaceIsMirrored(struct OBJIOVASPACE *pVAS) { +NvBool __nvoc_up_thunk_OBJVASPACE_iovaspaceIsMirrored(struct OBJIOVASPACE *pVAS) { return vaspaceIsMirrored((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); } // iovaspaceIsFaultCapable: inline virtual inherited (vaspace) base (vaspace) body -static NvBool __nvoc_up_thunk_OBJVASPACE_iovaspaceIsFaultCapable(struct OBJIOVASPACE *pVAS) { +NvBool __nvoc_up_thunk_OBJVASPACE_iovaspaceIsFaultCapable(struct OBJIOVASPACE *pVAS) { return vaspaceIsFaultCapable((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); } // iovaspaceIsExternallyOwned: inline virtual inherited (vaspace) base (vaspace) body -static NvBool __nvoc_up_thunk_OBJVASPACE_iovaspaceIsExternallyOwned(struct OBJIOVASPACE *pVAS) { +NvBool __nvoc_up_thunk_OBJVASPACE_iovaspaceIsExternallyOwned(struct OBJIOVASPACE *pVAS) { return vaspaceIsExternallyOwned((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); } // iovaspaceIsAtsEnabled: inline virtual inherited (vaspace) base (vaspace) body -static NvBool __nvoc_up_thunk_OBJVASPACE_iovaspaceIsAtsEnabled(struct OBJIOVASPACE *pVAS) { +NvBool __nvoc_up_thunk_OBJVASPACE_iovaspaceIsAtsEnabled(struct OBJIOVASPACE *pVAS) { return vaspaceIsAtsEnabled((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset)); } // iovaspaceGetPasid: inline virtual inherited (vaspace) base (vaspace) body -static NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceGetPasid(struct OBJIOVASPACE *pVAS, NvU32 *pPasid) { +NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceGetPasid(struct OBJIOVASPACE *pVAS, NvU32 *pPasid) { return vaspaceGetPasid((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pPasid); } // iovaspaceGetPageDirBase: inline virtual inherited (vaspace) base (vaspace) body -static PMEMORY_DESCRIPTOR __nvoc_up_thunk_OBJVASPACE_iovaspaceGetPageDirBase(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { +PMEMORY_DESCRIPTOR __nvoc_up_thunk_OBJVASPACE_iovaspaceGetPageDirBase(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { return vaspaceGetPageDirBase((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu); } // iovaspaceGetKernelPageDirBase: inline virtual inherited (vaspace) base (vaspace) body -static PMEMORY_DESCRIPTOR __nvoc_up_thunk_OBJVASPACE_iovaspaceGetKernelPageDirBase(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { +PMEMORY_DESCRIPTOR __nvoc_up_thunk_OBJVASPACE_iovaspaceGetKernelPageDirBase(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { return vaspaceGetKernelPageDirBase((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu); } // iovaspacePinRootPageDir: inline virtual inherited (vaspace) base (vaspace) body -static NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspacePinRootPageDir(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { +NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspacePinRootPageDir(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { return vaspacePinRootPageDir((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu); } // iovaspaceUnpinRootPageDir: inline virtual inherited (vaspace) base (vaspace) body -static void __nvoc_up_thunk_OBJVASPACE_iovaspaceUnpinRootPageDir(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { +void __nvoc_up_thunk_OBJVASPACE_iovaspaceUnpinRootPageDir(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { vaspaceUnpinRootPageDir((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu); } // iovaspaceInvalidateTlb: virtual inherited (vaspace) base (vaspace) -static void __nvoc_up_thunk_OBJVASPACE_iovaspaceInvalidateTlb(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type) { +void __nvoc_up_thunk_OBJVASPACE_iovaspaceInvalidateTlb(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type) { vaspaceInvalidateTlb((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu, type); } // iovaspaceGetPageTableInfo: inline virtual inherited (vaspace) base (vaspace) body -static NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceGetPageTableInfo(struct OBJIOVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceGetPageTableInfo(struct OBJIOVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { return vaspaceGetPageTableInfo((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pParams); } // iovaspaceGetPteInfo: inline virtual inherited (vaspace) base (vaspace) body -static NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceGetPteInfo(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { +NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceGetPteInfo(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { return vaspaceGetPteInfo((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu, pParams, pPhysAddr); } // iovaspaceSetPteInfo: inline virtual inherited (vaspace) base (vaspace) body -static NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceSetPteInfo(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceSetPteInfo(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { return vaspaceSetPteInfo((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), pGpu, pParams); } // iovaspaceFreeV2: inline virtual inherited (vaspace) base (vaspace) body -static NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceFreeV2(struct OBJIOVASPACE *pVAS, NvU64 vAddr, NvU64 *pSize) { +NV_STATUS __nvoc_up_thunk_OBJVASPACE_iovaspaceFreeV2(struct OBJIOVASPACE *pVAS, NvU64 vAddr, NvU64 *pSize) { return vaspaceFreeV2((struct OBJVASPACE *)(((unsigned char *) pVAS) + __nvoc_rtti_OBJIOVASPACE_OBJVASPACE.offset), vAddr, pSize); } @@ -251,108 +284,77 @@ NV_STATUS __nvoc_ctor_OBJIOVASPACE(OBJIOVASPACE *pThis) { // Vtable initialization static void __nvoc_init_funcTable_OBJIOVASPACE_1(OBJIOVASPACE *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // iovaspaceConstruct_ -- virtual override (vaspace) base (vaspace) - pThis->__iovaspaceConstruct___ = &iovaspaceConstruct__IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceConstruct___ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceConstruct_; - - // iovaspaceAlloc -- virtual override (vaspace) base (vaspace) - pThis->__iovaspaceAlloc__ = &iovaspaceAlloc_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceAlloc__ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceAlloc; - - // iovaspaceFree -- virtual override (vaspace) base (vaspace) - pThis->__iovaspaceFree__ = &iovaspaceFree_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceFree__ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceFree; - - // iovaspaceApplyDefaultAlignment -- virtual override (vaspace) base (vaspace) - pThis->__iovaspaceApplyDefaultAlignment__ = &iovaspaceApplyDefaultAlignment_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceApplyDefaultAlignment__ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceApplyDefaultAlignment; - - // iovaspaceIncAllocRefCnt -- virtual override (vaspace) base (vaspace) - pThis->__iovaspaceIncAllocRefCnt__ = &iovaspaceIncAllocRefCnt_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceIncAllocRefCnt__ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceIncAllocRefCnt; - - // iovaspaceGetVaStart -- virtual override (vaspace) base (vaspace) - pThis->__iovaspaceGetVaStart__ = &iovaspaceGetVaStart_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetVaStart__ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceGetVaStart; - - // iovaspaceGetVaLimit -- virtual override (vaspace) base (vaspace) - pThis->__iovaspaceGetVaLimit__ = &iovaspaceGetVaLimit_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetVaLimit__ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceGetVaLimit; - - // iovaspaceGetVasInfo -- virtual override (vaspace) base (vaspace) - pThis->__iovaspaceGetVasInfo__ = &iovaspaceGetVasInfo_IMPL; - pThis->__nvoc_base_OBJVASPACE.__vaspaceGetVasInfo__ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceGetVasInfo; - - // iovaspaceGetFlags -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__iovaspaceGetFlags__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetFlags; - - // iovaspaceMap -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__iovaspaceMap__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceMap; - - // iovaspaceUnmap -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__iovaspaceUnmap__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceUnmap; - - // iovaspaceReserveMempool -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__iovaspaceReserveMempool__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceReserveMempool; - - // iovaspaceGetHeap -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__iovaspaceGetHeap__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetHeap; - - // iovaspaceGetMapPageSize -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__iovaspaceGetMapPageSize__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetMapPageSize; - - // iovaspaceGetBigPageSize -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__iovaspaceGetBigPageSize__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetBigPageSize; - - // iovaspaceIsMirrored -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__iovaspaceIsMirrored__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceIsMirrored; - - // iovaspaceIsFaultCapable -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__iovaspaceIsFaultCapable__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceIsFaultCapable; - - // iovaspaceIsExternallyOwned -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__iovaspaceIsExternallyOwned__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceIsExternallyOwned; - - // iovaspaceIsAtsEnabled -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__iovaspaceIsAtsEnabled__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceIsAtsEnabled; - - // iovaspaceGetPasid -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__iovaspaceGetPasid__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetPasid; - - // iovaspaceGetPageDirBase -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__iovaspaceGetPageDirBase__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetPageDirBase; - - // iovaspaceGetKernelPageDirBase -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__iovaspaceGetKernelPageDirBase__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetKernelPageDirBase; - - // iovaspacePinRootPageDir -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__iovaspacePinRootPageDir__ = &__nvoc_up_thunk_OBJVASPACE_iovaspacePinRootPageDir; - - // iovaspaceUnpinRootPageDir -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__iovaspaceUnpinRootPageDir__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceUnpinRootPageDir; - - // iovaspaceInvalidateTlb -- virtual inherited (vaspace) base (vaspace) - pThis->__iovaspaceInvalidateTlb__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceInvalidateTlb; - - // iovaspaceGetPageTableInfo -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__iovaspaceGetPageTableInfo__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetPageTableInfo; - - // iovaspaceGetPteInfo -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__iovaspaceGetPteInfo__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetPteInfo; - - // iovaspaceSetPteInfo -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__iovaspaceSetPteInfo__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceSetPteInfo; - - // iovaspaceFreeV2 -- inline virtual inherited (vaspace) base (vaspace) body - pThis->__iovaspaceFreeV2__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceFreeV2; -} // End __nvoc_init_funcTable_OBJIOVASPACE_1 with approximately 37 basic block(s). +} // End __nvoc_init_funcTable_OBJIOVASPACE_1 // Initialize vtable(s) for 29 virtual method(s). void __nvoc_init_funcTable_OBJIOVASPACE(OBJIOVASPACE *pThis) { - // Initialize vtable(s) with 29 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__OBJIOVASPACE vtable = { + .__iovaspaceConstruct___ = &iovaspaceConstruct__IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceConstruct___ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceConstruct_, // pure virtual + .__iovaspaceAlloc__ = &iovaspaceAlloc_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceAlloc__ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceAlloc, // pure virtual + .__iovaspaceFree__ = &iovaspaceFree_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceFree__ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceFree, // pure virtual + .__iovaspaceApplyDefaultAlignment__ = &iovaspaceApplyDefaultAlignment_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceApplyDefaultAlignment__ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceApplyDefaultAlignment, // pure virtual + .__iovaspaceIncAllocRefCnt__ = &iovaspaceIncAllocRefCnt_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceIncAllocRefCnt__ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceIncAllocRefCnt, // inline virtual body + .__iovaspaceGetVaStart__ = &iovaspaceGetVaStart_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceGetVaStart__ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceGetVaStart, // virtual + .__iovaspaceGetVaLimit__ = &iovaspaceGetVaLimit_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceGetVaLimit__ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceGetVaLimit, // virtual + .__iovaspaceGetVasInfo__ = &iovaspaceGetVasInfo_IMPL, // virtual override (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceGetVasInfo__ = &__nvoc_down_thunk_OBJIOVASPACE_vaspaceGetVasInfo, // pure virtual + .__iovaspaceGetFlags__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetFlags, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceGetFlags__ = &vaspaceGetFlags_edd98b, // inline virtual body + .__iovaspaceMap__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceMap, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceMap__ = &vaspaceMap_14ee5e, // inline virtual body + .__iovaspaceUnmap__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceUnmap, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceUnmap__ = &vaspaceUnmap_af5be7, // inline virtual body + .__iovaspaceReserveMempool__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceReserveMempool, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceReserveMempool__ = &vaspaceReserveMempool_ac1694, // inline virtual body + .__iovaspaceGetHeap__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetHeap, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceGetHeap__ = &vaspaceGetHeap_9451a7, // inline virtual body + .__iovaspaceGetMapPageSize__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetMapPageSize, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceGetMapPageSize__ = &vaspaceGetMapPageSize_c26fae, // inline virtual body + .__iovaspaceGetBigPageSize__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetBigPageSize, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceGetBigPageSize__ = &vaspaceGetBigPageSize_c26fae, // inline virtual body + .__iovaspaceIsMirrored__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceIsMirrored, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceIsMirrored__ = &vaspaceIsMirrored_2fa1ff, // inline virtual body + .__iovaspaceIsFaultCapable__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceIsFaultCapable, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceIsFaultCapable__ = &vaspaceIsFaultCapable_2fa1ff, // inline virtual body + .__iovaspaceIsExternallyOwned__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceIsExternallyOwned, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceIsExternallyOwned__ = &vaspaceIsExternallyOwned_2fa1ff, // inline virtual body + .__iovaspaceIsAtsEnabled__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceIsAtsEnabled, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceIsAtsEnabled__ = &vaspaceIsAtsEnabled_2fa1ff, // inline virtual body + .__iovaspaceGetPasid__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetPasid, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceGetPasid__ = &vaspaceGetPasid_14ee5e, // inline virtual body + .__iovaspaceGetPageDirBase__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetPageDirBase, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceGetPageDirBase__ = &vaspaceGetPageDirBase_9451a7, // inline virtual body + .__iovaspaceGetKernelPageDirBase__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetKernelPageDirBase, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceGetKernelPageDirBase__ = &vaspaceGetKernelPageDirBase_9451a7, // inline virtual body + .__iovaspacePinRootPageDir__ = &__nvoc_up_thunk_OBJVASPACE_iovaspacePinRootPageDir, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspacePinRootPageDir__ = &vaspacePinRootPageDir_14ee5e, // inline virtual body + .__iovaspaceUnpinRootPageDir__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceUnpinRootPageDir, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceUnpinRootPageDir__ = &vaspaceUnpinRootPageDir_af5be7, // inline virtual body + .__iovaspaceInvalidateTlb__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceInvalidateTlb, // virtual inherited (vaspace) base (vaspace) + .OBJVASPACE.__vaspaceInvalidateTlb__ = &vaspaceInvalidateTlb_IMPL, // virtual + .__iovaspaceGetPageTableInfo__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetPageTableInfo, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceGetPageTableInfo__ = &vaspaceGetPageTableInfo_14ee5e, // inline virtual body + .__iovaspaceGetPteInfo__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceGetPteInfo, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceGetPteInfo__ = &vaspaceGetPteInfo_14ee5e, // inline virtual body + .__iovaspaceSetPteInfo__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceSetPteInfo, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceSetPteInfo__ = &vaspaceSetPteInfo_14ee5e, // inline virtual body + .__iovaspaceFreeV2__ = &__nvoc_up_thunk_OBJVASPACE_iovaspaceFreeV2, // inline virtual inherited (vaspace) base (vaspace) body + .OBJVASPACE.__vaspaceFreeV2__ = &vaspaceFreeV2_14ee5e, // inline virtual body + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJVASPACE.__nvoc_vtable = &vtable.OBJVASPACE; // (vaspace) super + pThis->__nvoc_vtable = &vtable; // (iovaspace) this __nvoc_init_funcTable_OBJIOVASPACE_1(pThis); } diff --git a/src/nvidia/generated/g_io_vaspace_nvoc.h b/src/nvidia/generated/g_io_vaspace_nvoc.h index aa92df4173..c33b54fd6a 100644 --- a/src/nvidia/generated/g_io_vaspace_nvoc.h +++ b/src/nvidia/generated/g_io_vaspace_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -141,10 +141,15 @@ struct IOVAMAPPING #endif +// Metadata including vtable +struct NVOC_VTABLE__OBJIOVASPACE; + + struct OBJIOVASPACE { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__OBJIOVASPACE *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJVASPACE __nvoc_base_OBJVASPACE; @@ -154,7 +159,15 @@ struct OBJIOVASPACE { struct OBJVASPACE *__nvoc_pbase_OBJVASPACE; // vaspace super struct OBJIOVASPACE *__nvoc_pbase_OBJIOVASPACE; // iovaspace - // Vtable with 29 per-object function pointers + // Data members + NvU64 mappingCount; +}; + + +// Metadata including vtable with 29 function pointers plus superclass metadata +struct NVOC_VTABLE__OBJIOVASPACE { + const struct NVOC_VTABLE__OBJVASPACE OBJVASPACE; // (vaspace) 29 function pointers + NV_STATUS (*__iovaspaceConstruct___)(struct OBJIOVASPACE * /*this*/, NvU32, NvU32, NvU64, NvU64, NvU64, NvU64, NvU32); // virtual override (vaspace) base (vaspace) NV_STATUS (*__iovaspaceAlloc__)(struct OBJIOVASPACE * /*this*/, NvU64, NvU64, NvU64, NvU64, NvU64, VAS_ALLOC_FLAGS, NvU64 *); // virtual override (vaspace) base (vaspace) NV_STATUS (*__iovaspaceFree__)(struct OBJIOVASPACE * /*this*/, NvU64); // virtual override (vaspace) base (vaspace) @@ -184,9 +197,6 @@ struct OBJIOVASPACE { NV_STATUS (*__iovaspaceGetPteInfo__)(struct OBJIOVASPACE * /*this*/, struct OBJGPU *, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *, RmPhysAddr *); // inline virtual inherited (vaspace) base (vaspace) body NV_STATUS (*__iovaspaceSetPteInfo__)(struct OBJIOVASPACE * /*this*/, struct OBJGPU *, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *); // inline virtual inherited (vaspace) base (vaspace) body NV_STATUS (*__iovaspaceFreeV2__)(struct OBJIOVASPACE * /*this*/, NvU64, NvU64 *); // inline virtual inherited (vaspace) base (vaspace) body - - // Data members - NvU64 mappingCount; }; #ifndef __NVOC_CLASS_OBJIOVASPACE_TYPEDEF__ @@ -219,180 +229,180 @@ NV_STATUS __nvoc_objCreate_OBJIOVASPACE(OBJIOVASPACE**, Dynamic*, NvU32); // Wrapper macros -#define iovaspaceConstruct__FNPTR(pVAS) pVAS->__iovaspaceConstruct___ +#define iovaspaceConstruct__FNPTR(pVAS) pVAS->__nvoc_vtable->__iovaspaceConstruct___ #define iovaspaceConstruct_(pVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags) iovaspaceConstruct__DISPATCH(pVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags) -#define iovaspaceAlloc_FNPTR(pVAS) pVAS->__iovaspaceAlloc__ +#define iovaspaceAlloc_FNPTR(pVAS) pVAS->__nvoc_vtable->__iovaspaceAlloc__ #define iovaspaceAlloc(pVAS, size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr) iovaspaceAlloc_DISPATCH(pVAS, size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr) -#define iovaspaceFree_FNPTR(pVAS) pVAS->__iovaspaceFree__ +#define iovaspaceFree_FNPTR(pVAS) pVAS->__nvoc_vtable->__iovaspaceFree__ #define iovaspaceFree(pVAS, vAddr) iovaspaceFree_DISPATCH(pVAS, vAddr) -#define iovaspaceApplyDefaultAlignment_FNPTR(pVAS) pVAS->__iovaspaceApplyDefaultAlignment__ +#define iovaspaceApplyDefaultAlignment_FNPTR(pVAS) pVAS->__nvoc_vtable->__iovaspaceApplyDefaultAlignment__ #define iovaspaceApplyDefaultAlignment(pVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask) iovaspaceApplyDefaultAlignment_DISPATCH(pVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask) -#define iovaspaceIncAllocRefCnt_FNPTR(pVAS) pVAS->__iovaspaceIncAllocRefCnt__ +#define iovaspaceIncAllocRefCnt_FNPTR(pVAS) pVAS->__nvoc_vtable->__iovaspaceIncAllocRefCnt__ #define iovaspaceIncAllocRefCnt(pVAS, vAddr) iovaspaceIncAllocRefCnt_DISPATCH(pVAS, vAddr) -#define iovaspaceGetVaStart_FNPTR(pVAS) pVAS->__iovaspaceGetVaStart__ +#define iovaspaceGetVaStart_FNPTR(pVAS) pVAS->__nvoc_vtable->__iovaspaceGetVaStart__ #define iovaspaceGetVaStart(pVAS) iovaspaceGetVaStart_DISPATCH(pVAS) -#define iovaspaceGetVaLimit_FNPTR(pVAS) pVAS->__iovaspaceGetVaLimit__ +#define iovaspaceGetVaLimit_FNPTR(pVAS) pVAS->__nvoc_vtable->__iovaspaceGetVaLimit__ #define iovaspaceGetVaLimit(pVAS) iovaspaceGetVaLimit_DISPATCH(pVAS) -#define iovaspaceGetVasInfo_FNPTR(pVAS) pVAS->__iovaspaceGetVasInfo__ +#define iovaspaceGetVasInfo_FNPTR(pVAS) pVAS->__nvoc_vtable->__iovaspaceGetVasInfo__ #define iovaspaceGetVasInfo(pVAS, pParams) iovaspaceGetVasInfo_DISPATCH(pVAS, pParams) -#define iovaspaceGetFlags_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetFlags__ +#define iovaspaceGetFlags_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceGetFlags__ #define iovaspaceGetFlags(pVAS) iovaspaceGetFlags_DISPATCH(pVAS) -#define iovaspaceMap_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceMap__ +#define iovaspaceMap_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceMap__ #define iovaspaceMap(pVAS, pGpu, vaLo, vaHi, pTarget, flags) iovaspaceMap_DISPATCH(pVAS, pGpu, vaLo, vaHi, pTarget, flags) -#define iovaspaceUnmap_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceUnmap__ +#define iovaspaceUnmap_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceUnmap__ #define iovaspaceUnmap(pVAS, pGpu, vaLo, vaHi) iovaspaceUnmap_DISPATCH(pVAS, pGpu, vaLo, vaHi) -#define iovaspaceReserveMempool_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceReserveMempool__ +#define iovaspaceReserveMempool_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceReserveMempool__ #define iovaspaceReserveMempool(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags) iovaspaceReserveMempool_DISPATCH(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags) -#define iovaspaceGetHeap_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetHeap__ +#define iovaspaceGetHeap_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceGetHeap__ #define iovaspaceGetHeap(pVAS) iovaspaceGetHeap_DISPATCH(pVAS) -#define iovaspaceGetMapPageSize_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetMapPageSize__ +#define iovaspaceGetMapPageSize_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceGetMapPageSize__ #define iovaspaceGetMapPageSize(pVAS, pGpu, pMemBlock) iovaspaceGetMapPageSize_DISPATCH(pVAS, pGpu, pMemBlock) -#define iovaspaceGetBigPageSize_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetBigPageSize__ +#define iovaspaceGetBigPageSize_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceGetBigPageSize__ #define iovaspaceGetBigPageSize(pVAS) iovaspaceGetBigPageSize_DISPATCH(pVAS) -#define iovaspaceIsMirrored_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceIsMirrored__ +#define iovaspaceIsMirrored_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceIsMirrored__ #define iovaspaceIsMirrored(pVAS) iovaspaceIsMirrored_DISPATCH(pVAS) -#define iovaspaceIsFaultCapable_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceIsFaultCapable__ +#define iovaspaceIsFaultCapable_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceIsFaultCapable__ #define iovaspaceIsFaultCapable(pVAS) iovaspaceIsFaultCapable_DISPATCH(pVAS) -#define iovaspaceIsExternallyOwned_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceIsExternallyOwned__ +#define iovaspaceIsExternallyOwned_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceIsExternallyOwned__ #define iovaspaceIsExternallyOwned(pVAS) iovaspaceIsExternallyOwned_DISPATCH(pVAS) -#define iovaspaceIsAtsEnabled_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceIsAtsEnabled__ +#define iovaspaceIsAtsEnabled_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceIsAtsEnabled__ #define iovaspaceIsAtsEnabled(pVAS) iovaspaceIsAtsEnabled_DISPATCH(pVAS) -#define iovaspaceGetPasid_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetPasid__ +#define iovaspaceGetPasid_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceGetPasid__ #define iovaspaceGetPasid(pVAS, pPasid) iovaspaceGetPasid_DISPATCH(pVAS, pPasid) -#define iovaspaceGetPageDirBase_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetPageDirBase__ +#define iovaspaceGetPageDirBase_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceGetPageDirBase__ #define iovaspaceGetPageDirBase(pVAS, pGpu) iovaspaceGetPageDirBase_DISPATCH(pVAS, pGpu) -#define iovaspaceGetKernelPageDirBase_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetKernelPageDirBase__ +#define iovaspaceGetKernelPageDirBase_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceGetKernelPageDirBase__ #define iovaspaceGetKernelPageDirBase(pVAS, pGpu) iovaspaceGetKernelPageDirBase_DISPATCH(pVAS, pGpu) -#define iovaspacePinRootPageDir_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspacePinRootPageDir__ +#define iovaspacePinRootPageDir_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspacePinRootPageDir__ #define iovaspacePinRootPageDir(pVAS, pGpu) iovaspacePinRootPageDir_DISPATCH(pVAS, pGpu) -#define iovaspaceUnpinRootPageDir_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceUnpinRootPageDir__ +#define iovaspaceUnpinRootPageDir_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceUnpinRootPageDir__ #define iovaspaceUnpinRootPageDir(pVAS, pGpu) iovaspaceUnpinRootPageDir_DISPATCH(pVAS, pGpu) -#define iovaspaceInvalidateTlb_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceInvalidateTlb__ +#define iovaspaceInvalidateTlb_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceInvalidateTlb__ #define iovaspaceInvalidateTlb(pVAS, pGpu, type) iovaspaceInvalidateTlb_DISPATCH(pVAS, pGpu, type) -#define iovaspaceGetPageTableInfo_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetPageTableInfo__ +#define iovaspaceGetPageTableInfo_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceGetPageTableInfo__ #define iovaspaceGetPageTableInfo(pVAS, pParams) iovaspaceGetPageTableInfo_DISPATCH(pVAS, pParams) -#define iovaspaceGetPteInfo_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceGetPteInfo__ +#define iovaspaceGetPteInfo_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceGetPteInfo__ #define iovaspaceGetPteInfo(pVAS, pGpu, pParams, pPhysAddr) iovaspaceGetPteInfo_DISPATCH(pVAS, pGpu, pParams, pPhysAddr) -#define iovaspaceSetPteInfo_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceSetPteInfo__ +#define iovaspaceSetPteInfo_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceSetPteInfo__ #define iovaspaceSetPteInfo(pVAS, pGpu, pParams) iovaspaceSetPteInfo_DISPATCH(pVAS, pGpu, pParams) -#define iovaspaceFreeV2_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__vaspaceFreeV2__ +#define iovaspaceFreeV2_FNPTR(pVAS) pVAS->__nvoc_base_OBJVASPACE.__nvoc_vtable->__vaspaceFreeV2__ #define iovaspaceFreeV2(pVAS, vAddr, pSize) iovaspaceFreeV2_DISPATCH(pVAS, vAddr, pSize) // Dispatch functions static inline NV_STATUS iovaspaceConstruct__DISPATCH(struct OBJIOVASPACE *pVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags) { - return pVAS->__iovaspaceConstruct___(pVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags); + return pVAS->__nvoc_vtable->__iovaspaceConstruct___(pVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags); } static inline NV_STATUS iovaspaceAlloc_DISPATCH(struct OBJIOVASPACE *pVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSizeLockMask, VAS_ALLOC_FLAGS flags, NvU64 *pAddr) { - return pVAS->__iovaspaceAlloc__(pVAS, size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr); + return pVAS->__nvoc_vtable->__iovaspaceAlloc__(pVAS, size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr); } static inline NV_STATUS iovaspaceFree_DISPATCH(struct OBJIOVASPACE *pVAS, NvU64 vAddr) { - return pVAS->__iovaspaceFree__(pVAS, vAddr); + return pVAS->__nvoc_vtable->__iovaspaceFree__(pVAS, vAddr); } static inline NV_STATUS iovaspaceApplyDefaultAlignment_DISPATCH(struct OBJIOVASPACE *pVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask) { - return pVAS->__iovaspaceApplyDefaultAlignment__(pVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask); + return pVAS->__nvoc_vtable->__iovaspaceApplyDefaultAlignment__(pVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask); } static inline NV_STATUS iovaspaceIncAllocRefCnt_DISPATCH(struct OBJIOVASPACE *pVAS, NvU64 vAddr) { - return pVAS->__iovaspaceIncAllocRefCnt__(pVAS, vAddr); + return pVAS->__nvoc_vtable->__iovaspaceIncAllocRefCnt__(pVAS, vAddr); } static inline NvU64 iovaspaceGetVaStart_DISPATCH(struct OBJIOVASPACE *pVAS) { - return pVAS->__iovaspaceGetVaStart__(pVAS); + return pVAS->__nvoc_vtable->__iovaspaceGetVaStart__(pVAS); } static inline NvU64 iovaspaceGetVaLimit_DISPATCH(struct OBJIOVASPACE *pVAS) { - return pVAS->__iovaspaceGetVaLimit__(pVAS); + return pVAS->__nvoc_vtable->__iovaspaceGetVaLimit__(pVAS); } static inline NV_STATUS iovaspaceGetVasInfo_DISPATCH(struct OBJIOVASPACE *pVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams) { - return pVAS->__iovaspaceGetVasInfo__(pVAS, pParams); + return pVAS->__nvoc_vtable->__iovaspaceGetVasInfo__(pVAS, pParams); } static inline NvU32 iovaspaceGetFlags_DISPATCH(struct OBJIOVASPACE *pVAS) { - return pVAS->__iovaspaceGetFlags__(pVAS); + return pVAS->__nvoc_vtable->__iovaspaceGetFlags__(pVAS); } static inline NV_STATUS iovaspaceMap_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { - return pVAS->__iovaspaceMap__(pVAS, pGpu, vaLo, vaHi, pTarget, flags); + return pVAS->__nvoc_vtable->__iovaspaceMap__(pVAS, pGpu, vaLo, vaHi, pTarget, flags); } static inline void iovaspaceUnmap_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { - pVAS->__iovaspaceUnmap__(pVAS, pGpu, vaLo, vaHi); + pVAS->__nvoc_vtable->__iovaspaceUnmap__(pVAS, pGpu, vaLo, vaHi); } static inline NV_STATUS iovaspaceReserveMempool_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { - return pVAS->__iovaspaceReserveMempool__(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags); + return pVAS->__nvoc_vtable->__iovaspaceReserveMempool__(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags); } static inline OBJEHEAP * iovaspaceGetHeap_DISPATCH(struct OBJIOVASPACE *pVAS) { - return pVAS->__iovaspaceGetHeap__(pVAS); + return pVAS->__nvoc_vtable->__iovaspaceGetHeap__(pVAS); } static inline NvU64 iovaspaceGetMapPageSize_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, EMEMBLOCK *pMemBlock) { - return pVAS->__iovaspaceGetMapPageSize__(pVAS, pGpu, pMemBlock); + return pVAS->__nvoc_vtable->__iovaspaceGetMapPageSize__(pVAS, pGpu, pMemBlock); } static inline NvU64 iovaspaceGetBigPageSize_DISPATCH(struct OBJIOVASPACE *pVAS) { - return pVAS->__iovaspaceGetBigPageSize__(pVAS); + return pVAS->__nvoc_vtable->__iovaspaceGetBigPageSize__(pVAS); } static inline NvBool iovaspaceIsMirrored_DISPATCH(struct OBJIOVASPACE *pVAS) { - return pVAS->__iovaspaceIsMirrored__(pVAS); + return pVAS->__nvoc_vtable->__iovaspaceIsMirrored__(pVAS); } static inline NvBool iovaspaceIsFaultCapable_DISPATCH(struct OBJIOVASPACE *pVAS) { - return pVAS->__iovaspaceIsFaultCapable__(pVAS); + return pVAS->__nvoc_vtable->__iovaspaceIsFaultCapable__(pVAS); } static inline NvBool iovaspaceIsExternallyOwned_DISPATCH(struct OBJIOVASPACE *pVAS) { - return pVAS->__iovaspaceIsExternallyOwned__(pVAS); + return pVAS->__nvoc_vtable->__iovaspaceIsExternallyOwned__(pVAS); } static inline NvBool iovaspaceIsAtsEnabled_DISPATCH(struct OBJIOVASPACE *pVAS) { - return pVAS->__iovaspaceIsAtsEnabled__(pVAS); + return pVAS->__nvoc_vtable->__iovaspaceIsAtsEnabled__(pVAS); } static inline NV_STATUS iovaspaceGetPasid_DISPATCH(struct OBJIOVASPACE *pVAS, NvU32 *pPasid) { - return pVAS->__iovaspaceGetPasid__(pVAS, pPasid); + return pVAS->__nvoc_vtable->__iovaspaceGetPasid__(pVAS, pPasid); } static inline PMEMORY_DESCRIPTOR iovaspaceGetPageDirBase_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { - return pVAS->__iovaspaceGetPageDirBase__(pVAS, pGpu); + return pVAS->__nvoc_vtable->__iovaspaceGetPageDirBase__(pVAS, pGpu); } static inline PMEMORY_DESCRIPTOR iovaspaceGetKernelPageDirBase_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { - return pVAS->__iovaspaceGetKernelPageDirBase__(pVAS, pGpu); + return pVAS->__nvoc_vtable->__iovaspaceGetKernelPageDirBase__(pVAS, pGpu); } static inline NV_STATUS iovaspacePinRootPageDir_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { - return pVAS->__iovaspacePinRootPageDir__(pVAS, pGpu); + return pVAS->__nvoc_vtable->__iovaspacePinRootPageDir__(pVAS, pGpu); } static inline void iovaspaceUnpinRootPageDir_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu) { - pVAS->__iovaspaceUnpinRootPageDir__(pVAS, pGpu); + pVAS->__nvoc_vtable->__iovaspaceUnpinRootPageDir__(pVAS, pGpu); } static inline void iovaspaceInvalidateTlb_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type) { - pVAS->__iovaspaceInvalidateTlb__(pVAS, pGpu, type); + pVAS->__nvoc_vtable->__iovaspaceInvalidateTlb__(pVAS, pGpu, type); } static inline NV_STATUS iovaspaceGetPageTableInfo_DISPATCH(struct OBJIOVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { - return pVAS->__iovaspaceGetPageTableInfo__(pVAS, pParams); + return pVAS->__nvoc_vtable->__iovaspaceGetPageTableInfo__(pVAS, pParams); } static inline NV_STATUS iovaspaceGetPteInfo_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { - return pVAS->__iovaspaceGetPteInfo__(pVAS, pGpu, pParams, pPhysAddr); + return pVAS->__nvoc_vtable->__iovaspaceGetPteInfo__(pVAS, pGpu, pParams, pPhysAddr); } static inline NV_STATUS iovaspaceSetPteInfo_DISPATCH(struct OBJIOVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { - return pVAS->__iovaspaceSetPteInfo__(pVAS, pGpu, pParams); + return pVAS->__nvoc_vtable->__iovaspaceSetPteInfo__(pVAS, pGpu, pParams); } static inline NV_STATUS iovaspaceFreeV2_DISPATCH(struct OBJIOVASPACE *pVAS, NvU64 vAddr, NvU64 *pSize) { - return pVAS->__iovaspaceFreeV2__(pVAS, vAddr, pSize); + return pVAS->__nvoc_vtable->__iovaspaceFreeV2__(pVAS, vAddr, pSize); } NV_STATUS iovaspaceConstruct__IMPL(struct OBJIOVASPACE *pVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags); diff --git a/src/nvidia/generated/g_ioaccess_nvoc.c b/src/nvidia/generated/g_ioaccess_nvoc.c index 134d2609f8..43add0dda1 100644 --- a/src/nvidia/generated/g_ioaccess_nvoc.c +++ b/src/nvidia/generated/g_ioaccess_nvoc.c @@ -58,6 +58,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_RegisterAperture = /*pExportInfo=*/ &__nvoc_export_info_RegisterAperture }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_RegisterAperture = { /*numEntries=*/ 0, @@ -85,37 +89,26 @@ NV_STATUS __nvoc_ctor_RegisterAperture(RegisterAperture *pThis) { // Vtable initialization static void __nvoc_init_funcTable_RegisterAperture_1(RegisterAperture *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // regaprtReadReg08 -- pure virtual - pThis->__regaprtReadReg08__ = NULL; - - // regaprtReadReg16 -- pure virtual - pThis->__regaprtReadReg16__ = NULL; - - // regaprtReadReg32 -- pure virtual - pThis->__regaprtReadReg32__ = NULL; - - // regaprtWriteReg08 -- pure virtual - pThis->__regaprtWriteReg08__ = NULL; - - // regaprtWriteReg16 -- pure virtual - pThis->__regaprtWriteReg16__ = NULL; - - // regaprtWriteReg32 -- pure virtual - pThis->__regaprtWriteReg32__ = NULL; - - // regaprtWriteReg32Uc -- pure virtual - pThis->__regaprtWriteReg32Uc__ = NULL; - - // regaprtIsRegValid -- pure virtual - pThis->__regaprtIsRegValid__ = NULL; -} // End __nvoc_init_funcTable_RegisterAperture_1 with approximately 8 basic block(s). +} // End __nvoc_init_funcTable_RegisterAperture_1 // Initialize vtable(s) for 8 virtual method(s). void __nvoc_init_funcTable_RegisterAperture(RegisterAperture *pThis) { - // Initialize vtable(s) with 8 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__RegisterAperture vtable = { + .__regaprtReadReg08__ = NULL, // pure virtual + .__regaprtReadReg16__ = NULL, // pure virtual + .__regaprtReadReg32__ = NULL, // pure virtual + .__regaprtWriteReg08__ = NULL, // pure virtual + .__regaprtWriteReg16__ = NULL, // pure virtual + .__regaprtWriteReg32__ = NULL, // pure virtual + .__regaprtWriteReg32Uc__ = NULL, // pure virtual + .__regaprtIsRegValid__ = NULL, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_vtable = &vtable; // (regaprt) this __nvoc_init_funcTable_RegisterAperture_1(pThis); } diff --git a/src/nvidia/generated/g_ioaccess_nvoc.h b/src/nvidia/generated/g_ioaccess_nvoc.h index 48ee0277ca..4ac5b24d6a 100644 --- a/src/nvidia/generated/g_ioaccess_nvoc.h +++ b/src/nvidia/generated/g_ioaccess_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -78,15 +78,23 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__RegisterAperture; + + struct RegisterAperture { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__RegisterAperture *__nvoc_vtable; // Ancestor object pointers for `staticCast` feature struct RegisterAperture *__nvoc_pbase_RegisterAperture; // regaprt +}; + - // Vtable with 8 per-object function pointers +// Metadata including vtable with 8 function pointers +struct NVOC_VTABLE__RegisterAperture { NvU8 (*__regaprtReadReg08__)(struct RegisterAperture * /*this*/, NvU32); // pure virtual NvU16 (*__regaprtReadReg16__)(struct RegisterAperture * /*this*/, NvU32); // pure virtual NvU32 (*__regaprtReadReg32__)(struct RegisterAperture * /*this*/, NvU32); // pure virtual @@ -127,54 +135,54 @@ NV_STATUS __nvoc_objCreate_RegisterAperture(RegisterAperture**, Dynamic*, NvU32) // Wrapper macros -#define regaprtReadReg08_FNPTR(pAperture) pAperture->__regaprtReadReg08__ +#define regaprtReadReg08_FNPTR(pAperture) pAperture->__nvoc_vtable->__regaprtReadReg08__ #define regaprtReadReg08(pAperture, addr) regaprtReadReg08_DISPATCH(pAperture, addr) -#define regaprtReadReg16_FNPTR(pAperture) pAperture->__regaprtReadReg16__ +#define regaprtReadReg16_FNPTR(pAperture) pAperture->__nvoc_vtable->__regaprtReadReg16__ #define regaprtReadReg16(pAperture, addr) regaprtReadReg16_DISPATCH(pAperture, addr) -#define regaprtReadReg32_FNPTR(pAperture) pAperture->__regaprtReadReg32__ +#define regaprtReadReg32_FNPTR(pAperture) pAperture->__nvoc_vtable->__regaprtReadReg32__ #define regaprtReadReg32(pAperture, addr) regaprtReadReg32_DISPATCH(pAperture, addr) -#define regaprtWriteReg08_FNPTR(pAperture) pAperture->__regaprtWriteReg08__ +#define regaprtWriteReg08_FNPTR(pAperture) pAperture->__nvoc_vtable->__regaprtWriteReg08__ #define regaprtWriteReg08(pAperture, addr, value) regaprtWriteReg08_DISPATCH(pAperture, addr, value) -#define regaprtWriteReg16_FNPTR(pAperture) pAperture->__regaprtWriteReg16__ +#define regaprtWriteReg16_FNPTR(pAperture) pAperture->__nvoc_vtable->__regaprtWriteReg16__ #define regaprtWriteReg16(pAperture, addr, value) regaprtWriteReg16_DISPATCH(pAperture, addr, value) -#define regaprtWriteReg32_FNPTR(pAperture) pAperture->__regaprtWriteReg32__ +#define regaprtWriteReg32_FNPTR(pAperture) pAperture->__nvoc_vtable->__regaprtWriteReg32__ #define regaprtWriteReg32(pAperture, addr, value) regaprtWriteReg32_DISPATCH(pAperture, addr, value) -#define regaprtWriteReg32Uc_FNPTR(pAperture) pAperture->__regaprtWriteReg32Uc__ +#define regaprtWriteReg32Uc_FNPTR(pAperture) pAperture->__nvoc_vtable->__regaprtWriteReg32Uc__ #define regaprtWriteReg32Uc(pAperture, addr, value) regaprtWriteReg32Uc_DISPATCH(pAperture, addr, value) -#define regaprtIsRegValid_FNPTR(pAperture) pAperture->__regaprtIsRegValid__ +#define regaprtIsRegValid_FNPTR(pAperture) pAperture->__nvoc_vtable->__regaprtIsRegValid__ #define regaprtIsRegValid(pAperture, addr) regaprtIsRegValid_DISPATCH(pAperture, addr) // Dispatch functions static inline NvU8 regaprtReadReg08_DISPATCH(struct RegisterAperture *pAperture, NvU32 addr) { - return pAperture->__regaprtReadReg08__(pAperture, addr); + return pAperture->__nvoc_vtable->__regaprtReadReg08__(pAperture, addr); } static inline NvU16 regaprtReadReg16_DISPATCH(struct RegisterAperture *pAperture, NvU32 addr) { - return pAperture->__regaprtReadReg16__(pAperture, addr); + return pAperture->__nvoc_vtable->__regaprtReadReg16__(pAperture, addr); } static inline NvU32 regaprtReadReg32_DISPATCH(struct RegisterAperture *pAperture, NvU32 addr) { - return pAperture->__regaprtReadReg32__(pAperture, addr); + return pAperture->__nvoc_vtable->__regaprtReadReg32__(pAperture, addr); } static inline void regaprtWriteReg08_DISPATCH(struct RegisterAperture *pAperture, NvU32 addr, NvV8 value) { - pAperture->__regaprtWriteReg08__(pAperture, addr, value); + pAperture->__nvoc_vtable->__regaprtWriteReg08__(pAperture, addr, value); } static inline void regaprtWriteReg16_DISPATCH(struct RegisterAperture *pAperture, NvU32 addr, NvV16 value) { - pAperture->__regaprtWriteReg16__(pAperture, addr, value); + pAperture->__nvoc_vtable->__regaprtWriteReg16__(pAperture, addr, value); } static inline void regaprtWriteReg32_DISPATCH(struct RegisterAperture *pAperture, NvU32 addr, NvV32 value) { - pAperture->__regaprtWriteReg32__(pAperture, addr, value); + pAperture->__nvoc_vtable->__regaprtWriteReg32__(pAperture, addr, value); } static inline void regaprtWriteReg32Uc_DISPATCH(struct RegisterAperture *pAperture, NvU32 addr, NvV32 value) { - pAperture->__regaprtWriteReg32Uc__(pAperture, addr, value); + pAperture->__nvoc_vtable->__regaprtWriteReg32Uc__(pAperture, addr, value); } static inline NvBool regaprtIsRegValid_DISPATCH(struct RegisterAperture *pAperture, NvU32 addr) { - return pAperture->__regaprtIsRegValid__(pAperture, addr); + return pAperture->__nvoc_vtable->__regaprtIsRegValid__(pAperture, addr); } #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_journal_nvoc.c b/src/nvidia/generated/g_journal_nvoc.c index a0f5512dcf..24ad26258c 100644 --- a/src/nvidia/generated/g_journal_nvoc.c +++ b/src/nvidia/generated/g_journal_nvoc.c @@ -66,6 +66,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJRCDB = /*pExportInfo=*/ &__nvoc_export_info_OBJRCDB }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJRCDB = { /*numEntries=*/ 0, @@ -83,7 +87,7 @@ void __nvoc_dtor_OBJRCDB(OBJRCDB *pThis) { void __nvoc_init_dataField_OBJRCDB(OBJRCDB *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - pThis->setProperty(pThis, PDB_PROP_RCDB_COMPRESS, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_RCDB_COMPRESS, NV_TRUE); } NV_STATUS __nvoc_ctor_Object(Object* ); diff --git a/src/nvidia/generated/g_journal_nvoc.h b/src/nvidia/generated/g_journal_nvoc.h index 66263641e9..33541df996 100644 --- a/src/nvidia/generated/g_journal_nvoc.h +++ b/src/nvidia/generated/g_journal_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_kern_bus_nvoc.c b/src/nvidia/generated/g_kern_bus_nvoc.c index 4baf8a7b51..8a86143e8d 100644 --- a/src/nvidia/generated/g_kern_bus_nvoc.c +++ b/src/nvidia/generated/g_kern_bus_nvoc.c @@ -66,78 +66,96 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelBus = /*pExportInfo=*/ &__nvoc_export_info_KernelBus }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_KernelBus_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, ENGDESCRIPTOR arg3); // this +NV_STATUS __nvoc_down_thunk_KernelBus_engstateStatePreInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus); // this +NV_STATUS __nvoc_down_thunk_KernelBus_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus); // this +NV_STATUS __nvoc_down_thunk_KernelBus_engstateStatePreLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg3); // this +NV_STATUS __nvoc_down_thunk_KernelBus_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg3); // this +NV_STATUS __nvoc_down_thunk_KernelBus_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg3); // this +NV_STATUS __nvoc_down_thunk_KernelBus_engstateStatePreUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg3); // this +NV_STATUS __nvoc_down_thunk_KernelBus_engstateStateUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 flags); // this +NV_STATUS __nvoc_down_thunk_KernelBus_engstateStatePostUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 flags); // this +void __nvoc_down_thunk_KernelBus_engstateStateDestroy(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus); // this + // 10 down-thunk(s) defined to bridge methods in KernelBus from superclasses // kbusConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelBus_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, ENGDESCRIPTOR arg3) { +NV_STATUS __nvoc_down_thunk_KernelBus_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, ENGDESCRIPTOR arg3) { return kbusConstructEngine(pGpu, (struct KernelBus *)(((unsigned char *) pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), arg3); } // kbusStatePreInitLocked: virtual halified (singleton optimized) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_KernelBus_engstateStatePreInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus) { +NV_STATUS __nvoc_down_thunk_KernelBus_engstateStatePreInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus) { return kbusStatePreInitLocked(pGpu, (struct KernelBus *)(((unsigned char *) pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); } // kbusStateInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelBus_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus) { +NV_STATUS __nvoc_down_thunk_KernelBus_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus) { return kbusStateInitLocked(pGpu, (struct KernelBus *)(((unsigned char *) pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); } // kbusStatePreLoad: virtual halified (singleton optimized) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_KernelBus_engstateStatePreLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_KernelBus_engstateStatePreLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg3) { return kbusStatePreLoad(pGpu, (struct KernelBus *)(((unsigned char *) pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), arg3); } // kbusStateLoad: virtual halified (singleton optimized) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_KernelBus_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_KernelBus_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg3) { return kbusStateLoad(pGpu, (struct KernelBus *)(((unsigned char *) pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), arg3); } // kbusStatePostLoad: virtual halified (singleton optimized) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_KernelBus_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_KernelBus_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg3) { return kbusStatePostLoad(pGpu, (struct KernelBus *)(((unsigned char *) pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), arg3); } // kbusStatePreUnload: virtual halified (singleton optimized) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_KernelBus_engstateStatePreUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_KernelBus_engstateStatePreUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg3) { return kbusStatePreUnload(pGpu, (struct KernelBus *)(((unsigned char *) pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), arg3); } // kbusStateUnload: virtual halified (singleton optimized) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_KernelBus_engstateStateUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelBus_engstateStateUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 flags) { return kbusStateUnload(pGpu, (struct KernelBus *)(((unsigned char *) pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), flags); } // kbusStatePostUnload: virtual halified (singleton optimized) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_KernelBus_engstateStatePostUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelBus_engstateStatePostUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 flags) { return kbusStatePostUnload(pGpu, (struct KernelBus *)(((unsigned char *) pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), flags); } // kbusStateDestroy: virtual halified (singleton optimized) override (engstate) base (engstate) -static void __nvoc_down_thunk_KernelBus_engstateStateDestroy(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus) { +void __nvoc_down_thunk_KernelBus_engstateStateDestroy(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus) { kbusStateDestroy(pGpu, (struct KernelBus *)(((unsigned char *) pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_kbusInitMissing(struct OBJGPU *pGpu, struct KernelBus *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbusStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelBus *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbusStateInitUnlocked(struct OBJGPU *pGpu, struct KernelBus *pEngstate); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_kbusIsPresent(struct OBJGPU *pGpu, struct KernelBus *pEngstate); // this + // 4 up-thunk(s) defined to bridge methods in KernelBus to superclasses // kbusInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kbusInitMissing(struct OBJGPU *pGpu, struct KernelBus *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kbusInitMissing(struct OBJGPU *pGpu, struct KernelBus *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); } // kbusStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbusStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelBus *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbusStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelBus *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); } // kbusStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbusStateInitUnlocked(struct OBJGPU *pGpu, struct KernelBus *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbusStateInitUnlocked(struct OBJGPU *pGpu, struct KernelBus *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); } // kbusIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_kbusIsPresent(struct OBJGPU *pGpu, struct KernelBus *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_kbusIsPresent(struct OBJGPU *pGpu, struct KernelBus *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); } @@ -170,99 +188,99 @@ void __nvoc_init_dataField_KernelBus(KernelBus *pThis, RmHalspecOwner *pRmhalspe // Hal field -- bFlaDummyPageEnabled if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ { - pThis->bFlaDummyPageEnabled = ((NvBool)(0 == 0)); + pThis->bFlaDummyPageEnabled = NV_TRUE; } // default else { - pThis->bFlaDummyPageEnabled = ((NvBool)(0 != 0)); + pThis->bFlaDummyPageEnabled = NV_FALSE; } // Hal field -- bP2pMailboxClientAllocatedBug3466714VoltaAndUp if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bP2pMailboxClientAllocatedBug3466714VoltaAndUp = ((NvBool)(0 == 0)); + pThis->bP2pMailboxClientAllocatedBug3466714VoltaAndUp = NV_TRUE; } // Hal field -- bBug2751296LimitBar2PtSize if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bBug2751296LimitBar2PtSize = ((NvBool)(0 == 0)); + pThis->bBug2751296LimitBar2PtSize = NV_TRUE; } // Hal field -- bAllowReflectedMappingAccess // default { - pThis->bAllowReflectedMappingAccess = ((NvBool)(0 != 0)); + pThis->bAllowReflectedMappingAccess = NV_FALSE; } // Hal field -- bIsEntireBar2RegionVirtuallyAddressible if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->bIsEntireBar2RegionVirtuallyAddressible = ((NvBool)(0 == 0)); + pThis->bIsEntireBar2RegionVirtuallyAddressible = NV_TRUE; } // default else { - pThis->bIsEntireBar2RegionVirtuallyAddressible = ((NvBool)(0 != 0)); + pThis->bIsEntireBar2RegionVirtuallyAddressible = NV_FALSE; } // Hal field -- bSkipBar2TestOnGc6Exit // default { - pThis->bSkipBar2TestOnGc6Exit = ((NvBool)(0 != 0)); + pThis->bSkipBar2TestOnGc6Exit = NV_FALSE; } // Hal field -- bReadCpuPointerToFlush if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bReadCpuPointerToFlush = ((NvBool)(0 == 0)); + pThis->bReadCpuPointerToFlush = NV_TRUE; } // NVOC Property Hal field -- PDB_PROP_KBUS_NVLINK_DECONFIG_HSHUB_ON_NO_MAPPING if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_KBUS_NVLINK_DECONFIG_HSHUB_ON_NO_MAPPING, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KBUS_NVLINK_DECONFIG_HSHUB_ON_NO_MAPPING, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_KBUS_NVLINK_DECONFIG_HSHUB_ON_NO_MAPPING, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KBUS_NVLINK_DECONFIG_HSHUB_ON_NO_MAPPING, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_KBUS_IS_MISSING if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_KBUS_IS_MISSING, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KBUS_IS_MISSING, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_KBUS_RESTORE_BAR1_SIZE_BUG_3249028_WAR if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_KBUS_RESTORE_BAR1_SIZE_BUG_3249028_WAR, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KBUS_RESTORE_BAR1_SIZE_BUG_3249028_WAR, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_KBUS_RESTORE_BAR1_SIZE_BUG_3249028_WAR, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KBUS_RESTORE_BAR1_SIZE_BUG_3249028_WAR, NV_FALSE); } // Hal field -- bBar1Disabled // default { - pThis->bBar1Disabled = ((NvBool)(0 != 0)); + pThis->bBar1Disabled = NV_FALSE; } // Hal field -- bCpuVisibleBar2Disabled // default { - pThis->bCpuVisibleBar2Disabled = ((NvBool)(0 != 0)); + pThis->bCpuVisibleBar2Disabled = NV_FALSE; } // Hal field -- bBar1DiscontigEnabled // default { - pThis->bBar1DiscontigEnabled = ((NvBool)(0 == 0)); + pThis->bBar1DiscontigEnabled = NV_TRUE; } } @@ -303,46 +321,6 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusInitBarsSize__ = &kbusInitBarsSize_KERNEL; } - // kbusConstructEngine -- virtual override (engstate) base (engstate) - pThis->__kbusConstructEngine__ = &kbusConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelBus_engstateConstructEngine; - - // kbusStatePreInitLocked -- virtual halified (singleton optimized) override (engstate) base (engstate) body - pThis->__kbusStatePreInitLocked__ = &kbusStatePreInitLocked_GM107; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_KernelBus_engstateStatePreInitLocked; - - // kbusStateInitLocked -- virtual override (engstate) base (engstate) - pThis->__kbusStateInitLocked__ = &kbusStateInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelBus_engstateStateInitLocked; - - // kbusStatePreLoad -- virtual halified (singleton optimized) override (engstate) base (engstate) body - pThis->__kbusStatePreLoad__ = &kbusStatePreLoad_GM107; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ = &__nvoc_down_thunk_KernelBus_engstateStatePreLoad; - - // kbusStateLoad -- virtual halified (singleton optimized) override (engstate) base (engstate) body - pThis->__kbusStateLoad__ = &kbusStateLoad_GM107; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelBus_engstateStateLoad; - - // kbusStatePostLoad -- virtual halified (singleton optimized) override (engstate) base (engstate) body - pThis->__kbusStatePostLoad__ = &kbusStatePostLoad_GM107; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_KernelBus_engstateStatePostLoad; - - // kbusStatePreUnload -- virtual halified (singleton optimized) override (engstate) base (engstate) body - pThis->__kbusStatePreUnload__ = &kbusStatePreUnload_GM107; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_down_thunk_KernelBus_engstateStatePreUnload; - - // kbusStateUnload -- virtual halified (singleton optimized) override (engstate) base (engstate) body - pThis->__kbusStateUnload__ = &kbusStateUnload_GM107; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelBus_engstateStateUnload; - - // kbusStatePostUnload -- virtual halified (singleton optimized) override (engstate) base (engstate) body - pThis->__kbusStatePostUnload__ = &kbusStatePostUnload_GM107; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ = &__nvoc_down_thunk_KernelBus_engstateStatePostUnload; - - // kbusStateDestroy -- virtual halified (singleton optimized) override (engstate) base (engstate) - pThis->__kbusStateDestroy__ = &kbusStateDestroy_GM107; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelBus_engstateStateDestroy; - // kbusBar2IsReady -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { @@ -648,7 +626,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * // kbusNeedWarForBug999673 -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->__kbusNeedWarForBug999673__ = &kbusNeedWarForBug999673_491d52; + pThis->__kbusNeedWarForBug999673__ = &kbusNeedWarForBug999673_3dd2c9; } else { @@ -687,39 +665,6 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusUnreserveP2PPeerIds__ = &kbusUnreserveP2PPeerIds_GP100; } - // kbusIsBar1P2PCapable -- halified (2 hals) body - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ - { - pThis->__kbusIsBar1P2PCapable__ = &kbusIsBar1P2PCapable_GH100; - } - // default - else - { - pThis->__kbusIsBar1P2PCapable__ = &kbusIsBar1P2PCapable_bf6dfa; - } - - // kbusEnableStaticBar1Mapping -- halified (2 hals) body - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ - { - pThis->__kbusEnableStaticBar1Mapping__ = &kbusEnableStaticBar1Mapping_GH100; - } - // default - else - { - pThis->__kbusEnableStaticBar1Mapping__ = &kbusEnableStaticBar1Mapping_395e98; - } - - // kbusDisableStaticBar1Mapping -- halified (2 hals) body - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ - { - pThis->__kbusDisableStaticBar1Mapping__ = &kbusDisableStaticBar1Mapping_GH100; - } - // default - else - { - pThis->__kbusDisableStaticBar1Mapping__ = &kbusDisableStaticBar1Mapping_d44104; - } - // kbusGetBar1P2PDmaInfo -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { @@ -731,28 +676,6 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusGetBar1P2PDmaInfo__ = &kbusGetBar1P2PDmaInfo_395e98; } - // kbusUpdateStaticBar1VAMapping -- halified (2 hals) body - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ - { - pThis->__kbusUpdateStaticBar1VAMapping__ = &kbusUpdateStaticBar1VAMapping_GH100; - } - // default - else - { - pThis->__kbusUpdateStaticBar1VAMapping__ = &kbusUpdateStaticBar1VAMapping_395e98; - } - - // kbusGetStaticFbAperture -- halified (2 hals) body - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ - { - pThis->__kbusGetStaticFbAperture__ = &kbusGetStaticFbAperture_GH100; - } - // default - else - { - pThis->__kbusGetStaticFbAperture__ = &kbusGetStaticFbAperture_395e98; - } - // kbusCreateP2PMappingForBar1P2P -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { @@ -783,7 +706,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * // default else { - pThis->__kbusHasPcieBar1P2PMapping__ = &kbusHasPcieBar1P2PMapping_bf6dfa; + pThis->__kbusHasPcieBar1P2PMapping__ = &kbusHasPcieBar1P2PMapping_d69453; } // kbusIsPcieBar1P2PMappingSupported -- halified (2 hals) body @@ -794,7 +717,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * // default else { - pThis->__kbusIsPcieBar1P2PMappingSupported__ = &kbusIsPcieBar1P2PMappingSupported_bf6dfa; + pThis->__kbusIsPcieBar1P2PMappingSupported__ = &kbusIsPcieBar1P2PMappingSupported_d69453; } // kbusCheckFlaSupportedAndInit -- halified (2 hals) body @@ -802,6 +725,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * { pThis->__kbusCheckFlaSupportedAndInit__ = &kbusCheckFlaSupportedAndInit_GA100; } + // default else { pThis->__kbusCheckFlaSupportedAndInit__ = &kbusCheckFlaSupportedAndInit_ac1694; @@ -857,6 +781,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * { pThis->__kbusAllocateLegacyFlaVaspace__ = &kbusAllocateLegacyFlaVaspace_GA100; } + // default else { pThis->__kbusAllocateLegacyFlaVaspace__ = &kbusAllocateLegacyFlaVaspace_395e98; @@ -867,6 +792,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * { pThis->__kbusAllocateHostManagedFlaVaspace__ = &kbusAllocateHostManagedFlaVaspace_GA100; } + // default else { pThis->__kbusAllocateHostManagedFlaVaspace__ = &kbusAllocateHostManagedFlaVaspace_395e98; @@ -892,6 +818,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * { pThis->__kbusGetFlaVaspace__ = &kbusGetFlaVaspace_GA100; } + // default else { pThis->__kbusGetFlaVaspace__ = &kbusGetFlaVaspace_395e98; @@ -902,6 +829,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * { pThis->__kbusDestroyHostManagedFlaVaspace__ = &kbusDestroyHostManagedFlaVaspace_GA100; } + // default else { pThis->__kbusDestroyHostManagedFlaVaspace__ = &kbusDestroyHostManagedFlaVaspace_d44104; @@ -912,9 +840,10 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * { pThis->__kbusVerifyFlaRange__ = &kbusVerifyFlaRange_GA100; } + // default else { - pThis->__kbusVerifyFlaRange__ = &kbusVerifyFlaRange_bf6dfa; + pThis->__kbusVerifyFlaRange__ = &kbusVerifyFlaRange_d69453; } // kbusConstructFlaInstBlk -- halified (2 hals) body @@ -922,6 +851,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * { pThis->__kbusConstructFlaInstBlk__ = &kbusConstructFlaInstBlk_GA100; } + // default else { pThis->__kbusConstructFlaInstBlk__ = &kbusConstructFlaInstBlk_395e98; @@ -932,6 +862,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * { pThis->__kbusDestructFlaInstBlk__ = &kbusDestructFlaInstBlk_GA100; } + // default else { pThis->__kbusDestructFlaInstBlk__ = &kbusDestructFlaInstBlk_d44104; @@ -942,6 +873,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * { pThis->__kbusValidateFlaBaseAddress__ = &kbusValidateFlaBaseAddress_GA100; } + // default else { pThis->__kbusValidateFlaBaseAddress__ = &kbusValidateFlaBaseAddress_395e98; @@ -956,6 +888,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * { pThis->__kbusSetupUnbindFla__ = &kbusSetupUnbindFla_GH100; } + // default else { pThis->__kbusSetupUnbindFla__ = &kbusSetupUnbindFla_46f6a7; @@ -970,6 +903,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * { pThis->__kbusSetupBindFla__ = &kbusSetupBindFla_GH100; } + // default else { pThis->__kbusSetupBindFla__ = &kbusSetupBindFla_46f6a7; @@ -1090,7 +1024,7 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * } else { - pThis->__kbusValidateBAR0WindowBase__ = &kbusValidateBAR0WindowBase_ceaee8; + pThis->__kbusValidateBAR0WindowBase__ = &kbusValidateBAR0WindowBase_72a2e1; } // kbusSetBAR0WindowVidOffset -- halified (3 hals) body @@ -1394,24 +1328,66 @@ static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner * pThis->__kbusGetEccCounts__ = &kbusGetEccCounts_4a4dee; } - // kbusInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__kbusInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kbusInitMissing; - - // kbusStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kbusStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kbusStatePreInitUnlocked; - - // kbusStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kbusStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kbusStateInitUnlocked; - - // kbusIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__kbusIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kbusIsPresent; -} // End __nvoc_init_funcTable_KernelBus_1 with approximately 231 basic block(s). + // kbusGetPFBar1Spa -- halified (3 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__kbusGetPFBar1Spa__ = &kbusGetPFBar1Spa_46f6a7; + } + else + { + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__kbusGetPFBar1Spa__ = &kbusGetPFBar1Spa_GB100; + } + // default + else + { + pThis->__kbusGetPFBar1Spa__ = &kbusGetPFBar1Spa_46f6a7; + } + } +} // End __nvoc_init_funcTable_KernelBus_1 with approximately 200 basic block(s). -// Initialize vtable(s) for 107 virtual method(s). +// Initialize vtable(s) for 103 virtual method(s). void __nvoc_init_funcTable_KernelBus(KernelBus *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 107 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelBus vtable = { + .__kbusConstructEngine__ = &kbusConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelBus_engstateConstructEngine, // virtual + .__kbusStatePreInitLocked__ = &kbusStatePreInitLocked_GM107, // virtual halified (singleton optimized) override (engstate) base (engstate) body + .OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_KernelBus_engstateStatePreInitLocked, // virtual + .__kbusStateInitLocked__ = &kbusStateInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelBus_engstateStateInitLocked, // virtual + .__kbusStatePreLoad__ = &kbusStatePreLoad_GM107, // virtual halified (singleton optimized) override (engstate) base (engstate) body + .OBJENGSTATE.__engstateStatePreLoad__ = &__nvoc_down_thunk_KernelBus_engstateStatePreLoad, // virtual + .__kbusStateLoad__ = &kbusStateLoad_GM107, // virtual halified (singleton optimized) override (engstate) base (engstate) body + .OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelBus_engstateStateLoad, // virtual + .__kbusStatePostLoad__ = &kbusStatePostLoad_GM107, // virtual halified (singleton optimized) override (engstate) base (engstate) body + .OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_KernelBus_engstateStatePostLoad, // virtual + .__kbusStatePreUnload__ = &kbusStatePreUnload_GM107, // virtual halified (singleton optimized) override (engstate) base (engstate) body + .OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_down_thunk_KernelBus_engstateStatePreUnload, // virtual + .__kbusStateUnload__ = &kbusStateUnload_GM107, // virtual halified (singleton optimized) override (engstate) base (engstate) body + .OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelBus_engstateStateUnload, // virtual + .__kbusStatePostUnload__ = &kbusStatePostUnload_GM107, // virtual halified (singleton optimized) override (engstate) base (engstate) body + .OBJENGSTATE.__engstateStatePostUnload__ = &__nvoc_down_thunk_KernelBus_engstateStatePostUnload, // virtual + .__kbusStateDestroy__ = &kbusStateDestroy_GM107, // virtual halified (singleton optimized) override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelBus_engstateStateDestroy, // virtual + .__kbusInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kbusInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__kbusStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kbusStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__kbusStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kbusStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__kbusIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kbusIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_vtable = &vtable; // (kbus) this + + // Initialize vtable(s) with 89 per-object function pointer(s). __nvoc_init_funcTable_KernelBus_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kern_bus_nvoc.h b/src/nvidia/generated/g_kern_bus_nvoc.h index bb745fdbe4..a53128b3f9 100644 --- a/src/nvidia/generated/g_kern_bus_nvoc.h +++ b/src/nvidia/generated/g_kern_bus_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -113,6 +113,8 @@ typedef enum #define BUS_MAP_FB_FLAGS_MAP_UNICAST NVBIT(5) #define BUS_MAP_FB_FLAGS_MAP_OFFSET_FIXED NVBIT(6) #define BUS_MAP_FB_FLAGS_PRE_INIT NVBIT(7) +#define BUS_MAP_FB_FLAGS_ALLOW_DISCONTIG NVBIT(8) +#define BUS_MAP_FB_FLAGS_UNMANAGED_MEM_AREA NVBIT(9) #define BUS_MAP_FB_FLAGS_FERMI_INVALID ~(BUS_MAP_FB_FLAGS_MAP_DOWNWARDS | \ BUS_MAP_FB_FLAGS_DISABLE_ENCRYPTION | \ @@ -120,7 +122,9 @@ typedef enum BUS_MAP_FB_FLAGS_WRITE_ONLY | \ BUS_MAP_FB_FLAGS_MAP_UNICAST | \ BUS_MAP_FB_FLAGS_MAP_OFFSET_FIXED | \ - BUS_MAP_FB_FLAGS_PRE_INIT) + BUS_MAP_FB_FLAGS_PRE_INIT | \ + BUS_MAP_FB_FLAGS_ALLOW_DISCONTIG | \ + BUS_MAP_FB_FLAGS_UNMANAGED_MEM_AREA) #define BUS_MAP_FB_FLAGS_NV5X_INVALID ~(BUS_MAP_FB_FLAGS_MAP_RSVD_BAR1 | BUS_MAP_FB_FLAGS_DISABLE_ENCRYPTION) @@ -131,8 +135,9 @@ typedef enum // // kbusFlush flags // -#define BUS_FLUSH_VIDEO_MEMORY NVBIT(0) -#define BUS_FLUSH_SYSTEM_MEMORY NVBIT(1) +#define BUS_FLUSH_VIDEO_MEMORY NVBIT(0) +#define BUS_FLUSH_SYSTEM_MEMORY NVBIT(1) +#define BUS_FLUSH_VIDEO_MEMORY_VIA_PRAMIN_WINDOW NVBIT(2) // // Peer to peer (P2P) defines @@ -164,6 +169,9 @@ typedef enum #define COHERENT_CPU_MAPPING_REGION_2 0x2 #define COHERENT_CPU_MAPPING_TOTAL_REGIONS 0x3 // Should change it when num of regions changed +#define ALIGN_64K(addr) (NV_ALIGN_DOWN64(addr, 0x10000)) +#define ALIGN_64K_OFFSET(addr) (addr & 0xFFFF) + typedef struct { NvU64 vAddr; // Bar2 addr returned by eheap @@ -210,9 +218,14 @@ typedef struct Device Device; #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + +// Metadata including vtable +struct NVOC_VTABLE__KernelBus; + struct __nvoc_inner_struc_KernelBus_1__ { RmPhysAddr physAddr; NvU64 apertureLength; + NvU64 mappableLength; struct OBJVASPACE *pVAS; NvU64 instBlockBase; MEMORY_DESCRIPTOR *pInstBlkMemDesc; @@ -335,6 +348,7 @@ struct KernelBus { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelBus *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -344,18 +358,8 @@ struct KernelBus { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct KernelBus *__nvoc_pbase_KernelBus; // kbus - // Vtable with 107 per-object function pointers + // Vtable with 89 per-object function pointers NV_STATUS (*__kbusInitBarsSize__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (2 hals) - NV_STATUS (*__kbusConstructEngine__)(struct OBJGPU *, struct KernelBus * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) - NV_STATUS (*__kbusStatePreInitLocked__)(struct OBJGPU *, struct KernelBus * /*this*/); // virtual halified (singleton optimized) override (engstate) base (engstate) body - NV_STATUS (*__kbusStateInitLocked__)(struct OBJGPU *, struct KernelBus * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__kbusStatePreLoad__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body - NV_STATUS (*__kbusStateLoad__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body - NV_STATUS (*__kbusStatePostLoad__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body - NV_STATUS (*__kbusStatePreUnload__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body - NV_STATUS (*__kbusStateUnload__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body - NV_STATUS (*__kbusStatePostUnload__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body - void (*__kbusStateDestroy__)(struct OBJGPU *, struct KernelBus * /*this*/); // virtual halified (singleton optimized) override (engstate) base (engstate) NvBool (*__kbusBar2IsReady__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (2 hals) body NvU8 * (*__kbusMapBar2Aperture__)(struct OBJGPU *, struct KernelBus * /*this*/, MEMORY_DESCRIPTOR *, NvU32); // halified (2 hals) body NvU8 * (*__kbusValidateBar2ApertureMapping__)(struct OBJGPU *, struct KernelBus * /*this*/, MEMORY_DESCRIPTOR *, NvU8 *); // halified (2 hals) body @@ -388,12 +392,7 @@ struct KernelBus { NV_STATUS (*__kbusCreateP2PMappingForC2C__)(struct OBJGPU *, struct KernelBus * /*this*/, struct OBJGPU *, struct KernelBus *, NvU32 *, NvU32 *, NvU32); // halified (2 hals) body NV_STATUS (*__kbusRemoveP2PMappingForC2C__)(struct OBJGPU *, struct KernelBus * /*this*/, struct OBJGPU *, struct KernelBus *, NvU32, NvU32, NvU32); // halified (2 hals) body NV_STATUS (*__kbusUnreserveP2PPeerIds__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // halified (2 hals) body - NvBool (*__kbusIsBar1P2PCapable__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // halified (2 hals) body - NV_STATUS (*__kbusEnableStaticBar1Mapping__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // halified (2 hals) body - void (*__kbusDisableStaticBar1Mapping__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // halified (2 hals) body NV_STATUS (*__kbusGetBar1P2PDmaInfo__)(struct OBJGPU *, struct OBJGPU *, struct KernelBus * /*this*/, NvU64 *, NvU64 *); // halified (2 hals) body - NV_STATUS (*__kbusUpdateStaticBar1VAMapping__)(struct OBJGPU *, struct KernelBus * /*this*/, MEMORY_DESCRIPTOR *, NvU64, NvU64, NvBool); // halified (2 hals) body - NV_STATUS (*__kbusGetStaticFbAperture__)(struct OBJGPU *, struct KernelBus * /*this*/, MEMORY_DESCRIPTOR *, NvU64, NvU64 *, NvU64 *, NvU32); // halified (2 hals) body NV_STATUS (*__kbusCreateP2PMappingForBar1P2P__)(struct OBJGPU *, struct KernelBus * /*this*/, struct OBJGPU *, struct KernelBus *, NvU32); // halified (2 hals) body NV_STATUS (*__kbusRemoveP2PMappingForBar1P2P__)(struct OBJGPU *, struct KernelBus * /*this*/, struct OBJGPU *, struct KernelBus *, NvU32); // halified (2 hals) body NvBool (*__kbusHasPcieBar1P2PMapping__)(struct OBJGPU *, struct KernelBus * /*this*/, struct OBJGPU *, struct KernelBus *); // halified (2 hals) body @@ -448,10 +447,7 @@ struct KernelBus { void (*__kbusTeardownCoherentCpuMapping__)(struct OBJGPU *, struct KernelBus * /*this*/, NvBool); // halified (2 hals) body NV_STATUS (*__kbusBar1InstBlkBind__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (3 hals) body NvU32 (*__kbusGetEccCounts__)(struct OBJGPU *, struct KernelBus * /*this*/); // halified (2 hals) body - void (*__kbusInitMissing__)(struct OBJGPU *, struct KernelBus * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kbusStatePreInitUnlocked__)(struct OBJGPU *, struct KernelBus * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kbusStateInitUnlocked__)(struct OBJGPU *, struct KernelBus * /*this*/); // virtual inherited (engstate) base (engstate) - NvBool (*__kbusIsPresent__)(struct OBJGPU *, struct KernelBus * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kbusGetPFBar1Spa__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU64 *); // halified (3 hals) body // 3 PDB properties NvBool PDB_PROP_KBUS_NVLINK_DECONFIG_HSHUB_ON_NO_MAPPING; @@ -518,6 +514,28 @@ struct KernelBus { NvBool bCpuVisibleBar2Disabled; NvBool bForceBarAccessOnHcc; NvBool bBar1DiscontigEnabled; + NvU32 staticBar1ForceType; +}; + + +// Metadata including vtable with 14 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelBus { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + + NV_STATUS (*__kbusConstructEngine__)(struct OBJGPU *, struct KernelBus * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kbusStatePreInitLocked__)(struct OBJGPU *, struct KernelBus * /*this*/); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kbusStateInitLocked__)(struct OBJGPU *, struct KernelBus * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kbusStatePreLoad__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kbusStateLoad__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kbusStatePostLoad__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kbusStatePreUnload__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kbusStateUnload__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kbusStatePostUnload__)(struct OBJGPU *, struct KernelBus * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + void (*__kbusStateDestroy__)(struct OBJGPU *, struct KernelBus * /*this*/); // virtual halified (singleton optimized) override (engstate) base (engstate) + void (*__kbusInitMissing__)(struct OBJGPU *, struct KernelBus * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kbusStatePreInitUnlocked__)(struct OBJGPU *, struct KernelBus * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kbusStateInitUnlocked__)(struct OBJGPU *, struct KernelBus * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__kbusIsPresent__)(struct OBJGPU *, struct KernelBus * /*this*/); // virtual inherited (engstate) base (engstate) }; #ifndef __NVOC_CLASS_KernelBus_TYPEDEF__ @@ -561,32 +579,32 @@ NV_STATUS __nvoc_objCreate_KernelBus(KernelBus**, Dynamic*, NvU32); #define kbusInitBarsSize_FNPTR(pKernelBus) pKernelBus->__kbusInitBarsSize__ #define kbusInitBarsSize(pGpu, pKernelBus) kbusInitBarsSize_DISPATCH(pGpu, pKernelBus) #define kbusInitBarsSize_HAL(pGpu, pKernelBus) kbusInitBarsSize_DISPATCH(pGpu, pKernelBus) -#define kbusConstructEngine_FNPTR(pKernelBus) pKernelBus->__kbusConstructEngine__ +#define kbusConstructEngine_FNPTR(pKernelBus) pKernelBus->__nvoc_vtable->__kbusConstructEngine__ #define kbusConstructEngine(pGpu, pKernelBus, arg3) kbusConstructEngine_DISPATCH(pGpu, pKernelBus, arg3) -#define kbusStatePreInitLocked_FNPTR(pKernelBus) pKernelBus->__kbusStatePreInitLocked__ +#define kbusStatePreInitLocked_FNPTR(pKernelBus) pKernelBus->__nvoc_vtable->__kbusStatePreInitLocked__ #define kbusStatePreInitLocked(pGpu, pKernelBus) kbusStatePreInitLocked_DISPATCH(pGpu, pKernelBus) #define kbusStatePreInitLocked_HAL(pGpu, pKernelBus) kbusStatePreInitLocked_DISPATCH(pGpu, pKernelBus) -#define kbusStateInitLocked_FNPTR(pKernelBus) pKernelBus->__kbusStateInitLocked__ +#define kbusStateInitLocked_FNPTR(pKernelBus) pKernelBus->__nvoc_vtable->__kbusStateInitLocked__ #define kbusStateInitLocked(pGpu, pKernelBus) kbusStateInitLocked_DISPATCH(pGpu, pKernelBus) -#define kbusStatePreLoad_FNPTR(pKernelBus) pKernelBus->__kbusStatePreLoad__ +#define kbusStatePreLoad_FNPTR(pKernelBus) pKernelBus->__nvoc_vtable->__kbusStatePreLoad__ #define kbusStatePreLoad(pGpu, pKernelBus, arg3) kbusStatePreLoad_DISPATCH(pGpu, pKernelBus, arg3) #define kbusStatePreLoad_HAL(pGpu, pKernelBus, arg3) kbusStatePreLoad_DISPATCH(pGpu, pKernelBus, arg3) -#define kbusStateLoad_FNPTR(pKernelBus) pKernelBus->__kbusStateLoad__ +#define kbusStateLoad_FNPTR(pKernelBus) pKernelBus->__nvoc_vtable->__kbusStateLoad__ #define kbusStateLoad(pGpu, pKernelBus, arg3) kbusStateLoad_DISPATCH(pGpu, pKernelBus, arg3) #define kbusStateLoad_HAL(pGpu, pKernelBus, arg3) kbusStateLoad_DISPATCH(pGpu, pKernelBus, arg3) -#define kbusStatePostLoad_FNPTR(pKernelBus) pKernelBus->__kbusStatePostLoad__ +#define kbusStatePostLoad_FNPTR(pKernelBus) pKernelBus->__nvoc_vtable->__kbusStatePostLoad__ #define kbusStatePostLoad(pGpu, pKernelBus, arg3) kbusStatePostLoad_DISPATCH(pGpu, pKernelBus, arg3) #define kbusStatePostLoad_HAL(pGpu, pKernelBus, arg3) kbusStatePostLoad_DISPATCH(pGpu, pKernelBus, arg3) -#define kbusStatePreUnload_FNPTR(pKernelBus) pKernelBus->__kbusStatePreUnload__ +#define kbusStatePreUnload_FNPTR(pKernelBus) pKernelBus->__nvoc_vtable->__kbusStatePreUnload__ #define kbusStatePreUnload(pGpu, pKernelBus, arg3) kbusStatePreUnload_DISPATCH(pGpu, pKernelBus, arg3) #define kbusStatePreUnload_HAL(pGpu, pKernelBus, arg3) kbusStatePreUnload_DISPATCH(pGpu, pKernelBus, arg3) -#define kbusStateUnload_FNPTR(pKernelBus) pKernelBus->__kbusStateUnload__ +#define kbusStateUnload_FNPTR(pKernelBus) pKernelBus->__nvoc_vtable->__kbusStateUnload__ #define kbusStateUnload(pGpu, pKernelBus, flags) kbusStateUnload_DISPATCH(pGpu, pKernelBus, flags) #define kbusStateUnload_HAL(pGpu, pKernelBus, flags) kbusStateUnload_DISPATCH(pGpu, pKernelBus, flags) -#define kbusStatePostUnload_FNPTR(pKernelBus) pKernelBus->__kbusStatePostUnload__ +#define kbusStatePostUnload_FNPTR(pKernelBus) pKernelBus->__nvoc_vtable->__kbusStatePostUnload__ #define kbusStatePostUnload(pGpu, pKernelBus, flags) kbusStatePostUnload_DISPATCH(pGpu, pKernelBus, flags) #define kbusStatePostUnload_HAL(pGpu, pKernelBus, flags) kbusStatePostUnload_DISPATCH(pGpu, pKernelBus, flags) -#define kbusStateDestroy_FNPTR(pKernelBus) pKernelBus->__kbusStateDestroy__ +#define kbusStateDestroy_FNPTR(pKernelBus) pKernelBus->__nvoc_vtable->__kbusStateDestroy__ #define kbusStateDestroy(pGpu, pKernelBus) kbusStateDestroy_DISPATCH(pGpu, pKernelBus) #define kbusStateDestroy_HAL(pGpu, pKernelBus) kbusStateDestroy_DISPATCH(pGpu, pKernelBus) #define kbusBar2IsReady_FNPTR(pKernelBus) pKernelBus->__kbusBar2IsReady__ @@ -687,24 +705,9 @@ NV_STATUS __nvoc_objCreate_KernelBus(KernelBus**, Dynamic*, NvU32); #define kbusUnreserveP2PPeerIds_FNPTR(pKernelBus) pKernelBus->__kbusUnreserveP2PPeerIds__ #define kbusUnreserveP2PPeerIds(pGpu, pKernelBus, peerMask) kbusUnreserveP2PPeerIds_DISPATCH(pGpu, pKernelBus, peerMask) #define kbusUnreserveP2PPeerIds_HAL(pGpu, pKernelBus, peerMask) kbusUnreserveP2PPeerIds_DISPATCH(pGpu, pKernelBus, peerMask) -#define kbusIsBar1P2PCapable_FNPTR(pKernelBus) pKernelBus->__kbusIsBar1P2PCapable__ -#define kbusIsBar1P2PCapable(pGpu, pKernelBus, gfid) kbusIsBar1P2PCapable_DISPATCH(pGpu, pKernelBus, gfid) -#define kbusIsBar1P2PCapable_HAL(pGpu, pKernelBus, gfid) kbusIsBar1P2PCapable_DISPATCH(pGpu, pKernelBus, gfid) -#define kbusEnableStaticBar1Mapping_FNPTR(pKernelBus) pKernelBus->__kbusEnableStaticBar1Mapping__ -#define kbusEnableStaticBar1Mapping(pGpu, pKernelBus, gfid) kbusEnableStaticBar1Mapping_DISPATCH(pGpu, pKernelBus, gfid) -#define kbusEnableStaticBar1Mapping_HAL(pGpu, pKernelBus, gfid) kbusEnableStaticBar1Mapping_DISPATCH(pGpu, pKernelBus, gfid) -#define kbusDisableStaticBar1Mapping_FNPTR(pKernelBus) pKernelBus->__kbusDisableStaticBar1Mapping__ -#define kbusDisableStaticBar1Mapping(pGpu, pKernelBus, gfid) kbusDisableStaticBar1Mapping_DISPATCH(pGpu, pKernelBus, gfid) -#define kbusDisableStaticBar1Mapping_HAL(pGpu, pKernelBus, gfid) kbusDisableStaticBar1Mapping_DISPATCH(pGpu, pKernelBus, gfid) #define kbusGetBar1P2PDmaInfo_FNPTR(pPeerKernelBus) pPeerKernelBus->__kbusGetBar1P2PDmaInfo__ #define kbusGetBar1P2PDmaInfo(pSrcGpu, pPeerGpu, pPeerKernelBus, dma_addr, dma_size) kbusGetBar1P2PDmaInfo_DISPATCH(pSrcGpu, pPeerGpu, pPeerKernelBus, dma_addr, dma_size) #define kbusGetBar1P2PDmaInfo_HAL(pSrcGpu, pPeerGpu, pPeerKernelBus, dma_addr, dma_size) kbusGetBar1P2PDmaInfo_DISPATCH(pSrcGpu, pPeerGpu, pPeerKernelBus, dma_addr, dma_size) -#define kbusUpdateStaticBar1VAMapping_FNPTR(pKernelBus) pKernelBus->__kbusUpdateStaticBar1VAMapping__ -#define kbusUpdateStaticBar1VAMapping(pGpu, pKernelBus, pMemDesc, offset, length, bRelease) kbusUpdateStaticBar1VAMapping_DISPATCH(pGpu, pKernelBus, pMemDesc, offset, length, bRelease) -#define kbusUpdateStaticBar1VAMapping_HAL(pGpu, pKernelBus, pMemDesc, offset, length, bRelease) kbusUpdateStaticBar1VAMapping_DISPATCH(pGpu, pKernelBus, pMemDesc, offset, length, bRelease) -#define kbusGetStaticFbAperture_FNPTR(pKernelBus) pKernelBus->__kbusGetStaticFbAperture__ -#define kbusGetStaticFbAperture(pGpu, pKernelBus, pMemDesc, offset, pAperOffset, pLength, gfid) kbusGetStaticFbAperture_DISPATCH(pGpu, pKernelBus, pMemDesc, offset, pAperOffset, pLength, gfid) -#define kbusGetStaticFbAperture_HAL(pGpu, pKernelBus, pMemDesc, offset, pAperOffset, pLength, gfid) kbusGetStaticFbAperture_DISPATCH(pGpu, pKernelBus, pMemDesc, offset, pAperOffset, pLength, gfid) #define kbusCreateP2PMappingForBar1P2P_FNPTR(pKernelBus0) pKernelBus0->__kbusCreateP2PMappingForBar1P2P__ #define kbusCreateP2PMappingForBar1P2P(pGpu0, pKernelBus0, pGpu1, pKernelBus1, attributes) kbusCreateP2PMappingForBar1P2P_DISPATCH(pGpu0, pKernelBus0, pGpu1, pKernelBus1, attributes) #define kbusCreateP2PMappingForBar1P2P_HAL(pGpu0, pKernelBus0, pGpu1, pKernelBus1, attributes) kbusCreateP2PMappingForBar1P2P_DISPATCH(pGpu0, pKernelBus0, pGpu1, pKernelBus1, attributes) @@ -867,13 +870,16 @@ NV_STATUS __nvoc_objCreate_KernelBus(KernelBus**, Dynamic*, NvU32); #define kbusGetEccCounts_FNPTR(pKernelBus) pKernelBus->__kbusGetEccCounts__ #define kbusGetEccCounts(pGpu, pKernelBus) kbusGetEccCounts_DISPATCH(pGpu, pKernelBus) #define kbusGetEccCounts_HAL(pGpu, pKernelBus) kbusGetEccCounts_DISPATCH(pGpu, pKernelBus) -#define kbusInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define kbusGetPFBar1Spa_FNPTR(pKernelBus) pKernelBus->__kbusGetPFBar1Spa__ +#define kbusGetPFBar1Spa(pGpu, pKernelBus, pSpaValue) kbusGetPFBar1Spa_DISPATCH(pGpu, pKernelBus, pSpaValue) +#define kbusGetPFBar1Spa_HAL(pGpu, pKernelBus, pSpaValue) kbusGetPFBar1Spa_DISPATCH(pGpu, pKernelBus, pSpaValue) +#define kbusInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define kbusInitMissing(pGpu, pEngstate) kbusInitMissing_DISPATCH(pGpu, pEngstate) -#define kbusStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define kbusStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define kbusStatePreInitUnlocked(pGpu, pEngstate) kbusStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kbusStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kbusStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define kbusStateInitUnlocked(pGpu, pEngstate) kbusStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kbusIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define kbusIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define kbusIsPresent(pGpu, pEngstate) kbusIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions @@ -882,43 +888,43 @@ static inline NV_STATUS kbusInitBarsSize_DISPATCH(struct OBJGPU *pGpu, struct Ke } static inline NV_STATUS kbusConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, ENGDESCRIPTOR arg3) { - return pKernelBus->__kbusConstructEngine__(pGpu, pKernelBus, arg3); + return pKernelBus->__nvoc_vtable->__kbusConstructEngine__(pGpu, pKernelBus, arg3); } static inline NV_STATUS kbusStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusStatePreInitLocked__(pGpu, pKernelBus); + return pKernelBus->__nvoc_vtable->__kbusStatePreInitLocked__(pGpu, pKernelBus); } static inline NV_STATUS kbusStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - return pKernelBus->__kbusStateInitLocked__(pGpu, pKernelBus); + return pKernelBus->__nvoc_vtable->__kbusStateInitLocked__(pGpu, pKernelBus); } static inline NV_STATUS kbusStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg3) { - return pKernelBus->__kbusStatePreLoad__(pGpu, pKernelBus, arg3); + return pKernelBus->__nvoc_vtable->__kbusStatePreLoad__(pGpu, pKernelBus, arg3); } static inline NV_STATUS kbusStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg3) { - return pKernelBus->__kbusStateLoad__(pGpu, pKernelBus, arg3); + return pKernelBus->__nvoc_vtable->__kbusStateLoad__(pGpu, pKernelBus, arg3); } static inline NV_STATUS kbusStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg3) { - return pKernelBus->__kbusStatePostLoad__(pGpu, pKernelBus, arg3); + return pKernelBus->__nvoc_vtable->__kbusStatePostLoad__(pGpu, pKernelBus, arg3); } static inline NV_STATUS kbusStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg3) { - return pKernelBus->__kbusStatePreUnload__(pGpu, pKernelBus, arg3); + return pKernelBus->__nvoc_vtable->__kbusStatePreUnload__(pGpu, pKernelBus, arg3); } static inline NV_STATUS kbusStateUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 flags) { - return pKernelBus->__kbusStateUnload__(pGpu, pKernelBus, flags); + return pKernelBus->__nvoc_vtable->__kbusStateUnload__(pGpu, pKernelBus, flags); } static inline NV_STATUS kbusStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 flags) { - return pKernelBus->__kbusStatePostUnload__(pGpu, pKernelBus, flags); + return pKernelBus->__nvoc_vtable->__kbusStatePostUnload__(pGpu, pKernelBus, flags); } static inline void kbusStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { - pKernelBus->__kbusStateDestroy__(pGpu, pKernelBus); + pKernelBus->__nvoc_vtable->__kbusStateDestroy__(pGpu, pKernelBus); } static inline NvBool kbusBar2IsReady_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus) { @@ -1049,30 +1055,10 @@ static inline NV_STATUS kbusUnreserveP2PPeerIds_DISPATCH(struct OBJGPU *pGpu, st return pKernelBus->__kbusUnreserveP2PPeerIds__(pGpu, pKernelBus, peerMask); } -static inline NvBool kbusIsBar1P2PCapable_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { - return pKernelBus->__kbusIsBar1P2PCapable__(pGpu, pKernelBus, gfid); -} - -static inline NV_STATUS kbusEnableStaticBar1Mapping_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { - return pKernelBus->__kbusEnableStaticBar1Mapping__(pGpu, pKernelBus, gfid); -} - -static inline void kbusDisableStaticBar1Mapping_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { - pKernelBus->__kbusDisableStaticBar1Mapping__(pGpu, pKernelBus, gfid); -} - static inline NV_STATUS kbusGetBar1P2PDmaInfo_DISPATCH(struct OBJGPU *pSrcGpu, struct OBJGPU *pPeerGpu, struct KernelBus *pPeerKernelBus, NvU64 *dma_addr, NvU64 *dma_size) { return pPeerKernelBus->__kbusGetBar1P2PDmaInfo__(pSrcGpu, pPeerGpu, pPeerKernelBus, dma_addr, dma_size); } -static inline NV_STATUS kbusUpdateStaticBar1VAMapping_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 offset, NvU64 length, NvBool bRelease) { - return pKernelBus->__kbusUpdateStaticBar1VAMapping__(pGpu, pKernelBus, pMemDesc, offset, length, bRelease); -} - -static inline NV_STATUS kbusGetStaticFbAperture_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 offset, NvU64 *pAperOffset, NvU64 *pLength, NvU32 gfid) { - return pKernelBus->__kbusGetStaticFbAperture__(pGpu, pKernelBus, pMemDesc, offset, pAperOffset, pLength, gfid); -} - static inline NV_STATUS kbusCreateP2PMappingForBar1P2P_DISPATCH(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 attributes) { return pKernelBus0->__kbusCreateP2PMappingForBar1P2P__(pGpu0, pKernelBus0, pGpu1, pKernelBus1, attributes); } @@ -1289,20 +1275,24 @@ static inline NvU32 kbusGetEccCounts_DISPATCH(struct OBJGPU *pGpu, struct Kernel return pKernelBus->__kbusGetEccCounts__(pGpu, pKernelBus); } +static inline NV_STATUS kbusGetPFBar1Spa_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 *pSpaValue) { + return pKernelBus->__kbusGetPFBar1Spa__(pGpu, pKernelBus, pSpaValue); +} + static inline void kbusInitMissing_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pEngstate) { - pEngstate->__kbusInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kbusInitMissing__(pGpu, pEngstate); } static inline NV_STATUS kbusStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pEngstate) { - return pEngstate->__kbusStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kbusStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kbusStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pEngstate) { - return pEngstate->__kbusStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kbusStateInitUnlocked__(pGpu, pEngstate); } static inline NvBool kbusIsPresent_DISPATCH(struct OBJGPU *pGpu, struct KernelBus *pEngstate) { - return pEngstate->__kbusIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kbusIsPresent__(pGpu, pEngstate); } NV_STATUS kbusConstructHal_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus); @@ -1854,6 +1844,75 @@ static inline void kbusUnlinkP2P(struct OBJGPU *pGpu, struct KernelBus *pKernelB #define kbusUnlinkP2P_HAL(pGpu, pKernelBu) kbusUnlinkP2P(pGpu, pKernelBu) +NvBool kbusIsStaticBar1Supported_TU102(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); + + +#ifdef __nvoc_kern_bus_h_disabled +static inline NvBool kbusIsStaticBar1Supported(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { + NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); + return NV_FALSE; +} +#else //__nvoc_kern_bus_h_disabled +#define kbusIsStaticBar1Supported(pGpu, pKernelBus, gfid) kbusIsStaticBar1Supported_TU102(pGpu, pKernelBus, gfid) +#endif //__nvoc_kern_bus_h_disabled + +#define kbusIsStaticBar1Supported_HAL(pGpu, pKernelBus, gfid) kbusIsStaticBar1Supported(pGpu, pKernelBus, gfid) + +NV_STATUS kbusEnableStaticBar1Mapping_TU102(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); + + +#ifdef __nvoc_kern_bus_h_disabled +static inline NV_STATUS kbusEnableStaticBar1Mapping(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { + NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kern_bus_h_disabled +#define kbusEnableStaticBar1Mapping(pGpu, pKernelBus, gfid) kbusEnableStaticBar1Mapping_TU102(pGpu, pKernelBus, gfid) +#endif //__nvoc_kern_bus_h_disabled + +#define kbusEnableStaticBar1Mapping_HAL(pGpu, pKernelBus, gfid) kbusEnableStaticBar1Mapping(pGpu, pKernelBus, gfid) + +void kbusDisableStaticBar1Mapping_TU102(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); + + +#ifdef __nvoc_kern_bus_h_disabled +static inline void kbusDisableStaticBar1Mapping(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { + NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); +} +#else //__nvoc_kern_bus_h_disabled +#define kbusDisableStaticBar1Mapping(pGpu, pKernelBus, gfid) kbusDisableStaticBar1Mapping_TU102(pGpu, pKernelBus, gfid) +#endif //__nvoc_kern_bus_h_disabled + +#define kbusDisableStaticBar1Mapping_HAL(pGpu, pKernelBus, gfid) kbusDisableStaticBar1Mapping(pGpu, pKernelBus, gfid) + +NV_STATUS kbusUpdateStaticBar1VAMapping_TU102(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvBool bRelease); + + +#ifdef __nvoc_kern_bus_h_disabled +static inline NV_STATUS kbusUpdateStaticBar1VAMapping(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvBool bRelease) { + NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kern_bus_h_disabled +#define kbusUpdateStaticBar1VAMapping(pGpu, pKernelBus, pMemDesc, bRelease) kbusUpdateStaticBar1VAMapping_TU102(pGpu, pKernelBus, pMemDesc, bRelease) +#endif //__nvoc_kern_bus_h_disabled + +#define kbusUpdateStaticBar1VAMapping_HAL(pGpu, pKernelBus, pMemDesc, bRelease) kbusUpdateStaticBar1VAMapping(pGpu, pKernelBus, pMemDesc, bRelease) + +NV_STATUS kbusGetStaticFbAperture_TU102(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, MemoryRange mapRange, MemoryArea *pMemArea, NvU32 flags); + + +#ifdef __nvoc_kern_bus_h_disabled +static inline NV_STATUS kbusGetStaticFbAperture(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, MemoryRange mapRange, MemoryArea *pMemArea, NvU32 flags) { + NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kern_bus_h_disabled +#define kbusGetStaticFbAperture(pGpu, pKernelBus, pMemDesc, mapRange, pMemArea, flags) kbusGetStaticFbAperture_TU102(pGpu, pKernelBus, pMemDesc, mapRange, pMemArea, flags) +#endif //__nvoc_kern_bus_h_disabled + +#define kbusGetStaticFbAperture_HAL(pGpu, pKernelBus, pMemDesc, mapRange, pMemArea, flags) kbusGetStaticFbAperture(pGpu, pKernelBus, pMemDesc, mapRange, pMemArea, flags) + NV_STATUS kbusFlushSingle_GV100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 flags); @@ -1965,6 +2024,19 @@ static inline NV_STATUS kbusDestroyBar2(struct OBJGPU *pGpu, struct KernelBus *p #define kbusDestroyBar2_HAL(pGpu, pKernelBus, gfid) kbusDestroyBar2(pGpu, pKernelBus, gfid) +void kbusUnmapPreservedConsole_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); + + +#ifdef __nvoc_kern_bus_h_disabled +static inline void kbusUnmapPreservedConsole(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { + NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); +} +#else //__nvoc_kern_bus_h_disabled +#define kbusUnmapPreservedConsole(pGpu, pKernelBus, gfid) kbusUnmapPreservedConsole_GM107(pGpu, pKernelBus, gfid) +#endif //__nvoc_kern_bus_h_disabled + +#define kbusUnmapPreservedConsole_HAL(pGpu, pKernelBus, gfid) kbusUnmapPreservedConsole(pGpu, pKernelBus, gfid) + NV_STATUS kbusInitBar1_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); @@ -1993,33 +2065,33 @@ static inline NV_STATUS kbusDestroyBar1(struct OBJGPU *pGpu, struct KernelBus *p #define kbusDestroyBar1_HAL(pGpu, pKernelBus, gfid) kbusDestroyBar1(pGpu, pKernelBus, gfid) -NV_STATUS kbusMapFbAperture_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg3, NvU64 offset, NvU64 *pAperOffset, NvU64 *pLength, NvU32 flags, struct Device *pDevice); +NV_STATUS kbusMapFbAperture_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, MemoryRange mapRange, MemoryArea *pMemoryArea, NvU32 flags, struct Device *pDevice); #ifdef __nvoc_kern_bus_h_disabled -static inline NV_STATUS kbusMapFbAperture(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg3, NvU64 offset, NvU64 *pAperOffset, NvU64 *pLength, NvU32 flags, struct Device *pDevice) { +static inline NV_STATUS kbusMapFbAperture(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, MemoryRange mapRange, MemoryArea *pMemoryArea, NvU32 flags, struct Device *pDevice) { NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_bus_h_disabled -#define kbusMapFbAperture(pGpu, pKernelBus, arg3, offset, pAperOffset, pLength, flags, pDevice) kbusMapFbAperture_GM107(pGpu, pKernelBus, arg3, offset, pAperOffset, pLength, flags, pDevice) +#define kbusMapFbAperture(pGpu, pKernelBus, pMemDesc, mapRange, pMemoryArea, flags, pDevice) kbusMapFbAperture_GM107(pGpu, pKernelBus, pMemDesc, mapRange, pMemoryArea, flags, pDevice) #endif //__nvoc_kern_bus_h_disabled -#define kbusMapFbAperture_HAL(pGpu, pKernelBus, arg3, offset, pAperOffset, pLength, flags, pDevice) kbusMapFbAperture(pGpu, pKernelBus, arg3, offset, pAperOffset, pLength, flags, pDevice) +#define kbusMapFbAperture_HAL(pGpu, pKernelBus, pMemDesc, mapRange, pMemoryArea, flags, pDevice) kbusMapFbAperture(pGpu, pKernelBus, pMemDesc, mapRange, pMemoryArea, flags, pDevice) -NV_STATUS kbusUnmapFbAperture_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg3, NvU64 aperOffset, NvU64 length, NvU32 flags); +NV_STATUS kbusUnmapFbAperture_GM107(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg3, MemoryArea memArea, NvU32 flags); #ifdef __nvoc_kern_bus_h_disabled -static inline NV_STATUS kbusUnmapFbAperture(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg3, NvU64 aperOffset, NvU64 length, NvU32 flags) { +static inline NV_STATUS kbusUnmapFbAperture(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg3, MemoryArea memArea, NvU32 flags) { NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_bus_h_disabled -#define kbusUnmapFbAperture(pGpu, pKernelBus, arg3, aperOffset, length, flags) kbusUnmapFbAperture_GM107(pGpu, pKernelBus, arg3, aperOffset, length, flags) +#define kbusUnmapFbAperture(pGpu, pKernelBus, arg3, memArea, flags) kbusUnmapFbAperture_GM107(pGpu, pKernelBus, arg3, memArea, flags) #endif //__nvoc_kern_bus_h_disabled -#define kbusUnmapFbAperture_HAL(pGpu, pKernelBus, arg3, aperOffset, length, flags) kbusUnmapFbAperture(pGpu, pKernelBus, arg3, aperOffset, length, flags) +#define kbusUnmapFbAperture_HAL(pGpu, pKernelBus, arg3, memArea, flags) kbusUnmapFbAperture(pGpu, pKernelBus, arg3, memArea, flags) void kbusReleaseRmAperture_VBAR2(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, PMEMORY_DESCRIPTOR arg3); @@ -2283,8 +2355,8 @@ RmPhysAddr kbusSetupP2PDomainAccess_GH100(struct OBJGPU *pGpu0, struct KernelBus NvBool kbusNeedWarForBug999673_GM200(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct OBJGPU *pRemoteGpu); -static inline NvBool kbusNeedWarForBug999673_491d52(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct OBJGPU *pRemoteGpu) { - return ((NvBool)(0 != 0)); +static inline NvBool kbusNeedWarForBug999673_3dd2c9(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct OBJGPU *pRemoteGpu) { + return NV_FALSE; } NV_STATUS kbusCreateP2PMappingForC2C_GH100(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 *peer0, NvU32 *peer1, NvU32 attributes); @@ -2305,42 +2377,12 @@ static inline NV_STATUS kbusUnreserveP2PPeerIds_46f6a7(struct OBJGPU *pGpu, stru return NV_ERR_NOT_SUPPORTED; } -NvBool kbusIsBar1P2PCapable_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); - -static inline NvBool kbusIsBar1P2PCapable_bf6dfa(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { - return ((NvBool)(0 != 0)); -} - -NV_STATUS kbusEnableStaticBar1Mapping_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); - -static inline NV_STATUS kbusEnableStaticBar1Mapping_395e98(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { - return NV_ERR_NOT_SUPPORTED; -} - -static inline void kbusDisableStaticBar1Mapping_d44104(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid) { - return; -} - -void kbusDisableStaticBar1Mapping_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 gfid); - NV_STATUS kbusGetBar1P2PDmaInfo_GH100(struct OBJGPU *pSrcGpu, struct OBJGPU *pPeerGpu, struct KernelBus *pPeerKernelBus, NvU64 *dma_addr, NvU64 *dma_size); static inline NV_STATUS kbusGetBar1P2PDmaInfo_395e98(struct OBJGPU *pSrcGpu, struct OBJGPU *pPeerGpu, struct KernelBus *pPeerKernelBus, NvU64 *dma_addr, NvU64 *dma_size) { return NV_ERR_NOT_SUPPORTED; } -NV_STATUS kbusUpdateStaticBar1VAMapping_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 offset, NvU64 length, NvBool bRelease); - -static inline NV_STATUS kbusUpdateStaticBar1VAMapping_395e98(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 offset, NvU64 length, NvBool bRelease) { - return NV_ERR_NOT_SUPPORTED; -} - -NV_STATUS kbusGetStaticFbAperture_GH100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 offset, NvU64 *pAperOffset, NvU64 *pLength, NvU32 gfid); - -static inline NV_STATUS kbusGetStaticFbAperture_395e98(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, NvU64 offset, NvU64 *pAperOffset, NvU64 *pLength, NvU32 gfid) { - return NV_ERR_NOT_SUPPORTED; -} - NV_STATUS kbusCreateP2PMappingForBar1P2P_GH100(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 attributes); static inline NV_STATUS kbusCreateP2PMappingForBar1P2P_395e98(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1, NvU32 attributes) { @@ -2355,14 +2397,14 @@ static inline NV_STATUS kbusRemoveP2PMappingForBar1P2P_395e98(struct OBJGPU *pGp NvBool kbusHasPcieBar1P2PMapping_GH100(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1); -static inline NvBool kbusHasPcieBar1P2PMapping_bf6dfa(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1) { - return ((NvBool)(0 != 0)); +static inline NvBool kbusHasPcieBar1P2PMapping_d69453(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1) { + return NV_FALSE; } NvBool kbusIsPcieBar1P2PMappingSupported_GH100(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1); -static inline NvBool kbusIsPcieBar1P2PMappingSupported_bf6dfa(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1) { - return ((NvBool)(0 != 0)); +static inline NvBool kbusIsPcieBar1P2PMappingSupported_d69453(struct OBJGPU *pGpu0, struct KernelBus *pKernelBus0, struct OBJGPU *pGpu1, struct KernelBus *pKernelBus1) { + return NV_FALSE; } NV_STATUS kbusCheckFlaSupportedAndInit_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 base, NvU64 size); @@ -2429,8 +2471,8 @@ static inline void kbusDestroyHostManagedFlaVaspace_d44104(struct OBJGPU *pGpu, NvBool kbusVerifyFlaRange_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg3, NvU64 arg4); -static inline NvBool kbusVerifyFlaRange_bf6dfa(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg3, NvU64 arg4) { - return ((NvBool)(0 != 0)); +static inline NvBool kbusVerifyFlaRange_d69453(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 arg3, NvU64 arg4) { + return NV_FALSE; } NV_STATUS kbusConstructFlaInstBlk_GA100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 arg3); @@ -2528,9 +2570,9 @@ NvBool kbusValidateBAR0WindowBase_GH100(struct OBJGPU *pGpu, struct KernelBus *p NvBool kbusValidateBAR0WindowBase_GB100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 base); -static inline NvBool kbusValidateBAR0WindowBase_ceaee8(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 base) { +static inline NvBool kbusValidateBAR0WindowBase_72a2e1(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU32 base) { NV_ASSERT_PRECOMP(0); - return ((NvBool)(0 != 0)); + return NV_FALSE; } static inline NV_STATUS kbusSetBAR0WindowVidOffset_56cd7a(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 vidOffset) { @@ -2716,6 +2758,12 @@ static inline NvU32 kbusGetEccCounts_4a4dee(struct OBJGPU *pGpu, struct KernelBu return 0; } +NV_STATUS kbusGetPFBar1Spa_GB100(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 *pSpaValue); + +static inline NV_STATUS kbusGetPFBar1Spa_46f6a7(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvU64 *pSpaValue) { + return NV_ERR_NOT_SUPPORTED; +} + static inline NvBool kbusIsBar1Force64KBMappingEnabled(struct KernelBus *pKernelBus) { return pKernelBus->bBar1Force64KBMapping; } @@ -2789,11 +2837,11 @@ static inline void kbusSetFlaSupported(struct KernelBus *pKernelBus, NvBool bSup } static inline NvBool kbusIsBar1Disabled(struct KernelBus *pKernelBus) { - return pKernelBus->bBar1Disabled; + return (pKernelBus == ((void *)0)) ? NV_FALSE : pKernelBus->bBar1Disabled; } static inline NvBool kbusIsCpuVisibleBar2Disabled(struct KernelBus *pKernelBus) { - return pKernelBus->bCpuVisibleBar2Disabled; + return (pKernelBus == ((void *)0)) ? NV_FALSE : pKernelBus->bCpuVisibleBar2Disabled; } void kbusDestruct_IMPL(struct KernelBus *pKernelBus); @@ -2935,28 +2983,6 @@ static inline NV_STATUS kbusUnmapFbApertureSingle(struct OBJGPU *pGpu, struct Ke #define kbusUnmapFbApertureSingle(pGpu, pKernelBus, arg3, aperOffset, length, flags) kbusUnmapFbApertureSingle_IMPL(pGpu, pKernelBus, arg3, aperOffset, length, flags) #endif //__nvoc_kern_bus_h_disabled -NV_STATUS kbusMapFbApertureByHandle_IMPL(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvHandle hClient, NvHandle hMemory, NvU64 offset, NvU64 size, NvU64 *pBar1Va, struct Device *pDevice); - -#ifdef __nvoc_kern_bus_h_disabled -static inline NV_STATUS kbusMapFbApertureByHandle(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvHandle hClient, NvHandle hMemory, NvU64 offset, NvU64 size, NvU64 *pBar1Va, struct Device *pDevice) { - NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); - return NV_ERR_NOT_SUPPORTED; -} -#else //__nvoc_kern_bus_h_disabled -#define kbusMapFbApertureByHandle(pGpu, pKernelBus, hClient, hMemory, offset, size, pBar1Va, pDevice) kbusMapFbApertureByHandle_IMPL(pGpu, pKernelBus, hClient, hMemory, offset, size, pBar1Va, pDevice) -#endif //__nvoc_kern_bus_h_disabled - -NV_STATUS kbusUnmapFbApertureByHandle_IMPL(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvHandle hClient, NvHandle hMemory, NvU64 bar1Va); - -#ifdef __nvoc_kern_bus_h_disabled -static inline NV_STATUS kbusUnmapFbApertureByHandle(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, NvHandle hClient, NvHandle hMemory, NvU64 bar1Va) { - NV_ASSERT_FAILED_PRECOMP("KernelBus was disabled!"); - return NV_ERR_NOT_SUPPORTED; -} -#else //__nvoc_kern_bus_h_disabled -#define kbusUnmapFbApertureByHandle(pGpu, pKernelBus, hClient, hMemory, bar1Va) kbusUnmapFbApertureByHandle_IMPL(pGpu, pKernelBus, hClient, hMemory, bar1Va) -#endif //__nvoc_kern_bus_h_disabled - NV_STATUS kbusGetBar1VARangeForDevice_IMPL(struct OBJGPU *pGpu, struct KernelBus *pKernelBus, struct Device *pDevice, struct NV_RANGE *arg4); #ifdef __nvoc_kern_bus_h_disabled diff --git a/src/nvidia/generated/g_kern_disp_nvoc.c b/src/nvidia/generated/g_kern_disp_nvoc.c index 588b5879e7..5875dcb787 100644 --- a/src/nvidia/generated/g_kern_disp_nvoc.c +++ b/src/nvidia/generated/g_kern_disp_nvoc.c @@ -75,98 +75,120 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelDisplay = /*pExportInfo=*/ &__nvoc_export_info_KernelDisplay }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_KernelDisplay_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay, ENGDESCRIPTOR engDesc); // this +NV_STATUS __nvoc_down_thunk_KernelDisplay_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay); // this +NV_STATUS __nvoc_down_thunk_KernelDisplay_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay); // this +void __nvoc_down_thunk_KernelDisplay_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay); // this +NV_STATUS __nvoc_down_thunk_KernelDisplay_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay, NvU32 flags); // this +NV_STATUS __nvoc_down_thunk_KernelDisplay_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay, NvU32 flags); // this +void __nvoc_down_thunk_KernelDisplay_intrservRegisterIntrService(OBJGPU *pGpu, struct IntrService *pKernelDisplay, IntrServiceRecord pRecords[175]); // this +NvU32 __nvoc_down_thunk_KernelDisplay_intrservServiceInterrupt(OBJGPU *pGpu, struct IntrService *pKernelDisplay, IntrServiceServiceInterruptArguments *pParams); // this + // 8 down-thunk(s) defined to bridge methods in KernelDisplay from superclasses // kdispConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelDisplay_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay, ENGDESCRIPTOR engDesc) { +NV_STATUS __nvoc_down_thunk_KernelDisplay_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay, ENGDESCRIPTOR engDesc) { return kdispConstructEngine(pGpu, (struct KernelDisplay *)(((unsigned char *) pKernelDisplay) - __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset), engDesc); } // kdispStatePreInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelDisplay_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay) { +NV_STATUS __nvoc_down_thunk_KernelDisplay_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay) { return kdispStatePreInitLocked(pGpu, (struct KernelDisplay *)(((unsigned char *) pKernelDisplay) - __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset)); } // kdispStateInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelDisplay_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay) { +NV_STATUS __nvoc_down_thunk_KernelDisplay_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay) { return kdispStateInitLocked(pGpu, (struct KernelDisplay *)(((unsigned char *) pKernelDisplay) - __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset)); } // kdispStateDestroy: virtual override (engstate) base (engstate) -static void __nvoc_down_thunk_KernelDisplay_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay) { +void __nvoc_down_thunk_KernelDisplay_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay) { kdispStateDestroy(pGpu, (struct KernelDisplay *)(((unsigned char *) pKernelDisplay) - __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset)); } // kdispStateLoad: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelDisplay_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelDisplay_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay, NvU32 flags) { return kdispStateLoad(pGpu, (struct KernelDisplay *)(((unsigned char *) pKernelDisplay) - __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset), flags); } // kdispStateUnload: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelDisplay_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelDisplay_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelDisplay, NvU32 flags) { return kdispStateUnload(pGpu, (struct KernelDisplay *)(((unsigned char *) pKernelDisplay) - __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset), flags); } // kdispRegisterIntrService: virtual override (intrserv) base (intrserv) -static void __nvoc_down_thunk_KernelDisplay_intrservRegisterIntrService(OBJGPU *pGpu, struct IntrService *pKernelDisplay, IntrServiceRecord pRecords[175]) { +void __nvoc_down_thunk_KernelDisplay_intrservRegisterIntrService(OBJGPU *pGpu, struct IntrService *pKernelDisplay, IntrServiceRecord pRecords[175]) { kdispRegisterIntrService(pGpu, (struct KernelDisplay *)(((unsigned char *) pKernelDisplay) - __nvoc_rtti_KernelDisplay_IntrService.offset), pRecords); } // kdispServiceInterrupt: virtual halified (singleton optimized) override (intrserv) base (intrserv) body -static NvU32 __nvoc_down_thunk_KernelDisplay_intrservServiceInterrupt(OBJGPU *pGpu, struct IntrService *pKernelDisplay, IntrServiceServiceInterruptArguments *pParams) { +NvU32 __nvoc_down_thunk_KernelDisplay_intrservServiceInterrupt(OBJGPU *pGpu, struct IntrService *pKernelDisplay, IntrServiceServiceInterruptArguments *pParams) { return kdispServiceInterrupt(pGpu, (struct KernelDisplay *)(((unsigned char *) pKernelDisplay) - __nvoc_rtti_KernelDisplay_IntrService.offset), pParams); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_kdispInitMissing(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStateInitUnlocked(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStatePreLoad(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStatePostLoad(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStatePreUnload(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStatePostUnload(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate, NvU32 arg3); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_kdispIsPresent(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate); // this +NvBool __nvoc_up_thunk_IntrService_kdispClearInterrupt(OBJGPU *pGpu, struct KernelDisplay *pIntrService, IntrServiceClearInterruptArguments *pParams); // this +NV_STATUS __nvoc_up_thunk_IntrService_kdispServiceNotificationInterrupt(OBJGPU *pGpu, struct KernelDisplay *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams); // this + // 10 up-thunk(s) defined to bridge methods in KernelDisplay to superclasses // kdispInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kdispInitMissing(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kdispInitMissing(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset)); } // kdispStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset)); } // kdispStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStateInitUnlocked(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStateInitUnlocked(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset)); } // kdispStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStatePreLoad(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStatePreLoad(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset), arg3); } // kdispStatePostLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStatePostLoad(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStatePostLoad(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate, NvU32 arg3) { return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset), arg3); } // kdispStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStatePreUnload(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStatePreUnload(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset), arg3); } // kdispStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStatePostUnload(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kdispStatePostUnload(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset), arg3); } // kdispIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_kdispIsPresent(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_kdispIsPresent(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelDisplay_OBJENGSTATE.offset)); } // kdispClearInterrupt: virtual inherited (intrserv) base (intrserv) -static NvBool __nvoc_up_thunk_IntrService_kdispClearInterrupt(OBJGPU *pGpu, struct KernelDisplay *pIntrService, IntrServiceClearInterruptArguments *pParams) { +NvBool __nvoc_up_thunk_IntrService_kdispClearInterrupt(OBJGPU *pGpu, struct KernelDisplay *pIntrService, IntrServiceClearInterruptArguments *pParams) { return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_KernelDisplay_IntrService.offset), pParams); } // kdispServiceNotificationInterrupt: virtual inherited (intrserv) base (intrserv) -static NV_STATUS __nvoc_up_thunk_IntrService_kdispServiceNotificationInterrupt(OBJGPU *pGpu, struct KernelDisplay *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { +NV_STATUS __nvoc_up_thunk_IntrService_kdispServiceNotificationInterrupt(OBJGPU *pGpu, struct KernelDisplay *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { return intrservServiceNotificationInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_KernelDisplay_IntrService.offset), pParams); } @@ -205,31 +227,28 @@ void __nvoc_init_dataField_KernelDisplay(KernelDisplay *pThis, RmHalspecOwner *p // NVOC Property Hal field -- PDB_PROP_KDISP_IS_MISSING if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->setProperty(pThis, PDB_PROP_KDISP_IS_MISSING, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KDISP_IS_MISSING, NV_TRUE); } else if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ { - pThis->setProperty(pThis, PDB_PROP_KDISP_IS_MISSING, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KDISP_IS_MISSING, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_KDISP_IMP_ENABLE if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ && (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000003UL) )) /* RmVariantHal: VF | PF_KERNEL_ONLY */ )) { - pThis->setProperty(pThis, PDB_PROP_KDISP_IMP_ENABLE, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KDISP_IMP_ENABLE, NV_TRUE); } - // NVOC Property Hal field -- PDB_PROP_KDISP_BUG_2089053_SERIALIZE_AGGRESSIVE_VBLANK_ALWAYS - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ - { - pThis->setProperty(pThis, PDB_PROP_KDISP_BUG_2089053_SERIALIZE_AGGRESSIVE_VBLANK_ALWAYS, ((NvBool)(0 == 0))); - } + // NVOC Property Hal field -- PDB_PROP_KDISP_IMP_ALLOC_BW_IN_KERNEL_RM_DEF + pThis->setProperty(pThis, PDB_PROP_KDISP_IMP_ALLOC_BW_IN_KERNEL_RM_DEF, NV_TRUE); pThis->setProperty(pThis, PDB_PROP_KDISP_FEATURE_STRETCH_VBLANK_CAPABLE, (0)); pThis->pStaticInfo = ((void *)0); - pThis->bWarPurgeSatellitesOnCoreFree = ((NvBool)(0 != 0)); + pThis->bWarPurgeSatellitesOnCoreFree = NV_FALSE; - pThis->bExtdevIntrSupported = ((NvBool)(0 != 0)); + pThis->bExtdevIntrSupported = NV_FALSE; } NV_STATUS __nvoc_ctor_OBJENGSTATE(OBJENGSTATE* ); @@ -268,40 +287,8 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe PORT_UNREFERENCED_VARIABLE(dispIpHal); PORT_UNREFERENCED_VARIABLE(dispIpHal_HalVarIdx); - // kdispConstructEngine -- virtual override (engstate) base (engstate) - pThis->__kdispConstructEngine__ = &kdispConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelDisplay_engstateConstructEngine; - - // kdispStatePreInitLocked -- virtual override (engstate) base (engstate) - pThis->__kdispStatePreInitLocked__ = &kdispStatePreInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_KernelDisplay_engstateStatePreInitLocked; - - // kdispStateInitLocked -- virtual override (engstate) base (engstate) - pThis->__kdispStateInitLocked__ = &kdispStateInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelDisplay_engstateStateInitLocked; - - // kdispStateDestroy -- virtual override (engstate) base (engstate) - pThis->__kdispStateDestroy__ = &kdispStateDestroy_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelDisplay_engstateStateDestroy; - - // kdispStateLoad -- virtual override (engstate) base (engstate) - pThis->__kdispStateLoad__ = &kdispStateLoad_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelDisplay_engstateStateLoad; - - // kdispStateUnload -- virtual override (engstate) base (engstate) - pThis->__kdispStateUnload__ = &kdispStateUnload_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelDisplay_engstateStateUnload; - - // kdispRegisterIntrService -- virtual override (intrserv) base (intrserv) - pThis->__kdispRegisterIntrService__ = &kdispRegisterIntrService_IMPL; - pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_KernelDisplay_intrservRegisterIntrService; - - // kdispServiceInterrupt -- virtual halified (singleton optimized) override (intrserv) base (intrserv) body - pThis->__kdispServiceInterrupt__ = &kdispServiceInterrupt_acff5e; - pThis->__nvoc_base_IntrService.__intrservServiceInterrupt__ = &__nvoc_down_thunk_KernelDisplay_intrservServiceInterrupt; - // kdispSelectClass -- halified (2 hals) body - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00080000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__kdispSelectClass__ = &kdispSelectClass_46f6a7; } @@ -311,7 +298,7 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe } // kdispGetChannelNum -- halified (2 hals) body - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00080000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__kdispGetChannelNum__ = &kdispGetChannelNum_46f6a7; } @@ -321,7 +308,7 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe } // kdispGetDisplayCapsBaseAndSize -- halified (2 hals) body - if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000400UL) )) /* ChipHal: GA100 | GH100 | GB100 | GB102 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ )) + if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000400UL) )) /* ChipHal: GA100 | GH100 | GB100 | GB102 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00080000UL) )) /* DispIpHal: DISPv0000 */ )) { pThis->__kdispGetDisplayCapsBaseAndSize__ = &kdispGetDisplayCapsBaseAndSize_b3696a; } @@ -331,7 +318,7 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe } // kdispGetDisplaySfUserBaseAndSize -- halified (2 hals) body - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00080000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__kdispGetDisplaySfUserBaseAndSize__ = &kdispGetDisplaySfUserBaseAndSize_b3696a; } @@ -341,7 +328,7 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe } // kdispGetDisplayChannelUserBaseAndSize -- halified (2 hals) body - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00080000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__kdispGetDisplayChannelUserBaseAndSize__ = &kdispGetDisplayChannelUserBaseAndSize_46f6a7; } @@ -353,7 +340,7 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe // kdispGetVgaWorkspaceBase -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000400UL) )) /* ChipHal: GA100 | GH100 | GB100 | GB102 */ { - pThis->__kdispGetVgaWorkspaceBase__ = &kdispGetVgaWorkspaceBase_491d52; + pThis->__kdispGetVgaWorkspaceBase__ = &kdispGetVgaWorkspaceBase_3dd2c9; } else { @@ -372,7 +359,7 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe } // kdispRestoreOriginalLsrMinTime -- halified (2 hals) body - if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000400UL) )) /* ChipHal: GA100 | GH100 | GB100 | GB102 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ )) + if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000400UL) )) /* ChipHal: GA100 | GH100 | GB100 | GB102 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00080000UL) )) /* DispIpHal: DISPv0000 */ )) { pThis->__kdispRestoreOriginalLsrMinTime__ = &kdispRestoreOriginalLsrMinTime_b3696a; } @@ -382,7 +369,7 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe } // kdispComputeLsrMinTimeValue -- halified (2 hals) body - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00080000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__kdispComputeLsrMinTimeValue__ = &kdispComputeLsrMinTimeValue_56cd7a; } @@ -392,7 +379,7 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe } // kdispSetSwapBarrierLsrMinTime -- halified (2 hals) body - if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000400UL) )) /* ChipHal: GA100 | GH100 | GB100 | GB102 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ )) + if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000400UL) )) /* ChipHal: GA100 | GH100 | GB100 | GB102 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00080000UL) )) /* DispIpHal: DISPv0000 */ )) { pThis->__kdispSetSwapBarrierLsrMinTime__ = &kdispSetSwapBarrierLsrMinTime_b3696a; } @@ -423,17 +410,6 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe pThis->__kdispDetectSliLink__ = &kdispDetectSliLink_92bfc3; } - // kdispInitRegistryOverrides -- halified (2 hals) body - if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000400UL) )) /* ChipHal: GA100 | GH100 | GB100 | GB102 */ && (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ )) - { - pThis->__kdispInitRegistryOverrides__ = &kdispInitRegistryOverrides_b3696a; - } - // default - else - { - pThis->__kdispInitRegistryOverrides__ = &kdispInitRegistryOverrides_IMPL; - } - // kdispGetPBTargetAperture -- halified (2 hals) body if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00004c00UL) )) /* DispIpHal: DISPv0400 | DISPv0401 | DISPv0404 */ { @@ -444,43 +420,58 @@ static void __nvoc_init_funcTable_KernelDisplay_1(KernelDisplay *pThis, RmHalspe { pThis->__kdispGetPBTargetAperture__ = &kdispGetPBTargetAperture_15a734; } - - // kdispInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__kdispInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kdispInitMissing; - - // kdispStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kdispStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kdispStatePreInitUnlocked; - - // kdispStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kdispStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kdispStateInitUnlocked; - - // kdispStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__kdispStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kdispStatePreLoad; - - // kdispStatePostLoad -- virtual inherited (engstate) base (engstate) - pThis->__kdispStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kdispStatePostLoad; - - // kdispStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__kdispStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kdispStatePreUnload; - - // kdispStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__kdispStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kdispStatePostUnload; - - // kdispIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__kdispIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kdispIsPresent; - - // kdispClearInterrupt -- virtual inherited (intrserv) base (intrserv) - pThis->__kdispClearInterrupt__ = &__nvoc_up_thunk_IntrService_kdispClearInterrupt; - - // kdispServiceNotificationInterrupt -- virtual inherited (intrserv) base (intrserv) - pThis->__kdispServiceNotificationInterrupt__ = &__nvoc_up_thunk_IntrService_kdispServiceNotificationInterrupt; -} // End __nvoc_init_funcTable_KernelDisplay_1 with approximately 54 basic block(s). +} // End __nvoc_init_funcTable_KernelDisplay_1 with approximately 26 basic block(s). -// Initialize vtable(s) for 32 virtual method(s). +// Initialize vtable(s) for 31 virtual method(s). void __nvoc_init_funcTable_KernelDisplay(KernelDisplay *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 32 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelDisplay vtable = { + .__kdispConstructEngine__ = &kdispConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelDisplay_engstateConstructEngine, // virtual + .__kdispStatePreInitLocked__ = &kdispStatePreInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_KernelDisplay_engstateStatePreInitLocked, // virtual + .__kdispStateInitLocked__ = &kdispStateInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelDisplay_engstateStateInitLocked, // virtual + .__kdispStateDestroy__ = &kdispStateDestroy_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelDisplay_engstateStateDestroy, // virtual + .__kdispStateLoad__ = &kdispStateLoad_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelDisplay_engstateStateLoad, // virtual + .__kdispStateUnload__ = &kdispStateUnload_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelDisplay_engstateStateUnload, // virtual + .__kdispRegisterIntrService__ = &kdispRegisterIntrService_IMPL, // virtual override (intrserv) base (intrserv) + .IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_KernelDisplay_intrservRegisterIntrService, // virtual + .__kdispServiceInterrupt__ = &kdispServiceInterrupt_acff5e, // virtual halified (singleton optimized) override (intrserv) base (intrserv) body + .IntrService.__intrservServiceInterrupt__ = &__nvoc_down_thunk_KernelDisplay_intrservServiceInterrupt, // virtual + .__kdispInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kdispInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__kdispStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kdispStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__kdispStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kdispStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__kdispStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kdispStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__kdispStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kdispStatePostLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL, // virtual + .__kdispStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kdispStatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__kdispStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kdispStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__kdispIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kdispIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + .__kdispClearInterrupt__ = &__nvoc_up_thunk_IntrService_kdispClearInterrupt, // virtual inherited (intrserv) base (intrserv) + .IntrService.__intrservClearInterrupt__ = &intrservClearInterrupt_IMPL, // virtual + .__kdispServiceNotificationInterrupt__ = &__nvoc_up_thunk_IntrService_kdispServiceNotificationInterrupt, // virtual inherited (intrserv) base (intrserv) + .IntrService.__intrservServiceNotificationInterrupt__ = &intrservServiceNotificationInterrupt_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_base_IntrService.__nvoc_vtable = &vtable.IntrService; // (intrserv) super + pThis->__nvoc_vtable = &vtable; // (kdisp) this + + // Initialize vtable(s) with 13 per-object function pointer(s). __nvoc_init_funcTable_KernelDisplay_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kern_disp_nvoc.h b/src/nvidia/generated/g_kern_disp_nvoc.h index 6f8b989a82..5abd40534b 100644 --- a/src/nvidia/generated/g_kern_disp_nvoc.h +++ b/src/nvidia/generated/g_kern_disp_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -113,10 +113,15 @@ typedef struct RgLineCallback RgLineCallback; #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelDisplay; + + struct KernelDisplay { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelDisplay *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -128,15 +133,7 @@ struct KernelDisplay { struct IntrService *__nvoc_pbase_IntrService; // intrserv super struct KernelDisplay *__nvoc_pbase_KernelDisplay; // kdisp - // Vtable with 32 per-object function pointers - NV_STATUS (*__kdispConstructEngine__)(OBJGPU *, struct KernelDisplay * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) - NV_STATUS (*__kdispStatePreInitLocked__)(OBJGPU *, struct KernelDisplay * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__kdispStateInitLocked__)(OBJGPU *, struct KernelDisplay * /*this*/); // virtual override (engstate) base (engstate) - void (*__kdispStateDestroy__)(OBJGPU *, struct KernelDisplay * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__kdispStateLoad__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__kdispStateUnload__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU32); // virtual override (engstate) base (engstate) - void (*__kdispRegisterIntrService__)(OBJGPU *, struct KernelDisplay * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) - NvU32 (*__kdispServiceInterrupt__)(OBJGPU *, struct KernelDisplay * /*this*/, IntrServiceServiceInterruptArguments *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) body + // Vtable with 13 per-object function pointers NV_STATUS (*__kdispSelectClass__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU32); // halified (2 hals) body NV_STATUS (*__kdispGetChannelNum__)(struct KernelDisplay * /*this*/, DISPCHNCLASS, NvU32, NvU32 *); // halified (2 hals) body void (*__kdispGetDisplayCapsBaseAndSize__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU32 *, NvU32 *); // halified (2 hals) body @@ -149,24 +146,12 @@ struct KernelDisplay { void (*__kdispSetSwapBarrierLsrMinTime__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU32, NvU32 *, NvU32); // halified (2 hals) body NV_STATUS (*__kdispGetRgScanLock__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU32, OBJGPU *, NvU32, NvBool *, NvU32 *, NvBool *, NvU32 *); // halified (2 hals) body NV_STATUS (*__kdispDetectSliLink__)(struct KernelDisplay * /*this*/, OBJGPU *, OBJGPU *, NvU32, NvU32); // halified (2 hals) body - void (*__kdispInitRegistryOverrides__)(OBJGPU *, struct KernelDisplay * /*this*/); // halified (2 hals) body NvU32 (*__kdispGetPBTargetAperture__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU32, NvU32); // halified (2 hals) body - void (*__kdispInitMissing__)(struct OBJGPU *, struct KernelDisplay * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kdispStatePreInitUnlocked__)(struct OBJGPU *, struct KernelDisplay * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kdispStateInitUnlocked__)(struct OBJGPU *, struct KernelDisplay * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kdispStatePreLoad__)(struct OBJGPU *, struct KernelDisplay * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kdispStatePostLoad__)(struct OBJGPU *, struct KernelDisplay * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kdispStatePreUnload__)(struct OBJGPU *, struct KernelDisplay * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kdispStatePostUnload__)(struct OBJGPU *, struct KernelDisplay * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NvBool (*__kdispIsPresent__)(struct OBJGPU *, struct KernelDisplay * /*this*/); // virtual inherited (engstate) base (engstate) - NvBool (*__kdispClearInterrupt__)(OBJGPU *, struct KernelDisplay * /*this*/, IntrServiceClearInterruptArguments *); // virtual inherited (intrserv) base (intrserv) - NV_STATUS (*__kdispServiceNotificationInterrupt__)(OBJGPU *, struct KernelDisplay * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual inherited (intrserv) base (intrserv) - // 6 PDB properties + // 5 PDB properties NvBool PDB_PROP_KDISP_IMP_ENABLE; - NvBool PDB_PROP_KDISP_BUG_2089053_SERIALIZE_AGGRESSIVE_VBLANK_ALWAYS; + NvBool PDB_PROP_KDISP_IMP_ALLOC_BW_IN_KERNEL_RM_DEF; NvBool PDB_PROP_KDISP_FEATURE_STRETCH_VBLANK_CAPABLE; - NvBool PDB_PROP_KDISP_BUG_2089053_SERIALIZE_AGGRESSIVE_VBLANKS_ONLY_ON_HMD_ACTIVE; NvBool PDB_PROP_KDISP_IN_AWAKEN_INTR; // Data members @@ -186,6 +171,33 @@ struct KernelDisplay { MEMORY_DESCRIPTOR *pSharedMemDesc; KernelDisplaySharedMem *pSharedData; NvBool bFeatureStretchVblankCapable; + PORT_SPINLOCK *pVblankSpinLock; +}; + + +// Metadata including vtable with 18 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelDisplay { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + const struct NVOC_VTABLE__IntrService IntrService; // (intrserv) 4 function pointers + + NV_STATUS (*__kdispConstructEngine__)(OBJGPU *, struct KernelDisplay * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kdispStatePreInitLocked__)(OBJGPU *, struct KernelDisplay * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kdispStateInitLocked__)(OBJGPU *, struct KernelDisplay * /*this*/); // virtual override (engstate) base (engstate) + void (*__kdispStateDestroy__)(OBJGPU *, struct KernelDisplay * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kdispStateLoad__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kdispStateUnload__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU32); // virtual override (engstate) base (engstate) + void (*__kdispRegisterIntrService__)(OBJGPU *, struct KernelDisplay * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) + NvU32 (*__kdispServiceInterrupt__)(OBJGPU *, struct KernelDisplay * /*this*/, IntrServiceServiceInterruptArguments *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) body + void (*__kdispInitMissing__)(struct OBJGPU *, struct KernelDisplay * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kdispStatePreInitUnlocked__)(struct OBJGPU *, struct KernelDisplay * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kdispStateInitUnlocked__)(struct OBJGPU *, struct KernelDisplay * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kdispStatePreLoad__)(struct OBJGPU *, struct KernelDisplay * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kdispStatePostLoad__)(struct OBJGPU *, struct KernelDisplay * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kdispStatePreUnload__)(struct OBJGPU *, struct KernelDisplay * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kdispStatePostUnload__)(struct OBJGPU *, struct KernelDisplay * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__kdispIsPresent__)(struct OBJGPU *, struct KernelDisplay * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__kdispClearInterrupt__)(OBJGPU *, struct KernelDisplay * /*this*/, IntrServiceClearInterruptArguments *); // virtual inherited (intrserv) base (intrserv) + NV_STATUS (*__kdispServiceNotificationInterrupt__)(OBJGPU *, struct KernelDisplay * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual inherited (intrserv) base (intrserv) }; #ifndef __NVOC_CLASS_KernelDisplay_TYPEDEF__ @@ -215,14 +227,12 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelDisplay; #define PDB_PROP_KDISP_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING #define PDB_PROP_KDISP_IN_AWAKEN_INTR_BASE_CAST #define PDB_PROP_KDISP_IN_AWAKEN_INTR_BASE_NAME PDB_PROP_KDISP_IN_AWAKEN_INTR -#define PDB_PROP_KDISP_BUG_2089053_SERIALIZE_AGGRESSIVE_VBLANK_ALWAYS_BASE_CAST -#define PDB_PROP_KDISP_BUG_2089053_SERIALIZE_AGGRESSIVE_VBLANK_ALWAYS_BASE_NAME PDB_PROP_KDISP_BUG_2089053_SERIALIZE_AGGRESSIVE_VBLANK_ALWAYS +#define PDB_PROP_KDISP_IMP_ALLOC_BW_IN_KERNEL_RM_DEF_BASE_CAST +#define PDB_PROP_KDISP_IMP_ALLOC_BW_IN_KERNEL_RM_DEF_BASE_NAME PDB_PROP_KDISP_IMP_ALLOC_BW_IN_KERNEL_RM_DEF #define PDB_PROP_KDISP_IMP_ENABLE_BASE_CAST #define PDB_PROP_KDISP_IMP_ENABLE_BASE_NAME PDB_PROP_KDISP_IMP_ENABLE #define PDB_PROP_KDISP_FEATURE_STRETCH_VBLANK_CAPABLE_BASE_CAST #define PDB_PROP_KDISP_FEATURE_STRETCH_VBLANK_CAPABLE_BASE_NAME PDB_PROP_KDISP_FEATURE_STRETCH_VBLANK_CAPABLE -#define PDB_PROP_KDISP_BUG_2089053_SERIALIZE_AGGRESSIVE_VBLANKS_ONLY_ON_HMD_ACTIVE_BASE_CAST -#define PDB_PROP_KDISP_BUG_2089053_SERIALIZE_AGGRESSIVE_VBLANKS_ONLY_ON_HMD_ACTIVE_BASE_NAME PDB_PROP_KDISP_BUG_2089053_SERIALIZE_AGGRESSIVE_VBLANKS_ONLY_ON_HMD_ACTIVE NV_STATUS __nvoc_objCreateDynamic_KernelDisplay(KernelDisplay**, Dynamic*, NvU32, va_list); @@ -232,21 +242,21 @@ NV_STATUS __nvoc_objCreate_KernelDisplay(KernelDisplay**, Dynamic*, NvU32); // Wrapper macros -#define kdispConstructEngine_FNPTR(pKernelDisplay) pKernelDisplay->__kdispConstructEngine__ +#define kdispConstructEngine_FNPTR(pKernelDisplay) pKernelDisplay->__nvoc_vtable->__kdispConstructEngine__ #define kdispConstructEngine(pGpu, pKernelDisplay, engDesc) kdispConstructEngine_DISPATCH(pGpu, pKernelDisplay, engDesc) -#define kdispStatePreInitLocked_FNPTR(pKernelDisplay) pKernelDisplay->__kdispStatePreInitLocked__ +#define kdispStatePreInitLocked_FNPTR(pKernelDisplay) pKernelDisplay->__nvoc_vtable->__kdispStatePreInitLocked__ #define kdispStatePreInitLocked(pGpu, pKernelDisplay) kdispStatePreInitLocked_DISPATCH(pGpu, pKernelDisplay) -#define kdispStateInitLocked_FNPTR(pKernelDisplay) pKernelDisplay->__kdispStateInitLocked__ +#define kdispStateInitLocked_FNPTR(pKernelDisplay) pKernelDisplay->__nvoc_vtable->__kdispStateInitLocked__ #define kdispStateInitLocked(pGpu, pKernelDisplay) kdispStateInitLocked_DISPATCH(pGpu, pKernelDisplay) -#define kdispStateDestroy_FNPTR(pKernelDisplay) pKernelDisplay->__kdispStateDestroy__ +#define kdispStateDestroy_FNPTR(pKernelDisplay) pKernelDisplay->__nvoc_vtable->__kdispStateDestroy__ #define kdispStateDestroy(pGpu, pKernelDisplay) kdispStateDestroy_DISPATCH(pGpu, pKernelDisplay) -#define kdispStateLoad_FNPTR(pKernelDisplay) pKernelDisplay->__kdispStateLoad__ +#define kdispStateLoad_FNPTR(pKernelDisplay) pKernelDisplay->__nvoc_vtable->__kdispStateLoad__ #define kdispStateLoad(pGpu, pKernelDisplay, flags) kdispStateLoad_DISPATCH(pGpu, pKernelDisplay, flags) -#define kdispStateUnload_FNPTR(pKernelDisplay) pKernelDisplay->__kdispStateUnload__ +#define kdispStateUnload_FNPTR(pKernelDisplay) pKernelDisplay->__nvoc_vtable->__kdispStateUnload__ #define kdispStateUnload(pGpu, pKernelDisplay, flags) kdispStateUnload_DISPATCH(pGpu, pKernelDisplay, flags) -#define kdispRegisterIntrService_FNPTR(pKernelDisplay) pKernelDisplay->__kdispRegisterIntrService__ +#define kdispRegisterIntrService_FNPTR(pKernelDisplay) pKernelDisplay->__nvoc_vtable->__kdispRegisterIntrService__ #define kdispRegisterIntrService(pGpu, pKernelDisplay, pRecords) kdispRegisterIntrService_DISPATCH(pGpu, pKernelDisplay, pRecords) -#define kdispServiceInterrupt_FNPTR(pKernelDisplay) pKernelDisplay->__kdispServiceInterrupt__ +#define kdispServiceInterrupt_FNPTR(pKernelDisplay) pKernelDisplay->__nvoc_vtable->__kdispServiceInterrupt__ #define kdispServiceInterrupt(pGpu, pKernelDisplay, pParams) kdispServiceInterrupt_DISPATCH(pGpu, pKernelDisplay, pParams) #define kdispServiceInterrupt_HAL(pGpu, pKernelDisplay, pParams) kdispServiceInterrupt_DISPATCH(pGpu, pKernelDisplay, pParams) #define kdispSelectClass_FNPTR(pKernelDisplay) pKernelDisplay->__kdispSelectClass__ @@ -285,64 +295,61 @@ NV_STATUS __nvoc_objCreate_KernelDisplay(KernelDisplay**, Dynamic*, NvU32); #define kdispDetectSliLink_FNPTR(pKernelDisplay) pKernelDisplay->__kdispDetectSliLink__ #define kdispDetectSliLink(pKernelDisplay, pParentGpu, pChildGpu, ParentDrPort, ChildDrPort) kdispDetectSliLink_DISPATCH(pKernelDisplay, pParentGpu, pChildGpu, ParentDrPort, ChildDrPort) #define kdispDetectSliLink_HAL(pKernelDisplay, pParentGpu, pChildGpu, ParentDrPort, ChildDrPort) kdispDetectSliLink_DISPATCH(pKernelDisplay, pParentGpu, pChildGpu, ParentDrPort, ChildDrPort) -#define kdispInitRegistryOverrides_FNPTR(pKernelDisplay) pKernelDisplay->__kdispInitRegistryOverrides__ -#define kdispInitRegistryOverrides(pGpu, pKernelDisplay) kdispInitRegistryOverrides_DISPATCH(pGpu, pKernelDisplay) -#define kdispInitRegistryOverrides_HAL(pGpu, pKernelDisplay) kdispInitRegistryOverrides_DISPATCH(pGpu, pKernelDisplay) #define kdispGetPBTargetAperture_FNPTR(pKernelDisplay) pKernelDisplay->__kdispGetPBTargetAperture__ #define kdispGetPBTargetAperture(pGpu, pKernelDisplay, memAddrSpace, cacheSnoop) kdispGetPBTargetAperture_DISPATCH(pGpu, pKernelDisplay, memAddrSpace, cacheSnoop) #define kdispGetPBTargetAperture_HAL(pGpu, pKernelDisplay, memAddrSpace, cacheSnoop) kdispGetPBTargetAperture_DISPATCH(pGpu, pKernelDisplay, memAddrSpace, cacheSnoop) -#define kdispInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define kdispInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define kdispInitMissing(pGpu, pEngstate) kdispInitMissing_DISPATCH(pGpu, pEngstate) -#define kdispStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define kdispStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define kdispStatePreInitUnlocked(pGpu, pEngstate) kdispStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kdispStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kdispStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define kdispStateInitUnlocked(pGpu, pEngstate) kdispStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kdispStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kdispStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define kdispStatePreLoad(pGpu, pEngstate, arg3) kdispStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kdispStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define kdispStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostLoad__ #define kdispStatePostLoad(pGpu, pEngstate, arg3) kdispStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kdispStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kdispStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define kdispStatePreUnload(pGpu, pEngstate, arg3) kdispStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kdispStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kdispStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define kdispStatePostUnload(pGpu, pEngstate, arg3) kdispStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kdispIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define kdispIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define kdispIsPresent(pGpu, pEngstate) kdispIsPresent_DISPATCH(pGpu, pEngstate) -#define kdispClearInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservClearInterrupt__ +#define kdispClearInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__nvoc_vtable->__intrservClearInterrupt__ #define kdispClearInterrupt(pGpu, pIntrService, pParams) kdispClearInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define kdispServiceNotificationInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ +#define kdispServiceNotificationInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__nvoc_vtable->__intrservServiceNotificationInterrupt__ #define kdispServiceNotificationInterrupt(pGpu, pIntrService, pParams) kdispServiceNotificationInterrupt_DISPATCH(pGpu, pIntrService, pParams) // Dispatch functions static inline NV_STATUS kdispConstructEngine_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, ENGDESCRIPTOR engDesc) { - return pKernelDisplay->__kdispConstructEngine__(pGpu, pKernelDisplay, engDesc); + return pKernelDisplay->__nvoc_vtable->__kdispConstructEngine__(pGpu, pKernelDisplay, engDesc); } static inline NV_STATUS kdispStatePreInitLocked_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay) { - return pKernelDisplay->__kdispStatePreInitLocked__(pGpu, pKernelDisplay); + return pKernelDisplay->__nvoc_vtable->__kdispStatePreInitLocked__(pGpu, pKernelDisplay); } static inline NV_STATUS kdispStateInitLocked_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay) { - return pKernelDisplay->__kdispStateInitLocked__(pGpu, pKernelDisplay); + return pKernelDisplay->__nvoc_vtable->__kdispStateInitLocked__(pGpu, pKernelDisplay); } static inline void kdispStateDestroy_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay) { - pKernelDisplay->__kdispStateDestroy__(pGpu, pKernelDisplay); + pKernelDisplay->__nvoc_vtable->__kdispStateDestroy__(pGpu, pKernelDisplay); } static inline NV_STATUS kdispStateLoad_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 flags) { - return pKernelDisplay->__kdispStateLoad__(pGpu, pKernelDisplay, flags); + return pKernelDisplay->__nvoc_vtable->__kdispStateLoad__(pGpu, pKernelDisplay, flags); } static inline NV_STATUS kdispStateUnload_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 flags) { - return pKernelDisplay->__kdispStateUnload__(pGpu, pKernelDisplay, flags); + return pKernelDisplay->__nvoc_vtable->__kdispStateUnload__(pGpu, pKernelDisplay, flags); } static inline void kdispRegisterIntrService_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, IntrServiceRecord pRecords[175]) { - pKernelDisplay->__kdispRegisterIntrService__(pGpu, pKernelDisplay, pRecords); + pKernelDisplay->__nvoc_vtable->__kdispRegisterIntrService__(pGpu, pKernelDisplay, pRecords); } static inline NvU32 kdispServiceInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, IntrServiceServiceInterruptArguments *pParams) { - return pKernelDisplay->__kdispServiceInterrupt__(pGpu, pKernelDisplay, pParams); + return pKernelDisplay->__nvoc_vtable->__kdispServiceInterrupt__(pGpu, pKernelDisplay, pParams); } static inline NV_STATUS kdispSelectClass_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 swClass) { @@ -393,52 +400,48 @@ static inline NV_STATUS kdispDetectSliLink_DISPATCH(struct KernelDisplay *pKerne return pKernelDisplay->__kdispDetectSliLink__(pKernelDisplay, pParentGpu, pChildGpu, ParentDrPort, ChildDrPort); } -static inline void kdispInitRegistryOverrides_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay) { - pKernelDisplay->__kdispInitRegistryOverrides__(pGpu, pKernelDisplay); -} - static inline NvU32 kdispGetPBTargetAperture_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 memAddrSpace, NvU32 cacheSnoop) { return pKernelDisplay->__kdispGetPBTargetAperture__(pGpu, pKernelDisplay, memAddrSpace, cacheSnoop); } static inline void kdispInitMissing_DISPATCH(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate) { - pEngstate->__kdispInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kdispInitMissing__(pGpu, pEngstate); } static inline NV_STATUS kdispStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate) { - return pEngstate->__kdispStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kdispStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kdispStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate) { - return pEngstate->__kdispStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kdispStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kdispStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate, NvU32 arg3) { - return pEngstate->__kdispStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kdispStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kdispStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate, NvU32 arg3) { - return pEngstate->__kdispStatePostLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kdispStatePostLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kdispStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate, NvU32 arg3) { - return pEngstate->__kdispStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kdispStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS kdispStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate, NvU32 arg3) { - return pEngstate->__kdispStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kdispStatePostUnload__(pGpu, pEngstate, arg3); } static inline NvBool kdispIsPresent_DISPATCH(struct OBJGPU *pGpu, struct KernelDisplay *pEngstate) { - return pEngstate->__kdispIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kdispIsPresent__(pGpu, pEngstate); } static inline NvBool kdispClearInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pIntrService, IntrServiceClearInterruptArguments *pParams) { - return pIntrService->__kdispClearInterrupt__(pGpu, pIntrService, pParams); + return pIntrService->__nvoc_vtable->__kdispClearInterrupt__(pGpu, pIntrService, pParams); } static inline NV_STATUS kdispServiceNotificationInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelDisplay *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { - return pIntrService->__kdispServiceNotificationInterrupt__(pGpu, pIntrService, pParams); + return pIntrService->__nvoc_vtable->__kdispServiceNotificationInterrupt__(pGpu, pIntrService, pParams); } void kdispServiceVblank_KERNEL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 arg3, NvU32 arg4, struct THREAD_STATE_NODE *arg5); @@ -529,19 +532,19 @@ static inline NV_STATUS kdispArbAndAllocDisplayBandwidth(OBJGPU *pGpu, struct Ke #define kdispArbAndAllocDisplayBandwidth_HAL(pGpu, pKernelDisplay, iccBwClient, minRequiredIsoBandwidthKBPS, minRequiredFloorBandwidthKBPS) kdispArbAndAllocDisplayBandwidth(pGpu, pKernelDisplay, iccBwClient, minRequiredIsoBandwidthKBPS, minRequiredFloorBandwidthKBPS) -NV_STATUS kdispSetPushBufferParamsToPhysical_IMPL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, struct DispChannel *pDispChannel, NvHandle hObjectBuffer, struct ContextDma *pBufferContextDma, NvU32 hClass, NvU32 channelInstance, DISPCHNCLASS internalDispChnClass); +NV_STATUS kdispSetPushBufferParamsToPhysical_IMPL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, struct DispChannel *pDispChannel, NvHandle hObjectBuffer, struct ContextDma *pBufferContextDma, NvU32 hClass, NvU32 channelInstance, DISPCHNCLASS internalDispChnClass, ChannelPBSize channelPBSize, NvU32 subDeviceId); #ifdef __nvoc_kern_disp_h_disabled -static inline NV_STATUS kdispSetPushBufferParamsToPhysical(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, struct DispChannel *pDispChannel, NvHandle hObjectBuffer, struct ContextDma *pBufferContextDma, NvU32 hClass, NvU32 channelInstance, DISPCHNCLASS internalDispChnClass) { +static inline NV_STATUS kdispSetPushBufferParamsToPhysical(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, struct DispChannel *pDispChannel, NvHandle hObjectBuffer, struct ContextDma *pBufferContextDma, NvU32 hClass, NvU32 channelInstance, DISPCHNCLASS internalDispChnClass, ChannelPBSize channelPBSize, NvU32 subDeviceId) { NV_ASSERT_FAILED_PRECOMP("KernelDisplay was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_disp_h_disabled -#define kdispSetPushBufferParamsToPhysical(pGpu, pKernelDisplay, pDispChannel, hObjectBuffer, pBufferContextDma, hClass, channelInstance, internalDispChnClass) kdispSetPushBufferParamsToPhysical_IMPL(pGpu, pKernelDisplay, pDispChannel, hObjectBuffer, pBufferContextDma, hClass, channelInstance, internalDispChnClass) +#define kdispSetPushBufferParamsToPhysical(pGpu, pKernelDisplay, pDispChannel, hObjectBuffer, pBufferContextDma, hClass, channelInstance, internalDispChnClass, channelPBSize, subDeviceId) kdispSetPushBufferParamsToPhysical_IMPL(pGpu, pKernelDisplay, pDispChannel, hObjectBuffer, pBufferContextDma, hClass, channelInstance, internalDispChnClass, channelPBSize, subDeviceId) #endif //__nvoc_kern_disp_h_disabled -#define kdispSetPushBufferParamsToPhysical_HAL(pGpu, pKernelDisplay, pDispChannel, hObjectBuffer, pBufferContextDma, hClass, channelInstance, internalDispChnClass) kdispSetPushBufferParamsToPhysical(pGpu, pKernelDisplay, pDispChannel, hObjectBuffer, pBufferContextDma, hClass, channelInstance, internalDispChnClass) +#define kdispSetPushBufferParamsToPhysical_HAL(pGpu, pKernelDisplay, pDispChannel, hObjectBuffer, pBufferContextDma, hClass, channelInstance, internalDispChnClass, channelPBSize, subDeviceId) kdispSetPushBufferParamsToPhysical(pGpu, pKernelDisplay, pDispChannel, hObjectBuffer, pBufferContextDma, hClass, channelInstance, internalDispChnClass, channelPBSize, subDeviceId) static inline NV_STATUS kdispAcquireDispChannelHw_56cd7a(struct KernelDisplay *pKernelDisplay, struct DispChannel *pDispChannel, NvU32 channelInstance, NvHandle hObjectBuffer, NvU32 initialGetPutOffset, NvBool allowGrabWithinSameClient, NvBool connectPbAtGrab) { return NV_OK; @@ -703,15 +706,15 @@ static inline NV_STATUS kdispSetupAcpiEdid(OBJGPU *pGpu, struct KernelDisplay *p #define kdispSetupAcpiEdid_HAL(pGpu, pKernelDisplay) kdispSetupAcpiEdid(pGpu, pKernelDisplay) -static inline NvBool kdispReadPendingAwakenIntr_ceaee8(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *pCachedIntr, struct THREAD_STATE_NODE *arg4) { +static inline NvBool kdispReadPendingAwakenIntr_72a2e1(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *pCachedIntr, struct THREAD_STATE_NODE *arg4) { NV_ASSERT_PRECOMP(0); - return ((NvBool)(0 != 0)); + return NV_FALSE; } NvBool kdispReadPendingAwakenIntr_v03_00_IMPL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *pCachedIntr, struct THREAD_STATE_NODE *arg4); -static inline NvBool kdispReadPendingAwakenIntr_491d52(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *pCachedIntr, struct THREAD_STATE_NODE *arg4) { - return ((NvBool)(0 != 0)); +static inline NvBool kdispReadPendingAwakenIntr_3dd2c9(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *pCachedIntr, struct THREAD_STATE_NODE *arg4) { + return NV_FALSE; } @@ -721,7 +724,7 @@ static inline NvBool kdispReadPendingAwakenIntr(OBJGPU *pGpu, struct KernelDispl return NV_FALSE; } #else //__nvoc_kern_disp_h_disabled -#define kdispReadPendingAwakenIntr(pGpu, pKernelDisplay, pCachedIntr, arg4) kdispReadPendingAwakenIntr_ceaee8(pGpu, pKernelDisplay, pCachedIntr, arg4) +#define kdispReadPendingAwakenIntr(pGpu, pKernelDisplay, pCachedIntr, arg4) kdispReadPendingAwakenIntr_72a2e1(pGpu, pKernelDisplay, pCachedIntr, arg4) #endif //__nvoc_kern_disp_h_disabled #define kdispReadPendingAwakenIntr_HAL(pGpu, pKernelDisplay, pCachedIntr, arg4) kdispReadPendingAwakenIntr(pGpu, pKernelDisplay, pCachedIntr, arg4) @@ -897,8 +900,8 @@ NV_STATUS kdispGetDisplayChannelUserBaseAndSize_v03_00(OBJGPU *pGpu, struct Kern NvBool kdispGetVgaWorkspaceBase_v04_00(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU64 *pOffset); -static inline NvBool kdispGetVgaWorkspaceBase_491d52(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU64 *pOffset) { - return ((NvBool)(0 != 0)); +static inline NvBool kdispGetVgaWorkspaceBase_3dd2c9(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU64 *pOffset) { + return NV_FALSE; } NV_STATUS kdispReadRgLineCountAndFrameCount_v03_00_PHYSICAL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 head, NvU32 *pLineCount, NvU32 *pFrameCount); @@ -941,12 +944,6 @@ static inline NV_STATUS kdispDetectSliLink_92bfc3(struct KernelDisplay *pKernelD return NV_ERR_NOT_SUPPORTED; } -static inline void kdispInitRegistryOverrides_b3696a(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay) { - return; -} - -void kdispInitRegistryOverrides_IMPL(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay); - NvU32 kdispGetPBTargetAperture_v03_00(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 memAddrSpace, NvU32 cacheSnoop); static inline NvU32 kdispGetPBTargetAperture_15a734(OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 memAddrSpace, NvU32 cacheSnoop) { diff --git a/src/nvidia/generated/g_kern_fsp_nvoc.c b/src/nvidia/generated/g_kern_fsp_nvoc.c index ac3113a918..eef5c4de72 100644 --- a/src/nvidia/generated/g_kern_fsp_nvoc.c +++ b/src/nvidia/generated/g_kern_fsp_nvoc.c @@ -66,78 +66,96 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelFsp = /*pExportInfo=*/ &__nvoc_export_info_KernelFsp }; -// 2 down-thunk(s) defined to bridge methods in KernelFsp from superclasses +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_KernelFsp_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelFsp, ENGDESCRIPTOR arg3); // this +NV_STATUS __nvoc_down_thunk_KernelFsp_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelFsp, NvU32 flags); // this +void __nvoc_down_thunk_KernelFsp_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelFsp); // this + +// 3 down-thunk(s) defined to bridge methods in KernelFsp from superclasses // kfspConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelFsp_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelFsp, ENGDESCRIPTOR arg3) { +NV_STATUS __nvoc_down_thunk_KernelFsp_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelFsp, ENGDESCRIPTOR arg3) { return kfspConstructEngine(pGpu, (struct KernelFsp *)(((unsigned char *) pKernelFsp) - __nvoc_rtti_KernelFsp_OBJENGSTATE.offset), arg3); } +// kfspStateUnload: virtual override (engstate) base (engstate) +NV_STATUS __nvoc_down_thunk_KernelFsp_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelFsp, NvU32 flags) { + return kfspStateUnload(pGpu, (struct KernelFsp *)(((unsigned char *) pKernelFsp) - __nvoc_rtti_KernelFsp_OBJENGSTATE.offset), flags); +} + // kfspStateDestroy: virtual override (engstate) base (engstate) -static void __nvoc_down_thunk_KernelFsp_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelFsp) { +void __nvoc_down_thunk_KernelFsp_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelFsp) { kfspStateDestroy(pGpu, (struct KernelFsp *)(((unsigned char *) pKernelFsp) - __nvoc_rtti_KernelFsp_OBJENGSTATE.offset)); } -// 12 up-thunk(s) defined to bridge methods in KernelFsp to superclasses +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_kfspInitMissing(struct OBJGPU *pGpu, struct KernelFsp *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePreInitLocked(struct OBJGPU *pGpu, struct KernelFsp *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelFsp *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStateInitLocked(struct OBJGPU *pGpu, struct KernelFsp *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStateInitUnlocked(struct OBJGPU *pGpu, struct KernelFsp *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePreLoad(struct OBJGPU *pGpu, struct KernelFsp *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStateLoad(struct OBJGPU *pGpu, struct KernelFsp *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePostLoad(struct OBJGPU *pGpu, struct KernelFsp *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePreUnload(struct OBJGPU *pGpu, struct KernelFsp *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePostUnload(struct OBJGPU *pGpu, struct KernelFsp *pEngstate, NvU32 arg3); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_kfspIsPresent(struct OBJGPU *pGpu, struct KernelFsp *pEngstate); // this + +// 11 up-thunk(s) defined to bridge methods in KernelFsp to superclasses // kfspInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kfspInitMissing(struct OBJGPU *pGpu, struct KernelFsp *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kfspInitMissing(struct OBJGPU *pGpu, struct KernelFsp *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset)); } // kfspStatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePreInitLocked(struct OBJGPU *pGpu, struct KernelFsp *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePreInitLocked(struct OBJGPU *pGpu, struct KernelFsp *pEngstate) { return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset)); } // kfspStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelFsp *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelFsp *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset)); } // kfspStateInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStateInitLocked(struct OBJGPU *pGpu, struct KernelFsp *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStateInitLocked(struct OBJGPU *pGpu, struct KernelFsp *pEngstate) { return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset)); } // kfspStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStateInitUnlocked(struct OBJGPU *pGpu, struct KernelFsp *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStateInitUnlocked(struct OBJGPU *pGpu, struct KernelFsp *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset)); } // kfspStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePreLoad(struct OBJGPU *pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePreLoad(struct OBJGPU *pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset), arg3); } // kfspStateLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStateLoad(struct OBJGPU *pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStateLoad(struct OBJGPU *pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset), arg3); } // kfspStatePostLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePostLoad(struct OBJGPU *pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePostLoad(struct OBJGPU *pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset), arg3); } // kfspStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePreUnload(struct OBJGPU *pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePreUnload(struct OBJGPU *pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset), arg3); } -// kfspStateUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStateUnload(struct OBJGPU *pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { - return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset), arg3); -} - // kfspStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePostUnload(struct OBJGPU *pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfspStatePostUnload(struct OBJGPU *pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset), arg3); } // kfspIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_kfspIsPresent(struct OBJGPU *pGpu, struct KernelFsp *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_kfspIsPresent(struct OBJGPU *pGpu, struct KernelFsp *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFsp_OBJENGSTATE.offset)); } @@ -169,29 +187,29 @@ void __nvoc_init_dataField_KernelFsp(KernelFsp *pThis, RmHalspecOwner *pRmhalspe // NVOC Property Hal field -- PDB_PROP_KFSP_IS_MISSING if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_KFSP_IS_MISSING, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KFSP_IS_MISSING, NV_FALSE); } // default else { - pThis->setProperty(pThis, PDB_PROP_KFSP_IS_MISSING, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KFSP_IS_MISSING, NV_TRUE); } // NVOC Property Hal field -- PDB_PROP_KFSP_FSP_FUSE_ERROR_CHECK_ENABLED if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_KFSP_FSP_FUSE_ERROR_CHECK_ENABLED, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KFSP_FSP_FUSE_ERROR_CHECK_ENABLED, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_KFSP_FSP_FUSE_ERROR_CHECK_ENABLED, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KFSP_FSP_FUSE_ERROR_CHECK_ENABLED, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_KFSP_DISABLE_FRTS_SYSMEM if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000003UL) )) /* RmVariantHal: VF | PF_KERNEL_ONLY */ { - pThis->setProperty(pThis, PDB_PROP_KFSP_DISABLE_FRTS_SYSMEM, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KFSP_DISABLE_FRTS_SYSMEM, NV_TRUE); } // Hal field -- cotPayloadSignatureSize @@ -255,131 +273,129 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // kfspConstructEngine -- virtual override (engstate) base (engstate) - pThis->__kfspConstructEngine__ = &kfspConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelFsp_engstateConstructEngine; - - // kfspStateDestroy -- virtual override (engstate) base (engstate) - pThis->__kfspStateDestroy__ = &kfspStateDestroy_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelFsp_engstateStateDestroy; - - // kfspSendAndReadMessageAsync -- virtual - pThis->__kfspSendAndReadMessageAsync__ = &kfspSendAndReadMessageAsync_IMPL; - - // kfspGspFmcIsEnforced -- halified (2 hals) body + // kfspSendPacket -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->__kfspGspFmcIsEnforced__ = &kfspGspFmcIsEnforced_GH100; + pThis->__kfspSendPacket__ = &kfspSendPacket_GH100; } // default else { - pThis->__kfspGspFmcIsEnforced__ = &kfspGspFmcIsEnforced_491d52; + pThis->__kfspSendPacket__ = &kfspSendPacket_395e98; } - // kfspPrepareBootCommands -- halified (2 hals) body + // kfspReadPacket -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->__kfspPrepareBootCommands__ = &kfspPrepareBootCommands_GH100; + pThis->__kfspReadPacket__ = &kfspReadPacket_GH100; } + // default else { - pThis->__kfspPrepareBootCommands__ = &kfspPrepareBootCommands_ac1694; + pThis->__kfspReadPacket__ = &kfspReadPacket_395e98; } - // kfspSendBootCommands -- halified (2 hals) body + // kfspCanSendPacket -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->__kfspSendBootCommands__ = &kfspSendBootCommands_GH100; + pThis->__kfspCanSendPacket__ = &kfspCanSendPacket_GH100; } + // default else { - pThis->__kfspSendBootCommands__ = &kfspSendBootCommands_ac1694; + pThis->__kfspCanSendPacket__ = &kfspCanSendPacket_d69453; } - // kfspPrepareAndSendBootCommands -- halified (2 hals) body + // kfspIsResponseAvailable -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->__kfspPrepareAndSendBootCommands__ = &kfspPrepareAndSendBootCommands_GH100; + pThis->__kfspIsResponseAvailable__ = &kfspIsResponseAvailable_GH100; } + // default else { - pThis->__kfspPrepareAndSendBootCommands__ = &kfspPrepareAndSendBootCommands_ac1694; + pThis->__kfspIsResponseAvailable__ = &kfspIsResponseAvailable_d69453; } - // kfspWaitForSecureBoot -- halified (3 hals) body - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ - { - pThis->__kfspWaitForSecureBoot__ = &kfspWaitForSecureBoot_GH100; - } - else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + // kfspGspFmcIsEnforced -- halified (2 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->__kfspWaitForSecureBoot__ = &kfspWaitForSecureBoot_GB100; + pThis->__kfspGspFmcIsEnforced__ = &kfspGspFmcIsEnforced_GH100; } // default else { - pThis->__kfspWaitForSecureBoot__ = &kfspWaitForSecureBoot_46f6a7; + pThis->__kfspGspFmcIsEnforced__ = &kfspGspFmcIsEnforced_3dd2c9; } - // kfspGetRmChannelSize -- halified (2 hals) body + // kfspPrepareBootCommands -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->__kfspGetRmChannelSize__ = &kfspGetRmChannelSize_GH100; + pThis->__kfspPrepareBootCommands__ = &kfspPrepareBootCommands_GH100; } + // default else { - pThis->__kfspGetRmChannelSize__ = &kfspGetRmChannelSize_b2b553; + pThis->__kfspPrepareBootCommands__ = &kfspPrepareBootCommands_ac1694; } - // kfspConfigEmemc -- halified (2 hals) body + // kfspSendBootCommands -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->__kfspConfigEmemc__ = &kfspConfigEmemc_GH100; + pThis->__kfspSendBootCommands__ = &kfspSendBootCommands_GH100; } + // default else { - pThis->__kfspConfigEmemc__ = &kfspConfigEmemc_395e98; + pThis->__kfspSendBootCommands__ = &kfspSendBootCommands_ac1694; } - // kfspUpdateQueueHeadTail -- halified (2 hals) body + // kfspPrepareAndSendBootCommands -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->__kfspUpdateQueueHeadTail__ = &kfspUpdateQueueHeadTail_GH100; + pThis->__kfspPrepareAndSendBootCommands__ = &kfspPrepareAndSendBootCommands_GH100; } + // default else { - pThis->__kfspUpdateQueueHeadTail__ = &kfspUpdateQueueHeadTail_d44104; + pThis->__kfspPrepareAndSendBootCommands__ = &kfspPrepareAndSendBootCommands_ac1694; } - // kfspGetQueueHeadTail -- halified (2 hals) body - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ + // kfspWaitForSecureBoot -- halified (3 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ + { + pThis->__kfspWaitForSecureBoot__ = &kfspWaitForSecureBoot_GH100; + } + else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ { - pThis->__kfspGetQueueHeadTail__ = &kfspGetQueueHeadTail_GH100; + pThis->__kfspWaitForSecureBoot__ = &kfspWaitForSecureBoot_GB100; } + // default else { - pThis->__kfspGetQueueHeadTail__ = &kfspGetQueueHeadTail_d44104; + pThis->__kfspWaitForSecureBoot__ = &kfspWaitForSecureBoot_46f6a7; } - // kfspUpdateMsgQueueHeadTail -- halified (2 hals) body + // kfspGetMaxSendPacketSize -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->__kfspUpdateMsgQueueHeadTail__ = &kfspUpdateMsgQueueHeadTail_GH100; + pThis->__kfspGetMaxSendPacketSize__ = &kfspGetMaxSendPacketSize_GH100; } + // default else { - pThis->__kfspUpdateMsgQueueHeadTail__ = &kfspUpdateMsgQueueHeadTail_d44104; + pThis->__kfspGetMaxSendPacketSize__ = &kfspGetMaxSendPacketSize_b2b553; } - // kfspGetMsgQueueHeadTail -- halified (2 hals) body + // kfspGetMaxRecvPacketSize -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->__kfspGetMsgQueueHeadTail__ = &kfspGetMsgQueueHeadTail_GH100; + pThis->__kfspGetMaxRecvPacketSize__ = &kfspGetMaxRecvPacketSize_GH100; } + // default else { - pThis->__kfspGetMsgQueueHeadTail__ = &kfspGetMsgQueueHeadTail_d44104; + pThis->__kfspGetMaxRecvPacketSize__ = &kfspGetMaxRecvPacketSize_b2b553; } // kfspNvdmToSeid -- halified (2 hals) body @@ -387,6 +403,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * { pThis->__kfspNvdmToSeid__ = &kfspNvdmToSeid_GH100; } + // default else { pThis->__kfspNvdmToSeid__ = &kfspNvdmToSeid_b2b553; @@ -397,6 +414,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * { pThis->__kfspCreateMctpHeader__ = &kfspCreateMctpHeader_GH100; } + // default else { pThis->__kfspCreateMctpHeader__ = &kfspCreateMctpHeader_b2b553; @@ -407,36 +425,18 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * { pThis->__kfspCreateNvdmHeader__ = &kfspCreateNvdmHeader_GH100; } + // default else { pThis->__kfspCreateNvdmHeader__ = &kfspCreateNvdmHeader_b2b553; } - // kfspWriteToEmem -- halified (2 hals) body - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ - { - pThis->__kfspWriteToEmem__ = &kfspWriteToEmem_GH100; - } - else - { - pThis->__kfspWriteToEmem__ = &kfspWriteToEmem_395e98; - } - - // kfspReadFromEmem -- halified (2 hals) body - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ - { - pThis->__kfspReadFromEmem__ = &kfspReadFromEmem_GH100; - } - else - { - pThis->__kfspReadFromEmem__ = &kfspReadFromEmem_395e98; - } - // kfspGetPacketInfo -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { pThis->__kfspGetPacketInfo__ = &kfspGetPacketInfo_GH100; } + // default else { pThis->__kfspGetPacketInfo__ = &kfspGetPacketInfo_395e98; @@ -447,6 +447,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * { pThis->__kfspValidateMctpPayloadHeader__ = &kfspValidateMctpPayloadHeader_GH100; } + // default else { pThis->__kfspValidateMctpPayloadHeader__ = &kfspValidateMctpPayloadHeader_395e98; @@ -457,6 +458,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * { pThis->__kfspProcessNvdmMessage__ = &kfspProcessNvdmMessage_GH100; } + // default else { pThis->__kfspProcessNvdmMessage__ = &kfspProcessNvdmMessage_395e98; @@ -467,6 +469,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * { pThis->__kfspProcessCommandResponse__ = &kfspProcessCommandResponse_GH100; } + // default else { pThis->__kfspProcessCommandResponse__ = &kfspProcessCommandResponse_395e98; @@ -488,6 +491,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * { pThis->__kfspErrorCode2NvStatusMap__ = &kfspErrorCode2NvStatusMap_GH100; } + // default else { pThis->__kfspErrorCode2NvStatusMap__ = &kfspErrorCode2NvStatusMap_395e98; @@ -509,6 +513,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * { pThis->__kfspWaitForGspTargetMaskReleased__ = &kfspWaitForGspTargetMaskReleased_GH100; } + // default else { pThis->__kfspWaitForGspTargetMaskReleased__ = &kfspWaitForGspTargetMaskReleased_395e98; @@ -522,7 +527,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * // default else { - pThis->__kfspRequiresBug3957833WAR__ = &kfspRequiresBug3957833WAR_491d52; + pThis->__kfspRequiresBug3957833WAR__ = &kfspRequiresBug3957833WAR_3dd2c9; } // kfspFrtsSysmemLocationProgram -- halified (2 hals) body @@ -530,6 +535,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * { pThis->__kfspFrtsSysmemLocationProgram__ = &kfspFrtsSysmemLocationProgram_GH100; } + // default else { pThis->__kfspFrtsSysmemLocationProgram__ = &kfspFrtsSysmemLocationProgram_395e98; @@ -540,6 +546,7 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * { pThis->__kfspFrtsSysmemLocationClear__ = &kfspFrtsSysmemLocationClear_GH100; } + // default else { pThis->__kfspFrtsSysmemLocationClear__ = &kfspFrtsSysmemLocationClear_d44104; @@ -566,49 +573,50 @@ static void __nvoc_init_funcTable_KernelFsp_1(KernelFsp *pThis, RmHalspecOwner * { pThis->__kfspSendClockBoostRpc__ = &kfspSendClockBoostRpc_56cd7a; } - - // kfspInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__kfspInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kfspInitMissing; - - // kfspStatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__kfspStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStatePreInitLocked; - - // kfspStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kfspStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStatePreInitUnlocked; - - // kfspStateInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__kfspStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStateInitLocked; - - // kfspStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kfspStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStateInitUnlocked; - - // kfspStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__kfspStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStatePreLoad; - - // kfspStateLoad -- virtual inherited (engstate) base (engstate) - pThis->__kfspStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStateLoad; - - // kfspStatePostLoad -- virtual inherited (engstate) base (engstate) - pThis->__kfspStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStatePostLoad; - - // kfspStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__kfspStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStatePreUnload; - - // kfspStateUnload -- virtual inherited (engstate) base (engstate) - pThis->__kfspStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStateUnload; - - // kfspStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__kfspStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStatePostUnload; - - // kfspIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__kfspIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kfspIsPresent; -} // End __nvoc_init_funcTable_KernelFsp_1 with approximately 76 basic block(s). +} // End __nvoc_init_funcTable_KernelFsp_1 with approximately 55 basic block(s). -// Initialize vtable(s) for 44 virtual method(s). +// Initialize vtable(s) for 42 virtual method(s). void __nvoc_init_funcTable_KernelFsp(KernelFsp *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 44 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelFsp vtable = { + .__kfspConstructEngine__ = &kfspConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelFsp_engstateConstructEngine, // virtual + .__kfspStateUnload__ = &kfspStateUnload_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelFsp_engstateStateUnload, // virtual + .__kfspStateDestroy__ = &kfspStateDestroy_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelFsp_engstateStateDestroy, // virtual + .__kfspSendAndReadMessageAsync__ = &kfspSendAndReadMessageAsync_IMPL, // virtual + .__kfspInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kfspInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__kfspStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStatePreInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__kfspStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__kfspStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStateInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &engstateStateInitLocked_IMPL, // virtual + .__kfspStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__kfspStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__kfspStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStateLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &engstateStateLoad_IMPL, // virtual + .__kfspStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStatePostLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL, // virtual + .__kfspStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__kfspStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kfspStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__kfspIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kfspIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_vtable = &vtable; // (kfsp) this + + // Initialize vtable(s) with 27 per-object function pointer(s). __nvoc_init_funcTable_KernelFsp_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kern_fsp_nvoc.h b/src/nvidia/generated/g_kern_fsp_nvoc.h index 4055743c7b..bd6f60c2ea 100644 --- a/src/nvidia/generated/g_kern_fsp_nvoc.h +++ b/src/nvidia/generated/g_kern_fsp_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -45,41 +45,13 @@ extern "C" { #include "core/core.h" #include "gpu/eng_state.h" #include "gpu/timer/objtmr.h" +#include "gpu/fsp/kern_fsp_cot_payload.h" +#include "gpu/fsp/kern_fsp_mctp_pkt_state.h" #include "kernel/gpu/mem_mgr/mem_desc.h" #include "kernel/gpu/gpu_halspec.h" #include "nvoc/utility.h" -#pragma pack(1) -typedef struct -{ - NvU32 constBlob; - NvU8 msgType; - NvU16 vendorId; -} MCTP_HEADER; - -// Needed to remove unnecessary padding -#pragma pack(1) -typedef struct -{ - NvU16 version; - NvU16 size; - NvU64 gspFmcSysmemOffset; - NvU64 frtsSysmemOffset; - NvU32 frtsSysmemSize; - - // Note this is an offset from the end of FB - NvU64 frtsVidmemOffset; - NvU32 frtsVidmemSize; - - // Authentication related fields - NvU32 hash384[12]; - NvU32 publicKey[96]; - NvU32 signature[96]; - - NvU64 gspBootArgsSysmemOffset; -} NVDM_PAYLOAD_COT; -#pragma pack() // State required to handle the async FSP RPC response typedef void (*AsyncRpcCallback)(NV_STATUS status, void *pArgs); @@ -91,15 +63,6 @@ typedef struct NvU32 responseBufferSize; } FSP_RPC_STATE; -// Type of packet, can either be SOM, EOM, neither, or both (1-packet messages) -typedef enum -{ - MCTP_PACKET_STATE_START, - MCTP_PACKET_STATE_INTERMEDIATE, - MCTP_PACKET_STATE_END, - MCTP_PACKET_STATE_SINGLE_PACKET -} MCTP_PACKET_STATE; - // Private field names are wrapped in PRIVATE_FIELD, which does nothing for // the matching C source file, but causes diagnostics to be issued if another @@ -111,10 +74,15 @@ typedef enum #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelFsp; + + struct KernelFsp { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelFsp *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -124,26 +92,21 @@ struct KernelFsp { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct KernelFsp *__nvoc_pbase_KernelFsp; // kfsp - // Vtable with 44 per-object function pointers - NV_STATUS (*__kfspConstructEngine__)(OBJGPU *, struct KernelFsp * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) - void (*__kfspStateDestroy__)(OBJGPU *, struct KernelFsp * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__kfspSendAndReadMessageAsync__)(OBJGPU *, struct KernelFsp * /*this*/, NvU8 *, NvU32, NvU32, NvU8 *, NvU32, AsyncRpcCallback, void *); // virtual + // Vtable with 27 per-object function pointers + NV_STATUS (*__kfspSendPacket__)(OBJGPU *, struct KernelFsp * /*this*/, NvU8 *, NvU32); // halified (2 hals) body + NV_STATUS (*__kfspReadPacket__)(OBJGPU *, struct KernelFsp * /*this*/, NvU8 *, NvU32, NvU32 *); // halified (2 hals) body + NvBool (*__kfspCanSendPacket__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body + NvBool (*__kfspIsResponseAvailable__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body NvBool (*__kfspGspFmcIsEnforced__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body NV_STATUS (*__kfspPrepareBootCommands__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body NV_STATUS (*__kfspSendBootCommands__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body NV_STATUS (*__kfspPrepareAndSendBootCommands__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body NV_STATUS (*__kfspWaitForSecureBoot__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (3 hals) body - NvU32 (*__kfspGetRmChannelSize__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body - NV_STATUS (*__kfspConfigEmemc__)(OBJGPU *, struct KernelFsp * /*this*/, NvU32, NvBool, NvBool); // halified (2 hals) body - void (*__kfspUpdateQueueHeadTail__)(OBJGPU *, struct KernelFsp * /*this*/, NvU32, NvU32); // halified (2 hals) body - void (*__kfspGetQueueHeadTail__)(OBJGPU *, struct KernelFsp * /*this*/, NvU32 *, NvU32 *); // halified (2 hals) body - void (*__kfspUpdateMsgQueueHeadTail__)(OBJGPU *, struct KernelFsp * /*this*/, NvU32, NvU32); // halified (2 hals) body - void (*__kfspGetMsgQueueHeadTail__)(OBJGPU *, struct KernelFsp * /*this*/, NvU32 *, NvU32 *); // halified (2 hals) body + NvU32 (*__kfspGetMaxSendPacketSize__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body + NvU32 (*__kfspGetMaxRecvPacketSize__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body NvU8 (*__kfspNvdmToSeid__)(OBJGPU *, struct KernelFsp * /*this*/, NvU8); // halified (2 hals) body NvU32 (*__kfspCreateMctpHeader__)(OBJGPU *, struct KernelFsp * /*this*/, NvU8, NvU8, NvU8, NvU8); // halified (2 hals) body NvU32 (*__kfspCreateNvdmHeader__)(OBJGPU *, struct KernelFsp * /*this*/, NvU32); // halified (2 hals) body - NV_STATUS (*__kfspWriteToEmem__)(OBJGPU *, struct KernelFsp * /*this*/, NvU8 *, NvU32); // halified (2 hals) body - NV_STATUS (*__kfspReadFromEmem__)(OBJGPU *, struct KernelFsp * /*this*/, NvU8 *, NvU32); // halified (2 hals) body NV_STATUS (*__kfspGetPacketInfo__)(OBJGPU *, struct KernelFsp * /*this*/, NvU8 *, NvU32, MCTP_PACKET_STATE *, NvU8 *); // halified (2 hals) body NV_STATUS (*__kfspValidateMctpPayloadHeader__)(OBJGPU *, struct KernelFsp * /*this*/, NvU8 *, NvU32); // halified (2 hals) body NV_STATUS (*__kfspProcessNvdmMessage__)(OBJGPU *, struct KernelFsp * /*this*/, NvU8 *, NvU32); // halified (2 hals) body @@ -157,18 +120,6 @@ struct KernelFsp { void (*__kfspFrtsSysmemLocationClear__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body void (*__kfspCheckForClockBoostCapability__)(OBJGPU *, struct KernelFsp * /*this*/); // halified (2 hals) body NV_STATUS (*__kfspSendClockBoostRpc__)(OBJGPU *, struct KernelFsp * /*this*/, NvU8); // halified (2 hals) body - void (*__kfspInitMissing__)(struct OBJGPU *, struct KernelFsp * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kfspStatePreInitLocked__)(struct OBJGPU *, struct KernelFsp * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kfspStatePreInitUnlocked__)(struct OBJGPU *, struct KernelFsp * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kfspStateInitLocked__)(struct OBJGPU *, struct KernelFsp * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kfspStateInitUnlocked__)(struct OBJGPU *, struct KernelFsp * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kfspStatePreLoad__)(struct OBJGPU *, struct KernelFsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kfspStateLoad__)(struct OBJGPU *, struct KernelFsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kfspStatePostLoad__)(struct OBJGPU *, struct KernelFsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kfspStatePreUnload__)(struct OBJGPU *, struct KernelFsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kfspStateUnload__)(struct OBJGPU *, struct KernelFsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kfspStatePostUnload__)(struct OBJGPU *, struct KernelFsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NvBool (*__kfspIsPresent__)(struct OBJGPU *, struct KernelFsp * /*this*/); // virtual inherited (engstate) base (engstate) // 7 PDB properties NvBool PDB_PROP_KFSP_FSP_FUSE_ERROR_CHECK_ENABLED; @@ -196,6 +147,28 @@ struct KernelFsp { NvBool bClockBoostDisabledViaRegkey; }; + +// Metadata including vtable with 15 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelFsp { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + + NV_STATUS (*__kfspConstructEngine__)(OBJGPU *, struct KernelFsp * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kfspStateUnload__)(OBJGPU *, struct KernelFsp * /*this*/, NvU32); // virtual override (engstate) base (engstate) + void (*__kfspStateDestroy__)(OBJGPU *, struct KernelFsp * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kfspSendAndReadMessageAsync__)(OBJGPU *, struct KernelFsp * /*this*/, NvU8 *, NvU32, NvU32, NvU8 *, NvU32, AsyncRpcCallback, void *); // virtual + void (*__kfspInitMissing__)(struct OBJGPU *, struct KernelFsp * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfspStatePreInitLocked__)(struct OBJGPU *, struct KernelFsp * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfspStatePreInitUnlocked__)(struct OBJGPU *, struct KernelFsp * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfspStateInitLocked__)(struct OBJGPU *, struct KernelFsp * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfspStateInitUnlocked__)(struct OBJGPU *, struct KernelFsp * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfspStatePreLoad__)(struct OBJGPU *, struct KernelFsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfspStateLoad__)(struct OBJGPU *, struct KernelFsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfspStatePostLoad__)(struct OBJGPU *, struct KernelFsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfspStatePreUnload__)(struct OBJGPU *, struct KernelFsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfspStatePostUnload__)(struct OBJGPU *, struct KernelFsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__kfspIsPresent__)(struct OBJGPU *, struct KernelFsp * /*this*/); // virtual inherited (engstate) base (engstate) +}; + #ifndef __NVOC_CLASS_KernelFsp_TYPEDEF__ #define __NVOC_CLASS_KernelFsp_TYPEDEF__ typedef struct KernelFsp KernelFsp; @@ -242,12 +215,26 @@ NV_STATUS __nvoc_objCreate_KernelFsp(KernelFsp**, Dynamic*, NvU32); // Wrapper macros -#define kfspConstructEngine_FNPTR(pKernelFsp) pKernelFsp->__kfspConstructEngine__ +#define kfspConstructEngine_FNPTR(pKernelFsp) pKernelFsp->__nvoc_vtable->__kfspConstructEngine__ #define kfspConstructEngine(pGpu, pKernelFsp, arg3) kfspConstructEngine_DISPATCH(pGpu, pKernelFsp, arg3) -#define kfspStateDestroy_FNPTR(pKernelFsp) pKernelFsp->__kfspStateDestroy__ +#define kfspStateUnload_FNPTR(pKernelFsp) pKernelFsp->__nvoc_vtable->__kfspStateUnload__ +#define kfspStateUnload(pGpu, pKernelFsp, flags) kfspStateUnload_DISPATCH(pGpu, pKernelFsp, flags) +#define kfspStateDestroy_FNPTR(pKernelFsp) pKernelFsp->__nvoc_vtable->__kfspStateDestroy__ #define kfspStateDestroy(pGpu, pKernelFsp) kfspStateDestroy_DISPATCH(pGpu, pKernelFsp) -#define kfspSendAndReadMessageAsync_FNPTR(pKernelFsp) pKernelFsp->__kfspSendAndReadMessageAsync__ +#define kfspSendAndReadMessageAsync_FNPTR(pKernelFsp) pKernelFsp->__nvoc_vtable->__kfspSendAndReadMessageAsync__ #define kfspSendAndReadMessageAsync(pGpu, pKernelFsp, pPayload, size, nvdmType, pResponsePayload, responseBufferSize, callback, pCallbackArgs) kfspSendAndReadMessageAsync_DISPATCH(pGpu, pKernelFsp, pPayload, size, nvdmType, pResponsePayload, responseBufferSize, callback, pCallbackArgs) +#define kfspSendPacket_FNPTR(pKernelFsp) pKernelFsp->__kfspSendPacket__ +#define kfspSendPacket(pGpu, pKernelFsp, pPacket, packetSize) kfspSendPacket_DISPATCH(pGpu, pKernelFsp, pPacket, packetSize) +#define kfspSendPacket_HAL(pGpu, pKernelFsp, pPacket, packetSize) kfspSendPacket_DISPATCH(pGpu, pKernelFsp, pPacket, packetSize) +#define kfspReadPacket_FNPTR(pKernelFsp) pKernelFsp->__kfspReadPacket__ +#define kfspReadPacket(pGpu, pKernelFsp, pPacket, maxPacketSize, bytesRead) kfspReadPacket_DISPATCH(pGpu, pKernelFsp, pPacket, maxPacketSize, bytesRead) +#define kfspReadPacket_HAL(pGpu, pKernelFsp, pPacket, maxPacketSize, bytesRead) kfspReadPacket_DISPATCH(pGpu, pKernelFsp, pPacket, maxPacketSize, bytesRead) +#define kfspCanSendPacket_FNPTR(pKernelFsp) pKernelFsp->__kfspCanSendPacket__ +#define kfspCanSendPacket(pGpu, pKernelFsp) kfspCanSendPacket_DISPATCH(pGpu, pKernelFsp) +#define kfspCanSendPacket_HAL(pGpu, pKernelFsp) kfspCanSendPacket_DISPATCH(pGpu, pKernelFsp) +#define kfspIsResponseAvailable_FNPTR(pKernelFsp) pKernelFsp->__kfspIsResponseAvailable__ +#define kfspIsResponseAvailable(pGpu, pKernelFsp) kfspIsResponseAvailable_DISPATCH(pGpu, pKernelFsp) +#define kfspIsResponseAvailable_HAL(pGpu, pKernelFsp) kfspIsResponseAvailable_DISPATCH(pGpu, pKernelFsp) #define kfspGspFmcIsEnforced_FNPTR(pKernelFsp) pKernelFsp->__kfspGspFmcIsEnforced__ #define kfspGspFmcIsEnforced(pGpu, pKernelFsp) kfspGspFmcIsEnforced_DISPATCH(pGpu, pKernelFsp) #define kfspGspFmcIsEnforced_HAL(pGpu, pKernelFsp) kfspGspFmcIsEnforced_DISPATCH(pGpu, pKernelFsp) @@ -263,24 +250,12 @@ NV_STATUS __nvoc_objCreate_KernelFsp(KernelFsp**, Dynamic*, NvU32); #define kfspWaitForSecureBoot_FNPTR(pKernelFsp) pKernelFsp->__kfspWaitForSecureBoot__ #define kfspWaitForSecureBoot(pGpu, pKernelFsp) kfspWaitForSecureBoot_DISPATCH(pGpu, pKernelFsp) #define kfspWaitForSecureBoot_HAL(pGpu, pKernelFsp) kfspWaitForSecureBoot_DISPATCH(pGpu, pKernelFsp) -#define kfspGetRmChannelSize_FNPTR(pKernelFsp) pKernelFsp->__kfspGetRmChannelSize__ -#define kfspGetRmChannelSize(pGpu, pKernelFsp) kfspGetRmChannelSize_DISPATCH(pGpu, pKernelFsp) -#define kfspGetRmChannelSize_HAL(pGpu, pKernelFsp) kfspGetRmChannelSize_DISPATCH(pGpu, pKernelFsp) -#define kfspConfigEmemc_FNPTR(pKernelFsp) pKernelFsp->__kfspConfigEmemc__ -#define kfspConfigEmemc(pGpu, pKernelFsp, offset, bAincw, bAincr) kfspConfigEmemc_DISPATCH(pGpu, pKernelFsp, offset, bAincw, bAincr) -#define kfspConfigEmemc_HAL(pGpu, pKernelFsp, offset, bAincw, bAincr) kfspConfigEmemc_DISPATCH(pGpu, pKernelFsp, offset, bAincw, bAincr) -#define kfspUpdateQueueHeadTail_FNPTR(pKernelFsp) pKernelFsp->__kfspUpdateQueueHeadTail__ -#define kfspUpdateQueueHeadTail(pGpu, pKernelFsp, queueHead, queueTail) kfspUpdateQueueHeadTail_DISPATCH(pGpu, pKernelFsp, queueHead, queueTail) -#define kfspUpdateQueueHeadTail_HAL(pGpu, pKernelFsp, queueHead, queueTail) kfspUpdateQueueHeadTail_DISPATCH(pGpu, pKernelFsp, queueHead, queueTail) -#define kfspGetQueueHeadTail_FNPTR(pKernelFsp) pKernelFsp->__kfspGetQueueHeadTail__ -#define kfspGetQueueHeadTail(pGpu, pKernelFsp, pQueueHead, pQueueTail) kfspGetQueueHeadTail_DISPATCH(pGpu, pKernelFsp, pQueueHead, pQueueTail) -#define kfspGetQueueHeadTail_HAL(pGpu, pKernelFsp, pQueueHead, pQueueTail) kfspGetQueueHeadTail_DISPATCH(pGpu, pKernelFsp, pQueueHead, pQueueTail) -#define kfspUpdateMsgQueueHeadTail_FNPTR(pKernelFsp) pKernelFsp->__kfspUpdateMsgQueueHeadTail__ -#define kfspUpdateMsgQueueHeadTail(pGpu, pKernelFsp, msgqHead, msgqTail) kfspUpdateMsgQueueHeadTail_DISPATCH(pGpu, pKernelFsp, msgqHead, msgqTail) -#define kfspUpdateMsgQueueHeadTail_HAL(pGpu, pKernelFsp, msgqHead, msgqTail) kfspUpdateMsgQueueHeadTail_DISPATCH(pGpu, pKernelFsp, msgqHead, msgqTail) -#define kfspGetMsgQueueHeadTail_FNPTR(pKernelFsp) pKernelFsp->__kfspGetMsgQueueHeadTail__ -#define kfspGetMsgQueueHeadTail(pGpu, pKernelFsp, pMsgqHead, pMsgqTail) kfspGetMsgQueueHeadTail_DISPATCH(pGpu, pKernelFsp, pMsgqHead, pMsgqTail) -#define kfspGetMsgQueueHeadTail_HAL(pGpu, pKernelFsp, pMsgqHead, pMsgqTail) kfspGetMsgQueueHeadTail_DISPATCH(pGpu, pKernelFsp, pMsgqHead, pMsgqTail) +#define kfspGetMaxSendPacketSize_FNPTR(pKernelFsp) pKernelFsp->__kfspGetMaxSendPacketSize__ +#define kfspGetMaxSendPacketSize(pGpu, pKernelFsp) kfspGetMaxSendPacketSize_DISPATCH(pGpu, pKernelFsp) +#define kfspGetMaxSendPacketSize_HAL(pGpu, pKernelFsp) kfspGetMaxSendPacketSize_DISPATCH(pGpu, pKernelFsp) +#define kfspGetMaxRecvPacketSize_FNPTR(pKernelFsp) pKernelFsp->__kfspGetMaxRecvPacketSize__ +#define kfspGetMaxRecvPacketSize(pGpu, pKernelFsp) kfspGetMaxRecvPacketSize_DISPATCH(pGpu, pKernelFsp) +#define kfspGetMaxRecvPacketSize_HAL(pGpu, pKernelFsp) kfspGetMaxRecvPacketSize_DISPATCH(pGpu, pKernelFsp) #define kfspNvdmToSeid_FNPTR(pKernelFsp) pKernelFsp->__kfspNvdmToSeid__ #define kfspNvdmToSeid(pGpu, pKernelFsp, nvdmType) kfspNvdmToSeid_DISPATCH(pGpu, pKernelFsp, nvdmType) #define kfspNvdmToSeid_HAL(pGpu, pKernelFsp, nvdmType) kfspNvdmToSeid_DISPATCH(pGpu, pKernelFsp, nvdmType) @@ -290,12 +265,6 @@ NV_STATUS __nvoc_objCreate_KernelFsp(KernelFsp**, Dynamic*, NvU32); #define kfspCreateNvdmHeader_FNPTR(pKernelFsp) pKernelFsp->__kfspCreateNvdmHeader__ #define kfspCreateNvdmHeader(pGpu, pKernelFsp, nvdmType) kfspCreateNvdmHeader_DISPATCH(pGpu, pKernelFsp, nvdmType) #define kfspCreateNvdmHeader_HAL(pGpu, pKernelFsp, nvdmType) kfspCreateNvdmHeader_DISPATCH(pGpu, pKernelFsp, nvdmType) -#define kfspWriteToEmem_FNPTR(pKernelFsp) pKernelFsp->__kfspWriteToEmem__ -#define kfspWriteToEmem(pGpu, pKernelFsp, pBuffer, size) kfspWriteToEmem_DISPATCH(pGpu, pKernelFsp, pBuffer, size) -#define kfspWriteToEmem_HAL(pGpu, pKernelFsp, pBuffer, size) kfspWriteToEmem_DISPATCH(pGpu, pKernelFsp, pBuffer, size) -#define kfspReadFromEmem_FNPTR(pKernelFsp) pKernelFsp->__kfspReadFromEmem__ -#define kfspReadFromEmem(pGpu, pKernelFsp, pBuffer, size) kfspReadFromEmem_DISPATCH(pGpu, pKernelFsp, pBuffer, size) -#define kfspReadFromEmem_HAL(pGpu, pKernelFsp, pBuffer, size) kfspReadFromEmem_DISPATCH(pGpu, pKernelFsp, pBuffer, size) #define kfspGetPacketInfo_FNPTR(pKernelFsp) pKernelFsp->__kfspGetPacketInfo__ #define kfspGetPacketInfo(pGpu, pKernelFsp, pBuffer, size, pPacketState, pTag) kfspGetPacketInfo_DISPATCH(pGpu, pKernelFsp, pBuffer, size, pPacketState, pTag) #define kfspGetPacketInfo_HAL(pGpu, pKernelFsp, pBuffer, size, pPacketState, pTag) kfspGetPacketInfo_DISPATCH(pGpu, pKernelFsp, pBuffer, size, pPacketState, pTag) @@ -335,42 +304,60 @@ NV_STATUS __nvoc_objCreate_KernelFsp(KernelFsp**, Dynamic*, NvU32); #define kfspSendClockBoostRpc_FNPTR(pKernelFsp) pKernelFsp->__kfspSendClockBoostRpc__ #define kfspSendClockBoostRpc(pGpu, pKernelFsp, cmd) kfspSendClockBoostRpc_DISPATCH(pGpu, pKernelFsp, cmd) #define kfspSendClockBoostRpc_HAL(pGpu, pKernelFsp, cmd) kfspSendClockBoostRpc_DISPATCH(pGpu, pKernelFsp, cmd) -#define kfspInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define kfspInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define kfspInitMissing(pGpu, pEngstate) kfspInitMissing_DISPATCH(pGpu, pEngstate) -#define kfspStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define kfspStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define kfspStatePreInitLocked(pGpu, pEngstate) kfspStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define kfspStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define kfspStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define kfspStatePreInitUnlocked(pGpu, pEngstate) kfspStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kfspStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define kfspStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitLocked__ #define kfspStateInitLocked(pGpu, pEngstate) kfspStateInitLocked_DISPATCH(pGpu, pEngstate) -#define kfspStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kfspStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define kfspStateInitUnlocked(pGpu, pEngstate) kfspStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kfspStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kfspStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define kfspStatePreLoad(pGpu, pEngstate, arg3) kfspStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kfspStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define kfspStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateLoad__ #define kfspStateLoad(pGpu, pEngstate, arg3) kfspStateLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kfspStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define kfspStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostLoad__ #define kfspStatePostLoad(pGpu, pEngstate, arg3) kfspStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kfspStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kfspStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define kfspStatePreUnload(pGpu, pEngstate, arg3) kfspStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kfspStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ -#define kfspStateUnload(pGpu, pEngstate, arg3) kfspStateUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kfspStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kfspStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define kfspStatePostUnload(pGpu, pEngstate, arg3) kfspStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kfspIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define kfspIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define kfspIsPresent(pGpu, pEngstate) kfspIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS kfspConstructEngine_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, ENGDESCRIPTOR arg3) { - return pKernelFsp->__kfspConstructEngine__(pGpu, pKernelFsp, arg3); + return pKernelFsp->__nvoc_vtable->__kfspConstructEngine__(pGpu, pKernelFsp, arg3); +} + +static inline NV_STATUS kfspStateUnload_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 flags) { + return pKernelFsp->__nvoc_vtable->__kfspStateUnload__(pGpu, pKernelFsp, flags); } static inline void kfspStateDestroy_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - pKernelFsp->__kfspStateDestroy__(pGpu, pKernelFsp); + pKernelFsp->__nvoc_vtable->__kfspStateDestroy__(pGpu, pKernelFsp); } static inline NV_STATUS kfspSendAndReadMessageAsync_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pPayload, NvU32 size, NvU32 nvdmType, NvU8 *pResponsePayload, NvU32 responseBufferSize, AsyncRpcCallback callback, void *pCallbackArgs) { - return pKernelFsp->__kfspSendAndReadMessageAsync__(pGpu, pKernelFsp, pPayload, size, nvdmType, pResponsePayload, responseBufferSize, callback, pCallbackArgs); + return pKernelFsp->__nvoc_vtable->__kfspSendAndReadMessageAsync__(pGpu, pKernelFsp, pPayload, size, nvdmType, pResponsePayload, responseBufferSize, callback, pCallbackArgs); +} + +static inline NV_STATUS kfspSendPacket_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pPacket, NvU32 packetSize) { + return pKernelFsp->__kfspSendPacket__(pGpu, pKernelFsp, pPacket, packetSize); +} + +static inline NV_STATUS kfspReadPacket_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pPacket, NvU32 maxPacketSize, NvU32 *bytesRead) { + return pKernelFsp->__kfspReadPacket__(pGpu, pKernelFsp, pPacket, maxPacketSize, bytesRead); +} + +static inline NvBool kfspCanSendPacket_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return pKernelFsp->__kfspCanSendPacket__(pGpu, pKernelFsp); +} + +static inline NvBool kfspIsResponseAvailable_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return pKernelFsp->__kfspIsResponseAvailable__(pGpu, pKernelFsp); } static inline NvBool kfspGspFmcIsEnforced_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { @@ -393,28 +380,12 @@ static inline NV_STATUS kfspWaitForSecureBoot_DISPATCH(OBJGPU *pGpu, struct Kern return pKernelFsp->__kfspWaitForSecureBoot__(pGpu, pKernelFsp); } -static inline NvU32 kfspGetRmChannelSize_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return pKernelFsp->__kfspGetRmChannelSize__(pGpu, pKernelFsp); +static inline NvU32 kfspGetMaxSendPacketSize_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return pKernelFsp->__kfspGetMaxSendPacketSize__(pGpu, pKernelFsp); } -static inline NV_STATUS kfspConfigEmemc_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 offset, NvBool bAincw, NvBool bAincr) { - return pKernelFsp->__kfspConfigEmemc__(pGpu, pKernelFsp, offset, bAincw, bAincr); -} - -static inline void kfspUpdateQueueHeadTail_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 queueHead, NvU32 queueTail) { - pKernelFsp->__kfspUpdateQueueHeadTail__(pGpu, pKernelFsp, queueHead, queueTail); -} - -static inline void kfspGetQueueHeadTail_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 *pQueueHead, NvU32 *pQueueTail) { - pKernelFsp->__kfspGetQueueHeadTail__(pGpu, pKernelFsp, pQueueHead, pQueueTail); -} - -static inline void kfspUpdateMsgQueueHeadTail_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 msgqHead, NvU32 msgqTail) { - pKernelFsp->__kfspUpdateMsgQueueHeadTail__(pGpu, pKernelFsp, msgqHead, msgqTail); -} - -static inline void kfspGetMsgQueueHeadTail_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 *pMsgqHead, NvU32 *pMsgqTail) { - pKernelFsp->__kfspGetMsgQueueHeadTail__(pGpu, pKernelFsp, pMsgqHead, pMsgqTail); +static inline NvU32 kfspGetMaxRecvPacketSize_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return pKernelFsp->__kfspGetMaxRecvPacketSize__(pGpu, pKernelFsp); } static inline NvU8 kfspNvdmToSeid_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 nvdmType) { @@ -429,14 +400,6 @@ static inline NvU32 kfspCreateNvdmHeader_DISPATCH(OBJGPU *pGpu, struct KernelFsp return pKernelFsp->__kfspCreateNvdmHeader__(pGpu, pKernelFsp, nvdmType); } -static inline NV_STATUS kfspWriteToEmem_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { - return pKernelFsp->__kfspWriteToEmem__(pGpu, pKernelFsp, pBuffer, size); -} - -static inline NV_STATUS kfspReadFromEmem_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { - return pKernelFsp->__kfspReadFromEmem__(pGpu, pKernelFsp, pBuffer, size); -} - static inline NV_STATUS kfspGetPacketInfo_DISPATCH(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size, MCTP_PACKET_STATE *pPacketState, NvU8 *pTag) { return pKernelFsp->__kfspGetPacketInfo__(pGpu, pKernelFsp, pBuffer, size, pPacketState, pTag); } @@ -490,63 +453,85 @@ static inline NV_STATUS kfspSendClockBoostRpc_DISPATCH(OBJGPU *pGpu, struct Kern } static inline void kfspInitMissing_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pEngstate) { - pEngstate->__kfspInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kfspInitMissing__(pGpu, pEngstate); } static inline NV_STATUS kfspStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pEngstate) { - return pEngstate->__kfspStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kfspStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS kfspStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pEngstate) { - return pEngstate->__kfspStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kfspStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kfspStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pEngstate) { - return pEngstate->__kfspStateInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kfspStateInitLocked__(pGpu, pEngstate); } static inline NV_STATUS kfspStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pEngstate) { - return pEngstate->__kfspStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kfspStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kfspStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { - return pEngstate->__kfspStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kfspStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kfspStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { - return pEngstate->__kfspStateLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kfspStateLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kfspStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { - return pEngstate->__kfspStatePostLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kfspStatePostLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kfspStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { - return pEngstate->__kfspStatePreUnload__(pGpu, pEngstate, arg3); -} - -static inline NV_STATUS kfspStateUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { - return pEngstate->__kfspStateUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kfspStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS kfspStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pEngstate, NvU32 arg3) { - return pEngstate->__kfspStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kfspStatePostUnload__(pGpu, pEngstate, arg3); } static inline NvBool kfspIsPresent_DISPATCH(struct OBJGPU *pGpu, struct KernelFsp *pEngstate) { - return pEngstate->__kfspIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kfspIsPresent__(pGpu, pEngstate); } NV_STATUS kfspConstructEngine_IMPL(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, ENGDESCRIPTOR arg3); +NV_STATUS kfspStateUnload_IMPL(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 flags); + void kfspStateDestroy_IMPL(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); NV_STATUS kfspSendAndReadMessageAsync_IMPL(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pPayload, NvU32 size, NvU32 nvdmType, NvU8 *pResponsePayload, NvU32 responseBufferSize, AsyncRpcCallback callback, void *pCallbackArgs); +NV_STATUS kfspSendPacket_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pPacket, NvU32 packetSize); + +static inline NV_STATUS kfspSendPacket_395e98(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pPacket, NvU32 packetSize) { + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS kfspReadPacket_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pPacket, NvU32 maxPacketSize, NvU32 *bytesRead); + +static inline NV_STATUS kfspReadPacket_395e98(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pPacket, NvU32 maxPacketSize, NvU32 *bytesRead) { + return NV_ERR_NOT_SUPPORTED; +} + +NvBool kfspCanSendPacket_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); + +static inline NvBool kfspCanSendPacket_d69453(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return NV_FALSE; +} + +NvBool kfspIsResponseAvailable_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); + +static inline NvBool kfspIsResponseAvailable_d69453(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return NV_FALSE; +} + NvBool kfspGspFmcIsEnforced_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); -static inline NvBool kfspGspFmcIsEnforced_491d52(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return ((NvBool)(0 != 0)); +static inline NvBool kfspGspFmcIsEnforced_3dd2c9(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return NV_FALSE; } NV_STATUS kfspPrepareBootCommands_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); @@ -575,40 +560,16 @@ static inline NV_STATUS kfspWaitForSecureBoot_46f6a7(OBJGPU *pGpu, struct Kernel return NV_ERR_NOT_SUPPORTED; } -NvU32 kfspGetRmChannelSize_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); +NvU32 kfspGetMaxSendPacketSize_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); -static inline NvU32 kfspGetRmChannelSize_b2b553(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { +static inline NvU32 kfspGetMaxSendPacketSize_b2b553(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { return 0; } -NV_STATUS kfspConfigEmemc_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 offset, NvBool bAincw, NvBool bAincr); +NvU32 kfspGetMaxRecvPacketSize_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); -static inline NV_STATUS kfspConfigEmemc_395e98(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 offset, NvBool bAincw, NvBool bAincr) { - return NV_ERR_NOT_SUPPORTED; -} - -void kfspUpdateQueueHeadTail_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 queueHead, NvU32 queueTail); - -static inline void kfspUpdateQueueHeadTail_d44104(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 queueHead, NvU32 queueTail) { - return; -} - -void kfspGetQueueHeadTail_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 *pQueueHead, NvU32 *pQueueTail); - -static inline void kfspGetQueueHeadTail_d44104(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 *pQueueHead, NvU32 *pQueueTail) { - return; -} - -void kfspUpdateMsgQueueHeadTail_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 msgqHead, NvU32 msgqTail); - -static inline void kfspUpdateMsgQueueHeadTail_d44104(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 msgqHead, NvU32 msgqTail) { - return; -} - -void kfspGetMsgQueueHeadTail_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 *pMsgqHead, NvU32 *pMsgqTail); - -static inline void kfspGetMsgQueueHeadTail_d44104(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU32 *pMsgqHead, NvU32 *pMsgqTail) { - return; +static inline NvU32 kfspGetMaxRecvPacketSize_b2b553(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return 0; } NvU8 kfspNvdmToSeid_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 nvdmType); @@ -629,18 +590,6 @@ static inline NvU32 kfspCreateNvdmHeader_b2b553(OBJGPU *pGpu, struct KernelFsp * return 0; } -NV_STATUS kfspWriteToEmem_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size); - -static inline NV_STATUS kfspWriteToEmem_395e98(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { - return NV_ERR_NOT_SUPPORTED; -} - -NV_STATUS kfspReadFromEmem_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size); - -static inline NV_STATUS kfspReadFromEmem_395e98(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size) { - return NV_ERR_NOT_SUPPORTED; -} - NV_STATUS kfspGetPacketInfo_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size, MCTP_PACKET_STATE *pPacketState, NvU8 *pTag); static inline NV_STATUS kfspGetPacketInfo_395e98(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pBuffer, NvU32 size, MCTP_PACKET_STATE *pPacketState, NvU8 *pTag) { @@ -691,8 +640,8 @@ static inline NV_STATUS kfspWaitForGspTargetMaskReleased_395e98(OBJGPU *pGpu, st NvBool kfspRequiresBug3957833WAR_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); -static inline NvBool kfspRequiresBug3957833WAR_491d52(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - return ((NvBool)(0 != 0)); +static inline NvBool kfspRequiresBug3957833WAR_3dd2c9(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { + return NV_FALSE; } NV_STATUS kfspFrtsSysmemLocationProgram_GH100(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); @@ -729,17 +678,6 @@ static inline void kfspCleanupBootState(OBJGPU *pGpu, struct KernelFsp *pKernelF #define kfspCleanupBootState(pGpu, pKernelFsp) kfspCleanupBootState_IMPL(pGpu, pKernelFsp) #endif //__nvoc_kern_fsp_h_disabled -NV_STATUS kfspSendPacket_IMPL(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pPacket, NvU32 packetSize); - -#ifdef __nvoc_kern_fsp_h_disabled -static inline NV_STATUS kfspSendPacket(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pPacket, NvU32 packetSize) { - NV_ASSERT_FAILED_PRECOMP("KernelFsp was disabled!"); - return NV_ERR_NOT_SUPPORTED; -} -#else //__nvoc_kern_fsp_h_disabled -#define kfspSendPacket(pGpu, pKernelFsp, pPacket, packetSize) kfspSendPacket_IMPL(pGpu, pKernelFsp, pPacket, packetSize) -#endif //__nvoc_kern_fsp_h_disabled - NV_STATUS kfspSendAndReadMessage_IMPL(OBJGPU *pGpu, struct KernelFsp *pKernelFsp, NvU8 *pPayload, NvU32 size, NvU32 nvdmType, NvU8 *pResponsePayload, NvU32 responseBufferSize); #ifdef __nvoc_kern_fsp_h_disabled @@ -751,37 +689,15 @@ static inline NV_STATUS kfspSendAndReadMessage(OBJGPU *pGpu, struct KernelFsp *p #define kfspSendAndReadMessage(pGpu, pKernelFsp, pPayload, size, nvdmType, pResponsePayload, responseBufferSize) kfspSendAndReadMessage_IMPL(pGpu, pKernelFsp, pPayload, size, nvdmType, pResponsePayload, responseBufferSize) #endif //__nvoc_kern_fsp_h_disabled -NvBool kfspIsQueueEmpty_IMPL(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); - -#ifdef __nvoc_kern_fsp_h_disabled -static inline NvBool kfspIsQueueEmpty(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - NV_ASSERT_FAILED_PRECOMP("KernelFsp was disabled!"); - return NV_FALSE; -} -#else //__nvoc_kern_fsp_h_disabled -#define kfspIsQueueEmpty(pGpu, pKernelFsp) kfspIsQueueEmpty_IMPL(pGpu, pKernelFsp) -#endif //__nvoc_kern_fsp_h_disabled - -NV_STATUS kfspPollForQueueEmpty_IMPL(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); +NV_STATUS kfspPollForCanSend_IMPL(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); #ifdef __nvoc_kern_fsp_h_disabled -static inline NV_STATUS kfspPollForQueueEmpty(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { +static inline NV_STATUS kfspPollForCanSend(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { NV_ASSERT_FAILED_PRECOMP("KernelFsp was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kern_fsp_h_disabled -#define kfspPollForQueueEmpty(pGpu, pKernelFsp) kfspPollForQueueEmpty_IMPL(pGpu, pKernelFsp) -#endif //__nvoc_kern_fsp_h_disabled - -NvBool kfspIsMsgQueueEmpty_IMPL(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); - -#ifdef __nvoc_kern_fsp_h_disabled -static inline NvBool kfspIsMsgQueueEmpty(OBJGPU *pGpu, struct KernelFsp *pKernelFsp) { - NV_ASSERT_FAILED_PRECOMP("KernelFsp was disabled!"); - return NV_FALSE; -} -#else //__nvoc_kern_fsp_h_disabled -#define kfspIsMsgQueueEmpty(pGpu, pKernelFsp) kfspIsMsgQueueEmpty_IMPL(pGpu, pKernelFsp) +#define kfspPollForCanSend(pGpu, pKernelFsp) kfspPollForCanSend_IMPL(pGpu, pKernelFsp) #endif //__nvoc_kern_fsp_h_disabled NV_STATUS kfspPollForResponse_IMPL(OBJGPU *pGpu, struct KernelFsp *pKernelFsp); diff --git a/src/nvidia/generated/g_kern_gmmu_nvoc.c b/src/nvidia/generated/g_kern_gmmu_nvoc.c index 5632c05a2a..f26154ca10 100644 --- a/src/nvidia/generated/g_kern_gmmu_nvoc.c +++ b/src/nvidia/generated/g_kern_gmmu_nvoc.c @@ -75,98 +75,120 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGmmu = /*pExportInfo=*/ &__nvoc_export_info_KernelGmmu }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, ENGDESCRIPTOR arg3); // this +NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu); // this +NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, NvU32 arg3); // this +NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, NvU32 arg3); // this +NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateStatePostLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, NvU32 arg3); // this +NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateStatePreUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, NvU32 arg3); // this +void __nvoc_down_thunk_KernelGmmu_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu); // this +void __nvoc_down_thunk_KernelGmmu_intrservRegisterIntrService(OBJGPU *pGpu, struct IntrService *pKernelGmmu, IntrServiceRecord arg3[175]); // this +NvBool __nvoc_down_thunk_KernelGmmu_intrservClearInterrupt(OBJGPU *pGpu, struct IntrService *pKernelGmmu, IntrServiceClearInterruptArguments *pParams); // this +NvU32 __nvoc_down_thunk_KernelGmmu_intrservServiceInterrupt(OBJGPU *pGpu, struct IntrService *pKernelGmmu, IntrServiceServiceInterruptArguments *pParams); // this +NV_STATUS __nvoc_down_thunk_KernelGmmu_intrservServiceNotificationInterrupt(OBJGPU *pGpu, struct IntrService *pKernelGmmu, IntrServiceServiceNotificationInterruptArguments *pParams); // this + // 11 down-thunk(s) defined to bridge methods in KernelGmmu from superclasses // kgmmuConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, ENGDESCRIPTOR arg3) { +NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, ENGDESCRIPTOR arg3) { return kgmmuConstructEngine(pGpu, (struct KernelGmmu *)(((unsigned char *) pKernelGmmu) - __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset), arg3); } // kgmmuStateInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu) { +NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu) { return kgmmuStateInitLocked(pGpu, (struct KernelGmmu *)(((unsigned char *) pKernelGmmu) - __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset)); } // kgmmuStateLoad: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, NvU32 arg3) { return kgmmuStateLoad(pGpu, (struct KernelGmmu *)(((unsigned char *) pKernelGmmu) - __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset), arg3); } // kgmmuStateUnload: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, NvU32 arg3) { return kgmmuStateUnload(pGpu, (struct KernelGmmu *)(((unsigned char *) pKernelGmmu) - __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset), arg3); } // kgmmuStatePostLoad: virtual halified (singleton optimized) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateStatePostLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateStatePostLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, NvU32 arg3) { return kgmmuStatePostLoad(pGpu, (struct KernelGmmu *)(((unsigned char *) pKernelGmmu) - __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset), arg3); } // kgmmuStatePreUnload: virtual halified (singleton optimized) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateStatePreUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_KernelGmmu_engstateStatePreUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu, NvU32 arg3) { return kgmmuStatePreUnload(pGpu, (struct KernelGmmu *)(((unsigned char *) pKernelGmmu) - __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset), arg3); } // kgmmuStateDestroy: virtual override (engstate) base (engstate) -static void __nvoc_down_thunk_KernelGmmu_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu) { +void __nvoc_down_thunk_KernelGmmu_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelGmmu) { kgmmuStateDestroy(pGpu, (struct KernelGmmu *)(((unsigned char *) pKernelGmmu) - __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset)); } // kgmmuRegisterIntrService: virtual override (intrserv) base (intrserv) -static void __nvoc_down_thunk_KernelGmmu_intrservRegisterIntrService(OBJGPU *pGpu, struct IntrService *pKernelGmmu, IntrServiceRecord arg3[175]) { +void __nvoc_down_thunk_KernelGmmu_intrservRegisterIntrService(OBJGPU *pGpu, struct IntrService *pKernelGmmu, IntrServiceRecord arg3[175]) { kgmmuRegisterIntrService(pGpu, (struct KernelGmmu *)(((unsigned char *) pKernelGmmu) - __nvoc_rtti_KernelGmmu_IntrService.offset), arg3); } // kgmmuClearInterrupt: virtual override (intrserv) base (intrserv) -static NvBool __nvoc_down_thunk_KernelGmmu_intrservClearInterrupt(OBJGPU *pGpu, struct IntrService *pKernelGmmu, IntrServiceClearInterruptArguments *pParams) { +NvBool __nvoc_down_thunk_KernelGmmu_intrservClearInterrupt(OBJGPU *pGpu, struct IntrService *pKernelGmmu, IntrServiceClearInterruptArguments *pParams) { return kgmmuClearInterrupt(pGpu, (struct KernelGmmu *)(((unsigned char *) pKernelGmmu) - __nvoc_rtti_KernelGmmu_IntrService.offset), pParams); } // kgmmuServiceInterrupt: virtual override (intrserv) base (intrserv) -static NvU32 __nvoc_down_thunk_KernelGmmu_intrservServiceInterrupt(OBJGPU *pGpu, struct IntrService *pKernelGmmu, IntrServiceServiceInterruptArguments *pParams) { +NvU32 __nvoc_down_thunk_KernelGmmu_intrservServiceInterrupt(OBJGPU *pGpu, struct IntrService *pKernelGmmu, IntrServiceServiceInterruptArguments *pParams) { return kgmmuServiceInterrupt(pGpu, (struct KernelGmmu *)(((unsigned char *) pKernelGmmu) - __nvoc_rtti_KernelGmmu_IntrService.offset), pParams); } // kgmmuServiceNotificationInterrupt: virtual halified (singleton optimized) override (intrserv) base (intrserv) body -static NV_STATUS __nvoc_down_thunk_KernelGmmu_intrservServiceNotificationInterrupt(OBJGPU *pGpu, struct IntrService *pKernelGmmu, IntrServiceServiceNotificationInterruptArguments *pParams) { +NV_STATUS __nvoc_down_thunk_KernelGmmu_intrservServiceNotificationInterrupt(OBJGPU *pGpu, struct IntrService *pKernelGmmu, IntrServiceServiceNotificationInterruptArguments *pParams) { return kgmmuServiceNotificationInterrupt(pGpu, (struct KernelGmmu *)(((unsigned char *) pKernelGmmu) - __nvoc_rtti_KernelGmmu_IntrService.offset), pParams); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_kgmmuInitMissing(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgmmuStatePreInitLocked(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgmmuStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgmmuStateInitUnlocked(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgmmuStatePreLoad(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgmmuStatePostUnload(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate, NvU32 arg3); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_kgmmuIsPresent(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate); // this + // 7 up-thunk(s) defined to bridge methods in KernelGmmu to superclasses // kgmmuInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kgmmuInitMissing(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kgmmuInitMissing(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset)); } // kgmmuStatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgmmuStatePreInitLocked(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgmmuStatePreInitLocked(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate) { return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset)); } // kgmmuStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgmmuStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgmmuStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset)); } // kgmmuStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgmmuStateInitUnlocked(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgmmuStateInitUnlocked(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset)); } // kgmmuStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgmmuStatePreLoad(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgmmuStatePreLoad(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset), arg3); } // kgmmuStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgmmuStatePostUnload(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgmmuStatePostUnload(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset), arg3); } // kgmmuIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_kgmmuIsPresent(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_kgmmuIsPresent(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGmmu_OBJENGSTATE.offset)); } @@ -201,9 +223,9 @@ void __nvoc_init_dataField_KernelGmmu(KernelGmmu *pThis, RmHalspecOwner *pRmhals // NVOC Property Hal field -- PDB_PROP_KGMMU_SYSMEM_FAULT_BUFFER_GPU_UNCACHED if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_KGMMU_SYSMEM_FAULT_BUFFER_GPU_UNCACHED, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KGMMU_SYSMEM_FAULT_BUFFER_GPU_UNCACHED, NV_TRUE); } - pThis->setProperty(pThis, PDB_PROP_KGMMU_REDUCE_NR_FAULT_BUFFER_SIZE, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KGMMU_REDUCE_NR_FAULT_BUFFER_SIZE, NV_FALSE); // Hal field -- defaultBigPageSize if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ @@ -214,46 +236,46 @@ void __nvoc_init_dataField_KernelGmmu(KernelGmmu *pThis, RmHalspecOwner *pRmhals // Hal field -- bHugePageSupported if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bHugePageSupported = ((NvBool)(0 == 0)); + pThis->bHugePageSupported = NV_TRUE; } // Hal field -- bPageSize512mbSupported if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bPageSize512mbSupported = ((NvBool)(0 == 0)); + pThis->bPageSize512mbSupported = NV_TRUE; } // default else { - pThis->bPageSize512mbSupported = ((NvBool)(0 != 0)); + pThis->bPageSize512mbSupported = NV_FALSE; } // Hal field -- bPageSize256gbSupported if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ { - pThis->bPageSize256gbSupported = ((NvBool)(0 == 0)); + pThis->bPageSize256gbSupported = NV_TRUE; } // default else { - pThis->bPageSize256gbSupported = ((NvBool)(0 != 0)); + pThis->bPageSize256gbSupported = NV_FALSE; } // Hal field -- bBug2720120WarEnabled if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { - pThis->bBug2720120WarEnabled = ((NvBool)(0 == 0)); + pThis->bBug2720120WarEnabled = NV_TRUE; } // default else { - pThis->bBug2720120WarEnabled = ((NvBool)(0 != 0)); + pThis->bBug2720120WarEnabled = NV_FALSE; } // Hal field -- bVaspaceInteropSupported if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bVaspaceInteropSupported = ((NvBool)(0 == 0)); + pThis->bVaspaceInteropSupported = NV_TRUE; } } @@ -289,50 +311,6 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // kgmmuConstructEngine -- virtual override (engstate) base (engstate) - pThis->__kgmmuConstructEngine__ = &kgmmuConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelGmmu_engstateConstructEngine; - - // kgmmuStateInitLocked -- virtual override (engstate) base (engstate) - pThis->__kgmmuStateInitLocked__ = &kgmmuStateInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelGmmu_engstateStateInitLocked; - - // kgmmuStateLoad -- virtual override (engstate) base (engstate) - pThis->__kgmmuStateLoad__ = &kgmmuStateLoad_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelGmmu_engstateStateLoad; - - // kgmmuStateUnload -- virtual override (engstate) base (engstate) - pThis->__kgmmuStateUnload__ = &kgmmuStateUnload_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelGmmu_engstateStateUnload; - - // kgmmuStatePostLoad -- virtual halified (singleton optimized) override (engstate) base (engstate) body - pThis->__kgmmuStatePostLoad__ = &kgmmuStatePostLoad_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_KernelGmmu_engstateStatePostLoad; - - // kgmmuStatePreUnload -- virtual halified (singleton optimized) override (engstate) base (engstate) body - pThis->__kgmmuStatePreUnload__ = &kgmmuStatePreUnload_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_down_thunk_KernelGmmu_engstateStatePreUnload; - - // kgmmuStateDestroy -- virtual override (engstate) base (engstate) - pThis->__kgmmuStateDestroy__ = &kgmmuStateDestroy_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelGmmu_engstateStateDestroy; - - // kgmmuRegisterIntrService -- virtual override (intrserv) base (intrserv) - pThis->__kgmmuRegisterIntrService__ = &kgmmuRegisterIntrService_IMPL; - pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_KernelGmmu_intrservRegisterIntrService; - - // kgmmuClearInterrupt -- virtual override (intrserv) base (intrserv) - pThis->__kgmmuClearInterrupt__ = &kgmmuClearInterrupt_IMPL; - pThis->__nvoc_base_IntrService.__intrservClearInterrupt__ = &__nvoc_down_thunk_KernelGmmu_intrservClearInterrupt; - - // kgmmuServiceInterrupt -- virtual override (intrserv) base (intrserv) - pThis->__kgmmuServiceInterrupt__ = &kgmmuServiceInterrupt_IMPL; - pThis->__nvoc_base_IntrService.__intrservServiceInterrupt__ = &__nvoc_down_thunk_KernelGmmu_intrservServiceInterrupt; - - // kgmmuServiceNotificationInterrupt -- virtual halified (singleton optimized) override (intrserv) base (intrserv) body - pThis->__kgmmuServiceNotificationInterrupt__ = &kgmmuServiceNotificationInterrupt_56cd7a; - pThis->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_down_thunk_KernelGmmu_intrservServiceNotificationInterrupt; - // kgmmuInstBlkVaLimitGet -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { @@ -343,6 +321,16 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuInstBlkVaLimitGet__ = &kgmmuInstBlkVaLimitGet_f03539; } + // kgmmuCheckPendingInvalidates -- halified (2 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__kgmmuCheckPendingInvalidates__ = &kgmmuCheckPendingInvalidates_TU102; + } + else + { + pThis->__kgmmuCheckPendingInvalidates__ = &kgmmuCheckPendingInvalidates_TU102; + } + // kgmmuCommitTlbInvalidate -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ { @@ -353,6 +341,16 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner pThis->__kgmmuCommitTlbInvalidate__ = &kgmmuCommitTlbInvalidate_TU102; } + // kgmmuSetPdbToInvalidate -- halified (2 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__kgmmuSetPdbToInvalidate__ = &kgmmuSetPdbToInvalidate_TU102; + } + else + { + pThis->__kgmmuSetPdbToInvalidate__ = &kgmmuSetPdbToInvalidate_TU102; + } + // kgmmuSetTlbInvalidateMembarWarParameters -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { @@ -689,12 +687,12 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner // default else { - pThis->__kgmmuIsReplayableShadowFaultBufferFull__ = &kgmmuIsReplayableShadowFaultBufferFull_491d52; + pThis->__kgmmuIsReplayableShadowFaultBufferFull__ = &kgmmuIsReplayableShadowFaultBufferFull_3dd2c9; } } else { - pThis->__kgmmuIsReplayableShadowFaultBufferFull__ = &kgmmuIsReplayableShadowFaultBufferFull_ceaee8; + pThis->__kgmmuIsReplayableShadowFaultBufferFull__ = &kgmmuIsReplayableShadowFaultBufferFull_72a2e1; } // kgmmuReadClientShadowBufPutIndex -- halified (4 hals) body @@ -742,50 +740,13 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner } // kgmmuInitCeMmuFaultIdRange -- halified (2 hals) body - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ - { - pThis->__kgmmuInitCeMmuFaultIdRange__ = &kgmmuInitCeMmuFaultIdRange_GB100; - } - // default - else - { - pThis->__kgmmuInitCeMmuFaultIdRange__ = &kgmmuInitCeMmuFaultIdRange_56cd7a; - } - - // kgmmuGetMinCeEngineId -- halified (3 hals) body - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ - { - pThis->__kgmmuGetMinCeEngineId__ = &kgmmuGetMinCeEngineId_GH100; - } - else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ - { - pThis->__kgmmuGetMinCeEngineId__ = &kgmmuGetMinCeEngineId_GB100; - } - else - { - pThis->__kgmmuGetMinCeEngineId__ = &kgmmuGetMinCeEngineId_GV100; - } - - // kgmmuGetMaxCeEngineId -- halified (5 hals) body - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ - { - pThis->__kgmmuGetMaxCeEngineId__ = &kgmmuGetMaxCeEngineId_GH100; - } - else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ - { - pThis->__kgmmuGetMaxCeEngineId__ = &kgmmuGetMaxCeEngineId_GB100; - } - else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ - { - pThis->__kgmmuGetMaxCeEngineId__ = &kgmmuGetMaxCeEngineId_GV100; - } - else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f00000UL) )) /* ChipHal: AD102 | AD103 | AD104 | AD106 | AD107 */ + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { - pThis->__kgmmuGetMaxCeEngineId__ = &kgmmuGetMaxCeEngineId_AD102; + pThis->__kgmmuInitCeMmuFaultIdRange__ = &kgmmuInitCeMmuFaultIdRange_GV100; } else { - pThis->__kgmmuGetMaxCeEngineId__ = &kgmmuGetMaxCeEngineId_GA100; + pThis->__kgmmuInitCeMmuFaultIdRange__ = &kgmmuInitCeMmuFaultIdRange_GA100; } // kgmmuFaultBufferMap -- halified (2 hals) body @@ -997,7 +958,7 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner { if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { - pThis->__kgmmuIsP2PUnboundInstFault__ = &kgmmuIsP2PUnboundInstFault_491d52; + pThis->__kgmmuIsP2PUnboundInstFault__ = &kgmmuIsP2PUnboundInstFault_3dd2c9; } else { @@ -1022,11 +983,11 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner // kgmmuTestVidmemAccessBitBufferError -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__kgmmuTestVidmemAccessBitBufferError__ = &kgmmuTestVidmemAccessBitBufferError_491d52; + pThis->__kgmmuTestVidmemAccessBitBufferError__ = &kgmmuTestVidmemAccessBitBufferError_3dd2c9; } else { - pThis->__kgmmuTestVidmemAccessBitBufferError__ = &kgmmuTestVidmemAccessBitBufferError_ceaee8; + pThis->__kgmmuTestVidmemAccessBitBufferError__ = &kgmmuTestVidmemAccessBitBufferError_72a2e1; } // kgmmuDisableVidmemAccessBitBuf -- halified (2 hals) body @@ -1141,34 +1102,58 @@ static void __nvoc_init_funcTable_KernelGmmu_1(KernelGmmu *pThis, RmHalspecOwner { pThis->__kgmmuGetFakeSparseEntry__ = &kgmmuGetFakeSparseEntry_fa6e19; } - - // kgmmuInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__kgmmuInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kgmmuInitMissing; - - // kgmmuStatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__kgmmuStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgmmuStatePreInitLocked; - - // kgmmuStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kgmmuStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgmmuStatePreInitUnlocked; - - // kgmmuStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kgmmuStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgmmuStateInitUnlocked; - - // kgmmuStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__kgmmuStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgmmuStatePreLoad; - - // kgmmuStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__kgmmuStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgmmuStatePostUnload; - - // kgmmuIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__kgmmuIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kgmmuIsPresent; -} // End __nvoc_init_funcTable_KernelGmmu_1 with approximately 188 basic block(s). +} // End __nvoc_init_funcTable_KernelGmmu_1 with approximately 155 basic block(s). // Initialize vtable(s) for 90 virtual method(s). void __nvoc_init_funcTable_KernelGmmu(KernelGmmu *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 90 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelGmmu vtable = { + .__kgmmuConstructEngine__ = &kgmmuConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelGmmu_engstateConstructEngine, // virtual + .__kgmmuStateInitLocked__ = &kgmmuStateInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelGmmu_engstateStateInitLocked, // virtual + .__kgmmuStateLoad__ = &kgmmuStateLoad_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelGmmu_engstateStateLoad, // virtual + .__kgmmuStateUnload__ = &kgmmuStateUnload_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelGmmu_engstateStateUnload, // virtual + .__kgmmuStatePostLoad__ = &kgmmuStatePostLoad_IMPL, // virtual halified (singleton optimized) override (engstate) base (engstate) body + .OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_KernelGmmu_engstateStatePostLoad, // virtual + .__kgmmuStatePreUnload__ = &kgmmuStatePreUnload_IMPL, // virtual halified (singleton optimized) override (engstate) base (engstate) body + .OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_down_thunk_KernelGmmu_engstateStatePreUnload, // virtual + .__kgmmuStateDestroy__ = &kgmmuStateDestroy_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelGmmu_engstateStateDestroy, // virtual + .__kgmmuRegisterIntrService__ = &kgmmuRegisterIntrService_IMPL, // virtual override (intrserv) base (intrserv) + .IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_KernelGmmu_intrservRegisterIntrService, // virtual + .__kgmmuClearInterrupt__ = &kgmmuClearInterrupt_IMPL, // virtual override (intrserv) base (intrserv) + .IntrService.__intrservClearInterrupt__ = &__nvoc_down_thunk_KernelGmmu_intrservClearInterrupt, // virtual + .__kgmmuServiceInterrupt__ = &kgmmuServiceInterrupt_IMPL, // virtual override (intrserv) base (intrserv) + .IntrService.__intrservServiceInterrupt__ = &__nvoc_down_thunk_KernelGmmu_intrservServiceInterrupt, // virtual + .__kgmmuServiceNotificationInterrupt__ = &kgmmuServiceNotificationInterrupt_56cd7a, // virtual halified (singleton optimized) override (intrserv) base (intrserv) body + .IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_down_thunk_KernelGmmu_intrservServiceNotificationInterrupt, // virtual + .__kgmmuInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kgmmuInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__kgmmuStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgmmuStatePreInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__kgmmuStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgmmuStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__kgmmuStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgmmuStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__kgmmuStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgmmuStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__kgmmuStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgmmuStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__kgmmuIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kgmmuIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_base_IntrService.__nvoc_vtable = &vtable.IntrService; // (intrserv) super + pThis->__nvoc_vtable = &vtable; // (kgmmu) this + + // Initialize vtable(s) with 72 per-object function pointer(s). __nvoc_init_funcTable_KernelGmmu_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kern_gmmu_nvoc.h b/src/nvidia/generated/g_kern_gmmu_nvoc.h index 4e7f09a3ec..a293366739 100644 --- a/src/nvidia/generated/g_kern_gmmu_nvoc.h +++ b/src/nvidia/generated/g_kern_gmmu_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -395,10 +395,15 @@ typedef struct #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelGmmu; + + struct KernelGmmu { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelGmmu *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -410,20 +415,11 @@ struct KernelGmmu { struct IntrService *__nvoc_pbase_IntrService; // intrserv super struct KernelGmmu *__nvoc_pbase_KernelGmmu; // kgmmu - // Vtable with 90 per-object function pointers - NV_STATUS (*__kgmmuConstructEngine__)(OBJGPU *, struct KernelGmmu * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) - NV_STATUS (*__kgmmuStateInitLocked__)(OBJGPU *, struct KernelGmmu * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__kgmmuStateLoad__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__kgmmuStateUnload__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__kgmmuStatePostLoad__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body - NV_STATUS (*__kgmmuStatePreUnload__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body - void (*__kgmmuStateDestroy__)(OBJGPU *, struct KernelGmmu * /*this*/); // virtual override (engstate) base (engstate) - void (*__kgmmuRegisterIntrService__)(OBJGPU *, struct KernelGmmu * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) - NvBool (*__kgmmuClearInterrupt__)(OBJGPU *, struct KernelGmmu * /*this*/, IntrServiceClearInterruptArguments *); // virtual override (intrserv) base (intrserv) - NvU32 (*__kgmmuServiceInterrupt__)(OBJGPU *, struct KernelGmmu * /*this*/, IntrServiceServiceInterruptArguments *); // virtual override (intrserv) base (intrserv) - NV_STATUS (*__kgmmuServiceNotificationInterrupt__)(OBJGPU *, struct KernelGmmu * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) body + // Vtable with 72 per-object function pointers NV_STATUS (*__kgmmuInstBlkVaLimitGet__)(struct KernelGmmu * /*this*/, struct OBJVASPACE *, NvU32, INST_BLK_INIT_PARAMS *, NvU32 *, NvU64 *); // halified (2 hals) body + NV_STATUS (*__kgmmuCheckPendingInvalidates__)(OBJGPU *, struct KernelGmmu * /*this*/, RMTIMEOUT *); // halified (2 hals) body NV_STATUS (*__kgmmuCommitTlbInvalidate__)(OBJGPU *, struct KernelGmmu * /*this*/, TLB_INVALIDATE_PARAMS *); // halified (2 hals) body + void (*__kgmmuSetPdbToInvalidate__)(OBJGPU *, struct KernelGmmu * /*this*/, TLB_INVALIDATE_PARAMS *); // halified (2 hals) body NvU32 (*__kgmmuSetTlbInvalidateMembarWarParameters__)(OBJGPU *, struct KernelGmmu * /*this*/, TLB_INVALIDATE_PARAMS *); // halified (2 hals) body NV_STATUS (*__kgmmuSetTlbInvalidationScope__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, TLB_INVALIDATE_PARAMS *); // halified (2 hals) body void (*__kgmmuFmtInitPteComptagLine__)(struct KernelGmmu * /*this*/, struct GMMU_FMT_PTE *, const NvU32); // halified (2 hals) body @@ -459,8 +455,6 @@ struct KernelGmmu { NvU32 (*__kgmmuReadClientShadowBufPutIndex__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, FAULT_BUFFER_TYPE); // halified (4 hals) body void (*__kgmmuWriteClientShadowBufPutIndex__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, FAULT_BUFFER_TYPE, NvU32); // halified (4 hals) body NV_STATUS (*__kgmmuInitCeMmuFaultIdRange__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body - NvU32 (*__kgmmuGetMinCeEngineId__)(struct KernelGmmu * /*this*/); // halified (3 hals) body - NvU32 (*__kgmmuGetMaxCeEngineId__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (5 hals) body NV_STATUS (*__kgmmuFaultBufferMap__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, NvU32); // halified (2 hals) body NV_STATUS (*__kgmmuFaultBufferUnmap__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, NvU32); // halified (2 hals) body NV_STATUS (*__kgmmuFaultBufferInit__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body @@ -494,13 +488,6 @@ struct KernelGmmu { NvU32 (*__kgmmuGetEccCounts__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body NV_STATUS (*__kgmmuCreateFakeSparseTables__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) NvU8 * (*__kgmmuGetFakeSparseEntry__)(OBJGPU *, struct KernelGmmu * /*this*/, const MMU_FMT_LEVEL *); // halified (2 hals) - void (*__kgmmuInitMissing__)(struct OBJGPU *, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgmmuStatePreInitLocked__)(struct OBJGPU *, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgmmuStatePreInitUnlocked__)(struct OBJGPU *, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgmmuStateInitUnlocked__)(struct OBJGPU *, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgmmuStatePreLoad__)(struct OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgmmuStatePostUnload__)(struct OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NvBool (*__kgmmuIsPresent__)(struct OBJGPU *, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) // 4 PDB properties NvBool PDB_PROP_KGMMU_SYSMEM_FAULT_BUFFER_GPU_UNCACHED; @@ -515,6 +502,7 @@ struct KernelGmmu { NV2080_CTRL_INTERNAL_GMMU_GET_STATIC_INFO_PARAMS *pStaticInfo; NvU64 defaultBigPageSize; NvU32 uvmSharedIntrRmOwnsMask; + NvBool bBug4686457WAR; GMMU_FMT_FAMILY *PRIVATE_FIELD(pFmtFamilies)[3]; NvU32 PRIVATE_FIELD(PDEAperture); NvU32 PRIVATE_FIELD(PDEAttr); @@ -548,6 +536,7 @@ struct KernelGmmu_PRIVATE { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelGmmu *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -559,20 +548,11 @@ struct KernelGmmu_PRIVATE { struct IntrService *__nvoc_pbase_IntrService; // intrserv super struct KernelGmmu *__nvoc_pbase_KernelGmmu; // kgmmu - // Vtable with 90 per-object function pointers - NV_STATUS (*__kgmmuConstructEngine__)(OBJGPU *, struct KernelGmmu * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) - NV_STATUS (*__kgmmuStateInitLocked__)(OBJGPU *, struct KernelGmmu * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__kgmmuStateLoad__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__kgmmuStateUnload__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__kgmmuStatePostLoad__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body - NV_STATUS (*__kgmmuStatePreUnload__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body - void (*__kgmmuStateDestroy__)(OBJGPU *, struct KernelGmmu * /*this*/); // virtual override (engstate) base (engstate) - void (*__kgmmuRegisterIntrService__)(OBJGPU *, struct KernelGmmu * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) - NvBool (*__kgmmuClearInterrupt__)(OBJGPU *, struct KernelGmmu * /*this*/, IntrServiceClearInterruptArguments *); // virtual override (intrserv) base (intrserv) - NvU32 (*__kgmmuServiceInterrupt__)(OBJGPU *, struct KernelGmmu * /*this*/, IntrServiceServiceInterruptArguments *); // virtual override (intrserv) base (intrserv) - NV_STATUS (*__kgmmuServiceNotificationInterrupt__)(OBJGPU *, struct KernelGmmu * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) body + // Vtable with 72 per-object function pointers NV_STATUS (*__kgmmuInstBlkVaLimitGet__)(struct KernelGmmu * /*this*/, struct OBJVASPACE *, NvU32, INST_BLK_INIT_PARAMS *, NvU32 *, NvU64 *); // halified (2 hals) body + NV_STATUS (*__kgmmuCheckPendingInvalidates__)(OBJGPU *, struct KernelGmmu * /*this*/, RMTIMEOUT *); // halified (2 hals) body NV_STATUS (*__kgmmuCommitTlbInvalidate__)(OBJGPU *, struct KernelGmmu * /*this*/, TLB_INVALIDATE_PARAMS *); // halified (2 hals) body + void (*__kgmmuSetPdbToInvalidate__)(OBJGPU *, struct KernelGmmu * /*this*/, TLB_INVALIDATE_PARAMS *); // halified (2 hals) body NvU32 (*__kgmmuSetTlbInvalidateMembarWarParameters__)(OBJGPU *, struct KernelGmmu * /*this*/, TLB_INVALIDATE_PARAMS *); // halified (2 hals) body NV_STATUS (*__kgmmuSetTlbInvalidationScope__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, TLB_INVALIDATE_PARAMS *); // halified (2 hals) body void (*__kgmmuFmtInitPteComptagLine__)(struct KernelGmmu * /*this*/, struct GMMU_FMT_PTE *, const NvU32); // halified (2 hals) body @@ -608,8 +588,6 @@ struct KernelGmmu_PRIVATE { NvU32 (*__kgmmuReadClientShadowBufPutIndex__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, FAULT_BUFFER_TYPE); // halified (4 hals) body void (*__kgmmuWriteClientShadowBufPutIndex__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, FAULT_BUFFER_TYPE, NvU32); // halified (4 hals) body NV_STATUS (*__kgmmuInitCeMmuFaultIdRange__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body - NvU32 (*__kgmmuGetMinCeEngineId__)(struct KernelGmmu * /*this*/); // halified (3 hals) body - NvU32 (*__kgmmuGetMaxCeEngineId__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (5 hals) body NV_STATUS (*__kgmmuFaultBufferMap__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, NvU32); // halified (2 hals) body NV_STATUS (*__kgmmuFaultBufferUnmap__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32, NvU32); // halified (2 hals) body NV_STATUS (*__kgmmuFaultBufferInit__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body @@ -643,13 +621,6 @@ struct KernelGmmu_PRIVATE { NvU32 (*__kgmmuGetEccCounts__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) body NV_STATUS (*__kgmmuCreateFakeSparseTables__)(OBJGPU *, struct KernelGmmu * /*this*/); // halified (2 hals) NvU8 * (*__kgmmuGetFakeSparseEntry__)(OBJGPU *, struct KernelGmmu * /*this*/, const MMU_FMT_LEVEL *); // halified (2 hals) - void (*__kgmmuInitMissing__)(struct OBJGPU *, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgmmuStatePreInitLocked__)(struct OBJGPU *, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgmmuStatePreInitUnlocked__)(struct OBJGPU *, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgmmuStateInitUnlocked__)(struct OBJGPU *, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgmmuStatePreLoad__)(struct OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgmmuStatePostUnload__)(struct OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NvBool (*__kgmmuIsPresent__)(struct OBJGPU *, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) // 4 PDB properties NvBool PDB_PROP_KGMMU_SYSMEM_FAULT_BUFFER_GPU_UNCACHED; @@ -664,6 +635,7 @@ struct KernelGmmu_PRIVATE { NV2080_CTRL_INTERNAL_GMMU_GET_STATIC_INFO_PARAMS *pStaticInfo; NvU64 defaultBigPageSize; NvU32 uvmSharedIntrRmOwnsMask; + NvBool bBug4686457WAR; GMMU_FMT_FAMILY *pFmtFamilies[3]; NvU32 PDEAperture; NvU32 PDEAttr; @@ -692,6 +664,32 @@ struct KernelGmmu_PRIVATE { NvBool bVaspaceInteropSupported; }; + +// Metadata including vtable with 18 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelGmmu { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + const struct NVOC_VTABLE__IntrService IntrService; // (intrserv) 4 function pointers + + NV_STATUS (*__kgmmuConstructEngine__)(OBJGPU *, struct KernelGmmu * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgmmuStateInitLocked__)(OBJGPU *, struct KernelGmmu * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgmmuStateLoad__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgmmuStateUnload__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgmmuStatePostLoad__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kgmmuStatePreUnload__)(OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + void (*__kgmmuStateDestroy__)(OBJGPU *, struct KernelGmmu * /*this*/); // virtual override (engstate) base (engstate) + void (*__kgmmuRegisterIntrService__)(OBJGPU *, struct KernelGmmu * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) + NvBool (*__kgmmuClearInterrupt__)(OBJGPU *, struct KernelGmmu * /*this*/, IntrServiceClearInterruptArguments *); // virtual override (intrserv) base (intrserv) + NvU32 (*__kgmmuServiceInterrupt__)(OBJGPU *, struct KernelGmmu * /*this*/, IntrServiceServiceInterruptArguments *); // virtual override (intrserv) base (intrserv) + NV_STATUS (*__kgmmuServiceNotificationInterrupt__)(OBJGPU *, struct KernelGmmu * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) body + void (*__kgmmuInitMissing__)(struct OBJGPU *, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgmmuStatePreInitLocked__)(struct OBJGPU *, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgmmuStatePreInitUnlocked__)(struct OBJGPU *, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgmmuStateInitUnlocked__)(struct OBJGPU *, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgmmuStatePreLoad__)(struct OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgmmuStatePostUnload__)(struct OBJGPU *, struct KernelGmmu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__kgmmuIsPresent__)(struct OBJGPU *, struct KernelGmmu * /*this*/); // virtual inherited (engstate) base (engstate) +}; + #ifndef __NVOC_CLASS_KernelGmmu_TYPEDEF__ #define __NVOC_CLASS_KernelGmmu_TYPEDEF__ typedef struct KernelGmmu KernelGmmu; @@ -734,37 +732,43 @@ NV_STATUS __nvoc_objCreate_KernelGmmu(KernelGmmu**, Dynamic*, NvU32); // Wrapper macros -#define kgmmuConstructEngine_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuConstructEngine__ +#define kgmmuConstructEngine_FNPTR(pKernelGmmu) pKernelGmmu->__nvoc_vtable->__kgmmuConstructEngine__ #define kgmmuConstructEngine(pGpu, pKernelGmmu, arg3) kgmmuConstructEngine_DISPATCH(pGpu, pKernelGmmu, arg3) -#define kgmmuStateInitLocked_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuStateInitLocked__ +#define kgmmuStateInitLocked_FNPTR(pKernelGmmu) pKernelGmmu->__nvoc_vtable->__kgmmuStateInitLocked__ #define kgmmuStateInitLocked(pGpu, pKernelGmmu) kgmmuStateInitLocked_DISPATCH(pGpu, pKernelGmmu) -#define kgmmuStateLoad_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuStateLoad__ +#define kgmmuStateLoad_FNPTR(pKernelGmmu) pKernelGmmu->__nvoc_vtable->__kgmmuStateLoad__ #define kgmmuStateLoad(pGpu, pKernelGmmu, arg3) kgmmuStateLoad_DISPATCH(pGpu, pKernelGmmu, arg3) -#define kgmmuStateUnload_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuStateUnload__ +#define kgmmuStateUnload_FNPTR(pKernelGmmu) pKernelGmmu->__nvoc_vtable->__kgmmuStateUnload__ #define kgmmuStateUnload(pGpu, pKernelGmmu, arg3) kgmmuStateUnload_DISPATCH(pGpu, pKernelGmmu, arg3) -#define kgmmuStatePostLoad_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuStatePostLoad__ +#define kgmmuStatePostLoad_FNPTR(pKernelGmmu) pKernelGmmu->__nvoc_vtable->__kgmmuStatePostLoad__ #define kgmmuStatePostLoad(pGpu, pKernelGmmu, arg3) kgmmuStatePostLoad_DISPATCH(pGpu, pKernelGmmu, arg3) #define kgmmuStatePostLoad_HAL(pGpu, pKernelGmmu, arg3) kgmmuStatePostLoad_DISPATCH(pGpu, pKernelGmmu, arg3) -#define kgmmuStatePreUnload_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuStatePreUnload__ +#define kgmmuStatePreUnload_FNPTR(pKernelGmmu) pKernelGmmu->__nvoc_vtable->__kgmmuStatePreUnload__ #define kgmmuStatePreUnload(pGpu, pKernelGmmu, arg3) kgmmuStatePreUnload_DISPATCH(pGpu, pKernelGmmu, arg3) #define kgmmuStatePreUnload_HAL(pGpu, pKernelGmmu, arg3) kgmmuStatePreUnload_DISPATCH(pGpu, pKernelGmmu, arg3) -#define kgmmuStateDestroy_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuStateDestroy__ +#define kgmmuStateDestroy_FNPTR(pKernelGmmu) pKernelGmmu->__nvoc_vtable->__kgmmuStateDestroy__ #define kgmmuStateDestroy(pGpu, pKernelGmmu) kgmmuStateDestroy_DISPATCH(pGpu, pKernelGmmu) -#define kgmmuRegisterIntrService_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuRegisterIntrService__ +#define kgmmuRegisterIntrService_FNPTR(pKernelGmmu) pKernelGmmu->__nvoc_vtable->__kgmmuRegisterIntrService__ #define kgmmuRegisterIntrService(pGpu, pKernelGmmu, arg3) kgmmuRegisterIntrService_DISPATCH(pGpu, pKernelGmmu, arg3) -#define kgmmuClearInterrupt_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuClearInterrupt__ +#define kgmmuClearInterrupt_FNPTR(pKernelGmmu) pKernelGmmu->__nvoc_vtable->__kgmmuClearInterrupt__ #define kgmmuClearInterrupt(pGpu, pKernelGmmu, pParams) kgmmuClearInterrupt_DISPATCH(pGpu, pKernelGmmu, pParams) -#define kgmmuServiceInterrupt_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuServiceInterrupt__ +#define kgmmuServiceInterrupt_FNPTR(pKernelGmmu) pKernelGmmu->__nvoc_vtable->__kgmmuServiceInterrupt__ #define kgmmuServiceInterrupt(pGpu, pKernelGmmu, pParams) kgmmuServiceInterrupt_DISPATCH(pGpu, pKernelGmmu, pParams) -#define kgmmuServiceNotificationInterrupt_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuServiceNotificationInterrupt__ +#define kgmmuServiceNotificationInterrupt_FNPTR(pKernelGmmu) pKernelGmmu->__nvoc_vtable->__kgmmuServiceNotificationInterrupt__ #define kgmmuServiceNotificationInterrupt(pGpu, pKernelGmmu, pParams) kgmmuServiceNotificationInterrupt_DISPATCH(pGpu, pKernelGmmu, pParams) #define kgmmuServiceNotificationInterrupt_HAL(pGpu, pKernelGmmu, pParams) kgmmuServiceNotificationInterrupt_DISPATCH(pGpu, pKernelGmmu, pParams) #define kgmmuInstBlkVaLimitGet_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuInstBlkVaLimitGet__ #define kgmmuInstBlkVaLimitGet(pKernelGmmu, pVAS, subctxId, pParams, pOffset, pData) kgmmuInstBlkVaLimitGet_DISPATCH(pKernelGmmu, pVAS, subctxId, pParams, pOffset, pData) #define kgmmuInstBlkVaLimitGet_HAL(pKernelGmmu, pVAS, subctxId, pParams, pOffset, pData) kgmmuInstBlkVaLimitGet_DISPATCH(pKernelGmmu, pVAS, subctxId, pParams, pOffset, pData) +#define kgmmuCheckPendingInvalidates_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuCheckPendingInvalidates__ +#define kgmmuCheckPendingInvalidates(pGpu, pKernelGmmu, pTimeOut) kgmmuCheckPendingInvalidates_DISPATCH(pGpu, pKernelGmmu, pTimeOut) +#define kgmmuCheckPendingInvalidates_HAL(pGpu, pKernelGmmu, pTimeOut) kgmmuCheckPendingInvalidates_DISPATCH(pGpu, pKernelGmmu, pTimeOut) #define kgmmuCommitTlbInvalidate_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuCommitTlbInvalidate__ #define kgmmuCommitTlbInvalidate(pGpu, pKernelGmmu, pParams) kgmmuCommitTlbInvalidate_DISPATCH(pGpu, pKernelGmmu, pParams) #define kgmmuCommitTlbInvalidate_HAL(pGpu, pKernelGmmu, pParams) kgmmuCommitTlbInvalidate_DISPATCH(pGpu, pKernelGmmu, pParams) +#define kgmmuSetPdbToInvalidate_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuSetPdbToInvalidate__ +#define kgmmuSetPdbToInvalidate(pGpu, pKernelGmmu, pParams) kgmmuSetPdbToInvalidate_DISPATCH(pGpu, pKernelGmmu, pParams) +#define kgmmuSetPdbToInvalidate_HAL(pGpu, pKernelGmmu, pParams) kgmmuSetPdbToInvalidate_DISPATCH(pGpu, pKernelGmmu, pParams) #define kgmmuSetTlbInvalidateMembarWarParameters_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuSetTlbInvalidateMembarWarParameters__ #define kgmmuSetTlbInvalidateMembarWarParameters(pGpu, pKernelGmmu, pParams) kgmmuSetTlbInvalidateMembarWarParameters_DISPATCH(pGpu, pKernelGmmu, pParams) #define kgmmuSetTlbInvalidateMembarWarParameters_HAL(pGpu, pKernelGmmu, pParams) kgmmuSetTlbInvalidateMembarWarParameters_DISPATCH(pGpu, pKernelGmmu, pParams) @@ -870,12 +874,6 @@ NV_STATUS __nvoc_objCreate_KernelGmmu(KernelGmmu**, Dynamic*, NvU32); #define kgmmuInitCeMmuFaultIdRange_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuInitCeMmuFaultIdRange__ #define kgmmuInitCeMmuFaultIdRange(pGpu, pKernelGmmu) kgmmuInitCeMmuFaultIdRange_DISPATCH(pGpu, pKernelGmmu) #define kgmmuInitCeMmuFaultIdRange_HAL(pGpu, pKernelGmmu) kgmmuInitCeMmuFaultIdRange_DISPATCH(pGpu, pKernelGmmu) -#define kgmmuGetMinCeEngineId_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuGetMinCeEngineId__ -#define kgmmuGetMinCeEngineId(pKernelGmmu) kgmmuGetMinCeEngineId_DISPATCH(pKernelGmmu) -#define kgmmuGetMinCeEngineId_HAL(pKernelGmmu) kgmmuGetMinCeEngineId_DISPATCH(pKernelGmmu) -#define kgmmuGetMaxCeEngineId_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuGetMaxCeEngineId__ -#define kgmmuGetMaxCeEngineId(pGpu, pKernelGmmu) kgmmuGetMaxCeEngineId_DISPATCH(pGpu, pKernelGmmu) -#define kgmmuGetMaxCeEngineId_HAL(pGpu, pKernelGmmu) kgmmuGetMaxCeEngineId_DISPATCH(pGpu, pKernelGmmu) #define kgmmuFaultBufferMap_FNPTR(pKernelGmmu) pKernelGmmu->__kgmmuFaultBufferMap__ #define kgmmuFaultBufferMap(pGpu, pKernelGmmu, index, gfid) kgmmuFaultBufferMap_DISPATCH(pGpu, pKernelGmmu, index, gfid) #define kgmmuFaultBufferMap_HAL(pGpu, pKernelGmmu, index, gfid) kgmmuFaultBufferMap_DISPATCH(pGpu, pKernelGmmu, index, gfid) @@ -975,74 +973,82 @@ NV_STATUS __nvoc_objCreate_KernelGmmu(KernelGmmu**, Dynamic*, NvU32); #define kgmmuGetFakeSparseEntry_FNPTR(arg_this) arg_this->__kgmmuGetFakeSparseEntry__ #define kgmmuGetFakeSparseEntry(arg1, arg_this, arg3) kgmmuGetFakeSparseEntry_DISPATCH(arg1, arg_this, arg3) #define kgmmuGetFakeSparseEntry_HAL(arg1, arg_this, arg3) kgmmuGetFakeSparseEntry_DISPATCH(arg1, arg_this, arg3) -#define kgmmuInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define kgmmuInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define kgmmuInitMissing(pGpu, pEngstate) kgmmuInitMissing_DISPATCH(pGpu, pEngstate) -#define kgmmuStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define kgmmuStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define kgmmuStatePreInitLocked(pGpu, pEngstate) kgmmuStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define kgmmuStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define kgmmuStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define kgmmuStatePreInitUnlocked(pGpu, pEngstate) kgmmuStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kgmmuStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kgmmuStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define kgmmuStateInitUnlocked(pGpu, pEngstate) kgmmuStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kgmmuStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kgmmuStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define kgmmuStatePreLoad(pGpu, pEngstate, arg3) kgmmuStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kgmmuStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kgmmuStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define kgmmuStatePostUnload(pGpu, pEngstate, arg3) kgmmuStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kgmmuIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define kgmmuIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define kgmmuIsPresent(pGpu, pEngstate) kgmmuIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS kgmmuConstructEngine_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, ENGDESCRIPTOR arg3) { - return pKernelGmmu->__kgmmuConstructEngine__(pGpu, pKernelGmmu, arg3); + return pKernelGmmu->__nvoc_vtable->__kgmmuConstructEngine__(pGpu, pKernelGmmu, arg3); } static inline NV_STATUS kgmmuStateInitLocked_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { - return pKernelGmmu->__kgmmuStateInitLocked__(pGpu, pKernelGmmu); + return pKernelGmmu->__nvoc_vtable->__kgmmuStateInitLocked__(pGpu, pKernelGmmu); } static inline NV_STATUS kgmmuStateLoad_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3) { - return pKernelGmmu->__kgmmuStateLoad__(pGpu, pKernelGmmu, arg3); + return pKernelGmmu->__nvoc_vtable->__kgmmuStateLoad__(pGpu, pKernelGmmu, arg3); } static inline NV_STATUS kgmmuStateUnload_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3) { - return pKernelGmmu->__kgmmuStateUnload__(pGpu, pKernelGmmu, arg3); + return pKernelGmmu->__nvoc_vtable->__kgmmuStateUnload__(pGpu, pKernelGmmu, arg3); } static inline NV_STATUS kgmmuStatePostLoad_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3) { - return pKernelGmmu->__kgmmuStatePostLoad__(pGpu, pKernelGmmu, arg3); + return pKernelGmmu->__nvoc_vtable->__kgmmuStatePostLoad__(pGpu, pKernelGmmu, arg3); } static inline NV_STATUS kgmmuStatePreUnload_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3) { - return pKernelGmmu->__kgmmuStatePreUnload__(pGpu, pKernelGmmu, arg3); + return pKernelGmmu->__nvoc_vtable->__kgmmuStatePreUnload__(pGpu, pKernelGmmu, arg3); } static inline void kgmmuStateDestroy_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { - pKernelGmmu->__kgmmuStateDestroy__(pGpu, pKernelGmmu); + pKernelGmmu->__nvoc_vtable->__kgmmuStateDestroy__(pGpu, pKernelGmmu); } static inline void kgmmuRegisterIntrService_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, IntrServiceRecord arg3[175]) { - pKernelGmmu->__kgmmuRegisterIntrService__(pGpu, pKernelGmmu, arg3); + pKernelGmmu->__nvoc_vtable->__kgmmuRegisterIntrService__(pGpu, pKernelGmmu, arg3); } static inline NvBool kgmmuClearInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, IntrServiceClearInterruptArguments *pParams) { - return pKernelGmmu->__kgmmuClearInterrupt__(pGpu, pKernelGmmu, pParams); + return pKernelGmmu->__nvoc_vtable->__kgmmuClearInterrupt__(pGpu, pKernelGmmu, pParams); } static inline NvU32 kgmmuServiceInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, IntrServiceServiceInterruptArguments *pParams) { - return pKernelGmmu->__kgmmuServiceInterrupt__(pGpu, pKernelGmmu, pParams); + return pKernelGmmu->__nvoc_vtable->__kgmmuServiceInterrupt__(pGpu, pKernelGmmu, pParams); } static inline NV_STATUS kgmmuServiceNotificationInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, IntrServiceServiceNotificationInterruptArguments *pParams) { - return pKernelGmmu->__kgmmuServiceNotificationInterrupt__(pGpu, pKernelGmmu, pParams); + return pKernelGmmu->__nvoc_vtable->__kgmmuServiceNotificationInterrupt__(pGpu, pKernelGmmu, pParams); } static inline NV_STATUS kgmmuInstBlkVaLimitGet_DISPATCH(struct KernelGmmu *pKernelGmmu, struct OBJVASPACE *pVAS, NvU32 subctxId, INST_BLK_INIT_PARAMS *pParams, NvU32 *pOffset, NvU64 *pData) { return pKernelGmmu->__kgmmuInstBlkVaLimitGet__(pKernelGmmu, pVAS, subctxId, pParams, pOffset, pData); } +static inline NV_STATUS kgmmuCheckPendingInvalidates_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, RMTIMEOUT *pTimeOut) { + return pKernelGmmu->__kgmmuCheckPendingInvalidates__(pGpu, pKernelGmmu, pTimeOut); +} + static inline NV_STATUS kgmmuCommitTlbInvalidate_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, TLB_INVALIDATE_PARAMS *pParams) { return pKernelGmmu->__kgmmuCommitTlbInvalidate__(pGpu, pKernelGmmu, pParams); } +static inline void kgmmuSetPdbToInvalidate_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, TLB_INVALIDATE_PARAMS *pParams) { + pKernelGmmu->__kgmmuSetPdbToInvalidate__(pGpu, pKernelGmmu, pParams); +} + static inline NvU32 kgmmuSetTlbInvalidateMembarWarParameters_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, TLB_INVALIDATE_PARAMS *pParams) { return pKernelGmmu->__kgmmuSetTlbInvalidateMembarWarParameters__(pGpu, pKernelGmmu, pParams); } @@ -1183,14 +1189,6 @@ static inline NV_STATUS kgmmuInitCeMmuFaultIdRange_DISPATCH(OBJGPU *pGpu, struct return pKernelGmmu->__kgmmuInitCeMmuFaultIdRange__(pGpu, pKernelGmmu); } -static inline NvU32 kgmmuGetMinCeEngineId_DISPATCH(struct KernelGmmu *pKernelGmmu) { - return pKernelGmmu->__kgmmuGetMinCeEngineId__(pKernelGmmu); -} - -static inline NvU32 kgmmuGetMaxCeEngineId_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { - return pKernelGmmu->__kgmmuGetMaxCeEngineId__(pGpu, pKernelGmmu); -} - static inline NV_STATUS kgmmuFaultBufferMap_DISPATCH(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 gfid) { return pKernelGmmu->__kgmmuFaultBufferMap__(pGpu, pKernelGmmu, index, gfid); } @@ -1324,31 +1322,31 @@ static inline NvU8 * kgmmuGetFakeSparseEntry_DISPATCH(OBJGPU *arg1, struct Kerne } static inline void kgmmuInitMissing_DISPATCH(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate) { - pEngstate->__kgmmuInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kgmmuInitMissing__(pGpu, pEngstate); } static inline NV_STATUS kgmmuStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate) { - return pEngstate->__kgmmuStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kgmmuStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS kgmmuStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate) { - return pEngstate->__kgmmuStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kgmmuStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kgmmuStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate) { - return pEngstate->__kgmmuStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kgmmuStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kgmmuStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate, NvU32 arg3) { - return pEngstate->__kgmmuStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kgmmuStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kgmmuStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate, NvU32 arg3) { - return pEngstate->__kgmmuStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kgmmuStatePostUnload__(pGpu, pEngstate, arg3); } static inline NvBool kgmmuIsPresent_DISPATCH(struct OBJGPU *pGpu, struct KernelGmmu *pEngstate) { - return pEngstate->__kgmmuIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kgmmuIsPresent__(pGpu, pEngstate); } static inline NvU32 kgmmuService_4a4dee(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { @@ -1535,33 +1533,6 @@ static inline NV_STATUS kgmmuCommitInvalidateTlbTest(OBJGPU *pGpu, struct Kernel #define kgmmuCommitInvalidateTlbTest_HAL(pGpu, pKernelGmmu, pTestParams) kgmmuCommitInvalidateTlbTest(pGpu, pKernelGmmu, pTestParams) -NV_STATUS kgmmuCheckPendingInvalidates_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, RMTIMEOUT *pTimeOut, NvU32 gfid); - - -#ifdef __nvoc_kern_gmmu_h_disabled -static inline NV_STATUS kgmmuCheckPendingInvalidates(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, RMTIMEOUT *pTimeOut, NvU32 gfid) { - NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); - return NV_ERR_NOT_SUPPORTED; -} -#else //__nvoc_kern_gmmu_h_disabled -#define kgmmuCheckPendingInvalidates(pGpu, pKernelGmmu, pTimeOut, gfid) kgmmuCheckPendingInvalidates_TU102(pGpu, pKernelGmmu, pTimeOut, gfid) -#endif //__nvoc_kern_gmmu_h_disabled - -#define kgmmuCheckPendingInvalidates_HAL(pGpu, pKernelGmmu, pTimeOut, gfid) kgmmuCheckPendingInvalidates(pGpu, pKernelGmmu, pTimeOut, gfid) - -void kgmmuSetPdbToInvalidate_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, TLB_INVALIDATE_PARAMS *pParams); - - -#ifdef __nvoc_kern_gmmu_h_disabled -static inline void kgmmuSetPdbToInvalidate(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, TLB_INVALIDATE_PARAMS *pParams) { - NV_ASSERT_FAILED_PRECOMP("KernelGmmu was disabled!"); -} -#else //__nvoc_kern_gmmu_h_disabled -#define kgmmuSetPdbToInvalidate(pGpu, pKernelGmmu, pParams) kgmmuSetPdbToInvalidate_TU102(pGpu, pKernelGmmu, pParams) -#endif //__nvoc_kern_gmmu_h_disabled - -#define kgmmuSetPdbToInvalidate_HAL(pGpu, pKernelGmmu, pParams) kgmmuSetPdbToInvalidate(pGpu, pKernelGmmu, pParams) - NV_STATUS kgmmuEnableComputePeerAddressing_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 flags); @@ -1998,10 +1969,14 @@ static inline NV_STATUS kgmmuInstBlkVaLimitGet_f03539(struct KernelGmmu *pKernel return NV_OK; } +NV_STATUS kgmmuCheckPendingInvalidates_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, RMTIMEOUT *pTimeOut); + NV_STATUS kgmmuCommitTlbInvalidate_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, TLB_INVALIDATE_PARAMS *pParams); NV_STATUS kgmmuCommitTlbInvalidate_GB100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, TLB_INVALIDATE_PARAMS *pParams); +void kgmmuSetPdbToInvalidate_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, TLB_INVALIDATE_PARAMS *pParams); + NvU32 kgmmuSetTlbInvalidateMembarWarParameters_TU102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, TLB_INVALIDATE_PARAMS *pParams); static inline NvU32 kgmmuSetTlbInvalidateMembarWarParameters_4a4dee(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, TLB_INVALIDATE_PARAMS *pParams) { @@ -2174,15 +2149,15 @@ NvU32 kgmmuCopyFaultPacketToClientShadowBuffer_GV100(OBJGPU *pGpu, struct Kernel NvU32 kgmmuCopyFaultPacketToClientShadowBuffer_GH100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, struct GMMU_FAULT_BUFFER *pFaultBuffer, FAULT_BUFFER_TYPE type, NvU32 getIndex, NvU32 shadowBufPutIndex, NvU32 maxBufferEntries, struct THREAD_STATE_NODE *pThreadState, NvU32 *pFaultsCopied); -static inline NvBool kgmmuIsReplayableShadowFaultBufferFull_ceaee8(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_CLIENT_SHADOW_FAULT_BUFFER *pClientFaultBuf, NvU32 shadowBufPutIndex, NvU32 maxBufferEntries) { +static inline NvBool kgmmuIsReplayableShadowFaultBufferFull_72a2e1(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_CLIENT_SHADOW_FAULT_BUFFER *pClientFaultBuf, NvU32 shadowBufPutIndex, NvU32 maxBufferEntries) { NV_ASSERT_PRECOMP(0); - return ((NvBool)(0 != 0)); + return NV_FALSE; } NvBool kgmmuIsReplayableShadowFaultBufferFull_GH100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_CLIENT_SHADOW_FAULT_BUFFER *pClientFaultBuf, NvU32 shadowBufPutIndex, NvU32 maxBufferEntries); -static inline NvBool kgmmuIsReplayableShadowFaultBufferFull_491d52(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_CLIENT_SHADOW_FAULT_BUFFER *pClientFaultBuf, NvU32 shadowBufPutIndex, NvU32 maxBufferEntries) { - return ((NvBool)(0 != 0)); +static inline NvBool kgmmuIsReplayableShadowFaultBufferFull_3dd2c9(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, GMMU_CLIENT_SHADOW_FAULT_BUFFER *pClientFaultBuf, NvU32 shadowBufPutIndex, NvU32 maxBufferEntries) { + return NV_FALSE; } static inline NvU32 kgmmuReadClientShadowBufPutIndex_13cd8d(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 gfid, FAULT_BUFFER_TYPE type) { @@ -2210,27 +2185,9 @@ static inline void kgmmuWriteClientShadowBufPutIndex_b3696a(OBJGPU *pGpu, struct return; } -NV_STATUS kgmmuInitCeMmuFaultIdRange_GB100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); +NV_STATUS kgmmuInitCeMmuFaultIdRange_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); -static inline NV_STATUS kgmmuInitCeMmuFaultIdRange_56cd7a(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { - return NV_OK; -} - -NvU32 kgmmuGetMinCeEngineId_GV100(struct KernelGmmu *pKernelGmmu); - -NvU32 kgmmuGetMinCeEngineId_GH100(struct KernelGmmu *pKernelGmmu); - -NvU32 kgmmuGetMinCeEngineId_GB100(struct KernelGmmu *pKernelGmmu); - -NvU32 kgmmuGetMaxCeEngineId_GV100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); - -NvU32 kgmmuGetMaxCeEngineId_GA100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); - -NvU32 kgmmuGetMaxCeEngineId_AD102(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); - -NvU32 kgmmuGetMaxCeEngineId_GH100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); - -NvU32 kgmmuGetMaxCeEngineId_GB100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); +NV_STATUS kgmmuInitCeMmuFaultIdRange_GA100(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu); static inline NV_STATUS kgmmuFaultBufferMap_92bfc3(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 index, NvU32 gfid) { NV_ASSERT_PRECOMP(0); @@ -2372,8 +2329,8 @@ static inline NvBool kgmmuIsP2PUnboundInstFault_92bfc3(struct KernelGmmu *pKerne NvBool kgmmuIsP2PUnboundInstFault_GA100(struct KernelGmmu *pKernelGmmu, NvU32 arg2, NvU32 arg3); -static inline NvBool kgmmuIsP2PUnboundInstFault_491d52(struct KernelGmmu *pKernelGmmu, NvU32 arg2, NvU32 arg3) { - return ((NvBool)(0 != 0)); +static inline NvBool kgmmuIsP2PUnboundInstFault_3dd2c9(struct KernelGmmu *pKernelGmmu, NvU32 arg2, NvU32 arg3) { + return NV_FALSE; } NV_STATUS kgmmuServiceVfPriFaults_IMPL(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 faultType); @@ -2383,13 +2340,13 @@ static inline NV_STATUS kgmmuServiceVfPriFaults_92bfc3(OBJGPU *pGpu, struct Kern return NV_ERR_NOT_SUPPORTED; } -static inline NvBool kgmmuTestVidmemAccessBitBufferError_491d52(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3) { - return ((NvBool)(0 != 0)); +static inline NvBool kgmmuTestVidmemAccessBitBufferError_3dd2c9(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3) { + return NV_FALSE; } -static inline NvBool kgmmuTestVidmemAccessBitBufferError_ceaee8(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3) { +static inline NvBool kgmmuTestVidmemAccessBitBufferError_72a2e1(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu, NvU32 arg3) { NV_ASSERT_PRECOMP(0); - return ((NvBool)(0 != 0)); + return NV_FALSE; } static inline void kgmmuDisableVidmemAccessBitBuf_b3696a(OBJGPU *pGpu, struct KernelGmmu *pKernelGmmu) { diff --git a/src/nvidia/generated/g_kern_hwpm_common_defs_nvoc.h b/src/nvidia/generated/g_kern_hwpm_common_defs_nvoc.h index e2401b3d95..6ff9ca4387 100644 --- a/src/nvidia/generated/g_kern_hwpm_common_defs_nvoc.h +++ b/src/nvidia/generated/g_kern_hwpm_common_defs_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_kern_hwpm_nvoc.c b/src/nvidia/generated/g_kern_hwpm_nvoc.c index 68feead244..325ae94ce5 100644 --- a/src/nvidia/generated/g_kern_hwpm_nvoc.c +++ b/src/nvidia/generated/g_kern_hwpm_nvoc.c @@ -66,78 +66,96 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelHwpm = /*pExportInfo=*/ &__nvoc_export_info_KernelHwpm }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_KernelHwpm_engstateStateInitUnlocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelHwpm); // this +void __nvoc_down_thunk_KernelHwpm_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelHwpm); // this + // 2 down-thunk(s) defined to bridge methods in KernelHwpm from superclasses // khwpmStateInitUnlocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelHwpm_engstateStateInitUnlocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelHwpm) { +NV_STATUS __nvoc_down_thunk_KernelHwpm_engstateStateInitUnlocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelHwpm) { return khwpmStateInitUnlocked(pGpu, (struct KernelHwpm *)(((unsigned char *) pKernelHwpm) - __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset)); } // khwpmStateDestroy: virtual override (engstate) base (engstate) -static void __nvoc_down_thunk_KernelHwpm_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelHwpm) { +void __nvoc_down_thunk_KernelHwpm_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelHwpm) { khwpmStateDestroy(pGpu, (struct KernelHwpm *)(((unsigned char *) pKernelHwpm) - __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmConstructEngine(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, ENGDESCRIPTOR arg3); // this +void __nvoc_up_thunk_OBJENGSTATE_khwpmInitMissing(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePreInitLocked(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStateInitLocked(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePreLoad(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStateLoad(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePostLoad(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePreUnload(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStateUnload(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePostUnload(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_khwpmIsPresent(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate); // this + // 12 up-thunk(s) defined to bridge methods in KernelHwpm to superclasses // khwpmConstructEngine: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmConstructEngine(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, ENGDESCRIPTOR arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmConstructEngine(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, ENGDESCRIPTOR arg3) { return engstateConstructEngine(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset), arg3); } // khwpmInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_khwpmInitMissing(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_khwpmInitMissing(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset)); } // khwpmStatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePreInitLocked(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePreInitLocked(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate) { return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset)); } // khwpmStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset)); } // khwpmStateInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStateInitLocked(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStateInitLocked(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate) { return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset)); } // khwpmStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePreLoad(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePreLoad(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset), arg3); } // khwpmStateLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStateLoad(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStateLoad(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset), arg3); } // khwpmStatePostLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePostLoad(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePostLoad(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset), arg3); } // khwpmStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePreUnload(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePreUnload(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset), arg3); } // khwpmStateUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStateUnload(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStateUnload(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset), arg3); } // khwpmStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePostUnload(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_khwpmStatePostUnload(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset), arg3); } // khwpmIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_khwpmIsPresent(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_khwpmIsPresent(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelHwpm_OBJENGSTATE.offset)); } @@ -169,12 +187,12 @@ void __nvoc_init_dataField_KernelHwpm(KernelHwpm *pThis, RmHalspecOwner *pRmhals // NVOC Property Hal field -- PDB_PROP_KHWPM_MULTIPLE_PMA_SUPPORTED if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x40000000UL) )) /* ChipHal: GB100 */ { - pThis->setProperty(pThis, PDB_PROP_KHWPM_MULTIPLE_PMA_SUPPORTED, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KHWPM_MULTIPLE_PMA_SUPPORTED, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_KHWPM_MULTIPLE_PMA_SUPPORTED, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KHWPM_MULTIPLE_PMA_SUPPORTED, NV_FALSE); } } @@ -205,14 +223,6 @@ static void __nvoc_init_funcTable_KernelHwpm_1(KernelHwpm *pThis, RmHalspecOwner PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // khwpmStateInitUnlocked -- virtual override (engstate) base (engstate) - pThis->__khwpmStateInitUnlocked__ = &khwpmStateInitUnlocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ = &__nvoc_down_thunk_KernelHwpm_engstateStateInitUnlocked; - - // khwpmStateDestroy -- virtual override (engstate) base (engstate) - pThis->__khwpmStateDestroy__ = &khwpmStateDestroy_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelHwpm_engstateStateDestroy; - // khwpmGetCblockInfo -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { @@ -226,49 +236,49 @@ static void __nvoc_init_funcTable_KernelHwpm_1(KernelHwpm *pThis, RmHalspecOwner { pThis->__khwpmGetCblockInfo__ = &khwpmGetCblockInfo_GM107; } - - // khwpmConstructEngine -- virtual inherited (engstate) base (engstate) - pThis->__khwpmConstructEngine__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmConstructEngine; - - // khwpmInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__khwpmInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmInitMissing; - - // khwpmStatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__khwpmStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStatePreInitLocked; - - // khwpmStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__khwpmStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStatePreInitUnlocked; - - // khwpmStateInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__khwpmStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStateInitLocked; - - // khwpmStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__khwpmStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStatePreLoad; - - // khwpmStateLoad -- virtual inherited (engstate) base (engstate) - pThis->__khwpmStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStateLoad; - - // khwpmStatePostLoad -- virtual inherited (engstate) base (engstate) - pThis->__khwpmStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStatePostLoad; - - // khwpmStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__khwpmStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStatePreUnload; - - // khwpmStateUnload -- virtual inherited (engstate) base (engstate) - pThis->__khwpmStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStateUnload; - - // khwpmStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__khwpmStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStatePostUnload; - - // khwpmIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__khwpmIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmIsPresent; -} // End __nvoc_init_funcTable_KernelHwpm_1 with approximately 19 basic block(s). +} // End __nvoc_init_funcTable_KernelHwpm_1 with approximately 3 basic block(s). // Initialize vtable(s) for 15 virtual method(s). void __nvoc_init_funcTable_KernelHwpm(KernelHwpm *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 15 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelHwpm vtable = { + .__khwpmStateInitUnlocked__ = &khwpmStateInitUnlocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &__nvoc_down_thunk_KernelHwpm_engstateStateInitUnlocked, // virtual + .__khwpmStateDestroy__ = &khwpmStateDestroy_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelHwpm_engstateStateDestroy, // virtual + .__khwpmConstructEngine__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmConstructEngine, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &engstateConstructEngine_IMPL, // virtual + .__khwpmInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__khwpmStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStatePreInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__khwpmStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__khwpmStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStateInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &engstateStateInitLocked_IMPL, // virtual + .__khwpmStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__khwpmStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStateLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &engstateStateLoad_IMPL, // virtual + .__khwpmStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStatePostLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL, // virtual + .__khwpmStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__khwpmStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStateUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &engstateStateUnload_IMPL, // virtual + .__khwpmStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__khwpmIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_khwpmIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_vtable = &vtable; // (khwpm) this + + // Initialize vtable(s) with 1 per-object function pointer(s). __nvoc_init_funcTable_KernelHwpm_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kern_hwpm_nvoc.h b/src/nvidia/generated/g_kern_hwpm_nvoc.h index 7aa5d50252..b1f3f4491a 100644 --- a/src/nvidia/generated/g_kern_hwpm_nvoc.h +++ b/src/nvidia/generated/g_kern_hwpm_nvoc.h @@ -7,14 +7,14 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -71,10 +71,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelHwpm; + + struct KernelHwpm { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelHwpm *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -84,22 +89,8 @@ struct KernelHwpm { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct KernelHwpm *__nvoc_pbase_KernelHwpm; // khwpm - // Vtable with 15 per-object function pointers - NV_STATUS (*__khwpmStateInitUnlocked__)(OBJGPU *, struct KernelHwpm * /*this*/); // virtual override (engstate) base (engstate) - void (*__khwpmStateDestroy__)(OBJGPU *, struct KernelHwpm * /*this*/); // virtual override (engstate) base (engstate) + // Vtable with 1 per-object function pointer void (*__khwpmGetCblockInfo__)(OBJGPU *, struct KernelHwpm * /*this*/, NvU32 *, NvU32 *); // halified (3 hals) body - NV_STATUS (*__khwpmConstructEngine__)(struct OBJGPU *, struct KernelHwpm * /*this*/, ENGDESCRIPTOR); // virtual inherited (engstate) base (engstate) - void (*__khwpmInitMissing__)(struct OBJGPU *, struct KernelHwpm * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__khwpmStatePreInitLocked__)(struct OBJGPU *, struct KernelHwpm * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__khwpmStatePreInitUnlocked__)(struct OBJGPU *, struct KernelHwpm * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__khwpmStateInitLocked__)(struct OBJGPU *, struct KernelHwpm * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__khwpmStatePreLoad__)(struct OBJGPU *, struct KernelHwpm * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__khwpmStateLoad__)(struct OBJGPU *, struct KernelHwpm * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__khwpmStatePostLoad__)(struct OBJGPU *, struct KernelHwpm * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__khwpmStatePreUnload__)(struct OBJGPU *, struct KernelHwpm * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__khwpmStateUnload__)(struct OBJGPU *, struct KernelHwpm * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__khwpmStatePostUnload__)(struct OBJGPU *, struct KernelHwpm * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NvBool (*__khwpmIsPresent__)(struct OBJGPU *, struct KernelHwpm * /*this*/); // virtual inherited (engstate) base (engstate) // 1 PDB property NvBool PDB_PROP_KHWPM_MULTIPLE_PMA_SUPPORTED; @@ -115,6 +106,27 @@ struct KernelHwpm { NvU64 vaSpaceSize; }; + +// Metadata including vtable with 14 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelHwpm { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + + NV_STATUS (*__khwpmStateInitUnlocked__)(OBJGPU *, struct KernelHwpm * /*this*/); // virtual override (engstate) base (engstate) + void (*__khwpmStateDestroy__)(OBJGPU *, struct KernelHwpm * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__khwpmConstructEngine__)(struct OBJGPU *, struct KernelHwpm * /*this*/, ENGDESCRIPTOR); // virtual inherited (engstate) base (engstate) + void (*__khwpmInitMissing__)(struct OBJGPU *, struct KernelHwpm * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__khwpmStatePreInitLocked__)(struct OBJGPU *, struct KernelHwpm * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__khwpmStatePreInitUnlocked__)(struct OBJGPU *, struct KernelHwpm * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__khwpmStateInitLocked__)(struct OBJGPU *, struct KernelHwpm * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__khwpmStatePreLoad__)(struct OBJGPU *, struct KernelHwpm * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__khwpmStateLoad__)(struct OBJGPU *, struct KernelHwpm * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__khwpmStatePostLoad__)(struct OBJGPU *, struct KernelHwpm * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__khwpmStatePreUnload__)(struct OBJGPU *, struct KernelHwpm * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__khwpmStateUnload__)(struct OBJGPU *, struct KernelHwpm * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__khwpmStatePostUnload__)(struct OBJGPU *, struct KernelHwpm * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__khwpmIsPresent__)(struct OBJGPU *, struct KernelHwpm * /*this*/); // virtual inherited (engstate) base (engstate) +}; + #ifndef __NVOC_CLASS_KernelHwpm_TYPEDEF__ #define __NVOC_CLASS_KernelHwpm_TYPEDEF__ typedef struct KernelHwpm KernelHwpm; @@ -151,45 +163,45 @@ NV_STATUS __nvoc_objCreate_KernelHwpm(KernelHwpm**, Dynamic*, NvU32); // Wrapper macros -#define khwpmStateInitUnlocked_FNPTR(pKernelHwpm) pKernelHwpm->__khwpmStateInitUnlocked__ +#define khwpmStateInitUnlocked_FNPTR(pKernelHwpm) pKernelHwpm->__nvoc_vtable->__khwpmStateInitUnlocked__ #define khwpmStateInitUnlocked(pGpu, pKernelHwpm) khwpmStateInitUnlocked_DISPATCH(pGpu, pKernelHwpm) -#define khwpmStateDestroy_FNPTR(pKernelHwpm) pKernelHwpm->__khwpmStateDestroy__ +#define khwpmStateDestroy_FNPTR(pKernelHwpm) pKernelHwpm->__nvoc_vtable->__khwpmStateDestroy__ #define khwpmStateDestroy(pGpu, pKernelHwpm) khwpmStateDestroy_DISPATCH(pGpu, pKernelHwpm) #define khwpmGetCblockInfo_FNPTR(pKernelHwpm) pKernelHwpm->__khwpmGetCblockInfo__ #define khwpmGetCblockInfo(pGpu, pKernelHwpm, arg3, arg4) khwpmGetCblockInfo_DISPATCH(pGpu, pKernelHwpm, arg3, arg4) #define khwpmGetCblockInfo_HAL(pGpu, pKernelHwpm, arg3, arg4) khwpmGetCblockInfo_DISPATCH(pGpu, pKernelHwpm, arg3, arg4) -#define khwpmConstructEngine_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ +#define khwpmConstructEngine_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateConstructEngine__ #define khwpmConstructEngine(pGpu, pEngstate, arg3) khwpmConstructEngine_DISPATCH(pGpu, pEngstate, arg3) -#define khwpmInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define khwpmInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define khwpmInitMissing(pGpu, pEngstate) khwpmInitMissing_DISPATCH(pGpu, pEngstate) -#define khwpmStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define khwpmStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define khwpmStatePreInitLocked(pGpu, pEngstate) khwpmStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define khwpmStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define khwpmStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define khwpmStatePreInitUnlocked(pGpu, pEngstate) khwpmStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define khwpmStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define khwpmStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitLocked__ #define khwpmStateInitLocked(pGpu, pEngstate) khwpmStateInitLocked_DISPATCH(pGpu, pEngstate) -#define khwpmStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define khwpmStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define khwpmStatePreLoad(pGpu, pEngstate, arg3) khwpmStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define khwpmStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define khwpmStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateLoad__ #define khwpmStateLoad(pGpu, pEngstate, arg3) khwpmStateLoad_DISPATCH(pGpu, pEngstate, arg3) -#define khwpmStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define khwpmStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostLoad__ #define khwpmStatePostLoad(pGpu, pEngstate, arg3) khwpmStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define khwpmStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define khwpmStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define khwpmStatePreUnload(pGpu, pEngstate, arg3) khwpmStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define khwpmStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define khwpmStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateUnload__ #define khwpmStateUnload(pGpu, pEngstate, arg3) khwpmStateUnload_DISPATCH(pGpu, pEngstate, arg3) -#define khwpmStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define khwpmStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define khwpmStatePostUnload(pGpu, pEngstate, arg3) khwpmStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define khwpmIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define khwpmIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define khwpmIsPresent(pGpu, pEngstate) khwpmIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS khwpmStateInitUnlocked_DISPATCH(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm) { - return pKernelHwpm->__khwpmStateInitUnlocked__(pGpu, pKernelHwpm); + return pKernelHwpm->__nvoc_vtable->__khwpmStateInitUnlocked__(pGpu, pKernelHwpm); } static inline void khwpmStateDestroy_DISPATCH(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm) { - pKernelHwpm->__khwpmStateDestroy__(pGpu, pKernelHwpm); + pKernelHwpm->__nvoc_vtable->__khwpmStateDestroy__(pGpu, pKernelHwpm); } static inline void khwpmGetCblockInfo_DISPATCH(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 *arg3, NvU32 *arg4) { @@ -197,51 +209,51 @@ static inline void khwpmGetCblockInfo_DISPATCH(OBJGPU *pGpu, struct KernelHwpm * } static inline NV_STATUS khwpmConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, ENGDESCRIPTOR arg3) { - return pEngstate->__khwpmConstructEngine__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__khwpmConstructEngine__(pGpu, pEngstate, arg3); } static inline void khwpmInitMissing_DISPATCH(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate) { - pEngstate->__khwpmInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__khwpmInitMissing__(pGpu, pEngstate); } static inline NV_STATUS khwpmStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate) { - return pEngstate->__khwpmStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__khwpmStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS khwpmStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate) { - return pEngstate->__khwpmStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__khwpmStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS khwpmStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate) { - return pEngstate->__khwpmStateInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__khwpmStateInitLocked__(pGpu, pEngstate); } static inline NV_STATUS khwpmStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { - return pEngstate->__khwpmStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__khwpmStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS khwpmStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { - return pEngstate->__khwpmStateLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__khwpmStateLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS khwpmStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { - return pEngstate->__khwpmStatePostLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__khwpmStatePostLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS khwpmStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { - return pEngstate->__khwpmStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__khwpmStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS khwpmStateUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { - return pEngstate->__khwpmStateUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__khwpmStateUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS khwpmStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate, NvU32 arg3) { - return pEngstate->__khwpmStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__khwpmStatePostUnload__(pGpu, pEngstate, arg3); } static inline NvBool khwpmIsPresent_DISPATCH(struct OBJGPU *pGpu, struct KernelHwpm *pEngstate) { - return pEngstate->__khwpmIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__khwpmIsPresent__(pGpu, pEngstate); } static inline NV_STATUS khwpmPmaStreamSriovSetGfid_56cd7a(OBJGPU *pGpu, struct KernelHwpm *pKernelHwpm, NvU32 arg3, NvU32 arg4) { diff --git a/src/nvidia/generated/g_kern_hwpm_power_nvoc.h b/src/nvidia/generated/g_kern_hwpm_power_nvoc.h index 5efc7cdb4e..ac45d9f6eb 100644 --- a/src/nvidia/generated/g_kern_hwpm_power_nvoc.h +++ b/src/nvidia/generated/g_kern_hwpm_power_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_kern_mem_sys_nvoc.c b/src/nvidia/generated/g_kern_mem_sys_nvoc.c index 0abcf84ab4..c347a85d09 100644 --- a/src/nvidia/generated/g_kern_mem_sys_nvoc.c +++ b/src/nvidia/generated/g_kern_mem_sys_nvoc.c @@ -66,78 +66,96 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelMemorySystem = /*pExportInfo=*/ &__nvoc_export_info_KernelMemorySystem }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, ENGDESCRIPTOR arg3); // this +NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem); // this +NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem); // this +NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStatePreLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags); // this +NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStatePostLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags); // this +NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags); // this +NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStatePreUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags); // this +NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags); // this +void __nvoc_down_thunk_KernelMemorySystem_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem); // this + // 9 down-thunk(s) defined to bridge methods in KernelMemorySystem from superclasses // kmemsysConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, ENGDESCRIPTOR arg3) { +NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, ENGDESCRIPTOR arg3) { return kmemsysConstructEngine(pGpu, (struct KernelMemorySystem *)(((unsigned char *) pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset), arg3); } // kmemsysStatePreInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem) { +NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem) { return kmemsysStatePreInitLocked(pGpu, (struct KernelMemorySystem *)(((unsigned char *) pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset)); } // kmemsysStateInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem) { +NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem) { return kmemsysStateInitLocked(pGpu, (struct KernelMemorySystem *)(((unsigned char *) pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset)); } // kmemsysStatePreLoad: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStatePreLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStatePreLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags) { return kmemsysStatePreLoad(pGpu, (struct KernelMemorySystem *)(((unsigned char *) pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset), flags); } // kmemsysStatePostLoad: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStatePostLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStatePostLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags) { return kmemsysStatePostLoad(pGpu, (struct KernelMemorySystem *)(((unsigned char *) pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset), flags); } // kmemsysStateLoad: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags) { return kmemsysStateLoad(pGpu, (struct KernelMemorySystem *)(((unsigned char *) pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset), flags); } // kmemsysStatePreUnload: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStatePreUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStatePreUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags) { return kmemsysStatePreUnload(pGpu, (struct KernelMemorySystem *)(((unsigned char *) pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset), flags); } // kmemsysStateUnload: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelMemorySystem_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem, NvU32 flags) { return kmemsysStateUnload(pGpu, (struct KernelMemorySystem *)(((unsigned char *) pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset), flags); } // kmemsysStateDestroy: virtual override (engstate) base (engstate) -static void __nvoc_down_thunk_KernelMemorySystem_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem) { +void __nvoc_down_thunk_KernelMemorySystem_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelMemorySystem) { kmemsysStateDestroy(pGpu, (struct KernelMemorySystem *)(((unsigned char *) pKernelMemorySystem) - __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_kmemsysInitMissing(struct OBJGPU *pGpu, struct KernelMemorySystem *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmemsysStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelMemorySystem *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmemsysStateInitUnlocked(struct OBJGPU *pGpu, struct KernelMemorySystem *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmemsysStatePostUnload(struct OBJGPU *pGpu, struct KernelMemorySystem *pEngstate, NvU32 arg3); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_kmemsysIsPresent(struct OBJGPU *pGpu, struct KernelMemorySystem *pEngstate); // this + // 5 up-thunk(s) defined to bridge methods in KernelMemorySystem to superclasses // kmemsysInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kmemsysInitMissing(struct OBJGPU *pGpu, struct KernelMemorySystem *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kmemsysInitMissing(struct OBJGPU *pGpu, struct KernelMemorySystem *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset)); } // kmemsysStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmemsysStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelMemorySystem *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmemsysStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelMemorySystem *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset)); } // kmemsysStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmemsysStateInitUnlocked(struct OBJGPU *pGpu, struct KernelMemorySystem *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmemsysStateInitUnlocked(struct OBJGPU *pGpu, struct KernelMemorySystem *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset)); } // kmemsysStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmemsysStatePostUnload(struct OBJGPU *pGpu, struct KernelMemorySystem *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmemsysStatePostUnload(struct OBJGPU *pGpu, struct KernelMemorySystem *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset), arg3); } // kmemsysIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_kmemsysIsPresent(struct OBJGPU *pGpu, struct KernelMemorySystem *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_kmemsysIsPresent(struct OBJGPU *pGpu, struct KernelMemorySystem *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMemorySystem_OBJENGSTATE.offset)); } @@ -170,22 +188,22 @@ void __nvoc_init_dataField_KernelMemorySystem(KernelMemorySystem *pThis, RmHalsp // Hal field -- bDisableTiledCachingInvalidatesWithEccBug1521641 // default { - pThis->bDisableTiledCachingInvalidatesWithEccBug1521641 = ((NvBool)(0 != 0)); + pThis->bDisableTiledCachingInvalidatesWithEccBug1521641 = NV_FALSE; } // Hal field -- bGpuCacheEnable if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bGpuCacheEnable = ((NvBool)(0 == 0)); + pThis->bGpuCacheEnable = NV_TRUE; } // Hal field -- bNumaNodesAdded - pThis->bNumaNodesAdded = ((NvBool)(0 != 0)); + pThis->bNumaNodesAdded = NV_FALSE; // Hal field -- bL2CleanFbPull if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bL2CleanFbPull = ((NvBool)(0 == 0)); + pThis->bL2CleanFbPull = NV_TRUE; } // Hal field -- l2WriteMode @@ -195,17 +213,17 @@ void __nvoc_init_dataField_KernelMemorySystem(KernelMemorySystem *pThis, RmHalsp } // Hal field -- bPreserveComptagBackingStoreOnSuspend - pThis->bPreserveComptagBackingStoreOnSuspend = ((NvBool)(0 != 0)); + pThis->bPreserveComptagBackingStoreOnSuspend = NV_FALSE; // Hal field -- bBug3656943WAR if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { - pThis->bBug3656943WAR = ((NvBool)(0 == 0)); + pThis->bBug3656943WAR = NV_TRUE; } // default else { - pThis->bBug3656943WAR = ((NvBool)(0 != 0)); + pThis->bBug3656943WAR = NV_FALSE; } // Hal field -- overrideToGMK @@ -214,11 +232,11 @@ void __nvoc_init_dataField_KernelMemorySystem(KernelMemorySystem *pThis, RmHalsp // Hal field -- bDisablePlcForCertainOffsetsBug3046774 if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->bDisablePlcForCertainOffsetsBug3046774 = ((NvBool)(0 != 0)); + pThis->bDisablePlcForCertainOffsetsBug3046774 = NV_FALSE; } else if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ { - pThis->bDisablePlcForCertainOffsetsBug3046774 = ((NvBool)(0 != 0)); + pThis->bDisablePlcForCertainOffsetsBug3046774 = NV_FALSE; } } @@ -249,42 +267,6 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // kmemsysConstructEngine -- virtual override (engstate) base (engstate) - pThis->__kmemsysConstructEngine__ = &kmemsysConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelMemorySystem_engstateConstructEngine; - - // kmemsysStatePreInitLocked -- virtual override (engstate) base (engstate) - pThis->__kmemsysStatePreInitLocked__ = &kmemsysStatePreInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStatePreInitLocked; - - // kmemsysStateInitLocked -- virtual override (engstate) base (engstate) - pThis->__kmemsysStateInitLocked__ = &kmemsysStateInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStateInitLocked; - - // kmemsysStatePreLoad -- virtual override (engstate) base (engstate) - pThis->__kmemsysStatePreLoad__ = &kmemsysStatePreLoad_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStatePreLoad; - - // kmemsysStatePostLoad -- virtual override (engstate) base (engstate) - pThis->__kmemsysStatePostLoad__ = &kmemsysStatePostLoad_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStatePostLoad; - - // kmemsysStateLoad -- virtual override (engstate) base (engstate) - pThis->__kmemsysStateLoad__ = &kmemsysStateLoad_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStateLoad; - - // kmemsysStatePreUnload -- virtual override (engstate) base (engstate) - pThis->__kmemsysStatePreUnload__ = &kmemsysStatePreUnload_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStatePreUnload; - - // kmemsysStateUnload -- virtual override (engstate) base (engstate) - pThis->__kmemsysStateUnload__ = &kmemsysStateUnload_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStateUnload; - - // kmemsysStateDestroy -- virtual override (engstate) base (engstate) - pThis->__kmemsysStateDestroy__ = &kmemsysStateDestroy_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStateDestroy; - // kmemsysGetFbNumaInfo -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { @@ -437,7 +419,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis // kmemsysIsPagePLCable -- halified (4 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__kmemsysIsPagePLCable__ = &kmemsysIsPagePLCable_cbe027; + pThis->__kmemsysIsPagePLCable__ = &kmemsysIsPagePLCable_88bc07; } else { @@ -452,7 +434,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis // default else { - pThis->__kmemsysIsPagePLCable__ = &kmemsysIsPagePLCable_510167; + pThis->__kmemsysIsPagePLCable__ = &kmemsysIsPagePLCable_84161d; } } @@ -578,7 +560,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis // default else { - pThis->__kmemsysAssertFbAckTimeoutPending__ = &kmemsysAssertFbAckTimeoutPending_491d52; + pThis->__kmemsysAssertFbAckTimeoutPending__ = &kmemsysAssertFbAckTimeoutPending_3dd2c9; } // kmemsysGetMaxFbpas -- halified (3 hals) body @@ -635,28 +617,49 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis { pThis->__kmemsysGetFbInfos__ = &kmemsysGetFbInfos_ac1694; } - - // kmemsysInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__kmemsysInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kmemsysInitMissing; - - // kmemsysStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kmemsysStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmemsysStatePreInitUnlocked; - - // kmemsysStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kmemsysStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmemsysStateInitUnlocked; - - // kmemsysStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__kmemsysStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kmemsysStatePostUnload; - - // kmemsysIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__kmemsysIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kmemsysIsPresent; -} // End __nvoc_init_funcTable_KernelMemorySystem_1 with approximately 90 basic block(s). +} // End __nvoc_init_funcTable_KernelMemorySystem_1 with approximately 67 basic block(s). // Initialize vtable(s) for 42 virtual method(s). void __nvoc_init_funcTable_KernelMemorySystem(KernelMemorySystem *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 42 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelMemorySystem vtable = { + .__kmemsysConstructEngine__ = &kmemsysConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelMemorySystem_engstateConstructEngine, // virtual + .__kmemsysStatePreInitLocked__ = &kmemsysStatePreInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStatePreInitLocked, // virtual + .__kmemsysStateInitLocked__ = &kmemsysStateInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStateInitLocked, // virtual + .__kmemsysStatePreLoad__ = &kmemsysStatePreLoad_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStatePreLoad, // virtual + .__kmemsysStatePostLoad__ = &kmemsysStatePostLoad_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStatePostLoad, // virtual + .__kmemsysStateLoad__ = &kmemsysStateLoad_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStateLoad, // virtual + .__kmemsysStatePreUnload__ = &kmemsysStatePreUnload_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStatePreUnload, // virtual + .__kmemsysStateUnload__ = &kmemsysStateUnload_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStateUnload, // virtual + .__kmemsysStateDestroy__ = &kmemsysStateDestroy_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelMemorySystem_engstateStateDestroy, // virtual + .__kmemsysInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kmemsysInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__kmemsysStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmemsysStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__kmemsysStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmemsysStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__kmemsysStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kmemsysStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__kmemsysIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kmemsysIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_vtable = &vtable; // (kmemsys) this + + // Initialize vtable(s) with 28 per-object function pointer(s). __nvoc_init_funcTable_KernelMemorySystem_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kern_mem_sys_nvoc.h b/src/nvidia/generated/g_kern_mem_sys_nvoc.h index 541fbb01e5..53f9baf570 100644 --- a/src/nvidia/generated/g_kern_mem_sys_nvoc.h +++ b/src/nvidia/generated/g_kern_mem_sys_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -211,10 +211,15 @@ typedef NV2080_CTRL_INTERNAL_MEMSYS_GET_STATIC_CONFIG_PARAMS MEMORY_SYSTEM_STATI #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelMemorySystem; + + struct KernelMemorySystem { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelMemorySystem *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -224,16 +229,7 @@ struct KernelMemorySystem { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct KernelMemorySystem *__nvoc_pbase_KernelMemorySystem; // kmemsys - // Vtable with 42 per-object function pointers - NV_STATUS (*__kmemsysConstructEngine__)(OBJGPU *, struct KernelMemorySystem * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) - NV_STATUS (*__kmemsysStatePreInitLocked__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__kmemsysStateInitLocked__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__kmemsysStatePreLoad__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__kmemsysStatePostLoad__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__kmemsysStateLoad__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__kmemsysStatePreUnload__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__kmemsysStateUnload__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32); // virtual override (engstate) base (engstate) - void (*__kmemsysStateDestroy__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // virtual override (engstate) base (engstate) + // Vtable with 28 per-object function pointers NV_STATUS (*__kmemsysGetFbNumaInfo__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU64 *, NvU64 *, NvS32 *); // halified (2 hals) body NV_STATUS (*__kmemsysReadUsableFbSize__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU64 *); // halified (2 hals) body NV_STATUS (*__kmemsysGetUsableFbSize__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU64 *); // halified (2 hals) body @@ -262,11 +258,6 @@ struct KernelMemorySystem { NvU32 (*__kmemsysGetEccDedCountRegAddr__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32, NvU32); // halified (2 hals) body NvU16 (*__kmemsysGetMaximumBlacklistPages__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // halified (2 hals) body NV_STATUS (*__kmemsysGetFbInfos__)(OBJGPU *, struct KernelMemorySystem * /*this*/, struct RsClient *, Device *, NvHandle, NV2080_CTRL_FB_GET_INFO_V2_PARAMS *, NvU64 *); // halified (2 hals) - void (*__kmemsysInitMissing__)(struct OBJGPU *, struct KernelMemorySystem * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kmemsysStatePreInitUnlocked__)(struct OBJGPU *, struct KernelMemorySystem * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kmemsysStateInitUnlocked__)(struct OBJGPU *, struct KernelMemorySystem * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kmemsysStatePostUnload__)(struct OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NvBool (*__kmemsysIsPresent__)(struct OBJGPU *, struct KernelMemorySystem * /*this*/); // virtual inherited (engstate) base (engstate) // Data members NvBool bDisableTiledCachingInvalidatesWithEccBug1521641; @@ -295,6 +286,27 @@ struct KernelMemorySystem { NvBool bNumaMigPartitionSizeEnumerated; }; + +// Metadata including vtable with 14 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelMemorySystem { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + + NV_STATUS (*__kmemsysConstructEngine__)(OBJGPU *, struct KernelMemorySystem * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmemsysStatePreInitLocked__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmemsysStateInitLocked__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmemsysStatePreLoad__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmemsysStatePostLoad__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmemsysStateLoad__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmemsysStatePreUnload__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmemsysStateUnload__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32); // virtual override (engstate) base (engstate) + void (*__kmemsysStateDestroy__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // virtual override (engstate) base (engstate) + void (*__kmemsysInitMissing__)(struct OBJGPU *, struct KernelMemorySystem * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmemsysStatePreInitUnlocked__)(struct OBJGPU *, struct KernelMemorySystem * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmemsysStateInitUnlocked__)(struct OBJGPU *, struct KernelMemorySystem * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmemsysStatePostUnload__)(struct OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__kmemsysIsPresent__)(struct OBJGPU *, struct KernelMemorySystem * /*this*/); // virtual inherited (engstate) base (engstate) +}; + #ifndef __NVOC_CLASS_KernelMemorySystem_TYPEDEF__ #define __NVOC_CLASS_KernelMemorySystem_TYPEDEF__ typedef struct KernelMemorySystem KernelMemorySystem; @@ -329,23 +341,23 @@ NV_STATUS __nvoc_objCreate_KernelMemorySystem(KernelMemorySystem**, Dynamic*, Nv // Wrapper macros -#define kmemsysConstructEngine_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysConstructEngine__ +#define kmemsysConstructEngine_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__nvoc_vtable->__kmemsysConstructEngine__ #define kmemsysConstructEngine(pGpu, pKernelMemorySystem, arg3) kmemsysConstructEngine_DISPATCH(pGpu, pKernelMemorySystem, arg3) -#define kmemsysStatePreInitLocked_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysStatePreInitLocked__ +#define kmemsysStatePreInitLocked_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__nvoc_vtable->__kmemsysStatePreInitLocked__ #define kmemsysStatePreInitLocked(pGpu, pKernelMemorySystem) kmemsysStatePreInitLocked_DISPATCH(pGpu, pKernelMemorySystem) -#define kmemsysStateInitLocked_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysStateInitLocked__ +#define kmemsysStateInitLocked_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__nvoc_vtable->__kmemsysStateInitLocked__ #define kmemsysStateInitLocked(pGpu, pKernelMemorySystem) kmemsysStateInitLocked_DISPATCH(pGpu, pKernelMemorySystem) -#define kmemsysStatePreLoad_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysStatePreLoad__ +#define kmemsysStatePreLoad_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__nvoc_vtable->__kmemsysStatePreLoad__ #define kmemsysStatePreLoad(pGpu, pKernelMemorySystem, flags) kmemsysStatePreLoad_DISPATCH(pGpu, pKernelMemorySystem, flags) -#define kmemsysStatePostLoad_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysStatePostLoad__ +#define kmemsysStatePostLoad_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__nvoc_vtable->__kmemsysStatePostLoad__ #define kmemsysStatePostLoad(pGpu, pKernelMemorySystem, flags) kmemsysStatePostLoad_DISPATCH(pGpu, pKernelMemorySystem, flags) -#define kmemsysStateLoad_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysStateLoad__ +#define kmemsysStateLoad_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__nvoc_vtable->__kmemsysStateLoad__ #define kmemsysStateLoad(pGpu, pKernelMemorySystem, flags) kmemsysStateLoad_DISPATCH(pGpu, pKernelMemorySystem, flags) -#define kmemsysStatePreUnload_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysStatePreUnload__ +#define kmemsysStatePreUnload_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__nvoc_vtable->__kmemsysStatePreUnload__ #define kmemsysStatePreUnload(pGpu, pKernelMemorySystem, flags) kmemsysStatePreUnload_DISPATCH(pGpu, pKernelMemorySystem, flags) -#define kmemsysStateUnload_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysStateUnload__ +#define kmemsysStateUnload_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__nvoc_vtable->__kmemsysStateUnload__ #define kmemsysStateUnload(pGpu, pKernelMemorySystem, flags) kmemsysStateUnload_DISPATCH(pGpu, pKernelMemorySystem, flags) -#define kmemsysStateDestroy_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysStateDestroy__ +#define kmemsysStateDestroy_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__nvoc_vtable->__kmemsysStateDestroy__ #define kmemsysStateDestroy(pGpu, pKernelMemorySystem) kmemsysStateDestroy_DISPATCH(pGpu, pKernelMemorySystem) #define kmemsysGetFbNumaInfo_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysGetFbNumaInfo__ #define kmemsysGetFbNumaInfo(pGpu, pKernelMemorySystem, physAddr, rsvdPhysAddr, numaNodeId) kmemsysGetFbNumaInfo_DISPATCH(pGpu, pKernelMemorySystem, physAddr, rsvdPhysAddr, numaNodeId) @@ -431,52 +443,52 @@ NV_STATUS __nvoc_objCreate_KernelMemorySystem(KernelMemorySystem**, Dynamic*, Nv #define kmemsysGetFbInfos_FNPTR(arg_this) arg_this->__kmemsysGetFbInfos__ #define kmemsysGetFbInfos(arg1, arg_this, arg3, arg4, hSubdevice, pParams, pFbInfoListIndicesUnset) kmemsysGetFbInfos_DISPATCH(arg1, arg_this, arg3, arg4, hSubdevice, pParams, pFbInfoListIndicesUnset) #define kmemsysGetFbInfos_HAL(arg1, arg_this, arg3, arg4, hSubdevice, pParams, pFbInfoListIndicesUnset) kmemsysGetFbInfos_DISPATCH(arg1, arg_this, arg3, arg4, hSubdevice, pParams, pFbInfoListIndicesUnset) -#define kmemsysInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define kmemsysInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define kmemsysInitMissing(pGpu, pEngstate) kmemsysInitMissing_DISPATCH(pGpu, pEngstate) -#define kmemsysStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define kmemsysStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define kmemsysStatePreInitUnlocked(pGpu, pEngstate) kmemsysStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kmemsysStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kmemsysStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define kmemsysStateInitUnlocked(pGpu, pEngstate) kmemsysStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kmemsysStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kmemsysStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define kmemsysStatePostUnload(pGpu, pEngstate, arg3) kmemsysStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kmemsysIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define kmemsysIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define kmemsysIsPresent(pGpu, pEngstate) kmemsysIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS kmemsysConstructEngine_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, ENGDESCRIPTOR arg3) { - return pKernelMemorySystem->__kmemsysConstructEngine__(pGpu, pKernelMemorySystem, arg3); + return pKernelMemorySystem->__nvoc_vtable->__kmemsysConstructEngine__(pGpu, pKernelMemorySystem, arg3); } static inline NV_STATUS kmemsysStatePreInitLocked_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { - return pKernelMemorySystem->__kmemsysStatePreInitLocked__(pGpu, pKernelMemorySystem); + return pKernelMemorySystem->__nvoc_vtable->__kmemsysStatePreInitLocked__(pGpu, pKernelMemorySystem); } static inline NV_STATUS kmemsysStateInitLocked_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { - return pKernelMemorySystem->__kmemsysStateInitLocked__(pGpu, pKernelMemorySystem); + return pKernelMemorySystem->__nvoc_vtable->__kmemsysStateInitLocked__(pGpu, pKernelMemorySystem); } static inline NV_STATUS kmemsysStatePreLoad_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags) { - return pKernelMemorySystem->__kmemsysStatePreLoad__(pGpu, pKernelMemorySystem, flags); + return pKernelMemorySystem->__nvoc_vtable->__kmemsysStatePreLoad__(pGpu, pKernelMemorySystem, flags); } static inline NV_STATUS kmemsysStatePostLoad_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags) { - return pKernelMemorySystem->__kmemsysStatePostLoad__(pGpu, pKernelMemorySystem, flags); + return pKernelMemorySystem->__nvoc_vtable->__kmemsysStatePostLoad__(pGpu, pKernelMemorySystem, flags); } static inline NV_STATUS kmemsysStateLoad_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags) { - return pKernelMemorySystem->__kmemsysStateLoad__(pGpu, pKernelMemorySystem, flags); + return pKernelMemorySystem->__nvoc_vtable->__kmemsysStateLoad__(pGpu, pKernelMemorySystem, flags); } static inline NV_STATUS kmemsysStatePreUnload_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags) { - return pKernelMemorySystem->__kmemsysStatePreUnload__(pGpu, pKernelMemorySystem, flags); + return pKernelMemorySystem->__nvoc_vtable->__kmemsysStatePreUnload__(pGpu, pKernelMemorySystem, flags); } static inline NV_STATUS kmemsysStateUnload_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags) { - return pKernelMemorySystem->__kmemsysStateUnload__(pGpu, pKernelMemorySystem, flags); + return pKernelMemorySystem->__nvoc_vtable->__kmemsysStateUnload__(pGpu, pKernelMemorySystem, flags); } static inline void kmemsysStateDestroy_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { - pKernelMemorySystem->__kmemsysStateDestroy__(pGpu, pKernelMemorySystem); + pKernelMemorySystem->__nvoc_vtable->__kmemsysStateDestroy__(pGpu, pKernelMemorySystem); } static inline NV_STATUS kmemsysGetFbNumaInfo_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *physAddr, NvU64 *rsvdPhysAddr, NvS32 *numaNodeId) { @@ -592,23 +604,23 @@ static inline NV_STATUS kmemsysGetFbInfos_DISPATCH(OBJGPU *arg1, struct KernelMe } static inline void kmemsysInitMissing_DISPATCH(struct OBJGPU *pGpu, struct KernelMemorySystem *pEngstate) { - pEngstate->__kmemsysInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kmemsysInitMissing__(pGpu, pEngstate); } static inline NV_STATUS kmemsysStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelMemorySystem *pEngstate) { - return pEngstate->__kmemsysStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kmemsysStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kmemsysStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelMemorySystem *pEngstate) { - return pEngstate->__kmemsysStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kmemsysStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kmemsysStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelMemorySystem *pEngstate, NvU32 arg3) { - return pEngstate->__kmemsysStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kmemsysStatePostUnload__(pGpu, pEngstate, arg3); } static inline NvBool kmemsysIsPresent_DISPATCH(struct OBJGPU *pGpu, struct KernelMemorySystem *pEngstate) { - return pEngstate->__kmemsysIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kmemsysIsPresent__(pGpu, pEngstate); } static inline void kmemsysAssertSysmemFlushBufferValid_b3696a(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { @@ -755,8 +767,8 @@ static inline NvBool kmemsysNeedInvalidateGpuCacheOnMap(OBJGPU *pGpu, struct Ker #define kmemsysNeedInvalidateGpuCacheOnMap_HAL(pGpu, pKernelMemorySystem, bIsVolatile, aperture) kmemsysNeedInvalidateGpuCacheOnMap(pGpu, pKernelMemorySystem, bIsVolatile, aperture) -static inline NvBool kmemsysCbcIsSafe_cbe027(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { - return ((NvBool)(0 == 0)); +static inline NvBool kmemsysCbcIsSafe_88bc07(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { + return NV_TRUE; } @@ -766,7 +778,7 @@ static inline NvBool kmemsysCbcIsSafe(OBJGPU *pGpu, struct KernelMemorySystem *p return NV_FALSE; } #else //__nvoc_kern_mem_sys_h_disabled -#define kmemsysCbcIsSafe(pGpu, pKernelMemorySystem) kmemsysCbcIsSafe_cbe027(pGpu, pKernelMemorySystem) +#define kmemsysCbcIsSafe(pGpu, pKernelMemorySystem) kmemsysCbcIsSafe_88bc07(pGpu, pKernelMemorySystem) #endif //__nvoc_kern_mem_sys_h_disabled #define kmemsysCbcIsSafe_HAL(pGpu, pKernelMemorySystem) kmemsysCbcIsSafe(pGpu, pKernelMemorySystem) @@ -908,16 +920,16 @@ NvU32 kmemsysGetFlushSysmemBufferAddrShift_GM107(OBJGPU *pGpu, struct KernelMemo NvU32 kmemsysGetFlushSysmemBufferAddrShift_GB100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); -static inline NvBool kmemsysIsPagePLCable_cbe027(OBJGPU *pGpu, struct KernelMemorySystem *KernelMemorySystem, NvU64 physAddr, NvU64 pageSize) { - return ((NvBool)(0 == 0)); +static inline NvBool kmemsysIsPagePLCable_88bc07(OBJGPU *pGpu, struct KernelMemorySystem *KernelMemorySystem, NvU64 physAddr, NvU64 pageSize) { + return NV_TRUE; } NvBool kmemsysIsPagePLCable_GA100(OBJGPU *pGpu, struct KernelMemorySystem *KernelMemorySystem, NvU64 physAddr, NvU64 pageSize); NvBool kmemsysIsPagePLCable_GA102(OBJGPU *pGpu, struct KernelMemorySystem *KernelMemorySystem, NvU64 physAddr, NvU64 pageSize); -static inline NvBool kmemsysIsPagePLCable_510167(OBJGPU *pGpu, struct KernelMemorySystem *KernelMemorySystem, NvU64 physAddr, NvU64 pageSize) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 == 0))); +static inline NvBool kmemsysIsPagePLCable_84161d(OBJGPU *pGpu, struct KernelMemorySystem *KernelMemorySystem, NvU64 physAddr, NvU64 pageSize) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_TRUE); } static inline NV_STATUS kmemsysReadMIGMemoryCfg_46f6a7(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { @@ -976,8 +988,8 @@ NvBool kmemsysAssertFbAckTimeoutPending_GH100(OBJGPU *pGpu, struct KernelMemoryS NvBool kmemsysAssertFbAckTimeoutPending_GB100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); -static inline NvBool kmemsysAssertFbAckTimeoutPending_491d52(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { - return ((NvBool)(0 != 0)); +static inline NvBool kmemsysAssertFbAckTimeoutPending_3dd2c9(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem) { + return NV_FALSE; } NvU32 kmemsysGetMaxFbpas_TU102(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); diff --git a/src/nvidia/generated/g_kern_perf_nvoc.c b/src/nvidia/generated/g_kern_perf_nvoc.c index bc7092b54f..65f258b54f 100644 --- a/src/nvidia/generated/g_kern_perf_nvoc.c +++ b/src/nvidia/generated/g_kern_perf_nvoc.c @@ -66,78 +66,96 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelPerf = /*pExportInfo=*/ &__nvoc_export_info_KernelPerf }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_KernelPerf_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf, ENGDESCRIPTOR engDesc); // this +NV_STATUS __nvoc_down_thunk_KernelPerf_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf); // this +NV_STATUS __nvoc_down_thunk_KernelPerf_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf, NvU32 flags); // this +NV_STATUS __nvoc_down_thunk_KernelPerf_engstateStateUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf, NvU32 flags); // this +void __nvoc_down_thunk_KernelPerf_engstateStateDestroy(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf); // this + // 5 down-thunk(s) defined to bridge methods in KernelPerf from superclasses // kperfConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelPerf_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf, ENGDESCRIPTOR engDesc) { +NV_STATUS __nvoc_down_thunk_KernelPerf_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf, ENGDESCRIPTOR engDesc) { return kperfConstructEngine(pGpu, (struct KernelPerf *)(((unsigned char *) pKernelPerf) - __nvoc_rtti_KernelPerf_OBJENGSTATE.offset), engDesc); } // kperfStateInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelPerf_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf) { +NV_STATUS __nvoc_down_thunk_KernelPerf_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf) { return kperfStateInitLocked(pGpu, (struct KernelPerf *)(((unsigned char *) pKernelPerf) - __nvoc_rtti_KernelPerf_OBJENGSTATE.offset)); } // kperfStateLoad: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelPerf_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelPerf_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf, NvU32 flags) { return kperfStateLoad(pGpu, (struct KernelPerf *)(((unsigned char *) pKernelPerf) - __nvoc_rtti_KernelPerf_OBJENGSTATE.offset), flags); } // kperfStateUnload: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelPerf_engstateStateUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelPerf_engstateStateUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf, NvU32 flags) { return kperfStateUnload(pGpu, (struct KernelPerf *)(((unsigned char *) pKernelPerf) - __nvoc_rtti_KernelPerf_OBJENGSTATE.offset), flags); } // kperfStateDestroy: virtual override (engstate) base (engstate) -static void __nvoc_down_thunk_KernelPerf_engstateStateDestroy(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf) { +void __nvoc_down_thunk_KernelPerf_engstateStateDestroy(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPerf) { kperfStateDestroy(pGpu, (struct KernelPerf *)(((unsigned char *) pKernelPerf) - __nvoc_rtti_KernelPerf_OBJENGSTATE.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_kperfInitMissing(struct OBJGPU *pGpu, struct KernelPerf *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePreInitLocked(struct OBJGPU *pGpu, struct KernelPerf *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelPerf *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStateInitUnlocked(struct OBJGPU *pGpu, struct KernelPerf *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePreLoad(struct OBJGPU *pGpu, struct KernelPerf *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePostLoad(struct OBJGPU *pGpu, struct KernelPerf *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePreUnload(struct OBJGPU *pGpu, struct KernelPerf *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePostUnload(struct OBJGPU *pGpu, struct KernelPerf *pEngstate, NvU32 arg3); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_kperfIsPresent(struct OBJGPU *pGpu, struct KernelPerf *pEngstate); // this + // 9 up-thunk(s) defined to bridge methods in KernelPerf to superclasses // kperfInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kperfInitMissing(struct OBJGPU *pGpu, struct KernelPerf *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kperfInitMissing(struct OBJGPU *pGpu, struct KernelPerf *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset)); } // kperfStatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePreInitLocked(struct OBJGPU *pGpu, struct KernelPerf *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePreInitLocked(struct OBJGPU *pGpu, struct KernelPerf *pEngstate) { return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset)); } // kperfStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelPerf *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelPerf *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset)); } // kperfStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStateInitUnlocked(struct OBJGPU *pGpu, struct KernelPerf *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStateInitUnlocked(struct OBJGPU *pGpu, struct KernelPerf *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset)); } // kperfStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePreLoad(struct OBJGPU *pGpu, struct KernelPerf *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePreLoad(struct OBJGPU *pGpu, struct KernelPerf *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset), arg3); } // kperfStatePostLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePostLoad(struct OBJGPU *pGpu, struct KernelPerf *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePostLoad(struct OBJGPU *pGpu, struct KernelPerf *pEngstate, NvU32 arg3) { return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset), arg3); } // kperfStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePreUnload(struct OBJGPU *pGpu, struct KernelPerf *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePreUnload(struct OBJGPU *pGpu, struct KernelPerf *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset), arg3); } // kperfStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePostUnload(struct OBJGPU *pGpu, struct KernelPerf *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kperfStatePostUnload(struct OBJGPU *pGpu, struct KernelPerf *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset), arg3); } // kperfIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_kperfIsPresent(struct OBJGPU *pGpu, struct KernelPerf *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_kperfIsPresent(struct OBJGPU *pGpu, struct KernelPerf *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPerf_OBJENGSTATE.offset)); } @@ -186,26 +204,6 @@ static void __nvoc_init_funcTable_KernelPerf_1(KernelPerf *pThis, RmHalspecOwner PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // kperfConstructEngine -- virtual override (engstate) base (engstate) - pThis->__kperfConstructEngine__ = &kperfConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelPerf_engstateConstructEngine; - - // kperfStateInitLocked -- virtual override (engstate) base (engstate) - pThis->__kperfStateInitLocked__ = &kperfStateInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelPerf_engstateStateInitLocked; - - // kperfStateLoad -- virtual override (engstate) base (engstate) - pThis->__kperfStateLoad__ = &kperfStateLoad_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelPerf_engstateStateLoad; - - // kperfStateUnload -- virtual override (engstate) base (engstate) - pThis->__kperfStateUnload__ = &kperfStateUnload_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelPerf_engstateStateUnload; - - // kperfStateDestroy -- virtual override (engstate) base (engstate) - pThis->__kperfStateDestroy__ = &kperfStateDestroy_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelPerf_engstateStateDestroy; - // kperfGpuBoostSyncStateInit -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { @@ -216,40 +214,49 @@ static void __nvoc_init_funcTable_KernelPerf_1(KernelPerf *pThis, RmHalspecOwner { pThis->__kperfGpuBoostSyncStateInit__ = &kperfGpuBoostSyncStateInit_IMPL; } - - // kperfInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__kperfInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kperfInitMissing; - - // kperfStatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__kperfStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kperfStatePreInitLocked; - - // kperfStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kperfStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kperfStatePreInitUnlocked; - - // kperfStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kperfStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kperfStateInitUnlocked; - - // kperfStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__kperfStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kperfStatePreLoad; - - // kperfStatePostLoad -- virtual inherited (engstate) base (engstate) - pThis->__kperfStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kperfStatePostLoad; - - // kperfStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__kperfStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kperfStatePreUnload; - - // kperfStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__kperfStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kperfStatePostUnload; - - // kperfIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__kperfIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kperfIsPresent; -} // End __nvoc_init_funcTable_KernelPerf_1 with approximately 21 basic block(s). +} // End __nvoc_init_funcTable_KernelPerf_1 with approximately 2 basic block(s). // Initialize vtable(s) for 15 virtual method(s). void __nvoc_init_funcTable_KernelPerf(KernelPerf *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 15 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelPerf vtable = { + .__kperfConstructEngine__ = &kperfConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelPerf_engstateConstructEngine, // virtual + .__kperfStateInitLocked__ = &kperfStateInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelPerf_engstateStateInitLocked, // virtual + .__kperfStateLoad__ = &kperfStateLoad_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelPerf_engstateStateLoad, // virtual + .__kperfStateUnload__ = &kperfStateUnload_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelPerf_engstateStateUnload, // virtual + .__kperfStateDestroy__ = &kperfStateDestroy_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelPerf_engstateStateDestroy, // virtual + .__kperfInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kperfInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__kperfStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kperfStatePreInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__kperfStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kperfStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__kperfStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kperfStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__kperfStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kperfStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__kperfStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kperfStatePostLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL, // virtual + .__kperfStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kperfStatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__kperfStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kperfStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__kperfIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kperfIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_vtable = &vtable; // (kperf) this + + // Initialize vtable(s) with 1 per-object function pointer(s). __nvoc_init_funcTable_KernelPerf_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kern_perf_nvoc.h b/src/nvidia/generated/g_kern_perf_nvoc.h index 43d78b9b14..b1514f32c7 100644 --- a/src/nvidia/generated/g_kern_perf_nvoc.h +++ b/src/nvidia/generated/g_kern_perf_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -80,10 +80,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelPerf; + + struct KernelPerf { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelPerf *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -93,13 +98,24 @@ struct KernelPerf { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct KernelPerf *__nvoc_pbase_KernelPerf; // kperf - // Vtable with 15 per-object function pointers + // Vtable with 1 per-object function pointer + NV_STATUS (*__kperfGpuBoostSyncStateInit__)(struct OBJGPU *, struct KernelPerf * /*this*/); // halified (2 hals) body + + // Data members + struct KERNEL_PERF_GPU_BOOST_SYNC sliGpuBoostSync; + NvU32 reentrancyMask; +}; + + +// Metadata including vtable with 14 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelPerf { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + NV_STATUS (*__kperfConstructEngine__)(struct OBJGPU *, struct KernelPerf * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) NV_STATUS (*__kperfStateInitLocked__)(struct OBJGPU *, struct KernelPerf * /*this*/); // virtual override (engstate) base (engstate) NV_STATUS (*__kperfStateLoad__)(struct OBJGPU *, struct KernelPerf * /*this*/, NvU32); // virtual override (engstate) base (engstate) NV_STATUS (*__kperfStateUnload__)(struct OBJGPU *, struct KernelPerf * /*this*/, NvU32); // virtual override (engstate) base (engstate) void (*__kperfStateDestroy__)(struct OBJGPU *, struct KernelPerf * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__kperfGpuBoostSyncStateInit__)(struct OBJGPU *, struct KernelPerf * /*this*/); // halified (2 hals) body void (*__kperfInitMissing__)(struct OBJGPU *, struct KernelPerf * /*this*/); // virtual inherited (engstate) base (engstate) NV_STATUS (*__kperfStatePreInitLocked__)(struct OBJGPU *, struct KernelPerf * /*this*/); // virtual inherited (engstate) base (engstate) NV_STATUS (*__kperfStatePreInitUnlocked__)(struct OBJGPU *, struct KernelPerf * /*this*/); // virtual inherited (engstate) base (engstate) @@ -109,10 +125,6 @@ struct KernelPerf { NV_STATUS (*__kperfStatePreUnload__)(struct OBJGPU *, struct KernelPerf * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) NV_STATUS (*__kperfStatePostUnload__)(struct OBJGPU *, struct KernelPerf * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) NvBool (*__kperfIsPresent__)(struct OBJGPU *, struct KernelPerf * /*this*/); // virtual inherited (engstate) base (engstate) - - // Data members - struct KERNEL_PERF_GPU_BOOST_SYNC sliGpuBoostSync; - NvU32 reentrancyMask; }; #ifndef __NVOC_CLASS_KernelPerf_TYPEDEF__ @@ -149,57 +161,57 @@ NV_STATUS __nvoc_objCreate_KernelPerf(KernelPerf**, Dynamic*, NvU32); // Wrapper macros -#define kperfConstructEngine_FNPTR(pKernelPerf) pKernelPerf->__kperfConstructEngine__ +#define kperfConstructEngine_FNPTR(pKernelPerf) pKernelPerf->__nvoc_vtable->__kperfConstructEngine__ #define kperfConstructEngine(pGpu, pKernelPerf, engDesc) kperfConstructEngine_DISPATCH(pGpu, pKernelPerf, engDesc) -#define kperfStateInitLocked_FNPTR(pKernelPerf) pKernelPerf->__kperfStateInitLocked__ +#define kperfStateInitLocked_FNPTR(pKernelPerf) pKernelPerf->__nvoc_vtable->__kperfStateInitLocked__ #define kperfStateInitLocked(pGpu, pKernelPerf) kperfStateInitLocked_DISPATCH(pGpu, pKernelPerf) -#define kperfStateLoad_FNPTR(pKernelPerf) pKernelPerf->__kperfStateLoad__ +#define kperfStateLoad_FNPTR(pKernelPerf) pKernelPerf->__nvoc_vtable->__kperfStateLoad__ #define kperfStateLoad(pGpu, pKernelPerf, flags) kperfStateLoad_DISPATCH(pGpu, pKernelPerf, flags) -#define kperfStateUnload_FNPTR(pKernelPerf) pKernelPerf->__kperfStateUnload__ +#define kperfStateUnload_FNPTR(pKernelPerf) pKernelPerf->__nvoc_vtable->__kperfStateUnload__ #define kperfStateUnload(pGpu, pKernelPerf, flags) kperfStateUnload_DISPATCH(pGpu, pKernelPerf, flags) -#define kperfStateDestroy_FNPTR(pKernelPerf) pKernelPerf->__kperfStateDestroy__ +#define kperfStateDestroy_FNPTR(pKernelPerf) pKernelPerf->__nvoc_vtable->__kperfStateDestroy__ #define kperfStateDestroy(pGpu, pKernelPerf) kperfStateDestroy_DISPATCH(pGpu, pKernelPerf) #define kperfGpuBoostSyncStateInit_FNPTR(pKernelPerf) pKernelPerf->__kperfGpuBoostSyncStateInit__ #define kperfGpuBoostSyncStateInit(pGpu, pKernelPerf) kperfGpuBoostSyncStateInit_DISPATCH(pGpu, pKernelPerf) #define kperfGpuBoostSyncStateInit_HAL(pGpu, pKernelPerf) kperfGpuBoostSyncStateInit_DISPATCH(pGpu, pKernelPerf) -#define kperfInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define kperfInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define kperfInitMissing(pGpu, pEngstate) kperfInitMissing_DISPATCH(pGpu, pEngstate) -#define kperfStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define kperfStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define kperfStatePreInitLocked(pGpu, pEngstate) kperfStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define kperfStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define kperfStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define kperfStatePreInitUnlocked(pGpu, pEngstate) kperfStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kperfStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kperfStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define kperfStateInitUnlocked(pGpu, pEngstate) kperfStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kperfStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kperfStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define kperfStatePreLoad(pGpu, pEngstate, arg3) kperfStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kperfStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define kperfStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostLoad__ #define kperfStatePostLoad(pGpu, pEngstate, arg3) kperfStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kperfStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kperfStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define kperfStatePreUnload(pGpu, pEngstate, arg3) kperfStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kperfStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kperfStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define kperfStatePostUnload(pGpu, pEngstate, arg3) kperfStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kperfIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define kperfIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define kperfIsPresent(pGpu, pEngstate) kperfIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS kperfConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf, ENGDESCRIPTOR engDesc) { - return pKernelPerf->__kperfConstructEngine__(pGpu, pKernelPerf, engDesc); + return pKernelPerf->__nvoc_vtable->__kperfConstructEngine__(pGpu, pKernelPerf, engDesc); } static inline NV_STATUS kperfStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf) { - return pKernelPerf->__kperfStateInitLocked__(pGpu, pKernelPerf); + return pKernelPerf->__nvoc_vtable->__kperfStateInitLocked__(pGpu, pKernelPerf); } static inline NV_STATUS kperfStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf, NvU32 flags) { - return pKernelPerf->__kperfStateLoad__(pGpu, pKernelPerf, flags); + return pKernelPerf->__nvoc_vtable->__kperfStateLoad__(pGpu, pKernelPerf, flags); } static inline NV_STATUS kperfStateUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf, NvU32 flags) { - return pKernelPerf->__kperfStateUnload__(pGpu, pKernelPerf, flags); + return pKernelPerf->__nvoc_vtable->__kperfStateUnload__(pGpu, pKernelPerf, flags); } static inline void kperfStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf) { - pKernelPerf->__kperfStateDestroy__(pGpu, pKernelPerf); + pKernelPerf->__nvoc_vtable->__kperfStateDestroy__(pGpu, pKernelPerf); } static inline NV_STATUS kperfGpuBoostSyncStateInit_DISPATCH(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf) { @@ -207,39 +219,39 @@ static inline NV_STATUS kperfGpuBoostSyncStateInit_DISPATCH(struct OBJGPU *pGpu, } static inline void kperfInitMissing_DISPATCH(struct OBJGPU *pGpu, struct KernelPerf *pEngstate) { - pEngstate->__kperfInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kperfInitMissing__(pGpu, pEngstate); } static inline NV_STATUS kperfStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelPerf *pEngstate) { - return pEngstate->__kperfStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kperfStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS kperfStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelPerf *pEngstate) { - return pEngstate->__kperfStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kperfStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kperfStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelPerf *pEngstate) { - return pEngstate->__kperfStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kperfStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kperfStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelPerf *pEngstate, NvU32 arg3) { - return pEngstate->__kperfStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kperfStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kperfStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelPerf *pEngstate, NvU32 arg3) { - return pEngstate->__kperfStatePostLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kperfStatePostLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kperfStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelPerf *pEngstate, NvU32 arg3) { - return pEngstate->__kperfStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kperfStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS kperfStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelPerf *pEngstate, NvU32 arg3) { - return pEngstate->__kperfStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kperfStatePostUnload__(pGpu, pEngstate, arg3); } static inline NvBool kperfIsPresent_DISPATCH(struct OBJGPU *pGpu, struct KernelPerf *pEngstate) { - return pEngstate->__kperfIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kperfIsPresent__(pGpu, pEngstate); } NV_STATUS kperfConstructEngine_IMPL(struct OBJGPU *pGpu, struct KernelPerf *pKernelPerf, ENGDESCRIPTOR engDesc); diff --git a/src/nvidia/generated/g_kern_perfbuffer_nvoc.c b/src/nvidia/generated/g_kern_perfbuffer_nvoc.c index 158275682d..c3cf9db4b3 100644 --- a/src/nvidia/generated/g_kern_perfbuffer_nvoc.c +++ b/src/nvidia/generated/g_kern_perfbuffer_nvoc.c @@ -93,130 +93,198 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_PerfBuffer = /*pExportInfo=*/ &__nvoc_export_info_PerfBuffer }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferControl(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferMap(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferUnmap(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_perfbufferShareCallback(struct PerfBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferGetRegBaseOffsetAndSize(struct PerfBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferGetMapAddrSpace(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferInternalControlForward(struct PerfBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_perfbufferGetInternalObjectHandle(struct PerfBuffer *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_perfbufferAccessCallback(struct PerfBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_perfbufferGetMemInterMapParams(struct PerfBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_perfbufferCheckMemInterUnmap(struct PerfBuffer *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_perfbufferGetMemoryMappingDescriptor(struct PerfBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_perfbufferControlSerialization_Prologue(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_perfbufferControlSerialization_Epilogue(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_perfbufferControl_Prologue(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_perfbufferControl_Epilogue(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_perfbufferCanCopy(struct PerfBuffer *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_perfbufferIsDuplicate(struct PerfBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_perfbufferPreDestruct(struct PerfBuffer *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_perfbufferControlFilter(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_perfbufferIsPartialUnmapSupported(struct PerfBuffer *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_perfbufferMapTo(struct PerfBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_perfbufferUnmapFrom(struct PerfBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_perfbufferGetRefCount(struct PerfBuffer *pResource); // this +void __nvoc_up_thunk_RsResource_perfbufferAddAdditionalDependants(struct RsClient *pClient, struct PerfBuffer *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in PerfBuffer to superclasses // perfbufferControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferControl(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferControl(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset), pCallContext, pParams); } // perfbufferMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferMap(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferMap(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // perfbufferUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferUnmap(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferUnmap(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset), pCallContext, pCpuMapping); } // perfbufferShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_perfbufferShareCallback(struct PerfBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_perfbufferShareCallback(struct PerfBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // perfbufferGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferGetRegBaseOffsetAndSize(struct PerfBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferGetRegBaseOffsetAndSize(struct PerfBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset), pGpu, pOffset, pSize); } // perfbufferGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferGetMapAddrSpace(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferGetMapAddrSpace(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // perfbufferInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferInternalControlForward(struct PerfBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_perfbufferInternalControlForward(struct PerfBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset), command, pParams, size); } // perfbufferGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_perfbufferGetInternalObjectHandle(struct PerfBuffer *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_perfbufferGetInternalObjectHandle(struct PerfBuffer *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_PerfBuffer_GpuResource.offset)); } // perfbufferAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_perfbufferAccessCallback(struct PerfBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_perfbufferAccessCallback(struct PerfBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // perfbufferGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_perfbufferGetMemInterMapParams(struct PerfBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_perfbufferGetMemInterMapParams(struct PerfBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), pParams); } // perfbufferCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_perfbufferCheckMemInterUnmap(struct PerfBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_perfbufferCheckMemInterUnmap(struct PerfBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), bSubdeviceHandleProvided); } // perfbufferGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_perfbufferGetMemoryMappingDescriptor(struct PerfBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_perfbufferGetMemoryMappingDescriptor(struct PerfBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), ppMemDesc); } // perfbufferControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_perfbufferControlSerialization_Prologue(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_perfbufferControlSerialization_Prologue(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), pCallContext, pParams); } // perfbufferControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_perfbufferControlSerialization_Epilogue(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_perfbufferControlSerialization_Epilogue(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), pCallContext, pParams); } // perfbufferControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_perfbufferControl_Prologue(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_perfbufferControl_Prologue(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), pCallContext, pParams); } // perfbufferControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_perfbufferControl_Epilogue(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_perfbufferControl_Epilogue(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RmResource.offset), pCallContext, pParams); } // perfbufferCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_perfbufferCanCopy(struct PerfBuffer *pResource) { +NvBool __nvoc_up_thunk_RsResource_perfbufferCanCopy(struct PerfBuffer *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset)); } // perfbufferIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_perfbufferIsDuplicate(struct PerfBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_perfbufferIsDuplicate(struct PerfBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset), hMemory, pDuplicate); } // perfbufferPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_perfbufferPreDestruct(struct PerfBuffer *pResource) { +void __nvoc_up_thunk_RsResource_perfbufferPreDestruct(struct PerfBuffer *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset)); } // perfbufferControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_perfbufferControlFilter(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_perfbufferControlFilter(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset), pCallContext, pParams); } // perfbufferIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_perfbufferIsPartialUnmapSupported(struct PerfBuffer *pResource) { +NvBool __nvoc_up_thunk_RsResource_perfbufferIsPartialUnmapSupported(struct PerfBuffer *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset)); } // perfbufferMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_perfbufferMapTo(struct PerfBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_perfbufferMapTo(struct PerfBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset), pParams); } // perfbufferUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_perfbufferUnmapFrom(struct PerfBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_perfbufferUnmapFrom(struct PerfBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset), pParams); } // perfbufferGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_perfbufferGetRefCount(struct PerfBuffer *pResource) { +NvU32 __nvoc_up_thunk_RsResource_perfbufferGetRefCount(struct PerfBuffer *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset)); } // perfbufferAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_perfbufferAddAdditionalDependants(struct RsClient *pClient, struct PerfBuffer *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_perfbufferAddAdditionalDependants(struct RsClient *pClient, struct PerfBuffer *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PerfBuffer_RsResource.offset), pReference); } @@ -280,88 +348,112 @@ static void __nvoc_init_funcTable_PerfBuffer_1(PerfBuffer *pThis, RmHalspecOwner { pThis->__perfbufferConstructHal__ = &perfbufferConstructHal_KERNEL; } - - // perfbufferControl -- virtual inherited (gpures) base (gpures) - pThis->__perfbufferControl__ = &__nvoc_up_thunk_GpuResource_perfbufferControl; - - // perfbufferMap -- virtual inherited (gpures) base (gpures) - pThis->__perfbufferMap__ = &__nvoc_up_thunk_GpuResource_perfbufferMap; - - // perfbufferUnmap -- virtual inherited (gpures) base (gpures) - pThis->__perfbufferUnmap__ = &__nvoc_up_thunk_GpuResource_perfbufferUnmap; - - // perfbufferShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__perfbufferShareCallback__ = &__nvoc_up_thunk_GpuResource_perfbufferShareCallback; - - // perfbufferGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__perfbufferGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_perfbufferGetRegBaseOffsetAndSize; - - // perfbufferGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__perfbufferGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_perfbufferGetMapAddrSpace; - - // perfbufferInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__perfbufferInternalControlForward__ = &__nvoc_up_thunk_GpuResource_perfbufferInternalControlForward; - - // perfbufferGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__perfbufferGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_perfbufferGetInternalObjectHandle; - - // perfbufferAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__perfbufferAccessCallback__ = &__nvoc_up_thunk_RmResource_perfbufferAccessCallback; - - // perfbufferGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__perfbufferGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_perfbufferGetMemInterMapParams; - - // perfbufferCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__perfbufferCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_perfbufferCheckMemInterUnmap; - - // perfbufferGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__perfbufferGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_perfbufferGetMemoryMappingDescriptor; - - // perfbufferControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__perfbufferControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_perfbufferControlSerialization_Prologue; - - // perfbufferControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__perfbufferControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_perfbufferControlSerialization_Epilogue; - - // perfbufferControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__perfbufferControl_Prologue__ = &__nvoc_up_thunk_RmResource_perfbufferControl_Prologue; - - // perfbufferControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__perfbufferControl_Epilogue__ = &__nvoc_up_thunk_RmResource_perfbufferControl_Epilogue; - - // perfbufferCanCopy -- virtual inherited (res) base (gpures) - pThis->__perfbufferCanCopy__ = &__nvoc_up_thunk_RsResource_perfbufferCanCopy; - - // perfbufferIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__perfbufferIsDuplicate__ = &__nvoc_up_thunk_RsResource_perfbufferIsDuplicate; - - // perfbufferPreDestruct -- virtual inherited (res) base (gpures) - pThis->__perfbufferPreDestruct__ = &__nvoc_up_thunk_RsResource_perfbufferPreDestruct; - - // perfbufferControlFilter -- virtual inherited (res) base (gpures) - pThis->__perfbufferControlFilter__ = &__nvoc_up_thunk_RsResource_perfbufferControlFilter; - - // perfbufferIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__perfbufferIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_perfbufferIsPartialUnmapSupported; - - // perfbufferMapTo -- virtual inherited (res) base (gpures) - pThis->__perfbufferMapTo__ = &__nvoc_up_thunk_RsResource_perfbufferMapTo; - - // perfbufferUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__perfbufferUnmapFrom__ = &__nvoc_up_thunk_RsResource_perfbufferUnmapFrom; - - // perfbufferGetRefCount -- virtual inherited (res) base (gpures) - pThis->__perfbufferGetRefCount__ = &__nvoc_up_thunk_RsResource_perfbufferGetRefCount; - - // perfbufferAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__perfbufferAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_perfbufferAddAdditionalDependants; -} // End __nvoc_init_funcTable_PerfBuffer_1 with approximately 27 basic block(s). +} // End __nvoc_init_funcTable_PerfBuffer_1 with approximately 2 basic block(s). // Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_PerfBuffer(PerfBuffer *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 26 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__PerfBuffer vtable = { + .__perfbufferControl__ = &__nvoc_up_thunk_GpuResource_perfbufferControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__perfbufferMap__ = &__nvoc_up_thunk_GpuResource_perfbufferMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__perfbufferUnmap__ = &__nvoc_up_thunk_GpuResource_perfbufferUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__perfbufferShareCallback__ = &__nvoc_up_thunk_GpuResource_perfbufferShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__perfbufferGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_perfbufferGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__perfbufferGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_perfbufferGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__perfbufferInternalControlForward__ = &__nvoc_up_thunk_GpuResource_perfbufferInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__perfbufferGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_perfbufferGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__perfbufferAccessCallback__ = &__nvoc_up_thunk_RmResource_perfbufferAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__perfbufferGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_perfbufferGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__perfbufferCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_perfbufferCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__perfbufferGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_perfbufferGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__perfbufferControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_perfbufferControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__perfbufferControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_perfbufferControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__perfbufferControl_Prologue__ = &__nvoc_up_thunk_RmResource_perfbufferControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__perfbufferControl_Epilogue__ = &__nvoc_up_thunk_RmResource_perfbufferControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__perfbufferCanCopy__ = &__nvoc_up_thunk_RsResource_perfbufferCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__perfbufferIsDuplicate__ = &__nvoc_up_thunk_RsResource_perfbufferIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__perfbufferPreDestruct__ = &__nvoc_up_thunk_RsResource_perfbufferPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__perfbufferControlFilter__ = &__nvoc_up_thunk_RsResource_perfbufferControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__perfbufferIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_perfbufferIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__perfbufferMapTo__ = &__nvoc_up_thunk_RsResource_perfbufferMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__perfbufferUnmapFrom__ = &__nvoc_up_thunk_RsResource_perfbufferUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__perfbufferGetRefCount__ = &__nvoc_up_thunk_RsResource_perfbufferGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__perfbufferAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_perfbufferAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (perfbuffer) this + + // Initialize vtable(s) with 1 per-object function pointer(s). __nvoc_init_funcTable_PerfBuffer_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kern_perfbuffer_nvoc.h b/src/nvidia/generated/g_kern_perfbuffer_nvoc.h index 1fbb87c763..4928e34d6f 100644 --- a/src/nvidia/generated/g_kern_perfbuffer_nvoc.h +++ b/src/nvidia/generated/g_kern_perfbuffer_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -60,10 +60,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__PerfBuffer; + + struct PerfBuffer { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__PerfBuffer *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -76,8 +81,18 @@ struct PerfBuffer { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct PerfBuffer *__nvoc_pbase_PerfBuffer; // perfbuffer - // Vtable with 26 per-object function pointers + // Vtable with 1 per-object function pointer NV_STATUS (*__perfbufferConstructHal__)(struct PerfBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); // halified (2 hals) body + + // Data members + void *pObject; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__PerfBuffer { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + NV_STATUS (*__perfbufferControl__)(struct PerfBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__perfbufferMap__)(struct PerfBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__perfbufferUnmap__)(struct PerfBuffer * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -103,9 +118,6 @@ struct PerfBuffer { NV_STATUS (*__perfbufferUnmapFrom__)(struct PerfBuffer * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__perfbufferGetRefCount__)(struct PerfBuffer * /*this*/); // virtual inherited (res) base (gpures) void (*__perfbufferAddAdditionalDependants__)(struct RsClient *, struct PerfBuffer * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - void *pObject; }; #ifndef __NVOC_CLASS_PerfBuffer_TYPEDEF__ @@ -141,55 +153,55 @@ NV_STATUS __nvoc_objCreate_PerfBuffer(PerfBuffer**, Dynamic*, NvU32, struct CALL #define perfbufferConstructHal_FNPTR(pResource) pResource->__perfbufferConstructHal__ #define perfbufferConstructHal(pResource, pCallContext, pParams) perfbufferConstructHal_DISPATCH(pResource, pCallContext, pParams) #define perfbufferConstructHal_HAL(pResource, pCallContext, pParams) perfbufferConstructHal_DISPATCH(pResource, pCallContext, pParams) -#define perfbufferControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define perfbufferControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define perfbufferControl(pGpuResource, pCallContext, pParams) perfbufferControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define perfbufferMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define perfbufferMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define perfbufferMap(pGpuResource, pCallContext, pParams, pCpuMapping) perfbufferMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define perfbufferUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define perfbufferUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define perfbufferUnmap(pGpuResource, pCallContext, pCpuMapping) perfbufferUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define perfbufferShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define perfbufferShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define perfbufferShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) perfbufferShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define perfbufferGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define perfbufferGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define perfbufferGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) perfbufferGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define perfbufferGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define perfbufferGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define perfbufferGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) perfbufferGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define perfbufferInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define perfbufferInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define perfbufferInternalControlForward(pGpuResource, command, pParams, size) perfbufferInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define perfbufferGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define perfbufferGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define perfbufferGetInternalObjectHandle(pGpuResource) perfbufferGetInternalObjectHandle_DISPATCH(pGpuResource) -#define perfbufferAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define perfbufferAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define perfbufferAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) perfbufferAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define perfbufferGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define perfbufferGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define perfbufferGetMemInterMapParams(pRmResource, pParams) perfbufferGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define perfbufferCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define perfbufferCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define perfbufferCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) perfbufferCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define perfbufferGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define perfbufferGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define perfbufferGetMemoryMappingDescriptor(pRmResource, ppMemDesc) perfbufferGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define perfbufferControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define perfbufferControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define perfbufferControlSerialization_Prologue(pResource, pCallContext, pParams) perfbufferControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define perfbufferControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define perfbufferControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define perfbufferControlSerialization_Epilogue(pResource, pCallContext, pParams) perfbufferControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define perfbufferControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define perfbufferControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define perfbufferControl_Prologue(pResource, pCallContext, pParams) perfbufferControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define perfbufferControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define perfbufferControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define perfbufferControl_Epilogue(pResource, pCallContext, pParams) perfbufferControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define perfbufferCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define perfbufferCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define perfbufferCanCopy(pResource) perfbufferCanCopy_DISPATCH(pResource) -#define perfbufferIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define perfbufferIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define perfbufferIsDuplicate(pResource, hMemory, pDuplicate) perfbufferIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define perfbufferPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define perfbufferPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define perfbufferPreDestruct(pResource) perfbufferPreDestruct_DISPATCH(pResource) -#define perfbufferControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define perfbufferControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define perfbufferControlFilter(pResource, pCallContext, pParams) perfbufferControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define perfbufferIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define perfbufferIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define perfbufferIsPartialUnmapSupported(pResource) perfbufferIsPartialUnmapSupported_DISPATCH(pResource) -#define perfbufferMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define perfbufferMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define perfbufferMapTo(pResource, pParams) perfbufferMapTo_DISPATCH(pResource, pParams) -#define perfbufferUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define perfbufferUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define perfbufferUnmapFrom(pResource, pParams) perfbufferUnmapFrom_DISPATCH(pResource, pParams) -#define perfbufferGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define perfbufferGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define perfbufferGetRefCount(pResource) perfbufferGetRefCount_DISPATCH(pResource) -#define perfbufferAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define perfbufferAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define perfbufferAddAdditionalDependants(pClient, pResource, pReference) perfbufferAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions @@ -198,103 +210,103 @@ static inline NV_STATUS perfbufferConstructHal_DISPATCH(struct PerfBuffer *pReso } static inline NV_STATUS perfbufferControl_DISPATCH(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__perfbufferControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__perfbufferControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS perfbufferMap_DISPATCH(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__perfbufferMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__perfbufferMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS perfbufferUnmap_DISPATCH(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__perfbufferUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__perfbufferUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool perfbufferShareCallback_DISPATCH(struct PerfBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__perfbufferShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__perfbufferShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS perfbufferGetRegBaseOffsetAndSize_DISPATCH(struct PerfBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__perfbufferGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__perfbufferGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS perfbufferGetMapAddrSpace_DISPATCH(struct PerfBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__perfbufferGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__perfbufferGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS perfbufferInternalControlForward_DISPATCH(struct PerfBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__perfbufferInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__perfbufferInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle perfbufferGetInternalObjectHandle_DISPATCH(struct PerfBuffer *pGpuResource) { - return pGpuResource->__perfbufferGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__perfbufferGetInternalObjectHandle__(pGpuResource); } static inline NvBool perfbufferAccessCallback_DISPATCH(struct PerfBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__perfbufferAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__perfbufferAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS perfbufferGetMemInterMapParams_DISPATCH(struct PerfBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__perfbufferGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__perfbufferGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS perfbufferCheckMemInterUnmap_DISPATCH(struct PerfBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__perfbufferCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__perfbufferCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS perfbufferGetMemoryMappingDescriptor_DISPATCH(struct PerfBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__perfbufferGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__perfbufferGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS perfbufferControlSerialization_Prologue_DISPATCH(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__perfbufferControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__perfbufferControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void perfbufferControlSerialization_Epilogue_DISPATCH(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__perfbufferControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__perfbufferControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS perfbufferControl_Prologue_DISPATCH(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__perfbufferControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__perfbufferControl_Prologue__(pResource, pCallContext, pParams); } static inline void perfbufferControl_Epilogue_DISPATCH(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__perfbufferControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__perfbufferControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool perfbufferCanCopy_DISPATCH(struct PerfBuffer *pResource) { - return pResource->__perfbufferCanCopy__(pResource); + return pResource->__nvoc_vtable->__perfbufferCanCopy__(pResource); } static inline NV_STATUS perfbufferIsDuplicate_DISPATCH(struct PerfBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__perfbufferIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__perfbufferIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void perfbufferPreDestruct_DISPATCH(struct PerfBuffer *pResource) { - pResource->__perfbufferPreDestruct__(pResource); + pResource->__nvoc_vtable->__perfbufferPreDestruct__(pResource); } static inline NV_STATUS perfbufferControlFilter_DISPATCH(struct PerfBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__perfbufferControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__perfbufferControlFilter__(pResource, pCallContext, pParams); } static inline NvBool perfbufferIsPartialUnmapSupported_DISPATCH(struct PerfBuffer *pResource) { - return pResource->__perfbufferIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__perfbufferIsPartialUnmapSupported__(pResource); } static inline NV_STATUS perfbufferMapTo_DISPATCH(struct PerfBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__perfbufferMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__perfbufferMapTo__(pResource, pParams); } static inline NV_STATUS perfbufferUnmapFrom_DISPATCH(struct PerfBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__perfbufferUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__perfbufferUnmapFrom__(pResource, pParams); } static inline NvU32 perfbufferGetRefCount_DISPATCH(struct PerfBuffer *pResource) { - return pResource->__perfbufferGetRefCount__(pResource); + return pResource->__nvoc_vtable->__perfbufferGetRefCount__(pResource); } static inline void perfbufferAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct PerfBuffer *pResource, RsResourceRef *pReference) { - pResource->__perfbufferAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__perfbufferAddAdditionalDependants__(pClient, pResource, pReference); } static inline void perfbufferDestruct_b3696a(struct PerfBuffer *pResource) { diff --git a/src/nvidia/generated/g_kern_pmu_nvoc.c b/src/nvidia/generated/g_kern_pmu_nvoc.c index f31be50d82..1a284ba972 100644 --- a/src/nvidia/generated/g_kern_pmu_nvoc.c +++ b/src/nvidia/generated/g_kern_pmu_nvoc.c @@ -66,78 +66,96 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelPmu = /*pExportInfo=*/ &__nvoc_export_info_KernelPmu }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_KernelPmu_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPmu, ENGDESCRIPTOR engDesc); // this +void __nvoc_down_thunk_KernelPmu_engstateStateDestroy(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPmu); // this +NV_STATUS __nvoc_down_thunk_KernelPmu_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPmu); // this + // 3 down-thunk(s) defined to bridge methods in KernelPmu from superclasses // kpmuConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelPmu_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPmu, ENGDESCRIPTOR engDesc) { +NV_STATUS __nvoc_down_thunk_KernelPmu_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPmu, ENGDESCRIPTOR engDesc) { return kpmuConstructEngine(pGpu, (struct KernelPmu *)(((unsigned char *) pKernelPmu) - __nvoc_rtti_KernelPmu_OBJENGSTATE.offset), engDesc); } // kpmuStateDestroy: virtual override (engstate) base (engstate) -static void __nvoc_down_thunk_KernelPmu_engstateStateDestroy(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPmu) { +void __nvoc_down_thunk_KernelPmu_engstateStateDestroy(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPmu) { kpmuStateDestroy(pGpu, (struct KernelPmu *)(((unsigned char *) pKernelPmu) - __nvoc_rtti_KernelPmu_OBJENGSTATE.offset)); } // kpmuStateInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelPmu_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPmu) { +NV_STATUS __nvoc_down_thunk_KernelPmu_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelPmu) { return kpmuStateInitLocked(pGpu, (struct KernelPmu *)(((unsigned char *) pKernelPmu) - __nvoc_rtti_KernelPmu_OBJENGSTATE.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_kpmuInitMissing(struct OBJGPU *pGpu, struct KernelPmu *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePreInitLocked(struct OBJGPU *pGpu, struct KernelPmu *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelPmu *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStateInitUnlocked(struct OBJGPU *pGpu, struct KernelPmu *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePreLoad(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStateLoad(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePostLoad(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePreUnload(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStateUnload(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePostUnload(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_kpmuIsPresent(struct OBJGPU *pGpu, struct KernelPmu *pEngstate); // this + // 11 up-thunk(s) defined to bridge methods in KernelPmu to superclasses // kpmuInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kpmuInitMissing(struct OBJGPU *pGpu, struct KernelPmu *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kpmuInitMissing(struct OBJGPU *pGpu, struct KernelPmu *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset)); } // kpmuStatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePreInitLocked(struct OBJGPU *pGpu, struct KernelPmu *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePreInitLocked(struct OBJGPU *pGpu, struct KernelPmu *pEngstate) { return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset)); } // kpmuStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelPmu *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelPmu *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset)); } // kpmuStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStateInitUnlocked(struct OBJGPU *pGpu, struct KernelPmu *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStateInitUnlocked(struct OBJGPU *pGpu, struct KernelPmu *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset)); } // kpmuStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePreLoad(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePreLoad(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset), arg3); } // kpmuStateLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStateLoad(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStateLoad(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset), arg3); } // kpmuStatePostLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePostLoad(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePostLoad(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset), arg3); } // kpmuStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePreUnload(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePreUnload(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset), arg3); } // kpmuStateUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStateUnload(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStateUnload(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset), arg3); } // kpmuStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePostUnload(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kpmuStatePostUnload(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset), arg3); } // kpmuIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_kpmuIsPresent(struct OBJGPU *pGpu, struct KernelPmu *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_kpmuIsPresent(struct OBJGPU *pGpu, struct KernelPmu *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelPmu_OBJENGSTATE.offset)); } @@ -187,68 +205,59 @@ static void __nvoc_init_funcTable_KernelPmu_1(KernelPmu *pThis, RmHalspecOwner * PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); - // kpmuConstructEngine -- virtual override (engstate) base (engstate) - pThis->__kpmuConstructEngine__ = &kpmuConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelPmu_engstateConstructEngine; - - // kpmuStateDestroy -- virtual override (engstate) base (engstate) - pThis->__kpmuStateDestroy__ = &kpmuStateDestroy_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelPmu_engstateStateDestroy; - - // kpmuStateInitLocked -- virtual override (engstate) base (engstate) - pThis->__kpmuStateInitLocked__ = &kpmuStateInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelPmu_engstateStateInitLocked; - // kpmuGetIsSelfInit -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ { - pThis->__kpmuGetIsSelfInit__ = &kpmuGetIsSelfInit_cbe027; + pThis->__kpmuGetIsSelfInit__ = &kpmuGetIsSelfInit_88bc07; } // default else { - pThis->__kpmuGetIsSelfInit__ = &kpmuGetIsSelfInit_491d52; + pThis->__kpmuGetIsSelfInit__ = &kpmuGetIsSelfInit_3dd2c9; } - - // kpmuInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__kpmuInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuInitMissing; - - // kpmuStatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__kpmuStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStatePreInitLocked; - - // kpmuStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kpmuStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStatePreInitUnlocked; - - // kpmuStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kpmuStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStateInitUnlocked; - - // kpmuStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__kpmuStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStatePreLoad; - - // kpmuStateLoad -- virtual inherited (engstate) base (engstate) - pThis->__kpmuStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStateLoad; - - // kpmuStatePostLoad -- virtual inherited (engstate) base (engstate) - pThis->__kpmuStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStatePostLoad; - - // kpmuStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__kpmuStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStatePreUnload; - - // kpmuStateUnload -- virtual inherited (engstate) base (engstate) - pThis->__kpmuStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStateUnload; - - // kpmuStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__kpmuStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStatePostUnload; - - // kpmuIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__kpmuIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuIsPresent; -} // End __nvoc_init_funcTable_KernelPmu_1 with approximately 19 basic block(s). +} // End __nvoc_init_funcTable_KernelPmu_1 with approximately 2 basic block(s). // Initialize vtable(s) for 15 virtual method(s). void __nvoc_init_funcTable_KernelPmu(KernelPmu *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 15 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelPmu vtable = { + .__kpmuConstructEngine__ = &kpmuConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelPmu_engstateConstructEngine, // virtual + .__kpmuStateDestroy__ = &kpmuStateDestroy_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelPmu_engstateStateDestroy, // virtual + .__kpmuStateInitLocked__ = &kpmuStateInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelPmu_engstateStateInitLocked, // virtual + .__kpmuInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__kpmuStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStatePreInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__kpmuStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__kpmuStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__kpmuStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__kpmuStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStateLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &engstateStateLoad_IMPL, // virtual + .__kpmuStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStatePostLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL, // virtual + .__kpmuStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__kpmuStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStateUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &engstateStateUnload_IMPL, // virtual + .__kpmuStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__kpmuIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kpmuIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_vtable = &vtable; // (kpmu) this + + // Initialize vtable(s) with 1 per-object function pointer(s). __nvoc_init_funcTable_KernelPmu_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kern_pmu_nvoc.h b/src/nvidia/generated/g_kern_pmu_nvoc.h index 161df771d2..6e00fa44f5 100644 --- a/src/nvidia/generated/g_kern_pmu_nvoc.h +++ b/src/nvidia/generated/g_kern_pmu_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -83,10 +83,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelPmu; + + struct KernelPmu { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelPmu *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -96,11 +101,25 @@ struct KernelPmu { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct KernelPmu *__nvoc_pbase_KernelPmu; // kpmu - // Vtable with 15 per-object function pointers + // Vtable with 1 per-object function pointer + NvBool (*__kpmuGetIsSelfInit__)(struct KernelPmu * /*this*/); // halified (2 hals) body + + // Data members + LIBOS_LOG_DECODE logDecode; + NvU32 printBufSize; + NvU8 *pPrintBuf; + void *pLogElf; + NvU32 logElfSize; +}; + + +// Metadata including vtable with 14 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelPmu { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + NV_STATUS (*__kpmuConstructEngine__)(struct OBJGPU *, struct KernelPmu * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) void (*__kpmuStateDestroy__)(struct OBJGPU *, struct KernelPmu * /*this*/); // virtual override (engstate) base (engstate) NV_STATUS (*__kpmuStateInitLocked__)(struct OBJGPU *, struct KernelPmu * /*this*/); // virtual override (engstate) base (engstate) - NvBool (*__kpmuGetIsSelfInit__)(struct KernelPmu * /*this*/); // halified (2 hals) body void (*__kpmuInitMissing__)(struct OBJGPU *, struct KernelPmu * /*this*/); // virtual inherited (engstate) base (engstate) NV_STATUS (*__kpmuStatePreInitLocked__)(struct OBJGPU *, struct KernelPmu * /*this*/); // virtual inherited (engstate) base (engstate) NV_STATUS (*__kpmuStatePreInitUnlocked__)(struct OBJGPU *, struct KernelPmu * /*this*/); // virtual inherited (engstate) base (engstate) @@ -112,13 +131,6 @@ struct KernelPmu { NV_STATUS (*__kpmuStateUnload__)(struct OBJGPU *, struct KernelPmu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) NV_STATUS (*__kpmuStatePostUnload__)(struct OBJGPU *, struct KernelPmu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) NvBool (*__kpmuIsPresent__)(struct OBJGPU *, struct KernelPmu * /*this*/); // virtual inherited (engstate) base (engstate) - - // Data members - LIBOS_LOG_DECODE logDecode; - NvU32 printBufSize; - NvU8 *pPrintBuf; - void *pLogElf; - NvU32 logElfSize; }; #ifndef __NVOC_CLASS_KernelPmu_TYPEDEF__ @@ -155,49 +167,49 @@ NV_STATUS __nvoc_objCreate_KernelPmu(KernelPmu**, Dynamic*, NvU32); // Wrapper macros -#define kpmuConstructEngine_FNPTR(pKernelPmu) pKernelPmu->__kpmuConstructEngine__ +#define kpmuConstructEngine_FNPTR(pKernelPmu) pKernelPmu->__nvoc_vtable->__kpmuConstructEngine__ #define kpmuConstructEngine(pGpu, pKernelPmu, engDesc) kpmuConstructEngine_DISPATCH(pGpu, pKernelPmu, engDesc) -#define kpmuStateDestroy_FNPTR(pKernelPmu) pKernelPmu->__kpmuStateDestroy__ +#define kpmuStateDestroy_FNPTR(pKernelPmu) pKernelPmu->__nvoc_vtable->__kpmuStateDestroy__ #define kpmuStateDestroy(pGpu, pKernelPmu) kpmuStateDestroy_DISPATCH(pGpu, pKernelPmu) -#define kpmuStateInitLocked_FNPTR(pKernelPmu) pKernelPmu->__kpmuStateInitLocked__ +#define kpmuStateInitLocked_FNPTR(pKernelPmu) pKernelPmu->__nvoc_vtable->__kpmuStateInitLocked__ #define kpmuStateInitLocked(pGpu, pKernelPmu) kpmuStateInitLocked_DISPATCH(pGpu, pKernelPmu) #define kpmuGetIsSelfInit_FNPTR(pKernelPmu) pKernelPmu->__kpmuGetIsSelfInit__ #define kpmuGetIsSelfInit(pKernelPmu) kpmuGetIsSelfInit_DISPATCH(pKernelPmu) #define kpmuGetIsSelfInit_HAL(pKernelPmu) kpmuGetIsSelfInit_DISPATCH(pKernelPmu) -#define kpmuInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define kpmuInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define kpmuInitMissing(pGpu, pEngstate) kpmuInitMissing_DISPATCH(pGpu, pEngstate) -#define kpmuStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define kpmuStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define kpmuStatePreInitLocked(pGpu, pEngstate) kpmuStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define kpmuStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define kpmuStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define kpmuStatePreInitUnlocked(pGpu, pEngstate) kpmuStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kpmuStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kpmuStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define kpmuStateInitUnlocked(pGpu, pEngstate) kpmuStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kpmuStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kpmuStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define kpmuStatePreLoad(pGpu, pEngstate, arg3) kpmuStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kpmuStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define kpmuStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateLoad__ #define kpmuStateLoad(pGpu, pEngstate, arg3) kpmuStateLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kpmuStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define kpmuStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostLoad__ #define kpmuStatePostLoad(pGpu, pEngstate, arg3) kpmuStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kpmuStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kpmuStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define kpmuStatePreUnload(pGpu, pEngstate, arg3) kpmuStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kpmuStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define kpmuStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateUnload__ #define kpmuStateUnload(pGpu, pEngstate, arg3) kpmuStateUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kpmuStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kpmuStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define kpmuStatePostUnload(pGpu, pEngstate, arg3) kpmuStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kpmuIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define kpmuIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define kpmuIsPresent(pGpu, pEngstate) kpmuIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS kpmuConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelPmu *pKernelPmu, ENGDESCRIPTOR engDesc) { - return pKernelPmu->__kpmuConstructEngine__(pGpu, pKernelPmu, engDesc); + return pKernelPmu->__nvoc_vtable->__kpmuConstructEngine__(pGpu, pKernelPmu, engDesc); } static inline void kpmuStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct KernelPmu *pKernelPmu) { - pKernelPmu->__kpmuStateDestroy__(pGpu, pKernelPmu); + pKernelPmu->__nvoc_vtable->__kpmuStateDestroy__(pGpu, pKernelPmu); } static inline NV_STATUS kpmuStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelPmu *pKernelPmu) { - return pKernelPmu->__kpmuStateInitLocked__(pGpu, pKernelPmu); + return pKernelPmu->__nvoc_vtable->__kpmuStateInitLocked__(pGpu, pKernelPmu); } static inline NvBool kpmuGetIsSelfInit_DISPATCH(struct KernelPmu *pKernelPmu) { @@ -205,47 +217,47 @@ static inline NvBool kpmuGetIsSelfInit_DISPATCH(struct KernelPmu *pKernelPmu) { } static inline void kpmuInitMissing_DISPATCH(struct OBJGPU *pGpu, struct KernelPmu *pEngstate) { - pEngstate->__kpmuInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kpmuInitMissing__(pGpu, pEngstate); } static inline NV_STATUS kpmuStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelPmu *pEngstate) { - return pEngstate->__kpmuStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kpmuStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS kpmuStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelPmu *pEngstate) { - return pEngstate->__kpmuStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kpmuStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kpmuStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelPmu *pEngstate) { - return pEngstate->__kpmuStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kpmuStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kpmuStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { - return pEngstate->__kpmuStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kpmuStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kpmuStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { - return pEngstate->__kpmuStateLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kpmuStateLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kpmuStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { - return pEngstate->__kpmuStatePostLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kpmuStatePostLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kpmuStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { - return pEngstate->__kpmuStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kpmuStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS kpmuStateUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { - return pEngstate->__kpmuStateUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kpmuStateUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS kpmuStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelPmu *pEngstate, NvU32 arg3) { - return pEngstate->__kpmuStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kpmuStatePostUnload__(pGpu, pEngstate, arg3); } static inline NvBool kpmuIsPresent_DISPATCH(struct OBJGPU *pGpu, struct KernelPmu *pEngstate) { - return pEngstate->__kpmuIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kpmuIsPresent__(pGpu, pEngstate); } NV_STATUS kpmuConstructEngine_IMPL(struct OBJGPU *pGpu, struct KernelPmu *pKernelPmu, ENGDESCRIPTOR engDesc); @@ -254,12 +266,12 @@ void kpmuStateDestroy_IMPL(struct OBJGPU *pGpu, struct KernelPmu *pKernelPmu); NV_STATUS kpmuStateInitLocked_IMPL(struct OBJGPU *pGpu, struct KernelPmu *pKernelPmu); -static inline NvBool kpmuGetIsSelfInit_cbe027(struct KernelPmu *pKernelPmu) { - return ((NvBool)(0 == 0)); +static inline NvBool kpmuGetIsSelfInit_88bc07(struct KernelPmu *pKernelPmu) { + return NV_TRUE; } -static inline NvBool kpmuGetIsSelfInit_491d52(struct KernelPmu *pKernelPmu) { - return ((NvBool)(0 != 0)); +static inline NvBool kpmuGetIsSelfInit_3dd2c9(struct KernelPmu *pKernelPmu) { + return NV_FALSE; } void kpmuDestruct_IMPL(struct KernelPmu *pKernelPmu); diff --git a/src/nvidia/generated/g_kernel_bif_nvoc.c b/src/nvidia/generated/g_kernel_bif_nvoc.c index deab411449..8402bf54a9 100644 --- a/src/nvidia/generated/g_kernel_bif_nvoc.c +++ b/src/nvidia/generated/g_kernel_bif_nvoc.c @@ -66,78 +66,96 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelBif = /*pExportInfo=*/ &__nvoc_export_info_KernelBif }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_KernelBif_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif, ENGDESCRIPTOR arg3); // this +NV_STATUS __nvoc_down_thunk_KernelBif_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif); // this +NV_STATUS __nvoc_down_thunk_KernelBif_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif, NvU32 arg3); // this +NV_STATUS __nvoc_down_thunk_KernelBif_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif, NvU32 arg3); // this +NV_STATUS __nvoc_down_thunk_KernelBif_engstateStateUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif, NvU32 arg3); // this + // 5 down-thunk(s) defined to bridge methods in KernelBif from superclasses // kbifConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelBif_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif, ENGDESCRIPTOR arg3) { +NV_STATUS __nvoc_down_thunk_KernelBif_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif, ENGDESCRIPTOR arg3) { return kbifConstructEngine(pGpu, (struct KernelBif *)(((unsigned char *) pKernelBif) - __nvoc_rtti_KernelBif_OBJENGSTATE.offset), arg3); } // kbifStateInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelBif_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif) { +NV_STATUS __nvoc_down_thunk_KernelBif_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif) { return kbifStateInitLocked(pGpu, (struct KernelBif *)(((unsigned char *) pKernelBif) - __nvoc_rtti_KernelBif_OBJENGSTATE.offset)); } // kbifStateLoad: virtual halified (singleton optimized) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_KernelBif_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_KernelBif_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif, NvU32 arg3) { return kbifStateLoad(pGpu, (struct KernelBif *)(((unsigned char *) pKernelBif) - __nvoc_rtti_KernelBif_OBJENGSTATE.offset), arg3); } // kbifStatePostLoad: virtual halified (2 hals) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_KernelBif_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_KernelBif_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif, NvU32 arg3) { return kbifStatePostLoad(pGpu, (struct KernelBif *)(((unsigned char *) pKernelBif) - __nvoc_rtti_KernelBif_OBJENGSTATE.offset), arg3); } // kbifStateUnload: virtual halified (singleton optimized) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_KernelBif_engstateStateUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_KernelBif_engstateStateUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelBif, NvU32 arg3) { return kbifStateUnload(pGpu, (struct KernelBif *)(((unsigned char *) pKernelBif) - __nvoc_rtti_KernelBif_OBJENGSTATE.offset), arg3); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_kbifInitMissing(struct OBJGPU *pGpu, struct KernelBif *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStatePreInitLocked(struct OBJGPU *pGpu, struct KernelBif *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelBif *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStateInitUnlocked(struct OBJGPU *pGpu, struct KernelBif *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStatePreLoad(struct OBJGPU *pGpu, struct KernelBif *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStatePreUnload(struct OBJGPU *pGpu, struct KernelBif *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStatePostUnload(struct OBJGPU *pGpu, struct KernelBif *pEngstate, NvU32 arg3); // this +void __nvoc_up_thunk_OBJENGSTATE_kbifStateDestroy(struct OBJGPU *pGpu, struct KernelBif *pEngstate); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_kbifIsPresent(struct OBJGPU *pGpu, struct KernelBif *pEngstate); // this + // 9 up-thunk(s) defined to bridge methods in KernelBif to superclasses // kbifInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kbifInitMissing(struct OBJGPU *pGpu, struct KernelBif *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kbifInitMissing(struct OBJGPU *pGpu, struct KernelBif *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset)); } // kbifStatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStatePreInitLocked(struct OBJGPU *pGpu, struct KernelBif *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStatePreInitLocked(struct OBJGPU *pGpu, struct KernelBif *pEngstate) { return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset)); } // kbifStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelBif *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelBif *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset)); } // kbifStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStateInitUnlocked(struct OBJGPU *pGpu, struct KernelBif *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStateInitUnlocked(struct OBJGPU *pGpu, struct KernelBif *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset)); } // kbifStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStatePreLoad(struct OBJGPU *pGpu, struct KernelBif *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStatePreLoad(struct OBJGPU *pGpu, struct KernelBif *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset), arg3); } // kbifStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStatePreUnload(struct OBJGPU *pGpu, struct KernelBif *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStatePreUnload(struct OBJGPU *pGpu, struct KernelBif *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset), arg3); } // kbifStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStatePostUnload(struct OBJGPU *pGpu, struct KernelBif *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kbifStatePostUnload(struct OBJGPU *pGpu, struct KernelBif *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset), arg3); } // kbifStateDestroy: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kbifStateDestroy(struct OBJGPU *pGpu, struct KernelBif *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kbifStateDestroy(struct OBJGPU *pGpu, struct KernelBif *pEngstate) { engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset)); } // kbifIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_kbifIsPresent(struct OBJGPU *pGpu, struct KernelBif *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_kbifIsPresent(struct OBJGPU *pGpu, struct KernelBif *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelBif_OBJENGSTATE.offset)); } @@ -170,87 +188,87 @@ void __nvoc_init_dataField_KernelBif(KernelBif *pThis, RmHalspecOwner *pRmhalspe // NVOC Property Hal field -- PDB_PROP_KBIF_CHECK_IF_GPU_EXISTS_DEF if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_KBIF_CHECK_IF_GPU_EXISTS_DEF, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KBIF_CHECK_IF_GPU_EXISTS_DEF, NV_TRUE); } // NVOC Property Hal field -- PDB_PROP_KBIF_IS_FMODEL_MSI_BROKEN if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ { - pThis->setProperty(pThis, PDB_PROP_KBIF_IS_FMODEL_MSI_BROKEN, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KBIF_IS_FMODEL_MSI_BROKEN, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_KBIF_IS_FMODEL_MSI_BROKEN, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KBIF_IS_FMODEL_MSI_BROKEN, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_KBIF_USE_CONFIG_SPACE_TO_REARM_MSI if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_KBIF_USE_CONFIG_SPACE_TO_REARM_MSI, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KBIF_USE_CONFIG_SPACE_TO_REARM_MSI, NV_FALSE); } // default else { - pThis->setProperty(pThis, PDB_PROP_KBIF_USE_CONFIG_SPACE_TO_REARM_MSI, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KBIF_USE_CONFIG_SPACE_TO_REARM_MSI, NV_TRUE); } // NVOC Property Hal field -- PDB_PROP_KBIF_ALLOW_REARM_MSI_FOR_VF // default { - pThis->setProperty(pThis, PDB_PROP_KBIF_ALLOW_REARM_MSI_FOR_VF, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KBIF_ALLOW_REARM_MSI_FOR_VF, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_KBIF_P2P_READS_DISABLED // default { - pThis->setProperty(pThis, PDB_PROP_KBIF_P2P_READS_DISABLED, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KBIF_P2P_READS_DISABLED, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_KBIF_P2P_WRITES_DISABLED // default { - pThis->setProperty(pThis, PDB_PROP_KBIF_P2P_WRITES_DISABLED, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KBIF_P2P_WRITES_DISABLED, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_KBIF_UPSTREAM_LTR_SUPPORT_WAR_BUG_200634944 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0fbe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_KBIF_UPSTREAM_LTR_SUPPORT_WAR_BUG_200634944, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KBIF_UPSTREAM_LTR_SUPPORT_WAR_BUG_200634944, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_KBIF_UPSTREAM_LTR_SUPPORT_WAR_BUG_200634944, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KBIF_UPSTREAM_LTR_SUPPORT_WAR_BUG_200634944, NV_FALSE); } - pThis->setProperty(pThis, PDB_PROP_KBIF_SUPPORT_NONCOHERENT, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KBIF_SUPPORT_NONCOHERENT, NV_TRUE); // NVOC Property Hal field -- PDB_PROP_KBIF_SECONDARY_BUS_RESET_ENABLED if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_KBIF_SECONDARY_BUS_RESET_ENABLED, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KBIF_SECONDARY_BUS_RESET_ENABLED, NV_TRUE); } // NVOC Property Hal field -- PDB_PROP_KBIF_FLR_PRE_CONDITIONING_REQUIRED if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { - pThis->setProperty(pThis, PDB_PROP_KBIF_FLR_PRE_CONDITIONING_REQUIRED, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KBIF_FLR_PRE_CONDITIONING_REQUIRED, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_KBIF_FLR_PRE_CONDITIONING_REQUIRED, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KBIF_FLR_PRE_CONDITIONING_REQUIRED, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_KBIF_FLR_HANDLED_BY_OS if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_KBIF_FLR_HANDLED_BY_OS, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KBIF_FLR_HANDLED_BY_OS, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_KBIF_FLR_HANDLED_BY_OS, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KBIF_FLR_HANDLED_BY_OS, NV_FALSE); } } @@ -281,18 +299,6 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // kbifConstructEngine -- virtual override (engstate) base (engstate) - pThis->__kbifConstructEngine__ = &kbifConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelBif_engstateConstructEngine; - - // kbifStateInitLocked -- virtual override (engstate) base (engstate) - pThis->__kbifStateInitLocked__ = &kbifStateInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelBif_engstateStateInitLocked; - - // kbifStateLoad -- virtual halified (singleton optimized) override (engstate) base (engstate) body - pThis->__kbifStateLoad__ = &kbifStateLoad_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelBif_engstateStateLoad; - // kbifStatePostLoad -- virtual halified (2 hals) override (engstate) base (engstate) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { @@ -302,11 +308,6 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * { pThis->__kbifStatePostLoad__ = &kbifStatePostLoad_IMPL; } - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_KernelBif_engstateStatePostLoad; - - // kbifStateUnload -- virtual halified (singleton optimized) override (engstate) base (engstate) body - pThis->__kbifStateUnload__ = &kbifStateUnload_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelBif_engstateStateUnload; // kbifGetBusIntfType -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ @@ -441,7 +442,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * } else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ { - pThis->__kbifIsMSIEnabledInHW__ = &kbifIsMSIEnabledInHW_491d52; + pThis->__kbifIsMSIEnabledInHW__ = &kbifIsMSIEnabledInHW_3dd2c9; } else { @@ -465,7 +466,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * // kbifIsPciIoAccessEnabled -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000400UL) )) /* ChipHal: GA100 | GH100 | GB100 | GB102 */ { - pThis->__kbifIsPciIoAccessEnabled__ = &kbifIsPciIoAccessEnabled_491d52; + pThis->__kbifIsPciIoAccessEnabled__ = &kbifIsPciIoAccessEnabled_3dd2c9; } else { @@ -987,6 +988,16 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * pThis->__kbifGetValidDeviceEnginesToReset__ = &kbifGetValidDeviceEnginesToReset_GA100; } + // kbifGetMigrationBandwidth -- halified (2 hals) + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ + { + pThis->__kbifGetMigrationBandwidth__ = &kbifGetMigrationBandwidth_GA100; + } + else + { + pThis->__kbifGetMigrationBandwidth__ = &kbifGetMigrationBandwidth_GM107; + } + // kbifGetEccCounts -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { @@ -1005,23 +1016,23 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * } else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ { - pThis->__kbifAllowGpuReqPcieAtomics__ = &kbifAllowGpuReqPcieAtomics_cbe027; + pThis->__kbifAllowGpuReqPcieAtomics__ = &kbifAllowGpuReqPcieAtomics_88bc07; } // default else { - pThis->__kbifAllowGpuReqPcieAtomics__ = &kbifAllowGpuReqPcieAtomics_491d52; + pThis->__kbifAllowGpuReqPcieAtomics__ = &kbifAllowGpuReqPcieAtomics_3dd2c9; } // kbifAllowGpuCplPcieAtomics -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ { - pThis->__kbifAllowGpuCplPcieAtomics__ = &kbifAllowGpuCplPcieAtomics_cbe027; + pThis->__kbifAllowGpuCplPcieAtomics__ = &kbifAllowGpuCplPcieAtomics_88bc07; } // default else { - pThis->__kbifAllowGpuCplPcieAtomics__ = &kbifAllowGpuCplPcieAtomics_491d52; + pThis->__kbifAllowGpuCplPcieAtomics__ = &kbifAllowGpuCplPcieAtomics_3dd2c9; } // kbifClearDownstreamReadCounter -- halified (2 hals) body @@ -1043,40 +1054,48 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner * { pThis->__kbifDoSecondaryBusHotReset__ = &kbifDoSecondaryBusHotReset_GM107; } - - // kbifInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__kbifInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kbifInitMissing; - - // kbifStatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__kbifStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kbifStatePreInitLocked; - - // kbifStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kbifStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kbifStatePreInitUnlocked; - - // kbifStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kbifStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kbifStateInitUnlocked; - - // kbifStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__kbifStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kbifStatePreLoad; - - // kbifStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__kbifStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kbifStatePreUnload; - - // kbifStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__kbifStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kbifStatePostUnload; - - // kbifStateDestroy -- virtual inherited (engstate) base (engstate) - pThis->__kbifStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_kbifStateDestroy; - - // kbifIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__kbifIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kbifIsPresent; -} // End __nvoc_init_funcTable_KernelBif_1 with approximately 167 basic block(s). +} // End __nvoc_init_funcTable_KernelBif_1 with approximately 151 basic block(s). -// Initialize vtable(s) for 72 virtual method(s). +// Initialize vtable(s) for 73 virtual method(s). void __nvoc_init_funcTable_KernelBif(KernelBif *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 72 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelBif vtable = { + .__kbifConstructEngine__ = &kbifConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelBif_engstateConstructEngine, // virtual + .__kbifStateInitLocked__ = &kbifStateInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelBif_engstateStateInitLocked, // virtual + .__kbifStateLoad__ = &kbifStateLoad_IMPL, // virtual halified (singleton optimized) override (engstate) base (engstate) body + .OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelBif_engstateStateLoad, // virtual + .OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_KernelBif_engstateStatePostLoad, // virtual + .__kbifStateUnload__ = &kbifStateUnload_IMPL, // virtual halified (singleton optimized) override (engstate) base (engstate) body + .OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelBif_engstateStateUnload, // virtual + .__kbifInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kbifInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__kbifStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kbifStatePreInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__kbifStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kbifStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__kbifStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kbifStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__kbifStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kbifStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__kbifStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kbifStatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__kbifStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kbifStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__kbifStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_kbifStateDestroy, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &engstateStateDestroy_IMPL, // virtual + .__kbifIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kbifIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_vtable = &vtable; // (kbif) this + + // Initialize vtable(s) with 60 per-object function pointer(s). __nvoc_init_funcTable_KernelBif_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_bif_nvoc.h b/src/nvidia/generated/g_kernel_bif_nvoc.h index fc199a7898..a7c9b2e033 100644 --- a/src/nvidia/generated/g_kernel_bif_nvoc.h +++ b/src/nvidia/generated/g_kernel_bif_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -162,10 +162,15 @@ typedef struct KERNEL_HOST_VGPU_DEVICE KERNEL_HOST_VGPU_DEVICE; #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelBif; + + struct KernelBif { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelBif *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -175,12 +180,8 @@ struct KernelBif { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct KernelBif *__nvoc_pbase_KernelBif; // kbif - // Vtable with 72 per-object function pointers - NV_STATUS (*__kbifConstructEngine__)(struct OBJGPU *, struct KernelBif * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) - NV_STATUS (*__kbifStateInitLocked__)(struct OBJGPU *, struct KernelBif * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__kbifStateLoad__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + // Vtable with 60 per-object function pointers NV_STATUS (*__kbifStatePostLoad__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32); // virtual halified (2 hals) override (engstate) base (engstate) body - NV_STATUS (*__kbifStateUnload__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body NvU32 (*__kbifGetBusIntfType__)(struct KernelBif * /*this*/); // halified (2 hals) body void (*__kbifInitDmaCaps__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) NV_STATUS (*__kbifSavePcieConfigRegisters__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body @@ -234,20 +235,12 @@ struct KernelBif { void (*__kbifResetHostEngines__)(struct OBJGPU *, struct KernelBif * /*this*/, struct KernelMc *); // halified (2 hals) body NvU32 (*__kbifGetValidEnginesToReset__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body NvU32 (*__kbifGetValidDeviceEnginesToReset__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body + NV_STATUS (*__kbifGetMigrationBandwidth__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32 *); // halified (2 hals) NvU32 (*__kbifGetEccCounts__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body NvBool (*__kbifAllowGpuReqPcieAtomics__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (3 hals) body NvBool (*__kbifAllowGpuCplPcieAtomics__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body void (*__kbifClearDownstreamReadCounter__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body NV_STATUS (*__kbifDoSecondaryBusHotReset__)(struct OBJGPU *, struct KernelBif * /*this*/); // halified (2 hals) body - void (*__kbifInitMissing__)(struct OBJGPU *, struct KernelBif * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kbifStatePreInitLocked__)(struct OBJGPU *, struct KernelBif * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kbifStatePreInitUnlocked__)(struct OBJGPU *, struct KernelBif * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kbifStateInitUnlocked__)(struct OBJGPU *, struct KernelBif * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kbifStatePreLoad__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kbifStatePreUnload__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kbifStatePostUnload__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - void (*__kbifStateDestroy__)(struct OBJGPU *, struct KernelBif * /*this*/); // virtual inherited (engstate) base (engstate) - NvBool (*__kbifIsPresent__)(struct OBJGPU *, struct KernelBif * /*this*/); // virtual inherited (engstate) base (engstate) // 25 PDB properties NvBool PDB_PROP_KBIF_CHECK_IF_GPU_EXISTS_DEF; @@ -296,6 +289,26 @@ struct KernelBif { KBIF_CACHE_PCIE_CONFIG_REG pcieConfigReg; }; + +// Metadata including vtable with 13 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelBif { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + + NV_STATUS (*__kbifConstructEngine__)(struct OBJGPU *, struct KernelBif * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kbifStateInitLocked__)(struct OBJGPU *, struct KernelBif * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kbifStateLoad__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kbifStateUnload__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + void (*__kbifInitMissing__)(struct OBJGPU *, struct KernelBif * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kbifStatePreInitLocked__)(struct OBJGPU *, struct KernelBif * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kbifStatePreInitUnlocked__)(struct OBJGPU *, struct KernelBif * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kbifStateInitUnlocked__)(struct OBJGPU *, struct KernelBif * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kbifStatePreLoad__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kbifStatePreUnload__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kbifStatePostUnload__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__kbifStateDestroy__)(struct OBJGPU *, struct KernelBif * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__kbifIsPresent__)(struct OBJGPU *, struct KernelBif * /*this*/); // virtual inherited (engstate) base (engstate) +}; + #ifndef __NVOC_CLASS_KernelBif_TYPEDEF__ #define __NVOC_CLASS_KernelBif_TYPEDEF__ typedef struct KernelBif KernelBif; @@ -380,17 +393,17 @@ NV_STATUS __nvoc_objCreate_KernelBif(KernelBif**, Dynamic*, NvU32); // Wrapper macros -#define kbifConstructEngine_FNPTR(pKernelBif) pKernelBif->__kbifConstructEngine__ +#define kbifConstructEngine_FNPTR(pKernelBif) pKernelBif->__nvoc_vtable->__kbifConstructEngine__ #define kbifConstructEngine(pGpu, pKernelBif, arg3) kbifConstructEngine_DISPATCH(pGpu, pKernelBif, arg3) -#define kbifStateInitLocked_FNPTR(pKernelBif) pKernelBif->__kbifStateInitLocked__ +#define kbifStateInitLocked_FNPTR(pKernelBif) pKernelBif->__nvoc_vtable->__kbifStateInitLocked__ #define kbifStateInitLocked(pGpu, pKernelBif) kbifStateInitLocked_DISPATCH(pGpu, pKernelBif) -#define kbifStateLoad_FNPTR(pKernelBif) pKernelBif->__kbifStateLoad__ +#define kbifStateLoad_FNPTR(pKernelBif) pKernelBif->__nvoc_vtable->__kbifStateLoad__ #define kbifStateLoad(pGpu, pKernelBif, arg3) kbifStateLoad_DISPATCH(pGpu, pKernelBif, arg3) #define kbifStateLoad_HAL(pGpu, pKernelBif, arg3) kbifStateLoad_DISPATCH(pGpu, pKernelBif, arg3) #define kbifStatePostLoad_FNPTR(pKernelBif) pKernelBif->__kbifStatePostLoad__ #define kbifStatePostLoad(pGpu, pKernelBif, arg3) kbifStatePostLoad_DISPATCH(pGpu, pKernelBif, arg3) #define kbifStatePostLoad_HAL(pGpu, pKernelBif, arg3) kbifStatePostLoad_DISPATCH(pGpu, pKernelBif, arg3) -#define kbifStateUnload_FNPTR(pKernelBif) pKernelBif->__kbifStateUnload__ +#define kbifStateUnload_FNPTR(pKernelBif) pKernelBif->__nvoc_vtable->__kbifStateUnload__ #define kbifStateUnload(pGpu, pKernelBif, arg3) kbifStateUnload_DISPATCH(pGpu, pKernelBif, arg3) #define kbifStateUnload_HAL(pGpu, pKernelBif, arg3) kbifStateUnload_DISPATCH(pGpu, pKernelBif, arg3) #define kbifGetBusIntfType_FNPTR(pKernelBif) pKernelBif->__kbifGetBusIntfType__ @@ -552,6 +565,9 @@ NV_STATUS __nvoc_objCreate_KernelBif(KernelBif**, Dynamic*, NvU32); #define kbifGetValidDeviceEnginesToReset_FNPTR(pKernelBif) pKernelBif->__kbifGetValidDeviceEnginesToReset__ #define kbifGetValidDeviceEnginesToReset(pGpu, pKernelBif) kbifGetValidDeviceEnginesToReset_DISPATCH(pGpu, pKernelBif) #define kbifGetValidDeviceEnginesToReset_HAL(pGpu, pKernelBif) kbifGetValidDeviceEnginesToReset_DISPATCH(pGpu, pKernelBif) +#define kbifGetMigrationBandwidth_FNPTR(pKernelBif) pKernelBif->__kbifGetMigrationBandwidth__ +#define kbifGetMigrationBandwidth(pGpu, pKernelBif, pBandwidth) kbifGetMigrationBandwidth_DISPATCH(pGpu, pKernelBif, pBandwidth) +#define kbifGetMigrationBandwidth_HAL(pGpu, pKernelBif, pBandwidth) kbifGetMigrationBandwidth_DISPATCH(pGpu, pKernelBif, pBandwidth) #define kbifGetEccCounts_FNPTR(pKernelBif) pKernelBif->__kbifGetEccCounts__ #define kbifGetEccCounts(pGpu, pKernelBif) kbifGetEccCounts_DISPATCH(pGpu, pKernelBif) #define kbifGetEccCounts_HAL(pGpu, pKernelBif) kbifGetEccCounts_DISPATCH(pGpu, pKernelBif) @@ -567,36 +583,36 @@ NV_STATUS __nvoc_objCreate_KernelBif(KernelBif**, Dynamic*, NvU32); #define kbifDoSecondaryBusHotReset_FNPTR(pKernelBif) pKernelBif->__kbifDoSecondaryBusHotReset__ #define kbifDoSecondaryBusHotReset(pGpu, pKernelBif) kbifDoSecondaryBusHotReset_DISPATCH(pGpu, pKernelBif) #define kbifDoSecondaryBusHotReset_HAL(pGpu, pKernelBif) kbifDoSecondaryBusHotReset_DISPATCH(pGpu, pKernelBif) -#define kbifInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define kbifInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define kbifInitMissing(pGpu, pEngstate) kbifInitMissing_DISPATCH(pGpu, pEngstate) -#define kbifStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define kbifStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define kbifStatePreInitLocked(pGpu, pEngstate) kbifStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define kbifStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define kbifStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define kbifStatePreInitUnlocked(pGpu, pEngstate) kbifStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kbifStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kbifStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define kbifStateInitUnlocked(pGpu, pEngstate) kbifStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kbifStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kbifStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define kbifStatePreLoad(pGpu, pEngstate, arg3) kbifStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kbifStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kbifStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define kbifStatePreUnload(pGpu, pEngstate, arg3) kbifStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kbifStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kbifStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define kbifStatePostUnload(pGpu, pEngstate, arg3) kbifStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kbifStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define kbifStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateDestroy__ #define kbifStateDestroy(pGpu, pEngstate) kbifStateDestroy_DISPATCH(pGpu, pEngstate) -#define kbifIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define kbifIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define kbifIsPresent(pGpu, pEngstate) kbifIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS kbifConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, ENGDESCRIPTOR arg3) { - return pKernelBif->__kbifConstructEngine__(pGpu, pKernelBif, arg3); + return pKernelBif->__nvoc_vtable->__kbifConstructEngine__(pGpu, pKernelBif, arg3); } static inline NV_STATUS kbifStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return pKernelBif->__kbifStateInitLocked__(pGpu, pKernelBif); + return pKernelBif->__nvoc_vtable->__kbifStateInitLocked__(pGpu, pKernelBif); } static inline NV_STATUS kbifStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg3) { - return pKernelBif->__kbifStateLoad__(pGpu, pKernelBif, arg3); + return pKernelBif->__nvoc_vtable->__kbifStateLoad__(pGpu, pKernelBif, arg3); } static inline NV_STATUS kbifStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg3) { @@ -604,7 +620,7 @@ static inline NV_STATUS kbifStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct K } static inline NV_STATUS kbifStateUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg3) { - return pKernelBif->__kbifStateUnload__(pGpu, pKernelBif, arg3); + return pKernelBif->__nvoc_vtable->__kbifStateUnload__(pGpu, pKernelBif, arg3); } static inline NvU32 kbifGetBusIntfType_DISPATCH(struct KernelBif *pKernelBif) { @@ -819,6 +835,10 @@ static inline NvU32 kbifGetValidDeviceEnginesToReset_DISPATCH(struct OBJGPU *pGp return pKernelBif->__kbifGetValidDeviceEnginesToReset__(pGpu, pKernelBif); } +static inline NV_STATUS kbifGetMigrationBandwidth_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBandwidth) { + return pKernelBif->__kbifGetMigrationBandwidth__(pGpu, pKernelBif, pBandwidth); +} + static inline NvU32 kbifGetEccCounts_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { return pKernelBif->__kbifGetEccCounts__(pGpu, pKernelBif); } @@ -840,39 +860,39 @@ static inline NV_STATUS kbifDoSecondaryBusHotReset_DISPATCH(struct OBJGPU *pGpu, } static inline void kbifInitMissing_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pEngstate) { - pEngstate->__kbifInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kbifInitMissing__(pGpu, pEngstate); } static inline NV_STATUS kbifStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pEngstate) { - return pEngstate->__kbifStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kbifStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS kbifStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pEngstate) { - return pEngstate->__kbifStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kbifStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kbifStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pEngstate) { - return pEngstate->__kbifStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kbifStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kbifStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pEngstate, NvU32 arg3) { - return pEngstate->__kbifStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kbifStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kbifStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pEngstate, NvU32 arg3) { - return pEngstate->__kbifStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kbifStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS kbifStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pEngstate, NvU32 arg3) { - return pEngstate->__kbifStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kbifStatePostUnload__(pGpu, pEngstate, arg3); } static inline void kbifStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pEngstate) { - pEngstate->__kbifStateDestroy__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kbifStateDestroy__(pGpu, pEngstate); } static inline NvBool kbifIsPresent_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pEngstate) { - return pEngstate->__kbifIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kbifIsPresent__(pGpu, pEngstate); } void kbifDestruct_GM107(struct KernelBif *pKernelBif); @@ -1085,8 +1105,8 @@ NvBool kbifIsMSIEnabledInHW_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernel NvBool kbifIsMSIEnabledInHW_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline NvBool kbifIsMSIEnabledInHW_491d52(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return ((NvBool)(0 != 0)); +static inline NvBool kbifIsMSIEnabledInHW_3dd2c9(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return NV_FALSE; } NvBool kbifIsMSIXEnabledInHW_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); @@ -1097,8 +1117,8 @@ NvBool kbifIsMSIXEnabledInHW_GB100(struct OBJGPU *pGpu, struct KernelBif *pKerne NvBool kbifIsPciIoAccessEnabled_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline NvBool kbifIsPciIoAccessEnabled_491d52(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return ((NvBool)(0 != 0)); +static inline NvBool kbifIsPciIoAccessEnabled_3dd2c9(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return NV_FALSE; } NvBool kbifIs3dController_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); @@ -1343,6 +1363,10 @@ static inline NvU32 kbifGetValidDeviceEnginesToReset_15a734(struct OBJGPU *pGpu, return 0U; } +NV_STATUS kbifGetMigrationBandwidth_GA100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBandwidth); + +NV_STATUS kbifGetMigrationBandwidth_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBandwidth); + NvU32 kbifGetEccCounts_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); static inline NvU32 kbifGetEccCounts_4a4dee(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { @@ -1351,20 +1375,20 @@ static inline NvU32 kbifGetEccCounts_4a4dee(struct OBJGPU *pGpu, struct KernelBi NvBool kbifAllowGpuReqPcieAtomics_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); -static inline NvBool kbifAllowGpuReqPcieAtomics_cbe027(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return ((NvBool)(0 == 0)); +static inline NvBool kbifAllowGpuReqPcieAtomics_88bc07(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return NV_TRUE; } -static inline NvBool kbifAllowGpuReqPcieAtomics_491d52(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return ((NvBool)(0 != 0)); +static inline NvBool kbifAllowGpuReqPcieAtomics_3dd2c9(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return NV_FALSE; } -static inline NvBool kbifAllowGpuCplPcieAtomics_cbe027(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return ((NvBool)(0 == 0)); +static inline NvBool kbifAllowGpuCplPcieAtomics_88bc07(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return NV_TRUE; } -static inline NvBool kbifAllowGpuCplPcieAtomics_491d52(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { - return ((NvBool)(0 != 0)); +static inline NvBool kbifAllowGpuCplPcieAtomics_3dd2c9(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { + return NV_FALSE; } void kbifClearDownstreamReadCounter_GA100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); @@ -1485,6 +1509,17 @@ static inline NvU32 kbifGetGpuL1PmSubstatesCtrl1(struct OBJGPU *pGpu, struct Ker #define kbifGetGpuL1PmSubstatesCtrl1(pGpu, pKernelBif) kbifGetGpuL1PmSubstatesCtrl1_IMPL(pGpu, pKernelBif) #endif //__nvoc_kernel_bif_h_disabled +NV_STATUS kbifGetPciLinkMaxSpeedByPciGenInfo_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 pciLinkGenInfo, NvU32 *pciLinkMaxSpeed); + +#ifdef __nvoc_kernel_bif_h_disabled +static inline NV_STATUS kbifGetPciLinkMaxSpeedByPciGenInfo(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 pciLinkGenInfo, NvU32 *pciLinkMaxSpeed) { + NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kernel_bif_h_disabled +#define kbifGetPciLinkMaxSpeedByPciGenInfo(pGpu, pKernelBif, pciLinkGenInfo, pciLinkMaxSpeed) kbifGetPciLinkMaxSpeedByPciGenInfo_IMPL(pGpu, pKernelBif, pciLinkGenInfo, pciLinkMaxSpeed) +#endif //__nvoc_kernel_bif_h_disabled + NV_STATUS kbifWaitForConfigAccessAfterReset_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); #ifdef __nvoc_kernel_bif_h_disabled diff --git a/src/nvidia/generated/g_kernel_ccu_api_nvoc.c b/src/nvidia/generated/g_kernel_ccu_api_nvoc.c index 83d46f5cd2..88fa8a80c9 100644 --- a/src/nvidia/generated/g_kernel_ccu_api_nvoc.c +++ b/src/nvidia/generated/g_kernel_ccu_api_nvoc.c @@ -162,133 +162,201 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCc }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_KernelCcuApi_gpuresMap(struct GpuResource *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_down_thunk_KernelCcuApi_gpuresUnmap(struct GpuResource *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_down_thunk_KernelCcuApi_gpuresGetMapAddrSpace(struct GpuResource *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_down_thunk_KernelCcuApi_rmresGetMemoryMappingDescriptor(struct RmResource *pKernelCcuApi, struct MEMORY_DESCRIPTOR **ppMemDesc); // this + // 4 down-thunk(s) defined to bridge methods in KernelCcuApi from superclasses // kccuapiMap: virtual override (res) base (gpures) -static NV_STATUS __nvoc_down_thunk_KernelCcuApi_gpuresMap(struct GpuResource *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_down_thunk_KernelCcuApi_gpuresMap(struct GpuResource *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return kccuapiMap((struct KernelCcuApi *)(((unsigned char *) pKernelCcuApi) - __nvoc_rtti_KernelCcuApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // kccuapiUnmap: virtual override (res) base (gpures) -static NV_STATUS __nvoc_down_thunk_KernelCcuApi_gpuresUnmap(struct GpuResource *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_down_thunk_KernelCcuApi_gpuresUnmap(struct GpuResource *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return kccuapiUnmap((struct KernelCcuApi *)(((unsigned char *) pKernelCcuApi) - __nvoc_rtti_KernelCcuApi_GpuResource.offset), pCallContext, pCpuMapping); } // kccuapiGetMapAddrSpace: virtual override (gpures) base (gpures) -static NV_STATUS __nvoc_down_thunk_KernelCcuApi_gpuresGetMapAddrSpace(struct GpuResource *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_down_thunk_KernelCcuApi_gpuresGetMapAddrSpace(struct GpuResource *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return kccuapiGetMapAddrSpace((struct KernelCcuApi *)(((unsigned char *) pKernelCcuApi) - __nvoc_rtti_KernelCcuApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // kccuapiGetMemoryMappingDescriptor: virtual override (rmres) base (gpures) -static NV_STATUS __nvoc_down_thunk_KernelCcuApi_rmresGetMemoryMappingDescriptor(struct RmResource *pKernelCcuApi, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_down_thunk_KernelCcuApi_rmresGetMemoryMappingDescriptor(struct RmResource *pKernelCcuApi, struct MEMORY_DESCRIPTOR **ppMemDesc) { return kccuapiGetMemoryMappingDescriptor((struct KernelCcuApi *)(((unsigned char *) pKernelCcuApi) - __nvoc_rtti_KernelCcuApi_RmResource.offset), ppMemDesc); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_kccuapiControl(struct KernelCcuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_GpuResource_kccuapiShareCallback(struct KernelCcuApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kccuapiGetRegBaseOffsetAndSize(struct KernelCcuApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kccuapiInternalControlForward(struct KernelCcuApi *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_kccuapiGetInternalObjectHandle(struct KernelCcuApi *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_kccuapiAccessCallback(struct KernelCcuApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_kccuapiGetMemInterMapParams(struct KernelCcuApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_kccuapiCheckMemInterUnmap(struct KernelCcuApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_kccuapiControlSerialization_Prologue(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_kccuapiControlSerialization_Epilogue(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_kccuapiControl_Prologue(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_kccuapiControl_Epilogue(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_kccuapiCanCopy(struct KernelCcuApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_kccuapiIsDuplicate(struct KernelCcuApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_kccuapiPreDestruct(struct KernelCcuApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_kccuapiControlFilter(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_kccuapiIsPartialUnmapSupported(struct KernelCcuApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_kccuapiMapTo(struct KernelCcuApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_kccuapiUnmapFrom(struct KernelCcuApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_kccuapiGetRefCount(struct KernelCcuApi *pResource); // this +void __nvoc_up_thunk_RsResource_kccuapiAddAdditionalDependants(struct RsClient *pClient, struct KernelCcuApi *pResource, RsResourceRef *pReference); // this + // 21 up-thunk(s) defined to bridge methods in KernelCcuApi to superclasses // kccuapiControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kccuapiControl(struct KernelCcuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_kccuapiControl(struct KernelCcuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCcuApi_GpuResource.offset), pCallContext, pParams); } // kccuapiShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_kccuapiShareCallback(struct KernelCcuApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_kccuapiShareCallback(struct KernelCcuApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCcuApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // kccuapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kccuapiGetRegBaseOffsetAndSize(struct KernelCcuApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_kccuapiGetRegBaseOffsetAndSize(struct KernelCcuApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCcuApi_GpuResource.offset), pGpu, pOffset, pSize); } // kccuapiInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kccuapiInternalControlForward(struct KernelCcuApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_kccuapiInternalControlForward(struct KernelCcuApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCcuApi_GpuResource.offset), command, pParams, size); } // kccuapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_kccuapiGetInternalObjectHandle(struct KernelCcuApi *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_kccuapiGetInternalObjectHandle(struct KernelCcuApi *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCcuApi_GpuResource.offset)); } // kccuapiAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_kccuapiAccessCallback(struct KernelCcuApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_kccuapiAccessCallback(struct KernelCcuApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // kccuapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kccuapiGetMemInterMapParams(struct KernelCcuApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_kccuapiGetMemInterMapParams(struct KernelCcuApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelCcuApi_RmResource.offset), pParams); } // kccuapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kccuapiCheckMemInterUnmap(struct KernelCcuApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_kccuapiCheckMemInterUnmap(struct KernelCcuApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelCcuApi_RmResource.offset), bSubdeviceHandleProvided); } // kccuapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kccuapiControlSerialization_Prologue(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_kccuapiControlSerialization_Prologue(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RmResource.offset), pCallContext, pParams); } // kccuapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_kccuapiControlSerialization_Epilogue(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_kccuapiControlSerialization_Epilogue(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RmResource.offset), pCallContext, pParams); } // kccuapiControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kccuapiControl_Prologue(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_kccuapiControl_Prologue(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RmResource.offset), pCallContext, pParams); } // kccuapiControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_kccuapiControl_Epilogue(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_kccuapiControl_Epilogue(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RmResource.offset), pCallContext, pParams); } // kccuapiCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_kccuapiCanCopy(struct KernelCcuApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_kccuapiCanCopy(struct KernelCcuApi *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset)); } // kccuapiIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kccuapiIsDuplicate(struct KernelCcuApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_kccuapiIsDuplicate(struct KernelCcuApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset), hMemory, pDuplicate); } // kccuapiPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_kccuapiPreDestruct(struct KernelCcuApi *pResource) { +void __nvoc_up_thunk_RsResource_kccuapiPreDestruct(struct KernelCcuApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset)); } // kccuapiControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kccuapiControlFilter(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kccuapiControlFilter(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset), pCallContext, pParams); } // kccuapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_kccuapiIsPartialUnmapSupported(struct KernelCcuApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_kccuapiIsPartialUnmapSupported(struct KernelCcuApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset)); } // kccuapiMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kccuapiMapTo(struct KernelCcuApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kccuapiMapTo(struct KernelCcuApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset), pParams); } // kccuapiUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kccuapiUnmapFrom(struct KernelCcuApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kccuapiUnmapFrom(struct KernelCcuApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset), pParams); } // kccuapiGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_kccuapiGetRefCount(struct KernelCcuApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_kccuapiGetRefCount(struct KernelCcuApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset)); } // kccuapiAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_kccuapiAddAdditionalDependants(struct RsClient *pClient, struct KernelCcuApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_kccuapiAddAdditionalDependants(struct RsClient *pClient, struct KernelCcuApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCcuApi_RsResource.offset), pReference); } @@ -333,22 +401,6 @@ NV_STATUS __nvoc_ctor_KernelCcuApi(KernelCcuApi *pThis, struct CALL_CONTEXT * ar static void __nvoc_init_funcTable_KernelCcuApi_1(KernelCcuApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // kccuapiMap -- virtual override (res) base (gpures) - pThis->__kccuapiMap__ = &kccuapiMap_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresMap__ = &__nvoc_down_thunk_KernelCcuApi_gpuresMap; - - // kccuapiUnmap -- virtual override (res) base (gpures) - pThis->__kccuapiUnmap__ = &kccuapiUnmap_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresUnmap__ = &__nvoc_down_thunk_KernelCcuApi_gpuresUnmap; - - // kccuapiGetMapAddrSpace -- virtual override (gpures) base (gpures) - pThis->__kccuapiGetMapAddrSpace__ = &kccuapiGetMapAddrSpace_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_down_thunk_KernelCcuApi_gpuresGetMapAddrSpace; - - // kccuapiGetMemoryMappingDescriptor -- virtual override (rmres) base (gpures) - pThis->__kccuapiGetMemoryMappingDescriptor__ = &kccuapiGetMemoryMappingDescriptor_IMPL; - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_KernelCcuApi_rmresGetMemoryMappingDescriptor; - // kccuapiCtrlCmdSubscribe -- exported (id=0xcbca0101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kccuapiCtrlCmdSubscribe__ = &kccuapiCtrlCmdSubscribe_IMPL; @@ -368,76 +420,120 @@ static void __nvoc_init_funcTable_KernelCcuApi_1(KernelCcuApi *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kccuapiCtrlCmdGetStreamState__ = &kccuapiCtrlCmdGetStreamState_IMPL; #endif - - // kccuapiControl -- virtual inherited (gpures) base (gpures) - pThis->__kccuapiControl__ = &__nvoc_up_thunk_GpuResource_kccuapiControl; - - // kccuapiShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__kccuapiShareCallback__ = &__nvoc_up_thunk_GpuResource_kccuapiShareCallback; - - // kccuapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__kccuapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kccuapiGetRegBaseOffsetAndSize; - - // kccuapiInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__kccuapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kccuapiInternalControlForward; - - // kccuapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__kccuapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_kccuapiGetInternalObjectHandle; - - // kccuapiAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__kccuapiAccessCallback__ = &__nvoc_up_thunk_RmResource_kccuapiAccessCallback; - - // kccuapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__kccuapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_kccuapiGetMemInterMapParams; - - // kccuapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__kccuapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_kccuapiCheckMemInterUnmap; - - // kccuapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__kccuapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kccuapiControlSerialization_Prologue; - - // kccuapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__kccuapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kccuapiControlSerialization_Epilogue; - - // kccuapiControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__kccuapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_kccuapiControl_Prologue; - - // kccuapiControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__kccuapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kccuapiControl_Epilogue; - - // kccuapiCanCopy -- virtual inherited (res) base (gpures) - pThis->__kccuapiCanCopy__ = &__nvoc_up_thunk_RsResource_kccuapiCanCopy; - - // kccuapiIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__kccuapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_kccuapiIsDuplicate; - - // kccuapiPreDestruct -- virtual inherited (res) base (gpures) - pThis->__kccuapiPreDestruct__ = &__nvoc_up_thunk_RsResource_kccuapiPreDestruct; - - // kccuapiControlFilter -- virtual inherited (res) base (gpures) - pThis->__kccuapiControlFilter__ = &__nvoc_up_thunk_RsResource_kccuapiControlFilter; - - // kccuapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__kccuapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kccuapiIsPartialUnmapSupported; - - // kccuapiMapTo -- virtual inherited (res) base (gpures) - pThis->__kccuapiMapTo__ = &__nvoc_up_thunk_RsResource_kccuapiMapTo; - - // kccuapiUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__kccuapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_kccuapiUnmapFrom; - - // kccuapiGetRefCount -- virtual inherited (res) base (gpures) - pThis->__kccuapiGetRefCount__ = &__nvoc_up_thunk_RsResource_kccuapiGetRefCount; - - // kccuapiAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__kccuapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kccuapiAddAdditionalDependants; -} // End __nvoc_init_funcTable_KernelCcuApi_1 with approximately 33 basic block(s). +} // End __nvoc_init_funcTable_KernelCcuApi_1 with approximately 4 basic block(s). // Initialize vtable(s) for 29 virtual method(s). void __nvoc_init_funcTable_KernelCcuApi(KernelCcuApi *pThis) { - // Initialize vtable(s) with 29 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelCcuApi vtable = { + .__kccuapiMap__ = &kccuapiMap_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresMap__ = &__nvoc_down_thunk_KernelCcuApi_gpuresMap, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__kccuapiUnmap__ = &kccuapiUnmap_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresUnmap__ = &__nvoc_down_thunk_KernelCcuApi_gpuresUnmap, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__kccuapiGetMapAddrSpace__ = &kccuapiGetMapAddrSpace_IMPL, // virtual override (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_down_thunk_KernelCcuApi_gpuresGetMapAddrSpace, // virtual + .__kccuapiGetMemoryMappingDescriptor__ = &kccuapiGetMemoryMappingDescriptor_IMPL, // virtual override (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_KernelCcuApi_rmresGetMemoryMappingDescriptor, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__kccuapiControl__ = &__nvoc_up_thunk_GpuResource_kccuapiControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__kccuapiShareCallback__ = &__nvoc_up_thunk_GpuResource_kccuapiShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__kccuapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kccuapiGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__kccuapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kccuapiInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__kccuapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_kccuapiGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__kccuapiAccessCallback__ = &__nvoc_up_thunk_RmResource_kccuapiAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__kccuapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_kccuapiGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__kccuapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_kccuapiCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__kccuapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kccuapiControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__kccuapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kccuapiControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__kccuapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_kccuapiControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__kccuapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kccuapiControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__kccuapiCanCopy__ = &__nvoc_up_thunk_RsResource_kccuapiCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__kccuapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_kccuapiIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__kccuapiPreDestruct__ = &__nvoc_up_thunk_RsResource_kccuapiPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__kccuapiControlFilter__ = &__nvoc_up_thunk_RsResource_kccuapiControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__kccuapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kccuapiIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__kccuapiMapTo__ = &__nvoc_up_thunk_RsResource_kccuapiMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__kccuapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_kccuapiUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__kccuapiGetRefCount__ = &__nvoc_up_thunk_RsResource_kccuapiGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__kccuapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kccuapiAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (kccuapi) this + + // Initialize vtable(s) with 4 per-object function pointer(s). __nvoc_init_funcTable_KernelCcuApi_1(pThis); } diff --git a/src/nvidia/generated/g_kernel_ccu_api_nvoc.h b/src/nvidia/generated/g_kernel_ccu_api_nvoc.h index 6fcc27f288..dbb5fbc02c 100644 --- a/src/nvidia/generated/g_kernel_ccu_api_nvoc.h +++ b/src/nvidia/generated/g_kernel_ccu_api_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -62,10 +62,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelCcuApi; + + struct KernelCcuApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelCcuApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -78,15 +83,22 @@ struct KernelCcuApi { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct KernelCcuApi *__nvoc_pbase_KernelCcuApi; // kccuapi - // Vtable with 29 per-object function pointers - NV_STATUS (*__kccuapiMap__)(struct KernelCcuApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual override (res) base (gpures) - NV_STATUS (*__kccuapiUnmap__)(struct KernelCcuApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual override (res) base (gpures) - NV_STATUS (*__kccuapiGetMapAddrSpace__)(struct KernelCcuApi * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (gpures) base (gpures) - NV_STATUS (*__kccuapiGetMemoryMappingDescriptor__)(struct KernelCcuApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual override (rmres) base (gpures) + // Vtable with 4 per-object function pointers NV_STATUS (*__kccuapiCtrlCmdSubscribe__)(struct KernelCcuApi * /*this*/, NV_COUNTER_COLLECTION_UNIT_SUBSCRIBE_PARAMS *); // exported (id=0xcbca0101) NV_STATUS (*__kccuapiCtrlCmdUnsubscribe__)(struct KernelCcuApi * /*this*/); // exported (id=0xcbca0102) NV_STATUS (*__kccuapiCtrlCmdSetStreamState__)(struct KernelCcuApi * /*this*/, NV_COUNTER_COLLECTION_UNIT_STREAM_STATE_PARAMS *); // exported (id=0xcbca0103) NV_STATUS (*__kccuapiCtrlCmdGetStreamState__)(struct KernelCcuApi * /*this*/, NV_COUNTER_COLLECTION_UNIT_STREAM_STATE_PARAMS *); // exported (id=0xcbca0104) +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelCcuApi { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + + NV_STATUS (*__kccuapiMap__)(struct KernelCcuApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual override (res) base (gpures) + NV_STATUS (*__kccuapiUnmap__)(struct KernelCcuApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual override (res) base (gpures) + NV_STATUS (*__kccuapiGetMapAddrSpace__)(struct KernelCcuApi * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (gpures) base (gpures) + NV_STATUS (*__kccuapiGetMemoryMappingDescriptor__)(struct KernelCcuApi * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual override (rmres) base (gpures) NV_STATUS (*__kccuapiControl__)(struct KernelCcuApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NvBool (*__kccuapiShareCallback__)(struct KernelCcuApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__kccuapiGetRegBaseOffsetAndSize__)(struct KernelCcuApi * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) @@ -140,13 +152,13 @@ NV_STATUS __nvoc_objCreate_KernelCcuApi(KernelCcuApi**, Dynamic*, NvU32, struct // Wrapper macros -#define kccuapiMap_FNPTR(pKernelCcuApi) pKernelCcuApi->__kccuapiMap__ +#define kccuapiMap_FNPTR(pKernelCcuApi) pKernelCcuApi->__nvoc_vtable->__kccuapiMap__ #define kccuapiMap(pKernelCcuApi, pCallContext, pParams, pCpuMapping) kccuapiMap_DISPATCH(pKernelCcuApi, pCallContext, pParams, pCpuMapping) -#define kccuapiUnmap_FNPTR(pKernelCcuApi) pKernelCcuApi->__kccuapiUnmap__ +#define kccuapiUnmap_FNPTR(pKernelCcuApi) pKernelCcuApi->__nvoc_vtable->__kccuapiUnmap__ #define kccuapiUnmap(pKernelCcuApi, pCallContext, pCpuMapping) kccuapiUnmap_DISPATCH(pKernelCcuApi, pCallContext, pCpuMapping) -#define kccuapiGetMapAddrSpace_FNPTR(pKernelCcuApi) pKernelCcuApi->__kccuapiGetMapAddrSpace__ +#define kccuapiGetMapAddrSpace_FNPTR(pKernelCcuApi) pKernelCcuApi->__nvoc_vtable->__kccuapiGetMapAddrSpace__ #define kccuapiGetMapAddrSpace(pKernelCcuApi, pCallContext, mapFlags, pAddrSpace) kccuapiGetMapAddrSpace_DISPATCH(pKernelCcuApi, pCallContext, mapFlags, pAddrSpace) -#define kccuapiGetMemoryMappingDescriptor_FNPTR(pKernelCcuApi) pKernelCcuApi->__kccuapiGetMemoryMappingDescriptor__ +#define kccuapiGetMemoryMappingDescriptor_FNPTR(pKernelCcuApi) pKernelCcuApi->__nvoc_vtable->__kccuapiGetMemoryMappingDescriptor__ #define kccuapiGetMemoryMappingDescriptor(pKernelCcuApi, ppMemDesc) kccuapiGetMemoryMappingDescriptor_DISPATCH(pKernelCcuApi, ppMemDesc) #define kccuapiCtrlCmdSubscribe_FNPTR(pKernelCcuApi) pKernelCcuApi->__kccuapiCtrlCmdSubscribe__ #define kccuapiCtrlCmdSubscribe(pKernelCcuApi, pParams) kccuapiCtrlCmdSubscribe_DISPATCH(pKernelCcuApi, pParams) @@ -156,64 +168,64 @@ NV_STATUS __nvoc_objCreate_KernelCcuApi(KernelCcuApi**, Dynamic*, NvU32, struct #define kccuapiCtrlCmdSetStreamState(pKernelCcuApi, pParams) kccuapiCtrlCmdSetStreamState_DISPATCH(pKernelCcuApi, pParams) #define kccuapiCtrlCmdGetStreamState_FNPTR(pKernelCcuApi) pKernelCcuApi->__kccuapiCtrlCmdGetStreamState__ #define kccuapiCtrlCmdGetStreamState(pKernelCcuApi, pParams) kccuapiCtrlCmdGetStreamState_DISPATCH(pKernelCcuApi, pParams) -#define kccuapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define kccuapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define kccuapiControl(pGpuResource, pCallContext, pParams) kccuapiControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define kccuapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define kccuapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define kccuapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) kccuapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define kccuapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define kccuapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define kccuapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) kccuapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define kccuapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define kccuapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define kccuapiInternalControlForward(pGpuResource, command, pParams, size) kccuapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define kccuapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define kccuapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define kccuapiGetInternalObjectHandle(pGpuResource) kccuapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define kccuapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define kccuapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define kccuapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kccuapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define kccuapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define kccuapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define kccuapiGetMemInterMapParams(pRmResource, pParams) kccuapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define kccuapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define kccuapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define kccuapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) kccuapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define kccuapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define kccuapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define kccuapiControlSerialization_Prologue(pResource, pCallContext, pParams) kccuapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define kccuapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define kccuapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define kccuapiControlSerialization_Epilogue(pResource, pCallContext, pParams) kccuapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kccuapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define kccuapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define kccuapiControl_Prologue(pResource, pCallContext, pParams) kccuapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define kccuapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define kccuapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define kccuapiControl_Epilogue(pResource, pCallContext, pParams) kccuapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kccuapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define kccuapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define kccuapiCanCopy(pResource) kccuapiCanCopy_DISPATCH(pResource) -#define kccuapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define kccuapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define kccuapiIsDuplicate(pResource, hMemory, pDuplicate) kccuapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define kccuapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define kccuapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define kccuapiPreDestruct(pResource) kccuapiPreDestruct_DISPATCH(pResource) -#define kccuapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define kccuapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define kccuapiControlFilter(pResource, pCallContext, pParams) kccuapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define kccuapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define kccuapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define kccuapiIsPartialUnmapSupported(pResource) kccuapiIsPartialUnmapSupported_DISPATCH(pResource) -#define kccuapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define kccuapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define kccuapiMapTo(pResource, pParams) kccuapiMapTo_DISPATCH(pResource, pParams) -#define kccuapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define kccuapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define kccuapiUnmapFrom(pResource, pParams) kccuapiUnmapFrom_DISPATCH(pResource, pParams) -#define kccuapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define kccuapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define kccuapiGetRefCount(pResource) kccuapiGetRefCount_DISPATCH(pResource) -#define kccuapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define kccuapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define kccuapiAddAdditionalDependants(pClient, pResource, pReference) kccuapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NV_STATUS kccuapiMap_DISPATCH(struct KernelCcuApi *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pKernelCcuApi->__kccuapiMap__(pKernelCcuApi, pCallContext, pParams, pCpuMapping); + return pKernelCcuApi->__nvoc_vtable->__kccuapiMap__(pKernelCcuApi, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS kccuapiUnmap_DISPATCH(struct KernelCcuApi *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pKernelCcuApi->__kccuapiUnmap__(pKernelCcuApi, pCallContext, pCpuMapping); + return pKernelCcuApi->__nvoc_vtable->__kccuapiUnmap__(pKernelCcuApi, pCallContext, pCpuMapping); } static inline NV_STATUS kccuapiGetMapAddrSpace_DISPATCH(struct KernelCcuApi *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pKernelCcuApi->__kccuapiGetMapAddrSpace__(pKernelCcuApi, pCallContext, mapFlags, pAddrSpace); + return pKernelCcuApi->__nvoc_vtable->__kccuapiGetMapAddrSpace__(pKernelCcuApi, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS kccuapiGetMemoryMappingDescriptor_DISPATCH(struct KernelCcuApi *pKernelCcuApi, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pKernelCcuApi->__kccuapiGetMemoryMappingDescriptor__(pKernelCcuApi, ppMemDesc); + return pKernelCcuApi->__nvoc_vtable->__kccuapiGetMemoryMappingDescriptor__(pKernelCcuApi, ppMemDesc); } static inline NV_STATUS kccuapiCtrlCmdSubscribe_DISPATCH(struct KernelCcuApi *pKernelCcuApi, NV_COUNTER_COLLECTION_UNIT_SUBSCRIBE_PARAMS *pParams) { @@ -233,87 +245,87 @@ static inline NV_STATUS kccuapiCtrlCmdGetStreamState_DISPATCH(struct KernelCcuAp } static inline NV_STATUS kccuapiControl_DISPATCH(struct KernelCcuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__kccuapiControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__kccuapiControl__(pGpuResource, pCallContext, pParams); } static inline NvBool kccuapiShareCallback_DISPATCH(struct KernelCcuApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__kccuapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__kccuapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS kccuapiGetRegBaseOffsetAndSize_DISPATCH(struct KernelCcuApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__kccuapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__kccuapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS kccuapiInternalControlForward_DISPATCH(struct KernelCcuApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__kccuapiInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__kccuapiInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle kccuapiGetInternalObjectHandle_DISPATCH(struct KernelCcuApi *pGpuResource) { - return pGpuResource->__kccuapiGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__kccuapiGetInternalObjectHandle__(pGpuResource); } static inline NvBool kccuapiAccessCallback_DISPATCH(struct KernelCcuApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__kccuapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__kccuapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS kccuapiGetMemInterMapParams_DISPATCH(struct KernelCcuApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__kccuapiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__kccuapiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS kccuapiCheckMemInterUnmap_DISPATCH(struct KernelCcuApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__kccuapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__kccuapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS kccuapiControlSerialization_Prologue_DISPATCH(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kccuapiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kccuapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void kccuapiControlSerialization_Epilogue_DISPATCH(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kccuapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__kccuapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS kccuapiControl_Prologue_DISPATCH(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kccuapiControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kccuapiControl_Prologue__(pResource, pCallContext, pParams); } static inline void kccuapiControl_Epilogue_DISPATCH(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kccuapiControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__kccuapiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool kccuapiCanCopy_DISPATCH(struct KernelCcuApi *pResource) { - return pResource->__kccuapiCanCopy__(pResource); + return pResource->__nvoc_vtable->__kccuapiCanCopy__(pResource); } static inline NV_STATUS kccuapiIsDuplicate_DISPATCH(struct KernelCcuApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__kccuapiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__kccuapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void kccuapiPreDestruct_DISPATCH(struct KernelCcuApi *pResource) { - pResource->__kccuapiPreDestruct__(pResource); + pResource->__nvoc_vtable->__kccuapiPreDestruct__(pResource); } static inline NV_STATUS kccuapiControlFilter_DISPATCH(struct KernelCcuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kccuapiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kccuapiControlFilter__(pResource, pCallContext, pParams); } static inline NvBool kccuapiIsPartialUnmapSupported_DISPATCH(struct KernelCcuApi *pResource) { - return pResource->__kccuapiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__kccuapiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS kccuapiMapTo_DISPATCH(struct KernelCcuApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__kccuapiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__kccuapiMapTo__(pResource, pParams); } static inline NV_STATUS kccuapiUnmapFrom_DISPATCH(struct KernelCcuApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__kccuapiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__kccuapiUnmapFrom__(pResource, pParams); } static inline NvU32 kccuapiGetRefCount_DISPATCH(struct KernelCcuApi *pResource) { - return pResource->__kccuapiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__kccuapiGetRefCount__(pResource); } static inline void kccuapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelCcuApi *pResource, RsResourceRef *pReference) { - pResource->__kccuapiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__kccuapiAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS kccuapiMap_IMPL(struct KernelCcuApi *pKernelCcuApi, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); diff --git a/src/nvidia/generated/g_kernel_ccu_nvoc.c b/src/nvidia/generated/g_kernel_ccu_nvoc.c index cabd387635..3a7b2c801a 100644 --- a/src/nvidia/generated/g_kernel_ccu_nvoc.c +++ b/src/nvidia/generated/g_kernel_ccu_nvoc.c @@ -66,78 +66,96 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCcu = /*pExportInfo=*/ &__nvoc_export_info_KernelCcu }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_KernelCcu_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelCcu, ENGDESCRIPTOR engDesc); // this +NV_STATUS __nvoc_down_thunk_KernelCcu_engstateStateLoad(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags); // this +NV_STATUS __nvoc_down_thunk_KernelCcu_engstateStateUnload(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags); // this + // 3 down-thunk(s) defined to bridge methods in KernelCcu from superclasses // kccuConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelCcu_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelCcu, ENGDESCRIPTOR engDesc) { +NV_STATUS __nvoc_down_thunk_KernelCcu_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelCcu, ENGDESCRIPTOR engDesc) { return kccuConstructEngine(pGpu, (struct KernelCcu *)(((unsigned char *) pKernelCcu) - __nvoc_rtti_KernelCcu_OBJENGSTATE.offset), engDesc); } // kccuStateLoad: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelCcu_engstateStateLoad(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelCcu_engstateStateLoad(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags) { return kccuStateLoad(arg1, (struct KernelCcu *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCcu_OBJENGSTATE.offset), flags); } // kccuStateUnload: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelCcu_engstateStateUnload(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelCcu_engstateStateUnload(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags) { return kccuStateUnload(arg1, (struct KernelCcu *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCcu_OBJENGSTATE.offset), flags); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_kccuInitMissing(struct OBJGPU *pGpu, struct KernelCcu *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePreInitLocked(struct OBJGPU *pGpu, struct KernelCcu *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelCcu *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStateInitLocked(struct OBJGPU *pGpu, struct KernelCcu *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStateInitUnlocked(struct OBJGPU *pGpu, struct KernelCcu *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePreLoad(struct OBJGPU *pGpu, struct KernelCcu *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePostLoad(struct OBJGPU *pGpu, struct KernelCcu *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePreUnload(struct OBJGPU *pGpu, struct KernelCcu *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePostUnload(struct OBJGPU *pGpu, struct KernelCcu *pEngstate, NvU32 arg3); // this +void __nvoc_up_thunk_OBJENGSTATE_kccuStateDestroy(struct OBJGPU *pGpu, struct KernelCcu *pEngstate); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_kccuIsPresent(struct OBJGPU *pGpu, struct KernelCcu *pEngstate); // this + // 11 up-thunk(s) defined to bridge methods in KernelCcu to superclasses // kccuInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kccuInitMissing(struct OBJGPU *pGpu, struct KernelCcu *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kccuInitMissing(struct OBJGPU *pGpu, struct KernelCcu *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset)); } // kccuStatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePreInitLocked(struct OBJGPU *pGpu, struct KernelCcu *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePreInitLocked(struct OBJGPU *pGpu, struct KernelCcu *pEngstate) { return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset)); } // kccuStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelCcu *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelCcu *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset)); } // kccuStateInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStateInitLocked(struct OBJGPU *pGpu, struct KernelCcu *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStateInitLocked(struct OBJGPU *pGpu, struct KernelCcu *pEngstate) { return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset)); } // kccuStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStateInitUnlocked(struct OBJGPU *pGpu, struct KernelCcu *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStateInitUnlocked(struct OBJGPU *pGpu, struct KernelCcu *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset)); } // kccuStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePreLoad(struct OBJGPU *pGpu, struct KernelCcu *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePreLoad(struct OBJGPU *pGpu, struct KernelCcu *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset), arg3); } // kccuStatePostLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePostLoad(struct OBJGPU *pGpu, struct KernelCcu *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePostLoad(struct OBJGPU *pGpu, struct KernelCcu *pEngstate, NvU32 arg3) { return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset), arg3); } // kccuStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePreUnload(struct OBJGPU *pGpu, struct KernelCcu *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePreUnload(struct OBJGPU *pGpu, struct KernelCcu *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset), arg3); } // kccuStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePostUnload(struct OBJGPU *pGpu, struct KernelCcu *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kccuStatePostUnload(struct OBJGPU *pGpu, struct KernelCcu *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset), arg3); } // kccuStateDestroy: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kccuStateDestroy(struct OBJGPU *pGpu, struct KernelCcu *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kccuStateDestroy(struct OBJGPU *pGpu, struct KernelCcu *pEngstate) { engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset)); } // kccuIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_kccuIsPresent(struct OBJGPU *pGpu, struct KernelCcu *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_kccuIsPresent(struct OBJGPU *pGpu, struct KernelCcu *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCcu_OBJENGSTATE.offset)); } @@ -169,7 +187,7 @@ void __nvoc_init_dataField_KernelCcu(KernelCcu *pThis, RmHalspecOwner *pRmhalspe // NVOC Property Hal field -- PDB_PROP_KCCU_IS_MISSING if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000003UL) )) /* RmVariantHal: VF | PF_KERNEL_ONLY */ { - pThis->setProperty(pThis, PDB_PROP_KCCU_IS_MISSING, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KCCU_IS_MISSING, NV_FALSE); } } @@ -200,18 +218,6 @@ static void __nvoc_init_funcTable_KernelCcu_1(KernelCcu *pThis, RmHalspecOwner * PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); - // kccuConstructEngine -- virtual override (engstate) base (engstate) - pThis->__kccuConstructEngine__ = &kccuConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelCcu_engstateConstructEngine; - - // kccuStateLoad -- virtual override (engstate) base (engstate) - pThis->__kccuStateLoad__ = &kccuStateLoad_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelCcu_engstateStateLoad; - - // kccuStateUnload -- virtual override (engstate) base (engstate) - pThis->__kccuStateUnload__ = &kccuStateUnload_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelCcu_engstateStateUnload; - // kccuMigShrBufHandler -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { @@ -237,46 +243,49 @@ static void __nvoc_init_funcTable_KernelCcu_1(KernelCcu *pThis, RmHalspecOwner * { pThis->__kccuGetBufSize__ = &kccuGetBufSize_46f6a7; } - - // kccuInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__kccuInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kccuInitMissing; - - // kccuStatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__kccuStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStatePreInitLocked; - - // kccuStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kccuStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStatePreInitUnlocked; - - // kccuStateInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__kccuStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStateInitLocked; - - // kccuStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kccuStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStateInitUnlocked; - - // kccuStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__kccuStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStatePreLoad; - - // kccuStatePostLoad -- virtual inherited (engstate) base (engstate) - pThis->__kccuStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStatePostLoad; - - // kccuStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__kccuStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStatePreUnload; - - // kccuStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__kccuStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStatePostUnload; - - // kccuStateDestroy -- virtual inherited (engstate) base (engstate) - pThis->__kccuStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStateDestroy; - - // kccuIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__kccuIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kccuIsPresent; -} // End __nvoc_init_funcTable_KernelCcu_1 with approximately 22 basic block(s). +} // End __nvoc_init_funcTable_KernelCcu_1 with approximately 5 basic block(s). // Initialize vtable(s) for 16 virtual method(s). void __nvoc_init_funcTable_KernelCcu(KernelCcu *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 16 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelCcu vtable = { + .__kccuConstructEngine__ = &kccuConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelCcu_engstateConstructEngine, // virtual + .__kccuStateLoad__ = &kccuStateLoad_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelCcu_engstateStateLoad, // virtual + .__kccuStateUnload__ = &kccuStateUnload_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelCcu_engstateStateUnload, // virtual + .__kccuInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kccuInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__kccuStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStatePreInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__kccuStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__kccuStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStateInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &engstateStateInitLocked_IMPL, // virtual + .__kccuStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__kccuStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__kccuStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStatePostLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL, // virtual + .__kccuStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__kccuStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__kccuStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_kccuStateDestroy, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &engstateStateDestroy_IMPL, // virtual + .__kccuIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kccuIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_vtable = &vtable; // (kccu) this + + // Initialize vtable(s) with 2 per-object function pointer(s). __nvoc_init_funcTable_KernelCcu_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_ccu_nvoc.h b/src/nvidia/generated/g_kernel_ccu_nvoc.h index b8a48a62e8..094013399c 100644 --- a/src/nvidia/generated/g_kernel_ccu_nvoc.h +++ b/src/nvidia/generated/g_kernel_ccu_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -119,10 +119,15 @@ typedef struct #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelCcu; + + struct KernelCcu { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelCcu *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -132,23 +137,9 @@ struct KernelCcu { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct KernelCcu *__nvoc_pbase_KernelCcu; // kccu - // Vtable with 16 per-object function pointers - NV_STATUS (*__kccuConstructEngine__)(OBJGPU *, struct KernelCcu * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) - NV_STATUS (*__kccuStateLoad__)(OBJGPU *, struct KernelCcu * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__kccuStateUnload__)(OBJGPU *, struct KernelCcu * /*this*/, NvU32); // virtual override (engstate) base (engstate) + // Vtable with 2 per-object function pointers NV_STATUS (*__kccuMigShrBufHandler__)(OBJGPU *, struct KernelCcu * /*this*/, NvBool); // halified (2 hals) NV_STATUS (*__kccuGetBufSize__)(OBJGPU *, struct KernelCcu * /*this*/); // halified (3 hals) - void (*__kccuInitMissing__)(struct OBJGPU *, struct KernelCcu * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kccuStatePreInitLocked__)(struct OBJGPU *, struct KernelCcu * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kccuStatePreInitUnlocked__)(struct OBJGPU *, struct KernelCcu * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kccuStateInitLocked__)(struct OBJGPU *, struct KernelCcu * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kccuStateInitUnlocked__)(struct OBJGPU *, struct KernelCcu * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kccuStatePreLoad__)(struct OBJGPU *, struct KernelCcu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kccuStatePostLoad__)(struct OBJGPU *, struct KernelCcu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kccuStatePreUnload__)(struct OBJGPU *, struct KernelCcu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kccuStatePostUnload__)(struct OBJGPU *, struct KernelCcu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - void (*__kccuStateDestroy__)(struct OBJGPU *, struct KernelCcu * /*this*/); // virtual inherited (engstate) base (engstate) - NvBool (*__kccuIsPresent__)(struct OBJGPU *, struct KernelCcu * /*this*/); // virtual inherited (engstate) base (engstate) // 1 PDB property @@ -163,6 +154,27 @@ struct KernelCcu { NvU32 migSharedBufSize; }; + +// Metadata including vtable with 14 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelCcu { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + + NV_STATUS (*__kccuConstructEngine__)(OBJGPU *, struct KernelCcu * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kccuStateLoad__)(OBJGPU *, struct KernelCcu * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kccuStateUnload__)(OBJGPU *, struct KernelCcu * /*this*/, NvU32); // virtual override (engstate) base (engstate) + void (*__kccuInitMissing__)(struct OBJGPU *, struct KernelCcu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kccuStatePreInitLocked__)(struct OBJGPU *, struct KernelCcu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kccuStatePreInitUnlocked__)(struct OBJGPU *, struct KernelCcu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kccuStateInitLocked__)(struct OBJGPU *, struct KernelCcu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kccuStateInitUnlocked__)(struct OBJGPU *, struct KernelCcu * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kccuStatePreLoad__)(struct OBJGPU *, struct KernelCcu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kccuStatePostLoad__)(struct OBJGPU *, struct KernelCcu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kccuStatePreUnload__)(struct OBJGPU *, struct KernelCcu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kccuStatePostUnload__)(struct OBJGPU *, struct KernelCcu * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__kccuStateDestroy__)(struct OBJGPU *, struct KernelCcu * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__kccuIsPresent__)(struct OBJGPU *, struct KernelCcu * /*this*/); // virtual inherited (engstate) base (engstate) +}; + #ifndef __NVOC_CLASS_KernelCcu_TYPEDEF__ #define __NVOC_CLASS_KernelCcu_TYPEDEF__ typedef struct KernelCcu KernelCcu; @@ -197,11 +209,11 @@ NV_STATUS __nvoc_objCreate_KernelCcu(KernelCcu**, Dynamic*, NvU32); // Wrapper macros -#define kccuConstructEngine_FNPTR(pKernelCcu) pKernelCcu->__kccuConstructEngine__ +#define kccuConstructEngine_FNPTR(pKernelCcu) pKernelCcu->__nvoc_vtable->__kccuConstructEngine__ #define kccuConstructEngine(pGpu, pKernelCcu, engDesc) kccuConstructEngine_DISPATCH(pGpu, pKernelCcu, engDesc) -#define kccuStateLoad_FNPTR(arg_this) arg_this->__kccuStateLoad__ +#define kccuStateLoad_FNPTR(arg_this) arg_this->__nvoc_vtable->__kccuStateLoad__ #define kccuStateLoad(arg1, arg_this, flags) kccuStateLoad_DISPATCH(arg1, arg_this, flags) -#define kccuStateUnload_FNPTR(arg_this) arg_this->__kccuStateUnload__ +#define kccuStateUnload_FNPTR(arg_this) arg_this->__nvoc_vtable->__kccuStateUnload__ #define kccuStateUnload(arg1, arg_this, flags) kccuStateUnload_DISPATCH(arg1, arg_this, flags) #define kccuMigShrBufHandler_FNPTR(arg_this) arg_this->__kccuMigShrBufHandler__ #define kccuMigShrBufHandler(arg1, arg_this, bMigEnabled) kccuMigShrBufHandler_DISPATCH(arg1, arg_this, bMigEnabled) @@ -209,40 +221,40 @@ NV_STATUS __nvoc_objCreate_KernelCcu(KernelCcu**, Dynamic*, NvU32); #define kccuGetBufSize_FNPTR(arg_this) arg_this->__kccuGetBufSize__ #define kccuGetBufSize(arg1, arg_this) kccuGetBufSize_DISPATCH(arg1, arg_this) #define kccuGetBufSize_HAL(arg1, arg_this) kccuGetBufSize_DISPATCH(arg1, arg_this) -#define kccuInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define kccuInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define kccuInitMissing(pGpu, pEngstate) kccuInitMissing_DISPATCH(pGpu, pEngstate) -#define kccuStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define kccuStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define kccuStatePreInitLocked(pGpu, pEngstate) kccuStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define kccuStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define kccuStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define kccuStatePreInitUnlocked(pGpu, pEngstate) kccuStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kccuStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define kccuStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitLocked__ #define kccuStateInitLocked(pGpu, pEngstate) kccuStateInitLocked_DISPATCH(pGpu, pEngstate) -#define kccuStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kccuStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define kccuStateInitUnlocked(pGpu, pEngstate) kccuStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kccuStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kccuStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define kccuStatePreLoad(pGpu, pEngstate, arg3) kccuStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kccuStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define kccuStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostLoad__ #define kccuStatePostLoad(pGpu, pEngstate, arg3) kccuStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kccuStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kccuStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define kccuStatePreUnload(pGpu, pEngstate, arg3) kccuStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kccuStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kccuStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define kccuStatePostUnload(pGpu, pEngstate, arg3) kccuStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kccuStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define kccuStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateDestroy__ #define kccuStateDestroy(pGpu, pEngstate) kccuStateDestroy_DISPATCH(pGpu, pEngstate) -#define kccuIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define kccuIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define kccuIsPresent(pGpu, pEngstate) kccuIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS kccuConstructEngine_DISPATCH(OBJGPU *pGpu, struct KernelCcu *pKernelCcu, ENGDESCRIPTOR engDesc) { - return pKernelCcu->__kccuConstructEngine__(pGpu, pKernelCcu, engDesc); + return pKernelCcu->__nvoc_vtable->__kccuConstructEngine__(pGpu, pKernelCcu, engDesc); } static inline NV_STATUS kccuStateLoad_DISPATCH(OBJGPU *arg1, struct KernelCcu *arg_this, NvU32 flags) { - return arg_this->__kccuStateLoad__(arg1, arg_this, flags); + return arg_this->__nvoc_vtable->__kccuStateLoad__(arg1, arg_this, flags); } static inline NV_STATUS kccuStateUnload_DISPATCH(OBJGPU *arg1, struct KernelCcu *arg_this, NvU32 flags) { - return arg_this->__kccuStateUnload__(arg1, arg_this, flags); + return arg_this->__nvoc_vtable->__kccuStateUnload__(arg1, arg_this, flags); } static inline NV_STATUS kccuMigShrBufHandler_DISPATCH(OBJGPU *arg1, struct KernelCcu *arg_this, NvBool bMigEnabled) { @@ -254,47 +266,47 @@ static inline NV_STATUS kccuGetBufSize_DISPATCH(OBJGPU *arg1, struct KernelCcu * } static inline void kccuInitMissing_DISPATCH(struct OBJGPU *pGpu, struct KernelCcu *pEngstate) { - pEngstate->__kccuInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kccuInitMissing__(pGpu, pEngstate); } static inline NV_STATUS kccuStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelCcu *pEngstate) { - return pEngstate->__kccuStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kccuStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS kccuStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelCcu *pEngstate) { - return pEngstate->__kccuStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kccuStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kccuStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelCcu *pEngstate) { - return pEngstate->__kccuStateInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kccuStateInitLocked__(pGpu, pEngstate); } static inline NV_STATUS kccuStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelCcu *pEngstate) { - return pEngstate->__kccuStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kccuStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kccuStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelCcu *pEngstate, NvU32 arg3) { - return pEngstate->__kccuStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kccuStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kccuStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelCcu *pEngstate, NvU32 arg3) { - return pEngstate->__kccuStatePostLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kccuStatePostLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kccuStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelCcu *pEngstate, NvU32 arg3) { - return pEngstate->__kccuStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kccuStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS kccuStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelCcu *pEngstate, NvU32 arg3) { - return pEngstate->__kccuStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kccuStatePostUnload__(pGpu, pEngstate, arg3); } static inline void kccuStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct KernelCcu *pEngstate) { - pEngstate->__kccuStateDestroy__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kccuStateDestroy__(pGpu, pEngstate); } static inline NvBool kccuIsPresent_DISPATCH(struct OBJGPU *pGpu, struct KernelCcu *pEngstate) { - return pEngstate->__kccuIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kccuIsPresent__(pGpu, pEngstate); } NV_STATUS kccuConstructEngine_IMPL(OBJGPU *pGpu, struct KernelCcu *pKernelCcu, ENGDESCRIPTOR engDesc); diff --git a/src/nvidia/generated/g_kernel_ce_context_nvoc.c b/src/nvidia/generated/g_kernel_ce_context_nvoc.c index 80a4e25552..ed0a9f32b9 100644 --- a/src/nvidia/generated/g_kernel_ce_context_nvoc.c +++ b/src/nvidia/generated/g_kernel_ce_context_nvoc.c @@ -120,165 +120,275 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCeContext = /*pExportInfo=*/ &__nvoc_export_info_KernelCeContext }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super^2 +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super^2 +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap(struct RmResource *pChannelDescendant, NvBool bSubdeviceHandleProvided); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^3 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^3 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^3 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super^2 +NV_STATUS __nvoc_up_thunk_GpuResource_chandesControl(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesMap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesUnmap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_GpuResource_chandesShareCallback(struct ChannelDescendant *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize(struct ChannelDescendant *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesInternalControlForward(struct ChannelDescendant *pGpuResource, NvU32 command, void *pParams, NvU32 size); // super +NvHandle __nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle(struct ChannelDescendant *pGpuResource); // super +NvBool __nvoc_up_thunk_RmResource_chandesAccessCallback(struct ChannelDescendant *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemInterMapParams(struct ChannelDescendant *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor(struct ChannelDescendant *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControl_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControl_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesCanCopy(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesIsDuplicate(struct ChannelDescendant *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_chandesPreDestruct(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesControlFilter(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesMapTo(struct ChannelDescendant *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesUnmapFrom(struct ChannelDescendant *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_chandesGetRefCount(struct ChannelDescendant *pResource); // super +void __nvoc_up_thunk_RsResource_chandesAddAdditionalDependants(struct RsClient *pClient, struct ChannelDescendant *pResource, RsResourceRef *pReference); // super +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_chandesGetNotificationListPtr(struct ChannelDescendant *pNotifier); // super +struct NotifShare * __nvoc_up_thunk_Notifier_chandesGetNotificationShare(struct ChannelDescendant *pNotifier); // super +void __nvoc_up_thunk_Notifier_chandesSetNotificationShare(struct ChannelDescendant *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesUnregisterEvent(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_up_thunk_ChannelDescendant_kcectxGetSwMethods(struct KernelCeContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods); // this +NvBool __nvoc_up_thunk_ChannelDescendant_kcectxIsSwMethodStalling(struct KernelCeContext *pChannelDescendant, NvU32 hHandle); // this +NV_STATUS __nvoc_up_thunk_ChannelDescendant_kcectxCheckMemInterUnmap(struct KernelCeContext *pChannelDescendant, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kcectxControl(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kcectxMap(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kcectxUnmap(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_kcectxShareCallback(struct KernelCeContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kcectxGetRegBaseOffsetAndSize(struct KernelCeContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kcectxGetMapAddrSpace(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kcectxInternalControlForward(struct KernelCeContext *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_kcectxGetInternalObjectHandle(struct KernelCeContext *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_kcectxAccessCallback(struct KernelCeContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_kcectxGetMemInterMapParams(struct KernelCeContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_kcectxGetMemoryMappingDescriptor(struct KernelCeContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_kcectxControlSerialization_Prologue(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_kcectxControlSerialization_Epilogue(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_kcectxControl_Prologue(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_kcectxControl_Epilogue(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_kcectxCanCopy(struct KernelCeContext *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_kcectxIsDuplicate(struct KernelCeContext *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_kcectxPreDestruct(struct KernelCeContext *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_kcectxControlFilter(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_kcectxIsPartialUnmapSupported(struct KernelCeContext *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_kcectxMapTo(struct KernelCeContext *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_kcectxUnmapFrom(struct KernelCeContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_kcectxGetRefCount(struct KernelCeContext *pResource); // this +void __nvoc_up_thunk_RsResource_kcectxAddAdditionalDependants(struct RsClient *pClient, struct KernelCeContext *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_kcectxGetNotificationListPtr(struct KernelCeContext *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_kcectxGetNotificationShare(struct KernelCeContext *pNotifier); // this +void __nvoc_up_thunk_Notifier_kcectxSetNotificationShare(struct KernelCeContext *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_kcectxUnregisterEvent(struct KernelCeContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_kcectxGetOrAllocNotifShare(struct KernelCeContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 32 up-thunk(s) defined to bridge methods in KernelCeContext to superclasses // kcectxGetSwMethods: virtual inherited (chandes) base (chandes) -static NV_STATUS __nvoc_up_thunk_ChannelDescendant_kcectxGetSwMethods(struct KernelCeContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { +NV_STATUS __nvoc_up_thunk_ChannelDescendant_kcectxGetSwMethods(struct KernelCeContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { return chandesGetSwMethods((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_KernelCeContext_ChannelDescendant.offset), ppMethods, pNumMethods); } // kcectxIsSwMethodStalling: virtual inherited (chandes) base (chandes) -static NvBool __nvoc_up_thunk_ChannelDescendant_kcectxIsSwMethodStalling(struct KernelCeContext *pChannelDescendant, NvU32 hHandle) { +NvBool __nvoc_up_thunk_ChannelDescendant_kcectxIsSwMethodStalling(struct KernelCeContext *pChannelDescendant, NvU32 hHandle) { return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_KernelCeContext_ChannelDescendant.offset), hHandle); } // kcectxCheckMemInterUnmap: virtual inherited (chandes) base (chandes) -static NV_STATUS __nvoc_up_thunk_ChannelDescendant_kcectxCheckMemInterUnmap(struct KernelCeContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_ChannelDescendant_kcectxCheckMemInterUnmap(struct KernelCeContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_KernelCeContext_ChannelDescendant.offset), bSubdeviceHandleProvided); } // kcectxControl: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_kcectxControl(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_kcectxControl(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset), pCallContext, pParams); } // kcectxMap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_kcectxMap(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_kcectxMap(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // kcectxUnmap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_kcectxUnmap(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_kcectxUnmap(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset), pCallContext, pCpuMapping); } // kcectxShareCallback: virtual inherited (gpures) base (chandes) -static NvBool __nvoc_up_thunk_GpuResource_kcectxShareCallback(struct KernelCeContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_kcectxShareCallback(struct KernelCeContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // kcectxGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_kcectxGetRegBaseOffsetAndSize(struct KernelCeContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_kcectxGetRegBaseOffsetAndSize(struct KernelCeContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset), pGpu, pOffset, pSize); } // kcectxGetMapAddrSpace: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_kcectxGetMapAddrSpace(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_kcectxGetMapAddrSpace(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // kcectxInternalControlForward: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_kcectxInternalControlForward(struct KernelCeContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_kcectxInternalControlForward(struct KernelCeContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset), command, pParams, size); } // kcectxGetInternalObjectHandle: virtual inherited (gpures) base (chandes) -static NvHandle __nvoc_up_thunk_GpuResource_kcectxGetInternalObjectHandle(struct KernelCeContext *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_kcectxGetInternalObjectHandle(struct KernelCeContext *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCeContext_GpuResource.offset)); } // kcectxAccessCallback: virtual inherited (rmres) base (chandes) -static NvBool __nvoc_up_thunk_RmResource_kcectxAccessCallback(struct KernelCeContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_kcectxAccessCallback(struct KernelCeContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // kcectxGetMemInterMapParams: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_kcectxGetMemInterMapParams(struct KernelCeContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_kcectxGetMemInterMapParams(struct KernelCeContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelCeContext_RmResource.offset), pParams); } // kcectxGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_kcectxGetMemoryMappingDescriptor(struct KernelCeContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_kcectxGetMemoryMappingDescriptor(struct KernelCeContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelCeContext_RmResource.offset), ppMemDesc); } // kcectxControlSerialization_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_kcectxControlSerialization_Prologue(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_kcectxControlSerialization_Prologue(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RmResource.offset), pCallContext, pParams); } // kcectxControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_kcectxControlSerialization_Epilogue(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_kcectxControlSerialization_Epilogue(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RmResource.offset), pCallContext, pParams); } // kcectxControl_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_kcectxControl_Prologue(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_kcectxControl_Prologue(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RmResource.offset), pCallContext, pParams); } // kcectxControl_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_kcectxControl_Epilogue(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_kcectxControl_Epilogue(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RmResource.offset), pCallContext, pParams); } // kcectxCanCopy: virtual inherited (res) base (chandes) -static NvBool __nvoc_up_thunk_RsResource_kcectxCanCopy(struct KernelCeContext *pResource) { +NvBool __nvoc_up_thunk_RsResource_kcectxCanCopy(struct KernelCeContext *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset)); } // kcectxIsDuplicate: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_kcectxIsDuplicate(struct KernelCeContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_kcectxIsDuplicate(struct KernelCeContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset), hMemory, pDuplicate); } // kcectxPreDestruct: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_kcectxPreDestruct(struct KernelCeContext *pResource) { +void __nvoc_up_thunk_RsResource_kcectxPreDestruct(struct KernelCeContext *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset)); } // kcectxControlFilter: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_kcectxControlFilter(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kcectxControlFilter(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset), pCallContext, pParams); } // kcectxIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body -static NvBool __nvoc_up_thunk_RsResource_kcectxIsPartialUnmapSupported(struct KernelCeContext *pResource) { +NvBool __nvoc_up_thunk_RsResource_kcectxIsPartialUnmapSupported(struct KernelCeContext *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset)); } // kcectxMapTo: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_kcectxMapTo(struct KernelCeContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kcectxMapTo(struct KernelCeContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset), pParams); } // kcectxUnmapFrom: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_kcectxUnmapFrom(struct KernelCeContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kcectxUnmapFrom(struct KernelCeContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset), pParams); } // kcectxGetRefCount: virtual inherited (res) base (chandes) -static NvU32 __nvoc_up_thunk_RsResource_kcectxGetRefCount(struct KernelCeContext *pResource) { +NvU32 __nvoc_up_thunk_RsResource_kcectxGetRefCount(struct KernelCeContext *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset)); } // kcectxAddAdditionalDependants: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_kcectxAddAdditionalDependants(struct RsClient *pClient, struct KernelCeContext *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_kcectxAddAdditionalDependants(struct RsClient *pClient, struct KernelCeContext *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCeContext_RsResource.offset), pReference); } // kcectxGetNotificationListPtr: virtual inherited (notify) base (chandes) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_kcectxGetNotificationListPtr(struct KernelCeContext *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_kcectxGetNotificationListPtr(struct KernelCeContext *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelCeContext_Notifier.offset)); } // kcectxGetNotificationShare: virtual inherited (notify) base (chandes) -static struct NotifShare * __nvoc_up_thunk_Notifier_kcectxGetNotificationShare(struct KernelCeContext *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_kcectxGetNotificationShare(struct KernelCeContext *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelCeContext_Notifier.offset)); } // kcectxSetNotificationShare: virtual inherited (notify) base (chandes) -static void __nvoc_up_thunk_Notifier_kcectxSetNotificationShare(struct KernelCeContext *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_kcectxSetNotificationShare(struct KernelCeContext *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelCeContext_Notifier.offset), pNotifShare); } // kcectxUnregisterEvent: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_kcectxUnregisterEvent(struct KernelCeContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_kcectxUnregisterEvent(struct KernelCeContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelCeContext_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // kcectxGetOrAllocNotifShare: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_kcectxGetOrAllocNotifShare(struct KernelCeContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_kcectxGetOrAllocNotifShare(struct KernelCeContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelCeContext_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -322,109 +432,162 @@ NV_STATUS __nvoc_ctor_KernelCeContext(KernelCeContext *pThis, RmHalspecOwner *pR // Vtable initialization static void __nvoc_init_funcTable_KernelCeContext_1(KernelCeContext *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // kcectxGetSwMethods -- virtual inherited (chandes) base (chandes) - pThis->__kcectxGetSwMethods__ = &__nvoc_up_thunk_ChannelDescendant_kcectxGetSwMethods; - - // kcectxIsSwMethodStalling -- virtual inherited (chandes) base (chandes) - pThis->__kcectxIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_kcectxIsSwMethodStalling; - - // kcectxCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) - pThis->__kcectxCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_kcectxCheckMemInterUnmap; - - // kcectxControl -- virtual inherited (gpures) base (chandes) - pThis->__kcectxControl__ = &__nvoc_up_thunk_GpuResource_kcectxControl; - - // kcectxMap -- virtual inherited (gpures) base (chandes) - pThis->__kcectxMap__ = &__nvoc_up_thunk_GpuResource_kcectxMap; - - // kcectxUnmap -- virtual inherited (gpures) base (chandes) - pThis->__kcectxUnmap__ = &__nvoc_up_thunk_GpuResource_kcectxUnmap; - - // kcectxShareCallback -- virtual inherited (gpures) base (chandes) - pThis->__kcectxShareCallback__ = &__nvoc_up_thunk_GpuResource_kcectxShareCallback; - - // kcectxGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) - pThis->__kcectxGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kcectxGetRegBaseOffsetAndSize; - - // kcectxGetMapAddrSpace -- virtual inherited (gpures) base (chandes) - pThis->__kcectxGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_kcectxGetMapAddrSpace; - - // kcectxInternalControlForward -- virtual inherited (gpures) base (chandes) - pThis->__kcectxInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kcectxInternalControlForward; - - // kcectxGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) - pThis->__kcectxGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_kcectxGetInternalObjectHandle; - - // kcectxAccessCallback -- virtual inherited (rmres) base (chandes) - pThis->__kcectxAccessCallback__ = &__nvoc_up_thunk_RmResource_kcectxAccessCallback; - - // kcectxGetMemInterMapParams -- virtual inherited (rmres) base (chandes) - pThis->__kcectxGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_kcectxGetMemInterMapParams; - - // kcectxGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) - pThis->__kcectxGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_kcectxGetMemoryMappingDescriptor; - - // kcectxControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__kcectxControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kcectxControlSerialization_Prologue; - - // kcectxControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__kcectxControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kcectxControlSerialization_Epilogue; - - // kcectxControl_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__kcectxControl_Prologue__ = &__nvoc_up_thunk_RmResource_kcectxControl_Prologue; - - // kcectxControl_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__kcectxControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kcectxControl_Epilogue; - - // kcectxCanCopy -- virtual inherited (res) base (chandes) - pThis->__kcectxCanCopy__ = &__nvoc_up_thunk_RsResource_kcectxCanCopy; - - // kcectxIsDuplicate -- virtual inherited (res) base (chandes) - pThis->__kcectxIsDuplicate__ = &__nvoc_up_thunk_RsResource_kcectxIsDuplicate; - - // kcectxPreDestruct -- virtual inherited (res) base (chandes) - pThis->__kcectxPreDestruct__ = &__nvoc_up_thunk_RsResource_kcectxPreDestruct; - - // kcectxControlFilter -- virtual inherited (res) base (chandes) - pThis->__kcectxControlFilter__ = &__nvoc_up_thunk_RsResource_kcectxControlFilter; - - // kcectxIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body - pThis->__kcectxIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kcectxIsPartialUnmapSupported; - - // kcectxMapTo -- virtual inherited (res) base (chandes) - pThis->__kcectxMapTo__ = &__nvoc_up_thunk_RsResource_kcectxMapTo; - - // kcectxUnmapFrom -- virtual inherited (res) base (chandes) - pThis->__kcectxUnmapFrom__ = &__nvoc_up_thunk_RsResource_kcectxUnmapFrom; - - // kcectxGetRefCount -- virtual inherited (res) base (chandes) - pThis->__kcectxGetRefCount__ = &__nvoc_up_thunk_RsResource_kcectxGetRefCount; - - // kcectxAddAdditionalDependants -- virtual inherited (res) base (chandes) - pThis->__kcectxAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kcectxAddAdditionalDependants; - - // kcectxGetNotificationListPtr -- virtual inherited (notify) base (chandes) - pThis->__kcectxGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_kcectxGetNotificationListPtr; - - // kcectxGetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__kcectxGetNotificationShare__ = &__nvoc_up_thunk_Notifier_kcectxGetNotificationShare; - - // kcectxSetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__kcectxSetNotificationShare__ = &__nvoc_up_thunk_Notifier_kcectxSetNotificationShare; - - // kcectxUnregisterEvent -- virtual inherited (notify) base (chandes) - pThis->__kcectxUnregisterEvent__ = &__nvoc_up_thunk_Notifier_kcectxUnregisterEvent; - - // kcectxGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) - pThis->__kcectxGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_kcectxGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_KernelCeContext_1 with approximately 32 basic block(s). +} // End __nvoc_init_funcTable_KernelCeContext_1 // Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_KernelCeContext(KernelCeContext *pThis) { - // Initialize vtable(s) with 32 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelCeContext vtable = { + .__kcectxGetSwMethods__ = &__nvoc_up_thunk_ChannelDescendant_kcectxGetSwMethods, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesGetSwMethods__ = &chandesGetSwMethods_IMPL, // virtual + .__kcectxIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_kcectxIsSwMethodStalling, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesIsSwMethodStalling__ = &chandesIsSwMethodStalling_IMPL, // virtual + .__kcectxCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_kcectxCheckMemInterUnmap, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesCheckMemInterUnmap__ = &chandesCheckMemInterUnmap_IMPL, // virtual override (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap, // virtual + .__kcectxControl__ = &__nvoc_up_thunk_GpuResource_kcectxControl, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesControl__ = &__nvoc_up_thunk_GpuResource_chandesControl, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__kcectxMap__ = &__nvoc_up_thunk_GpuResource_kcectxMap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesMap__ = &__nvoc_up_thunk_GpuResource_chandesMap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__kcectxUnmap__ = &__nvoc_up_thunk_GpuResource_kcectxUnmap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesUnmap__ = &__nvoc_up_thunk_GpuResource_chandesUnmap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__kcectxShareCallback__ = &__nvoc_up_thunk_GpuResource_kcectxShareCallback, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesShareCallback__ = &__nvoc_up_thunk_GpuResource_chandesShareCallback, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__kcectxGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kcectxGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__kcectxGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_kcectxGetMapAddrSpace, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__kcectxInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kcectxInternalControlForward, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesInternalControlForward__ = &__nvoc_up_thunk_GpuResource_chandesInternalControlForward, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__kcectxGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_kcectxGetInternalObjectHandle, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__kcectxAccessCallback__ = &__nvoc_up_thunk_RmResource_kcectxAccessCallback, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesAccessCallback__ = &__nvoc_up_thunk_RmResource_chandesAccessCallback, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__kcectxGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_kcectxGetMemInterMapParams, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_chandesGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__kcectxGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_kcectxGetMemoryMappingDescriptor, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__kcectxControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kcectxControlSerialization_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__kcectxControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kcectxControlSerialization_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__kcectxControl_Prologue__ = &__nvoc_up_thunk_RmResource_kcectxControl_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControl_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__kcectxControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kcectxControl_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControl_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__kcectxCanCopy__ = &__nvoc_up_thunk_RsResource_kcectxCanCopy, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesCanCopy__ = &__nvoc_up_thunk_RsResource_chandesCanCopy, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__kcectxIsDuplicate__ = &__nvoc_up_thunk_RsResource_kcectxIsDuplicate, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesIsDuplicate__ = &__nvoc_up_thunk_RsResource_chandesIsDuplicate, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__kcectxPreDestruct__ = &__nvoc_up_thunk_RsResource_kcectxPreDestruct, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesPreDestruct__ = &__nvoc_up_thunk_RsResource_chandesPreDestruct, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__kcectxControlFilter__ = &__nvoc_up_thunk_RsResource_kcectxControlFilter, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesControlFilter__ = &__nvoc_up_thunk_RsResource_chandesControlFilter, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__kcectxIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kcectxIsPartialUnmapSupported, // inline virtual inherited (res) base (chandes) body + .ChannelDescendant.__chandesIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .ChannelDescendant.GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .ChannelDescendant.GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__kcectxMapTo__ = &__nvoc_up_thunk_RsResource_kcectxMapTo, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesMapTo__ = &__nvoc_up_thunk_RsResource_chandesMapTo, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__kcectxUnmapFrom__ = &__nvoc_up_thunk_RsResource_kcectxUnmapFrom, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesUnmapFrom__ = &__nvoc_up_thunk_RsResource_chandesUnmapFrom, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__kcectxGetRefCount__ = &__nvoc_up_thunk_RsResource_kcectxGetRefCount, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesGetRefCount__ = &__nvoc_up_thunk_RsResource_chandesGetRefCount, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__kcectxAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kcectxAddAdditionalDependants, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_chandesAddAdditionalDependants, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__kcectxGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_kcectxGetNotificationListPtr, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationListPtr, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__kcectxGetNotificationShare__ = &__nvoc_up_thunk_Notifier_kcectxGetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__kcectxSetNotificationShare__ = &__nvoc_up_thunk_Notifier_kcectxSetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesSetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesSetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__kcectxUnregisterEvent__ = &__nvoc_up_thunk_Notifier_kcectxUnregisterEvent, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesUnregisterEvent__ = &__nvoc_up_thunk_Notifier_chandesUnregisterEvent, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__kcectxGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_kcectxGetOrAllocNotifShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource.RsResource; // (res) super^4 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource; // (rmres) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource; // (gpures) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier.INotifier; // (inotify) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier; // (notify) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_vtable = &vtable.ChannelDescendant; // (chandes) super + pThis->__nvoc_vtable = &vtable; // (kcectx) this __nvoc_init_funcTable_KernelCeContext_1(pThis); } diff --git a/src/nvidia/generated/g_kernel_ce_context_nvoc.h b/src/nvidia/generated/g_kernel_ce_context_nvoc.h index a99e1cd31d..d21d36ec20 100644 --- a/src/nvidia/generated/g_kernel_ce_context_nvoc.h +++ b/src/nvidia/generated/g_kernel_ce_context_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -64,10 +64,15 @@ ENGDESCRIPTOR kceGetEngineDescFromAllocParams(struct OBJGPU *pGpu, NvU32 externa #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelCeContext; + + struct KernelCeContext { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelCeContext *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; @@ -82,8 +87,13 @@ struct KernelCeContext { struct Notifier *__nvoc_pbase_Notifier; // notify super^2 struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super struct KernelCeContext *__nvoc_pbase_KernelCeContext; // kcectx +}; + + +// Metadata including vtable with 32 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelCeContext { + const struct NVOC_VTABLE__ChannelDescendant ChannelDescendant; // (chandes) 32 function pointers - // Vtable with 32 per-object function pointers NV_STATUS (*__kcectxGetSwMethods__)(struct KernelCeContext * /*this*/, const METHOD **, NvU32 *); // virtual inherited (chandes) base (chandes) NvBool (*__kcectxIsSwMethodStalling__)(struct KernelCeContext * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) NV_STATUS (*__kcectxCheckMemInterUnmap__)(struct KernelCeContext * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) @@ -148,198 +158,198 @@ NV_STATUS __nvoc_objCreate_KernelCeContext(KernelCeContext**, Dynamic*, NvU32, C // Wrapper macros -#define kcectxGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ +#define kcectxGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesGetSwMethods__ #define kcectxGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) kcectxGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) -#define kcectxIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ +#define kcectxIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesIsSwMethodStalling__ #define kcectxIsSwMethodStalling(pChannelDescendant, hHandle) kcectxIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define kcectxCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ +#define kcectxCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesCheckMemInterUnmap__ #define kcectxCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) kcectxCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) -#define kcectxControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define kcectxControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define kcectxControl(pGpuResource, pCallContext, pParams) kcectxControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define kcectxMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define kcectxMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define kcectxMap(pGpuResource, pCallContext, pParams, pCpuMapping) kcectxMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define kcectxUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define kcectxUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define kcectxUnmap(pGpuResource, pCallContext, pCpuMapping) kcectxUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define kcectxShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ +#define kcectxShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define kcectxShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) kcectxShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define kcectxGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define kcectxGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define kcectxGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) kcectxGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define kcectxGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define kcectxGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define kcectxGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) kcectxGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define kcectxInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define kcectxInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define kcectxInternalControlForward(pGpuResource, command, pParams, size) kcectxInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define kcectxGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define kcectxGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define kcectxGetInternalObjectHandle(pGpuResource) kcectxGetInternalObjectHandle_DISPATCH(pGpuResource) -#define kcectxAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define kcectxAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define kcectxAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kcectxAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define kcectxGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define kcectxGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define kcectxGetMemInterMapParams(pRmResource, pParams) kcectxGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define kcectxGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define kcectxGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define kcectxGetMemoryMappingDescriptor(pRmResource, ppMemDesc) kcectxGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define kcectxControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define kcectxControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define kcectxControlSerialization_Prologue(pResource, pCallContext, pParams) kcectxControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define kcectxControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define kcectxControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define kcectxControlSerialization_Epilogue(pResource, pCallContext, pParams) kcectxControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kcectxControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define kcectxControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define kcectxControl_Prologue(pResource, pCallContext, pParams) kcectxControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define kcectxControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define kcectxControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define kcectxControl_Epilogue(pResource, pCallContext, pParams) kcectxControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kcectxCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define kcectxCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define kcectxCanCopy(pResource) kcectxCanCopy_DISPATCH(pResource) -#define kcectxIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define kcectxIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define kcectxIsDuplicate(pResource, hMemory, pDuplicate) kcectxIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define kcectxPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define kcectxPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define kcectxPreDestruct(pResource) kcectxPreDestruct_DISPATCH(pResource) -#define kcectxControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define kcectxControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define kcectxControlFilter(pResource, pCallContext, pParams) kcectxControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define kcectxIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define kcectxIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define kcectxIsPartialUnmapSupported(pResource) kcectxIsPartialUnmapSupported_DISPATCH(pResource) -#define kcectxMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define kcectxMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define kcectxMapTo(pResource, pParams) kcectxMapTo_DISPATCH(pResource, pParams) -#define kcectxUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define kcectxUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define kcectxUnmapFrom(pResource, pParams) kcectxUnmapFrom_DISPATCH(pResource, pParams) -#define kcectxGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define kcectxGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define kcectxGetRefCount(pResource) kcectxGetRefCount_DISPATCH(pResource) -#define kcectxAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define kcectxAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define kcectxAddAdditionalDependants(pClient, pResource, pReference) kcectxAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define kcectxGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define kcectxGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define kcectxGetNotificationListPtr(pNotifier) kcectxGetNotificationListPtr_DISPATCH(pNotifier) -#define kcectxGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define kcectxGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define kcectxGetNotificationShare(pNotifier) kcectxGetNotificationShare_DISPATCH(pNotifier) -#define kcectxSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define kcectxSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define kcectxSetNotificationShare(pNotifier, pNotifShare) kcectxSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define kcectxUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define kcectxUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define kcectxUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) kcectxUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define kcectxGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define kcectxGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define kcectxGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) kcectxGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS kcectxGetSwMethods_DISPATCH(struct KernelCeContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { - return pChannelDescendant->__kcectxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); + return pChannelDescendant->__nvoc_vtable->__kcectxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); } static inline NvBool kcectxIsSwMethodStalling_DISPATCH(struct KernelCeContext *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__kcectxIsSwMethodStalling__(pChannelDescendant, hHandle); + return pChannelDescendant->__nvoc_vtable->__kcectxIsSwMethodStalling__(pChannelDescendant, hHandle); } static inline NV_STATUS kcectxCheckMemInterUnmap_DISPATCH(struct KernelCeContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return pChannelDescendant->__kcectxCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); + return pChannelDescendant->__nvoc_vtable->__kcectxCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } static inline NV_STATUS kcectxControl_DISPATCH(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__kcectxControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__kcectxControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS kcectxMap_DISPATCH(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kcectxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__kcectxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS kcectxUnmap_DISPATCH(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kcectxUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__kcectxUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool kcectxShareCallback_DISPATCH(struct KernelCeContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__kcectxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__kcectxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS kcectxGetRegBaseOffsetAndSize_DISPATCH(struct KernelCeContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__kcectxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__kcectxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS kcectxGetMapAddrSpace_DISPATCH(struct KernelCeContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__kcectxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__kcectxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS kcectxInternalControlForward_DISPATCH(struct KernelCeContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__kcectxInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__kcectxInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle kcectxGetInternalObjectHandle_DISPATCH(struct KernelCeContext *pGpuResource) { - return pGpuResource->__kcectxGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__kcectxGetInternalObjectHandle__(pGpuResource); } static inline NvBool kcectxAccessCallback_DISPATCH(struct KernelCeContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__kcectxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__kcectxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS kcectxGetMemInterMapParams_DISPATCH(struct KernelCeContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__kcectxGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__kcectxGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS kcectxGetMemoryMappingDescriptor_DISPATCH(struct KernelCeContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__kcectxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__kcectxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS kcectxControlSerialization_Prologue_DISPATCH(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kcectxControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kcectxControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void kcectxControlSerialization_Epilogue_DISPATCH(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kcectxControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__kcectxControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS kcectxControl_Prologue_DISPATCH(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kcectxControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kcectxControl_Prologue__(pResource, pCallContext, pParams); } static inline void kcectxControl_Epilogue_DISPATCH(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kcectxControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__kcectxControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool kcectxCanCopy_DISPATCH(struct KernelCeContext *pResource) { - return pResource->__kcectxCanCopy__(pResource); + return pResource->__nvoc_vtable->__kcectxCanCopy__(pResource); } static inline NV_STATUS kcectxIsDuplicate_DISPATCH(struct KernelCeContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__kcectxIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__kcectxIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void kcectxPreDestruct_DISPATCH(struct KernelCeContext *pResource) { - pResource->__kcectxPreDestruct__(pResource); + pResource->__nvoc_vtable->__kcectxPreDestruct__(pResource); } static inline NV_STATUS kcectxControlFilter_DISPATCH(struct KernelCeContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kcectxControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kcectxControlFilter__(pResource, pCallContext, pParams); } static inline NvBool kcectxIsPartialUnmapSupported_DISPATCH(struct KernelCeContext *pResource) { - return pResource->__kcectxIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__kcectxIsPartialUnmapSupported__(pResource); } static inline NV_STATUS kcectxMapTo_DISPATCH(struct KernelCeContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__kcectxMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__kcectxMapTo__(pResource, pParams); } static inline NV_STATUS kcectxUnmapFrom_DISPATCH(struct KernelCeContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__kcectxUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__kcectxUnmapFrom__(pResource, pParams); } static inline NvU32 kcectxGetRefCount_DISPATCH(struct KernelCeContext *pResource) { - return pResource->__kcectxGetRefCount__(pResource); + return pResource->__nvoc_vtable->__kcectxGetRefCount__(pResource); } static inline void kcectxAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelCeContext *pResource, RsResourceRef *pReference) { - pResource->__kcectxAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__kcectxAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * kcectxGetNotificationListPtr_DISPATCH(struct KernelCeContext *pNotifier) { - return pNotifier->__kcectxGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__kcectxGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * kcectxGetNotificationShare_DISPATCH(struct KernelCeContext *pNotifier) { - return pNotifier->__kcectxGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__kcectxGetNotificationShare__(pNotifier); } static inline void kcectxSetNotificationShare_DISPATCH(struct KernelCeContext *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__kcectxSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__kcectxSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS kcectxUnregisterEvent_DISPATCH(struct KernelCeContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__kcectxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__kcectxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS kcectxGetOrAllocNotifShare_DISPATCH(struct KernelCeContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__kcectxGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__kcectxGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS kcectxConstruct_IMPL(struct KernelCeContext *arg_pKCeContext, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_kernel_ce_nvoc.c b/src/nvidia/generated/g_kernel_ce_nvoc.c index d872629850..13c9e64949 100644 --- a/src/nvidia/generated/g_kernel_ce_nvoc.c +++ b/src/nvidia/generated/g_kernel_ce_nvoc.c @@ -75,98 +75,120 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCE = /*pExportInfo=*/ &__nvoc_export_info_KernelCE }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_KernelCE_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKCe, ENGDESCRIPTOR arg3); // this +NvBool __nvoc_down_thunk_KernelCE_engstateIsPresent(OBJGPU *pGpu, struct OBJENGSTATE *pKCe); // this +NV_STATUS __nvoc_down_thunk_KernelCE_engstateStateInitLocked(OBJGPU *arg1, struct OBJENGSTATE *arg_this); // this +NV_STATUS __nvoc_down_thunk_KernelCE_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKCe, NvU32 flags); // this +NV_STATUS __nvoc_down_thunk_KernelCE_engstateStateLoad(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3); // this +void __nvoc_down_thunk_KernelCE_engstateStateDestroy(OBJGPU *arg1, struct OBJENGSTATE *arg_this); // this +void __nvoc_down_thunk_KernelCE_intrservRegisterIntrService(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceRecord arg3[175]); // this +NV_STATUS __nvoc_down_thunk_KernelCE_intrservServiceNotificationInterrupt(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3); // this + // 8 down-thunk(s) defined to bridge methods in KernelCE from superclasses // kceConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelCE_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKCe, ENGDESCRIPTOR arg3) { +NV_STATUS __nvoc_down_thunk_KernelCE_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKCe, ENGDESCRIPTOR arg3) { return kceConstructEngine(pGpu, (struct KernelCE *)(((unsigned char *) pKCe) - __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg3); } // kceIsPresent: virtual halified (singleton optimized) override (engstate) base (engstate) body -static NvBool __nvoc_down_thunk_KernelCE_engstateIsPresent(OBJGPU *pGpu, struct OBJENGSTATE *pKCe) { +NvBool __nvoc_down_thunk_KernelCE_engstateIsPresent(OBJGPU *pGpu, struct OBJENGSTATE *pKCe) { return kceIsPresent(pGpu, (struct KernelCE *)(((unsigned char *) pKCe) - __nvoc_rtti_KernelCE_OBJENGSTATE.offset)); } // kceStateInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelCE_engstateStateInitLocked(OBJGPU *arg1, struct OBJENGSTATE *arg_this) { +NV_STATUS __nvoc_down_thunk_KernelCE_engstateStateInitLocked(OBJGPU *arg1, struct OBJENGSTATE *arg_this) { return kceStateInitLocked(arg1, (struct KernelCE *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCE_OBJENGSTATE.offset)); } // kceStateUnload: virtual halified (singleton optimized) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_KernelCE_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKCe, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelCE_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKCe, NvU32 flags) { return kceStateUnload(pGpu, (struct KernelCE *)(((unsigned char *) pKCe) - __nvoc_rtti_KernelCE_OBJENGSTATE.offset), flags); } // kceStateLoad: virtual halified (singleton optimized) override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelCE_engstateStateLoad(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_KernelCE_engstateStateLoad(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3) { return kceStateLoad(arg1, (struct KernelCE *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg3); } // kceStateDestroy: virtual override (engstate) base (engstate) -static void __nvoc_down_thunk_KernelCE_engstateStateDestroy(OBJGPU *arg1, struct OBJENGSTATE *arg_this) { +void __nvoc_down_thunk_KernelCE_engstateStateDestroy(OBJGPU *arg1, struct OBJENGSTATE *arg_this) { kceStateDestroy(arg1, (struct KernelCE *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCE_OBJENGSTATE.offset)); } // kceRegisterIntrService: virtual override (intrserv) base (intrserv) -static void __nvoc_down_thunk_KernelCE_intrservRegisterIntrService(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceRecord arg3[175]) { +void __nvoc_down_thunk_KernelCE_intrservRegisterIntrService(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceRecord arg3[175]) { kceRegisterIntrService(arg1, (struct KernelCE *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCE_IntrService.offset), arg3); } // kceServiceNotificationInterrupt: virtual override (intrserv) base (intrserv) -static NV_STATUS __nvoc_down_thunk_KernelCE_intrservServiceNotificationInterrupt(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3) { +NV_STATUS __nvoc_down_thunk_KernelCE_intrservServiceNotificationInterrupt(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3) { return kceServiceNotificationInterrupt(arg1, (struct KernelCE *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCE_IntrService.offset), arg3); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_kceInitMissing(struct OBJGPU *pGpu, struct KernelCE *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePreInitLocked(struct OBJGPU *pGpu, struct KernelCE *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelCE *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStateInitUnlocked(struct OBJGPU *pGpu, struct KernelCE *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePreLoad(struct OBJGPU *pGpu, struct KernelCE *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePostLoad(struct OBJGPU *pGpu, struct KernelCE *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePreUnload(struct OBJGPU *pGpu, struct KernelCE *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePostUnload(struct OBJGPU *pGpu, struct KernelCE *pEngstate, NvU32 arg3); // this +NvBool __nvoc_up_thunk_IntrService_kceClearInterrupt(OBJGPU *pGpu, struct KernelCE *pIntrService, IntrServiceClearInterruptArguments *pParams); // this +NvU32 __nvoc_up_thunk_IntrService_kceServiceInterrupt(OBJGPU *pGpu, struct KernelCE *pIntrService, IntrServiceServiceInterruptArguments *pParams); // this + // 10 up-thunk(s) defined to bridge methods in KernelCE to superclasses // kceInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kceInitMissing(struct OBJGPU *pGpu, struct KernelCE *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kceInitMissing(struct OBJGPU *pGpu, struct KernelCE *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset)); } // kceStatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePreInitLocked(struct OBJGPU *pGpu, struct KernelCE *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePreInitLocked(struct OBJGPU *pGpu, struct KernelCE *pEngstate) { return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset)); } // kceStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelCE *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelCE *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset)); } // kceStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStateInitUnlocked(struct OBJGPU *pGpu, struct KernelCE *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStateInitUnlocked(struct OBJGPU *pGpu, struct KernelCE *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset)); } // kceStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePreLoad(struct OBJGPU *pGpu, struct KernelCE *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePreLoad(struct OBJGPU *pGpu, struct KernelCE *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg3); } // kceStatePostLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePostLoad(struct OBJGPU *pGpu, struct KernelCE *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePostLoad(struct OBJGPU *pGpu, struct KernelCE *pEngstate, NvU32 arg3) { return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg3); } // kceStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePreUnload(struct OBJGPU *pGpu, struct KernelCE *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePreUnload(struct OBJGPU *pGpu, struct KernelCE *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg3); } // kceStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePostUnload(struct OBJGPU *pGpu, struct KernelCE *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kceStatePostUnload(struct OBJGPU *pGpu, struct KernelCE *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg3); } // kceClearInterrupt: virtual inherited (intrserv) base (intrserv) -static NvBool __nvoc_up_thunk_IntrService_kceClearInterrupt(OBJGPU *pGpu, struct KernelCE *pIntrService, IntrServiceClearInterruptArguments *pParams) { +NvBool __nvoc_up_thunk_IntrService_kceClearInterrupt(OBJGPU *pGpu, struct KernelCE *pIntrService, IntrServiceClearInterruptArguments *pParams) { return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_KernelCE_IntrService.offset), pParams); } // kceServiceInterrupt: virtual inherited (intrserv) base (intrserv) -static NvU32 __nvoc_up_thunk_IntrService_kceServiceInterrupt(OBJGPU *pGpu, struct KernelCE *pIntrService, IntrServiceServiceInterruptArguments *pParams) { +NvU32 __nvoc_up_thunk_IntrService_kceServiceInterrupt(OBJGPU *pGpu, struct KernelCE *pIntrService, IntrServiceServiceInterruptArguments *pParams) { return intrservServiceInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_KernelCE_IntrService.offset), pParams); } @@ -200,12 +222,12 @@ void __nvoc_init_dataField_KernelCE(KernelCE *pThis, RmHalspecOwner *pRmhalspeco // Hal field -- bCcFipsSelfTestRequired if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { - pThis->bCcFipsSelfTestRequired = ((NvBool)(0 == 0)); + pThis->bCcFipsSelfTestRequired = NV_FALSE; } // default else { - pThis->bCcFipsSelfTestRequired = ((NvBool)(0 != 0)); + pThis->bCcFipsSelfTestRequired = NV_FALSE; } } @@ -241,38 +263,6 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // kceConstructEngine -- virtual override (engstate) base (engstate) - pThis->__kceConstructEngine__ = &kceConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelCE_engstateConstructEngine; - - // kceIsPresent -- virtual halified (singleton optimized) override (engstate) base (engstate) body - pThis->__kceIsPresent__ = &kceIsPresent_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ = &__nvoc_down_thunk_KernelCE_engstateIsPresent; - - // kceStateInitLocked -- virtual override (engstate) base (engstate) - pThis->__kceStateInitLocked__ = &kceStateInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelCE_engstateStateInitLocked; - - // kceStateUnload -- virtual halified (singleton optimized) override (engstate) base (engstate) body - pThis->__kceStateUnload__ = &kceStateUnload_GP100; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelCE_engstateStateUnload; - - // kceStateLoad -- virtual halified (singleton optimized) override (engstate) base (engstate) - pThis->__kceStateLoad__ = &kceStateLoad_GP100; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelCE_engstateStateLoad; - - // kceStateDestroy -- virtual override (engstate) base (engstate) - pThis->__kceStateDestroy__ = &kceStateDestroy_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelCE_engstateStateDestroy; - - // kceRegisterIntrService -- virtual override (intrserv) base (intrserv) - pThis->__kceRegisterIntrService__ = &kceRegisterIntrService_IMPL; - pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_KernelCE_intrservRegisterIntrService; - - // kceServiceNotificationInterrupt -- virtual override (intrserv) base (intrserv) - pThis->__kceServiceNotificationInterrupt__ = &kceServiceNotificationInterrupt_IMPL; - pThis->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_down_thunk_KernelCE_intrservServiceNotificationInterrupt; - // kceSetShimInstance -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ { @@ -284,15 +274,45 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR pThis->__kceSetShimInstance__ = &kceSetShimInstance_b3696a; } - // kceCheckForDecompCapability -- halified (2 hals) body - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + // kceIsSecureCe -- halified (2 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->__kceCheckForDecompCapability__ = &kceCheckForDecompCapability_GB100; + pThis->__kceIsSecureCe__ = &kceIsSecureCe_GH100; } // default else { - pThis->__kceCheckForDecompCapability__ = &kceCheckForDecompCapability_491d52; + pThis->__kceIsSecureCe__ = &kceIsSecureCe_3dd2c9; + } + + // kceIsCeSysmemRead -- halified (2 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__kceIsCeSysmemRead__ = &kceIsCeSysmemRead_GB100; + } + else + { + pThis->__kceIsCeSysmemRead__ = &kceIsCeSysmemRead_GP100; + } + + // kceIsCeSysmemWrite -- halified (2 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__kceIsCeSysmemWrite__ = &kceIsCeSysmemWrite_GB100; + } + else + { + pThis->__kceIsCeSysmemWrite__ = &kceIsCeSysmemWrite_GP100; + } + + // kceAssignCeCaps -- halified (2 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__kceAssignCeCaps__ = &kceAssignCeCaps_GB100; + } + else + { + pThis->__kceAssignCeCaps__ = &kceAssignCeCaps_GP100; } // kceGetP2PCes -- halified (2 hals) @@ -336,13 +356,13 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR } else { - pThis->__kceGetNvlinkMaxTopoForTable__ = &kceGetNvlinkMaxTopoForTable_491d52; + pThis->__kceGetNvlinkMaxTopoForTable__ = &kceGetNvlinkMaxTopoForTable_3dd2c9; } // kceIsCurrentMaxTopology -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { - pThis->__kceIsCurrentMaxTopology__ = &kceIsCurrentMaxTopology_491d52; + pThis->__kceIsCurrentMaxTopology__ = &kceIsCurrentMaxTopology_3dd2c9; } else { @@ -587,7 +607,7 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR } else { - pThis->__kceIsGenXorHigherSupported__ = &kceIsGenXorHigherSupported_cbe027; + pThis->__kceIsGenXorHigherSupported__ = &kceIsGenXorHigherSupported_88bc07; } // kceApplyGen4orHigherMapping -- halified (2 hals) body @@ -599,43 +619,58 @@ static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pR { pThis->__kceApplyGen4orHigherMapping__ = &kceApplyGen4orHigherMapping_b3696a; } - - // kceInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__kceInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kceInitMissing; - - // kceStatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__kceStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kceStatePreInitLocked; - - // kceStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kceStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kceStatePreInitUnlocked; - - // kceStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kceStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kceStateInitUnlocked; - - // kceStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__kceStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kceStatePreLoad; - - // kceStatePostLoad -- virtual inherited (engstate) base (engstate) - pThis->__kceStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kceStatePostLoad; - - // kceStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__kceStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kceStatePreUnload; - - // kceStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__kceStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kceStatePostUnload; - - // kceClearInterrupt -- virtual inherited (intrserv) base (intrserv) - pThis->__kceClearInterrupt__ = &__nvoc_up_thunk_IntrService_kceClearInterrupt; - - // kceServiceInterrupt -- virtual inherited (intrserv) base (intrserv) - pThis->__kceServiceInterrupt__ = &__nvoc_up_thunk_IntrService_kceServiceInterrupt; -} // End __nvoc_init_funcTable_KernelCE_1 with approximately 93 basic block(s). +} // End __nvoc_init_funcTable_KernelCE_1 with approximately 73 basic block(s). -// Initialize vtable(s) for 43 virtual method(s). +// Initialize vtable(s) for 46 virtual method(s). void __nvoc_init_funcTable_KernelCE(KernelCE *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 43 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelCE vtable = { + .__kceConstructEngine__ = &kceConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelCE_engstateConstructEngine, // virtual + .__kceIsPresent__ = &kceIsPresent_IMPL, // virtual halified (singleton optimized) override (engstate) base (engstate) body + .OBJENGSTATE.__engstateIsPresent__ = &__nvoc_down_thunk_KernelCE_engstateIsPresent, // virtual + .__kceStateInitLocked__ = &kceStateInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelCE_engstateStateInitLocked, // virtual + .__kceStateUnload__ = &kceStateUnload_GP100, // virtual halified (singleton optimized) override (engstate) base (engstate) body + .OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelCE_engstateStateUnload, // virtual + .__kceStateLoad__ = &kceStateLoad_GP100, // virtual halified (singleton optimized) override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelCE_engstateStateLoad, // virtual + .__kceStateDestroy__ = &kceStateDestroy_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelCE_engstateStateDestroy, // virtual + .__kceRegisterIntrService__ = &kceRegisterIntrService_IMPL, // virtual override (intrserv) base (intrserv) + .IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_KernelCE_intrservRegisterIntrService, // virtual + .__kceServiceNotificationInterrupt__ = &kceServiceNotificationInterrupt_IMPL, // virtual override (intrserv) base (intrserv) + .IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_down_thunk_KernelCE_intrservServiceNotificationInterrupt, // virtual + .__kceInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kceInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__kceStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kceStatePreInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__kceStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kceStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__kceStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kceStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__kceStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kceStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__kceStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kceStatePostLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL, // virtual + .__kceStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kceStatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__kceStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kceStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__kceClearInterrupt__ = &__nvoc_up_thunk_IntrService_kceClearInterrupt, // virtual inherited (intrserv) base (intrserv) + .IntrService.__intrservClearInterrupt__ = &intrservClearInterrupt_IMPL, // virtual + .__kceServiceInterrupt__ = &__nvoc_up_thunk_IntrService_kceServiceInterrupt, // virtual inherited (intrserv) base (intrserv) + .IntrService.__intrservServiceInterrupt__ = &intrservServiceInterrupt_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_base_IntrService.__nvoc_vtable = &vtable.IntrService; // (intrserv) super + pThis->__nvoc_vtable = &vtable; // (kce) this + + // Initialize vtable(s) with 28 per-object function pointer(s). __nvoc_init_funcTable_KernelCE_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_ce_nvoc.h b/src/nvidia/generated/g_kernel_ce_nvoc.h index f5ff5bcac7..17a70c0531 100644 --- a/src/nvidia/generated/g_kernel_ce_nvoc.h +++ b/src/nvidia/generated/g_kernel_ce_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -98,12 +98,24 @@ typedef struct NVLINK_CE_AUTO_CONFIG_TABLE NvU32 exposeCeMask; } NVLINK_CE_AUTO_CONFIG_TABLE; + + /* The enum that contains the different CE CAPS */ +typedef enum +{ + CE_CAPS_GRCE = 0, + CE_CAPS_SYSMEM_READ = 1, + CE_CAPS_SYSMEM_WRITE = 2, + CE_CAPS_NVLINK_P2P = 3, + CE_CAPS_C2C_P2P = 4, + CE_CAPS_SCRUB = 5, + CE_CAPS_DECOMPRESS = 6 +} CE_CAPABILITY; + // // Kernel Copy Engine // This class provides Kernel-RM interface and state tracking for Copy Engine. // - // Private field names are wrapped in PRIVATE_FIELD, which does nothing for // the matching C source file, but causes diagnostics to be issued if another // source file references the field. @@ -114,10 +126,15 @@ typedef struct NVLINK_CE_AUTO_CONFIG_TABLE #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelCE; + + struct KernelCE { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelCE *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -129,17 +146,12 @@ struct KernelCE { struct IntrService *__nvoc_pbase_IntrService; // intrserv super struct KernelCE *__nvoc_pbase_KernelCE; // kce - // Vtable with 43 per-object function pointers - NV_STATUS (*__kceConstructEngine__)(OBJGPU *, struct KernelCE * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) - NvBool (*__kceIsPresent__)(OBJGPU *, struct KernelCE * /*this*/); // virtual halified (singleton optimized) override (engstate) base (engstate) body - NV_STATUS (*__kceStateInitLocked__)(OBJGPU *, struct KernelCE * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__kceStateUnload__)(OBJGPU *, struct KernelCE * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body - NV_STATUS (*__kceStateLoad__)(OBJGPU *, struct KernelCE * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) - void (*__kceStateDestroy__)(OBJGPU *, struct KernelCE * /*this*/); // virtual override (engstate) base (engstate) - void (*__kceRegisterIntrService__)(OBJGPU *, struct KernelCE * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) - NV_STATUS (*__kceServiceNotificationInterrupt__)(OBJGPU *, struct KernelCE * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual override (intrserv) base (intrserv) + // Vtable with 28 per-object function pointers void (*__kceSetShimInstance__)(OBJGPU *, struct KernelCE * /*this*/); // halified (2 hals) body - NvBool (*__kceCheckForDecompCapability__)(OBJGPU *, struct KernelCE * /*this*/, NvU32); // halified (2 hals) body + NvBool (*__kceIsSecureCe__)(OBJGPU *, struct KernelCE * /*this*/); // halified (2 hals) body + NvBool (*__kceIsCeSysmemRead__)(OBJGPU *, struct KernelCE * /*this*/); // halified (2 hals) body + NvBool (*__kceIsCeSysmemWrite__)(OBJGPU *, struct KernelCE * /*this*/); // halified (2 hals) body + void (*__kceAssignCeCaps__)(OBJGPU *, struct KernelCE * /*this*/, NvU8 *); // halified (2 hals) body NV_STATUS (*__kceGetP2PCes__)(struct KernelCE * /*this*/, OBJGPU *, NvU32, NvU32 *); // halified (2 hals) void (*__kceGetSysmemRWLCEs__)(OBJGPU *, struct KernelCE * /*this*/, NvU32 *, NvU32 *); // halified (2 hals) NV_STATUS (*__kceGetNvlinkAutoConfigCeValues__)(OBJGPU *, struct KernelCE * /*this*/, NvU32 *, NvU32 *, NvU32 *); // halified (3 hals) body @@ -163,16 +175,6 @@ struct KernelCE { NvU32 (*__kceGetGrceSupportedLceMask__)(OBJGPU *, struct KernelCE * /*this*/); // halified (3 hals) body NvBool (*__kceIsGenXorHigherSupported__)(OBJGPU *, struct KernelCE * /*this*/, NvU32); // halified (3 hals) body void (*__kceApplyGen4orHigherMapping__)(OBJGPU *, struct KernelCE * /*this*/, NvU32 *, NvU32 *, NvU32, NvU32); // halified (2 hals) body - void (*__kceInitMissing__)(struct OBJGPU *, struct KernelCE * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kceStatePreInitLocked__)(struct OBJGPU *, struct KernelCE * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kceStatePreInitUnlocked__)(struct OBJGPU *, struct KernelCE * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kceStateInitUnlocked__)(struct OBJGPU *, struct KernelCE * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kceStatePreLoad__)(struct OBJGPU *, struct KernelCE * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kceStatePostLoad__)(struct OBJGPU *, struct KernelCE * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kceStatePreUnload__)(struct OBJGPU *, struct KernelCE * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kceStatePostUnload__)(struct OBJGPU *, struct KernelCE * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NvBool (*__kceClearInterrupt__)(OBJGPU *, struct KernelCE * /*this*/, IntrServiceClearInterruptArguments *); // virtual inherited (intrserv) base (intrserv) - NvU32 (*__kceServiceInterrupt__)(OBJGPU *, struct KernelCE * /*this*/, IntrServiceServiceInterruptArguments *); // virtual inherited (intrserv) base (intrserv) // Data members NvU32 publicID; @@ -187,10 +189,36 @@ struct KernelCE { NvU32 nvlinkNumPeers; NvBool bIsAutoConfigEnabled; NvBool bUseGen4Mapping; - struct IoAperture aperture; + NvU32 ceCapsMask; NvBool bCcFipsSelfTestRequired; }; + +// Metadata including vtable with 18 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelCE { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + const struct NVOC_VTABLE__IntrService IntrService; // (intrserv) 4 function pointers + + NV_STATUS (*__kceConstructEngine__)(OBJGPU *, struct KernelCE * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NvBool (*__kceIsPresent__)(OBJGPU *, struct KernelCE * /*this*/); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kceStateInitLocked__)(OBJGPU *, struct KernelCE * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kceStateUnload__)(OBJGPU *, struct KernelCE * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kceStateLoad__)(OBJGPU *, struct KernelCE * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) + void (*__kceStateDestroy__)(OBJGPU *, struct KernelCE * /*this*/); // virtual override (engstate) base (engstate) + void (*__kceRegisterIntrService__)(OBJGPU *, struct KernelCE * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) + NV_STATUS (*__kceServiceNotificationInterrupt__)(OBJGPU *, struct KernelCE * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual override (intrserv) base (intrserv) + void (*__kceInitMissing__)(struct OBJGPU *, struct KernelCE * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kceStatePreInitLocked__)(struct OBJGPU *, struct KernelCE * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kceStatePreInitUnlocked__)(struct OBJGPU *, struct KernelCE * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kceStateInitUnlocked__)(struct OBJGPU *, struct KernelCE * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kceStatePreLoad__)(struct OBJGPU *, struct KernelCE * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kceStatePostLoad__)(struct OBJGPU *, struct KernelCE * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kceStatePreUnload__)(struct OBJGPU *, struct KernelCE * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kceStatePostUnload__)(struct OBJGPU *, struct KernelCE * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__kceClearInterrupt__)(OBJGPU *, struct KernelCE * /*this*/, IntrServiceClearInterruptArguments *); // virtual inherited (intrserv) base (intrserv) + NvU32 (*__kceServiceInterrupt__)(OBJGPU *, struct KernelCE * /*this*/, IntrServiceServiceInterruptArguments *); // virtual inherited (intrserv) base (intrserv) +}; + #ifndef __NVOC_CLASS_KernelCE_TYPEDEF__ #define __NVOC_CLASS_KernelCE_TYPEDEF__ typedef struct KernelCE KernelCE; @@ -225,31 +253,40 @@ NV_STATUS __nvoc_objCreate_KernelCE(KernelCE**, Dynamic*, NvU32); // Wrapper macros -#define kceConstructEngine_FNPTR(pKCe) pKCe->__kceConstructEngine__ +#define kceConstructEngine_FNPTR(pKCe) pKCe->__nvoc_vtable->__kceConstructEngine__ #define kceConstructEngine(pGpu, pKCe, arg3) kceConstructEngine_DISPATCH(pGpu, pKCe, arg3) -#define kceIsPresent_FNPTR(pKCe) pKCe->__kceIsPresent__ +#define kceIsPresent_FNPTR(pKCe) pKCe->__nvoc_vtable->__kceIsPresent__ #define kceIsPresent(pGpu, pKCe) kceIsPresent_DISPATCH(pGpu, pKCe) #define kceIsPresent_HAL(pGpu, pKCe) kceIsPresent_DISPATCH(pGpu, pKCe) -#define kceStateInitLocked_FNPTR(arg_this) arg_this->__kceStateInitLocked__ +#define kceStateInitLocked_FNPTR(arg_this) arg_this->__nvoc_vtable->__kceStateInitLocked__ #define kceStateInitLocked(arg1, arg_this) kceStateInitLocked_DISPATCH(arg1, arg_this) -#define kceStateUnload_FNPTR(pKCe) pKCe->__kceStateUnload__ +#define kceStateUnload_FNPTR(pKCe) pKCe->__nvoc_vtable->__kceStateUnload__ #define kceStateUnload(pGpu, pKCe, flags) kceStateUnload_DISPATCH(pGpu, pKCe, flags) #define kceStateUnload_HAL(pGpu, pKCe, flags) kceStateUnload_DISPATCH(pGpu, pKCe, flags) -#define kceStateLoad_FNPTR(arg_this) arg_this->__kceStateLoad__ +#define kceStateLoad_FNPTR(arg_this) arg_this->__nvoc_vtable->__kceStateLoad__ #define kceStateLoad(arg1, arg_this, arg3) kceStateLoad_DISPATCH(arg1, arg_this, arg3) #define kceStateLoad_HAL(arg1, arg_this, arg3) kceStateLoad_DISPATCH(arg1, arg_this, arg3) -#define kceStateDestroy_FNPTR(arg_this) arg_this->__kceStateDestroy__ +#define kceStateDestroy_FNPTR(arg_this) arg_this->__nvoc_vtable->__kceStateDestroy__ #define kceStateDestroy(arg1, arg_this) kceStateDestroy_DISPATCH(arg1, arg_this) -#define kceRegisterIntrService_FNPTR(arg_this) arg_this->__kceRegisterIntrService__ +#define kceRegisterIntrService_FNPTR(arg_this) arg_this->__nvoc_vtable->__kceRegisterIntrService__ #define kceRegisterIntrService(arg1, arg_this, arg3) kceRegisterIntrService_DISPATCH(arg1, arg_this, arg3) -#define kceServiceNotificationInterrupt_FNPTR(arg_this) arg_this->__kceServiceNotificationInterrupt__ +#define kceServiceNotificationInterrupt_FNPTR(arg_this) arg_this->__nvoc_vtable->__kceServiceNotificationInterrupt__ #define kceServiceNotificationInterrupt(arg1, arg_this, arg3) kceServiceNotificationInterrupt_DISPATCH(arg1, arg_this, arg3) #define kceSetShimInstance_FNPTR(pKCe) pKCe->__kceSetShimInstance__ #define kceSetShimInstance(gpu, pKCe) kceSetShimInstance_DISPATCH(gpu, pKCe) #define kceSetShimInstance_HAL(gpu, pKCe) kceSetShimInstance_DISPATCH(gpu, pKCe) -#define kceCheckForDecompCapability_FNPTR(pKCe) pKCe->__kceCheckForDecompCapability__ -#define kceCheckForDecompCapability(pGpu, pKCe, nv2080EngineId) kceCheckForDecompCapability_DISPATCH(pGpu, pKCe, nv2080EngineId) -#define kceCheckForDecompCapability_HAL(pGpu, pKCe, nv2080EngineId) kceCheckForDecompCapability_DISPATCH(pGpu, pKCe, nv2080EngineId) +#define kceIsSecureCe_FNPTR(pKCe) pKCe->__kceIsSecureCe__ +#define kceIsSecureCe(pGpu, pKCe) kceIsSecureCe_DISPATCH(pGpu, pKCe) +#define kceIsSecureCe_HAL(pGpu, pKCe) kceIsSecureCe_DISPATCH(pGpu, pKCe) +#define kceIsCeSysmemRead_FNPTR(pKCe) pKCe->__kceIsCeSysmemRead__ +#define kceIsCeSysmemRead(pGpu, pKCe) kceIsCeSysmemRead_DISPATCH(pGpu, pKCe) +#define kceIsCeSysmemRead_HAL(pGpu, pKCe) kceIsCeSysmemRead_DISPATCH(pGpu, pKCe) +#define kceIsCeSysmemWrite_FNPTR(pKCe) pKCe->__kceIsCeSysmemWrite__ +#define kceIsCeSysmemWrite(pGpu, pKCe) kceIsCeSysmemWrite_DISPATCH(pGpu, pKCe) +#define kceIsCeSysmemWrite_HAL(pGpu, pKCe) kceIsCeSysmemWrite_DISPATCH(pGpu, pKCe) +#define kceAssignCeCaps_FNPTR(pKCe) pKCe->__kceAssignCeCaps__ +#define kceAssignCeCaps(pGpu, pKCe, pKCeCaps) kceAssignCeCaps_DISPATCH(pGpu, pKCe, pKCeCaps) +#define kceAssignCeCaps_HAL(pGpu, pKCe, pKCeCaps) kceAssignCeCaps_DISPATCH(pGpu, pKCe, pKCeCaps) #define kceGetP2PCes_FNPTR(arg_this) arg_this->__kceGetP2PCes__ #define kceGetP2PCes(arg_this, pGpu, gpuMask, nvlinkP2PCeMask) kceGetP2PCes_DISPATCH(arg_this, pGpu, gpuMask, nvlinkP2PCeMask) #define kceGetP2PCes_HAL(arg_this, pGpu, gpuMask, nvlinkP2PCeMask) kceGetP2PCes_DISPATCH(arg_this, pGpu, gpuMask, nvlinkP2PCeMask) @@ -319,66 +356,78 @@ NV_STATUS __nvoc_objCreate_KernelCE(KernelCE**, Dynamic*, NvU32); #define kceApplyGen4orHigherMapping_FNPTR(pCe) pCe->__kceApplyGen4orHigherMapping__ #define kceApplyGen4orHigherMapping(pGpu, pCe, arg3, arg4, arg5, arg6) kceApplyGen4orHigherMapping_DISPATCH(pGpu, pCe, arg3, arg4, arg5, arg6) #define kceApplyGen4orHigherMapping_HAL(pGpu, pCe, arg3, arg4, arg5, arg6) kceApplyGen4orHigherMapping_DISPATCH(pGpu, pCe, arg3, arg4, arg5, arg6) -#define kceInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define kceInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define kceInitMissing(pGpu, pEngstate) kceInitMissing_DISPATCH(pGpu, pEngstate) -#define kceStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define kceStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define kceStatePreInitLocked(pGpu, pEngstate) kceStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define kceStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define kceStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define kceStatePreInitUnlocked(pGpu, pEngstate) kceStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kceStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kceStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define kceStateInitUnlocked(pGpu, pEngstate) kceStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kceStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kceStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define kceStatePreLoad(pGpu, pEngstate, arg3) kceStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kceStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define kceStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostLoad__ #define kceStatePostLoad(pGpu, pEngstate, arg3) kceStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kceStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kceStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define kceStatePreUnload(pGpu, pEngstate, arg3) kceStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kceStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kceStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define kceStatePostUnload(pGpu, pEngstate, arg3) kceStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kceClearInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservClearInterrupt__ +#define kceClearInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__nvoc_vtable->__intrservClearInterrupt__ #define kceClearInterrupt(pGpu, pIntrService, pParams) kceClearInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define kceServiceInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservServiceInterrupt__ +#define kceServiceInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__nvoc_vtable->__intrservServiceInterrupt__ #define kceServiceInterrupt(pGpu, pIntrService, pParams) kceServiceInterrupt_DISPATCH(pGpu, pIntrService, pParams) // Dispatch functions static inline NV_STATUS kceConstructEngine_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe, ENGDESCRIPTOR arg3) { - return pKCe->__kceConstructEngine__(pGpu, pKCe, arg3); + return pKCe->__nvoc_vtable->__kceConstructEngine__(pGpu, pKCe, arg3); } static inline NvBool kceIsPresent_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe) { - return pKCe->__kceIsPresent__(pGpu, pKCe); + return pKCe->__nvoc_vtable->__kceIsPresent__(pGpu, pKCe); } static inline NV_STATUS kceStateInitLocked_DISPATCH(OBJGPU *arg1, struct KernelCE *arg_this) { - return arg_this->__kceStateInitLocked__(arg1, arg_this); + return arg_this->__nvoc_vtable->__kceStateInitLocked__(arg1, arg_this); } static inline NV_STATUS kceStateUnload_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 flags) { - return pKCe->__kceStateUnload__(pGpu, pKCe, flags); + return pKCe->__nvoc_vtable->__kceStateUnload__(pGpu, pKCe, flags); } static inline NV_STATUS kceStateLoad_DISPATCH(OBJGPU *arg1, struct KernelCE *arg_this, NvU32 arg3) { - return arg_this->__kceStateLoad__(arg1, arg_this, arg3); + return arg_this->__nvoc_vtable->__kceStateLoad__(arg1, arg_this, arg3); } static inline void kceStateDestroy_DISPATCH(OBJGPU *arg1, struct KernelCE *arg_this) { - arg_this->__kceStateDestroy__(arg1, arg_this); + arg_this->__nvoc_vtable->__kceStateDestroy__(arg1, arg_this); } static inline void kceRegisterIntrService_DISPATCH(OBJGPU *arg1, struct KernelCE *arg_this, IntrServiceRecord arg3[175]) { - arg_this->__kceRegisterIntrService__(arg1, arg_this, arg3); + arg_this->__nvoc_vtable->__kceRegisterIntrService__(arg1, arg_this, arg3); } static inline NV_STATUS kceServiceNotificationInterrupt_DISPATCH(OBJGPU *arg1, struct KernelCE *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3) { - return arg_this->__kceServiceNotificationInterrupt__(arg1, arg_this, arg3); + return arg_this->__nvoc_vtable->__kceServiceNotificationInterrupt__(arg1, arg_this, arg3); } static inline void kceSetShimInstance_DISPATCH(OBJGPU *gpu, struct KernelCE *pKCe) { pKCe->__kceSetShimInstance__(gpu, pKCe); } -static inline NvBool kceCheckForDecompCapability_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 nv2080EngineId) { - return pKCe->__kceCheckForDecompCapability__(pGpu, pKCe, nv2080EngineId); +static inline NvBool kceIsSecureCe_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe) { + return pKCe->__kceIsSecureCe__(pGpu, pKCe); +} + +static inline NvBool kceIsCeSysmemRead_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe) { + return pKCe->__kceIsCeSysmemRead__(pGpu, pKCe); +} + +static inline NvBool kceIsCeSysmemWrite_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe) { + return pKCe->__kceIsCeSysmemWrite__(pGpu, pKCe); +} + +static inline void kceAssignCeCaps_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe, NvU8 *pKCeCaps) { + pKCe->__kceAssignCeCaps__(pGpu, pKCe, pKCeCaps); } static inline NV_STATUS kceGetP2PCes_DISPATCH(struct KernelCE *arg_this, OBJGPU *pGpu, NvU32 gpuMask, NvU32 *nvlinkP2PCeMask) { @@ -474,43 +523,43 @@ static inline void kceApplyGen4orHigherMapping_DISPATCH(OBJGPU *pGpu, struct Ker } static inline void kceInitMissing_DISPATCH(struct OBJGPU *pGpu, struct KernelCE *pEngstate) { - pEngstate->__kceInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kceInitMissing__(pGpu, pEngstate); } static inline NV_STATUS kceStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelCE *pEngstate) { - return pEngstate->__kceStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kceStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS kceStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelCE *pEngstate) { - return pEngstate->__kceStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kceStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kceStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelCE *pEngstate) { - return pEngstate->__kceStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kceStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kceStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelCE *pEngstate, NvU32 arg3) { - return pEngstate->__kceStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kceStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kceStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelCE *pEngstate, NvU32 arg3) { - return pEngstate->__kceStatePostLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kceStatePostLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kceStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelCE *pEngstate, NvU32 arg3) { - return pEngstate->__kceStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kceStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS kceStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelCE *pEngstate, NvU32 arg3) { - return pEngstate->__kceStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kceStatePostUnload__(pGpu, pEngstate, arg3); } static inline NvBool kceClearInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelCE *pIntrService, IntrServiceClearInterruptArguments *pParams) { - return pIntrService->__kceClearInterrupt__(pGpu, pIntrService, pParams); + return pIntrService->__nvoc_vtable->__kceClearInterrupt__(pGpu, pIntrService, pParams); } static inline NvU32 kceServiceInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelCE *pIntrService, IntrServiceServiceInterruptArguments *pParams) { - return pIntrService->__kceServiceInterrupt__(pGpu, pIntrService, pParams); + return pIntrService->__nvoc_vtable->__kceServiceInterrupt__(pGpu, pIntrService, pParams); } static inline void kceNonstallIntrCheckAndClear_b3696a(OBJGPU *arg1, struct KernelCE *arg2, struct THREAD_STATE_NODE *arg3) { @@ -542,34 +591,6 @@ static inline NV_STATUS kceUpdateClassDB(OBJGPU *pGpu, struct KernelCE *pKCe) { #define kceUpdateClassDB_HAL(pGpu, pKCe) kceUpdateClassDB(pGpu, pKCe) -NvBool kceIsCeSysmemRead_GP100(OBJGPU *pGpu, struct KernelCE *pKCe); - - -#ifdef __nvoc_kernel_ce_h_disabled -static inline NvBool kceIsCeSysmemRead(OBJGPU *pGpu, struct KernelCE *pKCe) { - NV_ASSERT_FAILED_PRECOMP("KernelCE was disabled!"); - return NV_FALSE; -} -#else //__nvoc_kernel_ce_h_disabled -#define kceIsCeSysmemRead(pGpu, pKCe) kceIsCeSysmemRead_GP100(pGpu, pKCe) -#endif //__nvoc_kernel_ce_h_disabled - -#define kceIsCeSysmemRead_HAL(pGpu, pKCe) kceIsCeSysmemRead(pGpu, pKCe) - -NvBool kceIsCeSysmemWrite_GP100(OBJGPU *pGpu, struct KernelCE *pKCe); - - -#ifdef __nvoc_kernel_ce_h_disabled -static inline NvBool kceIsCeSysmemWrite(OBJGPU *pGpu, struct KernelCE *pKCe) { - NV_ASSERT_FAILED_PRECOMP("KernelCE was disabled!"); - return NV_FALSE; -} -#else //__nvoc_kernel_ce_h_disabled -#define kceIsCeSysmemWrite(pGpu, pKCe) kceIsCeSysmemWrite_GP100(pGpu, pKCe) -#endif //__nvoc_kernel_ce_h_disabled - -#define kceIsCeSysmemWrite_HAL(pGpu, pKCe) kceIsCeSysmemWrite(pGpu, pKCe) - NvBool kceIsCeNvlinkP2P_GP100(OBJGPU *pGpu, struct KernelCE *pKCe); @@ -635,12 +656,24 @@ static inline void kceSetShimInstance_b3696a(OBJGPU *gpu, struct KernelCE *pKCe) return; } -NvBool kceCheckForDecompCapability_GB100(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 nv2080EngineId); +NvBool kceIsSecureCe_GH100(OBJGPU *pGpu, struct KernelCE *pKCe); -static inline NvBool kceCheckForDecompCapability_491d52(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 nv2080EngineId) { - return ((NvBool)(0 != 0)); +static inline NvBool kceIsSecureCe_3dd2c9(OBJGPU *pGpu, struct KernelCE *pKCe) { + return NV_FALSE; } +NvBool kceIsCeSysmemRead_GP100(OBJGPU *pGpu, struct KernelCE *pKCe); + +NvBool kceIsCeSysmemRead_GB100(OBJGPU *pGpu, struct KernelCE *pKCe); + +NvBool kceIsCeSysmemWrite_GP100(OBJGPU *pGpu, struct KernelCE *pKCe); + +NvBool kceIsCeSysmemWrite_GB100(OBJGPU *pGpu, struct KernelCE *pKCe); + +void kceAssignCeCaps_GP100(OBJGPU *pGpu, struct KernelCE *pKCe, NvU8 *pKCeCaps); + +void kceAssignCeCaps_GB100(OBJGPU *pGpu, struct KernelCE *pKCe, NvU8 *pKCeCaps); + NV_STATUS kceGetP2PCes_GV100(struct KernelCE *arg1, OBJGPU *pGpu, NvU32 gpuMask, NvU32 *nvlinkP2PCeMask); NV_STATUS kceGetP2PCes_GH100(struct KernelCE *arg1, OBJGPU *pGpu, NvU32 gpuMask, NvU32 *nvlinkP2PCeMask); @@ -657,14 +690,14 @@ NV_STATUS kceGetNvlinkAutoConfigCeValues_GB100(OBJGPU *pGpu, struct KernelCE *pK NvBool kceGetNvlinkMaxTopoForTable_GP100(OBJGPU *pGpu, struct KernelCE *pKCe, struct NVLINK_TOPOLOGY_PARAMS *arg3, void *arg4, NvU32 arg5, NvU32 *arg6); -static inline NvBool kceGetNvlinkMaxTopoForTable_491d52(OBJGPU *pGpu, struct KernelCE *pKCe, struct NVLINK_TOPOLOGY_PARAMS *arg3, void *arg4, NvU32 arg5, NvU32 *arg6) { - return ((NvBool)(0 != 0)); +static inline NvBool kceGetNvlinkMaxTopoForTable_3dd2c9(OBJGPU *pGpu, struct KernelCE *pKCe, struct NVLINK_TOPOLOGY_PARAMS *arg3, void *arg4, NvU32 arg5, NvU32 *arg6) { + return NV_FALSE; } NvBool kceIsCurrentMaxTopology_GA100(OBJGPU *pGpu, struct KernelCE *arg2, struct NVLINK_TOPOLOGY_PARAMS *arg3, NvU32 *arg4, NvU32 *arg5); -static inline NvBool kceIsCurrentMaxTopology_491d52(OBJGPU *pGpu, struct KernelCE *arg2, struct NVLINK_TOPOLOGY_PARAMS *arg3, NvU32 *arg4, NvU32 *arg5) { - return ((NvBool)(0 != 0)); +static inline NvBool kceIsCurrentMaxTopology_3dd2c9(OBJGPU *pGpu, struct KernelCE *arg2, struct NVLINK_TOPOLOGY_PARAMS *arg3, NvU32 *arg4, NvU32 *arg5) { + return NV_FALSE; } NvBool kceGetAutoConfigTableEntry_GV100(OBJGPU *pGpu, struct KernelCE *pKCe, struct NVLINK_TOPOLOGY_PARAMS *arg3, struct NVLINK_CE_AUTO_CONFIG_TABLE *arg4, NvU32 arg5, NvU32 *arg6, NvU32 *arg7); @@ -791,8 +824,8 @@ NvBool kceIsGenXorHigherSupported_GA100(OBJGPU *pGpu, struct KernelCE *pCe, NvU3 NvBool kceIsGenXorHigherSupported_GH100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 checkGen); -static inline NvBool kceIsGenXorHigherSupported_cbe027(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 checkGen) { - return ((NvBool)(0 == 0)); +static inline NvBool kceIsGenXorHigherSupported_88bc07(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 checkGen) { + return NV_TRUE; } void kceApplyGen4orHigherMapping_GA100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg3, NvU32 *arg4, NvU32 arg5, NvU32 arg6); @@ -866,6 +899,9 @@ static inline NV_STATUS kceGetPceConfigForLceType(OBJGPU *pGpu, struct KernelCE #define kceGetPceConfigForLceType(pGpu, pKCe, lceType, pNumPcesPerLce, pNumLces, pSupportedPceMask, pSupportedLceMask, pPcesPerHshub) kceGetPceConfigForLceType_IMPL(pGpu, pKCe, lceType, pNumPcesPerLce, pNumLces, pSupportedPceMask, pSupportedLceMask, pPcesPerHshub) #endif //__nvoc_kernel_ce_h_disabled +NvBool kceIsDecompLce_IMPL(OBJGPU *pGpu, NvU32 lceIndex); + +#define kceIsDecompLce(pGpu, lceIndex) kceIsDecompLce_IMPL(pGpu, lceIndex) NV_STATUS kceFindShimOwner_IMPL(OBJGPU *gpu, struct KernelCE *pKCe, struct KernelCE **ppKCe); #ifdef __nvoc_kernel_ce_h_disabled diff --git a/src/nvidia/generated/g_kernel_channel_group_api_nvoc.c b/src/nvidia/generated/g_kernel_channel_group_api_nvoc.c index e5f85a49e3..cb645bd1a6 100644 --- a/src/nvidia/generated/g_kernel_channel_group_api_nvoc.c +++ b/src/nvidia/generated/g_kernel_channel_group_api_nvoc.c @@ -342,133 +342,201 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NvBool __nvoc_down_thunk_KernelChannelGroupApi_resCanCopy(struct RsResource *pKernelChannelGroupApi); // this +NV_STATUS __nvoc_down_thunk_KernelChannelGroupApi_gpuresControl(struct GpuResource *pKernelChannelGroupApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this + // 2 down-thunk(s) defined to bridge methods in KernelChannelGroupApi from superclasses // kchangrpapiCanCopy: virtual override (res) base (gpures) -static NvBool __nvoc_down_thunk_KernelChannelGroupApi_resCanCopy(struct RsResource *pKernelChannelGroupApi) { +NvBool __nvoc_down_thunk_KernelChannelGroupApi_resCanCopy(struct RsResource *pKernelChannelGroupApi) { return kchangrpapiCanCopy((struct KernelChannelGroupApi *)(((unsigned char *) pKernelChannelGroupApi) - __nvoc_rtti_KernelChannelGroupApi_RsResource.offset)); } // kchangrpapiControl: virtual override (res) base (gpures) -static NV_STATUS __nvoc_down_thunk_KernelChannelGroupApi_gpuresControl(struct GpuResource *pKernelChannelGroupApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_down_thunk_KernelChannelGroupApi_gpuresControl(struct GpuResource *pKernelChannelGroupApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return kchangrpapiControl((struct KernelChannelGroupApi *)(((unsigned char *) pKernelChannelGroupApi) - __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset), pCallContext, pParams); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_kchangrpapiMap(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kchangrpapiUnmap(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_kchangrpapiShareCallback(struct KernelChannelGroupApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kchangrpapiGetRegBaseOffsetAndSize(struct KernelChannelGroupApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kchangrpapiGetMapAddrSpace(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kchangrpapiInternalControlForward(struct KernelChannelGroupApi *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_kchangrpapiGetInternalObjectHandle(struct KernelChannelGroupApi *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_kchangrpapiAccessCallback(struct KernelChannelGroupApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_kchangrpapiGetMemInterMapParams(struct KernelChannelGroupApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_kchangrpapiCheckMemInterUnmap(struct KernelChannelGroupApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_kchangrpapiGetMemoryMappingDescriptor(struct KernelChannelGroupApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_kchangrpapiControlSerialization_Prologue(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_kchangrpapiControlSerialization_Epilogue(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_kchangrpapiControl_Prologue(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_kchangrpapiControl_Epilogue(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_kchangrpapiIsDuplicate(struct KernelChannelGroupApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_kchangrpapiPreDestruct(struct KernelChannelGroupApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_kchangrpapiControlFilter(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_kchangrpapiIsPartialUnmapSupported(struct KernelChannelGroupApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_kchangrpapiMapTo(struct KernelChannelGroupApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_kchangrpapiUnmapFrom(struct KernelChannelGroupApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_kchangrpapiGetRefCount(struct KernelChannelGroupApi *pResource); // this +void __nvoc_up_thunk_RsResource_kchangrpapiAddAdditionalDependants(struct RsClient *pClient, struct KernelChannelGroupApi *pResource, RsResourceRef *pReference); // this + // 23 up-thunk(s) defined to bridge methods in KernelChannelGroupApi to superclasses // kchangrpapiMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kchangrpapiMap(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_kchangrpapiMap(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // kchangrpapiUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kchangrpapiUnmap(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_kchangrpapiUnmap(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset), pCallContext, pCpuMapping); } // kchangrpapiShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_kchangrpapiShareCallback(struct KernelChannelGroupApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_kchangrpapiShareCallback(struct KernelChannelGroupApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // kchangrpapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kchangrpapiGetRegBaseOffsetAndSize(struct KernelChannelGroupApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_kchangrpapiGetRegBaseOffsetAndSize(struct KernelChannelGroupApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset), pGpu, pOffset, pSize); } // kchangrpapiGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kchangrpapiGetMapAddrSpace(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_kchangrpapiGetMapAddrSpace(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // kchangrpapiInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kchangrpapiInternalControlForward(struct KernelChannelGroupApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_kchangrpapiInternalControlForward(struct KernelChannelGroupApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset), command, pParams, size); } // kchangrpapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_kchangrpapiGetInternalObjectHandle(struct KernelChannelGroupApi *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_kchangrpapiGetInternalObjectHandle(struct KernelChannelGroupApi *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannelGroupApi_GpuResource.offset)); } // kchangrpapiAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_kchangrpapiAccessCallback(struct KernelChannelGroupApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_kchangrpapiAccessCallback(struct KernelChannelGroupApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // kchangrpapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kchangrpapiGetMemInterMapParams(struct KernelChannelGroupApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_kchangrpapiGetMemInterMapParams(struct KernelChannelGroupApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), pParams); } // kchangrpapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kchangrpapiCheckMemInterUnmap(struct KernelChannelGroupApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_kchangrpapiCheckMemInterUnmap(struct KernelChannelGroupApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), bSubdeviceHandleProvided); } // kchangrpapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kchangrpapiGetMemoryMappingDescriptor(struct KernelChannelGroupApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_kchangrpapiGetMemoryMappingDescriptor(struct KernelChannelGroupApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), ppMemDesc); } // kchangrpapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kchangrpapiControlSerialization_Prologue(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_kchangrpapiControlSerialization_Prologue(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), pCallContext, pParams); } // kchangrpapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_kchangrpapiControlSerialization_Epilogue(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_kchangrpapiControlSerialization_Epilogue(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), pCallContext, pParams); } // kchangrpapiControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kchangrpapiControl_Prologue(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_kchangrpapiControl_Prologue(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), pCallContext, pParams); } // kchangrpapiControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_kchangrpapiControl_Epilogue(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_kchangrpapiControl_Epilogue(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RmResource.offset), pCallContext, pParams); } // kchangrpapiIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kchangrpapiIsDuplicate(struct KernelChannelGroupApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_kchangrpapiIsDuplicate(struct KernelChannelGroupApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset), hMemory, pDuplicate); } // kchangrpapiPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_kchangrpapiPreDestruct(struct KernelChannelGroupApi *pResource) { +void __nvoc_up_thunk_RsResource_kchangrpapiPreDestruct(struct KernelChannelGroupApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset)); } // kchangrpapiControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kchangrpapiControlFilter(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kchangrpapiControlFilter(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset), pCallContext, pParams); } // kchangrpapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_kchangrpapiIsPartialUnmapSupported(struct KernelChannelGroupApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_kchangrpapiIsPartialUnmapSupported(struct KernelChannelGroupApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset)); } // kchangrpapiMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kchangrpapiMapTo(struct KernelChannelGroupApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kchangrpapiMapTo(struct KernelChannelGroupApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset), pParams); } // kchangrpapiUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kchangrpapiUnmapFrom(struct KernelChannelGroupApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kchangrpapiUnmapFrom(struct KernelChannelGroupApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset), pParams); } // kchangrpapiGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_kchangrpapiGetRefCount(struct KernelChannelGroupApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_kchangrpapiGetRefCount(struct KernelChannelGroupApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset)); } // kchangrpapiAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_kchangrpapiAddAdditionalDependants(struct RsClient *pClient, struct KernelChannelGroupApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_kchangrpapiAddAdditionalDependants(struct RsClient *pClient, struct KernelChannelGroupApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannelGroupApi_RsResource.offset), pReference); } @@ -513,14 +581,6 @@ NV_STATUS __nvoc_ctor_KernelChannelGroupApi(KernelChannelGroupApi *pThis, struct static void __nvoc_init_funcTable_KernelChannelGroupApi_1(KernelChannelGroupApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // kchangrpapiCanCopy -- virtual override (res) base (gpures) - pThis->__kchangrpapiCanCopy__ = &kchangrpapiCanCopy_IMPL; - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_KernelChannelGroupApi_resCanCopy; - - // kchangrpapiControl -- virtual override (res) base (gpures) - pThis->__kchangrpapiControl__ = &kchangrpapiControl_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresControl__ = &__nvoc_down_thunk_KernelChannelGroupApi_gpuresControl; - // kchangrpapiCtrlCmdGpFifoSchedule -- exported (id=0xa06c0101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchangrpapiCtrlCmdGpFifoSchedule__ = &kchangrpapiCtrlCmdGpFifoSchedule_IMPL; @@ -600,82 +660,144 @@ static void __nvoc_init_funcTable_KernelChannelGroupApi_1(KernelChannelGroupApi #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kchangrpapiCtrlProgramVidmemPromote__ = &kchangrpapiCtrlProgramVidmemPromote_a094e1; #endif - - // kchangrpapiMap -- virtual inherited (gpures) base (gpures) - pThis->__kchangrpapiMap__ = &__nvoc_up_thunk_GpuResource_kchangrpapiMap; - - // kchangrpapiUnmap -- virtual inherited (gpures) base (gpures) - pThis->__kchangrpapiUnmap__ = &__nvoc_up_thunk_GpuResource_kchangrpapiUnmap; - - // kchangrpapiShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__kchangrpapiShareCallback__ = &__nvoc_up_thunk_GpuResource_kchangrpapiShareCallback; - - // kchangrpapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__kchangrpapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kchangrpapiGetRegBaseOffsetAndSize; - - // kchangrpapiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__kchangrpapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_kchangrpapiGetMapAddrSpace; - - // kchangrpapiInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__kchangrpapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kchangrpapiInternalControlForward; - - // kchangrpapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__kchangrpapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_kchangrpapiGetInternalObjectHandle; - - // kchangrpapiAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__kchangrpapiAccessCallback__ = &__nvoc_up_thunk_RmResource_kchangrpapiAccessCallback; - - // kchangrpapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__kchangrpapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_kchangrpapiGetMemInterMapParams; - - // kchangrpapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__kchangrpapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_kchangrpapiCheckMemInterUnmap; - - // kchangrpapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__kchangrpapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_kchangrpapiGetMemoryMappingDescriptor; - - // kchangrpapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__kchangrpapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kchangrpapiControlSerialization_Prologue; - - // kchangrpapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__kchangrpapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kchangrpapiControlSerialization_Epilogue; - - // kchangrpapiControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__kchangrpapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_kchangrpapiControl_Prologue; - - // kchangrpapiControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__kchangrpapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kchangrpapiControl_Epilogue; - - // kchangrpapiIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__kchangrpapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_kchangrpapiIsDuplicate; - - // kchangrpapiPreDestruct -- virtual inherited (res) base (gpures) - pThis->__kchangrpapiPreDestruct__ = &__nvoc_up_thunk_RsResource_kchangrpapiPreDestruct; - - // kchangrpapiControlFilter -- virtual inherited (res) base (gpures) - pThis->__kchangrpapiControlFilter__ = &__nvoc_up_thunk_RsResource_kchangrpapiControlFilter; - - // kchangrpapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__kchangrpapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kchangrpapiIsPartialUnmapSupported; - - // kchangrpapiMapTo -- virtual inherited (res) base (gpures) - pThis->__kchangrpapiMapTo__ = &__nvoc_up_thunk_RsResource_kchangrpapiMapTo; - - // kchangrpapiUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__kchangrpapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_kchangrpapiUnmapFrom; - - // kchangrpapiGetRefCount -- virtual inherited (res) base (gpures) - pThis->__kchangrpapiGetRefCount__ = &__nvoc_up_thunk_RsResource_kchangrpapiGetRefCount; - - // kchangrpapiAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__kchangrpapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kchangrpapiAddAdditionalDependants; -} // End __nvoc_init_funcTable_KernelChannelGroupApi_1 with approximately 43 basic block(s). +} // End __nvoc_init_funcTable_KernelChannelGroupApi_1 with approximately 16 basic block(s). // Initialize vtable(s) for 41 virtual method(s). void __nvoc_init_funcTable_KernelChannelGroupApi(KernelChannelGroupApi *pThis) { - // Initialize vtable(s) with 41 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelChannelGroupApi vtable = { + .__kchangrpapiCanCopy__ = &kchangrpapiCanCopy_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_KernelChannelGroupApi_resCanCopy, // virtual + .__kchangrpapiControl__ = &kchangrpapiControl_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresControl__ = &__nvoc_down_thunk_KernelChannelGroupApi_gpuresControl, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x28u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14240u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__kchangrpapiMap__ = &__nvoc_up_thunk_GpuResource_kchangrpapiMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__kchangrpapiUnmap__ = &__nvoc_up_thunk_GpuResource_kchangrpapiUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__kchangrpapiShareCallback__ = &__nvoc_up_thunk_GpuResource_kchangrpapiShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__kchangrpapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kchangrpapiGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__kchangrpapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_kchangrpapiGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__kchangrpapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kchangrpapiInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__kchangrpapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_kchangrpapiGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__kchangrpapiAccessCallback__ = &__nvoc_up_thunk_RmResource_kchangrpapiAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__kchangrpapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_kchangrpapiGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__kchangrpapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_kchangrpapiCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__kchangrpapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_kchangrpapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__kchangrpapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kchangrpapiControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__kchangrpapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kchangrpapiControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__kchangrpapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_kchangrpapiControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__kchangrpapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kchangrpapiControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__kchangrpapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_kchangrpapiIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__kchangrpapiPreDestruct__ = &__nvoc_up_thunk_RsResource_kchangrpapiPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__kchangrpapiControlFilter__ = &__nvoc_up_thunk_RsResource_kchangrpapiControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__kchangrpapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kchangrpapiIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__kchangrpapiMapTo__ = &__nvoc_up_thunk_RsResource_kchangrpapiMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__kchangrpapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_kchangrpapiUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__kchangrpapiGetRefCount__ = &__nvoc_up_thunk_RsResource_kchangrpapiGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__kchangrpapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kchangrpapiAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (kchangrpapi) this + + // Initialize vtable(s) with 16 per-object function pointer(s). __nvoc_init_funcTable_KernelChannelGroupApi_1(pThis); } diff --git a/src/nvidia/generated/g_kernel_channel_group_api_nvoc.h b/src/nvidia/generated/g_kernel_channel_group_api_nvoc.h index dd0e0b07bf..d6492a5a90 100644 --- a/src/nvidia/generated/g_kernel_channel_group_api_nvoc.h +++ b/src/nvidia/generated/g_kernel_channel_group_api_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -90,10 +90,15 @@ typedef struct KernelChannelGroup KernelChannelGroup; #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelChannelGroupApi; + + struct KernelChannelGroupApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelChannelGroupApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -106,9 +111,7 @@ struct KernelChannelGroupApi { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct KernelChannelGroupApi *__nvoc_pbase_KernelChannelGroupApi; // kchangrpapi - // Vtable with 41 per-object function pointers - NvBool (*__kchangrpapiCanCopy__)(struct KernelChannelGroupApi * /*this*/); // virtual override (res) base (gpures) - NV_STATUS (*__kchangrpapiControl__)(struct KernelChannelGroupApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (gpures) + // Vtable with 16 per-object function pointers NV_STATUS (*__kchangrpapiCtrlCmdGpFifoSchedule__)(struct KernelChannelGroupApi * /*this*/, NVA06C_CTRL_GPFIFO_SCHEDULE_PARAMS *); // exported (id=0xa06c0101) NV_STATUS (*__kchangrpapiCtrlCmdBind__)(struct KernelChannelGroupApi * /*this*/, NVA06C_CTRL_BIND_PARAMS *); // exported (id=0xa06c0102) NV_STATUS (*__kchangrpapiCtrlCmdSetTimeslice__)(struct KernelChannelGroupApi * /*this*/, NVA06C_CTRL_TIMESLICE_PARAMS *); // exported (id=0xa06c0103) @@ -125,6 +128,24 @@ struct KernelChannelGroupApi { NV_STATUS (*__kchangrpapiCtrlSetTpcPartitionMode__)(struct KernelChannelGroupApi * /*this*/, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *); // inline exported (id=0x900101) body NV_STATUS (*__kchangrpapiCtrlGetMMUDebugMode__)(struct KernelChannelGroupApi * /*this*/, NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS *); // inline exported (id=0x900105) body NV_STATUS (*__kchangrpapiCtrlProgramVidmemPromote__)(struct KernelChannelGroupApi * /*this*/, NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *); // inline exported (id=0x900107) body + + // Data members + struct KernelChannelGroup *pKernelChannelGroup; + NvHandle hErrorContext; + NvHandle hEccErrorContext; + NvHandle hKernelGraphicsContext; + NvHandle hLegacykCtxShareSync; + NvHandle hLegacykCtxShareAsync; + NvHandle hVASpace; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelChannelGroupApi { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + + NvBool (*__kchangrpapiCanCopy__)(struct KernelChannelGroupApi * /*this*/); // virtual override (res) base (gpures) + NV_STATUS (*__kchangrpapiControl__)(struct KernelChannelGroupApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (gpures) NV_STATUS (*__kchangrpapiMap__)(struct KernelChannelGroupApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__kchangrpapiUnmap__)(struct KernelChannelGroupApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NvBool (*__kchangrpapiShareCallback__)(struct KernelChannelGroupApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) @@ -148,15 +169,6 @@ struct KernelChannelGroupApi { NV_STATUS (*__kchangrpapiUnmapFrom__)(struct KernelChannelGroupApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__kchangrpapiGetRefCount__)(struct KernelChannelGroupApi * /*this*/); // virtual inherited (res) base (gpures) void (*__kchangrpapiAddAdditionalDependants__)(struct RsClient *, struct KernelChannelGroupApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - struct KernelChannelGroup *pKernelChannelGroup; - NvHandle hErrorContext; - NvHandle hEccErrorContext; - NvHandle hKernelGraphicsContext; - NvHandle hLegacykCtxShareSync; - NvHandle hLegacykCtxShareAsync; - NvHandle hVASpace; }; #ifndef __NVOC_CLASS_KernelChannelGroupApi_TYPEDEF__ @@ -189,9 +201,9 @@ NV_STATUS __nvoc_objCreate_KernelChannelGroupApi(KernelChannelGroupApi**, Dynami // Wrapper macros -#define kchangrpapiCanCopy_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__kchangrpapiCanCopy__ +#define kchangrpapiCanCopy_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__nvoc_vtable->__kchangrpapiCanCopy__ #define kchangrpapiCanCopy(pKernelChannelGroupApi) kchangrpapiCanCopy_DISPATCH(pKernelChannelGroupApi) -#define kchangrpapiControl_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__kchangrpapiControl__ +#define kchangrpapiControl_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__nvoc_vtable->__kchangrpapiControl__ #define kchangrpapiControl(pKernelChannelGroupApi, pCallContext, pParams) kchangrpapiControl_DISPATCH(pKernelChannelGroupApi, pCallContext, pParams) #define kchangrpapiCtrlCmdGpFifoSchedule_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__kchangrpapiCtrlCmdGpFifoSchedule__ #define kchangrpapiCtrlCmdGpFifoSchedule(pKernelChannelGroupApi, pSchedParams) kchangrpapiCtrlCmdGpFifoSchedule_DISPATCH(pKernelChannelGroupApi, pSchedParams) @@ -225,60 +237,60 @@ NV_STATUS __nvoc_objCreate_KernelChannelGroupApi(KernelChannelGroupApi**, Dynami #define kchangrpapiCtrlGetMMUDebugMode(pKernelChannelGroupApi, pParams) kchangrpapiCtrlGetMMUDebugMode_DISPATCH(pKernelChannelGroupApi, pParams) #define kchangrpapiCtrlProgramVidmemPromote_FNPTR(pKernelChannelGroupApi) pKernelChannelGroupApi->__kchangrpapiCtrlProgramVidmemPromote__ #define kchangrpapiCtrlProgramVidmemPromote(pKernelChannelGroupApi, pParams) kchangrpapiCtrlProgramVidmemPromote_DISPATCH(pKernelChannelGroupApi, pParams) -#define kchangrpapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define kchangrpapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define kchangrpapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) kchangrpapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define kchangrpapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define kchangrpapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define kchangrpapiUnmap(pGpuResource, pCallContext, pCpuMapping) kchangrpapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define kchangrpapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define kchangrpapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define kchangrpapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) kchangrpapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define kchangrpapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define kchangrpapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define kchangrpapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) kchangrpapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define kchangrpapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define kchangrpapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define kchangrpapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) kchangrpapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define kchangrpapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define kchangrpapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define kchangrpapiInternalControlForward(pGpuResource, command, pParams, size) kchangrpapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define kchangrpapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define kchangrpapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define kchangrpapiGetInternalObjectHandle(pGpuResource) kchangrpapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define kchangrpapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define kchangrpapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define kchangrpapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kchangrpapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define kchangrpapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define kchangrpapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define kchangrpapiGetMemInterMapParams(pRmResource, pParams) kchangrpapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define kchangrpapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define kchangrpapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define kchangrpapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) kchangrpapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define kchangrpapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define kchangrpapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define kchangrpapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) kchangrpapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define kchangrpapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define kchangrpapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define kchangrpapiControlSerialization_Prologue(pResource, pCallContext, pParams) kchangrpapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define kchangrpapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define kchangrpapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define kchangrpapiControlSerialization_Epilogue(pResource, pCallContext, pParams) kchangrpapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kchangrpapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define kchangrpapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define kchangrpapiControl_Prologue(pResource, pCallContext, pParams) kchangrpapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define kchangrpapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define kchangrpapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define kchangrpapiControl_Epilogue(pResource, pCallContext, pParams) kchangrpapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kchangrpapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define kchangrpapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define kchangrpapiIsDuplicate(pResource, hMemory, pDuplicate) kchangrpapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define kchangrpapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define kchangrpapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define kchangrpapiPreDestruct(pResource) kchangrpapiPreDestruct_DISPATCH(pResource) -#define kchangrpapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define kchangrpapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define kchangrpapiControlFilter(pResource, pCallContext, pParams) kchangrpapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define kchangrpapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define kchangrpapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define kchangrpapiIsPartialUnmapSupported(pResource) kchangrpapiIsPartialUnmapSupported_DISPATCH(pResource) -#define kchangrpapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define kchangrpapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define kchangrpapiMapTo(pResource, pParams) kchangrpapiMapTo_DISPATCH(pResource, pParams) -#define kchangrpapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define kchangrpapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define kchangrpapiUnmapFrom(pResource, pParams) kchangrpapiUnmapFrom_DISPATCH(pResource, pParams) -#define kchangrpapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define kchangrpapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define kchangrpapiGetRefCount(pResource) kchangrpapiGetRefCount_DISPATCH(pResource) -#define kchangrpapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define kchangrpapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define kchangrpapiAddAdditionalDependants(pClient, pResource, pReference) kchangrpapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool kchangrpapiCanCopy_DISPATCH(struct KernelChannelGroupApi *pKernelChannelGroupApi) { - return pKernelChannelGroupApi->__kchangrpapiCanCopy__(pKernelChannelGroupApi); + return pKernelChannelGroupApi->__nvoc_vtable->__kchangrpapiCanCopy__(pKernelChannelGroupApi); } static inline NV_STATUS kchangrpapiControl_DISPATCH(struct KernelChannelGroupApi *pKernelChannelGroupApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pKernelChannelGroupApi->__kchangrpapiControl__(pKernelChannelGroupApi, pCallContext, pParams); + return pKernelChannelGroupApi->__nvoc_vtable->__kchangrpapiControl__(pKernelChannelGroupApi, pCallContext, pParams); } static inline NV_STATUS kchangrpapiCtrlCmdGpFifoSchedule_DISPATCH(struct KernelChannelGroupApi *pKernelChannelGroupApi, NVA06C_CTRL_GPFIFO_SCHEDULE_PARAMS *pSchedParams) { @@ -346,95 +358,95 @@ static inline NV_STATUS kchangrpapiCtrlProgramVidmemPromote_DISPATCH(struct Kern } static inline NV_STATUS kchangrpapiMap_DISPATCH(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kchangrpapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__kchangrpapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS kchangrpapiUnmap_DISPATCH(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kchangrpapiUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__kchangrpapiUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool kchangrpapiShareCallback_DISPATCH(struct KernelChannelGroupApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__kchangrpapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__kchangrpapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS kchangrpapiGetRegBaseOffsetAndSize_DISPATCH(struct KernelChannelGroupApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__kchangrpapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__kchangrpapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS kchangrpapiGetMapAddrSpace_DISPATCH(struct KernelChannelGroupApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__kchangrpapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__kchangrpapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS kchangrpapiInternalControlForward_DISPATCH(struct KernelChannelGroupApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__kchangrpapiInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__kchangrpapiInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle kchangrpapiGetInternalObjectHandle_DISPATCH(struct KernelChannelGroupApi *pGpuResource) { - return pGpuResource->__kchangrpapiGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__kchangrpapiGetInternalObjectHandle__(pGpuResource); } static inline NvBool kchangrpapiAccessCallback_DISPATCH(struct KernelChannelGroupApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__kchangrpapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__kchangrpapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS kchangrpapiGetMemInterMapParams_DISPATCH(struct KernelChannelGroupApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__kchangrpapiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__kchangrpapiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS kchangrpapiCheckMemInterUnmap_DISPATCH(struct KernelChannelGroupApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__kchangrpapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__kchangrpapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS kchangrpapiGetMemoryMappingDescriptor_DISPATCH(struct KernelChannelGroupApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__kchangrpapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__kchangrpapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS kchangrpapiControlSerialization_Prologue_DISPATCH(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kchangrpapiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kchangrpapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void kchangrpapiControlSerialization_Epilogue_DISPATCH(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kchangrpapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__kchangrpapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS kchangrpapiControl_Prologue_DISPATCH(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kchangrpapiControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kchangrpapiControl_Prologue__(pResource, pCallContext, pParams); } static inline void kchangrpapiControl_Epilogue_DISPATCH(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kchangrpapiControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__kchangrpapiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS kchangrpapiIsDuplicate_DISPATCH(struct KernelChannelGroupApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__kchangrpapiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__kchangrpapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void kchangrpapiPreDestruct_DISPATCH(struct KernelChannelGroupApi *pResource) { - pResource->__kchangrpapiPreDestruct__(pResource); + pResource->__nvoc_vtable->__kchangrpapiPreDestruct__(pResource); } static inline NV_STATUS kchangrpapiControlFilter_DISPATCH(struct KernelChannelGroupApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kchangrpapiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kchangrpapiControlFilter__(pResource, pCallContext, pParams); } static inline NvBool kchangrpapiIsPartialUnmapSupported_DISPATCH(struct KernelChannelGroupApi *pResource) { - return pResource->__kchangrpapiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__kchangrpapiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS kchangrpapiMapTo_DISPATCH(struct KernelChannelGroupApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__kchangrpapiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__kchangrpapiMapTo__(pResource, pParams); } static inline NV_STATUS kchangrpapiUnmapFrom_DISPATCH(struct KernelChannelGroupApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__kchangrpapiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__kchangrpapiUnmapFrom__(pResource, pParams); } static inline NvU32 kchangrpapiGetRefCount_DISPATCH(struct KernelChannelGroupApi *pResource) { - return pResource->__kchangrpapiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__kchangrpapiGetRefCount__(pResource); } static inline void kchangrpapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelChannelGroupApi *pResource, RsResourceRef *pReference) { - pResource->__kchangrpapiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__kchangrpapiAddAdditionalDependants__(pClient, pResource, pReference); } NvBool kchangrpapiCanCopy_IMPL(struct KernelChannelGroupApi *pKernelChannelGroupApi); diff --git a/src/nvidia/generated/g_kernel_channel_group_nvoc.c b/src/nvidia/generated/g_kernel_channel_group_nvoc.c index 360ac6b966..c6d54f2fb9 100644 --- a/src/nvidia/generated/g_kernel_channel_group_nvoc.c +++ b/src/nvidia/generated/g_kernel_channel_group_nvoc.c @@ -66,6 +66,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelChannelGroup = /*pExportInfo=*/ &__nvoc_export_info_KernelChannelGroup }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelChannelGroup = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_kernel_channel_group_nvoc.h b/src/nvidia/generated/g_kernel_channel_group_nvoc.h index 66aefc62fc..20f16bcfdd 100644 --- a/src/nvidia/generated/g_kernel_channel_group_nvoc.h +++ b/src/nvidia/generated/g_kernel_channel_group_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -251,9 +251,9 @@ static inline void kchangrpSetSubcontextZombieState(struct OBJGPU *pGpu, struct #define kchangrpSetSubcontextZombieState_HAL(pGpu, arg2, arg3, arg4) kchangrpSetSubcontextZombieState(pGpu, arg2, arg3, arg4) -static inline NvBool kchangrpGetSubcontextZombieState_ceaee8(struct OBJGPU *pGpu, struct KernelChannelGroup *arg2, NvU32 arg3) { +static inline NvBool kchangrpGetSubcontextZombieState_72a2e1(struct OBJGPU *pGpu, struct KernelChannelGroup *arg2, NvU32 arg3) { NV_ASSERT_PRECOMP(0); - return ((NvBool)(0 != 0)); + return NV_FALSE; } @@ -263,7 +263,7 @@ static inline NvBool kchangrpGetSubcontextZombieState(struct OBJGPU *pGpu, struc return NV_FALSE; } #else //__nvoc_kernel_channel_group_h_disabled -#define kchangrpGetSubcontextZombieState(pGpu, arg2, arg3) kchangrpGetSubcontextZombieState_ceaee8(pGpu, arg2, arg3) +#define kchangrpGetSubcontextZombieState(pGpu, arg2, arg3) kchangrpGetSubcontextZombieState_72a2e1(pGpu, arg2, arg3) #endif //__nvoc_kernel_channel_group_h_disabled #define kchangrpGetSubcontextZombieState_HAL(pGpu, arg2, arg3) kchangrpGetSubcontextZombieState(pGpu, arg2, arg3) diff --git a/src/nvidia/generated/g_kernel_channel_nvoc.c b/src/nvidia/generated/g_kernel_channel_nvoc.c index f7610d8a5a..b45181e0b2 100644 --- a/src/nvidia/generated/g_kernel_channel_nvoc.c +++ b/src/nvidia/generated/g_kernel_channel_nvoc.c @@ -553,6 +553,21 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh #endif }, { /* [29] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) kchannelCtrlCmdInternalGpFifoGetWorkSubmitToken_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, + /*accessRight=*/0x0u, + /*methodId=*/ 0xc36f0301u, + /*paramSize=*/ sizeof(NVC36F_CTRL_INTERNAL_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_KernelChannel.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "kchannelCtrlCmdInternalGpFifoGetWorkSubmitToken" +#endif + }, + { /* [30] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -567,7 +582,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh /*func=*/ "kchannelCtrlCmdGetKmb" #endif }, - { /* [30] */ + { /* [31] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -585,165 +600,243 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCh }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_down_thunk_KernelChannel_gpuresMap(struct GpuResource *pKernelChannel, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_down_thunk_KernelChannel_gpuresUnmap(struct GpuResource *pKernelChannel, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_down_thunk_KernelChannel_gpuresGetMapAddrSpace(struct GpuResource *pKernelChannel, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_down_thunk_KernelChannel_rmresGetMemInterMapParams(struct RmResource *pKernelChannel, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_down_thunk_KernelChannel_rmresCheckMemInterUnmap(struct RmResource *pKernelChannel, NvBool bSubdeviceHandleProvided); // this + // 5 down-thunk(s) defined to bridge methods in KernelChannel from superclasses // kchannelMap: virtual override (res) base (gpures) -static NV_STATUS __nvoc_down_thunk_KernelChannel_gpuresMap(struct GpuResource *pKernelChannel, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_down_thunk_KernelChannel_gpuresMap(struct GpuResource *pKernelChannel, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return kchannelMap((struct KernelChannel *)(((unsigned char *) pKernelChannel) - __nvoc_rtti_KernelChannel_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // kchannelUnmap: virtual override (res) base (gpures) -static NV_STATUS __nvoc_down_thunk_KernelChannel_gpuresUnmap(struct GpuResource *pKernelChannel, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_down_thunk_KernelChannel_gpuresUnmap(struct GpuResource *pKernelChannel, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return kchannelUnmap((struct KernelChannel *)(((unsigned char *) pKernelChannel) - __nvoc_rtti_KernelChannel_GpuResource.offset), pCallContext, pCpuMapping); } // kchannelGetMapAddrSpace: virtual override (gpures) base (gpures) -static NV_STATUS __nvoc_down_thunk_KernelChannel_gpuresGetMapAddrSpace(struct GpuResource *pKernelChannel, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_down_thunk_KernelChannel_gpuresGetMapAddrSpace(struct GpuResource *pKernelChannel, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return kchannelGetMapAddrSpace((struct KernelChannel *)(((unsigned char *) pKernelChannel) - __nvoc_rtti_KernelChannel_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // kchannelGetMemInterMapParams: virtual override (rmres) base (gpures) -static NV_STATUS __nvoc_down_thunk_KernelChannel_rmresGetMemInterMapParams(struct RmResource *pKernelChannel, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_down_thunk_KernelChannel_rmresGetMemInterMapParams(struct RmResource *pKernelChannel, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return kchannelGetMemInterMapParams((struct KernelChannel *)(((unsigned char *) pKernelChannel) - __nvoc_rtti_KernelChannel_RmResource.offset), pParams); } // kchannelCheckMemInterUnmap: virtual override (rmres) base (gpures) -static NV_STATUS __nvoc_down_thunk_KernelChannel_rmresCheckMemInterUnmap(struct RmResource *pKernelChannel, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_down_thunk_KernelChannel_rmresCheckMemInterUnmap(struct RmResource *pKernelChannel, NvBool bSubdeviceHandleProvided) { return kchannelCheckMemInterUnmap((struct KernelChannel *)(((unsigned char *) pKernelChannel) - __nvoc_rtti_KernelChannel_RmResource.offset), bSubdeviceHandleProvided); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_kchannelControl(struct KernelChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_GpuResource_kchannelShareCallback(struct KernelChannel *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kchannelGetRegBaseOffsetAndSize(struct KernelChannel *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kchannelInternalControlForward(struct KernelChannel *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_kchannelGetInternalObjectHandle(struct KernelChannel *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_kchannelAccessCallback(struct KernelChannel *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_kchannelGetMemoryMappingDescriptor(struct KernelChannel *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_kchannelControlSerialization_Prologue(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_kchannelControlSerialization_Epilogue(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_kchannelControl_Prologue(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_kchannelControl_Epilogue(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_kchannelCanCopy(struct KernelChannel *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_kchannelIsDuplicate(struct KernelChannel *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_kchannelPreDestruct(struct KernelChannel *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_kchannelControlFilter(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_kchannelIsPartialUnmapSupported(struct KernelChannel *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_kchannelMapTo(struct KernelChannel *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_kchannelUnmapFrom(struct KernelChannel *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_kchannelGetRefCount(struct KernelChannel *pResource); // this +void __nvoc_up_thunk_RsResource_kchannelAddAdditionalDependants(struct RsClient *pClient, struct KernelChannel *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_kchannelGetNotificationListPtr(struct KernelChannel *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_kchannelGetNotificationShare(struct KernelChannel *pNotifier); // this +void __nvoc_up_thunk_Notifier_kchannelSetNotificationShare(struct KernelChannel *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_kchannelUnregisterEvent(struct KernelChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_kchannelGetOrAllocNotifShare(struct KernelChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 25 up-thunk(s) defined to bridge methods in KernelChannel to superclasses // kchannelControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kchannelControl(struct KernelChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_kchannelControl(struct KernelChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannel_GpuResource.offset), pCallContext, pParams); } // kchannelShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_kchannelShareCallback(struct KernelChannel *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_kchannelShareCallback(struct KernelChannel *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannel_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // kchannelGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kchannelGetRegBaseOffsetAndSize(struct KernelChannel *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_kchannelGetRegBaseOffsetAndSize(struct KernelChannel *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannel_GpuResource.offset), pGpu, pOffset, pSize); } // kchannelInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kchannelInternalControlForward(struct KernelChannel *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_kchannelInternalControlForward(struct KernelChannel *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannel_GpuResource.offset), command, pParams, size); } // kchannelGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_kchannelGetInternalObjectHandle(struct KernelChannel *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_kchannelGetInternalObjectHandle(struct KernelChannel *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelChannel_GpuResource.offset)); } // kchannelAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_kchannelAccessCallback(struct KernelChannel *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_kchannelAccessCallback(struct KernelChannel *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // kchannelGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kchannelGetMemoryMappingDescriptor(struct KernelChannel *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_kchannelGetMemoryMappingDescriptor(struct KernelChannel *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelChannel_RmResource.offset), ppMemDesc); } // kchannelControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kchannelControlSerialization_Prologue(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_kchannelControlSerialization_Prologue(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RmResource.offset), pCallContext, pParams); } // kchannelControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_kchannelControlSerialization_Epilogue(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_kchannelControlSerialization_Epilogue(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RmResource.offset), pCallContext, pParams); } // kchannelControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kchannelControl_Prologue(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_kchannelControl_Prologue(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RmResource.offset), pCallContext, pParams); } // kchannelControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_kchannelControl_Epilogue(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_kchannelControl_Epilogue(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RmResource.offset), pCallContext, pParams); } // kchannelCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_kchannelCanCopy(struct KernelChannel *pResource) { +NvBool __nvoc_up_thunk_RsResource_kchannelCanCopy(struct KernelChannel *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RsResource.offset)); } // kchannelIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kchannelIsDuplicate(struct KernelChannel *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_kchannelIsDuplicate(struct KernelChannel *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RsResource.offset), hMemory, pDuplicate); } // kchannelPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_kchannelPreDestruct(struct KernelChannel *pResource) { +void __nvoc_up_thunk_RsResource_kchannelPreDestruct(struct KernelChannel *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RsResource.offset)); } // kchannelControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kchannelControlFilter(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kchannelControlFilter(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RsResource.offset), pCallContext, pParams); } // kchannelIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_kchannelIsPartialUnmapSupported(struct KernelChannel *pResource) { +NvBool __nvoc_up_thunk_RsResource_kchannelIsPartialUnmapSupported(struct KernelChannel *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RsResource.offset)); } // kchannelMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kchannelMapTo(struct KernelChannel *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kchannelMapTo(struct KernelChannel *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RsResource.offset), pParams); } // kchannelUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kchannelUnmapFrom(struct KernelChannel *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kchannelUnmapFrom(struct KernelChannel *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RsResource.offset), pParams); } // kchannelGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_kchannelGetRefCount(struct KernelChannel *pResource) { +NvU32 __nvoc_up_thunk_RsResource_kchannelGetRefCount(struct KernelChannel *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RsResource.offset)); } // kchannelAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_kchannelAddAdditionalDependants(struct RsClient *pClient, struct KernelChannel *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_kchannelAddAdditionalDependants(struct RsClient *pClient, struct KernelChannel *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelChannel_RsResource.offset), pReference); } // kchannelGetNotificationListPtr: virtual inherited (notify) base (notify) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_kchannelGetNotificationListPtr(struct KernelChannel *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_kchannelGetNotificationListPtr(struct KernelChannel *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelChannel_Notifier.offset)); } // kchannelGetNotificationShare: virtual inherited (notify) base (notify) -static struct NotifShare * __nvoc_up_thunk_Notifier_kchannelGetNotificationShare(struct KernelChannel *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_kchannelGetNotificationShare(struct KernelChannel *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelChannel_Notifier.offset)); } // kchannelSetNotificationShare: virtual inherited (notify) base (notify) -static void __nvoc_up_thunk_Notifier_kchannelSetNotificationShare(struct KernelChannel *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_kchannelSetNotificationShare(struct KernelChannel *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelChannel_Notifier.offset), pNotifShare); } // kchannelUnregisterEvent: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_kchannelUnregisterEvent(struct KernelChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_kchannelUnregisterEvent(struct KernelChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelChannel_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // kchannelGetOrAllocNotifShare: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_kchannelGetOrAllocNotifShare(struct KernelChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_kchannelGetOrAllocNotifShare(struct KernelChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelChannel_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelChannel = { - /*numEntries=*/ 31, + /*numEntries=*/ 32, /*pExportEntries=*/ __nvoc_exported_method_def_KernelChannel }; @@ -806,26 +899,6 @@ static void __nvoc_init_funcTable_KernelChannel_1(KernelChannel *pThis, RmHalspe PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); - // kchannelMap -- virtual override (res) base (gpures) - pThis->__kchannelMap__ = &kchannelMap_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresMap__ = &__nvoc_down_thunk_KernelChannel_gpuresMap; - - // kchannelUnmap -- virtual override (res) base (gpures) - pThis->__kchannelUnmap__ = &kchannelUnmap_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresUnmap__ = &__nvoc_down_thunk_KernelChannel_gpuresUnmap; - - // kchannelGetMapAddrSpace -- virtual override (gpures) base (gpures) - pThis->__kchannelGetMapAddrSpace__ = &kchannelGetMapAddrSpace_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_down_thunk_KernelChannel_gpuresGetMapAddrSpace; - - // kchannelGetMemInterMapParams -- virtual override (rmres) base (gpures) - pThis->__kchannelGetMemInterMapParams__ = &kchannelGetMemInterMapParams_IMPL; - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_KernelChannel_rmresGetMemInterMapParams; - - // kchannelCheckMemInterUnmap -- virtual override (rmres) base (gpures) - pThis->__kchannelCheckMemInterUnmap__ = &kchannelCheckMemInterUnmap_IMPL; - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_KernelChannel_rmresCheckMemInterUnmap; - // kchannelCreateUserMemDesc -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { @@ -960,6 +1033,11 @@ static void __nvoc_init_funcTable_KernelChannel_1(KernelChannel *pThis, RmHalspe pThis->__kchannelCtrlCmdGpfifoGetWorkSubmitToken__ = &kchannelCtrlCmdGpfifoGetWorkSubmitToken_IMPL; #endif + // kchannelCtrlCmdInternalGpFifoGetWorkSubmitToken -- exported (id=0xc36f0301) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + pThis->__kchannelCtrlCmdInternalGpFifoGetWorkSubmitToken__ = &kchannelCtrlCmdInternalGpFifoGetWorkSubmitToken_IMPL; +#endif + // kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer -- exported (id=0xc36f0109) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) pThis->__kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer__ = &kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer_IMPL; @@ -1044,88 +1122,189 @@ static void __nvoc_init_funcTable_KernelChannel_1(KernelChannel *pThis, RmHalspe { pThis->__kchannelSetKeyRotationNotifier__ = &kchannelSetKeyRotationNotifier_KERNEL; } +} // End __nvoc_init_funcTable_KernelChannel_1 with approximately 45 basic block(s). - // kchannelControl -- virtual inherited (gpures) base (gpures) - pThis->__kchannelControl__ = &__nvoc_up_thunk_GpuResource_kchannelControl; - - // kchannelShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__kchannelShareCallback__ = &__nvoc_up_thunk_GpuResource_kchannelShareCallback; - - // kchannelGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__kchannelGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kchannelGetRegBaseOffsetAndSize; - - // kchannelInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__kchannelInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kchannelInternalControlForward; - - // kchannelGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__kchannelGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_kchannelGetInternalObjectHandle; - - // kchannelAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__kchannelAccessCallback__ = &__nvoc_up_thunk_RmResource_kchannelAccessCallback; - - // kchannelGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__kchannelGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_kchannelGetMemoryMappingDescriptor; - - // kchannelControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__kchannelControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kchannelControlSerialization_Prologue; - - // kchannelControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__kchannelControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kchannelControlSerialization_Epilogue; - // kchannelControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__kchannelControl_Prologue__ = &__nvoc_up_thunk_RmResource_kchannelControl_Prologue; - - // kchannelControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__kchannelControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kchannelControl_Epilogue; - - // kchannelCanCopy -- virtual inherited (res) base (gpures) - pThis->__kchannelCanCopy__ = &__nvoc_up_thunk_RsResource_kchannelCanCopy; - - // kchannelIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__kchannelIsDuplicate__ = &__nvoc_up_thunk_RsResource_kchannelIsDuplicate; - - // kchannelPreDestruct -- virtual inherited (res) base (gpures) - pThis->__kchannelPreDestruct__ = &__nvoc_up_thunk_RsResource_kchannelPreDestruct; - - // kchannelControlFilter -- virtual inherited (res) base (gpures) - pThis->__kchannelControlFilter__ = &__nvoc_up_thunk_RsResource_kchannelControlFilter; - - // kchannelIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__kchannelIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kchannelIsPartialUnmapSupported; - - // kchannelMapTo -- virtual inherited (res) base (gpures) - pThis->__kchannelMapTo__ = &__nvoc_up_thunk_RsResource_kchannelMapTo; - - // kchannelUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__kchannelUnmapFrom__ = &__nvoc_up_thunk_RsResource_kchannelUnmapFrom; - - // kchannelGetRefCount -- virtual inherited (res) base (gpures) - pThis->__kchannelGetRefCount__ = &__nvoc_up_thunk_RsResource_kchannelGetRefCount; - - // kchannelAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__kchannelAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kchannelAddAdditionalDependants; - - // kchannelGetNotificationListPtr -- virtual inherited (notify) base (notify) - pThis->__kchannelGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_kchannelGetNotificationListPtr; - - // kchannelGetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__kchannelGetNotificationShare__ = &__nvoc_up_thunk_Notifier_kchannelGetNotificationShare; - - // kchannelSetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__kchannelSetNotificationShare__ = &__nvoc_up_thunk_Notifier_kchannelSetNotificationShare; - - // kchannelUnregisterEvent -- virtual inherited (notify) base (notify) - pThis->__kchannelUnregisterEvent__ = &__nvoc_up_thunk_Notifier_kchannelUnregisterEvent; - - // kchannelGetOrAllocNotifShare -- virtual inherited (notify) base (notify) - pThis->__kchannelGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_kchannelGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_KernelChannel_1 with approximately 79 basic block(s). - - -// Initialize vtable(s) for 66 virtual method(s). +// Initialize vtable(s) for 67 virtual method(s). void __nvoc_init_funcTable_KernelChannel(KernelChannel *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 66 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelChannel vtable = { + .__kchannelMap__ = &kchannelMap_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresMap__ = &__nvoc_down_thunk_KernelChannel_gpuresMap, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__kchannelUnmap__ = &kchannelUnmap_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresUnmap__ = &__nvoc_down_thunk_KernelChannel_gpuresUnmap, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__kchannelGetMapAddrSpace__ = &kchannelGetMapAddrSpace_IMPL, // virtual override (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_down_thunk_KernelChannel_gpuresGetMapAddrSpace, // virtual + .__kchannelGetMemInterMapParams__ = &kchannelGetMemInterMapParams_IMPL, // virtual override (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_KernelChannel_rmresGetMemInterMapParams, // virtual + .__kchannelCheckMemInterUnmap__ = &kchannelCheckMemInterUnmap_IMPL, // virtual override (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_KernelChannel_rmresCheckMemInterUnmap, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x28u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4044u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14044u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14044u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__kchannelControl__ = &__nvoc_up_thunk_GpuResource_kchannelControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__kchannelShareCallback__ = &__nvoc_up_thunk_GpuResource_kchannelShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__kchannelGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kchannelGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__kchannelInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kchannelInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__kchannelGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_kchannelGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__kchannelAccessCallback__ = &__nvoc_up_thunk_RmResource_kchannelAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__kchannelGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_kchannelGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__kchannelControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kchannelControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__kchannelControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kchannelControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__kchannelControl_Prologue__ = &__nvoc_up_thunk_RmResource_kchannelControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__kchannelControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kchannelControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__kchannelCanCopy__ = &__nvoc_up_thunk_RsResource_kchannelCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__kchannelIsDuplicate__ = &__nvoc_up_thunk_RsResource_kchannelIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__kchannelPreDestruct__ = &__nvoc_up_thunk_RsResource_kchannelPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__kchannelControlFilter__ = &__nvoc_up_thunk_RsResource_kchannelControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__kchannelIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kchannelIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__kchannelMapTo__ = &__nvoc_up_thunk_RsResource_kchannelMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__kchannelUnmapFrom__ = &__nvoc_up_thunk_RsResource_kchannelUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__kchannelGetRefCount__ = &__nvoc_up_thunk_RsResource_kchannelGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__kchannelAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kchannelAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__kchannelGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_kchannelGetNotificationListPtr, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__kchannelGetNotificationShare__ = &__nvoc_up_thunk_Notifier_kchannelGetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__kchannelSetNotificationShare__ = &__nvoc_up_thunk_Notifier_kchannelSetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__kchannelUnregisterEvent__ = &__nvoc_up_thunk_Notifier_kchannelUnregisterEvent, // virtual inherited (notify) base (notify) + .Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__kchannelGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_kchannelGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.Notifier.INotifier; // (inotify) super^2 + pThis->__nvoc_base_Notifier.__nvoc_vtable = &vtable.Notifier; // (notify) super + pThis->__nvoc_vtable = &vtable; // (kchannel) this + + // Initialize vtable(s) with 37 per-object function pointer(s). __nvoc_init_funcTable_KernelChannel_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_channel_nvoc.h b/src/nvidia/generated/g_kernel_channel_nvoc.h index 4fa94c91fa..2c68641c1c 100644 --- a/src/nvidia/generated/g_kernel_channel_nvoc.h +++ b/src/nvidia/generated/g_kernel_channel_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -202,6 +202,11 @@ typedef struct _def_instance_block #define NV_KERNELCHANNEL_ALLOC_INTERNALFLAGS_GSP_OWNED_NO 0x0 #define NV_KERNELCHANNEL_ALLOC_INTERNALFLAGS_GSP_OWNED_YES 0x1 +// Channel is created by UVM +#define NV_KERNELCHANNEL_ALLOC_INTERNALFLAGS_UVM_OWNED 7:7 +#define NV_KERNELCHANNEL_ALLOC_INTERNALFLAGS_UVM_OWNED_NO 0x0 +#define NV_KERNELCHANNEL_ALLOC_INTERNALFLAGS_UVM_OWNED_YES 0x1 + /*! * Class for the kernel side of a Channel object. */ @@ -216,10 +221,15 @@ typedef struct _def_instance_block #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelChannel; + + struct KernelChannel { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelChannel *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -235,12 +245,7 @@ struct KernelChannel { struct Notifier *__nvoc_pbase_Notifier; // notify super struct KernelChannel *__nvoc_pbase_KernelChannel; // kchannel - // Vtable with 66 per-object function pointers - NV_STATUS (*__kchannelMap__)(struct KernelChannel * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual override (res) base (gpures) - NV_STATUS (*__kchannelUnmap__)(struct KernelChannel * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual override (res) base (gpures) - NV_STATUS (*__kchannelGetMapAddrSpace__)(struct KernelChannel * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (gpures) base (gpures) - NV_STATUS (*__kchannelGetMemInterMapParams__)(struct KernelChannel * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual override (rmres) base (gpures) - NV_STATUS (*__kchannelCheckMemInterUnmap__)(struct KernelChannel * /*this*/, NvBool); // virtual override (rmres) base (gpures) + // Vtable with 37 per-object function pointers NV_STATUS (*__kchannelCreateUserMemDesc__)(struct OBJGPU *, struct KernelChannel * /*this*/); // halified (2 hals) NvBool (*__kchannelIsUserdAddrSizeValid__)(struct KernelChannel * /*this*/, NvU32, NvU32); // halified (3 hals) body NV_STATUS (*__kchannelCtrlCmdResetIsolatedChannel__)(struct KernelChannel * /*this*/, NV506F_CTRL_CMD_RESET_ISOLATED_CHANNEL_PARAMS *); // exported (id=0x506f0105) @@ -265,6 +270,7 @@ struct KernelChannel { NV_STATUS (*__kchannelCtrlCmdSaveEngineCtxData__)(struct KernelChannel * /*this*/, NVB06F_CTRL_SAVE_ENGINE_CTX_DATA_PARAMS *); // exported (id=0xb06f0111) NV_STATUS (*__kchannelCtrlCmdRestoreEngineCtxData__)(struct KernelChannel * /*this*/, NVB06F_CTRL_RESTORE_ENGINE_CTX_DATA_PARAMS *); // exported (id=0xb06f0112) NV_STATUS (*__kchannelCtrlCmdGpfifoGetWorkSubmitToken__)(struct KernelChannel * /*this*/, NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS *); // exported (id=0xc36f0108) + NV_STATUS (*__kchannelCtrlCmdInternalGpFifoGetWorkSubmitToken__)(struct KernelChannel * /*this*/, NVC36F_CTRL_INTERNAL_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS *); // exported (id=0xc36f0301) NV_STATUS (*__kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer__)(struct KernelChannel * /*this*/, NVC36F_CTRL_GPFIFO_UPDATE_FAULT_METHOD_BUFFER_PARAMS *); // exported (id=0xc36f0109) NV_STATUS (*__kchannelCtrlCmdGpfifoSetWorkSubmitTokenNotifIndex__)(struct KernelChannel * /*this*/, NVC36F_CTRL_GPFIFO_SET_WORK_SUBMIT_TOKEN_NOTIF_INDEX_PARAMS *); // exported (id=0xc36f010a) NV_STATUS (*__kchannelCtrlCmdStopChannel__)(struct KernelChannel * /*this*/, NVA06F_CTRL_STOP_CHANNEL_PARAMS *); // exported (id=0xa06f0112) @@ -277,31 +283,6 @@ struct KernelChannel { NV_STATUS (*__kchannelCtrlProgramVidmemPromote__)(struct KernelChannel * /*this*/, NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *); // inline exported (id=0x900107) body NV_STATUS (*__kchannelRetrieveKmb__)(struct OBJGPU *, struct KernelChannel * /*this*/, ROTATE_IV_TYPE, NvBool, CC_KMB *); // halified (2 hals) body NV_STATUS (*__kchannelSetKeyRotationNotifier__)(struct OBJGPU *, struct KernelChannel * /*this*/, NvBool); // halified (2 hals) body - NV_STATUS (*__kchannelControl__)(struct KernelChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) - NvBool (*__kchannelShareCallback__)(struct KernelChannel * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) - NV_STATUS (*__kchannelGetRegBaseOffsetAndSize__)(struct KernelChannel * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) - NV_STATUS (*__kchannelInternalControlForward__)(struct KernelChannel * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) - NvHandle (*__kchannelGetInternalObjectHandle__)(struct KernelChannel * /*this*/); // virtual inherited (gpures) base (gpures) - NvBool (*__kchannelAccessCallback__)(struct KernelChannel * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__kchannelGetMemoryMappingDescriptor__)(struct KernelChannel * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__kchannelControlSerialization_Prologue__)(struct KernelChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) - void (*__kchannelControlSerialization_Epilogue__)(struct KernelChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__kchannelControl_Prologue__)(struct KernelChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) - void (*__kchannelControl_Epilogue__)(struct KernelChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) - NvBool (*__kchannelCanCopy__)(struct KernelChannel * /*this*/); // virtual inherited (res) base (gpures) - NV_STATUS (*__kchannelIsDuplicate__)(struct KernelChannel * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) - void (*__kchannelPreDestruct__)(struct KernelChannel * /*this*/); // virtual inherited (res) base (gpures) - NV_STATUS (*__kchannelControlFilter__)(struct KernelChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) - NvBool (*__kchannelIsPartialUnmapSupported__)(struct KernelChannel * /*this*/); // inline virtual inherited (res) base (gpures) body - NV_STATUS (*__kchannelMapTo__)(struct KernelChannel * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) - NV_STATUS (*__kchannelUnmapFrom__)(struct KernelChannel * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) - NvU32 (*__kchannelGetRefCount__)(struct KernelChannel * /*this*/); // virtual inherited (res) base (gpures) - void (*__kchannelAddAdditionalDependants__)(struct RsClient *, struct KernelChannel * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - PEVENTNOTIFICATION * (*__kchannelGetNotificationListPtr__)(struct KernelChannel * /*this*/); // virtual inherited (notify) base (notify) - struct NotifShare * (*__kchannelGetNotificationShare__)(struct KernelChannel * /*this*/); // virtual inherited (notify) base (notify) - void (*__kchannelSetNotificationShare__)(struct KernelChannel * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) - NV_STATUS (*__kchannelUnregisterEvent__)(struct KernelChannel * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) - NV_STATUS (*__kchannelGetOrAllocNotifShare__)(struct KernelChannel * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) // Data members NvU16 nextObjectClassID; @@ -326,6 +307,7 @@ struct KernelChannel { struct KernelCtxShareApi *pKernelCtxShareApi; NvU32 refCount; NvBool bGspOwned; + NvBool bUvmOwned; NvBool bIsContextBound; FIFO_INSTANCE_BLOCK *pFifoHalData[8]; MEMORY_DESCRIPTOR *pInstSubDeviceMemDesc[8]; @@ -354,6 +336,44 @@ struct KernelChannel { NvBool bUseScrubKey; }; + +// Metadata including vtable with 30 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelChannel { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + const struct NVOC_VTABLE__Notifier Notifier; // (notify) 5 function pointers + + NV_STATUS (*__kchannelMap__)(struct KernelChannel * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual override (res) base (gpures) + NV_STATUS (*__kchannelUnmap__)(struct KernelChannel * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual override (res) base (gpures) + NV_STATUS (*__kchannelGetMapAddrSpace__)(struct KernelChannel * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (gpures) base (gpures) + NV_STATUS (*__kchannelGetMemInterMapParams__)(struct KernelChannel * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual override (rmres) base (gpures) + NV_STATUS (*__kchannelCheckMemInterUnmap__)(struct KernelChannel * /*this*/, NvBool); // virtual override (rmres) base (gpures) + NV_STATUS (*__kchannelControl__)(struct KernelChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NvBool (*__kchannelShareCallback__)(struct KernelChannel * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kchannelGetRegBaseOffsetAndSize__)(struct KernelChannel * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__kchannelInternalControlForward__)(struct KernelChannel * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) + NvHandle (*__kchannelGetInternalObjectHandle__)(struct KernelChannel * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__kchannelAccessCallback__)(struct KernelChannel * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kchannelGetMemoryMappingDescriptor__)(struct KernelChannel * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kchannelControlSerialization_Prologue__)(struct KernelChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__kchannelControlSerialization_Epilogue__)(struct KernelChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__kchannelControl_Prologue__)(struct KernelChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__kchannelControl_Epilogue__)(struct KernelChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__kchannelCanCopy__)(struct KernelChannel * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__kchannelIsDuplicate__)(struct KernelChannel * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + void (*__kchannelPreDestruct__)(struct KernelChannel * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__kchannelControlFilter__)(struct KernelChannel * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__kchannelIsPartialUnmapSupported__)(struct KernelChannel * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__kchannelMapTo__)(struct KernelChannel * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__kchannelUnmapFrom__)(struct KernelChannel * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__kchannelGetRefCount__)(struct KernelChannel * /*this*/); // virtual inherited (res) base (gpures) + void (*__kchannelAddAdditionalDependants__)(struct RsClient *, struct KernelChannel * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + PEVENTNOTIFICATION * (*__kchannelGetNotificationListPtr__)(struct KernelChannel * /*this*/); // virtual inherited (notify) base (notify) + struct NotifShare * (*__kchannelGetNotificationShare__)(struct KernelChannel * /*this*/); // virtual inherited (notify) base (notify) + void (*__kchannelSetNotificationShare__)(struct KernelChannel * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) + NV_STATUS (*__kchannelUnregisterEvent__)(struct KernelChannel * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) + NV_STATUS (*__kchannelGetOrAllocNotifShare__)(struct KernelChannel * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) +}; + #ifndef __NVOC_CLASS_KernelChannel_TYPEDEF__ #define __NVOC_CLASS_KernelChannel_TYPEDEF__ typedef struct KernelChannel KernelChannel; @@ -384,15 +404,15 @@ NV_STATUS __nvoc_objCreate_KernelChannel(KernelChannel**, Dynamic*, NvU32, CALL_ // Wrapper macros -#define kchannelMap_FNPTR(pKernelChannel) pKernelChannel->__kchannelMap__ +#define kchannelMap_FNPTR(pKernelChannel) pKernelChannel->__nvoc_vtable->__kchannelMap__ #define kchannelMap(pKernelChannel, pCallContext, pParams, pCpuMapping) kchannelMap_DISPATCH(pKernelChannel, pCallContext, pParams, pCpuMapping) -#define kchannelUnmap_FNPTR(pKernelChannel) pKernelChannel->__kchannelUnmap__ +#define kchannelUnmap_FNPTR(pKernelChannel) pKernelChannel->__nvoc_vtable->__kchannelUnmap__ #define kchannelUnmap(pKernelChannel, pCallContext, pCpuMapping) kchannelUnmap_DISPATCH(pKernelChannel, pCallContext, pCpuMapping) -#define kchannelGetMapAddrSpace_FNPTR(pKernelChannel) pKernelChannel->__kchannelGetMapAddrSpace__ +#define kchannelGetMapAddrSpace_FNPTR(pKernelChannel) pKernelChannel->__nvoc_vtable->__kchannelGetMapAddrSpace__ #define kchannelGetMapAddrSpace(pKernelChannel, pCallContext, mapFlags, pAddrSpace) kchannelGetMapAddrSpace_DISPATCH(pKernelChannel, pCallContext, mapFlags, pAddrSpace) -#define kchannelGetMemInterMapParams_FNPTR(pKernelChannel) pKernelChannel->__kchannelGetMemInterMapParams__ +#define kchannelGetMemInterMapParams_FNPTR(pKernelChannel) pKernelChannel->__nvoc_vtable->__kchannelGetMemInterMapParams__ #define kchannelGetMemInterMapParams(pKernelChannel, pParams) kchannelGetMemInterMapParams_DISPATCH(pKernelChannel, pParams) -#define kchannelCheckMemInterUnmap_FNPTR(pKernelChannel) pKernelChannel->__kchannelCheckMemInterUnmap__ +#define kchannelCheckMemInterUnmap_FNPTR(pKernelChannel) pKernelChannel->__nvoc_vtable->__kchannelCheckMemInterUnmap__ #define kchannelCheckMemInterUnmap(pKernelChannel, bSubdeviceHandleProvided) kchannelCheckMemInterUnmap_DISPATCH(pKernelChannel, bSubdeviceHandleProvided) #define kchannelCreateUserMemDesc_FNPTR(arg_this) arg_this->__kchannelCreateUserMemDesc__ #define kchannelCreateUserMemDesc(pGpu, arg_this) kchannelCreateUserMemDesc_DISPATCH(pGpu, arg_this) @@ -444,6 +464,8 @@ NV_STATUS __nvoc_objCreate_KernelChannel(KernelChannel**, Dynamic*, NvU32, CALL_ #define kchannelCtrlCmdRestoreEngineCtxData(pKernelChannel, pCtxBuffParams) kchannelCtrlCmdRestoreEngineCtxData_DISPATCH(pKernelChannel, pCtxBuffParams) #define kchannelCtrlCmdGpfifoGetWorkSubmitToken_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdGpfifoGetWorkSubmitToken__ #define kchannelCtrlCmdGpfifoGetWorkSubmitToken(pKernelChannel, pTokenParams) kchannelCtrlCmdGpfifoGetWorkSubmitToken_DISPATCH(pKernelChannel, pTokenParams) +#define kchannelCtrlCmdInternalGpFifoGetWorkSubmitToken_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdInternalGpFifoGetWorkSubmitToken__ +#define kchannelCtrlCmdInternalGpFifoGetWorkSubmitToken(pKernelChannel, pTokenParams) kchannelCtrlCmdInternalGpFifoGetWorkSubmitToken_DISPATCH(pKernelChannel, pTokenParams) #define kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer__ #define kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer(pKernelChannel, pFaultMthdBufferParams) kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer_DISPATCH(pKernelChannel, pFaultMthdBufferParams) #define kchannelCtrlCmdGpfifoSetWorkSubmitTokenNotifIndex_FNPTR(pKernelChannel) pKernelChannel->__kchannelCtrlCmdGpfifoSetWorkSubmitTokenNotifIndex__ @@ -473,76 +495,76 @@ NV_STATUS __nvoc_objCreate_KernelChannel(KernelChannel**, Dynamic*, NvU32, CALL_ #define kchannelSetKeyRotationNotifier_FNPTR(pKernelChannel) pKernelChannel->__kchannelSetKeyRotationNotifier__ #define kchannelSetKeyRotationNotifier(pGpu, pKernelChannel, bSet) kchannelSetKeyRotationNotifier_DISPATCH(pGpu, pKernelChannel, bSet) #define kchannelSetKeyRotationNotifier_HAL(pGpu, pKernelChannel, bSet) kchannelSetKeyRotationNotifier_DISPATCH(pGpu, pKernelChannel, bSet) -#define kchannelControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define kchannelControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define kchannelControl(pGpuResource, pCallContext, pParams) kchannelControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define kchannelShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define kchannelShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define kchannelShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) kchannelShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define kchannelGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define kchannelGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define kchannelGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) kchannelGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define kchannelInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define kchannelInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define kchannelInternalControlForward(pGpuResource, command, pParams, size) kchannelInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define kchannelGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define kchannelGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define kchannelGetInternalObjectHandle(pGpuResource) kchannelGetInternalObjectHandle_DISPATCH(pGpuResource) -#define kchannelAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define kchannelAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define kchannelAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kchannelAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define kchannelGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define kchannelGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define kchannelGetMemoryMappingDescriptor(pRmResource, ppMemDesc) kchannelGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define kchannelControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define kchannelControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define kchannelControlSerialization_Prologue(pResource, pCallContext, pParams) kchannelControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define kchannelControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define kchannelControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define kchannelControlSerialization_Epilogue(pResource, pCallContext, pParams) kchannelControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kchannelControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define kchannelControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define kchannelControl_Prologue(pResource, pCallContext, pParams) kchannelControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define kchannelControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define kchannelControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define kchannelControl_Epilogue(pResource, pCallContext, pParams) kchannelControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kchannelCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define kchannelCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define kchannelCanCopy(pResource) kchannelCanCopy_DISPATCH(pResource) -#define kchannelIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define kchannelIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define kchannelIsDuplicate(pResource, hMemory, pDuplicate) kchannelIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define kchannelPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define kchannelPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define kchannelPreDestruct(pResource) kchannelPreDestruct_DISPATCH(pResource) -#define kchannelControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define kchannelControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define kchannelControlFilter(pResource, pCallContext, pParams) kchannelControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define kchannelIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define kchannelIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define kchannelIsPartialUnmapSupported(pResource) kchannelIsPartialUnmapSupported_DISPATCH(pResource) -#define kchannelMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define kchannelMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define kchannelMapTo(pResource, pParams) kchannelMapTo_DISPATCH(pResource, pParams) -#define kchannelUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define kchannelUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define kchannelUnmapFrom(pResource, pParams) kchannelUnmapFrom_DISPATCH(pResource, pParams) -#define kchannelGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define kchannelGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define kchannelGetRefCount(pResource) kchannelGetRefCount_DISPATCH(pResource) -#define kchannelAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define kchannelAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define kchannelAddAdditionalDependants(pClient, pResource, pReference) kchannelAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define kchannelGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define kchannelGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define kchannelGetNotificationListPtr(pNotifier) kchannelGetNotificationListPtr_DISPATCH(pNotifier) -#define kchannelGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define kchannelGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define kchannelGetNotificationShare(pNotifier) kchannelGetNotificationShare_DISPATCH(pNotifier) -#define kchannelSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define kchannelSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define kchannelSetNotificationShare(pNotifier, pNotifShare) kchannelSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define kchannelUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define kchannelUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define kchannelUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) kchannelUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define kchannelGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define kchannelGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define kchannelGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) kchannelGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS kchannelMap_DISPATCH(struct KernelChannel *pKernelChannel, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pKernelChannel->__kchannelMap__(pKernelChannel, pCallContext, pParams, pCpuMapping); + return pKernelChannel->__nvoc_vtable->__kchannelMap__(pKernelChannel, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS kchannelUnmap_DISPATCH(struct KernelChannel *pKernelChannel, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pKernelChannel->__kchannelUnmap__(pKernelChannel, pCallContext, pCpuMapping); + return pKernelChannel->__nvoc_vtable->__kchannelUnmap__(pKernelChannel, pCallContext, pCpuMapping); } static inline NV_STATUS kchannelGetMapAddrSpace_DISPATCH(struct KernelChannel *pKernelChannel, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pKernelChannel->__kchannelGetMapAddrSpace__(pKernelChannel, pCallContext, mapFlags, pAddrSpace); + return pKernelChannel->__nvoc_vtable->__kchannelGetMapAddrSpace__(pKernelChannel, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS kchannelGetMemInterMapParams_DISPATCH(struct KernelChannel *pKernelChannel, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pKernelChannel->__kchannelGetMemInterMapParams__(pKernelChannel, pParams); + return pKernelChannel->__nvoc_vtable->__kchannelGetMemInterMapParams__(pKernelChannel, pParams); } static inline NV_STATUS kchannelCheckMemInterUnmap_DISPATCH(struct KernelChannel *pKernelChannel, NvBool bSubdeviceHandleProvided) { - return pKernelChannel->__kchannelCheckMemInterUnmap__(pKernelChannel, bSubdeviceHandleProvided); + return pKernelChannel->__nvoc_vtable->__kchannelCheckMemInterUnmap__(pKernelChannel, bSubdeviceHandleProvided); } static inline NV_STATUS kchannelCreateUserMemDesc_DISPATCH(struct OBJGPU *pGpu, struct KernelChannel *arg_this) { @@ -641,6 +663,10 @@ static inline NV_STATUS kchannelCtrlCmdGpfifoGetWorkSubmitToken_DISPATCH(struct return pKernelChannel->__kchannelCtrlCmdGpfifoGetWorkSubmitToken__(pKernelChannel, pTokenParams); } +static inline NV_STATUS kchannelCtrlCmdInternalGpFifoGetWorkSubmitToken_DISPATCH(struct KernelChannel *pKernelChannel, NVC36F_CTRL_INTERNAL_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS *pTokenParams) { + return pKernelChannel->__kchannelCtrlCmdInternalGpFifoGetWorkSubmitToken__(pKernelChannel, pTokenParams); +} + static inline NV_STATUS kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer_DISPATCH(struct KernelChannel *pKernelChannel, NVC36F_CTRL_GPFIFO_UPDATE_FAULT_METHOD_BUFFER_PARAMS *pFaultMthdBufferParams) { return pKernelChannel->__kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer__(pKernelChannel, pFaultMthdBufferParams); } @@ -690,103 +716,103 @@ static inline NV_STATUS kchannelSetKeyRotationNotifier_DISPATCH(struct OBJGPU *p } static inline NV_STATUS kchannelControl_DISPATCH(struct KernelChannel *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__kchannelControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__kchannelControl__(pGpuResource, pCallContext, pParams); } static inline NvBool kchannelShareCallback_DISPATCH(struct KernelChannel *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__kchannelShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__kchannelShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS kchannelGetRegBaseOffsetAndSize_DISPATCH(struct KernelChannel *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__kchannelGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__kchannelGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS kchannelInternalControlForward_DISPATCH(struct KernelChannel *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__kchannelInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__kchannelInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle kchannelGetInternalObjectHandle_DISPATCH(struct KernelChannel *pGpuResource) { - return pGpuResource->__kchannelGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__kchannelGetInternalObjectHandle__(pGpuResource); } static inline NvBool kchannelAccessCallback_DISPATCH(struct KernelChannel *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__kchannelAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__kchannelAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS kchannelGetMemoryMappingDescriptor_DISPATCH(struct KernelChannel *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__kchannelGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__kchannelGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS kchannelControlSerialization_Prologue_DISPATCH(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kchannelControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kchannelControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void kchannelControlSerialization_Epilogue_DISPATCH(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kchannelControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__kchannelControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS kchannelControl_Prologue_DISPATCH(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kchannelControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kchannelControl_Prologue__(pResource, pCallContext, pParams); } static inline void kchannelControl_Epilogue_DISPATCH(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kchannelControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__kchannelControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool kchannelCanCopy_DISPATCH(struct KernelChannel *pResource) { - return pResource->__kchannelCanCopy__(pResource); + return pResource->__nvoc_vtable->__kchannelCanCopy__(pResource); } static inline NV_STATUS kchannelIsDuplicate_DISPATCH(struct KernelChannel *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__kchannelIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__kchannelIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void kchannelPreDestruct_DISPATCH(struct KernelChannel *pResource) { - pResource->__kchannelPreDestruct__(pResource); + pResource->__nvoc_vtable->__kchannelPreDestruct__(pResource); } static inline NV_STATUS kchannelControlFilter_DISPATCH(struct KernelChannel *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kchannelControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kchannelControlFilter__(pResource, pCallContext, pParams); } static inline NvBool kchannelIsPartialUnmapSupported_DISPATCH(struct KernelChannel *pResource) { - return pResource->__kchannelIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__kchannelIsPartialUnmapSupported__(pResource); } static inline NV_STATUS kchannelMapTo_DISPATCH(struct KernelChannel *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__kchannelMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__kchannelMapTo__(pResource, pParams); } static inline NV_STATUS kchannelUnmapFrom_DISPATCH(struct KernelChannel *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__kchannelUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__kchannelUnmapFrom__(pResource, pParams); } static inline NvU32 kchannelGetRefCount_DISPATCH(struct KernelChannel *pResource) { - return pResource->__kchannelGetRefCount__(pResource); + return pResource->__nvoc_vtable->__kchannelGetRefCount__(pResource); } static inline void kchannelAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelChannel *pResource, RsResourceRef *pReference) { - pResource->__kchannelAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__kchannelAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * kchannelGetNotificationListPtr_DISPATCH(struct KernelChannel *pNotifier) { - return pNotifier->__kchannelGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__kchannelGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * kchannelGetNotificationShare_DISPATCH(struct KernelChannel *pNotifier) { - return pNotifier->__kchannelGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__kchannelGetNotificationShare__(pNotifier); } static inline void kchannelSetNotificationShare_DISPATCH(struct KernelChannel *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__kchannelSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__kchannelSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS kchannelUnregisterEvent_DISPATCH(struct KernelChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__kchannelUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__kchannelUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS kchannelGetOrAllocNotifShare_DISPATCH(struct KernelChannel *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__kchannelGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__kchannelGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS kchannelNotifyRc_IMPL(struct KernelChannel *pKernelChannel); @@ -1018,8 +1044,8 @@ static inline NV_STATUS kchannelAllocChannel(struct KernelChannel *pKernelChanne #define kchannelAllocChannel_HAL(pKernelChannel, pChannelGpfifoParams) kchannelAllocChannel(pKernelChannel, pChannelGpfifoParams) -static inline NvBool kchannelIsValid_cbe027(struct KernelChannel *pKernelChannel) { - return ((NvBool)(0 == 0)); +static inline NvBool kchannelIsValid_88bc07(struct KernelChannel *pKernelChannel) { + return NV_TRUE; } @@ -1029,7 +1055,7 @@ static inline NvBool kchannelIsValid(struct KernelChannel *pKernelChannel) { return NV_FALSE; } #else //__nvoc_kernel_channel_h_disabled -#define kchannelIsValid(pKernelChannel) kchannelIsValid_cbe027(pKernelChannel) +#define kchannelIsValid(pKernelChannel) kchannelIsValid_88bc07(pKernelChannel) #endif //__nvoc_kernel_channel_h_disabled #define kchannelIsValid_HAL(pKernelChannel) kchannelIsValid(pKernelChannel) @@ -1142,6 +1168,8 @@ NV_STATUS kchannelCtrlCmdRestoreEngineCtxData_IMPL(struct KernelChannel *pKernel NV_STATUS kchannelCtrlCmdGpfifoGetWorkSubmitToken_IMPL(struct KernelChannel *pKernelChannel, NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS *pTokenParams); +NV_STATUS kchannelCtrlCmdInternalGpFifoGetWorkSubmitToken_IMPL(struct KernelChannel *pKernelChannel, NVC36F_CTRL_INTERNAL_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS *pTokenParams); + NV_STATUS kchannelCtrlCmdGpfifoUpdateFaultMethodBuffer_IMPL(struct KernelChannel *pKernelChannel, NVC36F_CTRL_GPFIFO_UPDATE_FAULT_METHOD_BUFFER_PARAMS *pFaultMthdBufferParams); NV_STATUS kchannelCtrlCmdGpfifoSetWorkSubmitTokenNotifIndex_IMPL(struct KernelChannel *pKernelChannel, NVC36F_CTRL_GPFIFO_SET_WORK_SUBMIT_TOKEN_NOTIF_INDEX_PARAMS *pParams); diff --git a/src/nvidia/generated/g_kernel_crashcat_engine_nvoc.c b/src/nvidia/generated/g_kernel_crashcat_engine_nvoc.c index 50dd9a5bfd..d3857c24f4 100644 --- a/src/nvidia/generated/g_kernel_crashcat_engine_nvoc.c +++ b/src/nvidia/generated/g_kernel_crashcat_engine_nvoc.c @@ -62,59 +62,73 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCrashCatEngine = /*pExportInfo=*/ &__nvoc_export_info_KernelCrashCatEngine }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineConfigured(struct CrashCatEngine *arg_this); // this +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnload(struct CrashCatEngine *arg_this); // this +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineVprintf(struct CrashCatEngine *arg_this, NvBool bReportStart, const char *fmt, va_list args); // this +NvU32 __nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriRead(struct CrashCatEngine *arg_this, NvU32 offset); // this +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriWrite(struct CrashCatEngine *arg_this, NvU32 offset, NvU32 data); // this +void * __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineMapBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc); // this +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnmapBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc); // this +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineSyncBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size); // this +const NvU32 * __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetScratchOffsets(struct CrashCatEngine *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId); // this +NvU32 __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetWFL0Offset(struct CrashCatEngine *arg_this); // this + // 10 down-thunk(s) defined to bridge methods in KernelCrashCatEngine from superclasses // kcrashcatEngineConfigured: virtual override (crashcatEngine) base (crashcatEngine) -static NvBool __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineConfigured(struct CrashCatEngine *arg_this) { +NvBool __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineConfigured(struct CrashCatEngine *arg_this) { return kcrashcatEngineConfigured((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset)); } // kcrashcatEngineUnload: virtual override (crashcatEngine) base (crashcatEngine) -static void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnload(struct CrashCatEngine *arg_this) { +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnload(struct CrashCatEngine *arg_this) { kcrashcatEngineUnload((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset)); } // kcrashcatEngineVprintf: virtual override (crashcatEngine) base (crashcatEngine) -static void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineVprintf(struct CrashCatEngine *arg_this, NvBool bReportStart, const char *fmt, va_list args) { +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineVprintf(struct CrashCatEngine *arg_this, NvBool bReportStart, const char *fmt, va_list args) { kcrashcatEngineVprintf((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset), bReportStart, fmt, args); } // kcrashcatEnginePriRead: virtual override (crashcatEngine) base (crashcatEngine) -static NvU32 __nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriRead(struct CrashCatEngine *arg_this, NvU32 offset) { +NvU32 __nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriRead(struct CrashCatEngine *arg_this, NvU32 offset) { return kcrashcatEnginePriRead((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset), offset); } // kcrashcatEnginePriWrite: virtual override (crashcatEngine) base (crashcatEngine) -static void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriWrite(struct CrashCatEngine *arg_this, NvU32 offset, NvU32 data) { +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriWrite(struct CrashCatEngine *arg_this, NvU32 offset, NvU32 data) { kcrashcatEnginePriWrite((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset), offset, data); } // kcrashcatEngineMapBufferDescriptor: virtual override (crashcatEngine) base (crashcatEngine) -static void * __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineMapBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc) { +void * __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineMapBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc) { return kcrashcatEngineMapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset), pBufDesc); } // kcrashcatEngineUnmapBufferDescriptor: virtual override (crashcatEngine) base (crashcatEngine) -static void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnmapBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc) { +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnmapBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc) { kcrashcatEngineUnmapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset), pBufDesc); } // kcrashcatEngineSyncBufferDescriptor: virtual override (crashcatEngine) base (crashcatEngine) -static void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineSyncBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineSyncBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { kcrashcatEngineSyncBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset), pBufDesc, offset, size); } // kcrashcatEngineGetScratchOffsets: virtual halified (singleton optimized) override (crashcatEngine) base (crashcatEngine) -static const NvU32 * __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetScratchOffsets(struct CrashCatEngine *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { +const NvU32 * __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetScratchOffsets(struct CrashCatEngine *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { return kcrashcatEngineGetScratchOffsets((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset), scratchGroupId); } // kcrashcatEngineGetWFL0Offset: virtual halified (singleton optimized) override (crashcatEngine) base (crashcatEngine) -static NvU32 __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetWFL0Offset(struct CrashCatEngine *arg_this) { +NvU32 __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetWFL0Offset(struct CrashCatEngine *arg_this) { return kcrashcatEngineGetWFL0Offset((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelCrashCatEngine_CrashCatEngine.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelCrashCatEngine = { /*numEntries=*/ 0, @@ -158,68 +172,44 @@ static void __nvoc_init_funcTable_KernelCrashCatEngine_1(KernelCrashCatEngine *p PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); - - // kcrashcatEngineConfigured -- virtual override (crashcatEngine) base (crashcatEngine) - pThis->__kcrashcatEngineConfigured__ = &kcrashcatEngineConfigured_IMPL; - pThis->__nvoc_base_CrashCatEngine.__crashcatEngineConfigured__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineConfigured; - - // kcrashcatEngineUnload -- virtual override (crashcatEngine) base (crashcatEngine) - pThis->__kcrashcatEngineUnload__ = &kcrashcatEngineUnload_IMPL; - pThis->__nvoc_base_CrashCatEngine.__crashcatEngineUnload__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnload; - - // kcrashcatEngineVprintf -- virtual override (crashcatEngine) base (crashcatEngine) - pThis->__kcrashcatEngineVprintf__ = &kcrashcatEngineVprintf_IMPL; - pThis->__nvoc_base_CrashCatEngine.__crashcatEngineVprintf__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineVprintf; - - // kcrashcatEngineRegRead -- pure virtual - pThis->__kcrashcatEngineRegRead__ = NULL; - - // kcrashcatEngineRegWrite -- pure virtual - pThis->__kcrashcatEngineRegWrite__ = NULL; - - // kcrashcatEngineMaskDmemAddr -- pure virtual - pThis->__kcrashcatEngineMaskDmemAddr__ = NULL; - - // kcrashcatEnginePriRead -- virtual override (crashcatEngine) base (crashcatEngine) - pThis->__kcrashcatEnginePriRead__ = &kcrashcatEnginePriRead_IMPL; - pThis->__nvoc_base_CrashCatEngine.__crashcatEnginePriRead__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriRead; - - // kcrashcatEnginePriWrite -- virtual override (crashcatEngine) base (crashcatEngine) - pThis->__kcrashcatEnginePriWrite__ = &kcrashcatEnginePriWrite_IMPL; - pThis->__nvoc_base_CrashCatEngine.__crashcatEnginePriWrite__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriWrite; - - // kcrashcatEngineMapBufferDescriptor -- virtual override (crashcatEngine) base (crashcatEngine) - pThis->__kcrashcatEngineMapBufferDescriptor__ = &kcrashcatEngineMapBufferDescriptor_IMPL; - pThis->__nvoc_base_CrashCatEngine.__crashcatEngineMapBufferDescriptor__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineMapBufferDescriptor; - - // kcrashcatEngineUnmapBufferDescriptor -- virtual override (crashcatEngine) base (crashcatEngine) - pThis->__kcrashcatEngineUnmapBufferDescriptor__ = &kcrashcatEngineUnmapBufferDescriptor_IMPL; - pThis->__nvoc_base_CrashCatEngine.__crashcatEngineUnmapBufferDescriptor__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnmapBufferDescriptor; - - // kcrashcatEngineSyncBufferDescriptor -- virtual override (crashcatEngine) base (crashcatEngine) - pThis->__kcrashcatEngineSyncBufferDescriptor__ = &kcrashcatEngineSyncBufferDescriptor_IMPL; - pThis->__nvoc_base_CrashCatEngine.__crashcatEngineSyncBufferDescriptor__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineSyncBufferDescriptor; - - // kcrashcatEngineReadDmem -- virtual halified (singleton optimized) - pThis->__kcrashcatEngineReadDmem__ = &kcrashcatEngineReadDmem_TU102; - - // kcrashcatEngineReadEmem -- virtual halified (singleton optimized) - pThis->__kcrashcatEngineReadEmem__ = &kcrashcatEngineReadEmem_2fced3; - - // kcrashcatEngineGetScratchOffsets -- virtual halified (singleton optimized) override (crashcatEngine) base (crashcatEngine) - pThis->__kcrashcatEngineGetScratchOffsets__ = &kcrashcatEngineGetScratchOffsets_TU102; - pThis->__nvoc_base_CrashCatEngine.__crashcatEngineGetScratchOffsets__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetScratchOffsets; - - // kcrashcatEngineGetWFL0Offset -- virtual halified (singleton optimized) override (crashcatEngine) base (crashcatEngine) - pThis->__kcrashcatEngineGetWFL0Offset__ = &kcrashcatEngineGetWFL0Offset_TU102; - pThis->__nvoc_base_CrashCatEngine.__crashcatEngineGetWFL0Offset__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetWFL0Offset; -} // End __nvoc_init_funcTable_KernelCrashCatEngine_1 with approximately 25 basic block(s). +} // End __nvoc_init_funcTable_KernelCrashCatEngine_1 // Initialize vtable(s) for 15 virtual method(s). void __nvoc_init_funcTable_KernelCrashCatEngine(KernelCrashCatEngine *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 15 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelCrashCatEngine vtable = { + .__kcrashcatEngineConfigured__ = &kcrashcatEngineConfigured_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .CrashCatEngine.__crashcatEngineConfigured__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineConfigured, // pure virtual + .__kcrashcatEngineUnload__ = &kcrashcatEngineUnload_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .CrashCatEngine.__crashcatEngineUnload__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnload, // virtual + .__kcrashcatEngineVprintf__ = &kcrashcatEngineVprintf_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .CrashCatEngine.__crashcatEngineVprintf__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineVprintf, // pure virtual + .__kcrashcatEngineRegRead__ = NULL, // pure virtual + .__kcrashcatEngineRegWrite__ = NULL, // pure virtual + .__kcrashcatEngineMaskDmemAddr__ = NULL, // pure virtual + .__kcrashcatEnginePriRead__ = &kcrashcatEnginePriRead_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .CrashCatEngine.__crashcatEnginePriRead__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriRead, // pure virtual + .__kcrashcatEnginePriWrite__ = &kcrashcatEnginePriWrite_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .CrashCatEngine.__crashcatEnginePriWrite__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriWrite, // pure virtual + .__kcrashcatEngineMapBufferDescriptor__ = &kcrashcatEngineMapBufferDescriptor_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .CrashCatEngine.__crashcatEngineMapBufferDescriptor__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineMapBufferDescriptor, // pure virtual + .__kcrashcatEngineUnmapBufferDescriptor__ = &kcrashcatEngineUnmapBufferDescriptor_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .CrashCatEngine.__crashcatEngineUnmapBufferDescriptor__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnmapBufferDescriptor, // pure virtual + .__kcrashcatEngineSyncBufferDescriptor__ = &kcrashcatEngineSyncBufferDescriptor_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .CrashCatEngine.__crashcatEngineSyncBufferDescriptor__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineSyncBufferDescriptor, // pure virtual + .__kcrashcatEngineReadDmem__ = &kcrashcatEngineReadDmem_TU102, // virtual halified (singleton optimized) + .__kcrashcatEngineReadEmem__ = &kcrashcatEngineReadEmem_2fced3, // virtual halified (singleton optimized) + .__kcrashcatEngineGetScratchOffsets__ = &kcrashcatEngineGetScratchOffsets_TU102, // virtual halified (singleton optimized) override (crashcatEngine) base (crashcatEngine) + .CrashCatEngine.__crashcatEngineGetScratchOffsets__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetScratchOffsets, // pure virtual + .__kcrashcatEngineGetWFL0Offset__ = &kcrashcatEngineGetWFL0Offset_TU102, // virtual halified (singleton optimized) override (crashcatEngine) base (crashcatEngine) + .CrashCatEngine.__crashcatEngineGetWFL0Offset__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetWFL0Offset, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_CrashCatEngine.__nvoc_vtable = &vtable.CrashCatEngine; // (crashcatEngine) super + pThis->__nvoc_vtable = &vtable; // (kcrashcatEngine) this __nvoc_init_funcTable_KernelCrashCatEngine_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_crashcat_engine_nvoc.h b/src/nvidia/generated/g_kernel_crashcat_engine_nvoc.h index 3f09cb4030..342c10f9d7 100644 --- a/src/nvidia/generated/g_kernel_crashcat_engine_nvoc.h +++ b/src/nvidia/generated/g_kernel_crashcat_engine_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -71,10 +71,15 @@ typedef struct KernelCrashCatEngineConfig #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelCrashCatEngine; + + struct KernelCrashCatEngine { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelCrashCatEngine *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct CrashCatEngine __nvoc_base_CrashCatEngine; @@ -83,7 +88,22 @@ struct KernelCrashCatEngine { struct CrashCatEngine *__nvoc_pbase_CrashCatEngine; // crashcatEngine super struct KernelCrashCatEngine *__nvoc_pbase_KernelCrashCatEngine; // kcrashcatEngine - // Vtable with 15 per-object function pointers + // Data members + NvBool PRIVATE_FIELD(bConfigured); + MEMORY_DESCRIPTOR *PRIVATE_FIELD(pQueueMemDesc); + const char *PRIVATE_FIELD(pName); + NvU32 PRIVATE_FIELD(errorId); + struct OBJGPU *PRIVATE_FIELD(pGpu); + NvU32 PRIVATE_FIELD(dmemPort); + char PRIVATE_FIELD(printBuffer)[512]; + char PRIVATE_FIELD(fmtBuffer)[512]; +}; + + +// Metadata including vtable with 15 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelCrashCatEngine { + const struct NVOC_VTABLE__CrashCatEngine CrashCatEngine; // (crashcatEngine) 10 function pointers + NvBool (*__kcrashcatEngineConfigured__)(struct KernelCrashCatEngine * /*this*/); // virtual override (crashcatEngine) base (crashcatEngine) void (*__kcrashcatEngineUnload__)(struct KernelCrashCatEngine * /*this*/); // virtual override (crashcatEngine) base (crashcatEngine) void (*__kcrashcatEngineVprintf__)(struct KernelCrashCatEngine * /*this*/, NvBool, const char *, va_list); // virtual override (crashcatEngine) base (crashcatEngine) @@ -99,16 +119,6 @@ struct KernelCrashCatEngine { void (*__kcrashcatEngineReadEmem__)(struct KernelCrashCatEngine * /*this*/, NvU64, NvU64, void *); // virtual halified (singleton optimized) const NvU32 * (*__kcrashcatEngineGetScratchOffsets__)(struct KernelCrashCatEngine * /*this*/, NV_CRASHCAT_SCRATCH_GROUP_ID); // virtual halified (singleton optimized) override (crashcatEngine) base (crashcatEngine) NvU32 (*__kcrashcatEngineGetWFL0Offset__)(struct KernelCrashCatEngine * /*this*/); // virtual halified (singleton optimized) override (crashcatEngine) base (crashcatEngine) - - // Data members - NvBool PRIVATE_FIELD(bConfigured); - MEMORY_DESCRIPTOR *PRIVATE_FIELD(pQueueMemDesc); - const char *PRIVATE_FIELD(pName); - NvU32 PRIVATE_FIELD(errorId); - struct OBJGPU *PRIVATE_FIELD(pGpu); - NvU32 PRIVATE_FIELD(dmemPort); - char PRIVATE_FIELD(printBuffer)[512]; - char PRIVATE_FIELD(fmtBuffer)[512]; }; #ifndef __NVOC_CLASS_KernelCrashCatEngine_TYPEDEF__ @@ -141,100 +151,100 @@ NV_STATUS __nvoc_objCreate_KernelCrashCatEngine(KernelCrashCatEngine**, Dynamic* // Wrapper macros -#define kcrashcatEngineConfigured_FNPTR(arg_this) arg_this->__kcrashcatEngineConfigured__ +#define kcrashcatEngineConfigured_FNPTR(arg_this) arg_this->__nvoc_vtable->__kcrashcatEngineConfigured__ #define kcrashcatEngineConfigured(arg_this) kcrashcatEngineConfigured_DISPATCH(arg_this) -#define kcrashcatEngineUnload_FNPTR(arg_this) arg_this->__kcrashcatEngineUnload__ +#define kcrashcatEngineUnload_FNPTR(arg_this) arg_this->__nvoc_vtable->__kcrashcatEngineUnload__ #define kcrashcatEngineUnload(arg_this) kcrashcatEngineUnload_DISPATCH(arg_this) -#define kcrashcatEngineVprintf_FNPTR(arg_this) arg_this->__kcrashcatEngineVprintf__ +#define kcrashcatEngineVprintf_FNPTR(arg_this) arg_this->__nvoc_vtable->__kcrashcatEngineVprintf__ #define kcrashcatEngineVprintf(arg_this, bReportStart, fmt, args) kcrashcatEngineVprintf_DISPATCH(arg_this, bReportStart, fmt, args) -#define kcrashcatEngineRegRead_FNPTR(arg_this) arg_this->__kcrashcatEngineRegRead__ +#define kcrashcatEngineRegRead_FNPTR(arg_this) arg_this->__nvoc_vtable->__kcrashcatEngineRegRead__ #define kcrashcatEngineRegRead(pGpu, arg_this, offset) kcrashcatEngineRegRead_DISPATCH(pGpu, arg_this, offset) -#define kcrashcatEngineRegWrite_FNPTR(arg_this) arg_this->__kcrashcatEngineRegWrite__ +#define kcrashcatEngineRegWrite_FNPTR(arg_this) arg_this->__nvoc_vtable->__kcrashcatEngineRegWrite__ #define kcrashcatEngineRegWrite(pGpu, arg_this, offset, data) kcrashcatEngineRegWrite_DISPATCH(pGpu, arg_this, offset, data) -#define kcrashcatEngineMaskDmemAddr_FNPTR(arg_this) arg_this->__kcrashcatEngineMaskDmemAddr__ +#define kcrashcatEngineMaskDmemAddr_FNPTR(arg_this) arg_this->__nvoc_vtable->__kcrashcatEngineMaskDmemAddr__ #define kcrashcatEngineMaskDmemAddr(pGpu, arg_this, addr) kcrashcatEngineMaskDmemAddr_DISPATCH(pGpu, arg_this, addr) -#define kcrashcatEnginePriRead_FNPTR(arg_this) arg_this->__kcrashcatEnginePriRead__ +#define kcrashcatEnginePriRead_FNPTR(arg_this) arg_this->__nvoc_vtable->__kcrashcatEnginePriRead__ #define kcrashcatEnginePriRead(arg_this, offset) kcrashcatEnginePriRead_DISPATCH(arg_this, offset) -#define kcrashcatEnginePriWrite_FNPTR(arg_this) arg_this->__kcrashcatEnginePriWrite__ +#define kcrashcatEnginePriWrite_FNPTR(arg_this) arg_this->__nvoc_vtable->__kcrashcatEnginePriWrite__ #define kcrashcatEnginePriWrite(arg_this, offset, data) kcrashcatEnginePriWrite_DISPATCH(arg_this, offset, data) -#define kcrashcatEngineMapBufferDescriptor_FNPTR(arg_this) arg_this->__kcrashcatEngineMapBufferDescriptor__ +#define kcrashcatEngineMapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_vtable->__kcrashcatEngineMapBufferDescriptor__ #define kcrashcatEngineMapBufferDescriptor(arg_this, pBufDesc) kcrashcatEngineMapBufferDescriptor_DISPATCH(arg_this, pBufDesc) -#define kcrashcatEngineUnmapBufferDescriptor_FNPTR(arg_this) arg_this->__kcrashcatEngineUnmapBufferDescriptor__ +#define kcrashcatEngineUnmapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_vtable->__kcrashcatEngineUnmapBufferDescriptor__ #define kcrashcatEngineUnmapBufferDescriptor(arg_this, pBufDesc) kcrashcatEngineUnmapBufferDescriptor_DISPATCH(arg_this, pBufDesc) -#define kcrashcatEngineSyncBufferDescriptor_FNPTR(arg_this) arg_this->__kcrashcatEngineSyncBufferDescriptor__ +#define kcrashcatEngineSyncBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_vtable->__kcrashcatEngineSyncBufferDescriptor__ #define kcrashcatEngineSyncBufferDescriptor(arg_this, pBufDesc, offset, size) kcrashcatEngineSyncBufferDescriptor_DISPATCH(arg_this, pBufDesc, offset, size) -#define kcrashcatEngineReadDmem_FNPTR(arg_this) arg_this->__kcrashcatEngineReadDmem__ +#define kcrashcatEngineReadDmem_FNPTR(arg_this) arg_this->__nvoc_vtable->__kcrashcatEngineReadDmem__ #define kcrashcatEngineReadDmem(arg_this, offset, size, pBuf) kcrashcatEngineReadDmem_DISPATCH(arg_this, offset, size, pBuf) #define kcrashcatEngineReadDmem_HAL(arg_this, offset, size, pBuf) kcrashcatEngineReadDmem_DISPATCH(arg_this, offset, size, pBuf) -#define kcrashcatEngineReadEmem_FNPTR(arg_this) arg_this->__kcrashcatEngineReadEmem__ +#define kcrashcatEngineReadEmem_FNPTR(arg_this) arg_this->__nvoc_vtable->__kcrashcatEngineReadEmem__ #define kcrashcatEngineReadEmem(arg_this, offset, size, pBuf) kcrashcatEngineReadEmem_DISPATCH(arg_this, offset, size, pBuf) #define kcrashcatEngineReadEmem_HAL(arg_this, offset, size, pBuf) kcrashcatEngineReadEmem_DISPATCH(arg_this, offset, size, pBuf) -#define kcrashcatEngineGetScratchOffsets_FNPTR(arg_this) arg_this->__kcrashcatEngineGetScratchOffsets__ +#define kcrashcatEngineGetScratchOffsets_FNPTR(arg_this) arg_this->__nvoc_vtable->__kcrashcatEngineGetScratchOffsets__ #define kcrashcatEngineGetScratchOffsets(arg_this, scratchGroupId) kcrashcatEngineGetScratchOffsets_DISPATCH(arg_this, scratchGroupId) #define kcrashcatEngineGetScratchOffsets_HAL(arg_this, scratchGroupId) kcrashcatEngineGetScratchOffsets_DISPATCH(arg_this, scratchGroupId) -#define kcrashcatEngineGetWFL0Offset_FNPTR(arg_this) arg_this->__kcrashcatEngineGetWFL0Offset__ +#define kcrashcatEngineGetWFL0Offset_FNPTR(arg_this) arg_this->__nvoc_vtable->__kcrashcatEngineGetWFL0Offset__ #define kcrashcatEngineGetWFL0Offset(arg_this) kcrashcatEngineGetWFL0Offset_DISPATCH(arg_this) #define kcrashcatEngineGetWFL0Offset_HAL(arg_this) kcrashcatEngineGetWFL0Offset_DISPATCH(arg_this) // Dispatch functions static inline NvBool kcrashcatEngineConfigured_DISPATCH(struct KernelCrashCatEngine *arg_this) { - return arg_this->__kcrashcatEngineConfigured__(arg_this); + return arg_this->__nvoc_vtable->__kcrashcatEngineConfigured__(arg_this); } static inline void kcrashcatEngineUnload_DISPATCH(struct KernelCrashCatEngine *arg_this) { - arg_this->__kcrashcatEngineUnload__(arg_this); + arg_this->__nvoc_vtable->__kcrashcatEngineUnload__(arg_this); } static inline void kcrashcatEngineVprintf_DISPATCH(struct KernelCrashCatEngine *arg_this, NvBool bReportStart, const char *fmt, va_list args) { - arg_this->__kcrashcatEngineVprintf__(arg_this, bReportStart, fmt, args); + arg_this->__nvoc_vtable->__kcrashcatEngineVprintf__(arg_this, bReportStart, fmt, args); } static inline NvU32 kcrashcatEngineRegRead_DISPATCH(struct OBJGPU *pGpu, struct KernelCrashCatEngine *arg_this, NvU32 offset) { - return arg_this->__kcrashcatEngineRegRead__(pGpu, arg_this, offset); + return arg_this->__nvoc_vtable->__kcrashcatEngineRegRead__(pGpu, arg_this, offset); } static inline void kcrashcatEngineRegWrite_DISPATCH(struct OBJGPU *pGpu, struct KernelCrashCatEngine *arg_this, NvU32 offset, NvU32 data) { - arg_this->__kcrashcatEngineRegWrite__(pGpu, arg_this, offset, data); + arg_this->__nvoc_vtable->__kcrashcatEngineRegWrite__(pGpu, arg_this, offset, data); } static inline NvU32 kcrashcatEngineMaskDmemAddr_DISPATCH(struct OBJGPU *pGpu, struct KernelCrashCatEngine *arg_this, NvU32 addr) { - return arg_this->__kcrashcatEngineMaskDmemAddr__(pGpu, arg_this, addr); + return arg_this->__nvoc_vtable->__kcrashcatEngineMaskDmemAddr__(pGpu, arg_this, addr); } static inline NvU32 kcrashcatEnginePriRead_DISPATCH(struct KernelCrashCatEngine *arg_this, NvU32 offset) { - return arg_this->__kcrashcatEnginePriRead__(arg_this, offset); + return arg_this->__nvoc_vtable->__kcrashcatEnginePriRead__(arg_this, offset); } static inline void kcrashcatEnginePriWrite_DISPATCH(struct KernelCrashCatEngine *arg_this, NvU32 offset, NvU32 data) { - arg_this->__kcrashcatEnginePriWrite__(arg_this, offset, data); + arg_this->__nvoc_vtable->__kcrashcatEnginePriWrite__(arg_this, offset, data); } static inline void * kcrashcatEngineMapBufferDescriptor_DISPATCH(struct KernelCrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc) { - return arg_this->__kcrashcatEngineMapBufferDescriptor__(arg_this, pBufDesc); + return arg_this->__nvoc_vtable->__kcrashcatEngineMapBufferDescriptor__(arg_this, pBufDesc); } static inline void kcrashcatEngineUnmapBufferDescriptor_DISPATCH(struct KernelCrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc) { - arg_this->__kcrashcatEngineUnmapBufferDescriptor__(arg_this, pBufDesc); + arg_this->__nvoc_vtable->__kcrashcatEngineUnmapBufferDescriptor__(arg_this, pBufDesc); } static inline void kcrashcatEngineSyncBufferDescriptor_DISPATCH(struct KernelCrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { - arg_this->__kcrashcatEngineSyncBufferDescriptor__(arg_this, pBufDesc, offset, size); + arg_this->__nvoc_vtable->__kcrashcatEngineSyncBufferDescriptor__(arg_this, pBufDesc, offset, size); } static inline void kcrashcatEngineReadDmem_DISPATCH(struct KernelCrashCatEngine *arg_this, NvU32 offset, NvU32 size, void *pBuf) { - arg_this->__kcrashcatEngineReadDmem__(arg_this, offset, size, pBuf); + arg_this->__nvoc_vtable->__kcrashcatEngineReadDmem__(arg_this, offset, size, pBuf); } static inline void kcrashcatEngineReadEmem_DISPATCH(struct KernelCrashCatEngine *arg_this, NvU64 offset, NvU64 size, void *pBuf) { - arg_this->__kcrashcatEngineReadEmem__(arg_this, offset, size, pBuf); + arg_this->__nvoc_vtable->__kcrashcatEngineReadEmem__(arg_this, offset, size, pBuf); } static inline const NvU32 * kcrashcatEngineGetScratchOffsets_DISPATCH(struct KernelCrashCatEngine *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { - return arg_this->__kcrashcatEngineGetScratchOffsets__(arg_this, scratchGroupId); + return arg_this->__nvoc_vtable->__kcrashcatEngineGetScratchOffsets__(arg_this, scratchGroupId); } static inline NvU32 kcrashcatEngineGetWFL0Offset_DISPATCH(struct KernelCrashCatEngine *arg_this) { - return arg_this->__kcrashcatEngineGetWFL0Offset__(arg_this); + return arg_this->__nvoc_vtable->__kcrashcatEngineGetWFL0Offset__(arg_this); } NvBool kcrashcatEngineConfigured_IMPL(struct KernelCrashCatEngine *arg1); diff --git a/src/nvidia/generated/g_kernel_ctxshare_nvoc.c b/src/nvidia/generated/g_kernel_ctxshare_nvoc.c index ea803bd11d..b4a608e3cf 100644 --- a/src/nvidia/generated/g_kernel_ctxshare_nvoc.c +++ b/src/nvidia/generated/g_kernel_ctxshare_nvoc.c @@ -66,6 +66,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCtxShare = /*pExportInfo=*/ &__nvoc_export_info_KernelCtxShare }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelCtxShare = { /*numEntries=*/ 0, @@ -346,133 +350,201 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelCt }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NvBool __nvoc_down_thunk_KernelCtxShareApi_resCanCopy(struct RsResource *pKernelCtxShareApi); // this + // 1 down-thunk(s) defined to bridge methods in KernelCtxShareApi from superclasses // kctxshareapiCanCopy: virtual override (res) base (gpures) -static NvBool __nvoc_down_thunk_KernelCtxShareApi_resCanCopy(struct RsResource *pKernelCtxShareApi) { +NvBool __nvoc_down_thunk_KernelCtxShareApi_resCanCopy(struct RsResource *pKernelCtxShareApi) { return kctxshareapiCanCopy((struct KernelCtxShareApi *)(((unsigned char *) pKernelCtxShareApi) - __nvoc_rtti_KernelCtxShareApi_RsResource.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiControl(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiMap(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiUnmap(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_kctxshareapiShareCallback(struct KernelCtxShareApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiGetRegBaseOffsetAndSize(struct KernelCtxShareApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiGetMapAddrSpace(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiInternalControlForward(struct KernelCtxShareApi *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_kctxshareapiGetInternalObjectHandle(struct KernelCtxShareApi *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_kctxshareapiAccessCallback(struct KernelCtxShareApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_kctxshareapiGetMemInterMapParams(struct KernelCtxShareApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_kctxshareapiCheckMemInterUnmap(struct KernelCtxShareApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_kctxshareapiGetMemoryMappingDescriptor(struct KernelCtxShareApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_kctxshareapiControlSerialization_Prologue(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_kctxshareapiControlSerialization_Epilogue(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_kctxshareapiControl_Prologue(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_kctxshareapiControl_Epilogue(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_kctxshareapiIsDuplicate(struct KernelCtxShareApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_kctxshareapiPreDestruct(struct KernelCtxShareApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_kctxshareapiControlFilter(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_kctxshareapiIsPartialUnmapSupported(struct KernelCtxShareApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_kctxshareapiMapTo(struct KernelCtxShareApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_kctxshareapiUnmapFrom(struct KernelCtxShareApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_kctxshareapiGetRefCount(struct KernelCtxShareApi *pResource); // this +void __nvoc_up_thunk_RsResource_kctxshareapiAddAdditionalDependants(struct RsClient *pClient, struct KernelCtxShareApi *pResource, RsResourceRef *pReference); // this + // 24 up-thunk(s) defined to bridge methods in KernelCtxShareApi to superclasses // kctxshareapiControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiControl(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiControl(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset), pCallContext, pParams); } // kctxshareapiMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiMap(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiMap(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // kctxshareapiUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiUnmap(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiUnmap(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset), pCallContext, pCpuMapping); } // kctxshareapiShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_kctxshareapiShareCallback(struct KernelCtxShareApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_kctxshareapiShareCallback(struct KernelCtxShareApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // kctxshareapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiGetRegBaseOffsetAndSize(struct KernelCtxShareApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiGetRegBaseOffsetAndSize(struct KernelCtxShareApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset), pGpu, pOffset, pSize); } // kctxshareapiGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiGetMapAddrSpace(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiGetMapAddrSpace(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // kctxshareapiInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiInternalControlForward(struct KernelCtxShareApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_kctxshareapiInternalControlForward(struct KernelCtxShareApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset), command, pParams, size); } // kctxshareapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_kctxshareapiGetInternalObjectHandle(struct KernelCtxShareApi *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_kctxshareapiGetInternalObjectHandle(struct KernelCtxShareApi *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelCtxShareApi_GpuResource.offset)); } // kctxshareapiAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_kctxshareapiAccessCallback(struct KernelCtxShareApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_kctxshareapiAccessCallback(struct KernelCtxShareApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // kctxshareapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kctxshareapiGetMemInterMapParams(struct KernelCtxShareApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_kctxshareapiGetMemInterMapParams(struct KernelCtxShareApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), pParams); } // kctxshareapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kctxshareapiCheckMemInterUnmap(struct KernelCtxShareApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_kctxshareapiCheckMemInterUnmap(struct KernelCtxShareApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), bSubdeviceHandleProvided); } // kctxshareapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kctxshareapiGetMemoryMappingDescriptor(struct KernelCtxShareApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_kctxshareapiGetMemoryMappingDescriptor(struct KernelCtxShareApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), ppMemDesc); } // kctxshareapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kctxshareapiControlSerialization_Prologue(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_kctxshareapiControlSerialization_Prologue(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), pCallContext, pParams); } // kctxshareapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_kctxshareapiControlSerialization_Epilogue(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_kctxshareapiControlSerialization_Epilogue(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), pCallContext, pParams); } // kctxshareapiControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kctxshareapiControl_Prologue(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_kctxshareapiControl_Prologue(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), pCallContext, pParams); } // kctxshareapiControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_kctxshareapiControl_Epilogue(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_kctxshareapiControl_Epilogue(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RmResource.offset), pCallContext, pParams); } // kctxshareapiIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kctxshareapiIsDuplicate(struct KernelCtxShareApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_kctxshareapiIsDuplicate(struct KernelCtxShareApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset), hMemory, pDuplicate); } // kctxshareapiPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_kctxshareapiPreDestruct(struct KernelCtxShareApi *pResource) { +void __nvoc_up_thunk_RsResource_kctxshareapiPreDestruct(struct KernelCtxShareApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset)); } // kctxshareapiControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kctxshareapiControlFilter(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kctxshareapiControlFilter(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset), pCallContext, pParams); } // kctxshareapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_kctxshareapiIsPartialUnmapSupported(struct KernelCtxShareApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_kctxshareapiIsPartialUnmapSupported(struct KernelCtxShareApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset)); } // kctxshareapiMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kctxshareapiMapTo(struct KernelCtxShareApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kctxshareapiMapTo(struct KernelCtxShareApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset), pParams); } // kctxshareapiUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kctxshareapiUnmapFrom(struct KernelCtxShareApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kctxshareapiUnmapFrom(struct KernelCtxShareApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset), pParams); } // kctxshareapiGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_kctxshareapiGetRefCount(struct KernelCtxShareApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_kctxshareapiGetRefCount(struct KernelCtxShareApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset)); } // kctxshareapiAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_kctxshareapiAddAdditionalDependants(struct RsClient *pClient, struct KernelCtxShareApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_kctxshareapiAddAdditionalDependants(struct RsClient *pClient, struct KernelCtxShareApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelCtxShareApi_RsResource.offset), pReference); } @@ -517,10 +589,6 @@ NV_STATUS __nvoc_ctor_KernelCtxShareApi(KernelCtxShareApi *pThis, struct CALL_CO static void __nvoc_init_funcTable_KernelCtxShareApi_1(KernelCtxShareApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // kctxshareapiCanCopy -- virtual override (res) base (gpures) - pThis->__kctxshareapiCanCopy__ = &kctxshareapiCanCopy_IMPL; - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_KernelCtxShareApi_resCanCopy; - // kctxshareapiCtrlCmdSetTpcPartitionTable -- exported (id=0x90670102) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__kctxshareapiCtrlCmdSetTpcPartitionTable__ = &kctxshareapiCtrlCmdSetTpcPartitionTable_IMPL; @@ -535,85 +603,118 @@ static void __nvoc_init_funcTable_KernelCtxShareApi_1(KernelCtxShareApi *pThis) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__kctxshareapiCtrlCmdSetCwdWatermark__ = &kctxshareapiCtrlCmdSetCwdWatermark_IMPL; #endif - - // kctxshareapiControl -- virtual inherited (gpures) base (gpures) - pThis->__kctxshareapiControl__ = &__nvoc_up_thunk_GpuResource_kctxshareapiControl; - - // kctxshareapiMap -- virtual inherited (gpures) base (gpures) - pThis->__kctxshareapiMap__ = &__nvoc_up_thunk_GpuResource_kctxshareapiMap; - - // kctxshareapiUnmap -- virtual inherited (gpures) base (gpures) - pThis->__kctxshareapiUnmap__ = &__nvoc_up_thunk_GpuResource_kctxshareapiUnmap; - - // kctxshareapiShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__kctxshareapiShareCallback__ = &__nvoc_up_thunk_GpuResource_kctxshareapiShareCallback; - - // kctxshareapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__kctxshareapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kctxshareapiGetRegBaseOffsetAndSize; - - // kctxshareapiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__kctxshareapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_kctxshareapiGetMapAddrSpace; - - // kctxshareapiInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__kctxshareapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kctxshareapiInternalControlForward; - - // kctxshareapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__kctxshareapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_kctxshareapiGetInternalObjectHandle; - - // kctxshareapiAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__kctxshareapiAccessCallback__ = &__nvoc_up_thunk_RmResource_kctxshareapiAccessCallback; - - // kctxshareapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__kctxshareapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_kctxshareapiGetMemInterMapParams; - - // kctxshareapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__kctxshareapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_kctxshareapiCheckMemInterUnmap; - - // kctxshareapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__kctxshareapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_kctxshareapiGetMemoryMappingDescriptor; - - // kctxshareapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__kctxshareapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kctxshareapiControlSerialization_Prologue; - - // kctxshareapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__kctxshareapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kctxshareapiControlSerialization_Epilogue; - - // kctxshareapiControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__kctxshareapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_kctxshareapiControl_Prologue; - - // kctxshareapiControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__kctxshareapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kctxshareapiControl_Epilogue; - - // kctxshareapiIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__kctxshareapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_kctxshareapiIsDuplicate; - - // kctxshareapiPreDestruct -- virtual inherited (res) base (gpures) - pThis->__kctxshareapiPreDestruct__ = &__nvoc_up_thunk_RsResource_kctxshareapiPreDestruct; - - // kctxshareapiControlFilter -- virtual inherited (res) base (gpures) - pThis->__kctxshareapiControlFilter__ = &__nvoc_up_thunk_RsResource_kctxshareapiControlFilter; - - // kctxshareapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__kctxshareapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kctxshareapiIsPartialUnmapSupported; - - // kctxshareapiMapTo -- virtual inherited (res) base (gpures) - pThis->__kctxshareapiMapTo__ = &__nvoc_up_thunk_RsResource_kctxshareapiMapTo; - - // kctxshareapiUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__kctxshareapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_kctxshareapiUnmapFrom; - - // kctxshareapiGetRefCount -- virtual inherited (res) base (gpures) - pThis->__kctxshareapiGetRefCount__ = &__nvoc_up_thunk_RsResource_kctxshareapiGetRefCount; - - // kctxshareapiAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__kctxshareapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kctxshareapiAddAdditionalDependants; -} // End __nvoc_init_funcTable_KernelCtxShareApi_1 with approximately 29 basic block(s). +} // End __nvoc_init_funcTable_KernelCtxShareApi_1 with approximately 3 basic block(s). // Initialize vtable(s) for 28 virtual method(s). void __nvoc_init_funcTable_KernelCtxShareApi(KernelCtxShareApi *pThis) { - // Initialize vtable(s) with 28 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelCtxShareApi vtable = { + .__kctxshareapiCanCopy__ = &kctxshareapiCanCopy_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_KernelCtxShareApi_resCanCopy, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif + .__kctxshareapiControl__ = &__nvoc_up_thunk_GpuResource_kctxshareapiControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__kctxshareapiMap__ = &__nvoc_up_thunk_GpuResource_kctxshareapiMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__kctxshareapiUnmap__ = &__nvoc_up_thunk_GpuResource_kctxshareapiUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__kctxshareapiShareCallback__ = &__nvoc_up_thunk_GpuResource_kctxshareapiShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__kctxshareapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kctxshareapiGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__kctxshareapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_kctxshareapiGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__kctxshareapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kctxshareapiInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__kctxshareapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_kctxshareapiGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__kctxshareapiAccessCallback__ = &__nvoc_up_thunk_RmResource_kctxshareapiAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__kctxshareapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_kctxshareapiGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__kctxshareapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_kctxshareapiCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__kctxshareapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_kctxshareapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__kctxshareapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kctxshareapiControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__kctxshareapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kctxshareapiControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__kctxshareapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_kctxshareapiControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__kctxshareapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kctxshareapiControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__kctxshareapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_kctxshareapiIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__kctxshareapiPreDestruct__ = &__nvoc_up_thunk_RsResource_kctxshareapiPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__kctxshareapiControlFilter__ = &__nvoc_up_thunk_RsResource_kctxshareapiControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__kctxshareapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kctxshareapiIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__kctxshareapiMapTo__ = &__nvoc_up_thunk_RsResource_kctxshareapiMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__kctxshareapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_kctxshareapiUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__kctxshareapiGetRefCount__ = &__nvoc_up_thunk_RsResource_kctxshareapiGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__kctxshareapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kctxshareapiAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (kctxshareapi) this + + // Initialize vtable(s) with 3 per-object function pointer(s). __nvoc_init_funcTable_KernelCtxShareApi_1(pThis); } diff --git a/src/nvidia/generated/g_kernel_ctxshare_nvoc.h b/src/nvidia/generated/g_kernel_ctxshare_nvoc.h index 88d6894b45..fb089770a7 100644 --- a/src/nvidia/generated/g_kernel_ctxshare_nvoc.h +++ b/src/nvidia/generated/g_kernel_ctxshare_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -226,10 +226,15 @@ void kctxshareDestruct_IMPL(struct KernelCtxShare *pKernelCtxShare); #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelCtxShareApi; + + struct KernelCtxShareApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelCtxShareApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -242,11 +247,22 @@ struct KernelCtxShareApi { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct KernelCtxShareApi *__nvoc_pbase_KernelCtxShareApi; // kctxshareapi - // Vtable with 28 per-object function pointers - NvBool (*__kctxshareapiCanCopy__)(struct KernelCtxShareApi * /*this*/); // virtual override (res) base (gpures) + // Vtable with 3 per-object function pointers NV_STATUS (*__kctxshareapiCtrlCmdSetTpcPartitionTable__)(struct KernelCtxShareApi * /*this*/, NV9067_CTRL_TPC_PARTITION_TABLE_PARAMS *); // exported (id=0x90670102) NV_STATUS (*__kctxshareapiCtrlCmdGetCwdWatermark__)(struct KernelCtxShareApi * /*this*/, NV9067_CTRL_CWD_WATERMARK_PARAMS *); // exported (id=0x90670201) NV_STATUS (*__kctxshareapiCtrlCmdSetCwdWatermark__)(struct KernelCtxShareApi * /*this*/, NV9067_CTRL_CWD_WATERMARK_PARAMS *); // exported (id=0x90670202) + + // Data members + struct KernelCtxShare *pShareData; + NvHandle hVASpace; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelCtxShareApi { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + + NvBool (*__kctxshareapiCanCopy__)(struct KernelCtxShareApi * /*this*/); // virtual override (res) base (gpures) NV_STATUS (*__kctxshareapiControl__)(struct KernelCtxShareApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__kctxshareapiMap__)(struct KernelCtxShareApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__kctxshareapiUnmap__)(struct KernelCtxShareApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -271,10 +287,6 @@ struct KernelCtxShareApi { NV_STATUS (*__kctxshareapiUnmapFrom__)(struct KernelCtxShareApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__kctxshareapiGetRefCount__)(struct KernelCtxShareApi * /*this*/); // virtual inherited (res) base (gpures) void (*__kctxshareapiAddAdditionalDependants__)(struct RsClient *, struct KernelCtxShareApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - struct KernelCtxShare *pShareData; - NvHandle hVASpace; }; #ifndef __NVOC_CLASS_KernelCtxShareApi_TYPEDEF__ @@ -307,7 +319,7 @@ NV_STATUS __nvoc_objCreate_KernelCtxShareApi(KernelCtxShareApi**, Dynamic*, NvU3 // Wrapper macros -#define kctxshareapiCanCopy_FNPTR(pKernelCtxShareApi) pKernelCtxShareApi->__kctxshareapiCanCopy__ +#define kctxshareapiCanCopy_FNPTR(pKernelCtxShareApi) pKernelCtxShareApi->__nvoc_vtable->__kctxshareapiCanCopy__ #define kctxshareapiCanCopy(pKernelCtxShareApi) kctxshareapiCanCopy_DISPATCH(pKernelCtxShareApi) #define kctxshareapiCtrlCmdSetTpcPartitionTable_FNPTR(pKernelCtxShareApi) pKernelCtxShareApi->__kctxshareapiCtrlCmdSetTpcPartitionTable__ #define kctxshareapiCtrlCmdSetTpcPartitionTable(pKernelCtxShareApi, pParams) kctxshareapiCtrlCmdSetTpcPartitionTable_DISPATCH(pKernelCtxShareApi, pParams) @@ -315,58 +327,58 @@ NV_STATUS __nvoc_objCreate_KernelCtxShareApi(KernelCtxShareApi**, Dynamic*, NvU3 #define kctxshareapiCtrlCmdGetCwdWatermark(pKernelCtxShareApi, pParams) kctxshareapiCtrlCmdGetCwdWatermark_DISPATCH(pKernelCtxShareApi, pParams) #define kctxshareapiCtrlCmdSetCwdWatermark_FNPTR(pKernelCtxShareApi) pKernelCtxShareApi->__kctxshareapiCtrlCmdSetCwdWatermark__ #define kctxshareapiCtrlCmdSetCwdWatermark(pKernelCtxShareApi, pParams) kctxshareapiCtrlCmdSetCwdWatermark_DISPATCH(pKernelCtxShareApi, pParams) -#define kctxshareapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define kctxshareapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define kctxshareapiControl(pGpuResource, pCallContext, pParams) kctxshareapiControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define kctxshareapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define kctxshareapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define kctxshareapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) kctxshareapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define kctxshareapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define kctxshareapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define kctxshareapiUnmap(pGpuResource, pCallContext, pCpuMapping) kctxshareapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define kctxshareapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define kctxshareapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define kctxshareapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) kctxshareapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define kctxshareapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define kctxshareapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define kctxshareapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) kctxshareapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define kctxshareapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define kctxshareapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define kctxshareapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) kctxshareapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define kctxshareapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define kctxshareapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define kctxshareapiInternalControlForward(pGpuResource, command, pParams, size) kctxshareapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define kctxshareapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define kctxshareapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define kctxshareapiGetInternalObjectHandle(pGpuResource) kctxshareapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define kctxshareapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define kctxshareapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define kctxshareapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kctxshareapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define kctxshareapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define kctxshareapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define kctxshareapiGetMemInterMapParams(pRmResource, pParams) kctxshareapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define kctxshareapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define kctxshareapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define kctxshareapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) kctxshareapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define kctxshareapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define kctxshareapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define kctxshareapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) kctxshareapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define kctxshareapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define kctxshareapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define kctxshareapiControlSerialization_Prologue(pResource, pCallContext, pParams) kctxshareapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define kctxshareapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define kctxshareapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define kctxshareapiControlSerialization_Epilogue(pResource, pCallContext, pParams) kctxshareapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kctxshareapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define kctxshareapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define kctxshareapiControl_Prologue(pResource, pCallContext, pParams) kctxshareapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define kctxshareapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define kctxshareapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define kctxshareapiControl_Epilogue(pResource, pCallContext, pParams) kctxshareapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kctxshareapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define kctxshareapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define kctxshareapiIsDuplicate(pResource, hMemory, pDuplicate) kctxshareapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define kctxshareapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define kctxshareapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define kctxshareapiPreDestruct(pResource) kctxshareapiPreDestruct_DISPATCH(pResource) -#define kctxshareapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define kctxshareapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define kctxshareapiControlFilter(pResource, pCallContext, pParams) kctxshareapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define kctxshareapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define kctxshareapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define kctxshareapiIsPartialUnmapSupported(pResource) kctxshareapiIsPartialUnmapSupported_DISPATCH(pResource) -#define kctxshareapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define kctxshareapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define kctxshareapiMapTo(pResource, pParams) kctxshareapiMapTo_DISPATCH(pResource, pParams) -#define kctxshareapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define kctxshareapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define kctxshareapiUnmapFrom(pResource, pParams) kctxshareapiUnmapFrom_DISPATCH(pResource, pParams) -#define kctxshareapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define kctxshareapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define kctxshareapiGetRefCount(pResource) kctxshareapiGetRefCount_DISPATCH(pResource) -#define kctxshareapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define kctxshareapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define kctxshareapiAddAdditionalDependants(pClient, pResource, pReference) kctxshareapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool kctxshareapiCanCopy_DISPATCH(struct KernelCtxShareApi *pKernelCtxShareApi) { - return pKernelCtxShareApi->__kctxshareapiCanCopy__(pKernelCtxShareApi); + return pKernelCtxShareApi->__nvoc_vtable->__kctxshareapiCanCopy__(pKernelCtxShareApi); } static inline NV_STATUS kctxshareapiCtrlCmdSetTpcPartitionTable_DISPATCH(struct KernelCtxShareApi *pKernelCtxShareApi, NV9067_CTRL_TPC_PARTITION_TABLE_PARAMS *pParams) { @@ -382,99 +394,99 @@ static inline NV_STATUS kctxshareapiCtrlCmdSetCwdWatermark_DISPATCH(struct Kerne } static inline NV_STATUS kctxshareapiControl_DISPATCH(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__kctxshareapiControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__kctxshareapiControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS kctxshareapiMap_DISPATCH(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kctxshareapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__kctxshareapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS kctxshareapiUnmap_DISPATCH(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kctxshareapiUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__kctxshareapiUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool kctxshareapiShareCallback_DISPATCH(struct KernelCtxShareApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__kctxshareapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__kctxshareapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS kctxshareapiGetRegBaseOffsetAndSize_DISPATCH(struct KernelCtxShareApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__kctxshareapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__kctxshareapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS kctxshareapiGetMapAddrSpace_DISPATCH(struct KernelCtxShareApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__kctxshareapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__kctxshareapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS kctxshareapiInternalControlForward_DISPATCH(struct KernelCtxShareApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__kctxshareapiInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__kctxshareapiInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle kctxshareapiGetInternalObjectHandle_DISPATCH(struct KernelCtxShareApi *pGpuResource) { - return pGpuResource->__kctxshareapiGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__kctxshareapiGetInternalObjectHandle__(pGpuResource); } static inline NvBool kctxshareapiAccessCallback_DISPATCH(struct KernelCtxShareApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__kctxshareapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__kctxshareapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS kctxshareapiGetMemInterMapParams_DISPATCH(struct KernelCtxShareApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__kctxshareapiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__kctxshareapiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS kctxshareapiCheckMemInterUnmap_DISPATCH(struct KernelCtxShareApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__kctxshareapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__kctxshareapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS kctxshareapiGetMemoryMappingDescriptor_DISPATCH(struct KernelCtxShareApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__kctxshareapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__kctxshareapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS kctxshareapiControlSerialization_Prologue_DISPATCH(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kctxshareapiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kctxshareapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void kctxshareapiControlSerialization_Epilogue_DISPATCH(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kctxshareapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__kctxshareapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS kctxshareapiControl_Prologue_DISPATCH(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kctxshareapiControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kctxshareapiControl_Prologue__(pResource, pCallContext, pParams); } static inline void kctxshareapiControl_Epilogue_DISPATCH(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kctxshareapiControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__kctxshareapiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS kctxshareapiIsDuplicate_DISPATCH(struct KernelCtxShareApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__kctxshareapiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__kctxshareapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void kctxshareapiPreDestruct_DISPATCH(struct KernelCtxShareApi *pResource) { - pResource->__kctxshareapiPreDestruct__(pResource); + pResource->__nvoc_vtable->__kctxshareapiPreDestruct__(pResource); } static inline NV_STATUS kctxshareapiControlFilter_DISPATCH(struct KernelCtxShareApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kctxshareapiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kctxshareapiControlFilter__(pResource, pCallContext, pParams); } static inline NvBool kctxshareapiIsPartialUnmapSupported_DISPATCH(struct KernelCtxShareApi *pResource) { - return pResource->__kctxshareapiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__kctxshareapiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS kctxshareapiMapTo_DISPATCH(struct KernelCtxShareApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__kctxshareapiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__kctxshareapiMapTo__(pResource, pParams); } static inline NV_STATUS kctxshareapiUnmapFrom_DISPATCH(struct KernelCtxShareApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__kctxshareapiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__kctxshareapiUnmapFrom__(pResource, pParams); } static inline NvU32 kctxshareapiGetRefCount_DISPATCH(struct KernelCtxShareApi *pResource) { - return pResource->__kctxshareapiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__kctxshareapiGetRefCount__(pResource); } static inline void kctxshareapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelCtxShareApi *pResource, RsResourceRef *pReference) { - pResource->__kctxshareapiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__kctxshareapiAddAdditionalDependants__(pClient, pResource, pReference); } NvBool kctxshareapiCanCopy_IMPL(struct KernelCtxShareApi *pKernelCtxShareApi); diff --git a/src/nvidia/generated/g_kernel_falcon_nvoc.c b/src/nvidia/generated/g_kernel_falcon_nvoc.c index c4b14d2638..b6d7fb9002 100644 --- a/src/nvidia/generated/g_kernel_falcon_nvoc.c +++ b/src/nvidia/generated/g_kernel_falcon_nvoc.c @@ -69,83 +69,112 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelFalcon = /*pExportInfo=*/ &__nvoc_export_info_KernelFalcon }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineConfigured(struct CrashCatEngine *arg_this); // super +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnload(struct CrashCatEngine *arg_this); // super +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineVprintf(struct CrashCatEngine *arg_this, NvBool bReportStart, const char *fmt, va_list args); // super +NvU32 __nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriRead(struct CrashCatEngine *arg_this, NvU32 offset); // super +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriWrite(struct CrashCatEngine *arg_this, NvU32 offset, NvU32 data); // super +void * __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineMapBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc); // super +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnmapBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc); // super +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineSyncBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size); // super +const NvU32 * __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetScratchOffsets(struct CrashCatEngine *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId); // super +NvU32 __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetWFL0Offset(struct CrashCatEngine *arg_this); // super +NvU32 __nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegRead(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 offset); // this +void __nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegWrite(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 offset, NvU32 data); // this +NvU32 __nvoc_down_thunk_KernelFalcon_kcrashcatEngineMaskDmemAddr(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 addr); // this + // 3 down-thunk(s) defined to bridge methods in KernelFalcon from superclasses // kflcnRegRead: virtual halified (2 hals) override (kcrashcatEngine) base (kcrashcatEngine) body -static NvU32 __nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegRead(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 offset) { +NvU32 __nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegRead(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 offset) { return kflcnRegRead(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) - __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), offset); } // kflcnRegWrite: virtual halified (2 hals) override (kcrashcatEngine) base (kcrashcatEngine) body -static void __nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegWrite(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 offset, NvU32 data) { +void __nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegWrite(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 offset, NvU32 data) { kflcnRegWrite(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) - __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), offset, data); } // kflcnMaskDmemAddr: virtual halified (3 hals) override (kcrashcatEngine) base (kcrashcatEngine) body -static NvU32 __nvoc_down_thunk_KernelFalcon_kcrashcatEngineMaskDmemAddr(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 addr) { +NvU32 __nvoc_down_thunk_KernelFalcon_kcrashcatEngineMaskDmemAddr(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 addr) { return kflcnMaskDmemAddr(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) - __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), addr); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_KernelCrashCatEngine_kflcnConfigured(struct KernelFalcon *arg_this); // this +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnUnload(struct KernelFalcon *arg_this); // this +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnVprintf(struct KernelFalcon *arg_this, NvBool bReportStart, const char *fmt, va_list args); // this +NvU32 __nvoc_up_thunk_KernelCrashCatEngine_kflcnPriRead(struct KernelFalcon *arg_this, NvU32 offset); // this +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnPriWrite(struct KernelFalcon *arg_this, NvU32 offset, NvU32 data); // this +void * __nvoc_up_thunk_KernelCrashCatEngine_kflcnMapBufferDescriptor(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc); // this +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnUnmapBufferDescriptor(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc); // this +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnSyncBufferDescriptor(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size); // this +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnReadDmem(struct KernelFalcon *arg_this, NvU32 offset, NvU32 size, void *pBuf); // this +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnReadEmem(struct KernelFalcon *arg_this, NvU64 offset, NvU64 size, void *pBuf); // this +const NvU32 * __nvoc_up_thunk_KernelCrashCatEngine_kflcnGetScratchOffsets(struct KernelFalcon *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId); // this +NvU32 __nvoc_up_thunk_KernelCrashCatEngine_kflcnGetWFL0Offset(struct KernelFalcon *arg_this); // this + // 12 up-thunk(s) defined to bridge methods in KernelFalcon to superclasses // kflcnConfigured: virtual inherited (kcrashcatEngine) base (kcrashcatEngine) -static NvBool __nvoc_up_thunk_KernelCrashCatEngine_kflcnConfigured(struct KernelFalcon *arg_this) { +NvBool __nvoc_up_thunk_KernelCrashCatEngine_kflcnConfigured(struct KernelFalcon *arg_this) { return kcrashcatEngineConfigured((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset)); } // kflcnUnload: virtual inherited (kcrashcatEngine) base (kcrashcatEngine) -static void __nvoc_up_thunk_KernelCrashCatEngine_kflcnUnload(struct KernelFalcon *arg_this) { +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnUnload(struct KernelFalcon *arg_this) { kcrashcatEngineUnload((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset)); } // kflcnVprintf: virtual inherited (kcrashcatEngine) base (kcrashcatEngine) -static void __nvoc_up_thunk_KernelCrashCatEngine_kflcnVprintf(struct KernelFalcon *arg_this, NvBool bReportStart, const char *fmt, va_list args) { +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnVprintf(struct KernelFalcon *arg_this, NvBool bReportStart, const char *fmt, va_list args) { kcrashcatEngineVprintf((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), bReportStart, fmt, args); } // kflcnPriRead: virtual inherited (kcrashcatEngine) base (kcrashcatEngine) -static NvU32 __nvoc_up_thunk_KernelCrashCatEngine_kflcnPriRead(struct KernelFalcon *arg_this, NvU32 offset) { +NvU32 __nvoc_up_thunk_KernelCrashCatEngine_kflcnPriRead(struct KernelFalcon *arg_this, NvU32 offset) { return kcrashcatEnginePriRead((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), offset); } // kflcnPriWrite: virtual inherited (kcrashcatEngine) base (kcrashcatEngine) -static void __nvoc_up_thunk_KernelCrashCatEngine_kflcnPriWrite(struct KernelFalcon *arg_this, NvU32 offset, NvU32 data) { +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnPriWrite(struct KernelFalcon *arg_this, NvU32 offset, NvU32 data) { kcrashcatEnginePriWrite((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), offset, data); } // kflcnMapBufferDescriptor: virtual inherited (kcrashcatEngine) base (kcrashcatEngine) -static void * __nvoc_up_thunk_KernelCrashCatEngine_kflcnMapBufferDescriptor(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc) { +void * __nvoc_up_thunk_KernelCrashCatEngine_kflcnMapBufferDescriptor(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc) { return kcrashcatEngineMapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), pBufDesc); } // kflcnUnmapBufferDescriptor: virtual inherited (kcrashcatEngine) base (kcrashcatEngine) -static void __nvoc_up_thunk_KernelCrashCatEngine_kflcnUnmapBufferDescriptor(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc) { +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnUnmapBufferDescriptor(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc) { kcrashcatEngineUnmapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), pBufDesc); } // kflcnSyncBufferDescriptor: virtual inherited (kcrashcatEngine) base (kcrashcatEngine) -static void __nvoc_up_thunk_KernelCrashCatEngine_kflcnSyncBufferDescriptor(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnSyncBufferDescriptor(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { kcrashcatEngineSyncBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), pBufDesc, offset, size); } // kflcnReadDmem: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) -static void __nvoc_up_thunk_KernelCrashCatEngine_kflcnReadDmem(struct KernelFalcon *arg_this, NvU32 offset, NvU32 size, void *pBuf) { +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnReadDmem(struct KernelFalcon *arg_this, NvU32 offset, NvU32 size, void *pBuf) { kcrashcatEngineReadDmem((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), offset, size, pBuf); } // kflcnReadEmem: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) -static void __nvoc_up_thunk_KernelCrashCatEngine_kflcnReadEmem(struct KernelFalcon *arg_this, NvU64 offset, NvU64 size, void *pBuf) { +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnReadEmem(struct KernelFalcon *arg_this, NvU64 offset, NvU64 size, void *pBuf) { kcrashcatEngineReadEmem((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), offset, size, pBuf); } // kflcnGetScratchOffsets: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) -static const NvU32 * __nvoc_up_thunk_KernelCrashCatEngine_kflcnGetScratchOffsets(struct KernelFalcon *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { +const NvU32 * __nvoc_up_thunk_KernelCrashCatEngine_kflcnGetScratchOffsets(struct KernelFalcon *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { return kcrashcatEngineGetScratchOffsets((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset), scratchGroupId); } // kflcnGetWFL0Offset: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) -static NvU32 __nvoc_up_thunk_KernelCrashCatEngine_kflcnGetWFL0Offset(struct KernelFalcon *arg_this) { +NvU32 __nvoc_up_thunk_KernelCrashCatEngine_kflcnGetWFL0Offset(struct KernelFalcon *arg_this) { return kcrashcatEngineGetWFL0Offset((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelFalcon_KernelCrashCatEngine.offset)); } @@ -211,7 +240,6 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO { pThis->__kflcnRegRead__ = &kflcnRegRead_TU102; } - pThis->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineRegRead__ = &__nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegRead; // kflcnRegWrite -- virtual halified (2 hals) override (kcrashcatEngine) base (kcrashcatEngine) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ @@ -222,7 +250,6 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO { pThis->__kflcnRegWrite__ = &kflcnRegWrite_TU102; } - pThis->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineRegWrite__ = &__nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegWrite; // kflcnRiscvRegRead -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ @@ -247,7 +274,7 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO // kflcnIsRiscvCpuEnabled -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__kflcnIsRiscvCpuEnabled__ = &kflcnIsRiscvCpuEnabled_108313; + pThis->__kflcnIsRiscvCpuEnabled__ = &kflcnIsRiscvCpuEnabled_86b752; } else { @@ -257,7 +284,7 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO // kflcnIsRiscvActive -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__kflcnIsRiscvActive__ = &kflcnIsRiscvActive_108313; + pThis->__kflcnIsRiscvActive__ = &kflcnIsRiscvActive_86b752; } else { @@ -305,9 +332,6 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO } } - // kflcnResetHw -- pure virtual - pThis->__kflcnResetHw__ = NULL; - // kflcnReset -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { @@ -400,20 +424,47 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO pThis->__kflcnWaitForHalt__ = &kflcnWaitForHalt_TU102; } - // kflcnReadIntrStatus -- halified (3 hals) body + // kflcnWaitForHaltRiscv -- halified (3 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__kflcnWaitForHaltRiscv__ = &kflcnWaitForHaltRiscv_5baef9; + } + else + { + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000007e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 */ + { + pThis->__kflcnWaitForHaltRiscv__ = &kflcnWaitForHaltRiscv_5baef9; + } + else + { + pThis->__kflcnWaitForHaltRiscv__ = &kflcnWaitForHaltRiscv_GA102; + } + } + + // kflcnReadIntrStatus -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { pThis->__kflcnReadIntrStatus__ = &kflcnReadIntrStatus_474d46; } else + { + pThis->__kflcnReadIntrStatus__ = &kflcnReadIntrStatus_TU102; + } + + // kflcnRiscvReadIntrStatus -- halified (3 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__kflcnRiscvReadIntrStatus__ = &kflcnRiscvReadIntrStatus_474d46; + } + else { if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000007e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 */ { - pThis->__kflcnReadIntrStatus__ = &kflcnReadIntrStatus_TU102; + pThis->__kflcnRiscvReadIntrStatus__ = &kflcnRiscvReadIntrStatus_TU102; } else { - pThis->__kflcnReadIntrStatus__ = &kflcnReadIntrStatus_GA102; + pThis->__kflcnRiscvReadIntrStatus__ = &kflcnRiscvReadIntrStatus_GA102; } } @@ -467,50 +518,71 @@ static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecO pThis->__kflcnMaskDmemAddr__ = &kflcnMaskDmemAddr_GA100; } } - pThis->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineMaskDmemAddr__ = &__nvoc_down_thunk_KernelFalcon_kcrashcatEngineMaskDmemAddr; - - // kflcnConfigured -- virtual inherited (kcrashcatEngine) base (kcrashcatEngine) - pThis->__kflcnConfigured__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnConfigured; - - // kflcnUnload -- virtual inherited (kcrashcatEngine) base (kcrashcatEngine) - pThis->__kflcnUnload__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnUnload; - - // kflcnVprintf -- virtual inherited (kcrashcatEngine) base (kcrashcatEngine) - pThis->__kflcnVprintf__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnVprintf; - - // kflcnPriRead -- virtual inherited (kcrashcatEngine) base (kcrashcatEngine) - pThis->__kflcnPriRead__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnPriRead; - - // kflcnPriWrite -- virtual inherited (kcrashcatEngine) base (kcrashcatEngine) - pThis->__kflcnPriWrite__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnPriWrite; - - // kflcnMapBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kcrashcatEngine) - pThis->__kflcnMapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnMapBufferDescriptor; - // kflcnUnmapBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kcrashcatEngine) - pThis->__kflcnUnmapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnUnmapBufferDescriptor; - - // kflcnSyncBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kcrashcatEngine) - pThis->__kflcnSyncBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnSyncBufferDescriptor; - - // kflcnReadDmem -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) - pThis->__kflcnReadDmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnReadDmem; - - // kflcnReadEmem -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) - pThis->__kflcnReadEmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnReadEmem; - - // kflcnGetScratchOffsets -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) - pThis->__kflcnGetScratchOffsets__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnGetScratchOffsets; - - // kflcnGetWFL0Offset -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) - pThis->__kflcnGetWFL0Offset__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnGetWFL0Offset; -} // End __nvoc_init_funcTable_KernelFalcon_1 with approximately 64 basic block(s). + // kflcnGetEccInterruptMask -- halified (2 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__kflcnGetEccInterruptMask__ = &kflcnGetEccInterruptMask_GB100; + } + // default + else + { + pThis->__kflcnGetEccInterruptMask__ = &kflcnGetEccInterruptMask_4a4dee; + } +} // End __nvoc_init_funcTable_KernelFalcon_1 with approximately 55 basic block(s). -// Initialize vtable(s) for 32 virtual method(s). +// Initialize vtable(s) for 35 virtual method(s). void __nvoc_init_funcTable_KernelFalcon(KernelFalcon *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 32 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelFalcon vtable = { + .KernelCrashCatEngine.__kcrashcatEngineRegRead__ = &__nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegRead, // pure virtual + .KernelCrashCatEngine.__kcrashcatEngineRegWrite__ = &__nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegWrite, // pure virtual + .__kflcnResetHw__ = NULL, // pure virtual + .KernelCrashCatEngine.__kcrashcatEngineMaskDmemAddr__ = &__nvoc_down_thunk_KernelFalcon_kcrashcatEngineMaskDmemAddr, // pure virtual + .__kflcnConfigured__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnConfigured, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelCrashCatEngine.__kcrashcatEngineConfigured__ = &kcrashcatEngineConfigured_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelCrashCatEngine.CrashCatEngine.__crashcatEngineConfigured__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineConfigured, // pure virtual + .__kflcnUnload__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnUnload, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelCrashCatEngine.__kcrashcatEngineUnload__ = &kcrashcatEngineUnload_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelCrashCatEngine.CrashCatEngine.__crashcatEngineUnload__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnload, // virtual + .__kflcnVprintf__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnVprintf, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelCrashCatEngine.__kcrashcatEngineVprintf__ = &kcrashcatEngineVprintf_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelCrashCatEngine.CrashCatEngine.__crashcatEngineVprintf__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineVprintf, // pure virtual + .__kflcnPriRead__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnPriRead, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelCrashCatEngine.__kcrashcatEnginePriRead__ = &kcrashcatEnginePriRead_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelCrashCatEngine.CrashCatEngine.__crashcatEnginePriRead__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriRead, // pure virtual + .__kflcnPriWrite__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnPriWrite, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelCrashCatEngine.__kcrashcatEnginePriWrite__ = &kcrashcatEnginePriWrite_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelCrashCatEngine.CrashCatEngine.__crashcatEnginePriWrite__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriWrite, // pure virtual + .__kflcnMapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnMapBufferDescriptor, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelCrashCatEngine.__kcrashcatEngineMapBufferDescriptor__ = &kcrashcatEngineMapBufferDescriptor_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelCrashCatEngine.CrashCatEngine.__crashcatEngineMapBufferDescriptor__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineMapBufferDescriptor, // pure virtual + .__kflcnUnmapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnUnmapBufferDescriptor, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelCrashCatEngine.__kcrashcatEngineUnmapBufferDescriptor__ = &kcrashcatEngineUnmapBufferDescriptor_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelCrashCatEngine.CrashCatEngine.__crashcatEngineUnmapBufferDescriptor__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnmapBufferDescriptor, // pure virtual + .__kflcnSyncBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnSyncBufferDescriptor, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelCrashCatEngine.__kcrashcatEngineSyncBufferDescriptor__ = &kcrashcatEngineSyncBufferDescriptor_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelCrashCatEngine.CrashCatEngine.__crashcatEngineSyncBufferDescriptor__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineSyncBufferDescriptor, // pure virtual + .__kflcnReadDmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnReadDmem, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelCrashCatEngine.__kcrashcatEngineReadDmem__ = &kcrashcatEngineReadDmem_TU102, // virtual halified (singleton optimized) + .__kflcnReadEmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnReadEmem, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelCrashCatEngine.__kcrashcatEngineReadEmem__ = &kcrashcatEngineReadEmem_2fced3, // virtual halified (singleton optimized) + .__kflcnGetScratchOffsets__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnGetScratchOffsets, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelCrashCatEngine.__kcrashcatEngineGetScratchOffsets__ = &kcrashcatEngineGetScratchOffsets_TU102, // virtual halified (singleton optimized) override (crashcatEngine) base (crashcatEngine) + .KernelCrashCatEngine.CrashCatEngine.__crashcatEngineGetScratchOffsets__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetScratchOffsets, // pure virtual + .__kflcnGetWFL0Offset__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnGetWFL0Offset, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelCrashCatEngine.__kcrashcatEngineGetWFL0Offset__ = &kcrashcatEngineGetWFL0Offset_TU102, // virtual halified (singleton optimized) override (crashcatEngine) base (crashcatEngine) + .KernelCrashCatEngine.CrashCatEngine.__crashcatEngineGetWFL0Offset__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetWFL0Offset, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_KernelCrashCatEngine.__nvoc_base_CrashCatEngine.__nvoc_vtable = &vtable.KernelCrashCatEngine.CrashCatEngine; // (crashcatEngine) super^2 + pThis->__nvoc_base_KernelCrashCatEngine.__nvoc_vtable = &vtable.KernelCrashCatEngine; // (kcrashcatEngine) super + pThis->__nvoc_vtable = &vtable; // (kflcn) this + + // Initialize vtable(s) with 22 per-object function pointer(s). __nvoc_init_funcTable_KernelFalcon_1(pThis, pRmhalspecowner); } @@ -609,108 +681,157 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_GenericKernelFalcon = /*pExportInfo=*/ &__nvoc_export_info_GenericKernelFalcon }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineConfigured(struct CrashCatEngine *arg_this); // super^2 +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnload(struct CrashCatEngine *arg_this); // super^2 +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineVprintf(struct CrashCatEngine *arg_this, NvBool bReportStart, const char *fmt, va_list args); // super^2 +NvU32 __nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriRead(struct CrashCatEngine *arg_this, NvU32 offset); // super^2 +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriWrite(struct CrashCatEngine *arg_this, NvU32 offset, NvU32 data); // super^2 +void * __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineMapBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc); // super^2 +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnmapBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc); // super^2 +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineSyncBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size); // super^2 +const NvU32 * __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetScratchOffsets(struct CrashCatEngine *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId); // super^2 +NvU32 __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetWFL0Offset(struct CrashCatEngine *arg_this); // super^2 +NvU32 __nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegRead(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 offset); // super +void __nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegWrite(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 offset, NvU32 data); // super +NvU32 __nvoc_down_thunk_KernelFalcon_kcrashcatEngineMaskDmemAddr(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 addr); // super +NV_STATUS __nvoc_down_thunk_GenericKernelFalcon_kflcnResetHw(struct OBJGPU *pGpu, struct KernelFalcon *pGenKernFlcn); // this +void __nvoc_down_thunk_GenericKernelFalcon_intrservRegisterIntrService(struct OBJGPU *arg1, struct IntrService *arg_this, IntrServiceRecord arg3[175]); // this +NV_STATUS __nvoc_down_thunk_GenericKernelFalcon_intrservServiceNotificationInterrupt(struct OBJGPU *arg1, struct IntrService *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3); // this + // 3 down-thunk(s) defined to bridge methods in GenericKernelFalcon from superclasses // gkflcnResetHw: virtual override (kflcn) base (kflcn) -static NV_STATUS __nvoc_down_thunk_GenericKernelFalcon_kflcnResetHw(struct OBJGPU *pGpu, struct KernelFalcon *pGenKernFlcn) { +NV_STATUS __nvoc_down_thunk_GenericKernelFalcon_kflcnResetHw(struct OBJGPU *pGpu, struct KernelFalcon *pGenKernFlcn) { return gkflcnResetHw(pGpu, (struct GenericKernelFalcon *)(((unsigned char *) pGenKernFlcn) - __nvoc_rtti_GenericKernelFalcon_KernelFalcon.offset)); } // gkflcnRegisterIntrService: virtual override (intrserv) base (intrserv) -static void __nvoc_down_thunk_GenericKernelFalcon_intrservRegisterIntrService(struct OBJGPU *arg1, struct IntrService *arg_this, IntrServiceRecord arg3[175]) { +void __nvoc_down_thunk_GenericKernelFalcon_intrservRegisterIntrService(struct OBJGPU *arg1, struct IntrService *arg_this, IntrServiceRecord arg3[175]) { gkflcnRegisterIntrService(arg1, (struct GenericKernelFalcon *)(((unsigned char *) arg_this) - __nvoc_rtti_GenericKernelFalcon_IntrService.offset), arg3); } // gkflcnServiceNotificationInterrupt: virtual override (intrserv) base (intrserv) -static NV_STATUS __nvoc_down_thunk_GenericKernelFalcon_intrservServiceNotificationInterrupt(struct OBJGPU *arg1, struct IntrService *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3) { +NV_STATUS __nvoc_down_thunk_GenericKernelFalcon_intrservServiceNotificationInterrupt(struct OBJGPU *arg1, struct IntrService *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3) { return gkflcnServiceNotificationInterrupt(arg1, (struct GenericKernelFalcon *)(((unsigned char *) arg_this) - __nvoc_rtti_GenericKernelFalcon_IntrService.offset), arg3); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_KernelCrashCatEngine_kflcnConfigured(struct KernelFalcon *arg_this); // super +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnUnload(struct KernelFalcon *arg_this); // super +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnVprintf(struct KernelFalcon *arg_this, NvBool bReportStart, const char *fmt, va_list args); // super +NvU32 __nvoc_up_thunk_KernelCrashCatEngine_kflcnPriRead(struct KernelFalcon *arg_this, NvU32 offset); // super +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnPriWrite(struct KernelFalcon *arg_this, NvU32 offset, NvU32 data); // super +void * __nvoc_up_thunk_KernelCrashCatEngine_kflcnMapBufferDescriptor(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc); // super +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnUnmapBufferDescriptor(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc); // super +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnSyncBufferDescriptor(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size); // super +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnReadDmem(struct KernelFalcon *arg_this, NvU32 offset, NvU32 size, void *pBuf); // super +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnReadEmem(struct KernelFalcon *arg_this, NvU64 offset, NvU64 size, void *pBuf); // super +const NvU32 * __nvoc_up_thunk_KernelCrashCatEngine_kflcnGetScratchOffsets(struct KernelFalcon *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId); // super +NvU32 __nvoc_up_thunk_KernelCrashCatEngine_kflcnGetWFL0Offset(struct KernelFalcon *arg_this); // super +NvU32 __nvoc_up_thunk_KernelFalcon_gkflcnRegRead(struct OBJGPU *pGpu, struct GenericKernelFalcon *pKernelFlcn, NvU32 offset); // this +void __nvoc_up_thunk_KernelFalcon_gkflcnRegWrite(struct OBJGPU *pGpu, struct GenericKernelFalcon *pKernelFlcn, NvU32 offset, NvU32 data); // this +NvU32 __nvoc_up_thunk_KernelFalcon_gkflcnMaskDmemAddr(struct OBJGPU *pGpu, struct GenericKernelFalcon *pKernelFlcn, NvU32 addr); // this +NvBool __nvoc_up_thunk_KernelCrashCatEngine_gkflcnConfigured(struct GenericKernelFalcon *arg_this); // this +void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnUnload(struct GenericKernelFalcon *arg_this); // this +void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnVprintf(struct GenericKernelFalcon *arg_this, NvBool bReportStart, const char *fmt, va_list args); // this +NvU32 __nvoc_up_thunk_KernelCrashCatEngine_gkflcnPriRead(struct GenericKernelFalcon *arg_this, NvU32 offset); // this +void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnPriWrite(struct GenericKernelFalcon *arg_this, NvU32 offset, NvU32 data); // this +void * __nvoc_up_thunk_KernelCrashCatEngine_gkflcnMapBufferDescriptor(struct GenericKernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc); // this +void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnUnmapBufferDescriptor(struct GenericKernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc); // this +void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnSyncBufferDescriptor(struct GenericKernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size); // this +void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnReadDmem(struct GenericKernelFalcon *arg_this, NvU32 offset, NvU32 size, void *pBuf); // this +void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnReadEmem(struct GenericKernelFalcon *arg_this, NvU64 offset, NvU64 size, void *pBuf); // this +const NvU32 * __nvoc_up_thunk_KernelCrashCatEngine_gkflcnGetScratchOffsets(struct GenericKernelFalcon *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId); // this +NvU32 __nvoc_up_thunk_KernelCrashCatEngine_gkflcnGetWFL0Offset(struct GenericKernelFalcon *arg_this); // this +NvBool __nvoc_up_thunk_IntrService_gkflcnClearInterrupt(struct OBJGPU *pGpu, struct GenericKernelFalcon *pIntrService, IntrServiceClearInterruptArguments *pParams); // this +NvU32 __nvoc_up_thunk_IntrService_gkflcnServiceInterrupt(struct OBJGPU *pGpu, struct GenericKernelFalcon *pIntrService, IntrServiceServiceInterruptArguments *pParams); // this + // 17 up-thunk(s) defined to bridge methods in GenericKernelFalcon to superclasses // gkflcnRegRead: virtual halified (2 hals) inherited (kflcn) base (kflcn) body -static NvU32 __nvoc_up_thunk_KernelFalcon_gkflcnRegRead(struct OBJGPU *pGpu, struct GenericKernelFalcon *pKernelFlcn, NvU32 offset) { +NvU32 __nvoc_up_thunk_KernelFalcon_gkflcnRegRead(struct OBJGPU *pGpu, struct GenericKernelFalcon *pKernelFlcn, NvU32 offset) { return kflcnRegRead(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) + __nvoc_rtti_GenericKernelFalcon_KernelFalcon.offset), offset); } // gkflcnRegWrite: virtual halified (2 hals) inherited (kflcn) base (kflcn) body -static void __nvoc_up_thunk_KernelFalcon_gkflcnRegWrite(struct OBJGPU *pGpu, struct GenericKernelFalcon *pKernelFlcn, NvU32 offset, NvU32 data) { +void __nvoc_up_thunk_KernelFalcon_gkflcnRegWrite(struct OBJGPU *pGpu, struct GenericKernelFalcon *pKernelFlcn, NvU32 offset, NvU32 data) { kflcnRegWrite(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) + __nvoc_rtti_GenericKernelFalcon_KernelFalcon.offset), offset, data); } // gkflcnMaskDmemAddr: virtual halified (3 hals) inherited (kflcn) base (kflcn) body -static NvU32 __nvoc_up_thunk_KernelFalcon_gkflcnMaskDmemAddr(struct OBJGPU *pGpu, struct GenericKernelFalcon *pKernelFlcn, NvU32 addr) { +NvU32 __nvoc_up_thunk_KernelFalcon_gkflcnMaskDmemAddr(struct OBJGPU *pGpu, struct GenericKernelFalcon *pKernelFlcn, NvU32 addr) { return kflcnMaskDmemAddr(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) + __nvoc_rtti_GenericKernelFalcon_KernelFalcon.offset), addr); } // gkflcnConfigured: virtual inherited (kcrashcatEngine) base (kflcn) -static NvBool __nvoc_up_thunk_KernelCrashCatEngine_gkflcnConfigured(struct GenericKernelFalcon *arg_this) { +NvBool __nvoc_up_thunk_KernelCrashCatEngine_gkflcnConfigured(struct GenericKernelFalcon *arg_this) { return kcrashcatEngineConfigured((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset)); } // gkflcnUnload: virtual inherited (kcrashcatEngine) base (kflcn) -static void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnUnload(struct GenericKernelFalcon *arg_this) { +void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnUnload(struct GenericKernelFalcon *arg_this) { kcrashcatEngineUnload((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset)); } // gkflcnVprintf: virtual inherited (kcrashcatEngine) base (kflcn) -static void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnVprintf(struct GenericKernelFalcon *arg_this, NvBool bReportStart, const char *fmt, va_list args) { +void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnVprintf(struct GenericKernelFalcon *arg_this, NvBool bReportStart, const char *fmt, va_list args) { kcrashcatEngineVprintf((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), bReportStart, fmt, args); } // gkflcnPriRead: virtual inherited (kcrashcatEngine) base (kflcn) -static NvU32 __nvoc_up_thunk_KernelCrashCatEngine_gkflcnPriRead(struct GenericKernelFalcon *arg_this, NvU32 offset) { +NvU32 __nvoc_up_thunk_KernelCrashCatEngine_gkflcnPriRead(struct GenericKernelFalcon *arg_this, NvU32 offset) { return kcrashcatEnginePriRead((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), offset); } // gkflcnPriWrite: virtual inherited (kcrashcatEngine) base (kflcn) -static void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnPriWrite(struct GenericKernelFalcon *arg_this, NvU32 offset, NvU32 data) { +void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnPriWrite(struct GenericKernelFalcon *arg_this, NvU32 offset, NvU32 data) { kcrashcatEnginePriWrite((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), offset, data); } // gkflcnMapBufferDescriptor: virtual inherited (kcrashcatEngine) base (kflcn) -static void * __nvoc_up_thunk_KernelCrashCatEngine_gkflcnMapBufferDescriptor(struct GenericKernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc) { +void * __nvoc_up_thunk_KernelCrashCatEngine_gkflcnMapBufferDescriptor(struct GenericKernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc) { return kcrashcatEngineMapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), pBufDesc); } // gkflcnUnmapBufferDescriptor: virtual inherited (kcrashcatEngine) base (kflcn) -static void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnUnmapBufferDescriptor(struct GenericKernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc) { +void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnUnmapBufferDescriptor(struct GenericKernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc) { kcrashcatEngineUnmapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), pBufDesc); } // gkflcnSyncBufferDescriptor: virtual inherited (kcrashcatEngine) base (kflcn) -static void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnSyncBufferDescriptor(struct GenericKernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { +void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnSyncBufferDescriptor(struct GenericKernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { kcrashcatEngineSyncBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), pBufDesc, offset, size); } // gkflcnReadDmem: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) -static void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnReadDmem(struct GenericKernelFalcon *arg_this, NvU32 offset, NvU32 size, void *pBuf) { +void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnReadDmem(struct GenericKernelFalcon *arg_this, NvU32 offset, NvU32 size, void *pBuf) { kcrashcatEngineReadDmem((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), offset, size, pBuf); } // gkflcnReadEmem: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) -static void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnReadEmem(struct GenericKernelFalcon *arg_this, NvU64 offset, NvU64 size, void *pBuf) { +void __nvoc_up_thunk_KernelCrashCatEngine_gkflcnReadEmem(struct GenericKernelFalcon *arg_this, NvU64 offset, NvU64 size, void *pBuf) { kcrashcatEngineReadEmem((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), offset, size, pBuf); } // gkflcnGetScratchOffsets: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) -static const NvU32 * __nvoc_up_thunk_KernelCrashCatEngine_gkflcnGetScratchOffsets(struct GenericKernelFalcon *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { +const NvU32 * __nvoc_up_thunk_KernelCrashCatEngine_gkflcnGetScratchOffsets(struct GenericKernelFalcon *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { return kcrashcatEngineGetScratchOffsets((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset), scratchGroupId); } // gkflcnGetWFL0Offset: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) -static NvU32 __nvoc_up_thunk_KernelCrashCatEngine_gkflcnGetWFL0Offset(struct GenericKernelFalcon *arg_this) { +NvU32 __nvoc_up_thunk_KernelCrashCatEngine_gkflcnGetWFL0Offset(struct GenericKernelFalcon *arg_this) { return kcrashcatEngineGetWFL0Offset((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_GenericKernelFalcon_KernelCrashCatEngine.offset)); } // gkflcnClearInterrupt: virtual inherited (intrserv) base (intrserv) -static NvBool __nvoc_up_thunk_IntrService_gkflcnClearInterrupt(struct OBJGPU *pGpu, struct GenericKernelFalcon *pIntrService, IntrServiceClearInterruptArguments *pParams) { +NvBool __nvoc_up_thunk_IntrService_gkflcnClearInterrupt(struct OBJGPU *pGpu, struct GenericKernelFalcon *pIntrService, IntrServiceClearInterruptArguments *pParams) { return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_GenericKernelFalcon_IntrService.offset), pParams); } // gkflcnServiceInterrupt: virtual inherited (intrserv) base (intrserv) -static NvU32 __nvoc_up_thunk_IntrService_gkflcnServiceInterrupt(struct OBJGPU *pGpu, struct GenericKernelFalcon *pIntrService, IntrServiceServiceInterruptArguments *pParams) { +NvU32 __nvoc_up_thunk_IntrService_gkflcnServiceInterrupt(struct OBJGPU *pGpu, struct GenericKernelFalcon *pIntrService, IntrServiceServiceInterruptArguments *pParams) { return intrservServiceInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_GenericKernelFalcon_IntrService.offset), pParams); } @@ -768,18 +889,6 @@ NV_STATUS __nvoc_ctor_GenericKernelFalcon(GenericKernelFalcon *pThis, RmHalspecO static void __nvoc_init_funcTable_GenericKernelFalcon_1(GenericKernelFalcon *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // gkflcnResetHw -- virtual override (kflcn) base (kflcn) - pThis->__gkflcnResetHw__ = &gkflcnResetHw_IMPL; - pThis->__nvoc_base_KernelFalcon.__kflcnResetHw__ = &__nvoc_down_thunk_GenericKernelFalcon_kflcnResetHw; - - // gkflcnRegisterIntrService -- virtual override (intrserv) base (intrserv) - pThis->__gkflcnRegisterIntrService__ = &gkflcnRegisterIntrService_IMPL; - pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_GenericKernelFalcon_intrservRegisterIntrService; - - // gkflcnServiceNotificationInterrupt -- virtual override (intrserv) base (intrserv) - pThis->__gkflcnServiceNotificationInterrupt__ = &gkflcnServiceNotificationInterrupt_IMPL; - pThis->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_down_thunk_GenericKernelFalcon_intrservServiceNotificationInterrupt; - // gkflcnRegRead -- virtual halified (2 hals) inherited (kflcn) base (kflcn) body pThis->__gkflcnRegRead__ = &__nvoc_up_thunk_KernelFalcon_gkflcnRegRead; @@ -788,55 +897,83 @@ static void __nvoc_init_funcTable_GenericKernelFalcon_1(GenericKernelFalcon *pTh // gkflcnMaskDmemAddr -- virtual halified (3 hals) inherited (kflcn) base (kflcn) body pThis->__gkflcnMaskDmemAddr__ = &__nvoc_up_thunk_KernelFalcon_gkflcnMaskDmemAddr; - - // gkflcnConfigured -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__gkflcnConfigured__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnConfigured; - - // gkflcnUnload -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__gkflcnUnload__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnUnload; - - // gkflcnVprintf -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__gkflcnVprintf__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnVprintf; - - // gkflcnPriRead -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__gkflcnPriRead__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnPriRead; - - // gkflcnPriWrite -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__gkflcnPriWrite__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnPriWrite; - - // gkflcnMapBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__gkflcnMapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnMapBufferDescriptor; - - // gkflcnUnmapBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__gkflcnUnmapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnUnmapBufferDescriptor; - - // gkflcnSyncBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__gkflcnSyncBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnSyncBufferDescriptor; - - // gkflcnReadDmem -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) - pThis->__gkflcnReadDmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnReadDmem; - - // gkflcnReadEmem -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) - pThis->__gkflcnReadEmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnReadEmem; - - // gkflcnGetScratchOffsets -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) - pThis->__gkflcnGetScratchOffsets__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnGetScratchOffsets; - - // gkflcnGetWFL0Offset -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) - pThis->__gkflcnGetWFL0Offset__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnGetWFL0Offset; - - // gkflcnClearInterrupt -- virtual inherited (intrserv) base (intrserv) - pThis->__gkflcnClearInterrupt__ = &__nvoc_up_thunk_IntrService_gkflcnClearInterrupt; - - // gkflcnServiceInterrupt -- virtual inherited (intrserv) base (intrserv) - pThis->__gkflcnServiceInterrupt__ = &__nvoc_up_thunk_IntrService_gkflcnServiceInterrupt; -} // End __nvoc_init_funcTable_GenericKernelFalcon_1 with approximately 27 basic block(s). +} // End __nvoc_init_funcTable_GenericKernelFalcon_1 with approximately 7 basic block(s). // Initialize vtable(s) for 20 virtual method(s). void __nvoc_init_funcTable_GenericKernelFalcon(GenericKernelFalcon *pThis) { - // Initialize vtable(s) with 20 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__GenericKernelFalcon vtable = { + .__gkflcnResetHw__ = &gkflcnResetHw_IMPL, // virtual override (kflcn) base (kflcn) + .KernelFalcon.__kflcnResetHw__ = &__nvoc_down_thunk_GenericKernelFalcon_kflcnResetHw, // pure virtual + .__gkflcnRegisterIntrService__ = &gkflcnRegisterIntrService_IMPL, // virtual override (intrserv) base (intrserv) + .IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_GenericKernelFalcon_intrservRegisterIntrService, // virtual + .__gkflcnServiceNotificationInterrupt__ = &gkflcnServiceNotificationInterrupt_IMPL, // virtual override (intrserv) base (intrserv) + .IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_down_thunk_GenericKernelFalcon_intrservServiceNotificationInterrupt, // virtual + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineRegRead__ = &__nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegRead, // pure virtual + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineRegWrite__ = &__nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegWrite, // pure virtual + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineMaskDmemAddr__ = &__nvoc_down_thunk_KernelFalcon_kcrashcatEngineMaskDmemAddr, // pure virtual + .__gkflcnConfigured__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnConfigured, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnConfigured__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnConfigured, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineConfigured__ = &kcrashcatEngineConfigured_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineConfigured__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineConfigured, // pure virtual + .__gkflcnUnload__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnUnload, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnUnload__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnUnload, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineUnload__ = &kcrashcatEngineUnload_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineUnload__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnload, // virtual + .__gkflcnVprintf__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnVprintf, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnVprintf__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnVprintf, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineVprintf__ = &kcrashcatEngineVprintf_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineVprintf__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineVprintf, // pure virtual + .__gkflcnPriRead__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnPriRead, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnPriRead__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnPriRead, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEnginePriRead__ = &kcrashcatEnginePriRead_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEnginePriRead__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriRead, // pure virtual + .__gkflcnPriWrite__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnPriWrite, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnPriWrite__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnPriWrite, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEnginePriWrite__ = &kcrashcatEnginePriWrite_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEnginePriWrite__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriWrite, // pure virtual + .__gkflcnMapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnMapBufferDescriptor, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnMapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnMapBufferDescriptor, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineMapBufferDescriptor__ = &kcrashcatEngineMapBufferDescriptor_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineMapBufferDescriptor__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineMapBufferDescriptor, // pure virtual + .__gkflcnUnmapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnUnmapBufferDescriptor, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnUnmapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnUnmapBufferDescriptor, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineUnmapBufferDescriptor__ = &kcrashcatEngineUnmapBufferDescriptor_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineUnmapBufferDescriptor__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnmapBufferDescriptor, // pure virtual + .__gkflcnSyncBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnSyncBufferDescriptor, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnSyncBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnSyncBufferDescriptor, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineSyncBufferDescriptor__ = &kcrashcatEngineSyncBufferDescriptor_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineSyncBufferDescriptor__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineSyncBufferDescriptor, // pure virtual + .__gkflcnReadDmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnReadDmem, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnReadDmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnReadDmem, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineReadDmem__ = &kcrashcatEngineReadDmem_TU102, // virtual halified (singleton optimized) + .__gkflcnReadEmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnReadEmem, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnReadEmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnReadEmem, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineReadEmem__ = &kcrashcatEngineReadEmem_2fced3, // virtual halified (singleton optimized) + .__gkflcnGetScratchOffsets__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnGetScratchOffsets, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnGetScratchOffsets__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnGetScratchOffsets, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineGetScratchOffsets__ = &kcrashcatEngineGetScratchOffsets_TU102, // virtual halified (singleton optimized) override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineGetScratchOffsets__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetScratchOffsets, // pure virtual + .__gkflcnGetWFL0Offset__ = &__nvoc_up_thunk_KernelCrashCatEngine_gkflcnGetWFL0Offset, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnGetWFL0Offset__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnGetWFL0Offset, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineGetWFL0Offset__ = &kcrashcatEngineGetWFL0Offset_TU102, // virtual halified (singleton optimized) override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineGetWFL0Offset__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetWFL0Offset, // pure virtual + .__gkflcnClearInterrupt__ = &__nvoc_up_thunk_IntrService_gkflcnClearInterrupt, // virtual inherited (intrserv) base (intrserv) + .IntrService.__intrservClearInterrupt__ = &intrservClearInterrupt_IMPL, // virtual + .__gkflcnServiceInterrupt__ = &__nvoc_up_thunk_IntrService_gkflcnServiceInterrupt, // virtual inherited (intrserv) base (intrserv) + .IntrService.__intrservServiceInterrupt__ = &intrservServiceInterrupt_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_base_CrashCatEngine.__nvoc_vtable = &vtable.KernelFalcon.KernelCrashCatEngine.CrashCatEngine; // (crashcatEngine) super^3 + pThis->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable = &vtable.KernelFalcon.KernelCrashCatEngine; // (kcrashcatEngine) super^2 + pThis->__nvoc_base_KernelFalcon.__nvoc_vtable = &vtable.KernelFalcon; // (kflcn) super + pThis->__nvoc_base_IntrService.__nvoc_vtable = &vtable.IntrService; // (intrserv) super + pThis->__nvoc_vtable = &vtable; // (gkflcn) this + + // Initialize vtable(s) with 3 per-object function pointer(s). __nvoc_init_funcTable_GenericKernelFalcon_1(pThis); } diff --git a/src/nvidia/generated/g_kernel_falcon_nvoc.h b/src/nvidia/generated/g_kernel_falcon_nvoc.h index 99b0bba801..aff7debe08 100644 --- a/src/nvidia/generated/g_kernel_falcon_nvoc.h +++ b/src/nvidia/generated/g_kernel_falcon_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -95,10 +95,15 @@ typedef struct KernelFalconEngineConfig { #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelFalcon; + + struct KernelFalcon { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelFalcon *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct KernelCrashCatEngine __nvoc_base_KernelCrashCatEngine; @@ -108,7 +113,7 @@ struct KernelFalcon { struct KernelCrashCatEngine *__nvoc_pbase_KernelCrashCatEngine; // kcrashcatEngine super struct KernelFalcon *__nvoc_pbase_KernelFalcon; // kflcn - // Vtable with 32 per-object function pointers + // Vtable with 22 per-object function pointers NvU32 (*__kflcnRegRead__)(struct OBJGPU *, struct KernelFalcon * /*this*/, NvU32); // virtual halified (2 hals) override (kcrashcatEngine) base (kcrashcatEngine) body void (*__kflcnRegWrite__)(struct OBJGPU *, struct KernelFalcon * /*this*/, NvU32, NvU32); // virtual halified (2 hals) override (kcrashcatEngine) base (kcrashcatEngine) body NvU32 (*__kflcnRiscvRegRead__)(struct OBJGPU *, struct KernelFalcon * /*this*/, NvU32); // halified (2 hals) body @@ -117,7 +122,6 @@ struct KernelFalcon { NvBool (*__kflcnIsRiscvActive__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (3 hals) body void (*__kflcnRiscvProgramBcr__)(struct OBJGPU *, struct KernelFalcon * /*this*/, NvBool); // halified (3 hals) body void (*__kflcnSwitchToFalcon__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (3 hals) body - NV_STATUS (*__kflcnResetHw__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // pure virtual void (*__kflcnReset__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (2 hals) body void (*__kflcnResetIntoRiscv__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (3 hals) body void (*__kflcnStartCpu__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (2 hals) body @@ -125,22 +129,13 @@ struct KernelFalcon { NV_STATUS (*__kflcnPreResetWait__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (3 hals) body NV_STATUS (*__kflcnWaitForResetToFinish__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (3 hals) body NV_STATUS (*__kflcnWaitForHalt__)(struct OBJGPU *, struct KernelFalcon * /*this*/, NvU32, NvU32); // halified (2 hals) body - NvU32 (*__kflcnReadIntrStatus__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (3 hals) body + NV_STATUS (*__kflcnWaitForHaltRiscv__)(struct OBJGPU *, struct KernelFalcon * /*this*/, NvU32, NvU32); // halified (3 hals) body + NvU32 (*__kflcnReadIntrStatus__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (2 hals) body + NvU32 (*__kflcnRiscvReadIntrStatus__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (3 hals) body void (*__kflcnIntrRetrigger__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (3 hals) body NvU32 (*__kflcnMaskImemAddr__)(struct OBJGPU *, struct KernelFalcon * /*this*/, NvU32); // halified (3 hals) body NvU32 (*__kflcnMaskDmemAddr__)(struct OBJGPU *, struct KernelFalcon * /*this*/, NvU32); // virtual halified (3 hals) override (kcrashcatEngine) base (kcrashcatEngine) body - NvBool (*__kflcnConfigured__)(struct KernelFalcon * /*this*/); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) - void (*__kflcnUnload__)(struct KernelFalcon * /*this*/); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) - void (*__kflcnVprintf__)(struct KernelFalcon * /*this*/, NvBool, const char *, va_list); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) - NvU32 (*__kflcnPriRead__)(struct KernelFalcon * /*this*/, NvU32); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) - void (*__kflcnPriWrite__)(struct KernelFalcon * /*this*/, NvU32, NvU32); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) - void * (*__kflcnMapBufferDescriptor__)(struct KernelFalcon * /*this*/, CrashCatBufferDescriptor *); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) - void (*__kflcnUnmapBufferDescriptor__)(struct KernelFalcon * /*this*/, CrashCatBufferDescriptor *); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) - void (*__kflcnSyncBufferDescriptor__)(struct KernelFalcon * /*this*/, CrashCatBufferDescriptor *, NvU32, NvU32); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) - void (*__kflcnReadDmem__)(struct KernelFalcon * /*this*/, NvU32, NvU32, void *); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) - void (*__kflcnReadEmem__)(struct KernelFalcon * /*this*/, NvU64, NvU64, void *); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) - const NvU32 * (*__kflcnGetScratchOffsets__)(struct KernelFalcon * /*this*/, NV_CRASHCAT_SCRATCH_GROUP_ID); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) - NvU32 (*__kflcnGetWFL0Offset__)(struct KernelFalcon * /*this*/); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + NvU32 (*__kflcnGetEccInterruptMask__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // halified (2 hals) body // Data members NvU32 registerBase; @@ -155,6 +150,26 @@ struct KernelFalcon { NvU32 addrSpaceList; }; + +// Metadata including vtable with 13 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelFalcon { + const struct NVOC_VTABLE__KernelCrashCatEngine KernelCrashCatEngine; // (kcrashcatEngine) 15 function pointers + + NV_STATUS (*__kflcnResetHw__)(struct OBJGPU *, struct KernelFalcon * /*this*/); // pure virtual + NvBool (*__kflcnConfigured__)(struct KernelFalcon * /*this*/); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + void (*__kflcnUnload__)(struct KernelFalcon * /*this*/); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + void (*__kflcnVprintf__)(struct KernelFalcon * /*this*/, NvBool, const char *, va_list); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + NvU32 (*__kflcnPriRead__)(struct KernelFalcon * /*this*/, NvU32); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + void (*__kflcnPriWrite__)(struct KernelFalcon * /*this*/, NvU32, NvU32); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + void * (*__kflcnMapBufferDescriptor__)(struct KernelFalcon * /*this*/, CrashCatBufferDescriptor *); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + void (*__kflcnUnmapBufferDescriptor__)(struct KernelFalcon * /*this*/, CrashCatBufferDescriptor *); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + void (*__kflcnSyncBufferDescriptor__)(struct KernelFalcon * /*this*/, CrashCatBufferDescriptor *, NvU32, NvU32); // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + void (*__kflcnReadDmem__)(struct KernelFalcon * /*this*/, NvU32, NvU32, void *); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + void (*__kflcnReadEmem__)(struct KernelFalcon * /*this*/, NvU64, NvU64, void *); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + const NvU32 * (*__kflcnGetScratchOffsets__)(struct KernelFalcon * /*this*/, NV_CRASHCAT_SCRATCH_GROUP_ID); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + NvU32 (*__kflcnGetWFL0Offset__)(struct KernelFalcon * /*this*/); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) +}; + #ifndef __NVOC_CLASS_KernelFalcon_TYPEDEF__ #define __NVOC_CLASS_KernelFalcon_TYPEDEF__ typedef struct KernelFalcon KernelFalcon; @@ -209,7 +224,7 @@ NV_STATUS __nvoc_objCreate_KernelFalcon(KernelFalcon**, Dynamic*, NvU32); #define kflcnSwitchToFalcon_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnSwitchToFalcon__ #define kflcnSwitchToFalcon(pGpu, pKernelFlcn) kflcnSwitchToFalcon_DISPATCH(pGpu, pKernelFlcn) #define kflcnSwitchToFalcon_HAL(pGpu, pKernelFlcn) kflcnSwitchToFalcon_DISPATCH(pGpu, pKernelFlcn) -#define kflcnResetHw_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnResetHw__ +#define kflcnResetHw_FNPTR(pKernelFlcn) pKernelFlcn->__nvoc_vtable->__kflcnResetHw__ #define kflcnResetHw(pGpu, pKernelFlcn) kflcnResetHw_DISPATCH(pGpu, pKernelFlcn) #define kflcnReset_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnReset__ #define kflcnReset(pGpu, pKernelFlcn) kflcnReset_DISPATCH(pGpu, pKernelFlcn) @@ -232,9 +247,15 @@ NV_STATUS __nvoc_objCreate_KernelFalcon(KernelFalcon**, Dynamic*, NvU32); #define kflcnWaitForHalt_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnWaitForHalt__ #define kflcnWaitForHalt(pGpu, pKernelFlcn, timeoutUs, flags) kflcnWaitForHalt_DISPATCH(pGpu, pKernelFlcn, timeoutUs, flags) #define kflcnWaitForHalt_HAL(pGpu, pKernelFlcn, timeoutUs, flags) kflcnWaitForHalt_DISPATCH(pGpu, pKernelFlcn, timeoutUs, flags) +#define kflcnWaitForHaltRiscv_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnWaitForHaltRiscv__ +#define kflcnWaitForHaltRiscv(pGpu, pKernelFlcn, timeoutUs, flags) kflcnWaitForHaltRiscv_DISPATCH(pGpu, pKernelFlcn, timeoutUs, flags) +#define kflcnWaitForHaltRiscv_HAL(pGpu, pKernelFlcn, timeoutUs, flags) kflcnWaitForHaltRiscv_DISPATCH(pGpu, pKernelFlcn, timeoutUs, flags) #define kflcnReadIntrStatus_FNPTR(pKerneFlcn) pKerneFlcn->__kflcnReadIntrStatus__ #define kflcnReadIntrStatus(pGpu, pKerneFlcn) kflcnReadIntrStatus_DISPATCH(pGpu, pKerneFlcn) #define kflcnReadIntrStatus_HAL(pGpu, pKerneFlcn) kflcnReadIntrStatus_DISPATCH(pGpu, pKerneFlcn) +#define kflcnRiscvReadIntrStatus_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnRiscvReadIntrStatus__ +#define kflcnRiscvReadIntrStatus(pGpu, pKernelFlcn) kflcnRiscvReadIntrStatus_DISPATCH(pGpu, pKernelFlcn) +#define kflcnRiscvReadIntrStatus_HAL(pGpu, pKernelFlcn) kflcnRiscvReadIntrStatus_DISPATCH(pGpu, pKernelFlcn) #define kflcnIntrRetrigger_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnIntrRetrigger__ #define kflcnIntrRetrigger(pGpu, pKernelFlcn) kflcnIntrRetrigger_DISPATCH(pGpu, pKernelFlcn) #define kflcnIntrRetrigger_HAL(pGpu, pKernelFlcn) kflcnIntrRetrigger_DISPATCH(pGpu, pKernelFlcn) @@ -244,32 +265,35 @@ NV_STATUS __nvoc_objCreate_KernelFalcon(KernelFalcon**, Dynamic*, NvU32); #define kflcnMaskDmemAddr_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnMaskDmemAddr__ #define kflcnMaskDmemAddr(pGpu, pKernelFlcn, addr) kflcnMaskDmemAddr_DISPATCH(pGpu, pKernelFlcn, addr) #define kflcnMaskDmemAddr_HAL(pGpu, pKernelFlcn, addr) kflcnMaskDmemAddr_DISPATCH(pGpu, pKernelFlcn, addr) -#define kflcnConfigured_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineConfigured__ +#define kflcnGetEccInterruptMask_FNPTR(pKernelFlcn) pKernelFlcn->__kflcnGetEccInterruptMask__ +#define kflcnGetEccInterruptMask(pGpu, pKernelFlcn) kflcnGetEccInterruptMask_DISPATCH(pGpu, pKernelFlcn) +#define kflcnGetEccInterruptMask_HAL(pGpu, pKernelFlcn) kflcnGetEccInterruptMask_DISPATCH(pGpu, pKernelFlcn) +#define kflcnConfigured_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineConfigured__ #define kflcnConfigured(arg_this) kflcnConfigured_DISPATCH(arg_this) -#define kflcnUnload_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineUnload__ +#define kflcnUnload_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineUnload__ #define kflcnUnload(arg_this) kflcnUnload_DISPATCH(arg_this) -#define kflcnVprintf_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineVprintf__ +#define kflcnVprintf_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineVprintf__ #define kflcnVprintf(arg_this, bReportStart, fmt, args) kflcnVprintf_DISPATCH(arg_this, bReportStart, fmt, args) -#define kflcnPriRead_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEnginePriRead__ +#define kflcnPriRead_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEnginePriRead__ #define kflcnPriRead(arg_this, offset) kflcnPriRead_DISPATCH(arg_this, offset) -#define kflcnPriWrite_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEnginePriWrite__ +#define kflcnPriWrite_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEnginePriWrite__ #define kflcnPriWrite(arg_this, offset, data) kflcnPriWrite_DISPATCH(arg_this, offset, data) -#define kflcnMapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineMapBufferDescriptor__ +#define kflcnMapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineMapBufferDescriptor__ #define kflcnMapBufferDescriptor(arg_this, pBufDesc) kflcnMapBufferDescriptor_DISPATCH(arg_this, pBufDesc) -#define kflcnUnmapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineUnmapBufferDescriptor__ +#define kflcnUnmapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineUnmapBufferDescriptor__ #define kflcnUnmapBufferDescriptor(arg_this, pBufDesc) kflcnUnmapBufferDescriptor_DISPATCH(arg_this, pBufDesc) -#define kflcnSyncBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineSyncBufferDescriptor__ +#define kflcnSyncBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineSyncBufferDescriptor__ #define kflcnSyncBufferDescriptor(arg_this, pBufDesc, offset, size) kflcnSyncBufferDescriptor_DISPATCH(arg_this, pBufDesc, offset, size) -#define kflcnReadDmem_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineReadDmem__ +#define kflcnReadDmem_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineReadDmem__ #define kflcnReadDmem(arg_this, offset, size, pBuf) kflcnReadDmem_DISPATCH(arg_this, offset, size, pBuf) #define kflcnReadDmem_HAL(arg_this, offset, size, pBuf) kflcnReadDmem_DISPATCH(arg_this, offset, size, pBuf) -#define kflcnReadEmem_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineReadEmem__ +#define kflcnReadEmem_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineReadEmem__ #define kflcnReadEmem(arg_this, offset, size, pBuf) kflcnReadEmem_DISPATCH(arg_this, offset, size, pBuf) #define kflcnReadEmem_HAL(arg_this, offset, size, pBuf) kflcnReadEmem_DISPATCH(arg_this, offset, size, pBuf) -#define kflcnGetScratchOffsets_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineGetScratchOffsets__ +#define kflcnGetScratchOffsets_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineGetScratchOffsets__ #define kflcnGetScratchOffsets(arg_this, scratchGroupId) kflcnGetScratchOffsets_DISPATCH(arg_this, scratchGroupId) #define kflcnGetScratchOffsets_HAL(arg_this, scratchGroupId) kflcnGetScratchOffsets_DISPATCH(arg_this, scratchGroupId) -#define kflcnGetWFL0Offset_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineGetWFL0Offset__ +#define kflcnGetWFL0Offset_FNPTR(arg_this) arg_this->__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineGetWFL0Offset__ #define kflcnGetWFL0Offset(arg_this) kflcnGetWFL0Offset_DISPATCH(arg_this) #define kflcnGetWFL0Offset_HAL(arg_this) kflcnGetWFL0Offset_DISPATCH(arg_this) @@ -307,7 +331,7 @@ static inline void kflcnSwitchToFalcon_DISPATCH(struct OBJGPU *pGpu, struct Kern } static inline NV_STATUS kflcnResetHw_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { - return pKernelFlcn->__kflcnResetHw__(pGpu, pKernelFlcn); + return pKernelFlcn->__nvoc_vtable->__kflcnResetHw__(pGpu, pKernelFlcn); } static inline void kflcnReset_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { @@ -338,10 +362,18 @@ static inline NV_STATUS kflcnWaitForHalt_DISPATCH(struct OBJGPU *pGpu, struct Ke return pKernelFlcn->__kflcnWaitForHalt__(pGpu, pKernelFlcn, timeoutUs, flags); } +static inline NV_STATUS kflcnWaitForHaltRiscv_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 timeoutUs, NvU32 flags) { + return pKernelFlcn->__kflcnWaitForHaltRiscv__(pGpu, pKernelFlcn, timeoutUs, flags); +} + static inline NvU32 kflcnReadIntrStatus_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKerneFlcn) { return pKerneFlcn->__kflcnReadIntrStatus__(pGpu, pKerneFlcn); } +static inline NvU32 kflcnRiscvReadIntrStatus_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { + return pKernelFlcn->__kflcnRiscvReadIntrStatus__(pGpu, pKernelFlcn); +} + static inline void kflcnIntrRetrigger_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { pKernelFlcn->__kflcnIntrRetrigger__(pGpu, pKernelFlcn); } @@ -354,52 +386,56 @@ static inline NvU32 kflcnMaskDmemAddr_DISPATCH(struct OBJGPU *pGpu, struct Kerne return pKernelFlcn->__kflcnMaskDmemAddr__(pGpu, pKernelFlcn, addr); } +static inline NvU32 kflcnGetEccInterruptMask_DISPATCH(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { + return pKernelFlcn->__kflcnGetEccInterruptMask__(pGpu, pKernelFlcn); +} + static inline NvBool kflcnConfigured_DISPATCH(struct KernelFalcon *arg_this) { - return arg_this->__kflcnConfigured__(arg_this); + return arg_this->__nvoc_vtable->__kflcnConfigured__(arg_this); } static inline void kflcnUnload_DISPATCH(struct KernelFalcon *arg_this) { - arg_this->__kflcnUnload__(arg_this); + arg_this->__nvoc_vtable->__kflcnUnload__(arg_this); } static inline void kflcnVprintf_DISPATCH(struct KernelFalcon *arg_this, NvBool bReportStart, const char *fmt, va_list args) { - arg_this->__kflcnVprintf__(arg_this, bReportStart, fmt, args); + arg_this->__nvoc_vtable->__kflcnVprintf__(arg_this, bReportStart, fmt, args); } static inline NvU32 kflcnPriRead_DISPATCH(struct KernelFalcon *arg_this, NvU32 offset) { - return arg_this->__kflcnPriRead__(arg_this, offset); + return arg_this->__nvoc_vtable->__kflcnPriRead__(arg_this, offset); } static inline void kflcnPriWrite_DISPATCH(struct KernelFalcon *arg_this, NvU32 offset, NvU32 data) { - arg_this->__kflcnPriWrite__(arg_this, offset, data); + arg_this->__nvoc_vtable->__kflcnPriWrite__(arg_this, offset, data); } static inline void * kflcnMapBufferDescriptor_DISPATCH(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc) { - return arg_this->__kflcnMapBufferDescriptor__(arg_this, pBufDesc); + return arg_this->__nvoc_vtable->__kflcnMapBufferDescriptor__(arg_this, pBufDesc); } static inline void kflcnUnmapBufferDescriptor_DISPATCH(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc) { - arg_this->__kflcnUnmapBufferDescriptor__(arg_this, pBufDesc); + arg_this->__nvoc_vtable->__kflcnUnmapBufferDescriptor__(arg_this, pBufDesc); } static inline void kflcnSyncBufferDescriptor_DISPATCH(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { - arg_this->__kflcnSyncBufferDescriptor__(arg_this, pBufDesc, offset, size); + arg_this->__nvoc_vtable->__kflcnSyncBufferDescriptor__(arg_this, pBufDesc, offset, size); } static inline void kflcnReadDmem_DISPATCH(struct KernelFalcon *arg_this, NvU32 offset, NvU32 size, void *pBuf) { - arg_this->__kflcnReadDmem__(arg_this, offset, size, pBuf); + arg_this->__nvoc_vtable->__kflcnReadDmem__(arg_this, offset, size, pBuf); } static inline void kflcnReadEmem_DISPATCH(struct KernelFalcon *arg_this, NvU64 offset, NvU64 size, void *pBuf) { - arg_this->__kflcnReadEmem__(arg_this, offset, size, pBuf); + arg_this->__nvoc_vtable->__kflcnReadEmem__(arg_this, offset, size, pBuf); } static inline const NvU32 * kflcnGetScratchOffsets_DISPATCH(struct KernelFalcon *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { - return arg_this->__kflcnGetScratchOffsets__(arg_this, scratchGroupId); + return arg_this->__nvoc_vtable->__kflcnGetScratchOffsets__(arg_this, scratchGroupId); } static inline NvU32 kflcnGetWFL0Offset_DISPATCH(struct KernelFalcon *arg_this) { - return arg_this->__kflcnGetWFL0Offset__(arg_this); + return arg_this->__nvoc_vtable->__kflcnGetWFL0Offset__(arg_this); } NvU32 kflcnRegRead_TU102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 offset); @@ -428,16 +464,16 @@ static inline void kflcnRiscvRegWrite_f2d351(struct OBJGPU *pGpu, struct KernelF NvBool kflcnIsRiscvCpuEnabled_TU102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn); -static inline NvBool kflcnIsRiscvCpuEnabled_108313(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 != 0))); +static inline NvBool kflcnIsRiscvCpuEnabled_86b752(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_FALSE); } NvBool kflcnIsRiscvActive_TU102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn); NvBool kflcnIsRiscvActive_GA10X(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn); -static inline NvBool kflcnIsRiscvActive_108313(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 != 0))); +static inline NvBool kflcnIsRiscvActive_86b752(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_FALSE); } void kflcnRiscvProgramBcr_GA102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvBool bBRFetch); @@ -506,14 +542,26 @@ static inline NV_STATUS kflcnWaitForHalt_5baef9(struct OBJGPU *pGpu, struct Kern NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -NvU32 kflcnReadIntrStatus_TU102(struct OBJGPU *pGpu, struct KernelFalcon *pKerneFlcn); +NV_STATUS kflcnWaitForHaltRiscv_GA102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 timeoutUs, NvU32 flags); -NvU32 kflcnReadIntrStatus_GA102(struct OBJGPU *pGpu, struct KernelFalcon *pKerneFlcn); +static inline NV_STATUS kflcnWaitForHaltRiscv_5baef9(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn, NvU32 timeoutUs, NvU32 flags) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +} + +NvU32 kflcnReadIntrStatus_TU102(struct OBJGPU *pGpu, struct KernelFalcon *pKerneFlcn); static inline NvU32 kflcnReadIntrStatus_474d46(struct OBJGPU *pGpu, struct KernelFalcon *pKerneFlcn) { NV_ASSERT_OR_RETURN_PRECOMP(0, 0); } +NvU32 kflcnRiscvReadIntrStatus_TU102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn); + +NvU32 kflcnRiscvReadIntrStatus_GA102(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn); + +static inline NvU32 kflcnRiscvReadIntrStatus_474d46(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { + NV_ASSERT_OR_RETURN_PRECOMP(0, 0); +} + void kflcnIntrRetrigger_GA100(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn); static inline void kflcnIntrRetrigger_b3696a(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { @@ -540,6 +588,12 @@ static inline NvU32 kflcnMaskDmemAddr_474d46(struct OBJGPU *pGpu, struct KernelF NV_ASSERT_OR_RETURN_PRECOMP(0, 0); } +NvU32 kflcnGetEccInterruptMask_GB100(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn); + +static inline NvU32 kflcnGetEccInterruptMask_4a4dee(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFlcn) { + return 0; +} + void kflcnConfigureEngine_IMPL(struct OBJGPU *pGpu, struct KernelFalcon *pKernelFalcon, KernelFalconEngineConfig *pFalconConfig); #ifdef __nvoc_kernel_falcon_h_disabled @@ -550,6 +604,17 @@ static inline void kflcnConfigureEngine(struct OBJGPU *pGpu, struct KernelFalcon #define kflcnConfigureEngine(pGpu, pKernelFalcon, pFalconConfig) kflcnConfigureEngine_IMPL(pGpu, pKernelFalcon, pFalconConfig) #endif //__nvoc_kernel_falcon_h_disabled +NvU32 kflcnGetPendingHostInterrupts_IMPL(struct OBJGPU *arg1, struct KernelFalcon *arg2); + +#ifdef __nvoc_kernel_falcon_h_disabled +static inline NvU32 kflcnGetPendingHostInterrupts(struct OBJGPU *arg1, struct KernelFalcon *arg2) { + NV_ASSERT_FAILED_PRECOMP("KernelFalcon was disabled!"); + return 0; +} +#else //__nvoc_kernel_falcon_h_disabled +#define kflcnGetPendingHostInterrupts(arg1, arg2) kflcnGetPendingHostInterrupts_IMPL(arg1, arg2) +#endif //__nvoc_kernel_falcon_h_disabled + NV_STATUS kflcnAllocContext_IMPL(struct OBJGPU *arg1, struct KernelFalcon *arg2, struct KernelChannel *arg3, NvU32 arg4); #ifdef __nvoc_kernel_falcon_h_disabled @@ -590,10 +655,15 @@ struct KernelFalcon *kflcnGetKernelFalconForEngine_IMPL(struct OBJGPU *pGpu, ENG #endif +// Metadata including vtable +struct NVOC_VTABLE__GenericKernelFalcon; + + struct GenericKernelFalcon { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__GenericKernelFalcon *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct KernelFalcon __nvoc_base_KernelFalcon; @@ -608,13 +678,21 @@ struct GenericKernelFalcon { struct Object *__nvoc_pbase_Object; // obj super struct GenericKernelFalcon *__nvoc_pbase_GenericKernelFalcon; // gkflcn - // Vtable with 20 per-object function pointers - NV_STATUS (*__gkflcnResetHw__)(struct OBJGPU *, struct GenericKernelFalcon * /*this*/); // virtual override (kflcn) base (kflcn) - void (*__gkflcnRegisterIntrService__)(struct OBJGPU *, struct GenericKernelFalcon * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) - NV_STATUS (*__gkflcnServiceNotificationInterrupt__)(struct OBJGPU *, struct GenericKernelFalcon * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual override (intrserv) base (intrserv) + // Vtable with 3 per-object function pointers NvU32 (*__gkflcnRegRead__)(struct OBJGPU *, struct GenericKernelFalcon * /*this*/, NvU32); // virtual halified (2 hals) inherited (kflcn) base (kflcn) body void (*__gkflcnRegWrite__)(struct OBJGPU *, struct GenericKernelFalcon * /*this*/, NvU32, NvU32); // virtual halified (2 hals) inherited (kflcn) base (kflcn) body NvU32 (*__gkflcnMaskDmemAddr__)(struct OBJGPU *, struct GenericKernelFalcon * /*this*/, NvU32); // virtual halified (3 hals) inherited (kflcn) base (kflcn) body +}; + + +// Metadata including vtable with 17 function pointers plus superclass metadata +struct NVOC_VTABLE__GenericKernelFalcon { + const struct NVOC_VTABLE__KernelFalcon KernelFalcon; // (kflcn) 13 function pointers + const struct NVOC_VTABLE__IntrService IntrService; // (intrserv) 4 function pointers + + NV_STATUS (*__gkflcnResetHw__)(struct OBJGPU *, struct GenericKernelFalcon * /*this*/); // virtual override (kflcn) base (kflcn) + void (*__gkflcnRegisterIntrService__)(struct OBJGPU *, struct GenericKernelFalcon * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) + NV_STATUS (*__gkflcnServiceNotificationInterrupt__)(struct OBJGPU *, struct GenericKernelFalcon * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual override (intrserv) base (intrserv) NvBool (*__gkflcnConfigured__)(struct GenericKernelFalcon * /*this*/); // virtual inherited (kcrashcatEngine) base (kflcn) void (*__gkflcnUnload__)(struct GenericKernelFalcon * /*this*/); // virtual inherited (kcrashcatEngine) base (kflcn) void (*__gkflcnVprintf__)(struct GenericKernelFalcon * /*this*/, NvBool, const char *, va_list); // virtual inherited (kcrashcatEngine) base (kflcn) @@ -661,11 +739,11 @@ NV_STATUS __nvoc_objCreate_GenericKernelFalcon(GenericKernelFalcon**, Dynamic*, // Wrapper macros -#define gkflcnResetHw_FNPTR(pGenKernFlcn) pGenKernFlcn->__gkflcnResetHw__ +#define gkflcnResetHw_FNPTR(pGenKernFlcn) pGenKernFlcn->__nvoc_vtable->__gkflcnResetHw__ #define gkflcnResetHw(pGpu, pGenKernFlcn) gkflcnResetHw_DISPATCH(pGpu, pGenKernFlcn) -#define gkflcnRegisterIntrService_FNPTR(arg_this) arg_this->__gkflcnRegisterIntrService__ +#define gkflcnRegisterIntrService_FNPTR(arg_this) arg_this->__nvoc_vtable->__gkflcnRegisterIntrService__ #define gkflcnRegisterIntrService(arg1, arg_this, arg3) gkflcnRegisterIntrService_DISPATCH(arg1, arg_this, arg3) -#define gkflcnServiceNotificationInterrupt_FNPTR(arg_this) arg_this->__gkflcnServiceNotificationInterrupt__ +#define gkflcnServiceNotificationInterrupt_FNPTR(arg_this) arg_this->__nvoc_vtable->__gkflcnServiceNotificationInterrupt__ #define gkflcnServiceNotificationInterrupt(arg1, arg_this, arg3) gkflcnServiceNotificationInterrupt_DISPATCH(arg1, arg_this, arg3) #define gkflcnRegRead_FNPTR(pKernelFlcn) pKernelFlcn->__nvoc_base_KernelFalcon.__kflcnRegRead__ #define gkflcnRegRead(pGpu, pKernelFlcn, offset) gkflcnRegRead_DISPATCH(pGpu, pKernelFlcn, offset) @@ -676,50 +754,50 @@ NV_STATUS __nvoc_objCreate_GenericKernelFalcon(GenericKernelFalcon**, Dynamic*, #define gkflcnMaskDmemAddr_FNPTR(pKernelFlcn) pKernelFlcn->__nvoc_base_KernelFalcon.__kflcnMaskDmemAddr__ #define gkflcnMaskDmemAddr(pGpu, pKernelFlcn, addr) gkflcnMaskDmemAddr_DISPATCH(pGpu, pKernelFlcn, addr) #define gkflcnMaskDmemAddr_HAL(pGpu, pKernelFlcn, addr) gkflcnMaskDmemAddr_DISPATCH(pGpu, pKernelFlcn, addr) -#define gkflcnConfigured_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineConfigured__ +#define gkflcnConfigured_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineConfigured__ #define gkflcnConfigured(arg_this) gkflcnConfigured_DISPATCH(arg_this) -#define gkflcnUnload_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineUnload__ +#define gkflcnUnload_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineUnload__ #define gkflcnUnload(arg_this) gkflcnUnload_DISPATCH(arg_this) -#define gkflcnVprintf_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineVprintf__ +#define gkflcnVprintf_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineVprintf__ #define gkflcnVprintf(arg_this, bReportStart, fmt, args) gkflcnVprintf_DISPATCH(arg_this, bReportStart, fmt, args) -#define gkflcnPriRead_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEnginePriRead__ +#define gkflcnPriRead_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEnginePriRead__ #define gkflcnPriRead(arg_this, offset) gkflcnPriRead_DISPATCH(arg_this, offset) -#define gkflcnPriWrite_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEnginePriWrite__ +#define gkflcnPriWrite_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEnginePriWrite__ #define gkflcnPriWrite(arg_this, offset, data) gkflcnPriWrite_DISPATCH(arg_this, offset, data) -#define gkflcnMapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineMapBufferDescriptor__ +#define gkflcnMapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineMapBufferDescriptor__ #define gkflcnMapBufferDescriptor(arg_this, pBufDesc) gkflcnMapBufferDescriptor_DISPATCH(arg_this, pBufDesc) -#define gkflcnUnmapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineUnmapBufferDescriptor__ +#define gkflcnUnmapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineUnmapBufferDescriptor__ #define gkflcnUnmapBufferDescriptor(arg_this, pBufDesc) gkflcnUnmapBufferDescriptor_DISPATCH(arg_this, pBufDesc) -#define gkflcnSyncBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineSyncBufferDescriptor__ +#define gkflcnSyncBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineSyncBufferDescriptor__ #define gkflcnSyncBufferDescriptor(arg_this, pBufDesc, offset, size) gkflcnSyncBufferDescriptor_DISPATCH(arg_this, pBufDesc, offset, size) -#define gkflcnReadDmem_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineReadDmem__ +#define gkflcnReadDmem_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineReadDmem__ #define gkflcnReadDmem(arg_this, offset, size, pBuf) gkflcnReadDmem_DISPATCH(arg_this, offset, size, pBuf) #define gkflcnReadDmem_HAL(arg_this, offset, size, pBuf) gkflcnReadDmem_DISPATCH(arg_this, offset, size, pBuf) -#define gkflcnReadEmem_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineReadEmem__ +#define gkflcnReadEmem_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineReadEmem__ #define gkflcnReadEmem(arg_this, offset, size, pBuf) gkflcnReadEmem_DISPATCH(arg_this, offset, size, pBuf) #define gkflcnReadEmem_HAL(arg_this, offset, size, pBuf) gkflcnReadEmem_DISPATCH(arg_this, offset, size, pBuf) -#define gkflcnGetScratchOffsets_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineGetScratchOffsets__ +#define gkflcnGetScratchOffsets_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineGetScratchOffsets__ #define gkflcnGetScratchOffsets(arg_this, scratchGroupId) gkflcnGetScratchOffsets_DISPATCH(arg_this, scratchGroupId) #define gkflcnGetScratchOffsets_HAL(arg_this, scratchGroupId) gkflcnGetScratchOffsets_DISPATCH(arg_this, scratchGroupId) -#define gkflcnGetWFL0Offset_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineGetWFL0Offset__ +#define gkflcnGetWFL0Offset_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineGetWFL0Offset__ #define gkflcnGetWFL0Offset(arg_this) gkflcnGetWFL0Offset_DISPATCH(arg_this) #define gkflcnGetWFL0Offset_HAL(arg_this) gkflcnGetWFL0Offset_DISPATCH(arg_this) -#define gkflcnClearInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservClearInterrupt__ +#define gkflcnClearInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__nvoc_vtable->__intrservClearInterrupt__ #define gkflcnClearInterrupt(pGpu, pIntrService, pParams) gkflcnClearInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define gkflcnServiceInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservServiceInterrupt__ +#define gkflcnServiceInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__nvoc_vtable->__intrservServiceInterrupt__ #define gkflcnServiceInterrupt(pGpu, pIntrService, pParams) gkflcnServiceInterrupt_DISPATCH(pGpu, pIntrService, pParams) // Dispatch functions static inline NV_STATUS gkflcnResetHw_DISPATCH(struct OBJGPU *pGpu, struct GenericKernelFalcon *pGenKernFlcn) { - return pGenKernFlcn->__gkflcnResetHw__(pGpu, pGenKernFlcn); + return pGenKernFlcn->__nvoc_vtable->__gkflcnResetHw__(pGpu, pGenKernFlcn); } static inline void gkflcnRegisterIntrService_DISPATCH(struct OBJGPU *arg1, struct GenericKernelFalcon *arg_this, IntrServiceRecord arg3[175]) { - arg_this->__gkflcnRegisterIntrService__(arg1, arg_this, arg3); + arg_this->__nvoc_vtable->__gkflcnRegisterIntrService__(arg1, arg_this, arg3); } static inline NV_STATUS gkflcnServiceNotificationInterrupt_DISPATCH(struct OBJGPU *arg1, struct GenericKernelFalcon *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3) { - return arg_this->__gkflcnServiceNotificationInterrupt__(arg1, arg_this, arg3); + return arg_this->__nvoc_vtable->__gkflcnServiceNotificationInterrupt__(arg1, arg_this, arg3); } static inline NvU32 gkflcnRegRead_DISPATCH(struct OBJGPU *pGpu, struct GenericKernelFalcon *pKernelFlcn, NvU32 offset) { @@ -735,59 +813,59 @@ static inline NvU32 gkflcnMaskDmemAddr_DISPATCH(struct OBJGPU *pGpu, struct Gene } static inline NvBool gkflcnConfigured_DISPATCH(struct GenericKernelFalcon *arg_this) { - return arg_this->__gkflcnConfigured__(arg_this); + return arg_this->__nvoc_vtable->__gkflcnConfigured__(arg_this); } static inline void gkflcnUnload_DISPATCH(struct GenericKernelFalcon *arg_this) { - arg_this->__gkflcnUnload__(arg_this); + arg_this->__nvoc_vtable->__gkflcnUnload__(arg_this); } static inline void gkflcnVprintf_DISPATCH(struct GenericKernelFalcon *arg_this, NvBool bReportStart, const char *fmt, va_list args) { - arg_this->__gkflcnVprintf__(arg_this, bReportStart, fmt, args); + arg_this->__nvoc_vtable->__gkflcnVprintf__(arg_this, bReportStart, fmt, args); } static inline NvU32 gkflcnPriRead_DISPATCH(struct GenericKernelFalcon *arg_this, NvU32 offset) { - return arg_this->__gkflcnPriRead__(arg_this, offset); + return arg_this->__nvoc_vtable->__gkflcnPriRead__(arg_this, offset); } static inline void gkflcnPriWrite_DISPATCH(struct GenericKernelFalcon *arg_this, NvU32 offset, NvU32 data) { - arg_this->__gkflcnPriWrite__(arg_this, offset, data); + arg_this->__nvoc_vtable->__gkflcnPriWrite__(arg_this, offset, data); } static inline void * gkflcnMapBufferDescriptor_DISPATCH(struct GenericKernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc) { - return arg_this->__gkflcnMapBufferDescriptor__(arg_this, pBufDesc); + return arg_this->__nvoc_vtable->__gkflcnMapBufferDescriptor__(arg_this, pBufDesc); } static inline void gkflcnUnmapBufferDescriptor_DISPATCH(struct GenericKernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc) { - arg_this->__gkflcnUnmapBufferDescriptor__(arg_this, pBufDesc); + arg_this->__nvoc_vtable->__gkflcnUnmapBufferDescriptor__(arg_this, pBufDesc); } static inline void gkflcnSyncBufferDescriptor_DISPATCH(struct GenericKernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { - arg_this->__gkflcnSyncBufferDescriptor__(arg_this, pBufDesc, offset, size); + arg_this->__nvoc_vtable->__gkflcnSyncBufferDescriptor__(arg_this, pBufDesc, offset, size); } static inline void gkflcnReadDmem_DISPATCH(struct GenericKernelFalcon *arg_this, NvU32 offset, NvU32 size, void *pBuf) { - arg_this->__gkflcnReadDmem__(arg_this, offset, size, pBuf); + arg_this->__nvoc_vtable->__gkflcnReadDmem__(arg_this, offset, size, pBuf); } static inline void gkflcnReadEmem_DISPATCH(struct GenericKernelFalcon *arg_this, NvU64 offset, NvU64 size, void *pBuf) { - arg_this->__gkflcnReadEmem__(arg_this, offset, size, pBuf); + arg_this->__nvoc_vtable->__gkflcnReadEmem__(arg_this, offset, size, pBuf); } static inline const NvU32 * gkflcnGetScratchOffsets_DISPATCH(struct GenericKernelFalcon *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { - return arg_this->__gkflcnGetScratchOffsets__(arg_this, scratchGroupId); + return arg_this->__nvoc_vtable->__gkflcnGetScratchOffsets__(arg_this, scratchGroupId); } static inline NvU32 gkflcnGetWFL0Offset_DISPATCH(struct GenericKernelFalcon *arg_this) { - return arg_this->__gkflcnGetWFL0Offset__(arg_this); + return arg_this->__nvoc_vtable->__gkflcnGetWFL0Offset__(arg_this); } static inline NvBool gkflcnClearInterrupt_DISPATCH(struct OBJGPU *pGpu, struct GenericKernelFalcon *pIntrService, IntrServiceClearInterruptArguments *pParams) { - return pIntrService->__gkflcnClearInterrupt__(pGpu, pIntrService, pParams); + return pIntrService->__nvoc_vtable->__gkflcnClearInterrupt__(pGpu, pIntrService, pParams); } static inline NvU32 gkflcnServiceInterrupt_DISPATCH(struct OBJGPU *pGpu, struct GenericKernelFalcon *pIntrService, IntrServiceServiceInterruptArguments *pParams) { - return pIntrService->__gkflcnServiceInterrupt__(pGpu, pIntrService, pParams); + return pIntrService->__nvoc_vtable->__gkflcnServiceInterrupt__(pGpu, pIntrService, pParams); } NV_STATUS gkflcnResetHw_IMPL(struct OBJGPU *pGpu, struct GenericKernelFalcon *pGenKernFlcn); diff --git a/src/nvidia/generated/g_kernel_fifo_nvoc.c b/src/nvidia/generated/g_kernel_fifo_nvoc.c index 281fb60bac..d023792f6f 100644 --- a/src/nvidia/generated/g_kernel_fifo_nvoc.c +++ b/src/nvidia/generated/g_kernel_fifo_nvoc.c @@ -66,78 +66,96 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelFifo = /*pExportInfo=*/ &__nvoc_export_info_KernelFifo }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_KernelFifo_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, ENGDESCRIPTOR engDesc); // this +NV_STATUS __nvoc_down_thunk_KernelFifo_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags); // this +NV_STATUS __nvoc_down_thunk_KernelFifo_engstateStateUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags); // this +NV_STATUS __nvoc_down_thunk_KernelFifo_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo); // this +void __nvoc_down_thunk_KernelFifo_engstateStateDestroy(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo); // this +NV_STATUS __nvoc_down_thunk_KernelFifo_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags); // this +NV_STATUS __nvoc_down_thunk_KernelFifo_engstateStatePreUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags); // this + // 7 down-thunk(s) defined to bridge methods in KernelFifo from superclasses // kfifoConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelFifo_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, ENGDESCRIPTOR engDesc) { +NV_STATUS __nvoc_down_thunk_KernelFifo_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, ENGDESCRIPTOR engDesc) { return kfifoConstructEngine(pGpu, (struct KernelFifo *)(((unsigned char *) pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), engDesc); } // kfifoStateLoad: virtual halified (singleton optimized) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_KernelFifo_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelFifo_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags) { return kfifoStateLoad(pGpu, (struct KernelFifo *)(((unsigned char *) pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), flags); } // kfifoStateUnload: virtual halified (singleton optimized) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_KernelFifo_engstateStateUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelFifo_engstateStateUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags) { return kfifoStateUnload(pGpu, (struct KernelFifo *)(((unsigned char *) pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), flags); } // kfifoStateInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelFifo_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo) { +NV_STATUS __nvoc_down_thunk_KernelFifo_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo) { return kfifoStateInitLocked(pGpu, (struct KernelFifo *)(((unsigned char *) pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset)); } // kfifoStateDestroy: virtual override (engstate) base (engstate) -static void __nvoc_down_thunk_KernelFifo_engstateStateDestroy(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo) { +void __nvoc_down_thunk_KernelFifo_engstateStateDestroy(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo) { kfifoStateDestroy(pGpu, (struct KernelFifo *)(((unsigned char *) pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset)); } // kfifoStatePostLoad: virtual halified (singleton optimized) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_KernelFifo_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelFifo_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags) { return kfifoStatePostLoad(pGpu, (struct KernelFifo *)(((unsigned char *) pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), flags); } // kfifoStatePreUnload: virtual halified (singleton optimized) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_KernelFifo_engstateStatePreUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelFifo_engstateStatePreUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags) { return kfifoStatePreUnload(pGpu, (struct KernelFifo *)(((unsigned char *) pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), flags); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_kfifoInitMissing(struct OBJGPU *pGpu, struct KernelFifo *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfifoStatePreInitLocked(struct OBJGPU *pGpu, struct KernelFifo *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfifoStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelFifo *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfifoStateInitUnlocked(struct OBJGPU *pGpu, struct KernelFifo *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfifoStatePreLoad(struct OBJGPU *pGpu, struct KernelFifo *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfifoStatePostUnload(struct OBJGPU *pGpu, struct KernelFifo *pEngstate, NvU32 arg3); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_kfifoIsPresent(struct OBJGPU *pGpu, struct KernelFifo *pEngstate); // this + // 7 up-thunk(s) defined to bridge methods in KernelFifo to superclasses // kfifoInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kfifoInitMissing(struct OBJGPU *pGpu, struct KernelFifo *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kfifoInitMissing(struct OBJGPU *pGpu, struct KernelFifo *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset)); } // kfifoStatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfifoStatePreInitLocked(struct OBJGPU *pGpu, struct KernelFifo *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfifoStatePreInitLocked(struct OBJGPU *pGpu, struct KernelFifo *pEngstate) { return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset)); } // kfifoStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfifoStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelFifo *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfifoStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelFifo *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset)); } // kfifoStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfifoStateInitUnlocked(struct OBJGPU *pGpu, struct KernelFifo *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfifoStateInitUnlocked(struct OBJGPU *pGpu, struct KernelFifo *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset)); } // kfifoStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfifoStatePreLoad(struct OBJGPU *pGpu, struct KernelFifo *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfifoStatePreLoad(struct OBJGPU *pGpu, struct KernelFifo *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), arg3); } // kfifoStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfifoStatePostUnload(struct OBJGPU *pGpu, struct KernelFifo *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kfifoStatePostUnload(struct OBJGPU *pGpu, struct KernelFifo *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), arg3); } // kfifoIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_kfifoIsPresent(struct OBJGPU *pGpu, struct KernelFifo *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_kfifoIsPresent(struct OBJGPU *pGpu, struct KernelFifo *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset)); } @@ -170,92 +188,92 @@ void __nvoc_init_dataField_KernelFifo(KernelFifo *pThis, RmHalspecOwner *pRmhals // Hal field -- bUseChidHeap if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bUseChidHeap = ((NvBool)(0 == 0)); + pThis->bUseChidHeap = NV_TRUE; } // Hal field -- bUsePerRunlistChram if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ { - pThis->bUsePerRunlistChram = ((NvBool)(0 == 0)); + pThis->bUsePerRunlistChram = NV_TRUE; } // default else { - pThis->bUsePerRunlistChram = ((NvBool)(0 != 0)); + pThis->bUsePerRunlistChram = NV_FALSE; } // Hal field -- bIsPerRunlistChramSupportedInHw if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bIsPerRunlistChramSupportedInHw = ((NvBool)(0 == 0)); + pThis->bIsPerRunlistChramSupportedInHw = NV_TRUE; } // default else { - pThis->bIsPerRunlistChramSupportedInHw = ((NvBool)(0 != 0)); + pThis->bIsPerRunlistChramSupportedInHw = NV_FALSE; } // Hal field -- bHostEngineExpansion if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bHostEngineExpansion = ((NvBool)(0 == 0)); + pThis->bHostEngineExpansion = NV_TRUE; } // default else { - pThis->bHostEngineExpansion = ((NvBool)(0 != 0)); + pThis->bHostEngineExpansion = NV_FALSE; } // Hal field -- bHostHasLbOverflow // default { - pThis->bHostHasLbOverflow = ((NvBool)(0 != 0)); + pThis->bHostHasLbOverflow = NV_FALSE; } // Hal field -- bSubcontextSupported if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bSubcontextSupported = ((NvBool)(0 == 0)); + pThis->bSubcontextSupported = NV_TRUE; } // Hal field -- bMixedInstmemApertureDefAllowed if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bMixedInstmemApertureDefAllowed = ((NvBool)(0 == 0)); + pThis->bMixedInstmemApertureDefAllowed = NV_TRUE; } // Hal field -- bIsZombieSubctxWarEnabled if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bIsZombieSubctxWarEnabled = ((NvBool)(0 == 0)); + pThis->bIsZombieSubctxWarEnabled = NV_TRUE; } // Hal field -- bIsSchedSupported if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bIsSchedSupported = ((NvBool)(0 == 0)); + pThis->bIsSchedSupported = NV_TRUE; } // Hal field -- bGuestGenenratesWorkSubmitToken if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ { - pThis->bGuestGenenratesWorkSubmitToken = ((NvBool)(0 == 0)); + pThis->bGuestGenenratesWorkSubmitToken = NV_TRUE; } // default else { - pThis->bGuestGenenratesWorkSubmitToken = ((NvBool)(0 != 0)); + pThis->bGuestGenenratesWorkSubmitToken = NV_FALSE; } // Hal field -- bIsPbdmaMmuEngineIdContiguous if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ { - pThis->bIsPbdmaMmuEngineIdContiguous = ((NvBool)(0 != 0)); + pThis->bIsPbdmaMmuEngineIdContiguous = NV_FALSE; } // default else { - pThis->bIsPbdmaMmuEngineIdContiguous = ((NvBool)(0 == 0)); + pThis->bIsPbdmaMmuEngineIdContiguous = NV_TRUE; } pThis->pBar1VF = ((void *)0); @@ -292,34 +310,6 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // kfifoConstructEngine -- virtual override (engstate) base (engstate) - pThis->__kfifoConstructEngine__ = &kfifoConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelFifo_engstateConstructEngine; - - // kfifoStateLoad -- virtual halified (singleton optimized) override (engstate) base (engstate) body - pThis->__kfifoStateLoad__ = &kfifoStateLoad_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelFifo_engstateStateLoad; - - // kfifoStateUnload -- virtual halified (singleton optimized) override (engstate) base (engstate) body - pThis->__kfifoStateUnload__ = &kfifoStateUnload_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelFifo_engstateStateUnload; - - // kfifoStateInitLocked -- virtual override (engstate) base (engstate) - pThis->__kfifoStateInitLocked__ = &kfifoStateInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelFifo_engstateStateInitLocked; - - // kfifoStateDestroy -- virtual override (engstate) base (engstate) - pThis->__kfifoStateDestroy__ = &kfifoStateDestroy_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelFifo_engstateStateDestroy; - - // kfifoStatePostLoad -- virtual halified (singleton optimized) override (engstate) base (engstate) body - pThis->__kfifoStatePostLoad__ = &kfifoStatePostLoad_GM107; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_KernelFifo_engstateStatePostLoad; - - // kfifoStatePreUnload -- virtual halified (singleton optimized) override (engstate) base (engstate) body - pThis->__kfifoStatePreUnload__ = &kfifoStatePreUnload_GM107; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_down_thunk_KernelFifo_engstateStatePreUnload; - // kfifoCheckChannelAllocAddrSpaces -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { @@ -372,18 +362,18 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner pThis->__kfifoEngineInfoXlate__ = &kfifoEngineInfoXlate_GA100; } - // kfifoGenerateWorkSubmitToken -- halified (3 hals) + // kfifoGenerateWorkSubmitTokenHal -- halified (3 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ { - pThis->__kfifoGenerateWorkSubmitToken__ = &kfifoGenerateWorkSubmitToken_GB100; + pThis->__kfifoGenerateWorkSubmitTokenHal__ = &kfifoGenerateWorkSubmitTokenHal_GB100; } else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { - pThis->__kfifoGenerateWorkSubmitToken__ = &kfifoGenerateWorkSubmitToken_TU102; + pThis->__kfifoGenerateWorkSubmitTokenHal__ = &kfifoGenerateWorkSubmitTokenHal_TU102; } else { - pThis->__kfifoGenerateWorkSubmitToken__ = &kfifoGenerateWorkSubmitToken_GA100; + pThis->__kfifoGenerateWorkSubmitTokenHal__ = &kfifoGenerateWorkSubmitTokenHal_GA100; } // kfifoUpdateUsermodeDoorbell -- halified (2 hals) @@ -520,7 +510,7 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner } else { - pThis->__kfifoPrintPbdmaId__ = &kfifoPrintPbdmaId_GA100; + pThis->__kfifoPrintPbdmaId__ = &kfifoPrintPbdmaId_95626c; } // kfifoPrintInternalEngine -- halified (5 hals) body @@ -598,34 +588,49 @@ static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner { pThis->__kfifoGetClientIdStringCheck__ = &kfifoGetClientIdStringCheck_GA100; } - - // kfifoInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__kfifoInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kfifoInitMissing; - - // kfifoStatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__kfifoStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kfifoStatePreInitLocked; - - // kfifoStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kfifoStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kfifoStatePreInitUnlocked; - - // kfifoStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kfifoStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kfifoStateInitUnlocked; - - // kfifoStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__kfifoStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kfifoStatePreLoad; - - // kfifoStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__kfifoStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kfifoStatePostUnload; - - // kfifoIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__kfifoIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kfifoIsPresent; -} // End __nvoc_init_funcTable_KernelFifo_1 with approximately 77 basic block(s). +} // End __nvoc_init_funcTable_KernelFifo_1 with approximately 56 basic block(s). // Initialize vtable(s) for 38 virtual method(s). void __nvoc_init_funcTable_KernelFifo(KernelFifo *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 38 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelFifo vtable = { + .__kfifoConstructEngine__ = &kfifoConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelFifo_engstateConstructEngine, // virtual + .__kfifoStateLoad__ = &kfifoStateLoad_IMPL, // virtual halified (singleton optimized) override (engstate) base (engstate) body + .OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelFifo_engstateStateLoad, // virtual + .__kfifoStateUnload__ = &kfifoStateUnload_IMPL, // virtual halified (singleton optimized) override (engstate) base (engstate) body + .OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelFifo_engstateStateUnload, // virtual + .__kfifoStateInitLocked__ = &kfifoStateInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelFifo_engstateStateInitLocked, // virtual + .__kfifoStateDestroy__ = &kfifoStateDestroy_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelFifo_engstateStateDestroy, // virtual + .__kfifoStatePostLoad__ = &kfifoStatePostLoad_GM107, // virtual halified (singleton optimized) override (engstate) base (engstate) body + .OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_KernelFifo_engstateStatePostLoad, // virtual + .__kfifoStatePreUnload__ = &kfifoStatePreUnload_GM107, // virtual halified (singleton optimized) override (engstate) base (engstate) body + .OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_down_thunk_KernelFifo_engstateStatePreUnload, // virtual + .__kfifoInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kfifoInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__kfifoStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kfifoStatePreInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__kfifoStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kfifoStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__kfifoStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kfifoStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__kfifoStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kfifoStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__kfifoStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kfifoStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__kfifoIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kfifoIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_vtable = &vtable; // (kfifo) this + + // Initialize vtable(s) with 24 per-object function pointer(s). __nvoc_init_funcTable_KernelFifo_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_fifo_nvoc.h b/src/nvidia/generated/g_kernel_fifo_nvoc.h index 91afdb7dfa..dd6bf29b5a 100644 --- a/src/nvidia/generated/g_kernel_fifo_nvoc.h +++ b/src/nvidia/generated/g_kernel_fifo_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -98,19 +98,6 @@ typedef struct KernelChannelGroup KernelChannelGroup; -struct KernelSchedMgr; - -#ifndef __NVOC_CLASS_KernelSchedMgr_TYPEDEF__ -#define __NVOC_CLASS_KernelSchedMgr_TYPEDEF__ -typedef struct KernelSchedMgr KernelSchedMgr; -#endif /* __NVOC_CLASS_KernelSchedMgr_TYPEDEF__ */ - -#ifndef __nvoc_class_id_KernelSchedMgr -#define __nvoc_class_id_KernelSchedMgr 0xea0970 -#endif /* __nvoc_class_id_KernelSchedMgr */ - - - struct HOST_VGPU_DEVICE; // Pre-Ampere runlist ID to pass to kfifoGetChidMgr @@ -406,10 +393,15 @@ MAKE_LIST(FifoSchedulingHandlerEntryList, FifoSchedulingHandlerEntry); #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelFifo; + + struct KernelFifo { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelFifo *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -419,20 +411,13 @@ struct KernelFifo { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct KernelFifo *__nvoc_pbase_KernelFifo; // kfifo - // Vtable with 38 per-object function pointers - NV_STATUS (*__kfifoConstructEngine__)(struct OBJGPU *, struct KernelFifo * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) - NV_STATUS (*__kfifoStateLoad__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body - NV_STATUS (*__kfifoStateUnload__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body - NV_STATUS (*__kfifoStateInitLocked__)(struct OBJGPU *, struct KernelFifo * /*this*/); // virtual override (engstate) base (engstate) - void (*__kfifoStateDestroy__)(struct OBJGPU *, struct KernelFifo * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__kfifoStatePostLoad__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body - NV_STATUS (*__kfifoStatePreUnload__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + // Vtable with 24 per-object function pointers NV_STATUS (*__kfifoCheckChannelAllocAddrSpaces__)(struct KernelFifo * /*this*/, NV_ADDRESS_SPACE, NV_ADDRESS_SPACE, NV_ADDRESS_SPACE); // halified (2 hals) body NV_STATUS (*__kfifoConstructUsermodeMemdescs__)(struct OBJGPU *, struct KernelFifo * /*this*/); // halified (2 hals) body NvU32 (*__kfifoChannelGroupGetLocalMaxSubcontext__)(struct OBJGPU *, struct KernelFifo * /*this*/, struct KernelChannelGroup *, NvBool); // halified (2 hals) body void (*__kfifoGetCtxBufferMapFlags__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32, NvU32 *); // halified (2 hals) body NV_STATUS (*__kfifoEngineInfoXlate__)(struct OBJGPU *, struct KernelFifo * /*this*/, ENGINE_INFO_TYPE, NvU32, ENGINE_INFO_TYPE, NvU32 *); // halified (2 hals) body - NV_STATUS (*__kfifoGenerateWorkSubmitToken__)(struct OBJGPU *, struct KernelFifo * /*this*/, struct KernelChannel *, NvU32 *, NvBool); // halified (3 hals) + NV_STATUS (*__kfifoGenerateWorkSubmitTokenHal__)(struct OBJGPU *, struct KernelFifo * /*this*/, struct KernelChannel *, NvU32 *, NvBool); // halified (3 hals) NV_STATUS (*__kfifoUpdateUsermodeDoorbell__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32, NvU32); // halified (2 hals) NV_STATUS (*__kfifoReservePbdmaFaultIds__)(struct OBJGPU *, struct KernelFifo * /*this*/, FIFO_ENGINE_LIST *, NvU32); // halified (2 hals) body NvU32 (*__kfifoRunlistGetBaseShift__)(struct KernelFifo * /*this*/); // halified (3 hals) body @@ -451,16 +436,8 @@ struct KernelFifo { const char * (*__kfifoGetClientIdStringCommon__)(struct OBJGPU *, struct KernelFifo * /*this*/, FIFO_MMU_EXCEPTION_DATA *); // halified (2 hals) body const char * (*__kfifoGetClientIdString__)(struct OBJGPU *, struct KernelFifo * /*this*/, FIFO_MMU_EXCEPTION_DATA *); // halified (5 hals) body const char * (*__kfifoGetClientIdStringCheck__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32); // halified (2 hals) body - void (*__kfifoInitMissing__)(struct OBJGPU *, struct KernelFifo * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kfifoStatePreInitLocked__)(struct OBJGPU *, struct KernelFifo * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kfifoStatePreInitUnlocked__)(struct OBJGPU *, struct KernelFifo * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kfifoStateInitUnlocked__)(struct OBJGPU *, struct KernelFifo * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kfifoStatePreLoad__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kfifoStatePostUnload__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NvBool (*__kfifoIsPresent__)(struct OBJGPU *, struct KernelFifo * /*this*/); // virtual inherited (engstate) base (engstate) // Data members - struct KernelSchedMgr *pKernelSchedMgr; CHID_MGR **ppChidMgr; NvU32 numChidMgrs; union CHID_MGR_VALID_BIT_VECTOR chidMgrValid; @@ -473,7 +450,7 @@ struct KernelFifo { NvU32 maxCeSecureChannels; NvBool bUseChidHeap; NvBool bUsePerRunlistChram; - NvBool bDisableChidIsolation; + NvBool bDisablePreAllocatedUserD; NvBool bIsPerRunlistChramSupportedInHw; NvBool bHostEngineExpansion; NvBool bHostHasLbOverflow; @@ -500,6 +477,27 @@ struct KernelFifo { MEMORY_DESCRIPTOR ***pppRunlistBufMemDesc; }; + +// Metadata including vtable with 14 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelFifo { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + + NV_STATUS (*__kfifoConstructEngine__)(struct OBJGPU *, struct KernelFifo * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kfifoStateLoad__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kfifoStateUnload__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kfifoStateInitLocked__)(struct OBJGPU *, struct KernelFifo * /*this*/); // virtual override (engstate) base (engstate) + void (*__kfifoStateDestroy__)(struct OBJGPU *, struct KernelFifo * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kfifoStatePostLoad__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + NV_STATUS (*__kfifoStatePreUnload__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body + void (*__kfifoInitMissing__)(struct OBJGPU *, struct KernelFifo * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfifoStatePreInitLocked__)(struct OBJGPU *, struct KernelFifo * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfifoStatePreInitUnlocked__)(struct OBJGPU *, struct KernelFifo * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfifoStateInitUnlocked__)(struct OBJGPU *, struct KernelFifo * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfifoStatePreLoad__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kfifoStatePostUnload__)(struct OBJGPU *, struct KernelFifo * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__kfifoIsPresent__)(struct OBJGPU *, struct KernelFifo * /*this*/); // virtual inherited (engstate) base (engstate) +}; + #ifndef __NVOC_CLASS_KernelFifo_TYPEDEF__ #define __NVOC_CLASS_KernelFifo_TYPEDEF__ typedef struct KernelFifo KernelFifo; @@ -534,22 +532,22 @@ NV_STATUS __nvoc_objCreate_KernelFifo(KernelFifo**, Dynamic*, NvU32); // Wrapper macros -#define kfifoConstructEngine_FNPTR(pKernelFifo) pKernelFifo->__kfifoConstructEngine__ +#define kfifoConstructEngine_FNPTR(pKernelFifo) pKernelFifo->__nvoc_vtable->__kfifoConstructEngine__ #define kfifoConstructEngine(pGpu, pKernelFifo, engDesc) kfifoConstructEngine_DISPATCH(pGpu, pKernelFifo, engDesc) -#define kfifoStateLoad_FNPTR(pKernelFifo) pKernelFifo->__kfifoStateLoad__ +#define kfifoStateLoad_FNPTR(pKernelFifo) pKernelFifo->__nvoc_vtable->__kfifoStateLoad__ #define kfifoStateLoad(pGpu, pKernelFifo, flags) kfifoStateLoad_DISPATCH(pGpu, pKernelFifo, flags) #define kfifoStateLoad_HAL(pGpu, pKernelFifo, flags) kfifoStateLoad_DISPATCH(pGpu, pKernelFifo, flags) -#define kfifoStateUnload_FNPTR(pKernelFifo) pKernelFifo->__kfifoStateUnload__ +#define kfifoStateUnload_FNPTR(pKernelFifo) pKernelFifo->__nvoc_vtable->__kfifoStateUnload__ #define kfifoStateUnload(pGpu, pKernelFifo, flags) kfifoStateUnload_DISPATCH(pGpu, pKernelFifo, flags) #define kfifoStateUnload_HAL(pGpu, pKernelFifo, flags) kfifoStateUnload_DISPATCH(pGpu, pKernelFifo, flags) -#define kfifoStateInitLocked_FNPTR(pKernelFifo) pKernelFifo->__kfifoStateInitLocked__ +#define kfifoStateInitLocked_FNPTR(pKernelFifo) pKernelFifo->__nvoc_vtable->__kfifoStateInitLocked__ #define kfifoStateInitLocked(pGpu, pKernelFifo) kfifoStateInitLocked_DISPATCH(pGpu, pKernelFifo) -#define kfifoStateDestroy_FNPTR(pKernelFifo) pKernelFifo->__kfifoStateDestroy__ +#define kfifoStateDestroy_FNPTR(pKernelFifo) pKernelFifo->__nvoc_vtable->__kfifoStateDestroy__ #define kfifoStateDestroy(pGpu, pKernelFifo) kfifoStateDestroy_DISPATCH(pGpu, pKernelFifo) -#define kfifoStatePostLoad_FNPTR(pKernelFifo) pKernelFifo->__kfifoStatePostLoad__ +#define kfifoStatePostLoad_FNPTR(pKernelFifo) pKernelFifo->__nvoc_vtable->__kfifoStatePostLoad__ #define kfifoStatePostLoad(pGpu, pKernelFifo, flags) kfifoStatePostLoad_DISPATCH(pGpu, pKernelFifo, flags) #define kfifoStatePostLoad_HAL(pGpu, pKernelFifo, flags) kfifoStatePostLoad_DISPATCH(pGpu, pKernelFifo, flags) -#define kfifoStatePreUnload_FNPTR(pKernelFifo) pKernelFifo->__kfifoStatePreUnload__ +#define kfifoStatePreUnload_FNPTR(pKernelFifo) pKernelFifo->__nvoc_vtable->__kfifoStatePreUnload__ #define kfifoStatePreUnload(pGpu, pKernelFifo, flags) kfifoStatePreUnload_DISPATCH(pGpu, pKernelFifo, flags) #define kfifoStatePreUnload_HAL(pGpu, pKernelFifo, flags) kfifoStatePreUnload_DISPATCH(pGpu, pKernelFifo, flags) #define kfifoCheckChannelAllocAddrSpaces_FNPTR(pKernelFifo) pKernelFifo->__kfifoCheckChannelAllocAddrSpaces__ @@ -567,9 +565,9 @@ NV_STATUS __nvoc_objCreate_KernelFifo(KernelFifo**, Dynamic*, NvU32); #define kfifoEngineInfoXlate_FNPTR(pKernelFifo) pKernelFifo->__kfifoEngineInfoXlate__ #define kfifoEngineInfoXlate(pGpu, pKernelFifo, inType, inVal, outType, pOutVal) kfifoEngineInfoXlate_DISPATCH(pGpu, pKernelFifo, inType, inVal, outType, pOutVal) #define kfifoEngineInfoXlate_HAL(pGpu, pKernelFifo, inType, inVal, outType, pOutVal) kfifoEngineInfoXlate_DISPATCH(pGpu, pKernelFifo, inType, inVal, outType, pOutVal) -#define kfifoGenerateWorkSubmitToken_FNPTR(arg_this) arg_this->__kfifoGenerateWorkSubmitToken__ -#define kfifoGenerateWorkSubmitToken(pGpu, arg_this, arg3, pGeneratedToken, bUsedForHost) kfifoGenerateWorkSubmitToken_DISPATCH(pGpu, arg_this, arg3, pGeneratedToken, bUsedForHost) -#define kfifoGenerateWorkSubmitToken_HAL(pGpu, arg_this, arg3, pGeneratedToken, bUsedForHost) kfifoGenerateWorkSubmitToken_DISPATCH(pGpu, arg_this, arg3, pGeneratedToken, bUsedForHost) +#define kfifoGenerateWorkSubmitTokenHal_FNPTR(arg_this) arg_this->__kfifoGenerateWorkSubmitTokenHal__ +#define kfifoGenerateWorkSubmitTokenHal(pGpu, arg_this, arg3, pGeneratedToken, bUsedForHost) kfifoGenerateWorkSubmitTokenHal_DISPATCH(pGpu, arg_this, arg3, pGeneratedToken, bUsedForHost) +#define kfifoGenerateWorkSubmitTokenHal_HAL(pGpu, arg_this, arg3, pGeneratedToken, bUsedForHost) kfifoGenerateWorkSubmitTokenHal_DISPATCH(pGpu, arg_this, arg3, pGeneratedToken, bUsedForHost) #define kfifoUpdateUsermodeDoorbell_FNPTR(arg_this) arg_this->__kfifoUpdateUsermodeDoorbell__ #define kfifoUpdateUsermodeDoorbell(arg1, arg_this, workSubmitToken, runlisId) kfifoUpdateUsermodeDoorbell_DISPATCH(arg1, arg_this, workSubmitToken, runlisId) #define kfifoUpdateUsermodeDoorbell_HAL(arg1, arg_this, workSubmitToken, runlisId) kfifoUpdateUsermodeDoorbell_DISPATCH(arg1, arg_this, workSubmitToken, runlisId) @@ -624,48 +622,48 @@ NV_STATUS __nvoc_objCreate_KernelFifo(KernelFifo**, Dynamic*, NvU32); #define kfifoGetClientIdStringCheck_FNPTR(pKernelFifo) pKernelFifo->__kfifoGetClientIdStringCheck__ #define kfifoGetClientIdStringCheck(pGpu, pKernelFifo, arg3) kfifoGetClientIdStringCheck_DISPATCH(pGpu, pKernelFifo, arg3) #define kfifoGetClientIdStringCheck_HAL(pGpu, pKernelFifo, arg3) kfifoGetClientIdStringCheck_DISPATCH(pGpu, pKernelFifo, arg3) -#define kfifoInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define kfifoInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define kfifoInitMissing(pGpu, pEngstate) kfifoInitMissing_DISPATCH(pGpu, pEngstate) -#define kfifoStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define kfifoStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define kfifoStatePreInitLocked(pGpu, pEngstate) kfifoStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define kfifoStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define kfifoStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define kfifoStatePreInitUnlocked(pGpu, pEngstate) kfifoStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kfifoStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kfifoStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define kfifoStateInitUnlocked(pGpu, pEngstate) kfifoStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kfifoStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kfifoStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define kfifoStatePreLoad(pGpu, pEngstate, arg3) kfifoStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kfifoStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kfifoStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define kfifoStatePostUnload(pGpu, pEngstate, arg3) kfifoStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kfifoIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define kfifoIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define kfifoIsPresent(pGpu, pEngstate) kfifoIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS kfifoConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, ENGDESCRIPTOR engDesc) { - return pKernelFifo->__kfifoConstructEngine__(pGpu, pKernelFifo, engDesc); + return pKernelFifo->__nvoc_vtable->__kfifoConstructEngine__(pGpu, pKernelFifo, engDesc); } static inline NV_STATUS kfifoStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 flags) { - return pKernelFifo->__kfifoStateLoad__(pGpu, pKernelFifo, flags); + return pKernelFifo->__nvoc_vtable->__kfifoStateLoad__(pGpu, pKernelFifo, flags); } static inline NV_STATUS kfifoStateUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 flags) { - return pKernelFifo->__kfifoStateUnload__(pGpu, pKernelFifo, flags); + return pKernelFifo->__nvoc_vtable->__kfifoStateUnload__(pGpu, pKernelFifo, flags); } static inline NV_STATUS kfifoStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo) { - return pKernelFifo->__kfifoStateInitLocked__(pGpu, pKernelFifo); + return pKernelFifo->__nvoc_vtable->__kfifoStateInitLocked__(pGpu, pKernelFifo); } static inline void kfifoStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo) { - pKernelFifo->__kfifoStateDestroy__(pGpu, pKernelFifo); + pKernelFifo->__nvoc_vtable->__kfifoStateDestroy__(pGpu, pKernelFifo); } static inline NV_STATUS kfifoStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 flags) { - return pKernelFifo->__kfifoStatePostLoad__(pGpu, pKernelFifo, flags); + return pKernelFifo->__nvoc_vtable->__kfifoStatePostLoad__(pGpu, pKernelFifo, flags); } static inline NV_STATUS kfifoStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 flags) { - return pKernelFifo->__kfifoStatePreUnload__(pGpu, pKernelFifo, flags); + return pKernelFifo->__nvoc_vtable->__kfifoStatePreUnload__(pGpu, pKernelFifo, flags); } static inline NV_STATUS kfifoCheckChannelAllocAddrSpaces_DISPATCH(struct KernelFifo *pKernelFifo, NV_ADDRESS_SPACE userdAddrSpace, NV_ADDRESS_SPACE pushBuffAddrSpace, NV_ADDRESS_SPACE gpFifoAddrSpace) { @@ -688,8 +686,8 @@ static inline NV_STATUS kfifoEngineInfoXlate_DISPATCH(struct OBJGPU *pGpu, struc return pKernelFifo->__kfifoEngineInfoXlate__(pGpu, pKernelFifo, inType, inVal, outType, pOutVal); } -static inline NV_STATUS kfifoGenerateWorkSubmitToken_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *arg_this, struct KernelChannel *arg3, NvU32 *pGeneratedToken, NvBool bUsedForHost) { - return arg_this->__kfifoGenerateWorkSubmitToken__(pGpu, arg_this, arg3, pGeneratedToken, bUsedForHost); +static inline NV_STATUS kfifoGenerateWorkSubmitTokenHal_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *arg_this, struct KernelChannel *arg3, NvU32 *pGeneratedToken, NvBool bUsedForHost) { + return arg_this->__kfifoGenerateWorkSubmitTokenHal__(pGpu, arg_this, arg3, pGeneratedToken, bUsedForHost); } static inline NV_STATUS kfifoUpdateUsermodeDoorbell_DISPATCH(struct OBJGPU *arg1, struct KernelFifo *arg_this, NvU32 workSubmitToken, NvU32 runlisId) { @@ -765,31 +763,31 @@ static inline const char * kfifoGetClientIdStringCheck_DISPATCH(struct OBJGPU *p } static inline void kfifoInitMissing_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pEngstate) { - pEngstate->__kfifoInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kfifoInitMissing__(pGpu, pEngstate); } static inline NV_STATUS kfifoStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pEngstate) { - return pEngstate->__kfifoStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kfifoStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS kfifoStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pEngstate) { - return pEngstate->__kfifoStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kfifoStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kfifoStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pEngstate) { - return pEngstate->__kfifoStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kfifoStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kfifoStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pEngstate, NvU32 arg3) { - return pEngstate->__kfifoStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kfifoStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kfifoStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pEngstate, NvU32 arg3) { - return pEngstate->__kfifoStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kfifoStatePostUnload__(pGpu, pEngstate, arg3); } static inline NvBool kfifoIsPresent_DISPATCH(struct OBJGPU *pGpu, struct KernelFifo *pEngstate) { - return pEngstate->__kfifoIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kfifoIsPresent__(pGpu, pEngstate); } NV_STATUS kfifoConstructHal_GM107(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo); @@ -1194,8 +1192,8 @@ static inline NV_STATUS kfifoUpdateInternalDoorbellForUsermode(struct OBJGPU *ar #define kfifoUpdateInternalDoorbellForUsermode_HAL(arg1, arg2, workSubmitToken, runlisId) kfifoUpdateInternalDoorbellForUsermode(arg1, arg2, workSubmitToken, runlisId) -static inline NvBool kfifoIsLiteModeEnabled_491d52(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo) { - return ((NvBool)(0 != 0)); +static inline NvBool kfifoIsLiteModeEnabled_3dd2c9(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo) { + return NV_FALSE; } @@ -1205,7 +1203,7 @@ static inline NvBool kfifoIsLiteModeEnabled(struct OBJGPU *pGpu, struct KernelFi return NV_FALSE; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoIsLiteModeEnabled(pGpu, pKernelFifo) kfifoIsLiteModeEnabled_491d52(pGpu, pKernelFifo) +#define kfifoIsLiteModeEnabled(pGpu, pKernelFifo) kfifoIsLiteModeEnabled_3dd2c9(pGpu, pKernelFifo) #endif //__nvoc_kernel_fifo_h_disabled #define kfifoIsLiteModeEnabled_HAL(pGpu, pKernelFifo) kfifoIsLiteModeEnabled(pGpu, pKernelFifo) @@ -1280,8 +1278,8 @@ static inline NV_STATUS kfifoGetEnginePartnerList(struct OBJGPU *pGpu, struct Ke #define kfifoGetEnginePartnerList_HAL(pGpu, pKernelFifo, pParams) kfifoGetEnginePartnerList(pGpu, pKernelFifo, pParams) -static inline NvBool kfifoRunlistIsTsgHeaderSupported_cbe027(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3) { - return ((NvBool)(0 == 0)); +static inline NvBool kfifoRunlistIsTsgHeaderSupported_88bc07(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3) { + return NV_TRUE; } @@ -1291,7 +1289,7 @@ static inline NvBool kfifoRunlistIsTsgHeaderSupported(struct OBJGPU *pGpu, struc return NV_FALSE; } #else //__nvoc_kernel_fifo_h_disabled -#define kfifoRunlistIsTsgHeaderSupported(pGpu, pKernelFifo, arg3) kfifoRunlistIsTsgHeaderSupported_cbe027(pGpu, pKernelFifo, arg3) +#define kfifoRunlistIsTsgHeaderSupported(pGpu, pKernelFifo, arg3) kfifoRunlistIsTsgHeaderSupported_88bc07(pGpu, pKernelFifo, arg3) #endif //__nvoc_kernel_fifo_h_disabled #define kfifoRunlistIsTsgHeaderSupported_HAL(pGpu, pKernelFifo, arg3) kfifoRunlistIsTsgHeaderSupported(pGpu, pKernelFifo, arg3) @@ -1544,11 +1542,11 @@ NV_STATUS kfifoEngineInfoXlate_GV100(struct OBJGPU *pGpu, struct KernelFifo *pKe NV_STATUS kfifoEngineInfoXlate_GA100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, ENGINE_INFO_TYPE inType, NvU32 inVal, ENGINE_INFO_TYPE outType, NvU32 *pOutVal); -NV_STATUS kfifoGenerateWorkSubmitToken_TU102(struct OBJGPU *pGpu, struct KernelFifo *arg2, struct KernelChannel *arg3, NvU32 *pGeneratedToken, NvBool bUsedForHost); +NV_STATUS kfifoGenerateWorkSubmitTokenHal_TU102(struct OBJGPU *pGpu, struct KernelFifo *arg2, struct KernelChannel *arg3, NvU32 *pGeneratedToken, NvBool bUsedForHost); -NV_STATUS kfifoGenerateWorkSubmitToken_GA100(struct OBJGPU *pGpu, struct KernelFifo *arg2, struct KernelChannel *arg3, NvU32 *pGeneratedToken, NvBool bUsedForHost); +NV_STATUS kfifoGenerateWorkSubmitTokenHal_GA100(struct OBJGPU *pGpu, struct KernelFifo *arg2, struct KernelChannel *arg3, NvU32 *pGeneratedToken, NvBool bUsedForHost); -NV_STATUS kfifoGenerateWorkSubmitToken_GB100(struct OBJGPU *pGpu, struct KernelFifo *arg2, struct KernelChannel *arg3, NvU32 *pGeneratedToken, NvBool bUsedForHost); +NV_STATUS kfifoGenerateWorkSubmitTokenHal_GB100(struct OBJGPU *pGpu, struct KernelFifo *arg2, struct KernelChannel *arg3, NvU32 *pGeneratedToken, NvBool bUsedForHost); NV_STATUS kfifoUpdateUsermodeDoorbell_TU102(struct OBJGPU *arg1, struct KernelFifo *arg2, NvU32 workSubmitToken, NvU32 runlisId); @@ -1623,7 +1621,9 @@ NvU32 kfifoGetNumPBDMAs_GA100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFif const char *kfifoPrintPbdmaId_TU102(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 pbdmaId); -const char *kfifoPrintPbdmaId_GA100(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 pbdmaId); +static inline const char *kfifoPrintPbdmaId_95626c(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 pbdmaId) { + NV_ASSERT_OR_RETURN_PRECOMP(0, "UNKNOWN"); +} const char *kfifoPrintInternalEngine_TU102(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 arg3); @@ -1721,8 +1721,8 @@ static inline NvBool kfifoIsSchedSupported(struct KernelFifo *pKernelFifo) { return pKernelFifo->bIsSchedSupported; } -static inline struct KernelSchedMgr *kfifoGetKernelSchedMgr(struct KernelFifo *pKernelFifo) { - return pKernelFifo->pKernelSchedMgr; +static inline NvBool kfifoIsPreAllocatedUserDEnabled(struct KernelFifo *pKernelFifo) { + return !pKernelFifo->bDisablePreAllocatedUserD; } static inline MEMORY_DESCRIPTOR *kfifoGetDummyPageMemDesc(struct KernelFifo *pKernelFifo) { @@ -2214,6 +2214,28 @@ static inline NV_STATUS kfifoGetEngineTypeFromPbdmaFaultId(struct OBJGPU *pGpu, #define kfifoGetEngineTypeFromPbdmaFaultId(pGpu, pKernelFifo, arg3, arg4) kfifoGetEngineTypeFromPbdmaFaultId_IMPL(pGpu, pKernelFifo, arg3, arg4) #endif //__nvoc_kernel_fifo_h_disabled +const char *kfifoPrintFaultingPbdmaEngineName_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 pbdmaFaultId); + +#ifdef __nvoc_kernel_fifo_h_disabled +static inline const char *kfifoPrintFaultingPbdmaEngineName(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, NvU32 pbdmaFaultId) { + NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); + return NULL; +} +#else //__nvoc_kernel_fifo_h_disabled +#define kfifoPrintFaultingPbdmaEngineName(pGpu, pKernelFifo, pbdmaFaultId) kfifoPrintFaultingPbdmaEngineName_IMPL(pGpu, pKernelFifo, pbdmaFaultId) +#endif //__nvoc_kernel_fifo_h_disabled + +NV_STATUS kfifoGenerateWorkSubmitToken_IMPL(struct OBJGPU *pGpu, struct KernelFifo *arg2, struct KernelChannel *arg3, NvU32 *pGeneratedToken, NvBool bUsedForHost); + +#ifdef __nvoc_kernel_fifo_h_disabled +static inline NV_STATUS kfifoGenerateWorkSubmitToken(struct OBJGPU *pGpu, struct KernelFifo *arg2, struct KernelChannel *arg3, NvU32 *pGeneratedToken, NvBool bUsedForHost) { + NV_ASSERT_FAILED_PRECOMP("KernelFifo was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_kernel_fifo_h_disabled +#define kfifoGenerateWorkSubmitToken(pGpu, arg2, arg3, pGeneratedToken, bUsedForHost) kfifoGenerateWorkSubmitToken_IMPL(pGpu, arg2, arg3, pGeneratedToken, bUsedForHost) +#endif //__nvoc_kernel_fifo_h_disabled + NV_STATUS kfifoChannelGroupSetTimeslice_IMPL(struct OBJGPU *pGpu, struct KernelFifo *pKernelFifo, struct KernelChannelGroup *pKernelChannelGroup, NvU64 timesliceUs, NvBool bSkipSubmit); #ifdef __nvoc_kernel_fifo_h_disabled diff --git a/src/nvidia/generated/g_kernel_graphics_context_nvoc.c b/src/nvidia/generated/g_kernel_graphics_context_nvoc.c index 7038454b1f..1ddaa9b4f1 100644 --- a/src/nvidia/generated/g_kernel_graphics_context_nvoc.c +++ b/src/nvidia/generated/g_kernel_graphics_context_nvoc.c @@ -162,133 +162,201 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelGr }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NvBool __nvoc_down_thunk_KernelGraphicsContext_resCanCopy(struct RsResource *arg_this); // this +NvHandle __nvoc_down_thunk_KernelGraphicsContext_gpuresGetInternalObjectHandle(struct GpuResource *arg_this); // this + // 2 down-thunk(s) defined to bridge methods in KernelGraphicsContext from superclasses // kgrctxCanCopy: inline virtual override (res) base (gpures) body -static NvBool __nvoc_down_thunk_KernelGraphicsContext_resCanCopy(struct RsResource *arg_this) { +NvBool __nvoc_down_thunk_KernelGraphicsContext_resCanCopy(struct RsResource *arg_this) { return kgrctxCanCopy((struct KernelGraphicsContext *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphicsContext_RsResource.offset)); } // kgrctxGetInternalObjectHandle: virtual override (gpures) base (gpures) -static NvHandle __nvoc_down_thunk_KernelGraphicsContext_gpuresGetInternalObjectHandle(struct GpuResource *arg_this) { +NvHandle __nvoc_down_thunk_KernelGraphicsContext_gpuresGetInternalObjectHandle(struct GpuResource *arg_this) { return kgrctxGetInternalObjectHandle((struct KernelGraphicsContext *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphicsContext_GpuResource.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxControl(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxMap(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxUnmap(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_kgrctxShareCallback(struct KernelGraphicsContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxGetRegBaseOffsetAndSize(struct KernelGraphicsContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxGetMapAddrSpace(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxInternalControlForward(struct KernelGraphicsContext *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvBool __nvoc_up_thunk_RmResource_kgrctxAccessCallback(struct KernelGraphicsContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_kgrctxGetMemInterMapParams(struct KernelGraphicsContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_kgrctxCheckMemInterUnmap(struct KernelGraphicsContext *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_kgrctxGetMemoryMappingDescriptor(struct KernelGraphicsContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_kgrctxControlSerialization_Prologue(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_kgrctxControlSerialization_Epilogue(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_kgrctxControl_Prologue(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_kgrctxControl_Epilogue(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_kgrctxIsDuplicate(struct KernelGraphicsContext *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_kgrctxPreDestruct(struct KernelGraphicsContext *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_kgrctxControlFilter(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_kgrctxIsPartialUnmapSupported(struct KernelGraphicsContext *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_kgrctxMapTo(struct KernelGraphicsContext *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_kgrctxUnmapFrom(struct KernelGraphicsContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_kgrctxGetRefCount(struct KernelGraphicsContext *pResource); // this +void __nvoc_up_thunk_RsResource_kgrctxAddAdditionalDependants(struct RsClient *pClient, struct KernelGraphicsContext *pResource, RsResourceRef *pReference); // this + // 23 up-thunk(s) defined to bridge methods in KernelGraphicsContext to superclasses // kgrctxControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxControl(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxControl(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsContext_GpuResource.offset), pCallContext, pParams); } // kgrctxMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxMap(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxMap(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsContext_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // kgrctxUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxUnmap(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxUnmap(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsContext_GpuResource.offset), pCallContext, pCpuMapping); } // kgrctxShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_kgrctxShareCallback(struct KernelGraphicsContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_kgrctxShareCallback(struct KernelGraphicsContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsContext_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // kgrctxGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxGetRegBaseOffsetAndSize(struct KernelGraphicsContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxGetRegBaseOffsetAndSize(struct KernelGraphicsContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsContext_GpuResource.offset), pGpu, pOffset, pSize); } // kgrctxGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxGetMapAddrSpace(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxGetMapAddrSpace(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsContext_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // kgrctxInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxInternalControlForward(struct KernelGraphicsContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_kgrctxInternalControlForward(struct KernelGraphicsContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsContext_GpuResource.offset), command, pParams, size); } // kgrctxAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_kgrctxAccessCallback(struct KernelGraphicsContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_kgrctxAccessCallback(struct KernelGraphicsContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // kgrctxGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kgrctxGetMemInterMapParams(struct KernelGraphicsContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_kgrctxGetMemInterMapParams(struct KernelGraphicsContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), pParams); } // kgrctxCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kgrctxCheckMemInterUnmap(struct KernelGraphicsContext *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_kgrctxCheckMemInterUnmap(struct KernelGraphicsContext *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), bSubdeviceHandleProvided); } // kgrctxGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kgrctxGetMemoryMappingDescriptor(struct KernelGraphicsContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_kgrctxGetMemoryMappingDescriptor(struct KernelGraphicsContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), ppMemDesc); } // kgrctxControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kgrctxControlSerialization_Prologue(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_kgrctxControlSerialization_Prologue(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), pCallContext, pParams); } // kgrctxControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_kgrctxControlSerialization_Epilogue(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_kgrctxControlSerialization_Epilogue(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), pCallContext, pParams); } // kgrctxControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kgrctxControl_Prologue(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_kgrctxControl_Prologue(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), pCallContext, pParams); } // kgrctxControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_kgrctxControl_Epilogue(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_kgrctxControl_Epilogue(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RmResource.offset), pCallContext, pParams); } // kgrctxIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kgrctxIsDuplicate(struct KernelGraphicsContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_kgrctxIsDuplicate(struct KernelGraphicsContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset), hMemory, pDuplicate); } // kgrctxPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_kgrctxPreDestruct(struct KernelGraphicsContext *pResource) { +void __nvoc_up_thunk_RsResource_kgrctxPreDestruct(struct KernelGraphicsContext *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset)); } // kgrctxControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kgrctxControlFilter(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kgrctxControlFilter(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset), pCallContext, pParams); } // kgrctxIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_kgrctxIsPartialUnmapSupported(struct KernelGraphicsContext *pResource) { +NvBool __nvoc_up_thunk_RsResource_kgrctxIsPartialUnmapSupported(struct KernelGraphicsContext *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset)); } // kgrctxMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kgrctxMapTo(struct KernelGraphicsContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kgrctxMapTo(struct KernelGraphicsContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset), pParams); } // kgrctxUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kgrctxUnmapFrom(struct KernelGraphicsContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kgrctxUnmapFrom(struct KernelGraphicsContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset), pParams); } // kgrctxGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_kgrctxGetRefCount(struct KernelGraphicsContext *pResource) { +NvU32 __nvoc_up_thunk_RsResource_kgrctxGetRefCount(struct KernelGraphicsContext *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset)); } // kgrctxAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_kgrctxAddAdditionalDependants(struct RsClient *pClient, struct KernelGraphicsContext *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_kgrctxAddAdditionalDependants(struct RsClient *pClient, struct KernelGraphicsContext *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsContext_RsResource.offset), pReference); } @@ -351,14 +419,6 @@ static void __nvoc_init_funcTable_KernelGraphicsContext_1(KernelGraphicsContext PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // kgrctxCanCopy -- inline virtual override (res) base (gpures) body - pThis->__kgrctxCanCopy__ = &kgrctxCanCopy_0c883b; - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_KernelGraphicsContext_resCanCopy; - - // kgrctxGetInternalObjectHandle -- virtual override (gpures) base (gpures) - pThis->__kgrctxGetInternalObjectHandle__ = &kgrctxGetInternalObjectHandle_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ = &__nvoc_down_thunk_KernelGraphicsContext_gpuresGetInternalObjectHandle; - // kgrctxShouldPreAllocPmBuffer -- halified (2 hals) body if (((( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ && (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ )) { @@ -399,82 +459,120 @@ static void __nvoc_init_funcTable_KernelGraphicsContext_1(KernelGraphicsContext #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kgrctxCtrlProgramVidmemPromote__ = &kgrctxCtrlProgramVidmemPromote_IMPL; #endif - - // kgrctxControl -- virtual inherited (gpures) base (gpures) - pThis->__kgrctxControl__ = &__nvoc_up_thunk_GpuResource_kgrctxControl; - - // kgrctxMap -- virtual inherited (gpures) base (gpures) - pThis->__kgrctxMap__ = &__nvoc_up_thunk_GpuResource_kgrctxMap; - - // kgrctxUnmap -- virtual inherited (gpures) base (gpures) - pThis->__kgrctxUnmap__ = &__nvoc_up_thunk_GpuResource_kgrctxUnmap; - - // kgrctxShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__kgrctxShareCallback__ = &__nvoc_up_thunk_GpuResource_kgrctxShareCallback; - - // kgrctxGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__kgrctxGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kgrctxGetRegBaseOffsetAndSize; - - // kgrctxGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__kgrctxGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_kgrctxGetMapAddrSpace; - - // kgrctxInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__kgrctxInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kgrctxInternalControlForward; - - // kgrctxAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__kgrctxAccessCallback__ = &__nvoc_up_thunk_RmResource_kgrctxAccessCallback; - - // kgrctxGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__kgrctxGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_kgrctxGetMemInterMapParams; - - // kgrctxCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__kgrctxCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_kgrctxCheckMemInterUnmap; - - // kgrctxGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__kgrctxGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_kgrctxGetMemoryMappingDescriptor; - - // kgrctxControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__kgrctxControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kgrctxControlSerialization_Prologue; - - // kgrctxControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__kgrctxControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kgrctxControlSerialization_Epilogue; - - // kgrctxControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__kgrctxControl_Prologue__ = &__nvoc_up_thunk_RmResource_kgrctxControl_Prologue; - - // kgrctxControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__kgrctxControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kgrctxControl_Epilogue; - - // kgrctxIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__kgrctxIsDuplicate__ = &__nvoc_up_thunk_RsResource_kgrctxIsDuplicate; - - // kgrctxPreDestruct -- virtual inherited (res) base (gpures) - pThis->__kgrctxPreDestruct__ = &__nvoc_up_thunk_RsResource_kgrctxPreDestruct; - - // kgrctxControlFilter -- virtual inherited (res) base (gpures) - pThis->__kgrctxControlFilter__ = &__nvoc_up_thunk_RsResource_kgrctxControlFilter; - - // kgrctxIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__kgrctxIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kgrctxIsPartialUnmapSupported; - - // kgrctxMapTo -- virtual inherited (res) base (gpures) - pThis->__kgrctxMapTo__ = &__nvoc_up_thunk_RsResource_kgrctxMapTo; - - // kgrctxUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__kgrctxUnmapFrom__ = &__nvoc_up_thunk_RsResource_kgrctxUnmapFrom; - - // kgrctxGetRefCount -- virtual inherited (res) base (gpures) - pThis->__kgrctxGetRefCount__ = &__nvoc_up_thunk_RsResource_kgrctxGetRefCount; - - // kgrctxAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__kgrctxAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kgrctxAddAdditionalDependants; -} // End __nvoc_init_funcTable_KernelGraphicsContext_1 with approximately 35 basic block(s). +} // End __nvoc_init_funcTable_KernelGraphicsContext_1 with approximately 8 basic block(s). // Initialize vtable(s) for 31 virtual method(s). void __nvoc_init_funcTable_KernelGraphicsContext(KernelGraphicsContext *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 31 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelGraphicsContext vtable = { + .__kgrctxCanCopy__ = &kgrctxCanCopy_e661f0, // inline virtual override (res) base (gpures) body + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_KernelGraphicsContext_resCanCopy, // virtual + .__kgrctxGetInternalObjectHandle__ = &kgrctxGetInternalObjectHandle_IMPL, // virtual override (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &__nvoc_down_thunk_KernelGraphicsContext_gpuresGetInternalObjectHandle, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__kgrctxControl__ = &__nvoc_up_thunk_GpuResource_kgrctxControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__kgrctxMap__ = &__nvoc_up_thunk_GpuResource_kgrctxMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__kgrctxUnmap__ = &__nvoc_up_thunk_GpuResource_kgrctxUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__kgrctxShareCallback__ = &__nvoc_up_thunk_GpuResource_kgrctxShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__kgrctxGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kgrctxGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__kgrctxGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_kgrctxGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__kgrctxInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kgrctxInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__kgrctxAccessCallback__ = &__nvoc_up_thunk_RmResource_kgrctxAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__kgrctxGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_kgrctxGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__kgrctxCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_kgrctxCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__kgrctxGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_kgrctxGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__kgrctxControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kgrctxControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__kgrctxControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kgrctxControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__kgrctxControl_Prologue__ = &__nvoc_up_thunk_RmResource_kgrctxControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__kgrctxControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kgrctxControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__kgrctxIsDuplicate__ = &__nvoc_up_thunk_RsResource_kgrctxIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__kgrctxPreDestruct__ = &__nvoc_up_thunk_RsResource_kgrctxPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__kgrctxControlFilter__ = &__nvoc_up_thunk_RsResource_kgrctxControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__kgrctxIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kgrctxIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__kgrctxMapTo__ = &__nvoc_up_thunk_RsResource_kgrctxMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__kgrctxUnmapFrom__ = &__nvoc_up_thunk_RsResource_kgrctxUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__kgrctxGetRefCount__ = &__nvoc_up_thunk_RsResource_kgrctxGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__kgrctxAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kgrctxAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (kgrctx) this + + // Initialize vtable(s) with 6 per-object function pointer(s). __nvoc_init_funcTable_KernelGraphicsContext_1(pThis, pRmhalspecowner); } @@ -625,6 +723,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGraphicsContextShared = /*pExportInfo=*/ &__nvoc_export_info_KernelGraphicsContextShared }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelGraphicsContextShared = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_kernel_graphics_context_nvoc.h b/src/nvidia/generated/g_kernel_graphics_context_nvoc.h index ae7516bc2c..62cc359a02 100644 --- a/src/nvidia/generated/g_kernel_graphics_context_nvoc.h +++ b/src/nvidia/generated/g_kernel_graphics_context_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -193,10 +193,15 @@ typedef struct KernelGraphicsObject KernelGraphicsObject; #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelGraphicsContext; + + struct KernelGraphicsContext { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelGraphicsContext *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -209,38 +214,13 @@ struct KernelGraphicsContext { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct KernelGraphicsContext *__nvoc_pbase_KernelGraphicsContext; // kgrctx - // Vtable with 31 per-object function pointers - NvBool (*__kgrctxCanCopy__)(struct KernelGraphicsContext * /*this*/); // inline virtual override (res) base (gpures) body - NvHandle (*__kgrctxGetInternalObjectHandle__)(struct KernelGraphicsContext * /*this*/); // virtual override (gpures) base (gpures) + // Vtable with 6 per-object function pointers NvBool (*__kgrctxShouldPreAllocPmBuffer__)(struct OBJGPU *, struct KernelGraphicsContext * /*this*/, struct KernelChannel *); // halified (2 hals) body GR_GLOBALCTX_BUFFER (*__kgrctxGetRegisterAccessMapId__)(struct OBJGPU *, struct KernelGraphicsContext * /*this*/, struct KernelChannel *); // halified (2 hals) NV_STATUS (*__kgrctxCtrlGetTpcPartitionMode__)(struct KernelGraphicsContext * /*this*/, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *); // exported (id=0x900103) NV_STATUS (*__kgrctxCtrlSetTpcPartitionMode__)(struct KernelGraphicsContext * /*this*/, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *); // exported (id=0x900101) NV_STATUS (*__kgrctxCtrlGetMMUDebugMode__)(struct KernelGraphicsContext * /*this*/, NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS *); // exported (id=0x900105) NV_STATUS (*__kgrctxCtrlProgramVidmemPromote__)(struct KernelGraphicsContext * /*this*/, NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *); // exported (id=0x900107) - NV_STATUS (*__kgrctxControl__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) - NV_STATUS (*__kgrctxMap__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) - NV_STATUS (*__kgrctxUnmap__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) - NvBool (*__kgrctxShareCallback__)(struct KernelGraphicsContext * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) - NV_STATUS (*__kgrctxGetRegBaseOffsetAndSize__)(struct KernelGraphicsContext * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) - NV_STATUS (*__kgrctxGetMapAddrSpace__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) - NV_STATUS (*__kgrctxInternalControlForward__)(struct KernelGraphicsContext * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (gpures) - NvBool (*__kgrctxAccessCallback__)(struct KernelGraphicsContext * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__kgrctxGetMemInterMapParams__)(struct KernelGraphicsContext * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__kgrctxCheckMemInterUnmap__)(struct KernelGraphicsContext * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__kgrctxGetMemoryMappingDescriptor__)(struct KernelGraphicsContext * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__kgrctxControlSerialization_Prologue__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) - void (*__kgrctxControlSerialization_Epilogue__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__kgrctxControl_Prologue__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) - void (*__kgrctxControl_Epilogue__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__kgrctxIsDuplicate__)(struct KernelGraphicsContext * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) - void (*__kgrctxPreDestruct__)(struct KernelGraphicsContext * /*this*/); // virtual inherited (res) base (gpures) - NV_STATUS (*__kgrctxControlFilter__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) - NvBool (*__kgrctxIsPartialUnmapSupported__)(struct KernelGraphicsContext * /*this*/); // inline virtual inherited (res) base (gpures) body - NV_STATUS (*__kgrctxMapTo__)(struct KernelGraphicsContext * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) - NV_STATUS (*__kgrctxUnmapFrom__)(struct KernelGraphicsContext * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) - NvU32 (*__kgrctxGetRefCount__)(struct KernelGraphicsContext * /*this*/); // virtual inherited (res) base (gpures) - void (*__kgrctxAddAdditionalDependants__)(struct RsClient *, struct KernelGraphicsContext * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) // Data members struct KernelGraphicsContextShared *PRIVATE_FIELD(pShared); @@ -252,6 +232,7 @@ struct KernelGraphicsContext_PRIVATE { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelGraphicsContext *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -264,15 +245,26 @@ struct KernelGraphicsContext_PRIVATE { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct KernelGraphicsContext *__nvoc_pbase_KernelGraphicsContext; // kgrctx - // Vtable with 31 per-object function pointers - NvBool (*__kgrctxCanCopy__)(struct KernelGraphicsContext * /*this*/); // inline virtual override (res) base (gpures) body - NvHandle (*__kgrctxGetInternalObjectHandle__)(struct KernelGraphicsContext * /*this*/); // virtual override (gpures) base (gpures) + // Vtable with 6 per-object function pointers NvBool (*__kgrctxShouldPreAllocPmBuffer__)(struct OBJGPU *, struct KernelGraphicsContext * /*this*/, struct KernelChannel *); // halified (2 hals) body GR_GLOBALCTX_BUFFER (*__kgrctxGetRegisterAccessMapId__)(struct OBJGPU *, struct KernelGraphicsContext * /*this*/, struct KernelChannel *); // halified (2 hals) NV_STATUS (*__kgrctxCtrlGetTpcPartitionMode__)(struct KernelGraphicsContext * /*this*/, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *); // exported (id=0x900103) NV_STATUS (*__kgrctxCtrlSetTpcPartitionMode__)(struct KernelGraphicsContext * /*this*/, NV0090_CTRL_TPC_PARTITION_MODE_PARAMS *); // exported (id=0x900101) NV_STATUS (*__kgrctxCtrlGetMMUDebugMode__)(struct KernelGraphicsContext * /*this*/, NV0090_CTRL_GET_MMU_DEBUG_MODE_PARAMS *); // exported (id=0x900105) NV_STATUS (*__kgrctxCtrlProgramVidmemPromote__)(struct KernelGraphicsContext * /*this*/, NV0090_CTRL_PROGRAM_VIDMEM_PROMOTE_PARAMS *); // exported (id=0x900107) + + // Data members + struct KernelGraphicsContextShared *pShared; + VGPU_GFXP_BUFFERS *pVgpuGfxpBuffers; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelGraphicsContext { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + + NvBool (*__kgrctxCanCopy__)(struct KernelGraphicsContext * /*this*/); // inline virtual override (res) base (gpures) body + NvHandle (*__kgrctxGetInternalObjectHandle__)(struct KernelGraphicsContext * /*this*/); // virtual override (gpures) base (gpures) NV_STATUS (*__kgrctxControl__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__kgrctxMap__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__kgrctxUnmap__)(struct KernelGraphicsContext * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -296,10 +288,6 @@ struct KernelGraphicsContext_PRIVATE { NV_STATUS (*__kgrctxUnmapFrom__)(struct KernelGraphicsContext * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__kgrctxGetRefCount__)(struct KernelGraphicsContext * /*this*/); // virtual inherited (res) base (gpures) void (*__kgrctxAddAdditionalDependants__)(struct RsClient *, struct KernelGraphicsContext * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - struct KernelGraphicsContextShared *pShared; - VGPU_GFXP_BUFFERS *pVgpuGfxpBuffers; }; #ifndef __NVOC_CLASS_KernelGraphicsContext_TYPEDEF__ @@ -332,9 +320,9 @@ NV_STATUS __nvoc_objCreate_KernelGraphicsContext(KernelGraphicsContext**, Dynami // Wrapper macros -#define kgrctxCanCopy_FNPTR(arg_this) arg_this->__kgrctxCanCopy__ +#define kgrctxCanCopy_FNPTR(arg_this) arg_this->__nvoc_vtable->__kgrctxCanCopy__ #define kgrctxCanCopy(arg_this) kgrctxCanCopy_DISPATCH(arg_this) -#define kgrctxGetInternalObjectHandle_FNPTR(arg_this) arg_this->__kgrctxGetInternalObjectHandle__ +#define kgrctxGetInternalObjectHandle_FNPTR(arg_this) arg_this->__nvoc_vtable->__kgrctxGetInternalObjectHandle__ #define kgrctxGetInternalObjectHandle(arg_this) kgrctxGetInternalObjectHandle_DISPATCH(arg_this) #define kgrctxShouldPreAllocPmBuffer_FNPTR(pKernelGraphicsContext) pKernelGraphicsContext->__kgrctxShouldPreAllocPmBuffer__ #define kgrctxShouldPreAllocPmBuffer(pGpu, pKernelGraphicsContext, pKernelChannel) kgrctxShouldPreAllocPmBuffer_DISPATCH(pGpu, pKernelGraphicsContext, pKernelChannel) @@ -350,60 +338,60 @@ NV_STATUS __nvoc_objCreate_KernelGraphicsContext(KernelGraphicsContext**, Dynami #define kgrctxCtrlGetMMUDebugMode(pKernelGraphicsContext, pParams) kgrctxCtrlGetMMUDebugMode_DISPATCH(pKernelGraphicsContext, pParams) #define kgrctxCtrlProgramVidmemPromote_FNPTR(pKernelGraphicsContext) pKernelGraphicsContext->__kgrctxCtrlProgramVidmemPromote__ #define kgrctxCtrlProgramVidmemPromote(pKernelGraphicsContext, pParams) kgrctxCtrlProgramVidmemPromote_DISPATCH(pKernelGraphicsContext, pParams) -#define kgrctxControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define kgrctxControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define kgrctxControl(pGpuResource, pCallContext, pParams) kgrctxControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define kgrctxMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define kgrctxMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define kgrctxMap(pGpuResource, pCallContext, pParams, pCpuMapping) kgrctxMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define kgrctxUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define kgrctxUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define kgrctxUnmap(pGpuResource, pCallContext, pCpuMapping) kgrctxUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define kgrctxShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define kgrctxShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define kgrctxShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) kgrctxShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define kgrctxGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define kgrctxGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define kgrctxGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) kgrctxGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define kgrctxGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define kgrctxGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define kgrctxGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) kgrctxGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define kgrctxInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define kgrctxInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define kgrctxInternalControlForward(pGpuResource, command, pParams, size) kgrctxInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define kgrctxAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define kgrctxAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define kgrctxAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kgrctxAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define kgrctxGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define kgrctxGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define kgrctxGetMemInterMapParams(pRmResource, pParams) kgrctxGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define kgrctxCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define kgrctxCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define kgrctxCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) kgrctxCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define kgrctxGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define kgrctxGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define kgrctxGetMemoryMappingDescriptor(pRmResource, ppMemDesc) kgrctxGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define kgrctxControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define kgrctxControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define kgrctxControlSerialization_Prologue(pResource, pCallContext, pParams) kgrctxControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define kgrctxControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define kgrctxControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define kgrctxControlSerialization_Epilogue(pResource, pCallContext, pParams) kgrctxControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kgrctxControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define kgrctxControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define kgrctxControl_Prologue(pResource, pCallContext, pParams) kgrctxControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define kgrctxControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define kgrctxControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define kgrctxControl_Epilogue(pResource, pCallContext, pParams) kgrctxControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kgrctxIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define kgrctxIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define kgrctxIsDuplicate(pResource, hMemory, pDuplicate) kgrctxIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define kgrctxPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define kgrctxPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define kgrctxPreDestruct(pResource) kgrctxPreDestruct_DISPATCH(pResource) -#define kgrctxControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define kgrctxControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define kgrctxControlFilter(pResource, pCallContext, pParams) kgrctxControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define kgrctxIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define kgrctxIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define kgrctxIsPartialUnmapSupported(pResource) kgrctxIsPartialUnmapSupported_DISPATCH(pResource) -#define kgrctxMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define kgrctxMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define kgrctxMapTo(pResource, pParams) kgrctxMapTo_DISPATCH(pResource, pParams) -#define kgrctxUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define kgrctxUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define kgrctxUnmapFrom(pResource, pParams) kgrctxUnmapFrom_DISPATCH(pResource, pParams) -#define kgrctxGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define kgrctxGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define kgrctxGetRefCount(pResource) kgrctxGetRefCount_DISPATCH(pResource) -#define kgrctxAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define kgrctxAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define kgrctxAddAdditionalDependants(pClient, pResource, pReference) kgrctxAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool kgrctxCanCopy_DISPATCH(struct KernelGraphicsContext *arg_this) { - return arg_this->__kgrctxCanCopy__(arg_this); + return arg_this->__nvoc_vtable->__kgrctxCanCopy__(arg_this); } static inline NvHandle kgrctxGetInternalObjectHandle_DISPATCH(struct KernelGraphicsContext *arg_this) { - return arg_this->__kgrctxGetInternalObjectHandle__(arg_this); + return arg_this->__nvoc_vtable->__kgrctxGetInternalObjectHandle__(arg_this); } static inline NvBool kgrctxShouldPreAllocPmBuffer_DISPATCH(struct OBJGPU *pGpu, struct KernelGraphicsContext *pKernelGraphicsContext, struct KernelChannel *pKernelChannel) { @@ -431,95 +419,95 @@ static inline NV_STATUS kgrctxCtrlProgramVidmemPromote_DISPATCH(struct KernelGra } static inline NV_STATUS kgrctxControl_DISPATCH(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__kgrctxControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__kgrctxControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS kgrctxMap_DISPATCH(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kgrctxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__kgrctxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS kgrctxUnmap_DISPATCH(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kgrctxUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__kgrctxUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool kgrctxShareCallback_DISPATCH(struct KernelGraphicsContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__kgrctxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__kgrctxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS kgrctxGetRegBaseOffsetAndSize_DISPATCH(struct KernelGraphicsContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__kgrctxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__kgrctxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS kgrctxGetMapAddrSpace_DISPATCH(struct KernelGraphicsContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__kgrctxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__kgrctxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS kgrctxInternalControlForward_DISPATCH(struct KernelGraphicsContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__kgrctxInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__kgrctxInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvBool kgrctxAccessCallback_DISPATCH(struct KernelGraphicsContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__kgrctxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__kgrctxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS kgrctxGetMemInterMapParams_DISPATCH(struct KernelGraphicsContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__kgrctxGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__kgrctxGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS kgrctxCheckMemInterUnmap_DISPATCH(struct KernelGraphicsContext *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__kgrctxCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__kgrctxCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS kgrctxGetMemoryMappingDescriptor_DISPATCH(struct KernelGraphicsContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__kgrctxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__kgrctxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS kgrctxControlSerialization_Prologue_DISPATCH(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kgrctxControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kgrctxControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void kgrctxControlSerialization_Epilogue_DISPATCH(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kgrctxControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__kgrctxControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS kgrctxControl_Prologue_DISPATCH(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kgrctxControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kgrctxControl_Prologue__(pResource, pCallContext, pParams); } static inline void kgrctxControl_Epilogue_DISPATCH(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kgrctxControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__kgrctxControl_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS kgrctxIsDuplicate_DISPATCH(struct KernelGraphicsContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__kgrctxIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__kgrctxIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void kgrctxPreDestruct_DISPATCH(struct KernelGraphicsContext *pResource) { - pResource->__kgrctxPreDestruct__(pResource); + pResource->__nvoc_vtable->__kgrctxPreDestruct__(pResource); } static inline NV_STATUS kgrctxControlFilter_DISPATCH(struct KernelGraphicsContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kgrctxControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kgrctxControlFilter__(pResource, pCallContext, pParams); } static inline NvBool kgrctxIsPartialUnmapSupported_DISPATCH(struct KernelGraphicsContext *pResource) { - return pResource->__kgrctxIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__kgrctxIsPartialUnmapSupported__(pResource); } static inline NV_STATUS kgrctxMapTo_DISPATCH(struct KernelGraphicsContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__kgrctxMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__kgrctxMapTo__(pResource, pParams); } static inline NV_STATUS kgrctxUnmapFrom_DISPATCH(struct KernelGraphicsContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__kgrctxUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__kgrctxUnmapFrom__(pResource, pParams); } static inline NvU32 kgrctxGetRefCount_DISPATCH(struct KernelGraphicsContext *pResource) { - return pResource->__kgrctxGetRefCount__(pResource); + return pResource->__nvoc_vtable->__kgrctxGetRefCount__(pResource); } static inline void kgrctxAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelGraphicsContext *pResource, RsResourceRef *pReference) { - pResource->__kgrctxAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__kgrctxAddAdditionalDependants__(pClient, pResource, pReference); } NvBool kgrctxShouldManageCtxBuffers_KERNEL(struct OBJGPU *arg1, struct KernelGraphicsContext *arg2, NvU32 gfid); @@ -603,8 +591,8 @@ static inline void kgrctxDecObjectCount(struct OBJGPU *arg1, struct KernelGraphi #define kgrctxDecObjectCount_HAL(arg1, arg2, classNum) kgrctxDecObjectCount(arg1, arg2, classNum) -static inline NvBool kgrctxCanCopy_0c883b(struct KernelGraphicsContext *arg1) { - return ((NvBool)(0 == 0)); +static inline NvBool kgrctxCanCopy_e661f0(struct KernelGraphicsContext *arg1) { + return NV_TRUE; } NvHandle kgrctxGetInternalObjectHandle_IMPL(struct KernelGraphicsContext *arg1); diff --git a/src/nvidia/generated/g_kernel_graphics_manager_nvoc.c b/src/nvidia/generated/g_kernel_graphics_manager_nvoc.c index 307960edcc..91885b2e24 100644 --- a/src/nvidia/generated/g_kernel_graphics_manager_nvoc.c +++ b/src/nvidia/generated/g_kernel_graphics_manager_nvoc.c @@ -66,78 +66,96 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGraphicsManager = /*pExportInfo=*/ &__nvoc_export_info_KernelGraphicsManager }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_KernelGraphicsManager_engstateConstructEngine(OBJGPU *arg1, struct OBJENGSTATE *arg_this, ENGDESCRIPTOR arg3); // this +void __nvoc_down_thunk_KernelGraphicsManager_engstateStateDestroy(OBJGPU *arg1, struct OBJENGSTATE *arg_this); // this + // 2 down-thunk(s) defined to bridge methods in KernelGraphicsManager from superclasses // kgrmgrConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelGraphicsManager_engstateConstructEngine(OBJGPU *arg1, struct OBJENGSTATE *arg_this, ENGDESCRIPTOR arg3) { +NV_STATUS __nvoc_down_thunk_KernelGraphicsManager_engstateConstructEngine(OBJGPU *arg1, struct OBJENGSTATE *arg_this, ENGDESCRIPTOR arg3) { return kgrmgrConstructEngine(arg1, (struct KernelGraphicsManager *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset), arg3); } // kgrmgrStateDestroy: virtual override (engstate) base (engstate) -static void __nvoc_down_thunk_KernelGraphicsManager_engstateStateDestroy(OBJGPU *arg1, struct OBJENGSTATE *arg_this) { +void __nvoc_down_thunk_KernelGraphicsManager_engstateStateDestroy(OBJGPU *arg1, struct OBJENGSTATE *arg_this) { kgrmgrStateDestroy(arg1, (struct KernelGraphicsManager *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_kgrmgrInitMissing(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreInitLocked(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStateInitLocked(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStateInitUnlocked(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreLoad(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStateLoad(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePostLoad(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreUnload(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStateUnload(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePostUnload(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_kgrmgrIsPresent(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate); // this + // 12 up-thunk(s) defined to bridge methods in KernelGraphicsManager to superclasses // kgrmgrInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kgrmgrInitMissing(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kgrmgrInitMissing(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset)); } // kgrmgrStatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreInitLocked(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreInitLocked(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate) { return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset)); } // kgrmgrStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset)); } // kgrmgrStateInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStateInitLocked(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStateInitLocked(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate) { return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset)); } // kgrmgrStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStateInitUnlocked(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStateInitUnlocked(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset)); } // kgrmgrStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreLoad(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreLoad(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset), arg3); } // kgrmgrStateLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStateLoad(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStateLoad(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset), arg3); } // kgrmgrStatePostLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePostLoad(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePostLoad(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset), arg3); } // kgrmgrStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreUnload(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreUnload(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset), arg3); } // kgrmgrStateUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStateUnload(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStateUnload(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset), arg3); } // kgrmgrStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePostUnload(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePostUnload(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset), arg3); } // kgrmgrIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_kgrmgrIsPresent(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_kgrmgrIsPresent(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphicsManager_OBJENGSTATE.offset)); } @@ -187,14 +205,6 @@ static void __nvoc_init_funcTable_KernelGraphicsManager_1(KernelGraphicsManager PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); - // kgrmgrConstructEngine -- virtual override (engstate) base (engstate) - pThis->__kgrmgrConstructEngine__ = &kgrmgrConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelGraphicsManager_engstateConstructEngine; - - // kgrmgrStateDestroy -- virtual override (engstate) base (engstate) - pThis->__kgrmgrStateDestroy__ = &kgrmgrStateDestroy_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelGraphicsManager_engstateStateDestroy; - // kgrmgrGetVeidsFromGpcCount -- halified (3 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ { @@ -209,49 +219,49 @@ static void __nvoc_init_funcTable_KernelGraphicsManager_1(KernelGraphicsManager { pThis->__kgrmgrGetVeidsFromGpcCount__ = &kgrmgrGetVeidsFromGpcCount_46f6a7; } - - // kgrmgrInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__kgrmgrInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrInitMissing; - - // kgrmgrStatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__kgrmgrStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreInitLocked; - - // kgrmgrStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kgrmgrStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreInitUnlocked; - - // kgrmgrStateInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__kgrmgrStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStateInitLocked; - - // kgrmgrStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kgrmgrStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStateInitUnlocked; - - // kgrmgrStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__kgrmgrStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreLoad; - - // kgrmgrStateLoad -- virtual inherited (engstate) base (engstate) - pThis->__kgrmgrStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStateLoad; - - // kgrmgrStatePostLoad -- virtual inherited (engstate) base (engstate) - pThis->__kgrmgrStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePostLoad; - - // kgrmgrStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__kgrmgrStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreUnload; - - // kgrmgrStateUnload -- virtual inherited (engstate) base (engstate) - pThis->__kgrmgrStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStateUnload; - - // kgrmgrStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__kgrmgrStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePostUnload; - - // kgrmgrIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__kgrmgrIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrIsPresent; -} // End __nvoc_init_funcTable_KernelGraphicsManager_1 with approximately 19 basic block(s). +} // End __nvoc_init_funcTable_KernelGraphicsManager_1 with approximately 3 basic block(s). // Initialize vtable(s) for 15 virtual method(s). void __nvoc_init_funcTable_KernelGraphicsManager(KernelGraphicsManager *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 15 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelGraphicsManager vtable = { + .__kgrmgrConstructEngine__ = &kgrmgrConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelGraphicsManager_engstateConstructEngine, // virtual + .__kgrmgrStateDestroy__ = &kgrmgrStateDestroy_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelGraphicsManager_engstateStateDestroy, // virtual + .__kgrmgrInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__kgrmgrStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__kgrmgrStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__kgrmgrStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStateInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &engstateStateInitLocked_IMPL, // virtual + .__kgrmgrStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__kgrmgrStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__kgrmgrStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStateLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &engstateStateLoad_IMPL, // virtual + .__kgrmgrStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePostLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL, // virtual + .__kgrmgrStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__kgrmgrStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStateUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &engstateStateUnload_IMPL, // virtual + .__kgrmgrStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__kgrmgrIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kgrmgrIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_vtable = &vtable; // (kgrmgr) this + + // Initialize vtable(s) with 1 per-object function pointer(s). __nvoc_init_funcTable_KernelGraphicsManager_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_graphics_manager_nvoc.h b/src/nvidia/generated/g_kernel_graphics_manager_nvoc.h index 2a3cd4fa25..736bd9b244 100644 --- a/src/nvidia/generated/g_kernel_graphics_manager_nvoc.h +++ b/src/nvidia/generated/g_kernel_graphics_manager_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -80,10 +80,15 @@ typedef struct KGRMGR_FECS_VGPU_GLOBAL_TRACE_INFO KGRMGR_FECS_VGPU_GLOBAL_TRACE_ #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelGraphicsManager; + + struct KernelGraphicsManager { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelGraphicsManager *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -93,22 +98,8 @@ struct KernelGraphicsManager { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct KernelGraphicsManager *__nvoc_pbase_KernelGraphicsManager; // kgrmgr - // Vtable with 15 per-object function pointers - NV_STATUS (*__kgrmgrConstructEngine__)(OBJGPU *, struct KernelGraphicsManager * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) - void (*__kgrmgrStateDestroy__)(OBJGPU *, struct KernelGraphicsManager * /*this*/); // virtual override (engstate) base (engstate) + // Vtable with 1 per-object function pointer NV_STATUS (*__kgrmgrGetVeidsFromGpcCount__)(OBJGPU *, struct KernelGraphicsManager * /*this*/, NvU32, NvU32 *); // halified (3 hals) - void (*__kgrmgrInitMissing__)(struct OBJGPU *, struct KernelGraphicsManager * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgrmgrStatePreInitLocked__)(struct OBJGPU *, struct KernelGraphicsManager * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgrmgrStatePreInitUnlocked__)(struct OBJGPU *, struct KernelGraphicsManager * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgrmgrStateInitLocked__)(struct OBJGPU *, struct KernelGraphicsManager * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgrmgrStateInitUnlocked__)(struct OBJGPU *, struct KernelGraphicsManager * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgrmgrStatePreLoad__)(struct OBJGPU *, struct KernelGraphicsManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgrmgrStateLoad__)(struct OBJGPU *, struct KernelGraphicsManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgrmgrStatePostLoad__)(struct OBJGPU *, struct KernelGraphicsManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgrmgrStatePreUnload__)(struct OBJGPU *, struct KernelGraphicsManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgrmgrStateUnload__)(struct OBJGPU *, struct KernelGraphicsManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgrmgrStatePostUnload__)(struct OBJGPU *, struct KernelGraphicsManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NvBool (*__kgrmgrIsPresent__)(struct OBJGPU *, struct KernelGraphicsManager * /*this*/); // virtual inherited (engstate) base (engstate) // Data members GRMGR_LEGACY_KGRAPHICS_STATIC_INFO PRIVATE_FIELD(legacyKgraphicsStaticInfo); @@ -124,6 +115,7 @@ struct KernelGraphicsManager_PRIVATE { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelGraphicsManager *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -133,10 +125,25 @@ struct KernelGraphicsManager_PRIVATE { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct KernelGraphicsManager *__nvoc_pbase_KernelGraphicsManager; // kgrmgr - // Vtable with 15 per-object function pointers + // Vtable with 1 per-object function pointer + NV_STATUS (*__kgrmgrGetVeidsFromGpcCount__)(OBJGPU *, struct KernelGraphicsManager * /*this*/, NvU32, NvU32 *); // halified (3 hals) + + // Data members + GRMGR_LEGACY_KGRAPHICS_STATIC_INFO legacyKgraphicsStaticInfo; + NvU64 veidInUseMask; + NvU64 grIdxVeidMask[8]; + KGRMGR_FECS_GLOBAL_TRACE_INFO *pFecsGlobalTraceInfo; + KGRMGR_FECS_VGPU_GLOBAL_TRACE_INFO *pFecsVgpuGlobalTraceInfo; + CTX_BUF_INFO globalCtxBufInfo[10]; +}; + + +// Metadata including vtable with 14 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelGraphicsManager { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + NV_STATUS (*__kgrmgrConstructEngine__)(OBJGPU *, struct KernelGraphicsManager * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) void (*__kgrmgrStateDestroy__)(OBJGPU *, struct KernelGraphicsManager * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__kgrmgrGetVeidsFromGpcCount__)(OBJGPU *, struct KernelGraphicsManager * /*this*/, NvU32, NvU32 *); // halified (3 hals) void (*__kgrmgrInitMissing__)(struct OBJGPU *, struct KernelGraphicsManager * /*this*/); // virtual inherited (engstate) base (engstate) NV_STATUS (*__kgrmgrStatePreInitLocked__)(struct OBJGPU *, struct KernelGraphicsManager * /*this*/); // virtual inherited (engstate) base (engstate) NV_STATUS (*__kgrmgrStatePreInitUnlocked__)(struct OBJGPU *, struct KernelGraphicsManager * /*this*/); // virtual inherited (engstate) base (engstate) @@ -149,14 +156,6 @@ struct KernelGraphicsManager_PRIVATE { NV_STATUS (*__kgrmgrStateUnload__)(struct OBJGPU *, struct KernelGraphicsManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) NV_STATUS (*__kgrmgrStatePostUnload__)(struct OBJGPU *, struct KernelGraphicsManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) NvBool (*__kgrmgrIsPresent__)(struct OBJGPU *, struct KernelGraphicsManager * /*this*/); // virtual inherited (engstate) base (engstate) - - // Data members - GRMGR_LEGACY_KGRAPHICS_STATIC_INFO legacyKgraphicsStaticInfo; - NvU64 veidInUseMask; - NvU64 grIdxVeidMask[8]; - KGRMGR_FECS_GLOBAL_TRACE_INFO *pFecsGlobalTraceInfo; - KGRMGR_FECS_VGPU_GLOBAL_TRACE_INFO *pFecsVgpuGlobalTraceInfo; - CTX_BUF_INFO globalCtxBufInfo[10]; }; #ifndef __NVOC_CLASS_KernelGraphicsManager_TYPEDEF__ @@ -193,45 +192,45 @@ NV_STATUS __nvoc_objCreate_KernelGraphicsManager(KernelGraphicsManager**, Dynami // Wrapper macros -#define kgrmgrConstructEngine_FNPTR(arg_this) arg_this->__kgrmgrConstructEngine__ +#define kgrmgrConstructEngine_FNPTR(arg_this) arg_this->__nvoc_vtable->__kgrmgrConstructEngine__ #define kgrmgrConstructEngine(arg1, arg_this, arg3) kgrmgrConstructEngine_DISPATCH(arg1, arg_this, arg3) -#define kgrmgrStateDestroy_FNPTR(arg_this) arg_this->__kgrmgrStateDestroy__ +#define kgrmgrStateDestroy_FNPTR(arg_this) arg_this->__nvoc_vtable->__kgrmgrStateDestroy__ #define kgrmgrStateDestroy(arg1, arg_this) kgrmgrStateDestroy_DISPATCH(arg1, arg_this) #define kgrmgrGetVeidsFromGpcCount_FNPTR(arg_this) arg_this->__kgrmgrGetVeidsFromGpcCount__ #define kgrmgrGetVeidsFromGpcCount(arg1, arg_this, gpcCount, pVeidCount) kgrmgrGetVeidsFromGpcCount_DISPATCH(arg1, arg_this, gpcCount, pVeidCount) #define kgrmgrGetVeidsFromGpcCount_HAL(arg1, arg_this, gpcCount, pVeidCount) kgrmgrGetVeidsFromGpcCount_DISPATCH(arg1, arg_this, gpcCount, pVeidCount) -#define kgrmgrInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define kgrmgrInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define kgrmgrInitMissing(pGpu, pEngstate) kgrmgrInitMissing_DISPATCH(pGpu, pEngstate) -#define kgrmgrStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define kgrmgrStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define kgrmgrStatePreInitLocked(pGpu, pEngstate) kgrmgrStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define kgrmgrStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define kgrmgrStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define kgrmgrStatePreInitUnlocked(pGpu, pEngstate) kgrmgrStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kgrmgrStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define kgrmgrStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitLocked__ #define kgrmgrStateInitLocked(pGpu, pEngstate) kgrmgrStateInitLocked_DISPATCH(pGpu, pEngstate) -#define kgrmgrStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kgrmgrStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define kgrmgrStateInitUnlocked(pGpu, pEngstate) kgrmgrStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kgrmgrStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kgrmgrStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define kgrmgrStatePreLoad(pGpu, pEngstate, arg3) kgrmgrStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kgrmgrStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define kgrmgrStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateLoad__ #define kgrmgrStateLoad(pGpu, pEngstate, arg3) kgrmgrStateLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kgrmgrStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define kgrmgrStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostLoad__ #define kgrmgrStatePostLoad(pGpu, pEngstate, arg3) kgrmgrStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kgrmgrStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kgrmgrStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define kgrmgrStatePreUnload(pGpu, pEngstate, arg3) kgrmgrStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kgrmgrStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define kgrmgrStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateUnload__ #define kgrmgrStateUnload(pGpu, pEngstate, arg3) kgrmgrStateUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kgrmgrStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kgrmgrStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define kgrmgrStatePostUnload(pGpu, pEngstate, arg3) kgrmgrStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kgrmgrIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define kgrmgrIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define kgrmgrIsPresent(pGpu, pEngstate) kgrmgrIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS kgrmgrConstructEngine_DISPATCH(OBJGPU *arg1, struct KernelGraphicsManager *arg_this, ENGDESCRIPTOR arg3) { - return arg_this->__kgrmgrConstructEngine__(arg1, arg_this, arg3); + return arg_this->__nvoc_vtable->__kgrmgrConstructEngine__(arg1, arg_this, arg3); } static inline void kgrmgrStateDestroy_DISPATCH(OBJGPU *arg1, struct KernelGraphicsManager *arg_this) { - arg_this->__kgrmgrStateDestroy__(arg1, arg_this); + arg_this->__nvoc_vtable->__kgrmgrStateDestroy__(arg1, arg_this); } static inline NV_STATUS kgrmgrGetVeidsFromGpcCount_DISPATCH(OBJGPU *arg1, struct KernelGraphicsManager *arg_this, NvU32 gpcCount, NvU32 *pVeidCount) { @@ -239,51 +238,51 @@ static inline NV_STATUS kgrmgrGetVeidsFromGpcCount_DISPATCH(OBJGPU *arg1, struct } static inline void kgrmgrInitMissing_DISPATCH(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate) { - pEngstate->__kgrmgrInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kgrmgrInitMissing__(pGpu, pEngstate); } static inline NV_STATUS kgrmgrStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate) { - return pEngstate->__kgrmgrStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kgrmgrStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS kgrmgrStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate) { - return pEngstate->__kgrmgrStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kgrmgrStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kgrmgrStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate) { - return pEngstate->__kgrmgrStateInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kgrmgrStateInitLocked__(pGpu, pEngstate); } static inline NV_STATUS kgrmgrStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate) { - return pEngstate->__kgrmgrStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kgrmgrStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kgrmgrStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { - return pEngstate->__kgrmgrStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kgrmgrStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kgrmgrStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { - return pEngstate->__kgrmgrStateLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kgrmgrStateLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kgrmgrStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { - return pEngstate->__kgrmgrStatePostLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kgrmgrStatePostLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kgrmgrStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { - return pEngstate->__kgrmgrStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kgrmgrStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS kgrmgrStateUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { - return pEngstate->__kgrmgrStateUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kgrmgrStateUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS kgrmgrStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate, NvU32 arg3) { - return pEngstate->__kgrmgrStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kgrmgrStatePostUnload__(pGpu, pEngstate, arg3); } static inline NvBool kgrmgrIsPresent_DISPATCH(struct OBJGPU *pGpu, struct KernelGraphicsManager *pEngstate) { - return pEngstate->__kgrmgrIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kgrmgrIsPresent__(pGpu, pEngstate); } NV_STATUS kgrmgrConstructEngine_IMPL(OBJGPU *arg1, struct KernelGraphicsManager *arg2, ENGDESCRIPTOR arg3); diff --git a/src/nvidia/generated/g_kernel_graphics_nvoc.c b/src/nvidia/generated/g_kernel_graphics_nvoc.c index 0bab14a4c8..aa88402016 100644 --- a/src/nvidia/generated/g_kernel_graphics_nvoc.c +++ b/src/nvidia/generated/g_kernel_graphics_nvoc.c @@ -75,98 +75,120 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGraphics = /*pExportInfo=*/ &__nvoc_export_info_KernelGraphics }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateConstructEngine(OBJGPU *arg1, struct OBJENGSTATE *arg_this, ENGDESCRIPTOR arg3); // this +NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateStateInitLocked(OBJGPU *arg1, struct OBJENGSTATE *arg_this); // this +NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateStateLoad(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags); // this +NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateStatePreUnload(OBJGPU *pGpu, struct OBJENGSTATE *arg_this, NvU32 flags); // this +NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateStateUnload(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags); // this +void __nvoc_down_thunk_KernelGraphics_engstateStateDestroy(OBJGPU *arg1, struct OBJENGSTATE *arg_this); // this +NvBool __nvoc_down_thunk_KernelGraphics_engstateIsPresent(OBJGPU *arg1, struct OBJENGSTATE *arg_this); // this +NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateStatePostLoad(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags); // this +void __nvoc_down_thunk_KernelGraphics_intrservRegisterIntrService(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceRecord arg3[175]); // this +NV_STATUS __nvoc_down_thunk_KernelGraphics_intrservServiceNotificationInterrupt(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3); // this +NvBool __nvoc_down_thunk_KernelGraphics_intrservClearInterrupt(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceClearInterruptArguments *arg3); // this +NvU32 __nvoc_down_thunk_KernelGraphics_intrservServiceInterrupt(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceServiceInterruptArguments *arg3); // this + // 12 down-thunk(s) defined to bridge methods in KernelGraphics from superclasses // kgraphicsConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateConstructEngine(OBJGPU *arg1, struct OBJENGSTATE *arg_this, ENGDESCRIPTOR arg3) { +NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateConstructEngine(OBJGPU *arg1, struct OBJENGSTATE *arg_this, ENGDESCRIPTOR arg3) { return kgraphicsConstructEngine(arg1, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset), arg3); } // kgraphicsStateInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateStateInitLocked(OBJGPU *arg1, struct OBJENGSTATE *arg_this) { +NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateStateInitLocked(OBJGPU *arg1, struct OBJENGSTATE *arg_this) { return kgraphicsStateInitLocked(arg1, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset)); } // kgraphicsStateLoad: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateStateLoad(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateStateLoad(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags) { return kgraphicsStateLoad(arg1, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset), flags); } // kgraphicsStatePreUnload: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateStatePreUnload(OBJGPU *pGpu, struct OBJENGSTATE *arg_this, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateStatePreUnload(OBJGPU *pGpu, struct OBJENGSTATE *arg_this, NvU32 flags) { return kgraphicsStatePreUnload(pGpu, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset), flags); } // kgraphicsStateUnload: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateStateUnload(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateStateUnload(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags) { return kgraphicsStateUnload(arg1, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset), flags); } // kgraphicsStateDestroy: virtual override (engstate) base (engstate) -static void __nvoc_down_thunk_KernelGraphics_engstateStateDestroy(OBJGPU *arg1, struct OBJENGSTATE *arg_this) { +void __nvoc_down_thunk_KernelGraphics_engstateStateDestroy(OBJGPU *arg1, struct OBJENGSTATE *arg_this) { kgraphicsStateDestroy(arg1, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset)); } // kgraphicsIsPresent: virtual override (engstate) base (engstate) -static NvBool __nvoc_down_thunk_KernelGraphics_engstateIsPresent(OBJGPU *arg1, struct OBJENGSTATE *arg_this) { +NvBool __nvoc_down_thunk_KernelGraphics_engstateIsPresent(OBJGPU *arg1, struct OBJENGSTATE *arg_this) { return kgraphicsIsPresent(arg1, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset)); } // kgraphicsStatePostLoad: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateStatePostLoad(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelGraphics_engstateStatePostLoad(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags) { return kgraphicsStatePostLoad(arg1, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset), flags); } // kgraphicsRegisterIntrService: virtual override (intrserv) base (intrserv) -static void __nvoc_down_thunk_KernelGraphics_intrservRegisterIntrService(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceRecord arg3[175]) { +void __nvoc_down_thunk_KernelGraphics_intrservRegisterIntrService(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceRecord arg3[175]) { kgraphicsRegisterIntrService(arg1, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_IntrService.offset), arg3); } // kgraphicsServiceNotificationInterrupt: virtual override (intrserv) base (intrserv) -static NV_STATUS __nvoc_down_thunk_KernelGraphics_intrservServiceNotificationInterrupt(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3) { +NV_STATUS __nvoc_down_thunk_KernelGraphics_intrservServiceNotificationInterrupt(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3) { return kgraphicsServiceNotificationInterrupt(arg1, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_IntrService.offset), arg3); } // kgraphicsClearInterrupt: virtual halified (singleton optimized) override (intrserv) base (intrserv) -static NvBool __nvoc_down_thunk_KernelGraphics_intrservClearInterrupt(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceClearInterruptArguments *arg3) { +NvBool __nvoc_down_thunk_KernelGraphics_intrservClearInterrupt(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceClearInterruptArguments *arg3) { return kgraphicsClearInterrupt(arg1, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_IntrService.offset), arg3); } // kgraphicsServiceInterrupt: virtual halified (singleton optimized) override (intrserv) base (intrserv) -static NvU32 __nvoc_down_thunk_KernelGraphics_intrservServiceInterrupt(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceServiceInterruptArguments *arg3) { +NvU32 __nvoc_down_thunk_KernelGraphics_intrservServiceInterrupt(OBJGPU *arg1, struct IntrService *arg_this, IntrServiceServiceInterruptArguments *arg3) { return kgraphicsServiceInterrupt(arg1, (struct KernelGraphics *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphics_IntrService.offset), arg3); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_kgraphicsInitMissing(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePreInitLocked(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgraphicsStateInitUnlocked(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePreLoad(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePostUnload(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate, NvU32 arg3); // this + // 6 up-thunk(s) defined to bridge methods in KernelGraphics to superclasses // kgraphicsInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kgraphicsInitMissing(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kgraphicsInitMissing(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset)); } // kgraphicsStatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePreInitLocked(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePreInitLocked(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate) { return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset)); } // kgraphicsStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset)); } // kgraphicsStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgraphicsStateInitUnlocked(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgraphicsStateInitUnlocked(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset)); } // kgraphicsStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePreLoad(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePreLoad(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset), arg3); } // kgraphicsStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePostUnload(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePostUnload(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGraphics_OBJENGSTATE.offset), arg3); } @@ -201,74 +223,76 @@ void __nvoc_init_dataField_KernelGraphics(KernelGraphics *pThis, RmHalspecOwner // Hal field -- bCtxswLoggingSupported if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bCtxswLoggingSupported = ((NvBool)(0 == 0)); + pThis->bCtxswLoggingSupported = NV_TRUE; } - pThis->bOverrideContextBuffersToGpuCached = ((NvBool)(0 != 0)); + pThis->bOverrideContextBuffersToGpuCached = NV_FALSE; + + pThis->bPeFiroBufferEnabled = NV_FALSE; // Hal field -- bDeferContextInit if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000003UL) )) /* RmVariantHal: VF | PF_KERNEL_ONLY */ { - pThis->bDeferContextInit = ((NvBool)(0 != 0)); + pThis->bDeferContextInit = NV_FALSE; } // Hal field -- bPerSubcontextContextHeaderSupported if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bPerSubcontextContextHeaderSupported = ((NvBool)(0 == 0)); + pThis->bPerSubcontextContextHeaderSupported = NV_TRUE; } // Hal field -- bSetContextBuffersGPUPrivileged if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bSetContextBuffersGPUPrivileged = ((NvBool)(0 == 0)); + pThis->bSetContextBuffersGPUPrivileged = NV_TRUE; } // Hal field -- bUcodeSupportsPrivAccessMap if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bUcodeSupportsPrivAccessMap = ((NvBool)(0 == 0)); + pThis->bUcodeSupportsPrivAccessMap = NV_TRUE; } // Hal field -- bRtvCbSupported if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bRtvCbSupported = ((NvBool)(0 == 0)); + pThis->bRtvCbSupported = NV_TRUE; } // Hal field -- bFecsRecordUcodeSeqnoSupported if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->bFecsRecordUcodeSeqnoSupported = ((NvBool)(0 != 0)); + pThis->bFecsRecordUcodeSeqnoSupported = NV_FALSE; } else if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ { if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->bFecsRecordUcodeSeqnoSupported = ((NvBool)(0 == 0)); + pThis->bFecsRecordUcodeSeqnoSupported = NV_TRUE; } // default else { - pThis->bFecsRecordUcodeSeqnoSupported = ((NvBool)(0 != 0)); + pThis->bFecsRecordUcodeSeqnoSupported = NV_FALSE; } } // Hal field -- bBug4208224WAREnabled if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->bBug4208224WAREnabled = ((NvBool)(0 != 0)); + pThis->bBug4208224WAREnabled = NV_FALSE; } else if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ { if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000000e0UL) )) /* ChipHal: TU102 | TU104 | TU106 */ { - pThis->bBug4208224WAREnabled = ((NvBool)(0 == 0)); + pThis->bBug4208224WAREnabled = NV_TRUE; } // default else { - pThis->bBug4208224WAREnabled = ((NvBool)(0 != 0)); + pThis->bBug4208224WAREnabled = NV_FALSE; } } } @@ -305,46 +329,6 @@ static void __nvoc_init_funcTable_KernelGraphics_1(KernelGraphics *pThis, RmHals PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // kgraphicsConstructEngine -- virtual override (engstate) base (engstate) - pThis->__kgraphicsConstructEngine__ = &kgraphicsConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelGraphics_engstateConstructEngine; - - // kgraphicsStateInitLocked -- virtual override (engstate) base (engstate) - pThis->__kgraphicsStateInitLocked__ = &kgraphicsStateInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelGraphics_engstateStateInitLocked; - - // kgraphicsStateLoad -- virtual override (engstate) base (engstate) - pThis->__kgraphicsStateLoad__ = &kgraphicsStateLoad_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelGraphics_engstateStateLoad; - - // kgraphicsStatePreUnload -- virtual override (engstate) base (engstate) - pThis->__kgraphicsStatePreUnload__ = &kgraphicsStatePreUnload_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_down_thunk_KernelGraphics_engstateStatePreUnload; - - // kgraphicsStateUnload -- virtual override (engstate) base (engstate) - pThis->__kgraphicsStateUnload__ = &kgraphicsStateUnload_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelGraphics_engstateStateUnload; - - // kgraphicsStateDestroy -- virtual override (engstate) base (engstate) - pThis->__kgraphicsStateDestroy__ = &kgraphicsStateDestroy_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelGraphics_engstateStateDestroy; - - // kgraphicsIsPresent -- virtual override (engstate) base (engstate) - pThis->__kgraphicsIsPresent__ = &kgraphicsIsPresent_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ = &__nvoc_down_thunk_KernelGraphics_engstateIsPresent; - - // kgraphicsStatePostLoad -- virtual override (engstate) base (engstate) - pThis->__kgraphicsStatePostLoad__ = &kgraphicsStatePostLoad_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_KernelGraphics_engstateStatePostLoad; - - // kgraphicsRegisterIntrService -- virtual override (intrserv) base (intrserv) - pThis->__kgraphicsRegisterIntrService__ = &kgraphicsRegisterIntrService_IMPL; - pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_KernelGraphics_intrservRegisterIntrService; - - // kgraphicsServiceNotificationInterrupt -- virtual override (intrserv) base (intrserv) - pThis->__kgraphicsServiceNotificationInterrupt__ = &kgraphicsServiceNotificationInterrupt_IMPL; - pThis->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_down_thunk_KernelGraphics_intrservServiceNotificationInterrupt; - // kgraphicsCreateBug4208224Channel -- halified (2 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000000e0UL) )) /* ChipHal: TU102 | TU104 | TU106 */ { @@ -377,7 +361,7 @@ static void __nvoc_init_funcTable_KernelGraphics_1(KernelGraphics *pThis, RmHals // kgraphicsIsBug4208224WARNeeded -- halified (3 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__kgraphicsIsBug4208224WARNeeded__ = &kgraphicsIsBug4208224WARNeeded_491d52; + pThis->__kgraphicsIsBug4208224WARNeeded__ = &kgraphicsIsBug4208224WARNeeded_3dd2c9; } else { @@ -388,7 +372,7 @@ static void __nvoc_init_funcTable_KernelGraphics_1(KernelGraphics *pThis, RmHals // default else { - pThis->__kgraphicsIsBug4208224WARNeeded__ = &kgraphicsIsBug4208224WARNeeded_491d52; + pThis->__kgraphicsIsBug4208224WARNeeded__ = &kgraphicsIsBug4208224WARNeeded_3dd2c9; } } @@ -402,18 +386,10 @@ static void __nvoc_init_funcTable_KernelGraphics_1(KernelGraphics *pThis, RmHals pThis->__kgraphicsLoadStaticInfo__ = &kgraphicsLoadStaticInfo_KERNEL; } - // kgraphicsClearInterrupt -- virtual halified (singleton optimized) override (intrserv) base (intrserv) - pThis->__kgraphicsClearInterrupt__ = &kgraphicsClearInterrupt_GP100; - pThis->__nvoc_base_IntrService.__intrservClearInterrupt__ = &__nvoc_down_thunk_KernelGraphics_intrservClearInterrupt; - - // kgraphicsServiceInterrupt -- virtual halified (singleton optimized) override (intrserv) base (intrserv) - pThis->__kgraphicsServiceInterrupt__ = &kgraphicsServiceInterrupt_GP100; - pThis->__nvoc_base_IntrService.__intrservServiceInterrupt__ = &__nvoc_down_thunk_KernelGraphics_intrservServiceInterrupt; - // kgraphicsIsUnrestrictedAccessMapSupported -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__kgraphicsIsUnrestrictedAccessMapSupported__ = &kgraphicsIsUnrestrictedAccessMapSupported_491d52; + pThis->__kgraphicsIsUnrestrictedAccessMapSupported__ = &kgraphicsIsUnrestrictedAccessMapSupported_3dd2c9; } // default else @@ -473,30 +449,67 @@ static void __nvoc_init_funcTable_KernelGraphics_1(KernelGraphics *pThis, RmHals pThis->__kgraphicsSetFecsTraceHwEnable__ = &kgraphicsSetFecsTraceHwEnable_GA100; } - // kgraphicsInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__kgraphicsInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kgraphicsInitMissing; - - // kgraphicsStatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__kgraphicsStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePreInitLocked; - - // kgraphicsStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kgraphicsStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePreInitUnlocked; - - // kgraphicsStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kgraphicsStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgraphicsStateInitUnlocked; - - // kgraphicsStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__kgraphicsStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePreLoad; - - // kgraphicsStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__kgraphicsStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePostUnload; -} // End __nvoc_init_funcTable_KernelGraphics_1 with approximately 53 basic block(s). + // kgraphicsIsCtxswLoggingEnabled -- halified (2 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__kgraphicsIsCtxswLoggingEnabled__ = &kgraphicsIsCtxswLoggingEnabled_920139; + } + else + { + pThis->__kgraphicsIsCtxswLoggingEnabled__ = &kgraphicsIsCtxswLoggingEnabled_FWCLIENT; + } +} // End __nvoc_init_funcTable_KernelGraphics_1 with approximately 25 basic block(s). -// Initialize vtable(s) for 27 virtual method(s). +// Initialize vtable(s) for 28 virtual method(s). void __nvoc_init_funcTable_KernelGraphics(KernelGraphics *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 27 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelGraphics vtable = { + .__kgraphicsConstructEngine__ = &kgraphicsConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelGraphics_engstateConstructEngine, // virtual + .__kgraphicsStateInitLocked__ = &kgraphicsStateInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelGraphics_engstateStateInitLocked, // virtual + .__kgraphicsStateLoad__ = &kgraphicsStateLoad_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelGraphics_engstateStateLoad, // virtual + .__kgraphicsStatePreUnload__ = &kgraphicsStatePreUnload_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_down_thunk_KernelGraphics_engstateStatePreUnload, // virtual + .__kgraphicsStateUnload__ = &kgraphicsStateUnload_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelGraphics_engstateStateUnload, // virtual + .__kgraphicsStateDestroy__ = &kgraphicsStateDestroy_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_KernelGraphics_engstateStateDestroy, // virtual + .__kgraphicsIsPresent__ = &kgraphicsIsPresent_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &__nvoc_down_thunk_KernelGraphics_engstateIsPresent, // virtual + .__kgraphicsStatePostLoad__ = &kgraphicsStatePostLoad_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_KernelGraphics_engstateStatePostLoad, // virtual + .__kgraphicsRegisterIntrService__ = &kgraphicsRegisterIntrService_IMPL, // virtual override (intrserv) base (intrserv) + .IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_KernelGraphics_intrservRegisterIntrService, // virtual + .__kgraphicsServiceNotificationInterrupt__ = &kgraphicsServiceNotificationInterrupt_IMPL, // virtual override (intrserv) base (intrserv) + .IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_down_thunk_KernelGraphics_intrservServiceNotificationInterrupt, // virtual + .__kgraphicsClearInterrupt__ = &kgraphicsClearInterrupt_GP100, // virtual halified (singleton optimized) override (intrserv) base (intrserv) + .IntrService.__intrservClearInterrupt__ = &__nvoc_down_thunk_KernelGraphics_intrservClearInterrupt, // virtual + .__kgraphicsServiceInterrupt__ = &kgraphicsServiceInterrupt_GP100, // virtual halified (singleton optimized) override (intrserv) base (intrserv) + .IntrService.__intrservServiceInterrupt__ = &__nvoc_down_thunk_KernelGraphics_intrservServiceInterrupt, // virtual + .__kgraphicsInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kgraphicsInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__kgraphicsStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePreInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__kgraphicsStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__kgraphicsStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgraphicsStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__kgraphicsStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__kgraphicsStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgraphicsStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_base_IntrService.__nvoc_vtable = &vtable.IntrService; // (intrserv) super + pThis->__nvoc_vtable = &vtable; // (kgraphics) this + + // Initialize vtable(s) with 10 per-object function pointer(s). __nvoc_init_funcTable_KernelGraphics_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_graphics_nvoc.h b/src/nvidia/generated/g_kernel_graphics_nvoc.h index 6185e641d4..1897968afa 100644 --- a/src/nvidia/generated/g_kernel_graphics_nvoc.h +++ b/src/nvidia/generated/g_kernel_graphics_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -184,10 +184,15 @@ typedef struct KGRAPHICS_FECS_TRACE_INFO KGRAPHICS_FECS_TRACE_INFO; #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelGraphics; + + struct KernelGraphics { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelGraphics *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -199,34 +204,17 @@ struct KernelGraphics { struct IntrService *__nvoc_pbase_IntrService; // intrserv super struct KernelGraphics *__nvoc_pbase_KernelGraphics; // kgraphics - // Vtable with 27 per-object function pointers - NV_STATUS (*__kgraphicsConstructEngine__)(OBJGPU *, struct KernelGraphics * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) - NV_STATUS (*__kgraphicsStateInitLocked__)(OBJGPU *, struct KernelGraphics * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__kgraphicsStateLoad__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__kgraphicsStatePreUnload__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__kgraphicsStateUnload__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual override (engstate) base (engstate) - void (*__kgraphicsStateDestroy__)(OBJGPU *, struct KernelGraphics * /*this*/); // virtual override (engstate) base (engstate) - NvBool (*__kgraphicsIsPresent__)(OBJGPU *, struct KernelGraphics * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__kgraphicsStatePostLoad__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual override (engstate) base (engstate) - void (*__kgraphicsRegisterIntrService__)(OBJGPU *, struct KernelGraphics * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) - NV_STATUS (*__kgraphicsServiceNotificationInterrupt__)(OBJGPU *, struct KernelGraphics * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual override (intrserv) base (intrserv) + // Vtable with 10 per-object function pointers NV_STATUS (*__kgraphicsCreateBug4208224Channel__)(OBJGPU *, struct KernelGraphics * /*this*/); // halified (2 hals) NV_STATUS (*__kgraphicsInitializeBug4208224WAR__)(OBJGPU *, struct KernelGraphics * /*this*/); // halified (3 hals) NvBool (*__kgraphicsIsBug4208224WARNeeded__)(OBJGPU *, struct KernelGraphics * /*this*/); // halified (3 hals) NV_STATUS (*__kgraphicsLoadStaticInfo__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // halified (2 hals) - NvBool (*__kgraphicsClearInterrupt__)(OBJGPU *, struct KernelGraphics * /*this*/, IntrServiceClearInterruptArguments *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) - NvU32 (*__kgraphicsServiceInterrupt__)(OBJGPU *, struct KernelGraphics * /*this*/, IntrServiceServiceInterruptArguments *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) NvBool (*__kgraphicsIsUnrestrictedAccessMapSupported__)(OBJGPU *, struct KernelGraphics * /*this*/); // halified (2 hals) NvU32 (*__kgraphicsGetFecsTraceRdOffset__)(OBJGPU *, struct KernelGraphics * /*this*/); // halified (2 hals) void (*__kgraphicsSetFecsTraceRdOffset__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // halified (3 hals) void (*__kgraphicsSetFecsTraceWrOffset__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // halified (3 hals) void (*__kgraphicsSetFecsTraceHwEnable__)(OBJGPU *, struct KernelGraphics * /*this*/, NvBool); // halified (3 hals) - void (*__kgraphicsInitMissing__)(struct OBJGPU *, struct KernelGraphics * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgraphicsStatePreInitLocked__)(struct OBJGPU *, struct KernelGraphics * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgraphicsStatePreInitUnlocked__)(struct OBJGPU *, struct KernelGraphics * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgraphicsStateInitUnlocked__)(struct OBJGPU *, struct KernelGraphics * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgraphicsStatePreLoad__)(struct OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgraphicsStatePostUnload__)(struct OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__kgraphicsIsCtxswLoggingEnabled__)(OBJGPU *, struct KernelGraphics * /*this*/); // halified (2 hals) body // Data members NvBool PRIVATE_FIELD(bCtxswLoggingSupported); @@ -234,6 +222,7 @@ struct KernelGraphics { NvBool PRIVATE_FIELD(bIntrDrivenCtxswLoggingEnabled); NvBool PRIVATE_FIELD(bBottomHalfCtxswLoggingEnabled); NvBool PRIVATE_FIELD(bOverrideContextBuffersToGpuCached); + NvBool PRIVATE_FIELD(bPeFiroBufferEnabled); NvBool PRIVATE_FIELD(bDeferContextInit); NvBool PRIVATE_FIELD(bPerSubcontextContextHeaderSupported); NvBool PRIVATE_FIELD(bSetContextBuffersGPUPrivileged); @@ -257,6 +246,7 @@ struct KernelGraphics_PRIVATE { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelGraphics *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -268,34 +258,17 @@ struct KernelGraphics_PRIVATE { struct IntrService *__nvoc_pbase_IntrService; // intrserv super struct KernelGraphics *__nvoc_pbase_KernelGraphics; // kgraphics - // Vtable with 27 per-object function pointers - NV_STATUS (*__kgraphicsConstructEngine__)(OBJGPU *, struct KernelGraphics * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) - NV_STATUS (*__kgraphicsStateInitLocked__)(OBJGPU *, struct KernelGraphics * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__kgraphicsStateLoad__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__kgraphicsStatePreUnload__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__kgraphicsStateUnload__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual override (engstate) base (engstate) - void (*__kgraphicsStateDestroy__)(OBJGPU *, struct KernelGraphics * /*this*/); // virtual override (engstate) base (engstate) - NvBool (*__kgraphicsIsPresent__)(OBJGPU *, struct KernelGraphics * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__kgraphicsStatePostLoad__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual override (engstate) base (engstate) - void (*__kgraphicsRegisterIntrService__)(OBJGPU *, struct KernelGraphics * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) - NV_STATUS (*__kgraphicsServiceNotificationInterrupt__)(OBJGPU *, struct KernelGraphics * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual override (intrserv) base (intrserv) + // Vtable with 10 per-object function pointers NV_STATUS (*__kgraphicsCreateBug4208224Channel__)(OBJGPU *, struct KernelGraphics * /*this*/); // halified (2 hals) NV_STATUS (*__kgraphicsInitializeBug4208224WAR__)(OBJGPU *, struct KernelGraphics * /*this*/); // halified (3 hals) NvBool (*__kgraphicsIsBug4208224WARNeeded__)(OBJGPU *, struct KernelGraphics * /*this*/); // halified (3 hals) NV_STATUS (*__kgraphicsLoadStaticInfo__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // halified (2 hals) - NvBool (*__kgraphicsClearInterrupt__)(OBJGPU *, struct KernelGraphics * /*this*/, IntrServiceClearInterruptArguments *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) - NvU32 (*__kgraphicsServiceInterrupt__)(OBJGPU *, struct KernelGraphics * /*this*/, IntrServiceServiceInterruptArguments *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) NvBool (*__kgraphicsIsUnrestrictedAccessMapSupported__)(OBJGPU *, struct KernelGraphics * /*this*/); // halified (2 hals) NvU32 (*__kgraphicsGetFecsTraceRdOffset__)(OBJGPU *, struct KernelGraphics * /*this*/); // halified (2 hals) void (*__kgraphicsSetFecsTraceRdOffset__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // halified (3 hals) void (*__kgraphicsSetFecsTraceWrOffset__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // halified (3 hals) void (*__kgraphicsSetFecsTraceHwEnable__)(OBJGPU *, struct KernelGraphics * /*this*/, NvBool); // halified (3 hals) - void (*__kgraphicsInitMissing__)(struct OBJGPU *, struct KernelGraphics * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgraphicsStatePreInitLocked__)(struct OBJGPU *, struct KernelGraphics * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgraphicsStatePreInitUnlocked__)(struct OBJGPU *, struct KernelGraphics * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgraphicsStateInitUnlocked__)(struct OBJGPU *, struct KernelGraphics * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgraphicsStatePreLoad__)(struct OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgraphicsStatePostUnload__)(struct OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__kgraphicsIsCtxswLoggingEnabled__)(OBJGPU *, struct KernelGraphics * /*this*/); // halified (2 hals) body // Data members NvBool bCtxswLoggingSupported; @@ -303,6 +276,7 @@ struct KernelGraphics_PRIVATE { NvBool bIntrDrivenCtxswLoggingEnabled; NvBool bBottomHalfCtxswLoggingEnabled; NvBool bOverrideContextBuffersToGpuCached; + NvBool bPeFiroBufferEnabled; NvBool bDeferContextInit; NvBool bPerSubcontextContextHeaderSupported; NvBool bSetContextBuffersGPUPrivileged; @@ -321,6 +295,32 @@ struct KernelGraphics_PRIVATE { struct KGRAPHICS_BUG4208224_CONTEXT_INFO bug4208224Info; }; + +// Metadata including vtable with 18 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelGraphics { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + const struct NVOC_VTABLE__IntrService IntrService; // (intrserv) 4 function pointers + + NV_STATUS (*__kgraphicsConstructEngine__)(OBJGPU *, struct KernelGraphics * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgraphicsStateInitLocked__)(OBJGPU *, struct KernelGraphics * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgraphicsStateLoad__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgraphicsStatePreUnload__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgraphicsStateUnload__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual override (engstate) base (engstate) + void (*__kgraphicsStateDestroy__)(OBJGPU *, struct KernelGraphics * /*this*/); // virtual override (engstate) base (engstate) + NvBool (*__kgraphicsIsPresent__)(OBJGPU *, struct KernelGraphics * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgraphicsStatePostLoad__)(OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual override (engstate) base (engstate) + void (*__kgraphicsRegisterIntrService__)(OBJGPU *, struct KernelGraphics * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) + NV_STATUS (*__kgraphicsServiceNotificationInterrupt__)(OBJGPU *, struct KernelGraphics * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual override (intrserv) base (intrserv) + NvBool (*__kgraphicsClearInterrupt__)(OBJGPU *, struct KernelGraphics * /*this*/, IntrServiceClearInterruptArguments *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) + NvU32 (*__kgraphicsServiceInterrupt__)(OBJGPU *, struct KernelGraphics * /*this*/, IntrServiceServiceInterruptArguments *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) + void (*__kgraphicsInitMissing__)(struct OBJGPU *, struct KernelGraphics * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgraphicsStatePreInitLocked__)(struct OBJGPU *, struct KernelGraphics * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgraphicsStatePreInitUnlocked__)(struct OBJGPU *, struct KernelGraphics * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgraphicsStateInitUnlocked__)(struct OBJGPU *, struct KernelGraphics * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgraphicsStatePreLoad__)(struct OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgraphicsStatePostUnload__)(struct OBJGPU *, struct KernelGraphics * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) +}; + #ifndef __NVOC_CLASS_KernelGraphics_TYPEDEF__ #define __NVOC_CLASS_KernelGraphics_TYPEDEF__ typedef struct KernelGraphics KernelGraphics; @@ -355,25 +355,25 @@ NV_STATUS __nvoc_objCreate_KernelGraphics(KernelGraphics**, Dynamic*, NvU32); // Wrapper macros -#define kgraphicsConstructEngine_FNPTR(arg_this) arg_this->__kgraphicsConstructEngine__ +#define kgraphicsConstructEngine_FNPTR(arg_this) arg_this->__nvoc_vtable->__kgraphicsConstructEngine__ #define kgraphicsConstructEngine(arg1, arg_this, arg3) kgraphicsConstructEngine_DISPATCH(arg1, arg_this, arg3) -#define kgraphicsStateInitLocked_FNPTR(arg_this) arg_this->__kgraphicsStateInitLocked__ +#define kgraphicsStateInitLocked_FNPTR(arg_this) arg_this->__nvoc_vtable->__kgraphicsStateInitLocked__ #define kgraphicsStateInitLocked(arg1, arg_this) kgraphicsStateInitLocked_DISPATCH(arg1, arg_this) -#define kgraphicsStateLoad_FNPTR(arg_this) arg_this->__kgraphicsStateLoad__ +#define kgraphicsStateLoad_FNPTR(arg_this) arg_this->__nvoc_vtable->__kgraphicsStateLoad__ #define kgraphicsStateLoad(arg1, arg_this, flags) kgraphicsStateLoad_DISPATCH(arg1, arg_this, flags) -#define kgraphicsStatePreUnload_FNPTR(arg_this) arg_this->__kgraphicsStatePreUnload__ +#define kgraphicsStatePreUnload_FNPTR(arg_this) arg_this->__nvoc_vtable->__kgraphicsStatePreUnload__ #define kgraphicsStatePreUnload(pGpu, arg_this, flags) kgraphicsStatePreUnload_DISPATCH(pGpu, arg_this, flags) -#define kgraphicsStateUnload_FNPTR(arg_this) arg_this->__kgraphicsStateUnload__ +#define kgraphicsStateUnload_FNPTR(arg_this) arg_this->__nvoc_vtable->__kgraphicsStateUnload__ #define kgraphicsStateUnload(arg1, arg_this, flags) kgraphicsStateUnload_DISPATCH(arg1, arg_this, flags) -#define kgraphicsStateDestroy_FNPTR(arg_this) arg_this->__kgraphicsStateDestroy__ +#define kgraphicsStateDestroy_FNPTR(arg_this) arg_this->__nvoc_vtable->__kgraphicsStateDestroy__ #define kgraphicsStateDestroy(arg1, arg_this) kgraphicsStateDestroy_DISPATCH(arg1, arg_this) -#define kgraphicsIsPresent_FNPTR(arg_this) arg_this->__kgraphicsIsPresent__ +#define kgraphicsIsPresent_FNPTR(arg_this) arg_this->__nvoc_vtable->__kgraphicsIsPresent__ #define kgraphicsIsPresent(arg1, arg_this) kgraphicsIsPresent_DISPATCH(arg1, arg_this) -#define kgraphicsStatePostLoad_FNPTR(arg_this) arg_this->__kgraphicsStatePostLoad__ +#define kgraphicsStatePostLoad_FNPTR(arg_this) arg_this->__nvoc_vtable->__kgraphicsStatePostLoad__ #define kgraphicsStatePostLoad(arg1, arg_this, flags) kgraphicsStatePostLoad_DISPATCH(arg1, arg_this, flags) -#define kgraphicsRegisterIntrService_FNPTR(arg_this) arg_this->__kgraphicsRegisterIntrService__ +#define kgraphicsRegisterIntrService_FNPTR(arg_this) arg_this->__nvoc_vtable->__kgraphicsRegisterIntrService__ #define kgraphicsRegisterIntrService(arg1, arg_this, arg3) kgraphicsRegisterIntrService_DISPATCH(arg1, arg_this, arg3) -#define kgraphicsServiceNotificationInterrupt_FNPTR(arg_this) arg_this->__kgraphicsServiceNotificationInterrupt__ +#define kgraphicsServiceNotificationInterrupt_FNPTR(arg_this) arg_this->__nvoc_vtable->__kgraphicsServiceNotificationInterrupt__ #define kgraphicsServiceNotificationInterrupt(arg1, arg_this, arg3) kgraphicsServiceNotificationInterrupt_DISPATCH(arg1, arg_this, arg3) #define kgraphicsCreateBug4208224Channel_FNPTR(arg_this) arg_this->__kgraphicsCreateBug4208224Channel__ #define kgraphicsCreateBug4208224Channel(arg1, arg_this) kgraphicsCreateBug4208224Channel_DISPATCH(arg1, arg_this) @@ -387,10 +387,10 @@ NV_STATUS __nvoc_objCreate_KernelGraphics(KernelGraphics**, Dynamic*, NvU32); #define kgraphicsLoadStaticInfo_FNPTR(arg_this) arg_this->__kgraphicsLoadStaticInfo__ #define kgraphicsLoadStaticInfo(arg1, arg_this, swizzId) kgraphicsLoadStaticInfo_DISPATCH(arg1, arg_this, swizzId) #define kgraphicsLoadStaticInfo_HAL(arg1, arg_this, swizzId) kgraphicsLoadStaticInfo_DISPATCH(arg1, arg_this, swizzId) -#define kgraphicsClearInterrupt_FNPTR(arg_this) arg_this->__kgraphicsClearInterrupt__ +#define kgraphicsClearInterrupt_FNPTR(arg_this) arg_this->__nvoc_vtable->__kgraphicsClearInterrupt__ #define kgraphicsClearInterrupt(arg1, arg_this, arg3) kgraphicsClearInterrupt_DISPATCH(arg1, arg_this, arg3) #define kgraphicsClearInterrupt_HAL(arg1, arg_this, arg3) kgraphicsClearInterrupt_DISPATCH(arg1, arg_this, arg3) -#define kgraphicsServiceInterrupt_FNPTR(arg_this) arg_this->__kgraphicsServiceInterrupt__ +#define kgraphicsServiceInterrupt_FNPTR(arg_this) arg_this->__nvoc_vtable->__kgraphicsServiceInterrupt__ #define kgraphicsServiceInterrupt(arg1, arg_this, arg3) kgraphicsServiceInterrupt_DISPATCH(arg1, arg_this, arg3) #define kgraphicsServiceInterrupt_HAL(arg1, arg_this, arg3) kgraphicsServiceInterrupt_DISPATCH(arg1, arg_this, arg3) #define kgraphicsIsUnrestrictedAccessMapSupported_FNPTR(arg_this) arg_this->__kgraphicsIsUnrestrictedAccessMapSupported__ @@ -408,58 +408,61 @@ NV_STATUS __nvoc_objCreate_KernelGraphics(KernelGraphics**, Dynamic*, NvU32); #define kgraphicsSetFecsTraceHwEnable_FNPTR(arg_this) arg_this->__kgraphicsSetFecsTraceHwEnable__ #define kgraphicsSetFecsTraceHwEnable(arg1, arg_this, bEnable) kgraphicsSetFecsTraceHwEnable_DISPATCH(arg1, arg_this, bEnable) #define kgraphicsSetFecsTraceHwEnable_HAL(arg1, arg_this, bEnable) kgraphicsSetFecsTraceHwEnable_DISPATCH(arg1, arg_this, bEnable) -#define kgraphicsInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define kgraphicsIsCtxswLoggingEnabled_FNPTR(pKernelGraphics) pKernelGraphics->__kgraphicsIsCtxswLoggingEnabled__ +#define kgraphicsIsCtxswLoggingEnabled(pGpu, pKernelGraphics) kgraphicsIsCtxswLoggingEnabled_DISPATCH(pGpu, pKernelGraphics) +#define kgraphicsIsCtxswLoggingEnabled_HAL(pGpu, pKernelGraphics) kgraphicsIsCtxswLoggingEnabled_DISPATCH(pGpu, pKernelGraphics) +#define kgraphicsInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define kgraphicsInitMissing(pGpu, pEngstate) kgraphicsInitMissing_DISPATCH(pGpu, pEngstate) -#define kgraphicsStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define kgraphicsStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define kgraphicsStatePreInitLocked(pGpu, pEngstate) kgraphicsStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define kgraphicsStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define kgraphicsStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define kgraphicsStatePreInitUnlocked(pGpu, pEngstate) kgraphicsStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kgraphicsStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kgraphicsStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define kgraphicsStateInitUnlocked(pGpu, pEngstate) kgraphicsStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kgraphicsStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kgraphicsStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define kgraphicsStatePreLoad(pGpu, pEngstate, arg3) kgraphicsStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kgraphicsStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kgraphicsStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define kgraphicsStatePostUnload(pGpu, pEngstate, arg3) kgraphicsStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) // Dispatch functions static inline NV_STATUS kgraphicsConstructEngine_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this, ENGDESCRIPTOR arg3) { - return arg_this->__kgraphicsConstructEngine__(arg1, arg_this, arg3); + return arg_this->__nvoc_vtable->__kgraphicsConstructEngine__(arg1, arg_this, arg3); } static inline NV_STATUS kgraphicsStateInitLocked_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this) { - return arg_this->__kgraphicsStateInitLocked__(arg1, arg_this); + return arg_this->__nvoc_vtable->__kgraphicsStateInitLocked__(arg1, arg_this); } static inline NV_STATUS kgraphicsStateLoad_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this, NvU32 flags) { - return arg_this->__kgraphicsStateLoad__(arg1, arg_this, flags); + return arg_this->__nvoc_vtable->__kgraphicsStateLoad__(arg1, arg_this, flags); } static inline NV_STATUS kgraphicsStatePreUnload_DISPATCH(OBJGPU *pGpu, struct KernelGraphics *arg_this, NvU32 flags) { - return arg_this->__kgraphicsStatePreUnload__(pGpu, arg_this, flags); + return arg_this->__nvoc_vtable->__kgraphicsStatePreUnload__(pGpu, arg_this, flags); } static inline NV_STATUS kgraphicsStateUnload_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this, NvU32 flags) { - return arg_this->__kgraphicsStateUnload__(arg1, arg_this, flags); + return arg_this->__nvoc_vtable->__kgraphicsStateUnload__(arg1, arg_this, flags); } static inline void kgraphicsStateDestroy_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this) { - arg_this->__kgraphicsStateDestroy__(arg1, arg_this); + arg_this->__nvoc_vtable->__kgraphicsStateDestroy__(arg1, arg_this); } static inline NvBool kgraphicsIsPresent_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this) { - return arg_this->__kgraphicsIsPresent__(arg1, arg_this); + return arg_this->__nvoc_vtable->__kgraphicsIsPresent__(arg1, arg_this); } static inline NV_STATUS kgraphicsStatePostLoad_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this, NvU32 flags) { - return arg_this->__kgraphicsStatePostLoad__(arg1, arg_this, flags); + return arg_this->__nvoc_vtable->__kgraphicsStatePostLoad__(arg1, arg_this, flags); } static inline void kgraphicsRegisterIntrService_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this, IntrServiceRecord arg3[175]) { - arg_this->__kgraphicsRegisterIntrService__(arg1, arg_this, arg3); + arg_this->__nvoc_vtable->__kgraphicsRegisterIntrService__(arg1, arg_this, arg3); } static inline NV_STATUS kgraphicsServiceNotificationInterrupt_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3) { - return arg_this->__kgraphicsServiceNotificationInterrupt__(arg1, arg_this, arg3); + return arg_this->__nvoc_vtable->__kgraphicsServiceNotificationInterrupt__(arg1, arg_this, arg3); } static inline NV_STATUS kgraphicsCreateBug4208224Channel_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this) { @@ -479,11 +482,11 @@ static inline NV_STATUS kgraphicsLoadStaticInfo_DISPATCH(OBJGPU *arg1, struct Ke } static inline NvBool kgraphicsClearInterrupt_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this, IntrServiceClearInterruptArguments *arg3) { - return arg_this->__kgraphicsClearInterrupt__(arg1, arg_this, arg3); + return arg_this->__nvoc_vtable->__kgraphicsClearInterrupt__(arg1, arg_this, arg3); } static inline NvU32 kgraphicsServiceInterrupt_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this, IntrServiceServiceInterruptArguments *arg3) { - return arg_this->__kgraphicsServiceInterrupt__(arg1, arg_this, arg3); + return arg_this->__nvoc_vtable->__kgraphicsServiceInterrupt__(arg1, arg_this, arg3); } static inline NvBool kgraphicsIsUnrestrictedAccessMapSupported_DISPATCH(OBJGPU *arg1, struct KernelGraphics *arg_this) { @@ -506,32 +509,36 @@ static inline void kgraphicsSetFecsTraceHwEnable_DISPATCH(OBJGPU *arg1, struct K arg_this->__kgraphicsSetFecsTraceHwEnable__(arg1, arg_this, bEnable); } +static inline NvBool kgraphicsIsCtxswLoggingEnabled_DISPATCH(OBJGPU *pGpu, struct KernelGraphics *pKernelGraphics) { + return pKernelGraphics->__kgraphicsIsCtxswLoggingEnabled__(pGpu, pKernelGraphics); +} + static inline void kgraphicsInitMissing_DISPATCH(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate) { - pEngstate->__kgraphicsInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kgraphicsInitMissing__(pGpu, pEngstate); } static inline NV_STATUS kgraphicsStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate) { - return pEngstate->__kgraphicsStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kgraphicsStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS kgraphicsStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate) { - return pEngstate->__kgraphicsStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kgraphicsStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kgraphicsStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate) { - return pEngstate->__kgraphicsStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kgraphicsStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kgraphicsStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate, NvU32 arg3) { - return pEngstate->__kgraphicsStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kgraphicsStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kgraphicsStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelGraphics *pEngstate, NvU32 arg3) { - return pEngstate->__kgraphicsStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kgraphicsStatePostUnload__(pGpu, pEngstate, arg3); } -static inline NvBool kgraphicsShouldForceMainCtxContiguity_cbe027(OBJGPU *arg1, struct KernelGraphics *arg2) { - return ((NvBool)(0 == 0)); +static inline NvBool kgraphicsShouldForceMainCtxContiguity_88bc07(OBJGPU *arg1, struct KernelGraphics *arg2) { + return NV_TRUE; } @@ -541,7 +548,7 @@ static inline NvBool kgraphicsShouldForceMainCtxContiguity(OBJGPU *arg1, struct return NV_FALSE; } #else //__nvoc_kernel_graphics_h_disabled -#define kgraphicsShouldForceMainCtxContiguity(arg1, arg2) kgraphicsShouldForceMainCtxContiguity_cbe027(arg1, arg2) +#define kgraphicsShouldForceMainCtxContiguity(arg1, arg2) kgraphicsShouldForceMainCtxContiguity_88bc07(arg1, arg2) #endif //__nvoc_kernel_graphics_h_disabled #define kgraphicsShouldForceMainCtxContiguity_HAL(arg1, arg2) kgraphicsShouldForceMainCtxContiguity(arg1, arg2) @@ -616,6 +623,22 @@ static inline void kgraphicsInitFecsRegistryOverrides(OBJGPU *arg1, struct Kerne #define kgraphicsInitFecsRegistryOverrides_HAL(arg1, arg2) kgraphicsInitFecsRegistryOverrides(arg1, arg2) +static inline void kgraphicsSetCtxswLoggingEnabled_fdfbe2(OBJGPU *pGpu, struct KernelGraphics *pKernelGraphics, NvBool bEnabled) { + struct KernelGraphics_PRIVATE *pKernelGraphics_PRIVATE = (struct KernelGraphics_PRIVATE *)pKernelGraphics; + pKernelGraphics_PRIVATE->bCtxswLoggingEnabled = bEnabled; +} + + +#ifdef __nvoc_kernel_graphics_h_disabled +static inline void kgraphicsSetCtxswLoggingEnabled(OBJGPU *pGpu, struct KernelGraphics *pKernelGraphics, NvBool bEnabled) { + NV_ASSERT_FAILED_PRECOMP("KernelGraphics was disabled!"); +} +#else //__nvoc_kernel_graphics_h_disabled +#define kgraphicsSetCtxswLoggingEnabled(pGpu, pKernelGraphics, bEnabled) kgraphicsSetCtxswLoggingEnabled_fdfbe2(pGpu, pKernelGraphics, bEnabled) +#endif //__nvoc_kernel_graphics_h_disabled + +#define kgraphicsSetCtxswLoggingEnabled_HAL(pGpu, pKernelGraphics, bEnabled) kgraphicsSetCtxswLoggingEnabled(pGpu, pKernelGraphics, bEnabled) + NV_STATUS kgraphicsConstructEngine_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2, ENGDESCRIPTOR arg3); NV_STATUS kgraphicsStateInitLocked_IMPL(OBJGPU *arg1, struct KernelGraphics *arg2); @@ -648,8 +671,8 @@ static inline NV_STATUS kgraphicsInitializeBug4208224WAR_56cd7a(OBJGPU *arg1, st NV_STATUS kgraphicsInitializeBug4208224WAR_TU102(OBJGPU *arg1, struct KernelGraphics *arg2); -static inline NvBool kgraphicsIsBug4208224WARNeeded_491d52(OBJGPU *arg1, struct KernelGraphics *arg2) { - return ((NvBool)(0 != 0)); +static inline NvBool kgraphicsIsBug4208224WARNeeded_3dd2c9(OBJGPU *arg1, struct KernelGraphics *arg2) { + return NV_FALSE; } NvBool kgraphicsIsBug4208224WARNeeded_TU102(OBJGPU *arg1, struct KernelGraphics *arg2); @@ -662,8 +685,8 @@ NvBool kgraphicsClearInterrupt_GP100(OBJGPU *arg1, struct KernelGraphics *arg2, NvU32 kgraphicsServiceInterrupt_GP100(OBJGPU *arg1, struct KernelGraphics *arg2, IntrServiceServiceInterruptArguments *arg3); -static inline NvBool kgraphicsIsUnrestrictedAccessMapSupported_491d52(OBJGPU *arg1, struct KernelGraphics *arg2) { - return ((NvBool)(0 != 0)); +static inline NvBool kgraphicsIsUnrestrictedAccessMapSupported_3dd2c9(OBJGPU *arg1, struct KernelGraphics *arg2) { + return NV_FALSE; } NvBool kgraphicsIsUnrestrictedAccessMapSupported_PF(OBJGPU *arg1, struct KernelGraphics *arg2); @@ -692,6 +715,13 @@ void kgraphicsSetFecsTraceHwEnable_GA100(OBJGPU *arg1, struct KernelGraphics *ar void kgraphicsSetFecsTraceHwEnable_GB100(OBJGPU *arg1, struct KernelGraphics *arg2, NvBool bEnable); +NvBool kgraphicsIsCtxswLoggingEnabled_FWCLIENT(OBJGPU *pGpu, struct KernelGraphics *pKernelGraphics); + +static inline NvBool kgraphicsIsCtxswLoggingEnabled_920139(OBJGPU *pGpu, struct KernelGraphics *pKernelGraphics) { + struct KernelGraphics_PRIVATE *pKernelGraphics_PRIVATE = (struct KernelGraphics_PRIVATE *)pKernelGraphics; + return pKernelGraphics_PRIVATE->bCtxswLoggingEnabled; +} + static inline KGRAPHICS_FECS_TRACE_INFO *kgraphicsGetFecsTraceInfo(OBJGPU *pGpu, struct KernelGraphics *pKernelGraphics) { struct KernelGraphics_PRIVATE *pKernelGraphics_PRIVATE = (struct KernelGraphics_PRIVATE *)pKernelGraphics; return pKernelGraphics_PRIVATE->pFecsTraceInfo; @@ -712,16 +742,6 @@ static inline void kgraphicsSetCtxswLoggingSupported(OBJGPU *pGpu, struct Kernel pKernelGraphics_PRIVATE->bCtxswLoggingSupported = bProp; } -static inline NvBool kgraphicsIsCtxswLoggingEnabled(OBJGPU *pGpu, struct KernelGraphics *pKernelGraphics) { - struct KernelGraphics_PRIVATE *pKernelGraphics_PRIVATE = (struct KernelGraphics_PRIVATE *)pKernelGraphics; - return pKernelGraphics_PRIVATE->bCtxswLoggingEnabled; -} - -static inline void kgraphicsSetCtxswLoggingEnabled(OBJGPU *pGpu, struct KernelGraphics *pKernelGraphics, NvBool bProp) { - struct KernelGraphics_PRIVATE *pKernelGraphics_PRIVATE = (struct KernelGraphics_PRIVATE *)pKernelGraphics; - pKernelGraphics_PRIVATE->bCtxswLoggingEnabled = bProp; -} - static inline NvBool kgraphicsIsIntrDrivenCtxswLoggingEnabled(OBJGPU *pGpu, struct KernelGraphics *pKernelGraphics) { struct KernelGraphics_PRIVATE *pKernelGraphics_PRIVATE = (struct KernelGraphics_PRIVATE *)pKernelGraphics; return pKernelGraphics_PRIVATE->bIntrDrivenCtxswLoggingEnabled; @@ -752,6 +772,16 @@ static inline void kgraphicsSetOverrideContextBuffersToGpuCached(OBJGPU *pGpu, s pKernelGraphics_PRIVATE->bOverrideContextBuffersToGpuCached = bProp; } +static inline NvBool kgraphicsGetPeFiroBufferEnabled(OBJGPU *pGpu, struct KernelGraphics *pKernelGraphics) { + struct KernelGraphics_PRIVATE *pKernelGraphics_PRIVATE = (struct KernelGraphics_PRIVATE *)pKernelGraphics; + return pKernelGraphics_PRIVATE->bPeFiroBufferEnabled; +} + +static inline void kgraphicsSetPeFiroBufferEnabled(OBJGPU *pGpu, struct KernelGraphics *pKernelGraphics, NvBool bProp) { + struct KernelGraphics_PRIVATE *pKernelGraphics_PRIVATE = (struct KernelGraphics_PRIVATE *)pKernelGraphics; + pKernelGraphics_PRIVATE->bPeFiroBufferEnabled = bProp; +} + static inline NvBool kgraphicsShouldDeferContextInit(OBJGPU *pGpu, struct KernelGraphics *pKernelGraphics) { struct KernelGraphics_PRIVATE *pKernelGraphics_PRIVATE = (struct KernelGraphics_PRIVATE *)pKernelGraphics; return pKernelGraphics_PRIVATE->bDeferContextInit; diff --git a/src/nvidia/generated/g_kernel_graphics_object_nvoc.c b/src/nvidia/generated/g_kernel_graphics_object_nvoc.c index 9e5f74ecee..06ef08c829 100644 --- a/src/nvidia/generated/g_kernel_graphics_object_nvoc.c +++ b/src/nvidia/generated/g_kernel_graphics_object_nvoc.c @@ -120,168 +120,278 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGraphicsObject = /*pExportInfo=*/ &__nvoc_export_info_KernelGraphicsObject }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super^2 +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super^2 +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap(struct RmResource *pChannelDescendant, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_down_thunk_KernelGraphicsObject_rmresGetMemInterMapParams(struct RmResource *arg_this, RMRES_MEM_INTER_MAP_PARAMS *arg2); // this + // 1 down-thunk(s) defined to bridge methods in KernelGraphicsObject from superclasses // kgrobjGetMemInterMapParams: virtual override (rmres) base (chandes) -static NV_STATUS __nvoc_down_thunk_KernelGraphicsObject_rmresGetMemInterMapParams(struct RmResource *arg_this, RMRES_MEM_INTER_MAP_PARAMS *arg2) { +NV_STATUS __nvoc_down_thunk_KernelGraphicsObject_rmresGetMemInterMapParams(struct RmResource *arg_this, RMRES_MEM_INTER_MAP_PARAMS *arg2) { return kgrobjGetMemInterMapParams((struct KernelGraphicsObject *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelGraphicsObject_RmResource.offset), arg2); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^3 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^3 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^3 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super^2 +NV_STATUS __nvoc_up_thunk_GpuResource_chandesControl(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesMap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesUnmap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_GpuResource_chandesShareCallback(struct ChannelDescendant *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize(struct ChannelDescendant *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesInternalControlForward(struct ChannelDescendant *pGpuResource, NvU32 command, void *pParams, NvU32 size); // super +NvHandle __nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle(struct ChannelDescendant *pGpuResource); // super +NvBool __nvoc_up_thunk_RmResource_chandesAccessCallback(struct ChannelDescendant *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemInterMapParams(struct ChannelDescendant *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor(struct ChannelDescendant *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControl_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControl_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesCanCopy(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesIsDuplicate(struct ChannelDescendant *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_chandesPreDestruct(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesControlFilter(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesMapTo(struct ChannelDescendant *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesUnmapFrom(struct ChannelDescendant *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_chandesGetRefCount(struct ChannelDescendant *pResource); // super +void __nvoc_up_thunk_RsResource_chandesAddAdditionalDependants(struct RsClient *pClient, struct ChannelDescendant *pResource, RsResourceRef *pReference); // super +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_chandesGetNotificationListPtr(struct ChannelDescendant *pNotifier); // super +struct NotifShare * __nvoc_up_thunk_Notifier_chandesGetNotificationShare(struct ChannelDescendant *pNotifier); // super +void __nvoc_up_thunk_Notifier_chandesSetNotificationShare(struct ChannelDescendant *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesUnregisterEvent(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_up_thunk_ChannelDescendant_kgrobjGetSwMethods(struct KernelGraphicsObject *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods); // this +NvBool __nvoc_up_thunk_ChannelDescendant_kgrobjIsSwMethodStalling(struct KernelGraphicsObject *pChannelDescendant, NvU32 hHandle); // this +NV_STATUS __nvoc_up_thunk_ChannelDescendant_kgrobjCheckMemInterUnmap(struct KernelGraphicsObject *pChannelDescendant, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjControl(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjMap(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjUnmap(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_kgrobjShareCallback(struct KernelGraphicsObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjGetRegBaseOffsetAndSize(struct KernelGraphicsObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjGetMapAddrSpace(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjInternalControlForward(struct KernelGraphicsObject *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_kgrobjGetInternalObjectHandle(struct KernelGraphicsObject *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_kgrobjAccessCallback(struct KernelGraphicsObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_kgrobjGetMemoryMappingDescriptor(struct KernelGraphicsObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_kgrobjControlSerialization_Prologue(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_kgrobjControlSerialization_Epilogue(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_kgrobjControl_Prologue(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_kgrobjControl_Epilogue(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_kgrobjCanCopy(struct KernelGraphicsObject *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_kgrobjIsDuplicate(struct KernelGraphicsObject *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_kgrobjPreDestruct(struct KernelGraphicsObject *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_kgrobjControlFilter(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_kgrobjIsPartialUnmapSupported(struct KernelGraphicsObject *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_kgrobjMapTo(struct KernelGraphicsObject *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_kgrobjUnmapFrom(struct KernelGraphicsObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_kgrobjGetRefCount(struct KernelGraphicsObject *pResource); // this +void __nvoc_up_thunk_RsResource_kgrobjAddAdditionalDependants(struct RsClient *pClient, struct KernelGraphicsObject *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_kgrobjGetNotificationListPtr(struct KernelGraphicsObject *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_kgrobjGetNotificationShare(struct KernelGraphicsObject *pNotifier); // this +void __nvoc_up_thunk_Notifier_kgrobjSetNotificationShare(struct KernelGraphicsObject *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_kgrobjUnregisterEvent(struct KernelGraphicsObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_kgrobjGetOrAllocNotifShare(struct KernelGraphicsObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 31 up-thunk(s) defined to bridge methods in KernelGraphicsObject to superclasses // kgrobjGetSwMethods: virtual inherited (chandes) base (chandes) -static NV_STATUS __nvoc_up_thunk_ChannelDescendant_kgrobjGetSwMethods(struct KernelGraphicsObject *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { +NV_STATUS __nvoc_up_thunk_ChannelDescendant_kgrobjGetSwMethods(struct KernelGraphicsObject *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { return chandesGetSwMethods((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_KernelGraphicsObject_ChannelDescendant.offset), ppMethods, pNumMethods); } // kgrobjIsSwMethodStalling: virtual inherited (chandes) base (chandes) -static NvBool __nvoc_up_thunk_ChannelDescendant_kgrobjIsSwMethodStalling(struct KernelGraphicsObject *pChannelDescendant, NvU32 hHandle) { +NvBool __nvoc_up_thunk_ChannelDescendant_kgrobjIsSwMethodStalling(struct KernelGraphicsObject *pChannelDescendant, NvU32 hHandle) { return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_KernelGraphicsObject_ChannelDescendant.offset), hHandle); } // kgrobjCheckMemInterUnmap: virtual inherited (chandes) base (chandes) -static NV_STATUS __nvoc_up_thunk_ChannelDescendant_kgrobjCheckMemInterUnmap(struct KernelGraphicsObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_ChannelDescendant_kgrobjCheckMemInterUnmap(struct KernelGraphicsObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_KernelGraphicsObject_ChannelDescendant.offset), bSubdeviceHandleProvided); } // kgrobjControl: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjControl(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjControl(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset), pCallContext, pParams); } // kgrobjMap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjMap(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjMap(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // kgrobjUnmap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjUnmap(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjUnmap(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset), pCallContext, pCpuMapping); } // kgrobjShareCallback: virtual inherited (gpures) base (chandes) -static NvBool __nvoc_up_thunk_GpuResource_kgrobjShareCallback(struct KernelGraphicsObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_kgrobjShareCallback(struct KernelGraphicsObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // kgrobjGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjGetRegBaseOffsetAndSize(struct KernelGraphicsObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjGetRegBaseOffsetAndSize(struct KernelGraphicsObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset), pGpu, pOffset, pSize); } // kgrobjGetMapAddrSpace: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjGetMapAddrSpace(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjGetMapAddrSpace(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // kgrobjInternalControlForward: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjInternalControlForward(struct KernelGraphicsObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_kgrobjInternalControlForward(struct KernelGraphicsObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset), command, pParams, size); } // kgrobjGetInternalObjectHandle: virtual inherited (gpures) base (chandes) -static NvHandle __nvoc_up_thunk_GpuResource_kgrobjGetInternalObjectHandle(struct KernelGraphicsObject *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_kgrobjGetInternalObjectHandle(struct KernelGraphicsObject *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelGraphicsObject_GpuResource.offset)); } // kgrobjAccessCallback: virtual inherited (rmres) base (chandes) -static NvBool __nvoc_up_thunk_RmResource_kgrobjAccessCallback(struct KernelGraphicsObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_kgrobjAccessCallback(struct KernelGraphicsObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // kgrobjGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_kgrobjGetMemoryMappingDescriptor(struct KernelGraphicsObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_kgrobjGetMemoryMappingDescriptor(struct KernelGraphicsObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelGraphicsObject_RmResource.offset), ppMemDesc); } // kgrobjControlSerialization_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_kgrobjControlSerialization_Prologue(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_kgrobjControlSerialization_Prologue(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RmResource.offset), pCallContext, pParams); } // kgrobjControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_kgrobjControlSerialization_Epilogue(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_kgrobjControlSerialization_Epilogue(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RmResource.offset), pCallContext, pParams); } // kgrobjControl_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_kgrobjControl_Prologue(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_kgrobjControl_Prologue(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RmResource.offset), pCallContext, pParams); } // kgrobjControl_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_kgrobjControl_Epilogue(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_kgrobjControl_Epilogue(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RmResource.offset), pCallContext, pParams); } // kgrobjCanCopy: virtual inherited (res) base (chandes) -static NvBool __nvoc_up_thunk_RsResource_kgrobjCanCopy(struct KernelGraphicsObject *pResource) { +NvBool __nvoc_up_thunk_RsResource_kgrobjCanCopy(struct KernelGraphicsObject *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset)); } // kgrobjIsDuplicate: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_kgrobjIsDuplicate(struct KernelGraphicsObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_kgrobjIsDuplicate(struct KernelGraphicsObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset), hMemory, pDuplicate); } // kgrobjPreDestruct: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_kgrobjPreDestruct(struct KernelGraphicsObject *pResource) { +void __nvoc_up_thunk_RsResource_kgrobjPreDestruct(struct KernelGraphicsObject *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset)); } // kgrobjControlFilter: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_kgrobjControlFilter(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kgrobjControlFilter(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset), pCallContext, pParams); } // kgrobjIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body -static NvBool __nvoc_up_thunk_RsResource_kgrobjIsPartialUnmapSupported(struct KernelGraphicsObject *pResource) { +NvBool __nvoc_up_thunk_RsResource_kgrobjIsPartialUnmapSupported(struct KernelGraphicsObject *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset)); } // kgrobjMapTo: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_kgrobjMapTo(struct KernelGraphicsObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kgrobjMapTo(struct KernelGraphicsObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset), pParams); } // kgrobjUnmapFrom: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_kgrobjUnmapFrom(struct KernelGraphicsObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kgrobjUnmapFrom(struct KernelGraphicsObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset), pParams); } // kgrobjGetRefCount: virtual inherited (res) base (chandes) -static NvU32 __nvoc_up_thunk_RsResource_kgrobjGetRefCount(struct KernelGraphicsObject *pResource) { +NvU32 __nvoc_up_thunk_RsResource_kgrobjGetRefCount(struct KernelGraphicsObject *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset)); } // kgrobjAddAdditionalDependants: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_kgrobjAddAdditionalDependants(struct RsClient *pClient, struct KernelGraphicsObject *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_kgrobjAddAdditionalDependants(struct RsClient *pClient, struct KernelGraphicsObject *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelGraphicsObject_RsResource.offset), pReference); } // kgrobjGetNotificationListPtr: virtual inherited (notify) base (chandes) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_kgrobjGetNotificationListPtr(struct KernelGraphicsObject *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_kgrobjGetNotificationListPtr(struct KernelGraphicsObject *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelGraphicsObject_Notifier.offset)); } // kgrobjGetNotificationShare: virtual inherited (notify) base (chandes) -static struct NotifShare * __nvoc_up_thunk_Notifier_kgrobjGetNotificationShare(struct KernelGraphicsObject *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_kgrobjGetNotificationShare(struct KernelGraphicsObject *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelGraphicsObject_Notifier.offset)); } // kgrobjSetNotificationShare: virtual inherited (notify) base (chandes) -static void __nvoc_up_thunk_Notifier_kgrobjSetNotificationShare(struct KernelGraphicsObject *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_kgrobjSetNotificationShare(struct KernelGraphicsObject *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelGraphicsObject_Notifier.offset), pNotifShare); } // kgrobjUnregisterEvent: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_kgrobjUnregisterEvent(struct KernelGraphicsObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_kgrobjUnregisterEvent(struct KernelGraphicsObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelGraphicsObject_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // kgrobjGetOrAllocNotifShare: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_kgrobjGetOrAllocNotifShare(struct KernelGraphicsObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_kgrobjGetOrAllocNotifShare(struct KernelGraphicsObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelGraphicsObject_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -344,10 +454,6 @@ static void __nvoc_init_funcTable_KernelGraphicsObject_1(KernelGraphicsObject *p PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); - // kgrobjGetMemInterMapParams -- virtual override (rmres) base (chandes) - pThis->__kgrobjGetMemInterMapParams__ = &kgrobjGetMemInterMapParams_IMPL; - pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_KernelGraphicsObject_rmresGetMemInterMapParams; - // kgrobjGetPromoteIds -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { @@ -357,106 +463,164 @@ static void __nvoc_init_funcTable_KernelGraphicsObject_1(KernelGraphicsObject *p { pThis->__kgrobjGetPromoteIds__ = &kgrobjGetPromoteIds_FWCLIENT; } - - // kgrobjGetSwMethods -- virtual inherited (chandes) base (chandes) - pThis->__kgrobjGetSwMethods__ = &__nvoc_up_thunk_ChannelDescendant_kgrobjGetSwMethods; - - // kgrobjIsSwMethodStalling -- virtual inherited (chandes) base (chandes) - pThis->__kgrobjIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_kgrobjIsSwMethodStalling; - - // kgrobjCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) - pThis->__kgrobjCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_kgrobjCheckMemInterUnmap; - - // kgrobjControl -- virtual inherited (gpures) base (chandes) - pThis->__kgrobjControl__ = &__nvoc_up_thunk_GpuResource_kgrobjControl; - - // kgrobjMap -- virtual inherited (gpures) base (chandes) - pThis->__kgrobjMap__ = &__nvoc_up_thunk_GpuResource_kgrobjMap; - - // kgrobjUnmap -- virtual inherited (gpures) base (chandes) - pThis->__kgrobjUnmap__ = &__nvoc_up_thunk_GpuResource_kgrobjUnmap; - - // kgrobjShareCallback -- virtual inherited (gpures) base (chandes) - pThis->__kgrobjShareCallback__ = &__nvoc_up_thunk_GpuResource_kgrobjShareCallback; - - // kgrobjGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) - pThis->__kgrobjGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kgrobjGetRegBaseOffsetAndSize; - - // kgrobjGetMapAddrSpace -- virtual inherited (gpures) base (chandes) - pThis->__kgrobjGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_kgrobjGetMapAddrSpace; - - // kgrobjInternalControlForward -- virtual inherited (gpures) base (chandes) - pThis->__kgrobjInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kgrobjInternalControlForward; - - // kgrobjGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) - pThis->__kgrobjGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_kgrobjGetInternalObjectHandle; - - // kgrobjAccessCallback -- virtual inherited (rmres) base (chandes) - pThis->__kgrobjAccessCallback__ = &__nvoc_up_thunk_RmResource_kgrobjAccessCallback; - - // kgrobjGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) - pThis->__kgrobjGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_kgrobjGetMemoryMappingDescriptor; - - // kgrobjControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__kgrobjControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kgrobjControlSerialization_Prologue; - - // kgrobjControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__kgrobjControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kgrobjControlSerialization_Epilogue; - - // kgrobjControl_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__kgrobjControl_Prologue__ = &__nvoc_up_thunk_RmResource_kgrobjControl_Prologue; - - // kgrobjControl_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__kgrobjControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kgrobjControl_Epilogue; - - // kgrobjCanCopy -- virtual inherited (res) base (chandes) - pThis->__kgrobjCanCopy__ = &__nvoc_up_thunk_RsResource_kgrobjCanCopy; - - // kgrobjIsDuplicate -- virtual inherited (res) base (chandes) - pThis->__kgrobjIsDuplicate__ = &__nvoc_up_thunk_RsResource_kgrobjIsDuplicate; - - // kgrobjPreDestruct -- virtual inherited (res) base (chandes) - pThis->__kgrobjPreDestruct__ = &__nvoc_up_thunk_RsResource_kgrobjPreDestruct; - - // kgrobjControlFilter -- virtual inherited (res) base (chandes) - pThis->__kgrobjControlFilter__ = &__nvoc_up_thunk_RsResource_kgrobjControlFilter; - - // kgrobjIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body - pThis->__kgrobjIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kgrobjIsPartialUnmapSupported; - - // kgrobjMapTo -- virtual inherited (res) base (chandes) - pThis->__kgrobjMapTo__ = &__nvoc_up_thunk_RsResource_kgrobjMapTo; - - // kgrobjUnmapFrom -- virtual inherited (res) base (chandes) - pThis->__kgrobjUnmapFrom__ = &__nvoc_up_thunk_RsResource_kgrobjUnmapFrom; - - // kgrobjGetRefCount -- virtual inherited (res) base (chandes) - pThis->__kgrobjGetRefCount__ = &__nvoc_up_thunk_RsResource_kgrobjGetRefCount; - - // kgrobjAddAdditionalDependants -- virtual inherited (res) base (chandes) - pThis->__kgrobjAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kgrobjAddAdditionalDependants; - - // kgrobjGetNotificationListPtr -- virtual inherited (notify) base (chandes) - pThis->__kgrobjGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_kgrobjGetNotificationListPtr; - - // kgrobjGetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__kgrobjGetNotificationShare__ = &__nvoc_up_thunk_Notifier_kgrobjGetNotificationShare; - - // kgrobjSetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__kgrobjSetNotificationShare__ = &__nvoc_up_thunk_Notifier_kgrobjSetNotificationShare; - - // kgrobjUnregisterEvent -- virtual inherited (notify) base (chandes) - pThis->__kgrobjUnregisterEvent__ = &__nvoc_up_thunk_Notifier_kgrobjUnregisterEvent; - - // kgrobjGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) - pThis->__kgrobjGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_kgrobjGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_KernelGraphicsObject_1 with approximately 35 basic block(s). +} // End __nvoc_init_funcTable_KernelGraphicsObject_1 with approximately 2 basic block(s). // Initialize vtable(s) for 33 virtual method(s). void __nvoc_init_funcTable_KernelGraphicsObject(KernelGraphicsObject *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 33 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelGraphicsObject vtable = { + .__kgrobjGetMemInterMapParams__ = &kgrobjGetMemInterMapParams_IMPL, // virtual override (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_chandesGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_KernelGraphicsObject_rmresGetMemInterMapParams, // virtual + .__kgrobjGetSwMethods__ = &__nvoc_up_thunk_ChannelDescendant_kgrobjGetSwMethods, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesGetSwMethods__ = &chandesGetSwMethods_IMPL, // virtual + .__kgrobjIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_kgrobjIsSwMethodStalling, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesIsSwMethodStalling__ = &chandesIsSwMethodStalling_IMPL, // virtual + .__kgrobjCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_kgrobjCheckMemInterUnmap, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesCheckMemInterUnmap__ = &chandesCheckMemInterUnmap_IMPL, // virtual override (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap, // virtual + .__kgrobjControl__ = &__nvoc_up_thunk_GpuResource_kgrobjControl, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesControl__ = &__nvoc_up_thunk_GpuResource_chandesControl, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__kgrobjMap__ = &__nvoc_up_thunk_GpuResource_kgrobjMap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesMap__ = &__nvoc_up_thunk_GpuResource_chandesMap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__kgrobjUnmap__ = &__nvoc_up_thunk_GpuResource_kgrobjUnmap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesUnmap__ = &__nvoc_up_thunk_GpuResource_chandesUnmap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__kgrobjShareCallback__ = &__nvoc_up_thunk_GpuResource_kgrobjShareCallback, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesShareCallback__ = &__nvoc_up_thunk_GpuResource_chandesShareCallback, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__kgrobjGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kgrobjGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__kgrobjGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_kgrobjGetMapAddrSpace, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__kgrobjInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kgrobjInternalControlForward, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesInternalControlForward__ = &__nvoc_up_thunk_GpuResource_chandesInternalControlForward, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__kgrobjGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_kgrobjGetInternalObjectHandle, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__kgrobjAccessCallback__ = &__nvoc_up_thunk_RmResource_kgrobjAccessCallback, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesAccessCallback__ = &__nvoc_up_thunk_RmResource_chandesAccessCallback, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__kgrobjGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_kgrobjGetMemoryMappingDescriptor, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__kgrobjControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kgrobjControlSerialization_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__kgrobjControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kgrobjControlSerialization_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__kgrobjControl_Prologue__ = &__nvoc_up_thunk_RmResource_kgrobjControl_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControl_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__kgrobjControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kgrobjControl_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControl_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__kgrobjCanCopy__ = &__nvoc_up_thunk_RsResource_kgrobjCanCopy, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesCanCopy__ = &__nvoc_up_thunk_RsResource_chandesCanCopy, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__kgrobjIsDuplicate__ = &__nvoc_up_thunk_RsResource_kgrobjIsDuplicate, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesIsDuplicate__ = &__nvoc_up_thunk_RsResource_chandesIsDuplicate, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__kgrobjPreDestruct__ = &__nvoc_up_thunk_RsResource_kgrobjPreDestruct, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesPreDestruct__ = &__nvoc_up_thunk_RsResource_chandesPreDestruct, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__kgrobjControlFilter__ = &__nvoc_up_thunk_RsResource_kgrobjControlFilter, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesControlFilter__ = &__nvoc_up_thunk_RsResource_chandesControlFilter, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__kgrobjIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kgrobjIsPartialUnmapSupported, // inline virtual inherited (res) base (chandes) body + .ChannelDescendant.__chandesIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .ChannelDescendant.GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .ChannelDescendant.GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__kgrobjMapTo__ = &__nvoc_up_thunk_RsResource_kgrobjMapTo, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesMapTo__ = &__nvoc_up_thunk_RsResource_chandesMapTo, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__kgrobjUnmapFrom__ = &__nvoc_up_thunk_RsResource_kgrobjUnmapFrom, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesUnmapFrom__ = &__nvoc_up_thunk_RsResource_chandesUnmapFrom, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__kgrobjGetRefCount__ = &__nvoc_up_thunk_RsResource_kgrobjGetRefCount, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesGetRefCount__ = &__nvoc_up_thunk_RsResource_chandesGetRefCount, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__kgrobjAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kgrobjAddAdditionalDependants, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_chandesAddAdditionalDependants, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__kgrobjGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_kgrobjGetNotificationListPtr, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationListPtr, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__kgrobjGetNotificationShare__ = &__nvoc_up_thunk_Notifier_kgrobjGetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__kgrobjSetNotificationShare__ = &__nvoc_up_thunk_Notifier_kgrobjSetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesSetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesSetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__kgrobjUnregisterEvent__ = &__nvoc_up_thunk_Notifier_kgrobjUnregisterEvent, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesUnregisterEvent__ = &__nvoc_up_thunk_Notifier_chandesUnregisterEvent, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__kgrobjGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_kgrobjGetOrAllocNotifShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource.RsResource; // (res) super^4 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource; // (rmres) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource; // (gpures) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier.INotifier; // (inotify) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier; // (notify) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_vtable = &vtable.ChannelDescendant; // (chandes) super + pThis->__nvoc_vtable = &vtable; // (kgrobj) this + + // Initialize vtable(s) with 1 per-object function pointer(s). __nvoc_init_funcTable_KernelGraphicsObject_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_graphics_object_nvoc.h b/src/nvidia/generated/g_kernel_graphics_object_nvoc.h index 503c2110b4..fa3ec94c4d 100644 --- a/src/nvidia/generated/g_kernel_graphics_object_nvoc.h +++ b/src/nvidia/generated/g_kernel_graphics_object_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -64,10 +64,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelGraphicsObject; + + struct KernelGraphicsObject { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelGraphicsObject *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; @@ -83,40 +88,8 @@ struct KernelGraphicsObject { struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super struct KernelGraphicsObject *__nvoc_pbase_KernelGraphicsObject; // kgrobj - // Vtable with 33 per-object function pointers - NV_STATUS (*__kgrobjGetMemInterMapParams__)(struct KernelGraphicsObject * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual override (rmres) base (chandes) + // Vtable with 1 per-object function pointer void (*__kgrobjGetPromoteIds__)(struct OBJGPU *, struct KernelGraphicsObject * /*this*/, NvU32, NvU32 *, NvU32 *, NvBool *); // halified (2 hals) - NV_STATUS (*__kgrobjGetSwMethods__)(struct KernelGraphicsObject * /*this*/, const METHOD **, NvU32 *); // virtual inherited (chandes) base (chandes) - NvBool (*__kgrobjIsSwMethodStalling__)(struct KernelGraphicsObject * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) - NV_STATUS (*__kgrobjCheckMemInterUnmap__)(struct KernelGraphicsObject * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) - NV_STATUS (*__kgrobjControl__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (chandes) - NV_STATUS (*__kgrobjMap__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) - NV_STATUS (*__kgrobjUnmap__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (chandes) - NvBool (*__kgrobjShareCallback__)(struct KernelGraphicsObject * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (chandes) - NV_STATUS (*__kgrobjGetRegBaseOffsetAndSize__)(struct KernelGraphicsObject * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (chandes) - NV_STATUS (*__kgrobjGetMapAddrSpace__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (chandes) - NV_STATUS (*__kgrobjInternalControlForward__)(struct KernelGraphicsObject * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (chandes) - NvHandle (*__kgrobjGetInternalObjectHandle__)(struct KernelGraphicsObject * /*this*/); // virtual inherited (gpures) base (chandes) - NvBool (*__kgrobjAccessCallback__)(struct KernelGraphicsObject * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (chandes) - NV_STATUS (*__kgrobjGetMemoryMappingDescriptor__)(struct KernelGraphicsObject * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (chandes) - NV_STATUS (*__kgrobjControlSerialization_Prologue__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) - void (*__kgrobjControlSerialization_Epilogue__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) - NV_STATUS (*__kgrobjControl_Prologue__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) - void (*__kgrobjControl_Epilogue__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (chandes) - NvBool (*__kgrobjCanCopy__)(struct KernelGraphicsObject * /*this*/); // virtual inherited (res) base (chandes) - NV_STATUS (*__kgrobjIsDuplicate__)(struct KernelGraphicsObject * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (chandes) - void (*__kgrobjPreDestruct__)(struct KernelGraphicsObject * /*this*/); // virtual inherited (res) base (chandes) - NV_STATUS (*__kgrobjControlFilter__)(struct KernelGraphicsObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (chandes) - NvBool (*__kgrobjIsPartialUnmapSupported__)(struct KernelGraphicsObject * /*this*/); // inline virtual inherited (res) base (chandes) body - NV_STATUS (*__kgrobjMapTo__)(struct KernelGraphicsObject * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (chandes) - NV_STATUS (*__kgrobjUnmapFrom__)(struct KernelGraphicsObject * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (chandes) - NvU32 (*__kgrobjGetRefCount__)(struct KernelGraphicsObject * /*this*/); // virtual inherited (res) base (chandes) - void (*__kgrobjAddAdditionalDependants__)(struct RsClient *, struct KernelGraphicsObject * /*this*/, RsResourceRef *); // virtual inherited (res) base (chandes) - PEVENTNOTIFICATION * (*__kgrobjGetNotificationListPtr__)(struct KernelGraphicsObject * /*this*/); // virtual inherited (notify) base (chandes) - struct NotifShare * (*__kgrobjGetNotificationShare__)(struct KernelGraphicsObject * /*this*/); // virtual inherited (notify) base (chandes) - void (*__kgrobjSetNotificationShare__)(struct KernelGraphicsObject * /*this*/, struct NotifShare *); // virtual inherited (notify) base (chandes) - NV_STATUS (*__kgrobjUnregisterEvent__)(struct KernelGraphicsObject * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (chandes) - NV_STATUS (*__kgrobjGetOrAllocNotifShare__)(struct KernelGraphicsObject * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (chandes) // Data members MEMORY_DESCRIPTOR *PRIVATE_FIELD(pMmioMemDesc); @@ -128,6 +101,7 @@ struct KernelGraphicsObject_PRIVATE { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelGraphicsObject *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; @@ -143,9 +117,20 @@ struct KernelGraphicsObject_PRIVATE { struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super struct KernelGraphicsObject *__nvoc_pbase_KernelGraphicsObject; // kgrobj - // Vtable with 33 per-object function pointers - NV_STATUS (*__kgrobjGetMemInterMapParams__)(struct KernelGraphicsObject * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual override (rmres) base (chandes) + // Vtable with 1 per-object function pointer void (*__kgrobjGetPromoteIds__)(struct OBJGPU *, struct KernelGraphicsObject * /*this*/, NvU32, NvU32 *, NvU32 *, NvBool *); // halified (2 hals) + + // Data members + MEMORY_DESCRIPTOR *pMmioMemDesc; + struct KernelGraphicsContext *pKernelGraphicsContext; +}; + + +// Metadata including vtable with 32 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelGraphicsObject { + const struct NVOC_VTABLE__ChannelDescendant ChannelDescendant; // (chandes) 32 function pointers + + NV_STATUS (*__kgrobjGetMemInterMapParams__)(struct KernelGraphicsObject * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual override (rmres) base (chandes) NV_STATUS (*__kgrobjGetSwMethods__)(struct KernelGraphicsObject * /*this*/, const METHOD **, NvU32 *); // virtual inherited (chandes) base (chandes) NvBool (*__kgrobjIsSwMethodStalling__)(struct KernelGraphicsObject * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) NV_STATUS (*__kgrobjCheckMemInterUnmap__)(struct KernelGraphicsObject * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) @@ -177,10 +162,6 @@ struct KernelGraphicsObject_PRIVATE { void (*__kgrobjSetNotificationShare__)(struct KernelGraphicsObject * /*this*/, struct NotifShare *); // virtual inherited (notify) base (chandes) NV_STATUS (*__kgrobjUnregisterEvent__)(struct KernelGraphicsObject * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (chandes) NV_STATUS (*__kgrobjGetOrAllocNotifShare__)(struct KernelGraphicsObject * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (chandes) - - // Data members - MEMORY_DESCRIPTOR *pMmioMemDesc; - struct KernelGraphicsContext *pKernelGraphicsContext; }; #ifndef __NVOC_CLASS_KernelGraphicsObject_TYPEDEF__ @@ -213,77 +194,77 @@ NV_STATUS __nvoc_objCreate_KernelGraphicsObject(KernelGraphicsObject**, Dynamic* // Wrapper macros -#define kgrobjGetMemInterMapParams_FNPTR(arg_this) arg_this->__kgrobjGetMemInterMapParams__ +#define kgrobjGetMemInterMapParams_FNPTR(arg_this) arg_this->__nvoc_vtable->__kgrobjGetMemInterMapParams__ #define kgrobjGetMemInterMapParams(arg_this, arg2) kgrobjGetMemInterMapParams_DISPATCH(arg_this, arg2) #define kgrobjGetPromoteIds_FNPTR(arg_this) arg_this->__kgrobjGetPromoteIds__ #define kgrobjGetPromoteIds(arg1, arg_this, maxPromoteIds, pPromoteIds, pNumEntries, pbPromote) kgrobjGetPromoteIds_DISPATCH(arg1, arg_this, maxPromoteIds, pPromoteIds, pNumEntries, pbPromote) #define kgrobjGetPromoteIds_HAL(arg1, arg_this, maxPromoteIds, pPromoteIds, pNumEntries, pbPromote) kgrobjGetPromoteIds_DISPATCH(arg1, arg_this, maxPromoteIds, pPromoteIds, pNumEntries, pbPromote) -#define kgrobjGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ +#define kgrobjGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesGetSwMethods__ #define kgrobjGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) kgrobjGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) -#define kgrobjIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ +#define kgrobjIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesIsSwMethodStalling__ #define kgrobjIsSwMethodStalling(pChannelDescendant, hHandle) kgrobjIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define kgrobjCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ +#define kgrobjCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesCheckMemInterUnmap__ #define kgrobjCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) kgrobjCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) -#define kgrobjControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define kgrobjControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define kgrobjControl(pGpuResource, pCallContext, pParams) kgrobjControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define kgrobjMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define kgrobjMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define kgrobjMap(pGpuResource, pCallContext, pParams, pCpuMapping) kgrobjMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define kgrobjUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define kgrobjUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define kgrobjUnmap(pGpuResource, pCallContext, pCpuMapping) kgrobjUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define kgrobjShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ +#define kgrobjShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define kgrobjShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) kgrobjShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define kgrobjGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define kgrobjGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define kgrobjGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) kgrobjGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define kgrobjGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define kgrobjGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define kgrobjGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) kgrobjGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define kgrobjInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define kgrobjInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define kgrobjInternalControlForward(pGpuResource, command, pParams, size) kgrobjInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define kgrobjGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define kgrobjGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define kgrobjGetInternalObjectHandle(pGpuResource) kgrobjGetInternalObjectHandle_DISPATCH(pGpuResource) -#define kgrobjAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define kgrobjAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define kgrobjAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kgrobjAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define kgrobjGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define kgrobjGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define kgrobjGetMemoryMappingDescriptor(pRmResource, ppMemDesc) kgrobjGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define kgrobjControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define kgrobjControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define kgrobjControlSerialization_Prologue(pResource, pCallContext, pParams) kgrobjControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define kgrobjControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define kgrobjControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define kgrobjControlSerialization_Epilogue(pResource, pCallContext, pParams) kgrobjControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kgrobjControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define kgrobjControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define kgrobjControl_Prologue(pResource, pCallContext, pParams) kgrobjControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define kgrobjControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define kgrobjControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define kgrobjControl_Epilogue(pResource, pCallContext, pParams) kgrobjControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kgrobjCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define kgrobjCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define kgrobjCanCopy(pResource) kgrobjCanCopy_DISPATCH(pResource) -#define kgrobjIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define kgrobjIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define kgrobjIsDuplicate(pResource, hMemory, pDuplicate) kgrobjIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define kgrobjPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define kgrobjPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define kgrobjPreDestruct(pResource) kgrobjPreDestruct_DISPATCH(pResource) -#define kgrobjControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define kgrobjControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define kgrobjControlFilter(pResource, pCallContext, pParams) kgrobjControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define kgrobjIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define kgrobjIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define kgrobjIsPartialUnmapSupported(pResource) kgrobjIsPartialUnmapSupported_DISPATCH(pResource) -#define kgrobjMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define kgrobjMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define kgrobjMapTo(pResource, pParams) kgrobjMapTo_DISPATCH(pResource, pParams) -#define kgrobjUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define kgrobjUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define kgrobjUnmapFrom(pResource, pParams) kgrobjUnmapFrom_DISPATCH(pResource, pParams) -#define kgrobjGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define kgrobjGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define kgrobjGetRefCount(pResource) kgrobjGetRefCount_DISPATCH(pResource) -#define kgrobjAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define kgrobjAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define kgrobjAddAdditionalDependants(pClient, pResource, pReference) kgrobjAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define kgrobjGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define kgrobjGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define kgrobjGetNotificationListPtr(pNotifier) kgrobjGetNotificationListPtr_DISPATCH(pNotifier) -#define kgrobjGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define kgrobjGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define kgrobjGetNotificationShare(pNotifier) kgrobjGetNotificationShare_DISPATCH(pNotifier) -#define kgrobjSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define kgrobjSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define kgrobjSetNotificationShare(pNotifier, pNotifShare) kgrobjSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define kgrobjUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define kgrobjUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define kgrobjUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) kgrobjUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define kgrobjGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define kgrobjGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define kgrobjGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) kgrobjGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS kgrobjGetMemInterMapParams_DISPATCH(struct KernelGraphicsObject *arg_this, RMRES_MEM_INTER_MAP_PARAMS *arg2) { - return arg_this->__kgrobjGetMemInterMapParams__(arg_this, arg2); + return arg_this->__nvoc_vtable->__kgrobjGetMemInterMapParams__(arg_this, arg2); } static inline void kgrobjGetPromoteIds_DISPATCH(struct OBJGPU *arg1, struct KernelGraphicsObject *arg_this, NvU32 maxPromoteIds, NvU32 *pPromoteIds, NvU32 *pNumEntries, NvBool *pbPromote) { @@ -291,127 +272,127 @@ static inline void kgrobjGetPromoteIds_DISPATCH(struct OBJGPU *arg1, struct Kern } static inline NV_STATUS kgrobjGetSwMethods_DISPATCH(struct KernelGraphicsObject *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { - return pChannelDescendant->__kgrobjGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); + return pChannelDescendant->__nvoc_vtable->__kgrobjGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); } static inline NvBool kgrobjIsSwMethodStalling_DISPATCH(struct KernelGraphicsObject *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__kgrobjIsSwMethodStalling__(pChannelDescendant, hHandle); + return pChannelDescendant->__nvoc_vtable->__kgrobjIsSwMethodStalling__(pChannelDescendant, hHandle); } static inline NV_STATUS kgrobjCheckMemInterUnmap_DISPATCH(struct KernelGraphicsObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return pChannelDescendant->__kgrobjCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); + return pChannelDescendant->__nvoc_vtable->__kgrobjCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } static inline NV_STATUS kgrobjControl_DISPATCH(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__kgrobjControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__kgrobjControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS kgrobjMap_DISPATCH(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kgrobjMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__kgrobjMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS kgrobjUnmap_DISPATCH(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kgrobjUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__kgrobjUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool kgrobjShareCallback_DISPATCH(struct KernelGraphicsObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__kgrobjShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__kgrobjShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS kgrobjGetRegBaseOffsetAndSize_DISPATCH(struct KernelGraphicsObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__kgrobjGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__kgrobjGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS kgrobjGetMapAddrSpace_DISPATCH(struct KernelGraphicsObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__kgrobjGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__kgrobjGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS kgrobjInternalControlForward_DISPATCH(struct KernelGraphicsObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__kgrobjInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__kgrobjInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle kgrobjGetInternalObjectHandle_DISPATCH(struct KernelGraphicsObject *pGpuResource) { - return pGpuResource->__kgrobjGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__kgrobjGetInternalObjectHandle__(pGpuResource); } static inline NvBool kgrobjAccessCallback_DISPATCH(struct KernelGraphicsObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__kgrobjAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__kgrobjAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS kgrobjGetMemoryMappingDescriptor_DISPATCH(struct KernelGraphicsObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__kgrobjGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__kgrobjGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS kgrobjControlSerialization_Prologue_DISPATCH(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kgrobjControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kgrobjControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void kgrobjControlSerialization_Epilogue_DISPATCH(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kgrobjControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__kgrobjControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS kgrobjControl_Prologue_DISPATCH(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kgrobjControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kgrobjControl_Prologue__(pResource, pCallContext, pParams); } static inline void kgrobjControl_Epilogue_DISPATCH(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kgrobjControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__kgrobjControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool kgrobjCanCopy_DISPATCH(struct KernelGraphicsObject *pResource) { - return pResource->__kgrobjCanCopy__(pResource); + return pResource->__nvoc_vtable->__kgrobjCanCopy__(pResource); } static inline NV_STATUS kgrobjIsDuplicate_DISPATCH(struct KernelGraphicsObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__kgrobjIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__kgrobjIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void kgrobjPreDestruct_DISPATCH(struct KernelGraphicsObject *pResource) { - pResource->__kgrobjPreDestruct__(pResource); + pResource->__nvoc_vtable->__kgrobjPreDestruct__(pResource); } static inline NV_STATUS kgrobjControlFilter_DISPATCH(struct KernelGraphicsObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kgrobjControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kgrobjControlFilter__(pResource, pCallContext, pParams); } static inline NvBool kgrobjIsPartialUnmapSupported_DISPATCH(struct KernelGraphicsObject *pResource) { - return pResource->__kgrobjIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__kgrobjIsPartialUnmapSupported__(pResource); } static inline NV_STATUS kgrobjMapTo_DISPATCH(struct KernelGraphicsObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__kgrobjMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__kgrobjMapTo__(pResource, pParams); } static inline NV_STATUS kgrobjUnmapFrom_DISPATCH(struct KernelGraphicsObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__kgrobjUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__kgrobjUnmapFrom__(pResource, pParams); } static inline NvU32 kgrobjGetRefCount_DISPATCH(struct KernelGraphicsObject *pResource) { - return pResource->__kgrobjGetRefCount__(pResource); + return pResource->__nvoc_vtable->__kgrobjGetRefCount__(pResource); } static inline void kgrobjAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelGraphicsObject *pResource, RsResourceRef *pReference) { - pResource->__kgrobjAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__kgrobjAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * kgrobjGetNotificationListPtr_DISPATCH(struct KernelGraphicsObject *pNotifier) { - return pNotifier->__kgrobjGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__kgrobjGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * kgrobjGetNotificationShare_DISPATCH(struct KernelGraphicsObject *pNotifier) { - return pNotifier->__kgrobjGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__kgrobjGetNotificationShare__(pNotifier); } static inline void kgrobjSetNotificationShare_DISPATCH(struct KernelGraphicsObject *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__kgrobjSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__kgrobjSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS kgrobjUnregisterEvent_DISPATCH(struct KernelGraphicsObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__kgrobjUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__kgrobjUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS kgrobjGetOrAllocNotifShare_DISPATCH(struct KernelGraphicsObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__kgrobjGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__kgrobjGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NvBool kgrobjShouldCleanup_KERNEL(struct OBJGPU *arg1, struct KernelGraphicsObject *arg2); diff --git a/src/nvidia/generated/g_kernel_gsp_nvoc.c b/src/nvidia/generated/g_kernel_gsp_nvoc.c index f0cae03e48..3a22344e7e 100644 --- a/src/nvidia/generated/g_kernel_gsp_nvoc.c +++ b/src/nvidia/generated/g_kernel_gsp_nvoc.c @@ -102,178 +102,241 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGsp = /*pExportInfo=*/ &__nvoc_export_info_KernelGsp }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineConfigured(struct CrashCatEngine *arg_this); // super^2 +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnload(struct CrashCatEngine *arg_this); // super^2 +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineVprintf(struct CrashCatEngine *arg_this, NvBool bReportStart, const char *fmt, va_list args); // super^2 +NvU32 __nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriRead(struct CrashCatEngine *arg_this, NvU32 offset); // super^2 +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriWrite(struct CrashCatEngine *arg_this, NvU32 offset, NvU32 data); // super^2 +void * __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineMapBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc); // super^2 +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnmapBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc); // super^2 +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineSyncBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size); // super^2 +const NvU32 * __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetScratchOffsets(struct CrashCatEngine *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId); // super^2 +NvU32 __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetWFL0Offset(struct CrashCatEngine *arg_this); // super^2 +NvU32 __nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegRead(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 offset); // super +void __nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegWrite(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 offset, NvU32 data); // super +NvU32 __nvoc_down_thunk_KernelFalcon_kcrashcatEngineMaskDmemAddr(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 addr); // super +NV_STATUS __nvoc_down_thunk_KernelGsp_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelGsp, ENGDESCRIPTOR arg3); // this +NV_STATUS __nvoc_down_thunk_KernelGsp_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelGsp); // this +void __nvoc_down_thunk_KernelGsp_intrservRegisterIntrService(struct OBJGPU *pGpu, struct IntrService *pKernelGsp, IntrServiceRecord pRecords[175]); // this +NvU32 __nvoc_down_thunk_KernelGsp_intrservServiceInterrupt(struct OBJGPU *pGpu, struct IntrService *pKernelGsp, IntrServiceServiceInterruptArguments *pParams); // this +NV_STATUS __nvoc_down_thunk_KernelGsp_kflcnResetHw(struct OBJGPU *pGpu, struct KernelFalcon *pKernelGsp); // this +void __nvoc_down_thunk_KernelGsp_kcrashcatEngineReadEmem(struct KernelCrashCatEngine *pKernelGsp, NvU64 offset, NvU64 size, void *pBuf); // this + // 6 down-thunk(s) defined to bridge methods in KernelGsp from superclasses // kgspConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelGsp_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelGsp, ENGDESCRIPTOR arg3) { +NV_STATUS __nvoc_down_thunk_KernelGsp_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelGsp, ENGDESCRIPTOR arg3) { return kgspConstructEngine(pGpu, (struct KernelGsp *)(((unsigned char *) pKernelGsp) - __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg3); } // kgspStateInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelGsp_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelGsp) { +NV_STATUS __nvoc_down_thunk_KernelGsp_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelGsp) { return kgspStateInitLocked(pGpu, (struct KernelGsp *)(((unsigned char *) pKernelGsp) - __nvoc_rtti_KernelGsp_OBJENGSTATE.offset)); } // kgspRegisterIntrService: virtual override (intrserv) base (intrserv) -static void __nvoc_down_thunk_KernelGsp_intrservRegisterIntrService(struct OBJGPU *pGpu, struct IntrService *pKernelGsp, IntrServiceRecord pRecords[175]) { +void __nvoc_down_thunk_KernelGsp_intrservRegisterIntrService(struct OBJGPU *pGpu, struct IntrService *pKernelGsp, IntrServiceRecord pRecords[175]) { kgspRegisterIntrService(pGpu, (struct KernelGsp *)(((unsigned char *) pKernelGsp) - __nvoc_rtti_KernelGsp_IntrService.offset), pRecords); } // kgspServiceInterrupt: virtual override (intrserv) base (intrserv) -static NvU32 __nvoc_down_thunk_KernelGsp_intrservServiceInterrupt(struct OBJGPU *pGpu, struct IntrService *pKernelGsp, IntrServiceServiceInterruptArguments *pParams) { +NvU32 __nvoc_down_thunk_KernelGsp_intrservServiceInterrupt(struct OBJGPU *pGpu, struct IntrService *pKernelGsp, IntrServiceServiceInterruptArguments *pParams) { return kgspServiceInterrupt(pGpu, (struct KernelGsp *)(((unsigned char *) pKernelGsp) - __nvoc_rtti_KernelGsp_IntrService.offset), pParams); } // kgspResetHw: virtual halified (4 hals) override (kflcn) base (kflcn) body -static NV_STATUS __nvoc_down_thunk_KernelGsp_kflcnResetHw(struct OBJGPU *pGpu, struct KernelFalcon *pKernelGsp) { +NV_STATUS __nvoc_down_thunk_KernelGsp_kflcnResetHw(struct OBJGPU *pGpu, struct KernelFalcon *pKernelGsp) { return kgspResetHw(pGpu, (struct KernelGsp *)(((unsigned char *) pKernelGsp) - __nvoc_rtti_KernelGsp_KernelFalcon.offset)); } // kgspReadEmem: virtual halified (2 hals) override (kcrashcatEngine) base (kflcn) body -static void __nvoc_down_thunk_KernelGsp_kcrashcatEngineReadEmem(struct KernelCrashCatEngine *pKernelGsp, NvU64 offset, NvU64 size, void *pBuf) { +void __nvoc_down_thunk_KernelGsp_kcrashcatEngineReadEmem(struct KernelCrashCatEngine *pKernelGsp, NvU64 offset, NvU64 size, void *pBuf) { kgspReadEmem((struct KernelGsp *)(((unsigned char *) pKernelGsp) - __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), offset, size, pBuf); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_KernelCrashCatEngine_kflcnConfigured(struct KernelFalcon *arg_this); // super +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnUnload(struct KernelFalcon *arg_this); // super +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnVprintf(struct KernelFalcon *arg_this, NvBool bReportStart, const char *fmt, va_list args); // super +NvU32 __nvoc_up_thunk_KernelCrashCatEngine_kflcnPriRead(struct KernelFalcon *arg_this, NvU32 offset); // super +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnPriWrite(struct KernelFalcon *arg_this, NvU32 offset, NvU32 data); // super +void * __nvoc_up_thunk_KernelCrashCatEngine_kflcnMapBufferDescriptor(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc); // super +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnUnmapBufferDescriptor(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc); // super +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnSyncBufferDescriptor(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size); // super +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnReadDmem(struct KernelFalcon *arg_this, NvU32 offset, NvU32 size, void *pBuf); // super +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnReadEmem(struct KernelFalcon *arg_this, NvU64 offset, NvU64 size, void *pBuf); // super +const NvU32 * __nvoc_up_thunk_KernelCrashCatEngine_kflcnGetScratchOffsets(struct KernelFalcon *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId); // super +NvU32 __nvoc_up_thunk_KernelCrashCatEngine_kflcnGetWFL0Offset(struct KernelFalcon *arg_this); // super +void __nvoc_up_thunk_OBJENGSTATE_kgspInitMissing(struct OBJGPU *pGpu, struct KernelGsp *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePreInitLocked(struct OBJGPU *pGpu, struct KernelGsp *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelGsp *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStateInitUnlocked(struct OBJGPU *pGpu, struct KernelGsp *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePreLoad(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStateLoad(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePostLoad(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePreUnload(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStateUnload(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePostUnload(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3); // this +void __nvoc_up_thunk_OBJENGSTATE_kgspStateDestroy(struct OBJGPU *pGpu, struct KernelGsp *pEngstate); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_kgspIsPresent(struct OBJGPU *pGpu, struct KernelGsp *pEngstate); // this +NvBool __nvoc_up_thunk_IntrService_kgspClearInterrupt(struct OBJGPU *pGpu, struct KernelGsp *pIntrService, IntrServiceClearInterruptArguments *pParams); // this +NV_STATUS __nvoc_up_thunk_IntrService_kgspServiceNotificationInterrupt(struct OBJGPU *pGpu, struct KernelGsp *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams); // this +NvU32 __nvoc_up_thunk_KernelFalcon_kgspRegRead(struct OBJGPU *pGpu, struct KernelGsp *pKernelFlcn, NvU32 offset); // this +void __nvoc_up_thunk_KernelFalcon_kgspRegWrite(struct OBJGPU *pGpu, struct KernelGsp *pKernelFlcn, NvU32 offset, NvU32 data); // this +NvU32 __nvoc_up_thunk_KernelFalcon_kgspMaskDmemAddr(struct OBJGPU *pGpu, struct KernelGsp *pKernelFlcn, NvU32 addr); // this +NvBool __nvoc_up_thunk_KernelCrashCatEngine_kgspConfigured(struct KernelGsp *arg_this); // this +void __nvoc_up_thunk_KernelCrashCatEngine_kgspUnload(struct KernelGsp *arg_this); // this +void __nvoc_up_thunk_KernelCrashCatEngine_kgspVprintf(struct KernelGsp *arg_this, NvBool bReportStart, const char *fmt, va_list args); // this +NvU32 __nvoc_up_thunk_KernelCrashCatEngine_kgspPriRead(struct KernelGsp *arg_this, NvU32 offset); // this +void __nvoc_up_thunk_KernelCrashCatEngine_kgspPriWrite(struct KernelGsp *arg_this, NvU32 offset, NvU32 data); // this +void * __nvoc_up_thunk_KernelCrashCatEngine_kgspMapBufferDescriptor(struct KernelGsp *arg_this, CrashCatBufferDescriptor *pBufDesc); // this +void __nvoc_up_thunk_KernelCrashCatEngine_kgspUnmapBufferDescriptor(struct KernelGsp *arg_this, CrashCatBufferDescriptor *pBufDesc); // this +void __nvoc_up_thunk_KernelCrashCatEngine_kgspSyncBufferDescriptor(struct KernelGsp *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size); // this +void __nvoc_up_thunk_KernelCrashCatEngine_kgspReadDmem(struct KernelGsp *arg_this, NvU32 offset, NvU32 size, void *pBuf); // this +const NvU32 * __nvoc_up_thunk_KernelCrashCatEngine_kgspGetScratchOffsets(struct KernelGsp *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId); // this +NvU32 __nvoc_up_thunk_KernelCrashCatEngine_kgspGetWFL0Offset(struct KernelGsp *arg_this); // this + // 28 up-thunk(s) defined to bridge methods in KernelGsp to superclasses // kgspInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kgspInitMissing(struct OBJGPU *pGpu, struct KernelGsp *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kgspInitMissing(struct OBJGPU *pGpu, struct KernelGsp *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset)); } // kgspStatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePreInitLocked(struct OBJGPU *pGpu, struct KernelGsp *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePreInitLocked(struct OBJGPU *pGpu, struct KernelGsp *pEngstate) { return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset)); } // kgspStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelGsp *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelGsp *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset)); } // kgspStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStateInitUnlocked(struct OBJGPU *pGpu, struct KernelGsp *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStateInitUnlocked(struct OBJGPU *pGpu, struct KernelGsp *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset)); } // kgspStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePreLoad(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePreLoad(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg3); } // kgspStateLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStateLoad(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStateLoad(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg3); } // kgspStatePostLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePostLoad(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePostLoad(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg3); } // kgspStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePreUnload(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePreUnload(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg3); } // kgspStateUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStateUnload(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStateUnload(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg3); } // kgspStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePostUnload(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kgspStatePostUnload(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg3); } // kgspStateDestroy: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kgspStateDestroy(struct OBJGPU *pGpu, struct KernelGsp *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kgspStateDestroy(struct OBJGPU *pGpu, struct KernelGsp *pEngstate) { engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset)); } // kgspIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_kgspIsPresent(struct OBJGPU *pGpu, struct KernelGsp *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_kgspIsPresent(struct OBJGPU *pGpu, struct KernelGsp *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset)); } // kgspClearInterrupt: virtual inherited (intrserv) base (intrserv) -static NvBool __nvoc_up_thunk_IntrService_kgspClearInterrupt(struct OBJGPU *pGpu, struct KernelGsp *pIntrService, IntrServiceClearInterruptArguments *pParams) { +NvBool __nvoc_up_thunk_IntrService_kgspClearInterrupt(struct OBJGPU *pGpu, struct KernelGsp *pIntrService, IntrServiceClearInterruptArguments *pParams) { return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_KernelGsp_IntrService.offset), pParams); } // kgspServiceNotificationInterrupt: virtual inherited (intrserv) base (intrserv) -static NV_STATUS __nvoc_up_thunk_IntrService_kgspServiceNotificationInterrupt(struct OBJGPU *pGpu, struct KernelGsp *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { +NV_STATUS __nvoc_up_thunk_IntrService_kgspServiceNotificationInterrupt(struct OBJGPU *pGpu, struct KernelGsp *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { return intrservServiceNotificationInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_KernelGsp_IntrService.offset), pParams); } // kgspRegRead: virtual halified (2 hals) inherited (kflcn) base (kflcn) body -static NvU32 __nvoc_up_thunk_KernelFalcon_kgspRegRead(struct OBJGPU *pGpu, struct KernelGsp *pKernelFlcn, NvU32 offset) { +NvU32 __nvoc_up_thunk_KernelFalcon_kgspRegRead(struct OBJGPU *pGpu, struct KernelGsp *pKernelFlcn, NvU32 offset) { return kflcnRegRead(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) + __nvoc_rtti_KernelGsp_KernelFalcon.offset), offset); } // kgspRegWrite: virtual halified (2 hals) inherited (kflcn) base (kflcn) body -static void __nvoc_up_thunk_KernelFalcon_kgspRegWrite(struct OBJGPU *pGpu, struct KernelGsp *pKernelFlcn, NvU32 offset, NvU32 data) { +void __nvoc_up_thunk_KernelFalcon_kgspRegWrite(struct OBJGPU *pGpu, struct KernelGsp *pKernelFlcn, NvU32 offset, NvU32 data) { kflcnRegWrite(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) + __nvoc_rtti_KernelGsp_KernelFalcon.offset), offset, data); } // kgspMaskDmemAddr: virtual halified (3 hals) inherited (kflcn) base (kflcn) body -static NvU32 __nvoc_up_thunk_KernelFalcon_kgspMaskDmemAddr(struct OBJGPU *pGpu, struct KernelGsp *pKernelFlcn, NvU32 addr) { +NvU32 __nvoc_up_thunk_KernelFalcon_kgspMaskDmemAddr(struct OBJGPU *pGpu, struct KernelGsp *pKernelFlcn, NvU32 addr) { return kflcnMaskDmemAddr(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) + __nvoc_rtti_KernelGsp_KernelFalcon.offset), addr); } // kgspConfigured: virtual inherited (kcrashcatEngine) base (kflcn) -static NvBool __nvoc_up_thunk_KernelCrashCatEngine_kgspConfigured(struct KernelGsp *arg_this) { +NvBool __nvoc_up_thunk_KernelCrashCatEngine_kgspConfigured(struct KernelGsp *arg_this) { return kcrashcatEngineConfigured((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset)); } // kgspUnload: virtual inherited (kcrashcatEngine) base (kflcn) -static void __nvoc_up_thunk_KernelCrashCatEngine_kgspUnload(struct KernelGsp *arg_this) { +void __nvoc_up_thunk_KernelCrashCatEngine_kgspUnload(struct KernelGsp *arg_this) { kcrashcatEngineUnload((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset)); } // kgspVprintf: virtual inherited (kcrashcatEngine) base (kflcn) -static void __nvoc_up_thunk_KernelCrashCatEngine_kgspVprintf(struct KernelGsp *arg_this, NvBool bReportStart, const char *fmt, va_list args) { +void __nvoc_up_thunk_KernelCrashCatEngine_kgspVprintf(struct KernelGsp *arg_this, NvBool bReportStart, const char *fmt, va_list args) { kcrashcatEngineVprintf((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), bReportStart, fmt, args); } // kgspPriRead: virtual inherited (kcrashcatEngine) base (kflcn) -static NvU32 __nvoc_up_thunk_KernelCrashCatEngine_kgspPriRead(struct KernelGsp *arg_this, NvU32 offset) { +NvU32 __nvoc_up_thunk_KernelCrashCatEngine_kgspPriRead(struct KernelGsp *arg_this, NvU32 offset) { return kcrashcatEnginePriRead((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), offset); } // kgspPriWrite: virtual inherited (kcrashcatEngine) base (kflcn) -static void __nvoc_up_thunk_KernelCrashCatEngine_kgspPriWrite(struct KernelGsp *arg_this, NvU32 offset, NvU32 data) { +void __nvoc_up_thunk_KernelCrashCatEngine_kgspPriWrite(struct KernelGsp *arg_this, NvU32 offset, NvU32 data) { kcrashcatEnginePriWrite((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), offset, data); } // kgspMapBufferDescriptor: virtual inherited (kcrashcatEngine) base (kflcn) -static void * __nvoc_up_thunk_KernelCrashCatEngine_kgspMapBufferDescriptor(struct KernelGsp *arg_this, CrashCatBufferDescriptor *pBufDesc) { +void * __nvoc_up_thunk_KernelCrashCatEngine_kgspMapBufferDescriptor(struct KernelGsp *arg_this, CrashCatBufferDescriptor *pBufDesc) { return kcrashcatEngineMapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), pBufDesc); } // kgspUnmapBufferDescriptor: virtual inherited (kcrashcatEngine) base (kflcn) -static void __nvoc_up_thunk_KernelCrashCatEngine_kgspUnmapBufferDescriptor(struct KernelGsp *arg_this, CrashCatBufferDescriptor *pBufDesc) { +void __nvoc_up_thunk_KernelCrashCatEngine_kgspUnmapBufferDescriptor(struct KernelGsp *arg_this, CrashCatBufferDescriptor *pBufDesc) { kcrashcatEngineUnmapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), pBufDesc); } // kgspSyncBufferDescriptor: virtual inherited (kcrashcatEngine) base (kflcn) -static void __nvoc_up_thunk_KernelCrashCatEngine_kgspSyncBufferDescriptor(struct KernelGsp *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { +void __nvoc_up_thunk_KernelCrashCatEngine_kgspSyncBufferDescriptor(struct KernelGsp *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { kcrashcatEngineSyncBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), pBufDesc, offset, size); } // kgspReadDmem: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) -static void __nvoc_up_thunk_KernelCrashCatEngine_kgspReadDmem(struct KernelGsp *arg_this, NvU32 offset, NvU32 size, void *pBuf) { +void __nvoc_up_thunk_KernelCrashCatEngine_kgspReadDmem(struct KernelGsp *arg_this, NvU32 offset, NvU32 size, void *pBuf) { kcrashcatEngineReadDmem((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), offset, size, pBuf); } // kgspGetScratchOffsets: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) -static const NvU32 * __nvoc_up_thunk_KernelCrashCatEngine_kgspGetScratchOffsets(struct KernelGsp *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { +const NvU32 * __nvoc_up_thunk_KernelCrashCatEngine_kgspGetScratchOffsets(struct KernelGsp *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { return kcrashcatEngineGetScratchOffsets((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset), scratchGroupId); } // kgspGetWFL0Offset: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) -static NvU32 __nvoc_up_thunk_KernelCrashCatEngine_kgspGetWFL0Offset(struct KernelGsp *arg_this) { +NvU32 __nvoc_up_thunk_KernelCrashCatEngine_kgspGetWFL0Offset(struct KernelGsp *arg_this) { return kcrashcatEngineGetWFL0Offset((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelGsp_KernelCrashCatEngine.offset)); } @@ -310,23 +373,23 @@ void __nvoc_init_dataField_KernelGsp(KernelGsp *pThis, RmHalspecOwner *pRmhalspe // Hal field -- bPartitionedFmc if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->bPartitionedFmc = ((NvBool)(0 == 0)); + pThis->bPartitionedFmc = NV_TRUE; } // default else { - pThis->bPartitionedFmc = ((NvBool)(0 != 0)); + pThis->bPartitionedFmc = NV_FALSE; } // Hal field -- bScrubberUcodeSupported if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f00000UL) )) /* ChipHal: AD102 | AD103 | AD104 | AD106 | AD107 */ { - pThis->bScrubberUcodeSupported = ((NvBool)(0 == 0)); + pThis->bScrubberUcodeSupported = NV_TRUE; } // default else { - pThis->bScrubberUcodeSupported = ((NvBool)(0 != 0)); + pThis->bScrubberUcodeSupported = NV_FALSE; } // Hal field -- fwHeapParamBaseSize @@ -342,12 +405,12 @@ void __nvoc_init_dataField_KernelGsp(KernelGsp *pThis, RmHalspecOwner *pRmhalspe // Hal field -- bBootGspRmWithBoostClocks if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ { - pThis->bBootGspRmWithBoostClocks = ((NvBool)(0 == 0)); + pThis->bBootGspRmWithBoostClocks = NV_TRUE; } // default else { - pThis->bBootGspRmWithBoostClocks = ((NvBool)(0 != 0)); + pThis->bBootGspRmWithBoostClocks = NV_FALSE; } // Hal field -- ememPort @@ -403,22 +466,6 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // kgspConstructEngine -- virtual override (engstate) base (engstate) - pThis->__kgspConstructEngine__ = &kgspConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelGsp_engstateConstructEngine; - - // kgspStateInitLocked -- virtual override (engstate) base (engstate) - pThis->__kgspStateInitLocked__ = &kgspStateInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelGsp_engstateStateInitLocked; - - // kgspRegisterIntrService -- virtual override (intrserv) base (intrserv) - pThis->__kgspRegisterIntrService__ = &kgspRegisterIntrService_IMPL; - pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_KernelGsp_intrservRegisterIntrService; - - // kgspServiceInterrupt -- virtual override (intrserv) base (intrserv) - pThis->__kgspServiceInterrupt__ = &kgspServiceInterrupt_IMPL; - pThis->__nvoc_base_IntrService.__intrservServiceInterrupt__ = &__nvoc_down_thunk_KernelGsp_intrservServiceInterrupt; - // kgspConfigureFalcon -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { @@ -439,7 +486,7 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * // kgspIsDebugModeEnabled -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__kgspIsDebugModeEnabled__ = &kgspIsDebugModeEnabled_108313; + pThis->__kgspIsDebugModeEnabled__ = &kgspIsDebugModeEnabled_86b752; } else { @@ -541,6 +588,23 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } + // kgspTeardown -- halified (3 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__kgspTeardown__ = &kgspTeardown_5baef9; + } + else + { + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ + { + pThis->__kgspTeardown__ = &kgspTeardown_GH100; + } + else + { + pThis->__kgspTeardown__ = &kgspTeardown_TU102; + } + } + // kgspGetGspRmBootUcodeStorage -- halified (5 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { @@ -785,12 +849,11 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * pThis->__kgspResetHw__ = &kgspResetHw_TU102; } } - pThis->__nvoc_base_KernelFalcon.__kflcnResetHw__ = &__nvoc_down_thunk_KernelGsp_kflcnResetHw; // kgspHealthCheck -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__kgspHealthCheck__ = &kgspHealthCheck_108313; + pThis->__kgspHealthCheck__ = &kgspHealthCheck_86b752; } else { @@ -807,10 +870,64 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * pThis->__kgspService__ = &kgspService_TU102; } + // kgspServiceFatalHwError -- halified (3 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__kgspServiceFatalHwError__ = &kgspServiceFatalHwError_f2d351; + } + else + { + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__kgspServiceFatalHwError__ = &kgspServiceFatalHwError_GB100; + } + // default + else + { + pThis->__kgspServiceFatalHwError__ = &kgspServiceFatalHwError_b3696a; + } + } + + // kgspEccServiceEvent -- halified (3 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__kgspEccServiceEvent__ = &kgspEccServiceEvent_f2d351; + } + else + { + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__kgspEccServiceEvent__ = &kgspEccServiceEvent_GB100; + } + // default + else + { + pThis->__kgspEccServiceEvent__ = &kgspEccServiceEvent_d44104; + } + } + + // kgspEccServiceUncorrError -- halified (3 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__kgspEccServiceUncorrError__ = &kgspEccServiceUncorrError_f2d351; + } + else + { + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__kgspEccServiceUncorrError__ = &kgspEccServiceUncorrError_GB100; + } + // default + else + { + pThis->__kgspEccServiceUncorrError__ = &kgspEccServiceUncorrError_d44104; + } + } + // kgspIsWpr2Up -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__kgspIsWpr2Up__ = &kgspIsWpr2Up_108313; + pThis->__kgspIsWpr2Up__ = &kgspIsWpr2Up_86b752; } else { @@ -1012,24 +1129,14 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * pThis->__kgspWaitForProcessorSuspend__ = &kgspWaitForProcessorSuspend_TU102; } - // kgspSavePowerMgmtState -- halified (2 hals) body - if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ - { - pThis->__kgspSavePowerMgmtState__ = &kgspSavePowerMgmtState_5baef9; - } - else - { - pThis->__kgspSavePowerMgmtState__ = &kgspSavePowerMgmtState_TU102; - } - - // kgspRestorePowerMgmtState -- halified (2 hals) body + // kgspPrepareSuspendResumeData -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__kgspRestorePowerMgmtState__ = &kgspRestorePowerMgmtState_5baef9; + pThis->__kgspPrepareSuspendResumeData__ = &kgspPrepareSuspendResumeData_5baef9; } else { - pThis->__kgspRestorePowerMgmtState__ = &kgspRestorePowerMgmtState_TU102; + pThis->__kgspPrepareSuspendResumeData__ = &kgspPrepareSuspendResumeData_TU102; } // kgspFreeSuspendResumeData -- halified (2 hals) body @@ -1193,6 +1300,23 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } + // kgspPreserveVgpuPartitionLogging -- halified (3 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__kgspPreserveVgpuPartitionLogging__ = &kgspPreserveVgpuPartitionLogging_395e98; + } + else + { + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000007e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 */ + { + pThis->__kgspPreserveVgpuPartitionLogging__ = &kgspPreserveVgpuPartitionLogging_395e98; + } + else + { + pThis->__kgspPreserveVgpuPartitionLogging__ = &kgspPreserveVgpuPartitionLogging_IMPL; + } + } + // kgspFreeVgpuPartitionLogging -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { @@ -1259,7 +1383,6 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * { pThis->__kgspReadEmem__ = &kgspReadEmem_TU102; } - pThis->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineReadEmem__ = &__nvoc_down_thunk_KernelGsp_kcrashcatEngineReadEmem; // kgspIssueNotifyOp -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ @@ -1297,48 +1420,6 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * } } - // kgspInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__kgspInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kgspInitMissing; - - // kgspStatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__kgspStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStatePreInitLocked; - - // kgspStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kgspStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStatePreInitUnlocked; - - // kgspStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kgspStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStateInitUnlocked; - - // kgspStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__kgspStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStatePreLoad; - - // kgspStateLoad -- virtual inherited (engstate) base (engstate) - pThis->__kgspStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStateLoad; - - // kgspStatePostLoad -- virtual inherited (engstate) base (engstate) - pThis->__kgspStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStatePostLoad; - - // kgspStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__kgspStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStatePreUnload; - - // kgspStateUnload -- virtual inherited (engstate) base (engstate) - pThis->__kgspStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStateUnload; - - // kgspStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__kgspStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStatePostUnload; - - // kgspStateDestroy -- virtual inherited (engstate) base (engstate) - pThis->__kgspStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStateDestroy; - - // kgspIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__kgspIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kgspIsPresent; - - // kgspClearInterrupt -- virtual inherited (intrserv) base (intrserv) - pThis->__kgspClearInterrupt__ = &__nvoc_up_thunk_IntrService_kgspClearInterrupt; - - // kgspServiceNotificationInterrupt -- virtual inherited (intrserv) base (intrserv) - pThis->__kgspServiceNotificationInterrupt__ = &__nvoc_up_thunk_IntrService_kgspServiceNotificationInterrupt; - // kgspRegRead -- virtual halified (2 hals) inherited (kflcn) base (kflcn) body pThis->__kgspRegRead__ = &__nvoc_up_thunk_KernelFalcon_kgspRegRead; @@ -1347,46 +1428,110 @@ static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner * // kgspMaskDmemAddr -- virtual halified (3 hals) inherited (kflcn) base (kflcn) body pThis->__kgspMaskDmemAddr__ = &__nvoc_up_thunk_KernelFalcon_kgspMaskDmemAddr; - - // kgspConfigured -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__kgspConfigured__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspConfigured; - - // kgspUnload -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__kgspUnload__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspUnload; - - // kgspVprintf -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__kgspVprintf__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspVprintf; - - // kgspPriRead -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__kgspPriRead__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspPriRead; - - // kgspPriWrite -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__kgspPriWrite__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspPriWrite; - - // kgspMapBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__kgspMapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspMapBufferDescriptor; - - // kgspUnmapBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__kgspUnmapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspUnmapBufferDescriptor; - - // kgspSyncBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__kgspSyncBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspSyncBufferDescriptor; - - // kgspReadDmem -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) - pThis->__kgspReadDmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspReadDmem; - - // kgspGetScratchOffsets -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) - pThis->__kgspGetScratchOffsets__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspGetScratchOffsets; - - // kgspGetWFL0Offset -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) - pThis->__kgspGetWFL0Offset__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspGetWFL0Offset; -} // End __nvoc_init_funcTable_KernelGsp_1 with approximately 203 basic block(s). +} // End __nvoc_init_funcTable_KernelGsp_1 with approximately 181 basic block(s). -// Initialize vtable(s) for 82 virtual method(s). +// Initialize vtable(s) for 86 virtual method(s). void __nvoc_init_funcTable_KernelGsp(KernelGsp *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 82 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelGsp vtable = { + .__kgspConstructEngine__ = &kgspConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelGsp_engstateConstructEngine, // virtual + .__kgspStateInitLocked__ = &kgspStateInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelGsp_engstateStateInitLocked, // virtual + .__kgspRegisterIntrService__ = &kgspRegisterIntrService_IMPL, // virtual override (intrserv) base (intrserv) + .IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_KernelGsp_intrservRegisterIntrService, // virtual + .__kgspServiceInterrupt__ = &kgspServiceInterrupt_IMPL, // virtual override (intrserv) base (intrserv) + .IntrService.__intrservServiceInterrupt__ = &__nvoc_down_thunk_KernelGsp_intrservServiceInterrupt, // virtual + .KernelFalcon.__kflcnResetHw__ = &__nvoc_down_thunk_KernelGsp_kflcnResetHw, // pure virtual + .KernelFalcon.__kflcnReadEmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnReadEmem, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineReadEmem__ = &__nvoc_down_thunk_KernelGsp_kcrashcatEngineReadEmem, // virtual halified (singleton optimized) + .__kgspInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kgspInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__kgspStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStatePreInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__kgspStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__kgspStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__kgspStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__kgspStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStateLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &engstateStateLoad_IMPL, // virtual + .__kgspStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStatePostLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL, // virtual + .__kgspStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__kgspStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStateUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &engstateStateUnload_IMPL, // virtual + .__kgspStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__kgspStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_kgspStateDestroy, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &engstateStateDestroy_IMPL, // virtual + .__kgspIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kgspIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + .__kgspClearInterrupt__ = &__nvoc_up_thunk_IntrService_kgspClearInterrupt, // virtual inherited (intrserv) base (intrserv) + .IntrService.__intrservClearInterrupt__ = &intrservClearInterrupt_IMPL, // virtual + .__kgspServiceNotificationInterrupt__ = &__nvoc_up_thunk_IntrService_kgspServiceNotificationInterrupt, // virtual inherited (intrserv) base (intrserv) + .IntrService.__intrservServiceNotificationInterrupt__ = &intrservServiceNotificationInterrupt_IMPL, // virtual + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineRegRead__ = &__nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegRead, // pure virtual + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineRegWrite__ = &__nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegWrite, // pure virtual + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineMaskDmemAddr__ = &__nvoc_down_thunk_KernelFalcon_kcrashcatEngineMaskDmemAddr, // pure virtual + .__kgspConfigured__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspConfigured, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnConfigured__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnConfigured, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineConfigured__ = &kcrashcatEngineConfigured_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineConfigured__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineConfigured, // pure virtual + .__kgspUnload__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspUnload, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnUnload__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnUnload, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineUnload__ = &kcrashcatEngineUnload_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineUnload__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnload, // virtual + .__kgspVprintf__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspVprintf, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnVprintf__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnVprintf, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineVprintf__ = &kcrashcatEngineVprintf_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineVprintf__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineVprintf, // pure virtual + .__kgspPriRead__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspPriRead, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnPriRead__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnPriRead, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEnginePriRead__ = &kcrashcatEnginePriRead_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEnginePriRead__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriRead, // pure virtual + .__kgspPriWrite__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspPriWrite, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnPriWrite__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnPriWrite, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEnginePriWrite__ = &kcrashcatEnginePriWrite_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEnginePriWrite__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriWrite, // pure virtual + .__kgspMapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspMapBufferDescriptor, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnMapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnMapBufferDescriptor, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineMapBufferDescriptor__ = &kcrashcatEngineMapBufferDescriptor_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineMapBufferDescriptor__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineMapBufferDescriptor, // pure virtual + .__kgspUnmapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspUnmapBufferDescriptor, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnUnmapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnUnmapBufferDescriptor, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineUnmapBufferDescriptor__ = &kcrashcatEngineUnmapBufferDescriptor_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineUnmapBufferDescriptor__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnmapBufferDescriptor, // pure virtual + .__kgspSyncBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspSyncBufferDescriptor, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnSyncBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnSyncBufferDescriptor, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineSyncBufferDescriptor__ = &kcrashcatEngineSyncBufferDescriptor_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineSyncBufferDescriptor__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineSyncBufferDescriptor, // pure virtual + .__kgspReadDmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspReadDmem, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnReadDmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnReadDmem, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineReadDmem__ = &kcrashcatEngineReadDmem_TU102, // virtual halified (singleton optimized) + .__kgspGetScratchOffsets__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspGetScratchOffsets, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnGetScratchOffsets__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnGetScratchOffsets, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineGetScratchOffsets__ = &kcrashcatEngineGetScratchOffsets_TU102, // virtual halified (singleton optimized) override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineGetScratchOffsets__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetScratchOffsets, // pure virtual + .__kgspGetWFL0Offset__ = &__nvoc_up_thunk_KernelCrashCatEngine_kgspGetWFL0Offset, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnGetWFL0Offset__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnGetWFL0Offset, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineGetWFL0Offset__ = &kcrashcatEngineGetWFL0Offset_TU102, // virtual halified (singleton optimized) override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineGetWFL0Offset__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetWFL0Offset, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_base_IntrService.__nvoc_vtable = &vtable.IntrService; // (intrserv) super + pThis->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_base_CrashCatEngine.__nvoc_vtable = &vtable.KernelFalcon.KernelCrashCatEngine.CrashCatEngine; // (crashcatEngine) super^3 + pThis->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable = &vtable.KernelFalcon.KernelCrashCatEngine; // (kcrashcatEngine) super^2 + pThis->__nvoc_base_KernelFalcon.__nvoc_vtable = &vtable.KernelFalcon; // (kflcn) super + pThis->__nvoc_vtable = &vtable; // (kgsp) this + + // Initialize vtable(s) with 57 per-object function pointer(s). __nvoc_init_funcTable_KernelGsp_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_gsp_nvoc.h b/src/nvidia/generated/g_kernel_gsp_nvoc.h index 60fdc2eb06..4d0c0e56de 100644 --- a/src/nvidia/generated/g_kernel_gsp_nvoc.h +++ b/src/nvidia/generated/g_kernel_gsp_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -204,6 +204,26 @@ typedef struct KernelGspPreparedFwsecCmd NvU64 frtsOffset; } KernelGspPreparedFwsecCmd; +/*! + * GSP boot modes (to distinguish normal driver load from resume and GC6 exit) + */ +typedef enum KernelGspBootMode +{ + KGSP_BOOT_MODE_NORMAL = 0x0, + KGSP_BOOT_MODE_SR_RESUME = 0x1, // including all none GC6 path + KGSP_BOOT_MODE_GC6_EXIT = 0x2 +} KernelGspBootMode; + +/*! + * GSP teardown modes (to distinguish normal driver unload from suspend and GC6 enter) + */ +typedef enum KernelGspUnloadMode +{ + KGSP_UNLOAD_MODE_NORMAL = 0x0, + KGSP_UNLOAD_MODE_SR_SUSPEND = 0x1, // including all none GC6 path + KGSP_UNLOAD_MODE_GC6_ENTER = 0x2 +} KernelGspUnloadMode; + /*! * GSP-RM source when running in Emulated/Simulated RISCV environment is * extremely slow, so we need a factor (X) to scale timeouts by. @@ -280,6 +300,7 @@ enum LOGIDX_INTR, LOGIDX_RM, LOGIDX_KERNEL, + LOGIDX_MNOC, LOGIDX_SIZE }; @@ -308,6 +329,10 @@ typedef struct #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + +// Metadata including vtable +struct NVOC_VTABLE__KernelGsp; + struct MESSAGE_QUEUE_COLLECTION; @@ -316,6 +341,7 @@ struct KernelGsp { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelGsp *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -331,19 +357,16 @@ struct KernelGsp { struct KernelFalcon *__nvoc_pbase_KernelFalcon; // kflcn super struct KernelGsp *__nvoc_pbase_KernelGsp; // kgsp - // Vtable with 82 per-object function pointers - NV_STATUS (*__kgspConstructEngine__)(struct OBJGPU *, struct KernelGsp * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) - NV_STATUS (*__kgspStateInitLocked__)(struct OBJGPU *, struct KernelGsp * /*this*/); // virtual override (engstate) base (engstate) - void (*__kgspRegisterIntrService__)(struct OBJGPU *, struct KernelGsp * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) - NvU32 (*__kgspServiceInterrupt__)(struct OBJGPU *, struct KernelGsp * /*this*/, IntrServiceServiceInterruptArguments *); // virtual override (intrserv) base (intrserv) + // Vtable with 57 per-object function pointers void (*__kgspConfigureFalcon__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body NvBool (*__kgspIsDebugModeEnabled__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body NV_STATUS (*__kgspAllocBootArgs__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body void (*__kgspFreeBootArgs__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body void (*__kgspProgramLibosBootArgsAddr__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (2 hals) body NV_STATUS (*__kgspSetCmdQueueHead__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32, NvU32); // halified (2 hals) body - NV_STATUS (*__kgspPrepareForBootstrap__)(struct OBJGPU *, struct KernelGsp * /*this*/, GSP_FIRMWARE *); // halified (3 hals) body - NV_STATUS (*__kgspBootstrap__)(struct OBJGPU *, struct KernelGsp * /*this*/, GSP_FIRMWARE *); // halified (3 hals) body + NV_STATUS (*__kgspPrepareForBootstrap__)(struct OBJGPU *, struct KernelGsp * /*this*/, KernelGspBootMode); // halified (3 hals) body + NV_STATUS (*__kgspBootstrap__)(struct OBJGPU *, struct KernelGsp * /*this*/, KernelGspBootMode); // halified (3 hals) body + NV_STATUS (*__kgspTeardown__)(struct OBJGPU *, struct KernelGsp * /*this*/, KernelGspUnloadMode); // halified (3 hals) body void (*__kgspGetGspRmBootUcodeStorage__)(struct OBJGPU *, struct KernelGsp * /*this*/, BINDATA_STORAGE **, BINDATA_STORAGE **); // halified (5 hals) body const BINDATA_ARCHIVE * (*__kgspGetBinArchiveGspRmBoot__)(struct KernelGsp * /*this*/); // halified (7 hals) body const BINDATA_ARCHIVE * (*__kgspGetBinArchiveConcatenatedFMCDesc__)(struct KernelGsp * /*this*/); // halified (3 hals) body @@ -358,6 +381,9 @@ struct KernelGsp { NV_STATUS (*__kgspResetHw__)(struct OBJGPU *, struct KernelGsp * /*this*/); // virtual halified (4 hals) override (kflcn) base (kflcn) body NvBool (*__kgspHealthCheck__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (2 hals) body NvU32 (*__kgspService__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (2 hals) body + void (*__kgspServiceFatalHwError__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32); // halified (3 hals) body + void (*__kgspEccServiceEvent__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body + void (*__kgspEccServiceUncorrError__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body NvBool (*__kgspIsWpr2Up__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body NvU32 (*__kgspGetFrtsSize__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body NvU64 (*__kgspGetPrescrubbedTopFbSize__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (4 hals) body @@ -370,8 +396,7 @@ struct KernelGsp { NV_STATUS (*__kgspExecuteBooterUnloadIfNeeded__)(struct OBJGPU *, struct KernelGsp * /*this*/, const NvU64); // halified (3 hals) body NV_STATUS (*__kgspExecuteHsFalcon__)(struct OBJGPU *, struct KernelGsp * /*this*/, KernelGspFlcnUcode *, struct KernelFalcon *, NvU32 *, NvU32 *); // halified (4 hals) body NV_STATUS (*__kgspWaitForProcessorSuspend__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (2 hals) body - NV_STATUS (*__kgspSavePowerMgmtState__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (2 hals) body - NV_STATUS (*__kgspRestorePowerMgmtState__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (2 hals) body + NV_STATUS (*__kgspPrepareSuspendResumeData__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (2 hals) body void (*__kgspFreeSuspendResumeData__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (2 hals) body NV_STATUS (*__kgspWaitForGfwBootOk__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body const BINDATA_ARCHIVE * (*__kgspGetBinArchiveBooterLoadUcode__)(struct KernelGsp * /*this*/); // halified (7 hals) body @@ -379,41 +404,17 @@ struct KernelGsp { NvU64 (*__kgspGetMinWprHeapSizeMB__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body NvU64 (*__kgspGetMaxWprHeapSizeMB__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body NvU32 (*__kgspGetFwHeapParamOsCarveoutSize__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body - NV_STATUS (*__kgspInitVgpuPartitionLogging__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32, NvU64, NvU64, NvU64, NvU64, NvU64, NvU64); // halified (3 hals) body + NV_STATUS (*__kgspInitVgpuPartitionLogging__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32, NvU64, NvU64, NvU64, NvU64, NvU64, NvU64, NvBool *); // halified (3 hals) body + NV_STATUS (*__kgspPreserveVgpuPartitionLogging__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32); // halified (3 hals) body NV_STATUS (*__kgspFreeVgpuPartitionLogging__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32); // halified (3 hals) body const char * (*__kgspGetSignatureSectionNamePrefix__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (4 hals) body - NV_STATUS (*__kgspSetupGspFmcArgs__)(struct OBJGPU *, struct KernelGsp * /*this*/, GSP_FIRMWARE *); // halified (3 hals) body + NV_STATUS (*__kgspSetupGspFmcArgs__)(struct OBJGPU *, struct KernelGsp * /*this*/, KernelGspBootMode); // halified (3 hals) body void (*__kgspReadEmem__)(struct KernelGsp * /*this*/, NvU64, NvU64, void *); // virtual halified (2 hals) override (kcrashcatEngine) base (kflcn) body NV_STATUS (*__kgspIssueNotifyOp__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32, NvU32 *, NvU32); // halified (3 hals) body NV_STATUS (*__kgspCheckGspRmCcCleanup__)(struct OBJGPU *, struct KernelGsp * /*this*/); // halified (3 hals) body - void (*__kgspInitMissing__)(struct OBJGPU *, struct KernelGsp * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgspStatePreInitLocked__)(struct OBJGPU *, struct KernelGsp * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgspStatePreInitUnlocked__)(struct OBJGPU *, struct KernelGsp * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgspStateInitUnlocked__)(struct OBJGPU *, struct KernelGsp * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgspStatePreLoad__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgspStateLoad__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgspStatePostLoad__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgspStatePreUnload__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgspStateUnload__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kgspStatePostUnload__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - void (*__kgspStateDestroy__)(struct OBJGPU *, struct KernelGsp * /*this*/); // virtual inherited (engstate) base (engstate) - NvBool (*__kgspIsPresent__)(struct OBJGPU *, struct KernelGsp * /*this*/); // virtual inherited (engstate) base (engstate) - NvBool (*__kgspClearInterrupt__)(struct OBJGPU *, struct KernelGsp * /*this*/, IntrServiceClearInterruptArguments *); // virtual inherited (intrserv) base (intrserv) - NV_STATUS (*__kgspServiceNotificationInterrupt__)(struct OBJGPU *, struct KernelGsp * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual inherited (intrserv) base (intrserv) NvU32 (*__kgspRegRead__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32); // virtual halified (2 hals) inherited (kflcn) base (kflcn) body void (*__kgspRegWrite__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32, NvU32); // virtual halified (2 hals) inherited (kflcn) base (kflcn) body NvU32 (*__kgspMaskDmemAddr__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32); // virtual halified (3 hals) inherited (kflcn) base (kflcn) body - NvBool (*__kgspConfigured__)(struct KernelGsp * /*this*/); // virtual inherited (kcrashcatEngine) base (kflcn) - void (*__kgspUnload__)(struct KernelGsp * /*this*/); // virtual inherited (kcrashcatEngine) base (kflcn) - void (*__kgspVprintf__)(struct KernelGsp * /*this*/, NvBool, const char *, va_list); // virtual inherited (kcrashcatEngine) base (kflcn) - NvU32 (*__kgspPriRead__)(struct KernelGsp * /*this*/, NvU32); // virtual inherited (kcrashcatEngine) base (kflcn) - void (*__kgspPriWrite__)(struct KernelGsp * /*this*/, NvU32, NvU32); // virtual inherited (kcrashcatEngine) base (kflcn) - void * (*__kgspMapBufferDescriptor__)(struct KernelGsp * /*this*/, CrashCatBufferDescriptor *); // virtual inherited (kcrashcatEngine) base (kflcn) - void (*__kgspUnmapBufferDescriptor__)(struct KernelGsp * /*this*/, CrashCatBufferDescriptor *); // virtual inherited (kcrashcatEngine) base (kflcn) - void (*__kgspSyncBufferDescriptor__)(struct KernelGsp * /*this*/, CrashCatBufferDescriptor *, NvU32, NvU32); // virtual inherited (kcrashcatEngine) base (kflcn) - void (*__kgspReadDmem__)(struct KernelGsp * /*this*/, NvU32, NvU32, void *); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) - const NvU32 * (*__kgspGetScratchOffsets__)(struct KernelGsp * /*this*/, NV_CRASHCAT_SCRATCH_GROUP_ID); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) - NvU32 (*__kgspGetWFL0Offset__)(struct KernelGsp * /*this*/); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) // Data members struct MESSAGE_QUEUE_COLLECTION *pMQCollection; @@ -447,7 +448,7 @@ struct KernelGsp { MEMORY_DESCRIPTOR *pSignatureMemdesc; LIBOS_LOG_DECODE logDecode; LIBOS_LOG_DECODE logDecodeVgpuPartition[32]; - RM_LIBOS_LOG_MEM rmLibosLogMem[4]; + RM_LIBOS_LOG_MEM rmLibosLogMem[5]; RM_LIBOS_LOG_MEM gspPluginInitTaskLogMem[32]; RM_LIBOS_LOG_MEM gspPluginVgpuTaskLogMem[32]; RM_LIBOS_LOG_MEM libosKernelLogMem[32]; @@ -478,6 +479,44 @@ struct KernelGsp { NvU8 ememPort; }; + +// Metadata including vtable with 29 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelGsp { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + const struct NVOC_VTABLE__IntrService IntrService; // (intrserv) 4 function pointers + const struct NVOC_VTABLE__KernelFalcon KernelFalcon; // (kflcn) 13 function pointers + + NV_STATUS (*__kgspConstructEngine__)(struct OBJGPU *, struct KernelGsp * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kgspStateInitLocked__)(struct OBJGPU *, struct KernelGsp * /*this*/); // virtual override (engstate) base (engstate) + void (*__kgspRegisterIntrService__)(struct OBJGPU *, struct KernelGsp * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) + NvU32 (*__kgspServiceInterrupt__)(struct OBJGPU *, struct KernelGsp * /*this*/, IntrServiceServiceInterruptArguments *); // virtual override (intrserv) base (intrserv) + void (*__kgspInitMissing__)(struct OBJGPU *, struct KernelGsp * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgspStatePreInitLocked__)(struct OBJGPU *, struct KernelGsp * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgspStatePreInitUnlocked__)(struct OBJGPU *, struct KernelGsp * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgspStateInitUnlocked__)(struct OBJGPU *, struct KernelGsp * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgspStatePreLoad__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgspStateLoad__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgspStatePostLoad__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgspStatePreUnload__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgspStateUnload__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kgspStatePostUnload__)(struct OBJGPU *, struct KernelGsp * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__kgspStateDestroy__)(struct OBJGPU *, struct KernelGsp * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__kgspIsPresent__)(struct OBJGPU *, struct KernelGsp * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__kgspClearInterrupt__)(struct OBJGPU *, struct KernelGsp * /*this*/, IntrServiceClearInterruptArguments *); // virtual inherited (intrserv) base (intrserv) + NV_STATUS (*__kgspServiceNotificationInterrupt__)(struct OBJGPU *, struct KernelGsp * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual inherited (intrserv) base (intrserv) + NvBool (*__kgspConfigured__)(struct KernelGsp * /*this*/); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__kgspUnload__)(struct KernelGsp * /*this*/); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__kgspVprintf__)(struct KernelGsp * /*this*/, NvBool, const char *, va_list); // virtual inherited (kcrashcatEngine) base (kflcn) + NvU32 (*__kgspPriRead__)(struct KernelGsp * /*this*/, NvU32); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__kgspPriWrite__)(struct KernelGsp * /*this*/, NvU32, NvU32); // virtual inherited (kcrashcatEngine) base (kflcn) + void * (*__kgspMapBufferDescriptor__)(struct KernelGsp * /*this*/, CrashCatBufferDescriptor *); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__kgspUnmapBufferDescriptor__)(struct KernelGsp * /*this*/, CrashCatBufferDescriptor *); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__kgspSyncBufferDescriptor__)(struct KernelGsp * /*this*/, CrashCatBufferDescriptor *, NvU32, NvU32); // virtual inherited (kcrashcatEngine) base (kflcn) + void (*__kgspReadDmem__)(struct KernelGsp * /*this*/, NvU32, NvU32, void *); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + const NvU32 * (*__kgspGetScratchOffsets__)(struct KernelGsp * /*this*/, NV_CRASHCAT_SCRATCH_GROUP_ID); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + NvU32 (*__kgspGetWFL0Offset__)(struct KernelGsp * /*this*/); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) +}; + #ifndef __NVOC_CLASS_KernelGsp_TYPEDEF__ #define __NVOC_CLASS_KernelGsp_TYPEDEF__ typedef struct KernelGsp KernelGsp; @@ -512,13 +551,13 @@ NV_STATUS __nvoc_objCreate_KernelGsp(KernelGsp**, Dynamic*, NvU32); // Wrapper macros -#define kgspConstructEngine_FNPTR(pKernelGsp) pKernelGsp->__kgspConstructEngine__ +#define kgspConstructEngine_FNPTR(pKernelGsp) pKernelGsp->__nvoc_vtable->__kgspConstructEngine__ #define kgspConstructEngine(pGpu, pKernelGsp, arg3) kgspConstructEngine_DISPATCH(pGpu, pKernelGsp, arg3) -#define kgspStateInitLocked_FNPTR(pKernelGsp) pKernelGsp->__kgspStateInitLocked__ +#define kgspStateInitLocked_FNPTR(pKernelGsp) pKernelGsp->__nvoc_vtable->__kgspStateInitLocked__ #define kgspStateInitLocked(pGpu, pKernelGsp) kgspStateInitLocked_DISPATCH(pGpu, pKernelGsp) -#define kgspRegisterIntrService_FNPTR(pKernelGsp) pKernelGsp->__kgspRegisterIntrService__ +#define kgspRegisterIntrService_FNPTR(pKernelGsp) pKernelGsp->__nvoc_vtable->__kgspRegisterIntrService__ #define kgspRegisterIntrService(pGpu, pKernelGsp, pRecords) kgspRegisterIntrService_DISPATCH(pGpu, pKernelGsp, pRecords) -#define kgspServiceInterrupt_FNPTR(pKernelGsp) pKernelGsp->__kgspServiceInterrupt__ +#define kgspServiceInterrupt_FNPTR(pKernelGsp) pKernelGsp->__nvoc_vtable->__kgspServiceInterrupt__ #define kgspServiceInterrupt(pGpu, pKernelGsp, pParams) kgspServiceInterrupt_DISPATCH(pGpu, pKernelGsp, pParams) #define kgspConfigureFalcon_FNPTR(pKernelGsp) pKernelGsp->__kgspConfigureFalcon__ #define kgspConfigureFalcon(pGpu, pKernelGsp) kgspConfigureFalcon_DISPATCH(pGpu, pKernelGsp) @@ -539,11 +578,14 @@ NV_STATUS __nvoc_objCreate_KernelGsp(KernelGsp**, Dynamic*, NvU32); #define kgspSetCmdQueueHead(pGpu, pKernelGsp, queueIdx, value) kgspSetCmdQueueHead_DISPATCH(pGpu, pKernelGsp, queueIdx, value) #define kgspSetCmdQueueHead_HAL(pGpu, pKernelGsp, queueIdx, value) kgspSetCmdQueueHead_DISPATCH(pGpu, pKernelGsp, queueIdx, value) #define kgspPrepareForBootstrap_FNPTR(pKernelGsp) pKernelGsp->__kgspPrepareForBootstrap__ -#define kgspPrepareForBootstrap(pGpu, pKernelGsp, pGspFw) kgspPrepareForBootstrap_DISPATCH(pGpu, pKernelGsp, pGspFw) -#define kgspPrepareForBootstrap_HAL(pGpu, pKernelGsp, pGspFw) kgspPrepareForBootstrap_DISPATCH(pGpu, pKernelGsp, pGspFw) +#define kgspPrepareForBootstrap(pGpu, pKernelGsp, bootMode) kgspPrepareForBootstrap_DISPATCH(pGpu, pKernelGsp, bootMode) +#define kgspPrepareForBootstrap_HAL(pGpu, pKernelGsp, bootMode) kgspPrepareForBootstrap_DISPATCH(pGpu, pKernelGsp, bootMode) #define kgspBootstrap_FNPTR(pKernelGsp) pKernelGsp->__kgspBootstrap__ -#define kgspBootstrap(pGpu, pKernelGsp, pGspFw) kgspBootstrap_DISPATCH(pGpu, pKernelGsp, pGspFw) -#define kgspBootstrap_HAL(pGpu, pKernelGsp, pGspFw) kgspBootstrap_DISPATCH(pGpu, pKernelGsp, pGspFw) +#define kgspBootstrap(pGpu, pKernelGsp, bootMode) kgspBootstrap_DISPATCH(pGpu, pKernelGsp, bootMode) +#define kgspBootstrap_HAL(pGpu, pKernelGsp, bootMode) kgspBootstrap_DISPATCH(pGpu, pKernelGsp, bootMode) +#define kgspTeardown_FNPTR(pKernelGsp) pKernelGsp->__kgspTeardown__ +#define kgspTeardown(pGpu, pKernelGsp, unloadMode) kgspTeardown_DISPATCH(pGpu, pKernelGsp, unloadMode) +#define kgspTeardown_HAL(pGpu, pKernelGsp, unloadMode) kgspTeardown_DISPATCH(pGpu, pKernelGsp, unloadMode) #define kgspGetGspRmBootUcodeStorage_FNPTR(pKernelGsp) pKernelGsp->__kgspGetGspRmBootUcodeStorage__ #define kgspGetGspRmBootUcodeStorage(pGpu, pKernelGsp, ppBinStorageImage, ppBinStorageDesc) kgspGetGspRmBootUcodeStorage_DISPATCH(pGpu, pKernelGsp, ppBinStorageImage, ppBinStorageDesc) #define kgspGetGspRmBootUcodeStorage_HAL(pGpu, pKernelGsp, ppBinStorageImage, ppBinStorageDesc) kgspGetGspRmBootUcodeStorage_DISPATCH(pGpu, pKernelGsp, ppBinStorageImage, ppBinStorageDesc) @@ -586,6 +628,15 @@ NV_STATUS __nvoc_objCreate_KernelGsp(KernelGsp**, Dynamic*, NvU32); #define kgspService_FNPTR(pKernelGsp) pKernelGsp->__kgspService__ #define kgspService(pGpu, pKernelGsp) kgspService_DISPATCH(pGpu, pKernelGsp) #define kgspService_HAL(pGpu, pKernelGsp) kgspService_DISPATCH(pGpu, pKernelGsp) +#define kgspServiceFatalHwError_FNPTR(pKernelGsp) pKernelGsp->__kgspServiceFatalHwError__ +#define kgspServiceFatalHwError(pGpu, pKernelGsp, intrStatus) kgspServiceFatalHwError_DISPATCH(pGpu, pKernelGsp, intrStatus) +#define kgspServiceFatalHwError_HAL(pGpu, pKernelGsp, intrStatus) kgspServiceFatalHwError_DISPATCH(pGpu, pKernelGsp, intrStatus) +#define kgspEccServiceEvent_FNPTR(pKernelGsp) pKernelGsp->__kgspEccServiceEvent__ +#define kgspEccServiceEvent(pGpu, pKernelGsp) kgspEccServiceEvent_DISPATCH(pGpu, pKernelGsp) +#define kgspEccServiceEvent_HAL(pGpu, pKernelGsp) kgspEccServiceEvent_DISPATCH(pGpu, pKernelGsp) +#define kgspEccServiceUncorrError_FNPTR(pKernelGsp) pKernelGsp->__kgspEccServiceUncorrError__ +#define kgspEccServiceUncorrError(pGpu, pKernelGsp) kgspEccServiceUncorrError_DISPATCH(pGpu, pKernelGsp) +#define kgspEccServiceUncorrError_HAL(pGpu, pKernelGsp) kgspEccServiceUncorrError_DISPATCH(pGpu, pKernelGsp) #define kgspIsWpr2Up_FNPTR(pKernelGsp) pKernelGsp->__kgspIsWpr2Up__ #define kgspIsWpr2Up(pGpu, pKernelGsp) kgspIsWpr2Up_DISPATCH(pGpu, pKernelGsp) #define kgspIsWpr2Up_HAL(pGpu, pKernelGsp) kgspIsWpr2Up_DISPATCH(pGpu, pKernelGsp) @@ -622,12 +673,9 @@ NV_STATUS __nvoc_objCreate_KernelGsp(KernelGsp**, Dynamic*, NvU32); #define kgspWaitForProcessorSuspend_FNPTR(pKernelGsp) pKernelGsp->__kgspWaitForProcessorSuspend__ #define kgspWaitForProcessorSuspend(pGpu, pKernelGsp) kgspWaitForProcessorSuspend_DISPATCH(pGpu, pKernelGsp) #define kgspWaitForProcessorSuspend_HAL(pGpu, pKernelGsp) kgspWaitForProcessorSuspend_DISPATCH(pGpu, pKernelGsp) -#define kgspSavePowerMgmtState_FNPTR(pKernelGsp) pKernelGsp->__kgspSavePowerMgmtState__ -#define kgspSavePowerMgmtState(pGpu, pKernelGsp) kgspSavePowerMgmtState_DISPATCH(pGpu, pKernelGsp) -#define kgspSavePowerMgmtState_HAL(pGpu, pKernelGsp) kgspSavePowerMgmtState_DISPATCH(pGpu, pKernelGsp) -#define kgspRestorePowerMgmtState_FNPTR(pKernelGsp) pKernelGsp->__kgspRestorePowerMgmtState__ -#define kgspRestorePowerMgmtState(pGpu, pKernelGsp) kgspRestorePowerMgmtState_DISPATCH(pGpu, pKernelGsp) -#define kgspRestorePowerMgmtState_HAL(pGpu, pKernelGsp) kgspRestorePowerMgmtState_DISPATCH(pGpu, pKernelGsp) +#define kgspPrepareSuspendResumeData_FNPTR(pKernelGsp) pKernelGsp->__kgspPrepareSuspendResumeData__ +#define kgspPrepareSuspendResumeData(pGpu, pKernelGsp) kgspPrepareSuspendResumeData_DISPATCH(pGpu, pKernelGsp) +#define kgspPrepareSuspendResumeData_HAL(pGpu, pKernelGsp) kgspPrepareSuspendResumeData_DISPATCH(pGpu, pKernelGsp) #define kgspFreeSuspendResumeData_FNPTR(pKernelGsp) pKernelGsp->__kgspFreeSuspendResumeData__ #define kgspFreeSuspendResumeData(pGpu, pKernelGsp) kgspFreeSuspendResumeData_DISPATCH(pGpu, pKernelGsp) #define kgspFreeSuspendResumeData_HAL(pGpu, pKernelGsp) kgspFreeSuspendResumeData_DISPATCH(pGpu, pKernelGsp) @@ -650,8 +698,11 @@ NV_STATUS __nvoc_objCreate_KernelGsp(KernelGsp**, Dynamic*, NvU32); #define kgspGetFwHeapParamOsCarveoutSize(pGpu, pKernelGsp) kgspGetFwHeapParamOsCarveoutSize_DISPATCH(pGpu, pKernelGsp) #define kgspGetFwHeapParamOsCarveoutSize_HAL(pGpu, pKernelGsp) kgspGetFwHeapParamOsCarveoutSize_DISPATCH(pGpu, pKernelGsp) #define kgspInitVgpuPartitionLogging_FNPTR(pKernelGsp) pKernelGsp->__kgspInitVgpuPartitionLogging__ -#define kgspInitVgpuPartitionLogging(pGpu, pKernelGsp, gfid, initTaskLogBUffOffset, initTaskLogBUffSize, vgpuTaskLogBUffOffset, vgpuTaskLogBuffSize, kernelLogBuffOffset, kernelLogBuffSize) kgspInitVgpuPartitionLogging_DISPATCH(pGpu, pKernelGsp, gfid, initTaskLogBUffOffset, initTaskLogBUffSize, vgpuTaskLogBUffOffset, vgpuTaskLogBuffSize, kernelLogBuffOffset, kernelLogBuffSize) -#define kgspInitVgpuPartitionLogging_HAL(pGpu, pKernelGsp, gfid, initTaskLogBUffOffset, initTaskLogBUffSize, vgpuTaskLogBUffOffset, vgpuTaskLogBuffSize, kernelLogBuffOffset, kernelLogBuffSize) kgspInitVgpuPartitionLogging_DISPATCH(pGpu, pKernelGsp, gfid, initTaskLogBUffOffset, initTaskLogBUffSize, vgpuTaskLogBUffOffset, vgpuTaskLogBuffSize, kernelLogBuffOffset, kernelLogBuffSize) +#define kgspInitVgpuPartitionLogging(pGpu, pKernelGsp, gfid, initTaskLogBUffOffset, initTaskLogBUffSize, vgpuTaskLogBUffOffset, vgpuTaskLogBuffSize, kernelLogBuffOffset, kernelLogBuffSize, pPreserveLogBufferFull) kgspInitVgpuPartitionLogging_DISPATCH(pGpu, pKernelGsp, gfid, initTaskLogBUffOffset, initTaskLogBUffSize, vgpuTaskLogBUffOffset, vgpuTaskLogBuffSize, kernelLogBuffOffset, kernelLogBuffSize, pPreserveLogBufferFull) +#define kgspInitVgpuPartitionLogging_HAL(pGpu, pKernelGsp, gfid, initTaskLogBUffOffset, initTaskLogBUffSize, vgpuTaskLogBUffOffset, vgpuTaskLogBuffSize, kernelLogBuffOffset, kernelLogBuffSize, pPreserveLogBufferFull) kgspInitVgpuPartitionLogging_DISPATCH(pGpu, pKernelGsp, gfid, initTaskLogBUffOffset, initTaskLogBUffSize, vgpuTaskLogBUffOffset, vgpuTaskLogBuffSize, kernelLogBuffOffset, kernelLogBuffSize, pPreserveLogBufferFull) +#define kgspPreserveVgpuPartitionLogging_FNPTR(pKernelGsp) pKernelGsp->__kgspPreserveVgpuPartitionLogging__ +#define kgspPreserveVgpuPartitionLogging(pGpu, pKernelGsp, gfid) kgspPreserveVgpuPartitionLogging_DISPATCH(pGpu, pKernelGsp, gfid) +#define kgspPreserveVgpuPartitionLogging_HAL(pGpu, pKernelGsp, gfid) kgspPreserveVgpuPartitionLogging_DISPATCH(pGpu, pKernelGsp, gfid) #define kgspFreeVgpuPartitionLogging_FNPTR(pKernelGsp) pKernelGsp->__kgspFreeVgpuPartitionLogging__ #define kgspFreeVgpuPartitionLogging(pGpu, pKernelGsp, gfid) kgspFreeVgpuPartitionLogging_DISPATCH(pGpu, pKernelGsp, gfid) #define kgspFreeVgpuPartitionLogging_HAL(pGpu, pKernelGsp, gfid) kgspFreeVgpuPartitionLogging_DISPATCH(pGpu, pKernelGsp, gfid) @@ -659,8 +710,8 @@ NV_STATUS __nvoc_objCreate_KernelGsp(KernelGsp**, Dynamic*, NvU32); #define kgspGetSignatureSectionNamePrefix(pGpu, pKernelGsp) kgspGetSignatureSectionNamePrefix_DISPATCH(pGpu, pKernelGsp) #define kgspGetSignatureSectionNamePrefix_HAL(pGpu, pKernelGsp) kgspGetSignatureSectionNamePrefix_DISPATCH(pGpu, pKernelGsp) #define kgspSetupGspFmcArgs_FNPTR(pKernelGsp) pKernelGsp->__kgspSetupGspFmcArgs__ -#define kgspSetupGspFmcArgs(pGpu, pKernelGsp, pGspFw) kgspSetupGspFmcArgs_DISPATCH(pGpu, pKernelGsp, pGspFw) -#define kgspSetupGspFmcArgs_HAL(pGpu, pKernelGsp, pGspFw) kgspSetupGspFmcArgs_DISPATCH(pGpu, pKernelGsp, pGspFw) +#define kgspSetupGspFmcArgs(pGpu, pKernelGsp, bootMode) kgspSetupGspFmcArgs_DISPATCH(pGpu, pKernelGsp, bootMode) +#define kgspSetupGspFmcArgs_HAL(pGpu, pKernelGsp, bootMode) kgspSetupGspFmcArgs_DISPATCH(pGpu, pKernelGsp, bootMode) #define kgspReadEmem_FNPTR(pKernelGsp) pKernelGsp->__kgspReadEmem__ #define kgspReadEmem(pKernelGsp, offset, size, pBuf) kgspReadEmem_DISPATCH(pKernelGsp, offset, size, pBuf) #define kgspReadEmem_HAL(pKernelGsp, offset, size, pBuf) kgspReadEmem_DISPATCH(pKernelGsp, offset, size, pBuf) @@ -670,33 +721,33 @@ NV_STATUS __nvoc_objCreate_KernelGsp(KernelGsp**, Dynamic*, NvU32); #define kgspCheckGspRmCcCleanup_FNPTR(pKernelGsp) pKernelGsp->__kgspCheckGspRmCcCleanup__ #define kgspCheckGspRmCcCleanup(pGpu, pKernelGsp) kgspCheckGspRmCcCleanup_DISPATCH(pGpu, pKernelGsp) #define kgspCheckGspRmCcCleanup_HAL(pGpu, pKernelGsp) kgspCheckGspRmCcCleanup_DISPATCH(pGpu, pKernelGsp) -#define kgspInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define kgspInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define kgspInitMissing(pGpu, pEngstate) kgspInitMissing_DISPATCH(pGpu, pEngstate) -#define kgspStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define kgspStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define kgspStatePreInitLocked(pGpu, pEngstate) kgspStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define kgspStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define kgspStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define kgspStatePreInitUnlocked(pGpu, pEngstate) kgspStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kgspStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kgspStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define kgspStateInitUnlocked(pGpu, pEngstate) kgspStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kgspStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kgspStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define kgspStatePreLoad(pGpu, pEngstate, arg3) kgspStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kgspStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define kgspStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateLoad__ #define kgspStateLoad(pGpu, pEngstate, arg3) kgspStateLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kgspStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define kgspStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostLoad__ #define kgspStatePostLoad(pGpu, pEngstate, arg3) kgspStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kgspStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kgspStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define kgspStatePreUnload(pGpu, pEngstate, arg3) kgspStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kgspStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define kgspStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateUnload__ #define kgspStateUnload(pGpu, pEngstate, arg3) kgspStateUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kgspStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kgspStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define kgspStatePostUnload(pGpu, pEngstate, arg3) kgspStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kgspStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define kgspStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateDestroy__ #define kgspStateDestroy(pGpu, pEngstate) kgspStateDestroy_DISPATCH(pGpu, pEngstate) -#define kgspIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define kgspIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define kgspIsPresent(pGpu, pEngstate) kgspIsPresent_DISPATCH(pGpu, pEngstate) -#define kgspClearInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservClearInterrupt__ +#define kgspClearInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__nvoc_vtable->__intrservClearInterrupt__ #define kgspClearInterrupt(pGpu, pIntrService, pParams) kgspClearInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define kgspServiceNotificationInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ +#define kgspServiceNotificationInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__nvoc_vtable->__intrservServiceNotificationInterrupt__ #define kgspServiceNotificationInterrupt(pGpu, pIntrService, pParams) kgspServiceNotificationInterrupt_DISPATCH(pGpu, pIntrService, pParams) #define kgspRegRead_FNPTR(pKernelFlcn) pKernelFlcn->__nvoc_base_KernelFalcon.__kflcnRegRead__ #define kgspRegRead(pGpu, pKernelFlcn, offset) kgspRegRead_DISPATCH(pGpu, pKernelFlcn, offset) @@ -707,47 +758,47 @@ NV_STATUS __nvoc_objCreate_KernelGsp(KernelGsp**, Dynamic*, NvU32); #define kgspMaskDmemAddr_FNPTR(pKernelFlcn) pKernelFlcn->__nvoc_base_KernelFalcon.__kflcnMaskDmemAddr__ #define kgspMaskDmemAddr(pGpu, pKernelFlcn, addr) kgspMaskDmemAddr_DISPATCH(pGpu, pKernelFlcn, addr) #define kgspMaskDmemAddr_HAL(pGpu, pKernelFlcn, addr) kgspMaskDmemAddr_DISPATCH(pGpu, pKernelFlcn, addr) -#define kgspConfigured_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineConfigured__ +#define kgspConfigured_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineConfigured__ #define kgspConfigured(arg_this) kgspConfigured_DISPATCH(arg_this) -#define kgspUnload_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineUnload__ +#define kgspUnload_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineUnload__ #define kgspUnload(arg_this) kgspUnload_DISPATCH(arg_this) -#define kgspVprintf_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineVprintf__ +#define kgspVprintf_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineVprintf__ #define kgspVprintf(arg_this, bReportStart, fmt, args) kgspVprintf_DISPATCH(arg_this, bReportStart, fmt, args) -#define kgspPriRead_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEnginePriRead__ +#define kgspPriRead_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEnginePriRead__ #define kgspPriRead(arg_this, offset) kgspPriRead_DISPATCH(arg_this, offset) -#define kgspPriWrite_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEnginePriWrite__ +#define kgspPriWrite_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEnginePriWrite__ #define kgspPriWrite(arg_this, offset, data) kgspPriWrite_DISPATCH(arg_this, offset, data) -#define kgspMapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineMapBufferDescriptor__ +#define kgspMapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineMapBufferDescriptor__ #define kgspMapBufferDescriptor(arg_this, pBufDesc) kgspMapBufferDescriptor_DISPATCH(arg_this, pBufDesc) -#define kgspUnmapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineUnmapBufferDescriptor__ +#define kgspUnmapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineUnmapBufferDescriptor__ #define kgspUnmapBufferDescriptor(arg_this, pBufDesc) kgspUnmapBufferDescriptor_DISPATCH(arg_this, pBufDesc) -#define kgspSyncBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineSyncBufferDescriptor__ +#define kgspSyncBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineSyncBufferDescriptor__ #define kgspSyncBufferDescriptor(arg_this, pBufDesc, offset, size) kgspSyncBufferDescriptor_DISPATCH(arg_this, pBufDesc, offset, size) -#define kgspReadDmem_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineReadDmem__ +#define kgspReadDmem_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineReadDmem__ #define kgspReadDmem(arg_this, offset, size, pBuf) kgspReadDmem_DISPATCH(arg_this, offset, size, pBuf) #define kgspReadDmem_HAL(arg_this, offset, size, pBuf) kgspReadDmem_DISPATCH(arg_this, offset, size, pBuf) -#define kgspGetScratchOffsets_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineGetScratchOffsets__ +#define kgspGetScratchOffsets_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineGetScratchOffsets__ #define kgspGetScratchOffsets(arg_this, scratchGroupId) kgspGetScratchOffsets_DISPATCH(arg_this, scratchGroupId) #define kgspGetScratchOffsets_HAL(arg_this, scratchGroupId) kgspGetScratchOffsets_DISPATCH(arg_this, scratchGroupId) -#define kgspGetWFL0Offset_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineGetWFL0Offset__ +#define kgspGetWFL0Offset_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineGetWFL0Offset__ #define kgspGetWFL0Offset(arg_this) kgspGetWFL0Offset_DISPATCH(arg_this) #define kgspGetWFL0Offset_HAL(arg_this) kgspGetWFL0Offset_DISPATCH(arg_this) // Dispatch functions static inline NV_STATUS kgspConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, ENGDESCRIPTOR arg3) { - return pKernelGsp->__kgspConstructEngine__(pGpu, pKernelGsp, arg3); + return pKernelGsp->__nvoc_vtable->__kgspConstructEngine__(pGpu, pKernelGsp, arg3); } static inline NV_STATUS kgspStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return pKernelGsp->__kgspStateInitLocked__(pGpu, pKernelGsp); + return pKernelGsp->__nvoc_vtable->__kgspStateInitLocked__(pGpu, pKernelGsp); } static inline void kgspRegisterIntrService_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, IntrServiceRecord pRecords[175]) { - pKernelGsp->__kgspRegisterIntrService__(pGpu, pKernelGsp, pRecords); + pKernelGsp->__nvoc_vtable->__kgspRegisterIntrService__(pGpu, pKernelGsp, pRecords); } static inline NvU32 kgspServiceInterrupt_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, IntrServiceServiceInterruptArguments *pParams) { - return pKernelGsp->__kgspServiceInterrupt__(pGpu, pKernelGsp, pParams); + return pKernelGsp->__nvoc_vtable->__kgspServiceInterrupt__(pGpu, pKernelGsp, pParams); } static inline void kgspConfigureFalcon_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { @@ -774,12 +825,16 @@ static inline NV_STATUS kgspSetCmdQueueHead_DISPATCH(struct OBJGPU *pGpu, struct return pKernelGsp->__kgspSetCmdQueueHead__(pGpu, pKernelGsp, queueIdx, value); } -static inline NV_STATUS kgspPrepareForBootstrap_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw) { - return pKernelGsp->__kgspPrepareForBootstrap__(pGpu, pKernelGsp, pGspFw); +static inline NV_STATUS kgspPrepareForBootstrap_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspBootMode bootMode) { + return pKernelGsp->__kgspPrepareForBootstrap__(pGpu, pKernelGsp, bootMode); } -static inline NV_STATUS kgspBootstrap_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw) { - return pKernelGsp->__kgspBootstrap__(pGpu, pKernelGsp, pGspFw); +static inline NV_STATUS kgspBootstrap_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspBootMode bootMode) { + return pKernelGsp->__kgspBootstrap__(pGpu, pKernelGsp, bootMode); +} + +static inline NV_STATUS kgspTeardown_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspUnloadMode unloadMode) { + return pKernelGsp->__kgspTeardown__(pGpu, pKernelGsp, unloadMode); } static inline void kgspGetGspRmBootUcodeStorage_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, BINDATA_STORAGE **ppBinStorageImage, BINDATA_STORAGE **ppBinStorageDesc) { @@ -838,6 +893,18 @@ static inline NvU32 kgspService_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp * return pKernelGsp->__kgspService__(pGpu, pKernelGsp); } +static inline void kgspServiceFatalHwError_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 intrStatus) { + pKernelGsp->__kgspServiceFatalHwError__(pGpu, pKernelGsp, intrStatus); +} + +static inline void kgspEccServiceEvent_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + pKernelGsp->__kgspEccServiceEvent__(pGpu, pKernelGsp); +} + +static inline void kgspEccServiceUncorrError_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + pKernelGsp->__kgspEccServiceUncorrError__(pGpu, pKernelGsp); +} + static inline NvBool kgspIsWpr2Up_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { return pKernelGsp->__kgspIsWpr2Up__(pGpu, pKernelGsp); } @@ -886,12 +953,8 @@ static inline NV_STATUS kgspWaitForProcessorSuspend_DISPATCH(struct OBJGPU *pGpu return pKernelGsp->__kgspWaitForProcessorSuspend__(pGpu, pKernelGsp); } -static inline NV_STATUS kgspSavePowerMgmtState_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return pKernelGsp->__kgspSavePowerMgmtState__(pGpu, pKernelGsp); -} - -static inline NV_STATUS kgspRestorePowerMgmtState_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - return pKernelGsp->__kgspRestorePowerMgmtState__(pGpu, pKernelGsp); +static inline NV_STATUS kgspPrepareSuspendResumeData_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return pKernelGsp->__kgspPrepareSuspendResumeData__(pGpu, pKernelGsp); } static inline void kgspFreeSuspendResumeData_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { @@ -922,8 +985,12 @@ static inline NvU32 kgspGetFwHeapParamOsCarveoutSize_DISPATCH(struct OBJGPU *pGp return pKernelGsp->__kgspGetFwHeapParamOsCarveoutSize__(pGpu, pKernelGsp); } -static inline NV_STATUS kgspInitVgpuPartitionLogging_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid, NvU64 initTaskLogBUffOffset, NvU64 initTaskLogBUffSize, NvU64 vgpuTaskLogBUffOffset, NvU64 vgpuTaskLogBuffSize, NvU64 kernelLogBuffOffset, NvU64 kernelLogBuffSize) { - return pKernelGsp->__kgspInitVgpuPartitionLogging__(pGpu, pKernelGsp, gfid, initTaskLogBUffOffset, initTaskLogBUffSize, vgpuTaskLogBUffOffset, vgpuTaskLogBuffSize, kernelLogBuffOffset, kernelLogBuffSize); +static inline NV_STATUS kgspInitVgpuPartitionLogging_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid, NvU64 initTaskLogBUffOffset, NvU64 initTaskLogBUffSize, NvU64 vgpuTaskLogBUffOffset, NvU64 vgpuTaskLogBuffSize, NvU64 kernelLogBuffOffset, NvU64 kernelLogBuffSize, NvBool *pPreserveLogBufferFull) { + return pKernelGsp->__kgspInitVgpuPartitionLogging__(pGpu, pKernelGsp, gfid, initTaskLogBUffOffset, initTaskLogBUffSize, vgpuTaskLogBUffOffset, vgpuTaskLogBuffSize, kernelLogBuffOffset, kernelLogBuffSize, pPreserveLogBufferFull); +} + +static inline NV_STATUS kgspPreserveVgpuPartitionLogging_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid) { + return pKernelGsp->__kgspPreserveVgpuPartitionLogging__(pGpu, pKernelGsp, gfid); } static inline NV_STATUS kgspFreeVgpuPartitionLogging_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid) { @@ -934,8 +1001,8 @@ static inline const char * kgspGetSignatureSectionNamePrefix_DISPATCH(struct OBJ return pKernelGsp->__kgspGetSignatureSectionNamePrefix__(pGpu, pKernelGsp); } -static inline NV_STATUS kgspSetupGspFmcArgs_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw) { - return pKernelGsp->__kgspSetupGspFmcArgs__(pGpu, pKernelGsp, pGspFw); +static inline NV_STATUS kgspSetupGspFmcArgs_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspBootMode bootMode) { + return pKernelGsp->__kgspSetupGspFmcArgs__(pGpu, pKernelGsp, bootMode); } static inline void kgspReadEmem_DISPATCH(struct KernelGsp *pKernelGsp, NvU64 offset, NvU64 size, void *pBuf) { @@ -951,59 +1018,59 @@ static inline NV_STATUS kgspCheckGspRmCcCleanup_DISPATCH(struct OBJGPU *pGpu, st } static inline void kgspInitMissing_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pEngstate) { - pEngstate->__kgspInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kgspInitMissing__(pGpu, pEngstate); } static inline NV_STATUS kgspStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pEngstate) { - return pEngstate->__kgspStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kgspStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS kgspStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pEngstate) { - return pEngstate->__kgspStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kgspStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kgspStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pEngstate) { - return pEngstate->__kgspStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kgspStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kgspStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { - return pEngstate->__kgspStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kgspStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kgspStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { - return pEngstate->__kgspStateLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kgspStateLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kgspStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { - return pEngstate->__kgspStatePostLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kgspStatePostLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kgspStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { - return pEngstate->__kgspStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kgspStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS kgspStateUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { - return pEngstate->__kgspStateUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kgspStateUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS kgspStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pEngstate, NvU32 arg3) { - return pEngstate->__kgspStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kgspStatePostUnload__(pGpu, pEngstate, arg3); } static inline void kgspStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pEngstate) { - pEngstate->__kgspStateDestroy__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kgspStateDestroy__(pGpu, pEngstate); } static inline NvBool kgspIsPresent_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pEngstate) { - return pEngstate->__kgspIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kgspIsPresent__(pGpu, pEngstate); } static inline NvBool kgspClearInterrupt_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pIntrService, IntrServiceClearInterruptArguments *pParams) { - return pIntrService->__kgspClearInterrupt__(pGpu, pIntrService, pParams); + return pIntrService->__nvoc_vtable->__kgspClearInterrupt__(pGpu, pIntrService, pParams); } static inline NV_STATUS kgspServiceNotificationInterrupt_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { - return pIntrService->__kgspServiceNotificationInterrupt__(pGpu, pIntrService, pParams); + return pIntrService->__nvoc_vtable->__kgspServiceNotificationInterrupt__(pGpu, pIntrService, pParams); } static inline NvU32 kgspRegRead_DISPATCH(struct OBJGPU *pGpu, struct KernelGsp *pKernelFlcn, NvU32 offset) { @@ -1019,47 +1086,47 @@ static inline NvU32 kgspMaskDmemAddr_DISPATCH(struct OBJGPU *pGpu, struct Kernel } static inline NvBool kgspConfigured_DISPATCH(struct KernelGsp *arg_this) { - return arg_this->__kgspConfigured__(arg_this); + return arg_this->__nvoc_vtable->__kgspConfigured__(arg_this); } static inline void kgspUnload_DISPATCH(struct KernelGsp *arg_this) { - arg_this->__kgspUnload__(arg_this); + arg_this->__nvoc_vtable->__kgspUnload__(arg_this); } static inline void kgspVprintf_DISPATCH(struct KernelGsp *arg_this, NvBool bReportStart, const char *fmt, va_list args) { - arg_this->__kgspVprintf__(arg_this, bReportStart, fmt, args); + arg_this->__nvoc_vtable->__kgspVprintf__(arg_this, bReportStart, fmt, args); } static inline NvU32 kgspPriRead_DISPATCH(struct KernelGsp *arg_this, NvU32 offset) { - return arg_this->__kgspPriRead__(arg_this, offset); + return arg_this->__nvoc_vtable->__kgspPriRead__(arg_this, offset); } static inline void kgspPriWrite_DISPATCH(struct KernelGsp *arg_this, NvU32 offset, NvU32 data) { - arg_this->__kgspPriWrite__(arg_this, offset, data); + arg_this->__nvoc_vtable->__kgspPriWrite__(arg_this, offset, data); } static inline void * kgspMapBufferDescriptor_DISPATCH(struct KernelGsp *arg_this, CrashCatBufferDescriptor *pBufDesc) { - return arg_this->__kgspMapBufferDescriptor__(arg_this, pBufDesc); + return arg_this->__nvoc_vtable->__kgspMapBufferDescriptor__(arg_this, pBufDesc); } static inline void kgspUnmapBufferDescriptor_DISPATCH(struct KernelGsp *arg_this, CrashCatBufferDescriptor *pBufDesc) { - arg_this->__kgspUnmapBufferDescriptor__(arg_this, pBufDesc); + arg_this->__nvoc_vtable->__kgspUnmapBufferDescriptor__(arg_this, pBufDesc); } static inline void kgspSyncBufferDescriptor_DISPATCH(struct KernelGsp *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { - arg_this->__kgspSyncBufferDescriptor__(arg_this, pBufDesc, offset, size); + arg_this->__nvoc_vtable->__kgspSyncBufferDescriptor__(arg_this, pBufDesc, offset, size); } static inline void kgspReadDmem_DISPATCH(struct KernelGsp *arg_this, NvU32 offset, NvU32 size, void *pBuf) { - arg_this->__kgspReadDmem__(arg_this, offset, size, pBuf); + arg_this->__nvoc_vtable->__kgspReadDmem__(arg_this, offset, size, pBuf); } static inline const NvU32 * kgspGetScratchOffsets_DISPATCH(struct KernelGsp *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { - return arg_this->__kgspGetScratchOffsets__(arg_this, scratchGroupId); + return arg_this->__nvoc_vtable->__kgspGetScratchOffsets__(arg_this, scratchGroupId); } static inline NvU32 kgspGetWFL0Offset_DISPATCH(struct KernelGsp *arg_this) { - return arg_this->__kgspGetWFL0Offset__(arg_this); + return arg_this->__nvoc_vtable->__kgspGetWFL0Offset__(arg_this); } NV_STATUS kgspConstructEngine_IMPL(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, ENGDESCRIPTOR arg3); @@ -1082,8 +1149,8 @@ NvBool kgspIsDebugModeEnabled_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKern NvBool kgspIsDebugModeEnabled_GA100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); -static inline NvBool kgspIsDebugModeEnabled_108313(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 != 0))); +static inline NvBool kgspIsDebugModeEnabled_86b752(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_FALSE); } NV_STATUS kgspAllocBootArgs_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); @@ -1114,19 +1181,27 @@ static inline NV_STATUS kgspSetCmdQueueHead_5baef9(struct OBJGPU *pGpu, struct K NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -NV_STATUS kgspPrepareForBootstrap_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw); +NV_STATUS kgspPrepareForBootstrap_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspBootMode bootMode); -NV_STATUS kgspPrepareForBootstrap_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw); +NV_STATUS kgspPrepareForBootstrap_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspBootMode bootMode); -static inline NV_STATUS kgspPrepareForBootstrap_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw) { +static inline NV_STATUS kgspPrepareForBootstrap_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspBootMode bootMode) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -NV_STATUS kgspBootstrap_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw); +NV_STATUS kgspBootstrap_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspBootMode bootMode); -NV_STATUS kgspBootstrap_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw); +NV_STATUS kgspBootstrap_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspBootMode bootMode); -static inline NV_STATUS kgspBootstrap_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw) { +static inline NV_STATUS kgspBootstrap_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspBootMode bootMode) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); +} + +NV_STATUS kgspTeardown_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspUnloadMode unloadMode); + +NV_STATUS kgspTeardown_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspUnloadMode unloadMode); + +static inline NV_STATUS kgspTeardown_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspUnloadMode unloadMode) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } @@ -1242,8 +1317,8 @@ static inline NV_STATUS kgspResetHw_5baef9(struct OBJGPU *pGpu, struct KernelGsp NvBool kgspHealthCheck_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); -static inline NvBool kgspHealthCheck_108313(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 != 0))); +static inline NvBool kgspHealthCheck_86b752(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_FALSE); } NvU32 kgspService_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); @@ -1252,12 +1327,42 @@ static inline NvU32 kgspService_474d46(struct OBJGPU *pGpu, struct KernelGsp *pK NV_ASSERT_OR_RETURN_PRECOMP(0, 0); } +void kgspServiceFatalHwError_GB100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 intrStatus); + +static inline void kgspServiceFatalHwError_b3696a(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 intrStatus) { + return; +} + +static inline void kgspServiceFatalHwError_f2d351(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 intrStatus) { + NV_ASSERT_PRECOMP(0); +} + +void kgspEccServiceEvent_GB100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); + +static inline void kgspEccServiceEvent_d44104(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return; +} + +static inline void kgspEccServiceEvent_f2d351(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_PRECOMP(0); +} + +void kgspEccServiceUncorrError_GB100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); + +static inline void kgspEccServiceUncorrError_d44104(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + return; +} + +static inline void kgspEccServiceUncorrError_f2d351(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_PRECOMP(0); +} + NvBool kgspIsWpr2Up_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); NvBool kgspIsWpr2Up_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); -static inline NvBool kgspIsWpr2Up_108313(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 != 0))); +static inline NvBool kgspIsWpr2Up_86b752(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_FALSE); } NvU32 kgspGetFrtsSize_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); @@ -1346,15 +1451,9 @@ static inline NV_STATUS kgspWaitForProcessorSuspend_5baef9(struct OBJGPU *pGpu, NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } -NV_STATUS kgspSavePowerMgmtState_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); - -static inline NV_STATUS kgspSavePowerMgmtState_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { - NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); -} - -NV_STATUS kgspRestorePowerMgmtState_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); +NV_STATUS kgspPrepareSuspendResumeData_TU102(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); -static inline NV_STATUS kgspRestorePowerMgmtState_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { +static inline NV_STATUS kgspPrepareSuspendResumeData_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } @@ -1436,11 +1535,17 @@ static inline NvU32 kgspGetFwHeapParamOsCarveoutSize_b2b553(struct OBJGPU *pGpu, return 0; } -static inline NV_STATUS kgspInitVgpuPartitionLogging_395e98(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid, NvU64 initTaskLogBUffOffset, NvU64 initTaskLogBUffSize, NvU64 vgpuTaskLogBUffOffset, NvU64 vgpuTaskLogBuffSize, NvU64 kernelLogBuffOffset, NvU64 kernelLogBuffSize) { +static inline NV_STATUS kgspInitVgpuPartitionLogging_395e98(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid, NvU64 initTaskLogBUffOffset, NvU64 initTaskLogBUffSize, NvU64 vgpuTaskLogBUffOffset, NvU64 vgpuTaskLogBuffSize, NvU64 kernelLogBuffOffset, NvU64 kernelLogBuffSize, NvBool *pPreserveLogBufferFull) { + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS kgspInitVgpuPartitionLogging_IMPL(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid, NvU64 initTaskLogBUffOffset, NvU64 initTaskLogBUffSize, NvU64 vgpuTaskLogBUffOffset, NvU64 vgpuTaskLogBuffSize, NvU64 kernelLogBuffOffset, NvU64 kernelLogBuffSize, NvBool *pPreserveLogBufferFull); + +static inline NV_STATUS kgspPreserveVgpuPartitionLogging_395e98(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid) { return NV_ERR_NOT_SUPPORTED; } -NV_STATUS kgspInitVgpuPartitionLogging_IMPL(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid, NvU64 initTaskLogBUffOffset, NvU64 initTaskLogBUffSize, NvU64 vgpuTaskLogBUffOffset, NvU64 vgpuTaskLogBuffSize, NvU64 kernelLogBuffOffset, NvU64 kernelLogBuffSize); +NV_STATUS kgspPreserveVgpuPartitionLogging_IMPL(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid); static inline NV_STATUS kgspFreeVgpuPartitionLogging_395e98(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 gfid) { return NV_ERR_NOT_SUPPORTED; @@ -1460,9 +1565,9 @@ static inline const char *kgspGetSignatureSectionNamePrefix_80f438(struct OBJGPU NV_ASSERT_OR_RETURN_PRECOMP(0, ((void *)0)); } -NV_STATUS kgspSetupGspFmcArgs_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw); +NV_STATUS kgspSetupGspFmcArgs_GH100(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspBootMode bootMode); -static inline NV_STATUS kgspSetupGspFmcArgs_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw) { +static inline NV_STATUS kgspSetupGspFmcArgs_5baef9(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspBootMode bootMode) { NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } @@ -1519,15 +1624,15 @@ static inline NV_STATUS kgspCreateRadix3(struct OBJGPU *pGpu, struct KernelGsp * #define kgspCreateRadix3(pGpu, pKernelGsp, ppMemdescRadix3, pMemdescData, pData, sizeOfData) kgspCreateRadix3_IMPL(pGpu, pKernelGsp, ppMemdescRadix3, pMemdescData, pData, sizeOfData) #endif //__nvoc_kernel_gsp_h_disabled -NV_STATUS kgspUnloadRm_IMPL(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); +NV_STATUS kgspUnloadRm_IMPL(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspUnloadMode unloadMode, NvU32 newPmLevel); #ifdef __nvoc_kernel_gsp_h_disabled -static inline NV_STATUS kgspUnloadRm(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp) { +static inline NV_STATUS kgspUnloadRm(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, KernelGspUnloadMode unloadMode, NvU32 newPmLevel) { NV_ASSERT_FAILED_PRECOMP("KernelGsp was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_gsp_h_disabled -#define kgspUnloadRm(pGpu, pKernelGsp) kgspUnloadRm_IMPL(pGpu, pKernelGsp) +#define kgspUnloadRm(pGpu, pKernelGsp, unloadMode, newPmLevel) kgspUnloadRm_IMPL(pGpu, pKernelGsp, unloadMode, newPmLevel) #endif //__nvoc_kernel_gsp_h_disabled NV_STATUS kgspPrepareBootBinaryImage_IMPL(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp); @@ -1691,14 +1796,14 @@ static inline NV_STATUS kgspAllocateBooterUnloadUcodeImage(struct OBJGPU *pGpu, #define kgspAllocateBooterUnloadUcodeImage(pGpu, pKernelGsp, ppBooterUnloadUcode) kgspAllocateBooterUnloadUcodeImage_IMPL(pGpu, pKernelGsp, ppBooterUnloadUcode) #endif //__nvoc_kernel_gsp_h_disabled -void kgspRcAndNotifyAllUserChannels_IMPL(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 exceptType); +void kgspRcAndNotifyAllChannels_IMPL(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 exceptType, NvBool bSkipKernelChannels); #ifdef __nvoc_kernel_gsp_h_disabled -static inline void kgspRcAndNotifyAllUserChannels(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 exceptType) { +static inline void kgspRcAndNotifyAllChannels(struct OBJGPU *pGpu, struct KernelGsp *pKernelGsp, NvU32 exceptType, NvBool bSkipKernelChannels) { NV_ASSERT_FAILED_PRECOMP("KernelGsp was disabled!"); } #else //__nvoc_kernel_gsp_h_disabled -#define kgspRcAndNotifyAllUserChannels(pGpu, pKernelGsp, exceptType) kgspRcAndNotifyAllUserChannels_IMPL(pGpu, pKernelGsp, exceptType) +#define kgspRcAndNotifyAllChannels(pGpu, pKernelGsp, exceptType, bSkipKernelChannels) kgspRcAndNotifyAllChannels_IMPL(pGpu, pKernelGsp, exceptType, bSkipKernelChannels) #endif //__nvoc_kernel_gsp_h_disabled #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_kernel_gsplite_nvoc.h b/src/nvidia/generated/g_kernel_gsplite_nvoc.h new file mode 100644 index 0000000000..6d7b769ead --- /dev/null +++ b/src/nvidia/generated/g_kernel_gsplite_nvoc.h @@ -0,0 +1,58 @@ + +#ifndef _G_KERNEL_GSPLITE_NVOC_H_ +#define _G_KERNEL_GSPLITE_NVOC_H_ +#include "nvoc/runtime.h" + +// Version of generated metadata structures +#ifdef NVOC_METADATA_VERSION +#undef NVOC_METADATA_VERSION +#endif +#define NVOC_METADATA_VERSION 1 + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include "g_kernel_gsplite_nvoc.h" +#ifndef KERNEL_GSPLITE_H +#define KERNEL_GSPLITE_H + +/****************************************************************************** +* +* Kernel GSPLITE module header +* +******************************************************************************/ + +#include "kernel/gpu/gpu.h" +#include "kernel/gpu/eng_state.h" + +#endif // KERNEL_GSPLITE_H + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif // _G_KERNEL_GSPLITE_NVOC_H_ diff --git a/src/nvidia/generated/g_kernel_head_nvoc.c b/src/nvidia/generated/g_kernel_head_nvoc.c index 031d47dcbf..a508067c7f 100644 --- a/src/nvidia/generated/g_kernel_head_nvoc.c +++ b/src/nvidia/generated/g_kernel_head_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelHead = /*pExportInfo=*/ &__nvoc_export_info_KernelHead }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelHead = { /*numEntries=*/ 0, @@ -132,7 +136,7 @@ static void __nvoc_init_funcTable_KernelHead_1(KernelHead *pThis, RmHalspecOwner // default else { - pThis->__kheadReadVblankIntrEnable__ = &kheadReadVblankIntrEnable_108313; + pThis->__kheadReadVblankIntrEnable__ = &kheadReadVblankIntrEnable_86b752; } // kheadGetDisplayInitialized -- halified (2 hals) body @@ -145,7 +149,7 @@ static void __nvoc_init_funcTable_KernelHead_1(KernelHead *pThis, RmHalspecOwner // default else { - pThis->__kheadGetDisplayInitialized__ = &kheadGetDisplayInitialized_108313; + pThis->__kheadGetDisplayInitialized__ = &kheadGetDisplayInitialized_86b752; } // kheadWriteVblankIntrEnable -- halified (2 hals) body @@ -188,9 +192,9 @@ static void __nvoc_init_funcTable_KernelHead_1(KernelHead *pThis, RmHalspecOwner } // kheadReadPendingVblank -- halified (2 hals) body - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00080000UL) )) /* DispIpHal: DISPv0000 */ { - pThis->__kheadReadPendingVblank__ = &kheadReadPendingVblank_ceaee8; + pThis->__kheadReadPendingVblank__ = &kheadReadPendingVblank_72a2e1; } else { @@ -198,7 +202,7 @@ static void __nvoc_init_funcTable_KernelHead_1(KernelHead *pThis, RmHalspecOwner } // kheadGetLoadVCounter -- halified (2 hals) body - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00080000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__kheadGetLoadVCounter__ = &kheadGetLoadVCounter_4a4dee; } @@ -208,7 +212,7 @@ static void __nvoc_init_funcTable_KernelHead_1(KernelHead *pThis, RmHalspecOwner } // kheadReadPendingRgLineIntr -- halified (2 hals) body - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00080000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__kheadReadPendingRgLineIntr__ = &kheadReadPendingRgLineIntr_4a4dee; } @@ -218,7 +222,7 @@ static void __nvoc_init_funcTable_KernelHead_1(KernelHead *pThis, RmHalspecOwner } // kheadResetRgLineIntrMask -- halified (2 hals) body - if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00040000UL) )) /* DispIpHal: DISPv0000 */ + if (( ((dispIpHal_HalVarIdx >> 5) == 0UL) && ((1UL << (dispIpHal_HalVarIdx & 0x1f)) & 0x00080000UL) )) /* DispIpHal: DISPv0000 */ { pThis->__kheadResetRgLineIntrMask__ = &kheadResetRgLineIntrMask_b3696a; } diff --git a/src/nvidia/generated/g_kernel_head_nvoc.h b/src/nvidia/generated/g_kernel_head_nvoc.h index 96c38e04cb..e5959d2230 100644 --- a/src/nvidia/generated/g_kernel_head_nvoc.h +++ b/src/nvidia/generated/g_kernel_head_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -327,21 +327,21 @@ static inline void kheadSetVblankNormLatencyCounter(struct KernelHead *pKernelHe NvBool kheadReadVblankIntrEnable_KERNEL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead); -static inline NvBool kheadReadVblankIntrEnable_108313(struct OBJGPU *pGpu, struct KernelHead *pKernelHead) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 != 0))); +static inline NvBool kheadReadVblankIntrEnable_86b752(struct OBJGPU *pGpu, struct KernelHead *pKernelHead) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_FALSE); } NvBool kheadReadVblankIntrEnable_v03_00(struct OBJGPU *pGpu, struct KernelHead *pKernelHead); -static inline NvBool kheadReadVblankIntrEnable_ceaee8(struct OBJGPU *pGpu, struct KernelHead *pKernelHead) { +static inline NvBool kheadReadVblankIntrEnable_72a2e1(struct OBJGPU *pGpu, struct KernelHead *pKernelHead) { NV_ASSERT_PRECOMP(0); - return ((NvBool)(0 != 0)); + return NV_FALSE; } NvBool kheadGetDisplayInitialized_KERNEL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead); -static inline NvBool kheadGetDisplayInitialized_108313(struct OBJGPU *pGpu, struct KernelHead *pKernelHead) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 != 0))); +static inline NvBool kheadGetDisplayInitialized_86b752(struct OBJGPU *pGpu, struct KernelHead *pKernelHead) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_FALSE); } void kheadWriteVblankIntrEnable_KERNEL(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvBool arg3); @@ -377,9 +377,9 @@ static inline void kheadResetPendingVblank_f2d351(struct OBJGPU *pGpu, struct Ke NvBool kheadReadPendingVblank_v03_00(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvU32 *pCachedIntr, THREAD_STATE_NODE *pThreadState); -static inline NvBool kheadReadPendingVblank_ceaee8(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvU32 *pCachedIntr, THREAD_STATE_NODE *pThreadState) { +static inline NvBool kheadReadPendingVblank_72a2e1(struct OBJGPU *pGpu, struct KernelHead *pKernelHead, NvU32 *pCachedIntr, THREAD_STATE_NODE *pThreadState) { NV_ASSERT_PRECOMP(0); - return ((NvBool)(0 != 0)); + return NV_FALSE; } NvU32 kheadGetLoadVCounter_v03_00(struct OBJGPU *pGpu, struct KernelHead *pKernelHead); diff --git a/src/nvidia/generated/g_kernel_hostvgpudeviceapi_nvoc.c b/src/nvidia/generated/g_kernel_hostvgpudeviceapi_nvoc.c index 52aa43a828..b11c7b455b 100644 --- a/src/nvidia/generated/g_kernel_hostvgpudeviceapi_nvoc.c +++ b/src/nvidia/generated/g_kernel_hostvgpudeviceapi_nvoc.c @@ -66,6 +66,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelHostVgpuDeviceShr = /*pExportInfo=*/ &__nvoc_export_info_KernelHostVgpuDeviceShr }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelHostVgpuDeviceShr = { /*numEntries=*/ 0, @@ -389,12 +393,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelHo #endif }, { /* [6] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) kernelhostvgpudeviceapiCtrlCmdEventSetNotification_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - /*flags=*/ 0x8u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) + /*flags=*/ 0x118u, /*accessRight=*/0x0u, /*methodId=*/ 0xa0840107u, /*paramSize=*/ sizeof(NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_EVENT_SET_NOTIFICATION_PARAMS), @@ -446,170 +450,263 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelHo /*pClassInfo=*/ &(__nvoc_class_def_KernelHostVgpuDeviceApi.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "kernelhostvgpudeviceapiCtrlCmdFreeStates" +#endif + }, + { /* [10] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) kernelhostvgpudeviceapiCtrlCmdBootloadVgpuTask_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0xa084010du, + /*paramSize=*/ sizeof(NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_BOOTLOAD_VGPU_TASK_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_KernelHostVgpuDeviceApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "kernelhostvgpudeviceapiCtrlCmdBootloadVgpuTask" #endif }, }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NvBool __nvoc_down_thunk_KernelHostVgpuDeviceApi_resCanCopy(struct RsResource *pKernelHostVgpuDeviceApi); // this + // 1 down-thunk(s) defined to bridge methods in KernelHostVgpuDeviceApi from superclasses // kernelhostvgpudeviceapiCanCopy: virtual override (res) base (gpures) -static NvBool __nvoc_down_thunk_KernelHostVgpuDeviceApi_resCanCopy(struct RsResource *pKernelHostVgpuDeviceApi) { +NvBool __nvoc_down_thunk_KernelHostVgpuDeviceApi_resCanCopy(struct RsResource *pKernelHostVgpuDeviceApi) { return kernelhostvgpudeviceapiCanCopy((struct KernelHostVgpuDeviceApi *)(((unsigned char *) pKernelHostVgpuDeviceApi) - __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiControl(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiMap(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiUnmap(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiShareCallback(struct KernelHostVgpuDeviceApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiGetRegBaseOffsetAndSize(struct KernelHostVgpuDeviceApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiGetMapAddrSpace(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiInternalControlForward(struct KernelHostVgpuDeviceApi *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiGetInternalObjectHandle(struct KernelHostVgpuDeviceApi *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiAccessCallback(struct KernelHostVgpuDeviceApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiGetMemInterMapParams(struct KernelHostVgpuDeviceApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiCheckMemInterUnmap(struct KernelHostVgpuDeviceApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiGetMemoryMappingDescriptor(struct KernelHostVgpuDeviceApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControlSerialization_Prologue(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControlSerialization_Epilogue(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControl_Prologue(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControl_Epilogue(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiIsDuplicate(struct KernelHostVgpuDeviceApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiPreDestruct(struct KernelHostVgpuDeviceApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiControlFilter(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiIsPartialUnmapSupported(struct KernelHostVgpuDeviceApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiMapTo(struct KernelHostVgpuDeviceApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiUnmapFrom(struct KernelHostVgpuDeviceApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiGetRefCount(struct KernelHostVgpuDeviceApi *pResource); // this +void __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiAddAdditionalDependants(struct RsClient *pClient, struct KernelHostVgpuDeviceApi *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiGetNotificationListPtr(struct KernelHostVgpuDeviceApi *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiGetNotificationShare(struct KernelHostVgpuDeviceApi *pNotifier); // this +void __nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiSetNotificationShare(struct KernelHostVgpuDeviceApi *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiUnregisterEvent(struct KernelHostVgpuDeviceApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiGetOrAllocNotifShare(struct KernelHostVgpuDeviceApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 29 up-thunk(s) defined to bridge methods in KernelHostVgpuDeviceApi to superclasses // kernelhostvgpudeviceapiControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiControl(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiControl(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset), pCallContext, pParams); } // kernelhostvgpudeviceapiMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiMap(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiMap(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // kernelhostvgpudeviceapiUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiUnmap(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiUnmap(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset), pCallContext, pCpuMapping); } // kernelhostvgpudeviceapiShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiShareCallback(struct KernelHostVgpuDeviceApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiShareCallback(struct KernelHostVgpuDeviceApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // kernelhostvgpudeviceapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiGetRegBaseOffsetAndSize(struct KernelHostVgpuDeviceApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiGetRegBaseOffsetAndSize(struct KernelHostVgpuDeviceApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset), pGpu, pOffset, pSize); } // kernelhostvgpudeviceapiGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiGetMapAddrSpace(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiGetMapAddrSpace(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // kernelhostvgpudeviceapiInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiInternalControlForward(struct KernelHostVgpuDeviceApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiInternalControlForward(struct KernelHostVgpuDeviceApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset), command, pParams, size); } // kernelhostvgpudeviceapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiGetInternalObjectHandle(struct KernelHostVgpuDeviceApi *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiGetInternalObjectHandle(struct KernelHostVgpuDeviceApi *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_GpuResource.offset)); } // kernelhostvgpudeviceapiAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiAccessCallback(struct KernelHostVgpuDeviceApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiAccessCallback(struct KernelHostVgpuDeviceApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // kernelhostvgpudeviceapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiGetMemInterMapParams(struct KernelHostVgpuDeviceApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiGetMemInterMapParams(struct KernelHostVgpuDeviceApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), pParams); } // kernelhostvgpudeviceapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiCheckMemInterUnmap(struct KernelHostVgpuDeviceApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiCheckMemInterUnmap(struct KernelHostVgpuDeviceApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), bSubdeviceHandleProvided); } // kernelhostvgpudeviceapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiGetMemoryMappingDescriptor(struct KernelHostVgpuDeviceApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiGetMemoryMappingDescriptor(struct KernelHostVgpuDeviceApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), ppMemDesc); } // kernelhostvgpudeviceapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControlSerialization_Prologue(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControlSerialization_Prologue(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), pCallContext, pParams); } // kernelhostvgpudeviceapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControlSerialization_Epilogue(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControlSerialization_Epilogue(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), pCallContext, pParams); } // kernelhostvgpudeviceapiControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControl_Prologue(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControl_Prologue(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), pCallContext, pParams); } // kernelhostvgpudeviceapiControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControl_Epilogue(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControl_Epilogue(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RmResource.offset), pCallContext, pParams); } // kernelhostvgpudeviceapiIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiIsDuplicate(struct KernelHostVgpuDeviceApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiIsDuplicate(struct KernelHostVgpuDeviceApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset), hMemory, pDuplicate); } // kernelhostvgpudeviceapiPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiPreDestruct(struct KernelHostVgpuDeviceApi *pResource) { +void __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiPreDestruct(struct KernelHostVgpuDeviceApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset)); } // kernelhostvgpudeviceapiControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiControlFilter(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiControlFilter(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset), pCallContext, pParams); } // kernelhostvgpudeviceapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiIsPartialUnmapSupported(struct KernelHostVgpuDeviceApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiIsPartialUnmapSupported(struct KernelHostVgpuDeviceApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset)); } // kernelhostvgpudeviceapiMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiMapTo(struct KernelHostVgpuDeviceApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiMapTo(struct KernelHostVgpuDeviceApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset), pParams); } // kernelhostvgpudeviceapiUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiUnmapFrom(struct KernelHostVgpuDeviceApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiUnmapFrom(struct KernelHostVgpuDeviceApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset), pParams); } // kernelhostvgpudeviceapiGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiGetRefCount(struct KernelHostVgpuDeviceApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiGetRefCount(struct KernelHostVgpuDeviceApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset)); } // kernelhostvgpudeviceapiAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiAddAdditionalDependants(struct RsClient *pClient, struct KernelHostVgpuDeviceApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiAddAdditionalDependants(struct RsClient *pClient, struct KernelHostVgpuDeviceApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelHostVgpuDeviceApi_RsResource.offset), pReference); } // kernelhostvgpudeviceapiGetNotificationListPtr: virtual inherited (notify) base (notify) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiGetNotificationListPtr(struct KernelHostVgpuDeviceApi *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiGetNotificationListPtr(struct KernelHostVgpuDeviceApi *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelHostVgpuDeviceApi_Notifier.offset)); } // kernelhostvgpudeviceapiGetNotificationShare: virtual inherited (notify) base (notify) -static struct NotifShare * __nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiGetNotificationShare(struct KernelHostVgpuDeviceApi *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiGetNotificationShare(struct KernelHostVgpuDeviceApi *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelHostVgpuDeviceApi_Notifier.offset)); } // kernelhostvgpudeviceapiSetNotificationShare: virtual inherited (notify) base (notify) -static void __nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiSetNotificationShare(struct KernelHostVgpuDeviceApi *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiSetNotificationShare(struct KernelHostVgpuDeviceApi *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelHostVgpuDeviceApi_Notifier.offset), pNotifShare); } // kernelhostvgpudeviceapiUnregisterEvent: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiUnregisterEvent(struct KernelHostVgpuDeviceApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiUnregisterEvent(struct KernelHostVgpuDeviceApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelHostVgpuDeviceApi_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // kernelhostvgpudeviceapiGetOrAllocNotifShare: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiGetOrAllocNotifShare(struct KernelHostVgpuDeviceApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiGetOrAllocNotifShare(struct KernelHostVgpuDeviceApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelHostVgpuDeviceApi_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelHostVgpuDeviceApi = { - /*numEntries=*/ 10, + /*numEntries=*/ 11, /*pExportEntries=*/ __nvoc_exported_method_def_KernelHostVgpuDeviceApi }; @@ -654,10 +751,6 @@ NV_STATUS __nvoc_ctor_KernelHostVgpuDeviceApi(KernelHostVgpuDeviceApi *pThis, CA static void __nvoc_init_funcTable_KernelHostVgpuDeviceApi_1(KernelHostVgpuDeviceApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // kernelhostvgpudeviceapiCanCopy -- virtual override (res) base (gpures) - pThis->__kernelhostvgpudeviceapiCanCopy__ = &kernelhostvgpudeviceapiCanCopy_IMPL; - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_KernelHostVgpuDeviceApi_resCanCopy; - // kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo -- exported (id=0xa0840101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo__ = &kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo_IMPL; @@ -689,7 +782,7 @@ static void __nvoc_init_funcTable_KernelHostVgpuDeviceApi_1(KernelHostVgpuDevice #endif // kernelhostvgpudeviceapiCtrlCmdEventSetNotification -- exported (id=0xa0840107) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__kernelhostvgpudeviceapiCtrlCmdEventSetNotification__ = &kernelhostvgpudeviceapiCtrlCmdEventSetNotification_IMPL; #endif @@ -708,99 +801,155 @@ static void __nvoc_init_funcTable_KernelHostVgpuDeviceApi_1(KernelHostVgpuDevice pThis->__kernelhostvgpudeviceapiCtrlCmdFreeStates__ = &kernelhostvgpudeviceapiCtrlCmdFreeStates_IMPL; #endif - // kernelhostvgpudeviceapiControl -- virtual inherited (gpures) base (gpures) - pThis->__kernelhostvgpudeviceapiControl__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiControl; - - // kernelhostvgpudeviceapiMap -- virtual inherited (gpures) base (gpures) - pThis->__kernelhostvgpudeviceapiMap__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiMap; - - // kernelhostvgpudeviceapiUnmap -- virtual inherited (gpures) base (gpures) - pThis->__kernelhostvgpudeviceapiUnmap__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiUnmap; - - // kernelhostvgpudeviceapiShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__kernelhostvgpudeviceapiShareCallback__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiShareCallback; - - // kernelhostvgpudeviceapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__kernelhostvgpudeviceapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiGetRegBaseOffsetAndSize; - - // kernelhostvgpudeviceapiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__kernelhostvgpudeviceapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiGetMapAddrSpace; - - // kernelhostvgpudeviceapiInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__kernelhostvgpudeviceapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiInternalControlForward; - - // kernelhostvgpudeviceapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__kernelhostvgpudeviceapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiGetInternalObjectHandle; - - // kernelhostvgpudeviceapiAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__kernelhostvgpudeviceapiAccessCallback__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiAccessCallback; - - // kernelhostvgpudeviceapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__kernelhostvgpudeviceapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiGetMemInterMapParams; - - // kernelhostvgpudeviceapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__kernelhostvgpudeviceapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiCheckMemInterUnmap; - - // kernelhostvgpudeviceapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__kernelhostvgpudeviceapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiGetMemoryMappingDescriptor; - - // kernelhostvgpudeviceapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__kernelhostvgpudeviceapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControlSerialization_Prologue; - - // kernelhostvgpudeviceapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__kernelhostvgpudeviceapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControlSerialization_Epilogue; - - // kernelhostvgpudeviceapiControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__kernelhostvgpudeviceapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControl_Prologue; - - // kernelhostvgpudeviceapiControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__kernelhostvgpudeviceapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControl_Epilogue; - - // kernelhostvgpudeviceapiIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__kernelhostvgpudeviceapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiIsDuplicate; - - // kernelhostvgpudeviceapiPreDestruct -- virtual inherited (res) base (gpures) - pThis->__kernelhostvgpudeviceapiPreDestruct__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiPreDestruct; - - // kernelhostvgpudeviceapiControlFilter -- virtual inherited (res) base (gpures) - pThis->__kernelhostvgpudeviceapiControlFilter__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiControlFilter; - - // kernelhostvgpudeviceapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__kernelhostvgpudeviceapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiIsPartialUnmapSupported; - - // kernelhostvgpudeviceapiMapTo -- virtual inherited (res) base (gpures) - pThis->__kernelhostvgpudeviceapiMapTo__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiMapTo; - - // kernelhostvgpudeviceapiUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__kernelhostvgpudeviceapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiUnmapFrom; - - // kernelhostvgpudeviceapiGetRefCount -- virtual inherited (res) base (gpures) - pThis->__kernelhostvgpudeviceapiGetRefCount__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiGetRefCount; - - // kernelhostvgpudeviceapiAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__kernelhostvgpudeviceapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiAddAdditionalDependants; - - // kernelhostvgpudeviceapiGetNotificationListPtr -- virtual inherited (notify) base (notify) - pThis->__kernelhostvgpudeviceapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiGetNotificationListPtr; - - // kernelhostvgpudeviceapiGetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__kernelhostvgpudeviceapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiGetNotificationShare; - - // kernelhostvgpudeviceapiSetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__kernelhostvgpudeviceapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiSetNotificationShare; - - // kernelhostvgpudeviceapiUnregisterEvent -- virtual inherited (notify) base (notify) - pThis->__kernelhostvgpudeviceapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiUnregisterEvent; - - // kernelhostvgpudeviceapiGetOrAllocNotifShare -- virtual inherited (notify) base (notify) - pThis->__kernelhostvgpudeviceapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_KernelHostVgpuDeviceApi_1 with approximately 41 basic block(s). + // kernelhostvgpudeviceapiCtrlCmdBootloadVgpuTask -- exported (id=0xa084010d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + pThis->__kernelhostvgpudeviceapiCtrlCmdBootloadVgpuTask__ = &kernelhostvgpudeviceapiCtrlCmdBootloadVgpuTask_IMPL; +#endif +} // End __nvoc_init_funcTable_KernelHostVgpuDeviceApi_1 with approximately 11 basic block(s). -// Initialize vtable(s) for 40 virtual method(s). +// Initialize vtable(s) for 41 virtual method(s). void __nvoc_init_funcTable_KernelHostVgpuDeviceApi(KernelHostVgpuDeviceApi *pThis) { - // Initialize vtable(s) with 40 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelHostVgpuDeviceApi vtable = { + .__kernelhostvgpudeviceapiCanCopy__ = &kernelhostvgpudeviceapiCanCopy_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_KernelHostVgpuDeviceApi_resCanCopy, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x808u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__kernelhostvgpudeviceapiControl__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__kernelhostvgpudeviceapiMap__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__kernelhostvgpudeviceapiUnmap__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__kernelhostvgpudeviceapiShareCallback__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__kernelhostvgpudeviceapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__kernelhostvgpudeviceapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__kernelhostvgpudeviceapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__kernelhostvgpudeviceapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_kernelhostvgpudeviceapiGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__kernelhostvgpudeviceapiAccessCallback__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__kernelhostvgpudeviceapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__kernelhostvgpudeviceapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__kernelhostvgpudeviceapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__kernelhostvgpudeviceapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__kernelhostvgpudeviceapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__kernelhostvgpudeviceapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__kernelhostvgpudeviceapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_kernelhostvgpudeviceapiControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__kernelhostvgpudeviceapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__kernelhostvgpudeviceapiPreDestruct__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__kernelhostvgpudeviceapiControlFilter__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__kernelhostvgpudeviceapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__kernelhostvgpudeviceapiMapTo__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__kernelhostvgpudeviceapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__kernelhostvgpudeviceapiGetRefCount__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__kernelhostvgpudeviceapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_kernelhostvgpudeviceapiAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__kernelhostvgpudeviceapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiGetNotificationListPtr, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__kernelhostvgpudeviceapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiGetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__kernelhostvgpudeviceapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiSetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__kernelhostvgpudeviceapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiUnregisterEvent, // virtual inherited (notify) base (notify) + .Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__kernelhostvgpudeviceapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_kernelhostvgpudeviceapiGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.Notifier.INotifier; // (inotify) super^2 + pThis->__nvoc_base_Notifier.__nvoc_vtable = &vtable.Notifier; // (notify) super + pThis->__nvoc_vtable = &vtable; // (kernelhostvgpudeviceapi) this + + // Initialize vtable(s) with 11 per-object function pointer(s). __nvoc_init_funcTable_KernelHostVgpuDeviceApi_1(pThis); } diff --git a/src/nvidia/generated/g_kernel_hostvgpudeviceapi_nvoc.h b/src/nvidia/generated/g_kernel_hostvgpudeviceapi_nvoc.h index 169602076c..9e19133fcf 100644 --- a/src/nvidia/generated/g_kernel_hostvgpudeviceapi_nvoc.h +++ b/src/nvidia/generated/g_kernel_hostvgpudeviceapi_nvoc.h @@ -7,14 +7,14 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -131,10 +131,15 @@ void destroyKernelHostVgpuDeviceShare(struct OBJGPU *pGpu, struct KernelHostVgpu #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelHostVgpuDeviceApi; + + struct KernelHostVgpuDeviceApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelHostVgpuDeviceApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -150,8 +155,7 @@ struct KernelHostVgpuDeviceApi { struct Notifier *__nvoc_pbase_Notifier; // notify super struct KernelHostVgpuDeviceApi *__nvoc_pbase_KernelHostVgpuDeviceApi; // kernelhostvgpudeviceapi - // Vtable with 40 per-object function pointers - NvBool (*__kernelhostvgpudeviceapiCanCopy__)(struct KernelHostVgpuDeviceApi * /*this*/); // virtual override (res) base (gpures) + // Vtable with 11 per-object function pointers NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo__)(struct KernelHostVgpuDeviceApi * /*this*/, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_SET_VGPU_DEVICE_INFO_PARAMS *); // exported (id=0xa0840101) NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdSetVgpuGuestLifeCycleState__)(struct KernelHostVgpuDeviceApi * /*this*/, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_SET_VGPU_GUEST_LIFE_CYCLE_STATE_PARAMS *); // exported (id=0xa0840102) NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdSetOfflinedPagePatchInfo__)(struct KernelHostVgpuDeviceApi * /*this*/, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_SET_OFFLINED_PAGE_PATCHINFO_PARAMS *); // exported (id=0xa0840103) @@ -162,6 +166,20 @@ struct KernelHostVgpuDeviceApi { NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdGetBarMappingRanges__)(struct KernelHostVgpuDeviceApi * /*this*/, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_GET_BAR_MAPPING_RANGES_PARAMS *); // exported (id=0xa084010a) NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdRestoreDefaultExecPartition__)(struct KernelHostVgpuDeviceApi * /*this*/); // exported (id=0xa084010b) NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdFreeStates__)(struct KernelHostVgpuDeviceApi * /*this*/, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_FREE_STATES_PARAMS *); // exported (id=0xa084010c) + NV_STATUS (*__kernelhostvgpudeviceapiCtrlCmdBootloadVgpuTask__)(struct KernelHostVgpuDeviceApi * /*this*/, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_BOOTLOAD_VGPU_TASK_PARAMS *); // exported (id=0xa084010d) + + // Data members + struct KernelHostVgpuDeviceShr *pShared; + NvU32 notifyActions[7]; +}; + + +// Metadata including vtable with 30 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelHostVgpuDeviceApi { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + const struct NVOC_VTABLE__Notifier Notifier; // (notify) 5 function pointers + + NvBool (*__kernelhostvgpudeviceapiCanCopy__)(struct KernelHostVgpuDeviceApi * /*this*/); // virtual override (res) base (gpures) NV_STATUS (*__kernelhostvgpudeviceapiControl__)(struct KernelHostVgpuDeviceApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__kernelhostvgpudeviceapiMap__)(struct KernelHostVgpuDeviceApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__kernelhostvgpudeviceapiUnmap__)(struct KernelHostVgpuDeviceApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -191,10 +209,6 @@ struct KernelHostVgpuDeviceApi { void (*__kernelhostvgpudeviceapiSetNotificationShare__)(struct KernelHostVgpuDeviceApi * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) NV_STATUS (*__kernelhostvgpudeviceapiUnregisterEvent__)(struct KernelHostVgpuDeviceApi * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) NV_STATUS (*__kernelhostvgpudeviceapiGetOrAllocNotifShare__)(struct KernelHostVgpuDeviceApi * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) - - // Data members - struct KernelHostVgpuDeviceShr *pShared; - NvU32 notifyActions[7]; }; #ifndef __NVOC_CLASS_KernelHostVgpuDeviceApi_TYPEDEF__ @@ -227,7 +241,7 @@ NV_STATUS __nvoc_objCreate_KernelHostVgpuDeviceApi(KernelHostVgpuDeviceApi**, Dy // Wrapper macros -#define kernelhostvgpudeviceapiCanCopy_FNPTR(pKernelHostVgpuDeviceApi) pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCanCopy__ +#define kernelhostvgpudeviceapiCanCopy_FNPTR(pKernelHostVgpuDeviceApi) pKernelHostVgpuDeviceApi->__nvoc_vtable->__kernelhostvgpudeviceapiCanCopy__ #define kernelhostvgpudeviceapiCanCopy(pKernelHostVgpuDeviceApi) kernelhostvgpudeviceapiCanCopy_DISPATCH(pKernelHostVgpuDeviceApi) #define kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo_FNPTR(pKernelHostVgpuDeviceApi) pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo__ #define kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo(pKernelHostVgpuDeviceApi, pParams) kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo_DISPATCH(pKernelHostVgpuDeviceApi, pParams) @@ -249,68 +263,70 @@ NV_STATUS __nvoc_objCreate_KernelHostVgpuDeviceApi(KernelHostVgpuDeviceApi**, Dy #define kernelhostvgpudeviceapiCtrlCmdRestoreDefaultExecPartition(pKernelHostVgpuDeviceApi) kernelhostvgpudeviceapiCtrlCmdRestoreDefaultExecPartition_DISPATCH(pKernelHostVgpuDeviceApi) #define kernelhostvgpudeviceapiCtrlCmdFreeStates_FNPTR(pKernelHostVgpuDeviceApi) pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdFreeStates__ #define kernelhostvgpudeviceapiCtrlCmdFreeStates(pKernelHostVgpuDeviceApi, pParams) kernelhostvgpudeviceapiCtrlCmdFreeStates_DISPATCH(pKernelHostVgpuDeviceApi, pParams) -#define kernelhostvgpudeviceapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define kernelhostvgpudeviceapiCtrlCmdBootloadVgpuTask_FNPTR(pKernelHostVgpuDeviceApi) pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdBootloadVgpuTask__ +#define kernelhostvgpudeviceapiCtrlCmdBootloadVgpuTask(pKernelHostVgpuDeviceApi, pParams) kernelhostvgpudeviceapiCtrlCmdBootloadVgpuTask_DISPATCH(pKernelHostVgpuDeviceApi, pParams) +#define kernelhostvgpudeviceapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define kernelhostvgpudeviceapiControl(pGpuResource, pCallContext, pParams) kernelhostvgpudeviceapiControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define kernelhostvgpudeviceapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define kernelhostvgpudeviceapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define kernelhostvgpudeviceapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) kernelhostvgpudeviceapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define kernelhostvgpudeviceapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define kernelhostvgpudeviceapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define kernelhostvgpudeviceapiUnmap(pGpuResource, pCallContext, pCpuMapping) kernelhostvgpudeviceapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define kernelhostvgpudeviceapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define kernelhostvgpudeviceapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define kernelhostvgpudeviceapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) kernelhostvgpudeviceapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define kernelhostvgpudeviceapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define kernelhostvgpudeviceapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define kernelhostvgpudeviceapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) kernelhostvgpudeviceapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define kernelhostvgpudeviceapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define kernelhostvgpudeviceapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define kernelhostvgpudeviceapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) kernelhostvgpudeviceapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define kernelhostvgpudeviceapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define kernelhostvgpudeviceapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define kernelhostvgpudeviceapiInternalControlForward(pGpuResource, command, pParams, size) kernelhostvgpudeviceapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define kernelhostvgpudeviceapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define kernelhostvgpudeviceapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define kernelhostvgpudeviceapiGetInternalObjectHandle(pGpuResource) kernelhostvgpudeviceapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define kernelhostvgpudeviceapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define kernelhostvgpudeviceapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define kernelhostvgpudeviceapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) kernelhostvgpudeviceapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define kernelhostvgpudeviceapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define kernelhostvgpudeviceapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define kernelhostvgpudeviceapiGetMemInterMapParams(pRmResource, pParams) kernelhostvgpudeviceapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define kernelhostvgpudeviceapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define kernelhostvgpudeviceapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define kernelhostvgpudeviceapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) kernelhostvgpudeviceapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define kernelhostvgpudeviceapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define kernelhostvgpudeviceapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define kernelhostvgpudeviceapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) kernelhostvgpudeviceapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define kernelhostvgpudeviceapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define kernelhostvgpudeviceapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define kernelhostvgpudeviceapiControlSerialization_Prologue(pResource, pCallContext, pParams) kernelhostvgpudeviceapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define kernelhostvgpudeviceapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define kernelhostvgpudeviceapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define kernelhostvgpudeviceapiControlSerialization_Epilogue(pResource, pCallContext, pParams) kernelhostvgpudeviceapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kernelhostvgpudeviceapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define kernelhostvgpudeviceapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define kernelhostvgpudeviceapiControl_Prologue(pResource, pCallContext, pParams) kernelhostvgpudeviceapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define kernelhostvgpudeviceapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define kernelhostvgpudeviceapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define kernelhostvgpudeviceapiControl_Epilogue(pResource, pCallContext, pParams) kernelhostvgpudeviceapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define kernelhostvgpudeviceapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define kernelhostvgpudeviceapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define kernelhostvgpudeviceapiIsDuplicate(pResource, hMemory, pDuplicate) kernelhostvgpudeviceapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define kernelhostvgpudeviceapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define kernelhostvgpudeviceapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define kernelhostvgpudeviceapiPreDestruct(pResource) kernelhostvgpudeviceapiPreDestruct_DISPATCH(pResource) -#define kernelhostvgpudeviceapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define kernelhostvgpudeviceapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define kernelhostvgpudeviceapiControlFilter(pResource, pCallContext, pParams) kernelhostvgpudeviceapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define kernelhostvgpudeviceapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define kernelhostvgpudeviceapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define kernelhostvgpudeviceapiIsPartialUnmapSupported(pResource) kernelhostvgpudeviceapiIsPartialUnmapSupported_DISPATCH(pResource) -#define kernelhostvgpudeviceapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define kernelhostvgpudeviceapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define kernelhostvgpudeviceapiMapTo(pResource, pParams) kernelhostvgpudeviceapiMapTo_DISPATCH(pResource, pParams) -#define kernelhostvgpudeviceapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define kernelhostvgpudeviceapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define kernelhostvgpudeviceapiUnmapFrom(pResource, pParams) kernelhostvgpudeviceapiUnmapFrom_DISPATCH(pResource, pParams) -#define kernelhostvgpudeviceapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define kernelhostvgpudeviceapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define kernelhostvgpudeviceapiGetRefCount(pResource) kernelhostvgpudeviceapiGetRefCount_DISPATCH(pResource) -#define kernelhostvgpudeviceapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define kernelhostvgpudeviceapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define kernelhostvgpudeviceapiAddAdditionalDependants(pClient, pResource, pReference) kernelhostvgpudeviceapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define kernelhostvgpudeviceapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define kernelhostvgpudeviceapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define kernelhostvgpudeviceapiGetNotificationListPtr(pNotifier) kernelhostvgpudeviceapiGetNotificationListPtr_DISPATCH(pNotifier) -#define kernelhostvgpudeviceapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define kernelhostvgpudeviceapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define kernelhostvgpudeviceapiGetNotificationShare(pNotifier) kernelhostvgpudeviceapiGetNotificationShare_DISPATCH(pNotifier) -#define kernelhostvgpudeviceapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define kernelhostvgpudeviceapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define kernelhostvgpudeviceapiSetNotificationShare(pNotifier, pNotifShare) kernelhostvgpudeviceapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define kernelhostvgpudeviceapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define kernelhostvgpudeviceapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define kernelhostvgpudeviceapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) kernelhostvgpudeviceapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define kernelhostvgpudeviceapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define kernelhostvgpudeviceapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define kernelhostvgpudeviceapiGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) kernelhostvgpudeviceapiGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NvBool kernelhostvgpudeviceapiCanCopy_DISPATCH(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi) { - return pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCanCopy__(pKernelHostVgpuDeviceApi); + return pKernelHostVgpuDeviceApi->__nvoc_vtable->__kernelhostvgpudeviceapiCanCopy__(pKernelHostVgpuDeviceApi); } static inline NV_STATUS kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo_DISPATCH(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_SET_VGPU_DEVICE_INFO_PARAMS *pParams) { @@ -353,120 +369,124 @@ static inline NV_STATUS kernelhostvgpudeviceapiCtrlCmdFreeStates_DISPATCH(struct return pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdFreeStates__(pKernelHostVgpuDeviceApi, pParams); } +static inline NV_STATUS kernelhostvgpudeviceapiCtrlCmdBootloadVgpuTask_DISPATCH(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_BOOTLOAD_VGPU_TASK_PARAMS *pParams) { + return pKernelHostVgpuDeviceApi->__kernelhostvgpudeviceapiCtrlCmdBootloadVgpuTask__(pKernelHostVgpuDeviceApi, pParams); +} + static inline NV_STATUS kernelhostvgpudeviceapiControl_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__kernelhostvgpudeviceapiControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__kernelhostvgpudeviceapiControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS kernelhostvgpudeviceapiMap_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kernelhostvgpudeviceapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__kernelhostvgpudeviceapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS kernelhostvgpudeviceapiUnmap_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__kernelhostvgpudeviceapiUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__kernelhostvgpudeviceapiUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool kernelhostvgpudeviceapiShareCallback_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__kernelhostvgpudeviceapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__kernelhostvgpudeviceapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS kernelhostvgpudeviceapiGetRegBaseOffsetAndSize_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__kernelhostvgpudeviceapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__kernelhostvgpudeviceapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS kernelhostvgpudeviceapiGetMapAddrSpace_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__kernelhostvgpudeviceapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__kernelhostvgpudeviceapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS kernelhostvgpudeviceapiInternalControlForward_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__kernelhostvgpudeviceapiInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__kernelhostvgpudeviceapiInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle kernelhostvgpudeviceapiGetInternalObjectHandle_DISPATCH(struct KernelHostVgpuDeviceApi *pGpuResource) { - return pGpuResource->__kernelhostvgpudeviceapiGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__kernelhostvgpudeviceapiGetInternalObjectHandle__(pGpuResource); } static inline NvBool kernelhostvgpudeviceapiAccessCallback_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__kernelhostvgpudeviceapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__kernelhostvgpudeviceapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS kernelhostvgpudeviceapiGetMemInterMapParams_DISPATCH(struct KernelHostVgpuDeviceApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__kernelhostvgpudeviceapiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__kernelhostvgpudeviceapiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS kernelhostvgpudeviceapiCheckMemInterUnmap_DISPATCH(struct KernelHostVgpuDeviceApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__kernelhostvgpudeviceapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__kernelhostvgpudeviceapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS kernelhostvgpudeviceapiGetMemoryMappingDescriptor_DISPATCH(struct KernelHostVgpuDeviceApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__kernelhostvgpudeviceapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__kernelhostvgpudeviceapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS kernelhostvgpudeviceapiControlSerialization_Prologue_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kernelhostvgpudeviceapiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kernelhostvgpudeviceapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void kernelhostvgpudeviceapiControlSerialization_Epilogue_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kernelhostvgpudeviceapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__kernelhostvgpudeviceapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS kernelhostvgpudeviceapiControl_Prologue_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kernelhostvgpudeviceapiControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kernelhostvgpudeviceapiControl_Prologue__(pResource, pCallContext, pParams); } static inline void kernelhostvgpudeviceapiControl_Epilogue_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__kernelhostvgpudeviceapiControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__kernelhostvgpudeviceapiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS kernelhostvgpudeviceapiIsDuplicate_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__kernelhostvgpudeviceapiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__kernelhostvgpudeviceapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void kernelhostvgpudeviceapiPreDestruct_DISPATCH(struct KernelHostVgpuDeviceApi *pResource) { - pResource->__kernelhostvgpudeviceapiPreDestruct__(pResource); + pResource->__nvoc_vtable->__kernelhostvgpudeviceapiPreDestruct__(pResource); } static inline NV_STATUS kernelhostvgpudeviceapiControlFilter_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__kernelhostvgpudeviceapiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__kernelhostvgpudeviceapiControlFilter__(pResource, pCallContext, pParams); } static inline NvBool kernelhostvgpudeviceapiIsPartialUnmapSupported_DISPATCH(struct KernelHostVgpuDeviceApi *pResource) { - return pResource->__kernelhostvgpudeviceapiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__kernelhostvgpudeviceapiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS kernelhostvgpudeviceapiMapTo_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__kernelhostvgpudeviceapiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__kernelhostvgpudeviceapiMapTo__(pResource, pParams); } static inline NV_STATUS kernelhostvgpudeviceapiUnmapFrom_DISPATCH(struct KernelHostVgpuDeviceApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__kernelhostvgpudeviceapiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__kernelhostvgpudeviceapiUnmapFrom__(pResource, pParams); } static inline NvU32 kernelhostvgpudeviceapiGetRefCount_DISPATCH(struct KernelHostVgpuDeviceApi *pResource) { - return pResource->__kernelhostvgpudeviceapiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__kernelhostvgpudeviceapiGetRefCount__(pResource); } static inline void kernelhostvgpudeviceapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelHostVgpuDeviceApi *pResource, RsResourceRef *pReference) { - pResource->__kernelhostvgpudeviceapiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__kernelhostvgpudeviceapiAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * kernelhostvgpudeviceapiGetNotificationListPtr_DISPATCH(struct KernelHostVgpuDeviceApi *pNotifier) { - return pNotifier->__kernelhostvgpudeviceapiGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__kernelhostvgpudeviceapiGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * kernelhostvgpudeviceapiGetNotificationShare_DISPATCH(struct KernelHostVgpuDeviceApi *pNotifier) { - return pNotifier->__kernelhostvgpudeviceapiGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__kernelhostvgpudeviceapiGetNotificationShare__(pNotifier); } static inline void kernelhostvgpudeviceapiSetNotificationShare_DISPATCH(struct KernelHostVgpuDeviceApi *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__kernelhostvgpudeviceapiSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__kernelhostvgpudeviceapiSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS kernelhostvgpudeviceapiUnregisterEvent_DISPATCH(struct KernelHostVgpuDeviceApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__kernelhostvgpudeviceapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__kernelhostvgpudeviceapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS kernelhostvgpudeviceapiGetOrAllocNotifShare_DISPATCH(struct KernelHostVgpuDeviceApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__kernelhostvgpudeviceapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__kernelhostvgpudeviceapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NvBool kernelhostvgpudeviceapiCanCopy_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi); @@ -491,6 +511,8 @@ NV_STATUS kernelhostvgpudeviceapiCtrlCmdRestoreDefaultExecPartition_IMPL(struct NV_STATUS kernelhostvgpudeviceapiCtrlCmdFreeStates_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_FREE_STATES_PARAMS *pParams); +NV_STATUS kernelhostvgpudeviceapiCtrlCmdBootloadVgpuTask_IMPL(struct KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_BOOTLOAD_VGPU_TASK_PARAMS *pParams); + NV_STATUS kernelhostvgpudeviceapiConstruct_IMPL(struct KernelHostVgpuDeviceApi *arg_pKernelHostVgpuDeviceApi, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_kernelhostvgpudeviceapiConstruct(arg_pKernelHostVgpuDeviceApi, arg_pCallContext, arg_pParams) kernelhostvgpudeviceapiConstruct_IMPL(arg_pKernelHostVgpuDeviceApi, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_kernel_ioctrl_nvoc.c b/src/nvidia/generated/g_kernel_ioctrl_nvoc.c index e0f2f26b76..7ac6d05aa8 100644 --- a/src/nvidia/generated/g_kernel_ioctrl_nvoc.c +++ b/src/nvidia/generated/g_kernel_ioctrl_nvoc.c @@ -66,78 +66,96 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelIoctrl = /*pExportInfo=*/ &__nvoc_export_info_KernelIoctrl }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_KernelIoctrl_engstateConstructEngine(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3); // this + // 1 down-thunk(s) defined to bridge methods in KernelIoctrl from superclasses // kioctrlConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelIoctrl_engstateConstructEngine(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_KernelIoctrl_engstateConstructEngine(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3) { return kioctrlConstructEngine(arg1, (struct KernelIoctrl *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset), arg3); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_kioctrlInitMissing(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreInitLocked(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStateInitLocked(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStateInitUnlocked(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreLoad(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStateLoad(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePostLoad(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreUnload(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStateUnload(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePostUnload(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3); // this +void __nvoc_up_thunk_OBJENGSTATE_kioctrlStateDestroy(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_kioctrlIsPresent(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate); // this + // 13 up-thunk(s) defined to bridge methods in KernelIoctrl to superclasses // kioctrlInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kioctrlInitMissing(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kioctrlInitMissing(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset)); } // kioctrlStatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreInitLocked(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreInitLocked(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate) { return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset)); } // kioctrlStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset)); } // kioctrlStateInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStateInitLocked(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStateInitLocked(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate) { return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset)); } // kioctrlStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStateInitUnlocked(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStateInitUnlocked(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset)); } // kioctrlStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreLoad(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreLoad(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset), arg3); } // kioctrlStateLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStateLoad(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStateLoad(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset), arg3); } // kioctrlStatePostLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePostLoad(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePostLoad(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset), arg3); } // kioctrlStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreUnload(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreUnload(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset), arg3); } // kioctrlStateUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStateUnload(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStateUnload(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset), arg3); } // kioctrlStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePostUnload(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kioctrlStatePostUnload(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset), arg3); } // kioctrlStateDestroy: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kioctrlStateDestroy(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kioctrlStateDestroy(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate) { engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset)); } // kioctrlIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_kioctrlIsPresent(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_kioctrlIsPresent(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelIoctrl_OBJENGSTATE.offset)); } @@ -169,18 +187,18 @@ void __nvoc_init_dataField_KernelIoctrl(KernelIoctrl *pThis, RmHalspecOwner *pRm // NVOC Property Hal field -- PDB_PROP_KIOCTRL_IS_MISSING if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000003UL) )) /* RmVariantHal: VF | PF_KERNEL_ONLY */ { - pThis->setProperty(pThis, PDB_PROP_KIOCTRL_IS_MISSING, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KIOCTRL_IS_MISSING, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_KIOCTRL_MINION_AVAILABLE if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0fc60UL) )) /* ChipHal: TU102 | TU104 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_KIOCTRL_MINION_AVAILABLE, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KIOCTRL_MINION_AVAILABLE, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_KIOCTRL_MINION_AVAILABLE, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KIOCTRL_MINION_AVAILABLE, NV_FALSE); } } @@ -211,14 +229,10 @@ static void __nvoc_init_funcTable_KernelIoctrl_1(KernelIoctrl *pThis, RmHalspecO PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); - // kioctrlConstructEngine -- virtual override (engstate) base (engstate) - pThis->__kioctrlConstructEngine__ = &kioctrlConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelIoctrl_engstateConstructEngine; - // kioctrlGetMinionEnableDefault -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000380UL) )) /* ChipHal: TU106 | TU116 | TU117 */ { - pThis->__kioctrlGetMinionEnableDefault__ = &kioctrlGetMinionEnableDefault_bf6dfa; + pThis->__kioctrlGetMinionEnableDefault__ = &kioctrlGetMinionEnableDefault_d69453; } else { @@ -234,52 +248,49 @@ static void __nvoc_init_funcTable_KernelIoctrl_1(KernelIoctrl *pThis, RmHalspecO { pThis->__kioctrlMinionConstruct__ = &kioctrlMinionConstruct_GV100; } - - // kioctrlInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__kioctrlInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlInitMissing; - - // kioctrlStatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__kioctrlStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreInitLocked; - - // kioctrlStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kioctrlStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreInitUnlocked; - - // kioctrlStateInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__kioctrlStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStateInitLocked; - - // kioctrlStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kioctrlStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStateInitUnlocked; - - // kioctrlStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__kioctrlStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreLoad; - - // kioctrlStateLoad -- virtual inherited (engstate) base (engstate) - pThis->__kioctrlStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStateLoad; - - // kioctrlStatePostLoad -- virtual inherited (engstate) base (engstate) - pThis->__kioctrlStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStatePostLoad; - - // kioctrlStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__kioctrlStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreUnload; - - // kioctrlStateUnload -- virtual inherited (engstate) base (engstate) - pThis->__kioctrlStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStateUnload; - - // kioctrlStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__kioctrlStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStatePostUnload; - - // kioctrlStateDestroy -- virtual inherited (engstate) base (engstate) - pThis->__kioctrlStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStateDestroy; - - // kioctrlIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__kioctrlIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlIsPresent; -} // End __nvoc_init_funcTable_KernelIoctrl_1 with approximately 19 basic block(s). +} // End __nvoc_init_funcTable_KernelIoctrl_1 with approximately 4 basic block(s). // Initialize vtable(s) for 16 virtual method(s). void __nvoc_init_funcTable_KernelIoctrl(KernelIoctrl *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 16 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelIoctrl vtable = { + .__kioctrlConstructEngine__ = &kioctrlConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelIoctrl_engstateConstructEngine, // virtual + .__kioctrlInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__kioctrlStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__kioctrlStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__kioctrlStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStateInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &engstateStateInitLocked_IMPL, // virtual + .__kioctrlStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__kioctrlStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__kioctrlStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStateLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &engstateStateLoad_IMPL, // virtual + .__kioctrlStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStatePostLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL, // virtual + .__kioctrlStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__kioctrlStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStateUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &engstateStateUnload_IMPL, // virtual + .__kioctrlStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__kioctrlStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlStateDestroy, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &engstateStateDestroy_IMPL, // virtual + .__kioctrlIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kioctrlIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_vtable = &vtable; // (kioctrl) this + + // Initialize vtable(s) with 2 per-object function pointer(s). __nvoc_init_funcTable_KernelIoctrl_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_ioctrl_nvoc.h b/src/nvidia/generated/g_kernel_ioctrl_nvoc.h index 9a3563e0cf..39a8cc2982 100644 --- a/src/nvidia/generated/g_kernel_ioctrl_nvoc.h +++ b/src/nvidia/generated/g_kernel_ioctrl_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -74,10 +74,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelIoctrl; + + struct KernelIoctrl { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelIoctrl *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -87,23 +92,9 @@ struct KernelIoctrl { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct KernelIoctrl *__nvoc_pbase_KernelIoctrl; // kioctrl - // Vtable with 16 per-object function pointers - NV_STATUS (*__kioctrlConstructEngine__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual override (engstate) base (engstate) + // Vtable with 2 per-object function pointers NvBool (*__kioctrlGetMinionEnableDefault__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // halified (2 hals) body NV_STATUS (*__kioctrlMinionConstruct__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // halified (2 hals) body - void (*__kioctrlInitMissing__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kioctrlStatePreInitLocked__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kioctrlStatePreInitUnlocked__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kioctrlStateInitLocked__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kioctrlStateInitUnlocked__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kioctrlStatePreLoad__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kioctrlStateLoad__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kioctrlStatePostLoad__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kioctrlStatePreUnload__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kioctrlStateUnload__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kioctrlStatePostUnload__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - void (*__kioctrlStateDestroy__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) - NvBool (*__kioctrlIsPresent__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) // 4 PDB properties NvBool PDB_PROP_KIOCTRL_MINION_AVAILABLE; @@ -125,6 +116,7 @@ struct KernelIoctrl_PRIVATE { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelIoctrl *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -134,23 +126,9 @@ struct KernelIoctrl_PRIVATE { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct KernelIoctrl *__nvoc_pbase_KernelIoctrl; // kioctrl - // Vtable with 16 per-object function pointers - NV_STATUS (*__kioctrlConstructEngine__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual override (engstate) base (engstate) + // Vtable with 2 per-object function pointers NvBool (*__kioctrlGetMinionEnableDefault__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // halified (2 hals) body NV_STATUS (*__kioctrlMinionConstruct__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // halified (2 hals) body - void (*__kioctrlInitMissing__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kioctrlStatePreInitLocked__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kioctrlStatePreInitUnlocked__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kioctrlStateInitLocked__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kioctrlStateInitUnlocked__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kioctrlStatePreLoad__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kioctrlStateLoad__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kioctrlStatePostLoad__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kioctrlStatePreUnload__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kioctrlStateUnload__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kioctrlStatePostUnload__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - void (*__kioctrlStateDestroy__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) - NvBool (*__kioctrlIsPresent__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) // 4 PDB properties NvBool PDB_PROP_KIOCTRL_MINION_AVAILABLE; @@ -167,6 +145,27 @@ struct KernelIoctrl_PRIVATE { NvU8 numDevices; }; + +// Metadata including vtable with 14 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelIoctrl { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + + NV_STATUS (*__kioctrlConstructEngine__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual override (engstate) base (engstate) + void (*__kioctrlInitMissing__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStatePreInitLocked__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStatePreInitUnlocked__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStateInitLocked__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStateInitUnlocked__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStatePreLoad__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStateLoad__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStatePostLoad__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStatePreUnload__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStateUnload__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kioctrlStatePostUnload__)(struct OBJGPU *, struct KernelIoctrl * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__kioctrlStateDestroy__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__kioctrlIsPresent__)(struct OBJGPU *, struct KernelIoctrl * /*this*/); // virtual inherited (engstate) base (engstate) +}; + #ifndef __NVOC_CLASS_KernelIoctrl_TYPEDEF__ #define __NVOC_CLASS_KernelIoctrl_TYPEDEF__ typedef struct KernelIoctrl KernelIoctrl; @@ -207,7 +206,7 @@ NV_STATUS __nvoc_objCreate_KernelIoctrl(KernelIoctrl**, Dynamic*, NvU32); // Wrapper macros -#define kioctrlConstructEngine_FNPTR(arg_this) arg_this->__kioctrlConstructEngine__ +#define kioctrlConstructEngine_FNPTR(arg_this) arg_this->__nvoc_vtable->__kioctrlConstructEngine__ #define kioctrlConstructEngine(arg1, arg_this, arg3) kioctrlConstructEngine_DISPATCH(arg1, arg_this, arg3) #define kioctrlGetMinionEnableDefault_FNPTR(pKernelIoctrl) pKernelIoctrl->__kioctrlGetMinionEnableDefault__ #define kioctrlGetMinionEnableDefault(pGpu, pKernelIoctrl) kioctrlGetMinionEnableDefault_DISPATCH(pGpu, pKernelIoctrl) @@ -215,36 +214,36 @@ NV_STATUS __nvoc_objCreate_KernelIoctrl(KernelIoctrl**, Dynamic*, NvU32); #define kioctrlMinionConstruct_FNPTR(pKernelIoctrl) pKernelIoctrl->__kioctrlMinionConstruct__ #define kioctrlMinionConstruct(pGpu, pKernelIoctrl) kioctrlMinionConstruct_DISPATCH(pGpu, pKernelIoctrl) #define kioctrlMinionConstruct_HAL(pGpu, pKernelIoctrl) kioctrlMinionConstruct_DISPATCH(pGpu, pKernelIoctrl) -#define kioctrlInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define kioctrlInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define kioctrlInitMissing(pGpu, pEngstate) kioctrlInitMissing_DISPATCH(pGpu, pEngstate) -#define kioctrlStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define kioctrlStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define kioctrlStatePreInitLocked(pGpu, pEngstate) kioctrlStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define kioctrlStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define kioctrlStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define kioctrlStatePreInitUnlocked(pGpu, pEngstate) kioctrlStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kioctrlStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define kioctrlStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitLocked__ #define kioctrlStateInitLocked(pGpu, pEngstate) kioctrlStateInitLocked_DISPATCH(pGpu, pEngstate) -#define kioctrlStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kioctrlStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define kioctrlStateInitUnlocked(pGpu, pEngstate) kioctrlStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kioctrlStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kioctrlStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define kioctrlStatePreLoad(pGpu, pEngstate, arg3) kioctrlStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kioctrlStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define kioctrlStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateLoad__ #define kioctrlStateLoad(pGpu, pEngstate, arg3) kioctrlStateLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kioctrlStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define kioctrlStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostLoad__ #define kioctrlStatePostLoad(pGpu, pEngstate, arg3) kioctrlStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kioctrlStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kioctrlStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define kioctrlStatePreUnload(pGpu, pEngstate, arg3) kioctrlStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kioctrlStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define kioctrlStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateUnload__ #define kioctrlStateUnload(pGpu, pEngstate, arg3) kioctrlStateUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kioctrlStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kioctrlStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define kioctrlStatePostUnload(pGpu, pEngstate, arg3) kioctrlStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kioctrlStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define kioctrlStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateDestroy__ #define kioctrlStateDestroy(pGpu, pEngstate) kioctrlStateDestroy_DISPATCH(pGpu, pEngstate) -#define kioctrlIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define kioctrlIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define kioctrlIsPresent(pGpu, pEngstate) kioctrlIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS kioctrlConstructEngine_DISPATCH(struct OBJGPU *arg1, struct KernelIoctrl *arg_this, NvU32 arg3) { - return arg_this->__kioctrlConstructEngine__(arg1, arg_this, arg3); + return arg_this->__nvoc_vtable->__kioctrlConstructEngine__(arg1, arg_this, arg3); } static inline NvBool kioctrlGetMinionEnableDefault_DISPATCH(struct OBJGPU *pGpu, struct KernelIoctrl *pKernelIoctrl) { @@ -256,61 +255,61 @@ static inline NV_STATUS kioctrlMinionConstruct_DISPATCH(struct OBJGPU *pGpu, str } static inline void kioctrlInitMissing_DISPATCH(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate) { - pEngstate->__kioctrlInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kioctrlInitMissing__(pGpu, pEngstate); } static inline NV_STATUS kioctrlStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate) { - return pEngstate->__kioctrlStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kioctrlStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS kioctrlStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate) { - return pEngstate->__kioctrlStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kioctrlStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kioctrlStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate) { - return pEngstate->__kioctrlStateInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kioctrlStateInitLocked__(pGpu, pEngstate); } static inline NV_STATUS kioctrlStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate) { - return pEngstate->__kioctrlStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kioctrlStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kioctrlStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { - return pEngstate->__kioctrlStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kioctrlStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kioctrlStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { - return pEngstate->__kioctrlStateLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kioctrlStateLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kioctrlStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { - return pEngstate->__kioctrlStatePostLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kioctrlStatePostLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kioctrlStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { - return pEngstate->__kioctrlStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kioctrlStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS kioctrlStateUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { - return pEngstate->__kioctrlStateUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kioctrlStateUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS kioctrlStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate, NvU32 arg3) { - return pEngstate->__kioctrlStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kioctrlStatePostUnload__(pGpu, pEngstate, arg3); } static inline void kioctrlStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate) { - pEngstate->__kioctrlStateDestroy__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kioctrlStateDestroy__(pGpu, pEngstate); } static inline NvBool kioctrlIsPresent_DISPATCH(struct OBJGPU *pGpu, struct KernelIoctrl *pEngstate) { - return pEngstate->__kioctrlIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kioctrlIsPresent__(pGpu, pEngstate); } NV_STATUS kioctrlConstructEngine_IMPL(struct OBJGPU *arg1, struct KernelIoctrl *arg2, NvU32 arg3); -static inline NvBool kioctrlGetMinionEnableDefault_bf6dfa(struct OBJGPU *pGpu, struct KernelIoctrl *pKernelIoctrl) { - return ((NvBool)(0 != 0)); +static inline NvBool kioctrlGetMinionEnableDefault_d69453(struct OBJGPU *pGpu, struct KernelIoctrl *pKernelIoctrl) { + return NV_FALSE; } NvBool kioctrlGetMinionEnableDefault_GV100(struct OBJGPU *pGpu, struct KernelIoctrl *pKernelIoctrl); diff --git a/src/nvidia/generated/g_kernel_mc_nvoc.c b/src/nvidia/generated/g_kernel_mc_nvoc.c index 0005245db9..e81ecd3ccb 100644 --- a/src/nvidia/generated/g_kernel_mc_nvoc.c +++ b/src/nvidia/generated/g_kernel_mc_nvoc.c @@ -66,78 +66,96 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelMc = /*pExportInfo=*/ &__nvoc_export_info_KernelMc }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_KernelMc_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelMc); // this +NV_STATUS __nvoc_down_thunk_KernelMc_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelMc, NvU32 arg3); // this + // 2 down-thunk(s) defined to bridge methods in KernelMc from superclasses // kmcStateInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelMc_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelMc) { +NV_STATUS __nvoc_down_thunk_KernelMc_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelMc) { return kmcStateInitLocked(pGpu, (struct KernelMc *)(((unsigned char *) pKernelMc) - __nvoc_rtti_KernelMc_OBJENGSTATE.offset)); } // kmcStateLoad: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelMc_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelMc, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_KernelMc_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelMc, NvU32 arg3) { return kmcStateLoad(pGpu, (struct KernelMc *)(((unsigned char *) pKernelMc) - __nvoc_rtti_KernelMc_OBJENGSTATE.offset), arg3); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcConstructEngine(struct OBJGPU *pGpu, struct KernelMc *pEngstate, ENGDESCRIPTOR arg3); // this +void __nvoc_up_thunk_OBJENGSTATE_kmcInitMissing(struct OBJGPU *pGpu, struct KernelMc *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePreInitLocked(struct OBJGPU *pGpu, struct KernelMc *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelMc *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStateInitUnlocked(struct OBJGPU *pGpu, struct KernelMc *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePreLoad(struct OBJGPU *pGpu, struct KernelMc *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePostLoad(struct OBJGPU *pGpu, struct KernelMc *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePreUnload(struct OBJGPU *pGpu, struct KernelMc *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStateUnload(struct OBJGPU *pGpu, struct KernelMc *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePostUnload(struct OBJGPU *pGpu, struct KernelMc *pEngstate, NvU32 arg3); // this +void __nvoc_up_thunk_OBJENGSTATE_kmcStateDestroy(struct OBJGPU *pGpu, struct KernelMc *pEngstate); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_kmcIsPresent(struct OBJGPU *pGpu, struct KernelMc *pEngstate); // this + // 12 up-thunk(s) defined to bridge methods in KernelMc to superclasses // kmcConstructEngine: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcConstructEngine(struct OBJGPU *pGpu, struct KernelMc *pEngstate, ENGDESCRIPTOR arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcConstructEngine(struct OBJGPU *pGpu, struct KernelMc *pEngstate, ENGDESCRIPTOR arg3) { return engstateConstructEngine(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset), arg3); } // kmcInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kmcInitMissing(struct OBJGPU *pGpu, struct KernelMc *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kmcInitMissing(struct OBJGPU *pGpu, struct KernelMc *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset)); } // kmcStatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePreInitLocked(struct OBJGPU *pGpu, struct KernelMc *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePreInitLocked(struct OBJGPU *pGpu, struct KernelMc *pEngstate) { return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset)); } // kmcStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelMc *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelMc *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset)); } // kmcStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStateInitUnlocked(struct OBJGPU *pGpu, struct KernelMc *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStateInitUnlocked(struct OBJGPU *pGpu, struct KernelMc *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset)); } // kmcStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePreLoad(struct OBJGPU *pGpu, struct KernelMc *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePreLoad(struct OBJGPU *pGpu, struct KernelMc *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset), arg3); } // kmcStatePostLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePostLoad(struct OBJGPU *pGpu, struct KernelMc *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePostLoad(struct OBJGPU *pGpu, struct KernelMc *pEngstate, NvU32 arg3) { return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset), arg3); } // kmcStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePreUnload(struct OBJGPU *pGpu, struct KernelMc *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePreUnload(struct OBJGPU *pGpu, struct KernelMc *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset), arg3); } // kmcStateUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStateUnload(struct OBJGPU *pGpu, struct KernelMc *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStateUnload(struct OBJGPU *pGpu, struct KernelMc *pEngstate, NvU32 arg3) { return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset), arg3); } // kmcStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePostUnload(struct OBJGPU *pGpu, struct KernelMc *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmcStatePostUnload(struct OBJGPU *pGpu, struct KernelMc *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset), arg3); } // kmcStateDestroy: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kmcStateDestroy(struct OBJGPU *pGpu, struct KernelMc *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kmcStateDestroy(struct OBJGPU *pGpu, struct KernelMc *pEngstate) { engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset)); } // kmcIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_kmcIsPresent(struct OBJGPU *pGpu, struct KernelMc *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_kmcIsPresent(struct OBJGPU *pGpu, struct KernelMc *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMc_OBJENGSTATE.offset)); } @@ -186,14 +204,6 @@ static void __nvoc_init_funcTable_KernelMc_1(KernelMc *pThis, RmHalspecOwner *pR PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); - // kmcStateInitLocked -- virtual override (engstate) base (engstate) - pThis->__kmcStateInitLocked__ = &kmcStateInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelMc_engstateStateInitLocked; - - // kmcStateLoad -- virtual override (engstate) base (engstate) - pThis->__kmcStateLoad__ = &kmcStateLoad_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelMc_engstateStateLoad; - // kmcWritePmcEnableReg -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { @@ -207,49 +217,49 @@ static void __nvoc_init_funcTable_KernelMc_1(KernelMc *pThis, RmHalspecOwner *pR { pThis->__kmcWritePmcEnableReg__ = &kmcWritePmcEnableReg_GA100; } - - // kmcConstructEngine -- virtual inherited (engstate) base (engstate) - pThis->__kmcConstructEngine__ = &__nvoc_up_thunk_OBJENGSTATE_kmcConstructEngine; - - // kmcInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__kmcInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kmcInitMissing; - - // kmcStatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__kmcStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStatePreInitLocked; - - // kmcStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kmcStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStatePreInitUnlocked; - - // kmcStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kmcStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStateInitUnlocked; - - // kmcStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__kmcStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStatePreLoad; - - // kmcStatePostLoad -- virtual inherited (engstate) base (engstate) - pThis->__kmcStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStatePostLoad; - - // kmcStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__kmcStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStatePreUnload; - - // kmcStateUnload -- virtual inherited (engstate) base (engstate) - pThis->__kmcStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStateUnload; - - // kmcStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__kmcStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStatePostUnload; - - // kmcStateDestroy -- virtual inherited (engstate) base (engstate) - pThis->__kmcStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStateDestroy; - - // kmcIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__kmcIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kmcIsPresent; -} // End __nvoc_init_funcTable_KernelMc_1 with approximately 19 basic block(s). +} // End __nvoc_init_funcTable_KernelMc_1 with approximately 3 basic block(s). // Initialize vtable(s) for 15 virtual method(s). void __nvoc_init_funcTable_KernelMc(KernelMc *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 15 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelMc vtable = { + .__kmcStateInitLocked__ = &kmcStateInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelMc_engstateStateInitLocked, // virtual + .__kmcStateLoad__ = &kmcStateLoad_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelMc_engstateStateLoad, // virtual + .__kmcConstructEngine__ = &__nvoc_up_thunk_OBJENGSTATE_kmcConstructEngine, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &engstateConstructEngine_IMPL, // virtual + .__kmcInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kmcInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__kmcStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStatePreInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__kmcStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__kmcStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__kmcStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__kmcStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStatePostLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL, // virtual + .__kmcStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__kmcStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStateUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &engstateStateUnload_IMPL, // virtual + .__kmcStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__kmcStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_kmcStateDestroy, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &engstateStateDestroy_IMPL, // virtual + .__kmcIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kmcIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_vtable = &vtable; // (kmc) this + + // Initialize vtable(s) with 1 per-object function pointer(s). __nvoc_init_funcTable_KernelMc_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_mc_nvoc.h b/src/nvidia/generated/g_kernel_mc_nvoc.h index 5861b435b8..eda19f0722 100644 --- a/src/nvidia/generated/g_kernel_mc_nvoc.h +++ b/src/nvidia/generated/g_kernel_mc_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -70,10 +70,15 @@ typedef struct LATENCY_TIMER_CONTROL #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelMc; + + struct KernelMc { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelMc *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -83,10 +88,20 @@ struct KernelMc { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct KernelMc *__nvoc_pbase_KernelMc; // kmc - // Vtable with 15 per-object function pointers + // Vtable with 1 per-object function pointer + NV_STATUS (*__kmcWritePmcEnableReg__)(struct OBJGPU *, struct KernelMc * /*this*/, NvU32, NvBool, NvBool); // halified (3 hals) body + + // Data members + LATENCY_TIMER_CONTROL LatencyTimerControl; +}; + + +// Metadata including vtable with 14 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelMc { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + NV_STATUS (*__kmcStateInitLocked__)(struct OBJGPU *, struct KernelMc * /*this*/); // virtual override (engstate) base (engstate) NV_STATUS (*__kmcStateLoad__)(struct OBJGPU *, struct KernelMc * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__kmcWritePmcEnableReg__)(struct OBJGPU *, struct KernelMc * /*this*/, NvU32, NvBool, NvBool); // halified (3 hals) body NV_STATUS (*__kmcConstructEngine__)(struct OBJGPU *, struct KernelMc * /*this*/, ENGDESCRIPTOR); // virtual inherited (engstate) base (engstate) void (*__kmcInitMissing__)(struct OBJGPU *, struct KernelMc * /*this*/); // virtual inherited (engstate) base (engstate) NV_STATUS (*__kmcStatePreInitLocked__)(struct OBJGPU *, struct KernelMc * /*this*/); // virtual inherited (engstate) base (engstate) @@ -99,9 +114,6 @@ struct KernelMc { NV_STATUS (*__kmcStatePostUnload__)(struct OBJGPU *, struct KernelMc * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) void (*__kmcStateDestroy__)(struct OBJGPU *, struct KernelMc * /*this*/); // virtual inherited (engstate) base (engstate) NvBool (*__kmcIsPresent__)(struct OBJGPU *, struct KernelMc * /*this*/); // virtual inherited (engstate) base (engstate) - - // Data members - LATENCY_TIMER_CONTROL LatencyTimerControl; }; #ifndef __NVOC_CLASS_KernelMc_TYPEDEF__ @@ -138,45 +150,45 @@ NV_STATUS __nvoc_objCreate_KernelMc(KernelMc**, Dynamic*, NvU32); // Wrapper macros -#define kmcStateInitLocked_FNPTR(pKernelMc) pKernelMc->__kmcStateInitLocked__ +#define kmcStateInitLocked_FNPTR(pKernelMc) pKernelMc->__nvoc_vtable->__kmcStateInitLocked__ #define kmcStateInitLocked(pGpu, pKernelMc) kmcStateInitLocked_DISPATCH(pGpu, pKernelMc) -#define kmcStateLoad_FNPTR(pKernelMc) pKernelMc->__kmcStateLoad__ +#define kmcStateLoad_FNPTR(pKernelMc) pKernelMc->__nvoc_vtable->__kmcStateLoad__ #define kmcStateLoad(pGpu, pKernelMc, arg3) kmcStateLoad_DISPATCH(pGpu, pKernelMc, arg3) #define kmcWritePmcEnableReg_FNPTR(pKernelMc) pKernelMc->__kmcWritePmcEnableReg__ #define kmcWritePmcEnableReg(pGpu, pKernelMc, arg3, arg4, arg5) kmcWritePmcEnableReg_DISPATCH(pGpu, pKernelMc, arg3, arg4, arg5) #define kmcWritePmcEnableReg_HAL(pGpu, pKernelMc, arg3, arg4, arg5) kmcWritePmcEnableReg_DISPATCH(pGpu, pKernelMc, arg3, arg4, arg5) -#define kmcConstructEngine_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ +#define kmcConstructEngine_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateConstructEngine__ #define kmcConstructEngine(pGpu, pEngstate, arg3) kmcConstructEngine_DISPATCH(pGpu, pEngstate, arg3) -#define kmcInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define kmcInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define kmcInitMissing(pGpu, pEngstate) kmcInitMissing_DISPATCH(pGpu, pEngstate) -#define kmcStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define kmcStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define kmcStatePreInitLocked(pGpu, pEngstate) kmcStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define kmcStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define kmcStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define kmcStatePreInitUnlocked(pGpu, pEngstate) kmcStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kmcStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kmcStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define kmcStateInitUnlocked(pGpu, pEngstate) kmcStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kmcStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kmcStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define kmcStatePreLoad(pGpu, pEngstate, arg3) kmcStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kmcStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define kmcStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostLoad__ #define kmcStatePostLoad(pGpu, pEngstate, arg3) kmcStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kmcStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kmcStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define kmcStatePreUnload(pGpu, pEngstate, arg3) kmcStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kmcStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define kmcStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateUnload__ #define kmcStateUnload(pGpu, pEngstate, arg3) kmcStateUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kmcStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kmcStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define kmcStatePostUnload(pGpu, pEngstate, arg3) kmcStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kmcStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define kmcStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateDestroy__ #define kmcStateDestroy(pGpu, pEngstate) kmcStateDestroy_DISPATCH(pGpu, pEngstate) -#define kmcIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define kmcIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define kmcIsPresent(pGpu, pEngstate) kmcIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS kmcStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pKernelMc) { - return pKernelMc->__kmcStateInitLocked__(pGpu, pKernelMc); + return pKernelMc->__nvoc_vtable->__kmcStateInitLocked__(pGpu, pKernelMc); } static inline NV_STATUS kmcStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU32 arg3) { - return pKernelMc->__kmcStateLoad__(pGpu, pKernelMc, arg3); + return pKernelMc->__nvoc_vtable->__kmcStateLoad__(pGpu, pKernelMc, arg3); } static inline NV_STATUS kmcWritePmcEnableReg_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU32 arg3, NvBool arg4, NvBool arg5) { @@ -184,51 +196,51 @@ static inline NV_STATUS kmcWritePmcEnableReg_DISPATCH(struct OBJGPU *pGpu, struc } static inline NV_STATUS kmcConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pEngstate, ENGDESCRIPTOR arg3) { - return pEngstate->__kmcConstructEngine__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kmcConstructEngine__(pGpu, pEngstate, arg3); } static inline void kmcInitMissing_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pEngstate) { - pEngstate->__kmcInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kmcInitMissing__(pGpu, pEngstate); } static inline NV_STATUS kmcStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pEngstate) { - return pEngstate->__kmcStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kmcStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS kmcStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pEngstate) { - return pEngstate->__kmcStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kmcStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kmcStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pEngstate) { - return pEngstate->__kmcStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kmcStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kmcStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pEngstate, NvU32 arg3) { - return pEngstate->__kmcStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kmcStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kmcStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pEngstate, NvU32 arg3) { - return pEngstate->__kmcStatePostLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kmcStatePostLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kmcStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pEngstate, NvU32 arg3) { - return pEngstate->__kmcStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kmcStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS kmcStateUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pEngstate, NvU32 arg3) { - return pEngstate->__kmcStateUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kmcStateUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS kmcStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pEngstate, NvU32 arg3) { - return pEngstate->__kmcStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kmcStatePostUnload__(pGpu, pEngstate, arg3); } static inline void kmcStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pEngstate) { - pEngstate->__kmcStateDestroy__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kmcStateDestroy__(pGpu, pEngstate); } static inline NvBool kmcIsPresent_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pEngstate) { - return pEngstate->__kmcIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kmcIsPresent__(pGpu, pEngstate); } NV_STATUS kmcPrepareForXVEReset_GM107(struct OBJGPU *pGpu, struct KernelMc *pKernelMc); diff --git a/src/nvidia/generated/g_kernel_mig_manager_nvoc.c b/src/nvidia/generated/g_kernel_mig_manager_nvoc.c index 2b475d7525..3d65b3abc3 100644 --- a/src/nvidia/generated/g_kernel_mig_manager_nvoc.c +++ b/src/nvidia/generated/g_kernel_mig_manager_nvoc.c @@ -66,78 +66,96 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelMIGManager = /*pExportInfo=*/ &__nvoc_export_info_KernelMIGManager }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_KernelMIGManager_engstateConstructEngine(OBJGPU *arg1, struct OBJENGSTATE *arg_this, ENGDESCRIPTOR arg3); // this +NV_STATUS __nvoc_down_thunk_KernelMIGManager_engstateStateInitLocked(OBJGPU *arg1, struct OBJENGSTATE *arg_this); // this +NV_STATUS __nvoc_down_thunk_KernelMIGManager_engstateStateUnload(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags); // this + // 3 down-thunk(s) defined to bridge methods in KernelMIGManager from superclasses // kmigmgrConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelMIGManager_engstateConstructEngine(OBJGPU *arg1, struct OBJENGSTATE *arg_this, ENGDESCRIPTOR arg3) { +NV_STATUS __nvoc_down_thunk_KernelMIGManager_engstateConstructEngine(OBJGPU *arg1, struct OBJENGSTATE *arg_this, ENGDESCRIPTOR arg3) { return kmigmgrConstructEngine(arg1, (struct KernelMIGManager *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset), arg3); } // kmigmgrStateInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelMIGManager_engstateStateInitLocked(OBJGPU *arg1, struct OBJENGSTATE *arg_this) { +NV_STATUS __nvoc_down_thunk_KernelMIGManager_engstateStateInitLocked(OBJGPU *arg1, struct OBJENGSTATE *arg_this) { return kmigmgrStateInitLocked(arg1, (struct KernelMIGManager *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset)); } // kmigmgrStateUnload: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelMIGManager_engstateStateUnload(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags) { +NV_STATUS __nvoc_down_thunk_KernelMIGManager_engstateStateUnload(OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 flags) { return kmigmgrStateUnload(arg1, (struct KernelMIGManager *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset), flags); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_kmigmgrInitMissing(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreInitLocked(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStateInitUnlocked(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreLoad(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStateLoad(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePostLoad(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreUnload(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePostUnload(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3); // this +void __nvoc_up_thunk_OBJENGSTATE_kmigmgrStateDestroy(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_kmigmgrIsPresent(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate); // this + // 11 up-thunk(s) defined to bridge methods in KernelMIGManager to superclasses // kmigmgrInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kmigmgrInitMissing(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kmigmgrInitMissing(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset)); } // kmigmgrStatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreInitLocked(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreInitLocked(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate) { return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset)); } // kmigmgrStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset)); } // kmigmgrStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStateInitUnlocked(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStateInitUnlocked(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset)); } // kmigmgrStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreLoad(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreLoad(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset), arg3); } // kmigmgrStateLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStateLoad(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStateLoad(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset), arg3); } // kmigmgrStatePostLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePostLoad(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePostLoad(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset), arg3); } // kmigmgrStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreUnload(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreUnload(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset), arg3); } // kmigmgrStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePostUnload(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePostUnload(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset), arg3); } // kmigmgrStateDestroy: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_kmigmgrStateDestroy(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_kmigmgrStateDestroy(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate) { engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset)); } // kmigmgrIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_kmigmgrIsPresent(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_kmigmgrIsPresent(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelMIGManager_OBJENGSTATE.offset)); } @@ -195,18 +213,6 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); - // kmigmgrConstructEngine -- virtual override (engstate) base (engstate) - pThis->__kmigmgrConstructEngine__ = &kmigmgrConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelMIGManager_engstateConstructEngine; - - // kmigmgrStateInitLocked -- virtual override (engstate) base (engstate) - pThis->__kmigmgrStateInitLocked__ = &kmigmgrStateInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelMIGManager_engstateStateInitLocked; - - // kmigmgrStateUnload -- virtual override (engstate) base (engstate) - pThis->__kmigmgrStateUnload__ = &kmigmgrStateUnload_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelMIGManager_engstateStateUnload; - // kmigmgrLoadStaticInfo -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { @@ -301,7 +307,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm // default else { - pThis->__kmigmgrIsDevinitMIGBitSet__ = &kmigmgrIsDevinitMIGBitSet_491d52; + pThis->__kmigmgrIsDevinitMIGBitSet__ = &kmigmgrIsDevinitMIGBitSet_3dd2c9; } } @@ -317,7 +323,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm // default else { - pThis->__kmigmgrIsGPUInstanceCombinationValid__ = &kmigmgrIsGPUInstanceCombinationValid_491d52; + pThis->__kmigmgrIsGPUInstanceCombinationValid__ = &kmigmgrIsGPUInstanceCombinationValid_3dd2c9; } // kmigmgrIsGPUInstanceFlagValid -- halified (4 hals) @@ -336,7 +342,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm // default else { - pThis->__kmigmgrIsGPUInstanceFlagValid__ = &kmigmgrIsGPUInstanceFlagValid_491d52; + pThis->__kmigmgrIsGPUInstanceFlagValid__ = &kmigmgrIsGPUInstanceFlagValid_3dd2c9; } // kmigmgrGenerateComputeInstanceUuid -- halified (2 hals) @@ -378,7 +384,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm } else { - pThis->__kmigmgrIsMemoryPartitioningRequested__ = &kmigmgrIsMemoryPartitioningRequested_491d52; + pThis->__kmigmgrIsMemoryPartitioningRequested__ = &kmigmgrIsMemoryPartitioningRequested_3dd2c9; } // kmigmgrIsMemoryPartitioningNeeded -- halified (2 hals) @@ -388,7 +394,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm } else { - pThis->__kmigmgrIsMemoryPartitioningNeeded__ = &kmigmgrIsMemoryPartitioningNeeded_491d52; + pThis->__kmigmgrIsMemoryPartitioningNeeded__ = &kmigmgrIsMemoryPartitioningNeeded_3dd2c9; } // kmigmgrMemSizeFlagToSwizzIdRange -- halified (3 hals) @@ -431,7 +437,7 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm // kmigmgrIsCTSAlignmentRequired -- halified (3 hals) if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ { - pThis->__kmigmgrIsCTSAlignmentRequired__ = &kmigmgrIsCTSAlignmentRequired_cbe027; + pThis->__kmigmgrIsCTSAlignmentRequired__ = &kmigmgrIsCTSAlignmentRequired_88bc07; } // default else @@ -455,46 +461,49 @@ static void __nvoc_init_funcTable_KernelMIGManager_1(KernelMIGManager *pThis, Rm { pThis->__kmigmgrRestoreFromBootConfig__ = &kmigmgrRestoreFromBootConfig_PF; } - - // kmigmgrInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__kmigmgrInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrInitMissing; - - // kmigmgrStatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__kmigmgrStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreInitLocked; - - // kmigmgrStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kmigmgrStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreInitUnlocked; - - // kmigmgrStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__kmigmgrStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStateInitUnlocked; - - // kmigmgrStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__kmigmgrStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreLoad; - - // kmigmgrStateLoad -- virtual inherited (engstate) base (engstate) - pThis->__kmigmgrStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStateLoad; - - // kmigmgrStatePostLoad -- virtual inherited (engstate) base (engstate) - pThis->__kmigmgrStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePostLoad; - - // kmigmgrStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__kmigmgrStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreUnload; - - // kmigmgrStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__kmigmgrStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePostUnload; - - // kmigmgrStateDestroy -- virtual inherited (engstate) base (engstate) - pThis->__kmigmgrStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStateDestroy; - - // kmigmgrIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__kmigmgrIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrIsPresent; -} // End __nvoc_init_funcTable_KernelMIGManager_1 with approximately 65 basic block(s). +} // End __nvoc_init_funcTable_KernelMIGManager_1 with approximately 48 basic block(s). // Initialize vtable(s) for 35 virtual method(s). void __nvoc_init_funcTable_KernelMIGManager(KernelMIGManager *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 35 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelMIGManager vtable = { + .__kmigmgrConstructEngine__ = &kmigmgrConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelMIGManager_engstateConstructEngine, // virtual + .__kmigmgrStateInitLocked__ = &kmigmgrStateInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_KernelMIGManager_engstateStateInitLocked, // virtual + .__kmigmgrStateUnload__ = &kmigmgrStateUnload_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelMIGManager_engstateStateUnload, // virtual + .__kmigmgrInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__kmigmgrStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__kmigmgrStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__kmigmgrStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__kmigmgrStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__kmigmgrStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStateLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &engstateStateLoad_IMPL, // virtual + .__kmigmgrStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePostLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL, // virtual + .__kmigmgrStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__kmigmgrStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__kmigmgrStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrStateDestroy, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &engstateStateDestroy_IMPL, // virtual + .__kmigmgrIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_kmigmgrIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_vtable = &vtable; // (kmigmgr) this + + // Initialize vtable(s) with 21 per-object function pointer(s). __nvoc_init_funcTable_KernelMIGManager_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_mig_manager_nvoc.h b/src/nvidia/generated/g_kernel_mig_manager_nvoc.h index db447c1606..5b524b1db2 100644 --- a/src/nvidia/generated/g_kernel_mig_manager_nvoc.h +++ b/src/nvidia/generated/g_kernel_mig_manager_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -485,10 +485,15 @@ typedef struct KERNEL_MIG_MANAGER_STATIC_INFO #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelMIGManager; + + struct KernelMIGManager { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelMIGManager *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -498,10 +503,7 @@ struct KernelMIGManager { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct KernelMIGManager *__nvoc_pbase_KernelMIGManager; // kmigmgr - // Vtable with 35 per-object function pointers - NV_STATUS (*__kmigmgrConstructEngine__)(OBJGPU *, struct KernelMIGManager * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) - NV_STATUS (*__kmigmgrStateInitLocked__)(OBJGPU *, struct KernelMIGManager * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__kmigmgrStateUnload__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // virtual override (engstate) base (engstate) + // Vtable with 21 per-object function pointers NV_STATUS (*__kmigmgrLoadStaticInfo__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (2 hals) NV_STATUS (*__kmigmgrSetStaticInfo__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (2 hals) void (*__kmigmgrClearStaticInfo__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (2 hals) @@ -523,17 +525,6 @@ struct KernelMIGManager { NV_STATUS (*__kmigmgrSetMIGState__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvBool, NvBool, NvBool); // halified (2 hals) NvBool (*__kmigmgrIsCTSAlignmentRequired__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (3 hals) NV_STATUS (*__kmigmgrRestoreFromBootConfig__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (2 hals) body - void (*__kmigmgrInitMissing__)(struct OBJGPU *, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kmigmgrStatePreInitLocked__)(struct OBJGPU *, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kmigmgrStatePreInitUnlocked__)(struct OBJGPU *, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kmigmgrStateInitUnlocked__)(struct OBJGPU *, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kmigmgrStatePreLoad__)(struct OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kmigmgrStateLoad__)(struct OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kmigmgrStatePostLoad__)(struct OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kmigmgrStatePreUnload__)(struct OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kmigmgrStatePostUnload__)(struct OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - void (*__kmigmgrStateDestroy__)(struct OBJGPU *, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) - NvBool (*__kmigmgrIsPresent__)(struct OBJGPU *, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) // Data members NvBool PRIVATE_FIELD(bIsA100ReducedConfig); @@ -558,6 +549,7 @@ struct KernelMIGManager_PRIVATE { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelMIGManager *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -567,10 +559,7 @@ struct KernelMIGManager_PRIVATE { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct KernelMIGManager *__nvoc_pbase_KernelMIGManager; // kmigmgr - // Vtable with 35 per-object function pointers - NV_STATUS (*__kmigmgrConstructEngine__)(OBJGPU *, struct KernelMIGManager * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) - NV_STATUS (*__kmigmgrStateInitLocked__)(OBJGPU *, struct KernelMIGManager * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__kmigmgrStateUnload__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // virtual override (engstate) base (engstate) + // Vtable with 21 per-object function pointers NV_STATUS (*__kmigmgrLoadStaticInfo__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (2 hals) NV_STATUS (*__kmigmgrSetStaticInfo__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (2 hals) void (*__kmigmgrClearStaticInfo__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (2 hals) @@ -592,17 +581,6 @@ struct KernelMIGManager_PRIVATE { NV_STATUS (*__kmigmgrSetMIGState__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvBool, NvBool, NvBool); // halified (2 hals) NvBool (*__kmigmgrIsCTSAlignmentRequired__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (3 hals) NV_STATUS (*__kmigmgrRestoreFromBootConfig__)(OBJGPU *, struct KernelMIGManager * /*this*/); // halified (2 hals) body - void (*__kmigmgrInitMissing__)(struct OBJGPU *, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kmigmgrStatePreInitLocked__)(struct OBJGPU *, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kmigmgrStatePreInitUnlocked__)(struct OBJGPU *, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kmigmgrStateInitUnlocked__)(struct OBJGPU *, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kmigmgrStatePreLoad__)(struct OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kmigmgrStateLoad__)(struct OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kmigmgrStatePostLoad__)(struct OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kmigmgrStatePreUnload__)(struct OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__kmigmgrStatePostUnload__)(struct OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - void (*__kmigmgrStateDestroy__)(struct OBJGPU *, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) - NvBool (*__kmigmgrIsPresent__)(struct OBJGPU *, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) // Data members NvBool bIsA100ReducedConfig; @@ -622,6 +600,27 @@ struct KernelMIGManager_PRIVATE { NvU64 validGlobalGfxCTSIdMask; }; + +// Metadata including vtable with 14 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelMIGManager { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + + NV_STATUS (*__kmigmgrConstructEngine__)(OBJGPU *, struct KernelMIGManager * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmigmgrStateInitLocked__)(OBJGPU *, struct KernelMIGManager * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__kmigmgrStateUnload__)(OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // virtual override (engstate) base (engstate) + void (*__kmigmgrInitMissing__)(struct OBJGPU *, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStatePreInitLocked__)(struct OBJGPU *, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStatePreInitUnlocked__)(struct OBJGPU *, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStateInitUnlocked__)(struct OBJGPU *, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStatePreLoad__)(struct OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStateLoad__)(struct OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStatePostLoad__)(struct OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStatePreUnload__)(struct OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__kmigmgrStatePostUnload__)(struct OBJGPU *, struct KernelMIGManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__kmigmgrStateDestroy__)(struct OBJGPU *, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) + NvBool (*__kmigmgrIsPresent__)(struct OBJGPU *, struct KernelMIGManager * /*this*/); // virtual inherited (engstate) base (engstate) +}; + #ifndef __NVOC_CLASS_KernelMIGManager_TYPEDEF__ #define __NVOC_CLASS_KernelMIGManager_TYPEDEF__ typedef struct KernelMIGManager KernelMIGManager; @@ -656,11 +655,11 @@ NV_STATUS __nvoc_objCreate_KernelMIGManager(KernelMIGManager**, Dynamic*, NvU32) // Wrapper macros -#define kmigmgrConstructEngine_FNPTR(arg_this) arg_this->__kmigmgrConstructEngine__ +#define kmigmgrConstructEngine_FNPTR(arg_this) arg_this->__nvoc_vtable->__kmigmgrConstructEngine__ #define kmigmgrConstructEngine(arg1, arg_this, arg3) kmigmgrConstructEngine_DISPATCH(arg1, arg_this, arg3) -#define kmigmgrStateInitLocked_FNPTR(arg_this) arg_this->__kmigmgrStateInitLocked__ +#define kmigmgrStateInitLocked_FNPTR(arg_this) arg_this->__nvoc_vtable->__kmigmgrStateInitLocked__ #define kmigmgrStateInitLocked(arg1, arg_this) kmigmgrStateInitLocked_DISPATCH(arg1, arg_this) -#define kmigmgrStateUnload_FNPTR(arg_this) arg_this->__kmigmgrStateUnload__ +#define kmigmgrStateUnload_FNPTR(arg_this) arg_this->__nvoc_vtable->__kmigmgrStateUnload__ #define kmigmgrStateUnload(arg1, arg_this, flags) kmigmgrStateUnload_DISPATCH(arg1, arg_this, flags) #define kmigmgrLoadStaticInfo_FNPTR(arg_this) arg_this->__kmigmgrLoadStaticInfo__ #define kmigmgrLoadStaticInfo(arg1, arg_this) kmigmgrLoadStaticInfo_DISPATCH(arg1, arg_this) @@ -725,40 +724,40 @@ NV_STATUS __nvoc_objCreate_KernelMIGManager(KernelMIGManager**, Dynamic*, NvU32) #define kmigmgrRestoreFromBootConfig_FNPTR(pKernelMIGManager) pKernelMIGManager->__kmigmgrRestoreFromBootConfig__ #define kmigmgrRestoreFromBootConfig(pGpu, pKernelMIGManager) kmigmgrRestoreFromBootConfig_DISPATCH(pGpu, pKernelMIGManager) #define kmigmgrRestoreFromBootConfig_HAL(pGpu, pKernelMIGManager) kmigmgrRestoreFromBootConfig_DISPATCH(pGpu, pKernelMIGManager) -#define kmigmgrInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define kmigmgrInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define kmigmgrInitMissing(pGpu, pEngstate) kmigmgrInitMissing_DISPATCH(pGpu, pEngstate) -#define kmigmgrStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define kmigmgrStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define kmigmgrStatePreInitLocked(pGpu, pEngstate) kmigmgrStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define kmigmgrStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define kmigmgrStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define kmigmgrStatePreInitUnlocked(pGpu, pEngstate) kmigmgrStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kmigmgrStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define kmigmgrStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define kmigmgrStateInitUnlocked(pGpu, pEngstate) kmigmgrStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define kmigmgrStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define kmigmgrStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define kmigmgrStatePreLoad(pGpu, pEngstate, arg3) kmigmgrStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kmigmgrStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define kmigmgrStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateLoad__ #define kmigmgrStateLoad(pGpu, pEngstate, arg3) kmigmgrStateLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kmigmgrStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define kmigmgrStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostLoad__ #define kmigmgrStatePostLoad(pGpu, pEngstate, arg3) kmigmgrStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define kmigmgrStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define kmigmgrStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define kmigmgrStatePreUnload(pGpu, pEngstate, arg3) kmigmgrStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kmigmgrStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define kmigmgrStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define kmigmgrStatePostUnload(pGpu, pEngstate, arg3) kmigmgrStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define kmigmgrStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define kmigmgrStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateDestroy__ #define kmigmgrStateDestroy(pGpu, pEngstate) kmigmgrStateDestroy_DISPATCH(pGpu, pEngstate) -#define kmigmgrIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define kmigmgrIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define kmigmgrIsPresent(pGpu, pEngstate) kmigmgrIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS kmigmgrConstructEngine_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this, ENGDESCRIPTOR arg3) { - return arg_this->__kmigmgrConstructEngine__(arg1, arg_this, arg3); + return arg_this->__nvoc_vtable->__kmigmgrConstructEngine__(arg1, arg_this, arg3); } static inline NV_STATUS kmigmgrStateInitLocked_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this) { - return arg_this->__kmigmgrStateInitLocked__(arg1, arg_this); + return arg_this->__nvoc_vtable->__kmigmgrStateInitLocked__(arg1, arg_this); } static inline NV_STATUS kmigmgrStateUnload_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this, NvU32 flags) { - return arg_this->__kmigmgrStateUnload__(arg1, arg_this, flags); + return arg_this->__nvoc_vtable->__kmigmgrStateUnload__(arg1, arg_this, flags); } static inline NV_STATUS kmigmgrLoadStaticInfo_DISPATCH(OBJGPU *arg1, struct KernelMIGManager *arg_this) { @@ -846,47 +845,47 @@ static inline NV_STATUS kmigmgrRestoreFromBootConfig_DISPATCH(OBJGPU *pGpu, stru } static inline void kmigmgrInitMissing_DISPATCH(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate) { - pEngstate->__kmigmgrInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kmigmgrInitMissing__(pGpu, pEngstate); } static inline NV_STATUS kmigmgrStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate) { - return pEngstate->__kmigmgrStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kmigmgrStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS kmigmgrStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate) { - return pEngstate->__kmigmgrStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kmigmgrStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kmigmgrStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate) { - return pEngstate->__kmigmgrStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kmigmgrStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS kmigmgrStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { - return pEngstate->__kmigmgrStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kmigmgrStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kmigmgrStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { - return pEngstate->__kmigmgrStateLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kmigmgrStateLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kmigmgrStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { - return pEngstate->__kmigmgrStatePostLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kmigmgrStatePostLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS kmigmgrStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { - return pEngstate->__kmigmgrStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kmigmgrStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS kmigmgrStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate, NvU32 arg3) { - return pEngstate->__kmigmgrStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__kmigmgrStatePostUnload__(pGpu, pEngstate, arg3); } static inline void kmigmgrStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate) { - pEngstate->__kmigmgrStateDestroy__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__kmigmgrStateDestroy__(pGpu, pEngstate); } static inline NvBool kmigmgrIsPresent_DISPATCH(struct OBJGPU *pGpu, struct KernelMIGManager *pEngstate) { - return pEngstate->__kmigmgrIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__kmigmgrIsPresent__(pGpu, pEngstate); } void kmigmgrDetectReducedConfig_KERNEL(OBJGPU *arg1, struct KernelMIGManager *arg2); @@ -902,6 +901,20 @@ static inline void kmigmgrDetectReducedConfig(OBJGPU *arg1, struct KernelMIGMana #define kmigmgrDetectReducedConfig_HAL(arg1, arg2) kmigmgrDetectReducedConfig(arg1, arg2) +NvU32 kmigmgrGetNextComputeSize_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvBool bGetNextSmallest, NvU32 computeSize); + + +#ifdef __nvoc_kernel_mig_manager_h_disabled +static inline NvU32 kmigmgrGetNextComputeSize(OBJGPU *arg1, struct KernelMIGManager *arg2, NvBool bGetNextSmallest, NvU32 computeSize) { + NV_ASSERT_FAILED_PRECOMP("KernelMIGManager was disabled!"); + return 0; +} +#else //__nvoc_kernel_mig_manager_h_disabled +#define kmigmgrGetNextComputeSize(arg1, arg2, bGetNextSmallest, computeSize) kmigmgrGetNextComputeSize_IMPL(arg1, arg2, bGetNextSmallest, computeSize) +#endif //__nvoc_kernel_mig_manager_h_disabled + +#define kmigmgrGetNextComputeSize_HAL(arg1, arg2, bGetNextSmallest, computeSize) kmigmgrGetNextComputeSize(arg1, arg2, bGetNextSmallest, computeSize) + NV_STATUS kmigmgrGetComputeProfileFromGpcCount_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 gpcCount, NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE *pProfile); @@ -970,16 +983,16 @@ NvBool kmigmgrIsDevinitMIGBitSet_VF(OBJGPU *arg1, struct KernelMIGManager *arg2) NvBool kmigmgrIsDevinitMIGBitSet_GA100(OBJGPU *arg1, struct KernelMIGManager *arg2); -static inline NvBool kmigmgrIsDevinitMIGBitSet_491d52(OBJGPU *arg1, struct KernelMIGManager *arg2) { - return ((NvBool)(0 != 0)); +static inline NvBool kmigmgrIsDevinitMIGBitSet_3dd2c9(OBJGPU *arg1, struct KernelMIGManager *arg2) { + return NV_FALSE; } NvBool kmigmgrIsGPUInstanceCombinationValid_GA100(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 gpuInstanceFlag); NvBool kmigmgrIsGPUInstanceCombinationValid_GH100(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 gpuInstanceFlag); -static inline NvBool kmigmgrIsGPUInstanceCombinationValid_491d52(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 gpuInstanceFlag) { - return ((NvBool)(0 != 0)); +static inline NvBool kmigmgrIsGPUInstanceCombinationValid_3dd2c9(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 gpuInstanceFlag) { + return NV_FALSE; } NvBool kmigmgrIsGPUInstanceFlagValid_GA100(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 gpuInstanceFlag); @@ -988,8 +1001,8 @@ NvBool kmigmgrIsGPUInstanceFlagValid_GH100(OBJGPU *arg1, struct KernelMIGManager NvBool kmigmgrIsGPUInstanceFlagValid_GB100(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 gpuInstanceFlag); -static inline NvBool kmigmgrIsGPUInstanceFlagValid_491d52(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 gpuInstanceFlag) { - return ((NvBool)(0 != 0)); +static inline NvBool kmigmgrIsGPUInstanceFlagValid_3dd2c9(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 gpuInstanceFlag) { + return NV_FALSE; } NV_STATUS kmigmgrGenerateComputeInstanceUuid_VF(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId, NvU32 globalGrIdx, NvUuid *arg5); @@ -1010,14 +1023,14 @@ NV_STATUS kmigmgrCreateComputeInstances_FWCLIENT(OBJGPU *arg1, struct KernelMIGM NvBool kmigmgrIsMemoryPartitioningRequested_GA100(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 partitionFlags); -static inline NvBool kmigmgrIsMemoryPartitioningRequested_491d52(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 partitionFlags) { - return ((NvBool)(0 != 0)); +static inline NvBool kmigmgrIsMemoryPartitioningRequested_3dd2c9(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 partitionFlags) { + return NV_FALSE; } NvBool kmigmgrIsMemoryPartitioningNeeded_GA100(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId); -static inline NvBool kmigmgrIsMemoryPartitioningNeeded_491d52(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId) { - return ((NvBool)(0 != 0)); +static inline NvBool kmigmgrIsMemoryPartitioningNeeded_3dd2c9(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 swizzId) { + return NV_FALSE; } static inline struct NV_RANGE kmigmgrMemSizeFlagToSwizzIdRange_d64cd6(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 memSizeFlag) { @@ -1036,8 +1049,8 @@ NV_STATUS kmigmgrSetMIGState_VF(OBJGPU *arg1, struct KernelMIGManager *arg2, NvB NV_STATUS kmigmgrSetMIGState_FWCLIENT(OBJGPU *arg1, struct KernelMIGManager *arg2, NvBool bMemoryPartitioningNeeded, NvBool bEnable, NvBool bUnload); -static inline NvBool kmigmgrIsCTSAlignmentRequired_cbe027(OBJGPU *arg1, struct KernelMIGManager *arg2) { - return ((NvBool)(0 == 0)); +static inline NvBool kmigmgrIsCTSAlignmentRequired_88bc07(OBJGPU *arg1, struct KernelMIGManager *arg2) { + return NV_TRUE; } NvBool kmigmgrIsCTSAlignmentRequired_VF(OBJGPU *arg1, struct KernelMIGManager *arg2); @@ -1051,11 +1064,11 @@ static inline NV_STATUS kmigmgrRestoreFromBootConfig_56cd7a(OBJGPU *pGpu, struct } static inline NvBool kmigmgrUseLegacyVgpuPolicy(OBJGPU *pGpu, struct KernelMIGManager *pKernelMIGManager) { - return ((NvBool)(0 != 0)); + return NV_FALSE; } static inline NvBool kmigmgrIsMIGNvlinkP2PSupportOverridden(OBJGPU *pGpu, struct KernelMIGManager *pKernelMIGManager) { - return ((NvBool)(0 != 0)); + return NV_FALSE; } static inline void kmigmgrSetMIGEnabled(OBJGPU *pGpu, struct KernelMIGManager *pKernelMIGManager, NvBool bEnabled) { @@ -1872,9 +1885,6 @@ static inline NV_STATUS kmigmgrInvalidateGr(OBJGPU *arg1, struct KernelMIGManage #define kmigmgrInvalidateGr(arg1, arg2, arg3, grIdx) kmigmgrInvalidateGr_IMPL(arg1, arg2, arg3, grIdx) #endif //__nvoc_kernel_mig_manager_h_disabled -NvU32 kmigmgrGetNextComputeSize_IMPL(NvBool bGetNextSmallest, NvU32 computeSize); - -#define kmigmgrGetNextComputeSize(bGetNextSmallest, computeSize) kmigmgrGetNextComputeSize_IMPL(bGetNextSmallest, computeSize) NV_STATUS kmigmgrGetSkylineFromSize_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2, NvU32 computeSize, const NV2080_CTRL_INTERNAL_GRMGR_SKYLINE_INFO **ppSkyline); #ifdef __nvoc_kernel_mig_manager_h_disabled @@ -1968,9 +1978,9 @@ static inline NV_STATUS kmigmgrGetFreeCTSId(OBJGPU *arg1, struct KernelMIGManage #define kmigmgrGetFreeCTSId(arg1, arg2, pCtsId, globalValidCtsMask, globalValidGfxCtsMask, ctsIdsInUseMask, profileSize, bRestrictWithGfx, bGfxRequested) kmigmgrGetFreeCTSId_IMPL(arg1, arg2, pCtsId, globalValidCtsMask, globalValidGfxCtsMask, ctsIdsInUseMask, profileSize, bRestrictWithGfx, bGfxRequested) #endif //__nvoc_kernel_mig_manager_h_disabled -NvU32 kmigmgrGetComputeSizeFromCTSId_IMPL(NvU32 ctsId); +NvU32 kmigmgrGetComputeSizeFromCTSId_IMPL(OBJGPU *arg1, NvU32 ctsId); -#define kmigmgrGetComputeSizeFromCTSId(ctsId) kmigmgrGetComputeSizeFromCTSId_IMPL(ctsId) +#define kmigmgrGetComputeSizeFromCTSId(arg1, ctsId) kmigmgrGetComputeSizeFromCTSId_IMPL(arg1, ctsId) NvU32 kmigmgrSmallestComputeProfileSize_IMPL(OBJGPU *arg1, struct KernelMIGManager *arg2); #ifdef __nvoc_kernel_mig_manager_h_disabled diff --git a/src/nvidia/generated/g_kernel_nvdec_ctx_nvoc.c b/src/nvidia/generated/g_kernel_nvdec_ctx_nvoc.c index a4d2606bfa..978c412961 100644 --- a/src/nvidia/generated/g_kernel_nvdec_ctx_nvoc.c +++ b/src/nvidia/generated/g_kernel_nvdec_ctx_nvoc.c @@ -120,165 +120,275 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_NvdecContext = /*pExportInfo=*/ &__nvoc_export_info_NvdecContext }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super^2 +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super^2 +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap(struct RmResource *pChannelDescendant, NvBool bSubdeviceHandleProvided); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^3 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^3 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^3 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super^2 +NV_STATUS __nvoc_up_thunk_GpuResource_chandesControl(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesMap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesUnmap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_GpuResource_chandesShareCallback(struct ChannelDescendant *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize(struct ChannelDescendant *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesInternalControlForward(struct ChannelDescendant *pGpuResource, NvU32 command, void *pParams, NvU32 size); // super +NvHandle __nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle(struct ChannelDescendant *pGpuResource); // super +NvBool __nvoc_up_thunk_RmResource_chandesAccessCallback(struct ChannelDescendant *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemInterMapParams(struct ChannelDescendant *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor(struct ChannelDescendant *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControl_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControl_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesCanCopy(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesIsDuplicate(struct ChannelDescendant *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_chandesPreDestruct(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesControlFilter(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesMapTo(struct ChannelDescendant *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesUnmapFrom(struct ChannelDescendant *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_chandesGetRefCount(struct ChannelDescendant *pResource); // super +void __nvoc_up_thunk_RsResource_chandesAddAdditionalDependants(struct RsClient *pClient, struct ChannelDescendant *pResource, RsResourceRef *pReference); // super +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_chandesGetNotificationListPtr(struct ChannelDescendant *pNotifier); // super +struct NotifShare * __nvoc_up_thunk_Notifier_chandesGetNotificationShare(struct ChannelDescendant *pNotifier); // super +void __nvoc_up_thunk_Notifier_chandesSetNotificationShare(struct ChannelDescendant *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesUnregisterEvent(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_up_thunk_ChannelDescendant_nvdecctxGetSwMethods(struct NvdecContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods); // this +NvBool __nvoc_up_thunk_ChannelDescendant_nvdecctxIsSwMethodStalling(struct NvdecContext *pChannelDescendant, NvU32 hHandle); // this +NV_STATUS __nvoc_up_thunk_ChannelDescendant_nvdecctxCheckMemInterUnmap(struct NvdecContext *pChannelDescendant, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxControl(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxMap(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxUnmap(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_nvdecctxShareCallback(struct NvdecContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxGetRegBaseOffsetAndSize(struct NvdecContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxGetMapAddrSpace(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxInternalControlForward(struct NvdecContext *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_nvdecctxGetInternalObjectHandle(struct NvdecContext *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_nvdecctxAccessCallback(struct NvdecContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_nvdecctxGetMemInterMapParams(struct NvdecContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_nvdecctxGetMemoryMappingDescriptor(struct NvdecContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_nvdecctxControlSerialization_Prologue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_nvdecctxControlSerialization_Epilogue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_nvdecctxControl_Prologue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_nvdecctxControl_Epilogue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_nvdecctxCanCopy(struct NvdecContext *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_nvdecctxIsDuplicate(struct NvdecContext *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_nvdecctxPreDestruct(struct NvdecContext *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_nvdecctxControlFilter(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_nvdecctxIsPartialUnmapSupported(struct NvdecContext *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_nvdecctxMapTo(struct NvdecContext *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_nvdecctxUnmapFrom(struct NvdecContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_nvdecctxGetRefCount(struct NvdecContext *pResource); // this +void __nvoc_up_thunk_RsResource_nvdecctxAddAdditionalDependants(struct RsClient *pClient, struct NvdecContext *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_nvdecctxGetNotificationListPtr(struct NvdecContext *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_nvdecctxGetNotificationShare(struct NvdecContext *pNotifier); // this +void __nvoc_up_thunk_Notifier_nvdecctxSetNotificationShare(struct NvdecContext *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_nvdecctxUnregisterEvent(struct NvdecContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_nvdecctxGetOrAllocNotifShare(struct NvdecContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 32 up-thunk(s) defined to bridge methods in NvdecContext to superclasses // nvdecctxGetSwMethods: virtual inherited (chandes) base (chandes) -static NV_STATUS __nvoc_up_thunk_ChannelDescendant_nvdecctxGetSwMethods(struct NvdecContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { +NV_STATUS __nvoc_up_thunk_ChannelDescendant_nvdecctxGetSwMethods(struct NvdecContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { return chandesGetSwMethods((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_NvdecContext_ChannelDescendant.offset), ppMethods, pNumMethods); } // nvdecctxIsSwMethodStalling: virtual inherited (chandes) base (chandes) -static NvBool __nvoc_up_thunk_ChannelDescendant_nvdecctxIsSwMethodStalling(struct NvdecContext *pChannelDescendant, NvU32 hHandle) { +NvBool __nvoc_up_thunk_ChannelDescendant_nvdecctxIsSwMethodStalling(struct NvdecContext *pChannelDescendant, NvU32 hHandle) { return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_NvdecContext_ChannelDescendant.offset), hHandle); } // nvdecctxCheckMemInterUnmap: virtual inherited (chandes) base (chandes) -static NV_STATUS __nvoc_up_thunk_ChannelDescendant_nvdecctxCheckMemInterUnmap(struct NvdecContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_ChannelDescendant_nvdecctxCheckMemInterUnmap(struct NvdecContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_NvdecContext_ChannelDescendant.offset), bSubdeviceHandleProvided); } // nvdecctxControl: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxControl(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxControl(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pCallContext, pParams); } // nvdecctxMap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxMap(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxMap(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // nvdecctxUnmap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxUnmap(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxUnmap(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pCallContext, pCpuMapping); } // nvdecctxShareCallback: virtual inherited (gpures) base (chandes) -static NvBool __nvoc_up_thunk_GpuResource_nvdecctxShareCallback(struct NvdecContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_nvdecctxShareCallback(struct NvdecContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // nvdecctxGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxGetRegBaseOffsetAndSize(struct NvdecContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxGetRegBaseOffsetAndSize(struct NvdecContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pGpu, pOffset, pSize); } // nvdecctxGetMapAddrSpace: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxGetMapAddrSpace(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxGetMapAddrSpace(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // nvdecctxInternalControlForward: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxInternalControlForward(struct NvdecContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvdecctxInternalControlForward(struct NvdecContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), command, pParams, size); } // nvdecctxGetInternalObjectHandle: virtual inherited (gpures) base (chandes) -static NvHandle __nvoc_up_thunk_GpuResource_nvdecctxGetInternalObjectHandle(struct NvdecContext *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_nvdecctxGetInternalObjectHandle(struct NvdecContext *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset)); } // nvdecctxAccessCallback: virtual inherited (rmres) base (chandes) -static NvBool __nvoc_up_thunk_RmResource_nvdecctxAccessCallback(struct NvdecContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_nvdecctxAccessCallback(struct NvdecContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // nvdecctxGetMemInterMapParams: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_nvdecctxGetMemInterMapParams(struct NvdecContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_nvdecctxGetMemInterMapParams(struct NvdecContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pParams); } // nvdecctxGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_nvdecctxGetMemoryMappingDescriptor(struct NvdecContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_nvdecctxGetMemoryMappingDescriptor(struct NvdecContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvdecContext_RmResource.offset), ppMemDesc); } // nvdecctxControlSerialization_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_nvdecctxControlSerialization_Prologue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_nvdecctxControlSerialization_Prologue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pCallContext, pParams); } // nvdecctxControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_nvdecctxControlSerialization_Epilogue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_nvdecctxControlSerialization_Epilogue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pCallContext, pParams); } // nvdecctxControl_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_nvdecctxControl_Prologue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_nvdecctxControl_Prologue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pCallContext, pParams); } // nvdecctxControl_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_nvdecctxControl_Epilogue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_nvdecctxControl_Epilogue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pCallContext, pParams); } // nvdecctxCanCopy: virtual inherited (res) base (chandes) -static NvBool __nvoc_up_thunk_RsResource_nvdecctxCanCopy(struct NvdecContext *pResource) { +NvBool __nvoc_up_thunk_RsResource_nvdecctxCanCopy(struct NvdecContext *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RsResource.offset)); } // nvdecctxIsDuplicate: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_nvdecctxIsDuplicate(struct NvdecContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_nvdecctxIsDuplicate(struct NvdecContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RsResource.offset), hMemory, pDuplicate); } // nvdecctxPreDestruct: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_nvdecctxPreDestruct(struct NvdecContext *pResource) { +void __nvoc_up_thunk_RsResource_nvdecctxPreDestruct(struct NvdecContext *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RsResource.offset)); } // nvdecctxControlFilter: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_nvdecctxControlFilter(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_nvdecctxControlFilter(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RsResource.offset), pCallContext, pParams); } // nvdecctxIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body -static NvBool __nvoc_up_thunk_RsResource_nvdecctxIsPartialUnmapSupported(struct NvdecContext *pResource) { +NvBool __nvoc_up_thunk_RsResource_nvdecctxIsPartialUnmapSupported(struct NvdecContext *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RsResource.offset)); } // nvdecctxMapTo: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_nvdecctxMapTo(struct NvdecContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_nvdecctxMapTo(struct NvdecContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RsResource.offset), pParams); } // nvdecctxUnmapFrom: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_nvdecctxUnmapFrom(struct NvdecContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_nvdecctxUnmapFrom(struct NvdecContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RsResource.offset), pParams); } // nvdecctxGetRefCount: virtual inherited (res) base (chandes) -static NvU32 __nvoc_up_thunk_RsResource_nvdecctxGetRefCount(struct NvdecContext *pResource) { +NvU32 __nvoc_up_thunk_RsResource_nvdecctxGetRefCount(struct NvdecContext *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RsResource.offset)); } // nvdecctxAddAdditionalDependants: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_nvdecctxAddAdditionalDependants(struct RsClient *pClient, struct NvdecContext *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_nvdecctxAddAdditionalDependants(struct RsClient *pClient, struct NvdecContext *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvdecContext_RsResource.offset), pReference); } // nvdecctxGetNotificationListPtr: virtual inherited (notify) base (chandes) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_nvdecctxGetNotificationListPtr(struct NvdecContext *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_nvdecctxGetNotificationListPtr(struct NvdecContext *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvdecContext_Notifier.offset)); } // nvdecctxGetNotificationShare: virtual inherited (notify) base (chandes) -static struct NotifShare * __nvoc_up_thunk_Notifier_nvdecctxGetNotificationShare(struct NvdecContext *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_nvdecctxGetNotificationShare(struct NvdecContext *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvdecContext_Notifier.offset)); } // nvdecctxSetNotificationShare: virtual inherited (notify) base (chandes) -static void __nvoc_up_thunk_Notifier_nvdecctxSetNotificationShare(struct NvdecContext *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_nvdecctxSetNotificationShare(struct NvdecContext *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvdecContext_Notifier.offset), pNotifShare); } // nvdecctxUnregisterEvent: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_nvdecctxUnregisterEvent(struct NvdecContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_nvdecctxUnregisterEvent(struct NvdecContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvdecContext_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // nvdecctxGetOrAllocNotifShare: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_nvdecctxGetOrAllocNotifShare(struct NvdecContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_nvdecctxGetOrAllocNotifShare(struct NvdecContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvdecContext_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -332,109 +442,162 @@ static void __nvoc_init_funcTable_NvdecContext_1(NvdecContext *pThis, RmHalspecO PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - - // nvdecctxGetSwMethods -- virtual inherited (chandes) base (chandes) - pThis->__nvdecctxGetSwMethods__ = &__nvoc_up_thunk_ChannelDescendant_nvdecctxGetSwMethods; - - // nvdecctxIsSwMethodStalling -- virtual inherited (chandes) base (chandes) - pThis->__nvdecctxIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_nvdecctxIsSwMethodStalling; - - // nvdecctxCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) - pThis->__nvdecctxCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_nvdecctxCheckMemInterUnmap; - - // nvdecctxControl -- virtual inherited (gpures) base (chandes) - pThis->__nvdecctxControl__ = &__nvoc_up_thunk_GpuResource_nvdecctxControl; - - // nvdecctxMap -- virtual inherited (gpures) base (chandes) - pThis->__nvdecctxMap__ = &__nvoc_up_thunk_GpuResource_nvdecctxMap; - - // nvdecctxUnmap -- virtual inherited (gpures) base (chandes) - pThis->__nvdecctxUnmap__ = &__nvoc_up_thunk_GpuResource_nvdecctxUnmap; - - // nvdecctxShareCallback -- virtual inherited (gpures) base (chandes) - pThis->__nvdecctxShareCallback__ = &__nvoc_up_thunk_GpuResource_nvdecctxShareCallback; - - // nvdecctxGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) - pThis->__nvdecctxGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_nvdecctxGetRegBaseOffsetAndSize; - - // nvdecctxGetMapAddrSpace -- virtual inherited (gpures) base (chandes) - pThis->__nvdecctxGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_nvdecctxGetMapAddrSpace; - - // nvdecctxInternalControlForward -- virtual inherited (gpures) base (chandes) - pThis->__nvdecctxInternalControlForward__ = &__nvoc_up_thunk_GpuResource_nvdecctxInternalControlForward; - - // nvdecctxGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) - pThis->__nvdecctxGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_nvdecctxGetInternalObjectHandle; - - // nvdecctxAccessCallback -- virtual inherited (rmres) base (chandes) - pThis->__nvdecctxAccessCallback__ = &__nvoc_up_thunk_RmResource_nvdecctxAccessCallback; - - // nvdecctxGetMemInterMapParams -- virtual inherited (rmres) base (chandes) - pThis->__nvdecctxGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_nvdecctxGetMemInterMapParams; - - // nvdecctxGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) - pThis->__nvdecctxGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_nvdecctxGetMemoryMappingDescriptor; - - // nvdecctxControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__nvdecctxControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_nvdecctxControlSerialization_Prologue; - - // nvdecctxControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__nvdecctxControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_nvdecctxControlSerialization_Epilogue; - - // nvdecctxControl_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__nvdecctxControl_Prologue__ = &__nvoc_up_thunk_RmResource_nvdecctxControl_Prologue; - - // nvdecctxControl_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__nvdecctxControl_Epilogue__ = &__nvoc_up_thunk_RmResource_nvdecctxControl_Epilogue; - - // nvdecctxCanCopy -- virtual inherited (res) base (chandes) - pThis->__nvdecctxCanCopy__ = &__nvoc_up_thunk_RsResource_nvdecctxCanCopy; - - // nvdecctxIsDuplicate -- virtual inherited (res) base (chandes) - pThis->__nvdecctxIsDuplicate__ = &__nvoc_up_thunk_RsResource_nvdecctxIsDuplicate; - - // nvdecctxPreDestruct -- virtual inherited (res) base (chandes) - pThis->__nvdecctxPreDestruct__ = &__nvoc_up_thunk_RsResource_nvdecctxPreDestruct; - - // nvdecctxControlFilter -- virtual inherited (res) base (chandes) - pThis->__nvdecctxControlFilter__ = &__nvoc_up_thunk_RsResource_nvdecctxControlFilter; - - // nvdecctxIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body - pThis->__nvdecctxIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_nvdecctxIsPartialUnmapSupported; - - // nvdecctxMapTo -- virtual inherited (res) base (chandes) - pThis->__nvdecctxMapTo__ = &__nvoc_up_thunk_RsResource_nvdecctxMapTo; - - // nvdecctxUnmapFrom -- virtual inherited (res) base (chandes) - pThis->__nvdecctxUnmapFrom__ = &__nvoc_up_thunk_RsResource_nvdecctxUnmapFrom; - - // nvdecctxGetRefCount -- virtual inherited (res) base (chandes) - pThis->__nvdecctxGetRefCount__ = &__nvoc_up_thunk_RsResource_nvdecctxGetRefCount; - - // nvdecctxAddAdditionalDependants -- virtual inherited (res) base (chandes) - pThis->__nvdecctxAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_nvdecctxAddAdditionalDependants; - - // nvdecctxGetNotificationListPtr -- virtual inherited (notify) base (chandes) - pThis->__nvdecctxGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_nvdecctxGetNotificationListPtr; - - // nvdecctxGetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__nvdecctxGetNotificationShare__ = &__nvoc_up_thunk_Notifier_nvdecctxGetNotificationShare; - - // nvdecctxSetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__nvdecctxSetNotificationShare__ = &__nvoc_up_thunk_Notifier_nvdecctxSetNotificationShare; - - // nvdecctxUnregisterEvent -- virtual inherited (notify) base (chandes) - pThis->__nvdecctxUnregisterEvent__ = &__nvoc_up_thunk_Notifier_nvdecctxUnregisterEvent; - - // nvdecctxGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) - pThis->__nvdecctxGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_nvdecctxGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_NvdecContext_1 with approximately 32 basic block(s). +} // End __nvoc_init_funcTable_NvdecContext_1 // Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_NvdecContext(NvdecContext *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 32 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__NvdecContext vtable = { + .__nvdecctxGetSwMethods__ = &__nvoc_up_thunk_ChannelDescendant_nvdecctxGetSwMethods, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesGetSwMethods__ = &chandesGetSwMethods_IMPL, // virtual + .__nvdecctxIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_nvdecctxIsSwMethodStalling, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesIsSwMethodStalling__ = &chandesIsSwMethodStalling_IMPL, // virtual + .__nvdecctxCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_nvdecctxCheckMemInterUnmap, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesCheckMemInterUnmap__ = &chandesCheckMemInterUnmap_IMPL, // virtual override (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap, // virtual + .__nvdecctxControl__ = &__nvoc_up_thunk_GpuResource_nvdecctxControl, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesControl__ = &__nvoc_up_thunk_GpuResource_chandesControl, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__nvdecctxMap__ = &__nvoc_up_thunk_GpuResource_nvdecctxMap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesMap__ = &__nvoc_up_thunk_GpuResource_chandesMap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__nvdecctxUnmap__ = &__nvoc_up_thunk_GpuResource_nvdecctxUnmap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesUnmap__ = &__nvoc_up_thunk_GpuResource_chandesUnmap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__nvdecctxShareCallback__ = &__nvoc_up_thunk_GpuResource_nvdecctxShareCallback, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesShareCallback__ = &__nvoc_up_thunk_GpuResource_chandesShareCallback, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__nvdecctxGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_nvdecctxGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__nvdecctxGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_nvdecctxGetMapAddrSpace, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__nvdecctxInternalControlForward__ = &__nvoc_up_thunk_GpuResource_nvdecctxInternalControlForward, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesInternalControlForward__ = &__nvoc_up_thunk_GpuResource_chandesInternalControlForward, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__nvdecctxGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_nvdecctxGetInternalObjectHandle, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__nvdecctxAccessCallback__ = &__nvoc_up_thunk_RmResource_nvdecctxAccessCallback, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesAccessCallback__ = &__nvoc_up_thunk_RmResource_chandesAccessCallback, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__nvdecctxGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_nvdecctxGetMemInterMapParams, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_chandesGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__nvdecctxGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_nvdecctxGetMemoryMappingDescriptor, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__nvdecctxControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_nvdecctxControlSerialization_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__nvdecctxControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_nvdecctxControlSerialization_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__nvdecctxControl_Prologue__ = &__nvoc_up_thunk_RmResource_nvdecctxControl_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControl_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__nvdecctxControl_Epilogue__ = &__nvoc_up_thunk_RmResource_nvdecctxControl_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControl_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__nvdecctxCanCopy__ = &__nvoc_up_thunk_RsResource_nvdecctxCanCopy, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesCanCopy__ = &__nvoc_up_thunk_RsResource_chandesCanCopy, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__nvdecctxIsDuplicate__ = &__nvoc_up_thunk_RsResource_nvdecctxIsDuplicate, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesIsDuplicate__ = &__nvoc_up_thunk_RsResource_chandesIsDuplicate, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__nvdecctxPreDestruct__ = &__nvoc_up_thunk_RsResource_nvdecctxPreDestruct, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesPreDestruct__ = &__nvoc_up_thunk_RsResource_chandesPreDestruct, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__nvdecctxControlFilter__ = &__nvoc_up_thunk_RsResource_nvdecctxControlFilter, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesControlFilter__ = &__nvoc_up_thunk_RsResource_chandesControlFilter, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__nvdecctxIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_nvdecctxIsPartialUnmapSupported, // inline virtual inherited (res) base (chandes) body + .ChannelDescendant.__chandesIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .ChannelDescendant.GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .ChannelDescendant.GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__nvdecctxMapTo__ = &__nvoc_up_thunk_RsResource_nvdecctxMapTo, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesMapTo__ = &__nvoc_up_thunk_RsResource_chandesMapTo, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__nvdecctxUnmapFrom__ = &__nvoc_up_thunk_RsResource_nvdecctxUnmapFrom, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesUnmapFrom__ = &__nvoc_up_thunk_RsResource_chandesUnmapFrom, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__nvdecctxGetRefCount__ = &__nvoc_up_thunk_RsResource_nvdecctxGetRefCount, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesGetRefCount__ = &__nvoc_up_thunk_RsResource_chandesGetRefCount, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__nvdecctxAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_nvdecctxAddAdditionalDependants, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_chandesAddAdditionalDependants, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__nvdecctxGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_nvdecctxGetNotificationListPtr, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationListPtr, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__nvdecctxGetNotificationShare__ = &__nvoc_up_thunk_Notifier_nvdecctxGetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__nvdecctxSetNotificationShare__ = &__nvoc_up_thunk_Notifier_nvdecctxSetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesSetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesSetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__nvdecctxUnregisterEvent__ = &__nvoc_up_thunk_Notifier_nvdecctxUnregisterEvent, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesUnregisterEvent__ = &__nvoc_up_thunk_Notifier_chandesUnregisterEvent, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__nvdecctxGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_nvdecctxGetOrAllocNotifShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource.RsResource; // (res) super^4 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource; // (rmres) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource; // (gpures) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier.INotifier; // (inotify) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier; // (notify) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_vtable = &vtable.ChannelDescendant; // (chandes) super + pThis->__nvoc_vtable = &vtable; // (nvdecctx) this __nvoc_init_funcTable_NvdecContext_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_nvdec_ctx_nvoc.h b/src/nvidia/generated/g_kernel_nvdec_ctx_nvoc.h index b3764fd63b..add13e58dc 100644 --- a/src/nvidia/generated/g_kernel_nvdec_ctx_nvoc.h +++ b/src/nvidia/generated/g_kernel_nvdec_ctx_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -60,10 +60,15 @@ ENGDESCRIPTOR nvdecGetEngineDescFromAllocParams(OBJGPU *pGpu, NvU32 externalClas #endif +// Metadata including vtable +struct NVOC_VTABLE__NvdecContext; + + struct NvdecContext { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__NvdecContext *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; @@ -78,8 +83,13 @@ struct NvdecContext { struct Notifier *__nvoc_pbase_Notifier; // notify super^2 struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super struct NvdecContext *__nvoc_pbase_NvdecContext; // nvdecctx +}; + + +// Metadata including vtable with 32 function pointers plus superclass metadata +struct NVOC_VTABLE__NvdecContext { + const struct NVOC_VTABLE__ChannelDescendant ChannelDescendant; // (chandes) 32 function pointers - // Vtable with 32 per-object function pointers NV_STATUS (*__nvdecctxGetSwMethods__)(struct NvdecContext * /*this*/, const METHOD **, NvU32 *); // virtual inherited (chandes) base (chandes) NvBool (*__nvdecctxIsSwMethodStalling__)(struct NvdecContext * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) NV_STATUS (*__nvdecctxCheckMemInterUnmap__)(struct NvdecContext * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) @@ -144,198 +154,198 @@ NV_STATUS __nvoc_objCreate_NvdecContext(NvdecContext**, Dynamic*, NvU32, struct // Wrapper macros -#define nvdecctxGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ +#define nvdecctxGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesGetSwMethods__ #define nvdecctxGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) nvdecctxGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) -#define nvdecctxIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ +#define nvdecctxIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesIsSwMethodStalling__ #define nvdecctxIsSwMethodStalling(pChannelDescendant, hHandle) nvdecctxIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define nvdecctxCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ +#define nvdecctxCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesCheckMemInterUnmap__ #define nvdecctxCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) nvdecctxCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) -#define nvdecctxControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define nvdecctxControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define nvdecctxControl(pGpuResource, pCallContext, pParams) nvdecctxControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define nvdecctxMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define nvdecctxMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define nvdecctxMap(pGpuResource, pCallContext, pParams, pCpuMapping) nvdecctxMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define nvdecctxUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define nvdecctxUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define nvdecctxUnmap(pGpuResource, pCallContext, pCpuMapping) nvdecctxUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define nvdecctxShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ +#define nvdecctxShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define nvdecctxShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) nvdecctxShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define nvdecctxGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define nvdecctxGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define nvdecctxGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) nvdecctxGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define nvdecctxGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define nvdecctxGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define nvdecctxGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) nvdecctxGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define nvdecctxInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define nvdecctxInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define nvdecctxInternalControlForward(pGpuResource, command, pParams, size) nvdecctxInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define nvdecctxGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define nvdecctxGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define nvdecctxGetInternalObjectHandle(pGpuResource) nvdecctxGetInternalObjectHandle_DISPATCH(pGpuResource) -#define nvdecctxAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define nvdecctxAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define nvdecctxAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) nvdecctxAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define nvdecctxGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define nvdecctxGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define nvdecctxGetMemInterMapParams(pRmResource, pParams) nvdecctxGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define nvdecctxGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define nvdecctxGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define nvdecctxGetMemoryMappingDescriptor(pRmResource, ppMemDesc) nvdecctxGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define nvdecctxControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define nvdecctxControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define nvdecctxControlSerialization_Prologue(pResource, pCallContext, pParams) nvdecctxControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define nvdecctxControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define nvdecctxControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define nvdecctxControlSerialization_Epilogue(pResource, pCallContext, pParams) nvdecctxControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define nvdecctxControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define nvdecctxControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define nvdecctxControl_Prologue(pResource, pCallContext, pParams) nvdecctxControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define nvdecctxControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define nvdecctxControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define nvdecctxControl_Epilogue(pResource, pCallContext, pParams) nvdecctxControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define nvdecctxCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define nvdecctxCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define nvdecctxCanCopy(pResource) nvdecctxCanCopy_DISPATCH(pResource) -#define nvdecctxIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define nvdecctxIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define nvdecctxIsDuplicate(pResource, hMemory, pDuplicate) nvdecctxIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define nvdecctxPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define nvdecctxPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define nvdecctxPreDestruct(pResource) nvdecctxPreDestruct_DISPATCH(pResource) -#define nvdecctxControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define nvdecctxControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define nvdecctxControlFilter(pResource, pCallContext, pParams) nvdecctxControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define nvdecctxIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define nvdecctxIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define nvdecctxIsPartialUnmapSupported(pResource) nvdecctxIsPartialUnmapSupported_DISPATCH(pResource) -#define nvdecctxMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define nvdecctxMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define nvdecctxMapTo(pResource, pParams) nvdecctxMapTo_DISPATCH(pResource, pParams) -#define nvdecctxUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define nvdecctxUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define nvdecctxUnmapFrom(pResource, pParams) nvdecctxUnmapFrom_DISPATCH(pResource, pParams) -#define nvdecctxGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define nvdecctxGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define nvdecctxGetRefCount(pResource) nvdecctxGetRefCount_DISPATCH(pResource) -#define nvdecctxAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define nvdecctxAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define nvdecctxAddAdditionalDependants(pClient, pResource, pReference) nvdecctxAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define nvdecctxGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define nvdecctxGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define nvdecctxGetNotificationListPtr(pNotifier) nvdecctxGetNotificationListPtr_DISPATCH(pNotifier) -#define nvdecctxGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define nvdecctxGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define nvdecctxGetNotificationShare(pNotifier) nvdecctxGetNotificationShare_DISPATCH(pNotifier) -#define nvdecctxSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define nvdecctxSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define nvdecctxSetNotificationShare(pNotifier, pNotifShare) nvdecctxSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define nvdecctxUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define nvdecctxUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define nvdecctxUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) nvdecctxUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define nvdecctxGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define nvdecctxGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define nvdecctxGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) nvdecctxGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS nvdecctxGetSwMethods_DISPATCH(struct NvdecContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { - return pChannelDescendant->__nvdecctxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); + return pChannelDescendant->__nvoc_vtable->__nvdecctxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); } static inline NvBool nvdecctxIsSwMethodStalling_DISPATCH(struct NvdecContext *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__nvdecctxIsSwMethodStalling__(pChannelDescendant, hHandle); + return pChannelDescendant->__nvoc_vtable->__nvdecctxIsSwMethodStalling__(pChannelDescendant, hHandle); } static inline NV_STATUS nvdecctxCheckMemInterUnmap_DISPATCH(struct NvdecContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return pChannelDescendant->__nvdecctxCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); + return pChannelDescendant->__nvoc_vtable->__nvdecctxCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } static inline NV_STATUS nvdecctxControl_DISPATCH(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__nvdecctxControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__nvdecctxControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS nvdecctxMap_DISPATCH(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__nvdecctxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__nvdecctxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS nvdecctxUnmap_DISPATCH(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__nvdecctxUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__nvdecctxUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool nvdecctxShareCallback_DISPATCH(struct NvdecContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__nvdecctxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__nvdecctxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS nvdecctxGetRegBaseOffsetAndSize_DISPATCH(struct NvdecContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__nvdecctxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__nvdecctxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS nvdecctxGetMapAddrSpace_DISPATCH(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__nvdecctxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__nvdecctxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS nvdecctxInternalControlForward_DISPATCH(struct NvdecContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__nvdecctxInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__nvdecctxInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle nvdecctxGetInternalObjectHandle_DISPATCH(struct NvdecContext *pGpuResource) { - return pGpuResource->__nvdecctxGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__nvdecctxGetInternalObjectHandle__(pGpuResource); } static inline NvBool nvdecctxAccessCallback_DISPATCH(struct NvdecContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__nvdecctxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__nvdecctxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS nvdecctxGetMemInterMapParams_DISPATCH(struct NvdecContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__nvdecctxGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__nvdecctxGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS nvdecctxGetMemoryMappingDescriptor_DISPATCH(struct NvdecContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__nvdecctxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__nvdecctxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS nvdecctxControlSerialization_Prologue_DISPATCH(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvdecctxControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__nvdecctxControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void nvdecctxControlSerialization_Epilogue_DISPATCH(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__nvdecctxControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__nvdecctxControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS nvdecctxControl_Prologue_DISPATCH(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvdecctxControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__nvdecctxControl_Prologue__(pResource, pCallContext, pParams); } static inline void nvdecctxControl_Epilogue_DISPATCH(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__nvdecctxControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__nvdecctxControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool nvdecctxCanCopy_DISPATCH(struct NvdecContext *pResource) { - return pResource->__nvdecctxCanCopy__(pResource); + return pResource->__nvoc_vtable->__nvdecctxCanCopy__(pResource); } static inline NV_STATUS nvdecctxIsDuplicate_DISPATCH(struct NvdecContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__nvdecctxIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__nvdecctxIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void nvdecctxPreDestruct_DISPATCH(struct NvdecContext *pResource) { - pResource->__nvdecctxPreDestruct__(pResource); + pResource->__nvoc_vtable->__nvdecctxPreDestruct__(pResource); } static inline NV_STATUS nvdecctxControlFilter_DISPATCH(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvdecctxControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__nvdecctxControlFilter__(pResource, pCallContext, pParams); } static inline NvBool nvdecctxIsPartialUnmapSupported_DISPATCH(struct NvdecContext *pResource) { - return pResource->__nvdecctxIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__nvdecctxIsPartialUnmapSupported__(pResource); } static inline NV_STATUS nvdecctxMapTo_DISPATCH(struct NvdecContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__nvdecctxMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__nvdecctxMapTo__(pResource, pParams); } static inline NV_STATUS nvdecctxUnmapFrom_DISPATCH(struct NvdecContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__nvdecctxUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__nvdecctxUnmapFrom__(pResource, pParams); } static inline NvU32 nvdecctxGetRefCount_DISPATCH(struct NvdecContext *pResource) { - return pResource->__nvdecctxGetRefCount__(pResource); + return pResource->__nvoc_vtable->__nvdecctxGetRefCount__(pResource); } static inline void nvdecctxAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct NvdecContext *pResource, RsResourceRef *pReference) { - pResource->__nvdecctxAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__nvdecctxAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * nvdecctxGetNotificationListPtr_DISPATCH(struct NvdecContext *pNotifier) { - return pNotifier->__nvdecctxGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__nvdecctxGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * nvdecctxGetNotificationShare_DISPATCH(struct NvdecContext *pNotifier) { - return pNotifier->__nvdecctxGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__nvdecctxGetNotificationShare__(pNotifier); } static inline void nvdecctxSetNotificationShare_DISPATCH(struct NvdecContext *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__nvdecctxSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__nvdecctxSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS nvdecctxUnregisterEvent_DISPATCH(struct NvdecContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__nvdecctxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__nvdecctxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS nvdecctxGetOrAllocNotifShare_DISPATCH(struct NvdecContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__nvdecctxGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__nvdecctxGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS nvdecctxConstructHal_KERNEL(struct NvdecContext *pNvdecContext, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); diff --git a/src/nvidia/generated/g_kernel_nvenc_ctx_nvoc.c b/src/nvidia/generated/g_kernel_nvenc_ctx_nvoc.c index f7df4b3825..8b5950ffac 100644 --- a/src/nvidia/generated/g_kernel_nvenc_ctx_nvoc.c +++ b/src/nvidia/generated/g_kernel_nvenc_ctx_nvoc.c @@ -120,165 +120,275 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_MsencContext = /*pExportInfo=*/ &__nvoc_export_info_MsencContext }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super^2 +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super^2 +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap(struct RmResource *pChannelDescendant, NvBool bSubdeviceHandleProvided); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^3 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^3 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^3 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super^2 +NV_STATUS __nvoc_up_thunk_GpuResource_chandesControl(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesMap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesUnmap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_GpuResource_chandesShareCallback(struct ChannelDescendant *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize(struct ChannelDescendant *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesInternalControlForward(struct ChannelDescendant *pGpuResource, NvU32 command, void *pParams, NvU32 size); // super +NvHandle __nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle(struct ChannelDescendant *pGpuResource); // super +NvBool __nvoc_up_thunk_RmResource_chandesAccessCallback(struct ChannelDescendant *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemInterMapParams(struct ChannelDescendant *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor(struct ChannelDescendant *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControl_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControl_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesCanCopy(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesIsDuplicate(struct ChannelDescendant *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_chandesPreDestruct(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesControlFilter(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesMapTo(struct ChannelDescendant *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesUnmapFrom(struct ChannelDescendant *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_chandesGetRefCount(struct ChannelDescendant *pResource); // super +void __nvoc_up_thunk_RsResource_chandesAddAdditionalDependants(struct RsClient *pClient, struct ChannelDescendant *pResource, RsResourceRef *pReference); // super +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_chandesGetNotificationListPtr(struct ChannelDescendant *pNotifier); // super +struct NotifShare * __nvoc_up_thunk_Notifier_chandesGetNotificationShare(struct ChannelDescendant *pNotifier); // super +void __nvoc_up_thunk_Notifier_chandesSetNotificationShare(struct ChannelDescendant *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesUnregisterEvent(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_up_thunk_ChannelDescendant_msencctxGetSwMethods(struct MsencContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods); // this +NvBool __nvoc_up_thunk_ChannelDescendant_msencctxIsSwMethodStalling(struct MsencContext *pChannelDescendant, NvU32 hHandle); // this +NV_STATUS __nvoc_up_thunk_ChannelDescendant_msencctxCheckMemInterUnmap(struct MsencContext *pChannelDescendant, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_GpuResource_msencctxControl(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_msencctxMap(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_msencctxUnmap(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_msencctxShareCallback(struct MsencContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_msencctxGetRegBaseOffsetAndSize(struct MsencContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_msencctxGetMapAddrSpace(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_msencctxInternalControlForward(struct MsencContext *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_msencctxGetInternalObjectHandle(struct MsencContext *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_msencctxAccessCallback(struct MsencContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_msencctxGetMemInterMapParams(struct MsencContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_msencctxGetMemoryMappingDescriptor(struct MsencContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_msencctxControlSerialization_Prologue(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_msencctxControlSerialization_Epilogue(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_msencctxControl_Prologue(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_msencctxControl_Epilogue(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_msencctxCanCopy(struct MsencContext *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_msencctxIsDuplicate(struct MsencContext *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_msencctxPreDestruct(struct MsencContext *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_msencctxControlFilter(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_msencctxIsPartialUnmapSupported(struct MsencContext *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_msencctxMapTo(struct MsencContext *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_msencctxUnmapFrom(struct MsencContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_msencctxGetRefCount(struct MsencContext *pResource); // this +void __nvoc_up_thunk_RsResource_msencctxAddAdditionalDependants(struct RsClient *pClient, struct MsencContext *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_msencctxGetNotificationListPtr(struct MsencContext *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_msencctxGetNotificationShare(struct MsencContext *pNotifier); // this +void __nvoc_up_thunk_Notifier_msencctxSetNotificationShare(struct MsencContext *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_msencctxUnregisterEvent(struct MsencContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_msencctxGetOrAllocNotifShare(struct MsencContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 32 up-thunk(s) defined to bridge methods in MsencContext to superclasses // msencctxGetSwMethods: virtual inherited (chandes) base (chandes) -static NV_STATUS __nvoc_up_thunk_ChannelDescendant_msencctxGetSwMethods(struct MsencContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { +NV_STATUS __nvoc_up_thunk_ChannelDescendant_msencctxGetSwMethods(struct MsencContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { return chandesGetSwMethods((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_MsencContext_ChannelDescendant.offset), ppMethods, pNumMethods); } // msencctxIsSwMethodStalling: virtual inherited (chandes) base (chandes) -static NvBool __nvoc_up_thunk_ChannelDescendant_msencctxIsSwMethodStalling(struct MsencContext *pChannelDescendant, NvU32 hHandle) { +NvBool __nvoc_up_thunk_ChannelDescendant_msencctxIsSwMethodStalling(struct MsencContext *pChannelDescendant, NvU32 hHandle) { return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_MsencContext_ChannelDescendant.offset), hHandle); } // msencctxCheckMemInterUnmap: virtual inherited (chandes) base (chandes) -static NV_STATUS __nvoc_up_thunk_ChannelDescendant_msencctxCheckMemInterUnmap(struct MsencContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_ChannelDescendant_msencctxCheckMemInterUnmap(struct MsencContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_MsencContext_ChannelDescendant.offset), bSubdeviceHandleProvided); } // msencctxControl: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_msencctxControl(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_msencctxControl(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset), pCallContext, pParams); } // msencctxMap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_msencctxMap(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_msencctxMap(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // msencctxUnmap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_msencctxUnmap(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_msencctxUnmap(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset), pCallContext, pCpuMapping); } // msencctxShareCallback: virtual inherited (gpures) base (chandes) -static NvBool __nvoc_up_thunk_GpuResource_msencctxShareCallback(struct MsencContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_msencctxShareCallback(struct MsencContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // msencctxGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_msencctxGetRegBaseOffsetAndSize(struct MsencContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_msencctxGetRegBaseOffsetAndSize(struct MsencContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset), pGpu, pOffset, pSize); } // msencctxGetMapAddrSpace: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_msencctxGetMapAddrSpace(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_msencctxGetMapAddrSpace(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // msencctxInternalControlForward: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_msencctxInternalControlForward(struct MsencContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_msencctxInternalControlForward(struct MsencContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset), command, pParams, size); } // msencctxGetInternalObjectHandle: virtual inherited (gpures) base (chandes) -static NvHandle __nvoc_up_thunk_GpuResource_msencctxGetInternalObjectHandle(struct MsencContext *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_msencctxGetInternalObjectHandle(struct MsencContext *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MsencContext_GpuResource.offset)); } // msencctxAccessCallback: virtual inherited (rmres) base (chandes) -static NvBool __nvoc_up_thunk_RmResource_msencctxAccessCallback(struct MsencContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_msencctxAccessCallback(struct MsencContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // msencctxGetMemInterMapParams: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_msencctxGetMemInterMapParams(struct MsencContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_msencctxGetMemInterMapParams(struct MsencContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MsencContext_RmResource.offset), pParams); } // msencctxGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_msencctxGetMemoryMappingDescriptor(struct MsencContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_msencctxGetMemoryMappingDescriptor(struct MsencContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MsencContext_RmResource.offset), ppMemDesc); } // msencctxControlSerialization_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_msencctxControlSerialization_Prologue(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_msencctxControlSerialization_Prologue(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RmResource.offset), pCallContext, pParams); } // msencctxControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_msencctxControlSerialization_Epilogue(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_msencctxControlSerialization_Epilogue(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RmResource.offset), pCallContext, pParams); } // msencctxControl_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_msencctxControl_Prologue(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_msencctxControl_Prologue(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RmResource.offset), pCallContext, pParams); } // msencctxControl_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_msencctxControl_Epilogue(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_msencctxControl_Epilogue(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RmResource.offset), pCallContext, pParams); } // msencctxCanCopy: virtual inherited (res) base (chandes) -static NvBool __nvoc_up_thunk_RsResource_msencctxCanCopy(struct MsencContext *pResource) { +NvBool __nvoc_up_thunk_RsResource_msencctxCanCopy(struct MsencContext *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RsResource.offset)); } // msencctxIsDuplicate: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_msencctxIsDuplicate(struct MsencContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_msencctxIsDuplicate(struct MsencContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RsResource.offset), hMemory, pDuplicate); } // msencctxPreDestruct: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_msencctxPreDestruct(struct MsencContext *pResource) { +void __nvoc_up_thunk_RsResource_msencctxPreDestruct(struct MsencContext *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RsResource.offset)); } // msencctxControlFilter: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_msencctxControlFilter(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_msencctxControlFilter(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RsResource.offset), pCallContext, pParams); } // msencctxIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body -static NvBool __nvoc_up_thunk_RsResource_msencctxIsPartialUnmapSupported(struct MsencContext *pResource) { +NvBool __nvoc_up_thunk_RsResource_msencctxIsPartialUnmapSupported(struct MsencContext *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RsResource.offset)); } // msencctxMapTo: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_msencctxMapTo(struct MsencContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_msencctxMapTo(struct MsencContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RsResource.offset), pParams); } // msencctxUnmapFrom: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_msencctxUnmapFrom(struct MsencContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_msencctxUnmapFrom(struct MsencContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RsResource.offset), pParams); } // msencctxGetRefCount: virtual inherited (res) base (chandes) -static NvU32 __nvoc_up_thunk_RsResource_msencctxGetRefCount(struct MsencContext *pResource) { +NvU32 __nvoc_up_thunk_RsResource_msencctxGetRefCount(struct MsencContext *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RsResource.offset)); } // msencctxAddAdditionalDependants: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_msencctxAddAdditionalDependants(struct RsClient *pClient, struct MsencContext *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_msencctxAddAdditionalDependants(struct RsClient *pClient, struct MsencContext *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MsencContext_RsResource.offset), pReference); } // msencctxGetNotificationListPtr: virtual inherited (notify) base (chandes) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_msencctxGetNotificationListPtr(struct MsencContext *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_msencctxGetNotificationListPtr(struct MsencContext *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_MsencContext_Notifier.offset)); } // msencctxGetNotificationShare: virtual inherited (notify) base (chandes) -static struct NotifShare * __nvoc_up_thunk_Notifier_msencctxGetNotificationShare(struct MsencContext *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_msencctxGetNotificationShare(struct MsencContext *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_MsencContext_Notifier.offset)); } // msencctxSetNotificationShare: virtual inherited (notify) base (chandes) -static void __nvoc_up_thunk_Notifier_msencctxSetNotificationShare(struct MsencContext *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_msencctxSetNotificationShare(struct MsencContext *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_MsencContext_Notifier.offset), pNotifShare); } // msencctxUnregisterEvent: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_msencctxUnregisterEvent(struct MsencContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_msencctxUnregisterEvent(struct MsencContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_MsencContext_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // msencctxGetOrAllocNotifShare: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_msencctxGetOrAllocNotifShare(struct MsencContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_msencctxGetOrAllocNotifShare(struct MsencContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_MsencContext_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -332,109 +442,162 @@ static void __nvoc_init_funcTable_MsencContext_1(MsencContext *pThis, RmHalspecO PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - - // msencctxGetSwMethods -- virtual inherited (chandes) base (chandes) - pThis->__msencctxGetSwMethods__ = &__nvoc_up_thunk_ChannelDescendant_msencctxGetSwMethods; - - // msencctxIsSwMethodStalling -- virtual inherited (chandes) base (chandes) - pThis->__msencctxIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_msencctxIsSwMethodStalling; - - // msencctxCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) - pThis->__msencctxCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_msencctxCheckMemInterUnmap; - - // msencctxControl -- virtual inherited (gpures) base (chandes) - pThis->__msencctxControl__ = &__nvoc_up_thunk_GpuResource_msencctxControl; - - // msencctxMap -- virtual inherited (gpures) base (chandes) - pThis->__msencctxMap__ = &__nvoc_up_thunk_GpuResource_msencctxMap; - - // msencctxUnmap -- virtual inherited (gpures) base (chandes) - pThis->__msencctxUnmap__ = &__nvoc_up_thunk_GpuResource_msencctxUnmap; - - // msencctxShareCallback -- virtual inherited (gpures) base (chandes) - pThis->__msencctxShareCallback__ = &__nvoc_up_thunk_GpuResource_msencctxShareCallback; - - // msencctxGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) - pThis->__msencctxGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_msencctxGetRegBaseOffsetAndSize; - - // msencctxGetMapAddrSpace -- virtual inherited (gpures) base (chandes) - pThis->__msencctxGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_msencctxGetMapAddrSpace; - - // msencctxInternalControlForward -- virtual inherited (gpures) base (chandes) - pThis->__msencctxInternalControlForward__ = &__nvoc_up_thunk_GpuResource_msencctxInternalControlForward; - - // msencctxGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) - pThis->__msencctxGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_msencctxGetInternalObjectHandle; - - // msencctxAccessCallback -- virtual inherited (rmres) base (chandes) - pThis->__msencctxAccessCallback__ = &__nvoc_up_thunk_RmResource_msencctxAccessCallback; - - // msencctxGetMemInterMapParams -- virtual inherited (rmres) base (chandes) - pThis->__msencctxGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_msencctxGetMemInterMapParams; - - // msencctxGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) - pThis->__msencctxGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_msencctxGetMemoryMappingDescriptor; - - // msencctxControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__msencctxControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_msencctxControlSerialization_Prologue; - - // msencctxControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__msencctxControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_msencctxControlSerialization_Epilogue; - - // msencctxControl_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__msencctxControl_Prologue__ = &__nvoc_up_thunk_RmResource_msencctxControl_Prologue; - - // msencctxControl_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__msencctxControl_Epilogue__ = &__nvoc_up_thunk_RmResource_msencctxControl_Epilogue; - - // msencctxCanCopy -- virtual inherited (res) base (chandes) - pThis->__msencctxCanCopy__ = &__nvoc_up_thunk_RsResource_msencctxCanCopy; - - // msencctxIsDuplicate -- virtual inherited (res) base (chandes) - pThis->__msencctxIsDuplicate__ = &__nvoc_up_thunk_RsResource_msencctxIsDuplicate; - - // msencctxPreDestruct -- virtual inherited (res) base (chandes) - pThis->__msencctxPreDestruct__ = &__nvoc_up_thunk_RsResource_msencctxPreDestruct; - - // msencctxControlFilter -- virtual inherited (res) base (chandes) - pThis->__msencctxControlFilter__ = &__nvoc_up_thunk_RsResource_msencctxControlFilter; - - // msencctxIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body - pThis->__msencctxIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_msencctxIsPartialUnmapSupported; - - // msencctxMapTo -- virtual inherited (res) base (chandes) - pThis->__msencctxMapTo__ = &__nvoc_up_thunk_RsResource_msencctxMapTo; - - // msencctxUnmapFrom -- virtual inherited (res) base (chandes) - pThis->__msencctxUnmapFrom__ = &__nvoc_up_thunk_RsResource_msencctxUnmapFrom; - - // msencctxGetRefCount -- virtual inherited (res) base (chandes) - pThis->__msencctxGetRefCount__ = &__nvoc_up_thunk_RsResource_msencctxGetRefCount; - - // msencctxAddAdditionalDependants -- virtual inherited (res) base (chandes) - pThis->__msencctxAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_msencctxAddAdditionalDependants; - - // msencctxGetNotificationListPtr -- virtual inherited (notify) base (chandes) - pThis->__msencctxGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_msencctxGetNotificationListPtr; - - // msencctxGetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__msencctxGetNotificationShare__ = &__nvoc_up_thunk_Notifier_msencctxGetNotificationShare; - - // msencctxSetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__msencctxSetNotificationShare__ = &__nvoc_up_thunk_Notifier_msencctxSetNotificationShare; - - // msencctxUnregisterEvent -- virtual inherited (notify) base (chandes) - pThis->__msencctxUnregisterEvent__ = &__nvoc_up_thunk_Notifier_msencctxUnregisterEvent; - - // msencctxGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) - pThis->__msencctxGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_msencctxGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_MsencContext_1 with approximately 32 basic block(s). +} // End __nvoc_init_funcTable_MsencContext_1 // Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_MsencContext(MsencContext *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 32 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__MsencContext vtable = { + .__msencctxGetSwMethods__ = &__nvoc_up_thunk_ChannelDescendant_msencctxGetSwMethods, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesGetSwMethods__ = &chandesGetSwMethods_IMPL, // virtual + .__msencctxIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_msencctxIsSwMethodStalling, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesIsSwMethodStalling__ = &chandesIsSwMethodStalling_IMPL, // virtual + .__msencctxCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_msencctxCheckMemInterUnmap, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesCheckMemInterUnmap__ = &chandesCheckMemInterUnmap_IMPL, // virtual override (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap, // virtual + .__msencctxControl__ = &__nvoc_up_thunk_GpuResource_msencctxControl, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesControl__ = &__nvoc_up_thunk_GpuResource_chandesControl, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__msencctxMap__ = &__nvoc_up_thunk_GpuResource_msencctxMap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesMap__ = &__nvoc_up_thunk_GpuResource_chandesMap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__msencctxUnmap__ = &__nvoc_up_thunk_GpuResource_msencctxUnmap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesUnmap__ = &__nvoc_up_thunk_GpuResource_chandesUnmap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__msencctxShareCallback__ = &__nvoc_up_thunk_GpuResource_msencctxShareCallback, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesShareCallback__ = &__nvoc_up_thunk_GpuResource_chandesShareCallback, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__msencctxGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_msencctxGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__msencctxGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_msencctxGetMapAddrSpace, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__msencctxInternalControlForward__ = &__nvoc_up_thunk_GpuResource_msencctxInternalControlForward, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesInternalControlForward__ = &__nvoc_up_thunk_GpuResource_chandesInternalControlForward, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__msencctxGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_msencctxGetInternalObjectHandle, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__msencctxAccessCallback__ = &__nvoc_up_thunk_RmResource_msencctxAccessCallback, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesAccessCallback__ = &__nvoc_up_thunk_RmResource_chandesAccessCallback, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__msencctxGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_msencctxGetMemInterMapParams, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_chandesGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__msencctxGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_msencctxGetMemoryMappingDescriptor, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__msencctxControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_msencctxControlSerialization_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__msencctxControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_msencctxControlSerialization_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__msencctxControl_Prologue__ = &__nvoc_up_thunk_RmResource_msencctxControl_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControl_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__msencctxControl_Epilogue__ = &__nvoc_up_thunk_RmResource_msencctxControl_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControl_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__msencctxCanCopy__ = &__nvoc_up_thunk_RsResource_msencctxCanCopy, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesCanCopy__ = &__nvoc_up_thunk_RsResource_chandesCanCopy, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__msencctxIsDuplicate__ = &__nvoc_up_thunk_RsResource_msencctxIsDuplicate, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesIsDuplicate__ = &__nvoc_up_thunk_RsResource_chandesIsDuplicate, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__msencctxPreDestruct__ = &__nvoc_up_thunk_RsResource_msencctxPreDestruct, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesPreDestruct__ = &__nvoc_up_thunk_RsResource_chandesPreDestruct, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__msencctxControlFilter__ = &__nvoc_up_thunk_RsResource_msencctxControlFilter, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesControlFilter__ = &__nvoc_up_thunk_RsResource_chandesControlFilter, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__msencctxIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_msencctxIsPartialUnmapSupported, // inline virtual inherited (res) base (chandes) body + .ChannelDescendant.__chandesIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .ChannelDescendant.GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .ChannelDescendant.GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__msencctxMapTo__ = &__nvoc_up_thunk_RsResource_msencctxMapTo, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesMapTo__ = &__nvoc_up_thunk_RsResource_chandesMapTo, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__msencctxUnmapFrom__ = &__nvoc_up_thunk_RsResource_msencctxUnmapFrom, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesUnmapFrom__ = &__nvoc_up_thunk_RsResource_chandesUnmapFrom, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__msencctxGetRefCount__ = &__nvoc_up_thunk_RsResource_msencctxGetRefCount, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesGetRefCount__ = &__nvoc_up_thunk_RsResource_chandesGetRefCount, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__msencctxAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_msencctxAddAdditionalDependants, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_chandesAddAdditionalDependants, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__msencctxGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_msencctxGetNotificationListPtr, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationListPtr, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__msencctxGetNotificationShare__ = &__nvoc_up_thunk_Notifier_msencctxGetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__msencctxSetNotificationShare__ = &__nvoc_up_thunk_Notifier_msencctxSetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesSetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesSetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__msencctxUnregisterEvent__ = &__nvoc_up_thunk_Notifier_msencctxUnregisterEvent, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesUnregisterEvent__ = &__nvoc_up_thunk_Notifier_chandesUnregisterEvent, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__msencctxGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_msencctxGetOrAllocNotifShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource.RsResource; // (res) super^4 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource; // (rmres) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource; // (gpures) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier.INotifier; // (inotify) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier; // (notify) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_vtable = &vtable.ChannelDescendant; // (chandes) super + pThis->__nvoc_vtable = &vtable; // (msencctx) this __nvoc_init_funcTable_MsencContext_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_nvenc_ctx_nvoc.h b/src/nvidia/generated/g_kernel_nvenc_ctx_nvoc.h index fab8caa7bc..d4dac1ff91 100644 --- a/src/nvidia/generated/g_kernel_nvenc_ctx_nvoc.h +++ b/src/nvidia/generated/g_kernel_nvenc_ctx_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -60,10 +60,15 @@ ENGDESCRIPTOR msencGetEngineDescFromAllocParams(OBJGPU *pGpu, NvU32 externalClas #endif +// Metadata including vtable +struct NVOC_VTABLE__MsencContext; + + struct MsencContext { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__MsencContext *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; @@ -78,8 +83,13 @@ struct MsencContext { struct Notifier *__nvoc_pbase_Notifier; // notify super^2 struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super struct MsencContext *__nvoc_pbase_MsencContext; // msencctx +}; + + +// Metadata including vtable with 32 function pointers plus superclass metadata +struct NVOC_VTABLE__MsencContext { + const struct NVOC_VTABLE__ChannelDescendant ChannelDescendant; // (chandes) 32 function pointers - // Vtable with 32 per-object function pointers NV_STATUS (*__msencctxGetSwMethods__)(struct MsencContext * /*this*/, const METHOD **, NvU32 *); // virtual inherited (chandes) base (chandes) NvBool (*__msencctxIsSwMethodStalling__)(struct MsencContext * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) NV_STATUS (*__msencctxCheckMemInterUnmap__)(struct MsencContext * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) @@ -144,198 +154,198 @@ NV_STATUS __nvoc_objCreate_MsencContext(MsencContext**, Dynamic*, NvU32, struct // Wrapper macros -#define msencctxGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ +#define msencctxGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesGetSwMethods__ #define msencctxGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) msencctxGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) -#define msencctxIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ +#define msencctxIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesIsSwMethodStalling__ #define msencctxIsSwMethodStalling(pChannelDescendant, hHandle) msencctxIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define msencctxCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ +#define msencctxCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesCheckMemInterUnmap__ #define msencctxCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) msencctxCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) -#define msencctxControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define msencctxControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define msencctxControl(pGpuResource, pCallContext, pParams) msencctxControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define msencctxMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define msencctxMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define msencctxMap(pGpuResource, pCallContext, pParams, pCpuMapping) msencctxMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define msencctxUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define msencctxUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define msencctxUnmap(pGpuResource, pCallContext, pCpuMapping) msencctxUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define msencctxShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ +#define msencctxShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define msencctxShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) msencctxShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define msencctxGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define msencctxGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define msencctxGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) msencctxGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define msencctxGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define msencctxGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define msencctxGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) msencctxGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define msencctxInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define msencctxInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define msencctxInternalControlForward(pGpuResource, command, pParams, size) msencctxInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define msencctxGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define msencctxGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define msencctxGetInternalObjectHandle(pGpuResource) msencctxGetInternalObjectHandle_DISPATCH(pGpuResource) -#define msencctxAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define msencctxAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define msencctxAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) msencctxAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define msencctxGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define msencctxGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define msencctxGetMemInterMapParams(pRmResource, pParams) msencctxGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define msencctxGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define msencctxGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define msencctxGetMemoryMappingDescriptor(pRmResource, ppMemDesc) msencctxGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define msencctxControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define msencctxControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define msencctxControlSerialization_Prologue(pResource, pCallContext, pParams) msencctxControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define msencctxControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define msencctxControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define msencctxControlSerialization_Epilogue(pResource, pCallContext, pParams) msencctxControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define msencctxControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define msencctxControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define msencctxControl_Prologue(pResource, pCallContext, pParams) msencctxControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define msencctxControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define msencctxControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define msencctxControl_Epilogue(pResource, pCallContext, pParams) msencctxControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define msencctxCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define msencctxCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define msencctxCanCopy(pResource) msencctxCanCopy_DISPATCH(pResource) -#define msencctxIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define msencctxIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define msencctxIsDuplicate(pResource, hMemory, pDuplicate) msencctxIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define msencctxPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define msencctxPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define msencctxPreDestruct(pResource) msencctxPreDestruct_DISPATCH(pResource) -#define msencctxControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define msencctxControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define msencctxControlFilter(pResource, pCallContext, pParams) msencctxControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define msencctxIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define msencctxIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define msencctxIsPartialUnmapSupported(pResource) msencctxIsPartialUnmapSupported_DISPATCH(pResource) -#define msencctxMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define msencctxMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define msencctxMapTo(pResource, pParams) msencctxMapTo_DISPATCH(pResource, pParams) -#define msencctxUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define msencctxUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define msencctxUnmapFrom(pResource, pParams) msencctxUnmapFrom_DISPATCH(pResource, pParams) -#define msencctxGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define msencctxGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define msencctxGetRefCount(pResource) msencctxGetRefCount_DISPATCH(pResource) -#define msencctxAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define msencctxAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define msencctxAddAdditionalDependants(pClient, pResource, pReference) msencctxAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define msencctxGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define msencctxGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define msencctxGetNotificationListPtr(pNotifier) msencctxGetNotificationListPtr_DISPATCH(pNotifier) -#define msencctxGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define msencctxGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define msencctxGetNotificationShare(pNotifier) msencctxGetNotificationShare_DISPATCH(pNotifier) -#define msencctxSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define msencctxSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define msencctxSetNotificationShare(pNotifier, pNotifShare) msencctxSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define msencctxUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define msencctxUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define msencctxUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) msencctxUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define msencctxGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define msencctxGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define msencctxGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) msencctxGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS msencctxGetSwMethods_DISPATCH(struct MsencContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { - return pChannelDescendant->__msencctxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); + return pChannelDescendant->__nvoc_vtable->__msencctxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); } static inline NvBool msencctxIsSwMethodStalling_DISPATCH(struct MsencContext *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__msencctxIsSwMethodStalling__(pChannelDescendant, hHandle); + return pChannelDescendant->__nvoc_vtable->__msencctxIsSwMethodStalling__(pChannelDescendant, hHandle); } static inline NV_STATUS msencctxCheckMemInterUnmap_DISPATCH(struct MsencContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return pChannelDescendant->__msencctxCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); + return pChannelDescendant->__nvoc_vtable->__msencctxCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } static inline NV_STATUS msencctxControl_DISPATCH(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__msencctxControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__msencctxControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS msencctxMap_DISPATCH(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__msencctxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__msencctxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS msencctxUnmap_DISPATCH(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__msencctxUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__msencctxUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool msencctxShareCallback_DISPATCH(struct MsencContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__msencctxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__msencctxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS msencctxGetRegBaseOffsetAndSize_DISPATCH(struct MsencContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__msencctxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__msencctxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS msencctxGetMapAddrSpace_DISPATCH(struct MsencContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__msencctxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__msencctxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS msencctxInternalControlForward_DISPATCH(struct MsencContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__msencctxInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__msencctxInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle msencctxGetInternalObjectHandle_DISPATCH(struct MsencContext *pGpuResource) { - return pGpuResource->__msencctxGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__msencctxGetInternalObjectHandle__(pGpuResource); } static inline NvBool msencctxAccessCallback_DISPATCH(struct MsencContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__msencctxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__msencctxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS msencctxGetMemInterMapParams_DISPATCH(struct MsencContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__msencctxGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__msencctxGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS msencctxGetMemoryMappingDescriptor_DISPATCH(struct MsencContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__msencctxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__msencctxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS msencctxControlSerialization_Prologue_DISPATCH(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__msencctxControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__msencctxControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void msencctxControlSerialization_Epilogue_DISPATCH(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__msencctxControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__msencctxControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS msencctxControl_Prologue_DISPATCH(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__msencctxControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__msencctxControl_Prologue__(pResource, pCallContext, pParams); } static inline void msencctxControl_Epilogue_DISPATCH(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__msencctxControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__msencctxControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool msencctxCanCopy_DISPATCH(struct MsencContext *pResource) { - return pResource->__msencctxCanCopy__(pResource); + return pResource->__nvoc_vtable->__msencctxCanCopy__(pResource); } static inline NV_STATUS msencctxIsDuplicate_DISPATCH(struct MsencContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__msencctxIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__msencctxIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void msencctxPreDestruct_DISPATCH(struct MsencContext *pResource) { - pResource->__msencctxPreDestruct__(pResource); + pResource->__nvoc_vtable->__msencctxPreDestruct__(pResource); } static inline NV_STATUS msencctxControlFilter_DISPATCH(struct MsencContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__msencctxControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__msencctxControlFilter__(pResource, pCallContext, pParams); } static inline NvBool msencctxIsPartialUnmapSupported_DISPATCH(struct MsencContext *pResource) { - return pResource->__msencctxIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__msencctxIsPartialUnmapSupported__(pResource); } static inline NV_STATUS msencctxMapTo_DISPATCH(struct MsencContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__msencctxMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__msencctxMapTo__(pResource, pParams); } static inline NV_STATUS msencctxUnmapFrom_DISPATCH(struct MsencContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__msencctxUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__msencctxUnmapFrom__(pResource, pParams); } static inline NvU32 msencctxGetRefCount_DISPATCH(struct MsencContext *pResource) { - return pResource->__msencctxGetRefCount__(pResource); + return pResource->__nvoc_vtable->__msencctxGetRefCount__(pResource); } static inline void msencctxAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MsencContext *pResource, RsResourceRef *pReference) { - pResource->__msencctxAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__msencctxAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * msencctxGetNotificationListPtr_DISPATCH(struct MsencContext *pNotifier) { - return pNotifier->__msencctxGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__msencctxGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * msencctxGetNotificationShare_DISPATCH(struct MsencContext *pNotifier) { - return pNotifier->__msencctxGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__msencctxGetNotificationShare__(pNotifier); } static inline void msencctxSetNotificationShare_DISPATCH(struct MsencContext *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__msencctxSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__msencctxSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS msencctxUnregisterEvent_DISPATCH(struct MsencContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__msencctxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__msencctxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS msencctxGetOrAllocNotifShare_DISPATCH(struct MsencContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__msencctxGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__msencctxGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS msencctxConstructHal_KERNEL(struct MsencContext *pMsencContext, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); diff --git a/src/nvidia/generated/g_kernel_nvjpg_ctx_nvoc.c b/src/nvidia/generated/g_kernel_nvjpg_ctx_nvoc.c index f56300502e..8a72e101c3 100644 --- a/src/nvidia/generated/g_kernel_nvjpg_ctx_nvoc.c +++ b/src/nvidia/generated/g_kernel_nvjpg_ctx_nvoc.c @@ -120,165 +120,275 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_NvjpgContext = /*pExportInfo=*/ &__nvoc_export_info_NvjpgContext }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super^2 +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super^2 +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap(struct RmResource *pChannelDescendant, NvBool bSubdeviceHandleProvided); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^3 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^3 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^3 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super^2 +NV_STATUS __nvoc_up_thunk_GpuResource_chandesControl(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesMap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesUnmap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_GpuResource_chandesShareCallback(struct ChannelDescendant *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize(struct ChannelDescendant *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesInternalControlForward(struct ChannelDescendant *pGpuResource, NvU32 command, void *pParams, NvU32 size); // super +NvHandle __nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle(struct ChannelDescendant *pGpuResource); // super +NvBool __nvoc_up_thunk_RmResource_chandesAccessCallback(struct ChannelDescendant *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemInterMapParams(struct ChannelDescendant *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor(struct ChannelDescendant *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControl_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControl_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesCanCopy(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesIsDuplicate(struct ChannelDescendant *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_chandesPreDestruct(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesControlFilter(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesMapTo(struct ChannelDescendant *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesUnmapFrom(struct ChannelDescendant *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_chandesGetRefCount(struct ChannelDescendant *pResource); // super +void __nvoc_up_thunk_RsResource_chandesAddAdditionalDependants(struct RsClient *pClient, struct ChannelDescendant *pResource, RsResourceRef *pReference); // super +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_chandesGetNotificationListPtr(struct ChannelDescendant *pNotifier); // super +struct NotifShare * __nvoc_up_thunk_Notifier_chandesGetNotificationShare(struct ChannelDescendant *pNotifier); // super +void __nvoc_up_thunk_Notifier_chandesSetNotificationShare(struct ChannelDescendant *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesUnregisterEvent(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_up_thunk_ChannelDescendant_nvjpgctxGetSwMethods(struct NvjpgContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods); // this +NvBool __nvoc_up_thunk_ChannelDescendant_nvjpgctxIsSwMethodStalling(struct NvjpgContext *pChannelDescendant, NvU32 hHandle); // this +NV_STATUS __nvoc_up_thunk_ChannelDescendant_nvjpgctxCheckMemInterUnmap(struct NvjpgContext *pChannelDescendant, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxControl(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxMap(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxUnmap(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_nvjpgctxShareCallback(struct NvjpgContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxGetRegBaseOffsetAndSize(struct NvjpgContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxGetMapAddrSpace(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxInternalControlForward(struct NvjpgContext *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_nvjpgctxGetInternalObjectHandle(struct NvjpgContext *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_nvjpgctxAccessCallback(struct NvjpgContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_nvjpgctxGetMemInterMapParams(struct NvjpgContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_nvjpgctxGetMemoryMappingDescriptor(struct NvjpgContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_nvjpgctxControlSerialization_Prologue(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_nvjpgctxControlSerialization_Epilogue(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_nvjpgctxControl_Prologue(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_nvjpgctxControl_Epilogue(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_nvjpgctxCanCopy(struct NvjpgContext *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_nvjpgctxIsDuplicate(struct NvjpgContext *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_nvjpgctxPreDestruct(struct NvjpgContext *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_nvjpgctxControlFilter(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_nvjpgctxIsPartialUnmapSupported(struct NvjpgContext *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_nvjpgctxMapTo(struct NvjpgContext *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_nvjpgctxUnmapFrom(struct NvjpgContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_nvjpgctxGetRefCount(struct NvjpgContext *pResource); // this +void __nvoc_up_thunk_RsResource_nvjpgctxAddAdditionalDependants(struct RsClient *pClient, struct NvjpgContext *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_nvjpgctxGetNotificationListPtr(struct NvjpgContext *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_nvjpgctxGetNotificationShare(struct NvjpgContext *pNotifier); // this +void __nvoc_up_thunk_Notifier_nvjpgctxSetNotificationShare(struct NvjpgContext *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_nvjpgctxUnregisterEvent(struct NvjpgContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_nvjpgctxGetOrAllocNotifShare(struct NvjpgContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 32 up-thunk(s) defined to bridge methods in NvjpgContext to superclasses // nvjpgctxGetSwMethods: virtual inherited (chandes) base (chandes) -static NV_STATUS __nvoc_up_thunk_ChannelDescendant_nvjpgctxGetSwMethods(struct NvjpgContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { +NV_STATUS __nvoc_up_thunk_ChannelDescendant_nvjpgctxGetSwMethods(struct NvjpgContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { return chandesGetSwMethods((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_NvjpgContext_ChannelDescendant.offset), ppMethods, pNumMethods); } // nvjpgctxIsSwMethodStalling: virtual inherited (chandes) base (chandes) -static NvBool __nvoc_up_thunk_ChannelDescendant_nvjpgctxIsSwMethodStalling(struct NvjpgContext *pChannelDescendant, NvU32 hHandle) { +NvBool __nvoc_up_thunk_ChannelDescendant_nvjpgctxIsSwMethodStalling(struct NvjpgContext *pChannelDescendant, NvU32 hHandle) { return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_NvjpgContext_ChannelDescendant.offset), hHandle); } // nvjpgctxCheckMemInterUnmap: virtual inherited (chandes) base (chandes) -static NV_STATUS __nvoc_up_thunk_ChannelDescendant_nvjpgctxCheckMemInterUnmap(struct NvjpgContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_ChannelDescendant_nvjpgctxCheckMemInterUnmap(struct NvjpgContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_NvjpgContext_ChannelDescendant.offset), bSubdeviceHandleProvided); } // nvjpgctxControl: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxControl(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxControl(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset), pCallContext, pParams); } // nvjpgctxMap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxMap(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxMap(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // nvjpgctxUnmap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxUnmap(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxUnmap(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset), pCallContext, pCpuMapping); } // nvjpgctxShareCallback: virtual inherited (gpures) base (chandes) -static NvBool __nvoc_up_thunk_GpuResource_nvjpgctxShareCallback(struct NvjpgContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_nvjpgctxShareCallback(struct NvjpgContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // nvjpgctxGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxGetRegBaseOffsetAndSize(struct NvjpgContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxGetRegBaseOffsetAndSize(struct NvjpgContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset), pGpu, pOffset, pSize); } // nvjpgctxGetMapAddrSpace: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxGetMapAddrSpace(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxGetMapAddrSpace(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // nvjpgctxInternalControlForward: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxInternalControlForward(struct NvjpgContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvjpgctxInternalControlForward(struct NvjpgContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset), command, pParams, size); } // nvjpgctxGetInternalObjectHandle: virtual inherited (gpures) base (chandes) -static NvHandle __nvoc_up_thunk_GpuResource_nvjpgctxGetInternalObjectHandle(struct NvjpgContext *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_nvjpgctxGetInternalObjectHandle(struct NvjpgContext *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvjpgContext_GpuResource.offset)); } // nvjpgctxAccessCallback: virtual inherited (rmres) base (chandes) -static NvBool __nvoc_up_thunk_RmResource_nvjpgctxAccessCallback(struct NvjpgContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_nvjpgctxAccessCallback(struct NvjpgContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // nvjpgctxGetMemInterMapParams: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_nvjpgctxGetMemInterMapParams(struct NvjpgContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_nvjpgctxGetMemInterMapParams(struct NvjpgContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvjpgContext_RmResource.offset), pParams); } // nvjpgctxGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_nvjpgctxGetMemoryMappingDescriptor(struct NvjpgContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_nvjpgctxGetMemoryMappingDescriptor(struct NvjpgContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvjpgContext_RmResource.offset), ppMemDesc); } // nvjpgctxControlSerialization_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_nvjpgctxControlSerialization_Prologue(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_nvjpgctxControlSerialization_Prologue(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RmResource.offset), pCallContext, pParams); } // nvjpgctxControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_nvjpgctxControlSerialization_Epilogue(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_nvjpgctxControlSerialization_Epilogue(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RmResource.offset), pCallContext, pParams); } // nvjpgctxControl_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_nvjpgctxControl_Prologue(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_nvjpgctxControl_Prologue(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RmResource.offset), pCallContext, pParams); } // nvjpgctxControl_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_nvjpgctxControl_Epilogue(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_nvjpgctxControl_Epilogue(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RmResource.offset), pCallContext, pParams); } // nvjpgctxCanCopy: virtual inherited (res) base (chandes) -static NvBool __nvoc_up_thunk_RsResource_nvjpgctxCanCopy(struct NvjpgContext *pResource) { +NvBool __nvoc_up_thunk_RsResource_nvjpgctxCanCopy(struct NvjpgContext *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset)); } // nvjpgctxIsDuplicate: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_nvjpgctxIsDuplicate(struct NvjpgContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_nvjpgctxIsDuplicate(struct NvjpgContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset), hMemory, pDuplicate); } // nvjpgctxPreDestruct: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_nvjpgctxPreDestruct(struct NvjpgContext *pResource) { +void __nvoc_up_thunk_RsResource_nvjpgctxPreDestruct(struct NvjpgContext *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset)); } // nvjpgctxControlFilter: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_nvjpgctxControlFilter(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_nvjpgctxControlFilter(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset), pCallContext, pParams); } // nvjpgctxIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body -static NvBool __nvoc_up_thunk_RsResource_nvjpgctxIsPartialUnmapSupported(struct NvjpgContext *pResource) { +NvBool __nvoc_up_thunk_RsResource_nvjpgctxIsPartialUnmapSupported(struct NvjpgContext *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset)); } // nvjpgctxMapTo: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_nvjpgctxMapTo(struct NvjpgContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_nvjpgctxMapTo(struct NvjpgContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset), pParams); } // nvjpgctxUnmapFrom: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_nvjpgctxUnmapFrom(struct NvjpgContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_nvjpgctxUnmapFrom(struct NvjpgContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset), pParams); } // nvjpgctxGetRefCount: virtual inherited (res) base (chandes) -static NvU32 __nvoc_up_thunk_RsResource_nvjpgctxGetRefCount(struct NvjpgContext *pResource) { +NvU32 __nvoc_up_thunk_RsResource_nvjpgctxGetRefCount(struct NvjpgContext *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset)); } // nvjpgctxAddAdditionalDependants: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_nvjpgctxAddAdditionalDependants(struct RsClient *pClient, struct NvjpgContext *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_nvjpgctxAddAdditionalDependants(struct RsClient *pClient, struct NvjpgContext *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvjpgContext_RsResource.offset), pReference); } // nvjpgctxGetNotificationListPtr: virtual inherited (notify) base (chandes) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_nvjpgctxGetNotificationListPtr(struct NvjpgContext *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_nvjpgctxGetNotificationListPtr(struct NvjpgContext *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvjpgContext_Notifier.offset)); } // nvjpgctxGetNotificationShare: virtual inherited (notify) base (chandes) -static struct NotifShare * __nvoc_up_thunk_Notifier_nvjpgctxGetNotificationShare(struct NvjpgContext *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_nvjpgctxGetNotificationShare(struct NvjpgContext *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvjpgContext_Notifier.offset)); } // nvjpgctxSetNotificationShare: virtual inherited (notify) base (chandes) -static void __nvoc_up_thunk_Notifier_nvjpgctxSetNotificationShare(struct NvjpgContext *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_nvjpgctxSetNotificationShare(struct NvjpgContext *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvjpgContext_Notifier.offset), pNotifShare); } // nvjpgctxUnregisterEvent: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_nvjpgctxUnregisterEvent(struct NvjpgContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_nvjpgctxUnregisterEvent(struct NvjpgContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvjpgContext_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // nvjpgctxGetOrAllocNotifShare: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_nvjpgctxGetOrAllocNotifShare(struct NvjpgContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_nvjpgctxGetOrAllocNotifShare(struct NvjpgContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_NvjpgContext_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -332,109 +442,162 @@ static void __nvoc_init_funcTable_NvjpgContext_1(NvjpgContext *pThis, RmHalspecO PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - - // nvjpgctxGetSwMethods -- virtual inherited (chandes) base (chandes) - pThis->__nvjpgctxGetSwMethods__ = &__nvoc_up_thunk_ChannelDescendant_nvjpgctxGetSwMethods; - - // nvjpgctxIsSwMethodStalling -- virtual inherited (chandes) base (chandes) - pThis->__nvjpgctxIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_nvjpgctxIsSwMethodStalling; - - // nvjpgctxCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) - pThis->__nvjpgctxCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_nvjpgctxCheckMemInterUnmap; - - // nvjpgctxControl -- virtual inherited (gpures) base (chandes) - pThis->__nvjpgctxControl__ = &__nvoc_up_thunk_GpuResource_nvjpgctxControl; - - // nvjpgctxMap -- virtual inherited (gpures) base (chandes) - pThis->__nvjpgctxMap__ = &__nvoc_up_thunk_GpuResource_nvjpgctxMap; - - // nvjpgctxUnmap -- virtual inherited (gpures) base (chandes) - pThis->__nvjpgctxUnmap__ = &__nvoc_up_thunk_GpuResource_nvjpgctxUnmap; - - // nvjpgctxShareCallback -- virtual inherited (gpures) base (chandes) - pThis->__nvjpgctxShareCallback__ = &__nvoc_up_thunk_GpuResource_nvjpgctxShareCallback; - - // nvjpgctxGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) - pThis->__nvjpgctxGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_nvjpgctxGetRegBaseOffsetAndSize; - - // nvjpgctxGetMapAddrSpace -- virtual inherited (gpures) base (chandes) - pThis->__nvjpgctxGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_nvjpgctxGetMapAddrSpace; - - // nvjpgctxInternalControlForward -- virtual inherited (gpures) base (chandes) - pThis->__nvjpgctxInternalControlForward__ = &__nvoc_up_thunk_GpuResource_nvjpgctxInternalControlForward; - - // nvjpgctxGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) - pThis->__nvjpgctxGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_nvjpgctxGetInternalObjectHandle; - - // nvjpgctxAccessCallback -- virtual inherited (rmres) base (chandes) - pThis->__nvjpgctxAccessCallback__ = &__nvoc_up_thunk_RmResource_nvjpgctxAccessCallback; - - // nvjpgctxGetMemInterMapParams -- virtual inherited (rmres) base (chandes) - pThis->__nvjpgctxGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_nvjpgctxGetMemInterMapParams; - - // nvjpgctxGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) - pThis->__nvjpgctxGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_nvjpgctxGetMemoryMappingDescriptor; - - // nvjpgctxControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__nvjpgctxControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_nvjpgctxControlSerialization_Prologue; - - // nvjpgctxControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__nvjpgctxControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_nvjpgctxControlSerialization_Epilogue; - - // nvjpgctxControl_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__nvjpgctxControl_Prologue__ = &__nvoc_up_thunk_RmResource_nvjpgctxControl_Prologue; - - // nvjpgctxControl_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__nvjpgctxControl_Epilogue__ = &__nvoc_up_thunk_RmResource_nvjpgctxControl_Epilogue; - - // nvjpgctxCanCopy -- virtual inherited (res) base (chandes) - pThis->__nvjpgctxCanCopy__ = &__nvoc_up_thunk_RsResource_nvjpgctxCanCopy; - - // nvjpgctxIsDuplicate -- virtual inherited (res) base (chandes) - pThis->__nvjpgctxIsDuplicate__ = &__nvoc_up_thunk_RsResource_nvjpgctxIsDuplicate; - - // nvjpgctxPreDestruct -- virtual inherited (res) base (chandes) - pThis->__nvjpgctxPreDestruct__ = &__nvoc_up_thunk_RsResource_nvjpgctxPreDestruct; - - // nvjpgctxControlFilter -- virtual inherited (res) base (chandes) - pThis->__nvjpgctxControlFilter__ = &__nvoc_up_thunk_RsResource_nvjpgctxControlFilter; - - // nvjpgctxIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body - pThis->__nvjpgctxIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_nvjpgctxIsPartialUnmapSupported; - - // nvjpgctxMapTo -- virtual inherited (res) base (chandes) - pThis->__nvjpgctxMapTo__ = &__nvoc_up_thunk_RsResource_nvjpgctxMapTo; - - // nvjpgctxUnmapFrom -- virtual inherited (res) base (chandes) - pThis->__nvjpgctxUnmapFrom__ = &__nvoc_up_thunk_RsResource_nvjpgctxUnmapFrom; - - // nvjpgctxGetRefCount -- virtual inherited (res) base (chandes) - pThis->__nvjpgctxGetRefCount__ = &__nvoc_up_thunk_RsResource_nvjpgctxGetRefCount; - - // nvjpgctxAddAdditionalDependants -- virtual inherited (res) base (chandes) - pThis->__nvjpgctxAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_nvjpgctxAddAdditionalDependants; - - // nvjpgctxGetNotificationListPtr -- virtual inherited (notify) base (chandes) - pThis->__nvjpgctxGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_nvjpgctxGetNotificationListPtr; - - // nvjpgctxGetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__nvjpgctxGetNotificationShare__ = &__nvoc_up_thunk_Notifier_nvjpgctxGetNotificationShare; - - // nvjpgctxSetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__nvjpgctxSetNotificationShare__ = &__nvoc_up_thunk_Notifier_nvjpgctxSetNotificationShare; - - // nvjpgctxUnregisterEvent -- virtual inherited (notify) base (chandes) - pThis->__nvjpgctxUnregisterEvent__ = &__nvoc_up_thunk_Notifier_nvjpgctxUnregisterEvent; - - // nvjpgctxGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) - pThis->__nvjpgctxGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_nvjpgctxGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_NvjpgContext_1 with approximately 32 basic block(s). +} // End __nvoc_init_funcTable_NvjpgContext_1 // Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_NvjpgContext(NvjpgContext *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 32 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__NvjpgContext vtable = { + .__nvjpgctxGetSwMethods__ = &__nvoc_up_thunk_ChannelDescendant_nvjpgctxGetSwMethods, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesGetSwMethods__ = &chandesGetSwMethods_IMPL, // virtual + .__nvjpgctxIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_nvjpgctxIsSwMethodStalling, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesIsSwMethodStalling__ = &chandesIsSwMethodStalling_IMPL, // virtual + .__nvjpgctxCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_nvjpgctxCheckMemInterUnmap, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesCheckMemInterUnmap__ = &chandesCheckMemInterUnmap_IMPL, // virtual override (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap, // virtual + .__nvjpgctxControl__ = &__nvoc_up_thunk_GpuResource_nvjpgctxControl, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesControl__ = &__nvoc_up_thunk_GpuResource_chandesControl, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__nvjpgctxMap__ = &__nvoc_up_thunk_GpuResource_nvjpgctxMap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesMap__ = &__nvoc_up_thunk_GpuResource_chandesMap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__nvjpgctxUnmap__ = &__nvoc_up_thunk_GpuResource_nvjpgctxUnmap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesUnmap__ = &__nvoc_up_thunk_GpuResource_chandesUnmap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__nvjpgctxShareCallback__ = &__nvoc_up_thunk_GpuResource_nvjpgctxShareCallback, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesShareCallback__ = &__nvoc_up_thunk_GpuResource_chandesShareCallback, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__nvjpgctxGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_nvjpgctxGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__nvjpgctxGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_nvjpgctxGetMapAddrSpace, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__nvjpgctxInternalControlForward__ = &__nvoc_up_thunk_GpuResource_nvjpgctxInternalControlForward, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesInternalControlForward__ = &__nvoc_up_thunk_GpuResource_chandesInternalControlForward, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__nvjpgctxGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_nvjpgctxGetInternalObjectHandle, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__nvjpgctxAccessCallback__ = &__nvoc_up_thunk_RmResource_nvjpgctxAccessCallback, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesAccessCallback__ = &__nvoc_up_thunk_RmResource_chandesAccessCallback, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__nvjpgctxGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_nvjpgctxGetMemInterMapParams, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_chandesGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__nvjpgctxGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_nvjpgctxGetMemoryMappingDescriptor, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__nvjpgctxControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_nvjpgctxControlSerialization_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__nvjpgctxControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_nvjpgctxControlSerialization_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__nvjpgctxControl_Prologue__ = &__nvoc_up_thunk_RmResource_nvjpgctxControl_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControl_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__nvjpgctxControl_Epilogue__ = &__nvoc_up_thunk_RmResource_nvjpgctxControl_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControl_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__nvjpgctxCanCopy__ = &__nvoc_up_thunk_RsResource_nvjpgctxCanCopy, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesCanCopy__ = &__nvoc_up_thunk_RsResource_chandesCanCopy, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__nvjpgctxIsDuplicate__ = &__nvoc_up_thunk_RsResource_nvjpgctxIsDuplicate, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesIsDuplicate__ = &__nvoc_up_thunk_RsResource_chandesIsDuplicate, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__nvjpgctxPreDestruct__ = &__nvoc_up_thunk_RsResource_nvjpgctxPreDestruct, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesPreDestruct__ = &__nvoc_up_thunk_RsResource_chandesPreDestruct, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__nvjpgctxControlFilter__ = &__nvoc_up_thunk_RsResource_nvjpgctxControlFilter, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesControlFilter__ = &__nvoc_up_thunk_RsResource_chandesControlFilter, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__nvjpgctxIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_nvjpgctxIsPartialUnmapSupported, // inline virtual inherited (res) base (chandes) body + .ChannelDescendant.__chandesIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .ChannelDescendant.GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .ChannelDescendant.GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__nvjpgctxMapTo__ = &__nvoc_up_thunk_RsResource_nvjpgctxMapTo, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesMapTo__ = &__nvoc_up_thunk_RsResource_chandesMapTo, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__nvjpgctxUnmapFrom__ = &__nvoc_up_thunk_RsResource_nvjpgctxUnmapFrom, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesUnmapFrom__ = &__nvoc_up_thunk_RsResource_chandesUnmapFrom, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__nvjpgctxGetRefCount__ = &__nvoc_up_thunk_RsResource_nvjpgctxGetRefCount, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesGetRefCount__ = &__nvoc_up_thunk_RsResource_chandesGetRefCount, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__nvjpgctxAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_nvjpgctxAddAdditionalDependants, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_chandesAddAdditionalDependants, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__nvjpgctxGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_nvjpgctxGetNotificationListPtr, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationListPtr, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__nvjpgctxGetNotificationShare__ = &__nvoc_up_thunk_Notifier_nvjpgctxGetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__nvjpgctxSetNotificationShare__ = &__nvoc_up_thunk_Notifier_nvjpgctxSetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesSetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesSetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__nvjpgctxUnregisterEvent__ = &__nvoc_up_thunk_Notifier_nvjpgctxUnregisterEvent, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesUnregisterEvent__ = &__nvoc_up_thunk_Notifier_chandesUnregisterEvent, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__nvjpgctxGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_nvjpgctxGetOrAllocNotifShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource.RsResource; // (res) super^4 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource; // (rmres) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource; // (gpures) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier.INotifier; // (inotify) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier; // (notify) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_vtable = &vtable.ChannelDescendant; // (chandes) super + pThis->__nvoc_vtable = &vtable; // (nvjpgctx) this __nvoc_init_funcTable_NvjpgContext_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_nvjpg_ctx_nvoc.h b/src/nvidia/generated/g_kernel_nvjpg_ctx_nvoc.h index f7c3e16f6c..5814a72c9c 100644 --- a/src/nvidia/generated/g_kernel_nvjpg_ctx_nvoc.h +++ b/src/nvidia/generated/g_kernel_nvjpg_ctx_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -60,10 +60,15 @@ ENGDESCRIPTOR nvjpgGetEngineDescFromAllocParams(OBJGPU *pGpu, NvU32 externalClas #endif +// Metadata including vtable +struct NVOC_VTABLE__NvjpgContext; + + struct NvjpgContext { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__NvjpgContext *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; @@ -78,8 +83,13 @@ struct NvjpgContext { struct Notifier *__nvoc_pbase_Notifier; // notify super^2 struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super struct NvjpgContext *__nvoc_pbase_NvjpgContext; // nvjpgctx +}; + + +// Metadata including vtable with 32 function pointers plus superclass metadata +struct NVOC_VTABLE__NvjpgContext { + const struct NVOC_VTABLE__ChannelDescendant ChannelDescendant; // (chandes) 32 function pointers - // Vtable with 32 per-object function pointers NV_STATUS (*__nvjpgctxGetSwMethods__)(struct NvjpgContext * /*this*/, const METHOD **, NvU32 *); // virtual inherited (chandes) base (chandes) NvBool (*__nvjpgctxIsSwMethodStalling__)(struct NvjpgContext * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) NV_STATUS (*__nvjpgctxCheckMemInterUnmap__)(struct NvjpgContext * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) @@ -144,198 +154,198 @@ NV_STATUS __nvoc_objCreate_NvjpgContext(NvjpgContext**, Dynamic*, NvU32, struct // Wrapper macros -#define nvjpgctxGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ +#define nvjpgctxGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesGetSwMethods__ #define nvjpgctxGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) nvjpgctxGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) -#define nvjpgctxIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ +#define nvjpgctxIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesIsSwMethodStalling__ #define nvjpgctxIsSwMethodStalling(pChannelDescendant, hHandle) nvjpgctxIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define nvjpgctxCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ +#define nvjpgctxCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesCheckMemInterUnmap__ #define nvjpgctxCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) nvjpgctxCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) -#define nvjpgctxControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define nvjpgctxControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define nvjpgctxControl(pGpuResource, pCallContext, pParams) nvjpgctxControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define nvjpgctxMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define nvjpgctxMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define nvjpgctxMap(pGpuResource, pCallContext, pParams, pCpuMapping) nvjpgctxMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define nvjpgctxUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define nvjpgctxUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define nvjpgctxUnmap(pGpuResource, pCallContext, pCpuMapping) nvjpgctxUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define nvjpgctxShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ +#define nvjpgctxShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define nvjpgctxShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) nvjpgctxShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define nvjpgctxGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define nvjpgctxGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define nvjpgctxGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) nvjpgctxGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define nvjpgctxGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define nvjpgctxGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define nvjpgctxGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) nvjpgctxGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define nvjpgctxInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define nvjpgctxInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define nvjpgctxInternalControlForward(pGpuResource, command, pParams, size) nvjpgctxInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define nvjpgctxGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define nvjpgctxGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define nvjpgctxGetInternalObjectHandle(pGpuResource) nvjpgctxGetInternalObjectHandle_DISPATCH(pGpuResource) -#define nvjpgctxAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define nvjpgctxAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define nvjpgctxAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) nvjpgctxAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define nvjpgctxGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define nvjpgctxGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define nvjpgctxGetMemInterMapParams(pRmResource, pParams) nvjpgctxGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define nvjpgctxGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define nvjpgctxGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define nvjpgctxGetMemoryMappingDescriptor(pRmResource, ppMemDesc) nvjpgctxGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define nvjpgctxControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define nvjpgctxControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define nvjpgctxControlSerialization_Prologue(pResource, pCallContext, pParams) nvjpgctxControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define nvjpgctxControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define nvjpgctxControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define nvjpgctxControlSerialization_Epilogue(pResource, pCallContext, pParams) nvjpgctxControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define nvjpgctxControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define nvjpgctxControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define nvjpgctxControl_Prologue(pResource, pCallContext, pParams) nvjpgctxControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define nvjpgctxControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define nvjpgctxControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define nvjpgctxControl_Epilogue(pResource, pCallContext, pParams) nvjpgctxControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define nvjpgctxCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define nvjpgctxCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define nvjpgctxCanCopy(pResource) nvjpgctxCanCopy_DISPATCH(pResource) -#define nvjpgctxIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define nvjpgctxIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define nvjpgctxIsDuplicate(pResource, hMemory, pDuplicate) nvjpgctxIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define nvjpgctxPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define nvjpgctxPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define nvjpgctxPreDestruct(pResource) nvjpgctxPreDestruct_DISPATCH(pResource) -#define nvjpgctxControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define nvjpgctxControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define nvjpgctxControlFilter(pResource, pCallContext, pParams) nvjpgctxControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define nvjpgctxIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define nvjpgctxIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define nvjpgctxIsPartialUnmapSupported(pResource) nvjpgctxIsPartialUnmapSupported_DISPATCH(pResource) -#define nvjpgctxMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define nvjpgctxMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define nvjpgctxMapTo(pResource, pParams) nvjpgctxMapTo_DISPATCH(pResource, pParams) -#define nvjpgctxUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define nvjpgctxUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define nvjpgctxUnmapFrom(pResource, pParams) nvjpgctxUnmapFrom_DISPATCH(pResource, pParams) -#define nvjpgctxGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define nvjpgctxGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define nvjpgctxGetRefCount(pResource) nvjpgctxGetRefCount_DISPATCH(pResource) -#define nvjpgctxAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define nvjpgctxAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define nvjpgctxAddAdditionalDependants(pClient, pResource, pReference) nvjpgctxAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define nvjpgctxGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define nvjpgctxGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define nvjpgctxGetNotificationListPtr(pNotifier) nvjpgctxGetNotificationListPtr_DISPATCH(pNotifier) -#define nvjpgctxGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define nvjpgctxGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define nvjpgctxGetNotificationShare(pNotifier) nvjpgctxGetNotificationShare_DISPATCH(pNotifier) -#define nvjpgctxSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define nvjpgctxSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define nvjpgctxSetNotificationShare(pNotifier, pNotifShare) nvjpgctxSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define nvjpgctxUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define nvjpgctxUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define nvjpgctxUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) nvjpgctxUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define nvjpgctxGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define nvjpgctxGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define nvjpgctxGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) nvjpgctxGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS nvjpgctxGetSwMethods_DISPATCH(struct NvjpgContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { - return pChannelDescendant->__nvjpgctxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); + return pChannelDescendant->__nvoc_vtable->__nvjpgctxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); } static inline NvBool nvjpgctxIsSwMethodStalling_DISPATCH(struct NvjpgContext *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__nvjpgctxIsSwMethodStalling__(pChannelDescendant, hHandle); + return pChannelDescendant->__nvoc_vtable->__nvjpgctxIsSwMethodStalling__(pChannelDescendant, hHandle); } static inline NV_STATUS nvjpgctxCheckMemInterUnmap_DISPATCH(struct NvjpgContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return pChannelDescendant->__nvjpgctxCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); + return pChannelDescendant->__nvoc_vtable->__nvjpgctxCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } static inline NV_STATUS nvjpgctxControl_DISPATCH(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__nvjpgctxControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__nvjpgctxControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS nvjpgctxMap_DISPATCH(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__nvjpgctxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__nvjpgctxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS nvjpgctxUnmap_DISPATCH(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__nvjpgctxUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__nvjpgctxUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool nvjpgctxShareCallback_DISPATCH(struct NvjpgContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__nvjpgctxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__nvjpgctxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS nvjpgctxGetRegBaseOffsetAndSize_DISPATCH(struct NvjpgContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__nvjpgctxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__nvjpgctxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS nvjpgctxGetMapAddrSpace_DISPATCH(struct NvjpgContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__nvjpgctxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__nvjpgctxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS nvjpgctxInternalControlForward_DISPATCH(struct NvjpgContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__nvjpgctxInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__nvjpgctxInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle nvjpgctxGetInternalObjectHandle_DISPATCH(struct NvjpgContext *pGpuResource) { - return pGpuResource->__nvjpgctxGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__nvjpgctxGetInternalObjectHandle__(pGpuResource); } static inline NvBool nvjpgctxAccessCallback_DISPATCH(struct NvjpgContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__nvjpgctxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__nvjpgctxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS nvjpgctxGetMemInterMapParams_DISPATCH(struct NvjpgContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__nvjpgctxGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__nvjpgctxGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS nvjpgctxGetMemoryMappingDescriptor_DISPATCH(struct NvjpgContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__nvjpgctxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__nvjpgctxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS nvjpgctxControlSerialization_Prologue_DISPATCH(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvjpgctxControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__nvjpgctxControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void nvjpgctxControlSerialization_Epilogue_DISPATCH(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__nvjpgctxControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__nvjpgctxControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS nvjpgctxControl_Prologue_DISPATCH(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvjpgctxControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__nvjpgctxControl_Prologue__(pResource, pCallContext, pParams); } static inline void nvjpgctxControl_Epilogue_DISPATCH(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__nvjpgctxControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__nvjpgctxControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool nvjpgctxCanCopy_DISPATCH(struct NvjpgContext *pResource) { - return pResource->__nvjpgctxCanCopy__(pResource); + return pResource->__nvoc_vtable->__nvjpgctxCanCopy__(pResource); } static inline NV_STATUS nvjpgctxIsDuplicate_DISPATCH(struct NvjpgContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__nvjpgctxIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__nvjpgctxIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void nvjpgctxPreDestruct_DISPATCH(struct NvjpgContext *pResource) { - pResource->__nvjpgctxPreDestruct__(pResource); + pResource->__nvoc_vtable->__nvjpgctxPreDestruct__(pResource); } static inline NV_STATUS nvjpgctxControlFilter_DISPATCH(struct NvjpgContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvjpgctxControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__nvjpgctxControlFilter__(pResource, pCallContext, pParams); } static inline NvBool nvjpgctxIsPartialUnmapSupported_DISPATCH(struct NvjpgContext *pResource) { - return pResource->__nvjpgctxIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__nvjpgctxIsPartialUnmapSupported__(pResource); } static inline NV_STATUS nvjpgctxMapTo_DISPATCH(struct NvjpgContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__nvjpgctxMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__nvjpgctxMapTo__(pResource, pParams); } static inline NV_STATUS nvjpgctxUnmapFrom_DISPATCH(struct NvjpgContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__nvjpgctxUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__nvjpgctxUnmapFrom__(pResource, pParams); } static inline NvU32 nvjpgctxGetRefCount_DISPATCH(struct NvjpgContext *pResource) { - return pResource->__nvjpgctxGetRefCount__(pResource); + return pResource->__nvoc_vtable->__nvjpgctxGetRefCount__(pResource); } static inline void nvjpgctxAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct NvjpgContext *pResource, RsResourceRef *pReference) { - pResource->__nvjpgctxAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__nvjpgctxAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * nvjpgctxGetNotificationListPtr_DISPATCH(struct NvjpgContext *pNotifier) { - return pNotifier->__nvjpgctxGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__nvjpgctxGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * nvjpgctxGetNotificationShare_DISPATCH(struct NvjpgContext *pNotifier) { - return pNotifier->__nvjpgctxGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__nvjpgctxGetNotificationShare__(pNotifier); } static inline void nvjpgctxSetNotificationShare_DISPATCH(struct NvjpgContext *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__nvjpgctxSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__nvjpgctxSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS nvjpgctxUnregisterEvent_DISPATCH(struct NvjpgContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__nvjpgctxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__nvjpgctxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS nvjpgctxGetOrAllocNotifShare_DISPATCH(struct NvjpgContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__nvjpgctxGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__nvjpgctxGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS nvjpgctxConstructHal_KERNEL(struct NvjpgContext *pNvjpgContext, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); diff --git a/src/nvidia/generated/g_kernel_nvlink_nvoc.c b/src/nvidia/generated/g_kernel_nvlink_nvoc.c index f8bfb67ef2..0cd5995fa0 100644 --- a/src/nvidia/generated/g_kernel_nvlink_nvoc.c +++ b/src/nvidia/generated/g_kernel_nvlink_nvoc.c @@ -66,78 +66,96 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelNvlink = /*pExportInfo=*/ &__nvoc_export_info_KernelNvlink }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateConstructEngine(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, ENGDESCRIPTOR arg3); // this +NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateStatePreInitLocked(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this); // this +NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateStateLoad(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3); // this +NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateStatePostLoad(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3); // this +NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateStateUnload(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3); // this +NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateStatePostUnload(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3); // this +NvBool __nvoc_down_thunk_KernelNvlink_engstateIsPresent(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this); // this + // 7 down-thunk(s) defined to bridge methods in KernelNvlink from superclasses // knvlinkConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateConstructEngine(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, ENGDESCRIPTOR arg3) { +NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateConstructEngine(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, ENGDESCRIPTOR arg3) { return knvlinkConstructEngine(arg1, (struct KernelNvlink *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset), arg3); } // knvlinkStatePreInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateStatePreInitLocked(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this) { +NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateStatePreInitLocked(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this) { return knvlinkStatePreInitLocked(arg1, (struct KernelNvlink *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset)); } // knvlinkStateLoad: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateStateLoad(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateStateLoad(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3) { return knvlinkStateLoad(arg1, (struct KernelNvlink *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset), arg3); } // knvlinkStatePostLoad: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateStatePostLoad(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateStatePostLoad(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3) { return knvlinkStatePostLoad(arg1, (struct KernelNvlink *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset), arg3); } // knvlinkStateUnload: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateStateUnload(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateStateUnload(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3) { return knvlinkStateUnload(arg1, (struct KernelNvlink *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset), arg3); } // knvlinkStatePostUnload: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateStatePostUnload(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_KernelNvlink_engstateStatePostUnload(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this, NvU32 arg3) { return knvlinkStatePostUnload(arg1, (struct KernelNvlink *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset), arg3); } // knvlinkIsPresent: virtual override (engstate) base (engstate) -static NvBool __nvoc_down_thunk_KernelNvlink_engstateIsPresent(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this) { +NvBool __nvoc_down_thunk_KernelNvlink_engstateIsPresent(struct OBJGPU *arg1, struct OBJENGSTATE *arg_this) { return knvlinkIsPresent(arg1, (struct KernelNvlink *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_knvlinkInitMissing(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_knvlinkStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_knvlinkStateInitLocked(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_knvlinkStateInitUnlocked(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_knvlinkStatePreLoad(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_knvlinkStatePreUnload(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate, NvU32 arg3); // this +void __nvoc_up_thunk_OBJENGSTATE_knvlinkStateDestroy(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate); // this + // 7 up-thunk(s) defined to bridge methods in KernelNvlink to superclasses // knvlinkInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_knvlinkInitMissing(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_knvlinkInitMissing(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset)); } // knvlinkStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_knvlinkStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_knvlinkStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset)); } // knvlinkStateInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_knvlinkStateInitLocked(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_knvlinkStateInitLocked(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate) { return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset)); } // knvlinkStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_knvlinkStateInitUnlocked(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_knvlinkStateInitUnlocked(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset)); } // knvlinkStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_knvlinkStatePreLoad(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_knvlinkStatePreLoad(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset), arg3); } // knvlinkStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_knvlinkStatePreUnload(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_knvlinkStatePreUnload(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset), arg3); } // knvlinkStateDestroy: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_knvlinkStateDestroy(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_knvlinkStateDestroy(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate) { engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelNvlink_OBJENGSTATE.offset)); } @@ -170,119 +188,136 @@ void __nvoc_init_dataField_KernelNvlink(KernelNvlink *pThis, RmHalspecOwner *pRm // NVOC Property Hal field -- PDB_PROP_KNVLINK_IS_MISSING // default { - pThis->setProperty(pThis, PDB_PROP_KNVLINK_IS_MISSING, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KNVLINK_IS_MISSING, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_KNVLINK_ENABLED if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0fc60UL) )) /* ChipHal: TU102 | TU104 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_KNVLINK_ENABLED, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KNVLINK_ENABLED, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_KNVLINK_ENABLED, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KNVLINK_ENABLED, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_KNVLINK_UNSET_NVLINK_PEER_SUPPORTED if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_KNVLINK_UNSET_NVLINK_PEER_SUPPORTED, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KNVLINK_UNSET_NVLINK_PEER_SUPPORTED, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_KNVLINK_UNSET_NVLINK_PEER_SUPPORTED, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KNVLINK_UNSET_NVLINK_PEER_SUPPORTED, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_KNVLINK_CONFIG_REQUIRE_INITIALIZED_LINKS_CHECK if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_KNVLINK_CONFIG_REQUIRE_INITIALIZED_LINKS_CHECK, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KNVLINK_CONFIG_REQUIRE_INITIALIZED_LINKS_CHECK, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_KNVLINK_CONFIG_REQUIRE_INITIALIZED_LINKS_CHECK, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KNVLINK_CONFIG_REQUIRE_INITIALIZED_LINKS_CHECK, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_KNVLINK_LANE_SHUTDOWN_ENABLED if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_KNVLINK_LANE_SHUTDOWN_ENABLED, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KNVLINK_LANE_SHUTDOWN_ENABLED, NV_TRUE); } // NVOC Property Hal field -- PDB_PROP_KNVLINK_LANE_SHUTDOWN_ON_UNLOAD if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ { - pThis->setProperty(pThis, PDB_PROP_KNVLINK_LANE_SHUTDOWN_ON_UNLOAD, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KNVLINK_LANE_SHUTDOWN_ON_UNLOAD, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_KNVLINK_LANE_SHUTDOWN_ON_UNLOAD, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KNVLINK_LANE_SHUTDOWN_ON_UNLOAD, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_KNVLINK_LINKRESET_AFTER_SHUTDOWN if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ { - pThis->setProperty(pThis, PDB_PROP_KNVLINK_LINKRESET_AFTER_SHUTDOWN, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KNVLINK_LINKRESET_AFTER_SHUTDOWN, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_KNVLINK_LINKRESET_AFTER_SHUTDOWN, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KNVLINK_LINKRESET_AFTER_SHUTDOWN, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_KNVLINK_BUG2274645_RESET_FOR_RTD3_FGC6 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000060UL) )) /* ChipHal: TU102 | TU104 */ { - pThis->setProperty(pThis, PDB_PROP_KNVLINK_BUG2274645_RESET_FOR_RTD3_FGC6, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KNVLINK_BUG2274645_RESET_FOR_RTD3_FGC6, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_KNVLINK_BUG2274645_RESET_FOR_RTD3_FGC6, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KNVLINK_BUG2274645_RESET_FOR_RTD3_FGC6, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_KNVLINK_L2_POWER_STATE_FOR_LONG_IDLE if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000060UL) )) /* ChipHal: TU102 | TU104 */ { - pThis->setProperty(pThis, PDB_PROP_KNVLINK_L2_POWER_STATE_FOR_LONG_IDLE, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KNVLINK_L2_POWER_STATE_FOR_LONG_IDLE, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_KNVLINK_L2_POWER_STATE_FOR_LONG_IDLE, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KNVLINK_L2_POWER_STATE_FOR_LONG_IDLE, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_KNVLINK_WAR_BUG_3471679_PEERID_FILTERING - pThis->setProperty(pThis, PDB_PROP_KNVLINK_WAR_BUG_3471679_PEERID_FILTERING, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KNVLINK_WAR_BUG_3471679_PEERID_FILTERING, NV_FALSE); // NVOC Property Hal field -- PDB_PROP_KNVLINK_MINION_GFW_BOOT if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_KNVLINK_MINION_GFW_BOOT, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KNVLINK_MINION_GFW_BOOT, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_KNVLINK_MINION_GFW_BOOT, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KNVLINK_MINION_GFW_BOOT, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_KNVLINK_SYSMEM_SUPPORT_ENABLED - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ + { + pThis->setProperty(pThis, PDB_PROP_KNVLINK_SYSMEM_SUPPORT_ENABLED, NV_FALSE); + } + + // NVOC Property Hal field -- PDB_PROP_KNVLINK_UNCONTAINED_ERROR_RECOVERY_SUPPORTED + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_KNVLINK_SYSMEM_SUPPORT_ENABLED, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KNVLINK_UNCONTAINED_ERROR_RECOVERY_SUPPORTED, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_KNVLINK_SYSMEM_SUPPORT_ENABLED, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_KNVLINK_UNCONTAINED_ERROR_RECOVERY_SUPPORTED, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_KNVLINK_ENCRYPTION_ENABLED - pThis->setProperty(pThis, PDB_PROP_KNVLINK_ENCRYPTION_ENABLED, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_KNVLINK_ENCRYPTION_ENABLED, NV_FALSE); + + // NVOC Property Hal field -- PDB_PROP_KNVLINK_RBM_LINK_COUNT_ENABLED + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->setProperty(pThis, PDB_PROP_KNVLINK_RBM_LINK_COUNT_ENABLED, NV_TRUE); + } + // default + else + { + pThis->setProperty(pThis, PDB_PROP_KNVLINK_RBM_LINK_COUNT_ENABLED, NV_FALSE); + } pThis->fabricBaseAddr = (+18446744073709551615ULL); @@ -316,34 +351,6 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); - // knvlinkConstructEngine -- virtual override (engstate) base (engstate) - pThis->__knvlinkConstructEngine__ = &knvlinkConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelNvlink_engstateConstructEngine; - - // knvlinkStatePreInitLocked -- virtual override (engstate) base (engstate) - pThis->__knvlinkStatePreInitLocked__ = &knvlinkStatePreInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_KernelNvlink_engstateStatePreInitLocked; - - // knvlinkStateLoad -- virtual override (engstate) base (engstate) - pThis->__knvlinkStateLoad__ = &knvlinkStateLoad_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelNvlink_engstateStateLoad; - - // knvlinkStatePostLoad -- virtual override (engstate) base (engstate) - pThis->__knvlinkStatePostLoad__ = &knvlinkStatePostLoad_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_KernelNvlink_engstateStatePostLoad; - - // knvlinkStateUnload -- virtual override (engstate) base (engstate) - pThis->__knvlinkStateUnload__ = &knvlinkStateUnload_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelNvlink_engstateStateUnload; - - // knvlinkStatePostUnload -- virtual override (engstate) base (engstate) - pThis->__knvlinkStatePostUnload__ = &knvlinkStatePostUnload_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ = &__nvoc_down_thunk_KernelNvlink_engstateStatePostUnload; - - // knvlinkIsPresent -- virtual override (engstate) base (engstate) - pThis->__knvlinkIsPresent__ = &knvlinkIsPresent_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ = &__nvoc_down_thunk_KernelNvlink_engstateIsPresent; - // knvlinkSetUniqueFabricBaseAddress -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { @@ -554,7 +561,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO } else { - pThis->__knvlinkPoweredUpForD3__ = &knvlinkPoweredUpForD3_491d52; + pThis->__knvlinkPoweredUpForD3__ = &knvlinkPoweredUpForD3_3dd2c9; } // knvlinkIsAliSupported -- halified (2 hals) body @@ -640,7 +647,48 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO } else { - pThis->__knvlinkIsBandwidthModeOff__ = &knvlinkIsBandwidthModeOff_491d52; + pThis->__knvlinkIsBandwidthModeOff__ = &knvlinkIsBandwidthModeOff_3dd2c9; + } + + // knvlinkIsBwModeSupported -- halified (3 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ + { + pThis->__knvlinkIsBwModeSupported__ = &knvlinkIsBwModeSupported_GH100; + } + else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__knvlinkIsBwModeSupported__ = &knvlinkIsBwModeSupported_GB100; + } + // default + else + { + pThis->__knvlinkIsBwModeSupported__ = &knvlinkIsBwModeSupported_3dd2c9; + } + + // knvlinkGetHshubSupportedRbmModes -- halified (2 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__knvlinkGetHshubSupportedRbmModes__ = &knvlinkGetHshubSupportedRbmModes_GB100; + } + // default + else + { + pThis->__knvlinkGetHshubSupportedRbmModes__ = &knvlinkGetHshubSupportedRbmModes_46f6a7; + } + + // knvlinkGetSupportedBwMode -- halified (3 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ + { + pThis->__knvlinkGetSupportedBwMode__ = &knvlinkGetSupportedBwMode_GH100; + } + else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ + { + pThis->__knvlinkGetSupportedBwMode__ = &knvlinkGetSupportedBwMode_GB100; + } + // default + else + { + pThis->__knvlinkGetSupportedBwMode__ = &knvlinkGetSupportedBwMode_46f6a7; } // knvlinkDirectConnectCheck -- halified (2 hals) body @@ -660,7 +708,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO } else { - pThis->__knvlinkIsGpuReducedNvlinkConfig__ = &knvlinkIsGpuReducedNvlinkConfig_491d52; + pThis->__knvlinkIsGpuReducedNvlinkConfig__ = &knvlinkIsGpuReducedNvlinkConfig_3dd2c9; } // knvlinkIsFloorSweepingNeeded -- halified (2 hals) body @@ -670,7 +718,7 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO } else { - pThis->__knvlinkIsFloorSweepingNeeded__ = &knvlinkIsFloorSweepingNeeded_491d52; + pThis->__knvlinkIsFloorSweepingNeeded__ = &knvlinkIsFloorSweepingNeeded_3dd2c9; } // knvlinkGetSupportedCounters -- halified (2 hals) body @@ -683,34 +731,49 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO { pThis->__knvlinkGetSupportedCounters__ = &knvlinkGetSupportedCounters_46f6a7; } - - // knvlinkInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__knvlinkInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_knvlinkInitMissing; - - // knvlinkStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__knvlinkStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_knvlinkStatePreInitUnlocked; - - // knvlinkStateInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__knvlinkStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_knvlinkStateInitLocked; - - // knvlinkStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__knvlinkStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_knvlinkStateInitUnlocked; - - // knvlinkStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__knvlinkStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_knvlinkStatePreLoad; - - // knvlinkStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__knvlinkStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_knvlinkStatePreUnload; - - // knvlinkStateDestroy -- virtual inherited (engstate) base (engstate) - pThis->__knvlinkStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_knvlinkStateDestroy; -} // End __nvoc_init_funcTable_KernelNvlink_1 with approximately 88 basic block(s). +} // End __nvoc_init_funcTable_KernelNvlink_1 with approximately 75 basic block(s). -// Initialize vtable(s) for 45 virtual method(s). +// Initialize vtable(s) for 48 virtual method(s). void __nvoc_init_funcTable_KernelNvlink(KernelNvlink *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 45 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelNvlink vtable = { + .__knvlinkConstructEngine__ = &knvlinkConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelNvlink_engstateConstructEngine, // virtual + .__knvlinkStatePreInitLocked__ = &knvlinkStatePreInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_KernelNvlink_engstateStatePreInitLocked, // virtual + .__knvlinkStateLoad__ = &knvlinkStateLoad_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelNvlink_engstateStateLoad, // virtual + .__knvlinkStatePostLoad__ = &knvlinkStatePostLoad_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_KernelNvlink_engstateStatePostLoad, // virtual + .__knvlinkStateUnload__ = &knvlinkStateUnload_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_KernelNvlink_engstateStateUnload, // virtual + .__knvlinkStatePostUnload__ = &knvlinkStatePostUnload_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &__nvoc_down_thunk_KernelNvlink_engstateStatePostUnload, // virtual + .__knvlinkIsPresent__ = &knvlinkIsPresent_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &__nvoc_down_thunk_KernelNvlink_engstateIsPresent, // virtual + .__knvlinkInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_knvlinkInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__knvlinkStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_knvlinkStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__knvlinkStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_knvlinkStateInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &engstateStateInitLocked_IMPL, // virtual + .__knvlinkStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_knvlinkStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__knvlinkStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_knvlinkStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__knvlinkStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_knvlinkStatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__knvlinkStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_knvlinkStateDestroy, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &engstateStateDestroy_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_vtable = &vtable; // (knvlink) this + + // Initialize vtable(s) with 34 per-object function pointer(s). __nvoc_init_funcTable_KernelNvlink_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_nvlink_nvoc.h b/src/nvidia/generated/g_kernel_nvlink_nvoc.h index 8e7e815b13..877cda8ba3 100644 --- a/src/nvidia/generated/g_kernel_nvlink_nvoc.h +++ b/src/nvidia/generated/g_kernel_nvlink_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -112,6 +112,12 @@ typedef struct _def_knvlink_conn_info // Link Retrain after reset time = 10s #define NVLINK_RETRAIN_TIME 10000000000 +// Recovery period allowing orphaned responses to return - 10s +#define NVLINK_UNCONTAINED_ERROR_IDLE_PERIOD_NS 10000000000 + +// Total recovery period allowed before aborting and triggering degradation - 30s +#define NVLINK_UNCONTAINED_ERROR_ABORT_PERIOD_NS 30000000000 + /**********************************************************/ // NvGpu identifier in nvlink core library @@ -232,10 +238,15 @@ MAKE_LIST(FaultUpList, NVLINK_ID); #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelNvlink; + + struct KernelNvlink { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelNvlink *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -245,14 +256,7 @@ struct KernelNvlink { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct KernelNvlink *__nvoc_pbase_KernelNvlink; // knvlink - // Vtable with 45 per-object function pointers - NV_STATUS (*__knvlinkConstructEngine__)(struct OBJGPU *, struct KernelNvlink * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) - NV_STATUS (*__knvlinkStatePreInitLocked__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__knvlinkStateLoad__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__knvlinkStatePostLoad__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__knvlinkStateUnload__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__knvlinkStatePostUnload__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NvBool (*__knvlinkIsPresent__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual override (engstate) base (engstate) + // Vtable with 34 per-object function pointers NV_STATUS (*__knvlinkSetUniqueFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU64); // halified (3 hals) body void (*__knvlinkClearUniqueFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body NV_STATUS (*__knvlinkSetUniqueFabricEgmBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU64); // halified (2 hals) body @@ -280,19 +284,15 @@ struct KernelNvlink { void (*__knvlinkGetEffectivePeerLinkMask__)(struct OBJGPU *, struct KernelNvlink * /*this*/, struct OBJGPU *, NvU32 *); // halified (2 hals) body NvU32 (*__knvlinkGetNumLinksToBeReducedPerIoctrl__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body NvBool (*__knvlinkIsBandwidthModeOff__)(struct KernelNvlink * /*this*/); // halified (2 hals) body + NvBool (*__knvlinkIsBwModeSupported__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU8); // halified (3 hals) body + NV_STATUS (*__knvlinkGetHshubSupportedRbmModes__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NV_STATUS (*__knvlinkGetSupportedBwMode__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NV2080_CTRL_NVLINK_GET_SUPPORTED_BW_MODE_PARAMS *); // halified (3 hals) body void (*__knvlinkDirectConnectCheck__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body NvBool (*__knvlinkIsGpuReducedNvlinkConfig__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body NvBool (*__knvlinkIsFloorSweepingNeeded__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32, NvU32); // halified (2 hals) body NV_STATUS (*__knvlinkGetSupportedCounters__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NV2080_CTRL_NVLINK_GET_SUPPORTED_COUNTERS_PARAMS *); // halified (2 hals) body - void (*__knvlinkInitMissing__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__knvlinkStatePreInitUnlocked__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__knvlinkStateInitLocked__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__knvlinkStateInitUnlocked__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__knvlinkStatePreLoad__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__knvlinkStatePreUnload__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - void (*__knvlinkStateDestroy__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) - // 17 PDB properties + // 19 PDB properties NvBool PDB_PROP_KNVLINK_ENABLED; NvBool PDB_PROP_KNVLINK_L2_POWER_STATE_ENABLED; NvBool PDB_PROP_KNVLINK_UNSET_NVLINK_PEER_SUPPORTED; @@ -308,9 +308,15 @@ struct KernelNvlink { NvBool PDB_PROP_KNVLINK_MINION_GFW_BOOT; NvBool PDB_PROP_KNVLINK_SYSMEM_SUPPORT_ENABLED; NvBool PDB_PROP_KNVLINK_FORCED_LOOPBACK_ON_SWITCH_MODE_ENABLED; + NvBool PDB_PROP_KNVLINK_UNCONTAINED_ERROR_RECOVERY_SUPPORTED; NvBool PDB_PROP_KNVLINK_ENCRYPTION_ENABLED; + NvBool PDB_PROP_KNVLINK_RBM_LINK_COUNT_ENABLED; // Data members + NvU8 nvlinkBwMode; + NvU8 maxRbmLinks; + NvU8 hshubSupportedRbmModesList[18]; + NvU8 totalRbmModes; NvU32 gspProxyRegkeys; struct KernelIoctrl *PRIVATE_FIELD(pKernelIoctrl)[3]; NvU32 PRIVATE_FIELD(ioctrlMask); @@ -346,6 +352,7 @@ struct KernelNvlink { NvU32 PRIVATE_FIELD(deviceLockRefcount); char *PRIVATE_FIELD(driverName); char *PRIVATE_FIELD(deviceName); + NvU8 *PRIVATE_FIELD(pGidString); NvBool PRIVATE_FIELD(bVerifTrainingEnable); NvBool PRIVATE_FIELD(bL2Entry); NvBool PRIVATE_FIELD(bSkipLinkTraining); @@ -370,6 +377,7 @@ struct KernelNvlink_PRIVATE { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelNvlink *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -379,14 +387,7 @@ struct KernelNvlink_PRIVATE { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct KernelNvlink *__nvoc_pbase_KernelNvlink; // knvlink - // Vtable with 45 per-object function pointers - NV_STATUS (*__knvlinkConstructEngine__)(struct OBJGPU *, struct KernelNvlink * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) - NV_STATUS (*__knvlinkStatePreInitLocked__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__knvlinkStateLoad__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__knvlinkStatePostLoad__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__knvlinkStateUnload__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__knvlinkStatePostUnload__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NvBool (*__knvlinkIsPresent__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual override (engstate) base (engstate) + // Vtable with 34 per-object function pointers NV_STATUS (*__knvlinkSetUniqueFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU64); // halified (3 hals) body void (*__knvlinkClearUniqueFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body NV_STATUS (*__knvlinkSetUniqueFabricEgmBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU64); // halified (2 hals) body @@ -414,19 +415,15 @@ struct KernelNvlink_PRIVATE { void (*__knvlinkGetEffectivePeerLinkMask__)(struct OBJGPU *, struct KernelNvlink * /*this*/, struct OBJGPU *, NvU32 *); // halified (2 hals) body NvU32 (*__knvlinkGetNumLinksToBeReducedPerIoctrl__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body NvBool (*__knvlinkIsBandwidthModeOff__)(struct KernelNvlink * /*this*/); // halified (2 hals) body + NvBool (*__knvlinkIsBwModeSupported__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU8); // halified (3 hals) body + NV_STATUS (*__knvlinkGetHshubSupportedRbmModes__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body + NV_STATUS (*__knvlinkGetSupportedBwMode__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NV2080_CTRL_NVLINK_GET_SUPPORTED_BW_MODE_PARAMS *); // halified (3 hals) body void (*__knvlinkDirectConnectCheck__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body NvBool (*__knvlinkIsGpuReducedNvlinkConfig__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body NvBool (*__knvlinkIsFloorSweepingNeeded__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32, NvU32); // halified (2 hals) body NV_STATUS (*__knvlinkGetSupportedCounters__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NV2080_CTRL_NVLINK_GET_SUPPORTED_COUNTERS_PARAMS *); // halified (2 hals) body - void (*__knvlinkInitMissing__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__knvlinkStatePreInitUnlocked__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__knvlinkStateInitLocked__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__knvlinkStateInitUnlocked__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__knvlinkStatePreLoad__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__knvlinkStatePreUnload__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - void (*__knvlinkStateDestroy__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) - // 17 PDB properties + // 19 PDB properties NvBool PDB_PROP_KNVLINK_ENABLED; NvBool PDB_PROP_KNVLINK_L2_POWER_STATE_ENABLED; NvBool PDB_PROP_KNVLINK_UNSET_NVLINK_PEER_SUPPORTED; @@ -442,9 +439,15 @@ struct KernelNvlink_PRIVATE { NvBool PDB_PROP_KNVLINK_MINION_GFW_BOOT; NvBool PDB_PROP_KNVLINK_SYSMEM_SUPPORT_ENABLED; NvBool PDB_PROP_KNVLINK_FORCED_LOOPBACK_ON_SWITCH_MODE_ENABLED; + NvBool PDB_PROP_KNVLINK_UNCONTAINED_ERROR_RECOVERY_SUPPORTED; NvBool PDB_PROP_KNVLINK_ENCRYPTION_ENABLED; + NvBool PDB_PROP_KNVLINK_RBM_LINK_COUNT_ENABLED; // Data members + NvU8 nvlinkBwMode; + NvU8 maxRbmLinks; + NvU8 hshubSupportedRbmModesList[18]; + NvU8 totalRbmModes; NvU32 gspProxyRegkeys; struct KernelIoctrl *pKernelIoctrl[3]; NvU32 ioctrlMask; @@ -480,6 +483,7 @@ struct KernelNvlink_PRIVATE { NvU32 deviceLockRefcount; char *driverName; char *deviceName; + NvU8 *pGidString; NvBool bVerifTrainingEnable; NvBool bL2Entry; NvBool bSkipLinkTraining; @@ -499,6 +503,27 @@ struct KernelNvlink_PRIVATE { NvU64 fabricEgmBaseAddr; }; + +// Metadata including vtable with 14 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelNvlink { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + + NV_STATUS (*__knvlinkConstructEngine__)(struct OBJGPU *, struct KernelNvlink * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__knvlinkStatePreInitLocked__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__knvlinkStateLoad__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__knvlinkStatePostLoad__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__knvlinkStateUnload__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__knvlinkStatePostUnload__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NvBool (*__knvlinkIsPresent__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual override (engstate) base (engstate) + void (*__knvlinkInitMissing__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__knvlinkStatePreInitUnlocked__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__knvlinkStateInitLocked__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__knvlinkStateInitUnlocked__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__knvlinkStatePreLoad__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__knvlinkStatePreUnload__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + void (*__knvlinkStateDestroy__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual inherited (engstate) base (engstate) +}; + #ifndef __NVOC_CLASS_KernelNvlink_TYPEDEF__ #define __NVOC_CLASS_KernelNvlink_TYPEDEF__ typedef struct KernelNvlink KernelNvlink; @@ -524,6 +549,8 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelNvlink; // Property macros #define PDB_PROP_KNVLINK_MINION_GFW_BOOT_BASE_CAST #define PDB_PROP_KNVLINK_MINION_GFW_BOOT_BASE_NAME PDB_PROP_KNVLINK_MINION_GFW_BOOT +#define PDB_PROP_KNVLINK_RBM_LINK_COUNT_ENABLED_BASE_CAST +#define PDB_PROP_KNVLINK_RBM_LINK_COUNT_ENABLED_BASE_NAME PDB_PROP_KNVLINK_RBM_LINK_COUNT_ENABLED #define PDB_PROP_KNVLINK_CONFIG_REQUIRE_INITIALIZED_LINKS_CHECK_BASE_CAST #define PDB_PROP_KNVLINK_CONFIG_REQUIRE_INITIALIZED_LINKS_CHECK_BASE_NAME PDB_PROP_KNVLINK_CONFIG_REQUIRE_INITIALIZED_LINKS_CHECK #define PDB_PROP_KNVLINK_LANE_SHUTDOWN_ENABLED_BASE_CAST @@ -544,6 +571,8 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelNvlink; #define PDB_PROP_KNVLINK_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING #define PDB_PROP_KNVLINK_WAR_BUG_3471679_PEERID_FILTERING_BASE_CAST #define PDB_PROP_KNVLINK_WAR_BUG_3471679_PEERID_FILTERING_BASE_NAME PDB_PROP_KNVLINK_WAR_BUG_3471679_PEERID_FILTERING +#define PDB_PROP_KNVLINK_UNCONTAINED_ERROR_RECOVERY_SUPPORTED_BASE_CAST +#define PDB_PROP_KNVLINK_UNCONTAINED_ERROR_RECOVERY_SUPPORTED_BASE_NAME PDB_PROP_KNVLINK_UNCONTAINED_ERROR_RECOVERY_SUPPORTED #define PDB_PROP_KNVLINK_BUG2274645_RESET_FOR_RTD3_FGC6_BASE_CAST #define PDB_PROP_KNVLINK_BUG2274645_RESET_FOR_RTD3_FGC6_BASE_NAME PDB_PROP_KNVLINK_BUG2274645_RESET_FOR_RTD3_FGC6 #define PDB_PROP_KNVLINK_LANE_SHUTDOWN_ON_UNLOAD_BASE_CAST @@ -565,19 +594,19 @@ NV_STATUS __nvoc_objCreate_KernelNvlink(KernelNvlink**, Dynamic*, NvU32); // Wrapper macros -#define knvlinkConstructEngine_FNPTR(arg_this) arg_this->__knvlinkConstructEngine__ +#define knvlinkConstructEngine_FNPTR(arg_this) arg_this->__nvoc_vtable->__knvlinkConstructEngine__ #define knvlinkConstructEngine(arg1, arg_this, arg3) knvlinkConstructEngine_DISPATCH(arg1, arg_this, arg3) -#define knvlinkStatePreInitLocked_FNPTR(arg_this) arg_this->__knvlinkStatePreInitLocked__ +#define knvlinkStatePreInitLocked_FNPTR(arg_this) arg_this->__nvoc_vtable->__knvlinkStatePreInitLocked__ #define knvlinkStatePreInitLocked(arg1, arg_this) knvlinkStatePreInitLocked_DISPATCH(arg1, arg_this) -#define knvlinkStateLoad_FNPTR(arg_this) arg_this->__knvlinkStateLoad__ +#define knvlinkStateLoad_FNPTR(arg_this) arg_this->__nvoc_vtable->__knvlinkStateLoad__ #define knvlinkStateLoad(arg1, arg_this, arg3) knvlinkStateLoad_DISPATCH(arg1, arg_this, arg3) -#define knvlinkStatePostLoad_FNPTR(arg_this) arg_this->__knvlinkStatePostLoad__ +#define knvlinkStatePostLoad_FNPTR(arg_this) arg_this->__nvoc_vtable->__knvlinkStatePostLoad__ #define knvlinkStatePostLoad(arg1, arg_this, arg3) knvlinkStatePostLoad_DISPATCH(arg1, arg_this, arg3) -#define knvlinkStateUnload_FNPTR(arg_this) arg_this->__knvlinkStateUnload__ +#define knvlinkStateUnload_FNPTR(arg_this) arg_this->__nvoc_vtable->__knvlinkStateUnload__ #define knvlinkStateUnload(arg1, arg_this, arg3) knvlinkStateUnload_DISPATCH(arg1, arg_this, arg3) -#define knvlinkStatePostUnload_FNPTR(arg_this) arg_this->__knvlinkStatePostUnload__ +#define knvlinkStatePostUnload_FNPTR(arg_this) arg_this->__nvoc_vtable->__knvlinkStatePostUnload__ #define knvlinkStatePostUnload(arg1, arg_this, arg3) knvlinkStatePostUnload_DISPATCH(arg1, arg_this, arg3) -#define knvlinkIsPresent_FNPTR(arg_this) arg_this->__knvlinkIsPresent__ +#define knvlinkIsPresent_FNPTR(arg_this) arg_this->__nvoc_vtable->__knvlinkIsPresent__ #define knvlinkIsPresent(arg1, arg_this) knvlinkIsPresent_DISPATCH(arg1, arg_this) #define knvlinkSetUniqueFabricBaseAddress_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkSetUniqueFabricBaseAddress__ #define knvlinkSetUniqueFabricBaseAddress(pGpu, pKernelNvlink, arg3) knvlinkSetUniqueFabricBaseAddress_DISPATCH(pGpu, pKernelNvlink, arg3) @@ -660,6 +689,15 @@ NV_STATUS __nvoc_objCreate_KernelNvlink(KernelNvlink**, Dynamic*, NvU32); #define knvlinkIsBandwidthModeOff_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkIsBandwidthModeOff__ #define knvlinkIsBandwidthModeOff(pKernelNvlink) knvlinkIsBandwidthModeOff_DISPATCH(pKernelNvlink) #define knvlinkIsBandwidthModeOff_HAL(pKernelNvlink) knvlinkIsBandwidthModeOff_DISPATCH(pKernelNvlink) +#define knvlinkIsBwModeSupported_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkIsBwModeSupported__ +#define knvlinkIsBwModeSupported(pGpu, pKernelNvlink, mode) knvlinkIsBwModeSupported_DISPATCH(pGpu, pKernelNvlink, mode) +#define knvlinkIsBwModeSupported_HAL(pGpu, pKernelNvlink, mode) knvlinkIsBwModeSupported_DISPATCH(pGpu, pKernelNvlink, mode) +#define knvlinkGetHshubSupportedRbmModes_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkGetHshubSupportedRbmModes__ +#define knvlinkGetHshubSupportedRbmModes(pGpu, pKernelNvlink) knvlinkGetHshubSupportedRbmModes_DISPATCH(pGpu, pKernelNvlink) +#define knvlinkGetHshubSupportedRbmModes_HAL(pGpu, pKernelNvlink) knvlinkGetHshubSupportedRbmModes_DISPATCH(pGpu, pKernelNvlink) +#define knvlinkGetSupportedBwMode_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkGetSupportedBwMode__ +#define knvlinkGetSupportedBwMode(pGpu, pKernelNvlink, pParams) knvlinkGetSupportedBwMode_DISPATCH(pGpu, pKernelNvlink, pParams) +#define knvlinkGetSupportedBwMode_HAL(pGpu, pKernelNvlink, pParams) knvlinkGetSupportedBwMode_DISPATCH(pGpu, pKernelNvlink, pParams) #define knvlinkDirectConnectCheck_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkDirectConnectCheck__ #define knvlinkDirectConnectCheck(pGpu, pKernelNvlink) knvlinkDirectConnectCheck_DISPATCH(pGpu, pKernelNvlink) #define knvlinkDirectConnectCheck_HAL(pGpu, pKernelNvlink) knvlinkDirectConnectCheck_DISPATCH(pGpu, pKernelNvlink) @@ -672,48 +710,48 @@ NV_STATUS __nvoc_objCreate_KernelNvlink(KernelNvlink**, Dynamic*, NvU32); #define knvlinkGetSupportedCounters_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkGetSupportedCounters__ #define knvlinkGetSupportedCounters(pGpu, pKernelNvlink, pParams) knvlinkGetSupportedCounters_DISPATCH(pGpu, pKernelNvlink, pParams) #define knvlinkGetSupportedCounters_HAL(pGpu, pKernelNvlink, pParams) knvlinkGetSupportedCounters_DISPATCH(pGpu, pKernelNvlink, pParams) -#define knvlinkInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define knvlinkInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define knvlinkInitMissing(pGpu, pEngstate) knvlinkInitMissing_DISPATCH(pGpu, pEngstate) -#define knvlinkStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define knvlinkStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define knvlinkStatePreInitUnlocked(pGpu, pEngstate) knvlinkStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define knvlinkStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define knvlinkStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitLocked__ #define knvlinkStateInitLocked(pGpu, pEngstate) knvlinkStateInitLocked_DISPATCH(pGpu, pEngstate) -#define knvlinkStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define knvlinkStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define knvlinkStateInitUnlocked(pGpu, pEngstate) knvlinkStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define knvlinkStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define knvlinkStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define knvlinkStatePreLoad(pGpu, pEngstate, arg3) knvlinkStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define knvlinkStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define knvlinkStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define knvlinkStatePreUnload(pGpu, pEngstate, arg3) knvlinkStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define knvlinkStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define knvlinkStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateDestroy__ #define knvlinkStateDestroy(pGpu, pEngstate) knvlinkStateDestroy_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS knvlinkConstructEngine_DISPATCH(struct OBJGPU *arg1, struct KernelNvlink *arg_this, ENGDESCRIPTOR arg3) { - return arg_this->__knvlinkConstructEngine__(arg1, arg_this, arg3); + return arg_this->__nvoc_vtable->__knvlinkConstructEngine__(arg1, arg_this, arg3); } static inline NV_STATUS knvlinkStatePreInitLocked_DISPATCH(struct OBJGPU *arg1, struct KernelNvlink *arg_this) { - return arg_this->__knvlinkStatePreInitLocked__(arg1, arg_this); + return arg_this->__nvoc_vtable->__knvlinkStatePreInitLocked__(arg1, arg_this); } static inline NV_STATUS knvlinkStateLoad_DISPATCH(struct OBJGPU *arg1, struct KernelNvlink *arg_this, NvU32 arg3) { - return arg_this->__knvlinkStateLoad__(arg1, arg_this, arg3); + return arg_this->__nvoc_vtable->__knvlinkStateLoad__(arg1, arg_this, arg3); } static inline NV_STATUS knvlinkStatePostLoad_DISPATCH(struct OBJGPU *arg1, struct KernelNvlink *arg_this, NvU32 arg3) { - return arg_this->__knvlinkStatePostLoad__(arg1, arg_this, arg3); + return arg_this->__nvoc_vtable->__knvlinkStatePostLoad__(arg1, arg_this, arg3); } static inline NV_STATUS knvlinkStateUnload_DISPATCH(struct OBJGPU *arg1, struct KernelNvlink *arg_this, NvU32 arg3) { - return arg_this->__knvlinkStateUnload__(arg1, arg_this, arg3); + return arg_this->__nvoc_vtable->__knvlinkStateUnload__(arg1, arg_this, arg3); } static inline NV_STATUS knvlinkStatePostUnload_DISPATCH(struct OBJGPU *arg1, struct KernelNvlink *arg_this, NvU32 arg3) { - return arg_this->__knvlinkStatePostUnload__(arg1, arg_this, arg3); + return arg_this->__nvoc_vtable->__knvlinkStatePostUnload__(arg1, arg_this, arg3); } static inline NvBool knvlinkIsPresent_DISPATCH(struct OBJGPU *arg1, struct KernelNvlink *arg_this) { - return arg_this->__knvlinkIsPresent__(arg1, arg_this); + return arg_this->__nvoc_vtable->__knvlinkIsPresent__(arg1, arg_this); } static inline NV_STATUS knvlinkSetUniqueFabricBaseAddress_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg3) { @@ -824,6 +862,18 @@ static inline NvBool knvlinkIsBandwidthModeOff_DISPATCH(struct KernelNvlink *pKe return pKernelNvlink->__knvlinkIsBandwidthModeOff__(pKernelNvlink); } +static inline NvBool knvlinkIsBwModeSupported_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU8 mode) { + return pKernelNvlink->__knvlinkIsBwModeSupported__(pGpu, pKernelNvlink, mode); +} + +static inline NV_STATUS knvlinkGetHshubSupportedRbmModes_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { + return pKernelNvlink->__knvlinkGetHshubSupportedRbmModes__(pGpu, pKernelNvlink); +} + +static inline NV_STATUS knvlinkGetSupportedBwMode_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NV2080_CTRL_NVLINK_GET_SUPPORTED_BW_MODE_PARAMS *pParams) { + return pKernelNvlink->__knvlinkGetSupportedBwMode__(pGpu, pKernelNvlink, pParams); +} + static inline void knvlinkDirectConnectCheck_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { pKernelNvlink->__knvlinkDirectConnectCheck__(pGpu, pKernelNvlink); } @@ -841,31 +891,31 @@ static inline NV_STATUS knvlinkGetSupportedCounters_DISPATCH(struct OBJGPU *pGpu } static inline void knvlinkInitMissing_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate) { - pEngstate->__knvlinkInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__knvlinkInitMissing__(pGpu, pEngstate); } static inline NV_STATUS knvlinkStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate) { - return pEngstate->__knvlinkStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__knvlinkStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS knvlinkStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate) { - return pEngstate->__knvlinkStateInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__knvlinkStateInitLocked__(pGpu, pEngstate); } static inline NV_STATUS knvlinkStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate) { - return pEngstate->__knvlinkStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__knvlinkStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS knvlinkStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate, NvU32 arg3) { - return pEngstate->__knvlinkStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__knvlinkStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS knvlinkStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate, NvU32 arg3) { - return pEngstate->__knvlinkStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__knvlinkStatePreUnload__(pGpu, pEngstate, arg3); } static inline void knvlinkStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pEngstate) { - pEngstate->__knvlinkStateDestroy__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__knvlinkStateDestroy__(pGpu, pEngstate); } NvBool knvlinkIsForcedConfig_IMPL(struct OBJGPU *arg1, struct KernelNvlink *arg2); @@ -1439,19 +1489,19 @@ static inline NV_STATUS knvlinkInbandMsgCallbackDispatcher(struct OBJGPU *pGpu, #define knvlinkInbandMsgCallbackDispatcher_HAL(pGpu, pKernelNvLink, dataSize, pMessage) knvlinkInbandMsgCallbackDispatcher(pGpu, pKernelNvLink, dataSize, pMessage) -NV_STATUS knvlinkFatalErrorRecovery_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvLink); +NV_STATUS knvlinkFatalErrorRecovery_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvLink, NvBool bRecoverable); #ifdef __nvoc_kernel_nvlink_h_disabled -static inline NV_STATUS knvlinkFatalErrorRecovery(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvLink) { +static inline NV_STATUS knvlinkFatalErrorRecovery(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvLink, NvBool bRecoverable) { NV_ASSERT_FAILED_PRECOMP("KernelNvlink was disabled!"); return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_kernel_nvlink_h_disabled -#define knvlinkFatalErrorRecovery(pGpu, pKernelNvLink) knvlinkFatalErrorRecovery_IMPL(pGpu, pKernelNvLink) +#define knvlinkFatalErrorRecovery(pGpu, pKernelNvLink, bRecoverable) knvlinkFatalErrorRecovery_IMPL(pGpu, pKernelNvLink, bRecoverable) #endif //__nvoc_kernel_nvlink_h_disabled -#define knvlinkFatalErrorRecovery_HAL(pGpu, pKernelNvLink) knvlinkFatalErrorRecovery(pGpu, pKernelNvLink) +#define knvlinkFatalErrorRecovery_HAL(pGpu, pKernelNvLink, bRecoverable) knvlinkFatalErrorRecovery(pGpu, pKernelNvLink, bRecoverable) NV_STATUS knvlinkSendInbandData_IMPL(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NV2080_CTRL_NVLINK_INBAND_SEND_DATA_PARAMS *pParams); @@ -1894,8 +1944,8 @@ static inline NV_STATUS knvlinkProgramLinkSpeed_56cd7a(struct OBJGPU *pGpu, stru NV_STATUS knvlinkProgramLinkSpeed_GV100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); -static inline NvBool knvlinkPoweredUpForD3_491d52(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { - return ((NvBool)(0 != 0)); +static inline NvBool knvlinkPoweredUpForD3_3dd2c9(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { + return NV_FALSE; } NvBool knvlinkPoweredUpForD3_TU102(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); @@ -1944,26 +1994,48 @@ static inline NvU32 knvlinkGetNumLinksToBeReducedPerIoctrl_4a4dee(struct OBJGPU NvU32 knvlinkGetNumLinksToBeReducedPerIoctrl_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); -static inline NvBool knvlinkIsBandwidthModeOff_491d52(struct KernelNvlink *pKernelNvlink) { - return ((NvBool)(0 != 0)); +static inline NvBool knvlinkIsBandwidthModeOff_3dd2c9(struct KernelNvlink *pKernelNvlink) { + return NV_FALSE; } NvBool knvlinkIsBandwidthModeOff_GH100(struct KernelNvlink *pKernelNvlink); +static inline NvBool knvlinkIsBwModeSupported_3dd2c9(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU8 mode) { + return NV_FALSE; +} + +NvBool knvlinkIsBwModeSupported_GB100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU8 mode); + +NvBool knvlinkIsBwModeSupported_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU8 mode); + +NV_STATUS knvlinkGetHshubSupportedRbmModes_GB100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); + +static inline NV_STATUS knvlinkGetHshubSupportedRbmModes_46f6a7(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS knvlinkGetSupportedBwMode_GB100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NV2080_CTRL_NVLINK_GET_SUPPORTED_BW_MODE_PARAMS *pParams); + +NV_STATUS knvlinkGetSupportedBwMode_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NV2080_CTRL_NVLINK_GET_SUPPORTED_BW_MODE_PARAMS *pParams); + +static inline NV_STATUS knvlinkGetSupportedBwMode_46f6a7(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NV2080_CTRL_NVLINK_GET_SUPPORTED_BW_MODE_PARAMS *pParams) { + return NV_ERR_NOT_SUPPORTED; +} + static inline void knvlinkDirectConnectCheck_b3696a(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { return; } void knvlinkDirectConnectCheck_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); -static inline NvBool knvlinkIsGpuReducedNvlinkConfig_491d52(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { - return ((NvBool)(0 != 0)); +static inline NvBool knvlinkIsGpuReducedNvlinkConfig_3dd2c9(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) { + return NV_FALSE; } NvBool knvlinkIsGpuReducedNvlinkConfig_GA100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink); -static inline NvBool knvlinkIsFloorSweepingNeeded_491d52(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 numActiveLinksPerIoctrl, NvU32 numLinksPerIoctrl) { - return ((NvBool)(0 != 0)); +static inline NvBool knvlinkIsFloorSweepingNeeded_3dd2c9(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 numActiveLinksPerIoctrl, NvU32 numLinksPerIoctrl) { + return NV_FALSE; } NvBool knvlinkIsFloorSweepingNeeded_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU32 numActiveLinksPerIoctrl, NvU32 numLinksPerIoctrl); diff --git a/src/nvidia/generated/g_kernel_ofa_ctx_nvoc.c b/src/nvidia/generated/g_kernel_ofa_ctx_nvoc.c index 4a61893d49..a8da2b389b 100644 --- a/src/nvidia/generated/g_kernel_ofa_ctx_nvoc.c +++ b/src/nvidia/generated/g_kernel_ofa_ctx_nvoc.c @@ -120,165 +120,275 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OfaContext = /*pExportInfo=*/ &__nvoc_export_info_OfaContext }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super^2 +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super^2 +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap(struct RmResource *pChannelDescendant, NvBool bSubdeviceHandleProvided); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^3 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^3 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^3 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super^2 +NV_STATUS __nvoc_up_thunk_GpuResource_chandesControl(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesMap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesUnmap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_GpuResource_chandesShareCallback(struct ChannelDescendant *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize(struct ChannelDescendant *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesInternalControlForward(struct ChannelDescendant *pGpuResource, NvU32 command, void *pParams, NvU32 size); // super +NvHandle __nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle(struct ChannelDescendant *pGpuResource); // super +NvBool __nvoc_up_thunk_RmResource_chandesAccessCallback(struct ChannelDescendant *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemInterMapParams(struct ChannelDescendant *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor(struct ChannelDescendant *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControl_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControl_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesCanCopy(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesIsDuplicate(struct ChannelDescendant *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_chandesPreDestruct(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesControlFilter(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesMapTo(struct ChannelDescendant *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesUnmapFrom(struct ChannelDescendant *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_chandesGetRefCount(struct ChannelDescendant *pResource); // super +void __nvoc_up_thunk_RsResource_chandesAddAdditionalDependants(struct RsClient *pClient, struct ChannelDescendant *pResource, RsResourceRef *pReference); // super +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_chandesGetNotificationListPtr(struct ChannelDescendant *pNotifier); // super +struct NotifShare * __nvoc_up_thunk_Notifier_chandesGetNotificationShare(struct ChannelDescendant *pNotifier); // super +void __nvoc_up_thunk_Notifier_chandesSetNotificationShare(struct ChannelDescendant *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesUnregisterEvent(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_up_thunk_ChannelDescendant_ofactxGetSwMethods(struct OfaContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods); // this +NvBool __nvoc_up_thunk_ChannelDescendant_ofactxIsSwMethodStalling(struct OfaContext *pChannelDescendant, NvU32 hHandle); // this +NV_STATUS __nvoc_up_thunk_ChannelDescendant_ofactxCheckMemInterUnmap(struct OfaContext *pChannelDescendant, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_GpuResource_ofactxControl(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_ofactxMap(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_ofactxUnmap(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_ofactxShareCallback(struct OfaContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_ofactxGetRegBaseOffsetAndSize(struct OfaContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_ofactxGetMapAddrSpace(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_ofactxInternalControlForward(struct OfaContext *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_ofactxGetInternalObjectHandle(struct OfaContext *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_ofactxAccessCallback(struct OfaContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_ofactxGetMemInterMapParams(struct OfaContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_ofactxGetMemoryMappingDescriptor(struct OfaContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_ofactxControlSerialization_Prologue(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_ofactxControlSerialization_Epilogue(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_ofactxControl_Prologue(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_ofactxControl_Epilogue(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_ofactxCanCopy(struct OfaContext *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_ofactxIsDuplicate(struct OfaContext *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_ofactxPreDestruct(struct OfaContext *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_ofactxControlFilter(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_ofactxIsPartialUnmapSupported(struct OfaContext *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_ofactxMapTo(struct OfaContext *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_ofactxUnmapFrom(struct OfaContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_ofactxGetRefCount(struct OfaContext *pResource); // this +void __nvoc_up_thunk_RsResource_ofactxAddAdditionalDependants(struct RsClient *pClient, struct OfaContext *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_ofactxGetNotificationListPtr(struct OfaContext *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_ofactxGetNotificationShare(struct OfaContext *pNotifier); // this +void __nvoc_up_thunk_Notifier_ofactxSetNotificationShare(struct OfaContext *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_ofactxUnregisterEvent(struct OfaContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_ofactxGetOrAllocNotifShare(struct OfaContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 32 up-thunk(s) defined to bridge methods in OfaContext to superclasses // ofactxGetSwMethods: virtual inherited (chandes) base (chandes) -static NV_STATUS __nvoc_up_thunk_ChannelDescendant_ofactxGetSwMethods(struct OfaContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { +NV_STATUS __nvoc_up_thunk_ChannelDescendant_ofactxGetSwMethods(struct OfaContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { return chandesGetSwMethods((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_OfaContext_ChannelDescendant.offset), ppMethods, pNumMethods); } // ofactxIsSwMethodStalling: virtual inherited (chandes) base (chandes) -static NvBool __nvoc_up_thunk_ChannelDescendant_ofactxIsSwMethodStalling(struct OfaContext *pChannelDescendant, NvU32 hHandle) { +NvBool __nvoc_up_thunk_ChannelDescendant_ofactxIsSwMethodStalling(struct OfaContext *pChannelDescendant, NvU32 hHandle) { return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_OfaContext_ChannelDescendant.offset), hHandle); } // ofactxCheckMemInterUnmap: virtual inherited (chandes) base (chandes) -static NV_STATUS __nvoc_up_thunk_ChannelDescendant_ofactxCheckMemInterUnmap(struct OfaContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_ChannelDescendant_ofactxCheckMemInterUnmap(struct OfaContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_OfaContext_ChannelDescendant.offset), bSubdeviceHandleProvided); } // ofactxControl: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_ofactxControl(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_ofactxControl(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset), pCallContext, pParams); } // ofactxMap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_ofactxMap(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_ofactxMap(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // ofactxUnmap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_ofactxUnmap(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_ofactxUnmap(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset), pCallContext, pCpuMapping); } // ofactxShareCallback: virtual inherited (gpures) base (chandes) -static NvBool __nvoc_up_thunk_GpuResource_ofactxShareCallback(struct OfaContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_ofactxShareCallback(struct OfaContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // ofactxGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_ofactxGetRegBaseOffsetAndSize(struct OfaContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_ofactxGetRegBaseOffsetAndSize(struct OfaContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset), pGpu, pOffset, pSize); } // ofactxGetMapAddrSpace: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_ofactxGetMapAddrSpace(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_ofactxGetMapAddrSpace(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // ofactxInternalControlForward: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_ofactxInternalControlForward(struct OfaContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_ofactxInternalControlForward(struct OfaContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset), command, pParams, size); } // ofactxGetInternalObjectHandle: virtual inherited (gpures) base (chandes) -static NvHandle __nvoc_up_thunk_GpuResource_ofactxGetInternalObjectHandle(struct OfaContext *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_ofactxGetInternalObjectHandle(struct OfaContext *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_OfaContext_GpuResource.offset)); } // ofactxAccessCallback: virtual inherited (rmres) base (chandes) -static NvBool __nvoc_up_thunk_RmResource_ofactxAccessCallback(struct OfaContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_ofactxAccessCallback(struct OfaContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // ofactxGetMemInterMapParams: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_ofactxGetMemInterMapParams(struct OfaContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_ofactxGetMemInterMapParams(struct OfaContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_OfaContext_RmResource.offset), pParams); } // ofactxGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_ofactxGetMemoryMappingDescriptor(struct OfaContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_ofactxGetMemoryMappingDescriptor(struct OfaContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_OfaContext_RmResource.offset), ppMemDesc); } // ofactxControlSerialization_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_ofactxControlSerialization_Prologue(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_ofactxControlSerialization_Prologue(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RmResource.offset), pCallContext, pParams); } // ofactxControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_ofactxControlSerialization_Epilogue(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_ofactxControlSerialization_Epilogue(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RmResource.offset), pCallContext, pParams); } // ofactxControl_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_ofactxControl_Prologue(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_ofactxControl_Prologue(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RmResource.offset), pCallContext, pParams); } // ofactxControl_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_ofactxControl_Epilogue(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_ofactxControl_Epilogue(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RmResource.offset), pCallContext, pParams); } // ofactxCanCopy: virtual inherited (res) base (chandes) -static NvBool __nvoc_up_thunk_RsResource_ofactxCanCopy(struct OfaContext *pResource) { +NvBool __nvoc_up_thunk_RsResource_ofactxCanCopy(struct OfaContext *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RsResource.offset)); } // ofactxIsDuplicate: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_ofactxIsDuplicate(struct OfaContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_ofactxIsDuplicate(struct OfaContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RsResource.offset), hMemory, pDuplicate); } // ofactxPreDestruct: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_ofactxPreDestruct(struct OfaContext *pResource) { +void __nvoc_up_thunk_RsResource_ofactxPreDestruct(struct OfaContext *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RsResource.offset)); } // ofactxControlFilter: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_ofactxControlFilter(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_ofactxControlFilter(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RsResource.offset), pCallContext, pParams); } // ofactxIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body -static NvBool __nvoc_up_thunk_RsResource_ofactxIsPartialUnmapSupported(struct OfaContext *pResource) { +NvBool __nvoc_up_thunk_RsResource_ofactxIsPartialUnmapSupported(struct OfaContext *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RsResource.offset)); } // ofactxMapTo: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_ofactxMapTo(struct OfaContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_ofactxMapTo(struct OfaContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RsResource.offset), pParams); } // ofactxUnmapFrom: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_ofactxUnmapFrom(struct OfaContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_ofactxUnmapFrom(struct OfaContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RsResource.offset), pParams); } // ofactxGetRefCount: virtual inherited (res) base (chandes) -static NvU32 __nvoc_up_thunk_RsResource_ofactxGetRefCount(struct OfaContext *pResource) { +NvU32 __nvoc_up_thunk_RsResource_ofactxGetRefCount(struct OfaContext *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RsResource.offset)); } // ofactxAddAdditionalDependants: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_ofactxAddAdditionalDependants(struct RsClient *pClient, struct OfaContext *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_ofactxAddAdditionalDependants(struct RsClient *pClient, struct OfaContext *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OfaContext_RsResource.offset), pReference); } // ofactxGetNotificationListPtr: virtual inherited (notify) base (chandes) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_ofactxGetNotificationListPtr(struct OfaContext *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_ofactxGetNotificationListPtr(struct OfaContext *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_OfaContext_Notifier.offset)); } // ofactxGetNotificationShare: virtual inherited (notify) base (chandes) -static struct NotifShare * __nvoc_up_thunk_Notifier_ofactxGetNotificationShare(struct OfaContext *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_ofactxGetNotificationShare(struct OfaContext *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_OfaContext_Notifier.offset)); } // ofactxSetNotificationShare: virtual inherited (notify) base (chandes) -static void __nvoc_up_thunk_Notifier_ofactxSetNotificationShare(struct OfaContext *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_ofactxSetNotificationShare(struct OfaContext *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_OfaContext_Notifier.offset), pNotifShare); } // ofactxUnregisterEvent: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_ofactxUnregisterEvent(struct OfaContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_ofactxUnregisterEvent(struct OfaContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_OfaContext_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // ofactxGetOrAllocNotifShare: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_ofactxGetOrAllocNotifShare(struct OfaContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_ofactxGetOrAllocNotifShare(struct OfaContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_OfaContext_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -332,109 +442,162 @@ static void __nvoc_init_funcTable_OfaContext_1(OfaContext *pThis, RmHalspecOwner PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - - // ofactxGetSwMethods -- virtual inherited (chandes) base (chandes) - pThis->__ofactxGetSwMethods__ = &__nvoc_up_thunk_ChannelDescendant_ofactxGetSwMethods; - - // ofactxIsSwMethodStalling -- virtual inherited (chandes) base (chandes) - pThis->__ofactxIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_ofactxIsSwMethodStalling; - - // ofactxCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) - pThis->__ofactxCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_ofactxCheckMemInterUnmap; - - // ofactxControl -- virtual inherited (gpures) base (chandes) - pThis->__ofactxControl__ = &__nvoc_up_thunk_GpuResource_ofactxControl; - - // ofactxMap -- virtual inherited (gpures) base (chandes) - pThis->__ofactxMap__ = &__nvoc_up_thunk_GpuResource_ofactxMap; - - // ofactxUnmap -- virtual inherited (gpures) base (chandes) - pThis->__ofactxUnmap__ = &__nvoc_up_thunk_GpuResource_ofactxUnmap; - - // ofactxShareCallback -- virtual inherited (gpures) base (chandes) - pThis->__ofactxShareCallback__ = &__nvoc_up_thunk_GpuResource_ofactxShareCallback; - - // ofactxGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) - pThis->__ofactxGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_ofactxGetRegBaseOffsetAndSize; - - // ofactxGetMapAddrSpace -- virtual inherited (gpures) base (chandes) - pThis->__ofactxGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_ofactxGetMapAddrSpace; - - // ofactxInternalControlForward -- virtual inherited (gpures) base (chandes) - pThis->__ofactxInternalControlForward__ = &__nvoc_up_thunk_GpuResource_ofactxInternalControlForward; - - // ofactxGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) - pThis->__ofactxGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_ofactxGetInternalObjectHandle; - - // ofactxAccessCallback -- virtual inherited (rmres) base (chandes) - pThis->__ofactxAccessCallback__ = &__nvoc_up_thunk_RmResource_ofactxAccessCallback; - - // ofactxGetMemInterMapParams -- virtual inherited (rmres) base (chandes) - pThis->__ofactxGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_ofactxGetMemInterMapParams; - - // ofactxGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) - pThis->__ofactxGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_ofactxGetMemoryMappingDescriptor; - - // ofactxControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__ofactxControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_ofactxControlSerialization_Prologue; - - // ofactxControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__ofactxControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_ofactxControlSerialization_Epilogue; - - // ofactxControl_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__ofactxControl_Prologue__ = &__nvoc_up_thunk_RmResource_ofactxControl_Prologue; - - // ofactxControl_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__ofactxControl_Epilogue__ = &__nvoc_up_thunk_RmResource_ofactxControl_Epilogue; - - // ofactxCanCopy -- virtual inherited (res) base (chandes) - pThis->__ofactxCanCopy__ = &__nvoc_up_thunk_RsResource_ofactxCanCopy; - - // ofactxIsDuplicate -- virtual inherited (res) base (chandes) - pThis->__ofactxIsDuplicate__ = &__nvoc_up_thunk_RsResource_ofactxIsDuplicate; - - // ofactxPreDestruct -- virtual inherited (res) base (chandes) - pThis->__ofactxPreDestruct__ = &__nvoc_up_thunk_RsResource_ofactxPreDestruct; - - // ofactxControlFilter -- virtual inherited (res) base (chandes) - pThis->__ofactxControlFilter__ = &__nvoc_up_thunk_RsResource_ofactxControlFilter; - - // ofactxIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body - pThis->__ofactxIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_ofactxIsPartialUnmapSupported; - - // ofactxMapTo -- virtual inherited (res) base (chandes) - pThis->__ofactxMapTo__ = &__nvoc_up_thunk_RsResource_ofactxMapTo; - - // ofactxUnmapFrom -- virtual inherited (res) base (chandes) - pThis->__ofactxUnmapFrom__ = &__nvoc_up_thunk_RsResource_ofactxUnmapFrom; - - // ofactxGetRefCount -- virtual inherited (res) base (chandes) - pThis->__ofactxGetRefCount__ = &__nvoc_up_thunk_RsResource_ofactxGetRefCount; - - // ofactxAddAdditionalDependants -- virtual inherited (res) base (chandes) - pThis->__ofactxAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_ofactxAddAdditionalDependants; - - // ofactxGetNotificationListPtr -- virtual inherited (notify) base (chandes) - pThis->__ofactxGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_ofactxGetNotificationListPtr; - - // ofactxGetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__ofactxGetNotificationShare__ = &__nvoc_up_thunk_Notifier_ofactxGetNotificationShare; - - // ofactxSetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__ofactxSetNotificationShare__ = &__nvoc_up_thunk_Notifier_ofactxSetNotificationShare; - - // ofactxUnregisterEvent -- virtual inherited (notify) base (chandes) - pThis->__ofactxUnregisterEvent__ = &__nvoc_up_thunk_Notifier_ofactxUnregisterEvent; - - // ofactxGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) - pThis->__ofactxGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_ofactxGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_OfaContext_1 with approximately 32 basic block(s). +} // End __nvoc_init_funcTable_OfaContext_1 // Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_OfaContext(OfaContext *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 32 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__OfaContext vtable = { + .__ofactxGetSwMethods__ = &__nvoc_up_thunk_ChannelDescendant_ofactxGetSwMethods, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesGetSwMethods__ = &chandesGetSwMethods_IMPL, // virtual + .__ofactxIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_ofactxIsSwMethodStalling, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesIsSwMethodStalling__ = &chandesIsSwMethodStalling_IMPL, // virtual + .__ofactxCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_ofactxCheckMemInterUnmap, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesCheckMemInterUnmap__ = &chandesCheckMemInterUnmap_IMPL, // virtual override (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap, // virtual + .__ofactxControl__ = &__nvoc_up_thunk_GpuResource_ofactxControl, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesControl__ = &__nvoc_up_thunk_GpuResource_chandesControl, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__ofactxMap__ = &__nvoc_up_thunk_GpuResource_ofactxMap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesMap__ = &__nvoc_up_thunk_GpuResource_chandesMap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__ofactxUnmap__ = &__nvoc_up_thunk_GpuResource_ofactxUnmap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesUnmap__ = &__nvoc_up_thunk_GpuResource_chandesUnmap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__ofactxShareCallback__ = &__nvoc_up_thunk_GpuResource_ofactxShareCallback, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesShareCallback__ = &__nvoc_up_thunk_GpuResource_chandesShareCallback, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__ofactxGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_ofactxGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__ofactxGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_ofactxGetMapAddrSpace, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__ofactxInternalControlForward__ = &__nvoc_up_thunk_GpuResource_ofactxInternalControlForward, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesInternalControlForward__ = &__nvoc_up_thunk_GpuResource_chandesInternalControlForward, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__ofactxGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_ofactxGetInternalObjectHandle, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__ofactxAccessCallback__ = &__nvoc_up_thunk_RmResource_ofactxAccessCallback, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesAccessCallback__ = &__nvoc_up_thunk_RmResource_chandesAccessCallback, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__ofactxGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_ofactxGetMemInterMapParams, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_chandesGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__ofactxGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_ofactxGetMemoryMappingDescriptor, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__ofactxControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_ofactxControlSerialization_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__ofactxControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_ofactxControlSerialization_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__ofactxControl_Prologue__ = &__nvoc_up_thunk_RmResource_ofactxControl_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControl_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__ofactxControl_Epilogue__ = &__nvoc_up_thunk_RmResource_ofactxControl_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControl_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__ofactxCanCopy__ = &__nvoc_up_thunk_RsResource_ofactxCanCopy, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesCanCopy__ = &__nvoc_up_thunk_RsResource_chandesCanCopy, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__ofactxIsDuplicate__ = &__nvoc_up_thunk_RsResource_ofactxIsDuplicate, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesIsDuplicate__ = &__nvoc_up_thunk_RsResource_chandesIsDuplicate, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__ofactxPreDestruct__ = &__nvoc_up_thunk_RsResource_ofactxPreDestruct, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesPreDestruct__ = &__nvoc_up_thunk_RsResource_chandesPreDestruct, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__ofactxControlFilter__ = &__nvoc_up_thunk_RsResource_ofactxControlFilter, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesControlFilter__ = &__nvoc_up_thunk_RsResource_chandesControlFilter, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__ofactxIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_ofactxIsPartialUnmapSupported, // inline virtual inherited (res) base (chandes) body + .ChannelDescendant.__chandesIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .ChannelDescendant.GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .ChannelDescendant.GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__ofactxMapTo__ = &__nvoc_up_thunk_RsResource_ofactxMapTo, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesMapTo__ = &__nvoc_up_thunk_RsResource_chandesMapTo, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__ofactxUnmapFrom__ = &__nvoc_up_thunk_RsResource_ofactxUnmapFrom, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesUnmapFrom__ = &__nvoc_up_thunk_RsResource_chandesUnmapFrom, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__ofactxGetRefCount__ = &__nvoc_up_thunk_RsResource_ofactxGetRefCount, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesGetRefCount__ = &__nvoc_up_thunk_RsResource_chandesGetRefCount, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__ofactxAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_ofactxAddAdditionalDependants, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_chandesAddAdditionalDependants, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__ofactxGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_ofactxGetNotificationListPtr, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationListPtr, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__ofactxGetNotificationShare__ = &__nvoc_up_thunk_Notifier_ofactxGetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__ofactxSetNotificationShare__ = &__nvoc_up_thunk_Notifier_ofactxSetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesSetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesSetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__ofactxUnregisterEvent__ = &__nvoc_up_thunk_Notifier_ofactxUnregisterEvent, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesUnregisterEvent__ = &__nvoc_up_thunk_Notifier_chandesUnregisterEvent, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__ofactxGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_ofactxGetOrAllocNotifShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource.RsResource; // (res) super^4 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource; // (rmres) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource; // (gpures) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier.INotifier; // (inotify) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier; // (notify) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_vtable = &vtable.ChannelDescendant; // (chandes) super + pThis->__nvoc_vtable = &vtable; // (ofactx) this __nvoc_init_funcTable_OfaContext_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_ofa_ctx_nvoc.h b/src/nvidia/generated/g_kernel_ofa_ctx_nvoc.h index ace67cc681..8ff55e12b0 100644 --- a/src/nvidia/generated/g_kernel_ofa_ctx_nvoc.h +++ b/src/nvidia/generated/g_kernel_ofa_ctx_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -60,10 +60,15 @@ ENGDESCRIPTOR ofaGetEngineDescFromAllocParams(OBJGPU *pGpu, NvU32 externalClassI #endif +// Metadata including vtable +struct NVOC_VTABLE__OfaContext; + + struct OfaContext { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__OfaContext *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; @@ -78,8 +83,13 @@ struct OfaContext { struct Notifier *__nvoc_pbase_Notifier; // notify super^2 struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super struct OfaContext *__nvoc_pbase_OfaContext; // ofactx +}; + + +// Metadata including vtable with 32 function pointers plus superclass metadata +struct NVOC_VTABLE__OfaContext { + const struct NVOC_VTABLE__ChannelDescendant ChannelDescendant; // (chandes) 32 function pointers - // Vtable with 32 per-object function pointers NV_STATUS (*__ofactxGetSwMethods__)(struct OfaContext * /*this*/, const METHOD **, NvU32 *); // virtual inherited (chandes) base (chandes) NvBool (*__ofactxIsSwMethodStalling__)(struct OfaContext * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) NV_STATUS (*__ofactxCheckMemInterUnmap__)(struct OfaContext * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) @@ -144,198 +154,198 @@ NV_STATUS __nvoc_objCreate_OfaContext(OfaContext**, Dynamic*, NvU32, struct CALL // Wrapper macros -#define ofactxGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ +#define ofactxGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesGetSwMethods__ #define ofactxGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) ofactxGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) -#define ofactxIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ +#define ofactxIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesIsSwMethodStalling__ #define ofactxIsSwMethodStalling(pChannelDescendant, hHandle) ofactxIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define ofactxCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ +#define ofactxCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesCheckMemInterUnmap__ #define ofactxCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) ofactxCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) -#define ofactxControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define ofactxControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define ofactxControl(pGpuResource, pCallContext, pParams) ofactxControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define ofactxMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define ofactxMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define ofactxMap(pGpuResource, pCallContext, pParams, pCpuMapping) ofactxMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define ofactxUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define ofactxUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define ofactxUnmap(pGpuResource, pCallContext, pCpuMapping) ofactxUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define ofactxShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ +#define ofactxShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define ofactxShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) ofactxShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define ofactxGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define ofactxGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define ofactxGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) ofactxGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define ofactxGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define ofactxGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define ofactxGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) ofactxGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define ofactxInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define ofactxInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define ofactxInternalControlForward(pGpuResource, command, pParams, size) ofactxInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define ofactxGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define ofactxGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define ofactxGetInternalObjectHandle(pGpuResource) ofactxGetInternalObjectHandle_DISPATCH(pGpuResource) -#define ofactxAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define ofactxAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define ofactxAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) ofactxAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define ofactxGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define ofactxGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define ofactxGetMemInterMapParams(pRmResource, pParams) ofactxGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define ofactxGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define ofactxGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define ofactxGetMemoryMappingDescriptor(pRmResource, ppMemDesc) ofactxGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define ofactxControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define ofactxControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define ofactxControlSerialization_Prologue(pResource, pCallContext, pParams) ofactxControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define ofactxControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define ofactxControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define ofactxControlSerialization_Epilogue(pResource, pCallContext, pParams) ofactxControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define ofactxControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define ofactxControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define ofactxControl_Prologue(pResource, pCallContext, pParams) ofactxControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define ofactxControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define ofactxControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define ofactxControl_Epilogue(pResource, pCallContext, pParams) ofactxControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define ofactxCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define ofactxCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define ofactxCanCopy(pResource) ofactxCanCopy_DISPATCH(pResource) -#define ofactxIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define ofactxIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define ofactxIsDuplicate(pResource, hMemory, pDuplicate) ofactxIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define ofactxPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define ofactxPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define ofactxPreDestruct(pResource) ofactxPreDestruct_DISPATCH(pResource) -#define ofactxControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define ofactxControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define ofactxControlFilter(pResource, pCallContext, pParams) ofactxControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define ofactxIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define ofactxIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define ofactxIsPartialUnmapSupported(pResource) ofactxIsPartialUnmapSupported_DISPATCH(pResource) -#define ofactxMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define ofactxMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define ofactxMapTo(pResource, pParams) ofactxMapTo_DISPATCH(pResource, pParams) -#define ofactxUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define ofactxUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define ofactxUnmapFrom(pResource, pParams) ofactxUnmapFrom_DISPATCH(pResource, pParams) -#define ofactxGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define ofactxGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define ofactxGetRefCount(pResource) ofactxGetRefCount_DISPATCH(pResource) -#define ofactxAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define ofactxAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define ofactxAddAdditionalDependants(pClient, pResource, pReference) ofactxAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define ofactxGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define ofactxGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define ofactxGetNotificationListPtr(pNotifier) ofactxGetNotificationListPtr_DISPATCH(pNotifier) -#define ofactxGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define ofactxGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define ofactxGetNotificationShare(pNotifier) ofactxGetNotificationShare_DISPATCH(pNotifier) -#define ofactxSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define ofactxSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define ofactxSetNotificationShare(pNotifier, pNotifShare) ofactxSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define ofactxUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define ofactxUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define ofactxUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) ofactxUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define ofactxGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define ofactxGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define ofactxGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) ofactxGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS ofactxGetSwMethods_DISPATCH(struct OfaContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { - return pChannelDescendant->__ofactxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); + return pChannelDescendant->__nvoc_vtable->__ofactxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); } static inline NvBool ofactxIsSwMethodStalling_DISPATCH(struct OfaContext *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__ofactxIsSwMethodStalling__(pChannelDescendant, hHandle); + return pChannelDescendant->__nvoc_vtable->__ofactxIsSwMethodStalling__(pChannelDescendant, hHandle); } static inline NV_STATUS ofactxCheckMemInterUnmap_DISPATCH(struct OfaContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return pChannelDescendant->__ofactxCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); + return pChannelDescendant->__nvoc_vtable->__ofactxCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } static inline NV_STATUS ofactxControl_DISPATCH(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__ofactxControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__ofactxControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS ofactxMap_DISPATCH(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__ofactxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__ofactxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS ofactxUnmap_DISPATCH(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__ofactxUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__ofactxUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool ofactxShareCallback_DISPATCH(struct OfaContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__ofactxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__ofactxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS ofactxGetRegBaseOffsetAndSize_DISPATCH(struct OfaContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__ofactxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__ofactxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS ofactxGetMapAddrSpace_DISPATCH(struct OfaContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__ofactxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__ofactxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS ofactxInternalControlForward_DISPATCH(struct OfaContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__ofactxInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__ofactxInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle ofactxGetInternalObjectHandle_DISPATCH(struct OfaContext *pGpuResource) { - return pGpuResource->__ofactxGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__ofactxGetInternalObjectHandle__(pGpuResource); } static inline NvBool ofactxAccessCallback_DISPATCH(struct OfaContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__ofactxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__ofactxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS ofactxGetMemInterMapParams_DISPATCH(struct OfaContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__ofactxGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__ofactxGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS ofactxGetMemoryMappingDescriptor_DISPATCH(struct OfaContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__ofactxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__ofactxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS ofactxControlSerialization_Prologue_DISPATCH(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ofactxControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__ofactxControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void ofactxControlSerialization_Epilogue_DISPATCH(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__ofactxControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__ofactxControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS ofactxControl_Prologue_DISPATCH(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ofactxControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__ofactxControl_Prologue__(pResource, pCallContext, pParams); } static inline void ofactxControl_Epilogue_DISPATCH(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__ofactxControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__ofactxControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool ofactxCanCopy_DISPATCH(struct OfaContext *pResource) { - return pResource->__ofactxCanCopy__(pResource); + return pResource->__nvoc_vtable->__ofactxCanCopy__(pResource); } static inline NV_STATUS ofactxIsDuplicate_DISPATCH(struct OfaContext *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__ofactxIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__ofactxIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void ofactxPreDestruct_DISPATCH(struct OfaContext *pResource) { - pResource->__ofactxPreDestruct__(pResource); + pResource->__nvoc_vtable->__ofactxPreDestruct__(pResource); } static inline NV_STATUS ofactxControlFilter_DISPATCH(struct OfaContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ofactxControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__ofactxControlFilter__(pResource, pCallContext, pParams); } static inline NvBool ofactxIsPartialUnmapSupported_DISPATCH(struct OfaContext *pResource) { - return pResource->__ofactxIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__ofactxIsPartialUnmapSupported__(pResource); } static inline NV_STATUS ofactxMapTo_DISPATCH(struct OfaContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__ofactxMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__ofactxMapTo__(pResource, pParams); } static inline NV_STATUS ofactxUnmapFrom_DISPATCH(struct OfaContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__ofactxUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__ofactxUnmapFrom__(pResource, pParams); } static inline NvU32 ofactxGetRefCount_DISPATCH(struct OfaContext *pResource) { - return pResource->__ofactxGetRefCount__(pResource); + return pResource->__nvoc_vtable->__ofactxGetRefCount__(pResource); } static inline void ofactxAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct OfaContext *pResource, RsResourceRef *pReference) { - pResource->__ofactxAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__ofactxAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * ofactxGetNotificationListPtr_DISPATCH(struct OfaContext *pNotifier) { - return pNotifier->__ofactxGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__ofactxGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * ofactxGetNotificationShare_DISPATCH(struct OfaContext *pNotifier) { - return pNotifier->__ofactxGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__ofactxGetNotificationShare__(pNotifier); } static inline void ofactxSetNotificationShare_DISPATCH(struct OfaContext *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__ofactxSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__ofactxSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS ofactxUnregisterEvent_DISPATCH(struct OfaContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__ofactxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__ofactxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS ofactxGetOrAllocNotifShare_DISPATCH(struct OfaContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__ofactxGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__ofactxGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS ofactxConstructHal_KERNEL(struct OfaContext *pOfaContext, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); diff --git a/src/nvidia/generated/g_kernel_rc_nvoc.c b/src/nvidia/generated/g_kernel_rc_nvoc.c index 292daff46c..a61de1dbe7 100644 --- a/src/nvidia/generated/g_kernel_rc_nvoc.c +++ b/src/nvidia/generated/g_kernel_rc_nvoc.c @@ -66,78 +66,96 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelRc = /*pExportInfo=*/ &__nvoc_export_info_KernelRc }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_KernelRc_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelRc, ENGDESCRIPTOR engDescriptor); // this + // 1 down-thunk(s) defined to bridge methods in KernelRc from superclasses // krcConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_KernelRc_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelRc, ENGDESCRIPTOR engDescriptor) { +NV_STATUS __nvoc_down_thunk_KernelRc_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelRc, ENGDESCRIPTOR engDescriptor) { return krcConstructEngine(pGpu, (struct KernelRc *)(((unsigned char *) pKernelRc) - __nvoc_rtti_KernelRc_OBJENGSTATE.offset), engDescriptor); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_krcInitMissing(struct OBJGPU *pGpu, struct KernelRc *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePreInitLocked(struct OBJGPU *pGpu, struct KernelRc *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelRc *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStateInitLocked(struct OBJGPU *pGpu, struct KernelRc *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStateInitUnlocked(struct OBJGPU *pGpu, struct KernelRc *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePreLoad(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStateLoad(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePostLoad(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePreUnload(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStateUnload(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePostUnload(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3); // this +void __nvoc_up_thunk_OBJENGSTATE_krcStateDestroy(struct OBJGPU *pGpu, struct KernelRc *pEngstate); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_krcIsPresent(struct OBJGPU *pGpu, struct KernelRc *pEngstate); // this + // 13 up-thunk(s) defined to bridge methods in KernelRc to superclasses // krcInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_krcInitMissing(struct OBJGPU *pGpu, struct KernelRc *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_krcInitMissing(struct OBJGPU *pGpu, struct KernelRc *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset)); } // krcStatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePreInitLocked(struct OBJGPU *pGpu, struct KernelRc *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePreInitLocked(struct OBJGPU *pGpu, struct KernelRc *pEngstate) { return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset)); } // krcStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelRc *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelRc *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset)); } // krcStateInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStateInitLocked(struct OBJGPU *pGpu, struct KernelRc *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStateInitLocked(struct OBJGPU *pGpu, struct KernelRc *pEngstate) { return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset)); } // krcStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStateInitUnlocked(struct OBJGPU *pGpu, struct KernelRc *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStateInitUnlocked(struct OBJGPU *pGpu, struct KernelRc *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset)); } // krcStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePreLoad(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePreLoad(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset), arg3); } // krcStateLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStateLoad(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStateLoad(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3) { return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset), arg3); } // krcStatePostLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePostLoad(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePostLoad(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3) { return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset), arg3); } // krcStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePreUnload(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePreUnload(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset), arg3); } // krcStateUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStateUnload(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStateUnload(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3) { return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset), arg3); } // krcStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePostUnload(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_krcStatePostUnload(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset), arg3); } // krcStateDestroy: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_krcStateDestroy(struct OBJGPU *pGpu, struct KernelRc *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_krcStateDestroy(struct OBJGPU *pGpu, struct KernelRc *pEngstate) { engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset)); } // krcIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_krcIsPresent(struct OBJGPU *pGpu, struct KernelRc *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_krcIsPresent(struct OBJGPU *pGpu, struct KernelRc *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelRc_OBJENGSTATE.offset)); } @@ -194,10 +212,6 @@ static void __nvoc_init_funcTable_KernelRc_1(KernelRc *pThis, RmHalspecOwner *pR PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); - // krcConstructEngine -- virtual override (engstate) base (engstate) - pThis->__krcConstructEngine__ = &krcConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelRc_engstateConstructEngine; - // krcWatchdogRecovery -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { @@ -207,52 +221,49 @@ static void __nvoc_init_funcTable_KernelRc_1(KernelRc *pThis, RmHalspecOwner *pR { pThis->__krcWatchdogRecovery__ = &krcWatchdogRecovery_KERNEL; } - - // krcInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__krcInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_krcInitMissing; - - // krcStatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__krcStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_krcStatePreInitLocked; - - // krcStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__krcStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_krcStatePreInitUnlocked; - - // krcStateInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__krcStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_krcStateInitLocked; - - // krcStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__krcStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_krcStateInitUnlocked; - - // krcStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__krcStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_krcStatePreLoad; - - // krcStateLoad -- virtual inherited (engstate) base (engstate) - pThis->__krcStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_krcStateLoad; - - // krcStatePostLoad -- virtual inherited (engstate) base (engstate) - pThis->__krcStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_krcStatePostLoad; - - // krcStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__krcStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_krcStatePreUnload; - - // krcStateUnload -- virtual inherited (engstate) base (engstate) - pThis->__krcStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_krcStateUnload; - - // krcStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__krcStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_krcStatePostUnload; - - // krcStateDestroy -- virtual inherited (engstate) base (engstate) - pThis->__krcStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_krcStateDestroy; - - // krcIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__krcIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_krcIsPresent; -} // End __nvoc_init_funcTable_KernelRc_1 with approximately 17 basic block(s). +} // End __nvoc_init_funcTable_KernelRc_1 with approximately 2 basic block(s). // Initialize vtable(s) for 15 virtual method(s). void __nvoc_init_funcTable_KernelRc(KernelRc *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 15 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelRc vtable = { + .__krcConstructEngine__ = &krcConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelRc_engstateConstructEngine, // virtual + .__krcInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_krcInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__krcStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_krcStatePreInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__krcStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_krcStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__krcStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_krcStateInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &engstateStateInitLocked_IMPL, // virtual + .__krcStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_krcStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__krcStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_krcStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__krcStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_krcStateLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &engstateStateLoad_IMPL, // virtual + .__krcStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_krcStatePostLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL, // virtual + .__krcStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_krcStatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__krcStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_krcStateUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &engstateStateUnload_IMPL, // virtual + .__krcStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_krcStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__krcStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_krcStateDestroy, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &engstateStateDestroy_IMPL, // virtual + .__krcIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_krcIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_vtable = &vtable; // (krc) this + + // Initialize vtable(s) with 1 per-object function pointer(s). __nvoc_init_funcTable_KernelRc_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_rc_nvoc.h b/src/nvidia/generated/g_kernel_rc_nvoc.h index e0df830c97..efbe30f360 100644 --- a/src/nvidia/generated/g_kernel_rc_nvoc.h +++ b/src/nvidia/generated/g_kernel_rc_nvoc.h @@ -7,14 +7,14 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -87,10 +87,15 @@ typedef enum { #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelRc; + + struct KernelRc { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelRc *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -100,9 +105,27 @@ struct KernelRc { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct KernelRc *__nvoc_pbase_KernelRc; // krc - // Vtable with 15 per-object function pointers - NV_STATUS (*__krcConstructEngine__)(struct OBJGPU *, struct KernelRc * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + // Vtable with 1 per-object function pointer void (*__krcWatchdogRecovery__)(struct OBJGPU *, struct KernelRc * /*this*/); // halified (2 hals) body + + // Data members + NvBool bRobustChannelsEnabled; + NvBool bBreakOnRc; + NvBool bLogEvents; + struct KernelChannel *pPreviousChannelInError; + NvBool bRcOnBar2Fault; + NvBool bGpuUuidLoggedOnce; + KernelWatchdog watchdog; + KernelWatchdogPersistent watchdogPersistent; + KernelWatchdogChannelInfo watchdogChannelInfo; +}; + + +// Metadata including vtable with 14 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelRc { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + + NV_STATUS (*__krcConstructEngine__)(struct OBJGPU *, struct KernelRc * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) void (*__krcInitMissing__)(struct OBJGPU *, struct KernelRc * /*this*/); // virtual inherited (engstate) base (engstate) NV_STATUS (*__krcStatePreInitLocked__)(struct OBJGPU *, struct KernelRc * /*this*/); // virtual inherited (engstate) base (engstate) NV_STATUS (*__krcStatePreInitUnlocked__)(struct OBJGPU *, struct KernelRc * /*this*/); // virtual inherited (engstate) base (engstate) @@ -116,17 +139,6 @@ struct KernelRc { NV_STATUS (*__krcStatePostUnload__)(struct OBJGPU *, struct KernelRc * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) void (*__krcStateDestroy__)(struct OBJGPU *, struct KernelRc * /*this*/); // virtual inherited (engstate) base (engstate) NvBool (*__krcIsPresent__)(struct OBJGPU *, struct KernelRc * /*this*/); // virtual inherited (engstate) base (engstate) - - // Data members - NvBool bRobustChannelsEnabled; - NvBool bBreakOnRc; - NvBool bLogEvents; - struct KernelChannel *pPreviousChannelInError; - NvBool bRcOnBar2Fault; - NvBool bGpuUuidLoggedOnce; - KernelWatchdog watchdog; - KernelWatchdogPersistent watchdogPersistent; - KernelWatchdogChannelInfo watchdogChannelInfo; }; #ifndef __NVOC_CLASS_KernelRc_TYPEDEF__ @@ -163,41 +175,41 @@ NV_STATUS __nvoc_objCreate_KernelRc(KernelRc**, Dynamic*, NvU32); // Wrapper macros -#define krcConstructEngine_FNPTR(pKernelRc) pKernelRc->__krcConstructEngine__ +#define krcConstructEngine_FNPTR(pKernelRc) pKernelRc->__nvoc_vtable->__krcConstructEngine__ #define krcConstructEngine(pGpu, pKernelRc, engDescriptor) krcConstructEngine_DISPATCH(pGpu, pKernelRc, engDescriptor) #define krcWatchdogRecovery_FNPTR(pKernelRc) pKernelRc->__krcWatchdogRecovery__ #define krcWatchdogRecovery(pGpu, pKernelRc) krcWatchdogRecovery_DISPATCH(pGpu, pKernelRc) #define krcWatchdogRecovery_HAL(pGpu, pKernelRc) krcWatchdogRecovery_DISPATCH(pGpu, pKernelRc) -#define krcInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define krcInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define krcInitMissing(pGpu, pEngstate) krcInitMissing_DISPATCH(pGpu, pEngstate) -#define krcStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define krcStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define krcStatePreInitLocked(pGpu, pEngstate) krcStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define krcStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define krcStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define krcStatePreInitUnlocked(pGpu, pEngstate) krcStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define krcStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define krcStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitLocked__ #define krcStateInitLocked(pGpu, pEngstate) krcStateInitLocked_DISPATCH(pGpu, pEngstate) -#define krcStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define krcStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define krcStateInitUnlocked(pGpu, pEngstate) krcStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define krcStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define krcStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define krcStatePreLoad(pGpu, pEngstate, arg3) krcStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define krcStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define krcStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateLoad__ #define krcStateLoad(pGpu, pEngstate, arg3) krcStateLoad_DISPATCH(pGpu, pEngstate, arg3) -#define krcStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define krcStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostLoad__ #define krcStatePostLoad(pGpu, pEngstate, arg3) krcStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define krcStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define krcStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define krcStatePreUnload(pGpu, pEngstate, arg3) krcStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define krcStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define krcStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateUnload__ #define krcStateUnload(pGpu, pEngstate, arg3) krcStateUnload_DISPATCH(pGpu, pEngstate, arg3) -#define krcStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define krcStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define krcStatePostUnload(pGpu, pEngstate, arg3) krcStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define krcStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define krcStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateDestroy__ #define krcStateDestroy(pGpu, pEngstate) krcStateDestroy_DISPATCH(pGpu, pEngstate) -#define krcIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define krcIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define krcIsPresent(pGpu, pEngstate) krcIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS krcConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelRc *pKernelRc, ENGDESCRIPTOR engDescriptor) { - return pKernelRc->__krcConstructEngine__(pGpu, pKernelRc, engDescriptor); + return pKernelRc->__nvoc_vtable->__krcConstructEngine__(pGpu, pKernelRc, engDescriptor); } static inline void krcWatchdogRecovery_DISPATCH(struct OBJGPU *pGpu, struct KernelRc *pKernelRc) { @@ -205,55 +217,55 @@ static inline void krcWatchdogRecovery_DISPATCH(struct OBJGPU *pGpu, struct Kern } static inline void krcInitMissing_DISPATCH(struct OBJGPU *pGpu, struct KernelRc *pEngstate) { - pEngstate->__krcInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__krcInitMissing__(pGpu, pEngstate); } static inline NV_STATUS krcStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelRc *pEngstate) { - return pEngstate->__krcStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__krcStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS krcStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelRc *pEngstate) { - return pEngstate->__krcStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__krcStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS krcStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelRc *pEngstate) { - return pEngstate->__krcStateInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__krcStateInitLocked__(pGpu, pEngstate); } static inline NV_STATUS krcStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelRc *pEngstate) { - return pEngstate->__krcStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__krcStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS krcStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3) { - return pEngstate->__krcStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__krcStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS krcStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3) { - return pEngstate->__krcStateLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__krcStateLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS krcStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3) { - return pEngstate->__krcStatePostLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__krcStatePostLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS krcStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3) { - return pEngstate->__krcStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__krcStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS krcStateUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3) { - return pEngstate->__krcStateUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__krcStateUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS krcStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelRc *pEngstate, NvU32 arg3) { - return pEngstate->__krcStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__krcStatePostUnload__(pGpu, pEngstate, arg3); } static inline void krcStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct KernelRc *pEngstate) { - pEngstate->__krcStateDestroy__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__krcStateDestroy__(pGpu, pEngstate); } static inline NvBool krcIsPresent_DISPATCH(struct OBJGPU *pGpu, struct KernelRc *pEngstate) { - return pEngstate->__krcIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__krcIsPresent__(pGpu, pEngstate); } NV_STATUS krcErrorWriteNotifier_CPU(struct OBJGPU *pGpu, struct KernelRc *pKernelRc, struct KernelChannel *pKernelChannel, NvU32 exceptType, RM_ENGINE_TYPE localRmEngineType, NV_STATUS notifierStatus, NvU32 *pFlushFlags); @@ -615,6 +627,9 @@ NvU32 krcResetCallback(NvHandle hClient, /*! Watchdog timer function */ void krcWatchdogTimerProc(struct OBJGPU *pGpu, void *); +/* Helper functions for NVLog */ +void krcDumpNvLog(struct OBJGPU *pGpu, + NvU32 exceptType); #define krcBreakpoint(pKernelRc) \ { \ diff --git a/src/nvidia/generated/g_kernel_sched_mgr_nvoc.c b/src/nvidia/generated/g_kernel_sched_mgr_nvoc.c deleted file mode 100644 index 9b32924d28..0000000000 --- a/src/nvidia/generated/g_kernel_sched_mgr_nvoc.c +++ /dev/null @@ -1,176 +0,0 @@ -#define NVOC_KERNEL_SCHED_MGR_H_PRIVATE_ACCESS_ALLOWED -#include "nvoc/runtime.h" -#include "nvoc/rtti.h" -#include "nvtypes.h" -#include "nvport/nvport.h" -#include "nvport/inline/util_valist.h" -#include "utils/nvassert.h" -#include "g_kernel_sched_mgr_nvoc.h" - -#ifdef DEBUG -char __nvoc_class_id_uniqueness_check_0xea0970 = 1; -#endif - -extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelSchedMgr; - -extern const struct NVOC_CLASS_DEF __nvoc_class_def_Object; - -void __nvoc_init_KernelSchedMgr(KernelSchedMgr*); -void __nvoc_init_funcTable_KernelSchedMgr(KernelSchedMgr*); -NV_STATUS __nvoc_ctor_KernelSchedMgr(KernelSchedMgr*); -void __nvoc_init_dataField_KernelSchedMgr(KernelSchedMgr*); -void __nvoc_dtor_KernelSchedMgr(KernelSchedMgr*); -extern const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelSchedMgr; - -static const struct NVOC_RTTI __nvoc_rtti_KernelSchedMgr_KernelSchedMgr = { - /*pClassDef=*/ &__nvoc_class_def_KernelSchedMgr, - /*dtor=*/ (NVOC_DYNAMIC_DTOR) &__nvoc_dtor_KernelSchedMgr, - /*offset=*/ 0, -}; - -static const struct NVOC_RTTI __nvoc_rtti_KernelSchedMgr_Object = { - /*pClassDef=*/ &__nvoc_class_def_Object, - /*dtor=*/ &__nvoc_destructFromBase, - /*offset=*/ NV_OFFSETOF(KernelSchedMgr, __nvoc_base_Object), -}; - -static const struct NVOC_CASTINFO __nvoc_castinfo_KernelSchedMgr = { - /*numRelatives=*/ 2, - /*relatives=*/ { - &__nvoc_rtti_KernelSchedMgr_KernelSchedMgr, - &__nvoc_rtti_KernelSchedMgr_Object, - }, -}; - -const struct NVOC_CLASS_DEF __nvoc_class_def_KernelSchedMgr = -{ - /*classInfo=*/ { - /*size=*/ sizeof(KernelSchedMgr), - /*classId=*/ classId(KernelSchedMgr), - /*providerId=*/ &__nvoc_rtti_provider, -#if NV_PRINTF_STRINGS_ALLOWED - /*name=*/ "KernelSchedMgr", -#endif - }, - /*objCreatefn=*/ (NVOC_DYNAMIC_OBJ_CREATE) &__nvoc_objCreateDynamic_KernelSchedMgr, - /*pCastInfo=*/ &__nvoc_castinfo_KernelSchedMgr, - /*pExportInfo=*/ &__nvoc_export_info_KernelSchedMgr -}; - -const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelSchedMgr = -{ - /*numEntries=*/ 0, - /*pExportEntries=*/ 0 -}; - -void __nvoc_dtor_Object(Object*); -void __nvoc_dtor_KernelSchedMgr(KernelSchedMgr *pThis) { - __nvoc_dtor_Object(&pThis->__nvoc_base_Object); - PORT_UNREFERENCED_VARIABLE(pThis); -} - -void __nvoc_init_dataField_KernelSchedMgr(KernelSchedMgr *pThis) { - PORT_UNREFERENCED_VARIABLE(pThis); - - pThis->bIsSchedSwEnabled = ((NvBool)(0 != 0)); -} - -NV_STATUS __nvoc_ctor_Object(Object* ); -NV_STATUS __nvoc_ctor_KernelSchedMgr(KernelSchedMgr *pThis) { - NV_STATUS status = NV_OK; - status = __nvoc_ctor_Object(&pThis->__nvoc_base_Object); - if (status != NV_OK) goto __nvoc_ctor_KernelSchedMgr_fail_Object; - __nvoc_init_dataField_KernelSchedMgr(pThis); - goto __nvoc_ctor_KernelSchedMgr_exit; // Success - -__nvoc_ctor_KernelSchedMgr_fail_Object: -__nvoc_ctor_KernelSchedMgr_exit: - - return status; -} - -// Vtable initialization -static void __nvoc_init_funcTable_KernelSchedMgr_1(KernelSchedMgr *pThis) { - PORT_UNREFERENCED_VARIABLE(pThis); -} // End __nvoc_init_funcTable_KernelSchedMgr_1 - - -// Initialize vtable(s): Nothing to do for empty vtables -void __nvoc_init_funcTable_KernelSchedMgr(KernelSchedMgr *pThis) { - __nvoc_init_funcTable_KernelSchedMgr_1(pThis); -} - -void __nvoc_init_Object(Object*); -void __nvoc_init_KernelSchedMgr(KernelSchedMgr *pThis) { - pThis->__nvoc_pbase_KernelSchedMgr = pThis; - pThis->__nvoc_pbase_Object = &pThis->__nvoc_base_Object; - __nvoc_init_Object(&pThis->__nvoc_base_Object); - __nvoc_init_funcTable_KernelSchedMgr(pThis); -} - -NV_STATUS __nvoc_objCreate_KernelSchedMgr(KernelSchedMgr **ppThis, Dynamic *pParent, NvU32 createFlags) -{ - NV_STATUS status; - Object *pParentObj = NULL; - KernelSchedMgr *pThis; - - // Assign `pThis`, allocating memory unless suppressed by flag. - status = __nvoc_handleObjCreateMemAlloc(createFlags, sizeof(KernelSchedMgr), (void**)&pThis, (void**)ppThis); - if (status != NV_OK) - return status; - - // Zero is the initial value for everything. - portMemSet(pThis, 0, sizeof(KernelSchedMgr)); - - // Initialize runtime type information. - __nvoc_initRtti(staticCast(pThis, Dynamic), &__nvoc_class_def_KernelSchedMgr); - - pThis->__nvoc_base_Object.createFlags = createFlags; - - // Link the child into the parent if there is one unless flagged not to do so. - if (pParent != NULL && !(createFlags & NVOC_OBJ_CREATE_FLAGS_PARENT_HALSPEC_ONLY)) - { - pParentObj = dynamicCast(pParent, Object); - objAddChild(pParentObj, &pThis->__nvoc_base_Object); - } - else - { - pThis->__nvoc_base_Object.pParent = NULL; - } - - __nvoc_init_KernelSchedMgr(pThis); - status = __nvoc_ctor_KernelSchedMgr(pThis); - if (status != NV_OK) goto __nvoc_objCreate_KernelSchedMgr_cleanup; - - // Assignment has no effect if NVOC_OBJ_CREATE_FLAGS_IN_PLACE_CONSTRUCT is set. - *ppThis = pThis; - - return NV_OK; - -__nvoc_objCreate_KernelSchedMgr_cleanup: - - // Unlink the child from the parent if it was linked above. - if (pParentObj != NULL) - objRemoveChild(pParentObj, &pThis->__nvoc_base_Object); - - // Do not call destructors here since the constructor already called them. - if (createFlags & NVOC_OBJ_CREATE_FLAGS_IN_PLACE_CONSTRUCT) - portMemSet(pThis, 0, sizeof(KernelSchedMgr)); - else - { - portMemFree(pThis); - *ppThis = NULL; - } - - // coverity[leaked_storage:FALSE] - return status; -} - -NV_STATUS __nvoc_objCreateDynamic_KernelSchedMgr(KernelSchedMgr **ppThis, Dynamic *pParent, NvU32 createFlags, va_list args) { - NV_STATUS status; - - status = __nvoc_objCreate_KernelSchedMgr(ppThis, pParent, createFlags); - - return status; -} - diff --git a/src/nvidia/generated/g_kernel_sched_mgr_nvoc.h b/src/nvidia/generated/g_kernel_sched_mgr_nvoc.h deleted file mode 100644 index 6e7dda90da..0000000000 --- a/src/nvidia/generated/g_kernel_sched_mgr_nvoc.h +++ /dev/null @@ -1,176 +0,0 @@ - -#ifndef _G_KERNEL_SCHED_MGR_NVOC_H_ -#define _G_KERNEL_SCHED_MGR_NVOC_H_ -#include "nvoc/runtime.h" - -// Version of generated metadata structures -#ifdef NVOC_METADATA_VERSION -#undef NVOC_METADATA_VERSION -#endif -#define NVOC_METADATA_VERSION 0 - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. - * SPDX-License-Identifier: MIT - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -/*! - * @file kernel_sched_mgr.h - * @brief Provides definition for KernelSchedMgr data-structures and interfaces. - */ - -#pragma once -#include "g_kernel_sched_mgr_nvoc.h" - -#ifndef _KERNELSCHEDMGR_H_ -#define _KERNELSCHEDMGR_H_ - -/* -------------------------------- Includes -------------------------------- */ - -#include "core/core.h" -#include "gpu/gpu.h" - -#include "ctrl/ctrl2080/ctrl2080fifo.h" // NV2080_CTRL_FIFO_* - -/* ------------------------------- Datatypes --------------------------------*/ - -enum __SCHED_POLICY -{ - SCHED_POLICY_DEFAULT = 0, - SCHED_POLICY_BEST_EFFORT = 1, - SCHED_POLICY_VGPU_EQUAL_SHARE = 2, - SCHED_POLICY_VGPU_FIXED_SHARE = 3, -}; -typedef enum __SCHED_POLICY SCHED_POLICY; - -/*! - * Class of scheduling manager for all the runlists. - */ - -// Private field names are wrapped in PRIVATE_FIELD, which does nothing for -// the matching C source file, but causes diagnostics to be issued if another -// source file references the field. -#ifdef NVOC_KERNEL_SCHED_MGR_H_PRIVATE_ACCESS_ALLOWED -#define PRIVATE_FIELD(x) x -#else -#define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) -#endif - - -struct KernelSchedMgr { - - // Metadata - const struct NVOC_RTTI *__nvoc_rtti; - - // Parent (i.e. superclass or base class) object pointers - struct Object __nvoc_base_Object; - - // Ancestor object pointers for `staticCast` feature - struct Object *__nvoc_pbase_Object; // obj super - struct KernelSchedMgr *__nvoc_pbase_KernelSchedMgr; // kschedmgr - - // Data members - NvBool bIsSchedSwEnabled; - NvU32 configSchedPolicy; -}; - -#ifndef __NVOC_CLASS_KernelSchedMgr_TYPEDEF__ -#define __NVOC_CLASS_KernelSchedMgr_TYPEDEF__ -typedef struct KernelSchedMgr KernelSchedMgr; -#endif /* __NVOC_CLASS_KernelSchedMgr_TYPEDEF__ */ - -#ifndef __nvoc_class_id_KernelSchedMgr -#define __nvoc_class_id_KernelSchedMgr 0xea0970 -#endif /* __nvoc_class_id_KernelSchedMgr */ - -// Casting support -extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelSchedMgr; - -#define __staticCast_KernelSchedMgr(pThis) \ - ((pThis)->__nvoc_pbase_KernelSchedMgr) - -#ifdef __nvoc_kernel_sched_mgr_h_disabled -#define __dynamicCast_KernelSchedMgr(pThis) ((KernelSchedMgr*)NULL) -#else //__nvoc_kernel_sched_mgr_h_disabled -#define __dynamicCast_KernelSchedMgr(pThis) \ - ((KernelSchedMgr*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelSchedMgr))) -#endif //__nvoc_kernel_sched_mgr_h_disabled - -NV_STATUS __nvoc_objCreateDynamic_KernelSchedMgr(KernelSchedMgr**, Dynamic*, NvU32, va_list); - -NV_STATUS __nvoc_objCreate_KernelSchedMgr(KernelSchedMgr**, Dynamic*, NvU32); -#define __objCreate_KernelSchedMgr(ppNewObj, pParent, createFlags) \ - __nvoc_objCreate_KernelSchedMgr((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) - - -// Wrapper macros - -// Dispatch functions -static inline NvBool kschedmgrIsSchedSwEnabled(struct KernelSchedMgr *pKernelSchedMgr) { - return pKernelSchedMgr->bIsSchedSwEnabled; -} - -static inline NvU32 kschedmgrGetSchedPolicy(struct KernelSchedMgr *pKernelSchedMgr) { - return pKernelSchedMgr->configSchedPolicy; -} - -static inline NvBool kschedmgrIsPvmrlEnabled(struct KernelSchedMgr *pKernelSchedMgr) { - return (pKernelSchedMgr->bIsSchedSwEnabled && ((pKernelSchedMgr->configSchedPolicy == SCHED_POLICY_VGPU_EQUAL_SHARE) || (pKernelSchedMgr->configSchedPolicy == SCHED_POLICY_VGPU_FIXED_SHARE))); -} - -void kschedmgrConstructPolicy_IMPL(struct KernelSchedMgr *pKernelSchedMgr, struct OBJGPU *pGpu); - -#ifdef __nvoc_kernel_sched_mgr_h_disabled -static inline void kschedmgrConstructPolicy(struct KernelSchedMgr *pKernelSchedMgr, struct OBJGPU *pGpu) { - NV_ASSERT_FAILED_PRECOMP("KernelSchedMgr was disabled!"); -} -#else //__nvoc_kernel_sched_mgr_h_disabled -#define kschedmgrConstructPolicy(pKernelSchedMgr, pGpu) kschedmgrConstructPolicy_IMPL(pKernelSchedMgr, pGpu) -#endif //__nvoc_kernel_sched_mgr_h_disabled - -void kschedmgrSetConfigPolicyFromUser_IMPL(struct KernelSchedMgr *pKernelSchedMgr, struct OBJGPU *pGpu, NvU32 schedSwPolicy); - -#ifdef __nvoc_kernel_sched_mgr_h_disabled -static inline void kschedmgrSetConfigPolicyFromUser(struct KernelSchedMgr *pKernelSchedMgr, struct OBJGPU *pGpu, NvU32 schedSwPolicy) { - NV_ASSERT_FAILED_PRECOMP("KernelSchedMgr was disabled!"); -} -#else //__nvoc_kernel_sched_mgr_h_disabled -#define kschedmgrSetConfigPolicyFromUser(pKernelSchedMgr, pGpu, schedSwPolicy) kschedmgrSetConfigPolicyFromUser_IMPL(pKernelSchedMgr, pGpu, schedSwPolicy) -#endif //__nvoc_kernel_sched_mgr_h_disabled - -#undef PRIVATE_FIELD - - -#define GPU_GET_KERNEL_SCHEDMGR(pGpu) \ - (kfifoGetKernelSchedMgr(GPU_GET_KERNEL_FIFO_UC(pGpu))) - -#endif // _KERNELSCHEDMGR_H_ - - -#ifdef __cplusplus -} // extern "C" -#endif - -#endif // _G_KERNEL_SCHED_MGR_NVOC_H_ diff --git a/src/nvidia/generated/g_kernel_sec2_nvoc.c b/src/nvidia/generated/g_kernel_sec2_nvoc.c index 0601b7c73f..4b9b3948f9 100644 --- a/src/nvidia/generated/g_kernel_sec2_nvoc.c +++ b/src/nvidia/generated/g_kernel_sec2_nvoc.c @@ -102,178 +102,241 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelSec2 = /*pExportInfo=*/ &__nvoc_export_info_KernelSec2 }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineConfigured(struct CrashCatEngine *arg_this); // super^2 +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnload(struct CrashCatEngine *arg_this); // super^2 +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineVprintf(struct CrashCatEngine *arg_this, NvBool bReportStart, const char *fmt, va_list args); // super^2 +NvU32 __nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriRead(struct CrashCatEngine *arg_this, NvU32 offset); // super^2 +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriWrite(struct CrashCatEngine *arg_this, NvU32 offset, NvU32 data); // super^2 +void * __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineMapBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc); // super^2 +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnmapBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc); // super^2 +void __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineSyncBufferDescriptor(struct CrashCatEngine *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size); // super^2 +const NvU32 * __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetScratchOffsets(struct CrashCatEngine *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId); // super^2 +NvU32 __nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetWFL0Offset(struct CrashCatEngine *arg_this); // super^2 +NvU32 __nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegRead(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 offset); // super +void __nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegWrite(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 offset, NvU32 data); // super +NvU32 __nvoc_down_thunk_KernelFalcon_kcrashcatEngineMaskDmemAddr(struct OBJGPU *pGpu, struct KernelCrashCatEngine *pKernelFlcn, NvU32 addr); // super +NV_STATUS __nvoc_down_thunk_KernelSec2_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelSec2, ENGDESCRIPTOR arg3); // this +void __nvoc_down_thunk_KernelSec2_intrservRegisterIntrService(struct OBJGPU *pGpu, struct IntrService *pKernelSec2, IntrServiceRecord pRecords[175]); // this +NV_STATUS __nvoc_down_thunk_KernelSec2_intrservServiceNotificationInterrupt(struct OBJGPU *arg1, struct IntrService *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3); // this +NV_STATUS __nvoc_down_thunk_KernelSec2_kflcnResetHw(struct OBJGPU *pGpu, struct KernelFalcon *pKernelSec2); // this +NV_STATUS __nvoc_down_thunk_KernelSec2_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelSec2, NvU32 arg3); // this + // 5 down-thunk(s) defined to bridge methods in KernelSec2 from superclasses // ksec2ConstructEngine: virtual halified (singleton optimized) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_KernelSec2_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelSec2, ENGDESCRIPTOR arg3) { +NV_STATUS __nvoc_down_thunk_KernelSec2_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelSec2, ENGDESCRIPTOR arg3) { return ksec2ConstructEngine(pGpu, (struct KernelSec2 *)(((unsigned char *) pKernelSec2) - __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg3); } // ksec2RegisterIntrService: virtual halified (singleton optimized) override (intrserv) base (intrserv) body -static void __nvoc_down_thunk_KernelSec2_intrservRegisterIntrService(struct OBJGPU *pGpu, struct IntrService *pKernelSec2, IntrServiceRecord pRecords[175]) { +void __nvoc_down_thunk_KernelSec2_intrservRegisterIntrService(struct OBJGPU *pGpu, struct IntrService *pKernelSec2, IntrServiceRecord pRecords[175]) { ksec2RegisterIntrService(pGpu, (struct KernelSec2 *)(((unsigned char *) pKernelSec2) - __nvoc_rtti_KernelSec2_IntrService.offset), pRecords); } // ksec2ServiceNotificationInterrupt: virtual halified (singleton optimized) override (intrserv) base (intrserv) -static NV_STATUS __nvoc_down_thunk_KernelSec2_intrservServiceNotificationInterrupt(struct OBJGPU *arg1, struct IntrService *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3) { +NV_STATUS __nvoc_down_thunk_KernelSec2_intrservServiceNotificationInterrupt(struct OBJGPU *arg1, struct IntrService *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3) { return ksec2ServiceNotificationInterrupt(arg1, (struct KernelSec2 *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelSec2_IntrService.offset), arg3); } // ksec2ResetHw: virtual halified (2 hals) override (kflcn) base (kflcn) body -static NV_STATUS __nvoc_down_thunk_KernelSec2_kflcnResetHw(struct OBJGPU *pGpu, struct KernelFalcon *pKernelSec2) { +NV_STATUS __nvoc_down_thunk_KernelSec2_kflcnResetHw(struct OBJGPU *pGpu, struct KernelFalcon *pKernelSec2) { return ksec2ResetHw(pGpu, (struct KernelSec2 *)(((unsigned char *) pKernelSec2) - __nvoc_rtti_KernelSec2_KernelFalcon.offset)); } // ksec2StateLoad: virtual halified (3 hals) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_KernelSec2_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelSec2, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_KernelSec2_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelSec2, NvU32 arg3) { return ksec2StateLoad(pGpu, (struct KernelSec2 *)(((unsigned char *) pKernelSec2) - __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg3); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_KernelCrashCatEngine_kflcnConfigured(struct KernelFalcon *arg_this); // super +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnUnload(struct KernelFalcon *arg_this); // super +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnVprintf(struct KernelFalcon *arg_this, NvBool bReportStart, const char *fmt, va_list args); // super +NvU32 __nvoc_up_thunk_KernelCrashCatEngine_kflcnPriRead(struct KernelFalcon *arg_this, NvU32 offset); // super +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnPriWrite(struct KernelFalcon *arg_this, NvU32 offset, NvU32 data); // super +void * __nvoc_up_thunk_KernelCrashCatEngine_kflcnMapBufferDescriptor(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc); // super +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnUnmapBufferDescriptor(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc); // super +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnSyncBufferDescriptor(struct KernelFalcon *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size); // super +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnReadDmem(struct KernelFalcon *arg_this, NvU32 offset, NvU32 size, void *pBuf); // super +void __nvoc_up_thunk_KernelCrashCatEngine_kflcnReadEmem(struct KernelFalcon *arg_this, NvU64 offset, NvU64 size, void *pBuf); // super +const NvU32 * __nvoc_up_thunk_KernelCrashCatEngine_kflcnGetScratchOffsets(struct KernelFalcon *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId); // super +NvU32 __nvoc_up_thunk_KernelCrashCatEngine_kflcnGetWFL0Offset(struct KernelFalcon *arg_this); // super +void __nvoc_up_thunk_OBJENGSTATE_ksec2InitMissing(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePreInitLocked(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StateInitLocked(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StateInitUnlocked(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePreLoad(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePostLoad(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePreUnload(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StateUnload(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePostUnload(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate, NvU32 arg3); // this +void __nvoc_up_thunk_OBJENGSTATE_ksec2StateDestroy(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_ksec2IsPresent(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate); // this +NvBool __nvoc_up_thunk_IntrService_ksec2ClearInterrupt(struct OBJGPU *pGpu, struct KernelSec2 *pIntrService, IntrServiceClearInterruptArguments *pParams); // this +NvU32 __nvoc_up_thunk_IntrService_ksec2ServiceInterrupt(struct OBJGPU *pGpu, struct KernelSec2 *pIntrService, IntrServiceServiceInterruptArguments *pParams); // this +NvU32 __nvoc_up_thunk_KernelFalcon_ksec2RegRead(struct OBJGPU *pGpu, struct KernelSec2 *pKernelFlcn, NvU32 offset); // this +void __nvoc_up_thunk_KernelFalcon_ksec2RegWrite(struct OBJGPU *pGpu, struct KernelSec2 *pKernelFlcn, NvU32 offset, NvU32 data); // this +NvU32 __nvoc_up_thunk_KernelFalcon_ksec2MaskDmemAddr(struct OBJGPU *pGpu, struct KernelSec2 *pKernelFlcn, NvU32 addr); // this +NvBool __nvoc_up_thunk_KernelCrashCatEngine_ksec2Configured(struct KernelSec2 *arg_this); // this +void __nvoc_up_thunk_KernelCrashCatEngine_ksec2Unload(struct KernelSec2 *arg_this); // this +void __nvoc_up_thunk_KernelCrashCatEngine_ksec2Vprintf(struct KernelSec2 *arg_this, NvBool bReportStart, const char *fmt, va_list args); // this +NvU32 __nvoc_up_thunk_KernelCrashCatEngine_ksec2PriRead(struct KernelSec2 *arg_this, NvU32 offset); // this +void __nvoc_up_thunk_KernelCrashCatEngine_ksec2PriWrite(struct KernelSec2 *arg_this, NvU32 offset, NvU32 data); // this +void * __nvoc_up_thunk_KernelCrashCatEngine_ksec2MapBufferDescriptor(struct KernelSec2 *arg_this, CrashCatBufferDescriptor *pBufDesc); // this +void __nvoc_up_thunk_KernelCrashCatEngine_ksec2UnmapBufferDescriptor(struct KernelSec2 *arg_this, CrashCatBufferDescriptor *pBufDesc); // this +void __nvoc_up_thunk_KernelCrashCatEngine_ksec2SyncBufferDescriptor(struct KernelSec2 *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size); // this +void __nvoc_up_thunk_KernelCrashCatEngine_ksec2ReadDmem(struct KernelSec2 *arg_this, NvU32 offset, NvU32 size, void *pBuf); // this +void __nvoc_up_thunk_KernelCrashCatEngine_ksec2ReadEmem(struct KernelSec2 *arg_this, NvU64 offset, NvU64 size, void *pBuf); // this +const NvU32 * __nvoc_up_thunk_KernelCrashCatEngine_ksec2GetScratchOffsets(struct KernelSec2 *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId); // this +NvU32 __nvoc_up_thunk_KernelCrashCatEngine_ksec2GetWFL0Offset(struct KernelSec2 *arg_this); // this + // 29 up-thunk(s) defined to bridge methods in KernelSec2 to superclasses // ksec2InitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_ksec2InitMissing(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_ksec2InitMissing(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset)); } // ksec2StatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePreInitLocked(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePreInitLocked(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate) { return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset)); } // ksec2StatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePreInitUnlocked(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset)); } // ksec2StateInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StateInitLocked(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StateInitLocked(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate) { return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset)); } // ksec2StateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StateInitUnlocked(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StateInitUnlocked(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset)); } // ksec2StatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePreLoad(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePreLoad(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg3); } // ksec2StatePostLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePostLoad(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePostLoad(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg3); } // ksec2StatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePreUnload(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePreUnload(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg3); } // ksec2StateUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StateUnload(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StateUnload(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg3); } // ksec2StatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePostUnload(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_ksec2StatePostUnload(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset), arg3); } // ksec2StateDestroy: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_ksec2StateDestroy(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_ksec2StateDestroy(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate) { engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset)); } // ksec2IsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_ksec2IsPresent(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_ksec2IsPresent(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_KernelSec2_OBJENGSTATE.offset)); } // ksec2ClearInterrupt: virtual inherited (intrserv) base (intrserv) -static NvBool __nvoc_up_thunk_IntrService_ksec2ClearInterrupt(struct OBJGPU *pGpu, struct KernelSec2 *pIntrService, IntrServiceClearInterruptArguments *pParams) { +NvBool __nvoc_up_thunk_IntrService_ksec2ClearInterrupt(struct OBJGPU *pGpu, struct KernelSec2 *pIntrService, IntrServiceClearInterruptArguments *pParams) { return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_KernelSec2_IntrService.offset), pParams); } // ksec2ServiceInterrupt: virtual inherited (intrserv) base (intrserv) -static NvU32 __nvoc_up_thunk_IntrService_ksec2ServiceInterrupt(struct OBJGPU *pGpu, struct KernelSec2 *pIntrService, IntrServiceServiceInterruptArguments *pParams) { +NvU32 __nvoc_up_thunk_IntrService_ksec2ServiceInterrupt(struct OBJGPU *pGpu, struct KernelSec2 *pIntrService, IntrServiceServiceInterruptArguments *pParams) { return intrservServiceInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_KernelSec2_IntrService.offset), pParams); } // ksec2RegRead: virtual halified (2 hals) inherited (kflcn) base (kflcn) body -static NvU32 __nvoc_up_thunk_KernelFalcon_ksec2RegRead(struct OBJGPU *pGpu, struct KernelSec2 *pKernelFlcn, NvU32 offset) { +NvU32 __nvoc_up_thunk_KernelFalcon_ksec2RegRead(struct OBJGPU *pGpu, struct KernelSec2 *pKernelFlcn, NvU32 offset) { return kflcnRegRead(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) + __nvoc_rtti_KernelSec2_KernelFalcon.offset), offset); } // ksec2RegWrite: virtual halified (2 hals) inherited (kflcn) base (kflcn) body -static void __nvoc_up_thunk_KernelFalcon_ksec2RegWrite(struct OBJGPU *pGpu, struct KernelSec2 *pKernelFlcn, NvU32 offset, NvU32 data) { +void __nvoc_up_thunk_KernelFalcon_ksec2RegWrite(struct OBJGPU *pGpu, struct KernelSec2 *pKernelFlcn, NvU32 offset, NvU32 data) { kflcnRegWrite(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) + __nvoc_rtti_KernelSec2_KernelFalcon.offset), offset, data); } // ksec2MaskDmemAddr: virtual halified (3 hals) inherited (kflcn) base (kflcn) body -static NvU32 __nvoc_up_thunk_KernelFalcon_ksec2MaskDmemAddr(struct OBJGPU *pGpu, struct KernelSec2 *pKernelFlcn, NvU32 addr) { +NvU32 __nvoc_up_thunk_KernelFalcon_ksec2MaskDmemAddr(struct OBJGPU *pGpu, struct KernelSec2 *pKernelFlcn, NvU32 addr) { return kflcnMaskDmemAddr(pGpu, (struct KernelFalcon *)(((unsigned char *) pKernelFlcn) + __nvoc_rtti_KernelSec2_KernelFalcon.offset), addr); } // ksec2Configured: virtual inherited (kcrashcatEngine) base (kflcn) -static NvBool __nvoc_up_thunk_KernelCrashCatEngine_ksec2Configured(struct KernelSec2 *arg_this) { +NvBool __nvoc_up_thunk_KernelCrashCatEngine_ksec2Configured(struct KernelSec2 *arg_this) { return kcrashcatEngineConfigured((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset)); } // ksec2Unload: virtual inherited (kcrashcatEngine) base (kflcn) -static void __nvoc_up_thunk_KernelCrashCatEngine_ksec2Unload(struct KernelSec2 *arg_this) { +void __nvoc_up_thunk_KernelCrashCatEngine_ksec2Unload(struct KernelSec2 *arg_this) { kcrashcatEngineUnload((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset)); } // ksec2Vprintf: virtual inherited (kcrashcatEngine) base (kflcn) -static void __nvoc_up_thunk_KernelCrashCatEngine_ksec2Vprintf(struct KernelSec2 *arg_this, NvBool bReportStart, const char *fmt, va_list args) { +void __nvoc_up_thunk_KernelCrashCatEngine_ksec2Vprintf(struct KernelSec2 *arg_this, NvBool bReportStart, const char *fmt, va_list args) { kcrashcatEngineVprintf((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), bReportStart, fmt, args); } // ksec2PriRead: virtual inherited (kcrashcatEngine) base (kflcn) -static NvU32 __nvoc_up_thunk_KernelCrashCatEngine_ksec2PriRead(struct KernelSec2 *arg_this, NvU32 offset) { +NvU32 __nvoc_up_thunk_KernelCrashCatEngine_ksec2PriRead(struct KernelSec2 *arg_this, NvU32 offset) { return kcrashcatEnginePriRead((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), offset); } // ksec2PriWrite: virtual inherited (kcrashcatEngine) base (kflcn) -static void __nvoc_up_thunk_KernelCrashCatEngine_ksec2PriWrite(struct KernelSec2 *arg_this, NvU32 offset, NvU32 data) { +void __nvoc_up_thunk_KernelCrashCatEngine_ksec2PriWrite(struct KernelSec2 *arg_this, NvU32 offset, NvU32 data) { kcrashcatEnginePriWrite((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), offset, data); } // ksec2MapBufferDescriptor: virtual inherited (kcrashcatEngine) base (kflcn) -static void * __nvoc_up_thunk_KernelCrashCatEngine_ksec2MapBufferDescriptor(struct KernelSec2 *arg_this, CrashCatBufferDescriptor *pBufDesc) { +void * __nvoc_up_thunk_KernelCrashCatEngine_ksec2MapBufferDescriptor(struct KernelSec2 *arg_this, CrashCatBufferDescriptor *pBufDesc) { return kcrashcatEngineMapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), pBufDesc); } // ksec2UnmapBufferDescriptor: virtual inherited (kcrashcatEngine) base (kflcn) -static void __nvoc_up_thunk_KernelCrashCatEngine_ksec2UnmapBufferDescriptor(struct KernelSec2 *arg_this, CrashCatBufferDescriptor *pBufDesc) { +void __nvoc_up_thunk_KernelCrashCatEngine_ksec2UnmapBufferDescriptor(struct KernelSec2 *arg_this, CrashCatBufferDescriptor *pBufDesc) { kcrashcatEngineUnmapBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), pBufDesc); } // ksec2SyncBufferDescriptor: virtual inherited (kcrashcatEngine) base (kflcn) -static void __nvoc_up_thunk_KernelCrashCatEngine_ksec2SyncBufferDescriptor(struct KernelSec2 *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { +void __nvoc_up_thunk_KernelCrashCatEngine_ksec2SyncBufferDescriptor(struct KernelSec2 *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { kcrashcatEngineSyncBufferDescriptor((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), pBufDesc, offset, size); } // ksec2ReadDmem: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) -static void __nvoc_up_thunk_KernelCrashCatEngine_ksec2ReadDmem(struct KernelSec2 *arg_this, NvU32 offset, NvU32 size, void *pBuf) { +void __nvoc_up_thunk_KernelCrashCatEngine_ksec2ReadDmem(struct KernelSec2 *arg_this, NvU32 offset, NvU32 size, void *pBuf) { kcrashcatEngineReadDmem((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), offset, size, pBuf); } // ksec2ReadEmem: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) -static void __nvoc_up_thunk_KernelCrashCatEngine_ksec2ReadEmem(struct KernelSec2 *arg_this, NvU64 offset, NvU64 size, void *pBuf) { +void __nvoc_up_thunk_KernelCrashCatEngine_ksec2ReadEmem(struct KernelSec2 *arg_this, NvU64 offset, NvU64 size, void *pBuf) { kcrashcatEngineReadEmem((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), offset, size, pBuf); } // ksec2GetScratchOffsets: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) -static const NvU32 * __nvoc_up_thunk_KernelCrashCatEngine_ksec2GetScratchOffsets(struct KernelSec2 *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { +const NvU32 * __nvoc_up_thunk_KernelCrashCatEngine_ksec2GetScratchOffsets(struct KernelSec2 *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { return kcrashcatEngineGetScratchOffsets((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset), scratchGroupId); } // ksec2GetWFL0Offset: virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) -static NvU32 __nvoc_up_thunk_KernelCrashCatEngine_ksec2GetWFL0Offset(struct KernelSec2 *arg_this) { +NvU32 __nvoc_up_thunk_KernelCrashCatEngine_ksec2GetWFL0Offset(struct KernelSec2 *arg_this) { return kcrashcatEngineGetWFL0Offset((struct KernelCrashCatEngine *)(((unsigned char *) arg_this) + __nvoc_rtti_KernelSec2_KernelCrashCatEngine.offset)); } @@ -345,18 +408,6 @@ static void __nvoc_init_funcTable_KernelSec2_1(KernelSec2 *pThis, RmHalspecOwner PORT_UNREFERENCED_VARIABLE(chipHal); PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); - // ksec2ConstructEngine -- virtual halified (singleton optimized) override (engstate) base (engstate) body - pThis->__ksec2ConstructEngine__ = &ksec2ConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelSec2_engstateConstructEngine; - - // ksec2RegisterIntrService -- virtual halified (singleton optimized) override (intrserv) base (intrserv) body - pThis->__ksec2RegisterIntrService__ = &ksec2RegisterIntrService_IMPL; - pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_KernelSec2_intrservRegisterIntrService; - - // ksec2ServiceNotificationInterrupt -- virtual halified (singleton optimized) override (intrserv) base (intrserv) - pThis->__ksec2ServiceNotificationInterrupt__ = &ksec2ServiceNotificationInterrupt_IMPL; - pThis->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_down_thunk_KernelSec2_intrservServiceNotificationInterrupt; - // ksec2ConfigureFalcon -- halified (3 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ { @@ -380,7 +431,6 @@ static void __nvoc_init_funcTable_KernelSec2_1(KernelSec2 *pThis, RmHalspecOwner { pThis->__ksec2ResetHw__ = &ksec2ResetHw_TU102; } - pThis->__nvoc_base_KernelFalcon.__kflcnResetHw__ = &__nvoc_down_thunk_KernelSec2_kflcnResetHw; // ksec2StateLoad -- virtual halified (3 hals) override (engstate) base (engstate) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ @@ -399,7 +449,6 @@ static void __nvoc_init_funcTable_KernelSec2_1(KernelSec2 *pThis, RmHalspecOwner pThis->__ksec2StateLoad__ = &ksec2StateLoad_56cd7a; } } - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelSec2_engstateStateLoad; // ksec2ReadUcodeFuseVersion -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ @@ -469,48 +518,6 @@ static void __nvoc_init_funcTable_KernelSec2_1(KernelSec2 *pThis, RmHalspecOwner } } - // ksec2InitMissing -- virtual inherited (engstate) base (engstate) - pThis->__ksec2InitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2InitMissing; - - // ksec2StatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__ksec2StatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StatePreInitLocked; - - // ksec2StatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__ksec2StatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StatePreInitUnlocked; - - // ksec2StateInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__ksec2StateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StateInitLocked; - - // ksec2StateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__ksec2StateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StateInitUnlocked; - - // ksec2StatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__ksec2StatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StatePreLoad; - - // ksec2StatePostLoad -- virtual inherited (engstate) base (engstate) - pThis->__ksec2StatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StatePostLoad; - - // ksec2StatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__ksec2StatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StatePreUnload; - - // ksec2StateUnload -- virtual inherited (engstate) base (engstate) - pThis->__ksec2StateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StateUnload; - - // ksec2StatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__ksec2StatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StatePostUnload; - - // ksec2StateDestroy -- virtual inherited (engstate) base (engstate) - pThis->__ksec2StateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StateDestroy; - - // ksec2IsPresent -- virtual inherited (engstate) base (engstate) - pThis->__ksec2IsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2IsPresent; - - // ksec2ClearInterrupt -- virtual inherited (intrserv) base (intrserv) - pThis->__ksec2ClearInterrupt__ = &__nvoc_up_thunk_IntrService_ksec2ClearInterrupt; - - // ksec2ServiceInterrupt -- virtual inherited (intrserv) base (intrserv) - pThis->__ksec2ServiceInterrupt__ = &__nvoc_up_thunk_IntrService_ksec2ServiceInterrupt; - // ksec2RegRead -- virtual halified (2 hals) inherited (kflcn) base (kflcn) body pThis->__ksec2RegRead__ = &__nvoc_up_thunk_KernelFalcon_ksec2RegRead; @@ -519,49 +526,110 @@ static void __nvoc_init_funcTable_KernelSec2_1(KernelSec2 *pThis, RmHalspecOwner // ksec2MaskDmemAddr -- virtual halified (3 hals) inherited (kflcn) base (kflcn) body pThis->__ksec2MaskDmemAddr__ = &__nvoc_up_thunk_KernelFalcon_ksec2MaskDmemAddr; - - // ksec2Configured -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__ksec2Configured__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2Configured; - - // ksec2Unload -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__ksec2Unload__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2Unload; - - // ksec2Vprintf -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__ksec2Vprintf__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2Vprintf; - - // ksec2PriRead -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__ksec2PriRead__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2PriRead; - - // ksec2PriWrite -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__ksec2PriWrite__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2PriWrite; - - // ksec2MapBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__ksec2MapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2MapBufferDescriptor; - - // ksec2UnmapBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__ksec2UnmapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2UnmapBufferDescriptor; - - // ksec2SyncBufferDescriptor -- virtual inherited (kcrashcatEngine) base (kflcn) - pThis->__ksec2SyncBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2SyncBufferDescriptor; - - // ksec2ReadDmem -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) - pThis->__ksec2ReadDmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2ReadDmem; - - // ksec2ReadEmem -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) - pThis->__ksec2ReadEmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2ReadEmem; - - // ksec2GetScratchOffsets -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) - pThis->__ksec2GetScratchOffsets__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2GetScratchOffsets; - - // ksec2GetWFL0Offset -- virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) - pThis->__ksec2GetWFL0Offset__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2GetWFL0Offset; -} // End __nvoc_init_funcTable_KernelSec2_1 with approximately 61 basic block(s). +} // End __nvoc_init_funcTable_KernelSec2_1 with approximately 27 basic block(s). // Initialize vtable(s) for 39 virtual method(s). void __nvoc_init_funcTable_KernelSec2(KernelSec2 *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 39 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelSec2 vtable = { + .__ksec2ConstructEngine__ = &ksec2ConstructEngine_IMPL, // virtual halified (singleton optimized) override (engstate) base (engstate) body + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_KernelSec2_engstateConstructEngine, // virtual + .__ksec2RegisterIntrService__ = &ksec2RegisterIntrService_IMPL, // virtual halified (singleton optimized) override (intrserv) base (intrserv) body + .IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_KernelSec2_intrservRegisterIntrService, // virtual + .__ksec2ServiceNotificationInterrupt__ = &ksec2ServiceNotificationInterrupt_IMPL, // virtual halified (singleton optimized) override (intrserv) base (intrserv) + .IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_down_thunk_KernelSec2_intrservServiceNotificationInterrupt, // virtual + .KernelFalcon.__kflcnResetHw__ = &__nvoc_down_thunk_KernelSec2_kflcnResetHw, // pure virtual + .OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_KernelSec2_engstateStateLoad, // virtual + .__ksec2InitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2InitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__ksec2StatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StatePreInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__ksec2StatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__ksec2StateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StateInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &engstateStateInitLocked_IMPL, // virtual + .__ksec2StateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__ksec2StatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__ksec2StatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StatePostLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL, // virtual + .__ksec2StatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__ksec2StateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StateUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &engstateStateUnload_IMPL, // virtual + .__ksec2StatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__ksec2StateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2StateDestroy, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &engstateStateDestroy_IMPL, // virtual + .__ksec2IsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_ksec2IsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + .__ksec2ClearInterrupt__ = &__nvoc_up_thunk_IntrService_ksec2ClearInterrupt, // virtual inherited (intrserv) base (intrserv) + .IntrService.__intrservClearInterrupt__ = &intrservClearInterrupt_IMPL, // virtual + .__ksec2ServiceInterrupt__ = &__nvoc_up_thunk_IntrService_ksec2ServiceInterrupt, // virtual inherited (intrserv) base (intrserv) + .IntrService.__intrservServiceInterrupt__ = &intrservServiceInterrupt_IMPL, // virtual + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineRegRead__ = &__nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegRead, // pure virtual + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineRegWrite__ = &__nvoc_down_thunk_KernelFalcon_kcrashcatEngineRegWrite, // pure virtual + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineMaskDmemAddr__ = &__nvoc_down_thunk_KernelFalcon_kcrashcatEngineMaskDmemAddr, // pure virtual + .__ksec2Configured__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2Configured, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnConfigured__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnConfigured, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineConfigured__ = &kcrashcatEngineConfigured_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineConfigured__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineConfigured, // pure virtual + .__ksec2Unload__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2Unload, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnUnload__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnUnload, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineUnload__ = &kcrashcatEngineUnload_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineUnload__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnload, // virtual + .__ksec2Vprintf__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2Vprintf, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnVprintf__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnVprintf, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineVprintf__ = &kcrashcatEngineVprintf_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineVprintf__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineVprintf, // pure virtual + .__ksec2PriRead__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2PriRead, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnPriRead__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnPriRead, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEnginePriRead__ = &kcrashcatEnginePriRead_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEnginePriRead__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriRead, // pure virtual + .__ksec2PriWrite__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2PriWrite, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnPriWrite__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnPriWrite, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEnginePriWrite__ = &kcrashcatEnginePriWrite_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEnginePriWrite__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEnginePriWrite, // pure virtual + .__ksec2MapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2MapBufferDescriptor, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnMapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnMapBufferDescriptor, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineMapBufferDescriptor__ = &kcrashcatEngineMapBufferDescriptor_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineMapBufferDescriptor__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineMapBufferDescriptor, // pure virtual + .__ksec2UnmapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2UnmapBufferDescriptor, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnUnmapBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnUnmapBufferDescriptor, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineUnmapBufferDescriptor__ = &kcrashcatEngineUnmapBufferDescriptor_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineUnmapBufferDescriptor__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineUnmapBufferDescriptor, // pure virtual + .__ksec2SyncBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2SyncBufferDescriptor, // virtual inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnSyncBufferDescriptor__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnSyncBufferDescriptor, // virtual inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineSyncBufferDescriptor__ = &kcrashcatEngineSyncBufferDescriptor_IMPL, // virtual override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineSyncBufferDescriptor__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineSyncBufferDescriptor, // pure virtual + .__ksec2ReadDmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2ReadDmem, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnReadDmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnReadDmem, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineReadDmem__ = &kcrashcatEngineReadDmem_TU102, // virtual halified (singleton optimized) + .__ksec2ReadEmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2ReadEmem, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnReadEmem__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnReadEmem, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineReadEmem__ = &kcrashcatEngineReadEmem_2fced3, // virtual halified (singleton optimized) + .__ksec2GetScratchOffsets__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2GetScratchOffsets, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnGetScratchOffsets__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnGetScratchOffsets, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineGetScratchOffsets__ = &kcrashcatEngineGetScratchOffsets_TU102, // virtual halified (singleton optimized) override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineGetScratchOffsets__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetScratchOffsets, // pure virtual + .__ksec2GetWFL0Offset__ = &__nvoc_up_thunk_KernelCrashCatEngine_ksec2GetWFL0Offset, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) + .KernelFalcon.__kflcnGetWFL0Offset__ = &__nvoc_up_thunk_KernelCrashCatEngine_kflcnGetWFL0Offset, // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kcrashcatEngine) + .KernelFalcon.KernelCrashCatEngine.__kcrashcatEngineGetWFL0Offset__ = &kcrashcatEngineGetWFL0Offset_TU102, // virtual halified (singleton optimized) override (crashcatEngine) base (crashcatEngine) + .KernelFalcon.KernelCrashCatEngine.CrashCatEngine.__crashcatEngineGetWFL0Offset__ = &__nvoc_down_thunk_KernelCrashCatEngine_crashcatEngineGetWFL0Offset, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_base_IntrService.__nvoc_vtable = &vtable.IntrService; // (intrserv) super + pThis->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_base_CrashCatEngine.__nvoc_vtable = &vtable.KernelFalcon.KernelCrashCatEngine.CrashCatEngine; // (crashcatEngine) super^3 + pThis->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable = &vtable.KernelFalcon.KernelCrashCatEngine; // (kcrashcatEngine) super^2 + pThis->__nvoc_base_KernelFalcon.__nvoc_vtable = &vtable.KernelFalcon; // (kflcn) super + pThis->__nvoc_vtable = &vtable; // (ksec2) this + + // Initialize vtable(s) with 10 per-object function pointer(s). __nvoc_init_funcTable_KernelSec2_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_sec2_nvoc.h b/src/nvidia/generated/g_kernel_sec2_nvoc.h index a65c16957c..f712180342 100644 --- a/src/nvidia/generated/g_kernel_sec2_nvoc.h +++ b/src/nvidia/generated/g_kernel_sec2_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -63,10 +63,15 @@ typedef struct _def_rm_flcn_bl_desc RM_FLCN_BL_DESC; #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelSec2; + + struct KernelSec2 { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelSec2 *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -82,10 +87,7 @@ struct KernelSec2 { struct KernelFalcon *__nvoc_pbase_KernelFalcon; // kflcn super struct KernelSec2 *__nvoc_pbase_KernelSec2; // ksec2 - // Vtable with 39 per-object function pointers - NV_STATUS (*__ksec2ConstructEngine__)(struct OBJGPU *, struct KernelSec2 * /*this*/, ENGDESCRIPTOR); // virtual halified (singleton optimized) override (engstate) base (engstate) body - void (*__ksec2RegisterIntrService__)(struct OBJGPU *, struct KernelSec2 * /*this*/, IntrServiceRecord *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) body - NV_STATUS (*__ksec2ServiceNotificationInterrupt__)(struct OBJGPU *, struct KernelSec2 * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) + // Vtable with 10 per-object function pointers NV_STATUS (*__ksec2ConfigureFalcon__)(struct OBJGPU *, struct KernelSec2 * /*this*/); // halified (3 hals) body NV_STATUS (*__ksec2ResetHw__)(struct OBJGPU *, struct KernelSec2 * /*this*/); // virtual halified (2 hals) override (kflcn) base (kflcn) body NV_STATUS (*__ksec2StateLoad__)(struct OBJGPU *, struct KernelSec2 * /*this*/, NvU32); // virtual halified (3 hals) override (engstate) base (engstate) body @@ -93,6 +95,25 @@ struct KernelSec2 { const BINDATA_ARCHIVE * (*__ksec2GetBinArchiveBlUcode__)(struct OBJGPU *, struct KernelSec2 * /*this*/); // halified (3 hals) body NV_STATUS (*__ksec2GetGenericBlUcode__)(struct OBJGPU *, struct KernelSec2 * /*this*/, const RM_FLCN_BL_DESC **, const NvU8 **); // halified (3 hals) body const BINDATA_ARCHIVE * (*__ksec2GetBinArchiveSecurescrubUcode__)(struct OBJGPU *, struct KernelSec2 * /*this*/); // halified (3 hals) body + NvU32 (*__ksec2RegRead__)(struct OBJGPU *, struct KernelSec2 * /*this*/, NvU32); // virtual halified (2 hals) inherited (kflcn) base (kflcn) body + void (*__ksec2RegWrite__)(struct OBJGPU *, struct KernelSec2 * /*this*/, NvU32, NvU32); // virtual halified (2 hals) inherited (kflcn) base (kflcn) body + NvU32 (*__ksec2MaskDmemAddr__)(struct OBJGPU *, struct KernelSec2 * /*this*/, NvU32); // virtual halified (3 hals) inherited (kflcn) base (kflcn) body + + // Data members + const RM_FLCN_BL_DESC *pGenericBlUcodeDesc; + const NvU8 *pGenericBlUcodeImg; +}; + + +// Metadata including vtable with 29 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelSec2 { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + const struct NVOC_VTABLE__IntrService IntrService; // (intrserv) 4 function pointers + const struct NVOC_VTABLE__KernelFalcon KernelFalcon; // (kflcn) 13 function pointers + + NV_STATUS (*__ksec2ConstructEngine__)(struct OBJGPU *, struct KernelSec2 * /*this*/, ENGDESCRIPTOR); // virtual halified (singleton optimized) override (engstate) base (engstate) body + void (*__ksec2RegisterIntrService__)(struct OBJGPU *, struct KernelSec2 * /*this*/, IntrServiceRecord *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) body + NV_STATUS (*__ksec2ServiceNotificationInterrupt__)(struct OBJGPU *, struct KernelSec2 * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual halified (singleton optimized) override (intrserv) base (intrserv) void (*__ksec2InitMissing__)(struct OBJGPU *, struct KernelSec2 * /*this*/); // virtual inherited (engstate) base (engstate) NV_STATUS (*__ksec2StatePreInitLocked__)(struct OBJGPU *, struct KernelSec2 * /*this*/); // virtual inherited (engstate) base (engstate) NV_STATUS (*__ksec2StatePreInitUnlocked__)(struct OBJGPU *, struct KernelSec2 * /*this*/); // virtual inherited (engstate) base (engstate) @@ -107,9 +128,6 @@ struct KernelSec2 { NvBool (*__ksec2IsPresent__)(struct OBJGPU *, struct KernelSec2 * /*this*/); // virtual inherited (engstate) base (engstate) NvBool (*__ksec2ClearInterrupt__)(struct OBJGPU *, struct KernelSec2 * /*this*/, IntrServiceClearInterruptArguments *); // virtual inherited (intrserv) base (intrserv) NvU32 (*__ksec2ServiceInterrupt__)(struct OBJGPU *, struct KernelSec2 * /*this*/, IntrServiceServiceInterruptArguments *); // virtual inherited (intrserv) base (intrserv) - NvU32 (*__ksec2RegRead__)(struct OBJGPU *, struct KernelSec2 * /*this*/, NvU32); // virtual halified (2 hals) inherited (kflcn) base (kflcn) body - void (*__ksec2RegWrite__)(struct OBJGPU *, struct KernelSec2 * /*this*/, NvU32, NvU32); // virtual halified (2 hals) inherited (kflcn) base (kflcn) body - NvU32 (*__ksec2MaskDmemAddr__)(struct OBJGPU *, struct KernelSec2 * /*this*/, NvU32); // virtual halified (3 hals) inherited (kflcn) base (kflcn) body NvBool (*__ksec2Configured__)(struct KernelSec2 * /*this*/); // virtual inherited (kcrashcatEngine) base (kflcn) void (*__ksec2Unload__)(struct KernelSec2 * /*this*/); // virtual inherited (kcrashcatEngine) base (kflcn) void (*__ksec2Vprintf__)(struct KernelSec2 * /*this*/, NvBool, const char *, va_list); // virtual inherited (kcrashcatEngine) base (kflcn) @@ -122,10 +140,6 @@ struct KernelSec2 { void (*__ksec2ReadEmem__)(struct KernelSec2 * /*this*/, NvU64, NvU64, void *); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) const NvU32 * (*__ksec2GetScratchOffsets__)(struct KernelSec2 * /*this*/, NV_CRASHCAT_SCRATCH_GROUP_ID); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) NvU32 (*__ksec2GetWFL0Offset__)(struct KernelSec2 * /*this*/); // virtual halified (singleton optimized) inherited (kcrashcatEngine) base (kflcn) - - // Data members - const RM_FLCN_BL_DESC *pGenericBlUcodeDesc; - const NvU8 *pGenericBlUcodeImg; }; #ifndef __NVOC_CLASS_KernelSec2_TYPEDEF__ @@ -162,13 +176,13 @@ NV_STATUS __nvoc_objCreate_KernelSec2(KernelSec2**, Dynamic*, NvU32); // Wrapper macros -#define ksec2ConstructEngine_FNPTR(pKernelSec2) pKernelSec2->__ksec2ConstructEngine__ +#define ksec2ConstructEngine_FNPTR(pKernelSec2) pKernelSec2->__nvoc_vtable->__ksec2ConstructEngine__ #define ksec2ConstructEngine(pGpu, pKernelSec2, arg3) ksec2ConstructEngine_DISPATCH(pGpu, pKernelSec2, arg3) #define ksec2ConstructEngine_HAL(pGpu, pKernelSec2, arg3) ksec2ConstructEngine_DISPATCH(pGpu, pKernelSec2, arg3) -#define ksec2RegisterIntrService_FNPTR(pKernelSec2) pKernelSec2->__ksec2RegisterIntrService__ +#define ksec2RegisterIntrService_FNPTR(pKernelSec2) pKernelSec2->__nvoc_vtable->__ksec2RegisterIntrService__ #define ksec2RegisterIntrService(pGpu, pKernelSec2, pRecords) ksec2RegisterIntrService_DISPATCH(pGpu, pKernelSec2, pRecords) #define ksec2RegisterIntrService_HAL(pGpu, pKernelSec2, pRecords) ksec2RegisterIntrService_DISPATCH(pGpu, pKernelSec2, pRecords) -#define ksec2ServiceNotificationInterrupt_FNPTR(arg_this) arg_this->__ksec2ServiceNotificationInterrupt__ +#define ksec2ServiceNotificationInterrupt_FNPTR(arg_this) arg_this->__nvoc_vtable->__ksec2ServiceNotificationInterrupt__ #define ksec2ServiceNotificationInterrupt(arg1, arg_this, arg3) ksec2ServiceNotificationInterrupt_DISPATCH(arg1, arg_this, arg3) #define ksec2ServiceNotificationInterrupt_HAL(arg1, arg_this, arg3) ksec2ServiceNotificationInterrupt_DISPATCH(arg1, arg_this, arg3) #define ksec2ConfigureFalcon_FNPTR(pKernelSec2) pKernelSec2->__ksec2ConfigureFalcon__ @@ -192,33 +206,33 @@ NV_STATUS __nvoc_objCreate_KernelSec2(KernelSec2**, Dynamic*, NvU32); #define ksec2GetBinArchiveSecurescrubUcode_FNPTR(pKernelSec2) pKernelSec2->__ksec2GetBinArchiveSecurescrubUcode__ #define ksec2GetBinArchiveSecurescrubUcode(pGpu, pKernelSec2) ksec2GetBinArchiveSecurescrubUcode_DISPATCH(pGpu, pKernelSec2) #define ksec2GetBinArchiveSecurescrubUcode_HAL(pGpu, pKernelSec2) ksec2GetBinArchiveSecurescrubUcode_DISPATCH(pGpu, pKernelSec2) -#define ksec2InitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define ksec2InitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define ksec2InitMissing(pGpu, pEngstate) ksec2InitMissing_DISPATCH(pGpu, pEngstate) -#define ksec2StatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define ksec2StatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define ksec2StatePreInitLocked(pGpu, pEngstate) ksec2StatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define ksec2StatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define ksec2StatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define ksec2StatePreInitUnlocked(pGpu, pEngstate) ksec2StatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define ksec2StateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define ksec2StateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitLocked__ #define ksec2StateInitLocked(pGpu, pEngstate) ksec2StateInitLocked_DISPATCH(pGpu, pEngstate) -#define ksec2StateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define ksec2StateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define ksec2StateInitUnlocked(pGpu, pEngstate) ksec2StateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define ksec2StatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define ksec2StatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define ksec2StatePreLoad(pGpu, pEngstate, arg3) ksec2StatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define ksec2StatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define ksec2StatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostLoad__ #define ksec2StatePostLoad(pGpu, pEngstate, arg3) ksec2StatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define ksec2StatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define ksec2StatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define ksec2StatePreUnload(pGpu, pEngstate, arg3) ksec2StatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define ksec2StateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define ksec2StateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateUnload__ #define ksec2StateUnload(pGpu, pEngstate, arg3) ksec2StateUnload_DISPATCH(pGpu, pEngstate, arg3) -#define ksec2StatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define ksec2StatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define ksec2StatePostUnload(pGpu, pEngstate, arg3) ksec2StatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define ksec2StateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define ksec2StateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateDestroy__ #define ksec2StateDestroy(pGpu, pEngstate) ksec2StateDestroy_DISPATCH(pGpu, pEngstate) -#define ksec2IsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define ksec2IsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define ksec2IsPresent(pGpu, pEngstate) ksec2IsPresent_DISPATCH(pGpu, pEngstate) -#define ksec2ClearInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservClearInterrupt__ +#define ksec2ClearInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__nvoc_vtable->__intrservClearInterrupt__ #define ksec2ClearInterrupt(pGpu, pIntrService, pParams) ksec2ClearInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define ksec2ServiceInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservServiceInterrupt__ +#define ksec2ServiceInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__nvoc_vtable->__intrservServiceInterrupt__ #define ksec2ServiceInterrupt(pGpu, pIntrService, pParams) ksec2ServiceInterrupt_DISPATCH(pGpu, pIntrService, pParams) #define ksec2RegRead_FNPTR(pKernelFlcn) pKernelFlcn->__nvoc_base_KernelFalcon.__kflcnRegRead__ #define ksec2RegRead(pGpu, pKernelFlcn, offset) ksec2RegRead_DISPATCH(pGpu, pKernelFlcn, offset) @@ -229,46 +243,46 @@ NV_STATUS __nvoc_objCreate_KernelSec2(KernelSec2**, Dynamic*, NvU32); #define ksec2MaskDmemAddr_FNPTR(pKernelFlcn) pKernelFlcn->__nvoc_base_KernelFalcon.__kflcnMaskDmemAddr__ #define ksec2MaskDmemAddr(pGpu, pKernelFlcn, addr) ksec2MaskDmemAddr_DISPATCH(pGpu, pKernelFlcn, addr) #define ksec2MaskDmemAddr_HAL(pGpu, pKernelFlcn, addr) ksec2MaskDmemAddr_DISPATCH(pGpu, pKernelFlcn, addr) -#define ksec2Configured_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineConfigured__ +#define ksec2Configured_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineConfigured__ #define ksec2Configured(arg_this) ksec2Configured_DISPATCH(arg_this) -#define ksec2Unload_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineUnload__ +#define ksec2Unload_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineUnload__ #define ksec2Unload(arg_this) ksec2Unload_DISPATCH(arg_this) -#define ksec2Vprintf_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineVprintf__ +#define ksec2Vprintf_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineVprintf__ #define ksec2Vprintf(arg_this, bReportStart, fmt, args) ksec2Vprintf_DISPATCH(arg_this, bReportStart, fmt, args) -#define ksec2PriRead_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEnginePriRead__ +#define ksec2PriRead_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEnginePriRead__ #define ksec2PriRead(arg_this, offset) ksec2PriRead_DISPATCH(arg_this, offset) -#define ksec2PriWrite_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEnginePriWrite__ +#define ksec2PriWrite_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEnginePriWrite__ #define ksec2PriWrite(arg_this, offset, data) ksec2PriWrite_DISPATCH(arg_this, offset, data) -#define ksec2MapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineMapBufferDescriptor__ +#define ksec2MapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineMapBufferDescriptor__ #define ksec2MapBufferDescriptor(arg_this, pBufDesc) ksec2MapBufferDescriptor_DISPATCH(arg_this, pBufDesc) -#define ksec2UnmapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineUnmapBufferDescriptor__ +#define ksec2UnmapBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineUnmapBufferDescriptor__ #define ksec2UnmapBufferDescriptor(arg_this, pBufDesc) ksec2UnmapBufferDescriptor_DISPATCH(arg_this, pBufDesc) -#define ksec2SyncBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineSyncBufferDescriptor__ +#define ksec2SyncBufferDescriptor_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineSyncBufferDescriptor__ #define ksec2SyncBufferDescriptor(arg_this, pBufDesc, offset, size) ksec2SyncBufferDescriptor_DISPATCH(arg_this, pBufDesc, offset, size) -#define ksec2ReadDmem_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineReadDmem__ +#define ksec2ReadDmem_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineReadDmem__ #define ksec2ReadDmem(arg_this, offset, size, pBuf) ksec2ReadDmem_DISPATCH(arg_this, offset, size, pBuf) #define ksec2ReadDmem_HAL(arg_this, offset, size, pBuf) ksec2ReadDmem_DISPATCH(arg_this, offset, size, pBuf) -#define ksec2ReadEmem_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineReadEmem__ +#define ksec2ReadEmem_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineReadEmem__ #define ksec2ReadEmem(arg_this, offset, size, pBuf) ksec2ReadEmem_DISPATCH(arg_this, offset, size, pBuf) #define ksec2ReadEmem_HAL(arg_this, offset, size, pBuf) ksec2ReadEmem_DISPATCH(arg_this, offset, size, pBuf) -#define ksec2GetScratchOffsets_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineGetScratchOffsets__ +#define ksec2GetScratchOffsets_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineGetScratchOffsets__ #define ksec2GetScratchOffsets(arg_this, scratchGroupId) ksec2GetScratchOffsets_DISPATCH(arg_this, scratchGroupId) #define ksec2GetScratchOffsets_HAL(arg_this, scratchGroupId) ksec2GetScratchOffsets_DISPATCH(arg_this, scratchGroupId) -#define ksec2GetWFL0Offset_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__kcrashcatEngineGetWFL0Offset__ +#define ksec2GetWFL0Offset_FNPTR(arg_this) arg_this->__nvoc_base_KernelFalcon.__nvoc_base_KernelCrashCatEngine.__nvoc_vtable->__kcrashcatEngineGetWFL0Offset__ #define ksec2GetWFL0Offset(arg_this) ksec2GetWFL0Offset_DISPATCH(arg_this) #define ksec2GetWFL0Offset_HAL(arg_this) ksec2GetWFL0Offset_DISPATCH(arg_this) // Dispatch functions static inline NV_STATUS ksec2ConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, ENGDESCRIPTOR arg3) { - return pKernelSec2->__ksec2ConstructEngine__(pGpu, pKernelSec2, arg3); + return pKernelSec2->__nvoc_vtable->__ksec2ConstructEngine__(pGpu, pKernelSec2, arg3); } static inline void ksec2RegisterIntrService_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, IntrServiceRecord pRecords[175]) { - pKernelSec2->__ksec2RegisterIntrService__(pGpu, pKernelSec2, pRecords); + pKernelSec2->__nvoc_vtable->__ksec2RegisterIntrService__(pGpu, pKernelSec2, pRecords); } static inline NV_STATUS ksec2ServiceNotificationInterrupt_DISPATCH(struct OBJGPU *arg1, struct KernelSec2 *arg_this, IntrServiceServiceNotificationInterruptArguments *arg3) { - return arg_this->__ksec2ServiceNotificationInterrupt__(arg1, arg_this, arg3); + return arg_this->__nvoc_vtable->__ksec2ServiceNotificationInterrupt__(arg1, arg_this, arg3); } static inline NV_STATUS ksec2ConfigureFalcon_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2) { @@ -300,59 +314,59 @@ static inline const BINDATA_ARCHIVE * ksec2GetBinArchiveSecurescrubUcode_DISPATC } static inline void ksec2InitMissing_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate) { - pEngstate->__ksec2InitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__ksec2InitMissing__(pGpu, pEngstate); } static inline NV_STATUS ksec2StatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate) { - return pEngstate->__ksec2StatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__ksec2StatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS ksec2StatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate) { - return pEngstate->__ksec2StatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__ksec2StatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS ksec2StateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate) { - return pEngstate->__ksec2StateInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__ksec2StateInitLocked__(pGpu, pEngstate); } static inline NV_STATUS ksec2StateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate) { - return pEngstate->__ksec2StateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__ksec2StateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS ksec2StatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { - return pEngstate->__ksec2StatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__ksec2StatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS ksec2StatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { - return pEngstate->__ksec2StatePostLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__ksec2StatePostLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS ksec2StatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { - return pEngstate->__ksec2StatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__ksec2StatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS ksec2StateUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { - return pEngstate->__ksec2StateUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__ksec2StateUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS ksec2StatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate, NvU32 arg3) { - return pEngstate->__ksec2StatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__ksec2StatePostUnload__(pGpu, pEngstate, arg3); } static inline void ksec2StateDestroy_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate) { - pEngstate->__ksec2StateDestroy__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__ksec2StateDestroy__(pGpu, pEngstate); } static inline NvBool ksec2IsPresent_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pEngstate) { - return pEngstate->__ksec2IsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__ksec2IsPresent__(pGpu, pEngstate); } static inline NvBool ksec2ClearInterrupt_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pIntrService, IntrServiceClearInterruptArguments *pParams) { - return pIntrService->__ksec2ClearInterrupt__(pGpu, pIntrService, pParams); + return pIntrService->__nvoc_vtable->__ksec2ClearInterrupt__(pGpu, pIntrService, pParams); } static inline NvU32 ksec2ServiceInterrupt_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pIntrService, IntrServiceServiceInterruptArguments *pParams) { - return pIntrService->__ksec2ServiceInterrupt__(pGpu, pIntrService, pParams); + return pIntrService->__nvoc_vtable->__ksec2ServiceInterrupt__(pGpu, pIntrService, pParams); } static inline NvU32 ksec2RegRead_DISPATCH(struct OBJGPU *pGpu, struct KernelSec2 *pKernelFlcn, NvU32 offset) { @@ -368,51 +382,51 @@ static inline NvU32 ksec2MaskDmemAddr_DISPATCH(struct OBJGPU *pGpu, struct Kerne } static inline NvBool ksec2Configured_DISPATCH(struct KernelSec2 *arg_this) { - return arg_this->__ksec2Configured__(arg_this); + return arg_this->__nvoc_vtable->__ksec2Configured__(arg_this); } static inline void ksec2Unload_DISPATCH(struct KernelSec2 *arg_this) { - arg_this->__ksec2Unload__(arg_this); + arg_this->__nvoc_vtable->__ksec2Unload__(arg_this); } static inline void ksec2Vprintf_DISPATCH(struct KernelSec2 *arg_this, NvBool bReportStart, const char *fmt, va_list args) { - arg_this->__ksec2Vprintf__(arg_this, bReportStart, fmt, args); + arg_this->__nvoc_vtable->__ksec2Vprintf__(arg_this, bReportStart, fmt, args); } static inline NvU32 ksec2PriRead_DISPATCH(struct KernelSec2 *arg_this, NvU32 offset) { - return arg_this->__ksec2PriRead__(arg_this, offset); + return arg_this->__nvoc_vtable->__ksec2PriRead__(arg_this, offset); } static inline void ksec2PriWrite_DISPATCH(struct KernelSec2 *arg_this, NvU32 offset, NvU32 data) { - arg_this->__ksec2PriWrite__(arg_this, offset, data); + arg_this->__nvoc_vtable->__ksec2PriWrite__(arg_this, offset, data); } static inline void * ksec2MapBufferDescriptor_DISPATCH(struct KernelSec2 *arg_this, CrashCatBufferDescriptor *pBufDesc) { - return arg_this->__ksec2MapBufferDescriptor__(arg_this, pBufDesc); + return arg_this->__nvoc_vtable->__ksec2MapBufferDescriptor__(arg_this, pBufDesc); } static inline void ksec2UnmapBufferDescriptor_DISPATCH(struct KernelSec2 *arg_this, CrashCatBufferDescriptor *pBufDesc) { - arg_this->__ksec2UnmapBufferDescriptor__(arg_this, pBufDesc); + arg_this->__nvoc_vtable->__ksec2UnmapBufferDescriptor__(arg_this, pBufDesc); } static inline void ksec2SyncBufferDescriptor_DISPATCH(struct KernelSec2 *arg_this, CrashCatBufferDescriptor *pBufDesc, NvU32 offset, NvU32 size) { - arg_this->__ksec2SyncBufferDescriptor__(arg_this, pBufDesc, offset, size); + arg_this->__nvoc_vtable->__ksec2SyncBufferDescriptor__(arg_this, pBufDesc, offset, size); } static inline void ksec2ReadDmem_DISPATCH(struct KernelSec2 *arg_this, NvU32 offset, NvU32 size, void *pBuf) { - arg_this->__ksec2ReadDmem__(arg_this, offset, size, pBuf); + arg_this->__nvoc_vtable->__ksec2ReadDmem__(arg_this, offset, size, pBuf); } static inline void ksec2ReadEmem_DISPATCH(struct KernelSec2 *arg_this, NvU64 offset, NvU64 size, void *pBuf) { - arg_this->__ksec2ReadEmem__(arg_this, offset, size, pBuf); + arg_this->__nvoc_vtable->__ksec2ReadEmem__(arg_this, offset, size, pBuf); } static inline const NvU32 * ksec2GetScratchOffsets_DISPATCH(struct KernelSec2 *arg_this, NV_CRASHCAT_SCRATCH_GROUP_ID scratchGroupId) { - return arg_this->__ksec2GetScratchOffsets__(arg_this, scratchGroupId); + return arg_this->__nvoc_vtable->__ksec2GetScratchOffsets__(arg_this, scratchGroupId); } static inline NvU32 ksec2GetWFL0Offset_DISPATCH(struct KernelSec2 *arg_this) { - return arg_this->__ksec2GetWFL0Offset__(arg_this); + return arg_this->__nvoc_vtable->__ksec2GetWFL0Offset__(arg_this); } NV_STATUS ksec2ConstructEngine_IMPL(struct OBJGPU *pGpu, struct KernelSec2 *pKernelSec2, ENGDESCRIPTOR arg3); diff --git a/src/nvidia/generated/g_kernel_sm_debugger_session_nvoc.c b/src/nvidia/generated/g_kernel_sm_debugger_session_nvoc.c index cc00c4b909..b48a0a3ce1 100644 --- a/src/nvidia/generated/g_kernel_sm_debugger_session_nvoc.c +++ b/src/nvidia/generated/g_kernel_sm_debugger_session_nvoc.c @@ -75,19 +75,25 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_RmDebuggerSession = /*pExportInfo=*/ &__nvoc_export_info_RmDebuggerSession }; +// Down-thunk(s) to bridge methods from ancestors (if any) +void __nvoc_down_thunk_RmDebuggerSession_sessionRemoveDependant(struct RsSession *pDbgSession, struct RsResourceRef *pResourceRef); // this +void __nvoc_down_thunk_RmDebuggerSession_sessionRemoveDependency(struct RsSession *pDbgSession, struct RsResourceRef *pResourceRef); // this + // 2 down-thunk(s) defined to bridge methods in RmDebuggerSession from superclasses // dbgSessionRemoveDependant: virtual override (session) base (session) -static void __nvoc_down_thunk_RmDebuggerSession_sessionRemoveDependant(struct RsSession *pDbgSession, struct RsResourceRef *pResourceRef) { +void __nvoc_down_thunk_RmDebuggerSession_sessionRemoveDependant(struct RsSession *pDbgSession, struct RsResourceRef *pResourceRef) { dbgSessionRemoveDependant((struct RmDebuggerSession *)(((unsigned char *) pDbgSession) - __nvoc_rtti_RmDebuggerSession_RsSession.offset), pResourceRef); } // dbgSessionRemoveDependency: virtual override (session) base (session) -static void __nvoc_down_thunk_RmDebuggerSession_sessionRemoveDependency(struct RsSession *pDbgSession, struct RsResourceRef *pResourceRef) { +void __nvoc_down_thunk_RmDebuggerSession_sessionRemoveDependency(struct RsSession *pDbgSession, struct RsResourceRef *pResourceRef) { dbgSessionRemoveDependency((struct RmDebuggerSession *)(((unsigned char *) pDbgSession) - __nvoc_rtti_RmDebuggerSession_RsSession.offset), pResourceRef); } +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_RmDebuggerSession = { /*numEntries=*/ 0, @@ -121,21 +127,23 @@ NV_STATUS __nvoc_ctor_RmDebuggerSession(RmDebuggerSession *pThis) { // Vtable initialization static void __nvoc_init_funcTable_RmDebuggerSession_1(RmDebuggerSession *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // dbgSessionRemoveDependant -- virtual override (session) base (session) - pThis->__dbgSessionRemoveDependant__ = &dbgSessionRemoveDependant_IMPL; - pThis->__nvoc_base_RsSession.__sessionRemoveDependant__ = &__nvoc_down_thunk_RmDebuggerSession_sessionRemoveDependant; - - // dbgSessionRemoveDependency -- virtual override (session) base (session) - pThis->__dbgSessionRemoveDependency__ = &dbgSessionRemoveDependency_IMPL; - pThis->__nvoc_base_RsSession.__sessionRemoveDependency__ = &__nvoc_down_thunk_RmDebuggerSession_sessionRemoveDependency; -} // End __nvoc_init_funcTable_RmDebuggerSession_1 with approximately 4 basic block(s). +} // End __nvoc_init_funcTable_RmDebuggerSession_1 // Initialize vtable(s) for 2 virtual method(s). void __nvoc_init_funcTable_RmDebuggerSession(RmDebuggerSession *pThis) { - // Initialize vtable(s) with 2 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__RmDebuggerSession vtable = { + .__dbgSessionRemoveDependant__ = &dbgSessionRemoveDependant_IMPL, // virtual override (session) base (session) + .RsSession.__sessionRemoveDependant__ = &__nvoc_down_thunk_RmDebuggerSession_sessionRemoveDependant, // virtual + .__dbgSessionRemoveDependency__ = &dbgSessionRemoveDependency_IMPL, // virtual override (session) base (session) + .RsSession.__sessionRemoveDependency__ = &__nvoc_down_thunk_RmDebuggerSession_sessionRemoveDependency, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RsSession.__nvoc_vtable = &vtable.RsSession; // (session) super + pThis->__nvoc_vtable = &vtable; // (dbgSession) this __nvoc_init_funcTable_RmDebuggerSession_1(pThis); } @@ -763,158 +771,236 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_KernelSM }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_down_thunk_KernelSMDebuggerSession_gpuresInternalControlForward(struct GpuResource *arg_this, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_down_thunk_KernelSMDebuggerSession_gpuresGetInternalObjectHandle(struct GpuResource *arg_this); // this + // 2 down-thunk(s) defined to bridge methods in KernelSMDebuggerSession from superclasses // ksmdbgssnInternalControlForward: virtual override (gpures) base (gpures) -static NV_STATUS __nvoc_down_thunk_KernelSMDebuggerSession_gpuresInternalControlForward(struct GpuResource *arg_this, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_down_thunk_KernelSMDebuggerSession_gpuresInternalControlForward(struct GpuResource *arg_this, NvU32 command, void *pParams, NvU32 size) { return ksmdbgssnInternalControlForward((struct KernelSMDebuggerSession *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset), command, pParams, size); } // ksmdbgssnGetInternalObjectHandle: virtual override (gpures) base (gpures) -static NvHandle __nvoc_down_thunk_KernelSMDebuggerSession_gpuresGetInternalObjectHandle(struct GpuResource *arg_this) { +NvHandle __nvoc_down_thunk_KernelSMDebuggerSession_gpuresGetInternalObjectHandle(struct GpuResource *arg_this) { return ksmdbgssnGetInternalObjectHandle((struct KernelSMDebuggerSession *)(((unsigned char *) arg_this) - __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_ksmdbgssnControl(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_ksmdbgssnMap(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_ksmdbgssnUnmap(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_ksmdbgssnShareCallback(struct KernelSMDebuggerSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_ksmdbgssnGetRegBaseOffsetAndSize(struct KernelSMDebuggerSession *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_ksmdbgssnGetMapAddrSpace(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NvBool __nvoc_up_thunk_RmResource_ksmdbgssnAccessCallback(struct KernelSMDebuggerSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_ksmdbgssnGetMemInterMapParams(struct KernelSMDebuggerSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_ksmdbgssnCheckMemInterUnmap(struct KernelSMDebuggerSession *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_ksmdbgssnGetMemoryMappingDescriptor(struct KernelSMDebuggerSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_ksmdbgssnControlSerialization_Prologue(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_ksmdbgssnControlSerialization_Epilogue(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_ksmdbgssnControl_Prologue(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_ksmdbgssnControl_Epilogue(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_ksmdbgssnCanCopy(struct KernelSMDebuggerSession *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_ksmdbgssnIsDuplicate(struct KernelSMDebuggerSession *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_ksmdbgssnPreDestruct(struct KernelSMDebuggerSession *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_ksmdbgssnControlFilter(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_ksmdbgssnIsPartialUnmapSupported(struct KernelSMDebuggerSession *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_ksmdbgssnMapTo(struct KernelSMDebuggerSession *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_ksmdbgssnUnmapFrom(struct KernelSMDebuggerSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_ksmdbgssnGetRefCount(struct KernelSMDebuggerSession *pResource); // this +void __nvoc_up_thunk_RsResource_ksmdbgssnAddAdditionalDependants(struct RsClient *pClient, struct KernelSMDebuggerSession *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_ksmdbgssnGetNotificationListPtr(struct KernelSMDebuggerSession *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_ksmdbgssnGetNotificationShare(struct KernelSMDebuggerSession *pNotifier); // this +void __nvoc_up_thunk_Notifier_ksmdbgssnSetNotificationShare(struct KernelSMDebuggerSession *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_ksmdbgssnUnregisterEvent(struct KernelSMDebuggerSession *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_ksmdbgssnGetOrAllocNotifShare(struct KernelSMDebuggerSession *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 28 up-thunk(s) defined to bridge methods in KernelSMDebuggerSession to superclasses // ksmdbgssnControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_ksmdbgssnControl(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_ksmdbgssnControl(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset), pCallContext, pParams); } // ksmdbgssnMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_ksmdbgssnMap(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_ksmdbgssnMap(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // ksmdbgssnUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_ksmdbgssnUnmap(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_ksmdbgssnUnmap(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset), pCallContext, pCpuMapping); } // ksmdbgssnShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_ksmdbgssnShareCallback(struct KernelSMDebuggerSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_ksmdbgssnShareCallback(struct KernelSMDebuggerSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // ksmdbgssnGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_ksmdbgssnGetRegBaseOffsetAndSize(struct KernelSMDebuggerSession *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_ksmdbgssnGetRegBaseOffsetAndSize(struct KernelSMDebuggerSession *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset), pGpu, pOffset, pSize); } // ksmdbgssnGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_ksmdbgssnGetMapAddrSpace(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_ksmdbgssnGetMapAddrSpace(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_KernelSMDebuggerSession_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // ksmdbgssnAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_ksmdbgssnAccessCallback(struct KernelSMDebuggerSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_ksmdbgssnAccessCallback(struct KernelSMDebuggerSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // ksmdbgssnGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_ksmdbgssnGetMemInterMapParams(struct KernelSMDebuggerSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_ksmdbgssnGetMemInterMapParams(struct KernelSMDebuggerSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), pParams); } // ksmdbgssnCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_ksmdbgssnCheckMemInterUnmap(struct KernelSMDebuggerSession *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_ksmdbgssnCheckMemInterUnmap(struct KernelSMDebuggerSession *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), bSubdeviceHandleProvided); } // ksmdbgssnGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_ksmdbgssnGetMemoryMappingDescriptor(struct KernelSMDebuggerSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_ksmdbgssnGetMemoryMappingDescriptor(struct KernelSMDebuggerSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), ppMemDesc); } // ksmdbgssnControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_ksmdbgssnControlSerialization_Prologue(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_ksmdbgssnControlSerialization_Prologue(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), pCallContext, pParams); } // ksmdbgssnControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_ksmdbgssnControlSerialization_Epilogue(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_ksmdbgssnControlSerialization_Epilogue(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), pCallContext, pParams); } // ksmdbgssnControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_ksmdbgssnControl_Prologue(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_ksmdbgssnControl_Prologue(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), pCallContext, pParams); } // ksmdbgssnControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_ksmdbgssnControl_Epilogue(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_ksmdbgssnControl_Epilogue(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RmResource.offset), pCallContext, pParams); } // ksmdbgssnCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_ksmdbgssnCanCopy(struct KernelSMDebuggerSession *pResource) { +NvBool __nvoc_up_thunk_RsResource_ksmdbgssnCanCopy(struct KernelSMDebuggerSession *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset)); } // ksmdbgssnIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_ksmdbgssnIsDuplicate(struct KernelSMDebuggerSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_ksmdbgssnIsDuplicate(struct KernelSMDebuggerSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset), hMemory, pDuplicate); } // ksmdbgssnPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_ksmdbgssnPreDestruct(struct KernelSMDebuggerSession *pResource) { +void __nvoc_up_thunk_RsResource_ksmdbgssnPreDestruct(struct KernelSMDebuggerSession *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset)); } // ksmdbgssnControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_ksmdbgssnControlFilter(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_ksmdbgssnControlFilter(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset), pCallContext, pParams); } // ksmdbgssnIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_ksmdbgssnIsPartialUnmapSupported(struct KernelSMDebuggerSession *pResource) { +NvBool __nvoc_up_thunk_RsResource_ksmdbgssnIsPartialUnmapSupported(struct KernelSMDebuggerSession *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset)); } // ksmdbgssnMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_ksmdbgssnMapTo(struct KernelSMDebuggerSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_ksmdbgssnMapTo(struct KernelSMDebuggerSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset), pParams); } // ksmdbgssnUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_ksmdbgssnUnmapFrom(struct KernelSMDebuggerSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_ksmdbgssnUnmapFrom(struct KernelSMDebuggerSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset), pParams); } // ksmdbgssnGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_ksmdbgssnGetRefCount(struct KernelSMDebuggerSession *pResource) { +NvU32 __nvoc_up_thunk_RsResource_ksmdbgssnGetRefCount(struct KernelSMDebuggerSession *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset)); } // ksmdbgssnAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_ksmdbgssnAddAdditionalDependants(struct RsClient *pClient, struct KernelSMDebuggerSession *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_ksmdbgssnAddAdditionalDependants(struct RsClient *pClient, struct KernelSMDebuggerSession *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_KernelSMDebuggerSession_RsResource.offset), pReference); } // ksmdbgssnGetNotificationListPtr: virtual inherited (notify) base (notify) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_ksmdbgssnGetNotificationListPtr(struct KernelSMDebuggerSession *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_ksmdbgssnGetNotificationListPtr(struct KernelSMDebuggerSession *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelSMDebuggerSession_Notifier.offset)); } // ksmdbgssnGetNotificationShare: virtual inherited (notify) base (notify) -static struct NotifShare * __nvoc_up_thunk_Notifier_ksmdbgssnGetNotificationShare(struct KernelSMDebuggerSession *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_ksmdbgssnGetNotificationShare(struct KernelSMDebuggerSession *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelSMDebuggerSession_Notifier.offset)); } // ksmdbgssnSetNotificationShare: virtual inherited (notify) base (notify) -static void __nvoc_up_thunk_Notifier_ksmdbgssnSetNotificationShare(struct KernelSMDebuggerSession *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_ksmdbgssnSetNotificationShare(struct KernelSMDebuggerSession *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelSMDebuggerSession_Notifier.offset), pNotifShare); } // ksmdbgssnUnregisterEvent: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_ksmdbgssnUnregisterEvent(struct KernelSMDebuggerSession *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_ksmdbgssnUnregisterEvent(struct KernelSMDebuggerSession *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelSMDebuggerSession_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // ksmdbgssnGetOrAllocNotifShare: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_ksmdbgssnGetOrAllocNotifShare(struct KernelSMDebuggerSession *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_ksmdbgssnGetOrAllocNotifShare(struct KernelSMDebuggerSession *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_KernelSMDebuggerSession_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -976,14 +1062,6 @@ static void __nvoc_init_funcTable_KernelSMDebuggerSession_1(KernelSMDebuggerSess PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // ksmdbgssnInternalControlForward -- virtual override (gpures) base (gpures) - pThis->__ksmdbgssnInternalControlForward__ = &ksmdbgssnInternalControlForward_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresInternalControlForward__ = &__nvoc_down_thunk_KernelSMDebuggerSession_gpuresInternalControlForward; - - // ksmdbgssnGetInternalObjectHandle -- virtual override (gpures) base (gpures) - pThis->__ksmdbgssnGetInternalObjectHandle__ = &ksmdbgssnGetInternalObjectHandle_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ = &__nvoc_down_thunk_KernelSMDebuggerSession_gpuresGetInternalObjectHandle; - // ksmdbgssnCtrlCmdSMDebugModeEnable -- inline exported (id=0x83de0301) body #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__ksmdbgssnCtrlCmdSMDebugModeEnable__ = &ksmdbgssnCtrlCmdSMDebugModeEnable_fcf1ac; @@ -1133,97 +1211,185 @@ static void __nvoc_init_funcTable_KernelSMDebuggerSession_1(KernelSMDebuggerSess { pThis->__ksmdbgssnCtrlCmdDebugReadMMUFaultInfo__ = &ksmdbgssnCtrlCmdDebugReadMMUFaultInfo_IMPL; } - - // ksmdbgssnControl -- virtual inherited (gpures) base (gpures) - pThis->__ksmdbgssnControl__ = &__nvoc_up_thunk_GpuResource_ksmdbgssnControl; - - // ksmdbgssnMap -- virtual inherited (gpures) base (gpures) - pThis->__ksmdbgssnMap__ = &__nvoc_up_thunk_GpuResource_ksmdbgssnMap; - - // ksmdbgssnUnmap -- virtual inherited (gpures) base (gpures) - pThis->__ksmdbgssnUnmap__ = &__nvoc_up_thunk_GpuResource_ksmdbgssnUnmap; - - // ksmdbgssnShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__ksmdbgssnShareCallback__ = &__nvoc_up_thunk_GpuResource_ksmdbgssnShareCallback; - - // ksmdbgssnGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__ksmdbgssnGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_ksmdbgssnGetRegBaseOffsetAndSize; - - // ksmdbgssnGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__ksmdbgssnGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_ksmdbgssnGetMapAddrSpace; - - // ksmdbgssnAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__ksmdbgssnAccessCallback__ = &__nvoc_up_thunk_RmResource_ksmdbgssnAccessCallback; - - // ksmdbgssnGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__ksmdbgssnGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_ksmdbgssnGetMemInterMapParams; - - // ksmdbgssnCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__ksmdbgssnCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_ksmdbgssnCheckMemInterUnmap; - - // ksmdbgssnGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__ksmdbgssnGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_ksmdbgssnGetMemoryMappingDescriptor; - - // ksmdbgssnControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__ksmdbgssnControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_ksmdbgssnControlSerialization_Prologue; - - // ksmdbgssnControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__ksmdbgssnControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_ksmdbgssnControlSerialization_Epilogue; - - // ksmdbgssnControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__ksmdbgssnControl_Prologue__ = &__nvoc_up_thunk_RmResource_ksmdbgssnControl_Prologue; - - // ksmdbgssnControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__ksmdbgssnControl_Epilogue__ = &__nvoc_up_thunk_RmResource_ksmdbgssnControl_Epilogue; - - // ksmdbgssnCanCopy -- virtual inherited (res) base (gpures) - pThis->__ksmdbgssnCanCopy__ = &__nvoc_up_thunk_RsResource_ksmdbgssnCanCopy; - - // ksmdbgssnIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__ksmdbgssnIsDuplicate__ = &__nvoc_up_thunk_RsResource_ksmdbgssnIsDuplicate; - - // ksmdbgssnPreDestruct -- virtual inherited (res) base (gpures) - pThis->__ksmdbgssnPreDestruct__ = &__nvoc_up_thunk_RsResource_ksmdbgssnPreDestruct; - - // ksmdbgssnControlFilter -- virtual inherited (res) base (gpures) - pThis->__ksmdbgssnControlFilter__ = &__nvoc_up_thunk_RsResource_ksmdbgssnControlFilter; - - // ksmdbgssnIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__ksmdbgssnIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_ksmdbgssnIsPartialUnmapSupported; - - // ksmdbgssnMapTo -- virtual inherited (res) base (gpures) - pThis->__ksmdbgssnMapTo__ = &__nvoc_up_thunk_RsResource_ksmdbgssnMapTo; - - // ksmdbgssnUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__ksmdbgssnUnmapFrom__ = &__nvoc_up_thunk_RsResource_ksmdbgssnUnmapFrom; - - // ksmdbgssnGetRefCount -- virtual inherited (res) base (gpures) - pThis->__ksmdbgssnGetRefCount__ = &__nvoc_up_thunk_RsResource_ksmdbgssnGetRefCount; - - // ksmdbgssnAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__ksmdbgssnAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_ksmdbgssnAddAdditionalDependants; - - // ksmdbgssnGetNotificationListPtr -- virtual inherited (notify) base (notify) - pThis->__ksmdbgssnGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_ksmdbgssnGetNotificationListPtr; - - // ksmdbgssnGetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__ksmdbgssnGetNotificationShare__ = &__nvoc_up_thunk_Notifier_ksmdbgssnGetNotificationShare; - - // ksmdbgssnSetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__ksmdbgssnSetNotificationShare__ = &__nvoc_up_thunk_Notifier_ksmdbgssnSetNotificationShare; - - // ksmdbgssnUnregisterEvent -- virtual inherited (notify) base (notify) - pThis->__ksmdbgssnUnregisterEvent__ = &__nvoc_up_thunk_Notifier_ksmdbgssnUnregisterEvent; - - // ksmdbgssnGetOrAllocNotifShare -- virtual inherited (notify) base (notify) - pThis->__ksmdbgssnGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_ksmdbgssnGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_KernelSMDebuggerSession_1 with approximately 62 basic block(s). +} // End __nvoc_init_funcTable_KernelSMDebuggerSession_1 with approximately 30 basic block(s). // Initialize vtable(s) for 59 virtual method(s). void __nvoc_init_funcTable_KernelSMDebuggerSession(KernelSMDebuggerSession *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 59 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__KernelSMDebuggerSession vtable = { + .__ksmdbgssnInternalControlForward__ = &ksmdbgssnInternalControlForward_IMPL, // virtual override (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &__nvoc_down_thunk_KernelSMDebuggerSession_gpuresInternalControlForward, // virtual + .__ksmdbgssnGetInternalObjectHandle__ = &ksmdbgssnGetInternalObjectHandle_IMPL, // virtual override (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &__nvoc_down_thunk_KernelSMDebuggerSession_gpuresGetInternalObjectHandle, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x208u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__ksmdbgssnControl__ = &__nvoc_up_thunk_GpuResource_ksmdbgssnControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__ksmdbgssnMap__ = &__nvoc_up_thunk_GpuResource_ksmdbgssnMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__ksmdbgssnUnmap__ = &__nvoc_up_thunk_GpuResource_ksmdbgssnUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__ksmdbgssnShareCallback__ = &__nvoc_up_thunk_GpuResource_ksmdbgssnShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__ksmdbgssnGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_ksmdbgssnGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__ksmdbgssnGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_ksmdbgssnGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__ksmdbgssnAccessCallback__ = &__nvoc_up_thunk_RmResource_ksmdbgssnAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__ksmdbgssnGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_ksmdbgssnGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__ksmdbgssnCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_ksmdbgssnCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__ksmdbgssnGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_ksmdbgssnGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__ksmdbgssnControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_ksmdbgssnControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__ksmdbgssnControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_ksmdbgssnControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__ksmdbgssnControl_Prologue__ = &__nvoc_up_thunk_RmResource_ksmdbgssnControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__ksmdbgssnControl_Epilogue__ = &__nvoc_up_thunk_RmResource_ksmdbgssnControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__ksmdbgssnCanCopy__ = &__nvoc_up_thunk_RsResource_ksmdbgssnCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__ksmdbgssnIsDuplicate__ = &__nvoc_up_thunk_RsResource_ksmdbgssnIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__ksmdbgssnPreDestruct__ = &__nvoc_up_thunk_RsResource_ksmdbgssnPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__ksmdbgssnControlFilter__ = &__nvoc_up_thunk_RsResource_ksmdbgssnControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__ksmdbgssnIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_ksmdbgssnIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__ksmdbgssnMapTo__ = &__nvoc_up_thunk_RsResource_ksmdbgssnMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__ksmdbgssnUnmapFrom__ = &__nvoc_up_thunk_RsResource_ksmdbgssnUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__ksmdbgssnGetRefCount__ = &__nvoc_up_thunk_RsResource_ksmdbgssnGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__ksmdbgssnAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_ksmdbgssnAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__ksmdbgssnGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_ksmdbgssnGetNotificationListPtr, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__ksmdbgssnGetNotificationShare__ = &__nvoc_up_thunk_Notifier_ksmdbgssnGetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__ksmdbgssnSetNotificationShare__ = &__nvoc_up_thunk_Notifier_ksmdbgssnSetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__ksmdbgssnUnregisterEvent__ = &__nvoc_up_thunk_Notifier_ksmdbgssnUnregisterEvent, // virtual inherited (notify) base (notify) + .Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__ksmdbgssnGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_ksmdbgssnGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.Notifier.INotifier; // (inotify) super^2 + pThis->__nvoc_base_Notifier.__nvoc_vtable = &vtable.Notifier; // (notify) super + pThis->__nvoc_vtable = &vtable; // (ksmdbgssn) this + + // Initialize vtable(s) with 29 per-object function pointer(s). __nvoc_init_funcTable_KernelSMDebuggerSession_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kernel_sm_debugger_session_nvoc.h b/src/nvidia/generated/g_kernel_sm_debugger_session_nvoc.h index 80d1e700d1..842c462783 100644 --- a/src/nvidia/generated/g_kernel_sm_debugger_session_nvoc.h +++ b/src/nvidia/generated/g_kernel_sm_debugger_session_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -98,10 +98,15 @@ typedef struct KernelGraphicsObject KernelGraphicsObject; #endif +// Metadata including vtable +struct NVOC_VTABLE__RmDebuggerSession; + + struct RmDebuggerSession { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__RmDebuggerSession *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RsSession __nvoc_base_RsSession; @@ -111,8 +116,13 @@ struct RmDebuggerSession { struct RsShared *__nvoc_pbase_RsShared; // shr super^2 struct RsSession *__nvoc_pbase_RsSession; // session super struct RmDebuggerSession *__nvoc_pbase_RmDebuggerSession; // dbgSession +}; + + +// Metadata including vtable with 2 function pointers plus superclass metadata +struct NVOC_VTABLE__RmDebuggerSession { + const struct NVOC_VTABLE__RsSession RsSession; // (session) 2 function pointers - // Vtable with 2 per-object function pointers void (*__dbgSessionRemoveDependant__)(struct RmDebuggerSession * /*this*/, struct RsResourceRef *); // virtual override (session) base (session) void (*__dbgSessionRemoveDependency__)(struct RmDebuggerSession * /*this*/, struct RsResourceRef *); // virtual override (session) base (session) }; @@ -147,18 +157,18 @@ NV_STATUS __nvoc_objCreate_RmDebuggerSession(RmDebuggerSession**, Dynamic*, NvU3 // Wrapper macros -#define dbgSessionRemoveDependant_FNPTR(pDbgSession) pDbgSession->__dbgSessionRemoveDependant__ +#define dbgSessionRemoveDependant_FNPTR(pDbgSession) pDbgSession->__nvoc_vtable->__dbgSessionRemoveDependant__ #define dbgSessionRemoveDependant(pDbgSession, pResourceRef) dbgSessionRemoveDependant_DISPATCH(pDbgSession, pResourceRef) -#define dbgSessionRemoveDependency_FNPTR(pDbgSession) pDbgSession->__dbgSessionRemoveDependency__ +#define dbgSessionRemoveDependency_FNPTR(pDbgSession) pDbgSession->__nvoc_vtable->__dbgSessionRemoveDependency__ #define dbgSessionRemoveDependency(pDbgSession, pResourceRef) dbgSessionRemoveDependency_DISPATCH(pDbgSession, pResourceRef) // Dispatch functions static inline void dbgSessionRemoveDependant_DISPATCH(struct RmDebuggerSession *pDbgSession, struct RsResourceRef *pResourceRef) { - pDbgSession->__dbgSessionRemoveDependant__(pDbgSession, pResourceRef); + pDbgSession->__nvoc_vtable->__dbgSessionRemoveDependant__(pDbgSession, pResourceRef); } static inline void dbgSessionRemoveDependency_DISPATCH(struct RmDebuggerSession *pDbgSession, struct RsResourceRef *pResourceRef) { - pDbgSession->__dbgSessionRemoveDependency__(pDbgSession, pResourceRef); + pDbgSession->__nvoc_vtable->__dbgSessionRemoveDependency__(pDbgSession, pResourceRef); } void dbgSessionRemoveDependant_IMPL(struct RmDebuggerSession *pDbgSession, struct RsResourceRef *pResourceRef); @@ -179,10 +189,15 @@ void dbgSessionRemoveDependency_IMPL(struct RmDebuggerSession *pDbgSession, stru #endif +// Metadata including vtable +struct NVOC_VTABLE__KernelSMDebuggerSession; + + struct KernelSMDebuggerSession { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__KernelSMDebuggerSession *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -198,9 +213,7 @@ struct KernelSMDebuggerSession { struct Notifier *__nvoc_pbase_Notifier; // notify super struct KernelSMDebuggerSession *__nvoc_pbase_KernelSMDebuggerSession; // ksmdbgssn - // Vtable with 59 per-object function pointers - NV_STATUS (*__ksmdbgssnInternalControlForward__)(struct KernelSMDebuggerSession * /*this*/, NvU32, void *, NvU32); // virtual override (gpures) base (gpures) - NvHandle (*__ksmdbgssnGetInternalObjectHandle__)(struct KernelSMDebuggerSession * /*this*/); // virtual override (gpures) base (gpures) + // Vtable with 29 per-object function pointers NV_STATUS (*__ksmdbgssnCtrlCmdSMDebugModeEnable__)(struct KernelSMDebuggerSession * /*this*/); // inline exported (id=0x83de0301) body NV_STATUS (*__ksmdbgssnCtrlCmdSMDebugModeDisable__)(struct KernelSMDebuggerSession * /*this*/); // inline exported (id=0x83de0302) body NV_STATUS (*__ksmdbgssnCtrlCmdDebugSetModeMMUDebug__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_SET_MODE_MMU_DEBUG_PARAMS *); // inline exported (id=0x83de0307) body @@ -230,6 +243,30 @@ struct KernelSMDebuggerSession { NV_STATUS (*__ksmdbgssnCtrlCmdDebugReadBatchMemory__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_ACCESS_MEMORY_PARAMS *); // exported (id=0x83de0326) NV_STATUS (*__ksmdbgssnCtrlCmdDebugWriteBatchMemory__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_ACCESS_MEMORY_PARAMS *); // exported (id=0x83de0327) NV_STATUS (*__ksmdbgssnCtrlCmdDebugReadMMUFaultInfo__)(struct KernelSMDebuggerSession * /*this*/, NV83DE_CTRL_DEBUG_READ_MMU_FAULT_INFO_PARAMS *); // halified (2 hals) exported (id=0x83de0328) + + // Data members + struct RmDebuggerSession *PRIVATE_FIELD(pDebugSession); + struct KernelGraphicsObject *PRIVATE_FIELD(pObject); + NvHandle PRIVATE_FIELD(hDebugger); + NvHandle PRIVATE_FIELD(hDebuggerClient); + NvHandle PRIVATE_FIELD(hChannel); + NvHandle PRIVATE_FIELD(hChannelClient); + NvHandle PRIVATE_FIELD(hSubdevice); + NvHandle PRIVATE_FIELD(hInternalClient); + NvHandle PRIVATE_FIELD(hInternalDevice); + NvHandle PRIVATE_FIELD(hInternalSubdevice); + NvHandle PRIVATE_FIELD(hInternalSubscription); + NvHandle PRIVATE_FIELD(hInternalMemMapping); +}; + + +// Metadata including vtable with 30 function pointers plus superclass metadata +struct NVOC_VTABLE__KernelSMDebuggerSession { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + const struct NVOC_VTABLE__Notifier Notifier; // (notify) 5 function pointers + + NV_STATUS (*__ksmdbgssnInternalControlForward__)(struct KernelSMDebuggerSession * /*this*/, NvU32, void *, NvU32); // virtual override (gpures) base (gpures) + NvHandle (*__ksmdbgssnGetInternalObjectHandle__)(struct KernelSMDebuggerSession * /*this*/); // virtual override (gpures) base (gpures) NV_STATUS (*__ksmdbgssnControl__)(struct KernelSMDebuggerSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__ksmdbgssnMap__)(struct KernelSMDebuggerSession * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__ksmdbgssnUnmap__)(struct KernelSMDebuggerSession * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -258,20 +295,6 @@ struct KernelSMDebuggerSession { void (*__ksmdbgssnSetNotificationShare__)(struct KernelSMDebuggerSession * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) NV_STATUS (*__ksmdbgssnUnregisterEvent__)(struct KernelSMDebuggerSession * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) NV_STATUS (*__ksmdbgssnGetOrAllocNotifShare__)(struct KernelSMDebuggerSession * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) - - // Data members - struct RmDebuggerSession *PRIVATE_FIELD(pDebugSession); - struct KernelGraphicsObject *PRIVATE_FIELD(pObject); - NvHandle PRIVATE_FIELD(hDebugger); - NvHandle PRIVATE_FIELD(hDebuggerClient); - NvHandle PRIVATE_FIELD(hChannel); - NvHandle PRIVATE_FIELD(hChannelClient); - NvHandle PRIVATE_FIELD(hSubdevice); - NvHandle PRIVATE_FIELD(hInternalClient); - NvHandle PRIVATE_FIELD(hInternalDevice); - NvHandle PRIVATE_FIELD(hInternalSubdevice); - NvHandle PRIVATE_FIELD(hInternalSubscription); - NvHandle PRIVATE_FIELD(hInternalMemMapping); }; #ifndef __NVOC_CLASS_KernelSMDebuggerSession_TYPEDEF__ @@ -304,9 +327,9 @@ NV_STATUS __nvoc_objCreate_KernelSMDebuggerSession(KernelSMDebuggerSession**, Dy // Wrapper macros -#define ksmdbgssnInternalControlForward_FNPTR(arg_this) arg_this->__ksmdbgssnInternalControlForward__ +#define ksmdbgssnInternalControlForward_FNPTR(arg_this) arg_this->__nvoc_vtable->__ksmdbgssnInternalControlForward__ #define ksmdbgssnInternalControlForward(arg_this, command, pParams, size) ksmdbgssnInternalControlForward_DISPATCH(arg_this, command, pParams, size) -#define ksmdbgssnGetInternalObjectHandle_FNPTR(arg_this) arg_this->__ksmdbgssnGetInternalObjectHandle__ +#define ksmdbgssnGetInternalObjectHandle_FNPTR(arg_this) arg_this->__nvoc_vtable->__ksmdbgssnGetInternalObjectHandle__ #define ksmdbgssnGetInternalObjectHandle(arg_this) ksmdbgssnGetInternalObjectHandle_DISPATCH(arg_this) #define ksmdbgssnCtrlCmdSMDebugModeEnable_FNPTR(pKernelSMDebuggerSession) pKernelSMDebuggerSession->__ksmdbgssnCtrlCmdSMDebugModeEnable__ #define ksmdbgssnCtrlCmdSMDebugModeEnable(pKernelSMDebuggerSession) ksmdbgssnCtrlCmdSMDebugModeEnable_DISPATCH(pKernelSMDebuggerSession) @@ -367,70 +390,70 @@ NV_STATUS __nvoc_objCreate_KernelSMDebuggerSession(KernelSMDebuggerSession**, Dy #define ksmdbgssnCtrlCmdDebugReadMMUFaultInfo_FNPTR(arg_this) arg_this->__ksmdbgssnCtrlCmdDebugReadMMUFaultInfo__ #define ksmdbgssnCtrlCmdDebugReadMMUFaultInfo(arg_this, arg2) ksmdbgssnCtrlCmdDebugReadMMUFaultInfo_DISPATCH(arg_this, arg2) #define ksmdbgssnCtrlCmdDebugReadMMUFaultInfo_HAL(arg_this, arg2) ksmdbgssnCtrlCmdDebugReadMMUFaultInfo_DISPATCH(arg_this, arg2) -#define ksmdbgssnControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define ksmdbgssnControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define ksmdbgssnControl(pGpuResource, pCallContext, pParams) ksmdbgssnControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define ksmdbgssnMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define ksmdbgssnMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define ksmdbgssnMap(pGpuResource, pCallContext, pParams, pCpuMapping) ksmdbgssnMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define ksmdbgssnUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define ksmdbgssnUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define ksmdbgssnUnmap(pGpuResource, pCallContext, pCpuMapping) ksmdbgssnUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define ksmdbgssnShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define ksmdbgssnShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define ksmdbgssnShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) ksmdbgssnShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define ksmdbgssnGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define ksmdbgssnGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define ksmdbgssnGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) ksmdbgssnGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define ksmdbgssnGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define ksmdbgssnGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define ksmdbgssnGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) ksmdbgssnGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define ksmdbgssnAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define ksmdbgssnAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define ksmdbgssnAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) ksmdbgssnAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define ksmdbgssnGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define ksmdbgssnGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define ksmdbgssnGetMemInterMapParams(pRmResource, pParams) ksmdbgssnGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define ksmdbgssnCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define ksmdbgssnCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define ksmdbgssnCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) ksmdbgssnCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define ksmdbgssnGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define ksmdbgssnGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define ksmdbgssnGetMemoryMappingDescriptor(pRmResource, ppMemDesc) ksmdbgssnGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define ksmdbgssnControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define ksmdbgssnControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define ksmdbgssnControlSerialization_Prologue(pResource, pCallContext, pParams) ksmdbgssnControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define ksmdbgssnControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define ksmdbgssnControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define ksmdbgssnControlSerialization_Epilogue(pResource, pCallContext, pParams) ksmdbgssnControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define ksmdbgssnControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define ksmdbgssnControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define ksmdbgssnControl_Prologue(pResource, pCallContext, pParams) ksmdbgssnControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define ksmdbgssnControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define ksmdbgssnControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define ksmdbgssnControl_Epilogue(pResource, pCallContext, pParams) ksmdbgssnControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define ksmdbgssnCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define ksmdbgssnCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define ksmdbgssnCanCopy(pResource) ksmdbgssnCanCopy_DISPATCH(pResource) -#define ksmdbgssnIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define ksmdbgssnIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define ksmdbgssnIsDuplicate(pResource, hMemory, pDuplicate) ksmdbgssnIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define ksmdbgssnPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define ksmdbgssnPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define ksmdbgssnPreDestruct(pResource) ksmdbgssnPreDestruct_DISPATCH(pResource) -#define ksmdbgssnControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define ksmdbgssnControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define ksmdbgssnControlFilter(pResource, pCallContext, pParams) ksmdbgssnControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define ksmdbgssnIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define ksmdbgssnIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define ksmdbgssnIsPartialUnmapSupported(pResource) ksmdbgssnIsPartialUnmapSupported_DISPATCH(pResource) -#define ksmdbgssnMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define ksmdbgssnMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define ksmdbgssnMapTo(pResource, pParams) ksmdbgssnMapTo_DISPATCH(pResource, pParams) -#define ksmdbgssnUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define ksmdbgssnUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define ksmdbgssnUnmapFrom(pResource, pParams) ksmdbgssnUnmapFrom_DISPATCH(pResource, pParams) -#define ksmdbgssnGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define ksmdbgssnGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define ksmdbgssnGetRefCount(pResource) ksmdbgssnGetRefCount_DISPATCH(pResource) -#define ksmdbgssnAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define ksmdbgssnAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define ksmdbgssnAddAdditionalDependants(pClient, pResource, pReference) ksmdbgssnAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define ksmdbgssnGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define ksmdbgssnGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define ksmdbgssnGetNotificationListPtr(pNotifier) ksmdbgssnGetNotificationListPtr_DISPATCH(pNotifier) -#define ksmdbgssnGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define ksmdbgssnGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define ksmdbgssnGetNotificationShare(pNotifier) ksmdbgssnGetNotificationShare_DISPATCH(pNotifier) -#define ksmdbgssnSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define ksmdbgssnSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define ksmdbgssnSetNotificationShare(pNotifier, pNotifShare) ksmdbgssnSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define ksmdbgssnUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define ksmdbgssnUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define ksmdbgssnUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) ksmdbgssnUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define ksmdbgssnGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define ksmdbgssnGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define ksmdbgssnGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) ksmdbgssnGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS ksmdbgssnInternalControlForward_DISPATCH(struct KernelSMDebuggerSession *arg_this, NvU32 command, void *pParams, NvU32 size) { - return arg_this->__ksmdbgssnInternalControlForward__(arg_this, command, pParams, size); + return arg_this->__nvoc_vtable->__ksmdbgssnInternalControlForward__(arg_this, command, pParams, size); } static inline NvHandle ksmdbgssnGetInternalObjectHandle_DISPATCH(struct KernelSMDebuggerSession *arg_this) { - return arg_this->__ksmdbgssnGetInternalObjectHandle__(arg_this); + return arg_this->__nvoc_vtable->__ksmdbgssnGetInternalObjectHandle__(arg_this); } static inline NV_STATUS ksmdbgssnCtrlCmdSMDebugModeEnable_DISPATCH(struct KernelSMDebuggerSession *pKernelSMDebuggerSession) { @@ -550,115 +573,115 @@ static inline NV_STATUS ksmdbgssnCtrlCmdDebugReadMMUFaultInfo_DISPATCH(struct Ke } static inline NV_STATUS ksmdbgssnControl_DISPATCH(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__ksmdbgssnControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__ksmdbgssnControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS ksmdbgssnMap_DISPATCH(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__ksmdbgssnMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__ksmdbgssnMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS ksmdbgssnUnmap_DISPATCH(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__ksmdbgssnUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__ksmdbgssnUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool ksmdbgssnShareCallback_DISPATCH(struct KernelSMDebuggerSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__ksmdbgssnShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__ksmdbgssnShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS ksmdbgssnGetRegBaseOffsetAndSize_DISPATCH(struct KernelSMDebuggerSession *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__ksmdbgssnGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__ksmdbgssnGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS ksmdbgssnGetMapAddrSpace_DISPATCH(struct KernelSMDebuggerSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__ksmdbgssnGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__ksmdbgssnGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NvBool ksmdbgssnAccessCallback_DISPATCH(struct KernelSMDebuggerSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__ksmdbgssnAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__ksmdbgssnAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS ksmdbgssnGetMemInterMapParams_DISPATCH(struct KernelSMDebuggerSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__ksmdbgssnGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__ksmdbgssnGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS ksmdbgssnCheckMemInterUnmap_DISPATCH(struct KernelSMDebuggerSession *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__ksmdbgssnCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__ksmdbgssnCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS ksmdbgssnGetMemoryMappingDescriptor_DISPATCH(struct KernelSMDebuggerSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__ksmdbgssnGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__ksmdbgssnGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS ksmdbgssnControlSerialization_Prologue_DISPATCH(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ksmdbgssnControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__ksmdbgssnControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void ksmdbgssnControlSerialization_Epilogue_DISPATCH(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__ksmdbgssnControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__ksmdbgssnControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS ksmdbgssnControl_Prologue_DISPATCH(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ksmdbgssnControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__ksmdbgssnControl_Prologue__(pResource, pCallContext, pParams); } static inline void ksmdbgssnControl_Epilogue_DISPATCH(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__ksmdbgssnControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__ksmdbgssnControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool ksmdbgssnCanCopy_DISPATCH(struct KernelSMDebuggerSession *pResource) { - return pResource->__ksmdbgssnCanCopy__(pResource); + return pResource->__nvoc_vtable->__ksmdbgssnCanCopy__(pResource); } static inline NV_STATUS ksmdbgssnIsDuplicate_DISPATCH(struct KernelSMDebuggerSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__ksmdbgssnIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__ksmdbgssnIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void ksmdbgssnPreDestruct_DISPATCH(struct KernelSMDebuggerSession *pResource) { - pResource->__ksmdbgssnPreDestruct__(pResource); + pResource->__nvoc_vtable->__ksmdbgssnPreDestruct__(pResource); } static inline NV_STATUS ksmdbgssnControlFilter_DISPATCH(struct KernelSMDebuggerSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__ksmdbgssnControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__ksmdbgssnControlFilter__(pResource, pCallContext, pParams); } static inline NvBool ksmdbgssnIsPartialUnmapSupported_DISPATCH(struct KernelSMDebuggerSession *pResource) { - return pResource->__ksmdbgssnIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__ksmdbgssnIsPartialUnmapSupported__(pResource); } static inline NV_STATUS ksmdbgssnMapTo_DISPATCH(struct KernelSMDebuggerSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__ksmdbgssnMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__ksmdbgssnMapTo__(pResource, pParams); } static inline NV_STATUS ksmdbgssnUnmapFrom_DISPATCH(struct KernelSMDebuggerSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__ksmdbgssnUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__ksmdbgssnUnmapFrom__(pResource, pParams); } static inline NvU32 ksmdbgssnGetRefCount_DISPATCH(struct KernelSMDebuggerSession *pResource) { - return pResource->__ksmdbgssnGetRefCount__(pResource); + return pResource->__nvoc_vtable->__ksmdbgssnGetRefCount__(pResource); } static inline void ksmdbgssnAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct KernelSMDebuggerSession *pResource, RsResourceRef *pReference) { - pResource->__ksmdbgssnAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__ksmdbgssnAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * ksmdbgssnGetNotificationListPtr_DISPATCH(struct KernelSMDebuggerSession *pNotifier) { - return pNotifier->__ksmdbgssnGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__ksmdbgssnGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * ksmdbgssnGetNotificationShare_DISPATCH(struct KernelSMDebuggerSession *pNotifier) { - return pNotifier->__ksmdbgssnGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__ksmdbgssnGetNotificationShare__(pNotifier); } static inline void ksmdbgssnSetNotificationShare_DISPATCH(struct KernelSMDebuggerSession *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__ksmdbgssnSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__ksmdbgssnSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS ksmdbgssnUnregisterEvent_DISPATCH(struct KernelSMDebuggerSession *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__ksmdbgssnUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__ksmdbgssnUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS ksmdbgssnGetOrAllocNotifShare_DISPATCH(struct KernelSMDebuggerSession *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__ksmdbgssnGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__ksmdbgssnGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS ksmdbgssnInternalControlForward_IMPL(struct KernelSMDebuggerSession *arg1, NvU32 command, void *pParams, NvU32 size); diff --git a/src/nvidia/generated/g_kernel_vgpu_mgr_nvoc.c b/src/nvidia/generated/g_kernel_vgpu_mgr_nvoc.c index ae96c22823..00a2378314 100644 --- a/src/nvidia/generated/g_kernel_vgpu_mgr_nvoc.c +++ b/src/nvidia/generated/g_kernel_vgpu_mgr_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelVgpuMgr = /*pExportInfo=*/ &__nvoc_export_info_KernelVgpuMgr }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelVgpuMgr = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_kernel_vgpu_mgr_nvoc.h b/src/nvidia/generated/g_kernel_vgpu_mgr_nvoc.h index 54b4bee1d7..5711eeb770 100644 --- a/src/nvidia/generated/g_kernel_vgpu_mgr_nvoc.h +++ b/src/nvidia/generated/g_kernel_vgpu_mgr_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -135,7 +135,6 @@ typedef struct KERNEL_HOST_VGPU_DEVICE NvU32 chidOffset[RM_ENGINE_TYPE_LAST]; NvU32 channelCount[RM_ENGINE_TYPE_LAST]; /*Number of channels available to the VF*/ NvU8 vgpuUuid[RM_SHA1_GID_SIZE]; - void *pVgpuVfioRef; struct REQUEST_VGPU_INFO_NODE *pRequestVgpuInfoNode; struct PhysMemSubAlloc *pPhysMemSubAlloc; struct HOST_VGPU_DEVICE *pHostVgpuDevice; @@ -152,6 +151,8 @@ typedef struct KERNEL_HOST_VGPU_DEVICE MEMORY_DESCRIPTOR *pGspPluginHeapMemDesc; NvBool bDisableDefaultSmcExecPartRestore; struct GPUMGR_SAVE_COMPUTE_INSTANCE savedExecPartitions[NVC637_CTRL_MAX_EXEC_PARTITIONS]; + NvBool bGpupLiveMigrationEnabled; /* GPUP Live Migration Enabled status */ + NvBool bGspPluginTaskInitialized; } KERNEL_HOST_VGPU_DEVICE; MAKE_LIST(KERNEL_HOST_VGPU_DEVICE_LIST, KERNEL_HOST_VGPU_DEVICE); @@ -209,7 +210,7 @@ typedef struct /* vGPU info received from mdev kernel module for KVM */ typedef struct REQUEST_VGPU_INFO_NODE { - NvU8 mdevUuid[VGPU_UUID_SIZE]; + NvU8 vgpuDevName[VGPU_UUID_SIZE]; NvU32 gpuPciId; NvU32 gpuPciBdf; NvU32 swizzId; @@ -306,7 +307,7 @@ kvgpumgrSetSupportedPlacementIds(struct OBJGPU *pGpu); NV_STATUS kvgpumgrUpdateHeterogeneousInfo(struct OBJGPU *pGpu, NvU32 vgpuTypeId, NvU16 *placementId, NvU64 *guestFbLength, NvU64 *guestFbOffset, - NvU64 *gspHeapOffset); + NvU64 *gspHeapOffset, NvU64 *guestBar1PFOffset); NV_STATUS kvgpumgrPgpuAddVgpuType(struct OBJGPU *pGpu, NvBool discardVgpuTypes, NVA081_CTRL_VGPU_INFO *pVgpuInfo); @@ -376,18 +377,18 @@ NV_STATUS kvgpumgrSetVgpuEncoderCapacity(struct OBJGPU *pGpu, NvU8 *vgpuUuid, NvU32 encoderCapacity); NV_STATUS -kvgpumgrCreateRequestVgpu(NvU32 gpuPciId, const NvU8 *pMdevUuid, +kvgpumgrCreateRequestVgpu(NvU32 gpuPciId, const NvU8 *pVgpuDevName, NvU32 vgpuTypeId, NvU16 *vgpuId, NvU32 gpuPciBdf); NV_STATUS -kvgpumgrDeleteRequestVgpu(const NvU8 *pMdevUuid, NvU16 vgpuId); +kvgpumgrDeleteRequestVgpu(const NvU8 *pVgpuDevName, NvU16 vgpuId); NV_STATUS kvgpumgrGetAvailableInstances(NvU32 *avail_instances, struct OBJGPU *pGpu, VGPU_TYPE *vgpuTypeInfo, NvU32 pgpuIndex, NvU8 devfn); NV_STATUS -kvgpumgrGetHostVgpuDeviceFromMdevUuid(NvU32 gpuPciId, const NvU8 *pMdevUuid, +kvgpumgrGetHostVgpuDeviceFromVgpuDevName(NvU32 gpuPciId, const NvU8 *pVgpuDevName, KERNEL_HOST_VGPU_DEVICE **ppKernelHostVgpuDevice); NV_STATUS diff --git a/src/nvidia/generated/g_kernel_video_engine_nvoc.c b/src/nvidia/generated/g_kernel_video_engine_nvoc.c index d677d3b2b0..013661e1aa 100644 --- a/src/nvidia/generated/g_kernel_video_engine_nvoc.c +++ b/src/nvidia/generated/g_kernel_video_engine_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_KernelVideoEngine = /*pExportInfo=*/ &__nvoc_export_info_KernelVideoEngine }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelVideoEngine = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_kernel_video_engine_nvoc.h b/src/nvidia/generated/g_kernel_video_engine_nvoc.h index a078123851..d9ba0cde98 100644 --- a/src/nvidia/generated/g_kernel_video_engine_nvoc.h +++ b/src/nvidia/generated/g_kernel_video_engine_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_lock_stress_nvoc.c b/src/nvidia/generated/g_lock_stress_nvoc.c index 42e6bde556..530cdfb95c 100644 --- a/src/nvidia/generated/g_lock_stress_nvoc.c +++ b/src/nvidia/generated/g_lock_stress_nvoc.c @@ -252,130 +252,198 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_LockStre }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjControl(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjMap(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjUnmap(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_lockStressObjShareCallback(struct LockStressObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjGetRegBaseOffsetAndSize(struct LockStressObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjGetMapAddrSpace(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjInternalControlForward(struct LockStressObject *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_lockStressObjGetInternalObjectHandle(struct LockStressObject *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_lockStressObjAccessCallback(struct LockStressObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_lockStressObjGetMemInterMapParams(struct LockStressObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_lockStressObjCheckMemInterUnmap(struct LockStressObject *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_lockStressObjGetMemoryMappingDescriptor(struct LockStressObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_lockStressObjControlSerialization_Prologue(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_lockStressObjControlSerialization_Epilogue(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_lockStressObjControl_Prologue(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_lockStressObjControl_Epilogue(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_lockStressObjCanCopy(struct LockStressObject *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_lockStressObjIsDuplicate(struct LockStressObject *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_lockStressObjPreDestruct(struct LockStressObject *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_lockStressObjControlFilter(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_lockStressObjIsPartialUnmapSupported(struct LockStressObject *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_lockStressObjMapTo(struct LockStressObject *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_lockStressObjUnmapFrom(struct LockStressObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_lockStressObjGetRefCount(struct LockStressObject *pResource); // this +void __nvoc_up_thunk_RsResource_lockStressObjAddAdditionalDependants(struct RsClient *pClient, struct LockStressObject *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in LockStressObject to superclasses // lockStressObjControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjControl(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjControl(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_LockStressObject_GpuResource.offset), pCallContext, pParams); } // lockStressObjMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjMap(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjMap(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_LockStressObject_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // lockStressObjUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjUnmap(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjUnmap(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_LockStressObject_GpuResource.offset), pCallContext, pCpuMapping); } // lockStressObjShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_lockStressObjShareCallback(struct LockStressObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_lockStressObjShareCallback(struct LockStressObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_LockStressObject_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // lockStressObjGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjGetRegBaseOffsetAndSize(struct LockStressObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjGetRegBaseOffsetAndSize(struct LockStressObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_LockStressObject_GpuResource.offset), pGpu, pOffset, pSize); } // lockStressObjGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjGetMapAddrSpace(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjGetMapAddrSpace(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_LockStressObject_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // lockStressObjInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjInternalControlForward(struct LockStressObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_lockStressObjInternalControlForward(struct LockStressObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_LockStressObject_GpuResource.offset), command, pParams, size); } // lockStressObjGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_lockStressObjGetInternalObjectHandle(struct LockStressObject *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_lockStressObjGetInternalObjectHandle(struct LockStressObject *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_LockStressObject_GpuResource.offset)); } // lockStressObjAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_lockStressObjAccessCallback(struct LockStressObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_lockStressObjAccessCallback(struct LockStressObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // lockStressObjGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_lockStressObjGetMemInterMapParams(struct LockStressObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_lockStressObjGetMemInterMapParams(struct LockStressObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_LockStressObject_RmResource.offset), pParams); } // lockStressObjCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_lockStressObjCheckMemInterUnmap(struct LockStressObject *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_lockStressObjCheckMemInterUnmap(struct LockStressObject *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_LockStressObject_RmResource.offset), bSubdeviceHandleProvided); } // lockStressObjGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_lockStressObjGetMemoryMappingDescriptor(struct LockStressObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_lockStressObjGetMemoryMappingDescriptor(struct LockStressObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_LockStressObject_RmResource.offset), ppMemDesc); } // lockStressObjControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_lockStressObjControlSerialization_Prologue(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_lockStressObjControlSerialization_Prologue(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RmResource.offset), pCallContext, pParams); } // lockStressObjControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_lockStressObjControlSerialization_Epilogue(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_lockStressObjControlSerialization_Epilogue(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RmResource.offset), pCallContext, pParams); } // lockStressObjControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_lockStressObjControl_Prologue(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_lockStressObjControl_Prologue(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RmResource.offset), pCallContext, pParams); } // lockStressObjControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_lockStressObjControl_Epilogue(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_lockStressObjControl_Epilogue(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RmResource.offset), pCallContext, pParams); } // lockStressObjCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_lockStressObjCanCopy(struct LockStressObject *pResource) { +NvBool __nvoc_up_thunk_RsResource_lockStressObjCanCopy(struct LockStressObject *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RsResource.offset)); } // lockStressObjIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_lockStressObjIsDuplicate(struct LockStressObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_lockStressObjIsDuplicate(struct LockStressObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RsResource.offset), hMemory, pDuplicate); } // lockStressObjPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_lockStressObjPreDestruct(struct LockStressObject *pResource) { +void __nvoc_up_thunk_RsResource_lockStressObjPreDestruct(struct LockStressObject *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RsResource.offset)); } // lockStressObjControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_lockStressObjControlFilter(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_lockStressObjControlFilter(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RsResource.offset), pCallContext, pParams); } // lockStressObjIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_lockStressObjIsPartialUnmapSupported(struct LockStressObject *pResource) { +NvBool __nvoc_up_thunk_RsResource_lockStressObjIsPartialUnmapSupported(struct LockStressObject *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RsResource.offset)); } // lockStressObjMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_lockStressObjMapTo(struct LockStressObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_lockStressObjMapTo(struct LockStressObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RsResource.offset), pParams); } // lockStressObjUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_lockStressObjUnmapFrom(struct LockStressObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_lockStressObjUnmapFrom(struct LockStressObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RsResource.offset), pParams); } // lockStressObjGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_lockStressObjGetRefCount(struct LockStressObject *pResource) { +NvU32 __nvoc_up_thunk_RsResource_lockStressObjGetRefCount(struct LockStressObject *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RsResource.offset)); } // lockStressObjAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_lockStressObjAddAdditionalDependants(struct RsClient *pClient, struct LockStressObject *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_lockStressObjAddAdditionalDependants(struct RsClient *pClient, struct LockStressObject *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_LockStressObject_RsResource.offset), pReference); } @@ -469,88 +537,132 @@ static void __nvoc_init_funcTable_LockStressObject_1(LockStressObject *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__lockStressObjCtrlCmdGetLockStressCounters__ = &lockStressObjCtrlCmdGetLockStressCounters_IMPL; #endif - - // lockStressObjControl -- virtual inherited (gpures) base (gpures) - pThis->__lockStressObjControl__ = &__nvoc_up_thunk_GpuResource_lockStressObjControl; - - // lockStressObjMap -- virtual inherited (gpures) base (gpures) - pThis->__lockStressObjMap__ = &__nvoc_up_thunk_GpuResource_lockStressObjMap; - - // lockStressObjUnmap -- virtual inherited (gpures) base (gpures) - pThis->__lockStressObjUnmap__ = &__nvoc_up_thunk_GpuResource_lockStressObjUnmap; - - // lockStressObjShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__lockStressObjShareCallback__ = &__nvoc_up_thunk_GpuResource_lockStressObjShareCallback; - - // lockStressObjGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__lockStressObjGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_lockStressObjGetRegBaseOffsetAndSize; - - // lockStressObjGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__lockStressObjGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_lockStressObjGetMapAddrSpace; - - // lockStressObjInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__lockStressObjInternalControlForward__ = &__nvoc_up_thunk_GpuResource_lockStressObjInternalControlForward; - - // lockStressObjGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__lockStressObjGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_lockStressObjGetInternalObjectHandle; - - // lockStressObjAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__lockStressObjAccessCallback__ = &__nvoc_up_thunk_RmResource_lockStressObjAccessCallback; - - // lockStressObjGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__lockStressObjGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_lockStressObjGetMemInterMapParams; - - // lockStressObjCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__lockStressObjCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_lockStressObjCheckMemInterUnmap; - - // lockStressObjGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__lockStressObjGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_lockStressObjGetMemoryMappingDescriptor; - - // lockStressObjControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__lockStressObjControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_lockStressObjControlSerialization_Prologue; - - // lockStressObjControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__lockStressObjControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_lockStressObjControlSerialization_Epilogue; - - // lockStressObjControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__lockStressObjControl_Prologue__ = &__nvoc_up_thunk_RmResource_lockStressObjControl_Prologue; - - // lockStressObjControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__lockStressObjControl_Epilogue__ = &__nvoc_up_thunk_RmResource_lockStressObjControl_Epilogue; - - // lockStressObjCanCopy -- virtual inherited (res) base (gpures) - pThis->__lockStressObjCanCopy__ = &__nvoc_up_thunk_RsResource_lockStressObjCanCopy; - - // lockStressObjIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__lockStressObjIsDuplicate__ = &__nvoc_up_thunk_RsResource_lockStressObjIsDuplicate; - - // lockStressObjPreDestruct -- virtual inherited (res) base (gpures) - pThis->__lockStressObjPreDestruct__ = &__nvoc_up_thunk_RsResource_lockStressObjPreDestruct; - - // lockStressObjControlFilter -- virtual inherited (res) base (gpures) - pThis->__lockStressObjControlFilter__ = &__nvoc_up_thunk_RsResource_lockStressObjControlFilter; - - // lockStressObjIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__lockStressObjIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_lockStressObjIsPartialUnmapSupported; - - // lockStressObjMapTo -- virtual inherited (res) base (gpures) - pThis->__lockStressObjMapTo__ = &__nvoc_up_thunk_RsResource_lockStressObjMapTo; - - // lockStressObjUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__lockStressObjUnmapFrom__ = &__nvoc_up_thunk_RsResource_lockStressObjUnmapFrom; - - // lockStressObjGetRefCount -- virtual inherited (res) base (gpures) - pThis->__lockStressObjGetRefCount__ = &__nvoc_up_thunk_RsResource_lockStressObjGetRefCount; - - // lockStressObjAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__lockStressObjAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_lockStressObjAddAdditionalDependants; -} // End __nvoc_init_funcTable_LockStressObject_1 with approximately 35 basic block(s). +} // End __nvoc_init_funcTable_LockStressObject_1 with approximately 10 basic block(s). // Initialize vtable(s) for 35 virtual method(s). void __nvoc_init_funcTable_LockStressObject(LockStressObject *pThis) { - // Initialize vtable(s) with 35 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__LockStressObject vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__lockStressObjControl__ = &__nvoc_up_thunk_GpuResource_lockStressObjControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__lockStressObjMap__ = &__nvoc_up_thunk_GpuResource_lockStressObjMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__lockStressObjUnmap__ = &__nvoc_up_thunk_GpuResource_lockStressObjUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__lockStressObjShareCallback__ = &__nvoc_up_thunk_GpuResource_lockStressObjShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__lockStressObjGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_lockStressObjGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__lockStressObjGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_lockStressObjGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__lockStressObjInternalControlForward__ = &__nvoc_up_thunk_GpuResource_lockStressObjInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__lockStressObjGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_lockStressObjGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__lockStressObjAccessCallback__ = &__nvoc_up_thunk_RmResource_lockStressObjAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__lockStressObjGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_lockStressObjGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__lockStressObjCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_lockStressObjCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__lockStressObjGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_lockStressObjGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__lockStressObjControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_lockStressObjControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__lockStressObjControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_lockStressObjControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__lockStressObjControl_Prologue__ = &__nvoc_up_thunk_RmResource_lockStressObjControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__lockStressObjControl_Epilogue__ = &__nvoc_up_thunk_RmResource_lockStressObjControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__lockStressObjCanCopy__ = &__nvoc_up_thunk_RsResource_lockStressObjCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__lockStressObjIsDuplicate__ = &__nvoc_up_thunk_RsResource_lockStressObjIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__lockStressObjPreDestruct__ = &__nvoc_up_thunk_RsResource_lockStressObjPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__lockStressObjControlFilter__ = &__nvoc_up_thunk_RsResource_lockStressObjControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__lockStressObjIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_lockStressObjIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__lockStressObjMapTo__ = &__nvoc_up_thunk_RsResource_lockStressObjMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__lockStressObjUnmapFrom__ = &__nvoc_up_thunk_RsResource_lockStressObjUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__lockStressObjGetRefCount__ = &__nvoc_up_thunk_RsResource_lockStressObjGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__lockStressObjAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_lockStressObjAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (lockStressObj) this + + // Initialize vtable(s) with 10 per-object function pointer(s). __nvoc_init_funcTable_LockStressObject_1(pThis); } diff --git a/src/nvidia/generated/g_lock_stress_nvoc.h b/src/nvidia/generated/g_lock_stress_nvoc.h index 417e1de930..087ded73fb 100644 --- a/src/nvidia/generated/g_lock_stress_nvoc.h +++ b/src/nvidia/generated/g_lock_stress_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -60,10 +60,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__LockStressObject; + + struct LockStressObject { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__LockStressObject *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -76,7 +81,7 @@ struct LockStressObject { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct LockStressObject *__nvoc_pbase_LockStressObject; // lockStressObj - // Vtable with 35 per-object function pointers + // Vtable with 10 per-object function pointers NV_STATUS (*__lockStressObjCtrlCmdResetLockStressState__)(struct LockStressObject * /*this*/); // exported (id=0x1000101) NV_STATUS (*__lockStressObjCtrlCmdPerformLockStressAllRmLocks__)(struct LockStressObject * /*this*/, NV0100_CTRL_PERFORM_LOCK_STRESS_ALL_RM_LOCKS_PARAMS *); // exported (id=0x1000102) NV_STATUS (*__lockStressObjCtrlCmdPerformLockStressNoGpusLock__)(struct LockStressObject * /*this*/, NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_PARAMS *); // exported (id=0x1000103) @@ -87,6 +92,19 @@ struct LockStressObject { NV_STATUS (*__lockStressObjCtrlCmdPerformLockStressInternalApiLockReadMode__)(struct LockStressObject * /*this*/, NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_API_LOCK_READ_MODE_PARAMS *); // exported (id=0x1000108) NV_STATUS (*__lockStressObjCtrlCmdPerformLockStressInternalNoGpusLockApiLockReadMode__)(struct LockStressObject * /*this*/, NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS *); // exported (id=0x1000109) NV_STATUS (*__lockStressObjCtrlCmdGetLockStressCounters__)(struct LockStressObject * /*this*/, NV0100_CTRL_GET_LOCK_STRESS_COUNTERS_PARAMS *); // exported (id=0x100010a) + + // Data members + NvHandle PRIVATE_FIELD(hInternalClient); + NvHandle PRIVATE_FIELD(hInternalDevice); + NvHandle PRIVATE_FIELD(hInternalSubdevice); + NvHandle PRIVATE_FIELD(hInternalLockStressObject); +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__LockStressObject { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + NV_STATUS (*__lockStressObjControl__)(struct LockStressObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__lockStressObjMap__)(struct LockStressObject * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__lockStressObjUnmap__)(struct LockStressObject * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -112,12 +130,6 @@ struct LockStressObject { NV_STATUS (*__lockStressObjUnmapFrom__)(struct LockStressObject * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__lockStressObjGetRefCount__)(struct LockStressObject * /*this*/); // virtual inherited (res) base (gpures) void (*__lockStressObjAddAdditionalDependants__)(struct RsClient *, struct LockStressObject * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - NvHandle PRIVATE_FIELD(hInternalClient); - NvHandle PRIVATE_FIELD(hInternalDevice); - NvHandle PRIVATE_FIELD(hInternalSubdevice); - NvHandle PRIVATE_FIELD(hInternalLockStressObject); }; #ifndef __NVOC_CLASS_LockStressObject_TYPEDEF__ @@ -170,55 +182,55 @@ NV_STATUS __nvoc_objCreate_LockStressObject(LockStressObject**, Dynamic*, NvU32, #define lockStressObjCtrlCmdPerformLockStressInternalNoGpusLockApiLockReadMode(pResource, pParams) lockStressObjCtrlCmdPerformLockStressInternalNoGpusLockApiLockReadMode_DISPATCH(pResource, pParams) #define lockStressObjCtrlCmdGetLockStressCounters_FNPTR(pResource) pResource->__lockStressObjCtrlCmdGetLockStressCounters__ #define lockStressObjCtrlCmdGetLockStressCounters(pResource, pParams) lockStressObjCtrlCmdGetLockStressCounters_DISPATCH(pResource, pParams) -#define lockStressObjControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define lockStressObjControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define lockStressObjControl(pGpuResource, pCallContext, pParams) lockStressObjControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define lockStressObjMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define lockStressObjMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define lockStressObjMap(pGpuResource, pCallContext, pParams, pCpuMapping) lockStressObjMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define lockStressObjUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define lockStressObjUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define lockStressObjUnmap(pGpuResource, pCallContext, pCpuMapping) lockStressObjUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define lockStressObjShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define lockStressObjShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define lockStressObjShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) lockStressObjShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define lockStressObjGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define lockStressObjGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define lockStressObjGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) lockStressObjGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define lockStressObjGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define lockStressObjGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define lockStressObjGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) lockStressObjGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define lockStressObjInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define lockStressObjInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define lockStressObjInternalControlForward(pGpuResource, command, pParams, size) lockStressObjInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define lockStressObjGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define lockStressObjGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define lockStressObjGetInternalObjectHandle(pGpuResource) lockStressObjGetInternalObjectHandle_DISPATCH(pGpuResource) -#define lockStressObjAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define lockStressObjAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define lockStressObjAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) lockStressObjAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define lockStressObjGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define lockStressObjGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define lockStressObjGetMemInterMapParams(pRmResource, pParams) lockStressObjGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define lockStressObjCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define lockStressObjCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define lockStressObjCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) lockStressObjCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define lockStressObjGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define lockStressObjGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define lockStressObjGetMemoryMappingDescriptor(pRmResource, ppMemDesc) lockStressObjGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define lockStressObjControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define lockStressObjControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define lockStressObjControlSerialization_Prologue(pResource, pCallContext, pParams) lockStressObjControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define lockStressObjControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define lockStressObjControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define lockStressObjControlSerialization_Epilogue(pResource, pCallContext, pParams) lockStressObjControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define lockStressObjControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define lockStressObjControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define lockStressObjControl_Prologue(pResource, pCallContext, pParams) lockStressObjControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define lockStressObjControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define lockStressObjControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define lockStressObjControl_Epilogue(pResource, pCallContext, pParams) lockStressObjControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define lockStressObjCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define lockStressObjCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define lockStressObjCanCopy(pResource) lockStressObjCanCopy_DISPATCH(pResource) -#define lockStressObjIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define lockStressObjIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define lockStressObjIsDuplicate(pResource, hMemory, pDuplicate) lockStressObjIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define lockStressObjPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define lockStressObjPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define lockStressObjPreDestruct(pResource) lockStressObjPreDestruct_DISPATCH(pResource) -#define lockStressObjControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define lockStressObjControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define lockStressObjControlFilter(pResource, pCallContext, pParams) lockStressObjControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define lockStressObjIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define lockStressObjIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define lockStressObjIsPartialUnmapSupported(pResource) lockStressObjIsPartialUnmapSupported_DISPATCH(pResource) -#define lockStressObjMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define lockStressObjMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define lockStressObjMapTo(pResource, pParams) lockStressObjMapTo_DISPATCH(pResource, pParams) -#define lockStressObjUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define lockStressObjUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define lockStressObjUnmapFrom(pResource, pParams) lockStressObjUnmapFrom_DISPATCH(pResource, pParams) -#define lockStressObjGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define lockStressObjGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define lockStressObjGetRefCount(pResource) lockStressObjGetRefCount_DISPATCH(pResource) -#define lockStressObjAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define lockStressObjAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define lockStressObjAddAdditionalDependants(pClient, pResource, pReference) lockStressObjAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions @@ -263,103 +275,103 @@ static inline NV_STATUS lockStressObjCtrlCmdGetLockStressCounters_DISPATCH(struc } static inline NV_STATUS lockStressObjControl_DISPATCH(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__lockStressObjControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__lockStressObjControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS lockStressObjMap_DISPATCH(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__lockStressObjMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__lockStressObjMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS lockStressObjUnmap_DISPATCH(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__lockStressObjUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__lockStressObjUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool lockStressObjShareCallback_DISPATCH(struct LockStressObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__lockStressObjShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__lockStressObjShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS lockStressObjGetRegBaseOffsetAndSize_DISPATCH(struct LockStressObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__lockStressObjGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__lockStressObjGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS lockStressObjGetMapAddrSpace_DISPATCH(struct LockStressObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__lockStressObjGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__lockStressObjGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS lockStressObjInternalControlForward_DISPATCH(struct LockStressObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__lockStressObjInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__lockStressObjInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle lockStressObjGetInternalObjectHandle_DISPATCH(struct LockStressObject *pGpuResource) { - return pGpuResource->__lockStressObjGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__lockStressObjGetInternalObjectHandle__(pGpuResource); } static inline NvBool lockStressObjAccessCallback_DISPATCH(struct LockStressObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__lockStressObjAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__lockStressObjAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS lockStressObjGetMemInterMapParams_DISPATCH(struct LockStressObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__lockStressObjGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__lockStressObjGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS lockStressObjCheckMemInterUnmap_DISPATCH(struct LockStressObject *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__lockStressObjCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__lockStressObjCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS lockStressObjGetMemoryMappingDescriptor_DISPATCH(struct LockStressObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__lockStressObjGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__lockStressObjGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS lockStressObjControlSerialization_Prologue_DISPATCH(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__lockStressObjControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__lockStressObjControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void lockStressObjControlSerialization_Epilogue_DISPATCH(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__lockStressObjControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__lockStressObjControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS lockStressObjControl_Prologue_DISPATCH(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__lockStressObjControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__lockStressObjControl_Prologue__(pResource, pCallContext, pParams); } static inline void lockStressObjControl_Epilogue_DISPATCH(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__lockStressObjControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__lockStressObjControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool lockStressObjCanCopy_DISPATCH(struct LockStressObject *pResource) { - return pResource->__lockStressObjCanCopy__(pResource); + return pResource->__nvoc_vtable->__lockStressObjCanCopy__(pResource); } static inline NV_STATUS lockStressObjIsDuplicate_DISPATCH(struct LockStressObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__lockStressObjIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__lockStressObjIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void lockStressObjPreDestruct_DISPATCH(struct LockStressObject *pResource) { - pResource->__lockStressObjPreDestruct__(pResource); + pResource->__nvoc_vtable->__lockStressObjPreDestruct__(pResource); } static inline NV_STATUS lockStressObjControlFilter_DISPATCH(struct LockStressObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__lockStressObjControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__lockStressObjControlFilter__(pResource, pCallContext, pParams); } static inline NvBool lockStressObjIsPartialUnmapSupported_DISPATCH(struct LockStressObject *pResource) { - return pResource->__lockStressObjIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__lockStressObjIsPartialUnmapSupported__(pResource); } static inline NV_STATUS lockStressObjMapTo_DISPATCH(struct LockStressObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__lockStressObjMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__lockStressObjMapTo__(pResource, pParams); } static inline NV_STATUS lockStressObjUnmapFrom_DISPATCH(struct LockStressObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__lockStressObjUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__lockStressObjUnmapFrom__(pResource, pParams); } static inline NvU32 lockStressObjGetRefCount_DISPATCH(struct LockStressObject *pResource) { - return pResource->__lockStressObjGetRefCount__(pResource); + return pResource->__nvoc_vtable->__lockStressObjGetRefCount__(pResource); } static inline void lockStressObjAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct LockStressObject *pResource, RsResourceRef *pReference) { - pResource->__lockStressObjAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__lockStressObjAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS lockStressObjCtrlCmdResetLockStressState_IMPL(struct LockStressObject *pResource); diff --git a/src/nvidia/generated/g_mem_desc_nvoc.h b/src/nvidia/generated/g_mem_desc_nvoc.h index 6e23670f6d..4a28590519 100644 --- a/src/nvidia/generated/g_mem_desc_nvoc.h +++ b/src/nvidia/generated/g_mem_desc_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -118,6 +118,10 @@ typedef NvU32 NV_ADDRESS_SPACE; #define ADDR_EGM 7 // Extended GPU Memory (EGM) #define ADDR_FABRIC_MC 8 // Multicast fabric address space (MCFLA) +typedef NvU32 MEMDESC_CUSTOM_HEAP; +#define MEMDESC_CUSTOM_HEAP_NONE 0 +#define MEMDESC_CUSTOM_HEAP_ACR 1 + // // Address translation identifiers: // @@ -384,15 +388,15 @@ typedef enum NV_FB_ALLOC_RM_INTERNAL_OWNER_GSP_NOTIFY_OP_SURFACE = 177U, NV_FB_ALLOC_RM_INTERNAL_OWNER_FAKE_WPR_RSVD = 178U, NV_FB_ALLOC_RM_INTERNAL_OWNER_GR_SCRUB_CHANNEL = 179U, + NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_147 = 180U, + NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_148 = 181U, + NV_FB_ALLOC_RM_INTERNAL_OWNER_PMU_ACR_SHADOW_COPY = 182U, + NV_FB_ALLOC_RM_INTERNAL_OWNER_FLCN_BACKING_STORE = 183U, // // Unused tags from here, for any new use-case it's required // to replace the below tags with known verbose strings // - NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_147 = 180U, - NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_148 = 181U, - NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_149 = 182U, - NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_150 = 183U, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_151 = 184U, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_152 = 185U, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_153 = 186U, @@ -909,8 +913,8 @@ NV_ADDRESS_SPACE memdescGetAddressSpace(PMEMORY_DESCRIPTOR pMemDesc); NvU64 memdescGetPageSize(MEMORY_DESCRIPTOR *pMemDesc, ADDRESS_TRANSLATION addressTranslation); void memdescSetPageSize(MEMORY_DESCRIPTOR *pMemDesc, ADDRESS_TRANSLATION addressTranslation, NvU64 pageSize); PMEMORY_DESCRIPTOR memdescGetRootMemDesc(PMEMORY_DESCRIPTOR pMemDesc, NvU64 *pRootOffset); -void memdescSetCustomHeap(PMEMORY_DESCRIPTOR); -NvBool memdescGetCustomHeap(PMEMORY_DESCRIPTOR); +void memdescSetCustomHeap(PMEMORY_DESCRIPTOR, MEMDESC_CUSTOM_HEAP heap); +MEMDESC_CUSTOM_HEAP memdescGetCustomHeap(PMEMORY_DESCRIPTOR); NV_STATUS memdescSetPageArrayGranularity(MEMORY_DESCRIPTOR *pMemDesc, NvU64 pageArrayGranularity); NvBool memdescAcquireRmExclusiveUse(MEMORY_DESCRIPTOR *pMemDesc); NV_STATUS memdescFillMemdescForPhysAttr(MEMORY_DESCRIPTOR *pMemDesc, ADDRESS_TRANSLATION addressTranslation, @@ -1341,7 +1345,10 @@ void memdescSetName(OBJGPU*, MEMORY_DESCRIPTOR *pMemDesc, const char *name, cons // created using NV01_MEMORY_LIST_SYSTEM, NV01_MEMORY_LIST_FBMEM or NV01_MEMORY_LIST_OBJECT. #define MEMDESC_FLAGS_LIST_MEMORY NVBIT64(34) -// unused NVBIT64(35) +// This flag is used to configure the memory descriptor as SKED reflected for SYSMEM address spaces. +// Memory accesses to these pages will be routed to SKED. Note that the memory aperture needs to be +// non-coherent to enable the feature. +#define MEMDESC_FLAGS_ALLOC_SKED_REFLECTED NVBIT64(35) // This flag is used to denote that this memdesc is allocated from // a context buffer pool. When this flag is set, we expect a pointer @@ -1417,6 +1424,7 @@ void memdescSetName(OBJGPU*, MEMORY_DESCRIPTOR *pMemDesc, const char *name, cons // #define MEMDESC_FLAGS_RESTORE_PTE_KIND_ON_FREE NVBIT64(49) +#define MEMDESC_FLAGS_ALLOC_FROM_SCANOUT_CARVEOUT NVBIT64(51) #endif // _MEMDESC_H_ diff --git a/src/nvidia/generated/g_mem_export_nvoc.c b/src/nvidia/generated/g_mem_export_nvoc.c index d79913cf72..d1f9c33ff8 100644 --- a/src/nvidia/generated/g_mem_export_nvoc.c +++ b/src/nvidia/generated/g_mem_export_nvoc.c @@ -138,113 +138,156 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryEx }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_down_thunk_MemoryExport_resCanCopy(struct RsResource *pMemoryExport); // this +NV_STATUS __nvoc_down_thunk_MemoryExport_resControl(struct RsResource *pMemoryExport, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this + // 2 down-thunk(s) defined to bridge methods in MemoryExport from superclasses // memoryexportCanCopy: virtual override (res) base (rmres) -static NvBool __nvoc_down_thunk_MemoryExport_resCanCopy(struct RsResource *pMemoryExport) { +NvBool __nvoc_down_thunk_MemoryExport_resCanCopy(struct RsResource *pMemoryExport) { return memoryexportCanCopy((struct MemoryExport *)(((unsigned char *) pMemoryExport) - __nvoc_rtti_MemoryExport_RsResource.offset)); } // memoryexportControl: virtual override (res) base (rmres) -static NV_STATUS __nvoc_down_thunk_MemoryExport_resControl(struct RsResource *pMemoryExport, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_down_thunk_MemoryExport_resControl(struct RsResource *pMemoryExport, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return memoryexportControl((struct MemoryExport *)(((unsigned char *) pMemoryExport) - __nvoc_rtti_MemoryExport_RsResource.offset), pCallContext, pParams); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_RmResource_memoryexportAccessCallback(struct MemoryExport *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_memoryexportShareCallback(struct MemoryExport *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_memoryexportGetMemInterMapParams(struct MemoryExport *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_memoryexportCheckMemInterUnmap(struct MemoryExport *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_memoryexportGetMemoryMappingDescriptor(struct MemoryExport *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_memoryexportControlSerialization_Prologue(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_memoryexportControlSerialization_Epilogue(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_memoryexportControl_Prologue(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_memoryexportControl_Epilogue(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_memoryexportIsDuplicate(struct MemoryExport *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_memoryexportPreDestruct(struct MemoryExport *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_memoryexportControlFilter(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_memoryexportMap(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_memoryexportUnmap(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_memoryexportIsPartialUnmapSupported(struct MemoryExport *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_memoryexportMapTo(struct MemoryExport *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_memoryexportUnmapFrom(struct MemoryExport *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_memoryexportGetRefCount(struct MemoryExport *pResource); // this +void __nvoc_up_thunk_RsResource_memoryexportAddAdditionalDependants(struct RsClient *pClient, struct MemoryExport *pResource, RsResourceRef *pReference); // this + // 19 up-thunk(s) defined to bridge methods in MemoryExport to superclasses // memoryexportAccessCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_memoryexportAccessCallback(struct MemoryExport *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_memoryexportAccessCallback(struct MemoryExport *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // memoryexportShareCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_memoryexportShareCallback(struct MemoryExport *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_memoryexportShareCallback(struct MemoryExport *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // memoryexportGetMemInterMapParams: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_memoryexportGetMemInterMapParams(struct MemoryExport *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_memoryexportGetMemInterMapParams(struct MemoryExport *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MemoryExport_RmResource.offset), pParams); } // memoryexportCheckMemInterUnmap: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_memoryexportCheckMemInterUnmap(struct MemoryExport *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_memoryexportCheckMemInterUnmap(struct MemoryExport *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MemoryExport_RmResource.offset), bSubdeviceHandleProvided); } // memoryexportGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_memoryexportGetMemoryMappingDescriptor(struct MemoryExport *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_memoryexportGetMemoryMappingDescriptor(struct MemoryExport *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MemoryExport_RmResource.offset), ppMemDesc); } // memoryexportControlSerialization_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_memoryexportControlSerialization_Prologue(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_memoryexportControlSerialization_Prologue(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RmResource.offset), pCallContext, pParams); } // memoryexportControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_memoryexportControlSerialization_Epilogue(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_memoryexportControlSerialization_Epilogue(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RmResource.offset), pCallContext, pParams); } // memoryexportControl_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_memoryexportControl_Prologue(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_memoryexportControl_Prologue(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RmResource.offset), pCallContext, pParams); } // memoryexportControl_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_memoryexportControl_Epilogue(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_memoryexportControl_Epilogue(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RmResource.offset), pCallContext, pParams); } // memoryexportIsDuplicate: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_memoryexportIsDuplicate(struct MemoryExport *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_memoryexportIsDuplicate(struct MemoryExport *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RsResource.offset), hMemory, pDuplicate); } // memoryexportPreDestruct: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_memoryexportPreDestruct(struct MemoryExport *pResource) { +void __nvoc_up_thunk_RsResource_memoryexportPreDestruct(struct MemoryExport *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RsResource.offset)); } // memoryexportControlFilter: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_memoryexportControlFilter(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memoryexportControlFilter(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RsResource.offset), pCallContext, pParams); } // memoryexportMap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_memoryexportMap(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_memoryexportMap(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RsResource.offset), pCallContext, pParams, pCpuMapping); } // memoryexportUnmap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_memoryexportUnmap(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_memoryexportUnmap(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RsResource.offset), pCallContext, pCpuMapping); } // memoryexportIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body -static NvBool __nvoc_up_thunk_RsResource_memoryexportIsPartialUnmapSupported(struct MemoryExport *pResource) { +NvBool __nvoc_up_thunk_RsResource_memoryexportIsPartialUnmapSupported(struct MemoryExport *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RsResource.offset)); } // memoryexportMapTo: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_memoryexportMapTo(struct MemoryExport *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memoryexportMapTo(struct MemoryExport *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RsResource.offset), pParams); } // memoryexportUnmapFrom: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_memoryexportUnmapFrom(struct MemoryExport *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memoryexportUnmapFrom(struct MemoryExport *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RsResource.offset), pParams); } // memoryexportGetRefCount: virtual inherited (res) base (rmres) -static NvU32 __nvoc_up_thunk_RsResource_memoryexportGetRefCount(struct MemoryExport *pResource) { +NvU32 __nvoc_up_thunk_RsResource_memoryexportGetRefCount(struct MemoryExport *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RsResource.offset)); } // memoryexportAddAdditionalDependants: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_memoryexportAddAdditionalDependants(struct RsClient *pClient, struct MemoryExport *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_memoryexportAddAdditionalDependants(struct RsClient *pClient, struct MemoryExport *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryExport_RsResource.offset), pReference); } @@ -289,14 +332,6 @@ NV_STATUS __nvoc_ctor_MemoryExport(MemoryExport *pThis, struct CALL_CONTEXT * ar static void __nvoc_init_funcTable_MemoryExport_1(MemoryExport *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // memoryexportCanCopy -- virtual override (res) base (rmres) - pThis->__memoryexportCanCopy__ = &memoryexportCanCopy_IMPL; - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_MemoryExport_resCanCopy; - - // memoryexportControl -- virtual override (res) base (rmres) - pThis->__memoryexportControl__ = &memoryexportControl_IMPL; - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ = &__nvoc_down_thunk_MemoryExport_resControl; - // memoryexportCtrlExportMem -- exported (id=0xe00101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__memoryexportCtrlExportMem__ = &memoryexportCtrlExportMem_IMPL; @@ -311,70 +346,88 @@ static void __nvoc_init_funcTable_MemoryExport_1(MemoryExport *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__memoryexportCtrlGetInfo__ = &memoryexportCtrlGetInfo_IMPL; #endif - - // memoryexportAccessCallback -- virtual inherited (rmres) base (rmres) - pThis->__memoryexportAccessCallback__ = &__nvoc_up_thunk_RmResource_memoryexportAccessCallback; - - // memoryexportShareCallback -- virtual inherited (rmres) base (rmres) - pThis->__memoryexportShareCallback__ = &__nvoc_up_thunk_RmResource_memoryexportShareCallback; - - // memoryexportGetMemInterMapParams -- virtual inherited (rmres) base (rmres) - pThis->__memoryexportGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_memoryexportGetMemInterMapParams; - - // memoryexportCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) - pThis->__memoryexportCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_memoryexportCheckMemInterUnmap; - - // memoryexportGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) - pThis->__memoryexportGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_memoryexportGetMemoryMappingDescriptor; - - // memoryexportControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__memoryexportControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memoryexportControlSerialization_Prologue; - - // memoryexportControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__memoryexportControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryexportControlSerialization_Epilogue; - - // memoryexportControl_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__memoryexportControl_Prologue__ = &__nvoc_up_thunk_RmResource_memoryexportControl_Prologue; - - // memoryexportControl_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__memoryexportControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryexportControl_Epilogue; - - // memoryexportIsDuplicate -- virtual inherited (res) base (rmres) - pThis->__memoryexportIsDuplicate__ = &__nvoc_up_thunk_RsResource_memoryexportIsDuplicate; - - // memoryexportPreDestruct -- virtual inherited (res) base (rmres) - pThis->__memoryexportPreDestruct__ = &__nvoc_up_thunk_RsResource_memoryexportPreDestruct; - - // memoryexportControlFilter -- virtual inherited (res) base (rmres) - pThis->__memoryexportControlFilter__ = &__nvoc_up_thunk_RsResource_memoryexportControlFilter; - - // memoryexportMap -- virtual inherited (res) base (rmres) - pThis->__memoryexportMap__ = &__nvoc_up_thunk_RsResource_memoryexportMap; - - // memoryexportUnmap -- virtual inherited (res) base (rmres) - pThis->__memoryexportUnmap__ = &__nvoc_up_thunk_RsResource_memoryexportUnmap; - - // memoryexportIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body - pThis->__memoryexportIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memoryexportIsPartialUnmapSupported; - - // memoryexportMapTo -- virtual inherited (res) base (rmres) - pThis->__memoryexportMapTo__ = &__nvoc_up_thunk_RsResource_memoryexportMapTo; - - // memoryexportUnmapFrom -- virtual inherited (res) base (rmres) - pThis->__memoryexportUnmapFrom__ = &__nvoc_up_thunk_RsResource_memoryexportUnmapFrom; - - // memoryexportGetRefCount -- virtual inherited (res) base (rmres) - pThis->__memoryexportGetRefCount__ = &__nvoc_up_thunk_RsResource_memoryexportGetRefCount; - - // memoryexportAddAdditionalDependants -- virtual inherited (res) base (rmres) - pThis->__memoryexportAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memoryexportAddAdditionalDependants; -} // End __nvoc_init_funcTable_MemoryExport_1 with approximately 26 basic block(s). +} // End __nvoc_init_funcTable_MemoryExport_1 with approximately 3 basic block(s). // Initialize vtable(s) for 24 virtual method(s). void __nvoc_init_funcTable_MemoryExport(MemoryExport *pThis) { - // Initialize vtable(s) with 24 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__MemoryExport vtable = { + .__memoryexportCanCopy__ = &memoryexportCanCopy_IMPL, // virtual override (res) base (rmres) + .RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_MemoryExport_resCanCopy, // virtual + .__memoryexportControl__ = &memoryexportControl_IMPL, // virtual override (res) base (rmres) + .RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_MemoryExport_resControl, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) +#endif + .__memoryexportAccessCallback__ = &__nvoc_up_thunk_RmResource_memoryexportAccessCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__memoryexportShareCallback__ = &__nvoc_up_thunk_RmResource_memoryexportShareCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__memoryexportGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_memoryexportGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__memoryexportCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_memoryexportCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__memoryexportGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_memoryexportGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__memoryexportControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memoryexportControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__memoryexportControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryexportControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__memoryexportControl_Prologue__ = &__nvoc_up_thunk_RmResource_memoryexportControl_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__memoryexportControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryexportControl_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__memoryexportIsDuplicate__ = &__nvoc_up_thunk_RsResource_memoryexportIsDuplicate, // virtual inherited (res) base (rmres) + .RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__memoryexportPreDestruct__ = &__nvoc_up_thunk_RsResource_memoryexportPreDestruct, // virtual inherited (res) base (rmres) + .RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__memoryexportControlFilter__ = &__nvoc_up_thunk_RsResource_memoryexportControlFilter, // virtual inherited (res) base (rmres) + .RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__memoryexportMap__ = &__nvoc_up_thunk_RsResource_memoryexportMap, // virtual inherited (res) base (rmres) + .RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMap__ = &resMap_IMPL, // virtual + .__memoryexportUnmap__ = &__nvoc_up_thunk_RsResource_memoryexportUnmap, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__memoryexportIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memoryexportIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__memoryexportMapTo__ = &__nvoc_up_thunk_RsResource_memoryexportMapTo, // virtual inherited (res) base (rmres) + .RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__memoryexportUnmapFrom__ = &__nvoc_up_thunk_RsResource_memoryexportUnmapFrom, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__memoryexportGetRefCount__ = &__nvoc_up_thunk_RsResource_memoryexportGetRefCount, // virtual inherited (res) base (rmres) + .RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__memoryexportAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memoryexportAddAdditionalDependants, // virtual inherited (res) base (rmres) + .RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.RmResource.RsResource; // (res) super^2 + pThis->__nvoc_base_RmResource.__nvoc_vtable = &vtable.RmResource; // (rmres) super + pThis->__nvoc_vtable = &vtable; // (memoryexport) this + + // Initialize vtable(s) with 3 per-object function pointer(s). __nvoc_init_funcTable_MemoryExport_1(pThis); } diff --git a/src/nvidia/generated/g_mem_export_nvoc.h b/src/nvidia/generated/g_mem_export_nvoc.h index 4dc2df2466..c43d65ec40 100644 --- a/src/nvidia/generated/g_mem_export_nvoc.h +++ b/src/nvidia/generated/g_mem_export_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -72,10 +72,15 @@ typedef struct mem_export_info MEM_EXPORT_INFO; #endif +// Metadata including vtable +struct NVOC_VTABLE__MemoryExport; + + struct MemoryExport { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__MemoryExport *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; @@ -87,12 +92,22 @@ struct MemoryExport { struct RmResource *__nvoc_pbase_RmResource; // rmres super struct MemoryExport *__nvoc_pbase_MemoryExport; // memoryexport - // Vtable with 24 per-object function pointers - NvBool (*__memoryexportCanCopy__)(struct MemoryExport * /*this*/); // virtual override (res) base (rmres) - NV_STATUS (*__memoryexportControl__)(struct MemoryExport * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (rmres) + // Vtable with 3 per-object function pointers NV_STATUS (*__memoryexportCtrlExportMem__)(struct MemoryExport * /*this*/, NV00E0_CTRL_EXPORT_MEM_PARAMS *); // exported (id=0xe00101) NV_STATUS (*__memoryexportCtrlImportMem__)(struct MemoryExport * /*this*/, NV00E0_CTRL_IMPORT_MEM_PARAMS *); // exported (id=0xe00102) NV_STATUS (*__memoryexportCtrlGetInfo__)(struct MemoryExport * /*this*/, NV00E0_CTRL_GET_INFO_PARAMS *); // exported (id=0xe00103) + + // Data members + MEM_EXPORT_INFO *PRIVATE_FIELD(pExportInfo); +}; + + +// Metadata including vtable with 21 function pointers plus superclass metadata +struct NVOC_VTABLE__MemoryExport { + const struct NVOC_VTABLE__RmResource RmResource; // (rmres) 21 function pointers + + NvBool (*__memoryexportCanCopy__)(struct MemoryExport * /*this*/); // virtual override (res) base (rmres) + NV_STATUS (*__memoryexportControl__)(struct MemoryExport * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (rmres) NvBool (*__memoryexportAccessCallback__)(struct MemoryExport * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) NvBool (*__memoryexportShareCallback__)(struct MemoryExport * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) NV_STATUS (*__memoryexportGetMemInterMapParams__)(struct MemoryExport * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) @@ -112,9 +127,6 @@ struct MemoryExport { NV_STATUS (*__memoryexportUnmapFrom__)(struct MemoryExport * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) NvU32 (*__memoryexportGetRefCount__)(struct MemoryExport * /*this*/); // virtual inherited (res) base (rmres) void (*__memoryexportAddAdditionalDependants__)(struct RsClient *, struct MemoryExport * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) - - // Data members - MEM_EXPORT_INFO *PRIVATE_FIELD(pExportInfo); }; #ifndef __NVOC_CLASS_MemoryExport_TYPEDEF__ @@ -147,9 +159,9 @@ NV_STATUS __nvoc_objCreate_MemoryExport(MemoryExport**, Dynamic*, NvU32, struct // Wrapper macros -#define memoryexportCanCopy_FNPTR(pMemoryExport) pMemoryExport->__memoryexportCanCopy__ +#define memoryexportCanCopy_FNPTR(pMemoryExport) pMemoryExport->__nvoc_vtable->__memoryexportCanCopy__ #define memoryexportCanCopy(pMemoryExport) memoryexportCanCopy_DISPATCH(pMemoryExport) -#define memoryexportControl_FNPTR(pMemoryExport) pMemoryExport->__memoryexportControl__ +#define memoryexportControl_FNPTR(pMemoryExport) pMemoryExport->__nvoc_vtable->__memoryexportControl__ #define memoryexportControl(pMemoryExport, pCallContext, pParams) memoryexportControl_DISPATCH(pMemoryExport, pCallContext, pParams) #define memoryexportCtrlExportMem_FNPTR(pMemoryExport) pMemoryExport->__memoryexportCtrlExportMem__ #define memoryexportCtrlExportMem(pMemoryExport, pParams) memoryexportCtrlExportMem_DISPATCH(pMemoryExport, pParams) @@ -157,52 +169,52 @@ NV_STATUS __nvoc_objCreate_MemoryExport(MemoryExport**, Dynamic*, NvU32, struct #define memoryexportCtrlImportMem(pMemoryExport, pParams) memoryexportCtrlImportMem_DISPATCH(pMemoryExport, pParams) #define memoryexportCtrlGetInfo_FNPTR(pMemoryExport) pMemoryExport->__memoryexportCtrlGetInfo__ #define memoryexportCtrlGetInfo(pMemoryExport, pParams) memoryexportCtrlGetInfo_DISPATCH(pMemoryExport, pParams) -#define memoryexportAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define memoryexportAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define memoryexportAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) memoryexportAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define memoryexportShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ +#define memoryexportShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define memoryexportShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) memoryexportShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define memoryexportGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define memoryexportGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define memoryexportGetMemInterMapParams(pRmResource, pParams) memoryexportGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define memoryexportCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define memoryexportCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define memoryexportCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) memoryexportCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define memoryexportGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define memoryexportGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define memoryexportGetMemoryMappingDescriptor(pRmResource, ppMemDesc) memoryexportGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define memoryexportControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define memoryexportControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define memoryexportControlSerialization_Prologue(pResource, pCallContext, pParams) memoryexportControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define memoryexportControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define memoryexportControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define memoryexportControlSerialization_Epilogue(pResource, pCallContext, pParams) memoryexportControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memoryexportControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ +#define memoryexportControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define memoryexportControl_Prologue(pResource, pCallContext, pParams) memoryexportControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define memoryexportControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define memoryexportControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define memoryexportControl_Epilogue(pResource, pCallContext, pParams) memoryexportControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memoryexportIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define memoryexportIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define memoryexportIsDuplicate(pResource, hMemory, pDuplicate) memoryexportIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define memoryexportPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define memoryexportPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define memoryexportPreDestruct(pResource) memoryexportPreDestruct_DISPATCH(pResource) -#define memoryexportControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define memoryexportControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define memoryexportControlFilter(pResource, pCallContext, pParams) memoryexportControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define memoryexportMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define memoryexportMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define memoryexportMap(pResource, pCallContext, pParams, pCpuMapping) memoryexportMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define memoryexportUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define memoryexportUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define memoryexportUnmap(pResource, pCallContext, pCpuMapping) memoryexportUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define memoryexportIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define memoryexportIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define memoryexportIsPartialUnmapSupported(pResource) memoryexportIsPartialUnmapSupported_DISPATCH(pResource) -#define memoryexportMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define memoryexportMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define memoryexportMapTo(pResource, pParams) memoryexportMapTo_DISPATCH(pResource, pParams) -#define memoryexportUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define memoryexportUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define memoryexportUnmapFrom(pResource, pParams) memoryexportUnmapFrom_DISPATCH(pResource, pParams) -#define memoryexportGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define memoryexportGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define memoryexportGetRefCount(pResource) memoryexportGetRefCount_DISPATCH(pResource) -#define memoryexportAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define memoryexportAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define memoryexportAddAdditionalDependants(pClient, pResource, pReference) memoryexportAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool memoryexportCanCopy_DISPATCH(struct MemoryExport *pMemoryExport) { - return pMemoryExport->__memoryexportCanCopy__(pMemoryExport); + return pMemoryExport->__nvoc_vtable->__memoryexportCanCopy__(pMemoryExport); } static inline NV_STATUS memoryexportControl_DISPATCH(struct MemoryExport *pMemoryExport, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemoryExport->__memoryexportControl__(pMemoryExport, pCallContext, pParams); + return pMemoryExport->__nvoc_vtable->__memoryexportControl__(pMemoryExport, pCallContext, pParams); } static inline NV_STATUS memoryexportCtrlExportMem_DISPATCH(struct MemoryExport *pMemoryExport, NV00E0_CTRL_EXPORT_MEM_PARAMS *pParams) { @@ -218,79 +230,79 @@ static inline NV_STATUS memoryexportCtrlGetInfo_DISPATCH(struct MemoryExport *pM } static inline NvBool memoryexportAccessCallback_DISPATCH(struct MemoryExport *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__memoryexportAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__memoryexportAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool memoryexportShareCallback_DISPATCH(struct MemoryExport *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__memoryexportShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__memoryexportShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS memoryexportGetMemInterMapParams_DISPATCH(struct MemoryExport *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__memoryexportGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__memoryexportGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS memoryexportCheckMemInterUnmap_DISPATCH(struct MemoryExport *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__memoryexportCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__memoryexportCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS memoryexportGetMemoryMappingDescriptor_DISPATCH(struct MemoryExport *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__memoryexportGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__memoryexportGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS memoryexportControlSerialization_Prologue_DISPATCH(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memoryexportControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memoryexportControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void memoryexportControlSerialization_Epilogue_DISPATCH(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memoryexportControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__memoryexportControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS memoryexportControl_Prologue_DISPATCH(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memoryexportControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memoryexportControl_Prologue__(pResource, pCallContext, pParams); } static inline void memoryexportControl_Epilogue_DISPATCH(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memoryexportControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__memoryexportControl_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS memoryexportIsDuplicate_DISPATCH(struct MemoryExport *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__memoryexportIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__memoryexportIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void memoryexportPreDestruct_DISPATCH(struct MemoryExport *pResource) { - pResource->__memoryexportPreDestruct__(pResource); + pResource->__nvoc_vtable->__memoryexportPreDestruct__(pResource); } static inline NV_STATUS memoryexportControlFilter_DISPATCH(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memoryexportControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memoryexportControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS memoryexportMap_DISPATCH(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__memoryexportMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__memoryexportMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS memoryexportUnmap_DISPATCH(struct MemoryExport *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__memoryexportUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__memoryexportUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool memoryexportIsPartialUnmapSupported_DISPATCH(struct MemoryExport *pResource) { - return pResource->__memoryexportIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__memoryexportIsPartialUnmapSupported__(pResource); } static inline NV_STATUS memoryexportMapTo_DISPATCH(struct MemoryExport *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__memoryexportMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__memoryexportMapTo__(pResource, pParams); } static inline NV_STATUS memoryexportUnmapFrom_DISPATCH(struct MemoryExport *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__memoryexportUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__memoryexportUnmapFrom__(pResource, pParams); } static inline NvU32 memoryexportGetRefCount_DISPATCH(struct MemoryExport *pResource) { - return pResource->__memoryexportGetRefCount__(pResource); + return pResource->__nvoc_vtable->__memoryexportGetRefCount__(pResource); } static inline void memoryexportAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryExport *pResource, RsResourceRef *pReference) { - pResource->__memoryexportAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__memoryexportAddAdditionalDependants__(pClient, pResource, pReference); } NvBool memoryexportCanCopy_IMPL(struct MemoryExport *pMemoryExport); diff --git a/src/nvidia/generated/g_mem_fabric_import_ref_nvoc.c b/src/nvidia/generated/g_mem_fabric_import_ref_nvoc.c index 5e0ba7ef02..76bcb66dab 100644 --- a/src/nvidia/generated/g_mem_fabric_import_ref_nvoc.c +++ b/src/nvidia/generated/g_mem_fabric_import_ref_nvoc.c @@ -108,113 +108,156 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryFa }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_down_thunk_MemoryFabricImportedRef_resCanCopy(struct RsResource *pMemoryFabricImportedRef); // this + // 1 down-thunk(s) defined to bridge methods in MemoryFabricImportedRef from superclasses // memoryfabricimportedrefCanCopy: virtual override (res) base (rmres) -static NvBool __nvoc_down_thunk_MemoryFabricImportedRef_resCanCopy(struct RsResource *pMemoryFabricImportedRef) { +NvBool __nvoc_down_thunk_MemoryFabricImportedRef_resCanCopy(struct RsResource *pMemoryFabricImportedRef) { return memoryfabricimportedrefCanCopy((struct MemoryFabricImportedRef *)(((unsigned char *) pMemoryFabricImportedRef) - __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_RmResource_memoryfabricimportedrefAccessCallback(struct MemoryFabricImportedRef *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_memoryfabricimportedrefShareCallback(struct MemoryFabricImportedRef *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportedrefGetMemInterMapParams(struct MemoryFabricImportedRef *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportedrefCheckMemInterUnmap(struct MemoryFabricImportedRef *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportedrefGetMemoryMappingDescriptor(struct MemoryFabricImportedRef *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportedrefControlSerialization_Prologue(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_memoryfabricimportedrefControlSerialization_Epilogue(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportedrefControl_Prologue(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_memoryfabricimportedrefControl_Epilogue(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefIsDuplicate(struct MemoryFabricImportedRef *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_memoryfabricimportedrefPreDestruct(struct MemoryFabricImportedRef *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefControl(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefControlFilter(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefMap(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefUnmap(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_memoryfabricimportedrefIsPartialUnmapSupported(struct MemoryFabricImportedRef *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefMapTo(struct MemoryFabricImportedRef *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefUnmapFrom(struct MemoryFabricImportedRef *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_memoryfabricimportedrefGetRefCount(struct MemoryFabricImportedRef *pResource); // this +void __nvoc_up_thunk_RsResource_memoryfabricimportedrefAddAdditionalDependants(struct RsClient *pClient, struct MemoryFabricImportedRef *pResource, RsResourceRef *pReference); // this + // 20 up-thunk(s) defined to bridge methods in MemoryFabricImportedRef to superclasses // memoryfabricimportedrefAccessCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_memoryfabricimportedrefAccessCallback(struct MemoryFabricImportedRef *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_memoryfabricimportedrefAccessCallback(struct MemoryFabricImportedRef *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // memoryfabricimportedrefShareCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_memoryfabricimportedrefShareCallback(struct MemoryFabricImportedRef *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_memoryfabricimportedrefShareCallback(struct MemoryFabricImportedRef *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // memoryfabricimportedrefGetMemInterMapParams: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportedrefGetMemInterMapParams(struct MemoryFabricImportedRef *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportedrefGetMemInterMapParams(struct MemoryFabricImportedRef *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), pParams); } // memoryfabricimportedrefCheckMemInterUnmap: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportedrefCheckMemInterUnmap(struct MemoryFabricImportedRef *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportedrefCheckMemInterUnmap(struct MemoryFabricImportedRef *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), bSubdeviceHandleProvided); } // memoryfabricimportedrefGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportedrefGetMemoryMappingDescriptor(struct MemoryFabricImportedRef *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportedrefGetMemoryMappingDescriptor(struct MemoryFabricImportedRef *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), ppMemDesc); } // memoryfabricimportedrefControlSerialization_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportedrefControlSerialization_Prologue(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportedrefControlSerialization_Prologue(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), pCallContext, pParams); } // memoryfabricimportedrefControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_memoryfabricimportedrefControlSerialization_Epilogue(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_memoryfabricimportedrefControlSerialization_Epilogue(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), pCallContext, pParams); } // memoryfabricimportedrefControl_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportedrefControl_Prologue(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportedrefControl_Prologue(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), pCallContext, pParams); } // memoryfabricimportedrefControl_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_memoryfabricimportedrefControl_Epilogue(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_memoryfabricimportedrefControl_Epilogue(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RmResource.offset), pCallContext, pParams); } // memoryfabricimportedrefIsDuplicate: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefIsDuplicate(struct MemoryFabricImportedRef *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefIsDuplicate(struct MemoryFabricImportedRef *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), hMemory, pDuplicate); } // memoryfabricimportedrefPreDestruct: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_memoryfabricimportedrefPreDestruct(struct MemoryFabricImportedRef *pResource) { +void __nvoc_up_thunk_RsResource_memoryfabricimportedrefPreDestruct(struct MemoryFabricImportedRef *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset)); } // memoryfabricimportedrefControl: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefControl(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefControl(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), pCallContext, pParams); } // memoryfabricimportedrefControlFilter: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefControlFilter(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefControlFilter(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), pCallContext, pParams); } // memoryfabricimportedrefMap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefMap(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefMap(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), pCallContext, pParams, pCpuMapping); } // memoryfabricimportedrefUnmap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefUnmap(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefUnmap(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), pCallContext, pCpuMapping); } // memoryfabricimportedrefIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body -static NvBool __nvoc_up_thunk_RsResource_memoryfabricimportedrefIsPartialUnmapSupported(struct MemoryFabricImportedRef *pResource) { +NvBool __nvoc_up_thunk_RsResource_memoryfabricimportedrefIsPartialUnmapSupported(struct MemoryFabricImportedRef *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset)); } // memoryfabricimportedrefMapTo: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefMapTo(struct MemoryFabricImportedRef *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefMapTo(struct MemoryFabricImportedRef *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), pParams); } // memoryfabricimportedrefUnmapFrom: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefUnmapFrom(struct MemoryFabricImportedRef *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportedrefUnmapFrom(struct MemoryFabricImportedRef *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), pParams); } // memoryfabricimportedrefGetRefCount: virtual inherited (res) base (rmres) -static NvU32 __nvoc_up_thunk_RsResource_memoryfabricimportedrefGetRefCount(struct MemoryFabricImportedRef *pResource) { +NvU32 __nvoc_up_thunk_RsResource_memoryfabricimportedrefGetRefCount(struct MemoryFabricImportedRef *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset)); } // memoryfabricimportedrefAddAdditionalDependants: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_memoryfabricimportedrefAddAdditionalDependants(struct RsClient *pClient, struct MemoryFabricImportedRef *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_memoryfabricimportedrefAddAdditionalDependants(struct RsClient *pClient, struct MemoryFabricImportedRef *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportedRef_RsResource.offset), pReference); } @@ -259,81 +302,88 @@ NV_STATUS __nvoc_ctor_MemoryFabricImportedRef(MemoryFabricImportedRef *pThis, CA static void __nvoc_init_funcTable_MemoryFabricImportedRef_1(MemoryFabricImportedRef *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // memoryfabricimportedrefCanCopy -- virtual override (res) base (rmres) - pThis->__memoryfabricimportedrefCanCopy__ = &memoryfabricimportedrefCanCopy_IMPL; - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_MemoryFabricImportedRef_resCanCopy; - // memoryfabricimportedrefCtrlValidate -- exported (id=0xfb0101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__memoryfabricimportedrefCtrlValidate__ = &memoryfabricimportedrefCtrlValidate_IMPL; #endif - - // memoryfabricimportedrefAccessCallback -- virtual inherited (rmres) base (rmres) - pThis->__memoryfabricimportedrefAccessCallback__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefAccessCallback; - - // memoryfabricimportedrefShareCallback -- virtual inherited (rmres) base (rmres) - pThis->__memoryfabricimportedrefShareCallback__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefShareCallback; - - // memoryfabricimportedrefGetMemInterMapParams -- virtual inherited (rmres) base (rmres) - pThis->__memoryfabricimportedrefGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefGetMemInterMapParams; - - // memoryfabricimportedrefCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) - pThis->__memoryfabricimportedrefCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefCheckMemInterUnmap; - - // memoryfabricimportedrefGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) - pThis->__memoryfabricimportedrefGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefGetMemoryMappingDescriptor; - - // memoryfabricimportedrefControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__memoryfabricimportedrefControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefControlSerialization_Prologue; - - // memoryfabricimportedrefControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__memoryfabricimportedrefControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefControlSerialization_Epilogue; - - // memoryfabricimportedrefControl_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__memoryfabricimportedrefControl_Prologue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefControl_Prologue; - - // memoryfabricimportedrefControl_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__memoryfabricimportedrefControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefControl_Epilogue; - - // memoryfabricimportedrefIsDuplicate -- virtual inherited (res) base (rmres) - pThis->__memoryfabricimportedrefIsDuplicate__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefIsDuplicate; - - // memoryfabricimportedrefPreDestruct -- virtual inherited (res) base (rmres) - pThis->__memoryfabricimportedrefPreDestruct__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefPreDestruct; - - // memoryfabricimportedrefControl -- virtual inherited (res) base (rmres) - pThis->__memoryfabricimportedrefControl__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefControl; - - // memoryfabricimportedrefControlFilter -- virtual inherited (res) base (rmres) - pThis->__memoryfabricimportedrefControlFilter__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefControlFilter; - - // memoryfabricimportedrefMap -- virtual inherited (res) base (rmres) - pThis->__memoryfabricimportedrefMap__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefMap; - - // memoryfabricimportedrefUnmap -- virtual inherited (res) base (rmres) - pThis->__memoryfabricimportedrefUnmap__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefUnmap; - - // memoryfabricimportedrefIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body - pThis->__memoryfabricimportedrefIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefIsPartialUnmapSupported; - - // memoryfabricimportedrefMapTo -- virtual inherited (res) base (rmres) - pThis->__memoryfabricimportedrefMapTo__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefMapTo; - - // memoryfabricimportedrefUnmapFrom -- virtual inherited (res) base (rmres) - pThis->__memoryfabricimportedrefUnmapFrom__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefUnmapFrom; - - // memoryfabricimportedrefGetRefCount -- virtual inherited (res) base (rmres) - pThis->__memoryfabricimportedrefGetRefCount__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefGetRefCount; - - // memoryfabricimportedrefAddAdditionalDependants -- virtual inherited (res) base (rmres) - pThis->__memoryfabricimportedrefAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefAddAdditionalDependants; -} // End __nvoc_init_funcTable_MemoryFabricImportedRef_1 with approximately 23 basic block(s). +} // End __nvoc_init_funcTable_MemoryFabricImportedRef_1 with approximately 1 basic block(s). // Initialize vtable(s) for 22 virtual method(s). void __nvoc_init_funcTable_MemoryFabricImportedRef(MemoryFabricImportedRef *pThis) { - // Initialize vtable(s) with 22 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__MemoryFabricImportedRef vtable = { + .__memoryfabricimportedrefCanCopy__ = &memoryfabricimportedrefCanCopy_IMPL, // virtual override (res) base (rmres) + .RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_MemoryFabricImportedRef_resCanCopy, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) +#endif + .__memoryfabricimportedrefAccessCallback__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefAccessCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__memoryfabricimportedrefShareCallback__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefShareCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__memoryfabricimportedrefGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__memoryfabricimportedrefCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__memoryfabricimportedrefGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__memoryfabricimportedrefControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__memoryfabricimportedrefControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__memoryfabricimportedrefControl_Prologue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefControl_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__memoryfabricimportedrefControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportedrefControl_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__memoryfabricimportedrefIsDuplicate__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefIsDuplicate, // virtual inherited (res) base (rmres) + .RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__memoryfabricimportedrefPreDestruct__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefPreDestruct, // virtual inherited (res) base (rmres) + .RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__memoryfabricimportedrefControl__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefControl, // virtual inherited (res) base (rmres) + .RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControl__ = &resControl_IMPL, // virtual + .__memoryfabricimportedrefControlFilter__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefControlFilter, // virtual inherited (res) base (rmres) + .RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__memoryfabricimportedrefMap__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefMap, // virtual inherited (res) base (rmres) + .RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMap__ = &resMap_IMPL, // virtual + .__memoryfabricimportedrefUnmap__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefUnmap, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__memoryfabricimportedrefIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__memoryfabricimportedrefMapTo__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefMapTo, // virtual inherited (res) base (rmres) + .RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__memoryfabricimportedrefUnmapFrom__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefUnmapFrom, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__memoryfabricimportedrefGetRefCount__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefGetRefCount, // virtual inherited (res) base (rmres) + .RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__memoryfabricimportedrefAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memoryfabricimportedrefAddAdditionalDependants, // virtual inherited (res) base (rmres) + .RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.RmResource.RsResource; // (res) super^2 + pThis->__nvoc_base_RmResource.__nvoc_vtable = &vtable.RmResource; // (rmres) super + pThis->__nvoc_vtable = &vtable; // (memoryfabricimportedref) this + + // Initialize vtable(s) with 1 per-object function pointer(s). __nvoc_init_funcTable_MemoryFabricImportedRef_1(pThis); } diff --git a/src/nvidia/generated/g_mem_fabric_import_ref_nvoc.h b/src/nvidia/generated/g_mem_fabric_import_ref_nvoc.h index f98891980f..003732d236 100644 --- a/src/nvidia/generated/g_mem_fabric_import_ref_nvoc.h +++ b/src/nvidia/generated/g_mem_fabric_import_ref_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -71,10 +71,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__MemoryFabricImportedRef; + + struct MemoryFabricImportedRef { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__MemoryFabricImportedRef *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; @@ -86,9 +91,21 @@ struct MemoryFabricImportedRef { struct RmResource *__nvoc_pbase_RmResource; // rmres super struct MemoryFabricImportedRef *__nvoc_pbase_MemoryFabricImportedRef; // memoryfabricimportedref - // Vtable with 22 per-object function pointers - NvBool (*__memoryfabricimportedrefCanCopy__)(struct MemoryFabricImportedRef * /*this*/); // virtual override (res) base (rmres) + // Vtable with 1 per-object function pointer NV_STATUS (*__memoryfabricimportedrefCtrlValidate__)(struct MemoryFabricImportedRef * /*this*/, NV00FB_CTRL_VALIDATE_PARAMS *); // exported (id=0xfb0101) + + // Data members + NvU64 PRIVATE_FIELD(numUpdatedPfns); + MEMORY_DESCRIPTOR *PRIVATE_FIELD(pTempMemDesc); + MEM_FABRIC_IMPORT_DESCRIPTOR *PRIVATE_FIELD(pFabricImportDesc); +}; + + +// Metadata including vtable with 21 function pointers plus superclass metadata +struct NVOC_VTABLE__MemoryFabricImportedRef { + const struct NVOC_VTABLE__RmResource RmResource; // (rmres) 21 function pointers + + NvBool (*__memoryfabricimportedrefCanCopy__)(struct MemoryFabricImportedRef * /*this*/); // virtual override (res) base (rmres) NvBool (*__memoryfabricimportedrefAccessCallback__)(struct MemoryFabricImportedRef * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) NvBool (*__memoryfabricimportedrefShareCallback__)(struct MemoryFabricImportedRef * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) NV_STATUS (*__memoryfabricimportedrefGetMemInterMapParams__)(struct MemoryFabricImportedRef * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) @@ -109,11 +126,6 @@ struct MemoryFabricImportedRef { NV_STATUS (*__memoryfabricimportedrefUnmapFrom__)(struct MemoryFabricImportedRef * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) NvU32 (*__memoryfabricimportedrefGetRefCount__)(struct MemoryFabricImportedRef * /*this*/); // virtual inherited (res) base (rmres) void (*__memoryfabricimportedrefAddAdditionalDependants__)(struct RsClient *, struct MemoryFabricImportedRef * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) - - // Data members - NvU64 PRIVATE_FIELD(numUpdatedPfns); - MEMORY_DESCRIPTOR *PRIVATE_FIELD(pTempMemDesc); - MEM_FABRIC_IMPORT_DESCRIPTOR *PRIVATE_FIELD(pFabricImportDesc); }; #ifndef __NVOC_CLASS_MemoryFabricImportedRef_TYPEDEF__ @@ -146,54 +158,54 @@ NV_STATUS __nvoc_objCreate_MemoryFabricImportedRef(MemoryFabricImportedRef**, Dy // Wrapper macros -#define memoryfabricimportedrefCanCopy_FNPTR(pMemoryFabricImportedRef) pMemoryFabricImportedRef->__memoryfabricimportedrefCanCopy__ +#define memoryfabricimportedrefCanCopy_FNPTR(pMemoryFabricImportedRef) pMemoryFabricImportedRef->__nvoc_vtable->__memoryfabricimportedrefCanCopy__ #define memoryfabricimportedrefCanCopy(pMemoryFabricImportedRef) memoryfabricimportedrefCanCopy_DISPATCH(pMemoryFabricImportedRef) #define memoryfabricimportedrefCtrlValidate_FNPTR(pMemoryFabricImportedRef) pMemoryFabricImportedRef->__memoryfabricimportedrefCtrlValidate__ #define memoryfabricimportedrefCtrlValidate(pMemoryFabricImportedRef, pParams) memoryfabricimportedrefCtrlValidate_DISPATCH(pMemoryFabricImportedRef, pParams) -#define memoryfabricimportedrefAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define memoryfabricimportedrefAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define memoryfabricimportedrefAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) memoryfabricimportedrefAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define memoryfabricimportedrefShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ +#define memoryfabricimportedrefShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define memoryfabricimportedrefShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) memoryfabricimportedrefShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define memoryfabricimportedrefGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define memoryfabricimportedrefGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define memoryfabricimportedrefGetMemInterMapParams(pRmResource, pParams) memoryfabricimportedrefGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define memoryfabricimportedrefCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define memoryfabricimportedrefCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define memoryfabricimportedrefCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) memoryfabricimportedrefCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define memoryfabricimportedrefGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define memoryfabricimportedrefGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define memoryfabricimportedrefGetMemoryMappingDescriptor(pRmResource, ppMemDesc) memoryfabricimportedrefGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define memoryfabricimportedrefControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define memoryfabricimportedrefControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define memoryfabricimportedrefControlSerialization_Prologue(pResource, pCallContext, pParams) memoryfabricimportedrefControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricimportedrefControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define memoryfabricimportedrefControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define memoryfabricimportedrefControlSerialization_Epilogue(pResource, pCallContext, pParams) memoryfabricimportedrefControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricimportedrefControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ +#define memoryfabricimportedrefControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define memoryfabricimportedrefControl_Prologue(pResource, pCallContext, pParams) memoryfabricimportedrefControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricimportedrefControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define memoryfabricimportedrefControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define memoryfabricimportedrefControl_Epilogue(pResource, pCallContext, pParams) memoryfabricimportedrefControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricimportedrefIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define memoryfabricimportedrefIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define memoryfabricimportedrefIsDuplicate(pResource, hMemory, pDuplicate) memoryfabricimportedrefIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define memoryfabricimportedrefPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define memoryfabricimportedrefPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define memoryfabricimportedrefPreDestruct(pResource) memoryfabricimportedrefPreDestruct_DISPATCH(pResource) -#define memoryfabricimportedrefControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define memoryfabricimportedrefControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControl__ #define memoryfabricimportedrefControl(pResource, pCallContext, pParams) memoryfabricimportedrefControl_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricimportedrefControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define memoryfabricimportedrefControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define memoryfabricimportedrefControlFilter(pResource, pCallContext, pParams) memoryfabricimportedrefControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricimportedrefMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define memoryfabricimportedrefMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define memoryfabricimportedrefMap(pResource, pCallContext, pParams, pCpuMapping) memoryfabricimportedrefMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define memoryfabricimportedrefUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define memoryfabricimportedrefUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define memoryfabricimportedrefUnmap(pResource, pCallContext, pCpuMapping) memoryfabricimportedrefUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define memoryfabricimportedrefIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define memoryfabricimportedrefIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define memoryfabricimportedrefIsPartialUnmapSupported(pResource) memoryfabricimportedrefIsPartialUnmapSupported_DISPATCH(pResource) -#define memoryfabricimportedrefMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define memoryfabricimportedrefMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define memoryfabricimportedrefMapTo(pResource, pParams) memoryfabricimportedrefMapTo_DISPATCH(pResource, pParams) -#define memoryfabricimportedrefUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define memoryfabricimportedrefUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define memoryfabricimportedrefUnmapFrom(pResource, pParams) memoryfabricimportedrefUnmapFrom_DISPATCH(pResource, pParams) -#define memoryfabricimportedrefGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define memoryfabricimportedrefGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define memoryfabricimportedrefGetRefCount(pResource) memoryfabricimportedrefGetRefCount_DISPATCH(pResource) -#define memoryfabricimportedrefAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define memoryfabricimportedrefAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define memoryfabricimportedrefAddAdditionalDependants(pClient, pResource, pReference) memoryfabricimportedrefAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool memoryfabricimportedrefCanCopy_DISPATCH(struct MemoryFabricImportedRef *pMemoryFabricImportedRef) { - return pMemoryFabricImportedRef->__memoryfabricimportedrefCanCopy__(pMemoryFabricImportedRef); + return pMemoryFabricImportedRef->__nvoc_vtable->__memoryfabricimportedrefCanCopy__(pMemoryFabricImportedRef); } static inline NV_STATUS memoryfabricimportedrefCtrlValidate_DISPATCH(struct MemoryFabricImportedRef *pMemoryFabricImportedRef, NV00FB_CTRL_VALIDATE_PARAMS *pParams) { @@ -201,83 +213,83 @@ static inline NV_STATUS memoryfabricimportedrefCtrlValidate_DISPATCH(struct Memo } static inline NvBool memoryfabricimportedrefAccessCallback_DISPATCH(struct MemoryFabricImportedRef *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__memoryfabricimportedrefAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__memoryfabricimportedrefAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool memoryfabricimportedrefShareCallback_DISPATCH(struct MemoryFabricImportedRef *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__memoryfabricimportedrefShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__memoryfabricimportedrefShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS memoryfabricimportedrefGetMemInterMapParams_DISPATCH(struct MemoryFabricImportedRef *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__memoryfabricimportedrefGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__memoryfabricimportedrefGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS memoryfabricimportedrefCheckMemInterUnmap_DISPATCH(struct MemoryFabricImportedRef *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__memoryfabricimportedrefCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__memoryfabricimportedrefCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS memoryfabricimportedrefGetMemoryMappingDescriptor_DISPATCH(struct MemoryFabricImportedRef *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__memoryfabricimportedrefGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__memoryfabricimportedrefGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS memoryfabricimportedrefControlSerialization_Prologue_DISPATCH(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memoryfabricimportedrefControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memoryfabricimportedrefControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void memoryfabricimportedrefControlSerialization_Epilogue_DISPATCH(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memoryfabricimportedrefControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__memoryfabricimportedrefControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS memoryfabricimportedrefControl_Prologue_DISPATCH(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memoryfabricimportedrefControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memoryfabricimportedrefControl_Prologue__(pResource, pCallContext, pParams); } static inline void memoryfabricimportedrefControl_Epilogue_DISPATCH(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memoryfabricimportedrefControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__memoryfabricimportedrefControl_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS memoryfabricimportedrefIsDuplicate_DISPATCH(struct MemoryFabricImportedRef *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__memoryfabricimportedrefIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__memoryfabricimportedrefIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void memoryfabricimportedrefPreDestruct_DISPATCH(struct MemoryFabricImportedRef *pResource) { - pResource->__memoryfabricimportedrefPreDestruct__(pResource); + pResource->__nvoc_vtable->__memoryfabricimportedrefPreDestruct__(pResource); } static inline NV_STATUS memoryfabricimportedrefControl_DISPATCH(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memoryfabricimportedrefControl__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memoryfabricimportedrefControl__(pResource, pCallContext, pParams); } static inline NV_STATUS memoryfabricimportedrefControlFilter_DISPATCH(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memoryfabricimportedrefControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memoryfabricimportedrefControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS memoryfabricimportedrefMap_DISPATCH(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__memoryfabricimportedrefMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__memoryfabricimportedrefMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS memoryfabricimportedrefUnmap_DISPATCH(struct MemoryFabricImportedRef *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__memoryfabricimportedrefUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__memoryfabricimportedrefUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool memoryfabricimportedrefIsPartialUnmapSupported_DISPATCH(struct MemoryFabricImportedRef *pResource) { - return pResource->__memoryfabricimportedrefIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__memoryfabricimportedrefIsPartialUnmapSupported__(pResource); } static inline NV_STATUS memoryfabricimportedrefMapTo_DISPATCH(struct MemoryFabricImportedRef *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__memoryfabricimportedrefMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__memoryfabricimportedrefMapTo__(pResource, pParams); } static inline NV_STATUS memoryfabricimportedrefUnmapFrom_DISPATCH(struct MemoryFabricImportedRef *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__memoryfabricimportedrefUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__memoryfabricimportedrefUnmapFrom__(pResource, pParams); } static inline NvU32 memoryfabricimportedrefGetRefCount_DISPATCH(struct MemoryFabricImportedRef *pResource) { - return pResource->__memoryfabricimportedrefGetRefCount__(pResource); + return pResource->__nvoc_vtable->__memoryfabricimportedrefGetRefCount__(pResource); } static inline void memoryfabricimportedrefAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryFabricImportedRef *pResource, RsResourceRef *pReference) { - pResource->__memoryfabricimportedrefAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__memoryfabricimportedrefAddAdditionalDependants__(pClient, pResource, pReference); } NvBool memoryfabricimportedrefCanCopy_IMPL(struct MemoryFabricImportedRef *pMemoryFabricImportedRef); diff --git a/src/nvidia/generated/g_mem_fabric_import_v2_nvoc.c b/src/nvidia/generated/g_mem_fabric_import_v2_nvoc.c index 3b118deccb..fa848af69e 100644 --- a/src/nvidia/generated/g_mem_fabric_import_v2_nvoc.c +++ b/src/nvidia/generated/g_mem_fabric_import_v2_nvoc.c @@ -117,138 +117,207 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryFa }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super +NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super +NvBool __nvoc_down_thunk_MemoryFabricImportV2_resCanCopy(struct RsResource *pMemoryFabricImportV2); // this +NV_STATUS __nvoc_down_thunk_MemoryFabricImportV2_memIsReady(struct Memory *pMemoryFabricImportV2, NvBool bCopyConstructorContext); // this +NV_STATUS __nvoc_down_thunk_MemoryFabricImportV2_memControl(struct Memory *pMemoryFabricImportV2, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_down_thunk_MemoryFabricImportV2_memGetMapAddrSpace(struct Memory *pMemoryFabricImportV2, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NvBool __nvoc_down_thunk_MemoryFabricImportV2_memIsGpuMapAllowed(struct Memory *pMemoryFabricImportV2, struct OBJGPU *pGpu); // this +NvBool __nvoc_down_thunk_MemoryFabricImportV2_memIsExportAllowed(struct Memory *pMemoryFabricImportV2); // this + // 6 down-thunk(s) defined to bridge methods in MemoryFabricImportV2 from superclasses // memoryfabricimportv2CanCopy: virtual override (res) base (mem) -static NvBool __nvoc_down_thunk_MemoryFabricImportV2_resCanCopy(struct RsResource *pMemoryFabricImportV2) { +NvBool __nvoc_down_thunk_MemoryFabricImportV2_resCanCopy(struct RsResource *pMemoryFabricImportV2) { return memoryfabricimportv2CanCopy((struct MemoryFabricImportV2 *)(((unsigned char *) pMemoryFabricImportV2) - __nvoc_rtti_MemoryFabricImportV2_RsResource.offset)); } // memoryfabricimportv2IsReady: virtual override (mem) base (mem) -static NV_STATUS __nvoc_down_thunk_MemoryFabricImportV2_memIsReady(struct Memory *pMemoryFabricImportV2, NvBool bCopyConstructorContext) { +NV_STATUS __nvoc_down_thunk_MemoryFabricImportV2_memIsReady(struct Memory *pMemoryFabricImportV2, NvBool bCopyConstructorContext) { return memoryfabricimportv2IsReady((struct MemoryFabricImportV2 *)(((unsigned char *) pMemoryFabricImportV2) - __nvoc_rtti_MemoryFabricImportV2_Memory.offset), bCopyConstructorContext); } // memoryfabricimportv2Control: virtual override (res) base (mem) -static NV_STATUS __nvoc_down_thunk_MemoryFabricImportV2_memControl(struct Memory *pMemoryFabricImportV2, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_down_thunk_MemoryFabricImportV2_memControl(struct Memory *pMemoryFabricImportV2, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return memoryfabricimportv2Control((struct MemoryFabricImportV2 *)(((unsigned char *) pMemoryFabricImportV2) - __nvoc_rtti_MemoryFabricImportV2_Memory.offset), pCallContext, pParams); } // memoryfabricimportv2GetMapAddrSpace: virtual override (mem) base (mem) -static NV_STATUS __nvoc_down_thunk_MemoryFabricImportV2_memGetMapAddrSpace(struct Memory *pMemoryFabricImportV2, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_down_thunk_MemoryFabricImportV2_memGetMapAddrSpace(struct Memory *pMemoryFabricImportV2, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return memoryfabricimportv2GetMapAddrSpace((struct MemoryFabricImportV2 *)(((unsigned char *) pMemoryFabricImportV2) - __nvoc_rtti_MemoryFabricImportV2_Memory.offset), pCallContext, mapFlags, pAddrSpace); } // memoryfabricimportv2IsGpuMapAllowed: virtual override (mem) base (mem) -static NvBool __nvoc_down_thunk_MemoryFabricImportV2_memIsGpuMapAllowed(struct Memory *pMemoryFabricImportV2, struct OBJGPU *pGpu) { +NvBool __nvoc_down_thunk_MemoryFabricImportV2_memIsGpuMapAllowed(struct Memory *pMemoryFabricImportV2, struct OBJGPU *pGpu) { return memoryfabricimportv2IsGpuMapAllowed((struct MemoryFabricImportV2 *)(((unsigned char *) pMemoryFabricImportV2) - __nvoc_rtti_MemoryFabricImportV2_Memory.offset), pGpu); } // memoryfabricimportv2IsExportAllowed: virtual override (mem) base (mem) -static NvBool __nvoc_down_thunk_MemoryFabricImportV2_memIsExportAllowed(struct Memory *pMemoryFabricImportV2) { +NvBool __nvoc_down_thunk_MemoryFabricImportV2_memIsExportAllowed(struct Memory *pMemoryFabricImportV2) { return memoryfabricimportv2IsExportAllowed((struct MemoryFabricImportV2 *)(((unsigned char *) pMemoryFabricImportV2) - __nvoc_rtti_MemoryFabricImportV2_Memory.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2IsDuplicate(struct MemoryFabricImportV2 *pMemory, NvHandle hMemory, NvBool *pDuplicate); // this +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2Map(struct MemoryFabricImportV2 *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2Unmap(struct MemoryFabricImportV2 *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2GetMemInterMapParams(struct MemoryFabricImportV2 *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2CheckMemInterUnmap(struct MemoryFabricImportV2 *pMemory, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2GetMemoryMappingDescriptor(struct MemoryFabricImportV2 *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2CheckCopyPermissions(struct MemoryFabricImportV2 *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // this +NvBool __nvoc_up_thunk_RmResource_memoryfabricimportv2AccessCallback(struct MemoryFabricImportV2 *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_memoryfabricimportv2ShareCallback(struct MemoryFabricImportV2 *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportv2ControlSerialization_Prologue(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_memoryfabricimportv2ControlSerialization_Epilogue(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportv2Control_Prologue(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_memoryfabricimportv2Control_Epilogue(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RsResource_memoryfabricimportv2PreDestruct(struct MemoryFabricImportV2 *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportv2ControlFilter(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_memoryfabricimportv2IsPartialUnmapSupported(struct MemoryFabricImportV2 *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportv2MapTo(struct MemoryFabricImportV2 *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportv2UnmapFrom(struct MemoryFabricImportV2 *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_memoryfabricimportv2GetRefCount(struct MemoryFabricImportV2 *pResource); // this +void __nvoc_up_thunk_RsResource_memoryfabricimportv2AddAdditionalDependants(struct RsClient *pClient, struct MemoryFabricImportV2 *pResource, RsResourceRef *pReference); // this + // 20 up-thunk(s) defined to bridge methods in MemoryFabricImportV2 to superclasses // memoryfabricimportv2IsDuplicate: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2IsDuplicate(struct MemoryFabricImportV2 *pMemory, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2IsDuplicate(struct MemoryFabricImportV2 *pMemory, NvHandle hMemory, NvBool *pDuplicate) { return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabricImportV2_Memory.offset), hMemory, pDuplicate); } // memoryfabricimportv2Map: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2Map(struct MemoryFabricImportV2 *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2Map(struct MemoryFabricImportV2 *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabricImportV2_Memory.offset), pCallContext, pParams, pCpuMapping); } // memoryfabricimportv2Unmap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2Unmap(struct MemoryFabricImportV2 *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2Unmap(struct MemoryFabricImportV2 *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabricImportV2_Memory.offset), pCallContext, pCpuMapping); } // memoryfabricimportv2GetMemInterMapParams: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2GetMemInterMapParams(struct MemoryFabricImportV2 *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2GetMemInterMapParams(struct MemoryFabricImportV2 *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabricImportV2_Memory.offset), pParams); } // memoryfabricimportv2CheckMemInterUnmap: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2CheckMemInterUnmap(struct MemoryFabricImportV2 *pMemory, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2CheckMemInterUnmap(struct MemoryFabricImportV2 *pMemory, NvBool bSubdeviceHandleProvided) { return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabricImportV2_Memory.offset), bSubdeviceHandleProvided); } // memoryfabricimportv2GetMemoryMappingDescriptor: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2GetMemoryMappingDescriptor(struct MemoryFabricImportV2 *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2GetMemoryMappingDescriptor(struct MemoryFabricImportV2 *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabricImportV2_Memory.offset), ppMemDesc); } // memoryfabricimportv2CheckCopyPermissions: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2CheckCopyPermissions(struct MemoryFabricImportV2 *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricimportv2CheckCopyPermissions(struct MemoryFabricImportV2 *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabricImportV2_Memory.offset), pDstGpu, pDstDevice); } // memoryfabricimportv2AccessCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_memoryfabricimportv2AccessCallback(struct MemoryFabricImportV2 *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_memoryfabricimportv2AccessCallback(struct MemoryFabricImportV2 *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // memoryfabricimportv2ShareCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_memoryfabricimportv2ShareCallback(struct MemoryFabricImportV2 *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_memoryfabricimportv2ShareCallback(struct MemoryFabricImportV2 *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // memoryfabricimportv2ControlSerialization_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportv2ControlSerialization_Prologue(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportv2ControlSerialization_Prologue(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RmResource.offset), pCallContext, pParams); } // memoryfabricimportv2ControlSerialization_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_memoryfabricimportv2ControlSerialization_Epilogue(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_memoryfabricimportv2ControlSerialization_Epilogue(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RmResource.offset), pCallContext, pParams); } // memoryfabricimportv2Control_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportv2Control_Prologue(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricimportv2Control_Prologue(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RmResource.offset), pCallContext, pParams); } // memoryfabricimportv2Control_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_memoryfabricimportv2Control_Epilogue(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_memoryfabricimportv2Control_Epilogue(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RmResource.offset), pCallContext, pParams); } // memoryfabricimportv2PreDestruct: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_memoryfabricimportv2PreDestruct(struct MemoryFabricImportV2 *pResource) { +void __nvoc_up_thunk_RsResource_memoryfabricimportv2PreDestruct(struct MemoryFabricImportV2 *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RsResource.offset)); } // memoryfabricimportv2ControlFilter: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportv2ControlFilter(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportv2ControlFilter(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RsResource.offset), pCallContext, pParams); } // memoryfabricimportv2IsPartialUnmapSupported: inline virtual inherited (res) base (mem) body -static NvBool __nvoc_up_thunk_RsResource_memoryfabricimportv2IsPartialUnmapSupported(struct MemoryFabricImportV2 *pResource) { +NvBool __nvoc_up_thunk_RsResource_memoryfabricimportv2IsPartialUnmapSupported(struct MemoryFabricImportV2 *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RsResource.offset)); } // memoryfabricimportv2MapTo: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportv2MapTo(struct MemoryFabricImportV2 *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportv2MapTo(struct MemoryFabricImportV2 *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RsResource.offset), pParams); } // memoryfabricimportv2UnmapFrom: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportv2UnmapFrom(struct MemoryFabricImportV2 *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricimportv2UnmapFrom(struct MemoryFabricImportV2 *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RsResource.offset), pParams); } // memoryfabricimportv2GetRefCount: virtual inherited (res) base (mem) -static NvU32 __nvoc_up_thunk_RsResource_memoryfabricimportv2GetRefCount(struct MemoryFabricImportV2 *pResource) { +NvU32 __nvoc_up_thunk_RsResource_memoryfabricimportv2GetRefCount(struct MemoryFabricImportV2 *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RsResource.offset)); } // memoryfabricimportv2AddAdditionalDependants: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_memoryfabricimportv2AddAdditionalDependants(struct RsClient *pClient, struct MemoryFabricImportV2 *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_memoryfabricimportv2AddAdditionalDependants(struct RsClient *pClient, struct MemoryFabricImportV2 *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabricImportV2_RsResource.offset), pReference); } @@ -293,104 +362,121 @@ NV_STATUS __nvoc_ctor_MemoryFabricImportV2(MemoryFabricImportV2 *pThis, CALL_CON static void __nvoc_init_funcTable_MemoryFabricImportV2_1(MemoryFabricImportV2 *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // memoryfabricimportv2CanCopy -- virtual override (res) base (mem) - pThis->__memoryfabricimportv2CanCopy__ = &memoryfabricimportv2CanCopy_IMPL; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_MemoryFabricImportV2_resCanCopy; - - // memoryfabricimportv2IsReady -- virtual override (mem) base (mem) - pThis->__memoryfabricimportv2IsReady__ = &memoryfabricimportv2IsReady_IMPL; - pThis->__nvoc_base_Memory.__memIsReady__ = &__nvoc_down_thunk_MemoryFabricImportV2_memIsReady; - - // memoryfabricimportv2CopyConstruct -- virtual override (mem) base (mem) - pThis->__memoryfabricimportv2CopyConstruct__ = &memoryfabricimportv2CopyConstruct_IMPL; - - // memoryfabricimportv2Control -- virtual override (res) base (mem) - pThis->__memoryfabricimportv2Control__ = &memoryfabricimportv2Control_IMPL; - pThis->__nvoc_base_Memory.__memControl__ = &__nvoc_down_thunk_MemoryFabricImportV2_memControl; - - // memoryfabricimportv2GetMapAddrSpace -- virtual override (mem) base (mem) - pThis->__memoryfabricimportv2GetMapAddrSpace__ = &memoryfabricimportv2GetMapAddrSpace_IMPL; - pThis->__nvoc_base_Memory.__memGetMapAddrSpace__ = &__nvoc_down_thunk_MemoryFabricImportV2_memGetMapAddrSpace; - // memoryfabricimportv2CtrlGetInfo -- exported (id=0xf90101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__memoryfabricimportv2CtrlGetInfo__ = &memoryfabricimportv2CtrlGetInfo_IMPL; #endif - - // memoryfabricimportv2IsGpuMapAllowed -- virtual override (mem) base (mem) - pThis->__memoryfabricimportv2IsGpuMapAllowed__ = &memoryfabricimportv2IsGpuMapAllowed_IMPL; - pThis->__nvoc_base_Memory.__memIsGpuMapAllowed__ = &__nvoc_down_thunk_MemoryFabricImportV2_memIsGpuMapAllowed; - - // memoryfabricimportv2IsExportAllowed -- virtual override (mem) base (mem) - pThis->__memoryfabricimportv2IsExportAllowed__ = &memoryfabricimportv2IsExportAllowed_IMPL; - pThis->__nvoc_base_Memory.__memIsExportAllowed__ = &__nvoc_down_thunk_MemoryFabricImportV2_memIsExportAllowed; - - // memoryfabricimportv2IsDuplicate -- virtual inherited (mem) base (mem) - pThis->__memoryfabricimportv2IsDuplicate__ = &__nvoc_up_thunk_Memory_memoryfabricimportv2IsDuplicate; - - // memoryfabricimportv2Map -- virtual inherited (mem) base (mem) - pThis->__memoryfabricimportv2Map__ = &__nvoc_up_thunk_Memory_memoryfabricimportv2Map; - - // memoryfabricimportv2Unmap -- virtual inherited (mem) base (mem) - pThis->__memoryfabricimportv2Unmap__ = &__nvoc_up_thunk_Memory_memoryfabricimportv2Unmap; - - // memoryfabricimportv2GetMemInterMapParams -- virtual inherited (mem) base (mem) - pThis->__memoryfabricimportv2GetMemInterMapParams__ = &__nvoc_up_thunk_Memory_memoryfabricimportv2GetMemInterMapParams; - - // memoryfabricimportv2CheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body - pThis->__memoryfabricimportv2CheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_memoryfabricimportv2CheckMemInterUnmap; - - // memoryfabricimportv2GetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) - pThis->__memoryfabricimportv2GetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_memoryfabricimportv2GetMemoryMappingDescriptor; - - // memoryfabricimportv2CheckCopyPermissions -- inline virtual inherited (mem) base (mem) body - pThis->__memoryfabricimportv2CheckCopyPermissions__ = &__nvoc_up_thunk_Memory_memoryfabricimportv2CheckCopyPermissions; - - // memoryfabricimportv2AccessCallback -- virtual inherited (rmres) base (mem) - pThis->__memoryfabricimportv2AccessCallback__ = &__nvoc_up_thunk_RmResource_memoryfabricimportv2AccessCallback; - - // memoryfabricimportv2ShareCallback -- virtual inherited (rmres) base (mem) - pThis->__memoryfabricimportv2ShareCallback__ = &__nvoc_up_thunk_RmResource_memoryfabricimportv2ShareCallback; - - // memoryfabricimportv2ControlSerialization_Prologue -- virtual inherited (rmres) base (mem) - pThis->__memoryfabricimportv2ControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportv2ControlSerialization_Prologue; - - // memoryfabricimportv2ControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__memoryfabricimportv2ControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportv2ControlSerialization_Epilogue; - - // memoryfabricimportv2Control_Prologue -- virtual inherited (rmres) base (mem) - pThis->__memoryfabricimportv2Control_Prologue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportv2Control_Prologue; - - // memoryfabricimportv2Control_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__memoryfabricimportv2Control_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportv2Control_Epilogue; - - // memoryfabricimportv2PreDestruct -- virtual inherited (res) base (mem) - pThis->__memoryfabricimportv2PreDestruct__ = &__nvoc_up_thunk_RsResource_memoryfabricimportv2PreDestruct; - - // memoryfabricimportv2ControlFilter -- virtual inherited (res) base (mem) - pThis->__memoryfabricimportv2ControlFilter__ = &__nvoc_up_thunk_RsResource_memoryfabricimportv2ControlFilter; - - // memoryfabricimportv2IsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body - pThis->__memoryfabricimportv2IsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memoryfabricimportv2IsPartialUnmapSupported; - - // memoryfabricimportv2MapTo -- virtual inherited (res) base (mem) - pThis->__memoryfabricimportv2MapTo__ = &__nvoc_up_thunk_RsResource_memoryfabricimportv2MapTo; - - // memoryfabricimportv2UnmapFrom -- virtual inherited (res) base (mem) - pThis->__memoryfabricimportv2UnmapFrom__ = &__nvoc_up_thunk_RsResource_memoryfabricimportv2UnmapFrom; - - // memoryfabricimportv2GetRefCount -- virtual inherited (res) base (mem) - pThis->__memoryfabricimportv2GetRefCount__ = &__nvoc_up_thunk_RsResource_memoryfabricimportv2GetRefCount; - - // memoryfabricimportv2AddAdditionalDependants -- virtual inherited (res) base (mem) - pThis->__memoryfabricimportv2AddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memoryfabricimportv2AddAdditionalDependants; -} // End __nvoc_init_funcTable_MemoryFabricImportV2_1 with approximately 34 basic block(s). +} // End __nvoc_init_funcTable_MemoryFabricImportV2_1 with approximately 1 basic block(s). // Initialize vtable(s) for 28 virtual method(s). void __nvoc_init_funcTable_MemoryFabricImportV2(MemoryFabricImportV2 *pThis) { - // Initialize vtable(s) with 28 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__MemoryFabricImportV2 vtable = { + .__memoryfabricimportv2CanCopy__ = &memoryfabricimportv2CanCopy_IMPL, // virtual override (res) base (mem) + .Memory.__memCanCopy__ = &__nvoc_up_thunk_RsResource_memCanCopy, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_MemoryFabricImportV2_resCanCopy, // virtual + .__memoryfabricimportv2IsReady__ = &memoryfabricimportv2IsReady_IMPL, // virtual override (mem) base (mem) + .Memory.__memIsReady__ = &__nvoc_down_thunk_MemoryFabricImportV2_memIsReady, // virtual + .__memoryfabricimportv2CopyConstruct__ = &memoryfabricimportv2CopyConstruct_IMPL, // virtual override (mem) base (mem) + .__memoryfabricimportv2Control__ = &memoryfabricimportv2Control_IMPL, // virtual override (res) base (mem) + .Memory.__memControl__ = &__nvoc_down_thunk_MemoryFabricImportV2_memControl, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_Memory_resControl, // virtual + .__memoryfabricimportv2GetMapAddrSpace__ = &memoryfabricimportv2GetMapAddrSpace_IMPL, // virtual override (mem) base (mem) + .Memory.__memGetMapAddrSpace__ = &__nvoc_down_thunk_MemoryFabricImportV2_memGetMapAddrSpace, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) +#endif + .__memoryfabricimportv2IsGpuMapAllowed__ = &memoryfabricimportv2IsGpuMapAllowed_IMPL, // virtual override (mem) base (mem) + .Memory.__memIsGpuMapAllowed__ = &__nvoc_down_thunk_MemoryFabricImportV2_memIsGpuMapAllowed, // inline virtual body + .__memoryfabricimportv2IsExportAllowed__ = &memoryfabricimportv2IsExportAllowed_IMPL, // virtual override (mem) base (mem) + .Memory.__memIsExportAllowed__ = &__nvoc_down_thunk_MemoryFabricImportV2_memIsExportAllowed, // inline virtual body + .__memoryfabricimportv2IsDuplicate__ = &__nvoc_up_thunk_Memory_memoryfabricimportv2IsDuplicate, // virtual inherited (mem) base (mem) + .Memory.__memIsDuplicate__ = &memIsDuplicate_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resIsDuplicate__ = &__nvoc_down_thunk_Memory_resIsDuplicate, // virtual + .__memoryfabricimportv2Map__ = &__nvoc_up_thunk_Memory_memoryfabricimportv2Map, // virtual inherited (mem) base (mem) + .Memory.__memMap__ = &memMap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_Memory_resMap, // virtual + .__memoryfabricimportv2Unmap__ = &__nvoc_up_thunk_Memory_memoryfabricimportv2Unmap, // virtual inherited (mem) base (mem) + .Memory.__memUnmap__ = &memUnmap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_Memory_resUnmap, // virtual + .__memoryfabricimportv2GetMemInterMapParams__ = &__nvoc_up_thunk_Memory_memoryfabricimportv2GetMemInterMapParams, // virtual inherited (mem) base (mem) + .Memory.__memGetMemInterMapParams__ = &memGetMemInterMapParams_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_Memory_rmresGetMemInterMapParams, // virtual + .__memoryfabricimportv2CheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_memoryfabricimportv2CheckMemInterUnmap, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckMemInterUnmap__ = &memCheckMemInterUnmap_ac1694, // inline virtual override (rmres) base (rmres) body + .Memory.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_Memory_rmresCheckMemInterUnmap, // virtual + .__memoryfabricimportv2GetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_memoryfabricimportv2GetMemoryMappingDescriptor, // virtual inherited (mem) base (mem) + .Memory.__memGetMemoryMappingDescriptor__ = &memGetMemoryMappingDescriptor_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor, // virtual + .__memoryfabricimportv2CheckCopyPermissions__ = &__nvoc_up_thunk_Memory_memoryfabricimportv2CheckCopyPermissions, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckCopyPermissions__ = &memCheckCopyPermissions_ac1694, // inline virtual body + .__memoryfabricimportv2AccessCallback__ = &__nvoc_up_thunk_RmResource_memoryfabricimportv2AccessCallback, // virtual inherited (rmres) base (mem) + .Memory.__memAccessCallback__ = &__nvoc_up_thunk_RmResource_memAccessCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__memoryfabricimportv2ShareCallback__ = &__nvoc_up_thunk_RmResource_memoryfabricimportv2ShareCallback, // virtual inherited (rmres) base (mem) + .Memory.__memShareCallback__ = &__nvoc_up_thunk_RmResource_memShareCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__memoryfabricimportv2ControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportv2ControlSerialization_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__memoryfabricimportv2ControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportv2ControlSerialization_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__memoryfabricimportv2Control_Prologue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportv2Control_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Prologue__ = &__nvoc_up_thunk_RmResource_memControl_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__memoryfabricimportv2Control_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryfabricimportv2Control_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memControl_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__memoryfabricimportv2PreDestruct__ = &__nvoc_up_thunk_RsResource_memoryfabricimportv2PreDestruct, // virtual inherited (res) base (mem) + .Memory.__memPreDestruct__ = &__nvoc_up_thunk_RsResource_memPreDestruct, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__memoryfabricimportv2ControlFilter__ = &__nvoc_up_thunk_RsResource_memoryfabricimportv2ControlFilter, // virtual inherited (res) base (mem) + .Memory.__memControlFilter__ = &__nvoc_up_thunk_RsResource_memControlFilter, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__memoryfabricimportv2IsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memoryfabricimportv2IsPartialUnmapSupported, // inline virtual inherited (res) base (mem) body + .Memory.__memIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .Memory.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .Memory.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__memoryfabricimportv2MapTo__ = &__nvoc_up_thunk_RsResource_memoryfabricimportv2MapTo, // virtual inherited (res) base (mem) + .Memory.__memMapTo__ = &__nvoc_up_thunk_RsResource_memMapTo, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__memoryfabricimportv2UnmapFrom__ = &__nvoc_up_thunk_RsResource_memoryfabricimportv2UnmapFrom, // virtual inherited (res) base (mem) + .Memory.__memUnmapFrom__ = &__nvoc_up_thunk_RsResource_memUnmapFrom, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__memoryfabricimportv2GetRefCount__ = &__nvoc_up_thunk_RsResource_memoryfabricimportv2GetRefCount, // virtual inherited (res) base (mem) + .Memory.__memGetRefCount__ = &__nvoc_up_thunk_RsResource_memGetRefCount, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__memoryfabricimportv2AddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memoryfabricimportv2AddAdditionalDependants, // virtual inherited (res) base (mem) + .Memory.__memAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memAddAdditionalDependants, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.Memory.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable = &vtable.Memory.RmResource; // (rmres) super^2 + pThis->__nvoc_base_Memory.__nvoc_vtable = &vtable.Memory; // (mem) super + pThis->__nvoc_vtable = &vtable; // (memoryfabricimportv2) this + + // Initialize vtable(s) with 1 per-object function pointer(s). __nvoc_init_funcTable_MemoryFabricImportV2_1(pThis); } diff --git a/src/nvidia/generated/g_mem_fabric_import_v2_nvoc.h b/src/nvidia/generated/g_mem_fabric_import_v2_nvoc.h index 1d46992009..7b4281d242 100644 --- a/src/nvidia/generated/g_mem_fabric_import_v2_nvoc.h +++ b/src/nvidia/generated/g_mem_fabric_import_v2_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -74,10 +74,15 @@ typedef struct mem_fabric_import_descriptor MEM_FABRIC_IMPORT_DESCRIPTOR; #endif +// Metadata including vtable +struct NVOC_VTABLE__MemoryFabricImportV2; + + struct MemoryFabricImportV2 { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__MemoryFabricImportV2 *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; @@ -90,13 +95,24 @@ struct MemoryFabricImportV2 { struct Memory *__nvoc_pbase_Memory; // mem super struct MemoryFabricImportV2 *__nvoc_pbase_MemoryFabricImportV2; // memoryfabricimportv2 - // Vtable with 28 per-object function pointers + // Vtable with 1 per-object function pointer + NV_STATUS (*__memoryfabricimportv2CtrlGetInfo__)(struct MemoryFabricImportV2 * /*this*/, NV00F9_CTRL_GET_INFO_PARAMS *); // exported (id=0xf90101) + + // Data members + NvU16 expNodeId; + MEM_FABRIC_IMPORT_DESCRIPTOR *PRIVATE_FIELD(pFabricImportDesc); +}; + + +// Metadata including vtable with 27 function pointers plus superclass metadata +struct NVOC_VTABLE__MemoryFabricImportV2 { + const struct NVOC_VTABLE__Memory Memory; // (mem) 26 function pointers + NvBool (*__memoryfabricimportv2CanCopy__)(struct MemoryFabricImportV2 * /*this*/); // virtual override (res) base (mem) NV_STATUS (*__memoryfabricimportv2IsReady__)(struct MemoryFabricImportV2 * /*this*/, NvBool); // virtual override (mem) base (mem) NV_STATUS (*__memoryfabricimportv2CopyConstruct__)(struct MemoryFabricImportV2 * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); // virtual override (mem) base (mem) NV_STATUS (*__memoryfabricimportv2Control__)(struct MemoryFabricImportV2 * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (mem) NV_STATUS (*__memoryfabricimportv2GetMapAddrSpace__)(struct MemoryFabricImportV2 * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (mem) base (mem) - NV_STATUS (*__memoryfabricimportv2CtrlGetInfo__)(struct MemoryFabricImportV2 * /*this*/, NV00F9_CTRL_GET_INFO_PARAMS *); // exported (id=0xf90101) NvBool (*__memoryfabricimportv2IsGpuMapAllowed__)(struct MemoryFabricImportV2 * /*this*/, struct OBJGPU *); // virtual override (mem) base (mem) NvBool (*__memoryfabricimportv2IsExportAllowed__)(struct MemoryFabricImportV2 * /*this*/); // virtual override (mem) base (mem) NV_STATUS (*__memoryfabricimportv2IsDuplicate__)(struct MemoryFabricImportV2 * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) @@ -119,10 +135,6 @@ struct MemoryFabricImportV2 { NV_STATUS (*__memoryfabricimportv2UnmapFrom__)(struct MemoryFabricImportV2 * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (mem) NvU32 (*__memoryfabricimportv2GetRefCount__)(struct MemoryFabricImportV2 * /*this*/); // virtual inherited (res) base (mem) void (*__memoryfabricimportv2AddAdditionalDependants__)(struct RsClient *, struct MemoryFabricImportV2 * /*this*/, RsResourceRef *); // virtual inherited (res) base (mem) - - // Data members - NvU16 expNodeId; - MEM_FABRIC_IMPORT_DESCRIPTOR *PRIVATE_FIELD(pFabricImportDesc); }; #ifndef __NVOC_CLASS_MemoryFabricImportV2_TYPEDEF__ @@ -155,82 +167,82 @@ NV_STATUS __nvoc_objCreate_MemoryFabricImportV2(MemoryFabricImportV2**, Dynamic* // Wrapper macros -#define memoryfabricimportv2CanCopy_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__memoryfabricimportv2CanCopy__ +#define memoryfabricimportv2CanCopy_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__nvoc_vtable->__memoryfabricimportv2CanCopy__ #define memoryfabricimportv2CanCopy(pMemoryFabricImportV2) memoryfabricimportv2CanCopy_DISPATCH(pMemoryFabricImportV2) -#define memoryfabricimportv2IsReady_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__memoryfabricimportv2IsReady__ +#define memoryfabricimportv2IsReady_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__nvoc_vtable->__memoryfabricimportv2IsReady__ #define memoryfabricimportv2IsReady(pMemoryFabricImportV2, bCopyConstructorContext) memoryfabricimportv2IsReady_DISPATCH(pMemoryFabricImportV2, bCopyConstructorContext) -#define memoryfabricimportv2CopyConstruct_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__memoryfabricimportv2CopyConstruct__ +#define memoryfabricimportv2CopyConstruct_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__nvoc_vtable->__memoryfabricimportv2CopyConstruct__ #define memoryfabricimportv2CopyConstruct(pMemoryFabricImportV2, pCallContext, pParams) memoryfabricimportv2CopyConstruct_DISPATCH(pMemoryFabricImportV2, pCallContext, pParams) -#define memoryfabricimportv2Control_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__memoryfabricimportv2Control__ +#define memoryfabricimportv2Control_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__nvoc_vtable->__memoryfabricimportv2Control__ #define memoryfabricimportv2Control(pMemoryFabricImportV2, pCallContext, pParams) memoryfabricimportv2Control_DISPATCH(pMemoryFabricImportV2, pCallContext, pParams) -#define memoryfabricimportv2GetMapAddrSpace_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__memoryfabricimportv2GetMapAddrSpace__ +#define memoryfabricimportv2GetMapAddrSpace_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__nvoc_vtable->__memoryfabricimportv2GetMapAddrSpace__ #define memoryfabricimportv2GetMapAddrSpace(pMemoryFabricImportV2, pCallContext, mapFlags, pAddrSpace) memoryfabricimportv2GetMapAddrSpace_DISPATCH(pMemoryFabricImportV2, pCallContext, mapFlags, pAddrSpace) #define memoryfabricimportv2CtrlGetInfo_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__memoryfabricimportv2CtrlGetInfo__ #define memoryfabricimportv2CtrlGetInfo(pMemoryFabricImportV2, pParams) memoryfabricimportv2CtrlGetInfo_DISPATCH(pMemoryFabricImportV2, pParams) -#define memoryfabricimportv2IsGpuMapAllowed_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__memoryfabricimportv2IsGpuMapAllowed__ +#define memoryfabricimportv2IsGpuMapAllowed_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__nvoc_vtable->__memoryfabricimportv2IsGpuMapAllowed__ #define memoryfabricimportv2IsGpuMapAllowed(pMemoryFabricImportV2, pGpu) memoryfabricimportv2IsGpuMapAllowed_DISPATCH(pMemoryFabricImportV2, pGpu) -#define memoryfabricimportv2IsExportAllowed_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__memoryfabricimportv2IsExportAllowed__ +#define memoryfabricimportv2IsExportAllowed_FNPTR(pMemoryFabricImportV2) pMemoryFabricImportV2->__nvoc_vtable->__memoryfabricimportv2IsExportAllowed__ #define memoryfabricimportv2IsExportAllowed(pMemoryFabricImportV2) memoryfabricimportv2IsExportAllowed_DISPATCH(pMemoryFabricImportV2) -#define memoryfabricimportv2IsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define memoryfabricimportv2IsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsDuplicate__ #define memoryfabricimportv2IsDuplicate(pMemory, hMemory, pDuplicate) memoryfabricimportv2IsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define memoryfabricimportv2Map_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define memoryfabricimportv2Map_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memMap__ #define memoryfabricimportv2Map(pMemory, pCallContext, pParams, pCpuMapping) memoryfabricimportv2Map_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define memoryfabricimportv2Unmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ +#define memoryfabricimportv2Unmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memUnmap__ #define memoryfabricimportv2Unmap(pMemory, pCallContext, pCpuMapping) memoryfabricimportv2Unmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define memoryfabricimportv2GetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ +#define memoryfabricimportv2GetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemInterMapParams__ #define memoryfabricimportv2GetMemInterMapParams(pMemory, pParams) memoryfabricimportv2GetMemInterMapParams_DISPATCH(pMemory, pParams) -#define memoryfabricimportv2CheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define memoryfabricimportv2CheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckMemInterUnmap__ #define memoryfabricimportv2CheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) memoryfabricimportv2CheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define memoryfabricimportv2GetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ +#define memoryfabricimportv2GetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemoryMappingDescriptor__ #define memoryfabricimportv2GetMemoryMappingDescriptor(pMemory, ppMemDesc) memoryfabricimportv2GetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define memoryfabricimportv2CheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ +#define memoryfabricimportv2CheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckCopyPermissions__ #define memoryfabricimportv2CheckCopyPermissions(pMemory, pDstGpu, pDstDevice) memoryfabricimportv2CheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define memoryfabricimportv2AccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define memoryfabricimportv2AccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define memoryfabricimportv2AccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) memoryfabricimportv2AccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define memoryfabricimportv2ShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define memoryfabricimportv2ShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define memoryfabricimportv2ShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) memoryfabricimportv2ShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define memoryfabricimportv2ControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define memoryfabricimportv2ControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define memoryfabricimportv2ControlSerialization_Prologue(pResource, pCallContext, pParams) memoryfabricimportv2ControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricimportv2ControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define memoryfabricimportv2ControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define memoryfabricimportv2ControlSerialization_Epilogue(pResource, pCallContext, pParams) memoryfabricimportv2ControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricimportv2Control_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define memoryfabricimportv2Control_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define memoryfabricimportv2Control_Prologue(pResource, pCallContext, pParams) memoryfabricimportv2Control_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricimportv2Control_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define memoryfabricimportv2Control_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define memoryfabricimportv2Control_Epilogue(pResource, pCallContext, pParams) memoryfabricimportv2Control_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricimportv2PreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define memoryfabricimportv2PreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define memoryfabricimportv2PreDestruct(pResource) memoryfabricimportv2PreDestruct_DISPATCH(pResource) -#define memoryfabricimportv2ControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define memoryfabricimportv2ControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define memoryfabricimportv2ControlFilter(pResource, pCallContext, pParams) memoryfabricimportv2ControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricimportv2IsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define memoryfabricimportv2IsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define memoryfabricimportv2IsPartialUnmapSupported(pResource) memoryfabricimportv2IsPartialUnmapSupported_DISPATCH(pResource) -#define memoryfabricimportv2MapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define memoryfabricimportv2MapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define memoryfabricimportv2MapTo(pResource, pParams) memoryfabricimportv2MapTo_DISPATCH(pResource, pParams) -#define memoryfabricimportv2UnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define memoryfabricimportv2UnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define memoryfabricimportv2UnmapFrom(pResource, pParams) memoryfabricimportv2UnmapFrom_DISPATCH(pResource, pParams) -#define memoryfabricimportv2GetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define memoryfabricimportv2GetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define memoryfabricimportv2GetRefCount(pResource) memoryfabricimportv2GetRefCount_DISPATCH(pResource) -#define memoryfabricimportv2AddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define memoryfabricimportv2AddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define memoryfabricimportv2AddAdditionalDependants(pClient, pResource, pReference) memoryfabricimportv2AddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool memoryfabricimportv2CanCopy_DISPATCH(struct MemoryFabricImportV2 *pMemoryFabricImportV2) { - return pMemoryFabricImportV2->__memoryfabricimportv2CanCopy__(pMemoryFabricImportV2); + return pMemoryFabricImportV2->__nvoc_vtable->__memoryfabricimportv2CanCopy__(pMemoryFabricImportV2); } static inline NV_STATUS memoryfabricimportv2IsReady_DISPATCH(struct MemoryFabricImportV2 *pMemoryFabricImportV2, NvBool bCopyConstructorContext) { - return pMemoryFabricImportV2->__memoryfabricimportv2IsReady__(pMemoryFabricImportV2, bCopyConstructorContext); + return pMemoryFabricImportV2->__nvoc_vtable->__memoryfabricimportv2IsReady__(pMemoryFabricImportV2, bCopyConstructorContext); } static inline NV_STATUS memoryfabricimportv2CopyConstruct_DISPATCH(struct MemoryFabricImportV2 *pMemoryFabricImportV2, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { - return pMemoryFabricImportV2->__memoryfabricimportv2CopyConstruct__(pMemoryFabricImportV2, pCallContext, pParams); + return pMemoryFabricImportV2->__nvoc_vtable->__memoryfabricimportv2CopyConstruct__(pMemoryFabricImportV2, pCallContext, pParams); } static inline NV_STATUS memoryfabricimportv2Control_DISPATCH(struct MemoryFabricImportV2 *pMemoryFabricImportV2, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemoryFabricImportV2->__memoryfabricimportv2Control__(pMemoryFabricImportV2, pCallContext, pParams); + return pMemoryFabricImportV2->__nvoc_vtable->__memoryfabricimportv2Control__(pMemoryFabricImportV2, pCallContext, pParams); } static inline NV_STATUS memoryfabricimportv2GetMapAddrSpace_DISPATCH(struct MemoryFabricImportV2 *pMemoryFabricImportV2, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pMemoryFabricImportV2->__memoryfabricimportv2GetMapAddrSpace__(pMemoryFabricImportV2, pCallContext, mapFlags, pAddrSpace); + return pMemoryFabricImportV2->__nvoc_vtable->__memoryfabricimportv2GetMapAddrSpace__(pMemoryFabricImportV2, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS memoryfabricimportv2CtrlGetInfo_DISPATCH(struct MemoryFabricImportV2 *pMemoryFabricImportV2, NV00F9_CTRL_GET_INFO_PARAMS *pParams) { @@ -238,91 +250,91 @@ static inline NV_STATUS memoryfabricimportv2CtrlGetInfo_DISPATCH(struct MemoryFa } static inline NvBool memoryfabricimportv2IsGpuMapAllowed_DISPATCH(struct MemoryFabricImportV2 *pMemoryFabricImportV2, struct OBJGPU *pGpu) { - return pMemoryFabricImportV2->__memoryfabricimportv2IsGpuMapAllowed__(pMemoryFabricImportV2, pGpu); + return pMemoryFabricImportV2->__nvoc_vtable->__memoryfabricimportv2IsGpuMapAllowed__(pMemoryFabricImportV2, pGpu); } static inline NvBool memoryfabricimportv2IsExportAllowed_DISPATCH(struct MemoryFabricImportV2 *pMemoryFabricImportV2) { - return pMemoryFabricImportV2->__memoryfabricimportv2IsExportAllowed__(pMemoryFabricImportV2); + return pMemoryFabricImportV2->__nvoc_vtable->__memoryfabricimportv2IsExportAllowed__(pMemoryFabricImportV2); } static inline NV_STATUS memoryfabricimportv2IsDuplicate_DISPATCH(struct MemoryFabricImportV2 *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__memoryfabricimportv2IsDuplicate__(pMemory, hMemory, pDuplicate); + return pMemory->__nvoc_vtable->__memoryfabricimportv2IsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS memoryfabricimportv2Map_DISPATCH(struct MemoryFabricImportV2 *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__memoryfabricimportv2Map__(pMemory, pCallContext, pParams, pCpuMapping); + return pMemory->__nvoc_vtable->__memoryfabricimportv2Map__(pMemory, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS memoryfabricimportv2Unmap_DISPATCH(struct MemoryFabricImportV2 *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__memoryfabricimportv2Unmap__(pMemory, pCallContext, pCpuMapping); + return pMemory->__nvoc_vtable->__memoryfabricimportv2Unmap__(pMemory, pCallContext, pCpuMapping); } static inline NV_STATUS memoryfabricimportv2GetMemInterMapParams_DISPATCH(struct MemoryFabricImportV2 *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__memoryfabricimportv2GetMemInterMapParams__(pMemory, pParams); + return pMemory->__nvoc_vtable->__memoryfabricimportv2GetMemInterMapParams__(pMemory, pParams); } static inline NV_STATUS memoryfabricimportv2CheckMemInterUnmap_DISPATCH(struct MemoryFabricImportV2 *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__memoryfabricimportv2CheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); + return pMemory->__nvoc_vtable->__memoryfabricimportv2CheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } static inline NV_STATUS memoryfabricimportv2GetMemoryMappingDescriptor_DISPATCH(struct MemoryFabricImportV2 *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__memoryfabricimportv2GetMemoryMappingDescriptor__(pMemory, ppMemDesc); + return pMemory->__nvoc_vtable->__memoryfabricimportv2GetMemoryMappingDescriptor__(pMemory, ppMemDesc); } static inline NV_STATUS memoryfabricimportv2CheckCopyPermissions_DISPATCH(struct MemoryFabricImportV2 *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__memoryfabricimportv2CheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); + return pMemory->__nvoc_vtable->__memoryfabricimportv2CheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } static inline NvBool memoryfabricimportv2AccessCallback_DISPATCH(struct MemoryFabricImportV2 *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__memoryfabricimportv2AccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__memoryfabricimportv2AccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool memoryfabricimportv2ShareCallback_DISPATCH(struct MemoryFabricImportV2 *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__memoryfabricimportv2ShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__memoryfabricimportv2ShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS memoryfabricimportv2ControlSerialization_Prologue_DISPATCH(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memoryfabricimportv2ControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memoryfabricimportv2ControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void memoryfabricimportv2ControlSerialization_Epilogue_DISPATCH(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memoryfabricimportv2ControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__memoryfabricimportv2ControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS memoryfabricimportv2Control_Prologue_DISPATCH(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memoryfabricimportv2Control_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memoryfabricimportv2Control_Prologue__(pResource, pCallContext, pParams); } static inline void memoryfabricimportv2Control_Epilogue_DISPATCH(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memoryfabricimportv2Control_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__memoryfabricimportv2Control_Epilogue__(pResource, pCallContext, pParams); } static inline void memoryfabricimportv2PreDestruct_DISPATCH(struct MemoryFabricImportV2 *pResource) { - pResource->__memoryfabricimportv2PreDestruct__(pResource); + pResource->__nvoc_vtable->__memoryfabricimportv2PreDestruct__(pResource); } static inline NV_STATUS memoryfabricimportv2ControlFilter_DISPATCH(struct MemoryFabricImportV2 *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memoryfabricimportv2ControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memoryfabricimportv2ControlFilter__(pResource, pCallContext, pParams); } static inline NvBool memoryfabricimportv2IsPartialUnmapSupported_DISPATCH(struct MemoryFabricImportV2 *pResource) { - return pResource->__memoryfabricimportv2IsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__memoryfabricimportv2IsPartialUnmapSupported__(pResource); } static inline NV_STATUS memoryfabricimportv2MapTo_DISPATCH(struct MemoryFabricImportV2 *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__memoryfabricimportv2MapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__memoryfabricimportv2MapTo__(pResource, pParams); } static inline NV_STATUS memoryfabricimportv2UnmapFrom_DISPATCH(struct MemoryFabricImportV2 *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__memoryfabricimportv2UnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__memoryfabricimportv2UnmapFrom__(pResource, pParams); } static inline NvU32 memoryfabricimportv2GetRefCount_DISPATCH(struct MemoryFabricImportV2 *pResource) { - return pResource->__memoryfabricimportv2GetRefCount__(pResource); + return pResource->__nvoc_vtable->__memoryfabricimportv2GetRefCount__(pResource); } static inline void memoryfabricimportv2AddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryFabricImportV2 *pResource, RsResourceRef *pReference) { - pResource->__memoryfabricimportv2AddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__memoryfabricimportv2AddAdditionalDependants__(pClient, pResource, pReference); } NvBool memoryfabricimportv2CanCopy_IMPL(struct MemoryFabricImportV2 *pMemoryFabricImportV2); diff --git a/src/nvidia/generated/g_mem_fabric_nvoc.c b/src/nvidia/generated/g_mem_fabric_nvoc.c index 62818ea2a9..d12f1aa2fc 100644 --- a/src/nvidia/generated/g_mem_fabric_nvoc.c +++ b/src/nvidia/generated/g_mem_fabric_nvoc.c @@ -207,138 +207,207 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryFa }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super +NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super +NvBool __nvoc_down_thunk_MemoryFabric_resCanCopy(struct RsResource *pMemoryFabric); // this +NV_STATUS __nvoc_down_thunk_MemoryFabric_memControl(struct Memory *pMemoryFabric, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this + // 2 down-thunk(s) defined to bridge methods in MemoryFabric from superclasses // memoryfabricCanCopy: virtual override (res) base (mem) -static NvBool __nvoc_down_thunk_MemoryFabric_resCanCopy(struct RsResource *pMemoryFabric) { +NvBool __nvoc_down_thunk_MemoryFabric_resCanCopy(struct RsResource *pMemoryFabric) { return memoryfabricCanCopy((struct MemoryFabric *)(((unsigned char *) pMemoryFabric) - __nvoc_rtti_MemoryFabric_RsResource.offset)); } // memoryfabricControl: virtual override (res) base (mem) -static NV_STATUS __nvoc_down_thunk_MemoryFabric_memControl(struct Memory *pMemoryFabric, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_down_thunk_MemoryFabric_memControl(struct Memory *pMemoryFabric, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return memoryfabricControl((struct MemoryFabric *)(((unsigned char *) pMemoryFabric) - __nvoc_rtti_MemoryFabric_Memory.offset), pCallContext, pParams); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricIsDuplicate(struct MemoryFabric *pMemory, NvHandle hMemory, NvBool *pDuplicate); // this +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricGetMapAddrSpace(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricMap(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricUnmap(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricGetMemInterMapParams(struct MemoryFabric *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricCheckMemInterUnmap(struct MemoryFabric *pMemory, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricGetMemoryMappingDescriptor(struct MemoryFabric *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricCheckCopyPermissions(struct MemoryFabric *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // this +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricIsReady(struct MemoryFabric *pMemory, NvBool bCopyConstructorContext); // this +NvBool __nvoc_up_thunk_Memory_memoryfabricIsGpuMapAllowed(struct MemoryFabric *pMemory, struct OBJGPU *pGpu); // this +NvBool __nvoc_up_thunk_Memory_memoryfabricIsExportAllowed(struct MemoryFabric *pMemory); // this +NvBool __nvoc_up_thunk_RmResource_memoryfabricAccessCallback(struct MemoryFabric *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_memoryfabricShareCallback(struct MemoryFabric *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricControlSerialization_Prologue(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_memoryfabricControlSerialization_Epilogue(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricControl_Prologue(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_memoryfabricControl_Epilogue(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RsResource_memoryfabricPreDestruct(struct MemoryFabric *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricControlFilter(struct MemoryFabric *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_memoryfabricIsPartialUnmapSupported(struct MemoryFabric *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricMapTo(struct MemoryFabric *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricUnmapFrom(struct MemoryFabric *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_memoryfabricGetRefCount(struct MemoryFabric *pResource); // this +void __nvoc_up_thunk_RsResource_memoryfabricAddAdditionalDependants(struct RsClient *pClient, struct MemoryFabric *pResource, RsResourceRef *pReference); // this + // 24 up-thunk(s) defined to bridge methods in MemoryFabric to superclasses // memoryfabricIsDuplicate: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricIsDuplicate(struct MemoryFabric *pMemory, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricIsDuplicate(struct MemoryFabric *pMemory, NvHandle hMemory, NvBool *pDuplicate) { return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), hMemory, pDuplicate); } // memoryfabricGetMapAddrSpace: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricGetMapAddrSpace(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricGetMapAddrSpace(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), pCallContext, mapFlags, pAddrSpace); } // memoryfabricMap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricMap(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricMap(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), pCallContext, pParams, pCpuMapping); } // memoryfabricUnmap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricUnmap(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricUnmap(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), pCallContext, pCpuMapping); } // memoryfabricGetMemInterMapParams: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricGetMemInterMapParams(struct MemoryFabric *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricGetMemInterMapParams(struct MemoryFabric *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), pParams); } // memoryfabricCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricCheckMemInterUnmap(struct MemoryFabric *pMemory, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricCheckMemInterUnmap(struct MemoryFabric *pMemory, NvBool bSubdeviceHandleProvided) { return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), bSubdeviceHandleProvided); } // memoryfabricGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricGetMemoryMappingDescriptor(struct MemoryFabric *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricGetMemoryMappingDescriptor(struct MemoryFabric *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), ppMemDesc); } // memoryfabricCheckCopyPermissions: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricCheckCopyPermissions(struct MemoryFabric *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricCheckCopyPermissions(struct MemoryFabric *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), pDstGpu, pDstDevice); } // memoryfabricIsReady: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memoryfabricIsReady(struct MemoryFabric *pMemory, NvBool bCopyConstructorContext) { +NV_STATUS __nvoc_up_thunk_Memory_memoryfabricIsReady(struct MemoryFabric *pMemory, NvBool bCopyConstructorContext) { return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), bCopyConstructorContext); } // memoryfabricIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_memoryfabricIsGpuMapAllowed(struct MemoryFabric *pMemory, struct OBJGPU *pGpu) { +NvBool __nvoc_up_thunk_Memory_memoryfabricIsGpuMapAllowed(struct MemoryFabric *pMemory, struct OBJGPU *pGpu) { return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset), pGpu); } // memoryfabricIsExportAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_memoryfabricIsExportAllowed(struct MemoryFabric *pMemory) { +NvBool __nvoc_up_thunk_Memory_memoryfabricIsExportAllowed(struct MemoryFabric *pMemory) { return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryFabric_Memory.offset)); } // memoryfabricAccessCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_memoryfabricAccessCallback(struct MemoryFabric *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_memoryfabricAccessCallback(struct MemoryFabric *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // memoryfabricShareCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_memoryfabricShareCallback(struct MemoryFabric *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_memoryfabricShareCallback(struct MemoryFabric *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // memoryfabricControlSerialization_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricControlSerialization_Prologue(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricControlSerialization_Prologue(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RmResource.offset), pCallContext, pParams); } // memoryfabricControlSerialization_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_memoryfabricControlSerialization_Epilogue(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_memoryfabricControlSerialization_Epilogue(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RmResource.offset), pCallContext, pParams); } // memoryfabricControl_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricControl_Prologue(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_memoryfabricControl_Prologue(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RmResource.offset), pCallContext, pParams); } // memoryfabricControl_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_memoryfabricControl_Epilogue(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_memoryfabricControl_Epilogue(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RmResource.offset), pCallContext, pParams); } // memoryfabricPreDestruct: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_memoryfabricPreDestruct(struct MemoryFabric *pResource) { +void __nvoc_up_thunk_RsResource_memoryfabricPreDestruct(struct MemoryFabric *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RsResource.offset)); } // memoryfabricControlFilter: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricControlFilter(struct MemoryFabric *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricControlFilter(struct MemoryFabric *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RsResource.offset), pCallContext, pParams); } // memoryfabricIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body -static NvBool __nvoc_up_thunk_RsResource_memoryfabricIsPartialUnmapSupported(struct MemoryFabric *pResource) { +NvBool __nvoc_up_thunk_RsResource_memoryfabricIsPartialUnmapSupported(struct MemoryFabric *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RsResource.offset)); } // memoryfabricMapTo: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricMapTo(struct MemoryFabric *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricMapTo(struct MemoryFabric *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RsResource.offset), pParams); } // memoryfabricUnmapFrom: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricUnmapFrom(struct MemoryFabric *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memoryfabricUnmapFrom(struct MemoryFabric *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RsResource.offset), pParams); } // memoryfabricGetRefCount: virtual inherited (res) base (mem) -static NvU32 __nvoc_up_thunk_RsResource_memoryfabricGetRefCount(struct MemoryFabric *pResource) { +NvU32 __nvoc_up_thunk_RsResource_memoryfabricGetRefCount(struct MemoryFabric *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RsResource.offset)); } // memoryfabricAddAdditionalDependants: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_memoryfabricAddAdditionalDependants(struct RsClient *pClient, struct MemoryFabric *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_memoryfabricAddAdditionalDependants(struct RsClient *pClient, struct MemoryFabric *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryFabric_RsResource.offset), pReference); } @@ -383,17 +452,6 @@ NV_STATUS __nvoc_ctor_MemoryFabric(MemoryFabric *pThis, CALL_CONTEXT * arg_pCall static void __nvoc_init_funcTable_MemoryFabric_1(MemoryFabric *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // memoryfabricCanCopy -- virtual override (res) base (mem) - pThis->__memoryfabricCanCopy__ = &memoryfabricCanCopy_IMPL; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_MemoryFabric_resCanCopy; - - // memoryfabricCopyConstruct -- virtual override (mem) base (mem) - pThis->__memoryfabricCopyConstruct__ = &memoryfabricCopyConstruct_IMPL; - - // memoryfabricControl -- virtual override (res) base (mem) - pThis->__memoryfabricControl__ = &memoryfabricControl_IMPL; - pThis->__nvoc_base_Memory.__memControl__ = &__nvoc_down_thunk_MemoryFabric_memControl; - // memoryfabricCtrlGetInfo -- exported (id=0xf80101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) pThis->__memoryfabricCtrlGetInfo__ = &memoryfabricCtrlGetInfo_IMPL; @@ -428,85 +486,129 @@ static void __nvoc_init_funcTable_MemoryFabric_1(MemoryFabric *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x110u) pThis->__memoryfabricCtrlGetPageLevelInfo__ = &memoryfabricCtrlGetPageLevelInfo_IMPL; #endif - - // memoryfabricIsDuplicate -- virtual inherited (mem) base (mem) - pThis->__memoryfabricIsDuplicate__ = &__nvoc_up_thunk_Memory_memoryfabricIsDuplicate; - - // memoryfabricGetMapAddrSpace -- virtual inherited (mem) base (mem) - pThis->__memoryfabricGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_memoryfabricGetMapAddrSpace; - - // memoryfabricMap -- virtual inherited (mem) base (mem) - pThis->__memoryfabricMap__ = &__nvoc_up_thunk_Memory_memoryfabricMap; - - // memoryfabricUnmap -- virtual inherited (mem) base (mem) - pThis->__memoryfabricUnmap__ = &__nvoc_up_thunk_Memory_memoryfabricUnmap; - - // memoryfabricGetMemInterMapParams -- virtual inherited (mem) base (mem) - pThis->__memoryfabricGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_memoryfabricGetMemInterMapParams; - - // memoryfabricCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body - pThis->__memoryfabricCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_memoryfabricCheckMemInterUnmap; - - // memoryfabricGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) - pThis->__memoryfabricGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_memoryfabricGetMemoryMappingDescriptor; - - // memoryfabricCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body - pThis->__memoryfabricCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_memoryfabricCheckCopyPermissions; - - // memoryfabricIsReady -- virtual inherited (mem) base (mem) - pThis->__memoryfabricIsReady__ = &__nvoc_up_thunk_Memory_memoryfabricIsReady; - - // memoryfabricIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__memoryfabricIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_memoryfabricIsGpuMapAllowed; - - // memoryfabricIsExportAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__memoryfabricIsExportAllowed__ = &__nvoc_up_thunk_Memory_memoryfabricIsExportAllowed; - - // memoryfabricAccessCallback -- virtual inherited (rmres) base (mem) - pThis->__memoryfabricAccessCallback__ = &__nvoc_up_thunk_RmResource_memoryfabricAccessCallback; - - // memoryfabricShareCallback -- virtual inherited (rmres) base (mem) - pThis->__memoryfabricShareCallback__ = &__nvoc_up_thunk_RmResource_memoryfabricShareCallback; - - // memoryfabricControlSerialization_Prologue -- virtual inherited (rmres) base (mem) - pThis->__memoryfabricControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memoryfabricControlSerialization_Prologue; - - // memoryfabricControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__memoryfabricControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryfabricControlSerialization_Epilogue; - - // memoryfabricControl_Prologue -- virtual inherited (rmres) base (mem) - pThis->__memoryfabricControl_Prologue__ = &__nvoc_up_thunk_RmResource_memoryfabricControl_Prologue; - - // memoryfabricControl_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__memoryfabricControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryfabricControl_Epilogue; - - // memoryfabricPreDestruct -- virtual inherited (res) base (mem) - pThis->__memoryfabricPreDestruct__ = &__nvoc_up_thunk_RsResource_memoryfabricPreDestruct; - - // memoryfabricControlFilter -- virtual inherited (res) base (mem) - pThis->__memoryfabricControlFilter__ = &__nvoc_up_thunk_RsResource_memoryfabricControlFilter; - - // memoryfabricIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body - pThis->__memoryfabricIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memoryfabricIsPartialUnmapSupported; - - // memoryfabricMapTo -- virtual inherited (res) base (mem) - pThis->__memoryfabricMapTo__ = &__nvoc_up_thunk_RsResource_memoryfabricMapTo; - - // memoryfabricUnmapFrom -- virtual inherited (res) base (mem) - pThis->__memoryfabricUnmapFrom__ = &__nvoc_up_thunk_RsResource_memoryfabricUnmapFrom; - - // memoryfabricGetRefCount -- virtual inherited (res) base (mem) - pThis->__memoryfabricGetRefCount__ = &__nvoc_up_thunk_RsResource_memoryfabricGetRefCount; - - // memoryfabricAddAdditionalDependants -- virtual inherited (res) base (mem) - pThis->__memoryfabricAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memoryfabricAddAdditionalDependants; -} // End __nvoc_init_funcTable_MemoryFabric_1 with approximately 36 basic block(s). +} // End __nvoc_init_funcTable_MemoryFabric_1 with approximately 7 basic block(s). // Initialize vtable(s) for 34 virtual method(s). void __nvoc_init_funcTable_MemoryFabric(MemoryFabric *pThis) { - // Initialize vtable(s) with 34 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__MemoryFabric vtable = { + .__memoryfabricCanCopy__ = &memoryfabricCanCopy_IMPL, // virtual override (res) base (mem) + .Memory.__memCanCopy__ = &__nvoc_up_thunk_RsResource_memCanCopy, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_MemoryFabric_resCanCopy, // virtual + .__memoryfabricCopyConstruct__ = &memoryfabricCopyConstruct_IMPL, // virtual override (mem) base (mem) + .__memoryfabricControl__ = &memoryfabricControl_IMPL, // virtual override (res) base (mem) + .Memory.__memControl__ = &__nvoc_down_thunk_MemoryFabric_memControl, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_Memory_resControl, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x318u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x908u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x908u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x110u) +#endif + .__memoryfabricIsDuplicate__ = &__nvoc_up_thunk_Memory_memoryfabricIsDuplicate, // virtual inherited (mem) base (mem) + .Memory.__memIsDuplicate__ = &memIsDuplicate_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resIsDuplicate__ = &__nvoc_down_thunk_Memory_resIsDuplicate, // virtual + .__memoryfabricGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_memoryfabricGetMapAddrSpace, // virtual inherited (mem) base (mem) + .Memory.__memGetMapAddrSpace__ = &memGetMapAddrSpace_IMPL, // virtual + .__memoryfabricMap__ = &__nvoc_up_thunk_Memory_memoryfabricMap, // virtual inherited (mem) base (mem) + .Memory.__memMap__ = &memMap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_Memory_resMap, // virtual + .__memoryfabricUnmap__ = &__nvoc_up_thunk_Memory_memoryfabricUnmap, // virtual inherited (mem) base (mem) + .Memory.__memUnmap__ = &memUnmap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_Memory_resUnmap, // virtual + .__memoryfabricGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_memoryfabricGetMemInterMapParams, // virtual inherited (mem) base (mem) + .Memory.__memGetMemInterMapParams__ = &memGetMemInterMapParams_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_Memory_rmresGetMemInterMapParams, // virtual + .__memoryfabricCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_memoryfabricCheckMemInterUnmap, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckMemInterUnmap__ = &memCheckMemInterUnmap_ac1694, // inline virtual override (rmres) base (rmres) body + .Memory.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_Memory_rmresCheckMemInterUnmap, // virtual + .__memoryfabricGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_memoryfabricGetMemoryMappingDescriptor, // virtual inherited (mem) base (mem) + .Memory.__memGetMemoryMappingDescriptor__ = &memGetMemoryMappingDescriptor_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor, // virtual + .__memoryfabricCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_memoryfabricCheckCopyPermissions, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckCopyPermissions__ = &memCheckCopyPermissions_ac1694, // inline virtual body + .__memoryfabricIsReady__ = &__nvoc_up_thunk_Memory_memoryfabricIsReady, // virtual inherited (mem) base (mem) + .Memory.__memIsReady__ = &memIsReady_IMPL, // virtual + .__memoryfabricIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_memoryfabricIsGpuMapAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsGpuMapAllowed__ = &memIsGpuMapAllowed_e661f0, // inline virtual body + .__memoryfabricIsExportAllowed__ = &__nvoc_up_thunk_Memory_memoryfabricIsExportAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsExportAllowed__ = &memIsExportAllowed_e661f0, // inline virtual body + .__memoryfabricAccessCallback__ = &__nvoc_up_thunk_RmResource_memoryfabricAccessCallback, // virtual inherited (rmres) base (mem) + .Memory.__memAccessCallback__ = &__nvoc_up_thunk_RmResource_memAccessCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__memoryfabricShareCallback__ = &__nvoc_up_thunk_RmResource_memoryfabricShareCallback, // virtual inherited (rmres) base (mem) + .Memory.__memShareCallback__ = &__nvoc_up_thunk_RmResource_memShareCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__memoryfabricControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memoryfabricControlSerialization_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__memoryfabricControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryfabricControlSerialization_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__memoryfabricControl_Prologue__ = &__nvoc_up_thunk_RmResource_memoryfabricControl_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Prologue__ = &__nvoc_up_thunk_RmResource_memControl_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__memoryfabricControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memoryfabricControl_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memControl_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__memoryfabricPreDestruct__ = &__nvoc_up_thunk_RsResource_memoryfabricPreDestruct, // virtual inherited (res) base (mem) + .Memory.__memPreDestruct__ = &__nvoc_up_thunk_RsResource_memPreDestruct, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__memoryfabricControlFilter__ = &__nvoc_up_thunk_RsResource_memoryfabricControlFilter, // virtual inherited (res) base (mem) + .Memory.__memControlFilter__ = &__nvoc_up_thunk_RsResource_memControlFilter, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__memoryfabricIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memoryfabricIsPartialUnmapSupported, // inline virtual inherited (res) base (mem) body + .Memory.__memIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .Memory.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .Memory.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__memoryfabricMapTo__ = &__nvoc_up_thunk_RsResource_memoryfabricMapTo, // virtual inherited (res) base (mem) + .Memory.__memMapTo__ = &__nvoc_up_thunk_RsResource_memMapTo, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__memoryfabricUnmapFrom__ = &__nvoc_up_thunk_RsResource_memoryfabricUnmapFrom, // virtual inherited (res) base (mem) + .Memory.__memUnmapFrom__ = &__nvoc_up_thunk_RsResource_memUnmapFrom, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__memoryfabricGetRefCount__ = &__nvoc_up_thunk_RsResource_memoryfabricGetRefCount, // virtual inherited (res) base (mem) + .Memory.__memGetRefCount__ = &__nvoc_up_thunk_RsResource_memGetRefCount, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__memoryfabricAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memoryfabricAddAdditionalDependants, // virtual inherited (res) base (mem) + .Memory.__memAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memAddAdditionalDependants, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.Memory.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable = &vtable.Memory.RmResource; // (rmres) super^2 + pThis->__nvoc_base_Memory.__nvoc_vtable = &vtable.Memory; // (mem) super + pThis->__nvoc_vtable = &vtable; // (memoryfabric) this + + // Initialize vtable(s) with 7 per-object function pointer(s). __nvoc_init_funcTable_MemoryFabric_1(pThis); } diff --git a/src/nvidia/generated/g_mem_fabric_nvoc.h b/src/nvidia/generated/g_mem_fabric_nvoc.h index b163a0a49e..c303a4943b 100644 --- a/src/nvidia/generated/g_mem_fabric_nvoc.h +++ b/src/nvidia/generated/g_mem_fabric_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -71,10 +71,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__MemoryFabric; + + struct MemoryFabric { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__MemoryFabric *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; @@ -87,10 +92,7 @@ struct MemoryFabric { struct Memory *__nvoc_pbase_Memory; // mem super struct MemoryFabric *__nvoc_pbase_MemoryFabric; // memoryfabric - // Vtable with 34 per-object function pointers - NvBool (*__memoryfabricCanCopy__)(struct MemoryFabric * /*this*/); // virtual override (res) base (mem) - NV_STATUS (*__memoryfabricCopyConstruct__)(struct MemoryFabric * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); // virtual override (mem) base (mem) - NV_STATUS (*__memoryfabricControl__)(struct MemoryFabric * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (mem) + // Vtable with 7 per-object function pointers NV_STATUS (*__memoryfabricCtrlGetInfo__)(struct MemoryFabric * /*this*/, NV00F8_CTRL_GET_INFO_PARAMS *); // exported (id=0xf80101) NV_STATUS (*__memoryfabricCtrlCmdDescribe__)(struct MemoryFabric * /*this*/, NV00F8_CTRL_DESCRIBE_PARAMS *); // exported (id=0xf80102) NV_STATUS (*__memoryfabricCtrlAttachMem__)(struct MemoryFabric * /*this*/, NV00F8_CTRL_ATTACH_MEM_PARAMS *); // exported (id=0xf80103) @@ -98,6 +100,16 @@ struct MemoryFabric { NV_STATUS (*__memoryfabricCtrlGetNumAttachedMem__)(struct MemoryFabric * /*this*/, NV00F8_CTRL_GET_NUM_ATTACHED_MEM_PARAMS *); // exported (id=0xf80105) NV_STATUS (*__memoryfabricCtrlGetAttachedMem__)(struct MemoryFabric * /*this*/, NV00F8_CTRL_GET_ATTACHED_MEM_PARAMS *); // exported (id=0xf80106) NV_STATUS (*__memoryfabricCtrlGetPageLevelInfo__)(struct MemoryFabric * /*this*/, NV00F8_CTRL_GET_PAGE_LEVEL_INFO_PARAMS *); // exported (id=0xf80107) +}; + + +// Metadata including vtable with 27 function pointers plus superclass metadata +struct NVOC_VTABLE__MemoryFabric { + const struct NVOC_VTABLE__Memory Memory; // (mem) 26 function pointers + + NvBool (*__memoryfabricCanCopy__)(struct MemoryFabric * /*this*/); // virtual override (res) base (mem) + NV_STATUS (*__memoryfabricCopyConstruct__)(struct MemoryFabric * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); // virtual override (mem) base (mem) + NV_STATUS (*__memoryfabricControl__)(struct MemoryFabric * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (mem) NV_STATUS (*__memoryfabricIsDuplicate__)(struct MemoryFabric * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) NV_STATUS (*__memoryfabricGetMapAddrSpace__)(struct MemoryFabric * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (mem) NV_STATUS (*__memoryfabricMap__)(struct MemoryFabric * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (mem) base (mem) @@ -154,11 +166,11 @@ NV_STATUS __nvoc_objCreate_MemoryFabric(MemoryFabric**, Dynamic*, NvU32, CALL_CO // Wrapper macros -#define memoryfabricCanCopy_FNPTR(pMemoryFabric) pMemoryFabric->__memoryfabricCanCopy__ +#define memoryfabricCanCopy_FNPTR(pMemoryFabric) pMemoryFabric->__nvoc_vtable->__memoryfabricCanCopy__ #define memoryfabricCanCopy(pMemoryFabric) memoryfabricCanCopy_DISPATCH(pMemoryFabric) -#define memoryfabricCopyConstruct_FNPTR(pMemoryFabric) pMemoryFabric->__memoryfabricCopyConstruct__ +#define memoryfabricCopyConstruct_FNPTR(pMemoryFabric) pMemoryFabric->__nvoc_vtable->__memoryfabricCopyConstruct__ #define memoryfabricCopyConstruct(pMemoryFabric, pCallContext, pParams) memoryfabricCopyConstruct_DISPATCH(pMemoryFabric, pCallContext, pParams) -#define memoryfabricControl_FNPTR(pMemoryFabric) pMemoryFabric->__memoryfabricControl__ +#define memoryfabricControl_FNPTR(pMemoryFabric) pMemoryFabric->__nvoc_vtable->__memoryfabricControl__ #define memoryfabricControl(pMemoryFabric, pCallContext, pParams) memoryfabricControl_DISPATCH(pMemoryFabric, pCallContext, pParams) #define memoryfabricCtrlGetInfo_FNPTR(pMemoryFabric) pMemoryFabric->__memoryfabricCtrlGetInfo__ #define memoryfabricCtrlGetInfo(pMemoryFabric, pParams) memoryfabricCtrlGetInfo_DISPATCH(pMemoryFabric, pParams) @@ -174,66 +186,66 @@ NV_STATUS __nvoc_objCreate_MemoryFabric(MemoryFabric**, Dynamic*, NvU32, CALL_CO #define memoryfabricCtrlGetAttachedMem(pMemoryFabric, pParams) memoryfabricCtrlGetAttachedMem_DISPATCH(pMemoryFabric, pParams) #define memoryfabricCtrlGetPageLevelInfo_FNPTR(pMemoryFabric) pMemoryFabric->__memoryfabricCtrlGetPageLevelInfo__ #define memoryfabricCtrlGetPageLevelInfo(pMemoryFabric, pParams) memoryfabricCtrlGetPageLevelInfo_DISPATCH(pMemoryFabric, pParams) -#define memoryfabricIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define memoryfabricIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsDuplicate__ #define memoryfabricIsDuplicate(pMemory, hMemory, pDuplicate) memoryfabricIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define memoryfabricGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ +#define memoryfabricGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMapAddrSpace__ #define memoryfabricGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) memoryfabricGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define memoryfabricMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define memoryfabricMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memMap__ #define memoryfabricMap(pMemory, pCallContext, pParams, pCpuMapping) memoryfabricMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define memoryfabricUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ +#define memoryfabricUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memUnmap__ #define memoryfabricUnmap(pMemory, pCallContext, pCpuMapping) memoryfabricUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define memoryfabricGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ +#define memoryfabricGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemInterMapParams__ #define memoryfabricGetMemInterMapParams(pMemory, pParams) memoryfabricGetMemInterMapParams_DISPATCH(pMemory, pParams) -#define memoryfabricCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define memoryfabricCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckMemInterUnmap__ #define memoryfabricCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) memoryfabricCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define memoryfabricGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ +#define memoryfabricGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemoryMappingDescriptor__ #define memoryfabricGetMemoryMappingDescriptor(pMemory, ppMemDesc) memoryfabricGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define memoryfabricCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ +#define memoryfabricCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckCopyPermissions__ #define memoryfabricCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) memoryfabricCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define memoryfabricIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define memoryfabricIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsReady__ #define memoryfabricIsReady(pMemory, bCopyConstructorContext) memoryfabricIsReady_DISPATCH(pMemory, bCopyConstructorContext) -#define memoryfabricIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define memoryfabricIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsGpuMapAllowed__ #define memoryfabricIsGpuMapAllowed(pMemory, pGpu) memoryfabricIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define memoryfabricIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define memoryfabricIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsExportAllowed__ #define memoryfabricIsExportAllowed(pMemory) memoryfabricIsExportAllowed_DISPATCH(pMemory) -#define memoryfabricAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define memoryfabricAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define memoryfabricAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) memoryfabricAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define memoryfabricShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define memoryfabricShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define memoryfabricShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) memoryfabricShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define memoryfabricControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define memoryfabricControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define memoryfabricControlSerialization_Prologue(pResource, pCallContext, pParams) memoryfabricControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define memoryfabricControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define memoryfabricControlSerialization_Epilogue(pResource, pCallContext, pParams) memoryfabricControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define memoryfabricControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define memoryfabricControl_Prologue(pResource, pCallContext, pParams) memoryfabricControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define memoryfabricControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define memoryfabricControl_Epilogue(pResource, pCallContext, pParams) memoryfabricControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define memoryfabricPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define memoryfabricPreDestruct(pResource) memoryfabricPreDestruct_DISPATCH(pResource) -#define memoryfabricControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define memoryfabricControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define memoryfabricControlFilter(pResource, pCallContext, pParams) memoryfabricControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define memoryfabricIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define memoryfabricIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define memoryfabricIsPartialUnmapSupported(pResource) memoryfabricIsPartialUnmapSupported_DISPATCH(pResource) -#define memoryfabricMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define memoryfabricMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define memoryfabricMapTo(pResource, pParams) memoryfabricMapTo_DISPATCH(pResource, pParams) -#define memoryfabricUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define memoryfabricUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define memoryfabricUnmapFrom(pResource, pParams) memoryfabricUnmapFrom_DISPATCH(pResource, pParams) -#define memoryfabricGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define memoryfabricGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define memoryfabricGetRefCount(pResource) memoryfabricGetRefCount_DISPATCH(pResource) -#define memoryfabricAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define memoryfabricAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define memoryfabricAddAdditionalDependants(pClient, pResource, pReference) memoryfabricAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool memoryfabricCanCopy_DISPATCH(struct MemoryFabric *pMemoryFabric) { - return pMemoryFabric->__memoryfabricCanCopy__(pMemoryFabric); + return pMemoryFabric->__nvoc_vtable->__memoryfabricCanCopy__(pMemoryFabric); } static inline NV_STATUS memoryfabricCopyConstruct_DISPATCH(struct MemoryFabric *pMemoryFabric, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { - return pMemoryFabric->__memoryfabricCopyConstruct__(pMemoryFabric, pCallContext, pParams); + return pMemoryFabric->__nvoc_vtable->__memoryfabricCopyConstruct__(pMemoryFabric, pCallContext, pParams); } static inline NV_STATUS memoryfabricControl_DISPATCH(struct MemoryFabric *pMemoryFabric, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemoryFabric->__memoryfabricControl__(pMemoryFabric, pCallContext, pParams); + return pMemoryFabric->__nvoc_vtable->__memoryfabricControl__(pMemoryFabric, pCallContext, pParams); } static inline NV_STATUS memoryfabricCtrlGetInfo_DISPATCH(struct MemoryFabric *pMemoryFabric, NV00F8_CTRL_GET_INFO_PARAMS *pParams) { @@ -265,99 +277,99 @@ static inline NV_STATUS memoryfabricCtrlGetPageLevelInfo_DISPATCH(struct MemoryF } static inline NV_STATUS memoryfabricIsDuplicate_DISPATCH(struct MemoryFabric *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__memoryfabricIsDuplicate__(pMemory, hMemory, pDuplicate); + return pMemory->__nvoc_vtable->__memoryfabricIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS memoryfabricGetMapAddrSpace_DISPATCH(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pMemory->__memoryfabricGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); + return pMemory->__nvoc_vtable->__memoryfabricGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS memoryfabricMap_DISPATCH(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__memoryfabricMap__(pMemory, pCallContext, pParams, pCpuMapping); + return pMemory->__nvoc_vtable->__memoryfabricMap__(pMemory, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS memoryfabricUnmap_DISPATCH(struct MemoryFabric *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__memoryfabricUnmap__(pMemory, pCallContext, pCpuMapping); + return pMemory->__nvoc_vtable->__memoryfabricUnmap__(pMemory, pCallContext, pCpuMapping); } static inline NV_STATUS memoryfabricGetMemInterMapParams_DISPATCH(struct MemoryFabric *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__memoryfabricGetMemInterMapParams__(pMemory, pParams); + return pMemory->__nvoc_vtable->__memoryfabricGetMemInterMapParams__(pMemory, pParams); } static inline NV_STATUS memoryfabricCheckMemInterUnmap_DISPATCH(struct MemoryFabric *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__memoryfabricCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); + return pMemory->__nvoc_vtable->__memoryfabricCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } static inline NV_STATUS memoryfabricGetMemoryMappingDescriptor_DISPATCH(struct MemoryFabric *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__memoryfabricGetMemoryMappingDescriptor__(pMemory, ppMemDesc); + return pMemory->__nvoc_vtable->__memoryfabricGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } static inline NV_STATUS memoryfabricCheckCopyPermissions_DISPATCH(struct MemoryFabric *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__memoryfabricCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); + return pMemory->__nvoc_vtable->__memoryfabricCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } static inline NV_STATUS memoryfabricIsReady_DISPATCH(struct MemoryFabric *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__memoryfabricIsReady__(pMemory, bCopyConstructorContext); + return pMemory->__nvoc_vtable->__memoryfabricIsReady__(pMemory, bCopyConstructorContext); } static inline NvBool memoryfabricIsGpuMapAllowed_DISPATCH(struct MemoryFabric *pMemory, struct OBJGPU *pGpu) { - return pMemory->__memoryfabricIsGpuMapAllowed__(pMemory, pGpu); + return pMemory->__nvoc_vtable->__memoryfabricIsGpuMapAllowed__(pMemory, pGpu); } static inline NvBool memoryfabricIsExportAllowed_DISPATCH(struct MemoryFabric *pMemory) { - return pMemory->__memoryfabricIsExportAllowed__(pMemory); + return pMemory->__nvoc_vtable->__memoryfabricIsExportAllowed__(pMemory); } static inline NvBool memoryfabricAccessCallback_DISPATCH(struct MemoryFabric *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__memoryfabricAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__memoryfabricAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool memoryfabricShareCallback_DISPATCH(struct MemoryFabric *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__memoryfabricShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__memoryfabricShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS memoryfabricControlSerialization_Prologue_DISPATCH(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memoryfabricControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memoryfabricControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void memoryfabricControlSerialization_Epilogue_DISPATCH(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memoryfabricControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__memoryfabricControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS memoryfabricControl_Prologue_DISPATCH(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memoryfabricControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memoryfabricControl_Prologue__(pResource, pCallContext, pParams); } static inline void memoryfabricControl_Epilogue_DISPATCH(struct MemoryFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memoryfabricControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__memoryfabricControl_Epilogue__(pResource, pCallContext, pParams); } static inline void memoryfabricPreDestruct_DISPATCH(struct MemoryFabric *pResource) { - pResource->__memoryfabricPreDestruct__(pResource); + pResource->__nvoc_vtable->__memoryfabricPreDestruct__(pResource); } static inline NV_STATUS memoryfabricControlFilter_DISPATCH(struct MemoryFabric *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memoryfabricControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memoryfabricControlFilter__(pResource, pCallContext, pParams); } static inline NvBool memoryfabricIsPartialUnmapSupported_DISPATCH(struct MemoryFabric *pResource) { - return pResource->__memoryfabricIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__memoryfabricIsPartialUnmapSupported__(pResource); } static inline NV_STATUS memoryfabricMapTo_DISPATCH(struct MemoryFabric *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__memoryfabricMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__memoryfabricMapTo__(pResource, pParams); } static inline NV_STATUS memoryfabricUnmapFrom_DISPATCH(struct MemoryFabric *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__memoryfabricUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__memoryfabricUnmapFrom__(pResource, pParams); } static inline NvU32 memoryfabricGetRefCount_DISPATCH(struct MemoryFabric *pResource) { - return pResource->__memoryfabricGetRefCount__(pResource); + return pResource->__nvoc_vtable->__memoryfabricGetRefCount__(pResource); } static inline void memoryfabricAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryFabric *pResource, RsResourceRef *pReference) { - pResource->__memoryfabricAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__memoryfabricAddAdditionalDependants__(pClient, pResource, pReference); } NvBool memoryfabricCanCopy_IMPL(struct MemoryFabric *pMemoryFabric); diff --git a/src/nvidia/generated/g_mem_list_nvoc.c b/src/nvidia/generated/g_mem_list_nvoc.c index d36cbd66c1..d6e9649ea1 100644 --- a/src/nvidia/generated/g_mem_list_nvoc.c +++ b/src/nvidia/generated/g_mem_list_nvoc.c @@ -93,138 +93,207 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryList = /*pExportInfo=*/ &__nvoc_export_info_MemoryList }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super +NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super +NvBool __nvoc_down_thunk_MemoryList_resCanCopy(struct RsResource *pMemoryList); // this + // 1 down-thunk(s) defined to bridge methods in MemoryList from superclasses // memlistCanCopy: virtual override (res) base (mem) -static NvBool __nvoc_down_thunk_MemoryList_resCanCopy(struct RsResource *pMemoryList) { +NvBool __nvoc_down_thunk_MemoryList_resCanCopy(struct RsResource *pMemoryList) { return memlistCanCopy((struct MemoryList *)(((unsigned char *) pMemoryList) - __nvoc_rtti_MemoryList_RsResource.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_Memory_memlistIsDuplicate(struct MemoryList *pMemory, NvHandle hMemory, NvBool *pDuplicate); // this +NV_STATUS __nvoc_up_thunk_Memory_memlistGetMapAddrSpace(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_Memory_memlistControl(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_memlistMap(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_memlistUnmap(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_memlistGetMemInterMapParams(struct MemoryList *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_memlistCheckMemInterUnmap(struct MemoryList *pMemory, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_Memory_memlistGetMemoryMappingDescriptor(struct MemoryList *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_Memory_memlistCheckCopyPermissions(struct MemoryList *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // this +NV_STATUS __nvoc_up_thunk_Memory_memlistIsReady(struct MemoryList *pMemory, NvBool bCopyConstructorContext); // this +NvBool __nvoc_up_thunk_Memory_memlistIsGpuMapAllowed(struct MemoryList *pMemory, struct OBJGPU *pGpu); // this +NvBool __nvoc_up_thunk_Memory_memlistIsExportAllowed(struct MemoryList *pMemory); // this +NvBool __nvoc_up_thunk_RmResource_memlistAccessCallback(struct MemoryList *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_memlistShareCallback(struct MemoryList *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_memlistControlSerialization_Prologue(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_memlistControlSerialization_Epilogue(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_memlistControl_Prologue(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_memlistControl_Epilogue(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RsResource_memlistPreDestruct(struct MemoryList *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_memlistControlFilter(struct MemoryList *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_memlistIsPartialUnmapSupported(struct MemoryList *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_memlistMapTo(struct MemoryList *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_memlistUnmapFrom(struct MemoryList *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_memlistGetRefCount(struct MemoryList *pResource); // this +void __nvoc_up_thunk_RsResource_memlistAddAdditionalDependants(struct RsClient *pClient, struct MemoryList *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in MemoryList to superclasses // memlistIsDuplicate: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memlistIsDuplicate(struct MemoryList *pMemory, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_Memory_memlistIsDuplicate(struct MemoryList *pMemory, NvHandle hMemory, NvBool *pDuplicate) { return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset), hMemory, pDuplicate); } // memlistGetMapAddrSpace: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memlistGetMapAddrSpace(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_Memory_memlistGetMapAddrSpace(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset), pCallContext, mapFlags, pAddrSpace); } // memlistControl: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memlistControl(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_memlistControl(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset), pCallContext, pParams); } // memlistMap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memlistMap(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_memlistMap(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset), pCallContext, pParams, pCpuMapping); } // memlistUnmap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memlistUnmap(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_memlistUnmap(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset), pCallContext, pCpuMapping); } // memlistGetMemInterMapParams: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memlistGetMemInterMapParams(struct MemoryList *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_memlistGetMemInterMapParams(struct MemoryList *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset), pParams); } // memlistCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_memlistCheckMemInterUnmap(struct MemoryList *pMemory, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_Memory_memlistCheckMemInterUnmap(struct MemoryList *pMemory, NvBool bSubdeviceHandleProvided) { return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset), bSubdeviceHandleProvided); } // memlistGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memlistGetMemoryMappingDescriptor(struct MemoryList *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_Memory_memlistGetMemoryMappingDescriptor(struct MemoryList *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset), ppMemDesc); } // memlistCheckCopyPermissions: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_memlistCheckCopyPermissions(struct MemoryList *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { +NV_STATUS __nvoc_up_thunk_Memory_memlistCheckCopyPermissions(struct MemoryList *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset), pDstGpu, pDstDevice); } // memlistIsReady: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memlistIsReady(struct MemoryList *pMemory, NvBool bCopyConstructorContext) { +NV_STATUS __nvoc_up_thunk_Memory_memlistIsReady(struct MemoryList *pMemory, NvBool bCopyConstructorContext) { return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset), bCopyConstructorContext); } // memlistIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_memlistIsGpuMapAllowed(struct MemoryList *pMemory, struct OBJGPU *pGpu) { +NvBool __nvoc_up_thunk_Memory_memlistIsGpuMapAllowed(struct MemoryList *pMemory, struct OBJGPU *pGpu) { return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset), pGpu); } // memlistIsExportAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_memlistIsExportAllowed(struct MemoryList *pMemory) { +NvBool __nvoc_up_thunk_Memory_memlistIsExportAllowed(struct MemoryList *pMemory) { return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryList_Memory.offset)); } // memlistAccessCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_memlistAccessCallback(struct MemoryList *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_memlistAccessCallback(struct MemoryList *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // memlistShareCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_memlistShareCallback(struct MemoryList *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_memlistShareCallback(struct MemoryList *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // memlistControlSerialization_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_memlistControlSerialization_Prologue(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_memlistControlSerialization_Prologue(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RmResource.offset), pCallContext, pParams); } // memlistControlSerialization_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_memlistControlSerialization_Epilogue(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_memlistControlSerialization_Epilogue(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RmResource.offset), pCallContext, pParams); } // memlistControl_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_memlistControl_Prologue(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_memlistControl_Prologue(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RmResource.offset), pCallContext, pParams); } // memlistControl_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_memlistControl_Epilogue(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_memlistControl_Epilogue(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RmResource.offset), pCallContext, pParams); } // memlistPreDestruct: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_memlistPreDestruct(struct MemoryList *pResource) { +void __nvoc_up_thunk_RsResource_memlistPreDestruct(struct MemoryList *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RsResource.offset)); } // memlistControlFilter: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_memlistControlFilter(struct MemoryList *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memlistControlFilter(struct MemoryList *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RsResource.offset), pCallContext, pParams); } // memlistIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body -static NvBool __nvoc_up_thunk_RsResource_memlistIsPartialUnmapSupported(struct MemoryList *pResource) { +NvBool __nvoc_up_thunk_RsResource_memlistIsPartialUnmapSupported(struct MemoryList *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RsResource.offset)); } // memlistMapTo: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_memlistMapTo(struct MemoryList *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memlistMapTo(struct MemoryList *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RsResource.offset), pParams); } // memlistUnmapFrom: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_memlistUnmapFrom(struct MemoryList *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memlistUnmapFrom(struct MemoryList *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RsResource.offset), pParams); } // memlistGetRefCount: virtual inherited (res) base (mem) -static NvU32 __nvoc_up_thunk_RsResource_memlistGetRefCount(struct MemoryList *pResource) { +NvU32 __nvoc_up_thunk_RsResource_memlistGetRefCount(struct MemoryList *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RsResource.offset)); } // memlistAddAdditionalDependants: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_memlistAddAdditionalDependants(struct RsClient *pClient, struct MemoryList *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_memlistAddAdditionalDependants(struct RsClient *pClient, struct MemoryList *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryList_RsResource.offset), pReference); } @@ -267,92 +336,112 @@ NV_STATUS __nvoc_ctor_MemoryList(MemoryList *pThis, CALL_CONTEXT * arg_pCallCont // Vtable initialization static void __nvoc_init_funcTable_MemoryList_1(MemoryList *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // memlistCanCopy -- virtual override (res) base (mem) - pThis->__memlistCanCopy__ = &memlistCanCopy_IMPL; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_MemoryList_resCanCopy; - - // memlistIsDuplicate -- virtual inherited (mem) base (mem) - pThis->__memlistIsDuplicate__ = &__nvoc_up_thunk_Memory_memlistIsDuplicate; - - // memlistGetMapAddrSpace -- virtual inherited (mem) base (mem) - pThis->__memlistGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_memlistGetMapAddrSpace; - - // memlistControl -- virtual inherited (mem) base (mem) - pThis->__memlistControl__ = &__nvoc_up_thunk_Memory_memlistControl; - - // memlistMap -- virtual inherited (mem) base (mem) - pThis->__memlistMap__ = &__nvoc_up_thunk_Memory_memlistMap; - - // memlistUnmap -- virtual inherited (mem) base (mem) - pThis->__memlistUnmap__ = &__nvoc_up_thunk_Memory_memlistUnmap; - - // memlistGetMemInterMapParams -- virtual inherited (mem) base (mem) - pThis->__memlistGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_memlistGetMemInterMapParams; - - // memlistCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body - pThis->__memlistCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_memlistCheckMemInterUnmap; - - // memlistGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) - pThis->__memlistGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_memlistGetMemoryMappingDescriptor; - - // memlistCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body - pThis->__memlistCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_memlistCheckCopyPermissions; - - // memlistIsReady -- virtual inherited (mem) base (mem) - pThis->__memlistIsReady__ = &__nvoc_up_thunk_Memory_memlistIsReady; - - // memlistIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__memlistIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_memlistIsGpuMapAllowed; - - // memlistIsExportAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__memlistIsExportAllowed__ = &__nvoc_up_thunk_Memory_memlistIsExportAllowed; - - // memlistAccessCallback -- virtual inherited (rmres) base (mem) - pThis->__memlistAccessCallback__ = &__nvoc_up_thunk_RmResource_memlistAccessCallback; - - // memlistShareCallback -- virtual inherited (rmres) base (mem) - pThis->__memlistShareCallback__ = &__nvoc_up_thunk_RmResource_memlistShareCallback; - - // memlistControlSerialization_Prologue -- virtual inherited (rmres) base (mem) - pThis->__memlistControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memlistControlSerialization_Prologue; - - // memlistControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__memlistControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memlistControlSerialization_Epilogue; - - // memlistControl_Prologue -- virtual inherited (rmres) base (mem) - pThis->__memlistControl_Prologue__ = &__nvoc_up_thunk_RmResource_memlistControl_Prologue; - - // memlistControl_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__memlistControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memlistControl_Epilogue; - - // memlistPreDestruct -- virtual inherited (res) base (mem) - pThis->__memlistPreDestruct__ = &__nvoc_up_thunk_RsResource_memlistPreDestruct; - - // memlistControlFilter -- virtual inherited (res) base (mem) - pThis->__memlistControlFilter__ = &__nvoc_up_thunk_RsResource_memlistControlFilter; - - // memlistIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body - pThis->__memlistIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memlistIsPartialUnmapSupported; - - // memlistMapTo -- virtual inherited (res) base (mem) - pThis->__memlistMapTo__ = &__nvoc_up_thunk_RsResource_memlistMapTo; - - // memlistUnmapFrom -- virtual inherited (res) base (mem) - pThis->__memlistUnmapFrom__ = &__nvoc_up_thunk_RsResource_memlistUnmapFrom; - - // memlistGetRefCount -- virtual inherited (res) base (mem) - pThis->__memlistGetRefCount__ = &__nvoc_up_thunk_RsResource_memlistGetRefCount; - - // memlistAddAdditionalDependants -- virtual inherited (res) base (mem) - pThis->__memlistAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memlistAddAdditionalDependants; -} // End __nvoc_init_funcTable_MemoryList_1 with approximately 27 basic block(s). +} // End __nvoc_init_funcTable_MemoryList_1 // Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_MemoryList(MemoryList *pThis) { - // Initialize vtable(s) with 26 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__MemoryList vtable = { + .__memlistCanCopy__ = &memlistCanCopy_IMPL, // virtual override (res) base (mem) + .Memory.__memCanCopy__ = &__nvoc_up_thunk_RsResource_memCanCopy, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_MemoryList_resCanCopy, // virtual + .__memlistIsDuplicate__ = &__nvoc_up_thunk_Memory_memlistIsDuplicate, // virtual inherited (mem) base (mem) + .Memory.__memIsDuplicate__ = &memIsDuplicate_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resIsDuplicate__ = &__nvoc_down_thunk_Memory_resIsDuplicate, // virtual + .__memlistGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_memlistGetMapAddrSpace, // virtual inherited (mem) base (mem) + .Memory.__memGetMapAddrSpace__ = &memGetMapAddrSpace_IMPL, // virtual + .__memlistControl__ = &__nvoc_up_thunk_Memory_memlistControl, // virtual inherited (mem) base (mem) + .Memory.__memControl__ = &memControl_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_Memory_resControl, // virtual + .__memlistMap__ = &__nvoc_up_thunk_Memory_memlistMap, // virtual inherited (mem) base (mem) + .Memory.__memMap__ = &memMap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_Memory_resMap, // virtual + .__memlistUnmap__ = &__nvoc_up_thunk_Memory_memlistUnmap, // virtual inherited (mem) base (mem) + .Memory.__memUnmap__ = &memUnmap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_Memory_resUnmap, // virtual + .__memlistGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_memlistGetMemInterMapParams, // virtual inherited (mem) base (mem) + .Memory.__memGetMemInterMapParams__ = &memGetMemInterMapParams_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_Memory_rmresGetMemInterMapParams, // virtual + .__memlistCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_memlistCheckMemInterUnmap, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckMemInterUnmap__ = &memCheckMemInterUnmap_ac1694, // inline virtual override (rmres) base (rmres) body + .Memory.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_Memory_rmresCheckMemInterUnmap, // virtual + .__memlistGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_memlistGetMemoryMappingDescriptor, // virtual inherited (mem) base (mem) + .Memory.__memGetMemoryMappingDescriptor__ = &memGetMemoryMappingDescriptor_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor, // virtual + .__memlistCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_memlistCheckCopyPermissions, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckCopyPermissions__ = &memCheckCopyPermissions_ac1694, // inline virtual body + .__memlistIsReady__ = &__nvoc_up_thunk_Memory_memlistIsReady, // virtual inherited (mem) base (mem) + .Memory.__memIsReady__ = &memIsReady_IMPL, // virtual + .__memlistIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_memlistIsGpuMapAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsGpuMapAllowed__ = &memIsGpuMapAllowed_e661f0, // inline virtual body + .__memlistIsExportAllowed__ = &__nvoc_up_thunk_Memory_memlistIsExportAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsExportAllowed__ = &memIsExportAllowed_e661f0, // inline virtual body + .__memlistAccessCallback__ = &__nvoc_up_thunk_RmResource_memlistAccessCallback, // virtual inherited (rmres) base (mem) + .Memory.__memAccessCallback__ = &__nvoc_up_thunk_RmResource_memAccessCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__memlistShareCallback__ = &__nvoc_up_thunk_RmResource_memlistShareCallback, // virtual inherited (rmres) base (mem) + .Memory.__memShareCallback__ = &__nvoc_up_thunk_RmResource_memShareCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__memlistControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memlistControlSerialization_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__memlistControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memlistControlSerialization_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__memlistControl_Prologue__ = &__nvoc_up_thunk_RmResource_memlistControl_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Prologue__ = &__nvoc_up_thunk_RmResource_memControl_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__memlistControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memlistControl_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memControl_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__memlistPreDestruct__ = &__nvoc_up_thunk_RsResource_memlistPreDestruct, // virtual inherited (res) base (mem) + .Memory.__memPreDestruct__ = &__nvoc_up_thunk_RsResource_memPreDestruct, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__memlistControlFilter__ = &__nvoc_up_thunk_RsResource_memlistControlFilter, // virtual inherited (res) base (mem) + .Memory.__memControlFilter__ = &__nvoc_up_thunk_RsResource_memControlFilter, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__memlistIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memlistIsPartialUnmapSupported, // inline virtual inherited (res) base (mem) body + .Memory.__memIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .Memory.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .Memory.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__memlistMapTo__ = &__nvoc_up_thunk_RsResource_memlistMapTo, // virtual inherited (res) base (mem) + .Memory.__memMapTo__ = &__nvoc_up_thunk_RsResource_memMapTo, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__memlistUnmapFrom__ = &__nvoc_up_thunk_RsResource_memlistUnmapFrom, // virtual inherited (res) base (mem) + .Memory.__memUnmapFrom__ = &__nvoc_up_thunk_RsResource_memUnmapFrom, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__memlistGetRefCount__ = &__nvoc_up_thunk_RsResource_memlistGetRefCount, // virtual inherited (res) base (mem) + .Memory.__memGetRefCount__ = &__nvoc_up_thunk_RsResource_memGetRefCount, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__memlistAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memlistAddAdditionalDependants, // virtual inherited (res) base (mem) + .Memory.__memAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memAddAdditionalDependants, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.Memory.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable = &vtable.Memory.RmResource; // (rmres) super^2 + pThis->__nvoc_base_Memory.__nvoc_vtable = &vtable.Memory; // (mem) super + pThis->__nvoc_vtable = &vtable; // (memlist) this __nvoc_init_funcTable_MemoryList_1(pThis); } diff --git a/src/nvidia/generated/g_mem_list_nvoc.h b/src/nvidia/generated/g_mem_list_nvoc.h index 4234805cbd..da8ad46a54 100644 --- a/src/nvidia/generated/g_mem_list_nvoc.h +++ b/src/nvidia/generated/g_mem_list_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -59,10 +59,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__MemoryList; + + struct MemoryList { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__MemoryList *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; @@ -74,8 +79,13 @@ struct MemoryList { struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 struct Memory *__nvoc_pbase_Memory; // mem super struct MemoryList *__nvoc_pbase_MemoryList; // memlist +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__MemoryList { + const struct NVOC_VTABLE__Memory Memory; // (mem) 26 function pointers - // Vtable with 26 per-object function pointers NvBool (*__memlistCanCopy__)(struct MemoryList * /*this*/); // virtual override (res) base (mem) NV_STATUS (*__memlistIsDuplicate__)(struct MemoryList * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) NV_STATUS (*__memlistGetMapAddrSpace__)(struct MemoryList * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (mem) @@ -134,162 +144,162 @@ NV_STATUS __nvoc_objCreate_MemoryList(MemoryList**, Dynamic*, NvU32, CALL_CONTEX // Wrapper macros -#define memlistCanCopy_FNPTR(pMemoryList) pMemoryList->__memlistCanCopy__ +#define memlistCanCopy_FNPTR(pMemoryList) pMemoryList->__nvoc_vtable->__memlistCanCopy__ #define memlistCanCopy(pMemoryList) memlistCanCopy_DISPATCH(pMemoryList) -#define memlistIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define memlistIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsDuplicate__ #define memlistIsDuplicate(pMemory, hMemory, pDuplicate) memlistIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define memlistGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ +#define memlistGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMapAddrSpace__ #define memlistGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) memlistGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define memlistControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ +#define memlistControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memControl__ #define memlistControl(pMemory, pCallContext, pParams) memlistControl_DISPATCH(pMemory, pCallContext, pParams) -#define memlistMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define memlistMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memMap__ #define memlistMap(pMemory, pCallContext, pParams, pCpuMapping) memlistMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define memlistUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ +#define memlistUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memUnmap__ #define memlistUnmap(pMemory, pCallContext, pCpuMapping) memlistUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define memlistGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ +#define memlistGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemInterMapParams__ #define memlistGetMemInterMapParams(pMemory, pParams) memlistGetMemInterMapParams_DISPATCH(pMemory, pParams) -#define memlistCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define memlistCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckMemInterUnmap__ #define memlistCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) memlistCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define memlistGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ +#define memlistGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemoryMappingDescriptor__ #define memlistGetMemoryMappingDescriptor(pMemory, ppMemDesc) memlistGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define memlistCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ +#define memlistCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckCopyPermissions__ #define memlistCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) memlistCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define memlistIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define memlistIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsReady__ #define memlistIsReady(pMemory, bCopyConstructorContext) memlistIsReady_DISPATCH(pMemory, bCopyConstructorContext) -#define memlistIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define memlistIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsGpuMapAllowed__ #define memlistIsGpuMapAllowed(pMemory, pGpu) memlistIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define memlistIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define memlistIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsExportAllowed__ #define memlistIsExportAllowed(pMemory) memlistIsExportAllowed_DISPATCH(pMemory) -#define memlistAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define memlistAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define memlistAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) memlistAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define memlistShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define memlistShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define memlistShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) memlistShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define memlistControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define memlistControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define memlistControlSerialization_Prologue(pResource, pCallContext, pParams) memlistControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define memlistControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define memlistControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define memlistControlSerialization_Epilogue(pResource, pCallContext, pParams) memlistControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memlistControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define memlistControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define memlistControl_Prologue(pResource, pCallContext, pParams) memlistControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define memlistControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define memlistControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define memlistControl_Epilogue(pResource, pCallContext, pParams) memlistControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memlistPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define memlistPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define memlistPreDestruct(pResource) memlistPreDestruct_DISPATCH(pResource) -#define memlistControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define memlistControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define memlistControlFilter(pResource, pCallContext, pParams) memlistControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define memlistIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define memlistIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define memlistIsPartialUnmapSupported(pResource) memlistIsPartialUnmapSupported_DISPATCH(pResource) -#define memlistMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define memlistMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define memlistMapTo(pResource, pParams) memlistMapTo_DISPATCH(pResource, pParams) -#define memlistUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define memlistUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define memlistUnmapFrom(pResource, pParams) memlistUnmapFrom_DISPATCH(pResource, pParams) -#define memlistGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define memlistGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define memlistGetRefCount(pResource) memlistGetRefCount_DISPATCH(pResource) -#define memlistAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define memlistAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define memlistAddAdditionalDependants(pClient, pResource, pReference) memlistAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool memlistCanCopy_DISPATCH(struct MemoryList *pMemoryList) { - return pMemoryList->__memlistCanCopy__(pMemoryList); + return pMemoryList->__nvoc_vtable->__memlistCanCopy__(pMemoryList); } static inline NV_STATUS memlistIsDuplicate_DISPATCH(struct MemoryList *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__memlistIsDuplicate__(pMemory, hMemory, pDuplicate); + return pMemory->__nvoc_vtable->__memlistIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS memlistGetMapAddrSpace_DISPATCH(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pMemory->__memlistGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); + return pMemory->__nvoc_vtable->__memlistGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS memlistControl_DISPATCH(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__memlistControl__(pMemory, pCallContext, pParams); + return pMemory->__nvoc_vtable->__memlistControl__(pMemory, pCallContext, pParams); } static inline NV_STATUS memlistMap_DISPATCH(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__memlistMap__(pMemory, pCallContext, pParams, pCpuMapping); + return pMemory->__nvoc_vtable->__memlistMap__(pMemory, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS memlistUnmap_DISPATCH(struct MemoryList *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__memlistUnmap__(pMemory, pCallContext, pCpuMapping); + return pMemory->__nvoc_vtable->__memlistUnmap__(pMemory, pCallContext, pCpuMapping); } static inline NV_STATUS memlistGetMemInterMapParams_DISPATCH(struct MemoryList *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__memlistGetMemInterMapParams__(pMemory, pParams); + return pMemory->__nvoc_vtable->__memlistGetMemInterMapParams__(pMemory, pParams); } static inline NV_STATUS memlistCheckMemInterUnmap_DISPATCH(struct MemoryList *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__memlistCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); + return pMemory->__nvoc_vtable->__memlistCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } static inline NV_STATUS memlistGetMemoryMappingDescriptor_DISPATCH(struct MemoryList *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__memlistGetMemoryMappingDescriptor__(pMemory, ppMemDesc); + return pMemory->__nvoc_vtable->__memlistGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } static inline NV_STATUS memlistCheckCopyPermissions_DISPATCH(struct MemoryList *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__memlistCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); + return pMemory->__nvoc_vtable->__memlistCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } static inline NV_STATUS memlistIsReady_DISPATCH(struct MemoryList *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__memlistIsReady__(pMemory, bCopyConstructorContext); + return pMemory->__nvoc_vtable->__memlistIsReady__(pMemory, bCopyConstructorContext); } static inline NvBool memlistIsGpuMapAllowed_DISPATCH(struct MemoryList *pMemory, struct OBJGPU *pGpu) { - return pMemory->__memlistIsGpuMapAllowed__(pMemory, pGpu); + return pMemory->__nvoc_vtable->__memlistIsGpuMapAllowed__(pMemory, pGpu); } static inline NvBool memlistIsExportAllowed_DISPATCH(struct MemoryList *pMemory) { - return pMemory->__memlistIsExportAllowed__(pMemory); + return pMemory->__nvoc_vtable->__memlistIsExportAllowed__(pMemory); } static inline NvBool memlistAccessCallback_DISPATCH(struct MemoryList *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__memlistAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__memlistAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool memlistShareCallback_DISPATCH(struct MemoryList *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__memlistShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__memlistShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS memlistControlSerialization_Prologue_DISPATCH(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memlistControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memlistControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void memlistControlSerialization_Epilogue_DISPATCH(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memlistControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__memlistControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS memlistControl_Prologue_DISPATCH(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memlistControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memlistControl_Prologue__(pResource, pCallContext, pParams); } static inline void memlistControl_Epilogue_DISPATCH(struct MemoryList *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memlistControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__memlistControl_Epilogue__(pResource, pCallContext, pParams); } static inline void memlistPreDestruct_DISPATCH(struct MemoryList *pResource) { - pResource->__memlistPreDestruct__(pResource); + pResource->__nvoc_vtable->__memlistPreDestruct__(pResource); } static inline NV_STATUS memlistControlFilter_DISPATCH(struct MemoryList *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memlistControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memlistControlFilter__(pResource, pCallContext, pParams); } static inline NvBool memlistIsPartialUnmapSupported_DISPATCH(struct MemoryList *pResource) { - return pResource->__memlistIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__memlistIsPartialUnmapSupported__(pResource); } static inline NV_STATUS memlistMapTo_DISPATCH(struct MemoryList *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__memlistMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__memlistMapTo__(pResource, pParams); } static inline NV_STATUS memlistUnmapFrom_DISPATCH(struct MemoryList *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__memlistUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__memlistUnmapFrom__(pResource, pParams); } static inline NvU32 memlistGetRefCount_DISPATCH(struct MemoryList *pResource) { - return pResource->__memlistGetRefCount__(pResource); + return pResource->__nvoc_vtable->__memlistGetRefCount__(pResource); } static inline void memlistAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryList *pResource, RsResourceRef *pReference) { - pResource->__memlistAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__memlistAddAdditionalDependants__(pClient, pResource, pReference); } NvBool memlistCanCopy_IMPL(struct MemoryList *pMemoryList); diff --git a/src/nvidia/generated/g_mem_mapper_nvoc.c b/src/nvidia/generated/g_mem_mapper_nvoc.c index d2c1c305ed..267aa56dc8 100644 --- a/src/nvidia/generated/g_mem_mapper_nvoc.c +++ b/src/nvidia/generated/g_mem_mapper_nvoc.c @@ -132,130 +132,198 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryMa }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_memmapperControl(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_memmapperMap(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_memmapperUnmap(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_memmapperShareCallback(struct MemoryMapper *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_memmapperGetRegBaseOffsetAndSize(struct MemoryMapper *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_memmapperGetMapAddrSpace(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_memmapperInternalControlForward(struct MemoryMapper *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_memmapperGetInternalObjectHandle(struct MemoryMapper *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_memmapperAccessCallback(struct MemoryMapper *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_memmapperGetMemInterMapParams(struct MemoryMapper *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_memmapperCheckMemInterUnmap(struct MemoryMapper *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_memmapperGetMemoryMappingDescriptor(struct MemoryMapper *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_memmapperControlSerialization_Prologue(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_memmapperControlSerialization_Epilogue(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_memmapperControl_Prologue(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_memmapperControl_Epilogue(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_memmapperCanCopy(struct MemoryMapper *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_memmapperIsDuplicate(struct MemoryMapper *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_memmapperPreDestruct(struct MemoryMapper *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_memmapperControlFilter(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_memmapperIsPartialUnmapSupported(struct MemoryMapper *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_memmapperMapTo(struct MemoryMapper *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_memmapperUnmapFrom(struct MemoryMapper *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_memmapperGetRefCount(struct MemoryMapper *pResource); // this +void __nvoc_up_thunk_RsResource_memmapperAddAdditionalDependants(struct RsClient *pClient, struct MemoryMapper *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in MemoryMapper to superclasses // memmapperControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_memmapperControl(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_memmapperControl(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset), pCallContext, pParams); } // memmapperMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_memmapperMap(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_memmapperMap(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // memmapperUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_memmapperUnmap(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_memmapperUnmap(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset), pCallContext, pCpuMapping); } // memmapperShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_memmapperShareCallback(struct MemoryMapper *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_memmapperShareCallback(struct MemoryMapper *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // memmapperGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_memmapperGetRegBaseOffsetAndSize(struct MemoryMapper *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_memmapperGetRegBaseOffsetAndSize(struct MemoryMapper *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset), pGpu, pOffset, pSize); } // memmapperGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_memmapperGetMapAddrSpace(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_memmapperGetMapAddrSpace(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // memmapperInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_memmapperInternalControlForward(struct MemoryMapper *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_memmapperInternalControlForward(struct MemoryMapper *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset), command, pParams, size); } // memmapperGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_memmapperGetInternalObjectHandle(struct MemoryMapper *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_memmapperGetInternalObjectHandle(struct MemoryMapper *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MemoryMapper_GpuResource.offset)); } // memmapperAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_memmapperAccessCallback(struct MemoryMapper *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_memmapperAccessCallback(struct MemoryMapper *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // memmapperGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_memmapperGetMemInterMapParams(struct MemoryMapper *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_memmapperGetMemInterMapParams(struct MemoryMapper *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), pParams); } // memmapperCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_memmapperCheckMemInterUnmap(struct MemoryMapper *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_memmapperCheckMemInterUnmap(struct MemoryMapper *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), bSubdeviceHandleProvided); } // memmapperGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_memmapperGetMemoryMappingDescriptor(struct MemoryMapper *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_memmapperGetMemoryMappingDescriptor(struct MemoryMapper *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), ppMemDesc); } // memmapperControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_memmapperControlSerialization_Prologue(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_memmapperControlSerialization_Prologue(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), pCallContext, pParams); } // memmapperControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_memmapperControlSerialization_Epilogue(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_memmapperControlSerialization_Epilogue(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), pCallContext, pParams); } // memmapperControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_memmapperControl_Prologue(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_memmapperControl_Prologue(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), pCallContext, pParams); } // memmapperControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_memmapperControl_Epilogue(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_memmapperControl_Epilogue(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RmResource.offset), pCallContext, pParams); } // memmapperCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_memmapperCanCopy(struct MemoryMapper *pResource) { +NvBool __nvoc_up_thunk_RsResource_memmapperCanCopy(struct MemoryMapper *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset)); } // memmapperIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_memmapperIsDuplicate(struct MemoryMapper *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_memmapperIsDuplicate(struct MemoryMapper *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset), hMemory, pDuplicate); } // memmapperPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_memmapperPreDestruct(struct MemoryMapper *pResource) { +void __nvoc_up_thunk_RsResource_memmapperPreDestruct(struct MemoryMapper *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset)); } // memmapperControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_memmapperControlFilter(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memmapperControlFilter(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset), pCallContext, pParams); } // memmapperIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_memmapperIsPartialUnmapSupported(struct MemoryMapper *pResource) { +NvBool __nvoc_up_thunk_RsResource_memmapperIsPartialUnmapSupported(struct MemoryMapper *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset)); } // memmapperMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_memmapperMapTo(struct MemoryMapper *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memmapperMapTo(struct MemoryMapper *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset), pParams); } // memmapperUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_memmapperUnmapFrom(struct MemoryMapper *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memmapperUnmapFrom(struct MemoryMapper *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset), pParams); } // memmapperGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_memmapperGetRefCount(struct MemoryMapper *pResource) { +NvU32 __nvoc_up_thunk_RsResource_memmapperGetRefCount(struct MemoryMapper *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset)); } // memmapperAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_memmapperAddAdditionalDependants(struct RsClient *pClient, struct MemoryMapper *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_memmapperAddAdditionalDependants(struct RsClient *pClient, struct MemoryMapper *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMapper_RsResource.offset), pReference); } @@ -309,88 +377,116 @@ static void __nvoc_init_funcTable_MemoryMapper_1(MemoryMapper *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__memmapperCtrlCmdResizeQueue__ = &memmapperCtrlCmdResizeQueue_IMPL; #endif - - // memmapperControl -- virtual inherited (gpures) base (gpures) - pThis->__memmapperControl__ = &__nvoc_up_thunk_GpuResource_memmapperControl; - - // memmapperMap -- virtual inherited (gpures) base (gpures) - pThis->__memmapperMap__ = &__nvoc_up_thunk_GpuResource_memmapperMap; - - // memmapperUnmap -- virtual inherited (gpures) base (gpures) - pThis->__memmapperUnmap__ = &__nvoc_up_thunk_GpuResource_memmapperUnmap; - - // memmapperShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__memmapperShareCallback__ = &__nvoc_up_thunk_GpuResource_memmapperShareCallback; - - // memmapperGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__memmapperGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_memmapperGetRegBaseOffsetAndSize; - - // memmapperGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__memmapperGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_memmapperGetMapAddrSpace; - - // memmapperInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__memmapperInternalControlForward__ = &__nvoc_up_thunk_GpuResource_memmapperInternalControlForward; - - // memmapperGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__memmapperGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_memmapperGetInternalObjectHandle; - - // memmapperAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__memmapperAccessCallback__ = &__nvoc_up_thunk_RmResource_memmapperAccessCallback; - - // memmapperGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__memmapperGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_memmapperGetMemInterMapParams; - - // memmapperCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__memmapperCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_memmapperCheckMemInterUnmap; - - // memmapperGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__memmapperGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_memmapperGetMemoryMappingDescriptor; - - // memmapperControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__memmapperControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memmapperControlSerialization_Prologue; - - // memmapperControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__memmapperControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memmapperControlSerialization_Epilogue; - - // memmapperControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__memmapperControl_Prologue__ = &__nvoc_up_thunk_RmResource_memmapperControl_Prologue; - - // memmapperControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__memmapperControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memmapperControl_Epilogue; - - // memmapperCanCopy -- virtual inherited (res) base (gpures) - pThis->__memmapperCanCopy__ = &__nvoc_up_thunk_RsResource_memmapperCanCopy; - - // memmapperIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__memmapperIsDuplicate__ = &__nvoc_up_thunk_RsResource_memmapperIsDuplicate; - - // memmapperPreDestruct -- virtual inherited (res) base (gpures) - pThis->__memmapperPreDestruct__ = &__nvoc_up_thunk_RsResource_memmapperPreDestruct; - - // memmapperControlFilter -- virtual inherited (res) base (gpures) - pThis->__memmapperControlFilter__ = &__nvoc_up_thunk_RsResource_memmapperControlFilter; - - // memmapperIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__memmapperIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memmapperIsPartialUnmapSupported; - - // memmapperMapTo -- virtual inherited (res) base (gpures) - pThis->__memmapperMapTo__ = &__nvoc_up_thunk_RsResource_memmapperMapTo; - - // memmapperUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__memmapperUnmapFrom__ = &__nvoc_up_thunk_RsResource_memmapperUnmapFrom; - - // memmapperGetRefCount -- virtual inherited (res) base (gpures) - pThis->__memmapperGetRefCount__ = &__nvoc_up_thunk_RsResource_memmapperGetRefCount; - - // memmapperAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__memmapperAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memmapperAddAdditionalDependants; -} // End __nvoc_init_funcTable_MemoryMapper_1 with approximately 27 basic block(s). +} // End __nvoc_init_funcTable_MemoryMapper_1 with approximately 2 basic block(s). // Initialize vtable(s) for 27 virtual method(s). void __nvoc_init_funcTable_MemoryMapper(MemoryMapper *pThis) { - // Initialize vtable(s) with 27 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__MemoryMapper vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x808u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__memmapperControl__ = &__nvoc_up_thunk_GpuResource_memmapperControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__memmapperMap__ = &__nvoc_up_thunk_GpuResource_memmapperMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__memmapperUnmap__ = &__nvoc_up_thunk_GpuResource_memmapperUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__memmapperShareCallback__ = &__nvoc_up_thunk_GpuResource_memmapperShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__memmapperGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_memmapperGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__memmapperGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_memmapperGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__memmapperInternalControlForward__ = &__nvoc_up_thunk_GpuResource_memmapperInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__memmapperGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_memmapperGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__memmapperAccessCallback__ = &__nvoc_up_thunk_RmResource_memmapperAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__memmapperGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_memmapperGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__memmapperCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_memmapperCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__memmapperGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_memmapperGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__memmapperControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memmapperControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__memmapperControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memmapperControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__memmapperControl_Prologue__ = &__nvoc_up_thunk_RmResource_memmapperControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__memmapperControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memmapperControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__memmapperCanCopy__ = &__nvoc_up_thunk_RsResource_memmapperCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__memmapperIsDuplicate__ = &__nvoc_up_thunk_RsResource_memmapperIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__memmapperPreDestruct__ = &__nvoc_up_thunk_RsResource_memmapperPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__memmapperControlFilter__ = &__nvoc_up_thunk_RsResource_memmapperControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__memmapperIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memmapperIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__memmapperMapTo__ = &__nvoc_up_thunk_RsResource_memmapperMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__memmapperUnmapFrom__ = &__nvoc_up_thunk_RsResource_memmapperUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__memmapperGetRefCount__ = &__nvoc_up_thunk_RsResource_memmapperGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__memmapperAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memmapperAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (memmapper) this + + // Initialize vtable(s) with 2 per-object function pointer(s). __nvoc_init_funcTable_MemoryMapper_1(pThis); } diff --git a/src/nvidia/generated/g_mem_mapper_nvoc.h b/src/nvidia/generated/g_mem_mapper_nvoc.h index f765e3525a..e56dcf6550 100644 --- a/src/nvidia/generated/g_mem_mapper_nvoc.h +++ b/src/nvidia/generated/g_mem_mapper_nvoc.h @@ -7,14 +7,14 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -140,10 +140,15 @@ typedef struct #endif +// Metadata including vtable +struct NVOC_VTABLE__MemoryMapper; + + struct MemoryMapper { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__MemoryMapper *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -156,9 +161,32 @@ struct MemoryMapper { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct MemoryMapper *__nvoc_pbase_MemoryMapper; // memmapper - // Vtable with 27 per-object function pointers + // Vtable with 2 per-object function pointers NV_STATUS (*__memmapperCtrlCmdSubmitOperations__)(struct MemoryMapper * /*this*/, NV00FE_CTRL_SUBMIT_OPERATIONS_PARAMS *); // exported (id=0xfe0101) NV_STATUS (*__memmapperCtrlCmdResizeQueue__)(struct MemoryMapper * /*this*/, NV00FE_CTRL_RESIZE_QUEUE_PARAMS *); // exported (id=0xfe0102) + + // Data members + API_SECURITY_INFO secInfo; + struct Subdevice *pSubdevice; + struct Memory *pNotificationMemory; + TRANSFER_SURFACE notificationSurface; + NV_MEMORY_MAPPER_NOTIFICATION *pNotification; + NV00FE_CTRL_OPERATION *pOperationQueue; + NvU32 operationQueuePut; + NvU32 operationQueueGet; + NvU32 operationQueueLen; + NvHandle hInternalSemaphoreSurface; + NVOS10_EVENT_KERNEL_CALLBACK_EX semaphoreCallback; + MemoryMapperWorkerParams *pWorkerParams; + struct SemaphoreSurface *pSemSurf; + NvBool bError; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__MemoryMapper { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + NV_STATUS (*__memmapperControl__)(struct MemoryMapper * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__memmapperMap__)(struct MemoryMapper * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__memmapperUnmap__)(struct MemoryMapper * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -184,22 +212,6 @@ struct MemoryMapper { NV_STATUS (*__memmapperUnmapFrom__)(struct MemoryMapper * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__memmapperGetRefCount__)(struct MemoryMapper * /*this*/); // virtual inherited (res) base (gpures) void (*__memmapperAddAdditionalDependants__)(struct RsClient *, struct MemoryMapper * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - API_SECURITY_INFO secInfo; - struct Subdevice *pSubdevice; - struct Memory *pNotificationMemory; - TRANSFER_SURFACE notificationSurface; - NV_MEMORY_MAPPER_NOTIFICATION *pNotification; - NV00FE_CTRL_OPERATION *pOperationQueue; - NvU32 operationQueuePut; - NvU32 operationQueueGet; - NvU32 operationQueueLen; - NvHandle hInternalSemaphoreSurface; - NVOS10_EVENT_KERNEL_CALLBACK_EX semaphoreCallback; - MemoryMapperWorkerParams *pWorkerParams; - struct SemaphoreSurface *pSemSurf; - NvBool bError; }; #ifndef __NVOC_CLASS_MemoryMapper_TYPEDEF__ @@ -236,55 +248,55 @@ NV_STATUS __nvoc_objCreate_MemoryMapper(MemoryMapper**, Dynamic*, NvU32, struct #define memmapperCtrlCmdSubmitOperations(pMemoryMapper, pParams) memmapperCtrlCmdSubmitOperations_DISPATCH(pMemoryMapper, pParams) #define memmapperCtrlCmdResizeQueue_FNPTR(pMemoryMapper) pMemoryMapper->__memmapperCtrlCmdResizeQueue__ #define memmapperCtrlCmdResizeQueue(pMemoryMapper, pParams) memmapperCtrlCmdResizeQueue_DISPATCH(pMemoryMapper, pParams) -#define memmapperControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define memmapperControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define memmapperControl(pGpuResource, pCallContext, pParams) memmapperControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define memmapperMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define memmapperMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define memmapperMap(pGpuResource, pCallContext, pParams, pCpuMapping) memmapperMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define memmapperUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define memmapperUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define memmapperUnmap(pGpuResource, pCallContext, pCpuMapping) memmapperUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define memmapperShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define memmapperShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define memmapperShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) memmapperShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define memmapperGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define memmapperGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define memmapperGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) memmapperGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define memmapperGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define memmapperGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define memmapperGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) memmapperGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define memmapperInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define memmapperInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define memmapperInternalControlForward(pGpuResource, command, pParams, size) memmapperInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define memmapperGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define memmapperGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define memmapperGetInternalObjectHandle(pGpuResource) memmapperGetInternalObjectHandle_DISPATCH(pGpuResource) -#define memmapperAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define memmapperAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define memmapperAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) memmapperAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define memmapperGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define memmapperGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define memmapperGetMemInterMapParams(pRmResource, pParams) memmapperGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define memmapperCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define memmapperCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define memmapperCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) memmapperCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define memmapperGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define memmapperGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define memmapperGetMemoryMappingDescriptor(pRmResource, ppMemDesc) memmapperGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define memmapperControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define memmapperControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define memmapperControlSerialization_Prologue(pResource, pCallContext, pParams) memmapperControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define memmapperControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define memmapperControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define memmapperControlSerialization_Epilogue(pResource, pCallContext, pParams) memmapperControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memmapperControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define memmapperControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define memmapperControl_Prologue(pResource, pCallContext, pParams) memmapperControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define memmapperControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define memmapperControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define memmapperControl_Epilogue(pResource, pCallContext, pParams) memmapperControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memmapperCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define memmapperCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define memmapperCanCopy(pResource) memmapperCanCopy_DISPATCH(pResource) -#define memmapperIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define memmapperIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define memmapperIsDuplicate(pResource, hMemory, pDuplicate) memmapperIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define memmapperPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define memmapperPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define memmapperPreDestruct(pResource) memmapperPreDestruct_DISPATCH(pResource) -#define memmapperControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define memmapperControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define memmapperControlFilter(pResource, pCallContext, pParams) memmapperControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define memmapperIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define memmapperIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define memmapperIsPartialUnmapSupported(pResource) memmapperIsPartialUnmapSupported_DISPATCH(pResource) -#define memmapperMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define memmapperMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define memmapperMapTo(pResource, pParams) memmapperMapTo_DISPATCH(pResource, pParams) -#define memmapperUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define memmapperUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define memmapperUnmapFrom(pResource, pParams) memmapperUnmapFrom_DISPATCH(pResource, pParams) -#define memmapperGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define memmapperGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define memmapperGetRefCount(pResource) memmapperGetRefCount_DISPATCH(pResource) -#define memmapperAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define memmapperAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define memmapperAddAdditionalDependants(pClient, pResource, pReference) memmapperAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions @@ -297,103 +309,103 @@ static inline NV_STATUS memmapperCtrlCmdResizeQueue_DISPATCH(struct MemoryMapper } static inline NV_STATUS memmapperControl_DISPATCH(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__memmapperControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__memmapperControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS memmapperMap_DISPATCH(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__memmapperMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__memmapperMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS memmapperUnmap_DISPATCH(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__memmapperUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__memmapperUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool memmapperShareCallback_DISPATCH(struct MemoryMapper *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__memmapperShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__memmapperShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS memmapperGetRegBaseOffsetAndSize_DISPATCH(struct MemoryMapper *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__memmapperGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__memmapperGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS memmapperGetMapAddrSpace_DISPATCH(struct MemoryMapper *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__memmapperGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__memmapperGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS memmapperInternalControlForward_DISPATCH(struct MemoryMapper *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__memmapperInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__memmapperInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle memmapperGetInternalObjectHandle_DISPATCH(struct MemoryMapper *pGpuResource) { - return pGpuResource->__memmapperGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__memmapperGetInternalObjectHandle__(pGpuResource); } static inline NvBool memmapperAccessCallback_DISPATCH(struct MemoryMapper *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__memmapperAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__memmapperAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS memmapperGetMemInterMapParams_DISPATCH(struct MemoryMapper *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__memmapperGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__memmapperGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS memmapperCheckMemInterUnmap_DISPATCH(struct MemoryMapper *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__memmapperCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__memmapperCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS memmapperGetMemoryMappingDescriptor_DISPATCH(struct MemoryMapper *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__memmapperGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__memmapperGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS memmapperControlSerialization_Prologue_DISPATCH(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memmapperControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memmapperControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void memmapperControlSerialization_Epilogue_DISPATCH(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memmapperControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__memmapperControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS memmapperControl_Prologue_DISPATCH(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memmapperControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memmapperControl_Prologue__(pResource, pCallContext, pParams); } static inline void memmapperControl_Epilogue_DISPATCH(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memmapperControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__memmapperControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool memmapperCanCopy_DISPATCH(struct MemoryMapper *pResource) { - return pResource->__memmapperCanCopy__(pResource); + return pResource->__nvoc_vtable->__memmapperCanCopy__(pResource); } static inline NV_STATUS memmapperIsDuplicate_DISPATCH(struct MemoryMapper *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__memmapperIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__memmapperIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void memmapperPreDestruct_DISPATCH(struct MemoryMapper *pResource) { - pResource->__memmapperPreDestruct__(pResource); + pResource->__nvoc_vtable->__memmapperPreDestruct__(pResource); } static inline NV_STATUS memmapperControlFilter_DISPATCH(struct MemoryMapper *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memmapperControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memmapperControlFilter__(pResource, pCallContext, pParams); } static inline NvBool memmapperIsPartialUnmapSupported_DISPATCH(struct MemoryMapper *pResource) { - return pResource->__memmapperIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__memmapperIsPartialUnmapSupported__(pResource); } static inline NV_STATUS memmapperMapTo_DISPATCH(struct MemoryMapper *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__memmapperMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__memmapperMapTo__(pResource, pParams); } static inline NV_STATUS memmapperUnmapFrom_DISPATCH(struct MemoryMapper *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__memmapperUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__memmapperUnmapFrom__(pResource, pParams); } static inline NvU32 memmapperGetRefCount_DISPATCH(struct MemoryMapper *pResource) { - return pResource->__memmapperGetRefCount__(pResource); + return pResource->__nvoc_vtable->__memmapperGetRefCount__(pResource); } static inline void memmapperAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryMapper *pResource, RsResourceRef *pReference) { - pResource->__memmapperAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__memmapperAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS memmapperCtrlCmdSubmitOperations_IMPL(struct MemoryMapper *pMemoryMapper, NV00FE_CTRL_SUBMIT_OPERATIONS_PARAMS *pParams); @@ -406,6 +418,16 @@ NV_STATUS memmapperConstruct_IMPL(struct MemoryMapper *arg_pMemoryMapper, struct void memmapperDestruct_IMPL(struct MemoryMapper *pMemoryMapper); #define __nvoc_memmapperDestruct(pMemoryMapper) memmapperDestruct_IMPL(pMemoryMapper) +void memmapperQueueWork_IMPL(struct MemoryMapper *pMemoryMapper); + +#ifdef __nvoc_mem_mapper_h_disabled +static inline void memmapperQueueWork(struct MemoryMapper *pMemoryMapper) { + NV_ASSERT_FAILED_PRECOMP("MemoryMapper was disabled!"); +} +#else //__nvoc_mem_mapper_h_disabled +#define memmapperQueueWork(pMemoryMapper) memmapperQueueWork_IMPL(pMemoryMapper) +#endif //__nvoc_mem_mapper_h_disabled + #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_mem_mgr_nvoc.c b/src/nvidia/generated/g_mem_mgr_nvoc.c index 0b92e94a65..f976b0bf63 100644 --- a/src/nvidia/generated/g_mem_mgr_nvoc.c +++ b/src/nvidia/generated/g_mem_mgr_nvoc.c @@ -66,78 +66,96 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_MemoryManager = /*pExportInfo=*/ &__nvoc_export_info_MemoryManager }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_MemoryManager_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, ENGDESCRIPTOR arg3); // this +NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager); // this +NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager); // this +NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, NvU32 arg3); // this +NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStatePostLoad(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, NvU32 arg3); // this +NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStatePreUnload(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, NvU32 arg3); // this +NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, NvU32 arg3); // this +void __nvoc_down_thunk_MemoryManager_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager); // this + // 8 down-thunk(s) defined to bridge methods in MemoryManager from superclasses // memmgrConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_MemoryManager_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, ENGDESCRIPTOR arg3) { +NV_STATUS __nvoc_down_thunk_MemoryManager_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, ENGDESCRIPTOR arg3) { return memmgrConstructEngine(pGpu, (struct MemoryManager *)(((unsigned char *) pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset), arg3); } // memmgrStatePreInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager) { +NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager) { return memmgrStatePreInitLocked(pGpu, (struct MemoryManager *)(((unsigned char *) pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset)); } // memmgrStateInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager) { +NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager) { return memmgrStateInitLocked(pGpu, (struct MemoryManager *)(((unsigned char *) pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset)); } // memmgrStateLoad: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, NvU32 arg3) { return memmgrStateLoad(pGpu, (struct MemoryManager *)(((unsigned char *) pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset), arg3); } // memmgrStatePostLoad: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStatePostLoad(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStatePostLoad(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, NvU32 arg3) { return memmgrStatePostLoad(pGpu, (struct MemoryManager *)(((unsigned char *) pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset), arg3); } // memmgrStatePreUnload: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStatePreUnload(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStatePreUnload(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, NvU32 arg3) { return memmgrStatePreUnload(pGpu, (struct MemoryManager *)(((unsigned char *) pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset), arg3); } // memmgrStateUnload: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_MemoryManager_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager, NvU32 arg3) { return memmgrStateUnload(pGpu, (struct MemoryManager *)(((unsigned char *) pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset), arg3); } // memmgrStateDestroy: virtual override (engstate) base (engstate) -static void __nvoc_down_thunk_MemoryManager_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager) { +void __nvoc_down_thunk_MemoryManager_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pMemoryManager) { memmgrStateDestroy(pGpu, (struct MemoryManager *)(((unsigned char *) pMemoryManager) - __nvoc_rtti_MemoryManager_OBJENGSTATE.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_memmgrInitMissing(struct OBJGPU *pGpu, struct MemoryManager *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_memmgrStatePreInitUnlocked(struct OBJGPU *pGpu, struct MemoryManager *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_memmgrStateInitUnlocked(struct OBJGPU *pGpu, struct MemoryManager *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_memmgrStatePreLoad(struct OBJGPU *pGpu, struct MemoryManager *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_memmgrStatePostUnload(struct OBJGPU *pGpu, struct MemoryManager *pEngstate, NvU32 arg3); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_memmgrIsPresent(struct OBJGPU *pGpu, struct MemoryManager *pEngstate); // this + // 6 up-thunk(s) defined to bridge methods in MemoryManager to superclasses // memmgrInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_memmgrInitMissing(struct OBJGPU *pGpu, struct MemoryManager *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_memmgrInitMissing(struct OBJGPU *pGpu, struct MemoryManager *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_MemoryManager_OBJENGSTATE.offset)); } // memmgrStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_memmgrStatePreInitUnlocked(struct OBJGPU *pGpu, struct MemoryManager *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_memmgrStatePreInitUnlocked(struct OBJGPU *pGpu, struct MemoryManager *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_MemoryManager_OBJENGSTATE.offset)); } // memmgrStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_memmgrStateInitUnlocked(struct OBJGPU *pGpu, struct MemoryManager *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_memmgrStateInitUnlocked(struct OBJGPU *pGpu, struct MemoryManager *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_MemoryManager_OBJENGSTATE.offset)); } // memmgrStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_memmgrStatePreLoad(struct OBJGPU *pGpu, struct MemoryManager *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_memmgrStatePreLoad(struct OBJGPU *pGpu, struct MemoryManager *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_MemoryManager_OBJENGSTATE.offset), arg3); } // memmgrStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_memmgrStatePostUnload(struct OBJGPU *pGpu, struct MemoryManager *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_memmgrStatePostUnload(struct OBJGPU *pGpu, struct MemoryManager *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_MemoryManager_OBJENGSTATE.offset), arg3); } // memmgrIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_memmgrIsPresent(struct OBJGPU *pGpu, struct MemoryManager *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_memmgrIsPresent(struct OBJGPU *pGpu, struct MemoryManager *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_MemoryManager_OBJENGSTATE.offset)); } @@ -170,138 +188,138 @@ void __nvoc_init_dataField_MemoryManager(MemoryManager *pThis, RmHalspecOwner *p // Hal field -- bFbRegionsSupported if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bFbRegionsSupported = ((NvBool)(0 == 0)); + pThis->bFbRegionsSupported = NV_TRUE; } // Hal field -- bPmaEnabled if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bPmaEnabled = ((NvBool)(0 == 0)); + pThis->bPmaEnabled = NV_TRUE; } // Hal field -- bClientPageTablesPmaManaged if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bClientPageTablesPmaManaged = ((NvBool)(0 == 0)); + pThis->bClientPageTablesPmaManaged = NV_TRUE; } // Hal field -- bScanoutSysmem // default { - pThis->bScanoutSysmem = ((NvBool)(0 != 0)); + pThis->bScanoutSysmem = NV_FALSE; } // Hal field -- bDisallowSplitLowerMemory // default { - pThis->bDisallowSplitLowerMemory = ((NvBool)(0 != 0)); + pThis->bDisallowSplitLowerMemory = NV_FALSE; } // Hal field -- bSmallPageCompression // default { - pThis->bSmallPageCompression = ((NvBool)(0 != 0)); + pThis->bSmallPageCompression = NV_FALSE; } // Hal field -- bSysmemCompressionSupportDef // default { - pThis->bSysmemCompressionSupportDef = ((NvBool)(0 != 0)); + pThis->bSysmemCompressionSupportDef = NV_FALSE; } // Hal field -- bBug2301372IncreaseRmReserveMemoryWar if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ { - pThis->bBug2301372IncreaseRmReserveMemoryWar = ((NvBool)(0 == 0)); + pThis->bBug2301372IncreaseRmReserveMemoryWar = NV_TRUE; } // default else { - pThis->bBug2301372IncreaseRmReserveMemoryWar = ((NvBool)(0 != 0)); + pThis->bBug2301372IncreaseRmReserveMemoryWar = NV_FALSE; } - pThis->bEnableDynamicPageOfflining = ((NvBool)(0 != 0)); + pThis->bEnableDynamicPageOfflining = NV_FALSE; // Hal field -- bVgpuPmaSupport if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bVgpuPmaSupport = ((NvBool)(0 == 0)); + pThis->bVgpuPmaSupport = NV_TRUE; } // default else { - pThis->bVgpuPmaSupport = ((NvBool)(0 != 0)); + pThis->bVgpuPmaSupport = NV_FALSE; } - pThis->bScrubChannelSetupInProgress = ((NvBool)(0 != 0)); + pThis->bScrubChannelSetupInProgress = NV_FALSE; // Hal field -- bBug3922001DisableCtxBufOnSim if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ { - pThis->bBug3922001DisableCtxBufOnSim = ((NvBool)(0 == 0)); + pThis->bBug3922001DisableCtxBufOnSim = NV_TRUE; } // default else { - pThis->bBug3922001DisableCtxBufOnSim = ((NvBool)(0 != 0)); + pThis->bBug3922001DisableCtxBufOnSim = NV_FALSE; } - pThis->bEnableDynamicGranularityPageArrays = ((NvBool)(0 != 0)); + pThis->bEnableDynamicGranularityPageArrays = NV_FALSE; // Hal field -- bAllowNoncontiguousAllocation if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bAllowNoncontiguousAllocation = ((NvBool)(0 == 0)); + pThis->bAllowNoncontiguousAllocation = NV_TRUE; } // Hal field -- bLocalEgmSupported if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->bLocalEgmSupported = ((NvBool)(0 == 0)); + pThis->bLocalEgmSupported = NV_TRUE; } // default else { - pThis->bLocalEgmSupported = ((NvBool)(0 != 0)); + pThis->bLocalEgmSupported = NV_FALSE; } // Hal field -- bScrubOnFreeEnabled if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bScrubOnFreeEnabled = ((NvBool)(0 == 0)); + pThis->bScrubOnFreeEnabled = NV_TRUE; } // Hal field -- bFastScrubberEnabled if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->bFastScrubberEnabled = ((NvBool)(0 == 0)); + pThis->bFastScrubberEnabled = NV_TRUE; } // default else { - pThis->bFastScrubberEnabled = ((NvBool)(0 != 0)); + pThis->bFastScrubberEnabled = NV_FALSE; } // Hal field -- bMonitoredFenceSupported if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bMonitoredFenceSupported = ((NvBool)(0 == 0)); + pThis->bMonitoredFenceSupported = NV_TRUE; } // Hal field -- b64BitSemaphoresSupported if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->b64BitSemaphoresSupported = ((NvBool)(0 == 0)); + pThis->b64BitSemaphoresSupported = NV_TRUE; } else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000007e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 */ { - pThis->b64BitSemaphoresSupported = ((NvBool)(0 != 0)); + pThis->b64BitSemaphoresSupported = NV_FALSE; } // Hal field -- bGenericKindSupport if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->bGenericKindSupport = ((NvBool)(0 == 0)); + pThis->bGenericKindSupport = NV_TRUE; } } @@ -332,38 +350,6 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // memmgrConstructEngine -- virtual override (engstate) base (engstate) - pThis->__memmgrConstructEngine__ = &memmgrConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_MemoryManager_engstateConstructEngine; - - // memmgrStatePreInitLocked -- virtual override (engstate) base (engstate) - pThis->__memmgrStatePreInitLocked__ = &memmgrStatePreInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_MemoryManager_engstateStatePreInitLocked; - - // memmgrStateInitLocked -- virtual override (engstate) base (engstate) - pThis->__memmgrStateInitLocked__ = &memmgrStateInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_MemoryManager_engstateStateInitLocked; - - // memmgrStateLoad -- virtual override (engstate) base (engstate) - pThis->__memmgrStateLoad__ = &memmgrStateLoad_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_MemoryManager_engstateStateLoad; - - // memmgrStatePostLoad -- virtual override (engstate) base (engstate) - pThis->__memmgrStatePostLoad__ = &memmgrStatePostLoad_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_MemoryManager_engstateStatePostLoad; - - // memmgrStatePreUnload -- virtual override (engstate) base (engstate) - pThis->__memmgrStatePreUnload__ = &memmgrStatePreUnload_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_down_thunk_MemoryManager_engstateStatePreUnload; - - // memmgrStateUnload -- virtual override (engstate) base (engstate) - pThis->__memmgrStateUnload__ = &memmgrStateUnload_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_MemoryManager_engstateStateUnload; - - // memmgrStateDestroy -- virtual override (engstate) base (engstate) - pThis->__memmgrStateDestroy__ = &memmgrStateDestroy_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_MemoryManager_engstateStateDestroy; - // memmgrAllocateConsoleRegion -- halified (2 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { @@ -392,7 +378,7 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe } else { - pThis->__memmgrMemUtilsCheckMemoryFastScrubEnable__ = &memmgrMemUtilsCheckMemoryFastScrubEnable_491d52; + pThis->__memmgrMemUtilsCheckMemoryFastScrubEnable__ = &memmgrMemUtilsCheckMemoryFastScrubEnable_3dd2c9; } // memmgrAllocDetermineAlignment -- halified (2 hals) body @@ -552,7 +538,7 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe } else { - pThis->__memmgrReadMmuLock__ = &memmgrReadMmuLock_e133c0; + pThis->__memmgrReadMmuLock__ = &memmgrReadMmuLock_ccda6f; } // memmgrBlockMemLockedMemory -- halified (2 hals) body @@ -660,31 +646,49 @@ static void __nvoc_init_funcTable_MemoryManager_1(MemoryManager *pThis, RmHalspe { pThis->__memmgrGetFBEndReserveSizeEstimate__ = &memmgrGetFBEndReserveSizeEstimate_GM107; } - - // memmgrInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__memmgrInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_memmgrInitMissing; - - // memmgrStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__memmgrStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_memmgrStatePreInitUnlocked; - - // memmgrStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__memmgrStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_memmgrStateInitUnlocked; - - // memmgrStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__memmgrStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_memmgrStatePreLoad; - - // memmgrStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__memmgrStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_memmgrStatePostUnload; - - // memmgrIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__memmgrIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_memmgrIsPresent; -} // End __nvoc_init_funcTable_MemoryManager_1 with approximately 81 basic block(s). +} // End __nvoc_init_funcTable_MemoryManager_1 with approximately 59 basic block(s). // Initialize vtable(s) for 42 virtual method(s). void __nvoc_init_funcTable_MemoryManager(MemoryManager *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 42 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__MemoryManager vtable = { + .__memmgrConstructEngine__ = &memmgrConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_MemoryManager_engstateConstructEngine, // virtual + .__memmgrStatePreInitLocked__ = &memmgrStatePreInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_MemoryManager_engstateStatePreInitLocked, // virtual + .__memmgrStateInitLocked__ = &memmgrStateInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_MemoryManager_engstateStateInitLocked, // virtual + .__memmgrStateLoad__ = &memmgrStateLoad_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_MemoryManager_engstateStateLoad, // virtual + .__memmgrStatePostLoad__ = &memmgrStatePostLoad_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_MemoryManager_engstateStatePostLoad, // virtual + .__memmgrStatePreUnload__ = &memmgrStatePreUnload_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_down_thunk_MemoryManager_engstateStatePreUnload, // virtual + .__memmgrStateUnload__ = &memmgrStateUnload_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_MemoryManager_engstateStateUnload, // virtual + .__memmgrStateDestroy__ = &memmgrStateDestroy_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_MemoryManager_engstateStateDestroy, // virtual + .__memmgrInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_memmgrInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__memmgrStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_memmgrStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__memmgrStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_memmgrStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__memmgrStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_memmgrStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__memmgrStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_memmgrStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__memmgrIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_memmgrIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_vtable = &vtable; // (memmgr) this + + // Initialize vtable(s) with 28 per-object function pointer(s). __nvoc_init_funcTable_MemoryManager_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_mem_mgr_nvoc.h b/src/nvidia/generated/g_mem_mgr_nvoc.h index 73f0f90f99..f5da7d8a13 100644 --- a/src/nvidia/generated/g_mem_mgr_nvoc.h +++ b/src/nvidia/generated/g_mem_mgr_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -100,28 +100,29 @@ typedef enum TRANSFER_TYPE_BAR0, // Copy using BAR0 PRAMIN } TRANSFER_TYPE; -#define TRANSFER_FLAGS_NONE 0 -#define TRANSFER_FLAGS_DEFER_FLUSH NVBIT32(0) // Applicable only for write operations -#define TRANSFER_FLAGS_SHADOW_ALLOC NVBIT32(1) // Applicable only for non-PROCESSOR transfers -#define TRANSFER_FLAGS_SHADOW_INIT_MEM NVBIT32(2) // Applicable only for non-PROCESSOR transfers -#define TRANSFER_FLAGS_PERSISTENT_CPU_MAPPING NVBIT32(3) // Require long lived PROCESSOR mapping -#define TRANSFER_FLAGS_DESTROY_MAPPING NVBIT32(4) // Destroy any cached mappings when complete -#define TRANSFER_FLAGS_USE_BAR1 NVBIT32(5) // Use only BAR1 for PROCESSOR transfers -#define TRANSFER_FLAGS_PREFER_CE NVBIT32(6) // Use CE if possible (BAR0 on simulation for perf) -#define TRANSFER_FLAGS_CE_PRI_DEFER_FLUSH NVBIT32(7) // Defer CE flush; only affects PRI CE operations +#define TRANSFER_FLAGS_NONE 0 +#define TRANSFER_FLAGS_DEFER_FLUSH NVBIT32(0) // Applicable only for write operations +#define TRANSFER_FLAGS_SHADOW_ALLOC NVBIT32(1) // Applicable only for non-PROCESSOR transfers +#define TRANSFER_FLAGS_SHADOW_INIT_MEM NVBIT32(2) // Applicable only for non-PROCESSOR transfers +#define TRANSFER_FLAGS_PERSISTENT_CPU_MAPPING NVBIT32(3) // Require long lived PROCESSOR mapping +#define TRANSFER_FLAGS_DESTROY_MAPPING NVBIT32(4) // Destroy any cached mappings when complete +#define TRANSFER_FLAGS_USE_BAR1 NVBIT32(5) // Use only BAR1 for PROCESSOR transfers +#define TRANSFER_FLAGS_PREFER_CE NVBIT32(6) // Use CE if possible (BAR0 on simulation for perf) +#define TRANSFER_FLAGS_CE_PRI_DEFER_FLUSH NVBIT32(7) // Defer CE flush; only affects PRI CE operations // Protection flags: at most 1 may be set, none means READ_WRITE by default -#define TRANSFER_FLAGS_MAP_PROTECT_READABLE NVBIT32(8) // Transfer is only reading data -#define TRANSFER_FLAGS_MAP_PROTECT_WRITEABLE NVBIT32(9) // Transfer is only writing data - -#define TRANSFER_FLAGS_PREFER_PROCESSOR NVBIT32(10) // Use BAR1/2 if possible -#define TRANSFER_FLAGS_ALLOW_MAPPING_REUSE NVBIT32(11) // Prefer existing full-allocation mapping - // (see memdescGetKernelMapping()) - // Only affects BeginTransfer/EndTransfer - // Mapping lifetime controlled by original mapper - // Intented for short uses, - // where it can't be unmapped by the owner - +#define TRANSFER_FLAGS_MAP_PROTECT_READABLE NVBIT32(8) // Transfer is only reading data +#define TRANSFER_FLAGS_MAP_PROTECT_WRITEABLE NVBIT32(9) // Transfer is only writing data + +#define TRANSFER_FLAGS_PREFER_PROCESSOR NVBIT32(10) // Use BAR1/2 if possible +#define TRANSFER_FLAGS_ALLOW_MAPPING_REUSE NVBIT32(11) // Prefer existing full-allocation mapping + // (see memdescGetKernelMapping()) + // Only affects BeginTransfer/EndTransfer + // Mapping lifetime controlled by original mapper + // Intented for short uses, + // where it can't be unmapped by the owner + +#define TRANSFER_FLAGS_FLUSH_CPU_CACHE_WAR_BUG4686457 NVBIT32(12) // Flush the data from CPU cache
 typedef struct { NvU32 bar1Size; @@ -150,6 +151,7 @@ typedef enum FB_IS_KIND_COMPRESSIBLE_4, // Compressible with 4 comp tag bits FB_IS_KIND_SUPPORTED, // Kind is supported FB_IS_KIND_DISALLOW_PLC, // Kind Disallows PLC + FB_IS_KIND_SWIZZLED, // Kind is swizzled (not pitch or GMK) } FB_IS_KIND_OP; // Surface compression parameters @@ -365,7 +367,7 @@ typedef struct OBJCHANNEL NvBool bSecure; -} OBJCHANNEL, *POBJCHANNEL; +} OBJCHANNEL; #define NV_METHOD(SubCh, Method, Num) \ (DRF_DEF(906F, _DMA_INCR, _OPCODE, _VALUE) | \ @@ -467,6 +469,10 @@ typedef struct _def_fb_mem_node #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) #endif + +// Metadata including vtable +struct NVOC_VTABLE__MemoryManager; + struct RM_POOL_ALLOC_MEM_RESERVE_INFO; struct __nvoc_inner_struc_MemoryManager_1__ { @@ -506,6 +512,7 @@ struct MemoryManager { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__MemoryManager *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -515,15 +522,7 @@ struct MemoryManager { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct MemoryManager *__nvoc_pbase_MemoryManager; // memmgr - // Vtable with 42 per-object function pointers - NV_STATUS (*__memmgrConstructEngine__)(OBJGPU *, struct MemoryManager * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) - NV_STATUS (*__memmgrStatePreInitLocked__)(OBJGPU *, struct MemoryManager * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__memmgrStateInitLocked__)(OBJGPU *, struct MemoryManager * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__memmgrStateLoad__)(OBJGPU *, struct MemoryManager * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__memmgrStatePostLoad__)(OBJGPU *, struct MemoryManager * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__memmgrStatePreUnload__)(OBJGPU *, struct MemoryManager * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__memmgrStateUnload__)(OBJGPU *, struct MemoryManager * /*this*/, NvU32); // virtual override (engstate) base (engstate) - void (*__memmgrStateDestroy__)(OBJGPU *, struct MemoryManager * /*this*/); // virtual override (engstate) base (engstate) + // Vtable with 28 per-object function pointers NV_STATUS (*__memmgrAllocateConsoleRegion__)(OBJGPU *, struct MemoryManager * /*this*/, FB_REGION_DESCRIPTOR *); // halified (2 hals) body NV_STATUS (*__memmgrMemUtilsSec2CtxInit__)(OBJGPU *, struct MemoryManager * /*this*/, OBJCHANNEL *); // halified (2 hals) body NvBool (*__memmgrMemUtilsCheckMemoryFastScrubEnable__)(OBJGPU *, struct MemoryManager * /*this*/, NvU32, NvBool, RmPhysAddr, NvU32, NV_ADDRESS_SPACE); // halified (2 hals) body @@ -552,12 +551,6 @@ struct MemoryManager { NV_STATUS (*__memmgrGetBlackListPages__)(OBJGPU *, struct MemoryManager * /*this*/, BLACKLIST_ADDRESS *, NvU32 *); // halified (2 hals) body NV_STATUS (*__memmgrDiscoverMIGPartitionableMemoryRange__)(OBJGPU *, struct MemoryManager * /*this*/, struct NV_RANGE *); // halified (2 hals) body NvU32 (*__memmgrGetFBEndReserveSizeEstimate__)(OBJGPU *, struct MemoryManager * /*this*/); // halified (2 hals) - void (*__memmgrInitMissing__)(struct OBJGPU *, struct MemoryManager * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__memmgrStatePreInitUnlocked__)(struct OBJGPU *, struct MemoryManager * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__memmgrStateInitUnlocked__)(struct OBJGPU *, struct MemoryManager * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__memmgrStatePreLoad__)(struct OBJGPU *, struct MemoryManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__memmgrStatePostUnload__)(struct OBJGPU *, struct MemoryManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NvBool (*__memmgrIsPresent__)(struct OBJGPU *, struct MemoryManager * /*this*/); // virtual inherited (engstate) base (engstate) // Data members NvBool bFbsrWddmModeEnabled; @@ -638,6 +631,27 @@ struct MemoryManager { NvBool bGenericKindSupport; }; + +// Metadata including vtable with 14 function pointers plus superclass metadata +struct NVOC_VTABLE__MemoryManager { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + + NV_STATUS (*__memmgrConstructEngine__)(OBJGPU *, struct MemoryManager * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__memmgrStatePreInitLocked__)(OBJGPU *, struct MemoryManager * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__memmgrStateInitLocked__)(OBJGPU *, struct MemoryManager * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__memmgrStateLoad__)(OBJGPU *, struct MemoryManager * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__memmgrStatePostLoad__)(OBJGPU *, struct MemoryManager * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__memmgrStatePreUnload__)(OBJGPU *, struct MemoryManager * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__memmgrStateUnload__)(OBJGPU *, struct MemoryManager * /*this*/, NvU32); // virtual override (engstate) base (engstate) + void (*__memmgrStateDestroy__)(OBJGPU *, struct MemoryManager * /*this*/); // virtual override (engstate) base (engstate) + void (*__memmgrInitMissing__)(struct OBJGPU *, struct MemoryManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__memmgrStatePreInitUnlocked__)(struct OBJGPU *, struct MemoryManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__memmgrStateInitUnlocked__)(struct OBJGPU *, struct MemoryManager * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__memmgrStatePreLoad__)(struct OBJGPU *, struct MemoryManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__memmgrStatePostUnload__)(struct OBJGPU *, struct MemoryManager * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__memmgrIsPresent__)(struct OBJGPU *, struct MemoryManager * /*this*/); // virtual inherited (engstate) base (engstate) +}; + #ifndef __NVOC_CLASS_MemoryManager_TYPEDEF__ #define __NVOC_CLASS_MemoryManager_TYPEDEF__ typedef struct MemoryManager MemoryManager; @@ -672,21 +686,21 @@ NV_STATUS __nvoc_objCreate_MemoryManager(MemoryManager**, Dynamic*, NvU32); // Wrapper macros -#define memmgrConstructEngine_FNPTR(pMemoryManager) pMemoryManager->__memmgrConstructEngine__ +#define memmgrConstructEngine_FNPTR(pMemoryManager) pMemoryManager->__nvoc_vtable->__memmgrConstructEngine__ #define memmgrConstructEngine(pGpu, pMemoryManager, arg3) memmgrConstructEngine_DISPATCH(pGpu, pMemoryManager, arg3) -#define memmgrStatePreInitLocked_FNPTR(pMemoryManager) pMemoryManager->__memmgrStatePreInitLocked__ +#define memmgrStatePreInitLocked_FNPTR(pMemoryManager) pMemoryManager->__nvoc_vtable->__memmgrStatePreInitLocked__ #define memmgrStatePreInitLocked(pGpu, pMemoryManager) memmgrStatePreInitLocked_DISPATCH(pGpu, pMemoryManager) -#define memmgrStateInitLocked_FNPTR(pMemoryManager) pMemoryManager->__memmgrStateInitLocked__ +#define memmgrStateInitLocked_FNPTR(pMemoryManager) pMemoryManager->__nvoc_vtable->__memmgrStateInitLocked__ #define memmgrStateInitLocked(pGpu, pMemoryManager) memmgrStateInitLocked_DISPATCH(pGpu, pMemoryManager) -#define memmgrStateLoad_FNPTR(pMemoryManager) pMemoryManager->__memmgrStateLoad__ +#define memmgrStateLoad_FNPTR(pMemoryManager) pMemoryManager->__nvoc_vtable->__memmgrStateLoad__ #define memmgrStateLoad(pGpu, pMemoryManager, arg3) memmgrStateLoad_DISPATCH(pGpu, pMemoryManager, arg3) -#define memmgrStatePostLoad_FNPTR(pMemoryManager) pMemoryManager->__memmgrStatePostLoad__ +#define memmgrStatePostLoad_FNPTR(pMemoryManager) pMemoryManager->__nvoc_vtable->__memmgrStatePostLoad__ #define memmgrStatePostLoad(pGpu, pMemoryManager, arg3) memmgrStatePostLoad_DISPATCH(pGpu, pMemoryManager, arg3) -#define memmgrStatePreUnload_FNPTR(pMemoryManager) pMemoryManager->__memmgrStatePreUnload__ +#define memmgrStatePreUnload_FNPTR(pMemoryManager) pMemoryManager->__nvoc_vtable->__memmgrStatePreUnload__ #define memmgrStatePreUnload(pGpu, pMemoryManager, arg3) memmgrStatePreUnload_DISPATCH(pGpu, pMemoryManager, arg3) -#define memmgrStateUnload_FNPTR(pMemoryManager) pMemoryManager->__memmgrStateUnload__ +#define memmgrStateUnload_FNPTR(pMemoryManager) pMemoryManager->__nvoc_vtable->__memmgrStateUnload__ #define memmgrStateUnload(pGpu, pMemoryManager, arg3) memmgrStateUnload_DISPATCH(pGpu, pMemoryManager, arg3) -#define memmgrStateDestroy_FNPTR(pMemoryManager) pMemoryManager->__memmgrStateDestroy__ +#define memmgrStateDestroy_FNPTR(pMemoryManager) pMemoryManager->__nvoc_vtable->__memmgrStateDestroy__ #define memmgrStateDestroy(pGpu, pMemoryManager) memmgrStateDestroy_DISPATCH(pGpu, pMemoryManager) #define memmgrAllocateConsoleRegion_FNPTR(pMemoryManager) pMemoryManager->__memmgrAllocateConsoleRegion__ #define memmgrAllocateConsoleRegion(pGpu, pMemoryManager, arg3) memmgrAllocateConsoleRegion_DISPATCH(pGpu, pMemoryManager, arg3) @@ -772,50 +786,50 @@ NV_STATUS __nvoc_objCreate_MemoryManager(MemoryManager**, Dynamic*, NvU32); #define memmgrGetFBEndReserveSizeEstimate_FNPTR(pMemoryManager) pMemoryManager->__memmgrGetFBEndReserveSizeEstimate__ #define memmgrGetFBEndReserveSizeEstimate(pGpu, pMemoryManager) memmgrGetFBEndReserveSizeEstimate_DISPATCH(pGpu, pMemoryManager) #define memmgrGetFBEndReserveSizeEstimate_HAL(pGpu, pMemoryManager) memmgrGetFBEndReserveSizeEstimate_DISPATCH(pGpu, pMemoryManager) -#define memmgrInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define memmgrInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define memmgrInitMissing(pGpu, pEngstate) memmgrInitMissing_DISPATCH(pGpu, pEngstate) -#define memmgrStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define memmgrStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define memmgrStatePreInitUnlocked(pGpu, pEngstate) memmgrStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define memmgrStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define memmgrStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define memmgrStateInitUnlocked(pGpu, pEngstate) memmgrStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define memmgrStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define memmgrStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define memmgrStatePreLoad(pGpu, pEngstate, arg3) memmgrStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define memmgrStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define memmgrStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define memmgrStatePostUnload(pGpu, pEngstate, arg3) memmgrStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define memmgrIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define memmgrIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define memmgrIsPresent(pGpu, pEngstate) memmgrIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS memmgrConstructEngine_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, ENGDESCRIPTOR arg3) { - return pMemoryManager->__memmgrConstructEngine__(pGpu, pMemoryManager, arg3); + return pMemoryManager->__nvoc_vtable->__memmgrConstructEngine__(pGpu, pMemoryManager, arg3); } static inline NV_STATUS memmgrStatePreInitLocked_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { - return pMemoryManager->__memmgrStatePreInitLocked__(pGpu, pMemoryManager); + return pMemoryManager->__nvoc_vtable->__memmgrStatePreInitLocked__(pGpu, pMemoryManager); } static inline NV_STATUS memmgrStateInitLocked_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { - return pMemoryManager->__memmgrStateInitLocked__(pGpu, pMemoryManager); + return pMemoryManager->__nvoc_vtable->__memmgrStateInitLocked__(pGpu, pMemoryManager); } static inline NV_STATUS memmgrStateLoad_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3) { - return pMemoryManager->__memmgrStateLoad__(pGpu, pMemoryManager, arg3); + return pMemoryManager->__nvoc_vtable->__memmgrStateLoad__(pGpu, pMemoryManager, arg3); } static inline NV_STATUS memmgrStatePostLoad_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3) { - return pMemoryManager->__memmgrStatePostLoad__(pGpu, pMemoryManager, arg3); + return pMemoryManager->__nvoc_vtable->__memmgrStatePostLoad__(pGpu, pMemoryManager, arg3); } static inline NV_STATUS memmgrStatePreUnload_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3) { - return pMemoryManager->__memmgrStatePreUnload__(pGpu, pMemoryManager, arg3); + return pMemoryManager->__nvoc_vtable->__memmgrStatePreUnload__(pGpu, pMemoryManager, arg3); } static inline NV_STATUS memmgrStateUnload_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3) { - return pMemoryManager->__memmgrStateUnload__(pGpu, pMemoryManager, arg3); + return pMemoryManager->__nvoc_vtable->__memmgrStateUnload__(pGpu, pMemoryManager, arg3); } static inline void memmgrStateDestroy_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { - pMemoryManager->__memmgrStateDestroy__(pGpu, pMemoryManager); + pMemoryManager->__nvoc_vtable->__memmgrStateDestroy__(pGpu, pMemoryManager); } static inline NV_STATUS memmgrAllocateConsoleRegion_DISPATCH(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, FB_REGION_DESCRIPTOR *arg3) { @@ -931,27 +945,27 @@ static inline NvU32 memmgrGetFBEndReserveSizeEstimate_DISPATCH(OBJGPU *pGpu, str } static inline void memmgrInitMissing_DISPATCH(struct OBJGPU *pGpu, struct MemoryManager *pEngstate) { - pEngstate->__memmgrInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__memmgrInitMissing__(pGpu, pEngstate); } static inline NV_STATUS memmgrStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct MemoryManager *pEngstate) { - return pEngstate->__memmgrStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__memmgrStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS memmgrStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct MemoryManager *pEngstate) { - return pEngstate->__memmgrStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__memmgrStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS memmgrStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct MemoryManager *pEngstate, NvU32 arg3) { - return pEngstate->__memmgrStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__memmgrStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS memmgrStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct MemoryManager *pEngstate, NvU32 arg3) { - return pEngstate->__memmgrStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__memmgrStatePostUnload__(pGpu, pEngstate, arg3); } static inline NvBool memmgrIsPresent_DISPATCH(struct OBJGPU *pGpu, struct MemoryManager *pEngstate) { - return pEngstate->__memmgrIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__memmgrIsPresent__(pGpu, pEngstate); } NV_STATUS memmgrSavePowerMgmtState_KERNEL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); @@ -1086,8 +1100,8 @@ static inline void memmgrScrubInternalRegions(OBJGPU *pGpu, struct MemoryManager #define memmgrScrubInternalRegions_HAL(pGpu, pMemoryManager) memmgrScrubInternalRegions(pGpu, pMemoryManager) -static inline NvBool memmgrEccScrubInProgress_491d52(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { - return ((NvBool)(0 != 0)); +static inline NvBool memmgrEccScrubInProgress_3dd2c9(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { + return NV_FALSE; } NvBool memmgrEccScrubInProgress_GP100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); @@ -1099,7 +1113,7 @@ static inline NvBool memmgrEccScrubInProgress(OBJGPU *pGpu, struct MemoryManager return NV_FALSE; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrEccScrubInProgress(pGpu, pMemoryManager) memmgrEccScrubInProgress_491d52(pGpu, pMemoryManager) +#define memmgrEccScrubInProgress(pGpu, pMemoryManager) memmgrEccScrubInProgress_3dd2c9(pGpu, pMemoryManager) #endif //__nvoc_mem_mgr_h_disabled #define memmgrEccScrubInProgress_HAL(pGpu, pMemoryManager) memmgrEccScrubInProgress(pGpu, pMemoryManager) @@ -1465,8 +1479,8 @@ static inline NvU64 memmgrGetRsvdSizeForSr(OBJGPU *pGpu, struct MemoryManager *p #define memmgrGetRsvdSizeForSr_HAL(pGpu, pMemoryManager) memmgrGetRsvdSizeForSr(pGpu, pMemoryManager) -static inline NvBool memmgrVerifyDepthSurfaceAttrs_cbe027(struct MemoryManager *pMemoryManager, NvU32 arg2, NvU32 arg3) { - return ((NvBool)(0 == 0)); +static inline NvBool memmgrVerifyDepthSurfaceAttrs_88bc07(struct MemoryManager *pMemoryManager, NvU32 arg2, NvU32 arg3) { + return NV_TRUE; } @@ -1476,7 +1490,7 @@ static inline NvBool memmgrVerifyDepthSurfaceAttrs(struct MemoryManager *pMemory return NV_FALSE; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrVerifyDepthSurfaceAttrs(pMemoryManager, arg2, arg3) memmgrVerifyDepthSurfaceAttrs_cbe027(pMemoryManager, arg2, arg3) +#define memmgrVerifyDepthSurfaceAttrs(pMemoryManager, arg2, arg3) memmgrVerifyDepthSurfaceAttrs_88bc07(pMemoryManager, arg2, arg3) #endif //__nvoc_mem_mgr_h_disabled #define memmgrVerifyDepthSurfaceAttrs_HAL(pMemoryManager, arg2, arg3) memmgrVerifyDepthSurfaceAttrs(pMemoryManager, arg2, arg3) @@ -1575,8 +1589,8 @@ static inline NV_STATUS memmgrGetSurfacePhysAttr(OBJGPU *pGpu, struct MemoryMana #define memmgrGetSurfacePhysAttr_HAL(pGpu, pMemoryManager, pMemory, pOffset, pMemAperture, pMemKind, pComprOffset, pComprKind, pLineMin, pLineMax, pZCullId, pGpuCacheAttr, pGpuP2PCacheAttr, contigSegmentSize) memmgrGetSurfacePhysAttr(pGpu, pMemoryManager, pMemory, pOffset, pMemAperture, pMemKind, pComprOffset, pComprKind, pLineMin, pLineMax, pZCullId, pGpuCacheAttr, pGpuP2PCacheAttr, contigSegmentSize) -static inline NvBool memmgrVerifyComprAttrs_cbe027(struct MemoryManager *pMemoryManager, NvU32 arg2, NvU32 arg3, NvU32 arg4) { - return ((NvBool)(0 == 0)); +static inline NvBool memmgrVerifyComprAttrs_88bc07(struct MemoryManager *pMemoryManager, NvU32 arg2, NvU32 arg3, NvU32 arg4) { + return NV_TRUE; } @@ -1586,7 +1600,7 @@ static inline NvBool memmgrVerifyComprAttrs(struct MemoryManager *pMemoryManager return NV_FALSE; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrVerifyComprAttrs(pMemoryManager, arg2, arg3, arg4) memmgrVerifyComprAttrs_cbe027(pMemoryManager, arg2, arg3, arg4) +#define memmgrVerifyComprAttrs(pMemoryManager, arg2, arg3, arg4) memmgrVerifyComprAttrs_88bc07(pMemoryManager, arg2, arg3, arg4) #endif //__nvoc_mem_mgr_h_disabled #define memmgrVerifyComprAttrs_HAL(pMemoryManager, arg2, arg3, arg4) memmgrVerifyComprAttrs(pMemoryManager, arg2, arg3, arg4) @@ -1605,8 +1619,8 @@ static inline NvBool memmgrIsKindCompressible(struct MemoryManager *pMemoryManag #define memmgrIsKindCompressible_HAL(pMemoryManager, arg2) memmgrIsKindCompressible(pMemoryManager, arg2) -static inline NvBool memmgrIsKindBlocklinear_491d52(struct MemoryManager *pMemoryManager, NvU32 arg2) { - return ((NvBool)(0 != 0)); +static inline NvBool memmgrIsKindBlocklinear_3dd2c9(struct MemoryManager *pMemoryManager, NvU32 arg2) { + return NV_FALSE; } @@ -1616,7 +1630,7 @@ static inline NvBool memmgrIsKindBlocklinear(struct MemoryManager *pMemoryManage return NV_FALSE; } #else //__nvoc_mem_mgr_h_disabled -#define memmgrIsKindBlocklinear(pMemoryManager, arg2) memmgrIsKindBlocklinear_491d52(pMemoryManager, arg2) +#define memmgrIsKindBlocklinear(pMemoryManager, arg2) memmgrIsKindBlocklinear_3dd2c9(pMemoryManager, arg2) #endif //__nvoc_mem_mgr_h_disabled #define memmgrIsKindBlocklinear_HAL(pMemoryManager, arg2) memmgrIsKindBlocklinear(pMemoryManager, arg2) @@ -2098,8 +2112,8 @@ static inline NV_STATUS memmgrMemUtilsSec2CtxInit_46f6a7(OBJGPU *pGpu, struct Me NvBool memmgrMemUtilsCheckMemoryFastScrubEnable_GH100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3, NvBool arg4, RmPhysAddr arg5, NvU32 arg6, NV_ADDRESS_SPACE arg7); -static inline NvBool memmgrMemUtilsCheckMemoryFastScrubEnable_491d52(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3, NvBool arg4, RmPhysAddr arg5, NvU32 arg6, NV_ADDRESS_SPACE arg7) { - return ((NvBool)(0 != 0)); +static inline NvBool memmgrMemUtilsCheckMemoryFastScrubEnable_3dd2c9(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU32 arg3, NvBool arg4, RmPhysAddr arg5, NvU32 arg6, NV_ADDRESS_SPACE arg7) { + return NV_FALSE; } NV_STATUS memmgrAllocDetermineAlignment_GM107(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvU64 *pMemSize, NvU64 *pAlign, NvU64 alignPad, NvU32 allocFlags, NvU32 retAttr, NvU32 retAttr2, NvU64 hwAlignment); @@ -2189,8 +2203,8 @@ static inline NV_STATUS memmgrCheckReservedMemorySize_56cd7a(OBJGPU *pGpu, struc NV_STATUS memmgrReadMmuLock_GA100(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvBool *pbIsValid, NvU64 *pMmuLockLo, NvU64 *pMmuLockHi); -static inline NV_STATUS memmgrReadMmuLock_e133c0(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvBool *pbIsValid, NvU64 *pMmuLockLo, NvU64 *pMmuLockHi) { - *pbIsValid = ((NvBool)(0 != 0)); +static inline NV_STATUS memmgrReadMmuLock_ccda6f(OBJGPU *pGpu, struct MemoryManager *pMemoryManager, NvBool *pbIsValid, NvU64 *pMmuLockLo, NvU64 *pMmuLockHi) { + *pbIsValid = NV_FALSE; return NV_OK; } @@ -2831,6 +2845,17 @@ static inline NV_STATUS memmgrPmaRegisterRegions(OBJGPU *pGpu, struct MemoryMana #define memmgrPmaRegisterRegions(pGpu, pMemoryManager, pHeap, pPma) memmgrPmaRegisterRegions_IMPL(pGpu, pMemoryManager, pHeap, pPma) #endif //__nvoc_mem_mgr_h_disabled +NvU64 memmgrGetClientFbAddrSpaceSize_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); + +#ifdef __nvoc_mem_mgr_h_disabled +static inline NvU64 memmgrGetClientFbAddrSpaceSize(OBJGPU *pGpu, struct MemoryManager *pMemoryManager) { + NV_ASSERT_FAILED_PRECOMP("MemoryManager was disabled!"); + return 0; +} +#else //__nvoc_mem_mgr_h_disabled +#define memmgrGetClientFbAddrSpaceSize(pGpu, pMemoryManager) memmgrGetClientFbAddrSpaceSize_IMPL(pGpu, pMemoryManager) +#endif //__nvoc_mem_mgr_h_disabled + NV_STATUS memmgrInitInternalChannels_IMPL(OBJGPU *pGpu, struct MemoryManager *pMemoryManager); #ifdef __nvoc_mem_mgr_h_disabled diff --git a/src/nvidia/generated/g_mem_multicast_fabric_nvoc.c b/src/nvidia/generated/g_mem_multicast_fabric_nvoc.c index f11621ace0..d55369ad92 100644 --- a/src/nvidia/generated/g_mem_multicast_fabric_nvoc.c +++ b/src/nvidia/generated/g_mem_multicast_fabric_nvoc.c @@ -207,138 +207,207 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MemoryMu }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super +NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super +NvBool __nvoc_down_thunk_MemoryMulticastFabric_resCanCopy(struct RsResource *pMemoryMulticastFabric); // this +NV_STATUS __nvoc_down_thunk_MemoryMulticastFabric_memIsReady(struct Memory *pMemoryMulticastFabric, NvBool bCopyConstructorContext); // this +NV_STATUS __nvoc_down_thunk_MemoryMulticastFabric_memControl(struct Memory *pMemoryMulticastFabric, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_down_thunk_MemoryMulticastFabric_memIsGpuMapAllowed(struct Memory *pMemoryMulticastFabric, struct OBJGPU *pGpu); // this +NvBool __nvoc_down_thunk_MemoryMulticastFabric_memIsExportAllowed(struct Memory *pMemoryMulticastFabric); // this +NV_STATUS __nvoc_down_thunk_MemoryMulticastFabric_memGetMapAddrSpace(struct Memory *pMemoryMulticastFabric, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this + // 6 down-thunk(s) defined to bridge methods in MemoryMulticastFabric from superclasses // memorymulticastfabricCanCopy: virtual override (res) base (mem) -static NvBool __nvoc_down_thunk_MemoryMulticastFabric_resCanCopy(struct RsResource *pMemoryMulticastFabric) { +NvBool __nvoc_down_thunk_MemoryMulticastFabric_resCanCopy(struct RsResource *pMemoryMulticastFabric) { return memorymulticastfabricCanCopy((struct MemoryMulticastFabric *)(((unsigned char *) pMemoryMulticastFabric) - __nvoc_rtti_MemoryMulticastFabric_RsResource.offset)); } // memorymulticastfabricIsReady: virtual override (mem) base (mem) -static NV_STATUS __nvoc_down_thunk_MemoryMulticastFabric_memIsReady(struct Memory *pMemoryMulticastFabric, NvBool bCopyConstructorContext) { +NV_STATUS __nvoc_down_thunk_MemoryMulticastFabric_memIsReady(struct Memory *pMemoryMulticastFabric, NvBool bCopyConstructorContext) { return memorymulticastfabricIsReady((struct MemoryMulticastFabric *)(((unsigned char *) pMemoryMulticastFabric) - __nvoc_rtti_MemoryMulticastFabric_Memory.offset), bCopyConstructorContext); } // memorymulticastfabricControl: virtual override (res) base (mem) -static NV_STATUS __nvoc_down_thunk_MemoryMulticastFabric_memControl(struct Memory *pMemoryMulticastFabric, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_down_thunk_MemoryMulticastFabric_memControl(struct Memory *pMemoryMulticastFabric, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return memorymulticastfabricControl((struct MemoryMulticastFabric *)(((unsigned char *) pMemoryMulticastFabric) - __nvoc_rtti_MemoryMulticastFabric_Memory.offset), pCallContext, pParams); } // memorymulticastfabricIsGpuMapAllowed: virtual override (mem) base (mem) -static NvBool __nvoc_down_thunk_MemoryMulticastFabric_memIsGpuMapAllowed(struct Memory *pMemoryMulticastFabric, struct OBJGPU *pGpu) { +NvBool __nvoc_down_thunk_MemoryMulticastFabric_memIsGpuMapAllowed(struct Memory *pMemoryMulticastFabric, struct OBJGPU *pGpu) { return memorymulticastfabricIsGpuMapAllowed((struct MemoryMulticastFabric *)(((unsigned char *) pMemoryMulticastFabric) - __nvoc_rtti_MemoryMulticastFabric_Memory.offset), pGpu); } // memorymulticastfabricIsExportAllowed: virtual override (mem) base (mem) -static NvBool __nvoc_down_thunk_MemoryMulticastFabric_memIsExportAllowed(struct Memory *pMemoryMulticastFabric) { +NvBool __nvoc_down_thunk_MemoryMulticastFabric_memIsExportAllowed(struct Memory *pMemoryMulticastFabric) { return memorymulticastfabricIsExportAllowed((struct MemoryMulticastFabric *)(((unsigned char *) pMemoryMulticastFabric) - __nvoc_rtti_MemoryMulticastFabric_Memory.offset)); } // memorymulticastfabricGetMapAddrSpace: virtual override (mem) base (mem) -static NV_STATUS __nvoc_down_thunk_MemoryMulticastFabric_memGetMapAddrSpace(struct Memory *pMemoryMulticastFabric, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_down_thunk_MemoryMulticastFabric_memGetMapAddrSpace(struct Memory *pMemoryMulticastFabric, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return memorymulticastfabricGetMapAddrSpace((struct MemoryMulticastFabric *)(((unsigned char *) pMemoryMulticastFabric) - __nvoc_rtti_MemoryMulticastFabric_Memory.offset), pCallContext, mapFlags, pAddrSpace); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricIsDuplicate(struct MemoryMulticastFabric *pMemory, NvHandle hMemory, NvBool *pDuplicate); // this +NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricMap(struct MemoryMulticastFabric *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricUnmap(struct MemoryMulticastFabric *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricGetMemInterMapParams(struct MemoryMulticastFabric *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricCheckMemInterUnmap(struct MemoryMulticastFabric *pMemory, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricGetMemoryMappingDescriptor(struct MemoryMulticastFabric *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricCheckCopyPermissions(struct MemoryMulticastFabric *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // this +NvBool __nvoc_up_thunk_RmResource_memorymulticastfabricAccessCallback(struct MemoryMulticastFabric *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_memorymulticastfabricShareCallback(struct MemoryMulticastFabric *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_memorymulticastfabricControlSerialization_Prologue(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_memorymulticastfabricControlSerialization_Epilogue(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_memorymulticastfabricControl_Prologue(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_memorymulticastfabricControl_Epilogue(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RsResource_memorymulticastfabricPreDestruct(struct MemoryMulticastFabric *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_memorymulticastfabricControlFilter(struct MemoryMulticastFabric *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_memorymulticastfabricIsPartialUnmapSupported(struct MemoryMulticastFabric *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_memorymulticastfabricMapTo(struct MemoryMulticastFabric *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_memorymulticastfabricUnmapFrom(struct MemoryMulticastFabric *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_memorymulticastfabricGetRefCount(struct MemoryMulticastFabric *pResource); // this +void __nvoc_up_thunk_RsResource_memorymulticastfabricAddAdditionalDependants(struct RsClient *pClient, struct MemoryMulticastFabric *pResource, RsResourceRef *pReference); // this + // 20 up-thunk(s) defined to bridge methods in MemoryMulticastFabric to superclasses // memorymulticastfabricIsDuplicate: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricIsDuplicate(struct MemoryMulticastFabric *pMemory, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricIsDuplicate(struct MemoryMulticastFabric *pMemory, NvHandle hMemory, NvBool *pDuplicate) { return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryMulticastFabric_Memory.offset), hMemory, pDuplicate); } // memorymulticastfabricMap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricMap(struct MemoryMulticastFabric *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricMap(struct MemoryMulticastFabric *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryMulticastFabric_Memory.offset), pCallContext, pParams, pCpuMapping); } // memorymulticastfabricUnmap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricUnmap(struct MemoryMulticastFabric *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricUnmap(struct MemoryMulticastFabric *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryMulticastFabric_Memory.offset), pCallContext, pCpuMapping); } // memorymulticastfabricGetMemInterMapParams: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricGetMemInterMapParams(struct MemoryMulticastFabric *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricGetMemInterMapParams(struct MemoryMulticastFabric *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryMulticastFabric_Memory.offset), pParams); } // memorymulticastfabricCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricCheckMemInterUnmap(struct MemoryMulticastFabric *pMemory, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricCheckMemInterUnmap(struct MemoryMulticastFabric *pMemory, NvBool bSubdeviceHandleProvided) { return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryMulticastFabric_Memory.offset), bSubdeviceHandleProvided); } // memorymulticastfabricGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricGetMemoryMappingDescriptor(struct MemoryMulticastFabric *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricGetMemoryMappingDescriptor(struct MemoryMulticastFabric *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryMulticastFabric_Memory.offset), ppMemDesc); } // memorymulticastfabricCheckCopyPermissions: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricCheckCopyPermissions(struct MemoryMulticastFabric *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { +NV_STATUS __nvoc_up_thunk_Memory_memorymulticastfabricCheckCopyPermissions(struct MemoryMulticastFabric *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_MemoryMulticastFabric_Memory.offset), pDstGpu, pDstDevice); } // memorymulticastfabricAccessCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_memorymulticastfabricAccessCallback(struct MemoryMulticastFabric *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_memorymulticastfabricAccessCallback(struct MemoryMulticastFabric *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // memorymulticastfabricShareCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_memorymulticastfabricShareCallback(struct MemoryMulticastFabric *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_memorymulticastfabricShareCallback(struct MemoryMulticastFabric *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // memorymulticastfabricControlSerialization_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_memorymulticastfabricControlSerialization_Prologue(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_memorymulticastfabricControlSerialization_Prologue(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RmResource.offset), pCallContext, pParams); } // memorymulticastfabricControlSerialization_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_memorymulticastfabricControlSerialization_Epilogue(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_memorymulticastfabricControlSerialization_Epilogue(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RmResource.offset), pCallContext, pParams); } // memorymulticastfabricControl_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_memorymulticastfabricControl_Prologue(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_memorymulticastfabricControl_Prologue(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RmResource.offset), pCallContext, pParams); } // memorymulticastfabricControl_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_memorymulticastfabricControl_Epilogue(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_memorymulticastfabricControl_Epilogue(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RmResource.offset), pCallContext, pParams); } // memorymulticastfabricPreDestruct: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_memorymulticastfabricPreDestruct(struct MemoryMulticastFabric *pResource) { +void __nvoc_up_thunk_RsResource_memorymulticastfabricPreDestruct(struct MemoryMulticastFabric *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RsResource.offset)); } // memorymulticastfabricControlFilter: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_memorymulticastfabricControlFilter(struct MemoryMulticastFabric *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memorymulticastfabricControlFilter(struct MemoryMulticastFabric *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RsResource.offset), pCallContext, pParams); } // memorymulticastfabricIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body -static NvBool __nvoc_up_thunk_RsResource_memorymulticastfabricIsPartialUnmapSupported(struct MemoryMulticastFabric *pResource) { +NvBool __nvoc_up_thunk_RsResource_memorymulticastfabricIsPartialUnmapSupported(struct MemoryMulticastFabric *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RsResource.offset)); } // memorymulticastfabricMapTo: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_memorymulticastfabricMapTo(struct MemoryMulticastFabric *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memorymulticastfabricMapTo(struct MemoryMulticastFabric *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RsResource.offset), pParams); } // memorymulticastfabricUnmapFrom: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_memorymulticastfabricUnmapFrom(struct MemoryMulticastFabric *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memorymulticastfabricUnmapFrom(struct MemoryMulticastFabric *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RsResource.offset), pParams); } // memorymulticastfabricGetRefCount: virtual inherited (res) base (mem) -static NvU32 __nvoc_up_thunk_RsResource_memorymulticastfabricGetRefCount(struct MemoryMulticastFabric *pResource) { +NvU32 __nvoc_up_thunk_RsResource_memorymulticastfabricGetRefCount(struct MemoryMulticastFabric *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RsResource.offset)); } // memorymulticastfabricAddAdditionalDependants: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_memorymulticastfabricAddAdditionalDependants(struct RsClient *pClient, struct MemoryMulticastFabric *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_memorymulticastfabricAddAdditionalDependants(struct RsClient *pClient, struct MemoryMulticastFabric *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MemoryMulticastFabric_RsResource.offset), pReference); } @@ -383,33 +452,6 @@ NV_STATUS __nvoc_ctor_MemoryMulticastFabric(MemoryMulticastFabric *pThis, CALL_C static void __nvoc_init_funcTable_MemoryMulticastFabric_1(MemoryMulticastFabric *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // memorymulticastfabricCanCopy -- virtual override (res) base (mem) - pThis->__memorymulticastfabricCanCopy__ = &memorymulticastfabricCanCopy_IMPL; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_MemoryMulticastFabric_resCanCopy; - - // memorymulticastfabricCopyConstruct -- virtual override (mem) base (mem) - pThis->__memorymulticastfabricCopyConstruct__ = &memorymulticastfabricCopyConstruct_IMPL; - - // memorymulticastfabricIsReady -- virtual override (mem) base (mem) - pThis->__memorymulticastfabricIsReady__ = &memorymulticastfabricIsReady_IMPL; - pThis->__nvoc_base_Memory.__memIsReady__ = &__nvoc_down_thunk_MemoryMulticastFabric_memIsReady; - - // memorymulticastfabricControl -- virtual override (res) base (mem) - pThis->__memorymulticastfabricControl__ = &memorymulticastfabricControl_IMPL; - pThis->__nvoc_base_Memory.__memControl__ = &__nvoc_down_thunk_MemoryMulticastFabric_memControl; - - // memorymulticastfabricIsGpuMapAllowed -- virtual override (mem) base (mem) - pThis->__memorymulticastfabricIsGpuMapAllowed__ = &memorymulticastfabricIsGpuMapAllowed_IMPL; - pThis->__nvoc_base_Memory.__memIsGpuMapAllowed__ = &__nvoc_down_thunk_MemoryMulticastFabric_memIsGpuMapAllowed; - - // memorymulticastfabricIsExportAllowed -- virtual override (mem) base (mem) - pThis->__memorymulticastfabricIsExportAllowed__ = &memorymulticastfabricIsExportAllowed_IMPL; - pThis->__nvoc_base_Memory.__memIsExportAllowed__ = &__nvoc_down_thunk_MemoryMulticastFabric_memIsExportAllowed; - - // memorymulticastfabricGetMapAddrSpace -- virtual override (mem) base (mem) - pThis->__memorymulticastfabricGetMapAddrSpace__ = &memorymulticastfabricGetMapAddrSpace_IMPL; - pThis->__nvoc_base_Memory.__memGetMapAddrSpace__ = &__nvoc_down_thunk_MemoryMulticastFabric_memGetMapAddrSpace; - // memorymulticastfabricCtrlGetInfo -- exported (id=0xfd0101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__memorymulticastfabricCtrlGetInfo__ = &memorymulticastfabricCtrlGetInfo_IMPL; @@ -444,73 +486,129 @@ static void __nvoc_init_funcTable_MemoryMulticastFabric_1(MemoryMulticastFabric #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) pThis->__memorymulticastfabricCtrlSetFailure__ = &memorymulticastfabricCtrlSetFailure_IMPL; #endif - - // memorymulticastfabricIsDuplicate -- virtual inherited (mem) base (mem) - pThis->__memorymulticastfabricIsDuplicate__ = &__nvoc_up_thunk_Memory_memorymulticastfabricIsDuplicate; - - // memorymulticastfabricMap -- virtual inherited (mem) base (mem) - pThis->__memorymulticastfabricMap__ = &__nvoc_up_thunk_Memory_memorymulticastfabricMap; - - // memorymulticastfabricUnmap -- virtual inherited (mem) base (mem) - pThis->__memorymulticastfabricUnmap__ = &__nvoc_up_thunk_Memory_memorymulticastfabricUnmap; - - // memorymulticastfabricGetMemInterMapParams -- virtual inherited (mem) base (mem) - pThis->__memorymulticastfabricGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_memorymulticastfabricGetMemInterMapParams; - - // memorymulticastfabricCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body - pThis->__memorymulticastfabricCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_memorymulticastfabricCheckMemInterUnmap; - - // memorymulticastfabricGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) - pThis->__memorymulticastfabricGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_memorymulticastfabricGetMemoryMappingDescriptor; - - // memorymulticastfabricCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body - pThis->__memorymulticastfabricCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_memorymulticastfabricCheckCopyPermissions; - - // memorymulticastfabricAccessCallback -- virtual inherited (rmres) base (mem) - pThis->__memorymulticastfabricAccessCallback__ = &__nvoc_up_thunk_RmResource_memorymulticastfabricAccessCallback; - - // memorymulticastfabricShareCallback -- virtual inherited (rmres) base (mem) - pThis->__memorymulticastfabricShareCallback__ = &__nvoc_up_thunk_RmResource_memorymulticastfabricShareCallback; - - // memorymulticastfabricControlSerialization_Prologue -- virtual inherited (rmres) base (mem) - pThis->__memorymulticastfabricControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memorymulticastfabricControlSerialization_Prologue; - - // memorymulticastfabricControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__memorymulticastfabricControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memorymulticastfabricControlSerialization_Epilogue; - - // memorymulticastfabricControl_Prologue -- virtual inherited (rmres) base (mem) - pThis->__memorymulticastfabricControl_Prologue__ = &__nvoc_up_thunk_RmResource_memorymulticastfabricControl_Prologue; - - // memorymulticastfabricControl_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__memorymulticastfabricControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memorymulticastfabricControl_Epilogue; - - // memorymulticastfabricPreDestruct -- virtual inherited (res) base (mem) - pThis->__memorymulticastfabricPreDestruct__ = &__nvoc_up_thunk_RsResource_memorymulticastfabricPreDestruct; - - // memorymulticastfabricControlFilter -- virtual inherited (res) base (mem) - pThis->__memorymulticastfabricControlFilter__ = &__nvoc_up_thunk_RsResource_memorymulticastfabricControlFilter; - - // memorymulticastfabricIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body - pThis->__memorymulticastfabricIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memorymulticastfabricIsPartialUnmapSupported; - - // memorymulticastfabricMapTo -- virtual inherited (res) base (mem) - pThis->__memorymulticastfabricMapTo__ = &__nvoc_up_thunk_RsResource_memorymulticastfabricMapTo; - - // memorymulticastfabricUnmapFrom -- virtual inherited (res) base (mem) - pThis->__memorymulticastfabricUnmapFrom__ = &__nvoc_up_thunk_RsResource_memorymulticastfabricUnmapFrom; - - // memorymulticastfabricGetRefCount -- virtual inherited (res) base (mem) - pThis->__memorymulticastfabricGetRefCount__ = &__nvoc_up_thunk_RsResource_memorymulticastfabricGetRefCount; - - // memorymulticastfabricAddAdditionalDependants -- virtual inherited (res) base (mem) - pThis->__memorymulticastfabricAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memorymulticastfabricAddAdditionalDependants; -} // End __nvoc_init_funcTable_MemoryMulticastFabric_1 with approximately 40 basic block(s). +} // End __nvoc_init_funcTable_MemoryMulticastFabric_1 with approximately 7 basic block(s). // Initialize vtable(s) for 34 virtual method(s). void __nvoc_init_funcTable_MemoryMulticastFabric(MemoryMulticastFabric *pThis) { - // Initialize vtable(s) with 34 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__MemoryMulticastFabric vtable = { + .__memorymulticastfabricCanCopy__ = &memorymulticastfabricCanCopy_IMPL, // virtual override (res) base (mem) + .Memory.__memCanCopy__ = &__nvoc_up_thunk_RsResource_memCanCopy, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_MemoryMulticastFabric_resCanCopy, // virtual + .__memorymulticastfabricCopyConstruct__ = &memorymulticastfabricCopyConstruct_IMPL, // virtual override (mem) base (mem) + .__memorymulticastfabricIsReady__ = &memorymulticastfabricIsReady_IMPL, // virtual override (mem) base (mem) + .Memory.__memIsReady__ = &__nvoc_down_thunk_MemoryMulticastFabric_memIsReady, // virtual + .__memorymulticastfabricControl__ = &memorymulticastfabricControl_IMPL, // virtual override (res) base (mem) + .Memory.__memControl__ = &__nvoc_down_thunk_MemoryMulticastFabric_memControl, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_Memory_resControl, // virtual + .__memorymulticastfabricIsGpuMapAllowed__ = &memorymulticastfabricIsGpuMapAllowed_IMPL, // virtual override (mem) base (mem) + .Memory.__memIsGpuMapAllowed__ = &__nvoc_down_thunk_MemoryMulticastFabric_memIsGpuMapAllowed, // inline virtual body + .__memorymulticastfabricIsExportAllowed__ = &memorymulticastfabricIsExportAllowed_IMPL, // virtual override (mem) base (mem) + .Memory.__memIsExportAllowed__ = &__nvoc_down_thunk_MemoryMulticastFabric_memIsExportAllowed, // inline virtual body + .__memorymulticastfabricGetMapAddrSpace__ = &memorymulticastfabricGetMapAddrSpace_IMPL, // virtual override (mem) base (mem) + .Memory.__memGetMapAddrSpace__ = &__nvoc_down_thunk_MemoryMulticastFabric_memGetMapAddrSpace, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) +#endif + .__memorymulticastfabricIsDuplicate__ = &__nvoc_up_thunk_Memory_memorymulticastfabricIsDuplicate, // virtual inherited (mem) base (mem) + .Memory.__memIsDuplicate__ = &memIsDuplicate_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resIsDuplicate__ = &__nvoc_down_thunk_Memory_resIsDuplicate, // virtual + .__memorymulticastfabricMap__ = &__nvoc_up_thunk_Memory_memorymulticastfabricMap, // virtual inherited (mem) base (mem) + .Memory.__memMap__ = &memMap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_Memory_resMap, // virtual + .__memorymulticastfabricUnmap__ = &__nvoc_up_thunk_Memory_memorymulticastfabricUnmap, // virtual inherited (mem) base (mem) + .Memory.__memUnmap__ = &memUnmap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_Memory_resUnmap, // virtual + .__memorymulticastfabricGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_memorymulticastfabricGetMemInterMapParams, // virtual inherited (mem) base (mem) + .Memory.__memGetMemInterMapParams__ = &memGetMemInterMapParams_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_Memory_rmresGetMemInterMapParams, // virtual + .__memorymulticastfabricCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_memorymulticastfabricCheckMemInterUnmap, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckMemInterUnmap__ = &memCheckMemInterUnmap_ac1694, // inline virtual override (rmres) base (rmres) body + .Memory.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_Memory_rmresCheckMemInterUnmap, // virtual + .__memorymulticastfabricGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_memorymulticastfabricGetMemoryMappingDescriptor, // virtual inherited (mem) base (mem) + .Memory.__memGetMemoryMappingDescriptor__ = &memGetMemoryMappingDescriptor_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor, // virtual + .__memorymulticastfabricCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_memorymulticastfabricCheckCopyPermissions, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckCopyPermissions__ = &memCheckCopyPermissions_ac1694, // inline virtual body + .__memorymulticastfabricAccessCallback__ = &__nvoc_up_thunk_RmResource_memorymulticastfabricAccessCallback, // virtual inherited (rmres) base (mem) + .Memory.__memAccessCallback__ = &__nvoc_up_thunk_RmResource_memAccessCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__memorymulticastfabricShareCallback__ = &__nvoc_up_thunk_RmResource_memorymulticastfabricShareCallback, // virtual inherited (rmres) base (mem) + .Memory.__memShareCallback__ = &__nvoc_up_thunk_RmResource_memShareCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__memorymulticastfabricControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memorymulticastfabricControlSerialization_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__memorymulticastfabricControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memorymulticastfabricControlSerialization_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__memorymulticastfabricControl_Prologue__ = &__nvoc_up_thunk_RmResource_memorymulticastfabricControl_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Prologue__ = &__nvoc_up_thunk_RmResource_memControl_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__memorymulticastfabricControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memorymulticastfabricControl_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memControl_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__memorymulticastfabricPreDestruct__ = &__nvoc_up_thunk_RsResource_memorymulticastfabricPreDestruct, // virtual inherited (res) base (mem) + .Memory.__memPreDestruct__ = &__nvoc_up_thunk_RsResource_memPreDestruct, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__memorymulticastfabricControlFilter__ = &__nvoc_up_thunk_RsResource_memorymulticastfabricControlFilter, // virtual inherited (res) base (mem) + .Memory.__memControlFilter__ = &__nvoc_up_thunk_RsResource_memControlFilter, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__memorymulticastfabricIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memorymulticastfabricIsPartialUnmapSupported, // inline virtual inherited (res) base (mem) body + .Memory.__memIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .Memory.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .Memory.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__memorymulticastfabricMapTo__ = &__nvoc_up_thunk_RsResource_memorymulticastfabricMapTo, // virtual inherited (res) base (mem) + .Memory.__memMapTo__ = &__nvoc_up_thunk_RsResource_memMapTo, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__memorymulticastfabricUnmapFrom__ = &__nvoc_up_thunk_RsResource_memorymulticastfabricUnmapFrom, // virtual inherited (res) base (mem) + .Memory.__memUnmapFrom__ = &__nvoc_up_thunk_RsResource_memUnmapFrom, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__memorymulticastfabricGetRefCount__ = &__nvoc_up_thunk_RsResource_memorymulticastfabricGetRefCount, // virtual inherited (res) base (mem) + .Memory.__memGetRefCount__ = &__nvoc_up_thunk_RsResource_memGetRefCount, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__memorymulticastfabricAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memorymulticastfabricAddAdditionalDependants, // virtual inherited (res) base (mem) + .Memory.__memAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memAddAdditionalDependants, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.Memory.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable = &vtable.Memory.RmResource; // (rmres) super^2 + pThis->__nvoc_base_Memory.__nvoc_vtable = &vtable.Memory; // (mem) super + pThis->__nvoc_vtable = &vtable; // (memorymulticastfabric) this + + // Initialize vtable(s) with 7 per-object function pointer(s). __nvoc_init_funcTable_MemoryMulticastFabric_1(pThis); } diff --git a/src/nvidia/generated/g_mem_multicast_fabric_nvoc.h b/src/nvidia/generated/g_mem_multicast_fabric_nvoc.h index 8253e020d8..8a1d6f76a9 100644 --- a/src/nvidia/generated/g_mem_multicast_fabric_nvoc.h +++ b/src/nvidia/generated/g_mem_multicast_fabric_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -75,10 +75,15 @@ typedef struct mem_multicast_fabric_descriptor MEM_MULTICAST_FABRIC_DESCRIPTOR; #endif +// Metadata including vtable +struct NVOC_VTABLE__MemoryMulticastFabric; + + struct MemoryMulticastFabric { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__MemoryMulticastFabric *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; @@ -91,14 +96,7 @@ struct MemoryMulticastFabric { struct Memory *__nvoc_pbase_Memory; // mem super struct MemoryMulticastFabric *__nvoc_pbase_MemoryMulticastFabric; // memorymulticastfabric - // Vtable with 34 per-object function pointers - NvBool (*__memorymulticastfabricCanCopy__)(struct MemoryMulticastFabric * /*this*/); // virtual override (res) base (mem) - NV_STATUS (*__memorymulticastfabricCopyConstruct__)(struct MemoryMulticastFabric * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); // virtual override (mem) base (mem) - NV_STATUS (*__memorymulticastfabricIsReady__)(struct MemoryMulticastFabric * /*this*/, NvBool); // virtual override (mem) base (mem) - NV_STATUS (*__memorymulticastfabricControl__)(struct MemoryMulticastFabric * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (mem) - NvBool (*__memorymulticastfabricIsGpuMapAllowed__)(struct MemoryMulticastFabric * /*this*/, struct OBJGPU *); // virtual override (mem) base (mem) - NvBool (*__memorymulticastfabricIsExportAllowed__)(struct MemoryMulticastFabric * /*this*/); // virtual override (mem) base (mem) - NV_STATUS (*__memorymulticastfabricGetMapAddrSpace__)(struct MemoryMulticastFabric * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (mem) base (mem) + // Vtable with 7 per-object function pointers NV_STATUS (*__memorymulticastfabricCtrlGetInfo__)(struct MemoryMulticastFabric * /*this*/, NV00FD_CTRL_GET_INFO_PARAMS *); // exported (id=0xfd0101) NV_STATUS (*__memorymulticastfabricCtrlAttachMem__)(struct MemoryMulticastFabric * /*this*/, NV00FD_CTRL_ATTACH_MEM_PARAMS *); // exported (id=0xfd0102) NV_STATUS (*__memorymulticastfabricCtrlDetachMem__)(struct MemoryMulticastFabric * /*this*/, NV00FD_CTRL_DETACH_MEM_PARAMS *); // exported (id=0xfd0105) @@ -106,6 +104,25 @@ struct MemoryMulticastFabric { NV_STATUS (*__memorymulticastfabricCtrlRegisterEvent__)(struct MemoryMulticastFabric * /*this*/, NV00FD_CTRL_REGISTER_EVENT_PARAMS *); // exported (id=0xfd0103) NV_STATUS (*__memorymulticastfabricCtrlAttachRemoteGpu__)(struct MemoryMulticastFabric * /*this*/, NV00FD_CTRL_ATTACH_REMOTE_GPU_PARAMS *); // exported (id=0xfd0106) NV_STATUS (*__memorymulticastfabricCtrlSetFailure__)(struct MemoryMulticastFabric * /*this*/, NV00FD_CTRL_SET_FAILURE_PARAMS *); // exported (id=0xfd0107) + + // Data members + NvU16 expNodeId; + NvBool bImported; + MEM_MULTICAST_FABRIC_DESCRIPTOR *PRIVATE_FIELD(pMulticastFabricDesc); +}; + + +// Metadata including vtable with 27 function pointers plus superclass metadata +struct NVOC_VTABLE__MemoryMulticastFabric { + const struct NVOC_VTABLE__Memory Memory; // (mem) 26 function pointers + + NvBool (*__memorymulticastfabricCanCopy__)(struct MemoryMulticastFabric * /*this*/); // virtual override (res) base (mem) + NV_STATUS (*__memorymulticastfabricCopyConstruct__)(struct MemoryMulticastFabric * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); // virtual override (mem) base (mem) + NV_STATUS (*__memorymulticastfabricIsReady__)(struct MemoryMulticastFabric * /*this*/, NvBool); // virtual override (mem) base (mem) + NV_STATUS (*__memorymulticastfabricControl__)(struct MemoryMulticastFabric * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (mem) + NvBool (*__memorymulticastfabricIsGpuMapAllowed__)(struct MemoryMulticastFabric * /*this*/, struct OBJGPU *); // virtual override (mem) base (mem) + NvBool (*__memorymulticastfabricIsExportAllowed__)(struct MemoryMulticastFabric * /*this*/); // virtual override (mem) base (mem) + NV_STATUS (*__memorymulticastfabricGetMapAddrSpace__)(struct MemoryMulticastFabric * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (mem) base (mem) NV_STATUS (*__memorymulticastfabricIsDuplicate__)(struct MemoryMulticastFabric * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) NV_STATUS (*__memorymulticastfabricMap__)(struct MemoryMulticastFabric * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual inherited (mem) base (mem) NV_STATUS (*__memorymulticastfabricUnmap__)(struct MemoryMulticastFabric * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual inherited (mem) base (mem) @@ -126,11 +143,6 @@ struct MemoryMulticastFabric { NV_STATUS (*__memorymulticastfabricUnmapFrom__)(struct MemoryMulticastFabric * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (mem) NvU32 (*__memorymulticastfabricGetRefCount__)(struct MemoryMulticastFabric * /*this*/); // virtual inherited (res) base (mem) void (*__memorymulticastfabricAddAdditionalDependants__)(struct RsClient *, struct MemoryMulticastFabric * /*this*/, RsResourceRef *); // virtual inherited (res) base (mem) - - // Data members - NvU16 expNodeId; - NvBool bImported; - MEM_MULTICAST_FABRIC_DESCRIPTOR *PRIVATE_FIELD(pMulticastFabricDesc); }; #ifndef __NVOC_CLASS_MemoryMulticastFabric_TYPEDEF__ @@ -163,19 +175,19 @@ NV_STATUS __nvoc_objCreate_MemoryMulticastFabric(MemoryMulticastFabric**, Dynami // Wrapper macros -#define memorymulticastfabricCanCopy_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricCanCopy__ +#define memorymulticastfabricCanCopy_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__nvoc_vtable->__memorymulticastfabricCanCopy__ #define memorymulticastfabricCanCopy(pMemoryMulticastFabric) memorymulticastfabricCanCopy_DISPATCH(pMemoryMulticastFabric) -#define memorymulticastfabricCopyConstruct_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricCopyConstruct__ +#define memorymulticastfabricCopyConstruct_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__nvoc_vtable->__memorymulticastfabricCopyConstruct__ #define memorymulticastfabricCopyConstruct(pMemoryMulticastFabric, pCallContext, pParams) memorymulticastfabricCopyConstruct_DISPATCH(pMemoryMulticastFabric, pCallContext, pParams) -#define memorymulticastfabricIsReady_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricIsReady__ +#define memorymulticastfabricIsReady_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__nvoc_vtable->__memorymulticastfabricIsReady__ #define memorymulticastfabricIsReady(pMemoryMulticastFabric, bCopyConstructorContext) memorymulticastfabricIsReady_DISPATCH(pMemoryMulticastFabric, bCopyConstructorContext) -#define memorymulticastfabricControl_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricControl__ +#define memorymulticastfabricControl_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__nvoc_vtable->__memorymulticastfabricControl__ #define memorymulticastfabricControl(pMemoryMulticastFabric, pCallContext, pParams) memorymulticastfabricControl_DISPATCH(pMemoryMulticastFabric, pCallContext, pParams) -#define memorymulticastfabricIsGpuMapAllowed_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricIsGpuMapAllowed__ +#define memorymulticastfabricIsGpuMapAllowed_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__nvoc_vtable->__memorymulticastfabricIsGpuMapAllowed__ #define memorymulticastfabricIsGpuMapAllowed(pMemoryMulticastFabric, pGpu) memorymulticastfabricIsGpuMapAllowed_DISPATCH(pMemoryMulticastFabric, pGpu) -#define memorymulticastfabricIsExportAllowed_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricIsExportAllowed__ +#define memorymulticastfabricIsExportAllowed_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__nvoc_vtable->__memorymulticastfabricIsExportAllowed__ #define memorymulticastfabricIsExportAllowed(pMemoryMulticastFabric) memorymulticastfabricIsExportAllowed_DISPATCH(pMemoryMulticastFabric) -#define memorymulticastfabricGetMapAddrSpace_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricGetMapAddrSpace__ +#define memorymulticastfabricGetMapAddrSpace_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__nvoc_vtable->__memorymulticastfabricGetMapAddrSpace__ #define memorymulticastfabricGetMapAddrSpace(pMemoryMulticastFabric, pCallContext, mapFlags, pAddrSpace) memorymulticastfabricGetMapAddrSpace_DISPATCH(pMemoryMulticastFabric, pCallContext, mapFlags, pAddrSpace) #define memorymulticastfabricCtrlGetInfo_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricCtrlGetInfo__ #define memorymulticastfabricCtrlGetInfo(pMemoryMulticastFabric, pParams) memorymulticastfabricCtrlGetInfo_DISPATCH(pMemoryMulticastFabric, pParams) @@ -191,74 +203,74 @@ NV_STATUS __nvoc_objCreate_MemoryMulticastFabric(MemoryMulticastFabric**, Dynami #define memorymulticastfabricCtrlAttachRemoteGpu(pMemoryMulticastFabric, pParams) memorymulticastfabricCtrlAttachRemoteGpu_DISPATCH(pMemoryMulticastFabric, pParams) #define memorymulticastfabricCtrlSetFailure_FNPTR(pMemoryMulticastFabric) pMemoryMulticastFabric->__memorymulticastfabricCtrlSetFailure__ #define memorymulticastfabricCtrlSetFailure(pMemoryMulticastFabric, pParams) memorymulticastfabricCtrlSetFailure_DISPATCH(pMemoryMulticastFabric, pParams) -#define memorymulticastfabricIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define memorymulticastfabricIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsDuplicate__ #define memorymulticastfabricIsDuplicate(pMemory, hMemory, pDuplicate) memorymulticastfabricIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define memorymulticastfabricMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define memorymulticastfabricMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memMap__ #define memorymulticastfabricMap(pMemory, pCallContext, pParams, pCpuMapping) memorymulticastfabricMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define memorymulticastfabricUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ +#define memorymulticastfabricUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memUnmap__ #define memorymulticastfabricUnmap(pMemory, pCallContext, pCpuMapping) memorymulticastfabricUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define memorymulticastfabricGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ +#define memorymulticastfabricGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemInterMapParams__ #define memorymulticastfabricGetMemInterMapParams(pMemory, pParams) memorymulticastfabricGetMemInterMapParams_DISPATCH(pMemory, pParams) -#define memorymulticastfabricCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define memorymulticastfabricCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckMemInterUnmap__ #define memorymulticastfabricCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) memorymulticastfabricCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define memorymulticastfabricGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ +#define memorymulticastfabricGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemoryMappingDescriptor__ #define memorymulticastfabricGetMemoryMappingDescriptor(pMemory, ppMemDesc) memorymulticastfabricGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define memorymulticastfabricCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ +#define memorymulticastfabricCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckCopyPermissions__ #define memorymulticastfabricCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) memorymulticastfabricCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define memorymulticastfabricAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define memorymulticastfabricAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define memorymulticastfabricAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) memorymulticastfabricAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define memorymulticastfabricShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define memorymulticastfabricShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define memorymulticastfabricShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) memorymulticastfabricShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define memorymulticastfabricControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define memorymulticastfabricControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define memorymulticastfabricControlSerialization_Prologue(pResource, pCallContext, pParams) memorymulticastfabricControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define memorymulticastfabricControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define memorymulticastfabricControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define memorymulticastfabricControlSerialization_Epilogue(pResource, pCallContext, pParams) memorymulticastfabricControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memorymulticastfabricControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define memorymulticastfabricControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define memorymulticastfabricControl_Prologue(pResource, pCallContext, pParams) memorymulticastfabricControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define memorymulticastfabricControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define memorymulticastfabricControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define memorymulticastfabricControl_Epilogue(pResource, pCallContext, pParams) memorymulticastfabricControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memorymulticastfabricPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define memorymulticastfabricPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define memorymulticastfabricPreDestruct(pResource) memorymulticastfabricPreDestruct_DISPATCH(pResource) -#define memorymulticastfabricControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define memorymulticastfabricControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define memorymulticastfabricControlFilter(pResource, pCallContext, pParams) memorymulticastfabricControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define memorymulticastfabricIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define memorymulticastfabricIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define memorymulticastfabricIsPartialUnmapSupported(pResource) memorymulticastfabricIsPartialUnmapSupported_DISPATCH(pResource) -#define memorymulticastfabricMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define memorymulticastfabricMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define memorymulticastfabricMapTo(pResource, pParams) memorymulticastfabricMapTo_DISPATCH(pResource, pParams) -#define memorymulticastfabricUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define memorymulticastfabricUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define memorymulticastfabricUnmapFrom(pResource, pParams) memorymulticastfabricUnmapFrom_DISPATCH(pResource, pParams) -#define memorymulticastfabricGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define memorymulticastfabricGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define memorymulticastfabricGetRefCount(pResource) memorymulticastfabricGetRefCount_DISPATCH(pResource) -#define memorymulticastfabricAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define memorymulticastfabricAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define memorymulticastfabricAddAdditionalDependants(pClient, pResource, pReference) memorymulticastfabricAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool memorymulticastfabricCanCopy_DISPATCH(struct MemoryMulticastFabric *pMemoryMulticastFabric) { - return pMemoryMulticastFabric->__memorymulticastfabricCanCopy__(pMemoryMulticastFabric); + return pMemoryMulticastFabric->__nvoc_vtable->__memorymulticastfabricCanCopy__(pMemoryMulticastFabric); } static inline NV_STATUS memorymulticastfabricCopyConstruct_DISPATCH(struct MemoryMulticastFabric *pMemoryMulticastFabric, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { - return pMemoryMulticastFabric->__memorymulticastfabricCopyConstruct__(pMemoryMulticastFabric, pCallContext, pParams); + return pMemoryMulticastFabric->__nvoc_vtable->__memorymulticastfabricCopyConstruct__(pMemoryMulticastFabric, pCallContext, pParams); } static inline NV_STATUS memorymulticastfabricIsReady_DISPATCH(struct MemoryMulticastFabric *pMemoryMulticastFabric, NvBool bCopyConstructorContext) { - return pMemoryMulticastFabric->__memorymulticastfabricIsReady__(pMemoryMulticastFabric, bCopyConstructorContext); + return pMemoryMulticastFabric->__nvoc_vtable->__memorymulticastfabricIsReady__(pMemoryMulticastFabric, bCopyConstructorContext); } static inline NV_STATUS memorymulticastfabricControl_DISPATCH(struct MemoryMulticastFabric *pMemoryMulticastFabric, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemoryMulticastFabric->__memorymulticastfabricControl__(pMemoryMulticastFabric, pCallContext, pParams); + return pMemoryMulticastFabric->__nvoc_vtable->__memorymulticastfabricControl__(pMemoryMulticastFabric, pCallContext, pParams); } static inline NvBool memorymulticastfabricIsGpuMapAllowed_DISPATCH(struct MemoryMulticastFabric *pMemoryMulticastFabric, struct OBJGPU *pGpu) { - return pMemoryMulticastFabric->__memorymulticastfabricIsGpuMapAllowed__(pMemoryMulticastFabric, pGpu); + return pMemoryMulticastFabric->__nvoc_vtable->__memorymulticastfabricIsGpuMapAllowed__(pMemoryMulticastFabric, pGpu); } static inline NvBool memorymulticastfabricIsExportAllowed_DISPATCH(struct MemoryMulticastFabric *pMemoryMulticastFabric) { - return pMemoryMulticastFabric->__memorymulticastfabricIsExportAllowed__(pMemoryMulticastFabric); + return pMemoryMulticastFabric->__nvoc_vtable->__memorymulticastfabricIsExportAllowed__(pMemoryMulticastFabric); } static inline NV_STATUS memorymulticastfabricGetMapAddrSpace_DISPATCH(struct MemoryMulticastFabric *pMemoryMulticastFabric, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pMemoryMulticastFabric->__memorymulticastfabricGetMapAddrSpace__(pMemoryMulticastFabric, pCallContext, mapFlags, pAddrSpace); + return pMemoryMulticastFabric->__nvoc_vtable->__memorymulticastfabricGetMapAddrSpace__(pMemoryMulticastFabric, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS memorymulticastfabricCtrlGetInfo_DISPATCH(struct MemoryMulticastFabric *pMemoryMulticastFabric, NV00FD_CTRL_GET_INFO_PARAMS *pParams) { @@ -290,83 +302,83 @@ static inline NV_STATUS memorymulticastfabricCtrlSetFailure_DISPATCH(struct Memo } static inline NV_STATUS memorymulticastfabricIsDuplicate_DISPATCH(struct MemoryMulticastFabric *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__memorymulticastfabricIsDuplicate__(pMemory, hMemory, pDuplicate); + return pMemory->__nvoc_vtable->__memorymulticastfabricIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS memorymulticastfabricMap_DISPATCH(struct MemoryMulticastFabric *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__memorymulticastfabricMap__(pMemory, pCallContext, pParams, pCpuMapping); + return pMemory->__nvoc_vtable->__memorymulticastfabricMap__(pMemory, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS memorymulticastfabricUnmap_DISPATCH(struct MemoryMulticastFabric *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__memorymulticastfabricUnmap__(pMemory, pCallContext, pCpuMapping); + return pMemory->__nvoc_vtable->__memorymulticastfabricUnmap__(pMemory, pCallContext, pCpuMapping); } static inline NV_STATUS memorymulticastfabricGetMemInterMapParams_DISPATCH(struct MemoryMulticastFabric *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__memorymulticastfabricGetMemInterMapParams__(pMemory, pParams); + return pMemory->__nvoc_vtable->__memorymulticastfabricGetMemInterMapParams__(pMemory, pParams); } static inline NV_STATUS memorymulticastfabricCheckMemInterUnmap_DISPATCH(struct MemoryMulticastFabric *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__memorymulticastfabricCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); + return pMemory->__nvoc_vtable->__memorymulticastfabricCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } static inline NV_STATUS memorymulticastfabricGetMemoryMappingDescriptor_DISPATCH(struct MemoryMulticastFabric *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__memorymulticastfabricGetMemoryMappingDescriptor__(pMemory, ppMemDesc); + return pMemory->__nvoc_vtable->__memorymulticastfabricGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } static inline NV_STATUS memorymulticastfabricCheckCopyPermissions_DISPATCH(struct MemoryMulticastFabric *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__memorymulticastfabricCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); + return pMemory->__nvoc_vtable->__memorymulticastfabricCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } static inline NvBool memorymulticastfabricAccessCallback_DISPATCH(struct MemoryMulticastFabric *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__memorymulticastfabricAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__memorymulticastfabricAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool memorymulticastfabricShareCallback_DISPATCH(struct MemoryMulticastFabric *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__memorymulticastfabricShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__memorymulticastfabricShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS memorymulticastfabricControlSerialization_Prologue_DISPATCH(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memorymulticastfabricControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memorymulticastfabricControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void memorymulticastfabricControlSerialization_Epilogue_DISPATCH(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memorymulticastfabricControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__memorymulticastfabricControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS memorymulticastfabricControl_Prologue_DISPATCH(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memorymulticastfabricControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memorymulticastfabricControl_Prologue__(pResource, pCallContext, pParams); } static inline void memorymulticastfabricControl_Epilogue_DISPATCH(struct MemoryMulticastFabric *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memorymulticastfabricControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__memorymulticastfabricControl_Epilogue__(pResource, pCallContext, pParams); } static inline void memorymulticastfabricPreDestruct_DISPATCH(struct MemoryMulticastFabric *pResource) { - pResource->__memorymulticastfabricPreDestruct__(pResource); + pResource->__nvoc_vtable->__memorymulticastfabricPreDestruct__(pResource); } static inline NV_STATUS memorymulticastfabricControlFilter_DISPATCH(struct MemoryMulticastFabric *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memorymulticastfabricControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memorymulticastfabricControlFilter__(pResource, pCallContext, pParams); } static inline NvBool memorymulticastfabricIsPartialUnmapSupported_DISPATCH(struct MemoryMulticastFabric *pResource) { - return pResource->__memorymulticastfabricIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__memorymulticastfabricIsPartialUnmapSupported__(pResource); } static inline NV_STATUS memorymulticastfabricMapTo_DISPATCH(struct MemoryMulticastFabric *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__memorymulticastfabricMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__memorymulticastfabricMapTo__(pResource, pParams); } static inline NV_STATUS memorymulticastfabricUnmapFrom_DISPATCH(struct MemoryMulticastFabric *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__memorymulticastfabricUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__memorymulticastfabricUnmapFrom__(pResource, pParams); } static inline NvU32 memorymulticastfabricGetRefCount_DISPATCH(struct MemoryMulticastFabric *pResource) { - return pResource->__memorymulticastfabricGetRefCount__(pResource); + return pResource->__nvoc_vtable->__memorymulticastfabricGetRefCount__(pResource); } static inline void memorymulticastfabricAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MemoryMulticastFabric *pResource, RsResourceRef *pReference) { - pResource->__memorymulticastfabricAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__memorymulticastfabricAddAdditionalDependants__(pClient, pResource, pReference); } NvBool memorymulticastfabricCanCopy_IMPL(struct MemoryMulticastFabric *pMemoryMulticastFabric); diff --git a/src/nvidia/generated/g_mem_nvoc.c b/src/nvidia/generated/g_mem_nvoc.c index a331122ba0..e68fb96190 100644 --- a/src/nvidia/generated/g_mem_nvoc.c +++ b/src/nvidia/generated/g_mem_nvoc.c @@ -198,113 +198,156 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Memory[] }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate); // this +NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // this + // 7 down-thunk(s) defined to bridge methods in Memory from superclasses // memIsDuplicate: virtual override (res) base (rmres) -static NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate) { return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) - __nvoc_rtti_Memory_RsResource.offset), hMemory, pDuplicate); } // memControl: virtual override (res) base (rmres) -static NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return memControl((struct Memory *)(((unsigned char *) pMemory) - __nvoc_rtti_Memory_RsResource.offset), pCallContext, pParams); } // memMap: virtual override (res) base (rmres) -static NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return memMap((struct Memory *)(((unsigned char *) pMemory) - __nvoc_rtti_Memory_RsResource.offset), pCallContext, pParams, pCpuMapping); } // memUnmap: virtual override (res) base (rmres) -static NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return memUnmap((struct Memory *)(((unsigned char *) pMemory) - __nvoc_rtti_Memory_RsResource.offset), pCallContext, pCpuMapping); } // memGetMemInterMapParams: virtual override (rmres) base (rmres) -static NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) - __nvoc_rtti_Memory_RmResource.offset), pParams); } // memCheckMemInterUnmap: inline virtual override (rmres) base (rmres) body -static NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided) { return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) - __nvoc_rtti_Memory_RmResource.offset), bSubdeviceHandleProvided); } // memGetMemoryMappingDescriptor: virtual override (rmres) base (rmres) -static NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) - __nvoc_rtti_Memory_RmResource.offset), ppMemDesc); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource); // this +void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource); // this +void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference); // this + // 14 up-thunk(s) defined to bridge methods in Memory to superclasses // memAccessCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // memShareCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // memControlSerialization_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RmResource.offset), pCallContext, pParams); } // memControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RmResource.offset), pCallContext, pParams); } // memControl_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RmResource.offset), pCallContext, pParams); } // memControl_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RmResource.offset), pCallContext, pParams); } // memCanCopy: virtual inherited (res) base (rmres) -static NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource) { +NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RsResource.offset)); } // memPreDestruct: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource) { +void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RsResource.offset)); } // memControlFilter: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RsResource.offset), pCallContext, pParams); } // memIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body -static NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource) { +NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RsResource.offset)); } // memMapTo: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RsResource.offset), pParams); } // memUnmapFrom: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RsResource.offset), pParams); } // memGetRefCount: virtual inherited (res) base (rmres) -static NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource) { +NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RsResource.offset)); } // memAddAdditionalDependants: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Memory_RsResource.offset), pReference); } @@ -349,49 +392,6 @@ NV_STATUS __nvoc_ctor_Memory(Memory *pThis, CALL_CONTEXT * arg_pCallContext, str static void __nvoc_init_funcTable_Memory_1(Memory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // memIsDuplicate -- virtual override (res) base (rmres) - pThis->__memIsDuplicate__ = &memIsDuplicate_IMPL; - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ = &__nvoc_down_thunk_Memory_resIsDuplicate; - - // memGetMapAddrSpace -- virtual - pThis->__memGetMapAddrSpace__ = &memGetMapAddrSpace_IMPL; - - // memControl -- virtual override (res) base (rmres) - pThis->__memControl__ = &memControl_IMPL; - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ = &__nvoc_down_thunk_Memory_resControl; - - // memMap -- virtual override (res) base (rmres) - pThis->__memMap__ = &memMap_IMPL; - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ = &__nvoc_down_thunk_Memory_resMap; - - // memUnmap -- virtual override (res) base (rmres) - pThis->__memUnmap__ = &memUnmap_IMPL; - pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ = &__nvoc_down_thunk_Memory_resUnmap; - - // memGetMemInterMapParams -- virtual override (rmres) base (rmres) - pThis->__memGetMemInterMapParams__ = &memGetMemInterMapParams_IMPL; - pThis->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_Memory_rmresGetMemInterMapParams; - - // memCheckMemInterUnmap -- inline virtual override (rmres) base (rmres) body - pThis->__memCheckMemInterUnmap__ = &memCheckMemInterUnmap_ac1694; - pThis->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_Memory_rmresCheckMemInterUnmap; - - // memGetMemoryMappingDescriptor -- virtual override (rmres) base (rmres) - pThis->__memGetMemoryMappingDescriptor__ = &memGetMemoryMappingDescriptor_IMPL; - pThis->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor; - - // memCheckCopyPermissions -- inline virtual body - pThis->__memCheckCopyPermissions__ = &memCheckCopyPermissions_ac1694; - - // memIsReady -- virtual - pThis->__memIsReady__ = &memIsReady_IMPL; - - // memIsGpuMapAllowed -- inline virtual body - pThis->__memIsGpuMapAllowed__ = &memIsGpuMapAllowed_0c883b; - - // memIsExportAllowed -- inline virtual body - pThis->__memIsExportAllowed__ = &memIsExportAllowed_0c883b; - // memCtrlCmdGetSurfaceCompressionCoverageLvm -- exported (id=0x410112) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x208u) pThis->__memCtrlCmdGetSurfaceCompressionCoverageLvm__ = &memCtrlCmdGetSurfaceCompressionCoverageLvm_IMPL; @@ -426,55 +426,101 @@ static void __nvoc_init_funcTable_Memory_1(Memory *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__memCtrlCmdGetSurfacePhysAttrLvm__ = &memCtrlCmdGetSurfacePhysAttrLvm_IMPL; #endif - - // memAccessCallback -- virtual inherited (rmres) base (rmres) - pThis->__memAccessCallback__ = &__nvoc_up_thunk_RmResource_memAccessCallback; - - // memShareCallback -- virtual inherited (rmres) base (rmres) - pThis->__memShareCallback__ = &__nvoc_up_thunk_RmResource_memShareCallback; - - // memControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__memControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Prologue; - - // memControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__memControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Epilogue; - - // memControl_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__memControl_Prologue__ = &__nvoc_up_thunk_RmResource_memControl_Prologue; - - // memControl_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__memControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memControl_Epilogue; - - // memCanCopy -- virtual inherited (res) base (rmres) - pThis->__memCanCopy__ = &__nvoc_up_thunk_RsResource_memCanCopy; - - // memPreDestruct -- virtual inherited (res) base (rmres) - pThis->__memPreDestruct__ = &__nvoc_up_thunk_RsResource_memPreDestruct; - - // memControlFilter -- virtual inherited (res) base (rmres) - pThis->__memControlFilter__ = &__nvoc_up_thunk_RsResource_memControlFilter; - - // memIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body - pThis->__memIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memIsPartialUnmapSupported; - - // memMapTo -- virtual inherited (res) base (rmres) - pThis->__memMapTo__ = &__nvoc_up_thunk_RsResource_memMapTo; - - // memUnmapFrom -- virtual inherited (res) base (rmres) - pThis->__memUnmapFrom__ = &__nvoc_up_thunk_RsResource_memUnmapFrom; - - // memGetRefCount -- virtual inherited (res) base (rmres) - pThis->__memGetRefCount__ = &__nvoc_up_thunk_RsResource_memGetRefCount; - - // memAddAdditionalDependants -- virtual inherited (res) base (rmres) - pThis->__memAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memAddAdditionalDependants; -} // End __nvoc_init_funcTable_Memory_1 with approximately 40 basic block(s). +} // End __nvoc_init_funcTable_Memory_1 with approximately 7 basic block(s). // Initialize vtable(s) for 33 virtual method(s). void __nvoc_init_funcTable_Memory(Memory *pThis) { - // Initialize vtable(s) with 33 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__Memory vtable = { + .__memIsDuplicate__ = &memIsDuplicate_IMPL, // virtual override (res) base (rmres) + .RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .RmResource.RsResource.__resIsDuplicate__ = &__nvoc_down_thunk_Memory_resIsDuplicate, // virtual + .__memGetMapAddrSpace__ = &memGetMapAddrSpace_IMPL, // virtual + .__memControl__ = &memControl_IMPL, // virtual override (res) base (rmres) + .RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_Memory_resControl, // virtual + .__memMap__ = &memMap_IMPL, // virtual override (res) base (rmres) + .RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_Memory_resMap, // virtual + .__memUnmap__ = &memUnmap_IMPL, // virtual override (res) base (rmres) + .RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_Memory_resUnmap, // virtual + .__memGetMemInterMapParams__ = &memGetMemInterMapParams_IMPL, // virtual override (rmres) base (rmres) + .RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_Memory_rmresGetMemInterMapParams, // virtual + .__memCheckMemInterUnmap__ = &memCheckMemInterUnmap_ac1694, // inline virtual override (rmres) base (rmres) body + .RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_Memory_rmresCheckMemInterUnmap, // virtual + .__memGetMemoryMappingDescriptor__ = &memGetMemoryMappingDescriptor_IMPL, // virtual override (rmres) base (rmres) + .RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor, // virtual + .__memCheckCopyPermissions__ = &memCheckCopyPermissions_ac1694, // inline virtual body + .__memIsReady__ = &memIsReady_IMPL, // virtual + .__memIsGpuMapAllowed__ = &memIsGpuMapAllowed_e661f0, // inline virtual body + .__memIsExportAllowed__ = &memIsExportAllowed_e661f0, // inline virtual body +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x208u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif + .__memAccessCallback__ = &__nvoc_up_thunk_RmResource_memAccessCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__memShareCallback__ = &__nvoc_up_thunk_RmResource_memShareCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__memControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__memControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__memControl_Prologue__ = &__nvoc_up_thunk_RmResource_memControl_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__memControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memControl_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__memCanCopy__ = &__nvoc_up_thunk_RsResource_memCanCopy, // virtual inherited (res) base (rmres) + .RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__memPreDestruct__ = &__nvoc_up_thunk_RsResource_memPreDestruct, // virtual inherited (res) base (rmres) + .RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__memControlFilter__ = &__nvoc_up_thunk_RsResource_memControlFilter, // virtual inherited (res) base (rmres) + .RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__memIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__memMapTo__ = &__nvoc_up_thunk_RsResource_memMapTo, // virtual inherited (res) base (rmres) + .RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__memUnmapFrom__ = &__nvoc_up_thunk_RsResource_memUnmapFrom, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__memGetRefCount__ = &__nvoc_up_thunk_RsResource_memGetRefCount, // virtual inherited (res) base (rmres) + .RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__memAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memAddAdditionalDependants, // virtual inherited (res) base (rmres) + .RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.RmResource.RsResource; // (res) super^2 + pThis->__nvoc_base_RmResource.__nvoc_vtable = &vtable.RmResource; // (rmres) super + pThis->__nvoc_vtable = &vtable; // (mem) this + + // Initialize vtable(s) with 7 per-object function pointer(s). __nvoc_init_funcTable_Memory_1(pThis); } diff --git a/src/nvidia/generated/g_mem_nvoc.h b/src/nvidia/generated/g_mem_nvoc.h index c5f5d234fd..99727f15a1 100644 --- a/src/nvidia/generated/g_mem_nvoc.h +++ b/src/nvidia/generated/g_mem_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -132,7 +132,6 @@ typedef struct _def_client_vgpu_ns_intr NvU64 guestDomainId; // guest ID that we need to use to inject interrupt NvU64 guestMSIAddr; // MSI address allocated by guest OS NvU32 guestMSIData; // MSI data value set by guest OS - void *pVgpuVfioRef; // Reference to vgpu device in nvidia-vgpu-vfio module void *pEventDpc; // DPC event to pass the interrupt } VGPU_NS_INTR; @@ -159,10 +158,15 @@ typedef struct #endif +// Metadata including vtable +struct NVOC_VTABLE__Memory; + + struct Memory { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__Memory *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; @@ -174,19 +178,7 @@ struct Memory { struct RmResource *__nvoc_pbase_RmResource; // rmres super struct Memory *__nvoc_pbase_Memory; // mem - // Vtable with 33 per-object function pointers - NV_STATUS (*__memIsDuplicate__)(struct Memory * /*this*/, NvHandle, NvBool *); // virtual override (res) base (rmres) - NV_STATUS (*__memGetMapAddrSpace__)(struct Memory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual - NV_STATUS (*__memControl__)(struct Memory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (rmres) - NV_STATUS (*__memMap__)(struct Memory * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual override (res) base (rmres) - NV_STATUS (*__memUnmap__)(struct Memory * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual override (res) base (rmres) - NV_STATUS (*__memGetMemInterMapParams__)(struct Memory * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual override (rmres) base (rmres) - NV_STATUS (*__memCheckMemInterUnmap__)(struct Memory * /*this*/, NvBool); // inline virtual override (rmres) base (rmres) body - NV_STATUS (*__memGetMemoryMappingDescriptor__)(struct Memory * /*this*/, MEMORY_DESCRIPTOR **); // virtual override (rmres) base (rmres) - NV_STATUS (*__memCheckCopyPermissions__)(struct Memory * /*this*/, struct OBJGPU *, struct Device *); // inline virtual body - NV_STATUS (*__memIsReady__)(struct Memory * /*this*/, NvBool); // virtual - NvBool (*__memIsGpuMapAllowed__)(struct Memory * /*this*/, struct OBJGPU *); // inline virtual body - NvBool (*__memIsExportAllowed__)(struct Memory * /*this*/); // inline virtual body + // Vtable with 7 per-object function pointers NV_STATUS (*__memCtrlCmdGetSurfaceCompressionCoverageLvm__)(struct Memory * /*this*/, NV0041_CTRL_GET_SURFACE_COMPRESSION_COVERAGE_PARAMS *); // exported (id=0x410112) NV_STATUS (*__memCtrlCmdGetSurfaceInfoLvm__)(struct Memory * /*this*/, NV0041_CTRL_GET_SURFACE_INFO_PARAMS *); // exported (id=0x410110) NV_STATUS (*__memCtrlCmdSurfaceFlushGpuCache__)(struct Memory * /*this*/, NV0041_CTRL_SURFACE_FLUSH_GPU_CACHE_PARAMS *); // exported (id=0x410116) @@ -194,20 +186,6 @@ struct Memory { NV_STATUS (*__memCtrlCmdSetTag__)(struct Memory * /*this*/, NV0041_CTRL_CMD_SET_TAG_PARAMS *); // exported (id=0x410120) NV_STATUS (*__memCtrlCmdGetTag__)(struct Memory * /*this*/, NV0041_CTRL_CMD_GET_TAG_PARAMS *); // exported (id=0x410121) NV_STATUS (*__memCtrlCmdGetSurfacePhysAttrLvm__)(struct Memory * /*this*/, NV0041_CTRL_GET_SURFACE_PHYS_ATTR_PARAMS *); // exported (id=0x410103) - NvBool (*__memAccessCallback__)(struct Memory * /*this*/, RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) - NvBool (*__memShareCallback__)(struct Memory * /*this*/, RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) - NV_STATUS (*__memControlSerialization_Prologue__)(struct Memory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) - void (*__memControlSerialization_Epilogue__)(struct Memory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) - NV_STATUS (*__memControl_Prologue__)(struct Memory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) - void (*__memControl_Epilogue__)(struct Memory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) - NvBool (*__memCanCopy__)(struct Memory * /*this*/); // virtual inherited (res) base (rmres) - void (*__memPreDestruct__)(struct Memory * /*this*/); // virtual inherited (res) base (rmres) - NV_STATUS (*__memControlFilter__)(struct Memory * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) - NvBool (*__memIsPartialUnmapSupported__)(struct Memory * /*this*/); // inline virtual inherited (res) base (rmres) body - NV_STATUS (*__memMapTo__)(struct Memory * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (rmres) - NV_STATUS (*__memUnmapFrom__)(struct Memory * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) - NvU32 (*__memGetRefCount__)(struct Memory * /*this*/); // virtual inherited (res) base (rmres) - void (*__memAddAdditionalDependants__)(struct RsClient *, struct Memory * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) // Data members NvBool bConstructed; @@ -240,6 +218,39 @@ struct Memory { VGPU_NS_INTR vgpuNsIntr; }; + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__Memory { + const struct NVOC_VTABLE__RmResource RmResource; // (rmres) 21 function pointers + + NV_STATUS (*__memIsDuplicate__)(struct Memory * /*this*/, NvHandle, NvBool *); // virtual override (res) base (rmres) + NV_STATUS (*__memGetMapAddrSpace__)(struct Memory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual + NV_STATUS (*__memControl__)(struct Memory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (rmres) + NV_STATUS (*__memMap__)(struct Memory * /*this*/, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *); // virtual override (res) base (rmres) + NV_STATUS (*__memUnmap__)(struct Memory * /*this*/, CALL_CONTEXT *, RsCpuMapping *); // virtual override (res) base (rmres) + NV_STATUS (*__memGetMemInterMapParams__)(struct Memory * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual override (rmres) base (rmres) + NV_STATUS (*__memCheckMemInterUnmap__)(struct Memory * /*this*/, NvBool); // inline virtual override (rmres) base (rmres) body + NV_STATUS (*__memGetMemoryMappingDescriptor__)(struct Memory * /*this*/, MEMORY_DESCRIPTOR **); // virtual override (rmres) base (rmres) + NV_STATUS (*__memCheckCopyPermissions__)(struct Memory * /*this*/, struct OBJGPU *, struct Device *); // inline virtual body + NV_STATUS (*__memIsReady__)(struct Memory * /*this*/, NvBool); // virtual + NvBool (*__memIsGpuMapAllowed__)(struct Memory * /*this*/, struct OBJGPU *); // inline virtual body + NvBool (*__memIsExportAllowed__)(struct Memory * /*this*/); // inline virtual body + NvBool (*__memAccessCallback__)(struct Memory * /*this*/, RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) + NvBool (*__memShareCallback__)(struct Memory * /*this*/, RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__memControlSerialization_Prologue__)(struct Memory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__memControlSerialization_Epilogue__)(struct Memory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NV_STATUS (*__memControl_Prologue__)(struct Memory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + void (*__memControl_Epilogue__)(struct Memory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (rmres) + NvBool (*__memCanCopy__)(struct Memory * /*this*/); // virtual inherited (res) base (rmres) + void (*__memPreDestruct__)(struct Memory * /*this*/); // virtual inherited (res) base (rmres) + NV_STATUS (*__memControlFilter__)(struct Memory * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (rmres) + NvBool (*__memIsPartialUnmapSupported__)(struct Memory * /*this*/); // inline virtual inherited (res) base (rmres) body + NV_STATUS (*__memMapTo__)(struct Memory * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (rmres) + NV_STATUS (*__memUnmapFrom__)(struct Memory * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) + NvU32 (*__memGetRefCount__)(struct Memory * /*this*/); // virtual inherited (res) base (rmres) + void (*__memAddAdditionalDependants__)(struct RsClient *, struct Memory * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) +}; + #ifndef __NVOC_CLASS_Memory_TYPEDEF__ #define __NVOC_CLASS_Memory_TYPEDEF__ typedef struct Memory Memory; @@ -270,29 +281,29 @@ NV_STATUS __nvoc_objCreate_Memory(Memory**, Dynamic*, NvU32, CALL_CONTEXT * arg_ // Wrapper macros -#define memIsDuplicate_FNPTR(pMemory) pMemory->__memIsDuplicate__ +#define memIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_vtable->__memIsDuplicate__ #define memIsDuplicate(pMemory, hMemory, pDuplicate) memIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define memGetMapAddrSpace_FNPTR(pMemory) pMemory->__memGetMapAddrSpace__ +#define memGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_vtable->__memGetMapAddrSpace__ #define memGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) memGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define memControl_FNPTR(pMemory) pMemory->__memControl__ +#define memControl_FNPTR(pMemory) pMemory->__nvoc_vtable->__memControl__ #define memControl(pMemory, pCallContext, pParams) memControl_DISPATCH(pMemory, pCallContext, pParams) -#define memMap_FNPTR(pMemory) pMemory->__memMap__ +#define memMap_FNPTR(pMemory) pMemory->__nvoc_vtable->__memMap__ #define memMap(pMemory, pCallContext, pParams, pCpuMapping) memMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define memUnmap_FNPTR(pMemory) pMemory->__memUnmap__ +#define memUnmap_FNPTR(pMemory) pMemory->__nvoc_vtable->__memUnmap__ #define memUnmap(pMemory, pCallContext, pCpuMapping) memUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define memGetMemInterMapParams_FNPTR(pMemory) pMemory->__memGetMemInterMapParams__ +#define memGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_vtable->__memGetMemInterMapParams__ #define memGetMemInterMapParams(pMemory, pParams) memGetMemInterMapParams_DISPATCH(pMemory, pParams) -#define memCheckMemInterUnmap_FNPTR(pMemory) pMemory->__memCheckMemInterUnmap__ +#define memCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_vtable->__memCheckMemInterUnmap__ #define memCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) memCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define memGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__memGetMemoryMappingDescriptor__ +#define memGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_vtable->__memGetMemoryMappingDescriptor__ #define memGetMemoryMappingDescriptor(pMemory, ppMemDesc) memGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define memCheckCopyPermissions_FNPTR(pMemory) pMemory->__memCheckCopyPermissions__ +#define memCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_vtable->__memCheckCopyPermissions__ #define memCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) memCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define memIsReady_FNPTR(pMemory) pMemory->__memIsReady__ +#define memIsReady_FNPTR(pMemory) pMemory->__nvoc_vtable->__memIsReady__ #define memIsReady(pMemory, bCopyConstructorContext) memIsReady_DISPATCH(pMemory, bCopyConstructorContext) -#define memIsGpuMapAllowed_FNPTR(pMemory) pMemory->__memIsGpuMapAllowed__ +#define memIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_vtable->__memIsGpuMapAllowed__ #define memIsGpuMapAllowed(pMemory, pGpu) memIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define memIsExportAllowed_FNPTR(pMemory) pMemory->__memIsExportAllowed__ +#define memIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_vtable->__memIsExportAllowed__ #define memIsExportAllowed(pMemory) memIsExportAllowed_DISPATCH(pMemory) #define memCtrlCmdGetSurfaceCompressionCoverageLvm_FNPTR(pMemory) pMemory->__memCtrlCmdGetSurfaceCompressionCoverageLvm__ #define memCtrlCmdGetSurfaceCompressionCoverageLvm(pMemory, pParams) memCtrlCmdGetSurfaceCompressionCoverageLvm_DISPATCH(pMemory, pParams) @@ -308,82 +319,82 @@ NV_STATUS __nvoc_objCreate_Memory(Memory**, Dynamic*, NvU32, CALL_CONTEXT * arg_ #define memCtrlCmdGetTag(pMemory, pParams) memCtrlCmdGetTag_DISPATCH(pMemory, pParams) #define memCtrlCmdGetSurfacePhysAttrLvm_FNPTR(pMemory) pMemory->__memCtrlCmdGetSurfacePhysAttrLvm__ #define memCtrlCmdGetSurfacePhysAttrLvm(pMemory, pGPAP) memCtrlCmdGetSurfacePhysAttrLvm_DISPATCH(pMemory, pGPAP) -#define memAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define memAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define memAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) memAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define memShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ +#define memShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define memShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) memShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define memControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define memControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define memControlSerialization_Prologue(pResource, pCallContext, pParams) memControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define memControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define memControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define memControlSerialization_Epilogue(pResource, pCallContext, pParams) memControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ +#define memControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define memControl_Prologue(pResource, pCallContext, pParams) memControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define memControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define memControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define memControl_Epilogue(pResource, pCallContext, pParams) memControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define memCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define memCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define memCanCopy(pResource) memCanCopy_DISPATCH(pResource) -#define memPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define memPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define memPreDestruct(pResource) memPreDestruct_DISPATCH(pResource) -#define memControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define memControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define memControlFilter(pResource, pCallContext, pParams) memControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define memIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define memIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define memIsPartialUnmapSupported(pResource) memIsPartialUnmapSupported_DISPATCH(pResource) -#define memMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define memMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define memMapTo(pResource, pParams) memMapTo_DISPATCH(pResource, pParams) -#define memUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define memUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define memUnmapFrom(pResource, pParams) memUnmapFrom_DISPATCH(pResource, pParams) -#define memGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define memGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define memGetRefCount(pResource) memGetRefCount_DISPATCH(pResource) -#define memAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define memAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define memAddAdditionalDependants(pClient, pResource, pReference) memAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NV_STATUS memIsDuplicate_DISPATCH(struct Memory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__memIsDuplicate__(pMemory, hMemory, pDuplicate); + return pMemory->__nvoc_vtable->__memIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS memGetMapAddrSpace_DISPATCH(struct Memory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pMemory->__memGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); + return pMemory->__nvoc_vtable->__memGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS memControl_DISPATCH(struct Memory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__memControl__(pMemory, pCallContext, pParams); + return pMemory->__nvoc_vtable->__memControl__(pMemory, pCallContext, pParams); } static inline NV_STATUS memMap_DISPATCH(struct Memory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__memMap__(pMemory, pCallContext, pParams, pCpuMapping); + return pMemory->__nvoc_vtable->__memMap__(pMemory, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS memUnmap_DISPATCH(struct Memory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__memUnmap__(pMemory, pCallContext, pCpuMapping); + return pMemory->__nvoc_vtable->__memUnmap__(pMemory, pCallContext, pCpuMapping); } static inline NV_STATUS memGetMemInterMapParams_DISPATCH(struct Memory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__memGetMemInterMapParams__(pMemory, pParams); + return pMemory->__nvoc_vtable->__memGetMemInterMapParams__(pMemory, pParams); } static inline NV_STATUS memCheckMemInterUnmap_DISPATCH(struct Memory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__memCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); + return pMemory->__nvoc_vtable->__memCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } static inline NV_STATUS memGetMemoryMappingDescriptor_DISPATCH(struct Memory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__memGetMemoryMappingDescriptor__(pMemory, ppMemDesc); + return pMemory->__nvoc_vtable->__memGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } static inline NV_STATUS memCheckCopyPermissions_DISPATCH(struct Memory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__memCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); + return pMemory->__nvoc_vtable->__memCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } static inline NV_STATUS memIsReady_DISPATCH(struct Memory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__memIsReady__(pMemory, bCopyConstructorContext); + return pMemory->__nvoc_vtable->__memIsReady__(pMemory, bCopyConstructorContext); } static inline NvBool memIsGpuMapAllowed_DISPATCH(struct Memory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__memIsGpuMapAllowed__(pMemory, pGpu); + return pMemory->__nvoc_vtable->__memIsGpuMapAllowed__(pMemory, pGpu); } static inline NvBool memIsExportAllowed_DISPATCH(struct Memory *pMemory) { - return pMemory->__memIsExportAllowed__(pMemory); + return pMemory->__nvoc_vtable->__memIsExportAllowed__(pMemory); } static inline NV_STATUS memCtrlCmdGetSurfaceCompressionCoverageLvm_DISPATCH(struct Memory *pMemory, NV0041_CTRL_GET_SURFACE_COMPRESSION_COVERAGE_PARAMS *pParams) { @@ -415,59 +426,59 @@ static inline NV_STATUS memCtrlCmdGetSurfacePhysAttrLvm_DISPATCH(struct Memory * } static inline NvBool memAccessCallback_DISPATCH(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__memAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__memAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool memShareCallback_DISPATCH(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__memShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__memShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS memControlSerialization_Prologue_DISPATCH(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void memControlSerialization_Epilogue_DISPATCH(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__memControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS memControl_Prologue_DISPATCH(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memControl_Prologue__(pResource, pCallContext, pParams); } static inline void memControl_Epilogue_DISPATCH(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__memControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__memControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool memCanCopy_DISPATCH(struct Memory *pResource) { - return pResource->__memCanCopy__(pResource); + return pResource->__nvoc_vtable->__memCanCopy__(pResource); } static inline void memPreDestruct_DISPATCH(struct Memory *pResource) { - pResource->__memPreDestruct__(pResource); + pResource->__nvoc_vtable->__memPreDestruct__(pResource); } static inline NV_STATUS memControlFilter_DISPATCH(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__memControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__memControlFilter__(pResource, pCallContext, pParams); } static inline NvBool memIsPartialUnmapSupported_DISPATCH(struct Memory *pResource) { - return pResource->__memIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__memIsPartialUnmapSupported__(pResource); } static inline NV_STATUS memMapTo_DISPATCH(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__memMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__memMapTo__(pResource, pParams); } static inline NV_STATUS memUnmapFrom_DISPATCH(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__memUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__memUnmapFrom__(pResource, pParams); } static inline NvU32 memGetRefCount_DISPATCH(struct Memory *pResource) { - return pResource->__memGetRefCount__(pResource); + return pResource->__nvoc_vtable->__memGetRefCount__(pResource); } static inline void memAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference) { - pResource->__memAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__memAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS memIsDuplicate_IMPL(struct Memory *pMemory, NvHandle hMemory, NvBool *pDuplicate); @@ -494,12 +505,12 @@ static inline NV_STATUS memCheckCopyPermissions_ac1694(struct Memory *pMemory, s NV_STATUS memIsReady_IMPL(struct Memory *pMemory, NvBool bCopyConstructorContext); -static inline NvBool memIsGpuMapAllowed_0c883b(struct Memory *pMemory, struct OBJGPU *pGpu) { - return ((NvBool)(0 == 0)); +static inline NvBool memIsGpuMapAllowed_e661f0(struct Memory *pMemory, struct OBJGPU *pGpu) { + return NV_TRUE; } -static inline NvBool memIsExportAllowed_0c883b(struct Memory *pMemory) { - return ((NvBool)(0 == 0)); +static inline NvBool memIsExportAllowed_e661f0(struct Memory *pMemory) { + return NV_TRUE; } NV_STATUS memCtrlCmdGetSurfaceCompressionCoverageLvm_IMPL(struct Memory *pMemory, NV0041_CTRL_GET_SURFACE_COMPRESSION_COVERAGE_PARAMS *pParams); diff --git a/src/nvidia/generated/g_mig_config_session_nvoc.c b/src/nvidia/generated/g_mig_config_session_nvoc.c index 93d11b44a7..00cd1ebe2a 100644 --- a/src/nvidia/generated/g_mig_config_session_nvoc.c +++ b/src/nvidia/generated/g_mig_config_session_nvoc.c @@ -84,110 +84,153 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_MIGConfigSession = /*pExportInfo=*/ &__nvoc_export_info_MIGConfigSession }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_RmResource_migconfigsessionAccessCallback(struct MIGConfigSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_migconfigsessionShareCallback(struct MIGConfigSession *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_migconfigsessionGetMemInterMapParams(struct MIGConfigSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_migconfigsessionCheckMemInterUnmap(struct MIGConfigSession *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_migconfigsessionGetMemoryMappingDescriptor(struct MIGConfigSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_migconfigsessionControlSerialization_Prologue(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_migconfigsessionControlSerialization_Epilogue(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_migconfigsessionControl_Prologue(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_migconfigsessionControl_Epilogue(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_migconfigsessionCanCopy(struct MIGConfigSession *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionIsDuplicate(struct MIGConfigSession *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_migconfigsessionPreDestruct(struct MIGConfigSession *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionControl(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionControlFilter(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionMap(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionUnmap(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_migconfigsessionIsPartialUnmapSupported(struct MIGConfigSession *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionMapTo(struct MIGConfigSession *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionUnmapFrom(struct MIGConfigSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_migconfigsessionGetRefCount(struct MIGConfigSession *pResource); // this +void __nvoc_up_thunk_RsResource_migconfigsessionAddAdditionalDependants(struct RsClient *pClient, struct MIGConfigSession *pResource, RsResourceRef *pReference); // this + // 21 up-thunk(s) defined to bridge methods in MIGConfigSession to superclasses // migconfigsessionAccessCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_migconfigsessionAccessCallback(struct MIGConfigSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_migconfigsessionAccessCallback(struct MIGConfigSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // migconfigsessionShareCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_migconfigsessionShareCallback(struct MIGConfigSession *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_migconfigsessionShareCallback(struct MIGConfigSession *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // migconfigsessionGetMemInterMapParams: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_migconfigsessionGetMemInterMapParams(struct MIGConfigSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_migconfigsessionGetMemInterMapParams(struct MIGConfigSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), pParams); } // migconfigsessionCheckMemInterUnmap: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_migconfigsessionCheckMemInterUnmap(struct MIGConfigSession *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_migconfigsessionCheckMemInterUnmap(struct MIGConfigSession *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), bSubdeviceHandleProvided); } // migconfigsessionGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_migconfigsessionGetMemoryMappingDescriptor(struct MIGConfigSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_migconfigsessionGetMemoryMappingDescriptor(struct MIGConfigSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), ppMemDesc); } // migconfigsessionControlSerialization_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_migconfigsessionControlSerialization_Prologue(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_migconfigsessionControlSerialization_Prologue(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), pCallContext, pParams); } // migconfigsessionControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_migconfigsessionControlSerialization_Epilogue(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_migconfigsessionControlSerialization_Epilogue(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), pCallContext, pParams); } // migconfigsessionControl_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_migconfigsessionControl_Prologue(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_migconfigsessionControl_Prologue(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), pCallContext, pParams); } // migconfigsessionControl_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_migconfigsessionControl_Epilogue(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_migconfigsessionControl_Epilogue(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RmResource.offset), pCallContext, pParams); } // migconfigsessionCanCopy: virtual inherited (res) base (rmres) -static NvBool __nvoc_up_thunk_RsResource_migconfigsessionCanCopy(struct MIGConfigSession *pResource) { +NvBool __nvoc_up_thunk_RsResource_migconfigsessionCanCopy(struct MIGConfigSession *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset)); } // migconfigsessionIsDuplicate: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionIsDuplicate(struct MIGConfigSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionIsDuplicate(struct MIGConfigSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), hMemory, pDuplicate); } // migconfigsessionPreDestruct: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_migconfigsessionPreDestruct(struct MIGConfigSession *pResource) { +void __nvoc_up_thunk_RsResource_migconfigsessionPreDestruct(struct MIGConfigSession *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset)); } // migconfigsessionControl: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionControl(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionControl(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), pCallContext, pParams); } // migconfigsessionControlFilter: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionControlFilter(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionControlFilter(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), pCallContext, pParams); } // migconfigsessionMap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionMap(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionMap(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), pCallContext, pParams, pCpuMapping); } // migconfigsessionUnmap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionUnmap(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionUnmap(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), pCallContext, pCpuMapping); } // migconfigsessionIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body -static NvBool __nvoc_up_thunk_RsResource_migconfigsessionIsPartialUnmapSupported(struct MIGConfigSession *pResource) { +NvBool __nvoc_up_thunk_RsResource_migconfigsessionIsPartialUnmapSupported(struct MIGConfigSession *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset)); } // migconfigsessionMapTo: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionMapTo(struct MIGConfigSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionMapTo(struct MIGConfigSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), pParams); } // migconfigsessionUnmapFrom: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionUnmapFrom(struct MIGConfigSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_migconfigsessionUnmapFrom(struct MIGConfigSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), pParams); } // migconfigsessionGetRefCount: virtual inherited (res) base (rmres) -static NvU32 __nvoc_up_thunk_RsResource_migconfigsessionGetRefCount(struct MIGConfigSession *pResource) { +NvU32 __nvoc_up_thunk_RsResource_migconfigsessionGetRefCount(struct MIGConfigSession *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset)); } // migconfigsessionAddAdditionalDependants: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_migconfigsessionAddAdditionalDependants(struct RsClient *pClient, struct MIGConfigSession *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_migconfigsessionAddAdditionalDependants(struct RsClient *pClient, struct MIGConfigSession *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGConfigSession_RsResource.offset), pReference); } @@ -231,76 +274,80 @@ NV_STATUS __nvoc_ctor_MIGConfigSession(MIGConfigSession *pThis, struct CALL_CONT // Vtable initialization static void __nvoc_init_funcTable_MIGConfigSession_1(MIGConfigSession *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // migconfigsessionAccessCallback -- virtual inherited (rmres) base (rmres) - pThis->__migconfigsessionAccessCallback__ = &__nvoc_up_thunk_RmResource_migconfigsessionAccessCallback; - - // migconfigsessionShareCallback -- virtual inherited (rmres) base (rmres) - pThis->__migconfigsessionShareCallback__ = &__nvoc_up_thunk_RmResource_migconfigsessionShareCallback; - - // migconfigsessionGetMemInterMapParams -- virtual inherited (rmres) base (rmres) - pThis->__migconfigsessionGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_migconfigsessionGetMemInterMapParams; - - // migconfigsessionCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) - pThis->__migconfigsessionCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_migconfigsessionCheckMemInterUnmap; - - // migconfigsessionGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) - pThis->__migconfigsessionGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_migconfigsessionGetMemoryMappingDescriptor; - - // migconfigsessionControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__migconfigsessionControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_migconfigsessionControlSerialization_Prologue; - - // migconfigsessionControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__migconfigsessionControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_migconfigsessionControlSerialization_Epilogue; - - // migconfigsessionControl_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__migconfigsessionControl_Prologue__ = &__nvoc_up_thunk_RmResource_migconfigsessionControl_Prologue; - - // migconfigsessionControl_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__migconfigsessionControl_Epilogue__ = &__nvoc_up_thunk_RmResource_migconfigsessionControl_Epilogue; - - // migconfigsessionCanCopy -- virtual inherited (res) base (rmres) - pThis->__migconfigsessionCanCopy__ = &__nvoc_up_thunk_RsResource_migconfigsessionCanCopy; - - // migconfigsessionIsDuplicate -- virtual inherited (res) base (rmres) - pThis->__migconfigsessionIsDuplicate__ = &__nvoc_up_thunk_RsResource_migconfigsessionIsDuplicate; - - // migconfigsessionPreDestruct -- virtual inherited (res) base (rmres) - pThis->__migconfigsessionPreDestruct__ = &__nvoc_up_thunk_RsResource_migconfigsessionPreDestruct; - - // migconfigsessionControl -- virtual inherited (res) base (rmres) - pThis->__migconfigsessionControl__ = &__nvoc_up_thunk_RsResource_migconfigsessionControl; - - // migconfigsessionControlFilter -- virtual inherited (res) base (rmres) - pThis->__migconfigsessionControlFilter__ = &__nvoc_up_thunk_RsResource_migconfigsessionControlFilter; - - // migconfigsessionMap -- virtual inherited (res) base (rmres) - pThis->__migconfigsessionMap__ = &__nvoc_up_thunk_RsResource_migconfigsessionMap; - - // migconfigsessionUnmap -- virtual inherited (res) base (rmres) - pThis->__migconfigsessionUnmap__ = &__nvoc_up_thunk_RsResource_migconfigsessionUnmap; - - // migconfigsessionIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body - pThis->__migconfigsessionIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_migconfigsessionIsPartialUnmapSupported; - - // migconfigsessionMapTo -- virtual inherited (res) base (rmres) - pThis->__migconfigsessionMapTo__ = &__nvoc_up_thunk_RsResource_migconfigsessionMapTo; - - // migconfigsessionUnmapFrom -- virtual inherited (res) base (rmres) - pThis->__migconfigsessionUnmapFrom__ = &__nvoc_up_thunk_RsResource_migconfigsessionUnmapFrom; - - // migconfigsessionGetRefCount -- virtual inherited (res) base (rmres) - pThis->__migconfigsessionGetRefCount__ = &__nvoc_up_thunk_RsResource_migconfigsessionGetRefCount; - - // migconfigsessionAddAdditionalDependants -- virtual inherited (res) base (rmres) - pThis->__migconfigsessionAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_migconfigsessionAddAdditionalDependants; -} // End __nvoc_init_funcTable_MIGConfigSession_1 with approximately 21 basic block(s). +} // End __nvoc_init_funcTable_MIGConfigSession_1 // Initialize vtable(s) for 21 virtual method(s). void __nvoc_init_funcTable_MIGConfigSession(MIGConfigSession *pThis) { - // Initialize vtable(s) with 21 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__MIGConfigSession vtable = { + .__migconfigsessionAccessCallback__ = &__nvoc_up_thunk_RmResource_migconfigsessionAccessCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__migconfigsessionShareCallback__ = &__nvoc_up_thunk_RmResource_migconfigsessionShareCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__migconfigsessionGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_migconfigsessionGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__migconfigsessionCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_migconfigsessionCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__migconfigsessionGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_migconfigsessionGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__migconfigsessionControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_migconfigsessionControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__migconfigsessionControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_migconfigsessionControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__migconfigsessionControl_Prologue__ = &__nvoc_up_thunk_RmResource_migconfigsessionControl_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__migconfigsessionControl_Epilogue__ = &__nvoc_up_thunk_RmResource_migconfigsessionControl_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__migconfigsessionCanCopy__ = &__nvoc_up_thunk_RsResource_migconfigsessionCanCopy, // virtual inherited (res) base (rmres) + .RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__migconfigsessionIsDuplicate__ = &__nvoc_up_thunk_RsResource_migconfigsessionIsDuplicate, // virtual inherited (res) base (rmres) + .RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__migconfigsessionPreDestruct__ = &__nvoc_up_thunk_RsResource_migconfigsessionPreDestruct, // virtual inherited (res) base (rmres) + .RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__migconfigsessionControl__ = &__nvoc_up_thunk_RsResource_migconfigsessionControl, // virtual inherited (res) base (rmres) + .RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControl__ = &resControl_IMPL, // virtual + .__migconfigsessionControlFilter__ = &__nvoc_up_thunk_RsResource_migconfigsessionControlFilter, // virtual inherited (res) base (rmres) + .RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__migconfigsessionMap__ = &__nvoc_up_thunk_RsResource_migconfigsessionMap, // virtual inherited (res) base (rmres) + .RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMap__ = &resMap_IMPL, // virtual + .__migconfigsessionUnmap__ = &__nvoc_up_thunk_RsResource_migconfigsessionUnmap, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__migconfigsessionIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_migconfigsessionIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__migconfigsessionMapTo__ = &__nvoc_up_thunk_RsResource_migconfigsessionMapTo, // virtual inherited (res) base (rmres) + .RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__migconfigsessionUnmapFrom__ = &__nvoc_up_thunk_RsResource_migconfigsessionUnmapFrom, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__migconfigsessionGetRefCount__ = &__nvoc_up_thunk_RsResource_migconfigsessionGetRefCount, // virtual inherited (res) base (rmres) + .RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__migconfigsessionAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_migconfigsessionAddAdditionalDependants, // virtual inherited (res) base (rmres) + .RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.RmResource.RsResource; // (res) super^2 + pThis->__nvoc_base_RmResource.__nvoc_vtable = &vtable.RmResource; // (rmres) super + pThis->__nvoc_vtable = &vtable; // (migconfigsession) this __nvoc_init_funcTable_MIGConfigSession_1(pThis); } diff --git a/src/nvidia/generated/g_mig_config_session_nvoc.h b/src/nvidia/generated/g_mig_config_session_nvoc.h index f54e5abbd5..a2bc566e0d 100644 --- a/src/nvidia/generated/g_mig_config_session_nvoc.h +++ b/src/nvidia/generated/g_mig_config_session_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -71,10 +71,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__MIGConfigSession; + + struct MIGConfigSession { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__MIGConfigSession *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; @@ -86,7 +91,15 @@ struct MIGConfigSession { struct RmResource *__nvoc_pbase_RmResource; // rmres super struct MIGConfigSession *__nvoc_pbase_MIGConfigSession; // migconfigsession - // Vtable with 21 per-object function pointers + // Data members + NvU64 PRIVATE_FIELD(dupedCapDescriptor); +}; + + +// Metadata including vtable with 21 function pointers plus superclass metadata +struct NVOC_VTABLE__MIGConfigSession { + const struct NVOC_VTABLE__RmResource RmResource; // (rmres) 21 function pointers + NvBool (*__migconfigsessionAccessCallback__)(struct MIGConfigSession * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) NvBool (*__migconfigsessionShareCallback__)(struct MIGConfigSession * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) NV_STATUS (*__migconfigsessionGetMemInterMapParams__)(struct MIGConfigSession * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) @@ -108,9 +121,6 @@ struct MIGConfigSession { NV_STATUS (*__migconfigsessionUnmapFrom__)(struct MIGConfigSession * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) NvU32 (*__migconfigsessionGetRefCount__)(struct MIGConfigSession * /*this*/); // virtual inherited (res) base (rmres) void (*__migconfigsessionAddAdditionalDependants__)(struct RsClient *, struct MIGConfigSession * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) - - // Data members - NvU64 PRIVATE_FIELD(dupedCapDescriptor); }; #ifndef __NVOC_CLASS_MIGConfigSession_TYPEDEF__ @@ -143,132 +153,132 @@ NV_STATUS __nvoc_objCreate_MIGConfigSession(MIGConfigSession**, Dynamic*, NvU32, // Wrapper macros -#define migconfigsessionAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define migconfigsessionAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define migconfigsessionAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) migconfigsessionAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define migconfigsessionShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ +#define migconfigsessionShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define migconfigsessionShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) migconfigsessionShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define migconfigsessionGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define migconfigsessionGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define migconfigsessionGetMemInterMapParams(pRmResource, pParams) migconfigsessionGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define migconfigsessionCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define migconfigsessionCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define migconfigsessionCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) migconfigsessionCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define migconfigsessionGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define migconfigsessionGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define migconfigsessionGetMemoryMappingDescriptor(pRmResource, ppMemDesc) migconfigsessionGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define migconfigsessionControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define migconfigsessionControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define migconfigsessionControlSerialization_Prologue(pResource, pCallContext, pParams) migconfigsessionControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define migconfigsessionControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define migconfigsessionControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define migconfigsessionControlSerialization_Epilogue(pResource, pCallContext, pParams) migconfigsessionControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define migconfigsessionControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ +#define migconfigsessionControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define migconfigsessionControl_Prologue(pResource, pCallContext, pParams) migconfigsessionControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define migconfigsessionControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define migconfigsessionControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define migconfigsessionControl_Epilogue(pResource, pCallContext, pParams) migconfigsessionControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define migconfigsessionCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define migconfigsessionCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define migconfigsessionCanCopy(pResource) migconfigsessionCanCopy_DISPATCH(pResource) -#define migconfigsessionIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define migconfigsessionIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define migconfigsessionIsDuplicate(pResource, hMemory, pDuplicate) migconfigsessionIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define migconfigsessionPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define migconfigsessionPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define migconfigsessionPreDestruct(pResource) migconfigsessionPreDestruct_DISPATCH(pResource) -#define migconfigsessionControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define migconfigsessionControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControl__ #define migconfigsessionControl(pResource, pCallContext, pParams) migconfigsessionControl_DISPATCH(pResource, pCallContext, pParams) -#define migconfigsessionControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define migconfigsessionControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define migconfigsessionControlFilter(pResource, pCallContext, pParams) migconfigsessionControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define migconfigsessionMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define migconfigsessionMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define migconfigsessionMap(pResource, pCallContext, pParams, pCpuMapping) migconfigsessionMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define migconfigsessionUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define migconfigsessionUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define migconfigsessionUnmap(pResource, pCallContext, pCpuMapping) migconfigsessionUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define migconfigsessionIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define migconfigsessionIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define migconfigsessionIsPartialUnmapSupported(pResource) migconfigsessionIsPartialUnmapSupported_DISPATCH(pResource) -#define migconfigsessionMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define migconfigsessionMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define migconfigsessionMapTo(pResource, pParams) migconfigsessionMapTo_DISPATCH(pResource, pParams) -#define migconfigsessionUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define migconfigsessionUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define migconfigsessionUnmapFrom(pResource, pParams) migconfigsessionUnmapFrom_DISPATCH(pResource, pParams) -#define migconfigsessionGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define migconfigsessionGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define migconfigsessionGetRefCount(pResource) migconfigsessionGetRefCount_DISPATCH(pResource) -#define migconfigsessionAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define migconfigsessionAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define migconfigsessionAddAdditionalDependants(pClient, pResource, pReference) migconfigsessionAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool migconfigsessionAccessCallback_DISPATCH(struct MIGConfigSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__migconfigsessionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__migconfigsessionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool migconfigsessionShareCallback_DISPATCH(struct MIGConfigSession *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__migconfigsessionShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__migconfigsessionShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS migconfigsessionGetMemInterMapParams_DISPATCH(struct MIGConfigSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__migconfigsessionGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__migconfigsessionGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS migconfigsessionCheckMemInterUnmap_DISPATCH(struct MIGConfigSession *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__migconfigsessionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__migconfigsessionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS migconfigsessionGetMemoryMappingDescriptor_DISPATCH(struct MIGConfigSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__migconfigsessionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__migconfigsessionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS migconfigsessionControlSerialization_Prologue_DISPATCH(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__migconfigsessionControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__migconfigsessionControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void migconfigsessionControlSerialization_Epilogue_DISPATCH(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__migconfigsessionControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__migconfigsessionControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS migconfigsessionControl_Prologue_DISPATCH(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__migconfigsessionControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__migconfigsessionControl_Prologue__(pResource, pCallContext, pParams); } static inline void migconfigsessionControl_Epilogue_DISPATCH(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__migconfigsessionControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__migconfigsessionControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool migconfigsessionCanCopy_DISPATCH(struct MIGConfigSession *pResource) { - return pResource->__migconfigsessionCanCopy__(pResource); + return pResource->__nvoc_vtable->__migconfigsessionCanCopy__(pResource); } static inline NV_STATUS migconfigsessionIsDuplicate_DISPATCH(struct MIGConfigSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__migconfigsessionIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__migconfigsessionIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void migconfigsessionPreDestruct_DISPATCH(struct MIGConfigSession *pResource) { - pResource->__migconfigsessionPreDestruct__(pResource); + pResource->__nvoc_vtable->__migconfigsessionPreDestruct__(pResource); } static inline NV_STATUS migconfigsessionControl_DISPATCH(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__migconfigsessionControl__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__migconfigsessionControl__(pResource, pCallContext, pParams); } static inline NV_STATUS migconfigsessionControlFilter_DISPATCH(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__migconfigsessionControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__migconfigsessionControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS migconfigsessionMap_DISPATCH(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__migconfigsessionMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__migconfigsessionMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS migconfigsessionUnmap_DISPATCH(struct MIGConfigSession *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__migconfigsessionUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__migconfigsessionUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool migconfigsessionIsPartialUnmapSupported_DISPATCH(struct MIGConfigSession *pResource) { - return pResource->__migconfigsessionIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__migconfigsessionIsPartialUnmapSupported__(pResource); } static inline NV_STATUS migconfigsessionMapTo_DISPATCH(struct MIGConfigSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__migconfigsessionMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__migconfigsessionMapTo__(pResource, pParams); } static inline NV_STATUS migconfigsessionUnmapFrom_DISPATCH(struct MIGConfigSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__migconfigsessionUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__migconfigsessionUnmapFrom__(pResource, pParams); } static inline NvU32 migconfigsessionGetRefCount_DISPATCH(struct MIGConfigSession *pResource) { - return pResource->__migconfigsessionGetRefCount__(pResource); + return pResource->__nvoc_vtable->__migconfigsessionGetRefCount__(pResource); } static inline void migconfigsessionAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MIGConfigSession *pResource, RsResourceRef *pReference) { - pResource->__migconfigsessionAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__migconfigsessionAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS migconfigsessionConstruct_IMPL(struct MIGConfigSession *arg_pMIGConfigSession, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_mig_monitor_session_nvoc.c b/src/nvidia/generated/g_mig_monitor_session_nvoc.c index d090656448..c145896ad5 100644 --- a/src/nvidia/generated/g_mig_monitor_session_nvoc.c +++ b/src/nvidia/generated/g_mig_monitor_session_nvoc.c @@ -84,110 +84,153 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_MIGMonitorSession = /*pExportInfo=*/ &__nvoc_export_info_MIGMonitorSession }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_RmResource_migmonitorsessionAccessCallback(struct MIGMonitorSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_migmonitorsessionShareCallback(struct MIGMonitorSession *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_migmonitorsessionGetMemInterMapParams(struct MIGMonitorSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_migmonitorsessionCheckMemInterUnmap(struct MIGMonitorSession *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_migmonitorsessionGetMemoryMappingDescriptor(struct MIGMonitorSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_migmonitorsessionControlSerialization_Prologue(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_migmonitorsessionControlSerialization_Epilogue(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_migmonitorsessionControl_Prologue(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_migmonitorsessionControl_Epilogue(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_migmonitorsessionCanCopy(struct MIGMonitorSession *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionIsDuplicate(struct MIGMonitorSession *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_migmonitorsessionPreDestruct(struct MIGMonitorSession *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionControl(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionControlFilter(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionMap(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionUnmap(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_migmonitorsessionIsPartialUnmapSupported(struct MIGMonitorSession *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionMapTo(struct MIGMonitorSession *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionUnmapFrom(struct MIGMonitorSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_migmonitorsessionGetRefCount(struct MIGMonitorSession *pResource); // this +void __nvoc_up_thunk_RsResource_migmonitorsessionAddAdditionalDependants(struct RsClient *pClient, struct MIGMonitorSession *pResource, RsResourceRef *pReference); // this + // 21 up-thunk(s) defined to bridge methods in MIGMonitorSession to superclasses // migmonitorsessionAccessCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_migmonitorsessionAccessCallback(struct MIGMonitorSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_migmonitorsessionAccessCallback(struct MIGMonitorSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // migmonitorsessionShareCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_migmonitorsessionShareCallback(struct MIGMonitorSession *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_migmonitorsessionShareCallback(struct MIGMonitorSession *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // migmonitorsessionGetMemInterMapParams: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_migmonitorsessionGetMemInterMapParams(struct MIGMonitorSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_migmonitorsessionGetMemInterMapParams(struct MIGMonitorSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), pParams); } // migmonitorsessionCheckMemInterUnmap: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_migmonitorsessionCheckMemInterUnmap(struct MIGMonitorSession *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_migmonitorsessionCheckMemInterUnmap(struct MIGMonitorSession *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), bSubdeviceHandleProvided); } // migmonitorsessionGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_migmonitorsessionGetMemoryMappingDescriptor(struct MIGMonitorSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_migmonitorsessionGetMemoryMappingDescriptor(struct MIGMonitorSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), ppMemDesc); } // migmonitorsessionControlSerialization_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_migmonitorsessionControlSerialization_Prologue(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_migmonitorsessionControlSerialization_Prologue(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), pCallContext, pParams); } // migmonitorsessionControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_migmonitorsessionControlSerialization_Epilogue(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_migmonitorsessionControlSerialization_Epilogue(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), pCallContext, pParams); } // migmonitorsessionControl_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_migmonitorsessionControl_Prologue(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_migmonitorsessionControl_Prologue(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), pCallContext, pParams); } // migmonitorsessionControl_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_migmonitorsessionControl_Epilogue(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_migmonitorsessionControl_Epilogue(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RmResource.offset), pCallContext, pParams); } // migmonitorsessionCanCopy: virtual inherited (res) base (rmres) -static NvBool __nvoc_up_thunk_RsResource_migmonitorsessionCanCopy(struct MIGMonitorSession *pResource) { +NvBool __nvoc_up_thunk_RsResource_migmonitorsessionCanCopy(struct MIGMonitorSession *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset)); } // migmonitorsessionIsDuplicate: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionIsDuplicate(struct MIGMonitorSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionIsDuplicate(struct MIGMonitorSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), hMemory, pDuplicate); } // migmonitorsessionPreDestruct: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_migmonitorsessionPreDestruct(struct MIGMonitorSession *pResource) { +void __nvoc_up_thunk_RsResource_migmonitorsessionPreDestruct(struct MIGMonitorSession *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset)); } // migmonitorsessionControl: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionControl(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionControl(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), pCallContext, pParams); } // migmonitorsessionControlFilter: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionControlFilter(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionControlFilter(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), pCallContext, pParams); } // migmonitorsessionMap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionMap(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionMap(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), pCallContext, pParams, pCpuMapping); } // migmonitorsessionUnmap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionUnmap(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionUnmap(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), pCallContext, pCpuMapping); } // migmonitorsessionIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body -static NvBool __nvoc_up_thunk_RsResource_migmonitorsessionIsPartialUnmapSupported(struct MIGMonitorSession *pResource) { +NvBool __nvoc_up_thunk_RsResource_migmonitorsessionIsPartialUnmapSupported(struct MIGMonitorSession *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset)); } // migmonitorsessionMapTo: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionMapTo(struct MIGMonitorSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionMapTo(struct MIGMonitorSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), pParams); } // migmonitorsessionUnmapFrom: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionUnmapFrom(struct MIGMonitorSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_migmonitorsessionUnmapFrom(struct MIGMonitorSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), pParams); } // migmonitorsessionGetRefCount: virtual inherited (res) base (rmres) -static NvU32 __nvoc_up_thunk_RsResource_migmonitorsessionGetRefCount(struct MIGMonitorSession *pResource) { +NvU32 __nvoc_up_thunk_RsResource_migmonitorsessionGetRefCount(struct MIGMonitorSession *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset)); } // migmonitorsessionAddAdditionalDependants: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_migmonitorsessionAddAdditionalDependants(struct RsClient *pClient, struct MIGMonitorSession *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_migmonitorsessionAddAdditionalDependants(struct RsClient *pClient, struct MIGMonitorSession *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MIGMonitorSession_RsResource.offset), pReference); } @@ -231,76 +274,80 @@ NV_STATUS __nvoc_ctor_MIGMonitorSession(MIGMonitorSession *pThis, struct CALL_CO // Vtable initialization static void __nvoc_init_funcTable_MIGMonitorSession_1(MIGMonitorSession *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // migmonitorsessionAccessCallback -- virtual inherited (rmres) base (rmres) - pThis->__migmonitorsessionAccessCallback__ = &__nvoc_up_thunk_RmResource_migmonitorsessionAccessCallback; - - // migmonitorsessionShareCallback -- virtual inherited (rmres) base (rmres) - pThis->__migmonitorsessionShareCallback__ = &__nvoc_up_thunk_RmResource_migmonitorsessionShareCallback; - - // migmonitorsessionGetMemInterMapParams -- virtual inherited (rmres) base (rmres) - pThis->__migmonitorsessionGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_migmonitorsessionGetMemInterMapParams; - - // migmonitorsessionCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) - pThis->__migmonitorsessionCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_migmonitorsessionCheckMemInterUnmap; - - // migmonitorsessionGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) - pThis->__migmonitorsessionGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_migmonitorsessionGetMemoryMappingDescriptor; - - // migmonitorsessionControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__migmonitorsessionControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_migmonitorsessionControlSerialization_Prologue; - - // migmonitorsessionControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__migmonitorsessionControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_migmonitorsessionControlSerialization_Epilogue; - - // migmonitorsessionControl_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__migmonitorsessionControl_Prologue__ = &__nvoc_up_thunk_RmResource_migmonitorsessionControl_Prologue; - - // migmonitorsessionControl_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__migmonitorsessionControl_Epilogue__ = &__nvoc_up_thunk_RmResource_migmonitorsessionControl_Epilogue; - - // migmonitorsessionCanCopy -- virtual inherited (res) base (rmres) - pThis->__migmonitorsessionCanCopy__ = &__nvoc_up_thunk_RsResource_migmonitorsessionCanCopy; - - // migmonitorsessionIsDuplicate -- virtual inherited (res) base (rmres) - pThis->__migmonitorsessionIsDuplicate__ = &__nvoc_up_thunk_RsResource_migmonitorsessionIsDuplicate; - - // migmonitorsessionPreDestruct -- virtual inherited (res) base (rmres) - pThis->__migmonitorsessionPreDestruct__ = &__nvoc_up_thunk_RsResource_migmonitorsessionPreDestruct; - - // migmonitorsessionControl -- virtual inherited (res) base (rmres) - pThis->__migmonitorsessionControl__ = &__nvoc_up_thunk_RsResource_migmonitorsessionControl; - - // migmonitorsessionControlFilter -- virtual inherited (res) base (rmres) - pThis->__migmonitorsessionControlFilter__ = &__nvoc_up_thunk_RsResource_migmonitorsessionControlFilter; - - // migmonitorsessionMap -- virtual inherited (res) base (rmres) - pThis->__migmonitorsessionMap__ = &__nvoc_up_thunk_RsResource_migmonitorsessionMap; - - // migmonitorsessionUnmap -- virtual inherited (res) base (rmres) - pThis->__migmonitorsessionUnmap__ = &__nvoc_up_thunk_RsResource_migmonitorsessionUnmap; - - // migmonitorsessionIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body - pThis->__migmonitorsessionIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_migmonitorsessionIsPartialUnmapSupported; - - // migmonitorsessionMapTo -- virtual inherited (res) base (rmres) - pThis->__migmonitorsessionMapTo__ = &__nvoc_up_thunk_RsResource_migmonitorsessionMapTo; - - // migmonitorsessionUnmapFrom -- virtual inherited (res) base (rmres) - pThis->__migmonitorsessionUnmapFrom__ = &__nvoc_up_thunk_RsResource_migmonitorsessionUnmapFrom; - - // migmonitorsessionGetRefCount -- virtual inherited (res) base (rmres) - pThis->__migmonitorsessionGetRefCount__ = &__nvoc_up_thunk_RsResource_migmonitorsessionGetRefCount; - - // migmonitorsessionAddAdditionalDependants -- virtual inherited (res) base (rmres) - pThis->__migmonitorsessionAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_migmonitorsessionAddAdditionalDependants; -} // End __nvoc_init_funcTable_MIGMonitorSession_1 with approximately 21 basic block(s). +} // End __nvoc_init_funcTable_MIGMonitorSession_1 // Initialize vtable(s) for 21 virtual method(s). void __nvoc_init_funcTable_MIGMonitorSession(MIGMonitorSession *pThis) { - // Initialize vtable(s) with 21 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__MIGMonitorSession vtable = { + .__migmonitorsessionAccessCallback__ = &__nvoc_up_thunk_RmResource_migmonitorsessionAccessCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__migmonitorsessionShareCallback__ = &__nvoc_up_thunk_RmResource_migmonitorsessionShareCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__migmonitorsessionGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_migmonitorsessionGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__migmonitorsessionCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_migmonitorsessionCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__migmonitorsessionGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_migmonitorsessionGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__migmonitorsessionControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_migmonitorsessionControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__migmonitorsessionControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_migmonitorsessionControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__migmonitorsessionControl_Prologue__ = &__nvoc_up_thunk_RmResource_migmonitorsessionControl_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__migmonitorsessionControl_Epilogue__ = &__nvoc_up_thunk_RmResource_migmonitorsessionControl_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__migmonitorsessionCanCopy__ = &__nvoc_up_thunk_RsResource_migmonitorsessionCanCopy, // virtual inherited (res) base (rmres) + .RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__migmonitorsessionIsDuplicate__ = &__nvoc_up_thunk_RsResource_migmonitorsessionIsDuplicate, // virtual inherited (res) base (rmres) + .RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__migmonitorsessionPreDestruct__ = &__nvoc_up_thunk_RsResource_migmonitorsessionPreDestruct, // virtual inherited (res) base (rmres) + .RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__migmonitorsessionControl__ = &__nvoc_up_thunk_RsResource_migmonitorsessionControl, // virtual inherited (res) base (rmres) + .RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControl__ = &resControl_IMPL, // virtual + .__migmonitorsessionControlFilter__ = &__nvoc_up_thunk_RsResource_migmonitorsessionControlFilter, // virtual inherited (res) base (rmres) + .RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__migmonitorsessionMap__ = &__nvoc_up_thunk_RsResource_migmonitorsessionMap, // virtual inherited (res) base (rmres) + .RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMap__ = &resMap_IMPL, // virtual + .__migmonitorsessionUnmap__ = &__nvoc_up_thunk_RsResource_migmonitorsessionUnmap, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__migmonitorsessionIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_migmonitorsessionIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__migmonitorsessionMapTo__ = &__nvoc_up_thunk_RsResource_migmonitorsessionMapTo, // virtual inherited (res) base (rmres) + .RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__migmonitorsessionUnmapFrom__ = &__nvoc_up_thunk_RsResource_migmonitorsessionUnmapFrom, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__migmonitorsessionGetRefCount__ = &__nvoc_up_thunk_RsResource_migmonitorsessionGetRefCount, // virtual inherited (res) base (rmres) + .RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__migmonitorsessionAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_migmonitorsessionAddAdditionalDependants, // virtual inherited (res) base (rmres) + .RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.RmResource.RsResource; // (res) super^2 + pThis->__nvoc_base_RmResource.__nvoc_vtable = &vtable.RmResource; // (rmres) super + pThis->__nvoc_vtable = &vtable; // (migmonitorsession) this __nvoc_init_funcTable_MIGMonitorSession_1(pThis); } diff --git a/src/nvidia/generated/g_mig_monitor_session_nvoc.h b/src/nvidia/generated/g_mig_monitor_session_nvoc.h index d04733db55..053c535494 100644 --- a/src/nvidia/generated/g_mig_monitor_session_nvoc.h +++ b/src/nvidia/generated/g_mig_monitor_session_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -72,10 +72,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__MIGMonitorSession; + + struct MIGMonitorSession { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__MIGMonitorSession *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; @@ -87,7 +92,15 @@ struct MIGMonitorSession { struct RmResource *__nvoc_pbase_RmResource; // rmres super struct MIGMonitorSession *__nvoc_pbase_MIGMonitorSession; // migmonitorsession - // Vtable with 21 per-object function pointers + // Data members + NvU64 PRIVATE_FIELD(dupedCapDescriptor); +}; + + +// Metadata including vtable with 21 function pointers plus superclass metadata +struct NVOC_VTABLE__MIGMonitorSession { + const struct NVOC_VTABLE__RmResource RmResource; // (rmres) 21 function pointers + NvBool (*__migmonitorsessionAccessCallback__)(struct MIGMonitorSession * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) NvBool (*__migmonitorsessionShareCallback__)(struct MIGMonitorSession * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) NV_STATUS (*__migmonitorsessionGetMemInterMapParams__)(struct MIGMonitorSession * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) @@ -109,9 +122,6 @@ struct MIGMonitorSession { NV_STATUS (*__migmonitorsessionUnmapFrom__)(struct MIGMonitorSession * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) NvU32 (*__migmonitorsessionGetRefCount__)(struct MIGMonitorSession * /*this*/); // virtual inherited (res) base (rmres) void (*__migmonitorsessionAddAdditionalDependants__)(struct RsClient *, struct MIGMonitorSession * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) - - // Data members - NvU64 PRIVATE_FIELD(dupedCapDescriptor); }; #ifndef __NVOC_CLASS_MIGMonitorSession_TYPEDEF__ @@ -144,132 +154,132 @@ NV_STATUS __nvoc_objCreate_MIGMonitorSession(MIGMonitorSession**, Dynamic*, NvU3 // Wrapper macros -#define migmonitorsessionAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define migmonitorsessionAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define migmonitorsessionAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) migmonitorsessionAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define migmonitorsessionShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ +#define migmonitorsessionShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define migmonitorsessionShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) migmonitorsessionShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define migmonitorsessionGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define migmonitorsessionGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define migmonitorsessionGetMemInterMapParams(pRmResource, pParams) migmonitorsessionGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define migmonitorsessionCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define migmonitorsessionCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define migmonitorsessionCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) migmonitorsessionCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define migmonitorsessionGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define migmonitorsessionGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define migmonitorsessionGetMemoryMappingDescriptor(pRmResource, ppMemDesc) migmonitorsessionGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define migmonitorsessionControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define migmonitorsessionControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define migmonitorsessionControlSerialization_Prologue(pResource, pCallContext, pParams) migmonitorsessionControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define migmonitorsessionControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define migmonitorsessionControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define migmonitorsessionControlSerialization_Epilogue(pResource, pCallContext, pParams) migmonitorsessionControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define migmonitorsessionControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ +#define migmonitorsessionControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define migmonitorsessionControl_Prologue(pResource, pCallContext, pParams) migmonitorsessionControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define migmonitorsessionControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define migmonitorsessionControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define migmonitorsessionControl_Epilogue(pResource, pCallContext, pParams) migmonitorsessionControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define migmonitorsessionCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define migmonitorsessionCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define migmonitorsessionCanCopy(pResource) migmonitorsessionCanCopy_DISPATCH(pResource) -#define migmonitorsessionIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define migmonitorsessionIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define migmonitorsessionIsDuplicate(pResource, hMemory, pDuplicate) migmonitorsessionIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define migmonitorsessionPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define migmonitorsessionPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define migmonitorsessionPreDestruct(pResource) migmonitorsessionPreDestruct_DISPATCH(pResource) -#define migmonitorsessionControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define migmonitorsessionControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControl__ #define migmonitorsessionControl(pResource, pCallContext, pParams) migmonitorsessionControl_DISPATCH(pResource, pCallContext, pParams) -#define migmonitorsessionControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define migmonitorsessionControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define migmonitorsessionControlFilter(pResource, pCallContext, pParams) migmonitorsessionControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define migmonitorsessionMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define migmonitorsessionMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define migmonitorsessionMap(pResource, pCallContext, pParams, pCpuMapping) migmonitorsessionMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define migmonitorsessionUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define migmonitorsessionUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define migmonitorsessionUnmap(pResource, pCallContext, pCpuMapping) migmonitorsessionUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define migmonitorsessionIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define migmonitorsessionIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define migmonitorsessionIsPartialUnmapSupported(pResource) migmonitorsessionIsPartialUnmapSupported_DISPATCH(pResource) -#define migmonitorsessionMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define migmonitorsessionMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define migmonitorsessionMapTo(pResource, pParams) migmonitorsessionMapTo_DISPATCH(pResource, pParams) -#define migmonitorsessionUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define migmonitorsessionUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define migmonitorsessionUnmapFrom(pResource, pParams) migmonitorsessionUnmapFrom_DISPATCH(pResource, pParams) -#define migmonitorsessionGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define migmonitorsessionGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define migmonitorsessionGetRefCount(pResource) migmonitorsessionGetRefCount_DISPATCH(pResource) -#define migmonitorsessionAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define migmonitorsessionAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define migmonitorsessionAddAdditionalDependants(pClient, pResource, pReference) migmonitorsessionAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool migmonitorsessionAccessCallback_DISPATCH(struct MIGMonitorSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__migmonitorsessionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__migmonitorsessionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool migmonitorsessionShareCallback_DISPATCH(struct MIGMonitorSession *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__migmonitorsessionShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__migmonitorsessionShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS migmonitorsessionGetMemInterMapParams_DISPATCH(struct MIGMonitorSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__migmonitorsessionGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__migmonitorsessionGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS migmonitorsessionCheckMemInterUnmap_DISPATCH(struct MIGMonitorSession *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__migmonitorsessionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__migmonitorsessionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS migmonitorsessionGetMemoryMappingDescriptor_DISPATCH(struct MIGMonitorSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__migmonitorsessionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__migmonitorsessionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS migmonitorsessionControlSerialization_Prologue_DISPATCH(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__migmonitorsessionControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__migmonitorsessionControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void migmonitorsessionControlSerialization_Epilogue_DISPATCH(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__migmonitorsessionControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__migmonitorsessionControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS migmonitorsessionControl_Prologue_DISPATCH(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__migmonitorsessionControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__migmonitorsessionControl_Prologue__(pResource, pCallContext, pParams); } static inline void migmonitorsessionControl_Epilogue_DISPATCH(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__migmonitorsessionControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__migmonitorsessionControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool migmonitorsessionCanCopy_DISPATCH(struct MIGMonitorSession *pResource) { - return pResource->__migmonitorsessionCanCopy__(pResource); + return pResource->__nvoc_vtable->__migmonitorsessionCanCopy__(pResource); } static inline NV_STATUS migmonitorsessionIsDuplicate_DISPATCH(struct MIGMonitorSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__migmonitorsessionIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__migmonitorsessionIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void migmonitorsessionPreDestruct_DISPATCH(struct MIGMonitorSession *pResource) { - pResource->__migmonitorsessionPreDestruct__(pResource); + pResource->__nvoc_vtable->__migmonitorsessionPreDestruct__(pResource); } static inline NV_STATUS migmonitorsessionControl_DISPATCH(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__migmonitorsessionControl__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__migmonitorsessionControl__(pResource, pCallContext, pParams); } static inline NV_STATUS migmonitorsessionControlFilter_DISPATCH(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__migmonitorsessionControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__migmonitorsessionControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS migmonitorsessionMap_DISPATCH(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__migmonitorsessionMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__migmonitorsessionMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS migmonitorsessionUnmap_DISPATCH(struct MIGMonitorSession *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__migmonitorsessionUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__migmonitorsessionUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool migmonitorsessionIsPartialUnmapSupported_DISPATCH(struct MIGMonitorSession *pResource) { - return pResource->__migmonitorsessionIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__migmonitorsessionIsPartialUnmapSupported__(pResource); } static inline NV_STATUS migmonitorsessionMapTo_DISPATCH(struct MIGMonitorSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__migmonitorsessionMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__migmonitorsessionMapTo__(pResource, pParams); } static inline NV_STATUS migmonitorsessionUnmapFrom_DISPATCH(struct MIGMonitorSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__migmonitorsessionUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__migmonitorsessionUnmapFrom__(pResource, pParams); } static inline NvU32 migmonitorsessionGetRefCount_DISPATCH(struct MIGMonitorSession *pResource) { - return pResource->__migmonitorsessionGetRefCount__(pResource); + return pResource->__nvoc_vtable->__migmonitorsessionGetRefCount__(pResource); } static inline void migmonitorsessionAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MIGMonitorSession *pResource, RsResourceRef *pReference) { - pResource->__migmonitorsessionAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__migmonitorsessionAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS migmonitorsessionConstruct_IMPL(struct MIGMonitorSession *arg_pMIGMonitorSession, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_mmu_fault_buffer_nvoc.c b/src/nvidia/generated/g_mmu_fault_buffer_nvoc.c index 62e3d45c17..7b722c6314 100644 --- a/src/nvidia/generated/g_mmu_fault_buffer_nvoc.c +++ b/src/nvidia/generated/g_mmu_fault_buffer_nvoc.c @@ -210,158 +210,236 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_MmuFault }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_down_thunk_MmuFaultBuffer_gpuresMap(struct GpuResource *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_down_thunk_MmuFaultBuffer_gpuresUnmap(struct GpuResource *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_down_thunk_MmuFaultBuffer_gpuresGetMapAddrSpace(struct GpuResource *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this + // 3 down-thunk(s) defined to bridge methods in MmuFaultBuffer from superclasses // faultbufMap: virtual override (res) base (gpures) -static NV_STATUS __nvoc_down_thunk_MmuFaultBuffer_gpuresMap(struct GpuResource *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_down_thunk_MmuFaultBuffer_gpuresMap(struct GpuResource *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return faultbufMap((struct MmuFaultBuffer *)(((unsigned char *) pMmuFaultBuffer) - __nvoc_rtti_MmuFaultBuffer_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // faultbufUnmap: virtual override (res) base (gpures) -static NV_STATUS __nvoc_down_thunk_MmuFaultBuffer_gpuresUnmap(struct GpuResource *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_down_thunk_MmuFaultBuffer_gpuresUnmap(struct GpuResource *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return faultbufUnmap((struct MmuFaultBuffer *)(((unsigned char *) pMmuFaultBuffer) - __nvoc_rtti_MmuFaultBuffer_GpuResource.offset), pCallContext, pCpuMapping); } // faultbufGetMapAddrSpace: virtual override (gpures) base (gpures) -static NV_STATUS __nvoc_down_thunk_MmuFaultBuffer_gpuresGetMapAddrSpace(struct GpuResource *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_down_thunk_MmuFaultBuffer_gpuresGetMapAddrSpace(struct GpuResource *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return faultbufGetMapAddrSpace((struct MmuFaultBuffer *)(((unsigned char *) pMmuFaultBuffer) - __nvoc_rtti_MmuFaultBuffer_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_faultbufControl(struct MmuFaultBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_GpuResource_faultbufShareCallback(struct MmuFaultBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_faultbufGetRegBaseOffsetAndSize(struct MmuFaultBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_faultbufInternalControlForward(struct MmuFaultBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_faultbufGetInternalObjectHandle(struct MmuFaultBuffer *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_faultbufAccessCallback(struct MmuFaultBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_faultbufGetMemInterMapParams(struct MmuFaultBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_faultbufCheckMemInterUnmap(struct MmuFaultBuffer *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_faultbufGetMemoryMappingDescriptor(struct MmuFaultBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_faultbufControlSerialization_Prologue(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_faultbufControlSerialization_Epilogue(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_faultbufControl_Prologue(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_faultbufControl_Epilogue(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_faultbufCanCopy(struct MmuFaultBuffer *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_faultbufIsDuplicate(struct MmuFaultBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_faultbufPreDestruct(struct MmuFaultBuffer *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_faultbufControlFilter(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_faultbufIsPartialUnmapSupported(struct MmuFaultBuffer *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_faultbufMapTo(struct MmuFaultBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_faultbufUnmapFrom(struct MmuFaultBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_faultbufGetRefCount(struct MmuFaultBuffer *pResource); // this +void __nvoc_up_thunk_RsResource_faultbufAddAdditionalDependants(struct RsClient *pClient, struct MmuFaultBuffer *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_faultbufGetNotificationListPtr(struct MmuFaultBuffer *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_faultbufGetNotificationShare(struct MmuFaultBuffer *pNotifier); // this +void __nvoc_up_thunk_Notifier_faultbufSetNotificationShare(struct MmuFaultBuffer *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_faultbufUnregisterEvent(struct MmuFaultBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_faultbufGetOrAllocNotifShare(struct MmuFaultBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 27 up-thunk(s) defined to bridge methods in MmuFaultBuffer to superclasses // faultbufControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_faultbufControl(struct MmuFaultBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_faultbufControl(struct MmuFaultBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MmuFaultBuffer_GpuResource.offset), pCallContext, pParams); } // faultbufShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_faultbufShareCallback(struct MmuFaultBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_faultbufShareCallback(struct MmuFaultBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MmuFaultBuffer_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // faultbufGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_faultbufGetRegBaseOffsetAndSize(struct MmuFaultBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_faultbufGetRegBaseOffsetAndSize(struct MmuFaultBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MmuFaultBuffer_GpuResource.offset), pGpu, pOffset, pSize); } // faultbufInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_faultbufInternalControlForward(struct MmuFaultBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_faultbufInternalControlForward(struct MmuFaultBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MmuFaultBuffer_GpuResource.offset), command, pParams, size); } // faultbufGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_faultbufGetInternalObjectHandle(struct MmuFaultBuffer *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_faultbufGetInternalObjectHandle(struct MmuFaultBuffer *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_MmuFaultBuffer_GpuResource.offset)); } // faultbufAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_faultbufAccessCallback(struct MmuFaultBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_faultbufAccessCallback(struct MmuFaultBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // faultbufGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_faultbufGetMemInterMapParams(struct MmuFaultBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_faultbufGetMemInterMapParams(struct MmuFaultBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), pParams); } // faultbufCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_faultbufCheckMemInterUnmap(struct MmuFaultBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_faultbufCheckMemInterUnmap(struct MmuFaultBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), bSubdeviceHandleProvided); } // faultbufGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_faultbufGetMemoryMappingDescriptor(struct MmuFaultBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_faultbufGetMemoryMappingDescriptor(struct MmuFaultBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), ppMemDesc); } // faultbufControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_faultbufControlSerialization_Prologue(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_faultbufControlSerialization_Prologue(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), pCallContext, pParams); } // faultbufControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_faultbufControlSerialization_Epilogue(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_faultbufControlSerialization_Epilogue(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), pCallContext, pParams); } // faultbufControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_faultbufControl_Prologue(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_faultbufControl_Prologue(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), pCallContext, pParams); } // faultbufControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_faultbufControl_Epilogue(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_faultbufControl_Epilogue(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RmResource.offset), pCallContext, pParams); } // faultbufCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_faultbufCanCopy(struct MmuFaultBuffer *pResource) { +NvBool __nvoc_up_thunk_RsResource_faultbufCanCopy(struct MmuFaultBuffer *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset)); } // faultbufIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_faultbufIsDuplicate(struct MmuFaultBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_faultbufIsDuplicate(struct MmuFaultBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset), hMemory, pDuplicate); } // faultbufPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_faultbufPreDestruct(struct MmuFaultBuffer *pResource) { +void __nvoc_up_thunk_RsResource_faultbufPreDestruct(struct MmuFaultBuffer *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset)); } // faultbufControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_faultbufControlFilter(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_faultbufControlFilter(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset), pCallContext, pParams); } // faultbufIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_faultbufIsPartialUnmapSupported(struct MmuFaultBuffer *pResource) { +NvBool __nvoc_up_thunk_RsResource_faultbufIsPartialUnmapSupported(struct MmuFaultBuffer *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset)); } // faultbufMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_faultbufMapTo(struct MmuFaultBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_faultbufMapTo(struct MmuFaultBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset), pParams); } // faultbufUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_faultbufUnmapFrom(struct MmuFaultBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_faultbufUnmapFrom(struct MmuFaultBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset), pParams); } // faultbufGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_faultbufGetRefCount(struct MmuFaultBuffer *pResource) { +NvU32 __nvoc_up_thunk_RsResource_faultbufGetRefCount(struct MmuFaultBuffer *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset)); } // faultbufAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_faultbufAddAdditionalDependants(struct RsClient *pClient, struct MmuFaultBuffer *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_faultbufAddAdditionalDependants(struct RsClient *pClient, struct MmuFaultBuffer *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MmuFaultBuffer_RsResource.offset), pReference); } // faultbufGetNotificationListPtr: virtual inherited (notify) base (notify) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_faultbufGetNotificationListPtr(struct MmuFaultBuffer *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_faultbufGetNotificationListPtr(struct MmuFaultBuffer *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_MmuFaultBuffer_Notifier.offset)); } // faultbufGetNotificationShare: virtual inherited (notify) base (notify) -static struct NotifShare * __nvoc_up_thunk_Notifier_faultbufGetNotificationShare(struct MmuFaultBuffer *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_faultbufGetNotificationShare(struct MmuFaultBuffer *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_MmuFaultBuffer_Notifier.offset)); } // faultbufSetNotificationShare: virtual inherited (notify) base (notify) -static void __nvoc_up_thunk_Notifier_faultbufSetNotificationShare(struct MmuFaultBuffer *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_faultbufSetNotificationShare(struct MmuFaultBuffer *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_MmuFaultBuffer_Notifier.offset), pNotifShare); } // faultbufUnregisterEvent: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_faultbufUnregisterEvent(struct MmuFaultBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_faultbufUnregisterEvent(struct MmuFaultBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_MmuFaultBuffer_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // faultbufGetOrAllocNotifShare: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_faultbufGetOrAllocNotifShare(struct MmuFaultBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_faultbufGetOrAllocNotifShare(struct MmuFaultBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_MmuFaultBuffer_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -413,18 +491,6 @@ NV_STATUS __nvoc_ctor_MmuFaultBuffer(MmuFaultBuffer *pThis, struct CALL_CONTEXT static void __nvoc_init_funcTable_MmuFaultBuffer_1(MmuFaultBuffer *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // faultbufMap -- virtual override (res) base (gpures) - pThis->__faultbufMap__ = &faultbufMap_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresMap__ = &__nvoc_down_thunk_MmuFaultBuffer_gpuresMap; - - // faultbufUnmap -- virtual override (res) base (gpures) - pThis->__faultbufUnmap__ = &faultbufUnmap_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresUnmap__ = &__nvoc_down_thunk_MmuFaultBuffer_gpuresUnmap; - - // faultbufGetMapAddrSpace -- virtual override (gpures) base (gpures) - pThis->__faultbufGetMapAddrSpace__ = &faultbufGetMapAddrSpace_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_down_thunk_MmuFaultBuffer_gpuresGetMapAddrSpace; - // faultbufCtrlCmdFaultbufferGetSize -- exported (id=0xb0690105) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__faultbufCtrlCmdFaultbufferGetSize__ = &faultbufCtrlCmdFaultbufferGetSize_IMPL; @@ -454,94 +520,141 @@ static void __nvoc_init_funcTable_MmuFaultBuffer_1(MmuFaultBuffer *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__faultbufCtrlCmdMmuFaultBufferUnregisterReplayBuf__ = &faultbufCtrlCmdMmuFaultBufferUnregisterReplayBuf_IMPL; #endif - - // faultbufControl -- virtual inherited (gpures) base (gpures) - pThis->__faultbufControl__ = &__nvoc_up_thunk_GpuResource_faultbufControl; - - // faultbufShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__faultbufShareCallback__ = &__nvoc_up_thunk_GpuResource_faultbufShareCallback; - - // faultbufGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__faultbufGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_faultbufGetRegBaseOffsetAndSize; - - // faultbufInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__faultbufInternalControlForward__ = &__nvoc_up_thunk_GpuResource_faultbufInternalControlForward; - - // faultbufGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__faultbufGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_faultbufGetInternalObjectHandle; - - // faultbufAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__faultbufAccessCallback__ = &__nvoc_up_thunk_RmResource_faultbufAccessCallback; - - // faultbufGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__faultbufGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_faultbufGetMemInterMapParams; - - // faultbufCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__faultbufCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_faultbufCheckMemInterUnmap; - - // faultbufGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__faultbufGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_faultbufGetMemoryMappingDescriptor; - - // faultbufControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__faultbufControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_faultbufControlSerialization_Prologue; - - // faultbufControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__faultbufControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_faultbufControlSerialization_Epilogue; - - // faultbufControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__faultbufControl_Prologue__ = &__nvoc_up_thunk_RmResource_faultbufControl_Prologue; - - // faultbufControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__faultbufControl_Epilogue__ = &__nvoc_up_thunk_RmResource_faultbufControl_Epilogue; - - // faultbufCanCopy -- virtual inherited (res) base (gpures) - pThis->__faultbufCanCopy__ = &__nvoc_up_thunk_RsResource_faultbufCanCopy; - - // faultbufIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__faultbufIsDuplicate__ = &__nvoc_up_thunk_RsResource_faultbufIsDuplicate; - - // faultbufPreDestruct -- virtual inherited (res) base (gpures) - pThis->__faultbufPreDestruct__ = &__nvoc_up_thunk_RsResource_faultbufPreDestruct; - - // faultbufControlFilter -- virtual inherited (res) base (gpures) - pThis->__faultbufControlFilter__ = &__nvoc_up_thunk_RsResource_faultbufControlFilter; - - // faultbufIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__faultbufIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_faultbufIsPartialUnmapSupported; - - // faultbufMapTo -- virtual inherited (res) base (gpures) - pThis->__faultbufMapTo__ = &__nvoc_up_thunk_RsResource_faultbufMapTo; - - // faultbufUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__faultbufUnmapFrom__ = &__nvoc_up_thunk_RsResource_faultbufUnmapFrom; - - // faultbufGetRefCount -- virtual inherited (res) base (gpures) - pThis->__faultbufGetRefCount__ = &__nvoc_up_thunk_RsResource_faultbufGetRefCount; - - // faultbufAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__faultbufAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_faultbufAddAdditionalDependants; - - // faultbufGetNotificationListPtr -- virtual inherited (notify) base (notify) - pThis->__faultbufGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_faultbufGetNotificationListPtr; - - // faultbufGetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__faultbufGetNotificationShare__ = &__nvoc_up_thunk_Notifier_faultbufGetNotificationShare; - - // faultbufSetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__faultbufSetNotificationShare__ = &__nvoc_up_thunk_Notifier_faultbufSetNotificationShare; - - // faultbufUnregisterEvent -- virtual inherited (notify) base (notify) - pThis->__faultbufUnregisterEvent__ = &__nvoc_up_thunk_Notifier_faultbufUnregisterEvent; - - // faultbufGetOrAllocNotifShare -- virtual inherited (notify) base (notify) - pThis->__faultbufGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_faultbufGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_MmuFaultBuffer_1 with approximately 39 basic block(s). +} // End __nvoc_init_funcTable_MmuFaultBuffer_1 with approximately 6 basic block(s). // Initialize vtable(s) for 36 virtual method(s). void __nvoc_init_funcTable_MmuFaultBuffer(MmuFaultBuffer *pThis) { - // Initialize vtable(s) with 36 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__MmuFaultBuffer vtable = { + .__faultbufMap__ = &faultbufMap_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresMap__ = &__nvoc_down_thunk_MmuFaultBuffer_gpuresMap, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__faultbufUnmap__ = &faultbufUnmap_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresUnmap__ = &__nvoc_down_thunk_MmuFaultBuffer_gpuresUnmap, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__faultbufGetMapAddrSpace__ = &faultbufGetMapAddrSpace_IMPL, // virtual override (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &__nvoc_down_thunk_MmuFaultBuffer_gpuresGetMapAddrSpace, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif + .__faultbufControl__ = &__nvoc_up_thunk_GpuResource_faultbufControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__faultbufShareCallback__ = &__nvoc_up_thunk_GpuResource_faultbufShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__faultbufGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_faultbufGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__faultbufInternalControlForward__ = &__nvoc_up_thunk_GpuResource_faultbufInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__faultbufGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_faultbufGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__faultbufAccessCallback__ = &__nvoc_up_thunk_RmResource_faultbufAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__faultbufGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_faultbufGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__faultbufCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_faultbufCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__faultbufGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_faultbufGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__faultbufControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_faultbufControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__faultbufControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_faultbufControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__faultbufControl_Prologue__ = &__nvoc_up_thunk_RmResource_faultbufControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__faultbufControl_Epilogue__ = &__nvoc_up_thunk_RmResource_faultbufControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__faultbufCanCopy__ = &__nvoc_up_thunk_RsResource_faultbufCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__faultbufIsDuplicate__ = &__nvoc_up_thunk_RsResource_faultbufIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__faultbufPreDestruct__ = &__nvoc_up_thunk_RsResource_faultbufPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__faultbufControlFilter__ = &__nvoc_up_thunk_RsResource_faultbufControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__faultbufIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_faultbufIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__faultbufMapTo__ = &__nvoc_up_thunk_RsResource_faultbufMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__faultbufUnmapFrom__ = &__nvoc_up_thunk_RsResource_faultbufUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__faultbufGetRefCount__ = &__nvoc_up_thunk_RsResource_faultbufGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__faultbufAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_faultbufAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__faultbufGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_faultbufGetNotificationListPtr, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__faultbufGetNotificationShare__ = &__nvoc_up_thunk_Notifier_faultbufGetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__faultbufSetNotificationShare__ = &__nvoc_up_thunk_Notifier_faultbufSetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__faultbufUnregisterEvent__ = &__nvoc_up_thunk_Notifier_faultbufUnregisterEvent, // virtual inherited (notify) base (notify) + .Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__faultbufGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_faultbufGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.Notifier.INotifier; // (inotify) super^2 + pThis->__nvoc_base_Notifier.__nvoc_vtable = &vtable.Notifier; // (notify) super + pThis->__nvoc_vtable = &vtable; // (faultbuf) this + + // Initialize vtable(s) with 6 per-object function pointer(s). __nvoc_init_funcTable_MmuFaultBuffer_1(pThis); } diff --git a/src/nvidia/generated/g_mmu_fault_buffer_nvoc.h b/src/nvidia/generated/g_mmu_fault_buffer_nvoc.h index b0970d9ccd..70f4079522 100644 --- a/src/nvidia/generated/g_mmu_fault_buffer_nvoc.h +++ b/src/nvidia/generated/g_mmu_fault_buffer_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -62,10 +62,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__MmuFaultBuffer; + + struct MmuFaultBuffer { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__MmuFaultBuffer *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -81,16 +86,24 @@ struct MmuFaultBuffer { struct Notifier *__nvoc_pbase_Notifier; // notify super struct MmuFaultBuffer *__nvoc_pbase_MmuFaultBuffer; // faultbuf - // Vtable with 36 per-object function pointers - NV_STATUS (*__faultbufMap__)(struct MmuFaultBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual override (res) base (gpures) - NV_STATUS (*__faultbufUnmap__)(struct MmuFaultBuffer * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual override (res) base (gpures) - NV_STATUS (*__faultbufGetMapAddrSpace__)(struct MmuFaultBuffer * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (gpures) base (gpures) + // Vtable with 6 per-object function pointers NV_STATUS (*__faultbufCtrlCmdFaultbufferGetSize__)(struct MmuFaultBuffer * /*this*/, NVB069_CTRL_FAULTBUFFER_GET_SIZE_PARAMS *); // exported (id=0xb0690105) NV_STATUS (*__faultbufCtrlCmdFaultbufferGetRegisterMappings__)(struct MmuFaultBuffer * /*this*/, NVB069_CTRL_CMD_FAULTBUFFER_GET_REGISTER_MAPPINGS_PARAMS *); // exported (id=0xb0690106) NV_STATUS (*__faultbufCtrlCmdMmuFaultBufferRegisterNonReplayBuf__)(struct MmuFaultBuffer * /*this*/, NVC369_CTRL_MMU_FAULT_BUFFER_REGISTER_NON_REPLAY_BUF_PARAMS *); // exported (id=0xc3690101) NV_STATUS (*__faultbufCtrlCmdMmuFaultBufferUnregisterNonReplayBuf__)(struct MmuFaultBuffer * /*this*/, NVC369_CTRL_MMU_FAULT_BUFFER_UNREGISTER_NON_REPLAY_BUF_PARAMS *); // exported (id=0xc3690102) NV_STATUS (*__faultbufCtrlCmdMmuFaultBufferRegisterReplayBuf__)(struct MmuFaultBuffer * /*this*/, NVC369_CTRL_MMU_FAULT_BUFFER_REGISTER_REPLAY_BUF_PARAMS *); // exported (id=0xc3690103) NV_STATUS (*__faultbufCtrlCmdMmuFaultBufferUnregisterReplayBuf__)(struct MmuFaultBuffer * /*this*/, NVC369_CTRL_MMU_FAULT_BUFFER_UNREGISTER_REPLAY_BUF_PARAMS *); // exported (id=0xc3690104) +}; + + +// Metadata including vtable with 30 function pointers plus superclass metadata +struct NVOC_VTABLE__MmuFaultBuffer { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + const struct NVOC_VTABLE__Notifier Notifier; // (notify) 5 function pointers + + NV_STATUS (*__faultbufMap__)(struct MmuFaultBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual override (res) base (gpures) + NV_STATUS (*__faultbufUnmap__)(struct MmuFaultBuffer * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual override (res) base (gpures) + NV_STATUS (*__faultbufGetMapAddrSpace__)(struct MmuFaultBuffer * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (gpures) base (gpures) NV_STATUS (*__faultbufControl__)(struct MmuFaultBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NvBool (*__faultbufShareCallback__)(struct MmuFaultBuffer * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__faultbufGetRegBaseOffsetAndSize__)(struct MmuFaultBuffer * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) @@ -150,11 +163,11 @@ NV_STATUS __nvoc_objCreate_MmuFaultBuffer(MmuFaultBuffer**, Dynamic*, NvU32, str // Wrapper macros -#define faultbufMap_FNPTR(pMmuFaultBuffer) pMmuFaultBuffer->__faultbufMap__ +#define faultbufMap_FNPTR(pMmuFaultBuffer) pMmuFaultBuffer->__nvoc_vtable->__faultbufMap__ #define faultbufMap(pMmuFaultBuffer, pCallContext, pParams, pCpuMapping) faultbufMap_DISPATCH(pMmuFaultBuffer, pCallContext, pParams, pCpuMapping) -#define faultbufUnmap_FNPTR(pMmuFaultBuffer) pMmuFaultBuffer->__faultbufUnmap__ +#define faultbufUnmap_FNPTR(pMmuFaultBuffer) pMmuFaultBuffer->__nvoc_vtable->__faultbufUnmap__ #define faultbufUnmap(pMmuFaultBuffer, pCallContext, pCpuMapping) faultbufUnmap_DISPATCH(pMmuFaultBuffer, pCallContext, pCpuMapping) -#define faultbufGetMapAddrSpace_FNPTR(pMmuFaultBuffer) pMmuFaultBuffer->__faultbufGetMapAddrSpace__ +#define faultbufGetMapAddrSpace_FNPTR(pMmuFaultBuffer) pMmuFaultBuffer->__nvoc_vtable->__faultbufGetMapAddrSpace__ #define faultbufGetMapAddrSpace(pMmuFaultBuffer, pCallContext, mapFlags, pAddrSpace) faultbufGetMapAddrSpace_DISPATCH(pMmuFaultBuffer, pCallContext, mapFlags, pAddrSpace) #define faultbufCtrlCmdFaultbufferGetSize_FNPTR(pMmuFaultBuffer) pMmuFaultBuffer->__faultbufCtrlCmdFaultbufferGetSize__ #define faultbufCtrlCmdFaultbufferGetSize(pMmuFaultBuffer, pGetParams) faultbufCtrlCmdFaultbufferGetSize_DISPATCH(pMmuFaultBuffer, pGetParams) @@ -168,72 +181,72 @@ NV_STATUS __nvoc_objCreate_MmuFaultBuffer(MmuFaultBuffer**, Dynamic*, NvU32, str #define faultbufCtrlCmdMmuFaultBufferRegisterReplayBuf(pMmuFaultBuffer, pParams) faultbufCtrlCmdMmuFaultBufferRegisterReplayBuf_DISPATCH(pMmuFaultBuffer, pParams) #define faultbufCtrlCmdMmuFaultBufferUnregisterReplayBuf_FNPTR(pMmuFaultBuffer) pMmuFaultBuffer->__faultbufCtrlCmdMmuFaultBufferUnregisterReplayBuf__ #define faultbufCtrlCmdMmuFaultBufferUnregisterReplayBuf(pMmuFaultBuffer, pParams) faultbufCtrlCmdMmuFaultBufferUnregisterReplayBuf_DISPATCH(pMmuFaultBuffer, pParams) -#define faultbufControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define faultbufControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define faultbufControl(pGpuResource, pCallContext, pParams) faultbufControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define faultbufShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define faultbufShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define faultbufShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) faultbufShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define faultbufGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define faultbufGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define faultbufGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) faultbufGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define faultbufInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define faultbufInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define faultbufInternalControlForward(pGpuResource, command, pParams, size) faultbufInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define faultbufGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define faultbufGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define faultbufGetInternalObjectHandle(pGpuResource) faultbufGetInternalObjectHandle_DISPATCH(pGpuResource) -#define faultbufAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define faultbufAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define faultbufAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) faultbufAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define faultbufGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define faultbufGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define faultbufGetMemInterMapParams(pRmResource, pParams) faultbufGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define faultbufCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define faultbufCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define faultbufCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) faultbufCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define faultbufGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define faultbufGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define faultbufGetMemoryMappingDescriptor(pRmResource, ppMemDesc) faultbufGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define faultbufControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define faultbufControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define faultbufControlSerialization_Prologue(pResource, pCallContext, pParams) faultbufControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define faultbufControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define faultbufControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define faultbufControlSerialization_Epilogue(pResource, pCallContext, pParams) faultbufControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define faultbufControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define faultbufControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define faultbufControl_Prologue(pResource, pCallContext, pParams) faultbufControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define faultbufControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define faultbufControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define faultbufControl_Epilogue(pResource, pCallContext, pParams) faultbufControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define faultbufCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define faultbufCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define faultbufCanCopy(pResource) faultbufCanCopy_DISPATCH(pResource) -#define faultbufIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define faultbufIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define faultbufIsDuplicate(pResource, hMemory, pDuplicate) faultbufIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define faultbufPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define faultbufPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define faultbufPreDestruct(pResource) faultbufPreDestruct_DISPATCH(pResource) -#define faultbufControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define faultbufControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define faultbufControlFilter(pResource, pCallContext, pParams) faultbufControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define faultbufIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define faultbufIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define faultbufIsPartialUnmapSupported(pResource) faultbufIsPartialUnmapSupported_DISPATCH(pResource) -#define faultbufMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define faultbufMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define faultbufMapTo(pResource, pParams) faultbufMapTo_DISPATCH(pResource, pParams) -#define faultbufUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define faultbufUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define faultbufUnmapFrom(pResource, pParams) faultbufUnmapFrom_DISPATCH(pResource, pParams) -#define faultbufGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define faultbufGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define faultbufGetRefCount(pResource) faultbufGetRefCount_DISPATCH(pResource) -#define faultbufAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define faultbufAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define faultbufAddAdditionalDependants(pClient, pResource, pReference) faultbufAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define faultbufGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define faultbufGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define faultbufGetNotificationListPtr(pNotifier) faultbufGetNotificationListPtr_DISPATCH(pNotifier) -#define faultbufGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define faultbufGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define faultbufGetNotificationShare(pNotifier) faultbufGetNotificationShare_DISPATCH(pNotifier) -#define faultbufSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define faultbufSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define faultbufSetNotificationShare(pNotifier, pNotifShare) faultbufSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define faultbufUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define faultbufUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define faultbufUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) faultbufUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define faultbufGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define faultbufGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define faultbufGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) faultbufGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS faultbufMap_DISPATCH(struct MmuFaultBuffer *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pMmuFaultBuffer->__faultbufMap__(pMmuFaultBuffer, pCallContext, pParams, pCpuMapping); + return pMmuFaultBuffer->__nvoc_vtable->__faultbufMap__(pMmuFaultBuffer, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS faultbufUnmap_DISPATCH(struct MmuFaultBuffer *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pMmuFaultBuffer->__faultbufUnmap__(pMmuFaultBuffer, pCallContext, pCpuMapping); + return pMmuFaultBuffer->__nvoc_vtable->__faultbufUnmap__(pMmuFaultBuffer, pCallContext, pCpuMapping); } static inline NV_STATUS faultbufGetMapAddrSpace_DISPATCH(struct MmuFaultBuffer *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pMmuFaultBuffer->__faultbufGetMapAddrSpace__(pMmuFaultBuffer, pCallContext, mapFlags, pAddrSpace); + return pMmuFaultBuffer->__nvoc_vtable->__faultbufGetMapAddrSpace__(pMmuFaultBuffer, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS faultbufCtrlCmdFaultbufferGetSize_DISPATCH(struct MmuFaultBuffer *pMmuFaultBuffer, NVB069_CTRL_FAULTBUFFER_GET_SIZE_PARAMS *pGetParams) { @@ -261,111 +274,111 @@ static inline NV_STATUS faultbufCtrlCmdMmuFaultBufferUnregisterReplayBuf_DISPATC } static inline NV_STATUS faultbufControl_DISPATCH(struct MmuFaultBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__faultbufControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__faultbufControl__(pGpuResource, pCallContext, pParams); } static inline NvBool faultbufShareCallback_DISPATCH(struct MmuFaultBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__faultbufShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__faultbufShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS faultbufGetRegBaseOffsetAndSize_DISPATCH(struct MmuFaultBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__faultbufGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__faultbufGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS faultbufInternalControlForward_DISPATCH(struct MmuFaultBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__faultbufInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__faultbufInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle faultbufGetInternalObjectHandle_DISPATCH(struct MmuFaultBuffer *pGpuResource) { - return pGpuResource->__faultbufGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__faultbufGetInternalObjectHandle__(pGpuResource); } static inline NvBool faultbufAccessCallback_DISPATCH(struct MmuFaultBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__faultbufAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__faultbufAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS faultbufGetMemInterMapParams_DISPATCH(struct MmuFaultBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__faultbufGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__faultbufGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS faultbufCheckMemInterUnmap_DISPATCH(struct MmuFaultBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__faultbufCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__faultbufCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS faultbufGetMemoryMappingDescriptor_DISPATCH(struct MmuFaultBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__faultbufGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__faultbufGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS faultbufControlSerialization_Prologue_DISPATCH(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__faultbufControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__faultbufControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void faultbufControlSerialization_Epilogue_DISPATCH(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__faultbufControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__faultbufControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS faultbufControl_Prologue_DISPATCH(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__faultbufControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__faultbufControl_Prologue__(pResource, pCallContext, pParams); } static inline void faultbufControl_Epilogue_DISPATCH(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__faultbufControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__faultbufControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool faultbufCanCopy_DISPATCH(struct MmuFaultBuffer *pResource) { - return pResource->__faultbufCanCopy__(pResource); + return pResource->__nvoc_vtable->__faultbufCanCopy__(pResource); } static inline NV_STATUS faultbufIsDuplicate_DISPATCH(struct MmuFaultBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__faultbufIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__faultbufIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void faultbufPreDestruct_DISPATCH(struct MmuFaultBuffer *pResource) { - pResource->__faultbufPreDestruct__(pResource); + pResource->__nvoc_vtable->__faultbufPreDestruct__(pResource); } static inline NV_STATUS faultbufControlFilter_DISPATCH(struct MmuFaultBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__faultbufControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__faultbufControlFilter__(pResource, pCallContext, pParams); } static inline NvBool faultbufIsPartialUnmapSupported_DISPATCH(struct MmuFaultBuffer *pResource) { - return pResource->__faultbufIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__faultbufIsPartialUnmapSupported__(pResource); } static inline NV_STATUS faultbufMapTo_DISPATCH(struct MmuFaultBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__faultbufMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__faultbufMapTo__(pResource, pParams); } static inline NV_STATUS faultbufUnmapFrom_DISPATCH(struct MmuFaultBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__faultbufUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__faultbufUnmapFrom__(pResource, pParams); } static inline NvU32 faultbufGetRefCount_DISPATCH(struct MmuFaultBuffer *pResource) { - return pResource->__faultbufGetRefCount__(pResource); + return pResource->__nvoc_vtable->__faultbufGetRefCount__(pResource); } static inline void faultbufAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MmuFaultBuffer *pResource, RsResourceRef *pReference) { - pResource->__faultbufAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__faultbufAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * faultbufGetNotificationListPtr_DISPATCH(struct MmuFaultBuffer *pNotifier) { - return pNotifier->__faultbufGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__faultbufGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * faultbufGetNotificationShare_DISPATCH(struct MmuFaultBuffer *pNotifier) { - return pNotifier->__faultbufGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__faultbufGetNotificationShare__(pNotifier); } static inline void faultbufSetNotificationShare_DISPATCH(struct MmuFaultBuffer *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__faultbufSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__faultbufSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS faultbufUnregisterEvent_DISPATCH(struct MmuFaultBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__faultbufUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__faultbufUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS faultbufGetOrAllocNotifShare_DISPATCH(struct MmuFaultBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__faultbufGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__faultbufGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS faultbufMap_IMPL(struct MmuFaultBuffer *pMmuFaultBuffer, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); diff --git a/src/nvidia/generated/g_mps_api_nvoc.c b/src/nvidia/generated/g_mps_api_nvoc.c index 1f2df00acd..d188ff4c5b 100644 --- a/src/nvidia/generated/g_mps_api_nvoc.c +++ b/src/nvidia/generated/g_mps_api_nvoc.c @@ -84,110 +84,153 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_MpsApi = /*pExportInfo=*/ &__nvoc_export_info_MpsApi }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_RmResource_mpsApiAccessCallback(struct MpsApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_mpsApiShareCallback(struct MpsApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_mpsApiGetMemInterMapParams(struct MpsApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_mpsApiCheckMemInterUnmap(struct MpsApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_mpsApiGetMemoryMappingDescriptor(struct MpsApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_mpsApiControlSerialization_Prologue(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_mpsApiControlSerialization_Epilogue(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_mpsApiControl_Prologue(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_mpsApiControl_Epilogue(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_mpsApiCanCopy(struct MpsApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_mpsApiIsDuplicate(struct MpsApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_mpsApiPreDestruct(struct MpsApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_mpsApiControl(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_mpsApiControlFilter(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_mpsApiMap(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_mpsApiUnmap(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_mpsApiIsPartialUnmapSupported(struct MpsApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_mpsApiMapTo(struct MpsApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_mpsApiUnmapFrom(struct MpsApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_mpsApiGetRefCount(struct MpsApi *pResource); // this +void __nvoc_up_thunk_RsResource_mpsApiAddAdditionalDependants(struct RsClient *pClient, struct MpsApi *pResource, RsResourceRef *pReference); // this + // 21 up-thunk(s) defined to bridge methods in MpsApi to superclasses // mpsApiAccessCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_mpsApiAccessCallback(struct MpsApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_mpsApiAccessCallback(struct MpsApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // mpsApiShareCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_mpsApiShareCallback(struct MpsApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_mpsApiShareCallback(struct MpsApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // mpsApiGetMemInterMapParams: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_mpsApiGetMemInterMapParams(struct MpsApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_mpsApiGetMemInterMapParams(struct MpsApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MpsApi_RmResource.offset), pParams); } // mpsApiCheckMemInterUnmap: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_mpsApiCheckMemInterUnmap(struct MpsApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_mpsApiCheckMemInterUnmap(struct MpsApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MpsApi_RmResource.offset), bSubdeviceHandleProvided); } // mpsApiGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_mpsApiGetMemoryMappingDescriptor(struct MpsApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_mpsApiGetMemoryMappingDescriptor(struct MpsApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_MpsApi_RmResource.offset), ppMemDesc); } // mpsApiControlSerialization_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_mpsApiControlSerialization_Prologue(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_mpsApiControlSerialization_Prologue(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RmResource.offset), pCallContext, pParams); } // mpsApiControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_mpsApiControlSerialization_Epilogue(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_mpsApiControlSerialization_Epilogue(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RmResource.offset), pCallContext, pParams); } // mpsApiControl_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_mpsApiControl_Prologue(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_mpsApiControl_Prologue(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RmResource.offset), pCallContext, pParams); } // mpsApiControl_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_mpsApiControl_Epilogue(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_mpsApiControl_Epilogue(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RmResource.offset), pCallContext, pParams); } // mpsApiCanCopy: virtual inherited (res) base (rmres) -static NvBool __nvoc_up_thunk_RsResource_mpsApiCanCopy(struct MpsApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_mpsApiCanCopy(struct MpsApi *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset)); } // mpsApiIsDuplicate: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_mpsApiIsDuplicate(struct MpsApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_mpsApiIsDuplicate(struct MpsApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset), hMemory, pDuplicate); } // mpsApiPreDestruct: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_mpsApiPreDestruct(struct MpsApi *pResource) { +void __nvoc_up_thunk_RsResource_mpsApiPreDestruct(struct MpsApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset)); } // mpsApiControl: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_mpsApiControl(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_mpsApiControl(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset), pCallContext, pParams); } // mpsApiControlFilter: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_mpsApiControlFilter(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_mpsApiControlFilter(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset), pCallContext, pParams); } // mpsApiMap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_mpsApiMap(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_mpsApiMap(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset), pCallContext, pParams, pCpuMapping); } // mpsApiUnmap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_mpsApiUnmap(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_mpsApiUnmap(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset), pCallContext, pCpuMapping); } // mpsApiIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body -static NvBool __nvoc_up_thunk_RsResource_mpsApiIsPartialUnmapSupported(struct MpsApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_mpsApiIsPartialUnmapSupported(struct MpsApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset)); } // mpsApiMapTo: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_mpsApiMapTo(struct MpsApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_mpsApiMapTo(struct MpsApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset), pParams); } // mpsApiUnmapFrom: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_mpsApiUnmapFrom(struct MpsApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_mpsApiUnmapFrom(struct MpsApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset), pParams); } // mpsApiGetRefCount: virtual inherited (res) base (rmres) -static NvU32 __nvoc_up_thunk_RsResource_mpsApiGetRefCount(struct MpsApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_mpsApiGetRefCount(struct MpsApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset)); } // mpsApiAddAdditionalDependants: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_mpsApiAddAdditionalDependants(struct RsClient *pClient, struct MpsApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_mpsApiAddAdditionalDependants(struct RsClient *pClient, struct MpsApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_MpsApi_RsResource.offset), pReference); } @@ -231,76 +274,80 @@ NV_STATUS __nvoc_ctor_MpsApi(MpsApi *pThis, CALL_CONTEXT * arg_pCallContext, str // Vtable initialization static void __nvoc_init_funcTable_MpsApi_1(MpsApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // mpsApiAccessCallback -- virtual inherited (rmres) base (rmres) - pThis->__mpsApiAccessCallback__ = &__nvoc_up_thunk_RmResource_mpsApiAccessCallback; - - // mpsApiShareCallback -- virtual inherited (rmres) base (rmres) - pThis->__mpsApiShareCallback__ = &__nvoc_up_thunk_RmResource_mpsApiShareCallback; - - // mpsApiGetMemInterMapParams -- virtual inherited (rmres) base (rmres) - pThis->__mpsApiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_mpsApiGetMemInterMapParams; - - // mpsApiCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) - pThis->__mpsApiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_mpsApiCheckMemInterUnmap; - - // mpsApiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) - pThis->__mpsApiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_mpsApiGetMemoryMappingDescriptor; - - // mpsApiControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__mpsApiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_mpsApiControlSerialization_Prologue; - - // mpsApiControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__mpsApiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_mpsApiControlSerialization_Epilogue; - - // mpsApiControl_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__mpsApiControl_Prologue__ = &__nvoc_up_thunk_RmResource_mpsApiControl_Prologue; - - // mpsApiControl_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__mpsApiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_mpsApiControl_Epilogue; - - // mpsApiCanCopy -- virtual inherited (res) base (rmres) - pThis->__mpsApiCanCopy__ = &__nvoc_up_thunk_RsResource_mpsApiCanCopy; - - // mpsApiIsDuplicate -- virtual inherited (res) base (rmres) - pThis->__mpsApiIsDuplicate__ = &__nvoc_up_thunk_RsResource_mpsApiIsDuplicate; - - // mpsApiPreDestruct -- virtual inherited (res) base (rmres) - pThis->__mpsApiPreDestruct__ = &__nvoc_up_thunk_RsResource_mpsApiPreDestruct; - - // mpsApiControl -- virtual inherited (res) base (rmres) - pThis->__mpsApiControl__ = &__nvoc_up_thunk_RsResource_mpsApiControl; - - // mpsApiControlFilter -- virtual inherited (res) base (rmres) - pThis->__mpsApiControlFilter__ = &__nvoc_up_thunk_RsResource_mpsApiControlFilter; - - // mpsApiMap -- virtual inherited (res) base (rmres) - pThis->__mpsApiMap__ = &__nvoc_up_thunk_RsResource_mpsApiMap; - - // mpsApiUnmap -- virtual inherited (res) base (rmres) - pThis->__mpsApiUnmap__ = &__nvoc_up_thunk_RsResource_mpsApiUnmap; - - // mpsApiIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body - pThis->__mpsApiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_mpsApiIsPartialUnmapSupported; - - // mpsApiMapTo -- virtual inherited (res) base (rmres) - pThis->__mpsApiMapTo__ = &__nvoc_up_thunk_RsResource_mpsApiMapTo; - - // mpsApiUnmapFrom -- virtual inherited (res) base (rmres) - pThis->__mpsApiUnmapFrom__ = &__nvoc_up_thunk_RsResource_mpsApiUnmapFrom; - - // mpsApiGetRefCount -- virtual inherited (res) base (rmres) - pThis->__mpsApiGetRefCount__ = &__nvoc_up_thunk_RsResource_mpsApiGetRefCount; - - // mpsApiAddAdditionalDependants -- virtual inherited (res) base (rmres) - pThis->__mpsApiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_mpsApiAddAdditionalDependants; -} // End __nvoc_init_funcTable_MpsApi_1 with approximately 21 basic block(s). +} // End __nvoc_init_funcTable_MpsApi_1 // Initialize vtable(s) for 21 virtual method(s). void __nvoc_init_funcTable_MpsApi(MpsApi *pThis) { - // Initialize vtable(s) with 21 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__MpsApi vtable = { + .__mpsApiAccessCallback__ = &__nvoc_up_thunk_RmResource_mpsApiAccessCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__mpsApiShareCallback__ = &__nvoc_up_thunk_RmResource_mpsApiShareCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__mpsApiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_mpsApiGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__mpsApiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_mpsApiCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__mpsApiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_mpsApiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__mpsApiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_mpsApiControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__mpsApiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_mpsApiControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__mpsApiControl_Prologue__ = &__nvoc_up_thunk_RmResource_mpsApiControl_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__mpsApiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_mpsApiControl_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__mpsApiCanCopy__ = &__nvoc_up_thunk_RsResource_mpsApiCanCopy, // virtual inherited (res) base (rmres) + .RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__mpsApiIsDuplicate__ = &__nvoc_up_thunk_RsResource_mpsApiIsDuplicate, // virtual inherited (res) base (rmres) + .RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__mpsApiPreDestruct__ = &__nvoc_up_thunk_RsResource_mpsApiPreDestruct, // virtual inherited (res) base (rmres) + .RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__mpsApiControl__ = &__nvoc_up_thunk_RsResource_mpsApiControl, // virtual inherited (res) base (rmres) + .RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControl__ = &resControl_IMPL, // virtual + .__mpsApiControlFilter__ = &__nvoc_up_thunk_RsResource_mpsApiControlFilter, // virtual inherited (res) base (rmres) + .RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__mpsApiMap__ = &__nvoc_up_thunk_RsResource_mpsApiMap, // virtual inherited (res) base (rmres) + .RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMap__ = &resMap_IMPL, // virtual + .__mpsApiUnmap__ = &__nvoc_up_thunk_RsResource_mpsApiUnmap, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__mpsApiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_mpsApiIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__mpsApiMapTo__ = &__nvoc_up_thunk_RsResource_mpsApiMapTo, // virtual inherited (res) base (rmres) + .RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__mpsApiUnmapFrom__ = &__nvoc_up_thunk_RsResource_mpsApiUnmapFrom, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__mpsApiGetRefCount__ = &__nvoc_up_thunk_RsResource_mpsApiGetRefCount, // virtual inherited (res) base (rmres) + .RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__mpsApiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_mpsApiAddAdditionalDependants, // virtual inherited (res) base (rmres) + .RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.RmResource.RsResource; // (res) super^2 + pThis->__nvoc_base_RmResource.__nvoc_vtable = &vtable.RmResource; // (rmres) super + pThis->__nvoc_vtable = &vtable; // (mpsApi) this __nvoc_init_funcTable_MpsApi_1(pThis); } diff --git a/src/nvidia/generated/g_mps_api_nvoc.h b/src/nvidia/generated/g_mps_api_nvoc.h index 80c4ccd0db..fec687254a 100644 --- a/src/nvidia/generated/g_mps_api_nvoc.h +++ b/src/nvidia/generated/g_mps_api_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -76,10 +76,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__MpsApi; + + struct MpsApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__MpsApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; @@ -90,8 +95,13 @@ struct MpsApi { struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^2 struct RmResource *__nvoc_pbase_RmResource; // rmres super struct MpsApi *__nvoc_pbase_MpsApi; // mpsApi +}; + + +// Metadata including vtable with 21 function pointers plus superclass metadata +struct NVOC_VTABLE__MpsApi { + const struct NVOC_VTABLE__RmResource RmResource; // (rmres) 21 function pointers - // Vtable with 21 per-object function pointers NvBool (*__mpsApiAccessCallback__)(struct MpsApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) NvBool (*__mpsApiShareCallback__)(struct MpsApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) NV_STATUS (*__mpsApiGetMemInterMapParams__)(struct MpsApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) @@ -145,132 +155,132 @@ NV_STATUS __nvoc_objCreate_MpsApi(MpsApi**, Dynamic*, NvU32, CALL_CONTEXT * arg_ // Wrapper macros -#define mpsApiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define mpsApiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define mpsApiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) mpsApiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define mpsApiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ +#define mpsApiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define mpsApiShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) mpsApiShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define mpsApiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define mpsApiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define mpsApiGetMemInterMapParams(pRmResource, pParams) mpsApiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define mpsApiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define mpsApiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define mpsApiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) mpsApiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define mpsApiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define mpsApiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define mpsApiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) mpsApiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define mpsApiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define mpsApiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define mpsApiControlSerialization_Prologue(pResource, pCallContext, pParams) mpsApiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define mpsApiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define mpsApiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define mpsApiControlSerialization_Epilogue(pResource, pCallContext, pParams) mpsApiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define mpsApiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ +#define mpsApiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define mpsApiControl_Prologue(pResource, pCallContext, pParams) mpsApiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define mpsApiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define mpsApiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define mpsApiControl_Epilogue(pResource, pCallContext, pParams) mpsApiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define mpsApiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define mpsApiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define mpsApiCanCopy(pResource) mpsApiCanCopy_DISPATCH(pResource) -#define mpsApiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define mpsApiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define mpsApiIsDuplicate(pResource, hMemory, pDuplicate) mpsApiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define mpsApiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define mpsApiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define mpsApiPreDestruct(pResource) mpsApiPreDestruct_DISPATCH(pResource) -#define mpsApiControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define mpsApiControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControl__ #define mpsApiControl(pResource, pCallContext, pParams) mpsApiControl_DISPATCH(pResource, pCallContext, pParams) -#define mpsApiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define mpsApiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define mpsApiControlFilter(pResource, pCallContext, pParams) mpsApiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define mpsApiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define mpsApiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define mpsApiMap(pResource, pCallContext, pParams, pCpuMapping) mpsApiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define mpsApiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define mpsApiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define mpsApiUnmap(pResource, pCallContext, pCpuMapping) mpsApiUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define mpsApiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define mpsApiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define mpsApiIsPartialUnmapSupported(pResource) mpsApiIsPartialUnmapSupported_DISPATCH(pResource) -#define mpsApiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define mpsApiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define mpsApiMapTo(pResource, pParams) mpsApiMapTo_DISPATCH(pResource, pParams) -#define mpsApiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define mpsApiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define mpsApiUnmapFrom(pResource, pParams) mpsApiUnmapFrom_DISPATCH(pResource, pParams) -#define mpsApiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define mpsApiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define mpsApiGetRefCount(pResource) mpsApiGetRefCount_DISPATCH(pResource) -#define mpsApiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define mpsApiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define mpsApiAddAdditionalDependants(pClient, pResource, pReference) mpsApiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool mpsApiAccessCallback_DISPATCH(struct MpsApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__mpsApiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__mpsApiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool mpsApiShareCallback_DISPATCH(struct MpsApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__mpsApiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__mpsApiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS mpsApiGetMemInterMapParams_DISPATCH(struct MpsApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__mpsApiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__mpsApiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS mpsApiCheckMemInterUnmap_DISPATCH(struct MpsApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__mpsApiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__mpsApiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS mpsApiGetMemoryMappingDescriptor_DISPATCH(struct MpsApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__mpsApiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__mpsApiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS mpsApiControlSerialization_Prologue_DISPATCH(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__mpsApiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__mpsApiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void mpsApiControlSerialization_Epilogue_DISPATCH(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__mpsApiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__mpsApiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS mpsApiControl_Prologue_DISPATCH(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__mpsApiControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__mpsApiControl_Prologue__(pResource, pCallContext, pParams); } static inline void mpsApiControl_Epilogue_DISPATCH(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__mpsApiControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__mpsApiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool mpsApiCanCopy_DISPATCH(struct MpsApi *pResource) { - return pResource->__mpsApiCanCopy__(pResource); + return pResource->__nvoc_vtable->__mpsApiCanCopy__(pResource); } static inline NV_STATUS mpsApiIsDuplicate_DISPATCH(struct MpsApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__mpsApiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__mpsApiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void mpsApiPreDestruct_DISPATCH(struct MpsApi *pResource) { - pResource->__mpsApiPreDestruct__(pResource); + pResource->__nvoc_vtable->__mpsApiPreDestruct__(pResource); } static inline NV_STATUS mpsApiControl_DISPATCH(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__mpsApiControl__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__mpsApiControl__(pResource, pCallContext, pParams); } static inline NV_STATUS mpsApiControlFilter_DISPATCH(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__mpsApiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__mpsApiControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS mpsApiMap_DISPATCH(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__mpsApiMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__mpsApiMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS mpsApiUnmap_DISPATCH(struct MpsApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__mpsApiUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__mpsApiUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool mpsApiIsPartialUnmapSupported_DISPATCH(struct MpsApi *pResource) { - return pResource->__mpsApiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__mpsApiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS mpsApiMapTo_DISPATCH(struct MpsApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__mpsApiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__mpsApiMapTo__(pResource, pParams); } static inline NV_STATUS mpsApiUnmapFrom_DISPATCH(struct MpsApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__mpsApiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__mpsApiUnmapFrom__(pResource, pParams); } static inline NvU32 mpsApiGetRefCount_DISPATCH(struct MpsApi *pResource) { - return pResource->__mpsApiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__mpsApiGetRefCount__(pResource); } static inline void mpsApiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct MpsApi *pResource, RsResourceRef *pReference) { - pResource->__mpsApiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__mpsApiAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS mpsApiConstruct_IMPL(struct MpsApi *arg_pMpsApi, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_no_device_mem_nvoc.c b/src/nvidia/generated/g_no_device_mem_nvoc.c index 5d8d5fabaa..7f86d82b03 100644 --- a/src/nvidia/generated/g_no_device_mem_nvoc.c +++ b/src/nvidia/generated/g_no_device_mem_nvoc.c @@ -93,138 +93,207 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_NoDeviceMemory = /*pExportInfo=*/ &__nvoc_export_info_NoDeviceMemory }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super +NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_down_thunk_NoDeviceMemory_memGetMapAddrSpace(struct Memory *pNoDeviceMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this + // 1 down-thunk(s) defined to bridge methods in NoDeviceMemory from superclasses // nodevicememGetMapAddrSpace: virtual override (mem) base (mem) -static NV_STATUS __nvoc_down_thunk_NoDeviceMemory_memGetMapAddrSpace(struct Memory *pNoDeviceMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_down_thunk_NoDeviceMemory_memGetMapAddrSpace(struct Memory *pNoDeviceMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return nodevicememGetMapAddrSpace((struct NoDeviceMemory *)(((unsigned char *) pNoDeviceMemory) - __nvoc_rtti_NoDeviceMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_Memory_nodevicememIsDuplicate(struct NoDeviceMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate); // this +NV_STATUS __nvoc_up_thunk_Memory_nodevicememControl(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_nodevicememMap(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_nodevicememUnmap(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_nodevicememGetMemInterMapParams(struct NoDeviceMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_nodevicememCheckMemInterUnmap(struct NoDeviceMemory *pMemory, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_Memory_nodevicememGetMemoryMappingDescriptor(struct NoDeviceMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_Memory_nodevicememCheckCopyPermissions(struct NoDeviceMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // this +NV_STATUS __nvoc_up_thunk_Memory_nodevicememIsReady(struct NoDeviceMemory *pMemory, NvBool bCopyConstructorContext); // this +NvBool __nvoc_up_thunk_Memory_nodevicememIsGpuMapAllowed(struct NoDeviceMemory *pMemory, struct OBJGPU *pGpu); // this +NvBool __nvoc_up_thunk_Memory_nodevicememIsExportAllowed(struct NoDeviceMemory *pMemory); // this +NvBool __nvoc_up_thunk_RmResource_nodevicememAccessCallback(struct NoDeviceMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_nodevicememShareCallback(struct NoDeviceMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_nodevicememControlSerialization_Prologue(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_nodevicememControlSerialization_Epilogue(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_nodevicememControl_Prologue(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_nodevicememControl_Epilogue(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_nodevicememCanCopy(struct NoDeviceMemory *pResource); // this +void __nvoc_up_thunk_RsResource_nodevicememPreDestruct(struct NoDeviceMemory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_nodevicememControlFilter(struct NoDeviceMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_nodevicememIsPartialUnmapSupported(struct NoDeviceMemory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_nodevicememMapTo(struct NoDeviceMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_nodevicememUnmapFrom(struct NoDeviceMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_nodevicememGetRefCount(struct NoDeviceMemory *pResource); // this +void __nvoc_up_thunk_RsResource_nodevicememAddAdditionalDependants(struct RsClient *pClient, struct NoDeviceMemory *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in NoDeviceMemory to superclasses // nodevicememIsDuplicate: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_nodevicememIsDuplicate(struct NoDeviceMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_Memory_nodevicememIsDuplicate(struct NoDeviceMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), hMemory, pDuplicate); } // nodevicememControl: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_nodevicememControl(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_nodevicememControl(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), pCallContext, pParams); } // nodevicememMap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_nodevicememMap(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_nodevicememMap(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), pCallContext, pParams, pCpuMapping); } // nodevicememUnmap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_nodevicememUnmap(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_nodevicememUnmap(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), pCallContext, pCpuMapping); } // nodevicememGetMemInterMapParams: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_nodevicememGetMemInterMapParams(struct NoDeviceMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_nodevicememGetMemInterMapParams(struct NoDeviceMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), pParams); } // nodevicememCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_nodevicememCheckMemInterUnmap(struct NoDeviceMemory *pMemory, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_Memory_nodevicememCheckMemInterUnmap(struct NoDeviceMemory *pMemory, NvBool bSubdeviceHandleProvided) { return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), bSubdeviceHandleProvided); } // nodevicememGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_nodevicememGetMemoryMappingDescriptor(struct NoDeviceMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_Memory_nodevicememGetMemoryMappingDescriptor(struct NoDeviceMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), ppMemDesc); } // nodevicememCheckCopyPermissions: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_nodevicememCheckCopyPermissions(struct NoDeviceMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { +NV_STATUS __nvoc_up_thunk_Memory_nodevicememCheckCopyPermissions(struct NoDeviceMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), pDstGpu, pDstDevice); } // nodevicememIsReady: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_nodevicememIsReady(struct NoDeviceMemory *pMemory, NvBool bCopyConstructorContext) { +NV_STATUS __nvoc_up_thunk_Memory_nodevicememIsReady(struct NoDeviceMemory *pMemory, NvBool bCopyConstructorContext) { return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), bCopyConstructorContext); } // nodevicememIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_nodevicememIsGpuMapAllowed(struct NoDeviceMemory *pMemory, struct OBJGPU *pGpu) { +NvBool __nvoc_up_thunk_Memory_nodevicememIsGpuMapAllowed(struct NoDeviceMemory *pMemory, struct OBJGPU *pGpu) { return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset), pGpu); } // nodevicememIsExportAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_nodevicememIsExportAllowed(struct NoDeviceMemory *pMemory) { +NvBool __nvoc_up_thunk_Memory_nodevicememIsExportAllowed(struct NoDeviceMemory *pMemory) { return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_NoDeviceMemory_Memory.offset)); } // nodevicememAccessCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_nodevicememAccessCallback(struct NoDeviceMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_nodevicememAccessCallback(struct NoDeviceMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // nodevicememShareCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_nodevicememShareCallback(struct NoDeviceMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_nodevicememShareCallback(struct NoDeviceMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // nodevicememControlSerialization_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_nodevicememControlSerialization_Prologue(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_nodevicememControlSerialization_Prologue(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RmResource.offset), pCallContext, pParams); } // nodevicememControlSerialization_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_nodevicememControlSerialization_Epilogue(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_nodevicememControlSerialization_Epilogue(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RmResource.offset), pCallContext, pParams); } // nodevicememControl_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_nodevicememControl_Prologue(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_nodevicememControl_Prologue(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RmResource.offset), pCallContext, pParams); } // nodevicememControl_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_nodevicememControl_Epilogue(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_nodevicememControl_Epilogue(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RmResource.offset), pCallContext, pParams); } // nodevicememCanCopy: virtual inherited (res) base (mem) -static NvBool __nvoc_up_thunk_RsResource_nodevicememCanCopy(struct NoDeviceMemory *pResource) { +NvBool __nvoc_up_thunk_RsResource_nodevicememCanCopy(struct NoDeviceMemory *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset)); } // nodevicememPreDestruct: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_nodevicememPreDestruct(struct NoDeviceMemory *pResource) { +void __nvoc_up_thunk_RsResource_nodevicememPreDestruct(struct NoDeviceMemory *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset)); } // nodevicememControlFilter: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_nodevicememControlFilter(struct NoDeviceMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_nodevicememControlFilter(struct NoDeviceMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset), pCallContext, pParams); } // nodevicememIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body -static NvBool __nvoc_up_thunk_RsResource_nodevicememIsPartialUnmapSupported(struct NoDeviceMemory *pResource) { +NvBool __nvoc_up_thunk_RsResource_nodevicememIsPartialUnmapSupported(struct NoDeviceMemory *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset)); } // nodevicememMapTo: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_nodevicememMapTo(struct NoDeviceMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_nodevicememMapTo(struct NoDeviceMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset), pParams); } // nodevicememUnmapFrom: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_nodevicememUnmapFrom(struct NoDeviceMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_nodevicememUnmapFrom(struct NoDeviceMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset), pParams); } // nodevicememGetRefCount: virtual inherited (res) base (mem) -static NvU32 __nvoc_up_thunk_RsResource_nodevicememGetRefCount(struct NoDeviceMemory *pResource) { +NvU32 __nvoc_up_thunk_RsResource_nodevicememGetRefCount(struct NoDeviceMemory *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset)); } // nodevicememAddAdditionalDependants: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_nodevicememAddAdditionalDependants(struct RsClient *pClient, struct NoDeviceMemory *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_nodevicememAddAdditionalDependants(struct RsClient *pClient, struct NoDeviceMemory *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NoDeviceMemory_RsResource.offset), pReference); } @@ -268,92 +337,112 @@ NV_STATUS __nvoc_ctor_NoDeviceMemory(NoDeviceMemory *pThis, CALL_CONTEXT * arg_p // Vtable initialization static void __nvoc_init_funcTable_NoDeviceMemory_1(NoDeviceMemory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // nodevicememGetMapAddrSpace -- virtual override (mem) base (mem) - pThis->__nodevicememGetMapAddrSpace__ = &nodevicememGetMapAddrSpace_IMPL; - pThis->__nvoc_base_Memory.__memGetMapAddrSpace__ = &__nvoc_down_thunk_NoDeviceMemory_memGetMapAddrSpace; - - // nodevicememIsDuplicate -- virtual inherited (mem) base (mem) - pThis->__nodevicememIsDuplicate__ = &__nvoc_up_thunk_Memory_nodevicememIsDuplicate; - - // nodevicememControl -- virtual inherited (mem) base (mem) - pThis->__nodevicememControl__ = &__nvoc_up_thunk_Memory_nodevicememControl; - - // nodevicememMap -- virtual inherited (mem) base (mem) - pThis->__nodevicememMap__ = &__nvoc_up_thunk_Memory_nodevicememMap; - - // nodevicememUnmap -- virtual inherited (mem) base (mem) - pThis->__nodevicememUnmap__ = &__nvoc_up_thunk_Memory_nodevicememUnmap; - - // nodevicememGetMemInterMapParams -- virtual inherited (mem) base (mem) - pThis->__nodevicememGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_nodevicememGetMemInterMapParams; - - // nodevicememCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body - pThis->__nodevicememCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_nodevicememCheckMemInterUnmap; - - // nodevicememGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) - pThis->__nodevicememGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_nodevicememGetMemoryMappingDescriptor; - - // nodevicememCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body - pThis->__nodevicememCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_nodevicememCheckCopyPermissions; - - // nodevicememIsReady -- virtual inherited (mem) base (mem) - pThis->__nodevicememIsReady__ = &__nvoc_up_thunk_Memory_nodevicememIsReady; - - // nodevicememIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__nodevicememIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_nodevicememIsGpuMapAllowed; - - // nodevicememIsExportAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__nodevicememIsExportAllowed__ = &__nvoc_up_thunk_Memory_nodevicememIsExportAllowed; - - // nodevicememAccessCallback -- virtual inherited (rmres) base (mem) - pThis->__nodevicememAccessCallback__ = &__nvoc_up_thunk_RmResource_nodevicememAccessCallback; - - // nodevicememShareCallback -- virtual inherited (rmres) base (mem) - pThis->__nodevicememShareCallback__ = &__nvoc_up_thunk_RmResource_nodevicememShareCallback; - - // nodevicememControlSerialization_Prologue -- virtual inherited (rmres) base (mem) - pThis->__nodevicememControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_nodevicememControlSerialization_Prologue; - - // nodevicememControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__nodevicememControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_nodevicememControlSerialization_Epilogue; - - // nodevicememControl_Prologue -- virtual inherited (rmres) base (mem) - pThis->__nodevicememControl_Prologue__ = &__nvoc_up_thunk_RmResource_nodevicememControl_Prologue; - - // nodevicememControl_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__nodevicememControl_Epilogue__ = &__nvoc_up_thunk_RmResource_nodevicememControl_Epilogue; - - // nodevicememCanCopy -- virtual inherited (res) base (mem) - pThis->__nodevicememCanCopy__ = &__nvoc_up_thunk_RsResource_nodevicememCanCopy; - - // nodevicememPreDestruct -- virtual inherited (res) base (mem) - pThis->__nodevicememPreDestruct__ = &__nvoc_up_thunk_RsResource_nodevicememPreDestruct; - - // nodevicememControlFilter -- virtual inherited (res) base (mem) - pThis->__nodevicememControlFilter__ = &__nvoc_up_thunk_RsResource_nodevicememControlFilter; - - // nodevicememIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body - pThis->__nodevicememIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_nodevicememIsPartialUnmapSupported; - - // nodevicememMapTo -- virtual inherited (res) base (mem) - pThis->__nodevicememMapTo__ = &__nvoc_up_thunk_RsResource_nodevicememMapTo; - - // nodevicememUnmapFrom -- virtual inherited (res) base (mem) - pThis->__nodevicememUnmapFrom__ = &__nvoc_up_thunk_RsResource_nodevicememUnmapFrom; - - // nodevicememGetRefCount -- virtual inherited (res) base (mem) - pThis->__nodevicememGetRefCount__ = &__nvoc_up_thunk_RsResource_nodevicememGetRefCount; - - // nodevicememAddAdditionalDependants -- virtual inherited (res) base (mem) - pThis->__nodevicememAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_nodevicememAddAdditionalDependants; -} // End __nvoc_init_funcTable_NoDeviceMemory_1 with approximately 27 basic block(s). +} // End __nvoc_init_funcTable_NoDeviceMemory_1 // Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_NoDeviceMemory(NoDeviceMemory *pThis) { - // Initialize vtable(s) with 26 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__NoDeviceMemory vtable = { + .__nodevicememGetMapAddrSpace__ = &nodevicememGetMapAddrSpace_IMPL, // virtual override (mem) base (mem) + .Memory.__memGetMapAddrSpace__ = &__nvoc_down_thunk_NoDeviceMemory_memGetMapAddrSpace, // virtual + .__nodevicememIsDuplicate__ = &__nvoc_up_thunk_Memory_nodevicememIsDuplicate, // virtual inherited (mem) base (mem) + .Memory.__memIsDuplicate__ = &memIsDuplicate_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resIsDuplicate__ = &__nvoc_down_thunk_Memory_resIsDuplicate, // virtual + .__nodevicememControl__ = &__nvoc_up_thunk_Memory_nodevicememControl, // virtual inherited (mem) base (mem) + .Memory.__memControl__ = &memControl_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_Memory_resControl, // virtual + .__nodevicememMap__ = &__nvoc_up_thunk_Memory_nodevicememMap, // virtual inherited (mem) base (mem) + .Memory.__memMap__ = &memMap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_Memory_resMap, // virtual + .__nodevicememUnmap__ = &__nvoc_up_thunk_Memory_nodevicememUnmap, // virtual inherited (mem) base (mem) + .Memory.__memUnmap__ = &memUnmap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_Memory_resUnmap, // virtual + .__nodevicememGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_nodevicememGetMemInterMapParams, // virtual inherited (mem) base (mem) + .Memory.__memGetMemInterMapParams__ = &memGetMemInterMapParams_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_Memory_rmresGetMemInterMapParams, // virtual + .__nodevicememCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_nodevicememCheckMemInterUnmap, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckMemInterUnmap__ = &memCheckMemInterUnmap_ac1694, // inline virtual override (rmres) base (rmres) body + .Memory.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_Memory_rmresCheckMemInterUnmap, // virtual + .__nodevicememGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_nodevicememGetMemoryMappingDescriptor, // virtual inherited (mem) base (mem) + .Memory.__memGetMemoryMappingDescriptor__ = &memGetMemoryMappingDescriptor_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor, // virtual + .__nodevicememCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_nodevicememCheckCopyPermissions, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckCopyPermissions__ = &memCheckCopyPermissions_ac1694, // inline virtual body + .__nodevicememIsReady__ = &__nvoc_up_thunk_Memory_nodevicememIsReady, // virtual inherited (mem) base (mem) + .Memory.__memIsReady__ = &memIsReady_IMPL, // virtual + .__nodevicememIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_nodevicememIsGpuMapAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsGpuMapAllowed__ = &memIsGpuMapAllowed_e661f0, // inline virtual body + .__nodevicememIsExportAllowed__ = &__nvoc_up_thunk_Memory_nodevicememIsExportAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsExportAllowed__ = &memIsExportAllowed_e661f0, // inline virtual body + .__nodevicememAccessCallback__ = &__nvoc_up_thunk_RmResource_nodevicememAccessCallback, // virtual inherited (rmres) base (mem) + .Memory.__memAccessCallback__ = &__nvoc_up_thunk_RmResource_memAccessCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__nodevicememShareCallback__ = &__nvoc_up_thunk_RmResource_nodevicememShareCallback, // virtual inherited (rmres) base (mem) + .Memory.__memShareCallback__ = &__nvoc_up_thunk_RmResource_memShareCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__nodevicememControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_nodevicememControlSerialization_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__nodevicememControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_nodevicememControlSerialization_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__nodevicememControl_Prologue__ = &__nvoc_up_thunk_RmResource_nodevicememControl_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Prologue__ = &__nvoc_up_thunk_RmResource_memControl_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__nodevicememControl_Epilogue__ = &__nvoc_up_thunk_RmResource_nodevicememControl_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memControl_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__nodevicememCanCopy__ = &__nvoc_up_thunk_RsResource_nodevicememCanCopy, // virtual inherited (res) base (mem) + .Memory.__memCanCopy__ = &__nvoc_up_thunk_RsResource_memCanCopy, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__nodevicememPreDestruct__ = &__nvoc_up_thunk_RsResource_nodevicememPreDestruct, // virtual inherited (res) base (mem) + .Memory.__memPreDestruct__ = &__nvoc_up_thunk_RsResource_memPreDestruct, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__nodevicememControlFilter__ = &__nvoc_up_thunk_RsResource_nodevicememControlFilter, // virtual inherited (res) base (mem) + .Memory.__memControlFilter__ = &__nvoc_up_thunk_RsResource_memControlFilter, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__nodevicememIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_nodevicememIsPartialUnmapSupported, // inline virtual inherited (res) base (mem) body + .Memory.__memIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .Memory.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .Memory.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__nodevicememMapTo__ = &__nvoc_up_thunk_RsResource_nodevicememMapTo, // virtual inherited (res) base (mem) + .Memory.__memMapTo__ = &__nvoc_up_thunk_RsResource_memMapTo, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__nodevicememUnmapFrom__ = &__nvoc_up_thunk_RsResource_nodevicememUnmapFrom, // virtual inherited (res) base (mem) + .Memory.__memUnmapFrom__ = &__nvoc_up_thunk_RsResource_memUnmapFrom, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__nodevicememGetRefCount__ = &__nvoc_up_thunk_RsResource_nodevicememGetRefCount, // virtual inherited (res) base (mem) + .Memory.__memGetRefCount__ = &__nvoc_up_thunk_RsResource_memGetRefCount, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__nodevicememAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_nodevicememAddAdditionalDependants, // virtual inherited (res) base (mem) + .Memory.__memAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memAddAdditionalDependants, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.Memory.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable = &vtable.Memory.RmResource; // (rmres) super^2 + pThis->__nvoc_base_Memory.__nvoc_vtable = &vtable.Memory; // (mem) super + pThis->__nvoc_vtable = &vtable; // (nodevicemem) this __nvoc_init_funcTable_NoDeviceMemory_1(pThis); } diff --git a/src/nvidia/generated/g_no_device_mem_nvoc.h b/src/nvidia/generated/g_no_device_mem_nvoc.h index 2b8fb722e2..2e2a0c98df 100644 --- a/src/nvidia/generated/g_no_device_mem_nvoc.h +++ b/src/nvidia/generated/g_no_device_mem_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -60,10 +60,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__NoDeviceMemory; + + struct NoDeviceMemory { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__NoDeviceMemory *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; @@ -75,8 +80,13 @@ struct NoDeviceMemory { struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 struct Memory *__nvoc_pbase_Memory; // mem super struct NoDeviceMemory *__nvoc_pbase_NoDeviceMemory; // nodevicemem +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__NoDeviceMemory { + const struct NVOC_VTABLE__Memory Memory; // (mem) 26 function pointers - // Vtable with 26 per-object function pointers NV_STATUS (*__nodevicememGetMapAddrSpace__)(struct NoDeviceMemory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual override (mem) base (mem) NV_STATUS (*__nodevicememIsDuplicate__)(struct NoDeviceMemory * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) NV_STATUS (*__nodevicememControl__)(struct NoDeviceMemory * /*this*/, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (mem) base (mem) @@ -135,162 +145,162 @@ NV_STATUS __nvoc_objCreate_NoDeviceMemory(NoDeviceMemory**, Dynamic*, NvU32, CAL // Wrapper macros -#define nodevicememGetMapAddrSpace_FNPTR(pNoDeviceMemory) pNoDeviceMemory->__nodevicememGetMapAddrSpace__ +#define nodevicememGetMapAddrSpace_FNPTR(pNoDeviceMemory) pNoDeviceMemory->__nvoc_vtable->__nodevicememGetMapAddrSpace__ #define nodevicememGetMapAddrSpace(pNoDeviceMemory, pCallContext, mapFlags, pAddrSpace) nodevicememGetMapAddrSpace_DISPATCH(pNoDeviceMemory, pCallContext, mapFlags, pAddrSpace) -#define nodevicememIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define nodevicememIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsDuplicate__ #define nodevicememIsDuplicate(pMemory, hMemory, pDuplicate) nodevicememIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define nodevicememControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ +#define nodevicememControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memControl__ #define nodevicememControl(pMemory, pCallContext, pParams) nodevicememControl_DISPATCH(pMemory, pCallContext, pParams) -#define nodevicememMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define nodevicememMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memMap__ #define nodevicememMap(pMemory, pCallContext, pParams, pCpuMapping) nodevicememMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define nodevicememUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ +#define nodevicememUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memUnmap__ #define nodevicememUnmap(pMemory, pCallContext, pCpuMapping) nodevicememUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define nodevicememGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ +#define nodevicememGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemInterMapParams__ #define nodevicememGetMemInterMapParams(pMemory, pParams) nodevicememGetMemInterMapParams_DISPATCH(pMemory, pParams) -#define nodevicememCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define nodevicememCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckMemInterUnmap__ #define nodevicememCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) nodevicememCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define nodevicememGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ +#define nodevicememGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemoryMappingDescriptor__ #define nodevicememGetMemoryMappingDescriptor(pMemory, ppMemDesc) nodevicememGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define nodevicememCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ +#define nodevicememCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckCopyPermissions__ #define nodevicememCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) nodevicememCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define nodevicememIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define nodevicememIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsReady__ #define nodevicememIsReady(pMemory, bCopyConstructorContext) nodevicememIsReady_DISPATCH(pMemory, bCopyConstructorContext) -#define nodevicememIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define nodevicememIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsGpuMapAllowed__ #define nodevicememIsGpuMapAllowed(pMemory, pGpu) nodevicememIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define nodevicememIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define nodevicememIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsExportAllowed__ #define nodevicememIsExportAllowed(pMemory) nodevicememIsExportAllowed_DISPATCH(pMemory) -#define nodevicememAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define nodevicememAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define nodevicememAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) nodevicememAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define nodevicememShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define nodevicememShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define nodevicememShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) nodevicememShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define nodevicememControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define nodevicememControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define nodevicememControlSerialization_Prologue(pResource, pCallContext, pParams) nodevicememControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define nodevicememControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define nodevicememControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define nodevicememControlSerialization_Epilogue(pResource, pCallContext, pParams) nodevicememControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define nodevicememControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define nodevicememControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define nodevicememControl_Prologue(pResource, pCallContext, pParams) nodevicememControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define nodevicememControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define nodevicememControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define nodevicememControl_Epilogue(pResource, pCallContext, pParams) nodevicememControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define nodevicememCanCopy_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define nodevicememCanCopy_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define nodevicememCanCopy(pResource) nodevicememCanCopy_DISPATCH(pResource) -#define nodevicememPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define nodevicememPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define nodevicememPreDestruct(pResource) nodevicememPreDestruct_DISPATCH(pResource) -#define nodevicememControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define nodevicememControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define nodevicememControlFilter(pResource, pCallContext, pParams) nodevicememControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define nodevicememIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define nodevicememIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define nodevicememIsPartialUnmapSupported(pResource) nodevicememIsPartialUnmapSupported_DISPATCH(pResource) -#define nodevicememMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define nodevicememMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define nodevicememMapTo(pResource, pParams) nodevicememMapTo_DISPATCH(pResource, pParams) -#define nodevicememUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define nodevicememUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define nodevicememUnmapFrom(pResource, pParams) nodevicememUnmapFrom_DISPATCH(pResource, pParams) -#define nodevicememGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define nodevicememGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define nodevicememGetRefCount(pResource) nodevicememGetRefCount_DISPATCH(pResource) -#define nodevicememAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define nodevicememAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define nodevicememAddAdditionalDependants(pClient, pResource, pReference) nodevicememAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NV_STATUS nodevicememGetMapAddrSpace_DISPATCH(struct NoDeviceMemory *pNoDeviceMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pNoDeviceMemory->__nodevicememGetMapAddrSpace__(pNoDeviceMemory, pCallContext, mapFlags, pAddrSpace); + return pNoDeviceMemory->__nvoc_vtable->__nodevicememGetMapAddrSpace__(pNoDeviceMemory, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS nodevicememIsDuplicate_DISPATCH(struct NoDeviceMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__nodevicememIsDuplicate__(pMemory, hMemory, pDuplicate); + return pMemory->__nvoc_vtable->__nodevicememIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS nodevicememControl_DISPATCH(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__nodevicememControl__(pMemory, pCallContext, pParams); + return pMemory->__nvoc_vtable->__nodevicememControl__(pMemory, pCallContext, pParams); } static inline NV_STATUS nodevicememMap_DISPATCH(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__nodevicememMap__(pMemory, pCallContext, pParams, pCpuMapping); + return pMemory->__nvoc_vtable->__nodevicememMap__(pMemory, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS nodevicememUnmap_DISPATCH(struct NoDeviceMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__nodevicememUnmap__(pMemory, pCallContext, pCpuMapping); + return pMemory->__nvoc_vtable->__nodevicememUnmap__(pMemory, pCallContext, pCpuMapping); } static inline NV_STATUS nodevicememGetMemInterMapParams_DISPATCH(struct NoDeviceMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__nodevicememGetMemInterMapParams__(pMemory, pParams); + return pMemory->__nvoc_vtable->__nodevicememGetMemInterMapParams__(pMemory, pParams); } static inline NV_STATUS nodevicememCheckMemInterUnmap_DISPATCH(struct NoDeviceMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__nodevicememCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); + return pMemory->__nvoc_vtable->__nodevicememCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } static inline NV_STATUS nodevicememGetMemoryMappingDescriptor_DISPATCH(struct NoDeviceMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__nodevicememGetMemoryMappingDescriptor__(pMemory, ppMemDesc); + return pMemory->__nvoc_vtable->__nodevicememGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } static inline NV_STATUS nodevicememCheckCopyPermissions_DISPATCH(struct NoDeviceMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__nodevicememCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); + return pMemory->__nvoc_vtable->__nodevicememCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } static inline NV_STATUS nodevicememIsReady_DISPATCH(struct NoDeviceMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__nodevicememIsReady__(pMemory, bCopyConstructorContext); + return pMemory->__nvoc_vtable->__nodevicememIsReady__(pMemory, bCopyConstructorContext); } static inline NvBool nodevicememIsGpuMapAllowed_DISPATCH(struct NoDeviceMemory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__nodevicememIsGpuMapAllowed__(pMemory, pGpu); + return pMemory->__nvoc_vtable->__nodevicememIsGpuMapAllowed__(pMemory, pGpu); } static inline NvBool nodevicememIsExportAllowed_DISPATCH(struct NoDeviceMemory *pMemory) { - return pMemory->__nodevicememIsExportAllowed__(pMemory); + return pMemory->__nvoc_vtable->__nodevicememIsExportAllowed__(pMemory); } static inline NvBool nodevicememAccessCallback_DISPATCH(struct NoDeviceMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__nodevicememAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__nodevicememAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool nodevicememShareCallback_DISPATCH(struct NoDeviceMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__nodevicememShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__nodevicememShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS nodevicememControlSerialization_Prologue_DISPATCH(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nodevicememControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__nodevicememControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void nodevicememControlSerialization_Epilogue_DISPATCH(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__nodevicememControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__nodevicememControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS nodevicememControl_Prologue_DISPATCH(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nodevicememControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__nodevicememControl_Prologue__(pResource, pCallContext, pParams); } static inline void nodevicememControl_Epilogue_DISPATCH(struct NoDeviceMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__nodevicememControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__nodevicememControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool nodevicememCanCopy_DISPATCH(struct NoDeviceMemory *pResource) { - return pResource->__nodevicememCanCopy__(pResource); + return pResource->__nvoc_vtable->__nodevicememCanCopy__(pResource); } static inline void nodevicememPreDestruct_DISPATCH(struct NoDeviceMemory *pResource) { - pResource->__nodevicememPreDestruct__(pResource); + pResource->__nvoc_vtable->__nodevicememPreDestruct__(pResource); } static inline NV_STATUS nodevicememControlFilter_DISPATCH(struct NoDeviceMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nodevicememControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__nodevicememControlFilter__(pResource, pCallContext, pParams); } static inline NvBool nodevicememIsPartialUnmapSupported_DISPATCH(struct NoDeviceMemory *pResource) { - return pResource->__nodevicememIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__nodevicememIsPartialUnmapSupported__(pResource); } static inline NV_STATUS nodevicememMapTo_DISPATCH(struct NoDeviceMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__nodevicememMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__nodevicememMapTo__(pResource, pParams); } static inline NV_STATUS nodevicememUnmapFrom_DISPATCH(struct NoDeviceMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__nodevicememUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__nodevicememUnmapFrom__(pResource, pParams); } static inline NvU32 nodevicememGetRefCount_DISPATCH(struct NoDeviceMemory *pResource) { - return pResource->__nodevicememGetRefCount__(pResource); + return pResource->__nvoc_vtable->__nodevicememGetRefCount__(pResource); } static inline void nodevicememAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct NoDeviceMemory *pResource, RsResourceRef *pReference) { - pResource->__nodevicememAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__nodevicememAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS nodevicememGetMapAddrSpace_IMPL(struct NoDeviceMemory *pNoDeviceMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); diff --git a/src/nvidia/generated/g_nv_debug_dump_nvoc.c b/src/nvidia/generated/g_nv_debug_dump_nvoc.c index 56c948407d..30d248f471 100644 --- a/src/nvidia/generated/g_nv_debug_dump_nvoc.c +++ b/src/nvidia/generated/g_nv_debug_dump_nvoc.c @@ -66,78 +66,96 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_NvDebugDump = /*pExportInfo=*/ &__nvoc_export_info_NvDebugDump }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_NvDebugDump_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pNvd, ENGDESCRIPTOR arg3); // this +NV_STATUS __nvoc_down_thunk_NvDebugDump_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pNvd); // this + // 2 down-thunk(s) defined to bridge methods in NvDebugDump from superclasses // nvdConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_NvDebugDump_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pNvd, ENGDESCRIPTOR arg3) { +NV_STATUS __nvoc_down_thunk_NvDebugDump_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pNvd, ENGDESCRIPTOR arg3) { return nvdConstructEngine(pGpu, (struct NvDebugDump *)(((unsigned char *) pNvd) - __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset), arg3); } // nvdStateInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_NvDebugDump_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pNvd) { +NV_STATUS __nvoc_down_thunk_NvDebugDump_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pNvd) { return nvdStateInitLocked(pGpu, (struct NvDebugDump *)(((unsigned char *) pNvd) - __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_nvdInitMissing(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePreInitLocked(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePreInitUnlocked(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStateInitUnlocked(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePreLoad(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStateLoad(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePostLoad(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePreUnload(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStateUnload(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePostUnload(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3); // this +void __nvoc_up_thunk_OBJENGSTATE_nvdStateDestroy(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_nvdIsPresent(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate); // this + // 12 up-thunk(s) defined to bridge methods in NvDebugDump to superclasses // nvdInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_nvdInitMissing(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_nvdInitMissing(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset)); } // nvdStatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePreInitLocked(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePreInitLocked(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate) { return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset)); } // nvdStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePreInitUnlocked(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePreInitUnlocked(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset)); } // nvdStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStateInitUnlocked(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStateInitUnlocked(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset)); } // nvdStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePreLoad(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePreLoad(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset), arg3); } // nvdStateLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStateLoad(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStateLoad(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset), arg3); } // nvdStatePostLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePostLoad(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePostLoad(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset), arg3); } // nvdStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePreUnload(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePreUnload(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset), arg3); } // nvdStateUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStateUnload(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStateUnload(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset), arg3); } // nvdStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePostUnload(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_nvdStatePostUnload(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset), arg3); } // nvdStateDestroy: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_nvdStateDestroy(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_nvdStateDestroy(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate) { engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset)); } // nvdIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_nvdIsPresent(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_nvdIsPresent(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_NvDebugDump_OBJENGSTATE.offset)); } @@ -176,57 +194,47 @@ NV_STATUS __nvoc_ctor_NvDebugDump(NvDebugDump *pThis) { // Vtable initialization static void __nvoc_init_funcTable_NvDebugDump_1(NvDebugDump *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // nvdConstructEngine -- virtual override (engstate) base (engstate) - pThis->__nvdConstructEngine__ = &nvdConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_NvDebugDump_engstateConstructEngine; - - // nvdStateInitLocked -- virtual override (engstate) base (engstate) - pThis->__nvdStateInitLocked__ = &nvdStateInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_NvDebugDump_engstateStateInitLocked; - - // nvdInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__nvdInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_nvdInitMissing; - - // nvdStatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__nvdStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStatePreInitLocked; - - // nvdStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__nvdStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStatePreInitUnlocked; - - // nvdStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__nvdStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStateInitUnlocked; - - // nvdStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__nvdStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStatePreLoad; - - // nvdStateLoad -- virtual inherited (engstate) base (engstate) - pThis->__nvdStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStateLoad; - - // nvdStatePostLoad -- virtual inherited (engstate) base (engstate) - pThis->__nvdStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStatePostLoad; - - // nvdStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__nvdStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStatePreUnload; - - // nvdStateUnload -- virtual inherited (engstate) base (engstate) - pThis->__nvdStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStateUnload; - - // nvdStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__nvdStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStatePostUnload; - - // nvdStateDestroy -- virtual inherited (engstate) base (engstate) - pThis->__nvdStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStateDestroy; - - // nvdIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__nvdIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_nvdIsPresent; -} // End __nvoc_init_funcTable_NvDebugDump_1 with approximately 16 basic block(s). +} // End __nvoc_init_funcTable_NvDebugDump_1 // Initialize vtable(s) for 14 virtual method(s). void __nvoc_init_funcTable_NvDebugDump(NvDebugDump *pThis) { - // Initialize vtable(s) with 14 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__NvDebugDump vtable = { + .__nvdConstructEngine__ = &nvdConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_NvDebugDump_engstateConstructEngine, // virtual + .__nvdStateInitLocked__ = &nvdStateInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_NvDebugDump_engstateStateInitLocked, // virtual + .__nvdInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_nvdInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__nvdStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStatePreInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__nvdStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__nvdStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__nvdStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__nvdStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStateLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &engstateStateLoad_IMPL, // virtual + .__nvdStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStatePostLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL, // virtual + .__nvdStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__nvdStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStateUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &engstateStateUnload_IMPL, // virtual + .__nvdStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__nvdStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_nvdStateDestroy, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &engstateStateDestroy_IMPL, // virtual + .__nvdIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_nvdIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_vtable = &vtable; // (nvd) this __nvoc_init_funcTable_NvDebugDump_1(pThis); } diff --git a/src/nvidia/generated/g_nv_debug_dump_nvoc.h b/src/nvidia/generated/g_nv_debug_dump_nvoc.h index 31eb0694eb..7764be7085 100644 --- a/src/nvidia/generated/g_nv_debug_dump_nvoc.h +++ b/src/nvidia/generated/g_nv_debug_dump_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -170,10 +170,15 @@ typedef struct _def_nvd_engine_callback { #endif +// Metadata including vtable +struct NVOC_VTABLE__NvDebugDump; + + struct NvDebugDump { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__NvDebugDump *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -183,7 +188,16 @@ struct NvDebugDump { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct NvDebugDump *__nvoc_pbase_NvDebugDump; // nvd - // Vtable with 14 per-object function pointers + // Data members + NVD_DEBUG_BUFFER *pHeadDebugBuffer; + NVD_ENGINE_CALLBACK *pCallbacks; +}; + + +// Metadata including vtable with 14 function pointers plus superclass metadata +struct NVOC_VTABLE__NvDebugDump { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + NV_STATUS (*__nvdConstructEngine__)(struct OBJGPU *, struct NvDebugDump * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) NV_STATUS (*__nvdStateInitLocked__)(struct OBJGPU *, struct NvDebugDump * /*this*/); // virtual override (engstate) base (engstate) void (*__nvdInitMissing__)(struct OBJGPU *, struct NvDebugDump * /*this*/); // virtual inherited (engstate) base (engstate) @@ -198,10 +212,6 @@ struct NvDebugDump { NV_STATUS (*__nvdStatePostUnload__)(struct OBJGPU *, struct NvDebugDump * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) void (*__nvdStateDestroy__)(struct OBJGPU *, struct NvDebugDump * /*this*/); // virtual inherited (engstate) base (engstate) NvBool (*__nvdIsPresent__)(struct OBJGPU *, struct NvDebugDump * /*this*/); // virtual inherited (engstate) base (engstate) - - // Data members - NVD_DEBUG_BUFFER *pHeadDebugBuffer; - NVD_ENGINE_CALLBACK *pCallbacks; }; #ifndef __NVOC_CLASS_NvDebugDump_TYPEDEF__ @@ -238,90 +248,90 @@ NV_STATUS __nvoc_objCreate_NvDebugDump(NvDebugDump**, Dynamic*, NvU32); // Wrapper macros -#define nvdConstructEngine_FNPTR(pNvd) pNvd->__nvdConstructEngine__ +#define nvdConstructEngine_FNPTR(pNvd) pNvd->__nvoc_vtable->__nvdConstructEngine__ #define nvdConstructEngine(pGpu, pNvd, arg3) nvdConstructEngine_DISPATCH(pGpu, pNvd, arg3) -#define nvdStateInitLocked_FNPTR(pNvd) pNvd->__nvdStateInitLocked__ +#define nvdStateInitLocked_FNPTR(pNvd) pNvd->__nvoc_vtable->__nvdStateInitLocked__ #define nvdStateInitLocked(pGpu, pNvd) nvdStateInitLocked_DISPATCH(pGpu, pNvd) -#define nvdInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define nvdInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define nvdInitMissing(pGpu, pEngstate) nvdInitMissing_DISPATCH(pGpu, pEngstate) -#define nvdStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define nvdStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define nvdStatePreInitLocked(pGpu, pEngstate) nvdStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define nvdStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define nvdStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define nvdStatePreInitUnlocked(pGpu, pEngstate) nvdStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define nvdStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define nvdStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define nvdStateInitUnlocked(pGpu, pEngstate) nvdStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define nvdStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define nvdStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define nvdStatePreLoad(pGpu, pEngstate, arg3) nvdStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define nvdStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define nvdStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateLoad__ #define nvdStateLoad(pGpu, pEngstate, arg3) nvdStateLoad_DISPATCH(pGpu, pEngstate, arg3) -#define nvdStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define nvdStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostLoad__ #define nvdStatePostLoad(pGpu, pEngstate, arg3) nvdStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define nvdStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define nvdStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define nvdStatePreUnload(pGpu, pEngstate, arg3) nvdStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define nvdStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define nvdStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateUnload__ #define nvdStateUnload(pGpu, pEngstate, arg3) nvdStateUnload_DISPATCH(pGpu, pEngstate, arg3) -#define nvdStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define nvdStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define nvdStatePostUnload(pGpu, pEngstate, arg3) nvdStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define nvdStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define nvdStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateDestroy__ #define nvdStateDestroy(pGpu, pEngstate) nvdStateDestroy_DISPATCH(pGpu, pEngstate) -#define nvdIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define nvdIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define nvdIsPresent(pGpu, pEngstate) nvdIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS nvdConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, ENGDESCRIPTOR arg3) { - return pNvd->__nvdConstructEngine__(pGpu, pNvd, arg3); + return pNvd->__nvoc_vtable->__nvdConstructEngine__(pGpu, pNvd, arg3); } static inline NV_STATUS nvdStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct NvDebugDump *pNvd) { - return pNvd->__nvdStateInitLocked__(pGpu, pNvd); + return pNvd->__nvoc_vtable->__nvdStateInitLocked__(pGpu, pNvd); } static inline void nvdInitMissing_DISPATCH(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate) { - pEngstate->__nvdInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__nvdInitMissing__(pGpu, pEngstate); } static inline NV_STATUS nvdStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate) { - return pEngstate->__nvdStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__nvdStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS nvdStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate) { - return pEngstate->__nvdStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__nvdStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS nvdStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate) { - return pEngstate->__nvdStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__nvdStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS nvdStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { - return pEngstate->__nvdStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__nvdStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS nvdStateLoad_DISPATCH(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { - return pEngstate->__nvdStateLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__nvdStateLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS nvdStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { - return pEngstate->__nvdStatePostLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__nvdStatePostLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS nvdStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { - return pEngstate->__nvdStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__nvdStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS nvdStateUnload_DISPATCH(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { - return pEngstate->__nvdStateUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__nvdStateUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS nvdStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate, NvU32 arg3) { - return pEngstate->__nvdStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__nvdStatePostUnload__(pGpu, pEngstate, arg3); } static inline void nvdStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate) { - pEngstate->__nvdStateDestroy__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__nvdStateDestroy__(pGpu, pEngstate); } static inline NvBool nvdIsPresent_DISPATCH(struct OBJGPU *pGpu, struct NvDebugDump *pEngstate) { - return pEngstate->__nvdIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__nvdIsPresent__(pGpu, pEngstate); } NV_STATUS nvdConstructEngine_IMPL(struct OBJGPU *pGpu, struct NvDebugDump *pNvd, ENGDESCRIPTOR arg3); diff --git a/src/nvidia/generated/g_nv_name_released.h b/src/nvidia/generated/g_nv_name_released.h index e815275620..e60270f7cd 100644 --- a/src/nvidia/generated/g_nv_name_released.h +++ b/src/nvidia/generated/g_nv_name_released.h @@ -32,6 +32,4322 @@ typedef struct _CHIPS_RELEASED { } CHIPS_RELEASED; static const CHIPS_RELEASED sChipsReleased[] = { + { 0x0040, 0x0205, 0x10de, "(null)" }, + { 0x0091, 0x02c2, 0x10de, "(null)" }, + { 0x00C1, 0x0335, 0x1043, "(null)" }, + { 0x00F9, 0x0334, 0x1043, "(null)" }, + { 0x00F9, 0x0338, 0x1043, "(null)" }, + { 0x0141, 0x0330, 0x1043, "(null)" }, + { 0x0141, 0x0331, 0x1043, "(null)" }, + { 0x0141, 0x9812, 0x1462, "(null)" }, + { 0x0141, 0x9814, 0x1462, "(null)" }, + { 0x0141, 0x3466, 0x1642, "(null)" }, + { 0x0161, 0x02b3, 0x10de, "(null)" }, + { 0x0161, 0x0013, 0x1462, "(null)" }, + { 0x0161, 0x0014, 0x1462, "(null)" }, + { 0x0161, 0x9915, 0x1462, "(null)" }, + { 0x0161, 0x9916, 0x1462, "(null)" }, + { 0x0161, 0x3493, 0x1642, "(null)" }, + { 0x0162, 0x0345, 0x1043, "(null)" }, + { 0x0165, 0x029d, 0x10de, "(null)" }, + { 0x0165, 0x0334, 0x10de, "(null)" }, + { 0x016A, 0x3432, 0x1458, "(null)" }, + { 0x016A, 0x034e, 0x1462, "(null)" }, + { 0x016A, 0x3598, 0x1642, "(null)" }, + { 0x0191, 0x039c, 0x10de, "(null)" }, + { 0x0193, 0x0420, 0x10de, "(null)" }, + { 0x0193, 0x0421, 0x10de, "(null)" }, + { 0x01D1, 0x0394, 0x10de, "(null)" }, + { 0x01D1, 0x342c, 0x1458, "(null)" }, + { 0x01D1, 0x3436, 0x1458, "(null)" }, + { 0x01D1, 0x0344, 0x1462, "(null)" }, + { 0x01D1, 0x0345, 0x1462, "(null)" }, + { 0x01D1, 0x0850, 0x1462, "(null)" }, + { 0x01D1, 0x3598, 0x1642, "(null)" }, + { 0x01D1, 0x3680, 0x1642, "(null)" }, + { 0x01D3, 0x034c, 0x1462, "(null)" }, + { 0x01D3, 0x034d, 0x1462, "(null)" }, + { 0x01D3, 0x1010, 0x174b, "(null)" }, + { 0x01D3, 0x1110, 0x174b, "(null)" }, + { 0x01D3, 0x1120, 0x174b, "(null)" }, + { 0x01D3, 0x1210, 0x174b, "(null)" }, + { 0x0242, 0x1014, 0x17aa, "(null)" }, + { 0x0242, 0x1017, 0x17aa, "(null)" }, + { 0x0242, 0x3013, 0x17aa, "(null)" }, + { 0x0242, 0x1019, 0x1b46, "(null)" }, + { 0x0290, 0x0343, 0x10de, "(null)" }, + { 0x0294, 0x035b, 0x10de, "(null)" }, + { 0x0391, 0x033d, 0x10de, "(null)" }, + { 0x0391, 0x0403, 0x10de, "(null)" }, + { 0x0392, 0x034c, 0x1043, "(null)" }, + { 0x0392, 0x034a, 0x10de, "(null)" }, + { 0x0400, 0x0438, 0x10de, "(null)" }, + { 0x0402, 0x1713, 0x1019, "(null)" }, + { 0x0402, 0x034d, 0x1043, "(null)" }, + { 0x0402, 0x034e, 0x1043, "(null)" }, + { 0x0402, 0x0439, 0x10de, "(null)" }, + { 0x0402, 0x0505, 0x10de, "(null)" }, + { 0x0402, 0x806b, 0x144d, "(null)" }, + { 0x0402, 0x806c, 0x144d, "(null)" }, + { 0x0405, 0x011d, 0x1025, "(null)" }, + { 0x0405, 0x011e, 0x1025, "(null)" }, + { 0x0405, 0x0121, 0x1025, "(null)" }, + { 0x0405, 0x0125, 0x1025, "(null)" }, + { 0x0405, 0x0126, 0x1025, "(null)" }, + { 0x0405, 0x0127, 0x1025, "(null)" }, + { 0x0405, 0x0129, 0x1025, "(null)" }, + { 0x0405, 0x012b, 0x1025, "(null)" }, + { 0x0405, 0x0136, 0x1025, "(null)" }, + { 0x0405, 0x013d, 0x1025, "(null)" }, + { 0x0405, 0x013f, 0x1025, "(null)" }, + { 0x0405, 0x0142, 0x1025, "(null)" }, + { 0x0405, 0x0143, 0x1025, "(null)" }, + { 0x0405, 0x0145, 0x1025, "(null)" }, + { 0x0405, 0x0146, 0x1025, "(null)" }, + { 0x0405, 0x015e, 0x1025, "(null)" }, + { 0x0405, 0x15d2, 0x1043, "(null)" }, + { 0x0405, 0x1634, 0x1043, "(null)" }, + { 0x0405, 0x8227, 0x1071, "(null)" }, + { 0x0405, 0x8230, 0x1071, "(null)" }, + { 0x0405, 0x6740, 0x1462, "(null)" }, + { 0x0406, 0x30f4, 0x103c, "(null)" }, + { 0x0406, 0x3603, 0x103c, "(null)" }, + { 0x0407, 0x22d4, 0x1019, "(null)" }, + { 0x0407, 0x011d, 0x1025, "(null)" }, + { 0x0407, 0x011e, 0x1025, "(null)" }, + { 0x0407, 0x0121, 0x1025, "(null)" }, + { 0x0407, 0x0125, 0x1025, "(null)" }, + { 0x0407, 0x0126, 0x1025, "(null)" }, + { 0x0407, 0x0127, 0x1025, "(null)" }, + { 0x0407, 0x0129, 0x1025, "(null)" }, + { 0x0407, 0x012b, 0x1025, "(null)" }, + { 0x0407, 0x0136, 0x1025, "(null)" }, + { 0x0407, 0x013d, 0x1025, "(null)" }, + { 0x0407, 0x013f, 0x1025, "(null)" }, + { 0x0407, 0x0142, 0x1025, "(null)" }, + { 0x0407, 0x0143, 0x1025, "(null)" }, + { 0x0407, 0x0145, 0x1025, "(null)" }, + { 0x0407, 0x0146, 0x1025, "(null)" }, + { 0x0407, 0x015e, 0x1025, "(null)" }, + { 0x0407, 0x019c, 0x1028, "(null)" }, + { 0x0407, 0x01f1, 0x1028, "(null)" }, + { 0x0407, 0x01f2, 0x1028, "(null)" }, + { 0x0407, 0x0228, 0x1028, "(null)" }, + { 0x0407, 0x0229, 0x1028, "(null)" }, + { 0x0407, 0x022e, 0x1028, "(null)" }, + { 0x0407, 0x1515, 0x1043, "(null)" }, + { 0x0407, 0x1588, 0x1043, "(null)" }, + { 0x0407, 0x1618, 0x1043, "(null)" }, + { 0x0407, 0x1632, 0x1043, "(null)" }, + { 0x0407, 0x17a2, 0x1043, "(null)" }, + { 0x0407, 0x9005, 0x104d, "(null)" }, + { 0x0407, 0x9016, 0x104d, "(null)" }, + { 0x0407, 0x9018, 0x104d, "(null)" }, + { 0x0407, 0x00a0, 0x106b, "(null)" }, + { 0x0407, 0x00a3, 0x106b, "(null)" }, + { 0x0407, 0x00a4, 0x106b, "(null)" }, + { 0x0407, 0x8049, 0x107b, "(null)" }, + { 0x0407, 0x3c04, 0x109f, "(null)" }, + { 0x0407, 0x0040, 0x1170, "(null)" }, + { 0x0407, 0x0001, 0x1179, "(null)" }, + { 0x0407, 0xff00, 0x1179, "(null)" }, + { 0x0407, 0xff10, 0x1179, "(null)" }, + { 0x0407, 0xff13, 0x1179, "(null)" }, + { 0x0407, 0xc02f, 0x144d, "(null)" }, + { 0x0407, 0xc030, 0x144d, "(null)" }, + { 0x0407, 0xc031, 0x144d, "(null)" }, + { 0x0407, 0xc519, 0x144d, "(null)" }, + { 0x0407, 0x3fad, 0x1462, "(null)" }, + { 0x0407, 0x3fbb, 0x1462, "(null)" }, + { 0x0407, 0x3fe9, 0x1462, "(null)" }, + { 0x0407, 0x401b, 0x1462, "(null)" }, + { 0x0407, 0x4327, 0x1462, "(null)" }, + { 0x0407, 0x63f2, 0x1462, "(null)" }, + { 0x0407, 0x0023, 0x14c0, "(null)" }, + { 0x0407, 0x0025, 0x14c0, "(null)" }, + { 0x0407, 0x0770, 0x152d, "(null)" }, + { 0x0407, 0x0573, 0x1558, "(null)" }, + { 0x0407, 0x2200, 0x1558, "(null)" }, + { 0x0407, 0x2201, 0x1558, "(null)" }, + { 0x0407, 0x22d4, 0x1584, "(null)" }, + { 0x0407, 0xc20d, 0x1631, "(null)" }, + { 0x0407, 0xc20e, 0x1631, "(null)" }, + { 0x0407, 0x3d7b, 0x17aa, "(null)" }, + { 0x0407, 0x2089, 0x17c0, "(null)" }, + { 0x0407, 0x208a, 0x17c0, "(null)" }, + { 0x0407, 0x0801, 0x17ff, "(null)" }, + { 0x0407, 0x0091, 0x1854, "(null)" }, + { 0x0407, 0x0115, 0x1854, "(null)" }, + { 0x0407, 0x0116, 0x1854, "(null)" }, + { 0x0407, 0x0117, 0x1854, "(null)" }, + { 0x0407, 0x0118, 0x1854, "(null)" }, + { 0x0407, 0x0119, 0x1854, "(null)" }, + { 0x0407, 0x011a, 0x1854, "(null)" }, + { 0x0407, 0x1402, 0x1a46, "(null)" }, + { 0x0407, 0x0284, 0x1a92, "(null)" }, + { 0x0408, 0x0145, 0x1025, "(null)" }, + { 0x0408, 0x30f4, 0x103c, "(null)" }, + { 0x0408, 0x1902, 0x1043, "(null)" }, + { 0x0409, 0x0145, 0x1025, "(null)" }, + { 0x0409, 0x0146, 0x1025, "(null)" }, + { 0x0409, 0x019b, 0x1028, "(null)" }, + { 0x0409, 0x019c, 0x1028, "(null)" }, + { 0x0409, 0x01f1, 0x1028, "(null)" }, + { 0x0409, 0x1584, 0x1043, "(null)" }, + { 0x0409, 0x1619, 0x1043, "(null)" }, + { 0x0409, 0x16d2, 0x1043, "(null)" }, + { 0x0409, 0x1832, 0x1043, "(null)" }, + { 0x0409, 0xff00, 0x1179, "(null)" }, + { 0x0409, 0x0770, 0x152d, "(null)" }, + { 0x0409, 0x0573, 0x1558, "(null)" }, + { 0x0409, 0x0860, 0x1558, "(null)" }, + { 0x0409, 0x0902, 0x1558, "(null)" }, + { 0x0409, 0x2052, 0x161f, "(null)" }, + { 0x040B, 0x30c3, 0x103c, "(null)" }, + { 0x040C, 0x30c5, 0x103c, "(null)" }, + { 0x040C, 0x1423, 0x10cf, "(null)" }, + { 0x040C, 0x20d9, 0x17aa, "(null)" }, + { 0x040D, 0x019b, 0x1028, "(null)" }, + { 0x040D, 0x30c3, 0x103c, "(null)" }, + { 0x040D, 0x0770, 0x152d, "(null)" }, + { 0x040D, 0x0481, 0x1558, "(null)" }, + { 0x040D, 0x0573, 0x1558, "(null)" }, + { 0x040D, 0x0860, 0x1558, "(null)" }, + { 0x040D, 0x0902, 0x1558, "(null)" }, + { 0x040D, 0x2052, 0x161f, "(null)" }, + { 0x0410, 0x3058, 0x174b, "(null)" }, + { 0x0410, 0x9076, 0x1b0a, "(null)" }, + { 0x0421, 0x8069, 0x144d, "(null)" }, + { 0x0421, 0x806a, 0x144d, "(null)" }, + { 0x0421, 0x8072, 0x144d, "(null)" }, + { 0x0421, 0x0198, 0x1620, "(null)" }, + { 0x0422, 0x8873, 0x1033, "(null)" }, + { 0x0422, 0x88b7, 0x1033, "(null)" }, + { 0x0423, 0x806f, 0x144d, "(null)" }, + { 0x0423, 0x8070, 0x144d, "(null)" }, + { 0x0423, 0x8071, 0x144d, "(null)" }, + { 0x0423, 0x0199, 0x1620, "(null)" }, + { 0x0425, 0x22d0, 0x1019, "(null)" }, + { 0x0425, 0x011d, 0x1025, "(null)" }, + { 0x0425, 0x011e, 0x1025, "(null)" }, + { 0x0425, 0x011f, 0x1025, "(null)" }, + { 0x0425, 0x0121, 0x1025, "(null)" }, + { 0x0425, 0x0125, 0x1025, "(null)" }, + { 0x0425, 0x0126, 0x1025, "(null)" }, + { 0x0425, 0x0127, 0x1025, "(null)" }, + { 0x0425, 0x0129, 0x1025, "(null)" }, + { 0x0425, 0x012b, 0x1025, "(null)" }, + { 0x0425, 0x0136, 0x1025, "(null)" }, + { 0x0425, 0x013d, 0x1025, "(null)" }, + { 0x0425, 0x0142, 0x1025, "(null)" }, + { 0x0425, 0x0143, 0x1025, "(null)" }, + { 0x0425, 0x0145, 0x1025, "(null)" }, + { 0x0425, 0x0146, 0x1025, "(null)" }, + { 0x0425, 0x0275, 0x1028, "(null)" }, + { 0x0425, 0x8875, 0x1033, "(null)" }, + { 0x0425, 0x30cc, 0x103c, "(null)" }, + { 0x0425, 0x1514, 0x1043, "(null)" }, + { 0x0425, 0x1612, 0x1043, "(null)" }, + { 0x0425, 0x1617, 0x1043, "(null)" }, + { 0x0425, 0x826c, 0x1043, "(null)" }, + { 0x0425, 0x9005, 0x104d, "(null)" }, + { 0x0425, 0x8227, 0x1071, "(null)" }, + { 0x0425, 0x8253, 0x1071, "(null)" }, + { 0x0425, 0x0040, 0x1170, "(null)" }, + { 0x0425, 0xc02f, 0x144d, "(null)" }, + { 0x0425, 0xc030, 0x144d, "(null)" }, + { 0x0425, 0xc031, 0x144d, "(null)" }, + { 0x0425, 0xc509, 0x144d, "(null)" }, + { 0x0425, 0xc519, 0x144d, "(null)" }, + { 0x0425, 0x3fad, 0x1462, "(null)" }, + { 0x0425, 0x3fbb, 0x1462, "(null)" }, + { 0x0425, 0x3fe9, 0x1462, "(null)" }, + { 0x0425, 0x401b, 0x1462, "(null)" }, + { 0x0425, 0x4327, 0x1462, "(null)" }, + { 0x0425, 0x2f03, 0x1509, "(null)" }, + { 0x0425, 0x2f04, 0x1509, "(null)" }, + { 0x0425, 0x2f05, 0x1509, "(null)" }, + { 0x0425, 0xc104, 0x1631, "(null)" }, + { 0x0425, 0xc105, 0x1631, "(null)" }, + { 0x0425, 0x1107, 0x1734, "(null)" }, + { 0x0425, 0x110b, 0x1734, "(null)" }, + { 0x0425, 0x110c, 0x1734, "(null)" }, + { 0x0425, 0x2089, 0x17c0, "(null)" }, + { 0x0425, 0x0590, 0x17ff, "(null)" }, + { 0x0425, 0x0090, 0x1854, "(null)" }, + { 0x0425, 0x0094, 0x1854, "(null)" }, + { 0x0425, 0x0098, 0x1854, "(null)" }, + { 0x0425, 0x009f, 0x1854, "(null)" }, + { 0x0425, 0x0106, 0x1854, "(null)" }, + { 0x0425, 0x0109, 0x1854, "(null)" }, + { 0x0425, 0x0115, 0x1854, "(null)" }, + { 0x0425, 0x0116, 0x1854, "(null)" }, + { 0x0425, 0x0117, 0x1854, "(null)" }, + { 0x0425, 0x0118, 0x1854, "(null)" }, + { 0x0425, 0x0119, 0x1854, "(null)" }, + { 0x0425, 0x011a, 0x1854, "(null)" }, + { 0x0425, 0x0120, 0x1854, "(null)" }, + { 0x0426, 0x8897, 0x1033, "(null)" }, + { 0x0426, 0x9005, 0x104d, "(null)" }, + { 0x0426, 0x9016, 0x104d, "(null)" }, + { 0x0426, 0x9017, 0x104d, "(null)" }, + { 0x0426, 0x9018, 0x104d, "(null)" }, + { 0x0426, 0x902d, 0x104d, "(null)" }, + { 0x0426, 0x9030, 0x104d, "(null)" }, + { 0x0426, 0x5584, 0x1991, "(null)" }, + { 0x0427, 0x011d, 0x1025, "(null)" }, + { 0x0427, 0x011e, 0x1025, "(null)" }, + { 0x0427, 0x011f, 0x1025, "(null)" }, + { 0x0427, 0x0121, 0x1025, "(null)" }, + { 0x0427, 0x0125, 0x1025, "(null)" }, + { 0x0427, 0x0126, 0x1025, "(null)" }, + { 0x0427, 0x0127, 0x1025, "(null)" }, + { 0x0427, 0x0129, 0x1025, "(null)" }, + { 0x0427, 0x012b, 0x1025, "(null)" }, + { 0x0427, 0x0136, 0x1025, "(null)" }, + { 0x0427, 0x013d, 0x1025, "(null)" }, + { 0x0427, 0x0142, 0x1025, "(null)" }, + { 0x0427, 0x0143, 0x1025, "(null)" }, + { 0x0427, 0x01f1, 0x1028, "(null)" }, + { 0x0427, 0x01f2, 0x1028, "(null)" }, + { 0x0427, 0x01f3, 0x1028, "(null)" }, + { 0x0427, 0x0209, 0x1028, "(null)" }, + { 0x0427, 0x020a, 0x1028, "(null)" }, + { 0x0427, 0x0227, 0x1028, "(null)" }, + { 0x0427, 0x0228, 0x1028, "(null)" }, + { 0x0427, 0x0229, 0x1028, "(null)" }, + { 0x0427, 0x022e, 0x1028, "(null)" }, + { 0x0427, 0x026f, 0x1028, "(null)" }, + { 0x0427, 0x0273, 0x1028, "(null)" }, + { 0x0427, 0x0286, 0x1028, "(null)" }, + { 0x0427, 0x02b5, 0x1028, "(null)" }, + { 0x0427, 0x30cc, 0x103c, "(null)" }, + { 0x0427, 0x30cd, 0x103c, "(null)" }, + { 0x0427, 0x30cf, 0x103c, "(null)" }, + { 0x0427, 0x30de, 0x103c, "(null)" }, + { 0x0427, 0x17c2, 0x1043, "(null)" }, + { 0x0427, 0x9008, 0x104d, "(null)" }, + { 0x0427, 0x3c03, 0x109f, "(null)" }, + { 0x0427, 0xff10, 0x1179, "(null)" }, + { 0x0427, 0xff13, 0x1179, "(null)" }, + { 0x0427, 0x8068, 0x144d, "(null)" }, + { 0x0427, 0xb04b, 0x144d, "(null)" }, + { 0x0427, 0xc02f, 0x144d, "(null)" }, + { 0x0427, 0xc030, 0x144d, "(null)" }, + { 0x0427, 0xc031, 0x144d, "(null)" }, + { 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0x1299, 0x0974, 0x1025, "(null)" }, + { 0x1299, 0x0977, 0x1025, "(null)" }, + { 0x1299, 0x0985, 0x1025, "(null)" }, + { 0x1299, 0x0988, 0x1025, "(null)" }, + { 0x1299, 0x098b, 0x1025, "(null)" }, + { 0x1299, 0x098f, 0x1025, "(null)" }, + { 0x1299, 0x0992, 0x1025, "(null)" }, + { 0x1299, 0x099a, 0x1025, "(null)" }, + { 0x1299, 0x099f, 0x1025, "(null)" }, + { 0x1299, 0x100d, 0x1025, "(null)" }, + { 0x1299, 0x101a, 0x1025, "(null)" }, + { 0x1299, 0x1025, 0x1025, "(null)" }, + { 0x1299, 0x1035, 0x1025, "(null)" }, + { 0x1299, 0x103e, 0x1025, "(null)" }, + { 0x1299, 0x1040, 0x1025, "(null)" }, + { 0x1299, 0x1042, 0x1025, "(null)" }, + { 0x1299, 0x1045, 0x1025, "(null)" }, + { 0x1299, 0x107f, 0x1025, "(null)" }, + { 0x1299, 0x0652, 0x1028, "(null)" }, + { 0x1299, 0x0653, 0x1028, "(null)" }, + { 0x1299, 0x0655, 0x1028, "(null)" }, + { 0x1299, 0x0656, 0x1028, "(null)" }, + { 0x1299, 0x065e, 0x1028, "(null)" }, + { 0x1299, 0x0662, 0x1028, "(null)" }, + { 0x1299, 0x06ad, 0x1028, "(null)" }, + { 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0x1299, 0x23aa, 0x1043, "(null)" }, + { 0x1299, 0x23da, 0x1043, "(null)" }, + { 0x1299, 0x23ea, 0x1043, "(null)" }, + { 0x1299, 0x23fa, 0x1043, "(null)" }, + { 0x1299, 0x241a, 0x1043, "(null)" }, + { 0x1299, 0x242a, 0x1043, "(null)" }, + { 0x1299, 0x244a, 0x1043, "(null)" }, + { 0x1299, 0x245a, 0x1043, "(null)" }, + { 0x1299, 0x246a, 0x1043, "(null)" }, + { 0x1299, 0x24aa, 0x1043, "(null)" }, + { 0x1299, 0xf841, 0x1179, "(null)" }, + { 0x1299, 0xf842, 0x1179, "(null)" }, + { 0x1299, 0xf843, 0x1179, "(null)" }, + { 0x1299, 0xc757, 0x144d, "(null)" }, + { 0x1299, 0xc770, 0x144d, "(null)" }, + { 0x1299, 0x1116, 0x1462, "(null)" }, + { 0x1299, 0x1159, 0x1462, "(null)" }, + { 0x1299, 0x1108, 0x152d, "(null)" }, + { 0x1299, 0x1113, 0x152d, "(null)" }, + { 0x1299, 0x1123, 0x152d, "(null)" }, + { 0x1299, 0x1126, 0x152d, "(null)" }, + { 0x1299, 0x30bb, 0x17aa, "(null)" }, + { 0x1299, 0x30da, 0x17aa, "(null)" }, + { 0x1299, 0x30dc, 0x17aa, "(null)" }, + { 0x1299, 0x30dd, 0x17aa, "(null)" }, + { 0x1299, 0x30df, 0x17aa, "(null)" }, + { 0x1299, 0x3117, 0x17aa, "(null)" }, + { 0x1299, 0x361b, 0x17aa, "(null)" }, + { 0x1299, 0x362d, 0x17aa, "(null)" }, + { 0x1299, 0x362e, 0x17aa, "(null)" }, + { 0x1299, 0x3630, 0x17aa, "(null)" }, + { 0x1299, 0x3637, 0x17aa, "(null)" }, + { 0x1299, 0x369b, 0x17aa, "(null)" }, + { 0x1299, 0x36a7, 0x17aa, "(null)" }, + { 0x1299, 0x36af, 0x17aa, "(null)" }, + { 0x1299, 0x36f0, 0x17aa, "(null)" }, + { 0x1299, 0x3801, 0x17aa, "(null)" }, + { 0x1299, 0x380d, 0x17aa, "(null)" }, + { 0x1299, 0x381c, 0x17aa, "(null)" }, + { 0x1299, 0x381d, 0x17aa, "(null)" }, + { 0x1299, 0x381f, 0x17aa, "(null)" }, + { 0x1299, 0x3821, 0x17aa, "(null)" }, + { 0x1299, 0x3822, 0x17aa, "(null)" }, + { 0x1299, 0x3824, 0x17aa, "(null)" }, + { 0x1299, 0x3829, 0x17aa, "(null)" }, + { 0x1299, 0x382b, 0x17aa, "(null)" }, + { 0x1299, 0x39f1, 0x17aa, "(null)" }, + { 0x1299, 0x0260, 0x1854, "(null)" }, + { 0x1299, 0x01c6, 0x1b0a, "(null)" }, + { 0x1299, 0x225c, 0x1b0a, "(null)" }, + { 0x1299, 0x2004, 0x1d05, "(null)" }, + { 0x129A, 0x099e, 0x1025, "(null)" }, + { 0x129A, 0x1014, 0x1025, "(null)" }, + { 0x129A, 0x1015, 0x1025, "(null)" }, + { 0x129A, 0xc782, 0x144d, "(null)" }, + { 0x12B9, 0x1026, 0x103c, "(null)" }, + { 0x12B9, 0x1909, 0x103c, "(null)" }, + { 0x12B9, 0x190a, 0x103c, "(null)" }, + { 0x12B9, 0x197a, 0x103c, "(null)" }, + { 0x12B9, 0x197b, 0x103c, "(null)" }, + { 0x12B9, 0x2253, 0x103c, "(null)" }, + { 0x12B9, 0x2254, 0x103c, "(null)" }, + { 0x12BA, 0x17ed, 0x10cf, "(null)" }, { 0x1340, 0x0000, 0x0000, "NVIDIA GeForce 830M" }, { 0x1340, 0x2b2b, 0x103c, "NVIDIA GeForce 830A" }, { 0x1341, 0x0000, 0x0000, "NVIDIA GeForce 840M" }, @@ -190,6 +4506,8 @@ static const CHIPS_RELEASED sChipsReleased[] = { { 0x1BB0, 0x0000, 0x0000, "Quadro P5000" }, { 0x1BB1, 0x0000, 0x0000, "Quadro P4000" }, { 0x1BB1, 0x11a3, 0x15c3, "EIZO Quadro MED-XN91" }, + { 0x1BB3, 0x11d8, 0x10de, "Tesla P4" }, + { 0x1BB3, 0x11e0, 0x10de, "Tesla P4" }, { 0x1BB4, 0x0000, 0x0000, "Tesla P6" }, { 0x1BB5, 0x0000, 0x0000, "Quadro P5200" }, { 0x1BB5, 0x2268, 0x17aa, "Quadro P5200 with Max-Q Design" }, @@ -497,6 +4815,7 @@ static const CHIPS_RELEASED sChipsReleased[] = { { 0x1EB6, 0x12c6, 0x1462, "Quadro RTX 4000 with Max-Q Design" }, { 0x1EB6, 0x22b8, 0x17aa, "Quadro RTX 4000 with Max-Q Design" }, { 0x1EB6, 0x22ba, 0x17aa, "Quadro RTX 4000 with Max-Q Design" }, + { 0x1EB8, 0x12a2, 0x10de, "Tesla T4" }, { 0x1EC2, 0x0000, 0x0000, "NVIDIA GeForce RTX 2070 SUPER" }, { 0x1EC7, 0x0000, 0x0000, "NVIDIA GeForce RTX 2070 SUPER" }, { 0x1ED0, 0x0000, 0x0000, "NVIDIA GeForce RTX 2080" }, @@ -908,9 +5227,11 @@ static const CHIPS_RELEASED sChipsReleased[] = { { 0x2335, 0x18bf, 0x10de, "NVIDIA H200" }, { 0x2339, 0x17fc, 0x10de, "NVIDIA H100" }, { 0x233A, 0x183a, 0x10de, "NVIDIA H800 NVL" }, + { 0x233B, 0x1996, 0x10de, "NVIDIA H200 NVL" }, { 0x2342, 0x16eb, 0x10de, "NVIDIA GH200 120GB" }, { 0x2342, 0x1805, 0x10de, "NVIDIA GH200 120GB" }, { 0x2342, 0x1809, 0x10de, "NVIDIA GH200 480GB" }, + { 0x2348, 0x18d2, 0x10de, "NVIDIA GH200 144G HBM3e" }, { 0x2414, 0x0000, 0x0000, "NVIDIA GeForce RTX 3060 Ti" }, { 0x2420, 0x0000, 0x0000, "NVIDIA GeForce RTX 3080 Ti Laptop GPU" }, { 0x2438, 0x0000, 0x0000, "NVIDIA RTX A5500 Laptop GPU" }, @@ -981,12 +5302,10 @@ static const CHIPS_RELEASED sChipsReleased[] = { { 0x25AD, 0x0000, 0x0000, "NVIDIA GeForce RTX 2050" }, { 0x25B0, 0x1878, 0x1028, "NVIDIA RTX A1000" }, { 0x25B0, 0x1878, 0x103c, "NVIDIA RTX A1000" }, - { 0x25B0, 0x8d96, 0x103c, "NVIDIA RTX A1000" }, { 0x25B0, 0x1878, 0x10de, "NVIDIA RTX A1000" }, { 0x25B0, 0x1878, 0x17aa, "NVIDIA RTX A1000" }, { 0x25B2, 0x1879, 0x1028, "NVIDIA RTX A400" }, { 0x25B2, 0x1879, 0x103c, "NVIDIA RTX A400" }, - { 0x25B2, 0x8d95, 0x103c, "NVIDIA RTX A400" }, { 0x25B2, 0x1879, 0x10de, "NVIDIA RTX A400" }, { 0x25B2, 0x1879, 0x17aa, "NVIDIA RTX A400" }, { 0x25B6, 0x14a9, 0x10de, "NVIDIA A16" }, diff --git a/src/nvidia/generated/g_nvencsession_nvoc.c b/src/nvidia/generated/g_nvencsession_nvoc.c index 1ff4059ea4..eaa58c154b 100644 --- a/src/nvidia/generated/g_nvencsession_nvoc.c +++ b/src/nvidia/generated/g_nvencsession_nvoc.c @@ -132,130 +132,198 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_NvencSes }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionControl(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionMap(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionUnmap(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_nvencsessionShareCallback(struct NvencSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionGetRegBaseOffsetAndSize(struct NvencSession *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionGetMapAddrSpace(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionInternalControlForward(struct NvencSession *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_nvencsessionGetInternalObjectHandle(struct NvencSession *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_nvencsessionAccessCallback(struct NvencSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_nvencsessionGetMemInterMapParams(struct NvencSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_nvencsessionCheckMemInterUnmap(struct NvencSession *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_nvencsessionGetMemoryMappingDescriptor(struct NvencSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_nvencsessionControlSerialization_Prologue(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_nvencsessionControlSerialization_Epilogue(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_nvencsessionControl_Prologue(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_nvencsessionControl_Epilogue(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_nvencsessionCanCopy(struct NvencSession *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_nvencsessionIsDuplicate(struct NvencSession *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_nvencsessionPreDestruct(struct NvencSession *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_nvencsessionControlFilter(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_nvencsessionIsPartialUnmapSupported(struct NvencSession *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_nvencsessionMapTo(struct NvencSession *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_nvencsessionUnmapFrom(struct NvencSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_nvencsessionGetRefCount(struct NvencSession *pResource); // this +void __nvoc_up_thunk_RsResource_nvencsessionAddAdditionalDependants(struct RsClient *pClient, struct NvencSession *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in NvencSession to superclasses // nvencsessionControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionControl(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionControl(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset), pCallContext, pParams); } // nvencsessionMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionMap(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionMap(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // nvencsessionUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionUnmap(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionUnmap(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset), pCallContext, pCpuMapping); } // nvencsessionShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_nvencsessionShareCallback(struct NvencSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_nvencsessionShareCallback(struct NvencSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // nvencsessionGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionGetRegBaseOffsetAndSize(struct NvencSession *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionGetRegBaseOffsetAndSize(struct NvencSession *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset), pGpu, pOffset, pSize); } // nvencsessionGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionGetMapAddrSpace(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionGetMapAddrSpace(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // nvencsessionInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionInternalControlForward(struct NvencSession *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvencsessionInternalControlForward(struct NvencSession *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset), command, pParams, size); } // nvencsessionGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_nvencsessionGetInternalObjectHandle(struct NvencSession *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_nvencsessionGetInternalObjectHandle(struct NvencSession *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvencSession_GpuResource.offset)); } // nvencsessionAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_nvencsessionAccessCallback(struct NvencSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_nvencsessionAccessCallback(struct NvencSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // nvencsessionGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_nvencsessionGetMemInterMapParams(struct NvencSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_nvencsessionGetMemInterMapParams(struct NvencSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvencSession_RmResource.offset), pParams); } // nvencsessionCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_nvencsessionCheckMemInterUnmap(struct NvencSession *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_nvencsessionCheckMemInterUnmap(struct NvencSession *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvencSession_RmResource.offset), bSubdeviceHandleProvided); } // nvencsessionGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_nvencsessionGetMemoryMappingDescriptor(struct NvencSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_nvencsessionGetMemoryMappingDescriptor(struct NvencSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvencSession_RmResource.offset), ppMemDesc); } // nvencsessionControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_nvencsessionControlSerialization_Prologue(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_nvencsessionControlSerialization_Prologue(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RmResource.offset), pCallContext, pParams); } // nvencsessionControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_nvencsessionControlSerialization_Epilogue(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_nvencsessionControlSerialization_Epilogue(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RmResource.offset), pCallContext, pParams); } // nvencsessionControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_nvencsessionControl_Prologue(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_nvencsessionControl_Prologue(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RmResource.offset), pCallContext, pParams); } // nvencsessionControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_nvencsessionControl_Epilogue(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_nvencsessionControl_Epilogue(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RmResource.offset), pCallContext, pParams); } // nvencsessionCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_nvencsessionCanCopy(struct NvencSession *pResource) { +NvBool __nvoc_up_thunk_RsResource_nvencsessionCanCopy(struct NvencSession *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RsResource.offset)); } // nvencsessionIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_nvencsessionIsDuplicate(struct NvencSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_nvencsessionIsDuplicate(struct NvencSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RsResource.offset), hMemory, pDuplicate); } // nvencsessionPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_nvencsessionPreDestruct(struct NvencSession *pResource) { +void __nvoc_up_thunk_RsResource_nvencsessionPreDestruct(struct NvencSession *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RsResource.offset)); } // nvencsessionControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_nvencsessionControlFilter(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_nvencsessionControlFilter(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RsResource.offset), pCallContext, pParams); } // nvencsessionIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_nvencsessionIsPartialUnmapSupported(struct NvencSession *pResource) { +NvBool __nvoc_up_thunk_RsResource_nvencsessionIsPartialUnmapSupported(struct NvencSession *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RsResource.offset)); } // nvencsessionMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_nvencsessionMapTo(struct NvencSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_nvencsessionMapTo(struct NvencSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RsResource.offset), pParams); } // nvencsessionUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_nvencsessionUnmapFrom(struct NvencSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_nvencsessionUnmapFrom(struct NvencSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RsResource.offset), pParams); } // nvencsessionGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_nvencsessionGetRefCount(struct NvencSession *pResource) { +NvU32 __nvoc_up_thunk_RsResource_nvencsessionGetRefCount(struct NvencSession *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RsResource.offset)); } // nvencsessionAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_nvencsessionAddAdditionalDependants(struct RsClient *pClient, struct NvencSession *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_nvencsessionAddAdditionalDependants(struct RsClient *pClient, struct NvencSession *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvencSession_RsResource.offset), pReference); } @@ -329,88 +397,112 @@ static void __nvoc_init_funcTable_NvencSession_1(NvencSession *pThis, RmHalspecO { pThis->__nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2__ = &nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2_IMPL; } - - // nvencsessionControl -- virtual inherited (gpures) base (gpures) - pThis->__nvencsessionControl__ = &__nvoc_up_thunk_GpuResource_nvencsessionControl; - - // nvencsessionMap -- virtual inherited (gpures) base (gpures) - pThis->__nvencsessionMap__ = &__nvoc_up_thunk_GpuResource_nvencsessionMap; - - // nvencsessionUnmap -- virtual inherited (gpures) base (gpures) - pThis->__nvencsessionUnmap__ = &__nvoc_up_thunk_GpuResource_nvencsessionUnmap; - - // nvencsessionShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__nvencsessionShareCallback__ = &__nvoc_up_thunk_GpuResource_nvencsessionShareCallback; - - // nvencsessionGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__nvencsessionGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_nvencsessionGetRegBaseOffsetAndSize; - - // nvencsessionGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__nvencsessionGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_nvencsessionGetMapAddrSpace; - - // nvencsessionInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__nvencsessionInternalControlForward__ = &__nvoc_up_thunk_GpuResource_nvencsessionInternalControlForward; - - // nvencsessionGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__nvencsessionGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_nvencsessionGetInternalObjectHandle; - - // nvencsessionAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__nvencsessionAccessCallback__ = &__nvoc_up_thunk_RmResource_nvencsessionAccessCallback; - - // nvencsessionGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__nvencsessionGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_nvencsessionGetMemInterMapParams; - - // nvencsessionCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__nvencsessionCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_nvencsessionCheckMemInterUnmap; - - // nvencsessionGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__nvencsessionGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_nvencsessionGetMemoryMappingDescriptor; - - // nvencsessionControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__nvencsessionControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_nvencsessionControlSerialization_Prologue; - - // nvencsessionControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__nvencsessionControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_nvencsessionControlSerialization_Epilogue; - - // nvencsessionControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__nvencsessionControl_Prologue__ = &__nvoc_up_thunk_RmResource_nvencsessionControl_Prologue; - - // nvencsessionControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__nvencsessionControl_Epilogue__ = &__nvoc_up_thunk_RmResource_nvencsessionControl_Epilogue; - - // nvencsessionCanCopy -- virtual inherited (res) base (gpures) - pThis->__nvencsessionCanCopy__ = &__nvoc_up_thunk_RsResource_nvencsessionCanCopy; - - // nvencsessionIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__nvencsessionIsDuplicate__ = &__nvoc_up_thunk_RsResource_nvencsessionIsDuplicate; - - // nvencsessionPreDestruct -- virtual inherited (res) base (gpures) - pThis->__nvencsessionPreDestruct__ = &__nvoc_up_thunk_RsResource_nvencsessionPreDestruct; - - // nvencsessionControlFilter -- virtual inherited (res) base (gpures) - pThis->__nvencsessionControlFilter__ = &__nvoc_up_thunk_RsResource_nvencsessionControlFilter; - - // nvencsessionIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__nvencsessionIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_nvencsessionIsPartialUnmapSupported; - - // nvencsessionMapTo -- virtual inherited (res) base (gpures) - pThis->__nvencsessionMapTo__ = &__nvoc_up_thunk_RsResource_nvencsessionMapTo; - - // nvencsessionUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__nvencsessionUnmapFrom__ = &__nvoc_up_thunk_RsResource_nvencsessionUnmapFrom; - - // nvencsessionGetRefCount -- virtual inherited (res) base (gpures) - pThis->__nvencsessionGetRefCount__ = &__nvoc_up_thunk_RsResource_nvencsessionGetRefCount; - - // nvencsessionAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__nvencsessionAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_nvencsessionAddAdditionalDependants; -} // End __nvoc_init_funcTable_NvencSession_1 with approximately 29 basic block(s). +} // End __nvoc_init_funcTable_NvencSession_1 with approximately 4 basic block(s). // Initialize vtable(s) for 27 virtual method(s). void __nvoc_init_funcTable_NvencSession(NvencSession *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 27 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__NvencSession vtable = { + .__nvencsessionControl__ = &__nvoc_up_thunk_GpuResource_nvencsessionControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__nvencsessionMap__ = &__nvoc_up_thunk_GpuResource_nvencsessionMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__nvencsessionUnmap__ = &__nvoc_up_thunk_GpuResource_nvencsessionUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__nvencsessionShareCallback__ = &__nvoc_up_thunk_GpuResource_nvencsessionShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__nvencsessionGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_nvencsessionGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__nvencsessionGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_nvencsessionGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__nvencsessionInternalControlForward__ = &__nvoc_up_thunk_GpuResource_nvencsessionInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__nvencsessionGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_nvencsessionGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__nvencsessionAccessCallback__ = &__nvoc_up_thunk_RmResource_nvencsessionAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__nvencsessionGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_nvencsessionGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__nvencsessionCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_nvencsessionCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__nvencsessionGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_nvencsessionGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__nvencsessionControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_nvencsessionControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__nvencsessionControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_nvencsessionControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__nvencsessionControl_Prologue__ = &__nvoc_up_thunk_RmResource_nvencsessionControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__nvencsessionControl_Epilogue__ = &__nvoc_up_thunk_RmResource_nvencsessionControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__nvencsessionCanCopy__ = &__nvoc_up_thunk_RsResource_nvencsessionCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__nvencsessionIsDuplicate__ = &__nvoc_up_thunk_RsResource_nvencsessionIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__nvencsessionPreDestruct__ = &__nvoc_up_thunk_RsResource_nvencsessionPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__nvencsessionControlFilter__ = &__nvoc_up_thunk_RsResource_nvencsessionControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__nvencsessionIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_nvencsessionIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__nvencsessionMapTo__ = &__nvoc_up_thunk_RsResource_nvencsessionMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__nvencsessionUnmapFrom__ = &__nvoc_up_thunk_RsResource_nvencsessionUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__nvencsessionGetRefCount__ = &__nvoc_up_thunk_RsResource_nvencsessionGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__nvencsessionAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_nvencsessionAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (nvencsession) this + + // Initialize vtable(s) with 2 per-object function pointer(s). __nvoc_init_funcTable_NvencSession_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_nvencsession_nvoc.h b/src/nvidia/generated/g_nvencsession_nvoc.h index 8b1dfcc5e2..642beede46 100644 --- a/src/nvidia/generated/g_nvencsession_nvoc.h +++ b/src/nvidia/generated/g_nvencsession_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -95,10 +95,15 @@ typedef struct NVENC_SESSION_ENTRY #endif +// Metadata including vtable +struct NVOC_VTABLE__NvencSession; + + struct NvencSession { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__NvencSession *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -111,9 +116,27 @@ struct NvencSession { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct NvencSession *__nvoc_pbase_NvencSession; // nvencsession - // Vtable with 27 per-object function pointers + // Vtable with 2 per-object function pointers NV_STATUS (*__nvencsessionCtrlCmdNvencSwSessionUpdateInfo__)(struct NvencSession * /*this*/, NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_PARAMS *); // halified (2 hals) exported (id=0xa0bc0101) body NV_STATUS (*__nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2__)(struct NvencSession * /*this*/, NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_V2_PARAMS *); // halified (2 hals) exported (id=0xa0bc0102) body + + // Data members + NvHandle handle; + NVENC_SESSION_ENTRY nvencSessionEntry; + NvU32 version; + struct Memory *pMemory; + NvP64 pSessionStatsBuffer; + NvP64 pPriv; + NvU32 lastProcessedIndex; + NvU32 lastProcessedFrameId; + NvU64 lastProcessedFrameTS; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__NvencSession { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + NV_STATUS (*__nvencsessionControl__)(struct NvencSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__nvencsessionMap__)(struct NvencSession * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__nvencsessionUnmap__)(struct NvencSession * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -139,17 +162,6 @@ struct NvencSession { NV_STATUS (*__nvencsessionUnmapFrom__)(struct NvencSession * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__nvencsessionGetRefCount__)(struct NvencSession * /*this*/); // virtual inherited (res) base (gpures) void (*__nvencsessionAddAdditionalDependants__)(struct RsClient *, struct NvencSession * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - NvHandle handle; - NVENC_SESSION_ENTRY nvencSessionEntry; - NvU32 version; - struct Memory *pMemory; - NvP64 pSessionStatsBuffer; - NvP64 pPriv; - NvU32 lastProcessedIndex; - NvU32 lastProcessedFrameId; - NvU64 lastProcessedFrameTS; }; #ifndef __NVOC_CLASS_NvencSession_TYPEDEF__ @@ -188,55 +200,55 @@ NV_STATUS __nvoc_objCreate_NvencSession(NvencSession**, Dynamic*, NvU32, struct #define nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2_FNPTR(pNvencSession) pNvencSession->__nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2__ #define nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2(pNvencSession, pParams) nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2_DISPATCH(pNvencSession, pParams) #define nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2_HAL(pNvencSession, pParams) nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2_DISPATCH(pNvencSession, pParams) -#define nvencsessionControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define nvencsessionControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define nvencsessionControl(pGpuResource, pCallContext, pParams) nvencsessionControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define nvencsessionMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define nvencsessionMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define nvencsessionMap(pGpuResource, pCallContext, pParams, pCpuMapping) nvencsessionMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define nvencsessionUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define nvencsessionUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define nvencsessionUnmap(pGpuResource, pCallContext, pCpuMapping) nvencsessionUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define nvencsessionShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define nvencsessionShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define nvencsessionShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) nvencsessionShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define nvencsessionGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define nvencsessionGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define nvencsessionGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) nvencsessionGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define nvencsessionGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define nvencsessionGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define nvencsessionGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) nvencsessionGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define nvencsessionInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define nvencsessionInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define nvencsessionInternalControlForward(pGpuResource, command, pParams, size) nvencsessionInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define nvencsessionGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define nvencsessionGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define nvencsessionGetInternalObjectHandle(pGpuResource) nvencsessionGetInternalObjectHandle_DISPATCH(pGpuResource) -#define nvencsessionAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define nvencsessionAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define nvencsessionAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) nvencsessionAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define nvencsessionGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define nvencsessionGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define nvencsessionGetMemInterMapParams(pRmResource, pParams) nvencsessionGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define nvencsessionCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define nvencsessionCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define nvencsessionCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) nvencsessionCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define nvencsessionGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define nvencsessionGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define nvencsessionGetMemoryMappingDescriptor(pRmResource, ppMemDesc) nvencsessionGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define nvencsessionControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define nvencsessionControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define nvencsessionControlSerialization_Prologue(pResource, pCallContext, pParams) nvencsessionControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define nvencsessionControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define nvencsessionControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define nvencsessionControlSerialization_Epilogue(pResource, pCallContext, pParams) nvencsessionControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define nvencsessionControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define nvencsessionControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define nvencsessionControl_Prologue(pResource, pCallContext, pParams) nvencsessionControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define nvencsessionControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define nvencsessionControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define nvencsessionControl_Epilogue(pResource, pCallContext, pParams) nvencsessionControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define nvencsessionCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define nvencsessionCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define nvencsessionCanCopy(pResource) nvencsessionCanCopy_DISPATCH(pResource) -#define nvencsessionIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define nvencsessionIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define nvencsessionIsDuplicate(pResource, hMemory, pDuplicate) nvencsessionIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define nvencsessionPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define nvencsessionPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define nvencsessionPreDestruct(pResource) nvencsessionPreDestruct_DISPATCH(pResource) -#define nvencsessionControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define nvencsessionControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define nvencsessionControlFilter(pResource, pCallContext, pParams) nvencsessionControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define nvencsessionIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define nvencsessionIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define nvencsessionIsPartialUnmapSupported(pResource) nvencsessionIsPartialUnmapSupported_DISPATCH(pResource) -#define nvencsessionMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define nvencsessionMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define nvencsessionMapTo(pResource, pParams) nvencsessionMapTo_DISPATCH(pResource, pParams) -#define nvencsessionUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define nvencsessionUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define nvencsessionUnmapFrom(pResource, pParams) nvencsessionUnmapFrom_DISPATCH(pResource, pParams) -#define nvencsessionGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define nvencsessionGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define nvencsessionGetRefCount(pResource) nvencsessionGetRefCount_DISPATCH(pResource) -#define nvencsessionAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define nvencsessionAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define nvencsessionAddAdditionalDependants(pClient, pResource, pReference) nvencsessionAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions @@ -249,103 +261,103 @@ static inline NV_STATUS nvencsessionCtrlCmdNvencSwSessionUpdateInfoV2_DISPATCH(s } static inline NV_STATUS nvencsessionControl_DISPATCH(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__nvencsessionControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__nvencsessionControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS nvencsessionMap_DISPATCH(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__nvencsessionMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__nvencsessionMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS nvencsessionUnmap_DISPATCH(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__nvencsessionUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__nvencsessionUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool nvencsessionShareCallback_DISPATCH(struct NvencSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__nvencsessionShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__nvencsessionShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS nvencsessionGetRegBaseOffsetAndSize_DISPATCH(struct NvencSession *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__nvencsessionGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__nvencsessionGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS nvencsessionGetMapAddrSpace_DISPATCH(struct NvencSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__nvencsessionGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__nvencsessionGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS nvencsessionInternalControlForward_DISPATCH(struct NvencSession *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__nvencsessionInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__nvencsessionInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle nvencsessionGetInternalObjectHandle_DISPATCH(struct NvencSession *pGpuResource) { - return pGpuResource->__nvencsessionGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__nvencsessionGetInternalObjectHandle__(pGpuResource); } static inline NvBool nvencsessionAccessCallback_DISPATCH(struct NvencSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__nvencsessionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__nvencsessionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS nvencsessionGetMemInterMapParams_DISPATCH(struct NvencSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__nvencsessionGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__nvencsessionGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS nvencsessionCheckMemInterUnmap_DISPATCH(struct NvencSession *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__nvencsessionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__nvencsessionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS nvencsessionGetMemoryMappingDescriptor_DISPATCH(struct NvencSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__nvencsessionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__nvencsessionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS nvencsessionControlSerialization_Prologue_DISPATCH(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvencsessionControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__nvencsessionControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void nvencsessionControlSerialization_Epilogue_DISPATCH(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__nvencsessionControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__nvencsessionControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS nvencsessionControl_Prologue_DISPATCH(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvencsessionControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__nvencsessionControl_Prologue__(pResource, pCallContext, pParams); } static inline void nvencsessionControl_Epilogue_DISPATCH(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__nvencsessionControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__nvencsessionControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool nvencsessionCanCopy_DISPATCH(struct NvencSession *pResource) { - return pResource->__nvencsessionCanCopy__(pResource); + return pResource->__nvoc_vtable->__nvencsessionCanCopy__(pResource); } static inline NV_STATUS nvencsessionIsDuplicate_DISPATCH(struct NvencSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__nvencsessionIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__nvencsessionIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void nvencsessionPreDestruct_DISPATCH(struct NvencSession *pResource) { - pResource->__nvencsessionPreDestruct__(pResource); + pResource->__nvoc_vtable->__nvencsessionPreDestruct__(pResource); } static inline NV_STATUS nvencsessionControlFilter_DISPATCH(struct NvencSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvencsessionControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__nvencsessionControlFilter__(pResource, pCallContext, pParams); } static inline NvBool nvencsessionIsPartialUnmapSupported_DISPATCH(struct NvencSession *pResource) { - return pResource->__nvencsessionIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__nvencsessionIsPartialUnmapSupported__(pResource); } static inline NV_STATUS nvencsessionMapTo_DISPATCH(struct NvencSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__nvencsessionMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__nvencsessionMapTo__(pResource, pParams); } static inline NV_STATUS nvencsessionUnmapFrom_DISPATCH(struct NvencSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__nvencsessionUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__nvencsessionUnmapFrom__(pResource, pParams); } static inline NvU32 nvencsessionGetRefCount_DISPATCH(struct NvencSession *pResource) { - return pResource->__nvencsessionGetRefCount__(pResource); + return pResource->__nvoc_vtable->__nvencsessionGetRefCount__(pResource); } static inline void nvencsessionAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct NvencSession *pResource, RsResourceRef *pReference) { - pResource->__nvencsessionAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__nvencsessionAddAdditionalDependants__(pClient, pResource, pReference); } static inline NV_STATUS nvencsessionCtrlCmdNvencSwSessionUpdateInfo_46f6a7(struct NvencSession *pNvencSession, NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_PARAMS *pParams) { diff --git a/src/nvidia/generated/g_nvfbc_session_nvoc.c b/src/nvidia/generated/g_nvfbc_session_nvoc.c index 0a5bd7775c..4095ae0518 100644 --- a/src/nvidia/generated/g_nvfbc_session_nvoc.c +++ b/src/nvidia/generated/g_nvfbc_session_nvoc.c @@ -117,130 +117,198 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_NvfbcSes }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionControl(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionMap(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionUnmap(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_nvfbcsessionShareCallback(struct NvfbcSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionGetRegBaseOffsetAndSize(struct NvfbcSession *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionGetMapAddrSpace(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionInternalControlForward(struct NvfbcSession *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_nvfbcsessionGetInternalObjectHandle(struct NvfbcSession *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_nvfbcsessionAccessCallback(struct NvfbcSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_nvfbcsessionGetMemInterMapParams(struct NvfbcSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_nvfbcsessionCheckMemInterUnmap(struct NvfbcSession *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_nvfbcsessionGetMemoryMappingDescriptor(struct NvfbcSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_nvfbcsessionControlSerialization_Prologue(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_nvfbcsessionControlSerialization_Epilogue(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_nvfbcsessionControl_Prologue(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_nvfbcsessionControl_Epilogue(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_nvfbcsessionCanCopy(struct NvfbcSession *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_nvfbcsessionIsDuplicate(struct NvfbcSession *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_nvfbcsessionPreDestruct(struct NvfbcSession *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_nvfbcsessionControlFilter(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_nvfbcsessionIsPartialUnmapSupported(struct NvfbcSession *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_nvfbcsessionMapTo(struct NvfbcSession *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_nvfbcsessionUnmapFrom(struct NvfbcSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_nvfbcsessionGetRefCount(struct NvfbcSession *pResource); // this +void __nvoc_up_thunk_RsResource_nvfbcsessionAddAdditionalDependants(struct RsClient *pClient, struct NvfbcSession *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in NvfbcSession to superclasses // nvfbcsessionControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionControl(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionControl(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset), pCallContext, pParams); } // nvfbcsessionMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionMap(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionMap(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // nvfbcsessionUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionUnmap(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionUnmap(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset), pCallContext, pCpuMapping); } // nvfbcsessionShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_nvfbcsessionShareCallback(struct NvfbcSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_nvfbcsessionShareCallback(struct NvfbcSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // nvfbcsessionGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionGetRegBaseOffsetAndSize(struct NvfbcSession *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionGetRegBaseOffsetAndSize(struct NvfbcSession *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset), pGpu, pOffset, pSize); } // nvfbcsessionGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionGetMapAddrSpace(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionGetMapAddrSpace(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // nvfbcsessionInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionInternalControlForward(struct NvfbcSession *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_nvfbcsessionInternalControlForward(struct NvfbcSession *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset), command, pParams, size); } // nvfbcsessionGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_nvfbcsessionGetInternalObjectHandle(struct NvfbcSession *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_nvfbcsessionGetInternalObjectHandle(struct NvfbcSession *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_NvfbcSession_GpuResource.offset)); } // nvfbcsessionAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_nvfbcsessionAccessCallback(struct NvfbcSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_nvfbcsessionAccessCallback(struct NvfbcSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // nvfbcsessionGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_nvfbcsessionGetMemInterMapParams(struct NvfbcSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_nvfbcsessionGetMemInterMapParams(struct NvfbcSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), pParams); } // nvfbcsessionCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_nvfbcsessionCheckMemInterUnmap(struct NvfbcSession *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_nvfbcsessionCheckMemInterUnmap(struct NvfbcSession *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), bSubdeviceHandleProvided); } // nvfbcsessionGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_nvfbcsessionGetMemoryMappingDescriptor(struct NvfbcSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_nvfbcsessionGetMemoryMappingDescriptor(struct NvfbcSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), ppMemDesc); } // nvfbcsessionControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_nvfbcsessionControlSerialization_Prologue(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_nvfbcsessionControlSerialization_Prologue(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), pCallContext, pParams); } // nvfbcsessionControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_nvfbcsessionControlSerialization_Epilogue(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_nvfbcsessionControlSerialization_Epilogue(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), pCallContext, pParams); } // nvfbcsessionControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_nvfbcsessionControl_Prologue(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_nvfbcsessionControl_Prologue(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), pCallContext, pParams); } // nvfbcsessionControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_nvfbcsessionControl_Epilogue(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_nvfbcsessionControl_Epilogue(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RmResource.offset), pCallContext, pParams); } // nvfbcsessionCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_nvfbcsessionCanCopy(struct NvfbcSession *pResource) { +NvBool __nvoc_up_thunk_RsResource_nvfbcsessionCanCopy(struct NvfbcSession *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset)); } // nvfbcsessionIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_nvfbcsessionIsDuplicate(struct NvfbcSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_nvfbcsessionIsDuplicate(struct NvfbcSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset), hMemory, pDuplicate); } // nvfbcsessionPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_nvfbcsessionPreDestruct(struct NvfbcSession *pResource) { +void __nvoc_up_thunk_RsResource_nvfbcsessionPreDestruct(struct NvfbcSession *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset)); } // nvfbcsessionControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_nvfbcsessionControlFilter(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_nvfbcsessionControlFilter(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset), pCallContext, pParams); } // nvfbcsessionIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_nvfbcsessionIsPartialUnmapSupported(struct NvfbcSession *pResource) { +NvBool __nvoc_up_thunk_RsResource_nvfbcsessionIsPartialUnmapSupported(struct NvfbcSession *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset)); } // nvfbcsessionMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_nvfbcsessionMapTo(struct NvfbcSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_nvfbcsessionMapTo(struct NvfbcSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset), pParams); } // nvfbcsessionUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_nvfbcsessionUnmapFrom(struct NvfbcSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_nvfbcsessionUnmapFrom(struct NvfbcSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset), pParams); } // nvfbcsessionGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_nvfbcsessionGetRefCount(struct NvfbcSession *pResource) { +NvU32 __nvoc_up_thunk_RsResource_nvfbcsessionGetRefCount(struct NvfbcSession *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset)); } // nvfbcsessionAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_nvfbcsessionAddAdditionalDependants(struct RsClient *pClient, struct NvfbcSession *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_nvfbcsessionAddAdditionalDependants(struct RsClient *pClient, struct NvfbcSession *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_NvfbcSession_RsResource.offset), pReference); } @@ -289,88 +357,114 @@ static void __nvoc_init_funcTable_NvfbcSession_1(NvfbcSession *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo__ = &nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo_IMPL; #endif - - // nvfbcsessionControl -- virtual inherited (gpures) base (gpures) - pThis->__nvfbcsessionControl__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionControl; - - // nvfbcsessionMap -- virtual inherited (gpures) base (gpures) - pThis->__nvfbcsessionMap__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionMap; - - // nvfbcsessionUnmap -- virtual inherited (gpures) base (gpures) - pThis->__nvfbcsessionUnmap__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionUnmap; - - // nvfbcsessionShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__nvfbcsessionShareCallback__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionShareCallback; - - // nvfbcsessionGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__nvfbcsessionGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionGetRegBaseOffsetAndSize; - - // nvfbcsessionGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__nvfbcsessionGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionGetMapAddrSpace; - - // nvfbcsessionInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__nvfbcsessionInternalControlForward__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionInternalControlForward; - - // nvfbcsessionGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__nvfbcsessionGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionGetInternalObjectHandle; - - // nvfbcsessionAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__nvfbcsessionAccessCallback__ = &__nvoc_up_thunk_RmResource_nvfbcsessionAccessCallback; - - // nvfbcsessionGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__nvfbcsessionGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_nvfbcsessionGetMemInterMapParams; - - // nvfbcsessionCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__nvfbcsessionCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_nvfbcsessionCheckMemInterUnmap; - - // nvfbcsessionGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__nvfbcsessionGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_nvfbcsessionGetMemoryMappingDescriptor; - - // nvfbcsessionControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__nvfbcsessionControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_nvfbcsessionControlSerialization_Prologue; - - // nvfbcsessionControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__nvfbcsessionControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_nvfbcsessionControlSerialization_Epilogue; - - // nvfbcsessionControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__nvfbcsessionControl_Prologue__ = &__nvoc_up_thunk_RmResource_nvfbcsessionControl_Prologue; - - // nvfbcsessionControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__nvfbcsessionControl_Epilogue__ = &__nvoc_up_thunk_RmResource_nvfbcsessionControl_Epilogue; - - // nvfbcsessionCanCopy -- virtual inherited (res) base (gpures) - pThis->__nvfbcsessionCanCopy__ = &__nvoc_up_thunk_RsResource_nvfbcsessionCanCopy; - - // nvfbcsessionIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__nvfbcsessionIsDuplicate__ = &__nvoc_up_thunk_RsResource_nvfbcsessionIsDuplicate; - - // nvfbcsessionPreDestruct -- virtual inherited (res) base (gpures) - pThis->__nvfbcsessionPreDestruct__ = &__nvoc_up_thunk_RsResource_nvfbcsessionPreDestruct; - - // nvfbcsessionControlFilter -- virtual inherited (res) base (gpures) - pThis->__nvfbcsessionControlFilter__ = &__nvoc_up_thunk_RsResource_nvfbcsessionControlFilter; - - // nvfbcsessionIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__nvfbcsessionIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_nvfbcsessionIsPartialUnmapSupported; - - // nvfbcsessionMapTo -- virtual inherited (res) base (gpures) - pThis->__nvfbcsessionMapTo__ = &__nvoc_up_thunk_RsResource_nvfbcsessionMapTo; - - // nvfbcsessionUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__nvfbcsessionUnmapFrom__ = &__nvoc_up_thunk_RsResource_nvfbcsessionUnmapFrom; - - // nvfbcsessionGetRefCount -- virtual inherited (res) base (gpures) - pThis->__nvfbcsessionGetRefCount__ = &__nvoc_up_thunk_RsResource_nvfbcsessionGetRefCount; - - // nvfbcsessionAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__nvfbcsessionAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_nvfbcsessionAddAdditionalDependants; -} // End __nvoc_init_funcTable_NvfbcSession_1 with approximately 26 basic block(s). +} // End __nvoc_init_funcTable_NvfbcSession_1 with approximately 1 basic block(s). // Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_NvfbcSession(NvfbcSession *pThis) { - // Initialize vtable(s) with 26 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__NvfbcSession vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__nvfbcsessionControl__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__nvfbcsessionMap__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__nvfbcsessionUnmap__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__nvfbcsessionShareCallback__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__nvfbcsessionGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__nvfbcsessionGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__nvfbcsessionInternalControlForward__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__nvfbcsessionGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_nvfbcsessionGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__nvfbcsessionAccessCallback__ = &__nvoc_up_thunk_RmResource_nvfbcsessionAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__nvfbcsessionGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_nvfbcsessionGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__nvfbcsessionCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_nvfbcsessionCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__nvfbcsessionGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_nvfbcsessionGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__nvfbcsessionControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_nvfbcsessionControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__nvfbcsessionControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_nvfbcsessionControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__nvfbcsessionControl_Prologue__ = &__nvoc_up_thunk_RmResource_nvfbcsessionControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__nvfbcsessionControl_Epilogue__ = &__nvoc_up_thunk_RmResource_nvfbcsessionControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__nvfbcsessionCanCopy__ = &__nvoc_up_thunk_RsResource_nvfbcsessionCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__nvfbcsessionIsDuplicate__ = &__nvoc_up_thunk_RsResource_nvfbcsessionIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__nvfbcsessionPreDestruct__ = &__nvoc_up_thunk_RsResource_nvfbcsessionPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__nvfbcsessionControlFilter__ = &__nvoc_up_thunk_RsResource_nvfbcsessionControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__nvfbcsessionIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_nvfbcsessionIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__nvfbcsessionMapTo__ = &__nvoc_up_thunk_RsResource_nvfbcsessionMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__nvfbcsessionUnmapFrom__ = &__nvoc_up_thunk_RsResource_nvfbcsessionUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__nvfbcsessionGetRefCount__ = &__nvoc_up_thunk_RsResource_nvfbcsessionGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__nvfbcsessionAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_nvfbcsessionAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (nvfbcsession) this + + // Initialize vtable(s) with 1 per-object function pointer(s). __nvoc_init_funcTable_NvfbcSession_1(pThis); } diff --git a/src/nvidia/generated/g_nvfbc_session_nvoc.h b/src/nvidia/generated/g_nvfbc_session_nvoc.h index 137bf9eb64..e6b51a7759 100644 --- a/src/nvidia/generated/g_nvfbc_session_nvoc.h +++ b/src/nvidia/generated/g_nvfbc_session_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -92,10 +92,15 @@ typedef struct NVFBC_SESSION_ENTRY #endif +// Metadata including vtable +struct NVOC_VTABLE__NvfbcSession; + + struct NvfbcSession { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__NvfbcSession *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -108,8 +113,18 @@ struct NvfbcSession { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct NvfbcSession *__nvoc_pbase_NvfbcSession; // nvfbcsession - // Vtable with 26 per-object function pointers + // Vtable with 1 per-object function pointer NV_STATUS (*__nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo__)(struct NvfbcSession * /*this*/, NVA0BD_CTRL_NVFBC_SW_SESSION_UPDATE_INFO_PARAMS *); // exported (id=0xa0bd0101) + + // Data members + NVFBC_SESSION_ENTRY nvfbcSessionEntry; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__NvfbcSession { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + NV_STATUS (*__nvfbcsessionControl__)(struct NvfbcSession * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__nvfbcsessionMap__)(struct NvfbcSession * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__nvfbcsessionUnmap__)(struct NvfbcSession * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -135,9 +150,6 @@ struct NvfbcSession { NV_STATUS (*__nvfbcsessionUnmapFrom__)(struct NvfbcSession * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__nvfbcsessionGetRefCount__)(struct NvfbcSession * /*this*/); // virtual inherited (res) base (gpures) void (*__nvfbcsessionAddAdditionalDependants__)(struct RsClient *, struct NvfbcSession * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - NVFBC_SESSION_ENTRY nvfbcSessionEntry; }; #ifndef __NVOC_CLASS_NvfbcSession_TYPEDEF__ @@ -172,55 +184,55 @@ NV_STATUS __nvoc_objCreate_NvfbcSession(NvfbcSession**, Dynamic*, NvU32, struct // Wrapper macros #define nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo_FNPTR(pNvfbcSession) pNvfbcSession->__nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo__ #define nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo(pNvfbcSession, pParams) nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo_DISPATCH(pNvfbcSession, pParams) -#define nvfbcsessionControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define nvfbcsessionControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define nvfbcsessionControl(pGpuResource, pCallContext, pParams) nvfbcsessionControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define nvfbcsessionMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define nvfbcsessionMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define nvfbcsessionMap(pGpuResource, pCallContext, pParams, pCpuMapping) nvfbcsessionMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define nvfbcsessionUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define nvfbcsessionUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define nvfbcsessionUnmap(pGpuResource, pCallContext, pCpuMapping) nvfbcsessionUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define nvfbcsessionShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define nvfbcsessionShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define nvfbcsessionShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) nvfbcsessionShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define nvfbcsessionGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define nvfbcsessionGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define nvfbcsessionGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) nvfbcsessionGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define nvfbcsessionGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define nvfbcsessionGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define nvfbcsessionGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) nvfbcsessionGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define nvfbcsessionInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define nvfbcsessionInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define nvfbcsessionInternalControlForward(pGpuResource, command, pParams, size) nvfbcsessionInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define nvfbcsessionGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define nvfbcsessionGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define nvfbcsessionGetInternalObjectHandle(pGpuResource) nvfbcsessionGetInternalObjectHandle_DISPATCH(pGpuResource) -#define nvfbcsessionAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define nvfbcsessionAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define nvfbcsessionAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) nvfbcsessionAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define nvfbcsessionGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define nvfbcsessionGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define nvfbcsessionGetMemInterMapParams(pRmResource, pParams) nvfbcsessionGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define nvfbcsessionCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define nvfbcsessionCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define nvfbcsessionCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) nvfbcsessionCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define nvfbcsessionGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define nvfbcsessionGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define nvfbcsessionGetMemoryMappingDescriptor(pRmResource, ppMemDesc) nvfbcsessionGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define nvfbcsessionControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define nvfbcsessionControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define nvfbcsessionControlSerialization_Prologue(pResource, pCallContext, pParams) nvfbcsessionControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define nvfbcsessionControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define nvfbcsessionControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define nvfbcsessionControlSerialization_Epilogue(pResource, pCallContext, pParams) nvfbcsessionControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define nvfbcsessionControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define nvfbcsessionControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define nvfbcsessionControl_Prologue(pResource, pCallContext, pParams) nvfbcsessionControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define nvfbcsessionControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define nvfbcsessionControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define nvfbcsessionControl_Epilogue(pResource, pCallContext, pParams) nvfbcsessionControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define nvfbcsessionCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define nvfbcsessionCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define nvfbcsessionCanCopy(pResource) nvfbcsessionCanCopy_DISPATCH(pResource) -#define nvfbcsessionIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define nvfbcsessionIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define nvfbcsessionIsDuplicate(pResource, hMemory, pDuplicate) nvfbcsessionIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define nvfbcsessionPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define nvfbcsessionPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define nvfbcsessionPreDestruct(pResource) nvfbcsessionPreDestruct_DISPATCH(pResource) -#define nvfbcsessionControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define nvfbcsessionControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define nvfbcsessionControlFilter(pResource, pCallContext, pParams) nvfbcsessionControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define nvfbcsessionIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define nvfbcsessionIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define nvfbcsessionIsPartialUnmapSupported(pResource) nvfbcsessionIsPartialUnmapSupported_DISPATCH(pResource) -#define nvfbcsessionMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define nvfbcsessionMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define nvfbcsessionMapTo(pResource, pParams) nvfbcsessionMapTo_DISPATCH(pResource, pParams) -#define nvfbcsessionUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define nvfbcsessionUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define nvfbcsessionUnmapFrom(pResource, pParams) nvfbcsessionUnmapFrom_DISPATCH(pResource, pParams) -#define nvfbcsessionGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define nvfbcsessionGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define nvfbcsessionGetRefCount(pResource) nvfbcsessionGetRefCount_DISPATCH(pResource) -#define nvfbcsessionAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define nvfbcsessionAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define nvfbcsessionAddAdditionalDependants(pClient, pResource, pReference) nvfbcsessionAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions @@ -229,103 +241,103 @@ static inline NV_STATUS nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo_DISPATCH(str } static inline NV_STATUS nvfbcsessionControl_DISPATCH(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__nvfbcsessionControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__nvfbcsessionControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS nvfbcsessionMap_DISPATCH(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__nvfbcsessionMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__nvfbcsessionMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS nvfbcsessionUnmap_DISPATCH(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__nvfbcsessionUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__nvfbcsessionUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool nvfbcsessionShareCallback_DISPATCH(struct NvfbcSession *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__nvfbcsessionShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__nvfbcsessionShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS nvfbcsessionGetRegBaseOffsetAndSize_DISPATCH(struct NvfbcSession *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__nvfbcsessionGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__nvfbcsessionGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS nvfbcsessionGetMapAddrSpace_DISPATCH(struct NvfbcSession *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__nvfbcsessionGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__nvfbcsessionGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS nvfbcsessionInternalControlForward_DISPATCH(struct NvfbcSession *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__nvfbcsessionInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__nvfbcsessionInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle nvfbcsessionGetInternalObjectHandle_DISPATCH(struct NvfbcSession *pGpuResource) { - return pGpuResource->__nvfbcsessionGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__nvfbcsessionGetInternalObjectHandle__(pGpuResource); } static inline NvBool nvfbcsessionAccessCallback_DISPATCH(struct NvfbcSession *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__nvfbcsessionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__nvfbcsessionAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS nvfbcsessionGetMemInterMapParams_DISPATCH(struct NvfbcSession *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__nvfbcsessionGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__nvfbcsessionGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS nvfbcsessionCheckMemInterUnmap_DISPATCH(struct NvfbcSession *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__nvfbcsessionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__nvfbcsessionCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS nvfbcsessionGetMemoryMappingDescriptor_DISPATCH(struct NvfbcSession *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__nvfbcsessionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__nvfbcsessionGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS nvfbcsessionControlSerialization_Prologue_DISPATCH(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvfbcsessionControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__nvfbcsessionControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void nvfbcsessionControlSerialization_Epilogue_DISPATCH(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__nvfbcsessionControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__nvfbcsessionControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS nvfbcsessionControl_Prologue_DISPATCH(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvfbcsessionControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__nvfbcsessionControl_Prologue__(pResource, pCallContext, pParams); } static inline void nvfbcsessionControl_Epilogue_DISPATCH(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__nvfbcsessionControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__nvfbcsessionControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool nvfbcsessionCanCopy_DISPATCH(struct NvfbcSession *pResource) { - return pResource->__nvfbcsessionCanCopy__(pResource); + return pResource->__nvoc_vtable->__nvfbcsessionCanCopy__(pResource); } static inline NV_STATUS nvfbcsessionIsDuplicate_DISPATCH(struct NvfbcSession *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__nvfbcsessionIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__nvfbcsessionIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void nvfbcsessionPreDestruct_DISPATCH(struct NvfbcSession *pResource) { - pResource->__nvfbcsessionPreDestruct__(pResource); + pResource->__nvoc_vtable->__nvfbcsessionPreDestruct__(pResource); } static inline NV_STATUS nvfbcsessionControlFilter_DISPATCH(struct NvfbcSession *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__nvfbcsessionControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__nvfbcsessionControlFilter__(pResource, pCallContext, pParams); } static inline NvBool nvfbcsessionIsPartialUnmapSupported_DISPATCH(struct NvfbcSession *pResource) { - return pResource->__nvfbcsessionIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__nvfbcsessionIsPartialUnmapSupported__(pResource); } static inline NV_STATUS nvfbcsessionMapTo_DISPATCH(struct NvfbcSession *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__nvfbcsessionMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__nvfbcsessionMapTo__(pResource, pParams); } static inline NV_STATUS nvfbcsessionUnmapFrom_DISPATCH(struct NvfbcSession *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__nvfbcsessionUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__nvfbcsessionUnmapFrom__(pResource, pParams); } static inline NvU32 nvfbcsessionGetRefCount_DISPATCH(struct NvfbcSession *pResource) { - return pResource->__nvfbcsessionGetRefCount__(pResource); + return pResource->__nvoc_vtable->__nvfbcsessionGetRefCount__(pResource); } static inline void nvfbcsessionAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct NvfbcSession *pResource, RsResourceRef *pReference) { - pResource->__nvfbcsessionAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__nvfbcsessionAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS nvfbcsessionCtrlCmdNvFBCSwSessionUpdateInfo_IMPL(struct NvfbcSession *pNvfbcSession, NVA0BD_CTRL_NVFBC_SW_SESSION_UPDATE_INFO_PARAMS *pParams); diff --git a/src/nvidia/generated/g_object_nvoc.c b/src/nvidia/generated/g_object_nvoc.c index d86d8b2075..6cfa2f4504 100644 --- a/src/nvidia/generated/g_object_nvoc.c +++ b/src/nvidia/generated/g_object_nvoc.c @@ -48,6 +48,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_Object = /*pExportInfo=*/ &__nvoc_export_info_Object }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_Object = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_object_nvoc.h b/src/nvidia/generated/g_object_nvoc.h index 7bb54c7715..6e13418fa5 100644 --- a/src/nvidia/generated/g_object_nvoc.h +++ b/src/nvidia/generated/g_object_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_objgpumon_nvoc.c b/src/nvidia/generated/g_objgpumon_nvoc.c deleted file mode 100644 index 6561eebbd2..0000000000 --- a/src/nvidia/generated/g_objgpumon_nvoc.c +++ /dev/null @@ -1,319 +0,0 @@ -#define NVOC_OBJGPUMON_H_PRIVATE_ACCESS_ALLOWED -#include "nvoc/runtime.h" -#include "nvoc/rtti.h" -#include "nvtypes.h" -#include "nvport/nvport.h" -#include "nvport/inline/util_valist.h" -#include "utils/nvassert.h" -#include "g_objgpumon_nvoc.h" - -#ifdef DEBUG -char __nvoc_class_id_uniqueness_check_0x2b424b = 1; -#endif - -extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPUMON; - -extern const struct NVOC_CLASS_DEF __nvoc_class_def_Object; - -extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJENGSTATE; - -void __nvoc_init_OBJGPUMON(OBJGPUMON*, RmHalspecOwner* ); -void __nvoc_init_funcTable_OBJGPUMON(OBJGPUMON*, RmHalspecOwner* ); -NV_STATUS __nvoc_ctor_OBJGPUMON(OBJGPUMON*, RmHalspecOwner* ); -void __nvoc_init_dataField_OBJGPUMON(OBJGPUMON*, RmHalspecOwner* ); -void __nvoc_dtor_OBJGPUMON(OBJGPUMON*); -extern const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJGPUMON; - -static const struct NVOC_RTTI __nvoc_rtti_OBJGPUMON_OBJGPUMON = { - /*pClassDef=*/ &__nvoc_class_def_OBJGPUMON, - /*dtor=*/ (NVOC_DYNAMIC_DTOR) &__nvoc_dtor_OBJGPUMON, - /*offset=*/ 0, -}; - -static const struct NVOC_RTTI __nvoc_rtti_OBJGPUMON_Object = { - /*pClassDef=*/ &__nvoc_class_def_Object, - /*dtor=*/ &__nvoc_destructFromBase, - /*offset=*/ NV_OFFSETOF(OBJGPUMON, __nvoc_base_OBJENGSTATE.__nvoc_base_Object), -}; - -static const struct NVOC_RTTI __nvoc_rtti_OBJGPUMON_OBJENGSTATE = { - /*pClassDef=*/ &__nvoc_class_def_OBJENGSTATE, - /*dtor=*/ &__nvoc_destructFromBase, - /*offset=*/ NV_OFFSETOF(OBJGPUMON, __nvoc_base_OBJENGSTATE), -}; - -static const struct NVOC_CASTINFO __nvoc_castinfo_OBJGPUMON = { - /*numRelatives=*/ 3, - /*relatives=*/ { - &__nvoc_rtti_OBJGPUMON_OBJGPUMON, - &__nvoc_rtti_OBJGPUMON_OBJENGSTATE, - &__nvoc_rtti_OBJGPUMON_Object, - }, -}; - -const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPUMON = -{ - /*classInfo=*/ { - /*size=*/ sizeof(OBJGPUMON), - /*classId=*/ classId(OBJGPUMON), - /*providerId=*/ &__nvoc_rtti_provider, -#if NV_PRINTF_STRINGS_ALLOWED - /*name=*/ "OBJGPUMON", -#endif - }, - /*objCreatefn=*/ (NVOC_DYNAMIC_OBJ_CREATE) &__nvoc_objCreateDynamic_OBJGPUMON, - /*pCastInfo=*/ &__nvoc_castinfo_OBJGPUMON, - /*pExportInfo=*/ &__nvoc_export_info_OBJGPUMON -}; - -// 14 up-thunk(s) defined to bridge methods in OBJGPUMON to superclasses - -// gpumonConstructEngine: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_gpumonConstructEngine(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate, ENGDESCRIPTOR arg3) { - return engstateConstructEngine(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset), arg3); -} - -// gpumonInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_gpumonInitMissing(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate) { - engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset)); -} - -// gpumonStatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_gpumonStatePreInitLocked(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate) { - return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset)); -} - -// gpumonStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_gpumonStatePreInitUnlocked(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate) { - return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset)); -} - -// gpumonStateInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_gpumonStateInitLocked(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate) { - return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset)); -} - -// gpumonStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_gpumonStateInitUnlocked(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate) { - return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset)); -} - -// gpumonStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_gpumonStatePreLoad(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { - return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset), arg3); -} - -// gpumonStateLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_gpumonStateLoad(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { - return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset), arg3); -} - -// gpumonStatePostLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_gpumonStatePostLoad(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { - return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset), arg3); -} - -// gpumonStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_gpumonStatePreUnload(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { - return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset), arg3); -} - -// gpumonStateUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_gpumonStateUnload(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { - return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset), arg3); -} - -// gpumonStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_gpumonStatePostUnload(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { - return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset), arg3); -} - -// gpumonStateDestroy: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_gpumonStateDestroy(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate) { - engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset)); -} - -// gpumonIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_gpumonIsPresent(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate) { - return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJGPUMON_OBJENGSTATE.offset)); -} - - -const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJGPUMON = -{ - /*numEntries=*/ 0, - /*pExportEntries=*/ 0 -}; - -void __nvoc_dtor_OBJENGSTATE(OBJENGSTATE*); -void __nvoc_dtor_OBJGPUMON(OBJGPUMON *pThis) { - __nvoc_dtor_OBJENGSTATE(&pThis->__nvoc_base_OBJENGSTATE); - PORT_UNREFERENCED_VARIABLE(pThis); -} - -void __nvoc_init_dataField_OBJGPUMON(OBJGPUMON *pThis, RmHalspecOwner *pRmhalspecowner) { - ChipHal *chipHal = &pRmhalspecowner->chipHal; - const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; - PORT_UNREFERENCED_VARIABLE(pThis); - PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); - PORT_UNREFERENCED_VARIABLE(chipHal); - PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); -} - -NV_STATUS __nvoc_ctor_OBJENGSTATE(OBJENGSTATE* ); -NV_STATUS __nvoc_ctor_OBJGPUMON(OBJGPUMON *pThis, RmHalspecOwner *pRmhalspecowner) { - NV_STATUS status = NV_OK; - status = __nvoc_ctor_OBJENGSTATE(&pThis->__nvoc_base_OBJENGSTATE); - if (status != NV_OK) goto __nvoc_ctor_OBJGPUMON_fail_OBJENGSTATE; - __nvoc_init_dataField_OBJGPUMON(pThis, pRmhalspecowner); - goto __nvoc_ctor_OBJGPUMON_exit; // Success - -__nvoc_ctor_OBJGPUMON_fail_OBJENGSTATE: -__nvoc_ctor_OBJGPUMON_exit: - - return status; -} - -// Vtable initialization -static void __nvoc_init_funcTable_OBJGPUMON_1(OBJGPUMON *pThis, RmHalspecOwner *pRmhalspecowner) { - ChipHal *chipHal = &pRmhalspecowner->chipHal; - const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; - PORT_UNREFERENCED_VARIABLE(pThis); - PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); - PORT_UNREFERENCED_VARIABLE(chipHal); - PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); - - // gpumonConstructEngine -- virtual inherited (engstate) base (engstate) - pThis->__gpumonConstructEngine__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonConstructEngine; - - // gpumonInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__gpumonInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonInitMissing; - - // gpumonStatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__gpumonStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonStatePreInitLocked; - - // gpumonStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__gpumonStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonStatePreInitUnlocked; - - // gpumonStateInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__gpumonStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonStateInitLocked; - - // gpumonStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__gpumonStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonStateInitUnlocked; - - // gpumonStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__gpumonStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonStatePreLoad; - - // gpumonStateLoad -- virtual inherited (engstate) base (engstate) - pThis->__gpumonStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonStateLoad; - - // gpumonStatePostLoad -- virtual inherited (engstate) base (engstate) - pThis->__gpumonStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonStatePostLoad; - - // gpumonStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__gpumonStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonStatePreUnload; - - // gpumonStateUnload -- virtual inherited (engstate) base (engstate) - pThis->__gpumonStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonStateUnload; - - // gpumonStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__gpumonStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonStatePostUnload; - - // gpumonStateDestroy -- virtual inherited (engstate) base (engstate) - pThis->__gpumonStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonStateDestroy; - - // gpumonIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__gpumonIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_gpumonIsPresent; -} // End __nvoc_init_funcTable_OBJGPUMON_1 with approximately 14 basic block(s). - - -// Initialize vtable(s) for 14 virtual method(s). -void __nvoc_init_funcTable_OBJGPUMON(OBJGPUMON *pThis, RmHalspecOwner *pRmhalspecowner) { - - // Initialize vtable(s) with 14 per-object function pointer(s). - __nvoc_init_funcTable_OBJGPUMON_1(pThis, pRmhalspecowner); -} - -void __nvoc_init_OBJENGSTATE(OBJENGSTATE*); -void __nvoc_init_OBJGPUMON(OBJGPUMON *pThis, RmHalspecOwner *pRmhalspecowner) { - pThis->__nvoc_pbase_OBJGPUMON = pThis; - pThis->__nvoc_pbase_Object = &pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object; - pThis->__nvoc_pbase_OBJENGSTATE = &pThis->__nvoc_base_OBJENGSTATE; - __nvoc_init_OBJENGSTATE(&pThis->__nvoc_base_OBJENGSTATE); - __nvoc_init_funcTable_OBJGPUMON(pThis, pRmhalspecowner); -} - -NV_STATUS __nvoc_objCreate_OBJGPUMON(OBJGPUMON **ppThis, Dynamic *pParent, NvU32 createFlags) -{ - NV_STATUS status; - Object *pParentObj = NULL; - OBJGPUMON *pThis; - RmHalspecOwner *pRmhalspecowner; - - // Assign `pThis`, allocating memory unless suppressed by flag. - status = __nvoc_handleObjCreateMemAlloc(createFlags, sizeof(OBJGPUMON), (void**)&pThis, (void**)ppThis); - if (status != NV_OK) - return status; - - // Zero is the initial value for everything. - portMemSet(pThis, 0, sizeof(OBJGPUMON)); - - // Initialize runtime type information. - __nvoc_initRtti(staticCast(pThis, Dynamic), &__nvoc_class_def_OBJGPUMON); - - pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object.createFlags = createFlags; - - // pParent must be a valid object that derives from a halspec owner class. - NV_ASSERT_OR_RETURN(pParent != NULL, NV_ERR_INVALID_ARGUMENT); - - // Link the child into the parent unless flagged not to do so. - if (!(createFlags & NVOC_OBJ_CREATE_FLAGS_PARENT_HALSPEC_ONLY)) - { - pParentObj = dynamicCast(pParent, Object); - objAddChild(pParentObj, &pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object); - } - else - { - pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object.pParent = NULL; - } - - if ((pRmhalspecowner = dynamicCast(pParent, RmHalspecOwner)) == NULL) - pRmhalspecowner = objFindAncestorOfType(RmHalspecOwner, pParent); - NV_ASSERT_OR_RETURN(pRmhalspecowner != NULL, NV_ERR_INVALID_ARGUMENT); - - __nvoc_init_OBJGPUMON(pThis, pRmhalspecowner); - status = __nvoc_ctor_OBJGPUMON(pThis, pRmhalspecowner); - if (status != NV_OK) goto __nvoc_objCreate_OBJGPUMON_cleanup; - - // Assignment has no effect if NVOC_OBJ_CREATE_FLAGS_IN_PLACE_CONSTRUCT is set. - *ppThis = pThis; - - return NV_OK; - -__nvoc_objCreate_OBJGPUMON_cleanup: - - // Unlink the child from the parent if it was linked above. - if (pParentObj != NULL) - objRemoveChild(pParentObj, &pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object); - - // Do not call destructors here since the constructor already called them. - if (createFlags & NVOC_OBJ_CREATE_FLAGS_IN_PLACE_CONSTRUCT) - portMemSet(pThis, 0, sizeof(OBJGPUMON)); - else - { - portMemFree(pThis); - *ppThis = NULL; - } - - // coverity[leaked_storage:FALSE] - return status; -} - -NV_STATUS __nvoc_objCreateDynamic_OBJGPUMON(OBJGPUMON **ppThis, Dynamic *pParent, NvU32 createFlags, va_list args) { - NV_STATUS status; - - status = __nvoc_objCreate_OBJGPUMON(ppThis, pParent, createFlags); - - return status; -} - diff --git a/src/nvidia/generated/g_objgpumon_nvoc.h b/src/nvidia/generated/g_objgpumon_nvoc.h deleted file mode 100644 index a296a58eb1..0000000000 --- a/src/nvidia/generated/g_objgpumon_nvoc.h +++ /dev/null @@ -1,252 +0,0 @@ - -#ifndef _G_OBJGPUMON_NVOC_H_ -#define _G_OBJGPUMON_NVOC_H_ -#include "nvoc/runtime.h" - -// Version of generated metadata structures -#ifdef NVOC_METADATA_VERSION -#undef NVOC_METADATA_VERSION -#endif -#define NVOC_METADATA_VERSION 0 - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * SPDX-FileCopyrightText: Copyright (c) 2014-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. - * SPDX-License-Identifier: MIT - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#pragma once -#include "g_objgpumon_nvoc.h" - -#ifndef OBJGPUMON_H -#define OBJGPUMON_H - -/****************** Resource Manager Defines and Structures *****************\ -* * -* Defines and structures used for the Gpumon Object. * -* * -\****************************************************************************/ - -#include "gpu/gpu.h" -#include "gpu/eng_state.h" -#include "kernel/gpu/fifo/kernel_fifo.h" - -#include "ctrl/ctrl2080/ctrl2080perf.h" - - - -// Private field names are wrapped in PRIVATE_FIELD, which does nothing for -// the matching C source file, but causes diagnostics to be issued if another -// source file references the field. -#ifdef NVOC_OBJGPUMON_H_PRIVATE_ACCESS_ALLOWED -#define PRIVATE_FIELD(x) x -#else -#define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) -#endif - - -struct OBJGPUMON { - - // Metadata - const struct NVOC_RTTI *__nvoc_rtti; - - // Parent (i.e. superclass or base class) object pointers - struct OBJENGSTATE __nvoc_base_OBJENGSTATE; - - // Ancestor object pointers for `staticCast` feature - struct Object *__nvoc_pbase_Object; // obj super^2 - struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super - struct OBJGPUMON *__nvoc_pbase_OBJGPUMON; // gpumon - - // Vtable with 14 per-object function pointers - NV_STATUS (*__gpumonConstructEngine__)(struct OBJGPU *, struct OBJGPUMON * /*this*/, ENGDESCRIPTOR); // virtual inherited (engstate) base (engstate) - void (*__gpumonInitMissing__)(struct OBJGPU *, struct OBJGPUMON * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__gpumonStatePreInitLocked__)(struct OBJGPU *, struct OBJGPUMON * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__gpumonStatePreInitUnlocked__)(struct OBJGPU *, struct OBJGPUMON * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__gpumonStateInitLocked__)(struct OBJGPU *, struct OBJGPUMON * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__gpumonStateInitUnlocked__)(struct OBJGPU *, struct OBJGPUMON * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__gpumonStatePreLoad__)(struct OBJGPU *, struct OBJGPUMON * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__gpumonStateLoad__)(struct OBJGPU *, struct OBJGPUMON * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__gpumonStatePostLoad__)(struct OBJGPU *, struct OBJGPUMON * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__gpumonStatePreUnload__)(struct OBJGPU *, struct OBJGPUMON * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__gpumonStateUnload__)(struct OBJGPU *, struct OBJGPUMON * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__gpumonStatePostUnload__)(struct OBJGPU *, struct OBJGPUMON * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - void (*__gpumonStateDestroy__)(struct OBJGPU *, struct OBJGPUMON * /*this*/); // virtual inherited (engstate) base (engstate) - NvBool (*__gpumonIsPresent__)(struct OBJGPU *, struct OBJGPUMON * /*this*/); // virtual inherited (engstate) base (engstate) -}; - -#ifndef __NVOC_CLASS_OBJGPUMON_TYPEDEF__ -#define __NVOC_CLASS_OBJGPUMON_TYPEDEF__ -typedef struct OBJGPUMON OBJGPUMON; -#endif /* __NVOC_CLASS_OBJGPUMON_TYPEDEF__ */ - -#ifndef __nvoc_class_id_OBJGPUMON -#define __nvoc_class_id_OBJGPUMON 0x2b424b -#endif /* __nvoc_class_id_OBJGPUMON */ - -// Casting support -extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGPUMON; - -#define __staticCast_OBJGPUMON(pThis) \ - ((pThis)->__nvoc_pbase_OBJGPUMON) - -#ifdef __nvoc_objgpumon_h_disabled -#define __dynamicCast_OBJGPUMON(pThis) ((OBJGPUMON*)NULL) -#else //__nvoc_objgpumon_h_disabled -#define __dynamicCast_OBJGPUMON(pThis) \ - ((OBJGPUMON*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJGPUMON))) -#endif //__nvoc_objgpumon_h_disabled - -// Property macros -#define PDB_PROP_GPUMON_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. -#define PDB_PROP_GPUMON_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING - -NV_STATUS __nvoc_objCreateDynamic_OBJGPUMON(OBJGPUMON**, Dynamic*, NvU32, va_list); - -NV_STATUS __nvoc_objCreate_OBJGPUMON(OBJGPUMON**, Dynamic*, NvU32); -#define __objCreate_OBJGPUMON(ppNewObj, pParent, createFlags) \ - __nvoc_objCreate_OBJGPUMON((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) - - -// Wrapper macros -#define gpumonConstructEngine_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ -#define gpumonConstructEngine(pGpu, pEngstate, arg3) gpumonConstructEngine_DISPATCH(pGpu, pEngstate, arg3) -#define gpumonInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ -#define gpumonInitMissing(pGpu, pEngstate) gpumonInitMissing_DISPATCH(pGpu, pEngstate) -#define gpumonStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ -#define gpumonStatePreInitLocked(pGpu, pEngstate) gpumonStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define gpumonStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ -#define gpumonStatePreInitUnlocked(pGpu, pEngstate) gpumonStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define gpumonStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ -#define gpumonStateInitLocked(pGpu, pEngstate) gpumonStateInitLocked_DISPATCH(pGpu, pEngstate) -#define gpumonStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ -#define gpumonStateInitUnlocked(pGpu, pEngstate) gpumonStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define gpumonStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ -#define gpumonStatePreLoad(pGpu, pEngstate, arg3) gpumonStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define gpumonStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ -#define gpumonStateLoad(pGpu, pEngstate, arg3) gpumonStateLoad_DISPATCH(pGpu, pEngstate, arg3) -#define gpumonStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ -#define gpumonStatePostLoad(pGpu, pEngstate, arg3) gpumonStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define gpumonStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ -#define gpumonStatePreUnload(pGpu, pEngstate, arg3) gpumonStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define gpumonStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ -#define gpumonStateUnload(pGpu, pEngstate, arg3) gpumonStateUnload_DISPATCH(pGpu, pEngstate, arg3) -#define gpumonStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ -#define gpumonStatePostUnload(pGpu, pEngstate, arg3) gpumonStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define gpumonStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ -#define gpumonStateDestroy(pGpu, pEngstate) gpumonStateDestroy_DISPATCH(pGpu, pEngstate) -#define gpumonIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ -#define gpumonIsPresent(pGpu, pEngstate) gpumonIsPresent_DISPATCH(pGpu, pEngstate) - -// Dispatch functions -static inline NV_STATUS gpumonConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate, ENGDESCRIPTOR arg3) { - return pEngstate->__gpumonConstructEngine__(pGpu, pEngstate, arg3); -} - -static inline void gpumonInitMissing_DISPATCH(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate) { - pEngstate->__gpumonInitMissing__(pGpu, pEngstate); -} - -static inline NV_STATUS gpumonStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate) { - return pEngstate->__gpumonStatePreInitLocked__(pGpu, pEngstate); -} - -static inline NV_STATUS gpumonStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate) { - return pEngstate->__gpumonStatePreInitUnlocked__(pGpu, pEngstate); -} - -static inline NV_STATUS gpumonStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate) { - return pEngstate->__gpumonStateInitLocked__(pGpu, pEngstate); -} - -static inline NV_STATUS gpumonStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate) { - return pEngstate->__gpumonStateInitUnlocked__(pGpu, pEngstate); -} - -static inline NV_STATUS gpumonStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { - return pEngstate->__gpumonStatePreLoad__(pGpu, pEngstate, arg3); -} - -static inline NV_STATUS gpumonStateLoad_DISPATCH(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { - return pEngstate->__gpumonStateLoad__(pGpu, pEngstate, arg3); -} - -static inline NV_STATUS gpumonStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { - return pEngstate->__gpumonStatePostLoad__(pGpu, pEngstate, arg3); -} - -static inline NV_STATUS gpumonStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { - return pEngstate->__gpumonStatePreUnload__(pGpu, pEngstate, arg3); -} - -static inline NV_STATUS gpumonStateUnload_DISPATCH(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { - return pEngstate->__gpumonStateUnload__(pGpu, pEngstate, arg3); -} - -static inline NV_STATUS gpumonStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate, NvU32 arg3) { - return pEngstate->__gpumonStatePostUnload__(pGpu, pEngstate, arg3); -} - -static inline void gpumonStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate) { - pEngstate->__gpumonStateDestroy__(pGpu, pEngstate); -} - -static inline NvBool gpumonIsPresent_DISPATCH(struct OBJGPU *pGpu, struct OBJGPUMON *pEngstate) { - return pEngstate->__gpumonIsPresent__(pGpu, pEngstate); -} - -void gpumonGetContextProcessInfo_GM107(struct OBJGPU *pGpu, struct OBJGPUMON *pGpumon, RM_ENGINE_TYPE rmEngineTypeBegin, RM_ENGINE_TYPE rmEngineTypeEnd, NvU32 context, NvU32 *pProcID, NvU32 *pSubProcessID, const char **pSubProcessName); - - -#ifdef __nvoc_objgpumon_h_disabled -static inline void gpumonGetContextProcessInfo(struct OBJGPU *pGpu, struct OBJGPUMON *pGpumon, RM_ENGINE_TYPE rmEngineTypeBegin, RM_ENGINE_TYPE rmEngineTypeEnd, NvU32 context, NvU32 *pProcID, NvU32 *pSubProcessID, const char **pSubProcessName) { - NV_ASSERT_FAILED_PRECOMP("OBJGPUMON was disabled!"); -} -#else //__nvoc_objgpumon_h_disabled -#define gpumonGetContextProcessInfo(pGpu, pGpumon, rmEngineTypeBegin, rmEngineTypeEnd, context, pProcID, pSubProcessID, pSubProcessName) gpumonGetContextProcessInfo_GM107(pGpu, pGpumon, rmEngineTypeBegin, rmEngineTypeEnd, context, pProcID, pSubProcessID, pSubProcessName) -#endif //__nvoc_objgpumon_h_disabled - -#define gpumonGetContextProcessInfo_HAL(pGpu, pGpumon, rmEngineTypeBegin, rmEngineTypeEnd, context, pProcID, pSubProcessID, pSubProcessName) gpumonGetContextProcessInfo(pGpu, pGpumon, rmEngineTypeBegin, rmEngineTypeEnd, context, pProcID, pSubProcessID, pSubProcessName) - -NV_STATUS gpumonGetPerfmonUtilSamples_IMPL(struct OBJGPU *pGpu, struct OBJGPUMON *pGpumon, NV2080_CTRL_PERF_GPUMON_PERFMON_UTIL_SAMPLE *arg3, NvU32 arg4, NvU32 *arg5); - -#ifdef __nvoc_objgpumon_h_disabled -static inline NV_STATUS gpumonGetPerfmonUtilSamples(struct OBJGPU *pGpu, struct OBJGPUMON *pGpumon, NV2080_CTRL_PERF_GPUMON_PERFMON_UTIL_SAMPLE *arg3, NvU32 arg4, NvU32 *arg5) { - NV_ASSERT_FAILED_PRECOMP("OBJGPUMON was disabled!"); - return NV_ERR_NOT_SUPPORTED; -} -#else //__nvoc_objgpumon_h_disabled -#define gpumonGetPerfmonUtilSamples(pGpu, pGpumon, arg3, arg4, arg5) gpumonGetPerfmonUtilSamples_IMPL(pGpu, pGpumon, arg3, arg4, arg5) -#endif //__nvoc_objgpumon_h_disabled - -#undef PRIVATE_FIELD - - -#endif //OBJGPUMON_H - -#ifdef __cplusplus -} // extern "C" -#endif - -#endif // _G_OBJGPUMON_NVOC_H_ diff --git a/src/nvidia/generated/g_objsweng_nvoc.c b/src/nvidia/generated/g_objsweng_nvoc.c index e271aae394..2d6b8c2a69 100644 --- a/src/nvidia/generated/g_objsweng_nvoc.c +++ b/src/nvidia/generated/g_objsweng_nvoc.c @@ -66,78 +66,96 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJSWENG = /*pExportInfo=*/ &__nvoc_export_info_OBJSWENG }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_OBJSWENG_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pSweng, ENGDESCRIPTOR arg3); // this + // 1 down-thunk(s) defined to bridge methods in OBJSWENG from superclasses // swengConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_OBJSWENG_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pSweng, ENGDESCRIPTOR arg3) { +NV_STATUS __nvoc_down_thunk_OBJSWENG_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pSweng, ENGDESCRIPTOR arg3) { return swengConstructEngine(pGpu, (struct OBJSWENG *)(((unsigned char *) pSweng) - __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset), arg3); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_swengInitMissing(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePreInitLocked(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePreInitUnlocked(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStateInitLocked(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStateInitUnlocked(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePreLoad(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStateLoad(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePostLoad(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePreUnload(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStateUnload(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePostUnload(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3); // this +void __nvoc_up_thunk_OBJENGSTATE_swengStateDestroy(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_swengIsPresent(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate); // this + // 13 up-thunk(s) defined to bridge methods in OBJSWENG to superclasses // swengInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_swengInitMissing(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_swengInitMissing(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset)); } // swengStatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePreInitLocked(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePreInitLocked(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate) { return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset)); } // swengStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePreInitUnlocked(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePreInitUnlocked(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset)); } // swengStateInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStateInitLocked(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStateInitLocked(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate) { return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset)); } // swengStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStateInitUnlocked(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStateInitUnlocked(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset)); } // swengStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePreLoad(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePreLoad(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset), arg3); } // swengStateLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStateLoad(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStateLoad(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset), arg3); } // swengStatePostLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePostLoad(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePostLoad(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset), arg3); } // swengStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePreUnload(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePreUnload(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset), arg3); } // swengStateUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStateUnload(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStateUnload(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset), arg3); } // swengStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePostUnload(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swengStatePostUnload(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset), arg3); } // swengStateDestroy: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_swengStateDestroy(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_swengStateDestroy(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate) { engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset)); } // swengIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_swengIsPresent(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_swengIsPresent(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJSWENG_OBJENGSTATE.offset)); } @@ -175,56 +193,47 @@ NV_STATUS __nvoc_ctor_OBJSWENG(OBJSWENG *pThis) { // Vtable initialization static void __nvoc_init_funcTable_OBJSWENG_1(OBJSWENG *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // swengConstructEngine -- virtual override (engstate) base (engstate) - pThis->__swengConstructEngine__ = &swengConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_OBJSWENG_engstateConstructEngine; - - // swengInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__swengInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_swengInitMissing; - - // swengStatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__swengStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_swengStatePreInitLocked; - - // swengStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__swengStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_swengStatePreInitUnlocked; - - // swengStateInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__swengStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_swengStateInitLocked; - - // swengStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__swengStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_swengStateInitUnlocked; - - // swengStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__swengStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_swengStatePreLoad; - - // swengStateLoad -- virtual inherited (engstate) base (engstate) - pThis->__swengStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_swengStateLoad; - - // swengStatePostLoad -- virtual inherited (engstate) base (engstate) - pThis->__swengStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_swengStatePostLoad; - - // swengStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__swengStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_swengStatePreUnload; - - // swengStateUnload -- virtual inherited (engstate) base (engstate) - pThis->__swengStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_swengStateUnload; - - // swengStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__swengStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_swengStatePostUnload; - - // swengStateDestroy -- virtual inherited (engstate) base (engstate) - pThis->__swengStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_swengStateDestroy; - - // swengIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__swengIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_swengIsPresent; -} // End __nvoc_init_funcTable_OBJSWENG_1 with approximately 15 basic block(s). +} // End __nvoc_init_funcTable_OBJSWENG_1 // Initialize vtable(s) for 14 virtual method(s). void __nvoc_init_funcTable_OBJSWENG(OBJSWENG *pThis) { - // Initialize vtable(s) with 14 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__OBJSWENG vtable = { + .__swengConstructEngine__ = &swengConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_OBJSWENG_engstateConstructEngine, // virtual + .__swengInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_swengInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__swengStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_swengStatePreInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__swengStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_swengStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__swengStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_swengStateInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &engstateStateInitLocked_IMPL, // virtual + .__swengStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_swengStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__swengStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_swengStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__swengStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_swengStateLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &engstateStateLoad_IMPL, // virtual + .__swengStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_swengStatePostLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL, // virtual + .__swengStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_swengStatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__swengStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_swengStateUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &engstateStateUnload_IMPL, // virtual + .__swengStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_swengStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__swengStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_swengStateDestroy, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &engstateStateDestroy_IMPL, // virtual + .__swengIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_swengIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_vtable = &vtable; // (sweng) this __nvoc_init_funcTable_OBJSWENG_1(pThis); } diff --git a/src/nvidia/generated/g_objsweng_nvoc.h b/src/nvidia/generated/g_objsweng_nvoc.h index 53a74fd6ee..f2ae0f35f7 100644 --- a/src/nvidia/generated/g_objsweng_nvoc.h +++ b/src/nvidia/generated/g_objsweng_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -64,10 +64,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__OBJSWENG; + + struct OBJSWENG { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__OBJSWENG *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -76,8 +81,13 @@ struct OBJSWENG { struct Object *__nvoc_pbase_Object; // obj super^2 struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct OBJSWENG *__nvoc_pbase_OBJSWENG; // sweng +}; + + +// Metadata including vtable with 14 function pointers plus superclass metadata +struct NVOC_VTABLE__OBJSWENG { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers - // Vtable with 14 per-object function pointers NV_STATUS (*__swengConstructEngine__)(struct OBJGPU *, struct OBJSWENG * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) void (*__swengInitMissing__)(struct OBJGPU *, struct OBJSWENG * /*this*/); // virtual inherited (engstate) base (engstate) NV_STATUS (*__swengStatePreInitLocked__)(struct OBJGPU *, struct OBJSWENG * /*this*/); // virtual inherited (engstate) base (engstate) @@ -128,90 +138,90 @@ NV_STATUS __nvoc_objCreate_OBJSWENG(OBJSWENG**, Dynamic*, NvU32); // Wrapper macros -#define swengConstructEngine_FNPTR(pSweng) pSweng->__swengConstructEngine__ +#define swengConstructEngine_FNPTR(pSweng) pSweng->__nvoc_vtable->__swengConstructEngine__ #define swengConstructEngine(pGpu, pSweng, arg3) swengConstructEngine_DISPATCH(pGpu, pSweng, arg3) -#define swengInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define swengInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define swengInitMissing(pGpu, pEngstate) swengInitMissing_DISPATCH(pGpu, pEngstate) -#define swengStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define swengStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define swengStatePreInitLocked(pGpu, pEngstate) swengStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define swengStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define swengStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define swengStatePreInitUnlocked(pGpu, pEngstate) swengStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define swengStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define swengStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitLocked__ #define swengStateInitLocked(pGpu, pEngstate) swengStateInitLocked_DISPATCH(pGpu, pEngstate) -#define swengStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define swengStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define swengStateInitUnlocked(pGpu, pEngstate) swengStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define swengStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define swengStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define swengStatePreLoad(pGpu, pEngstate, arg3) swengStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define swengStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define swengStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateLoad__ #define swengStateLoad(pGpu, pEngstate, arg3) swengStateLoad_DISPATCH(pGpu, pEngstate, arg3) -#define swengStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define swengStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostLoad__ #define swengStatePostLoad(pGpu, pEngstate, arg3) swengStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define swengStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define swengStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define swengStatePreUnload(pGpu, pEngstate, arg3) swengStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define swengStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define swengStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateUnload__ #define swengStateUnload(pGpu, pEngstate, arg3) swengStateUnload_DISPATCH(pGpu, pEngstate, arg3) -#define swengStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define swengStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define swengStatePostUnload(pGpu, pEngstate, arg3) swengStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define swengStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define swengStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateDestroy__ #define swengStateDestroy(pGpu, pEngstate) swengStateDestroy_DISPATCH(pGpu, pEngstate) -#define swengIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define swengIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define swengIsPresent(pGpu, pEngstate) swengIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS swengConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct OBJSWENG *pSweng, ENGDESCRIPTOR arg3) { - return pSweng->__swengConstructEngine__(pGpu, pSweng, arg3); + return pSweng->__nvoc_vtable->__swengConstructEngine__(pGpu, pSweng, arg3); } static inline void swengInitMissing_DISPATCH(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate) { - pEngstate->__swengInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__swengInitMissing__(pGpu, pEngstate); } static inline NV_STATUS swengStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate) { - return pEngstate->__swengStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__swengStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS swengStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate) { - return pEngstate->__swengStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__swengStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS swengStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate) { - return pEngstate->__swengStateInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__swengStateInitLocked__(pGpu, pEngstate); } static inline NV_STATUS swengStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate) { - return pEngstate->__swengStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__swengStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS swengStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { - return pEngstate->__swengStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__swengStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS swengStateLoad_DISPATCH(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { - return pEngstate->__swengStateLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__swengStateLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS swengStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { - return pEngstate->__swengStatePostLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__swengStatePostLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS swengStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { - return pEngstate->__swengStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__swengStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS swengStateUnload_DISPATCH(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { - return pEngstate->__swengStateUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__swengStateUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS swengStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate, NvU32 arg3) { - return pEngstate->__swengStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__swengStatePostUnload__(pGpu, pEngstate, arg3); } static inline void swengStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate) { - pEngstate->__swengStateDestroy__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__swengStateDestroy__(pGpu, pEngstate); } static inline NvBool swengIsPresent_DISPATCH(struct OBJGPU *pGpu, struct OBJSWENG *pEngstate) { - return pEngstate->__swengIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__swengIsPresent__(pGpu, pEngstate); } NV_STATUS swengConstructEngine_IMPL(struct OBJGPU *pGpu, struct OBJSWENG *pSweng, ENGDESCRIPTOR arg3); diff --git a/src/nvidia/generated/g_objtmr_nvoc.c b/src/nvidia/generated/g_objtmr_nvoc.c index 4ac34e11d0..6bd3994f65 100644 --- a/src/nvidia/generated/g_objtmr_nvoc.c +++ b/src/nvidia/generated/g_objtmr_nvoc.c @@ -75,98 +75,120 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJTMR = /*pExportInfo=*/ &__nvoc_export_info_OBJTMR }; +// Down-thunk(s) to bridge methods from ancestors (if any) +void __nvoc_down_thunk_OBJTMR_intrservRegisterIntrService(OBJGPU *pGpu, struct IntrService *pTmr, IntrServiceRecord pRecords[175]); // this +NvBool __nvoc_down_thunk_OBJTMR_intrservClearInterrupt(OBJGPU *pGpu, struct IntrService *pTmr, IntrServiceClearInterruptArguments *pParams); // this +NvU32 __nvoc_down_thunk_OBJTMR_intrservServiceInterrupt(OBJGPU *pGpu, struct IntrService *pTmr, IntrServiceServiceInterruptArguments *pParams); // this +NV_STATUS __nvoc_down_thunk_OBJTMR_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pTmr, ENGDESCRIPTOR arg3); // this +NV_STATUS __nvoc_down_thunk_OBJTMR_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pTmr); // this +NV_STATUS __nvoc_down_thunk_OBJTMR_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pTmr); // this +NV_STATUS __nvoc_down_thunk_OBJTMR_engstateStateInitUnlocked(OBJGPU *pGpu, struct OBJENGSTATE *pTmr); // this +NV_STATUS __nvoc_down_thunk_OBJTMR_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pTmr, NvU32 arg3); // this +NV_STATUS __nvoc_down_thunk_OBJTMR_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pTmr, NvU32 arg3); // this +void __nvoc_down_thunk_OBJTMR_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pTmr); // this + // 10 down-thunk(s) defined to bridge methods in OBJTMR from superclasses // tmrRegisterIntrService: virtual override (intrserv) base (intrserv) -static void __nvoc_down_thunk_OBJTMR_intrservRegisterIntrService(OBJGPU *pGpu, struct IntrService *pTmr, IntrServiceRecord pRecords[175]) { +void __nvoc_down_thunk_OBJTMR_intrservRegisterIntrService(OBJGPU *pGpu, struct IntrService *pTmr, IntrServiceRecord pRecords[175]) { tmrRegisterIntrService(pGpu, (struct OBJTMR *)(((unsigned char *) pTmr) - __nvoc_rtti_OBJTMR_IntrService.offset), pRecords); } // tmrClearInterrupt: virtual override (intrserv) base (intrserv) -static NvBool __nvoc_down_thunk_OBJTMR_intrservClearInterrupt(OBJGPU *pGpu, struct IntrService *pTmr, IntrServiceClearInterruptArguments *pParams) { +NvBool __nvoc_down_thunk_OBJTMR_intrservClearInterrupt(OBJGPU *pGpu, struct IntrService *pTmr, IntrServiceClearInterruptArguments *pParams) { return tmrClearInterrupt(pGpu, (struct OBJTMR *)(((unsigned char *) pTmr) - __nvoc_rtti_OBJTMR_IntrService.offset), pParams); } // tmrServiceInterrupt: virtual halified (3 hals) override (intrserv) base (intrserv) body -static NvU32 __nvoc_down_thunk_OBJTMR_intrservServiceInterrupt(OBJGPU *pGpu, struct IntrService *pTmr, IntrServiceServiceInterruptArguments *pParams) { +NvU32 __nvoc_down_thunk_OBJTMR_intrservServiceInterrupt(OBJGPU *pGpu, struct IntrService *pTmr, IntrServiceServiceInterruptArguments *pParams) { return tmrServiceInterrupt(pGpu, (struct OBJTMR *)(((unsigned char *) pTmr) - __nvoc_rtti_OBJTMR_IntrService.offset), pParams); } // tmrConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_OBJTMR_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pTmr, ENGDESCRIPTOR arg3) { +NV_STATUS __nvoc_down_thunk_OBJTMR_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pTmr, ENGDESCRIPTOR arg3) { return tmrConstructEngine(pGpu, (struct OBJTMR *)(((unsigned char *) pTmr) - __nvoc_rtti_OBJTMR_OBJENGSTATE.offset), arg3); } // tmrStatePreInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_OBJTMR_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pTmr) { +NV_STATUS __nvoc_down_thunk_OBJTMR_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pTmr) { return tmrStatePreInitLocked(pGpu, (struct OBJTMR *)(((unsigned char *) pTmr) - __nvoc_rtti_OBJTMR_OBJENGSTATE.offset)); } // tmrStateInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_OBJTMR_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pTmr) { +NV_STATUS __nvoc_down_thunk_OBJTMR_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pTmr) { return tmrStateInitLocked(pGpu, (struct OBJTMR *)(((unsigned char *) pTmr) - __nvoc_rtti_OBJTMR_OBJENGSTATE.offset)); } // tmrStateInitUnlocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_OBJTMR_engstateStateInitUnlocked(OBJGPU *pGpu, struct OBJENGSTATE *pTmr) { +NV_STATUS __nvoc_down_thunk_OBJTMR_engstateStateInitUnlocked(OBJGPU *pGpu, struct OBJENGSTATE *pTmr) { return tmrStateInitUnlocked(pGpu, (struct OBJTMR *)(((unsigned char *) pTmr) - __nvoc_rtti_OBJTMR_OBJENGSTATE.offset)); } // tmrStateLoad: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_OBJTMR_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pTmr, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_OBJTMR_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pTmr, NvU32 arg3) { return tmrStateLoad(pGpu, (struct OBJTMR *)(((unsigned char *) pTmr) - __nvoc_rtti_OBJTMR_OBJENGSTATE.offset), arg3); } // tmrStateUnload: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_OBJTMR_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pTmr, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_OBJTMR_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pTmr, NvU32 arg3) { return tmrStateUnload(pGpu, (struct OBJTMR *)(((unsigned char *) pTmr) - __nvoc_rtti_OBJTMR_OBJENGSTATE.offset), arg3); } // tmrStateDestroy: virtual override (engstate) base (engstate) -static void __nvoc_down_thunk_OBJTMR_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pTmr) { +void __nvoc_down_thunk_OBJTMR_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pTmr) { tmrStateDestroy(pGpu, (struct OBJTMR *)(((unsigned char *) pTmr) - __nvoc_rtti_OBJTMR_OBJENGSTATE.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_tmrInitMissing(struct OBJGPU *pGpu, struct OBJTMR *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_tmrStatePreInitUnlocked(struct OBJGPU *pGpu, struct OBJTMR *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_tmrStatePreLoad(struct OBJGPU *pGpu, struct OBJTMR *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_tmrStatePostLoad(struct OBJGPU *pGpu, struct OBJTMR *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_tmrStatePreUnload(struct OBJGPU *pGpu, struct OBJTMR *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_tmrStatePostUnload(struct OBJGPU *pGpu, struct OBJTMR *pEngstate, NvU32 arg3); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_tmrIsPresent(struct OBJGPU *pGpu, struct OBJTMR *pEngstate); // this +NV_STATUS __nvoc_up_thunk_IntrService_tmrServiceNotificationInterrupt(OBJGPU *pGpu, struct OBJTMR *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams); // this + // 8 up-thunk(s) defined to bridge methods in OBJTMR to superclasses // tmrInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_tmrInitMissing(struct OBJGPU *pGpu, struct OBJTMR *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_tmrInitMissing(struct OBJGPU *pGpu, struct OBJTMR *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset)); } // tmrStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_tmrStatePreInitUnlocked(struct OBJGPU *pGpu, struct OBJTMR *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_tmrStatePreInitUnlocked(struct OBJGPU *pGpu, struct OBJTMR *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset)); } // tmrStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_tmrStatePreLoad(struct OBJGPU *pGpu, struct OBJTMR *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_tmrStatePreLoad(struct OBJGPU *pGpu, struct OBJTMR *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset), arg3); } // tmrStatePostLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_tmrStatePostLoad(struct OBJGPU *pGpu, struct OBJTMR *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_tmrStatePostLoad(struct OBJGPU *pGpu, struct OBJTMR *pEngstate, NvU32 arg3) { return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset), arg3); } // tmrStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_tmrStatePreUnload(struct OBJGPU *pGpu, struct OBJTMR *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_tmrStatePreUnload(struct OBJGPU *pGpu, struct OBJTMR *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset), arg3); } // tmrStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_tmrStatePostUnload(struct OBJGPU *pGpu, struct OBJTMR *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_tmrStatePostUnload(struct OBJGPU *pGpu, struct OBJTMR *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset), arg3); } // tmrIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_tmrIsPresent(struct OBJGPU *pGpu, struct OBJTMR *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_tmrIsPresent(struct OBJGPU *pGpu, struct OBJTMR *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJTMR_OBJENGSTATE.offset)); } // tmrServiceNotificationInterrupt: virtual inherited (intrserv) base (intrserv) -static NV_STATUS __nvoc_up_thunk_IntrService_tmrServiceNotificationInterrupt(OBJGPU *pGpu, struct OBJTMR *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { +NV_STATUS __nvoc_up_thunk_IntrService_tmrServiceNotificationInterrupt(OBJGPU *pGpu, struct OBJTMR *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { return intrservServiceNotificationInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_OBJTMR_IntrService.offset), pParams); } @@ -201,30 +223,30 @@ void __nvoc_init_dataField_OBJTMR(OBJTMR *pThis, RmHalspecOwner *pRmhalspecowner // NVOC Property Hal field -- PDB_PROP_TMR_USE_COUNTDOWN_TIMER_FOR_RM_CALLBACKS if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_TMR_USE_COUNTDOWN_TIMER_FOR_RM_CALLBACKS, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_TMR_USE_COUNTDOWN_TIMER_FOR_RM_CALLBACKS, NV_TRUE); } // NVOC Property Hal field -- PDB_PROP_TMR_ALARM_INTR_REMOVED_FROM_PMC_TREE if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_TMR_ALARM_INTR_REMOVED_FROM_PMC_TREE, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_TMR_ALARM_INTR_REMOVED_FROM_PMC_TREE, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_TMR_ALARM_INTR_REMOVED_FROM_PMC_TREE, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_TMR_ALARM_INTR_REMOVED_FROM_PMC_TREE, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_TMR_USE_OS_TIMER_FOR_CALLBACKS if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ { - pThis->setProperty(pThis, PDB_PROP_TMR_USE_OS_TIMER_FOR_CALLBACKS, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_TMR_USE_OS_TIMER_FOR_CALLBACKS, NV_TRUE); } else if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { // default { - pThis->setProperty(pThis, PDB_PROP_TMR_USE_OS_TIMER_FOR_CALLBACKS, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_TMR_USE_OS_TIMER_FOR_CALLBACKS, NV_FALSE); } } pThis->setProperty(pThis, PDB_PROP_TMR_USE_PTIMER_FOR_OSTIMER_CALLBACKS, (0)); @@ -233,23 +255,23 @@ void __nvoc_init_dataField_OBJTMR(OBJTMR *pThis, RmHalspecOwner *pRmhalspecowner // NVOC Property Hal field -- PDB_PROP_TMR_USE_SECOND_COUNTDOWN_TIMER_FOR_SWRL if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_TMR_USE_SECOND_COUNTDOWN_TIMER_FOR_SWRL, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_TMR_USE_SECOND_COUNTDOWN_TIMER_FOR_SWRL, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_TMR_USE_SECOND_COUNTDOWN_TIMER_FOR_SWRL, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_TMR_USE_SECOND_COUNTDOWN_TIMER_FOR_SWRL, NV_FALSE); } // NVOC Property Hal field -- PDB_PROP_TMR_WAR_FOR_BUG_4679970_DEF if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xc0000000UL) )) /* ChipHal: GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_TMR_WAR_FOR_BUG_4679970_DEF, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_TMR_WAR_FOR_BUG_4679970_DEF, NV_TRUE); } // default else { - pThis->setProperty(pThis, PDB_PROP_TMR_WAR_FOR_BUG_4679970_DEF, ((NvBool)(0 != 0))); + pThis->setProperty(pThis, PDB_PROP_TMR_WAR_FOR_BUG_4679970_DEF, NV_FALSE); } } @@ -295,14 +317,6 @@ static void __nvoc_init_funcTable_OBJTMR_1(OBJTMR *pThis, RmHalspecOwner *pRmhal pThis->__tmrDelay__ = &tmrDelay_OSTIMER; } - // tmrRegisterIntrService -- virtual override (intrserv) base (intrserv) - pThis->__tmrRegisterIntrService__ = &tmrRegisterIntrService_IMPL; - pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_OBJTMR_intrservRegisterIntrService; - - // tmrClearInterrupt -- virtual override (intrserv) base (intrserv) - pThis->__tmrClearInterrupt__ = &tmrClearInterrupt_IMPL; - pThis->__nvoc_base_IntrService.__intrservClearInterrupt__ = &__nvoc_down_thunk_OBJTMR_intrservClearInterrupt; - // tmrServiceInterrupt -- virtual halified (3 hals) override (intrserv) base (intrserv) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { @@ -319,35 +333,6 @@ static void __nvoc_init_funcTable_OBJTMR_1(OBJTMR *pThis, RmHalspecOwner *pRmhal { pThis->__tmrServiceInterrupt__ = &tmrServiceInterrupt_56cd7a; } - pThis->__nvoc_base_IntrService.__intrservServiceInterrupt__ = &__nvoc_down_thunk_OBJTMR_intrservServiceInterrupt; - - // tmrConstructEngine -- virtual override (engstate) base (engstate) - pThis->__tmrConstructEngine__ = &tmrConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_OBJTMR_engstateConstructEngine; - - // tmrStatePreInitLocked -- virtual override (engstate) base (engstate) - pThis->__tmrStatePreInitLocked__ = &tmrStatePreInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_OBJTMR_engstateStatePreInitLocked; - - // tmrStateInitLocked -- virtual override (engstate) base (engstate) - pThis->__tmrStateInitLocked__ = &tmrStateInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_OBJTMR_engstateStateInitLocked; - - // tmrStateInitUnlocked -- virtual override (engstate) base (engstate) - pThis->__tmrStateInitUnlocked__ = &tmrStateInitUnlocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ = &__nvoc_down_thunk_OBJTMR_engstateStateInitUnlocked; - - // tmrStateLoad -- virtual override (engstate) base (engstate) - pThis->__tmrStateLoad__ = &tmrStateLoad_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_OBJTMR_engstateStateLoad; - - // tmrStateUnload -- virtual override (engstate) base (engstate) - pThis->__tmrStateUnload__ = &tmrStateUnload_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_OBJTMR_engstateStateUnload; - - // tmrStateDestroy -- virtual override (engstate) base (engstate) - pThis->__tmrStateDestroy__ = &tmrStateDestroy_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_OBJTMR_engstateStateDestroy; // tmrSetCurrentTime -- halified (3 hals) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ @@ -435,37 +420,57 @@ static void __nvoc_init_funcTable_OBJTMR_1(OBJTMR *pThis, RmHalspecOwner *pRmhal { pThis->__tmrGetGpuPtimerOffset__ = &tmrGetGpuPtimerOffset_GA100; } - - // tmrInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__tmrInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_tmrInitMissing; - - // tmrStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__tmrStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_tmrStatePreInitUnlocked; - - // tmrStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__tmrStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_tmrStatePreLoad; - - // tmrStatePostLoad -- virtual inherited (engstate) base (engstate) - pThis->__tmrStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_tmrStatePostLoad; - - // tmrStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__tmrStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_tmrStatePreUnload; - - // tmrStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__tmrStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_tmrStatePostUnload; - - // tmrIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__tmrIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_tmrIsPresent; - - // tmrServiceNotificationInterrupt -- virtual inherited (intrserv) base (intrserv) - pThis->__tmrServiceNotificationInterrupt__ = &__nvoc_up_thunk_IntrService_tmrServiceNotificationInterrupt; -} // End __nvoc_init_funcTable_OBJTMR_1 with approximately 49 basic block(s). +} // End __nvoc_init_funcTable_OBJTMR_1 with approximately 22 basic block(s). // Initialize vtable(s) for 27 virtual method(s). void __nvoc_init_funcTable_OBJTMR(OBJTMR *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 27 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__OBJTMR vtable = { + .__tmrRegisterIntrService__ = &tmrRegisterIntrService_IMPL, // virtual override (intrserv) base (intrserv) + .IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_OBJTMR_intrservRegisterIntrService, // virtual + .__tmrClearInterrupt__ = &tmrClearInterrupt_IMPL, // virtual override (intrserv) base (intrserv) + .IntrService.__intrservClearInterrupt__ = &__nvoc_down_thunk_OBJTMR_intrservClearInterrupt, // virtual + .IntrService.__intrservServiceInterrupt__ = &__nvoc_down_thunk_OBJTMR_intrservServiceInterrupt, // virtual + .__tmrConstructEngine__ = &tmrConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_OBJTMR_engstateConstructEngine, // virtual + .__tmrStatePreInitLocked__ = &tmrStatePreInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_down_thunk_OBJTMR_engstateStatePreInitLocked, // virtual + .__tmrStateInitLocked__ = &tmrStateInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_OBJTMR_engstateStateInitLocked, // virtual + .__tmrStateInitUnlocked__ = &tmrStateInitUnlocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &__nvoc_down_thunk_OBJTMR_engstateStateInitUnlocked, // virtual + .__tmrStateLoad__ = &tmrStateLoad_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &__nvoc_down_thunk_OBJTMR_engstateStateLoad, // virtual + .__tmrStateUnload__ = &tmrStateUnload_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &__nvoc_down_thunk_OBJTMR_engstateStateUnload, // virtual + .__tmrStateDestroy__ = &tmrStateDestroy_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_OBJTMR_engstateStateDestroy, // virtual + .__tmrInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_tmrInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__tmrStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_tmrStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__tmrStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_tmrStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__tmrStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_tmrStatePostLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL, // virtual + .__tmrStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_tmrStatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__tmrStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_tmrStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__tmrIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_tmrIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + .__tmrServiceNotificationInterrupt__ = &__nvoc_up_thunk_IntrService_tmrServiceNotificationInterrupt, // virtual inherited (intrserv) base (intrserv) + .IntrService.__intrservServiceNotificationInterrupt__ = &intrservServiceNotificationInterrupt_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_base_IntrService.__nvoc_vtable = &vtable.IntrService; // (intrserv) super + pThis->__nvoc_vtable = &vtable; // (tmr) this + + // Initialize vtable(s) with 10 per-object function pointer(s). __nvoc_init_funcTable_OBJTMR_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_objtmr_nvoc.h b/src/nvidia/generated/g_objtmr_nvoc.h index 6be256bf17..6d1c31d3f5 100644 --- a/src/nvidia/generated/g_objtmr_nvoc.h +++ b/src/nvidia/generated/g_objtmr_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -198,10 +198,15 @@ typedef struct TMR_EVENT_GENERAL_PARAMS { #endif +// Metadata including vtable +struct NVOC_VTABLE__OBJTMR; + + struct OBJTMR { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__OBJTMR *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -213,18 +218,9 @@ struct OBJTMR { struct IntrService *__nvoc_pbase_IntrService; // intrserv super struct OBJTMR *__nvoc_pbase_OBJTMR; // tmr - // Vtable with 27 per-object function pointers + // Vtable with 10 per-object function pointers NV_STATUS (*__tmrDelay__)(struct OBJTMR * /*this*/, NvU32); // halified (2 hals) - void (*__tmrRegisterIntrService__)(OBJGPU *, struct OBJTMR * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) - NvBool (*__tmrClearInterrupt__)(OBJGPU *, struct OBJTMR * /*this*/, IntrServiceClearInterruptArguments *); // virtual override (intrserv) base (intrserv) NvU32 (*__tmrServiceInterrupt__)(OBJGPU *, struct OBJTMR * /*this*/, IntrServiceServiceInterruptArguments *); // virtual halified (3 hals) override (intrserv) base (intrserv) body - NV_STATUS (*__tmrConstructEngine__)(OBJGPU *, struct OBJTMR * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) - NV_STATUS (*__tmrStatePreInitLocked__)(OBJGPU *, struct OBJTMR * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__tmrStateInitLocked__)(OBJGPU *, struct OBJTMR * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__tmrStateInitUnlocked__)(OBJGPU *, struct OBJTMR * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__tmrStateLoad__)(OBJGPU *, struct OBJTMR * /*this*/, NvU32); // virtual override (engstate) base (engstate) - NV_STATUS (*__tmrStateUnload__)(OBJGPU *, struct OBJTMR * /*this*/, NvU32); // virtual override (engstate) base (engstate) - void (*__tmrStateDestroy__)(OBJGPU *, struct OBJTMR * /*this*/); // virtual override (engstate) base (engstate) NV_STATUS (*__tmrSetCurrentTime__)(OBJGPU *, struct OBJTMR * /*this*/); // halified (3 hals) body NvU32 (*__tmrGetTimeLo__)(OBJGPU *, struct OBJTMR * /*this*/); // halified (2 hals) body NvU64 (*__tmrGetTime__)(OBJGPU *, struct OBJTMR * /*this*/); // halified (2 hals) body @@ -233,14 +229,6 @@ struct OBJTMR { NV_STATUS (*__tmrSetCountdown__)(OBJGPU *, struct OBJTMR * /*this*/, NvU32, NvU32, struct THREAD_STATE_NODE *); // halified (2 hals) body NV_STATUS (*__tmrGrTickFreqChange__)(OBJGPU *, struct OBJTMR * /*this*/, NvBool); // halified (2 hals) body NV_STATUS (*__tmrGetGpuPtimerOffset__)(OBJGPU *, struct OBJTMR * /*this*/, NvU32 *, NvU32 *); // halified (2 hals) body - void (*__tmrInitMissing__)(struct OBJGPU *, struct OBJTMR * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__tmrStatePreInitUnlocked__)(struct OBJGPU *, struct OBJTMR * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__tmrStatePreLoad__)(struct OBJGPU *, struct OBJTMR * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__tmrStatePostLoad__)(struct OBJGPU *, struct OBJTMR * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__tmrStatePreUnload__)(struct OBJGPU *, struct OBJTMR * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__tmrStatePostUnload__)(struct OBJGPU *, struct OBJTMR * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) - NvBool (*__tmrIsPresent__)(struct OBJGPU *, struct OBJTMR * /*this*/); // virtual inherited (engstate) base (engstate) - NV_STATUS (*__tmrServiceNotificationInterrupt__)(OBJGPU *, struct OBJTMR * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual inherited (intrserv) base (intrserv) // 7 PDB properties NvBool PDB_PROP_TMR_USE_COUNTDOWN_TIMER_FOR_RM_CALLBACKS; @@ -271,6 +259,31 @@ struct OBJTMR { NvU64 sysTimerOffsetNs; }; + +// Metadata including vtable with 17 function pointers plus superclass metadata +struct NVOC_VTABLE__OBJTMR { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + const struct NVOC_VTABLE__IntrService IntrService; // (intrserv) 4 function pointers + + void (*__tmrRegisterIntrService__)(OBJGPU *, struct OBJTMR * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) + NvBool (*__tmrClearInterrupt__)(OBJGPU *, struct OBJTMR * /*this*/, IntrServiceClearInterruptArguments *); // virtual override (intrserv) base (intrserv) + NV_STATUS (*__tmrConstructEngine__)(OBJGPU *, struct OBJTMR * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__tmrStatePreInitLocked__)(OBJGPU *, struct OBJTMR * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__tmrStateInitLocked__)(OBJGPU *, struct OBJTMR * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__tmrStateInitUnlocked__)(OBJGPU *, struct OBJTMR * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__tmrStateLoad__)(OBJGPU *, struct OBJTMR * /*this*/, NvU32); // virtual override (engstate) base (engstate) + NV_STATUS (*__tmrStateUnload__)(OBJGPU *, struct OBJTMR * /*this*/, NvU32); // virtual override (engstate) base (engstate) + void (*__tmrStateDestroy__)(OBJGPU *, struct OBJTMR * /*this*/); // virtual override (engstate) base (engstate) + void (*__tmrInitMissing__)(struct OBJGPU *, struct OBJTMR * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__tmrStatePreInitUnlocked__)(struct OBJGPU *, struct OBJTMR * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__tmrStatePreLoad__)(struct OBJGPU *, struct OBJTMR * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__tmrStatePostLoad__)(struct OBJGPU *, struct OBJTMR * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__tmrStatePreUnload__)(struct OBJGPU *, struct OBJTMR * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__tmrStatePostUnload__)(struct OBJGPU *, struct OBJTMR * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) + NvBool (*__tmrIsPresent__)(struct OBJGPU *, struct OBJTMR * /*this*/); // virtual inherited (engstate) base (engstate) + NV_STATUS (*__tmrServiceNotificationInterrupt__)(OBJGPU *, struct OBJTMR * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual inherited (intrserv) base (intrserv) +}; + #ifndef __NVOC_CLASS_OBJTMR_TYPEDEF__ #define __NVOC_CLASS_OBJTMR_TYPEDEF__ typedef struct OBJTMR OBJTMR; @@ -322,26 +335,26 @@ NV_STATUS __nvoc_objCreate_OBJTMR(OBJTMR**, Dynamic*, NvU32); #define tmrDelay_FNPTR(pTmr) pTmr->__tmrDelay__ #define tmrDelay(pTmr, arg2) tmrDelay_DISPATCH(pTmr, arg2) #define tmrDelay_HAL(pTmr, arg2) tmrDelay_DISPATCH(pTmr, arg2) -#define tmrRegisterIntrService_FNPTR(pTmr) pTmr->__tmrRegisterIntrService__ +#define tmrRegisterIntrService_FNPTR(pTmr) pTmr->__nvoc_vtable->__tmrRegisterIntrService__ #define tmrRegisterIntrService(pGpu, pTmr, pRecords) tmrRegisterIntrService_DISPATCH(pGpu, pTmr, pRecords) -#define tmrClearInterrupt_FNPTR(pTmr) pTmr->__tmrClearInterrupt__ +#define tmrClearInterrupt_FNPTR(pTmr) pTmr->__nvoc_vtable->__tmrClearInterrupt__ #define tmrClearInterrupt(pGpu, pTmr, pParams) tmrClearInterrupt_DISPATCH(pGpu, pTmr, pParams) #define tmrServiceInterrupt_FNPTR(pTmr) pTmr->__tmrServiceInterrupt__ #define tmrServiceInterrupt(pGpu, pTmr, pParams) tmrServiceInterrupt_DISPATCH(pGpu, pTmr, pParams) #define tmrServiceInterrupt_HAL(pGpu, pTmr, pParams) tmrServiceInterrupt_DISPATCH(pGpu, pTmr, pParams) -#define tmrConstructEngine_FNPTR(pTmr) pTmr->__tmrConstructEngine__ +#define tmrConstructEngine_FNPTR(pTmr) pTmr->__nvoc_vtable->__tmrConstructEngine__ #define tmrConstructEngine(pGpu, pTmr, arg3) tmrConstructEngine_DISPATCH(pGpu, pTmr, arg3) -#define tmrStatePreInitLocked_FNPTR(pTmr) pTmr->__tmrStatePreInitLocked__ +#define tmrStatePreInitLocked_FNPTR(pTmr) pTmr->__nvoc_vtable->__tmrStatePreInitLocked__ #define tmrStatePreInitLocked(pGpu, pTmr) tmrStatePreInitLocked_DISPATCH(pGpu, pTmr) -#define tmrStateInitLocked_FNPTR(pTmr) pTmr->__tmrStateInitLocked__ +#define tmrStateInitLocked_FNPTR(pTmr) pTmr->__nvoc_vtable->__tmrStateInitLocked__ #define tmrStateInitLocked(pGpu, pTmr) tmrStateInitLocked_DISPATCH(pGpu, pTmr) -#define tmrStateInitUnlocked_FNPTR(pTmr) pTmr->__tmrStateInitUnlocked__ +#define tmrStateInitUnlocked_FNPTR(pTmr) pTmr->__nvoc_vtable->__tmrStateInitUnlocked__ #define tmrStateInitUnlocked(pGpu, pTmr) tmrStateInitUnlocked_DISPATCH(pGpu, pTmr) -#define tmrStateLoad_FNPTR(pTmr) pTmr->__tmrStateLoad__ +#define tmrStateLoad_FNPTR(pTmr) pTmr->__nvoc_vtable->__tmrStateLoad__ #define tmrStateLoad(pGpu, pTmr, arg3) tmrStateLoad_DISPATCH(pGpu, pTmr, arg3) -#define tmrStateUnload_FNPTR(pTmr) pTmr->__tmrStateUnload__ +#define tmrStateUnload_FNPTR(pTmr) pTmr->__nvoc_vtable->__tmrStateUnload__ #define tmrStateUnload(pGpu, pTmr, arg3) tmrStateUnload_DISPATCH(pGpu, pTmr, arg3) -#define tmrStateDestroy_FNPTR(pTmr) pTmr->__tmrStateDestroy__ +#define tmrStateDestroy_FNPTR(pTmr) pTmr->__nvoc_vtable->__tmrStateDestroy__ #define tmrStateDestroy(pGpu, pTmr) tmrStateDestroy_DISPATCH(pGpu, pTmr) #define tmrSetCurrentTime_FNPTR(pTmr) pTmr->__tmrSetCurrentTime__ #define tmrSetCurrentTime(pGpu, pTmr) tmrSetCurrentTime_DISPATCH(pGpu, pTmr) @@ -367,21 +380,21 @@ NV_STATUS __nvoc_objCreate_OBJTMR(OBJTMR**, Dynamic*, NvU32); #define tmrGetGpuPtimerOffset_FNPTR(pTmr) pTmr->__tmrGetGpuPtimerOffset__ #define tmrGetGpuPtimerOffset(pGpu, pTmr, arg3, arg4) tmrGetGpuPtimerOffset_DISPATCH(pGpu, pTmr, arg3, arg4) #define tmrGetGpuPtimerOffset_HAL(pGpu, pTmr, arg3, arg4) tmrGetGpuPtimerOffset_DISPATCH(pGpu, pTmr, arg3, arg4) -#define tmrInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define tmrInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define tmrInitMissing(pGpu, pEngstate) tmrInitMissing_DISPATCH(pGpu, pEngstate) -#define tmrStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define tmrStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define tmrStatePreInitUnlocked(pGpu, pEngstate) tmrStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define tmrStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define tmrStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define tmrStatePreLoad(pGpu, pEngstate, arg3) tmrStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define tmrStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define tmrStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostLoad__ #define tmrStatePostLoad(pGpu, pEngstate, arg3) tmrStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define tmrStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define tmrStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define tmrStatePreUnload(pGpu, pEngstate, arg3) tmrStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define tmrStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define tmrStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define tmrStatePostUnload(pGpu, pEngstate, arg3) tmrStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define tmrIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define tmrIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define tmrIsPresent(pGpu, pEngstate) tmrIsPresent_DISPATCH(pGpu, pEngstate) -#define tmrServiceNotificationInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ +#define tmrServiceNotificationInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__nvoc_vtable->__intrservServiceNotificationInterrupt__ #define tmrServiceNotificationInterrupt(pGpu, pIntrService, pParams) tmrServiceNotificationInterrupt_DISPATCH(pGpu, pIntrService, pParams) // Dispatch functions @@ -390,11 +403,11 @@ static inline NV_STATUS tmrDelay_DISPATCH(struct OBJTMR *pTmr, NvU32 arg2) { } static inline void tmrRegisterIntrService_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, IntrServiceRecord pRecords[175]) { - pTmr->__tmrRegisterIntrService__(pGpu, pTmr, pRecords); + pTmr->__nvoc_vtable->__tmrRegisterIntrService__(pGpu, pTmr, pRecords); } static inline NvBool tmrClearInterrupt_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, IntrServiceClearInterruptArguments *pParams) { - return pTmr->__tmrClearInterrupt__(pGpu, pTmr, pParams); + return pTmr->__nvoc_vtable->__tmrClearInterrupt__(pGpu, pTmr, pParams); } static inline NvU32 tmrServiceInterrupt_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, IntrServiceServiceInterruptArguments *pParams) { @@ -402,31 +415,31 @@ static inline NvU32 tmrServiceInterrupt_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pT } static inline NV_STATUS tmrConstructEngine_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, ENGDESCRIPTOR arg3) { - return pTmr->__tmrConstructEngine__(pGpu, pTmr, arg3); + return pTmr->__nvoc_vtable->__tmrConstructEngine__(pGpu, pTmr, arg3); } static inline NV_STATUS tmrStatePreInitLocked_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr) { - return pTmr->__tmrStatePreInitLocked__(pGpu, pTmr); + return pTmr->__nvoc_vtable->__tmrStatePreInitLocked__(pGpu, pTmr); } static inline NV_STATUS tmrStateInitLocked_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr) { - return pTmr->__tmrStateInitLocked__(pGpu, pTmr); + return pTmr->__nvoc_vtable->__tmrStateInitLocked__(pGpu, pTmr); } static inline NV_STATUS tmrStateInitUnlocked_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr) { - return pTmr->__tmrStateInitUnlocked__(pGpu, pTmr); + return pTmr->__nvoc_vtable->__tmrStateInitUnlocked__(pGpu, pTmr); } static inline NV_STATUS tmrStateLoad_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 arg3) { - return pTmr->__tmrStateLoad__(pGpu, pTmr, arg3); + return pTmr->__nvoc_vtable->__tmrStateLoad__(pGpu, pTmr, arg3); } static inline NV_STATUS tmrStateUnload_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 arg3) { - return pTmr->__tmrStateUnload__(pGpu, pTmr, arg3); + return pTmr->__nvoc_vtable->__tmrStateUnload__(pGpu, pTmr, arg3); } static inline void tmrStateDestroy_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr) { - pTmr->__tmrStateDestroy__(pGpu, pTmr); + pTmr->__nvoc_vtable->__tmrStateDestroy__(pGpu, pTmr); } static inline NV_STATUS tmrSetCurrentTime_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pTmr) { @@ -462,35 +475,35 @@ static inline NV_STATUS tmrGetGpuPtimerOffset_DISPATCH(OBJGPU *pGpu, struct OBJT } static inline void tmrInitMissing_DISPATCH(struct OBJGPU *pGpu, struct OBJTMR *pEngstate) { - pEngstate->__tmrInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__tmrInitMissing__(pGpu, pEngstate); } static inline NV_STATUS tmrStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct OBJTMR *pEngstate) { - return pEngstate->__tmrStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__tmrStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS tmrStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct OBJTMR *pEngstate, NvU32 arg3) { - return pEngstate->__tmrStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__tmrStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS tmrStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct OBJTMR *pEngstate, NvU32 arg3) { - return pEngstate->__tmrStatePostLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__tmrStatePostLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS tmrStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct OBJTMR *pEngstate, NvU32 arg3) { - return pEngstate->__tmrStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__tmrStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS tmrStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct OBJTMR *pEngstate, NvU32 arg3) { - return pEngstate->__tmrStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__tmrStatePostUnload__(pGpu, pEngstate, arg3); } static inline NvBool tmrIsPresent_DISPATCH(struct OBJGPU *pGpu, struct OBJTMR *pEngstate) { - return pEngstate->__tmrIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__tmrIsPresent__(pGpu, pEngstate); } static inline NV_STATUS tmrServiceNotificationInterrupt_DISPATCH(OBJGPU *pGpu, struct OBJTMR *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { - return pIntrService->__tmrServiceNotificationInterrupt__(pGpu, pIntrService, pParams); + return pIntrService->__nvoc_vtable->__tmrServiceNotificationInterrupt__(pGpu, pIntrService, pParams); } NV_STATUS tmrGetCurrentTime_IMPL(struct OBJTMR *pTmr, NvU64 *pTime); @@ -664,8 +677,8 @@ static inline NV_STATUS tmrSetAlarm(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU64 ala #define tmrSetAlarm_HAL(pGpu, pTmr, alarm, pThreadState) tmrSetAlarm(pGpu, pTmr, alarm, pThreadState) -static inline NvBool tmrGetAlarmPending_491d52(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { - return ((NvBool)(0 != 0)); +static inline NvBool tmrGetAlarmPending_3dd2c9(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { + return NV_FALSE; } NvBool tmrGetAlarmPending_GM107(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3); @@ -679,7 +692,7 @@ static inline NvBool tmrGetAlarmPending(OBJGPU *pGpu, struct OBJTMR *pTmr, struc return NV_FALSE; } #else //__nvoc_objtmr_h_disabled -#define tmrGetAlarmPending(pGpu, pTmr, arg3) tmrGetAlarmPending_491d52(pGpu, pTmr, arg3) +#define tmrGetAlarmPending(pGpu, pTmr, arg3) tmrGetAlarmPending_3dd2c9(pGpu, pTmr, arg3) #endif //__nvoc_objtmr_h_disabled #define tmrGetAlarmPending_HAL(pGpu, pTmr, arg3) tmrGetAlarmPending(pGpu, pTmr, arg3) @@ -712,8 +725,8 @@ static inline NV_STATUS tmrSetCountdownIntrReset(OBJGPU *pGpu, struct OBJTMR *pT #define tmrSetCountdownIntrReset_HAL(pGpu, pTmr, arg3) tmrSetCountdownIntrReset(pGpu, pTmr, arg3) -static inline NvBool tmrGetCountdownPending_491d52(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { - return ((NvBool)(0 != 0)); +static inline NvBool tmrGetCountdownPending_3dd2c9(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { + return NV_FALSE; } @@ -723,7 +736,7 @@ static inline NvBool tmrGetCountdownPending(OBJGPU *pGpu, struct OBJTMR *pTmr, s return NV_FALSE; } #else //__nvoc_objtmr_h_disabled -#define tmrGetCountdownPending(pGpu, pTmr, arg3) tmrGetCountdownPending_491d52(pGpu, pTmr, arg3) +#define tmrGetCountdownPending(pGpu, pTmr, arg3) tmrGetCountdownPending_3dd2c9(pGpu, pTmr, arg3) #endif //__nvoc_objtmr_h_disabled #define tmrGetCountdownPending_HAL(pGpu, pTmr, arg3) tmrGetCountdownPending(pGpu, pTmr, arg3) @@ -938,11 +951,11 @@ NV_STATUS tmrGetGpuPtimerOffset_TU102(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 * NV_STATUS tmrGetGpuPtimerOffset_GA100(OBJGPU *pGpu, struct OBJTMR *pTmr, NvU32 *arg3, NvU32 *arg4); static inline NvBool tmrServiceSwrlCallbacksPmcTree(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { - return ((NvBool)(0 != 0)); + return NV_FALSE; } static inline NvBool tmrClearSwrlCallbacksSemaphore(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { - return ((NvBool)(0 != 0)); + return NV_FALSE; } static inline void tmrServiceSwrlCallbacks(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { @@ -950,7 +963,7 @@ static inline void tmrServiceSwrlCallbacks(OBJGPU *pGpu, struct OBJTMR *pTmr, st } static inline NvBool tmrServiceSwrlWrapper(OBJGPU *pGpu, struct OBJTMR *pTmr, struct THREAD_STATE_NODE *arg3) { - return ((NvBool)(0 != 0)); + return NV_FALSE; } void tmrDestruct_IMPL(struct OBJTMR *pTmr); diff --git a/src/nvidia/generated/g_os_desc_mem_nvoc.c b/src/nvidia/generated/g_os_desc_mem_nvoc.c index 007c472d23..9f56deb773 100644 --- a/src/nvidia/generated/g_os_desc_mem_nvoc.c +++ b/src/nvidia/generated/g_os_desc_mem_nvoc.c @@ -93,138 +93,207 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OsDescMemory = /*pExportInfo=*/ &__nvoc_export_info_OsDescMemory }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super +NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super +NvBool __nvoc_down_thunk_OsDescMemory_resCanCopy(struct RsResource *pOsDescMemory); // this + // 1 down-thunk(s) defined to bridge methods in OsDescMemory from superclasses // osdescCanCopy: virtual override (res) base (mem) -static NvBool __nvoc_down_thunk_OsDescMemory_resCanCopy(struct RsResource *pOsDescMemory) { +NvBool __nvoc_down_thunk_OsDescMemory_resCanCopy(struct RsResource *pOsDescMemory) { return osdescCanCopy((struct OsDescMemory *)(((unsigned char *) pOsDescMemory) - __nvoc_rtti_OsDescMemory_RsResource.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_Memory_osdescIsDuplicate(struct OsDescMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate); // this +NV_STATUS __nvoc_up_thunk_Memory_osdescGetMapAddrSpace(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_Memory_osdescControl(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_osdescMap(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_osdescUnmap(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_osdescGetMemInterMapParams(struct OsDescMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_osdescCheckMemInterUnmap(struct OsDescMemory *pMemory, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_Memory_osdescGetMemoryMappingDescriptor(struct OsDescMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_Memory_osdescCheckCopyPermissions(struct OsDescMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // this +NV_STATUS __nvoc_up_thunk_Memory_osdescIsReady(struct OsDescMemory *pMemory, NvBool bCopyConstructorContext); // this +NvBool __nvoc_up_thunk_Memory_osdescIsGpuMapAllowed(struct OsDescMemory *pMemory, struct OBJGPU *pGpu); // this +NvBool __nvoc_up_thunk_Memory_osdescIsExportAllowed(struct OsDescMemory *pMemory); // this +NvBool __nvoc_up_thunk_RmResource_osdescAccessCallback(struct OsDescMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_osdescShareCallback(struct OsDescMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_osdescControlSerialization_Prologue(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_osdescControlSerialization_Epilogue(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_osdescControl_Prologue(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_osdescControl_Epilogue(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RsResource_osdescPreDestruct(struct OsDescMemory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_osdescControlFilter(struct OsDescMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_osdescIsPartialUnmapSupported(struct OsDescMemory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_osdescMapTo(struct OsDescMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_osdescUnmapFrom(struct OsDescMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_osdescGetRefCount(struct OsDescMemory *pResource); // this +void __nvoc_up_thunk_RsResource_osdescAddAdditionalDependants(struct RsClient *pClient, struct OsDescMemory *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in OsDescMemory to superclasses // osdescIsDuplicate: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_osdescIsDuplicate(struct OsDescMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_Memory_osdescIsDuplicate(struct OsDescMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), hMemory, pDuplicate); } // osdescGetMapAddrSpace: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_osdescGetMapAddrSpace(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_Memory_osdescGetMapAddrSpace(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); } // osdescControl: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_osdescControl(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_osdescControl(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), pCallContext, pParams); } // osdescMap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_osdescMap(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_osdescMap(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), pCallContext, pParams, pCpuMapping); } // osdescUnmap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_osdescUnmap(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_osdescUnmap(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), pCallContext, pCpuMapping); } // osdescGetMemInterMapParams: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_osdescGetMemInterMapParams(struct OsDescMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_osdescGetMemInterMapParams(struct OsDescMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), pParams); } // osdescCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_osdescCheckMemInterUnmap(struct OsDescMemory *pMemory, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_Memory_osdescCheckMemInterUnmap(struct OsDescMemory *pMemory, NvBool bSubdeviceHandleProvided) { return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), bSubdeviceHandleProvided); } // osdescGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_osdescGetMemoryMappingDescriptor(struct OsDescMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_Memory_osdescGetMemoryMappingDescriptor(struct OsDescMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), ppMemDesc); } // osdescCheckCopyPermissions: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_osdescCheckCopyPermissions(struct OsDescMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { +NV_STATUS __nvoc_up_thunk_Memory_osdescCheckCopyPermissions(struct OsDescMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), pDstGpu, pDstDevice); } // osdescIsReady: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_osdescIsReady(struct OsDescMemory *pMemory, NvBool bCopyConstructorContext) { +NV_STATUS __nvoc_up_thunk_Memory_osdescIsReady(struct OsDescMemory *pMemory, NvBool bCopyConstructorContext) { return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), bCopyConstructorContext); } // osdescIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_osdescIsGpuMapAllowed(struct OsDescMemory *pMemory, struct OBJGPU *pGpu) { +NvBool __nvoc_up_thunk_Memory_osdescIsGpuMapAllowed(struct OsDescMemory *pMemory, struct OBJGPU *pGpu) { return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset), pGpu); } // osdescIsExportAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_osdescIsExportAllowed(struct OsDescMemory *pMemory) { +NvBool __nvoc_up_thunk_Memory_osdescIsExportAllowed(struct OsDescMemory *pMemory) { return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_OsDescMemory_Memory.offset)); } // osdescAccessCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_osdescAccessCallback(struct OsDescMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_osdescAccessCallback(struct OsDescMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // osdescShareCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_osdescShareCallback(struct OsDescMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_osdescShareCallback(struct OsDescMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // osdescControlSerialization_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_osdescControlSerialization_Prologue(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_osdescControlSerialization_Prologue(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RmResource.offset), pCallContext, pParams); } // osdescControlSerialization_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_osdescControlSerialization_Epilogue(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_osdescControlSerialization_Epilogue(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RmResource.offset), pCallContext, pParams); } // osdescControl_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_osdescControl_Prologue(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_osdescControl_Prologue(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RmResource.offset), pCallContext, pParams); } // osdescControl_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_osdescControl_Epilogue(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_osdescControl_Epilogue(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RmResource.offset), pCallContext, pParams); } // osdescPreDestruct: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_osdescPreDestruct(struct OsDescMemory *pResource) { +void __nvoc_up_thunk_RsResource_osdescPreDestruct(struct OsDescMemory *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RsResource.offset)); } // osdescControlFilter: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_osdescControlFilter(struct OsDescMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_osdescControlFilter(struct OsDescMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RsResource.offset), pCallContext, pParams); } // osdescIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body -static NvBool __nvoc_up_thunk_RsResource_osdescIsPartialUnmapSupported(struct OsDescMemory *pResource) { +NvBool __nvoc_up_thunk_RsResource_osdescIsPartialUnmapSupported(struct OsDescMemory *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RsResource.offset)); } // osdescMapTo: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_osdescMapTo(struct OsDescMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_osdescMapTo(struct OsDescMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RsResource.offset), pParams); } // osdescUnmapFrom: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_osdescUnmapFrom(struct OsDescMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_osdescUnmapFrom(struct OsDescMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RsResource.offset), pParams); } // osdescGetRefCount: virtual inherited (res) base (mem) -static NvU32 __nvoc_up_thunk_RsResource_osdescGetRefCount(struct OsDescMemory *pResource) { +NvU32 __nvoc_up_thunk_RsResource_osdescGetRefCount(struct OsDescMemory *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RsResource.offset)); } // osdescAddAdditionalDependants: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_osdescAddAdditionalDependants(struct RsClient *pClient, struct OsDescMemory *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_osdescAddAdditionalDependants(struct RsClient *pClient, struct OsDescMemory *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_OsDescMemory_RsResource.offset), pReference); } @@ -268,92 +337,112 @@ NV_STATUS __nvoc_ctor_OsDescMemory(OsDescMemory *pThis, CALL_CONTEXT * arg_pCall // Vtable initialization static void __nvoc_init_funcTable_OsDescMemory_1(OsDescMemory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // osdescCanCopy -- virtual override (res) base (mem) - pThis->__osdescCanCopy__ = &osdescCanCopy_IMPL; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_OsDescMemory_resCanCopy; - - // osdescIsDuplicate -- virtual inherited (mem) base (mem) - pThis->__osdescIsDuplicate__ = &__nvoc_up_thunk_Memory_osdescIsDuplicate; - - // osdescGetMapAddrSpace -- virtual inherited (mem) base (mem) - pThis->__osdescGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_osdescGetMapAddrSpace; - - // osdescControl -- virtual inherited (mem) base (mem) - pThis->__osdescControl__ = &__nvoc_up_thunk_Memory_osdescControl; - - // osdescMap -- virtual inherited (mem) base (mem) - pThis->__osdescMap__ = &__nvoc_up_thunk_Memory_osdescMap; - - // osdescUnmap -- virtual inherited (mem) base (mem) - pThis->__osdescUnmap__ = &__nvoc_up_thunk_Memory_osdescUnmap; - - // osdescGetMemInterMapParams -- virtual inherited (mem) base (mem) - pThis->__osdescGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_osdescGetMemInterMapParams; - - // osdescCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body - pThis->__osdescCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_osdescCheckMemInterUnmap; - - // osdescGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) - pThis->__osdescGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_osdescGetMemoryMappingDescriptor; - - // osdescCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body - pThis->__osdescCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_osdescCheckCopyPermissions; - - // osdescIsReady -- virtual inherited (mem) base (mem) - pThis->__osdescIsReady__ = &__nvoc_up_thunk_Memory_osdescIsReady; - - // osdescIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__osdescIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_osdescIsGpuMapAllowed; - - // osdescIsExportAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__osdescIsExportAllowed__ = &__nvoc_up_thunk_Memory_osdescIsExportAllowed; - - // osdescAccessCallback -- virtual inherited (rmres) base (mem) - pThis->__osdescAccessCallback__ = &__nvoc_up_thunk_RmResource_osdescAccessCallback; - - // osdescShareCallback -- virtual inherited (rmres) base (mem) - pThis->__osdescShareCallback__ = &__nvoc_up_thunk_RmResource_osdescShareCallback; - - // osdescControlSerialization_Prologue -- virtual inherited (rmres) base (mem) - pThis->__osdescControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_osdescControlSerialization_Prologue; - - // osdescControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__osdescControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_osdescControlSerialization_Epilogue; - - // osdescControl_Prologue -- virtual inherited (rmres) base (mem) - pThis->__osdescControl_Prologue__ = &__nvoc_up_thunk_RmResource_osdescControl_Prologue; - - // osdescControl_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__osdescControl_Epilogue__ = &__nvoc_up_thunk_RmResource_osdescControl_Epilogue; - - // osdescPreDestruct -- virtual inherited (res) base (mem) - pThis->__osdescPreDestruct__ = &__nvoc_up_thunk_RsResource_osdescPreDestruct; - - // osdescControlFilter -- virtual inherited (res) base (mem) - pThis->__osdescControlFilter__ = &__nvoc_up_thunk_RsResource_osdescControlFilter; - - // osdescIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body - pThis->__osdescIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_osdescIsPartialUnmapSupported; - - // osdescMapTo -- virtual inherited (res) base (mem) - pThis->__osdescMapTo__ = &__nvoc_up_thunk_RsResource_osdescMapTo; - - // osdescUnmapFrom -- virtual inherited (res) base (mem) - pThis->__osdescUnmapFrom__ = &__nvoc_up_thunk_RsResource_osdescUnmapFrom; - - // osdescGetRefCount -- virtual inherited (res) base (mem) - pThis->__osdescGetRefCount__ = &__nvoc_up_thunk_RsResource_osdescGetRefCount; - - // osdescAddAdditionalDependants -- virtual inherited (res) base (mem) - pThis->__osdescAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_osdescAddAdditionalDependants; -} // End __nvoc_init_funcTable_OsDescMemory_1 with approximately 27 basic block(s). +} // End __nvoc_init_funcTable_OsDescMemory_1 // Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_OsDescMemory(OsDescMemory *pThis) { - // Initialize vtable(s) with 26 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__OsDescMemory vtable = { + .__osdescCanCopy__ = &osdescCanCopy_IMPL, // virtual override (res) base (mem) + .Memory.__memCanCopy__ = &__nvoc_up_thunk_RsResource_memCanCopy, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_OsDescMemory_resCanCopy, // virtual + .__osdescIsDuplicate__ = &__nvoc_up_thunk_Memory_osdescIsDuplicate, // virtual inherited (mem) base (mem) + .Memory.__memIsDuplicate__ = &memIsDuplicate_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resIsDuplicate__ = &__nvoc_down_thunk_Memory_resIsDuplicate, // virtual + .__osdescGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_osdescGetMapAddrSpace, // virtual inherited (mem) base (mem) + .Memory.__memGetMapAddrSpace__ = &memGetMapAddrSpace_IMPL, // virtual + .__osdescControl__ = &__nvoc_up_thunk_Memory_osdescControl, // virtual inherited (mem) base (mem) + .Memory.__memControl__ = &memControl_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_Memory_resControl, // virtual + .__osdescMap__ = &__nvoc_up_thunk_Memory_osdescMap, // virtual inherited (mem) base (mem) + .Memory.__memMap__ = &memMap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_Memory_resMap, // virtual + .__osdescUnmap__ = &__nvoc_up_thunk_Memory_osdescUnmap, // virtual inherited (mem) base (mem) + .Memory.__memUnmap__ = &memUnmap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_Memory_resUnmap, // virtual + .__osdescGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_osdescGetMemInterMapParams, // virtual inherited (mem) base (mem) + .Memory.__memGetMemInterMapParams__ = &memGetMemInterMapParams_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_Memory_rmresGetMemInterMapParams, // virtual + .__osdescCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_osdescCheckMemInterUnmap, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckMemInterUnmap__ = &memCheckMemInterUnmap_ac1694, // inline virtual override (rmres) base (rmres) body + .Memory.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_Memory_rmresCheckMemInterUnmap, // virtual + .__osdescGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_osdescGetMemoryMappingDescriptor, // virtual inherited (mem) base (mem) + .Memory.__memGetMemoryMappingDescriptor__ = &memGetMemoryMappingDescriptor_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor, // virtual + .__osdescCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_osdescCheckCopyPermissions, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckCopyPermissions__ = &memCheckCopyPermissions_ac1694, // inline virtual body + .__osdescIsReady__ = &__nvoc_up_thunk_Memory_osdescIsReady, // virtual inherited (mem) base (mem) + .Memory.__memIsReady__ = &memIsReady_IMPL, // virtual + .__osdescIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_osdescIsGpuMapAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsGpuMapAllowed__ = &memIsGpuMapAllowed_e661f0, // inline virtual body + .__osdescIsExportAllowed__ = &__nvoc_up_thunk_Memory_osdescIsExportAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsExportAllowed__ = &memIsExportAllowed_e661f0, // inline virtual body + .__osdescAccessCallback__ = &__nvoc_up_thunk_RmResource_osdescAccessCallback, // virtual inherited (rmres) base (mem) + .Memory.__memAccessCallback__ = &__nvoc_up_thunk_RmResource_memAccessCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__osdescShareCallback__ = &__nvoc_up_thunk_RmResource_osdescShareCallback, // virtual inherited (rmres) base (mem) + .Memory.__memShareCallback__ = &__nvoc_up_thunk_RmResource_memShareCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__osdescControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_osdescControlSerialization_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__osdescControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_osdescControlSerialization_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__osdescControl_Prologue__ = &__nvoc_up_thunk_RmResource_osdescControl_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Prologue__ = &__nvoc_up_thunk_RmResource_memControl_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__osdescControl_Epilogue__ = &__nvoc_up_thunk_RmResource_osdescControl_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memControl_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__osdescPreDestruct__ = &__nvoc_up_thunk_RsResource_osdescPreDestruct, // virtual inherited (res) base (mem) + .Memory.__memPreDestruct__ = &__nvoc_up_thunk_RsResource_memPreDestruct, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__osdescControlFilter__ = &__nvoc_up_thunk_RsResource_osdescControlFilter, // virtual inherited (res) base (mem) + .Memory.__memControlFilter__ = &__nvoc_up_thunk_RsResource_memControlFilter, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__osdescIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_osdescIsPartialUnmapSupported, // inline virtual inherited (res) base (mem) body + .Memory.__memIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .Memory.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .Memory.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__osdescMapTo__ = &__nvoc_up_thunk_RsResource_osdescMapTo, // virtual inherited (res) base (mem) + .Memory.__memMapTo__ = &__nvoc_up_thunk_RsResource_memMapTo, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__osdescUnmapFrom__ = &__nvoc_up_thunk_RsResource_osdescUnmapFrom, // virtual inherited (res) base (mem) + .Memory.__memUnmapFrom__ = &__nvoc_up_thunk_RsResource_memUnmapFrom, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__osdescGetRefCount__ = &__nvoc_up_thunk_RsResource_osdescGetRefCount, // virtual inherited (res) base (mem) + .Memory.__memGetRefCount__ = &__nvoc_up_thunk_RsResource_memGetRefCount, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__osdescAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_osdescAddAdditionalDependants, // virtual inherited (res) base (mem) + .Memory.__memAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memAddAdditionalDependants, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.Memory.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable = &vtable.Memory.RmResource; // (rmres) super^2 + pThis->__nvoc_base_Memory.__nvoc_vtable = &vtable.Memory; // (mem) super + pThis->__nvoc_vtable = &vtable; // (osdesc) this __nvoc_init_funcTable_OsDescMemory_1(pThis); } diff --git a/src/nvidia/generated/g_os_desc_mem_nvoc.h b/src/nvidia/generated/g_os_desc_mem_nvoc.h index 2350500327..9de724298c 100644 --- a/src/nvidia/generated/g_os_desc_mem_nvoc.h +++ b/src/nvidia/generated/g_os_desc_mem_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -58,10 +58,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__OsDescMemory; + + struct OsDescMemory { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__OsDescMemory *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; @@ -73,8 +78,13 @@ struct OsDescMemory { struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 struct Memory *__nvoc_pbase_Memory; // mem super struct OsDescMemory *__nvoc_pbase_OsDescMemory; // osdesc +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__OsDescMemory { + const struct NVOC_VTABLE__Memory Memory; // (mem) 26 function pointers - // Vtable with 26 per-object function pointers NvBool (*__osdescCanCopy__)(struct OsDescMemory * /*this*/); // virtual override (res) base (mem) NV_STATUS (*__osdescIsDuplicate__)(struct OsDescMemory * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) NV_STATUS (*__osdescGetMapAddrSpace__)(struct OsDescMemory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (mem) @@ -133,162 +143,162 @@ NV_STATUS __nvoc_objCreate_OsDescMemory(OsDescMemory**, Dynamic*, NvU32, CALL_CO // Wrapper macros -#define osdescCanCopy_FNPTR(pOsDescMemory) pOsDescMemory->__osdescCanCopy__ +#define osdescCanCopy_FNPTR(pOsDescMemory) pOsDescMemory->__nvoc_vtable->__osdescCanCopy__ #define osdescCanCopy(pOsDescMemory) osdescCanCopy_DISPATCH(pOsDescMemory) -#define osdescIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define osdescIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsDuplicate__ #define osdescIsDuplicate(pMemory, hMemory, pDuplicate) osdescIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define osdescGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ +#define osdescGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMapAddrSpace__ #define osdescGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) osdescGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define osdescControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ +#define osdescControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memControl__ #define osdescControl(pMemory, pCallContext, pParams) osdescControl_DISPATCH(pMemory, pCallContext, pParams) -#define osdescMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define osdescMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memMap__ #define osdescMap(pMemory, pCallContext, pParams, pCpuMapping) osdescMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define osdescUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ +#define osdescUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memUnmap__ #define osdescUnmap(pMemory, pCallContext, pCpuMapping) osdescUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define osdescGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ +#define osdescGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemInterMapParams__ #define osdescGetMemInterMapParams(pMemory, pParams) osdescGetMemInterMapParams_DISPATCH(pMemory, pParams) -#define osdescCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define osdescCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckMemInterUnmap__ #define osdescCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) osdescCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define osdescGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ +#define osdescGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemoryMappingDescriptor__ #define osdescGetMemoryMappingDescriptor(pMemory, ppMemDesc) osdescGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define osdescCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ +#define osdescCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckCopyPermissions__ #define osdescCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) osdescCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define osdescIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define osdescIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsReady__ #define osdescIsReady(pMemory, bCopyConstructorContext) osdescIsReady_DISPATCH(pMemory, bCopyConstructorContext) -#define osdescIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define osdescIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsGpuMapAllowed__ #define osdescIsGpuMapAllowed(pMemory, pGpu) osdescIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define osdescIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define osdescIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsExportAllowed__ #define osdescIsExportAllowed(pMemory) osdescIsExportAllowed_DISPATCH(pMemory) -#define osdescAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define osdescAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define osdescAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) osdescAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define osdescShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define osdescShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define osdescShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) osdescShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define osdescControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define osdescControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define osdescControlSerialization_Prologue(pResource, pCallContext, pParams) osdescControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define osdescControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define osdescControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define osdescControlSerialization_Epilogue(pResource, pCallContext, pParams) osdescControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define osdescControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define osdescControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define osdescControl_Prologue(pResource, pCallContext, pParams) osdescControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define osdescControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define osdescControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define osdescControl_Epilogue(pResource, pCallContext, pParams) osdescControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define osdescPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define osdescPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define osdescPreDestruct(pResource) osdescPreDestruct_DISPATCH(pResource) -#define osdescControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define osdescControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define osdescControlFilter(pResource, pCallContext, pParams) osdescControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define osdescIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define osdescIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define osdescIsPartialUnmapSupported(pResource) osdescIsPartialUnmapSupported_DISPATCH(pResource) -#define osdescMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define osdescMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define osdescMapTo(pResource, pParams) osdescMapTo_DISPATCH(pResource, pParams) -#define osdescUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define osdescUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define osdescUnmapFrom(pResource, pParams) osdescUnmapFrom_DISPATCH(pResource, pParams) -#define osdescGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define osdescGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define osdescGetRefCount(pResource) osdescGetRefCount_DISPATCH(pResource) -#define osdescAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define osdescAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define osdescAddAdditionalDependants(pClient, pResource, pReference) osdescAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool osdescCanCopy_DISPATCH(struct OsDescMemory *pOsDescMemory) { - return pOsDescMemory->__osdescCanCopy__(pOsDescMemory); + return pOsDescMemory->__nvoc_vtable->__osdescCanCopy__(pOsDescMemory); } static inline NV_STATUS osdescIsDuplicate_DISPATCH(struct OsDescMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__osdescIsDuplicate__(pMemory, hMemory, pDuplicate); + return pMemory->__nvoc_vtable->__osdescIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS osdescGetMapAddrSpace_DISPATCH(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pMemory->__osdescGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); + return pMemory->__nvoc_vtable->__osdescGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS osdescControl_DISPATCH(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__osdescControl__(pMemory, pCallContext, pParams); + return pMemory->__nvoc_vtable->__osdescControl__(pMemory, pCallContext, pParams); } static inline NV_STATUS osdescMap_DISPATCH(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__osdescMap__(pMemory, pCallContext, pParams, pCpuMapping); + return pMemory->__nvoc_vtable->__osdescMap__(pMemory, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS osdescUnmap_DISPATCH(struct OsDescMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__osdescUnmap__(pMemory, pCallContext, pCpuMapping); + return pMemory->__nvoc_vtable->__osdescUnmap__(pMemory, pCallContext, pCpuMapping); } static inline NV_STATUS osdescGetMemInterMapParams_DISPATCH(struct OsDescMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__osdescGetMemInterMapParams__(pMemory, pParams); + return pMemory->__nvoc_vtable->__osdescGetMemInterMapParams__(pMemory, pParams); } static inline NV_STATUS osdescCheckMemInterUnmap_DISPATCH(struct OsDescMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__osdescCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); + return pMemory->__nvoc_vtable->__osdescCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } static inline NV_STATUS osdescGetMemoryMappingDescriptor_DISPATCH(struct OsDescMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__osdescGetMemoryMappingDescriptor__(pMemory, ppMemDesc); + return pMemory->__nvoc_vtable->__osdescGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } static inline NV_STATUS osdescCheckCopyPermissions_DISPATCH(struct OsDescMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__osdescCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); + return pMemory->__nvoc_vtable->__osdescCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } static inline NV_STATUS osdescIsReady_DISPATCH(struct OsDescMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__osdescIsReady__(pMemory, bCopyConstructorContext); + return pMemory->__nvoc_vtable->__osdescIsReady__(pMemory, bCopyConstructorContext); } static inline NvBool osdescIsGpuMapAllowed_DISPATCH(struct OsDescMemory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__osdescIsGpuMapAllowed__(pMemory, pGpu); + return pMemory->__nvoc_vtable->__osdescIsGpuMapAllowed__(pMemory, pGpu); } static inline NvBool osdescIsExportAllowed_DISPATCH(struct OsDescMemory *pMemory) { - return pMemory->__osdescIsExportAllowed__(pMemory); + return pMemory->__nvoc_vtable->__osdescIsExportAllowed__(pMemory); } static inline NvBool osdescAccessCallback_DISPATCH(struct OsDescMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__osdescAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__osdescAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool osdescShareCallback_DISPATCH(struct OsDescMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__osdescShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__osdescShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS osdescControlSerialization_Prologue_DISPATCH(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__osdescControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__osdescControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void osdescControlSerialization_Epilogue_DISPATCH(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__osdescControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__osdescControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS osdescControl_Prologue_DISPATCH(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__osdescControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__osdescControl_Prologue__(pResource, pCallContext, pParams); } static inline void osdescControl_Epilogue_DISPATCH(struct OsDescMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__osdescControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__osdescControl_Epilogue__(pResource, pCallContext, pParams); } static inline void osdescPreDestruct_DISPATCH(struct OsDescMemory *pResource) { - pResource->__osdescPreDestruct__(pResource); + pResource->__nvoc_vtable->__osdescPreDestruct__(pResource); } static inline NV_STATUS osdescControlFilter_DISPATCH(struct OsDescMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__osdescControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__osdescControlFilter__(pResource, pCallContext, pParams); } static inline NvBool osdescIsPartialUnmapSupported_DISPATCH(struct OsDescMemory *pResource) { - return pResource->__osdescIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__osdescIsPartialUnmapSupported__(pResource); } static inline NV_STATUS osdescMapTo_DISPATCH(struct OsDescMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__osdescMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__osdescMapTo__(pResource, pParams); } static inline NV_STATUS osdescUnmapFrom_DISPATCH(struct OsDescMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__osdescUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__osdescUnmapFrom__(pResource, pParams); } static inline NvU32 osdescGetRefCount_DISPATCH(struct OsDescMemory *pResource) { - return pResource->__osdescGetRefCount__(pResource); + return pResource->__nvoc_vtable->__osdescGetRefCount__(pResource); } static inline void osdescAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct OsDescMemory *pResource, RsResourceRef *pReference) { - pResource->__osdescAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__osdescAddAdditionalDependants__(pClient, pResource, pReference); } NvBool osdescCanCopy_IMPL(struct OsDescMemory *pOsDescMemory); diff --git a/src/nvidia/generated/g_os_nvoc.c b/src/nvidia/generated/g_os_nvoc.c index a4c9cc7c09..de761d3c2b 100644 --- a/src/nvidia/generated/g_os_nvoc.c +++ b/src/nvidia/generated/g_os_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJOS = /*pExportInfo=*/ &__nvoc_export_info_OBJOS }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJOS = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_os_nvoc.h b/src/nvidia/generated/g_os_nvoc.h index 515a8a1a10..ace63829a4 100644 --- a/src/nvidia/generated/g_os_nvoc.h +++ b/src/nvidia/generated/g_os_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -61,6 +61,7 @@ extern "C" { /* ------------------------ OS Includes ------------------------------------- */ #include "os/nv_memory_type.h" +#include "os/nv_memory_area.h" #include "os/capability.h" /* ------------------------ Forward Declarations ---------------------------- */ @@ -186,8 +187,8 @@ typedef struct RM_PAGEABLE_SECTION { #define OS_BUG_CHECK_BUGCODE_UNKNOWN (0) #define OS_BUG_CHECK_BUGCODE_INTERNAL_TEST (1) #define OS_BUG_CHECK_BUGCODE_BUS (2) -#define OS_BUG_CHECK_BUGCODE_ECC_DBE (3) -#define OS_BUG_CHECK_BUGCODE_NVLINK_TL_ERR (4) +#define OS_BUG_CHECK_BUGCODE_RESERVED_3 (3) // previously ECC_DBE +#define OS_BUG_CHECK_BUGCODE_RESERVED_4 (4) // previously NVLINK_TL_ERR #define OS_BUG_CHECK_BUGCODE_PAGED_SEGMENT (5) #define OS_BUG_CHECK_BUGCODE_BSOD_ON_ASSERT (6) #define OS_BUG_CHECK_BUGCODE_DISPLAY_UNDERFLOW (7) @@ -198,8 +199,8 @@ typedef struct RM_PAGEABLE_SECTION { "Unknown Error", \ "Nv Internal Testing", \ "Bus Error", \ - "Double Bit Error", \ - "NVLink TL Error", \ + "Reserved", \ + "Reserved", \ "Invalid Bindata Access", \ "BSOD on Assert or Breakpoint", \ "Display Underflow" \ @@ -355,6 +356,7 @@ typedef NV_STATUS OSAttachToProcess(void **, NvU32); typedef void OSDetachFromProcess(void*); typedef NV_STATUS OSVirtualToPhysicalAddr(MEMORY_DESCRIPTOR *, NvP64, RmPhysAddr *); typedef NV_STATUS NV_FORCERESULTCHECK OSMapPciMemoryUser(OS_GPU_INFO *, RmPhysAddr, NvU64, NvU32, NvP64 *, NvP64 *, NvU32); +typedef NV_STATUS NV_FORCERESULTCHECK OSMapPciMemoryAreaUser(OS_GPU_INFO *, MemoryArea, NvU32, NvU32, NvP64 *, NvP64 *); typedef void OSUnmapPciMemoryUser(OS_GPU_INFO *, NvP64, NvU64, NvP64); typedef NV_STATUS NV_FORCERESULTCHECK OSMapPciMemoryKernelOld(OBJGPU *, RmPhysAddr, NvU64, NvU32, void **, NvU32); typedef void OSUnmapPciMemoryKernelOld(OBJGPU *, void *); @@ -400,6 +402,8 @@ typedef NvBool OSIsEqualGUID(void *, void *); // #define OS_QUEUE_WORKITEM_FLAGS_FULL_GPU_SANITY NVBIT(14) #define OS_QUEUE_WORKITEM_FLAGS_FOR_PM_RESUME NVBIT(15) + +#define OS_QUEUE_WORKITEM_FLAGS_DROP_ON_UNLOAD_QUEUE_FLUSH NVBIT(16) typedef void OSWorkItemFunction(NvU32 gpuInstance, void *); typedef void OSSystemWorkItemFunction(void *); NV_STATUS osQueueWorkItemWithFlags(OBJGPU *, OSWorkItemFunction, void *, NvU32); @@ -473,21 +477,6 @@ NV_STATUS osSetupVBlank(OBJGPU *pGpu, void * pProc, void osInternalReserveAllocCallback(NvU64 offset, NvU64 size, NvU32 gpuId); void osInternalReserveFreeCallback(NvU64 offset, NvU32 gpuId); - -// -// Function pointer typedef for use as callback prototype when filtering -// address ranges in os memory access routines -// -typedef NV_STATUS (OSMemFilterCb)(void *pPriv, NvU64 addr, void *pData, NvU64 size, NvBool bRead); - -// Structure typedef for storing the callback pointer and priv data -typedef struct -{ - NODE node; - OSMemFilterCb *pFilterCb; - void *pPriv; -} OSMEMFILTERDATA, *POSMEMFILTERDATA; - // // OS Functions typically only implemented for MODS // Note: See comments above for other functions that @@ -503,10 +492,6 @@ typedef void OSSyncWithGpuDestroy(NvBool); typedef void OSModifyGpuSwStatePersistence(OS_GPU_INFO *, NvBool); -typedef NV_STATUS OSMemAddFilter(NvU64, NvU64, OSMemFilterCb*, void *); -typedef NV_STATUS OSMemRemoveFilter(NvU64); -typedef POSMEMFILTERDATA OSMemGetFilter(NvUPtr); - typedef NV_STATUS OSGetCarveoutInfo(NvU64*, NvU64*); typedef NV_STATUS OSGetVPRInfo(NvU64*, NvU64*); typedef NV_STATUS OSAllocInVPR(MEMORY_DESCRIPTOR*); @@ -683,7 +668,7 @@ NV_STATUS osTegraAllocateDisplayBandwidth(OS_GPU_INFO *pOsGpuInfo, NV_STATUS osGetCurrentProcessGfid(NvU32 *pGfid); NvBool osIsAdministrator(void); -NvBool osAllowPriorityOverride(void); +NvBool osCheckAccess(RsAccessRight accessRight); NV_STATUS osGetCurrentTime(NvU32 *pSec,NvU32 *puSec); NV_STATUS osGetCurrentTick(NvU64 *pTimeInNs); NvU64 osGetTickResolution(void); @@ -779,12 +764,13 @@ NvBool osRemoveGpuSupported(void); void initVGXSpecificRegistry(OBJGPU *); -NV_STATUS nv_vgpu_rm_get_bar_info(OBJGPU *pGpu, const NvU8 *pMdevUuid, NvU64 *barSizes, +NV_STATUS nv_vgpu_rm_get_bar_info(OBJGPU *pGpu, const NvU8 *pVgpuDevName, NvU64 *barSizes, NvU64 *sparseOffsets, NvU64 *sparseSizes, NvU32 *sparseCount, NvBool *isBar064bit, NvU8 *configParams); NV_STATUS osIsVgpuVfioPresent(void); NV_STATUS osIsVfioPciCorePresent(void); + void osWakeRemoveVgpu(NvU32, NvU32); NV_STATUS rm_is_vgpu_supported_device(OS_GPU_INFO *pNv, NvU32 pmc_boot_1, NvU32 pmc_boot_42); @@ -878,6 +864,8 @@ NV_STATUS osTegraSocParseFixedModeTimings(OS_GPU_INFO *pOsGpuInfo, NV0073_CTRL_DFP_GET_FIXED_MODE_TIMING_PARAMS *pTimingsPerStream, NvU8 *pNumTimings); +NV_STATUS osTegraSocGetScanoutCarveout(OS_GPU_INFO *pOsGpuInfo, NvU64 *pBase, NvU64 *pSize); + NV_STATUS osGetVersion(NvU32 *pMajorVer, NvU32 *pMinorVer, NvU32 *pBuildNum, @@ -1100,6 +1088,9 @@ NvBool osIsNvswitchPresent(void); void osQueueMMUFaultHandler(OBJGPU *); +NV_STATUS osQueueDrainP2PHandler(NvU8 *); +void osQueueResumeP2PHandler(NvU8 *); + NvBool osIsGpuAccessible(OBJGPU *pGpu); NvBool osIsGpuShutdown(OBJGPU *pGpu); @@ -1274,9 +1265,6 @@ OSGetVersionDump osGetVersionDump; OSGetMaxUserVa osGetMaxUserVa; OSGetCpuVaAddrShift osGetCpuVaAddrShift; -OSMemAddFilter osMemAddFilter; -OSMemRemoveFilter osMemRemoveFilter; -OSMemGetFilter osMemGetFilter; OSAllocPagesInternal osAllocPagesInternal; OSFreePagesInternal osFreePagesInternal; @@ -1311,6 +1299,7 @@ NV_STATUS osDestroyRegistry(void); nv_reg_entry_t* osGetRegistryList(void); NV_STATUS osSetRegistryList(nv_reg_entry_t *pRegList); OSMapPciMemoryUser osMapPciMemoryUser; +OSMapPciMemoryAreaUser osMapPciMemoryAreaUser; OSUnmapPciMemoryUser osUnmapPciMemoryUser; OSMapPciMemoryKernelOld osMapPciMemoryKernelOld; OSMapPciMemoryKernel64 osMapPciMemoryKernel64; diff --git a/src/nvidia/generated/g_p2p_api_nvoc.c b/src/nvidia/generated/g_p2p_api_nvoc.c index b05958c319..aec8ac9775 100644 --- a/src/nvidia/generated/g_p2p_api_nvoc.c +++ b/src/nvidia/generated/g_p2p_api_nvoc.c @@ -84,110 +84,153 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_P2PApi = /*pExportInfo=*/ &__nvoc_export_info_P2PApi }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_RmResource_p2papiAccessCallback(struct P2PApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_p2papiShareCallback(struct P2PApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_p2papiGetMemInterMapParams(struct P2PApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_p2papiCheckMemInterUnmap(struct P2PApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_p2papiGetMemoryMappingDescriptor(struct P2PApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_p2papiControlSerialization_Prologue(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_p2papiControlSerialization_Epilogue(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_p2papiControl_Prologue(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_p2papiControl_Epilogue(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_p2papiCanCopy(struct P2PApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_p2papiIsDuplicate(struct P2PApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_p2papiPreDestruct(struct P2PApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_p2papiControl(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_p2papiControlFilter(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_p2papiMap(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_p2papiUnmap(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_p2papiIsPartialUnmapSupported(struct P2PApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_p2papiMapTo(struct P2PApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_p2papiUnmapFrom(struct P2PApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_p2papiGetRefCount(struct P2PApi *pResource); // this +void __nvoc_up_thunk_RsResource_p2papiAddAdditionalDependants(struct RsClient *pClient, struct P2PApi *pResource, RsResourceRef *pReference); // this + // 21 up-thunk(s) defined to bridge methods in P2PApi to superclasses // p2papiAccessCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_p2papiAccessCallback(struct P2PApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_p2papiAccessCallback(struct P2PApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // p2papiShareCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_p2papiShareCallback(struct P2PApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_p2papiShareCallback(struct P2PApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // p2papiGetMemInterMapParams: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_p2papiGetMemInterMapParams(struct P2PApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_p2papiGetMemInterMapParams(struct P2PApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_P2PApi_RmResource.offset), pParams); } // p2papiCheckMemInterUnmap: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_p2papiCheckMemInterUnmap(struct P2PApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_p2papiCheckMemInterUnmap(struct P2PApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_P2PApi_RmResource.offset), bSubdeviceHandleProvided); } // p2papiGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_p2papiGetMemoryMappingDescriptor(struct P2PApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_p2papiGetMemoryMappingDescriptor(struct P2PApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_P2PApi_RmResource.offset), ppMemDesc); } // p2papiControlSerialization_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_p2papiControlSerialization_Prologue(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_p2papiControlSerialization_Prologue(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RmResource.offset), pCallContext, pParams); } // p2papiControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_p2papiControlSerialization_Epilogue(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_p2papiControlSerialization_Epilogue(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RmResource.offset), pCallContext, pParams); } // p2papiControl_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_p2papiControl_Prologue(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_p2papiControl_Prologue(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RmResource.offset), pCallContext, pParams); } // p2papiControl_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_p2papiControl_Epilogue(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_p2papiControl_Epilogue(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RmResource.offset), pCallContext, pParams); } // p2papiCanCopy: virtual inherited (res) base (rmres) -static NvBool __nvoc_up_thunk_RsResource_p2papiCanCopy(struct P2PApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_p2papiCanCopy(struct P2PApi *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset)); } // p2papiIsDuplicate: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_p2papiIsDuplicate(struct P2PApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_p2papiIsDuplicate(struct P2PApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset), hMemory, pDuplicate); } // p2papiPreDestruct: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_p2papiPreDestruct(struct P2PApi *pResource) { +void __nvoc_up_thunk_RsResource_p2papiPreDestruct(struct P2PApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset)); } // p2papiControl: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_p2papiControl(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_p2papiControl(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset), pCallContext, pParams); } // p2papiControlFilter: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_p2papiControlFilter(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_p2papiControlFilter(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset), pCallContext, pParams); } // p2papiMap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_p2papiMap(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_p2papiMap(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset), pCallContext, pParams, pCpuMapping); } // p2papiUnmap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_p2papiUnmap(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_p2papiUnmap(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset), pCallContext, pCpuMapping); } // p2papiIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body -static NvBool __nvoc_up_thunk_RsResource_p2papiIsPartialUnmapSupported(struct P2PApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_p2papiIsPartialUnmapSupported(struct P2PApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset)); } // p2papiMapTo: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_p2papiMapTo(struct P2PApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_p2papiMapTo(struct P2PApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset), pParams); } // p2papiUnmapFrom: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_p2papiUnmapFrom(struct P2PApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_p2papiUnmapFrom(struct P2PApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset), pParams); } // p2papiGetRefCount: virtual inherited (res) base (rmres) -static NvU32 __nvoc_up_thunk_RsResource_p2papiGetRefCount(struct P2PApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_p2papiGetRefCount(struct P2PApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset)); } // p2papiAddAdditionalDependants: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_p2papiAddAdditionalDependants(struct RsClient *pClient, struct P2PApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_p2papiAddAdditionalDependants(struct RsClient *pClient, struct P2PApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_P2PApi_RsResource.offset), pReference); } @@ -231,76 +274,80 @@ NV_STATUS __nvoc_ctor_P2PApi(P2PApi *pThis, struct CALL_CONTEXT * arg_pCallConte // Vtable initialization static void __nvoc_init_funcTable_P2PApi_1(P2PApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // p2papiAccessCallback -- virtual inherited (rmres) base (rmres) - pThis->__p2papiAccessCallback__ = &__nvoc_up_thunk_RmResource_p2papiAccessCallback; - - // p2papiShareCallback -- virtual inherited (rmres) base (rmres) - pThis->__p2papiShareCallback__ = &__nvoc_up_thunk_RmResource_p2papiShareCallback; - - // p2papiGetMemInterMapParams -- virtual inherited (rmres) base (rmres) - pThis->__p2papiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_p2papiGetMemInterMapParams; - - // p2papiCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) - pThis->__p2papiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_p2papiCheckMemInterUnmap; - - // p2papiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) - pThis->__p2papiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_p2papiGetMemoryMappingDescriptor; - - // p2papiControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__p2papiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_p2papiControlSerialization_Prologue; - - // p2papiControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__p2papiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_p2papiControlSerialization_Epilogue; - - // p2papiControl_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__p2papiControl_Prologue__ = &__nvoc_up_thunk_RmResource_p2papiControl_Prologue; - - // p2papiControl_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__p2papiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_p2papiControl_Epilogue; - - // p2papiCanCopy -- virtual inherited (res) base (rmres) - pThis->__p2papiCanCopy__ = &__nvoc_up_thunk_RsResource_p2papiCanCopy; - - // p2papiIsDuplicate -- virtual inherited (res) base (rmres) - pThis->__p2papiIsDuplicate__ = &__nvoc_up_thunk_RsResource_p2papiIsDuplicate; - - // p2papiPreDestruct -- virtual inherited (res) base (rmres) - pThis->__p2papiPreDestruct__ = &__nvoc_up_thunk_RsResource_p2papiPreDestruct; - - // p2papiControl -- virtual inherited (res) base (rmres) - pThis->__p2papiControl__ = &__nvoc_up_thunk_RsResource_p2papiControl; - - // p2papiControlFilter -- virtual inherited (res) base (rmres) - pThis->__p2papiControlFilter__ = &__nvoc_up_thunk_RsResource_p2papiControlFilter; - - // p2papiMap -- virtual inherited (res) base (rmres) - pThis->__p2papiMap__ = &__nvoc_up_thunk_RsResource_p2papiMap; - - // p2papiUnmap -- virtual inherited (res) base (rmres) - pThis->__p2papiUnmap__ = &__nvoc_up_thunk_RsResource_p2papiUnmap; - - // p2papiIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body - pThis->__p2papiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_p2papiIsPartialUnmapSupported; - - // p2papiMapTo -- virtual inherited (res) base (rmres) - pThis->__p2papiMapTo__ = &__nvoc_up_thunk_RsResource_p2papiMapTo; - - // p2papiUnmapFrom -- virtual inherited (res) base (rmres) - pThis->__p2papiUnmapFrom__ = &__nvoc_up_thunk_RsResource_p2papiUnmapFrom; - - // p2papiGetRefCount -- virtual inherited (res) base (rmres) - pThis->__p2papiGetRefCount__ = &__nvoc_up_thunk_RsResource_p2papiGetRefCount; - - // p2papiAddAdditionalDependants -- virtual inherited (res) base (rmres) - pThis->__p2papiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_p2papiAddAdditionalDependants; -} // End __nvoc_init_funcTable_P2PApi_1 with approximately 21 basic block(s). +} // End __nvoc_init_funcTable_P2PApi_1 // Initialize vtable(s) for 21 virtual method(s). void __nvoc_init_funcTable_P2PApi(P2PApi *pThis) { - // Initialize vtable(s) with 21 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__P2PApi vtable = { + .__p2papiAccessCallback__ = &__nvoc_up_thunk_RmResource_p2papiAccessCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__p2papiShareCallback__ = &__nvoc_up_thunk_RmResource_p2papiShareCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__p2papiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_p2papiGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__p2papiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_p2papiCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__p2papiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_p2papiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__p2papiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_p2papiControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__p2papiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_p2papiControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__p2papiControl_Prologue__ = &__nvoc_up_thunk_RmResource_p2papiControl_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__p2papiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_p2papiControl_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__p2papiCanCopy__ = &__nvoc_up_thunk_RsResource_p2papiCanCopy, // virtual inherited (res) base (rmres) + .RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__p2papiIsDuplicate__ = &__nvoc_up_thunk_RsResource_p2papiIsDuplicate, // virtual inherited (res) base (rmres) + .RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__p2papiPreDestruct__ = &__nvoc_up_thunk_RsResource_p2papiPreDestruct, // virtual inherited (res) base (rmres) + .RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__p2papiControl__ = &__nvoc_up_thunk_RsResource_p2papiControl, // virtual inherited (res) base (rmres) + .RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControl__ = &resControl_IMPL, // virtual + .__p2papiControlFilter__ = &__nvoc_up_thunk_RsResource_p2papiControlFilter, // virtual inherited (res) base (rmres) + .RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__p2papiMap__ = &__nvoc_up_thunk_RsResource_p2papiMap, // virtual inherited (res) base (rmres) + .RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMap__ = &resMap_IMPL, // virtual + .__p2papiUnmap__ = &__nvoc_up_thunk_RsResource_p2papiUnmap, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__p2papiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_p2papiIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__p2papiMapTo__ = &__nvoc_up_thunk_RsResource_p2papiMapTo, // virtual inherited (res) base (rmres) + .RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__p2papiUnmapFrom__ = &__nvoc_up_thunk_RsResource_p2papiUnmapFrom, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__p2papiGetRefCount__ = &__nvoc_up_thunk_RsResource_p2papiGetRefCount, // virtual inherited (res) base (rmres) + .RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__p2papiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_p2papiAddAdditionalDependants, // virtual inherited (res) base (rmres) + .RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.RmResource.RsResource; // (res) super^2 + pThis->__nvoc_base_RmResource.__nvoc_vtable = &vtable.RmResource; // (rmres) super + pThis->__nvoc_vtable = &vtable; // (p2papi) this __nvoc_init_funcTable_P2PApi_1(pThis); } diff --git a/src/nvidia/generated/g_p2p_api_nvoc.h b/src/nvidia/generated/g_p2p_api_nvoc.h index 0ae0173788..ddfbc433d0 100644 --- a/src/nvidia/generated/g_p2p_api_nvoc.h +++ b/src/nvidia/generated/g_p2p_api_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -75,10 +75,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__P2PApi; + + struct P2PApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__P2PApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; @@ -90,7 +95,23 @@ struct P2PApi { struct RmResource *__nvoc_pbase_RmResource; // rmres super struct P2PApi *__nvoc_pbase_P2PApi; // p2papi - // Vtable with 21 per-object function pointers + // Data members + struct OBJGPU *peer1; + struct OBJGPU *peer2; + NvU32 localGfid; + NvU32 remoteGfid; + NvU32 peerId1; + NvU32 peerId2; + NvU32 egmPeerId1; + NvU32 egmPeerId2; + NvU32 attributes; +}; + + +// Metadata including vtable with 21 function pointers plus superclass metadata +struct NVOC_VTABLE__P2PApi { + const struct NVOC_VTABLE__RmResource RmResource; // (rmres) 21 function pointers + NvBool (*__p2papiAccessCallback__)(struct P2PApi * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) NvBool (*__p2papiShareCallback__)(struct P2PApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) NV_STATUS (*__p2papiGetMemInterMapParams__)(struct P2PApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) @@ -112,17 +133,6 @@ struct P2PApi { NV_STATUS (*__p2papiUnmapFrom__)(struct P2PApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) NvU32 (*__p2papiGetRefCount__)(struct P2PApi * /*this*/); // virtual inherited (res) base (rmres) void (*__p2papiAddAdditionalDependants__)(struct RsClient *, struct P2PApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) - - // Data members - struct OBJGPU *peer1; - struct OBJGPU *peer2; - NvU32 localGfid; - NvU32 remoteGfid; - NvU32 peerId1; - NvU32 peerId2; - NvU32 egmPeerId1; - NvU32 egmPeerId2; - NvU32 attributes; }; #ifndef __NVOC_CLASS_P2PApi_TYPEDEF__ @@ -155,132 +165,132 @@ NV_STATUS __nvoc_objCreate_P2PApi(P2PApi**, Dynamic*, NvU32, struct CALL_CONTEXT // Wrapper macros -#define p2papiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define p2papiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define p2papiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) p2papiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define p2papiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ +#define p2papiShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define p2papiShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) p2papiShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define p2papiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define p2papiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define p2papiGetMemInterMapParams(pRmResource, pParams) p2papiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define p2papiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define p2papiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define p2papiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) p2papiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define p2papiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define p2papiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define p2papiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) p2papiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define p2papiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define p2papiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define p2papiControlSerialization_Prologue(pResource, pCallContext, pParams) p2papiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define p2papiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define p2papiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define p2papiControlSerialization_Epilogue(pResource, pCallContext, pParams) p2papiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define p2papiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ +#define p2papiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define p2papiControl_Prologue(pResource, pCallContext, pParams) p2papiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define p2papiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define p2papiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define p2papiControl_Epilogue(pResource, pCallContext, pParams) p2papiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define p2papiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define p2papiCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define p2papiCanCopy(pResource) p2papiCanCopy_DISPATCH(pResource) -#define p2papiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define p2papiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define p2papiIsDuplicate(pResource, hMemory, pDuplicate) p2papiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define p2papiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define p2papiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define p2papiPreDestruct(pResource) p2papiPreDestruct_DISPATCH(pResource) -#define p2papiControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define p2papiControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControl__ #define p2papiControl(pResource, pCallContext, pParams) p2papiControl_DISPATCH(pResource, pCallContext, pParams) -#define p2papiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define p2papiControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define p2papiControlFilter(pResource, pCallContext, pParams) p2papiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define p2papiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define p2papiMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define p2papiMap(pResource, pCallContext, pParams, pCpuMapping) p2papiMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define p2papiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define p2papiUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define p2papiUnmap(pResource, pCallContext, pCpuMapping) p2papiUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define p2papiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define p2papiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define p2papiIsPartialUnmapSupported(pResource) p2papiIsPartialUnmapSupported_DISPATCH(pResource) -#define p2papiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define p2papiMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define p2papiMapTo(pResource, pParams) p2papiMapTo_DISPATCH(pResource, pParams) -#define p2papiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define p2papiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define p2papiUnmapFrom(pResource, pParams) p2papiUnmapFrom_DISPATCH(pResource, pParams) -#define p2papiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define p2papiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define p2papiGetRefCount(pResource) p2papiGetRefCount_DISPATCH(pResource) -#define p2papiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define p2papiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define p2papiAddAdditionalDependants(pClient, pResource, pReference) p2papiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool p2papiAccessCallback_DISPATCH(struct P2PApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__p2papiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__p2papiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool p2papiShareCallback_DISPATCH(struct P2PApi *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__p2papiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__p2papiShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS p2papiGetMemInterMapParams_DISPATCH(struct P2PApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__p2papiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__p2papiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS p2papiCheckMemInterUnmap_DISPATCH(struct P2PApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__p2papiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__p2papiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS p2papiGetMemoryMappingDescriptor_DISPATCH(struct P2PApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__p2papiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__p2papiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS p2papiControlSerialization_Prologue_DISPATCH(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__p2papiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__p2papiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void p2papiControlSerialization_Epilogue_DISPATCH(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__p2papiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__p2papiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS p2papiControl_Prologue_DISPATCH(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__p2papiControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__p2papiControl_Prologue__(pResource, pCallContext, pParams); } static inline void p2papiControl_Epilogue_DISPATCH(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__p2papiControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__p2papiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool p2papiCanCopy_DISPATCH(struct P2PApi *pResource) { - return pResource->__p2papiCanCopy__(pResource); + return pResource->__nvoc_vtable->__p2papiCanCopy__(pResource); } static inline NV_STATUS p2papiIsDuplicate_DISPATCH(struct P2PApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__p2papiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__p2papiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void p2papiPreDestruct_DISPATCH(struct P2PApi *pResource) { - pResource->__p2papiPreDestruct__(pResource); + pResource->__nvoc_vtable->__p2papiPreDestruct__(pResource); } static inline NV_STATUS p2papiControl_DISPATCH(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__p2papiControl__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__p2papiControl__(pResource, pCallContext, pParams); } static inline NV_STATUS p2papiControlFilter_DISPATCH(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__p2papiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__p2papiControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS p2papiMap_DISPATCH(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__p2papiMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__p2papiMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS p2papiUnmap_DISPATCH(struct P2PApi *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__p2papiUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__p2papiUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool p2papiIsPartialUnmapSupported_DISPATCH(struct P2PApi *pResource) { - return pResource->__p2papiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__p2papiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS p2papiMapTo_DISPATCH(struct P2PApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__p2papiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__p2papiMapTo__(pResource, pParams); } static inline NV_STATUS p2papiUnmapFrom_DISPATCH(struct P2PApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__p2papiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__p2papiUnmapFrom__(pResource, pParams); } static inline NvU32 p2papiGetRefCount_DISPATCH(struct P2PApi *pResource) { - return pResource->__p2papiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__p2papiGetRefCount__(pResource); } static inline void p2papiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct P2PApi *pResource, RsResourceRef *pReference) { - pResource->__p2papiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__p2papiAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS p2papiConstruct_IMPL(struct P2PApi *arg_pResource, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_phys_mem_nvoc.c b/src/nvidia/generated/g_phys_mem_nvoc.c index aa58c0a216..0ebcb8c401 100644 --- a/src/nvidia/generated/g_phys_mem_nvoc.c +++ b/src/nvidia/generated/g_phys_mem_nvoc.c @@ -93,138 +93,207 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_PhysicalMemory = /*pExportInfo=*/ &__nvoc_export_info_PhysicalMemory }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super +NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super +NvBool __nvoc_down_thunk_PhysicalMemory_resCanCopy(struct RsResource *pPhysicalMemory); // this + // 1 down-thunk(s) defined to bridge methods in PhysicalMemory from superclasses // physmemCanCopy: virtual override (res) base (mem) -static NvBool __nvoc_down_thunk_PhysicalMemory_resCanCopy(struct RsResource *pPhysicalMemory) { +NvBool __nvoc_down_thunk_PhysicalMemory_resCanCopy(struct RsResource *pPhysicalMemory) { return physmemCanCopy((struct PhysicalMemory *)(((unsigned char *) pPhysicalMemory) - __nvoc_rtti_PhysicalMemory_RsResource.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_Memory_physmemIsDuplicate(struct PhysicalMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate); // this +NV_STATUS __nvoc_up_thunk_Memory_physmemGetMapAddrSpace(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_Memory_physmemControl(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_physmemMap(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_physmemUnmap(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_physmemGetMemInterMapParams(struct PhysicalMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_physmemCheckMemInterUnmap(struct PhysicalMemory *pMemory, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_Memory_physmemGetMemoryMappingDescriptor(struct PhysicalMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_Memory_physmemCheckCopyPermissions(struct PhysicalMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // this +NV_STATUS __nvoc_up_thunk_Memory_physmemIsReady(struct PhysicalMemory *pMemory, NvBool bCopyConstructorContext); // this +NvBool __nvoc_up_thunk_Memory_physmemIsGpuMapAllowed(struct PhysicalMemory *pMemory, struct OBJGPU *pGpu); // this +NvBool __nvoc_up_thunk_Memory_physmemIsExportAllowed(struct PhysicalMemory *pMemory); // this +NvBool __nvoc_up_thunk_RmResource_physmemAccessCallback(struct PhysicalMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_physmemShareCallback(struct PhysicalMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_physmemControlSerialization_Prologue(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_physmemControlSerialization_Epilogue(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_physmemControl_Prologue(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_physmemControl_Epilogue(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RsResource_physmemPreDestruct(struct PhysicalMemory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_physmemControlFilter(struct PhysicalMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_physmemIsPartialUnmapSupported(struct PhysicalMemory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_physmemMapTo(struct PhysicalMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_physmemUnmapFrom(struct PhysicalMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_physmemGetRefCount(struct PhysicalMemory *pResource); // this +void __nvoc_up_thunk_RsResource_physmemAddAdditionalDependants(struct RsClient *pClient, struct PhysicalMemory *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in PhysicalMemory to superclasses // physmemIsDuplicate: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_physmemIsDuplicate(struct PhysicalMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_Memory_physmemIsDuplicate(struct PhysicalMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), hMemory, pDuplicate); } // physmemGetMapAddrSpace: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_physmemGetMapAddrSpace(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_Memory_physmemGetMapAddrSpace(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); } // physmemControl: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_physmemControl(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_physmemControl(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), pCallContext, pParams); } // physmemMap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_physmemMap(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_physmemMap(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), pCallContext, pParams, pCpuMapping); } // physmemUnmap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_physmemUnmap(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_physmemUnmap(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), pCallContext, pCpuMapping); } // physmemGetMemInterMapParams: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_physmemGetMemInterMapParams(struct PhysicalMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_physmemGetMemInterMapParams(struct PhysicalMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), pParams); } // physmemCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_physmemCheckMemInterUnmap(struct PhysicalMemory *pMemory, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_Memory_physmemCheckMemInterUnmap(struct PhysicalMemory *pMemory, NvBool bSubdeviceHandleProvided) { return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), bSubdeviceHandleProvided); } // physmemGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_physmemGetMemoryMappingDescriptor(struct PhysicalMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_Memory_physmemGetMemoryMappingDescriptor(struct PhysicalMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), ppMemDesc); } // physmemCheckCopyPermissions: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_physmemCheckCopyPermissions(struct PhysicalMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { +NV_STATUS __nvoc_up_thunk_Memory_physmemCheckCopyPermissions(struct PhysicalMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), pDstGpu, pDstDevice); } // physmemIsReady: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_physmemIsReady(struct PhysicalMemory *pMemory, NvBool bCopyConstructorContext) { +NV_STATUS __nvoc_up_thunk_Memory_physmemIsReady(struct PhysicalMemory *pMemory, NvBool bCopyConstructorContext) { return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), bCopyConstructorContext); } // physmemIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_physmemIsGpuMapAllowed(struct PhysicalMemory *pMemory, struct OBJGPU *pGpu) { +NvBool __nvoc_up_thunk_Memory_physmemIsGpuMapAllowed(struct PhysicalMemory *pMemory, struct OBJGPU *pGpu) { return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset), pGpu); } // physmemIsExportAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_physmemIsExportAllowed(struct PhysicalMemory *pMemory) { +NvBool __nvoc_up_thunk_Memory_physmemIsExportAllowed(struct PhysicalMemory *pMemory) { return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_PhysicalMemory_Memory.offset)); } // physmemAccessCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_physmemAccessCallback(struct PhysicalMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_physmemAccessCallback(struct PhysicalMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // physmemShareCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_physmemShareCallback(struct PhysicalMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_physmemShareCallback(struct PhysicalMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // physmemControlSerialization_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_physmemControlSerialization_Prologue(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_physmemControlSerialization_Prologue(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RmResource.offset), pCallContext, pParams); } // physmemControlSerialization_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_physmemControlSerialization_Epilogue(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_physmemControlSerialization_Epilogue(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RmResource.offset), pCallContext, pParams); } // physmemControl_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_physmemControl_Prologue(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_physmemControl_Prologue(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RmResource.offset), pCallContext, pParams); } // physmemControl_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_physmemControl_Epilogue(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_physmemControl_Epilogue(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RmResource.offset), pCallContext, pParams); } // physmemPreDestruct: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_physmemPreDestruct(struct PhysicalMemory *pResource) { +void __nvoc_up_thunk_RsResource_physmemPreDestruct(struct PhysicalMemory *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RsResource.offset)); } // physmemControlFilter: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_physmemControlFilter(struct PhysicalMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_physmemControlFilter(struct PhysicalMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RsResource.offset), pCallContext, pParams); } // physmemIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body -static NvBool __nvoc_up_thunk_RsResource_physmemIsPartialUnmapSupported(struct PhysicalMemory *pResource) { +NvBool __nvoc_up_thunk_RsResource_physmemIsPartialUnmapSupported(struct PhysicalMemory *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RsResource.offset)); } // physmemMapTo: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_physmemMapTo(struct PhysicalMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_physmemMapTo(struct PhysicalMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RsResource.offset), pParams); } // physmemUnmapFrom: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_physmemUnmapFrom(struct PhysicalMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_physmemUnmapFrom(struct PhysicalMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RsResource.offset), pParams); } // physmemGetRefCount: virtual inherited (res) base (mem) -static NvU32 __nvoc_up_thunk_RsResource_physmemGetRefCount(struct PhysicalMemory *pResource) { +NvU32 __nvoc_up_thunk_RsResource_physmemGetRefCount(struct PhysicalMemory *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RsResource.offset)); } // physmemAddAdditionalDependants: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_physmemAddAdditionalDependants(struct RsClient *pClient, struct PhysicalMemory *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_physmemAddAdditionalDependants(struct RsClient *pClient, struct PhysicalMemory *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_PhysicalMemory_RsResource.offset), pReference); } @@ -267,92 +336,112 @@ NV_STATUS __nvoc_ctor_PhysicalMemory(PhysicalMemory *pThis, CALL_CONTEXT * arg_p // Vtable initialization static void __nvoc_init_funcTable_PhysicalMemory_1(PhysicalMemory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // physmemCanCopy -- virtual override (res) base (mem) - pThis->__physmemCanCopy__ = &physmemCanCopy_IMPL; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_PhysicalMemory_resCanCopy; - - // physmemIsDuplicate -- virtual inherited (mem) base (mem) - pThis->__physmemIsDuplicate__ = &__nvoc_up_thunk_Memory_physmemIsDuplicate; - - // physmemGetMapAddrSpace -- virtual inherited (mem) base (mem) - pThis->__physmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_physmemGetMapAddrSpace; - - // physmemControl -- virtual inherited (mem) base (mem) - pThis->__physmemControl__ = &__nvoc_up_thunk_Memory_physmemControl; - - // physmemMap -- virtual inherited (mem) base (mem) - pThis->__physmemMap__ = &__nvoc_up_thunk_Memory_physmemMap; - - // physmemUnmap -- virtual inherited (mem) base (mem) - pThis->__physmemUnmap__ = &__nvoc_up_thunk_Memory_physmemUnmap; - - // physmemGetMemInterMapParams -- virtual inherited (mem) base (mem) - pThis->__physmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_physmemGetMemInterMapParams; - - // physmemCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body - pThis->__physmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_physmemCheckMemInterUnmap; - - // physmemGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) - pThis->__physmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_physmemGetMemoryMappingDescriptor; - - // physmemCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body - pThis->__physmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_physmemCheckCopyPermissions; - - // physmemIsReady -- virtual inherited (mem) base (mem) - pThis->__physmemIsReady__ = &__nvoc_up_thunk_Memory_physmemIsReady; - - // physmemIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__physmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_physmemIsGpuMapAllowed; - - // physmemIsExportAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__physmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_physmemIsExportAllowed; - - // physmemAccessCallback -- virtual inherited (rmres) base (mem) - pThis->__physmemAccessCallback__ = &__nvoc_up_thunk_RmResource_physmemAccessCallback; - - // physmemShareCallback -- virtual inherited (rmres) base (mem) - pThis->__physmemShareCallback__ = &__nvoc_up_thunk_RmResource_physmemShareCallback; - - // physmemControlSerialization_Prologue -- virtual inherited (rmres) base (mem) - pThis->__physmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_physmemControlSerialization_Prologue; - - // physmemControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__physmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_physmemControlSerialization_Epilogue; - - // physmemControl_Prologue -- virtual inherited (rmres) base (mem) - pThis->__physmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_physmemControl_Prologue; - - // physmemControl_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__physmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_physmemControl_Epilogue; - - // physmemPreDestruct -- virtual inherited (res) base (mem) - pThis->__physmemPreDestruct__ = &__nvoc_up_thunk_RsResource_physmemPreDestruct; - - // physmemControlFilter -- virtual inherited (res) base (mem) - pThis->__physmemControlFilter__ = &__nvoc_up_thunk_RsResource_physmemControlFilter; - - // physmemIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body - pThis->__physmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_physmemIsPartialUnmapSupported; - - // physmemMapTo -- virtual inherited (res) base (mem) - pThis->__physmemMapTo__ = &__nvoc_up_thunk_RsResource_physmemMapTo; - - // physmemUnmapFrom -- virtual inherited (res) base (mem) - pThis->__physmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_physmemUnmapFrom; - - // physmemGetRefCount -- virtual inherited (res) base (mem) - pThis->__physmemGetRefCount__ = &__nvoc_up_thunk_RsResource_physmemGetRefCount; - - // physmemAddAdditionalDependants -- virtual inherited (res) base (mem) - pThis->__physmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_physmemAddAdditionalDependants; -} // End __nvoc_init_funcTable_PhysicalMemory_1 with approximately 27 basic block(s). +} // End __nvoc_init_funcTable_PhysicalMemory_1 // Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_PhysicalMemory(PhysicalMemory *pThis) { - // Initialize vtable(s) with 26 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__PhysicalMemory vtable = { + .__physmemCanCopy__ = &physmemCanCopy_IMPL, // virtual override (res) base (mem) + .Memory.__memCanCopy__ = &__nvoc_up_thunk_RsResource_memCanCopy, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_PhysicalMemory_resCanCopy, // virtual + .__physmemIsDuplicate__ = &__nvoc_up_thunk_Memory_physmemIsDuplicate, // virtual inherited (mem) base (mem) + .Memory.__memIsDuplicate__ = &memIsDuplicate_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resIsDuplicate__ = &__nvoc_down_thunk_Memory_resIsDuplicate, // virtual + .__physmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_physmemGetMapAddrSpace, // virtual inherited (mem) base (mem) + .Memory.__memGetMapAddrSpace__ = &memGetMapAddrSpace_IMPL, // virtual + .__physmemControl__ = &__nvoc_up_thunk_Memory_physmemControl, // virtual inherited (mem) base (mem) + .Memory.__memControl__ = &memControl_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_Memory_resControl, // virtual + .__physmemMap__ = &__nvoc_up_thunk_Memory_physmemMap, // virtual inherited (mem) base (mem) + .Memory.__memMap__ = &memMap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_Memory_resMap, // virtual + .__physmemUnmap__ = &__nvoc_up_thunk_Memory_physmemUnmap, // virtual inherited (mem) base (mem) + .Memory.__memUnmap__ = &memUnmap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_Memory_resUnmap, // virtual + .__physmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_physmemGetMemInterMapParams, // virtual inherited (mem) base (mem) + .Memory.__memGetMemInterMapParams__ = &memGetMemInterMapParams_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_Memory_rmresGetMemInterMapParams, // virtual + .__physmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_physmemCheckMemInterUnmap, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckMemInterUnmap__ = &memCheckMemInterUnmap_ac1694, // inline virtual override (rmres) base (rmres) body + .Memory.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_Memory_rmresCheckMemInterUnmap, // virtual + .__physmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_physmemGetMemoryMappingDescriptor, // virtual inherited (mem) base (mem) + .Memory.__memGetMemoryMappingDescriptor__ = &memGetMemoryMappingDescriptor_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor, // virtual + .__physmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_physmemCheckCopyPermissions, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckCopyPermissions__ = &memCheckCopyPermissions_ac1694, // inline virtual body + .__physmemIsReady__ = &__nvoc_up_thunk_Memory_physmemIsReady, // virtual inherited (mem) base (mem) + .Memory.__memIsReady__ = &memIsReady_IMPL, // virtual + .__physmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_physmemIsGpuMapAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsGpuMapAllowed__ = &memIsGpuMapAllowed_e661f0, // inline virtual body + .__physmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_physmemIsExportAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsExportAllowed__ = &memIsExportAllowed_e661f0, // inline virtual body + .__physmemAccessCallback__ = &__nvoc_up_thunk_RmResource_physmemAccessCallback, // virtual inherited (rmres) base (mem) + .Memory.__memAccessCallback__ = &__nvoc_up_thunk_RmResource_memAccessCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__physmemShareCallback__ = &__nvoc_up_thunk_RmResource_physmemShareCallback, // virtual inherited (rmres) base (mem) + .Memory.__memShareCallback__ = &__nvoc_up_thunk_RmResource_memShareCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__physmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_physmemControlSerialization_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__physmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_physmemControlSerialization_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__physmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_physmemControl_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Prologue__ = &__nvoc_up_thunk_RmResource_memControl_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__physmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_physmemControl_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memControl_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__physmemPreDestruct__ = &__nvoc_up_thunk_RsResource_physmemPreDestruct, // virtual inherited (res) base (mem) + .Memory.__memPreDestruct__ = &__nvoc_up_thunk_RsResource_memPreDestruct, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__physmemControlFilter__ = &__nvoc_up_thunk_RsResource_physmemControlFilter, // virtual inherited (res) base (mem) + .Memory.__memControlFilter__ = &__nvoc_up_thunk_RsResource_memControlFilter, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__physmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_physmemIsPartialUnmapSupported, // inline virtual inherited (res) base (mem) body + .Memory.__memIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .Memory.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .Memory.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__physmemMapTo__ = &__nvoc_up_thunk_RsResource_physmemMapTo, // virtual inherited (res) base (mem) + .Memory.__memMapTo__ = &__nvoc_up_thunk_RsResource_memMapTo, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__physmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_physmemUnmapFrom, // virtual inherited (res) base (mem) + .Memory.__memUnmapFrom__ = &__nvoc_up_thunk_RsResource_memUnmapFrom, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__physmemGetRefCount__ = &__nvoc_up_thunk_RsResource_physmemGetRefCount, // virtual inherited (res) base (mem) + .Memory.__memGetRefCount__ = &__nvoc_up_thunk_RsResource_memGetRefCount, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__physmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_physmemAddAdditionalDependants, // virtual inherited (res) base (mem) + .Memory.__memAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memAddAdditionalDependants, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.Memory.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable = &vtable.Memory.RmResource; // (rmres) super^2 + pThis->__nvoc_base_Memory.__nvoc_vtable = &vtable.Memory; // (mem) super + pThis->__nvoc_vtable = &vtable; // (physmem) this __nvoc_init_funcTable_PhysicalMemory_1(pThis); } diff --git a/src/nvidia/generated/g_phys_mem_nvoc.h b/src/nvidia/generated/g_phys_mem_nvoc.h index cbb7800693..2d2821993f 100644 --- a/src/nvidia/generated/g_phys_mem_nvoc.h +++ b/src/nvidia/generated/g_phys_mem_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -60,10 +60,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__PhysicalMemory; + + struct PhysicalMemory { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__PhysicalMemory *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; @@ -75,8 +80,13 @@ struct PhysicalMemory { struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 struct Memory *__nvoc_pbase_Memory; // mem super struct PhysicalMemory *__nvoc_pbase_PhysicalMemory; // physmem +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__PhysicalMemory { + const struct NVOC_VTABLE__Memory Memory; // (mem) 26 function pointers - // Vtable with 26 per-object function pointers NvBool (*__physmemCanCopy__)(struct PhysicalMemory * /*this*/); // virtual override (res) base (mem) NV_STATUS (*__physmemIsDuplicate__)(struct PhysicalMemory * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) NV_STATUS (*__physmemGetMapAddrSpace__)(struct PhysicalMemory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (mem) @@ -135,162 +145,162 @@ NV_STATUS __nvoc_objCreate_PhysicalMemory(PhysicalMemory**, Dynamic*, NvU32, CAL // Wrapper macros -#define physmemCanCopy_FNPTR(pPhysicalMemory) pPhysicalMemory->__physmemCanCopy__ +#define physmemCanCopy_FNPTR(pPhysicalMemory) pPhysicalMemory->__nvoc_vtable->__physmemCanCopy__ #define physmemCanCopy(pPhysicalMemory) physmemCanCopy_DISPATCH(pPhysicalMemory) -#define physmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define physmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsDuplicate__ #define physmemIsDuplicate(pMemory, hMemory, pDuplicate) physmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define physmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ +#define physmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMapAddrSpace__ #define physmemGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) physmemGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define physmemControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ +#define physmemControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memControl__ #define physmemControl(pMemory, pCallContext, pParams) physmemControl_DISPATCH(pMemory, pCallContext, pParams) -#define physmemMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define physmemMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memMap__ #define physmemMap(pMemory, pCallContext, pParams, pCpuMapping) physmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define physmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ +#define physmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memUnmap__ #define physmemUnmap(pMemory, pCallContext, pCpuMapping) physmemUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define physmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ +#define physmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemInterMapParams__ #define physmemGetMemInterMapParams(pMemory, pParams) physmemGetMemInterMapParams_DISPATCH(pMemory, pParams) -#define physmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define physmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckMemInterUnmap__ #define physmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) physmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define physmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ +#define physmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemoryMappingDescriptor__ #define physmemGetMemoryMappingDescriptor(pMemory, ppMemDesc) physmemGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define physmemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ +#define physmemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckCopyPermissions__ #define physmemCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) physmemCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define physmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define physmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsReady__ #define physmemIsReady(pMemory, bCopyConstructorContext) physmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) -#define physmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define physmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsGpuMapAllowed__ #define physmemIsGpuMapAllowed(pMemory, pGpu) physmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define physmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define physmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsExportAllowed__ #define physmemIsExportAllowed(pMemory) physmemIsExportAllowed_DISPATCH(pMemory) -#define physmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define physmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define physmemAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) physmemAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define physmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define physmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define physmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) physmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define physmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define physmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define physmemControlSerialization_Prologue(pResource, pCallContext, pParams) physmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define physmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define physmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define physmemControlSerialization_Epilogue(pResource, pCallContext, pParams) physmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define physmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define physmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define physmemControl_Prologue(pResource, pCallContext, pParams) physmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define physmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define physmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define physmemControl_Epilogue(pResource, pCallContext, pParams) physmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define physmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define physmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define physmemPreDestruct(pResource) physmemPreDestruct_DISPATCH(pResource) -#define physmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define physmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define physmemControlFilter(pResource, pCallContext, pParams) physmemControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define physmemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define physmemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define physmemIsPartialUnmapSupported(pResource) physmemIsPartialUnmapSupported_DISPATCH(pResource) -#define physmemMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define physmemMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define physmemMapTo(pResource, pParams) physmemMapTo_DISPATCH(pResource, pParams) -#define physmemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define physmemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define physmemUnmapFrom(pResource, pParams) physmemUnmapFrom_DISPATCH(pResource, pParams) -#define physmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define physmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define physmemGetRefCount(pResource) physmemGetRefCount_DISPATCH(pResource) -#define physmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define physmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define physmemAddAdditionalDependants(pClient, pResource, pReference) physmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool physmemCanCopy_DISPATCH(struct PhysicalMemory *pPhysicalMemory) { - return pPhysicalMemory->__physmemCanCopy__(pPhysicalMemory); + return pPhysicalMemory->__nvoc_vtable->__physmemCanCopy__(pPhysicalMemory); } static inline NV_STATUS physmemIsDuplicate_DISPATCH(struct PhysicalMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__physmemIsDuplicate__(pMemory, hMemory, pDuplicate); + return pMemory->__nvoc_vtable->__physmemIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS physmemGetMapAddrSpace_DISPATCH(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pMemory->__physmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); + return pMemory->__nvoc_vtable->__physmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS physmemControl_DISPATCH(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__physmemControl__(pMemory, pCallContext, pParams); + return pMemory->__nvoc_vtable->__physmemControl__(pMemory, pCallContext, pParams); } static inline NV_STATUS physmemMap_DISPATCH(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__physmemMap__(pMemory, pCallContext, pParams, pCpuMapping); + return pMemory->__nvoc_vtable->__physmemMap__(pMemory, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS physmemUnmap_DISPATCH(struct PhysicalMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__physmemUnmap__(pMemory, pCallContext, pCpuMapping); + return pMemory->__nvoc_vtable->__physmemUnmap__(pMemory, pCallContext, pCpuMapping); } static inline NV_STATUS physmemGetMemInterMapParams_DISPATCH(struct PhysicalMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__physmemGetMemInterMapParams__(pMemory, pParams); + return pMemory->__nvoc_vtable->__physmemGetMemInterMapParams__(pMemory, pParams); } static inline NV_STATUS physmemCheckMemInterUnmap_DISPATCH(struct PhysicalMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__physmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); + return pMemory->__nvoc_vtable->__physmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } static inline NV_STATUS physmemGetMemoryMappingDescriptor_DISPATCH(struct PhysicalMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__physmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); + return pMemory->__nvoc_vtable->__physmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } static inline NV_STATUS physmemCheckCopyPermissions_DISPATCH(struct PhysicalMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__physmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); + return pMemory->__nvoc_vtable->__physmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } static inline NV_STATUS physmemIsReady_DISPATCH(struct PhysicalMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__physmemIsReady__(pMemory, bCopyConstructorContext); + return pMemory->__nvoc_vtable->__physmemIsReady__(pMemory, bCopyConstructorContext); } static inline NvBool physmemIsGpuMapAllowed_DISPATCH(struct PhysicalMemory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__physmemIsGpuMapAllowed__(pMemory, pGpu); + return pMemory->__nvoc_vtable->__physmemIsGpuMapAllowed__(pMemory, pGpu); } static inline NvBool physmemIsExportAllowed_DISPATCH(struct PhysicalMemory *pMemory) { - return pMemory->__physmemIsExportAllowed__(pMemory); + return pMemory->__nvoc_vtable->__physmemIsExportAllowed__(pMemory); } static inline NvBool physmemAccessCallback_DISPATCH(struct PhysicalMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__physmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__physmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool physmemShareCallback_DISPATCH(struct PhysicalMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__physmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__physmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS physmemControlSerialization_Prologue_DISPATCH(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__physmemControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__physmemControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void physmemControlSerialization_Epilogue_DISPATCH(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__physmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__physmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS physmemControl_Prologue_DISPATCH(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__physmemControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__physmemControl_Prologue__(pResource, pCallContext, pParams); } static inline void physmemControl_Epilogue_DISPATCH(struct PhysicalMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__physmemControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__physmemControl_Epilogue__(pResource, pCallContext, pParams); } static inline void physmemPreDestruct_DISPATCH(struct PhysicalMemory *pResource) { - pResource->__physmemPreDestruct__(pResource); + pResource->__nvoc_vtable->__physmemPreDestruct__(pResource); } static inline NV_STATUS physmemControlFilter_DISPATCH(struct PhysicalMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__physmemControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__physmemControlFilter__(pResource, pCallContext, pParams); } static inline NvBool physmemIsPartialUnmapSupported_DISPATCH(struct PhysicalMemory *pResource) { - return pResource->__physmemIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__physmemIsPartialUnmapSupported__(pResource); } static inline NV_STATUS physmemMapTo_DISPATCH(struct PhysicalMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__physmemMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__physmemMapTo__(pResource, pParams); } static inline NV_STATUS physmemUnmapFrom_DISPATCH(struct PhysicalMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__physmemUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__physmemUnmapFrom__(pResource, pParams); } static inline NvU32 physmemGetRefCount_DISPATCH(struct PhysicalMemory *pResource) { - return pResource->__physmemGetRefCount__(pResource); + return pResource->__nvoc_vtable->__physmemGetRefCount__(pResource); } static inline void physmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct PhysicalMemory *pResource, RsResourceRef *pReference) { - pResource->__physmemAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__physmemAddAdditionalDependants__(pClient, pResource, pReference); } NvBool physmemCanCopy_IMPL(struct PhysicalMemory *pPhysicalMemory); diff --git a/src/nvidia/generated/g_platform_nvoc.c b/src/nvidia/generated/g_platform_nvoc.c index 7370f08ad5..5996236ce2 100644 --- a/src/nvidia/generated/g_platform_nvoc.c +++ b/src/nvidia/generated/g_platform_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJPFM = /*pExportInfo=*/ &__nvoc_export_info_OBJPFM }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJPFM = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_platform_nvoc.h b/src/nvidia/generated/g_platform_nvoc.h index f0118cf3ea..79ab2c322b 100644 --- a/src/nvidia/generated/g_platform_nvoc.h +++ b/src/nvidia/generated/g_platform_nvoc.h @@ -7,14 +7,14 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -42,19 +42,6 @@ extern "C" { #ifndef _PLATFORM_H_ #define _PLATFORM_H_ -typedef struct OBJPFM *POBJPFM; - -#ifndef __NVOC_CLASS_OBJPFM_TYPEDEF__ -#define __NVOC_CLASS_OBJPFM_TYPEDEF__ -typedef struct OBJPFM OBJPFM; -#endif /* __NVOC_CLASS_OBJPFM_TYPEDEF__ */ - -#ifndef __nvoc_class_id_OBJPFM -#define __nvoc_class_id_OBJPFM 0xb543ae -#endif /* __nvoc_class_id_OBJPFM */ - - - #include "nvoc/runtime.h" #include "nvlimits.h" // NV_MAX_DEVICES #include "ctrl/ctrl0073/ctrl0073specific.h" // NV0073_CTRL_SPECIFIC_MAX_ACPI_DEVICES diff --git a/src/nvidia/generated/g_platform_request_handler_nvoc.c b/src/nvidia/generated/g_platform_request_handler_nvoc.c index 70a94693bc..a3ae535f44 100644 --- a/src/nvidia/generated/g_platform_request_handler_nvoc.c +++ b/src/nvidia/generated/g_platform_request_handler_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_PlatformRequestHandler = /*pExportInfo=*/ &__nvoc_export_info_PlatformRequestHandler }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_PlatformRequestHandler = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_platform_request_handler_nvoc.h b/src/nvidia/generated/g_platform_request_handler_nvoc.h index 826891c139..3fb718c124 100644 --- a/src/nvidia/generated/g_platform_request_handler_nvoc.h +++ b/src/nvidia/generated/g_platform_request_handler_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_prereq_tracker_nvoc.c b/src/nvidia/generated/g_prereq_tracker_nvoc.c index fd09dc65cd..d9d8a01c95 100644 --- a/src/nvidia/generated/g_prereq_tracker_nvoc.c +++ b/src/nvidia/generated/g_prereq_tracker_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_PrereqTracker = /*pExportInfo=*/ &__nvoc_export_info_PrereqTracker }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_PrereqTracker = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_prereq_tracker_nvoc.h b/src/nvidia/generated/g_prereq_tracker_nvoc.h index 020a6b2e01..c8529b8af3 100644 --- a/src/nvidia/generated/g_prereq_tracker_nvoc.h +++ b/src/nvidia/generated/g_prereq_tracker_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_profiler_v1_nvoc.c b/src/nvidia/generated/g_profiler_v1_nvoc.c index ea6f1ac708..9c3612e9e1 100644 --- a/src/nvidia/generated/g_profiler_v1_nvoc.c +++ b/src/nvidia/generated/g_profiler_v1_nvoc.c @@ -177,133 +177,201 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_Profiler_gpuresControl(struct GpuResource *pProfiler, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this + // 1 down-thunk(s) defined to bridge methods in Profiler from superclasses // profilerControl: virtual override (res) base (gpures) -static NV_STATUS __nvoc_down_thunk_Profiler_gpuresControl(struct GpuResource *pProfiler, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_down_thunk_Profiler_gpuresControl(struct GpuResource *pProfiler, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return profilerControl((struct Profiler *)(((unsigned char *) pProfiler) - __nvoc_rtti_Profiler_GpuResource.offset), pCallContext, pParams); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_profilerMap(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_profilerUnmap(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_profilerShareCallback(struct Profiler *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_profilerGetRegBaseOffsetAndSize(struct Profiler *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_profilerGetMapAddrSpace(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_profilerInternalControlForward(struct Profiler *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_profilerGetInternalObjectHandle(struct Profiler *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_profilerAccessCallback(struct Profiler *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_profilerGetMemInterMapParams(struct Profiler *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_profilerCheckMemInterUnmap(struct Profiler *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_profilerGetMemoryMappingDescriptor(struct Profiler *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_profilerControlSerialization_Prologue(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_profilerControlSerialization_Epilogue(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_profilerControl_Prologue(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_profilerControl_Epilogue(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_profilerCanCopy(struct Profiler *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_profilerIsDuplicate(struct Profiler *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_profilerPreDestruct(struct Profiler *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_profilerControlFilter(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_profilerIsPartialUnmapSupported(struct Profiler *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_profilerMapTo(struct Profiler *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_profilerUnmapFrom(struct Profiler *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_profilerGetRefCount(struct Profiler *pResource); // this +void __nvoc_up_thunk_RsResource_profilerAddAdditionalDependants(struct RsClient *pClient, struct Profiler *pResource, RsResourceRef *pReference); // this + // 24 up-thunk(s) defined to bridge methods in Profiler to superclasses // profilerMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_profilerMap(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_profilerMap(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Profiler_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // profilerUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_profilerUnmap(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_profilerUnmap(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Profiler_GpuResource.offset), pCallContext, pCpuMapping); } // profilerShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_profilerShareCallback(struct Profiler *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_profilerShareCallback(struct Profiler *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Profiler_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // profilerGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_profilerGetRegBaseOffsetAndSize(struct Profiler *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_profilerGetRegBaseOffsetAndSize(struct Profiler *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Profiler_GpuResource.offset), pGpu, pOffset, pSize); } // profilerGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_profilerGetMapAddrSpace(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_profilerGetMapAddrSpace(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Profiler_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // profilerInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_profilerInternalControlForward(struct Profiler *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_profilerInternalControlForward(struct Profiler *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Profiler_GpuResource.offset), command, pParams, size); } // profilerGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_profilerGetInternalObjectHandle(struct Profiler *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_profilerGetInternalObjectHandle(struct Profiler *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Profiler_GpuResource.offset)); } // profilerAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_profilerAccessCallback(struct Profiler *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_profilerAccessCallback(struct Profiler *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // profilerGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_profilerGetMemInterMapParams(struct Profiler *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_profilerGetMemInterMapParams(struct Profiler *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Profiler_RmResource.offset), pParams); } // profilerCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_profilerCheckMemInterUnmap(struct Profiler *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_profilerCheckMemInterUnmap(struct Profiler *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Profiler_RmResource.offset), bSubdeviceHandleProvided); } // profilerGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_profilerGetMemoryMappingDescriptor(struct Profiler *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_profilerGetMemoryMappingDescriptor(struct Profiler *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Profiler_RmResource.offset), ppMemDesc); } // profilerControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_profilerControlSerialization_Prologue(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_profilerControlSerialization_Prologue(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RmResource.offset), pCallContext, pParams); } // profilerControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_profilerControlSerialization_Epilogue(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_profilerControlSerialization_Epilogue(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RmResource.offset), pCallContext, pParams); } // profilerControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_profilerControl_Prologue(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_profilerControl_Prologue(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RmResource.offset), pCallContext, pParams); } // profilerControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_profilerControl_Epilogue(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_profilerControl_Epilogue(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RmResource.offset), pCallContext, pParams); } // profilerCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_profilerCanCopy(struct Profiler *pResource) { +NvBool __nvoc_up_thunk_RsResource_profilerCanCopy(struct Profiler *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RsResource.offset)); } // profilerIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_profilerIsDuplicate(struct Profiler *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_profilerIsDuplicate(struct Profiler *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RsResource.offset), hMemory, pDuplicate); } // profilerPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_profilerPreDestruct(struct Profiler *pResource) { +void __nvoc_up_thunk_RsResource_profilerPreDestruct(struct Profiler *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RsResource.offset)); } // profilerControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_profilerControlFilter(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_profilerControlFilter(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RsResource.offset), pCallContext, pParams); } // profilerIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_profilerIsPartialUnmapSupported(struct Profiler *pResource) { +NvBool __nvoc_up_thunk_RsResource_profilerIsPartialUnmapSupported(struct Profiler *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RsResource.offset)); } // profilerMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_profilerMapTo(struct Profiler *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_profilerMapTo(struct Profiler *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RsResource.offset), pParams); } // profilerUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_profilerUnmapFrom(struct Profiler *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_profilerUnmapFrom(struct Profiler *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RsResource.offset), pParams); } // profilerGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_profilerGetRefCount(struct Profiler *pResource) { +NvU32 __nvoc_up_thunk_RsResource_profilerGetRefCount(struct Profiler *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RsResource.offset)); } // profilerAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_profilerAddAdditionalDependants(struct RsClient *pClient, struct Profiler *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_profilerAddAdditionalDependants(struct RsClient *pClient, struct Profiler *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Profiler_RsResource.offset), pReference); } @@ -358,10 +426,6 @@ static void __nvoc_init_funcTable_Profiler_1(Profiler *pThis, RmHalspecOwner *pR PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // profilerControl -- virtual override (res) base (gpures) - pThis->__profilerControl__ = &profilerControl_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresControl__ = &__nvoc_down_thunk_Profiler_gpuresControl; - // profilerCtrlCmdProfilerReserveHwpm -- exported (id=0x90cc0101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__profilerCtrlCmdProfilerReserveHwpm__ = &profilerCtrlCmdProfilerReserveHwpm_IMPL; @@ -386,85 +450,122 @@ static void __nvoc_init_funcTable_Profiler_1(Profiler *pThis, RmHalspecOwner *pR #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__profilerCtrlCmdProfilerReleaseCgControls__ = &profilerCtrlCmdProfilerReleaseCgControls_IMPL; #endif - - // profilerMap -- virtual inherited (gpures) base (gpures) - pThis->__profilerMap__ = &__nvoc_up_thunk_GpuResource_profilerMap; - - // profilerUnmap -- virtual inherited (gpures) base (gpures) - pThis->__profilerUnmap__ = &__nvoc_up_thunk_GpuResource_profilerUnmap; - - // profilerShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__profilerShareCallback__ = &__nvoc_up_thunk_GpuResource_profilerShareCallback; - - // profilerGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__profilerGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_profilerGetRegBaseOffsetAndSize; - - // profilerGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__profilerGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_profilerGetMapAddrSpace; - - // profilerInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__profilerInternalControlForward__ = &__nvoc_up_thunk_GpuResource_profilerInternalControlForward; - - // profilerGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__profilerGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_profilerGetInternalObjectHandle; - - // profilerAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__profilerAccessCallback__ = &__nvoc_up_thunk_RmResource_profilerAccessCallback; - - // profilerGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__profilerGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_profilerGetMemInterMapParams; - - // profilerCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__profilerCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_profilerCheckMemInterUnmap; - - // profilerGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__profilerGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_profilerGetMemoryMappingDescriptor; - - // profilerControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__profilerControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_profilerControlSerialization_Prologue; - - // profilerControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__profilerControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerControlSerialization_Epilogue; - - // profilerControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__profilerControl_Prologue__ = &__nvoc_up_thunk_RmResource_profilerControl_Prologue; - - // profilerControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__profilerControl_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerControl_Epilogue; - - // profilerCanCopy -- virtual inherited (res) base (gpures) - pThis->__profilerCanCopy__ = &__nvoc_up_thunk_RsResource_profilerCanCopy; - - // profilerIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__profilerIsDuplicate__ = &__nvoc_up_thunk_RsResource_profilerIsDuplicate; - - // profilerPreDestruct -- virtual inherited (res) base (gpures) - pThis->__profilerPreDestruct__ = &__nvoc_up_thunk_RsResource_profilerPreDestruct; - - // profilerControlFilter -- virtual inherited (res) base (gpures) - pThis->__profilerControlFilter__ = &__nvoc_up_thunk_RsResource_profilerControlFilter; - - // profilerIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__profilerIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_profilerIsPartialUnmapSupported; - - // profilerMapTo -- virtual inherited (res) base (gpures) - pThis->__profilerMapTo__ = &__nvoc_up_thunk_RsResource_profilerMapTo; - - // profilerUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__profilerUnmapFrom__ = &__nvoc_up_thunk_RsResource_profilerUnmapFrom; - - // profilerGetRefCount -- virtual inherited (res) base (gpures) - pThis->__profilerGetRefCount__ = &__nvoc_up_thunk_RsResource_profilerGetRefCount; - - // profilerAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__profilerAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_profilerAddAdditionalDependants; -} // End __nvoc_init_funcTable_Profiler_1 with approximately 31 basic block(s). +} // End __nvoc_init_funcTable_Profiler_1 with approximately 5 basic block(s). // Initialize vtable(s) for 30 virtual method(s). void __nvoc_init_funcTable_Profiler(Profiler *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 30 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__Profiler vtable = { + .__profilerControl__ = &profilerControl_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresControl__ = &__nvoc_down_thunk_Profiler_gpuresControl, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif + .__profilerMap__ = &__nvoc_up_thunk_GpuResource_profilerMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__profilerUnmap__ = &__nvoc_up_thunk_GpuResource_profilerUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__profilerShareCallback__ = &__nvoc_up_thunk_GpuResource_profilerShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__profilerGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_profilerGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__profilerGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_profilerGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__profilerInternalControlForward__ = &__nvoc_up_thunk_GpuResource_profilerInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__profilerGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_profilerGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__profilerAccessCallback__ = &__nvoc_up_thunk_RmResource_profilerAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__profilerGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_profilerGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__profilerCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_profilerCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__profilerGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_profilerGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__profilerControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_profilerControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__profilerControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__profilerControl_Prologue__ = &__nvoc_up_thunk_RmResource_profilerControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__profilerControl_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__profilerCanCopy__ = &__nvoc_up_thunk_RsResource_profilerCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__profilerIsDuplicate__ = &__nvoc_up_thunk_RsResource_profilerIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__profilerPreDestruct__ = &__nvoc_up_thunk_RsResource_profilerPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__profilerControlFilter__ = &__nvoc_up_thunk_RsResource_profilerControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__profilerIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_profilerIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__profilerMapTo__ = &__nvoc_up_thunk_RsResource_profilerMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__profilerUnmapFrom__ = &__nvoc_up_thunk_RsResource_profilerUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__profilerGetRefCount__ = &__nvoc_up_thunk_RsResource_profilerGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__profilerAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_profilerAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (profiler) this + + // Initialize vtable(s) with 5 per-object function pointer(s). __nvoc_init_funcTable_Profiler_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_profiler_v1_nvoc.h b/src/nvidia/generated/g_profiler_v1_nvoc.h index 94220c1ca5..af2155b63b 100644 --- a/src/nvidia/generated/g_profiler_v1_nvoc.h +++ b/src/nvidia/generated/g_profiler_v1_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -61,10 +61,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__Profiler; + + struct Profiler { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__Profiler *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -77,13 +82,20 @@ struct Profiler { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct Profiler *__nvoc_pbase_Profiler; // profiler - // Vtable with 30 per-object function pointers - NV_STATUS (*__profilerControl__)(struct Profiler * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (gpures) + // Vtable with 5 per-object function pointers NV_STATUS (*__profilerCtrlCmdProfilerReserveHwpm__)(struct Profiler * /*this*/); // exported (id=0x90cc0101) NV_STATUS (*__profilerCtrlCmdProfilerReleaseHwpm__)(struct Profiler * /*this*/); // exported (id=0x90cc0102) NV_STATUS (*__profilerCtrlCmdProfilerGetHwpmReservationInfo__)(struct Profiler * /*this*/, NV90CC_CTRL_HWPM_GET_RESERVATION_INFO_PARAMS *); // exported (id=0x90cc0103) NV_STATUS (*__profilerCtrlCmdProfilerRequestCgControls__)(struct Profiler * /*this*/, NV90CC_CTRL_POWER_REQUEST_FEATURES_PARAMS *); // exported (id=0x90cc0301) NV_STATUS (*__profilerCtrlCmdProfilerReleaseCgControls__)(struct Profiler * /*this*/, NV90CC_CTRL_POWER_RELEASE_FEATURES_PARAMS *); // exported (id=0x90cc0302) +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__Profiler { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + + NV_STATUS (*__profilerControl__)(struct Profiler * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (gpures) NV_STATUS (*__profilerMap__)(struct Profiler * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__profilerUnmap__)(struct Profiler * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NvBool (*__profilerShareCallback__)(struct Profiler * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) @@ -140,7 +152,7 @@ NV_STATUS __nvoc_objCreate_Profiler(Profiler**, Dynamic*, NvU32, struct CALL_CON // Wrapper macros -#define profilerControl_FNPTR(pProfiler) pProfiler->__profilerControl__ +#define profilerControl_FNPTR(pProfiler) pProfiler->__nvoc_vtable->__profilerControl__ #define profilerControl(pProfiler, pCallContext, pParams) profilerControl_DISPATCH(pProfiler, pCallContext, pParams) #define profilerCtrlCmdProfilerReserveHwpm_FNPTR(pProfiler) pProfiler->__profilerCtrlCmdProfilerReserveHwpm__ #define profilerCtrlCmdProfilerReserveHwpm(pProfiler) profilerCtrlCmdProfilerReserveHwpm_DISPATCH(pProfiler) @@ -152,58 +164,58 @@ NV_STATUS __nvoc_objCreate_Profiler(Profiler**, Dynamic*, NvU32, struct CALL_CON #define profilerCtrlCmdProfilerRequestCgControls(pProfiler, pParams) profilerCtrlCmdProfilerRequestCgControls_DISPATCH(pProfiler, pParams) #define profilerCtrlCmdProfilerReleaseCgControls_FNPTR(pProfiler) pProfiler->__profilerCtrlCmdProfilerReleaseCgControls__ #define profilerCtrlCmdProfilerReleaseCgControls(pProfiler, pParams) profilerCtrlCmdProfilerReleaseCgControls_DISPATCH(pProfiler, pParams) -#define profilerMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define profilerMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define profilerMap(pGpuResource, pCallContext, pParams, pCpuMapping) profilerMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define profilerUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define profilerUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define profilerUnmap(pGpuResource, pCallContext, pCpuMapping) profilerUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define profilerShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define profilerShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define profilerShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) profilerShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define profilerGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define profilerGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define profilerGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) profilerGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define profilerGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define profilerGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define profilerGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) profilerGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define profilerInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define profilerInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define profilerInternalControlForward(pGpuResource, command, pParams, size) profilerInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define profilerGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define profilerGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define profilerGetInternalObjectHandle(pGpuResource) profilerGetInternalObjectHandle_DISPATCH(pGpuResource) -#define profilerAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define profilerAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define profilerAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) profilerAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define profilerGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define profilerGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define profilerGetMemInterMapParams(pRmResource, pParams) profilerGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define profilerCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define profilerCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define profilerCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) profilerCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define profilerGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define profilerGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define profilerGetMemoryMappingDescriptor(pRmResource, ppMemDesc) profilerGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define profilerControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define profilerControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define profilerControlSerialization_Prologue(pResource, pCallContext, pParams) profilerControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define profilerControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define profilerControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define profilerControlSerialization_Epilogue(pResource, pCallContext, pParams) profilerControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define profilerControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define profilerControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define profilerControl_Prologue(pResource, pCallContext, pParams) profilerControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define profilerControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define profilerControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define profilerControl_Epilogue(pResource, pCallContext, pParams) profilerControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define profilerCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define profilerCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define profilerCanCopy(pResource) profilerCanCopy_DISPATCH(pResource) -#define profilerIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define profilerIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define profilerIsDuplicate(pResource, hMemory, pDuplicate) profilerIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define profilerPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define profilerPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define profilerPreDestruct(pResource) profilerPreDestruct_DISPATCH(pResource) -#define profilerControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define profilerControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define profilerControlFilter(pResource, pCallContext, pParams) profilerControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define profilerIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define profilerIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define profilerIsPartialUnmapSupported(pResource) profilerIsPartialUnmapSupported_DISPATCH(pResource) -#define profilerMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define profilerMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define profilerMapTo(pResource, pParams) profilerMapTo_DISPATCH(pResource, pParams) -#define profilerUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define profilerUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define profilerUnmapFrom(pResource, pParams) profilerUnmapFrom_DISPATCH(pResource, pParams) -#define profilerGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define profilerGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define profilerGetRefCount(pResource) profilerGetRefCount_DISPATCH(pResource) -#define profilerAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define profilerAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define profilerAddAdditionalDependants(pClient, pResource, pReference) profilerAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NV_STATUS profilerControl_DISPATCH(struct Profiler *pProfiler, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pProfiler->__profilerControl__(pProfiler, pCallContext, pParams); + return pProfiler->__nvoc_vtable->__profilerControl__(pProfiler, pCallContext, pParams); } static inline NV_STATUS profilerCtrlCmdProfilerReserveHwpm_DISPATCH(struct Profiler *pProfiler) { @@ -227,99 +239,99 @@ static inline NV_STATUS profilerCtrlCmdProfilerReleaseCgControls_DISPATCH(struct } static inline NV_STATUS profilerMap_DISPATCH(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__profilerMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__profilerMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS profilerUnmap_DISPATCH(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__profilerUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__profilerUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool profilerShareCallback_DISPATCH(struct Profiler *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__profilerShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__profilerShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS profilerGetRegBaseOffsetAndSize_DISPATCH(struct Profiler *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__profilerGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__profilerGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS profilerGetMapAddrSpace_DISPATCH(struct Profiler *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__profilerGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__profilerGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS profilerInternalControlForward_DISPATCH(struct Profiler *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__profilerInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__profilerInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle profilerGetInternalObjectHandle_DISPATCH(struct Profiler *pGpuResource) { - return pGpuResource->__profilerGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__profilerGetInternalObjectHandle__(pGpuResource); } static inline NvBool profilerAccessCallback_DISPATCH(struct Profiler *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__profilerAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__profilerAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS profilerGetMemInterMapParams_DISPATCH(struct Profiler *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__profilerGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__profilerGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS profilerCheckMemInterUnmap_DISPATCH(struct Profiler *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__profilerCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__profilerCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS profilerGetMemoryMappingDescriptor_DISPATCH(struct Profiler *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__profilerGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__profilerGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS profilerControlSerialization_Prologue_DISPATCH(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__profilerControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__profilerControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void profilerControlSerialization_Epilogue_DISPATCH(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__profilerControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__profilerControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS profilerControl_Prologue_DISPATCH(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__profilerControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__profilerControl_Prologue__(pResource, pCallContext, pParams); } static inline void profilerControl_Epilogue_DISPATCH(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__profilerControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__profilerControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool profilerCanCopy_DISPATCH(struct Profiler *pResource) { - return pResource->__profilerCanCopy__(pResource); + return pResource->__nvoc_vtable->__profilerCanCopy__(pResource); } static inline NV_STATUS profilerIsDuplicate_DISPATCH(struct Profiler *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__profilerIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__profilerIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void profilerPreDestruct_DISPATCH(struct Profiler *pResource) { - pResource->__profilerPreDestruct__(pResource); + pResource->__nvoc_vtable->__profilerPreDestruct__(pResource); } static inline NV_STATUS profilerControlFilter_DISPATCH(struct Profiler *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__profilerControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__profilerControlFilter__(pResource, pCallContext, pParams); } static inline NvBool profilerIsPartialUnmapSupported_DISPATCH(struct Profiler *pResource) { - return pResource->__profilerIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__profilerIsPartialUnmapSupported__(pResource); } static inline NV_STATUS profilerMapTo_DISPATCH(struct Profiler *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__profilerMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__profilerMapTo__(pResource, pParams); } static inline NV_STATUS profilerUnmapFrom_DISPATCH(struct Profiler *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__profilerUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__profilerUnmapFrom__(pResource, pParams); } static inline NvU32 profilerGetRefCount_DISPATCH(struct Profiler *pResource) { - return pResource->__profilerGetRefCount__(pResource); + return pResource->__nvoc_vtable->__profilerGetRefCount__(pResource); } static inline void profilerAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct Profiler *pResource, RsResourceRef *pReference) { - pResource->__profilerAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__profilerAddAdditionalDependants__(pClient, pResource, pReference); } NvBool profilerIsProfilingPermitted_IMPL(struct Profiler *pProfiler); diff --git a/src/nvidia/generated/g_profiler_v2_nvoc.c b/src/nvidia/generated/g_profiler_v2_nvoc.c index 3cd85fc94f..ddc03bc768 100644 --- a/src/nvidia/generated/g_profiler_v2_nvoc.c +++ b/src/nvidia/generated/g_profiler_v2_nvoc.c @@ -582,130 +582,198 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Profiler }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseControl(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseMap(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseUnmap(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_profilerBaseShareCallback(struct ProfilerBase *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseGetRegBaseOffsetAndSize(struct ProfilerBase *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseGetMapAddrSpace(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseInternalControlForward(struct ProfilerBase *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_profilerBaseGetInternalObjectHandle(struct ProfilerBase *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_profilerBaseAccessCallback(struct ProfilerBase *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseGetMemInterMapParams(struct ProfilerBase *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseCheckMemInterUnmap(struct ProfilerBase *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseGetMemoryMappingDescriptor(struct ProfilerBase *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseControlSerialization_Prologue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_profilerBaseControlSerialization_Epilogue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseControl_Prologue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_profilerBaseControl_Epilogue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_profilerBaseCanCopy(struct ProfilerBase *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseIsDuplicate(struct ProfilerBase *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_profilerBasePreDestruct(struct ProfilerBase *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseControlFilter(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_profilerBaseIsPartialUnmapSupported(struct ProfilerBase *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseMapTo(struct ProfilerBase *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseUnmapFrom(struct ProfilerBase *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_profilerBaseGetRefCount(struct ProfilerBase *pResource); // this +void __nvoc_up_thunk_RsResource_profilerBaseAddAdditionalDependants(struct RsClient *pClient, struct ProfilerBase *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in ProfilerBase to superclasses // profilerBaseControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseControl(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseControl(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset), pCallContext, pParams); } // profilerBaseMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseMap(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseMap(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // profilerBaseUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseUnmap(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseUnmap(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset), pCallContext, pCpuMapping); } // profilerBaseShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_profilerBaseShareCallback(struct ProfilerBase *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_profilerBaseShareCallback(struct ProfilerBase *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // profilerBaseGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseGetRegBaseOffsetAndSize(struct ProfilerBase *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseGetRegBaseOffsetAndSize(struct ProfilerBase *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset), pGpu, pOffset, pSize); } // profilerBaseGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseGetMapAddrSpace(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseGetMapAddrSpace(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // profilerBaseInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseInternalControlForward(struct ProfilerBase *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseInternalControlForward(struct ProfilerBase *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset), command, pParams, size); } // profilerBaseGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_profilerBaseGetInternalObjectHandle(struct ProfilerBase *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_profilerBaseGetInternalObjectHandle(struct ProfilerBase *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerBase_GpuResource.offset)); } // profilerBaseAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_profilerBaseAccessCallback(struct ProfilerBase *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_profilerBaseAccessCallback(struct ProfilerBase *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // profilerBaseGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseGetMemInterMapParams(struct ProfilerBase *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseGetMemInterMapParams(struct ProfilerBase *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), pParams); } // profilerBaseCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseCheckMemInterUnmap(struct ProfilerBase *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseCheckMemInterUnmap(struct ProfilerBase *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), bSubdeviceHandleProvided); } // profilerBaseGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseGetMemoryMappingDescriptor(struct ProfilerBase *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseGetMemoryMappingDescriptor(struct ProfilerBase *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), ppMemDesc); } // profilerBaseControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseControlSerialization_Prologue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseControlSerialization_Prologue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), pCallContext, pParams); } // profilerBaseControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_profilerBaseControlSerialization_Epilogue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_profilerBaseControlSerialization_Epilogue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), pCallContext, pParams); } // profilerBaseControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseControl_Prologue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseControl_Prologue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), pCallContext, pParams); } // profilerBaseControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_profilerBaseControl_Epilogue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_profilerBaseControl_Epilogue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RmResource.offset), pCallContext, pParams); } // profilerBaseCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_profilerBaseCanCopy(struct ProfilerBase *pResource) { +NvBool __nvoc_up_thunk_RsResource_profilerBaseCanCopy(struct ProfilerBase *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset)); } // profilerBaseIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseIsDuplicate(struct ProfilerBase *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseIsDuplicate(struct ProfilerBase *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset), hMemory, pDuplicate); } // profilerBasePreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_profilerBasePreDestruct(struct ProfilerBase *pResource) { +void __nvoc_up_thunk_RsResource_profilerBasePreDestruct(struct ProfilerBase *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset)); } // profilerBaseControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseControlFilter(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseControlFilter(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset), pCallContext, pParams); } // profilerBaseIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_profilerBaseIsPartialUnmapSupported(struct ProfilerBase *pResource) { +NvBool __nvoc_up_thunk_RsResource_profilerBaseIsPartialUnmapSupported(struct ProfilerBase *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset)); } // profilerBaseMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseMapTo(struct ProfilerBase *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseMapTo(struct ProfilerBase *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset), pParams); } // profilerBaseUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseUnmapFrom(struct ProfilerBase *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseUnmapFrom(struct ProfilerBase *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset), pParams); } // profilerBaseGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_profilerBaseGetRefCount(struct ProfilerBase *pResource) { +NvU32 __nvoc_up_thunk_RsResource_profilerBaseGetRefCount(struct ProfilerBase *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset)); } // profilerBaseAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_profilerBaseAddAdditionalDependants(struct RsClient *pClient, struct ProfilerBase *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_profilerBaseAddAdditionalDependants(struct RsClient *pClient, struct ProfilerBase *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerBase_RsResource.offset), pReference); } @@ -892,7 +960,7 @@ static void __nvoc_init_funcTable_ProfilerBase_1(ProfilerBase *pThis, RmHalspecO } else { - pThis->__profilerBaseCtrlCmdInternalSriovPromotePmaStream__ = &profilerBaseCtrlCmdInternalSriovPromotePmaStream_108313; + pThis->__profilerBaseCtrlCmdInternalSriovPromotePmaStream__ = &profilerBaseCtrlCmdInternalSriovPromotePmaStream_86b752; } // profilerBaseCtrlCmdInternalPermissionsInit -- exported (id=0xb0cc0203) @@ -974,88 +1042,162 @@ static void __nvoc_init_funcTable_ProfilerBase_1(ProfilerBase *pThis, RmHalspecO #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__profilerBaseCtrlCmdGetDynamicMMABoostStatus__ = &profilerBaseCtrlCmdGetDynamicMMABoostStatus_IMPL; #endif - - // profilerBaseControl -- virtual inherited (gpures) base (gpures) - pThis->__profilerBaseControl__ = &__nvoc_up_thunk_GpuResource_profilerBaseControl; - - // profilerBaseMap -- virtual inherited (gpures) base (gpures) - pThis->__profilerBaseMap__ = &__nvoc_up_thunk_GpuResource_profilerBaseMap; - - // profilerBaseUnmap -- virtual inherited (gpures) base (gpures) - pThis->__profilerBaseUnmap__ = &__nvoc_up_thunk_GpuResource_profilerBaseUnmap; - - // profilerBaseShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__profilerBaseShareCallback__ = &__nvoc_up_thunk_GpuResource_profilerBaseShareCallback; - - // profilerBaseGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__profilerBaseGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_profilerBaseGetRegBaseOffsetAndSize; - - // profilerBaseGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__profilerBaseGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_profilerBaseGetMapAddrSpace; - - // profilerBaseInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__profilerBaseInternalControlForward__ = &__nvoc_up_thunk_GpuResource_profilerBaseInternalControlForward; - - // profilerBaseGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__profilerBaseGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_profilerBaseGetInternalObjectHandle; - - // profilerBaseAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__profilerBaseAccessCallback__ = &__nvoc_up_thunk_RmResource_profilerBaseAccessCallback; - - // profilerBaseGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__profilerBaseGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_profilerBaseGetMemInterMapParams; - - // profilerBaseCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__profilerBaseCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_profilerBaseCheckMemInterUnmap; - - // profilerBaseGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__profilerBaseGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_profilerBaseGetMemoryMappingDescriptor; - - // profilerBaseControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__profilerBaseControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_profilerBaseControlSerialization_Prologue; - - // profilerBaseControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__profilerBaseControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerBaseControlSerialization_Epilogue; - - // profilerBaseControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__profilerBaseControl_Prologue__ = &__nvoc_up_thunk_RmResource_profilerBaseControl_Prologue; - - // profilerBaseControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__profilerBaseControl_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerBaseControl_Epilogue; - - // profilerBaseCanCopy -- virtual inherited (res) base (gpures) - pThis->__profilerBaseCanCopy__ = &__nvoc_up_thunk_RsResource_profilerBaseCanCopy; - - // profilerBaseIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__profilerBaseIsDuplicate__ = &__nvoc_up_thunk_RsResource_profilerBaseIsDuplicate; - - // profilerBasePreDestruct -- virtual inherited (res) base (gpures) - pThis->__profilerBasePreDestruct__ = &__nvoc_up_thunk_RsResource_profilerBasePreDestruct; - - // profilerBaseControlFilter -- virtual inherited (res) base (gpures) - pThis->__profilerBaseControlFilter__ = &__nvoc_up_thunk_RsResource_profilerBaseControlFilter; - - // profilerBaseIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__profilerBaseIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_profilerBaseIsPartialUnmapSupported; - - // profilerBaseMapTo -- virtual inherited (res) base (gpures) - pThis->__profilerBaseMapTo__ = &__nvoc_up_thunk_RsResource_profilerBaseMapTo; - - // profilerBaseUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__profilerBaseUnmapFrom__ = &__nvoc_up_thunk_RsResource_profilerBaseUnmapFrom; - - // profilerBaseGetRefCount -- virtual inherited (res) base (gpures) - pThis->__profilerBaseGetRefCount__ = &__nvoc_up_thunk_RsResource_profilerBaseGetRefCount; - - // profilerBaseAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__profilerBaseAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_profilerBaseAddAdditionalDependants; -} // End __nvoc_init_funcTable_ProfilerBase_1 with approximately 68 basic block(s). +} // End __nvoc_init_funcTable_ProfilerBase_1 with approximately 43 basic block(s). // Initialize vtable(s) for 59 virtual method(s). void __nvoc_init_funcTable_ProfilerBase(ProfilerBase *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 59 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__ProfilerBase vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x208u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif + .__profilerBaseControl__ = &__nvoc_up_thunk_GpuResource_profilerBaseControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__profilerBaseMap__ = &__nvoc_up_thunk_GpuResource_profilerBaseMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__profilerBaseUnmap__ = &__nvoc_up_thunk_GpuResource_profilerBaseUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__profilerBaseShareCallback__ = &__nvoc_up_thunk_GpuResource_profilerBaseShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__profilerBaseGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_profilerBaseGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__profilerBaseGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_profilerBaseGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__profilerBaseInternalControlForward__ = &__nvoc_up_thunk_GpuResource_profilerBaseInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__profilerBaseGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_profilerBaseGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__profilerBaseAccessCallback__ = &__nvoc_up_thunk_RmResource_profilerBaseAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__profilerBaseGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_profilerBaseGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__profilerBaseCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_profilerBaseCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__profilerBaseGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_profilerBaseGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__profilerBaseControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_profilerBaseControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__profilerBaseControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerBaseControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__profilerBaseControl_Prologue__ = &__nvoc_up_thunk_RmResource_profilerBaseControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__profilerBaseControl_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerBaseControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__profilerBaseCanCopy__ = &__nvoc_up_thunk_RsResource_profilerBaseCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__profilerBaseIsDuplicate__ = &__nvoc_up_thunk_RsResource_profilerBaseIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__profilerBasePreDestruct__ = &__nvoc_up_thunk_RsResource_profilerBasePreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__profilerBaseControlFilter__ = &__nvoc_up_thunk_RsResource_profilerBaseControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__profilerBaseIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_profilerBaseIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__profilerBaseMapTo__ = &__nvoc_up_thunk_RsResource_profilerBaseMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__profilerBaseUnmapFrom__ = &__nvoc_up_thunk_RsResource_profilerBaseUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__profilerBaseGetRefCount__ = &__nvoc_up_thunk_RsResource_profilerBaseGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__profilerBaseAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_profilerBaseAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (profilerBase) this + + // Initialize vtable(s) with 34 per-object function pointer(s). __nvoc_init_funcTable_ProfilerBase_1(pThis, pRmhalspecowner); } @@ -1147,6 +1289,635 @@ NV_STATUS __nvoc_objCreateDynamic_ProfilerBase(ProfilerBase **ppThis, Dynamic *p return status; } +#ifdef DEBUG +char __nvoc_class_id_uniqueness_check_0xe99229 = 1; +#endif + +extern const struct NVOC_CLASS_DEF __nvoc_class_def_ProfilerCtx; + +extern const struct NVOC_CLASS_DEF __nvoc_class_def_Object; + +extern const struct NVOC_CLASS_DEF __nvoc_class_def_RsResource; + +extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmResourceCommon; + +extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmResource; + +extern const struct NVOC_CLASS_DEF __nvoc_class_def_GpuResource; + +extern const struct NVOC_CLASS_DEF __nvoc_class_def_ProfilerBase; + +void __nvoc_init_ProfilerCtx(ProfilerCtx*, RmHalspecOwner* ); +void __nvoc_init_funcTable_ProfilerCtx(ProfilerCtx*, RmHalspecOwner* ); +NV_STATUS __nvoc_ctor_ProfilerCtx(ProfilerCtx*, RmHalspecOwner* , CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); +void __nvoc_init_dataField_ProfilerCtx(ProfilerCtx*, RmHalspecOwner* ); +void __nvoc_dtor_ProfilerCtx(ProfilerCtx*); +extern const struct NVOC_EXPORT_INFO __nvoc_export_info_ProfilerCtx; + +static const struct NVOC_RTTI __nvoc_rtti_ProfilerCtx_ProfilerCtx = { + /*pClassDef=*/ &__nvoc_class_def_ProfilerCtx, + /*dtor=*/ (NVOC_DYNAMIC_DTOR) &__nvoc_dtor_ProfilerCtx, + /*offset=*/ 0, +}; + +static const struct NVOC_RTTI __nvoc_rtti_ProfilerCtx_Object = { + /*pClassDef=*/ &__nvoc_class_def_Object, + /*dtor=*/ &__nvoc_destructFromBase, + /*offset=*/ NV_OFFSETOF(ProfilerCtx, __nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object), +}; + +static const struct NVOC_RTTI __nvoc_rtti_ProfilerCtx_RsResource = { + /*pClassDef=*/ &__nvoc_class_def_RsResource, + /*dtor=*/ &__nvoc_destructFromBase, + /*offset=*/ NV_OFFSETOF(ProfilerCtx, __nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource), +}; + +static const struct NVOC_RTTI __nvoc_rtti_ProfilerCtx_RmResourceCommon = { + /*pClassDef=*/ &__nvoc_class_def_RmResourceCommon, + /*dtor=*/ &__nvoc_destructFromBase, + /*offset=*/ NV_OFFSETOF(ProfilerCtx, __nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RmResourceCommon), +}; + +static const struct NVOC_RTTI __nvoc_rtti_ProfilerCtx_RmResource = { + /*pClassDef=*/ &__nvoc_class_def_RmResource, + /*dtor=*/ &__nvoc_destructFromBase, + /*offset=*/ NV_OFFSETOF(ProfilerCtx, __nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource), +}; + +static const struct NVOC_RTTI __nvoc_rtti_ProfilerCtx_GpuResource = { + /*pClassDef=*/ &__nvoc_class_def_GpuResource, + /*dtor=*/ &__nvoc_destructFromBase, + /*offset=*/ NV_OFFSETOF(ProfilerCtx, __nvoc_base_ProfilerBase.__nvoc_base_GpuResource), +}; + +static const struct NVOC_RTTI __nvoc_rtti_ProfilerCtx_ProfilerBase = { + /*pClassDef=*/ &__nvoc_class_def_ProfilerBase, + /*dtor=*/ &__nvoc_destructFromBase, + /*offset=*/ NV_OFFSETOF(ProfilerCtx, __nvoc_base_ProfilerBase), +}; + +static const struct NVOC_CASTINFO __nvoc_castinfo_ProfilerCtx = { + /*numRelatives=*/ 7, + /*relatives=*/ { + &__nvoc_rtti_ProfilerCtx_ProfilerCtx, + &__nvoc_rtti_ProfilerCtx_ProfilerBase, + &__nvoc_rtti_ProfilerCtx_GpuResource, + &__nvoc_rtti_ProfilerCtx_RmResource, + &__nvoc_rtti_ProfilerCtx_RmResourceCommon, + &__nvoc_rtti_ProfilerCtx_RsResource, + &__nvoc_rtti_ProfilerCtx_Object, + }, +}; + +const struct NVOC_CLASS_DEF __nvoc_class_def_ProfilerCtx = +{ + /*classInfo=*/ { + /*size=*/ sizeof(ProfilerCtx), + /*classId=*/ classId(ProfilerCtx), + /*providerId=*/ &__nvoc_rtti_provider, +#if NV_PRINTF_STRINGS_ALLOWED + /*name=*/ "ProfilerCtx", +#endif + }, + /*objCreatefn=*/ (NVOC_DYNAMIC_OBJ_CREATE) &__nvoc_objCreateDynamic_ProfilerCtx, + /*pCastInfo=*/ &__nvoc_castinfo_ProfilerCtx, + /*pExportInfo=*/ &__nvoc_export_info_ProfilerCtx +}; + +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^3 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^3 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^3 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super^2 +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseControl(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseMap(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseUnmap(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_GpuResource_profilerBaseShareCallback(struct ProfilerBase *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseGetRegBaseOffsetAndSize(struct ProfilerBase *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // super +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseGetMapAddrSpace(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseInternalControlForward(struct ProfilerBase *pGpuResource, NvU32 command, void *pParams, NvU32 size); // super +NvHandle __nvoc_up_thunk_GpuResource_profilerBaseGetInternalObjectHandle(struct ProfilerBase *pGpuResource); // super +NvBool __nvoc_up_thunk_RmResource_profilerBaseAccessCallback(struct ProfilerBase *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseGetMemInterMapParams(struct ProfilerBase *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseCheckMemInterUnmap(struct ProfilerBase *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseGetMemoryMappingDescriptor(struct ProfilerBase *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseControlSerialization_Prologue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_profilerBaseControlSerialization_Epilogue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseControl_Prologue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_profilerBaseControl_Epilogue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_profilerBaseCanCopy(struct ProfilerBase *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseIsDuplicate(struct ProfilerBase *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_profilerBasePreDestruct(struct ProfilerBase *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseControlFilter(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_profilerBaseIsPartialUnmapSupported(struct ProfilerBase *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseMapTo(struct ProfilerBase *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseUnmapFrom(struct ProfilerBase *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_profilerBaseGetRefCount(struct ProfilerBase *pResource); // super +void __nvoc_up_thunk_RsResource_profilerBaseAddAdditionalDependants(struct RsClient *pClient, struct ProfilerBase *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_profilerCtxControl(struct ProfilerCtx *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_profilerCtxMap(struct ProfilerCtx *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_profilerCtxUnmap(struct ProfilerCtx *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_profilerCtxShareCallback(struct ProfilerCtx *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_profilerCtxGetRegBaseOffsetAndSize(struct ProfilerCtx *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_profilerCtxGetMapAddrSpace(struct ProfilerCtx *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_profilerCtxInternalControlForward(struct ProfilerCtx *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_profilerCtxGetInternalObjectHandle(struct ProfilerCtx *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_profilerCtxAccessCallback(struct ProfilerCtx *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_profilerCtxGetMemInterMapParams(struct ProfilerCtx *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_profilerCtxCheckMemInterUnmap(struct ProfilerCtx *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_profilerCtxGetMemoryMappingDescriptor(struct ProfilerCtx *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_profilerCtxControlSerialization_Prologue(struct ProfilerCtx *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_profilerCtxControlSerialization_Epilogue(struct ProfilerCtx *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_profilerCtxControl_Prologue(struct ProfilerCtx *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_profilerCtxControl_Epilogue(struct ProfilerCtx *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_profilerCtxCanCopy(struct ProfilerCtx *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_profilerCtxIsDuplicate(struct ProfilerCtx *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_profilerCtxPreDestruct(struct ProfilerCtx *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_profilerCtxControlFilter(struct ProfilerCtx *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_profilerCtxIsPartialUnmapSupported(struct ProfilerCtx *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_profilerCtxMapTo(struct ProfilerCtx *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_profilerCtxUnmapFrom(struct ProfilerCtx *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_profilerCtxGetRefCount(struct ProfilerCtx *pResource); // this +void __nvoc_up_thunk_RsResource_profilerCtxAddAdditionalDependants(struct RsClient *pClient, struct ProfilerCtx *pResource, RsResourceRef *pReference); // this + +// 25 up-thunk(s) defined to bridge methods in ProfilerCtx to superclasses + +// profilerCtxControl: virtual inherited (gpures) base (profilerBase) +NV_STATUS __nvoc_up_thunk_GpuResource_profilerCtxControl(struct ProfilerCtx *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerCtx_GpuResource.offset), pCallContext, pParams); +} + +// profilerCtxMap: virtual inherited (gpures) base (profilerBase) +NV_STATUS __nvoc_up_thunk_GpuResource_profilerCtxMap(struct ProfilerCtx *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerCtx_GpuResource.offset), pCallContext, pParams, pCpuMapping); +} + +// profilerCtxUnmap: virtual inherited (gpures) base (profilerBase) +NV_STATUS __nvoc_up_thunk_GpuResource_profilerCtxUnmap(struct ProfilerCtx *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerCtx_GpuResource.offset), pCallContext, pCpuMapping); +} + +// profilerCtxShareCallback: virtual inherited (gpures) base (profilerBase) +NvBool __nvoc_up_thunk_GpuResource_profilerCtxShareCallback(struct ProfilerCtx *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerCtx_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); +} + +// profilerCtxGetRegBaseOffsetAndSize: virtual inherited (gpures) base (profilerBase) +NV_STATUS __nvoc_up_thunk_GpuResource_profilerCtxGetRegBaseOffsetAndSize(struct ProfilerCtx *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerCtx_GpuResource.offset), pGpu, pOffset, pSize); +} + +// profilerCtxGetMapAddrSpace: virtual inherited (gpures) base (profilerBase) +NV_STATUS __nvoc_up_thunk_GpuResource_profilerCtxGetMapAddrSpace(struct ProfilerCtx *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerCtx_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); +} + +// profilerCtxInternalControlForward: virtual inherited (gpures) base (profilerBase) +NV_STATUS __nvoc_up_thunk_GpuResource_profilerCtxInternalControlForward(struct ProfilerCtx *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerCtx_GpuResource.offset), command, pParams, size); +} + +// profilerCtxGetInternalObjectHandle: virtual inherited (gpures) base (profilerBase) +NvHandle __nvoc_up_thunk_GpuResource_profilerCtxGetInternalObjectHandle(struct ProfilerCtx *pGpuResource) { + return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerCtx_GpuResource.offset)); +} + +// profilerCtxAccessCallback: virtual inherited (rmres) base (profilerBase) +NvBool __nvoc_up_thunk_RmResource_profilerCtxAccessCallback(struct ProfilerCtx *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerCtx_RmResource.offset), pInvokingClient, pAllocParams, accessRight); +} + +// profilerCtxGetMemInterMapParams: virtual inherited (rmres) base (profilerBase) +NV_STATUS __nvoc_up_thunk_RmResource_profilerCtxGetMemInterMapParams(struct ProfilerCtx *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ProfilerCtx_RmResource.offset), pParams); +} + +// profilerCtxCheckMemInterUnmap: virtual inherited (rmres) base (profilerBase) +NV_STATUS __nvoc_up_thunk_RmResource_profilerCtxCheckMemInterUnmap(struct ProfilerCtx *pRmResource, NvBool bSubdeviceHandleProvided) { + return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ProfilerCtx_RmResource.offset), bSubdeviceHandleProvided); +} + +// profilerCtxGetMemoryMappingDescriptor: virtual inherited (rmres) base (profilerBase) +NV_STATUS __nvoc_up_thunk_RmResource_profilerCtxGetMemoryMappingDescriptor(struct ProfilerCtx *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ProfilerCtx_RmResource.offset), ppMemDesc); +} + +// profilerCtxControlSerialization_Prologue: virtual inherited (rmres) base (profilerBase) +NV_STATUS __nvoc_up_thunk_RmResource_profilerCtxControlSerialization_Prologue(struct ProfilerCtx *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerCtx_RmResource.offset), pCallContext, pParams); +} + +// profilerCtxControlSerialization_Epilogue: virtual inherited (rmres) base (profilerBase) +void __nvoc_up_thunk_RmResource_profilerCtxControlSerialization_Epilogue(struct ProfilerCtx *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerCtx_RmResource.offset), pCallContext, pParams); +} + +// profilerCtxControl_Prologue: virtual inherited (rmres) base (profilerBase) +NV_STATUS __nvoc_up_thunk_RmResource_profilerCtxControl_Prologue(struct ProfilerCtx *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerCtx_RmResource.offset), pCallContext, pParams); +} + +// profilerCtxControl_Epilogue: virtual inherited (rmres) base (profilerBase) +void __nvoc_up_thunk_RmResource_profilerCtxControl_Epilogue(struct ProfilerCtx *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerCtx_RmResource.offset), pCallContext, pParams); +} + +// profilerCtxCanCopy: virtual inherited (res) base (profilerBase) +NvBool __nvoc_up_thunk_RsResource_profilerCtxCanCopy(struct ProfilerCtx *pResource) { + return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerCtx_RsResource.offset)); +} + +// profilerCtxIsDuplicate: virtual inherited (res) base (profilerBase) +NV_STATUS __nvoc_up_thunk_RsResource_profilerCtxIsDuplicate(struct ProfilerCtx *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerCtx_RsResource.offset), hMemory, pDuplicate); +} + +// profilerCtxPreDestruct: virtual inherited (res) base (profilerBase) +void __nvoc_up_thunk_RsResource_profilerCtxPreDestruct(struct ProfilerCtx *pResource) { + resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerCtx_RsResource.offset)); +} + +// profilerCtxControlFilter: virtual inherited (res) base (profilerBase) +NV_STATUS __nvoc_up_thunk_RsResource_profilerCtxControlFilter(struct ProfilerCtx *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerCtx_RsResource.offset), pCallContext, pParams); +} + +// profilerCtxIsPartialUnmapSupported: inline virtual inherited (res) base (profilerBase) body +NvBool __nvoc_up_thunk_RsResource_profilerCtxIsPartialUnmapSupported(struct ProfilerCtx *pResource) { + return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerCtx_RsResource.offset)); +} + +// profilerCtxMapTo: virtual inherited (res) base (profilerBase) +NV_STATUS __nvoc_up_thunk_RsResource_profilerCtxMapTo(struct ProfilerCtx *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerCtx_RsResource.offset), pParams); +} + +// profilerCtxUnmapFrom: virtual inherited (res) base (profilerBase) +NV_STATUS __nvoc_up_thunk_RsResource_profilerCtxUnmapFrom(struct ProfilerCtx *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerCtx_RsResource.offset), pParams); +} + +// profilerCtxGetRefCount: virtual inherited (res) base (profilerBase) +NvU32 __nvoc_up_thunk_RsResource_profilerCtxGetRefCount(struct ProfilerCtx *pResource) { + return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerCtx_RsResource.offset)); +} + +// profilerCtxAddAdditionalDependants: virtual inherited (res) base (profilerBase) +void __nvoc_up_thunk_RsResource_profilerCtxAddAdditionalDependants(struct RsClient *pClient, struct ProfilerCtx *pResource, RsResourceRef *pReference) { + resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerCtx_RsResource.offset), pReference); +} + + +const struct NVOC_EXPORT_INFO __nvoc_export_info_ProfilerCtx = +{ + /*numEntries=*/ 0, + /*pExportEntries=*/ 0 +}; + +void __nvoc_dtor_ProfilerBase(ProfilerBase*); +void __nvoc_dtor_ProfilerCtx(ProfilerCtx *pThis) { + __nvoc_profilerCtxDestruct(pThis); + __nvoc_dtor_ProfilerBase(&pThis->__nvoc_base_ProfilerBase); + PORT_UNREFERENCED_VARIABLE(pThis); +} + +void __nvoc_init_dataField_ProfilerCtx(ProfilerCtx *pThis, RmHalspecOwner *pRmhalspecowner) { + RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; + const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; + PORT_UNREFERENCED_VARIABLE(pThis); + PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); + PORT_UNREFERENCED_VARIABLE(rmVariantHal); + PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); +} + +NV_STATUS __nvoc_ctor_ProfilerBase(ProfilerBase* , RmHalspecOwner* , CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); +NV_STATUS __nvoc_ctor_ProfilerCtx(ProfilerCtx *pThis, RmHalspecOwner *pRmhalspecowner, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams) { + NV_STATUS status = NV_OK; + status = __nvoc_ctor_ProfilerBase(&pThis->__nvoc_base_ProfilerBase, pRmhalspecowner, arg_pCallContext, arg_pParams); + if (status != NV_OK) goto __nvoc_ctor_ProfilerCtx_fail_ProfilerBase; + __nvoc_init_dataField_ProfilerCtx(pThis, pRmhalspecowner); + + status = __nvoc_profilerCtxConstruct(pThis, arg_pCallContext, arg_pParams); + if (status != NV_OK) goto __nvoc_ctor_ProfilerCtx_fail__init; + goto __nvoc_ctor_ProfilerCtx_exit; // Success + +__nvoc_ctor_ProfilerCtx_fail__init: + __nvoc_dtor_ProfilerBase(&pThis->__nvoc_base_ProfilerBase); +__nvoc_ctor_ProfilerCtx_fail_ProfilerBase: +__nvoc_ctor_ProfilerCtx_exit: + + return status; +} + +// Vtable initialization +static void __nvoc_init_funcTable_ProfilerCtx_1(ProfilerCtx *pThis, RmHalspecOwner *pRmhalspecowner) { + RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; + const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; + PORT_UNREFERENCED_VARIABLE(pThis); + PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); + PORT_UNREFERENCED_VARIABLE(rmVariantHal); + PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); + + // profilerCtxConstructStatePrologue -- halified (2 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__profilerCtxConstructStatePrologue__ = &profilerCtxConstructStatePrologue_92bfc3; + } + else + { + pThis->__profilerCtxConstructStatePrologue__ = &profilerCtxConstructStatePrologue_FWCLIENT; + } + + // profilerCtxConstructStateInterlude -- halified (2 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__profilerCtxConstructStateInterlude__ = &profilerCtxConstructStateInterlude_92bfc3; + } + else + { + pThis->__profilerCtxConstructStateInterlude__ = &profilerCtxConstructStateInterlude_IMPL; + } + + // profilerCtxConstructStateEpilogue -- halified (2 hals) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__profilerCtxConstructStateEpilogue__ = &profilerCtxConstructStateEpilogue_92bfc3; + } + else + { + pThis->__profilerCtxConstructStateEpilogue__ = &profilerCtxConstructStateEpilogue_56cd7a; + } + + // profilerCtxDestruct -- halified (2 hals) override (res) base (profilerBase) body + if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ + { + pThis->__profilerCtxDestruct__ = &profilerCtxDestruct_b3696a; + } + else + { + pThis->__profilerCtxDestruct__ = &profilerCtxDestruct_FWCLIENT; + } +} // End __nvoc_init_funcTable_ProfilerCtx_1 with approximately 8 basic block(s). + + +// Initialize vtable(s) for 29 virtual method(s). +void __nvoc_init_funcTable_ProfilerCtx(ProfilerCtx *pThis, RmHalspecOwner *pRmhalspecowner) { + + // Per-class vtable definition + static const struct NVOC_VTABLE__ProfilerCtx vtable = { + .__profilerCtxControl__ = &__nvoc_up_thunk_GpuResource_profilerCtxControl, // virtual inherited (gpures) base (profilerBase) + .ProfilerBase.__profilerBaseControl__ = &__nvoc_up_thunk_GpuResource_profilerBaseControl, // virtual inherited (gpures) base (gpures) + .ProfilerBase.GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__profilerCtxMap__ = &__nvoc_up_thunk_GpuResource_profilerCtxMap, // virtual inherited (gpures) base (profilerBase) + .ProfilerBase.__profilerBaseMap__ = &__nvoc_up_thunk_GpuResource_profilerBaseMap, // virtual inherited (gpures) base (gpures) + .ProfilerBase.GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__profilerCtxUnmap__ = &__nvoc_up_thunk_GpuResource_profilerCtxUnmap, // virtual inherited (gpures) base (profilerBase) + .ProfilerBase.__profilerBaseUnmap__ = &__nvoc_up_thunk_GpuResource_profilerBaseUnmap, // virtual inherited (gpures) base (gpures) + .ProfilerBase.GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__profilerCtxShareCallback__ = &__nvoc_up_thunk_GpuResource_profilerCtxShareCallback, // virtual inherited (gpures) base (profilerBase) + .ProfilerBase.__profilerBaseShareCallback__ = &__nvoc_up_thunk_GpuResource_profilerBaseShareCallback, // virtual inherited (gpures) base (gpures) + .ProfilerBase.GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__profilerCtxGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_profilerCtxGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (profilerBase) + .ProfilerBase.__profilerBaseGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_profilerBaseGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .ProfilerBase.GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__profilerCtxGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_profilerCtxGetMapAddrSpace, // virtual inherited (gpures) base (profilerBase) + .ProfilerBase.__profilerBaseGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_profilerBaseGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .ProfilerBase.GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__profilerCtxInternalControlForward__ = &__nvoc_up_thunk_GpuResource_profilerCtxInternalControlForward, // virtual inherited (gpures) base (profilerBase) + .ProfilerBase.__profilerBaseInternalControlForward__ = &__nvoc_up_thunk_GpuResource_profilerBaseInternalControlForward, // virtual inherited (gpures) base (gpures) + .ProfilerBase.GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__profilerCtxGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_profilerCtxGetInternalObjectHandle, // virtual inherited (gpures) base (profilerBase) + .ProfilerBase.__profilerBaseGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_profilerBaseGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .ProfilerBase.GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__profilerCtxAccessCallback__ = &__nvoc_up_thunk_RmResource_profilerCtxAccessCallback, // virtual inherited (rmres) base (profilerBase) + .ProfilerBase.__profilerBaseAccessCallback__ = &__nvoc_up_thunk_RmResource_profilerBaseAccessCallback, // virtual inherited (rmres) base (gpures) + .ProfilerBase.GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__profilerCtxGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_profilerCtxGetMemInterMapParams, // virtual inherited (rmres) base (profilerBase) + .ProfilerBase.__profilerBaseGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_profilerBaseGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .ProfilerBase.GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__profilerCtxCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_profilerCtxCheckMemInterUnmap, // virtual inherited (rmres) base (profilerBase) + .ProfilerBase.__profilerBaseCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_profilerBaseCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .ProfilerBase.GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__profilerCtxGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_profilerCtxGetMemoryMappingDescriptor, // virtual inherited (rmres) base (profilerBase) + .ProfilerBase.__profilerBaseGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_profilerBaseGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .ProfilerBase.GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__profilerCtxControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_profilerCtxControlSerialization_Prologue, // virtual inherited (rmres) base (profilerBase) + .ProfilerBase.__profilerBaseControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_profilerBaseControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .ProfilerBase.GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__profilerCtxControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerCtxControlSerialization_Epilogue, // virtual inherited (rmres) base (profilerBase) + .ProfilerBase.__profilerBaseControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerBaseControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .ProfilerBase.GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__profilerCtxControl_Prologue__ = &__nvoc_up_thunk_RmResource_profilerCtxControl_Prologue, // virtual inherited (rmres) base (profilerBase) + .ProfilerBase.__profilerBaseControl_Prologue__ = &__nvoc_up_thunk_RmResource_profilerBaseControl_Prologue, // virtual inherited (rmres) base (gpures) + .ProfilerBase.GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__profilerCtxControl_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerCtxControl_Epilogue, // virtual inherited (rmres) base (profilerBase) + .ProfilerBase.__profilerBaseControl_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerBaseControl_Epilogue, // virtual inherited (rmres) base (gpures) + .ProfilerBase.GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__profilerCtxCanCopy__ = &__nvoc_up_thunk_RsResource_profilerCtxCanCopy, // virtual inherited (res) base (profilerBase) + .ProfilerBase.__profilerBaseCanCopy__ = &__nvoc_up_thunk_RsResource_profilerBaseCanCopy, // virtual inherited (res) base (gpures) + .ProfilerBase.GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__profilerCtxIsDuplicate__ = &__nvoc_up_thunk_RsResource_profilerCtxIsDuplicate, // virtual inherited (res) base (profilerBase) + .ProfilerBase.__profilerBaseIsDuplicate__ = &__nvoc_up_thunk_RsResource_profilerBaseIsDuplicate, // virtual inherited (res) base (gpures) + .ProfilerBase.GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__profilerCtxPreDestruct__ = &__nvoc_up_thunk_RsResource_profilerCtxPreDestruct, // virtual inherited (res) base (profilerBase) + .ProfilerBase.__profilerBasePreDestruct__ = &__nvoc_up_thunk_RsResource_profilerBasePreDestruct, // virtual inherited (res) base (gpures) + .ProfilerBase.GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__profilerCtxControlFilter__ = &__nvoc_up_thunk_RsResource_profilerCtxControlFilter, // virtual inherited (res) base (profilerBase) + .ProfilerBase.__profilerBaseControlFilter__ = &__nvoc_up_thunk_RsResource_profilerBaseControlFilter, // virtual inherited (res) base (gpures) + .ProfilerBase.GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__profilerCtxIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_profilerCtxIsPartialUnmapSupported, // inline virtual inherited (res) base (profilerBase) body + .ProfilerBase.__profilerBaseIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_profilerBaseIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .ProfilerBase.GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .ProfilerBase.GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .ProfilerBase.GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__profilerCtxMapTo__ = &__nvoc_up_thunk_RsResource_profilerCtxMapTo, // virtual inherited (res) base (profilerBase) + .ProfilerBase.__profilerBaseMapTo__ = &__nvoc_up_thunk_RsResource_profilerBaseMapTo, // virtual inherited (res) base (gpures) + .ProfilerBase.GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__profilerCtxUnmapFrom__ = &__nvoc_up_thunk_RsResource_profilerCtxUnmapFrom, // virtual inherited (res) base (profilerBase) + .ProfilerBase.__profilerBaseUnmapFrom__ = &__nvoc_up_thunk_RsResource_profilerBaseUnmapFrom, // virtual inherited (res) base (gpures) + .ProfilerBase.GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__profilerCtxGetRefCount__ = &__nvoc_up_thunk_RsResource_profilerCtxGetRefCount, // virtual inherited (res) base (profilerBase) + .ProfilerBase.__profilerBaseGetRefCount__ = &__nvoc_up_thunk_RsResource_profilerBaseGetRefCount, // virtual inherited (res) base (gpures) + .ProfilerBase.GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__profilerCtxAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_profilerCtxAddAdditionalDependants, // virtual inherited (res) base (profilerBase) + .ProfilerBase.__profilerBaseAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_profilerBaseAddAdditionalDependants, // virtual inherited (res) base (gpures) + .ProfilerBase.GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.ProfilerBase.GpuResource.RmResource.RsResource; // (res) super^4 + pThis->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.ProfilerBase.GpuResource.RmResource; // (rmres) super^3 + pThis->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_vtable = &vtable.ProfilerBase.GpuResource; // (gpures) super^2 + pThis->__nvoc_base_ProfilerBase.__nvoc_vtable = &vtable.ProfilerBase; // (profilerBase) super + pThis->__nvoc_vtable = &vtable; // (profilerCtx) this + + // Initialize vtable(s) with 4 per-object function pointer(s). + __nvoc_init_funcTable_ProfilerCtx_1(pThis, pRmhalspecowner); +} + +void __nvoc_init_ProfilerBase(ProfilerBase*, RmHalspecOwner* ); +void __nvoc_init_ProfilerCtx(ProfilerCtx *pThis, RmHalspecOwner *pRmhalspecowner) { + pThis->__nvoc_pbase_ProfilerCtx = pThis; + pThis->__nvoc_pbase_Object = &pThis->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object; + pThis->__nvoc_pbase_RsResource = &pThis->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource; + pThis->__nvoc_pbase_RmResourceCommon = &pThis->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RmResourceCommon; + pThis->__nvoc_pbase_RmResource = &pThis->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource; + pThis->__nvoc_pbase_GpuResource = &pThis->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource; + pThis->__nvoc_pbase_ProfilerBase = &pThis->__nvoc_base_ProfilerBase; + __nvoc_init_ProfilerBase(&pThis->__nvoc_base_ProfilerBase, pRmhalspecowner); + __nvoc_init_funcTable_ProfilerCtx(pThis, pRmhalspecowner); +} + +NV_STATUS __nvoc_objCreate_ProfilerCtx(ProfilerCtx **ppThis, Dynamic *pParent, NvU32 createFlags, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams) +{ + NV_STATUS status; + Object *pParentObj = NULL; + ProfilerCtx *pThis; + RmHalspecOwner *pRmhalspecowner; + + // Assign `pThis`, allocating memory unless suppressed by flag. + status = __nvoc_handleObjCreateMemAlloc(createFlags, sizeof(ProfilerCtx), (void**)&pThis, (void**)ppThis); + if (status != NV_OK) + return status; + + // Zero is the initial value for everything. + portMemSet(pThis, 0, sizeof(ProfilerCtx)); + + // Initialize runtime type information. + __nvoc_initRtti(staticCast(pThis, Dynamic), &__nvoc_class_def_ProfilerCtx); + + pThis->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object.createFlags = createFlags; + + // pParent must be a valid object that derives from a halspec owner class. + NV_ASSERT_OR_RETURN(pParent != NULL, NV_ERR_INVALID_ARGUMENT); + + // Link the child into the parent unless flagged not to do so. + if (!(createFlags & NVOC_OBJ_CREATE_FLAGS_PARENT_HALSPEC_ONLY)) + { + pParentObj = dynamicCast(pParent, Object); + objAddChild(pParentObj, &pThis->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object); + } + else + { + pThis->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object.pParent = NULL; + } + + if ((pRmhalspecowner = dynamicCast(pParent, RmHalspecOwner)) == NULL) + pRmhalspecowner = objFindAncestorOfType(RmHalspecOwner, pParent); + NV_ASSERT_OR_RETURN(pRmhalspecowner != NULL, NV_ERR_INVALID_ARGUMENT); + + __nvoc_init_ProfilerCtx(pThis, pRmhalspecowner); + status = __nvoc_ctor_ProfilerCtx(pThis, pRmhalspecowner, arg_pCallContext, arg_pParams); + if (status != NV_OK) goto __nvoc_objCreate_ProfilerCtx_cleanup; + + // Assignment has no effect if NVOC_OBJ_CREATE_FLAGS_IN_PLACE_CONSTRUCT is set. + *ppThis = pThis; + + return NV_OK; + +__nvoc_objCreate_ProfilerCtx_cleanup: + + // Unlink the child from the parent if it was linked above. + if (pParentObj != NULL) + objRemoveChild(pParentObj, &pThis->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object); + + // Do not call destructors here since the constructor already called them. + if (createFlags & NVOC_OBJ_CREATE_FLAGS_IN_PLACE_CONSTRUCT) + portMemSet(pThis, 0, sizeof(ProfilerCtx)); + else + { + portMemFree(pThis); + *ppThis = NULL; + } + + // coverity[leaked_storage:FALSE] + return status; +} + +NV_STATUS __nvoc_objCreateDynamic_ProfilerCtx(ProfilerCtx **ppThis, Dynamic *pParent, NvU32 createFlags, va_list args) { + NV_STATUS status; + CALL_CONTEXT * arg_pCallContext = va_arg(args, CALL_CONTEXT *); + struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams = va_arg(args, struct RS_RES_ALLOC_PARAMS_INTERNAL *); + + status = __nvoc_objCreate_ProfilerCtx(ppThis, pParent, createFlags, arg_pCallContext, arg_pParams); + + return status; +} + #ifdef DEBUG char __nvoc_class_id_uniqueness_check_0x54d077 = 1; #endif @@ -1242,130 +2013,223 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_ProfilerDev = /*pExportInfo=*/ &__nvoc_export_info_ProfilerDev }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^3 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^3 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^3 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super^2 +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseControl(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseMap(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseUnmap(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_GpuResource_profilerBaseShareCallback(struct ProfilerBase *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseGetRegBaseOffsetAndSize(struct ProfilerBase *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // super +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseGetMapAddrSpace(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super +NV_STATUS __nvoc_up_thunk_GpuResource_profilerBaseInternalControlForward(struct ProfilerBase *pGpuResource, NvU32 command, void *pParams, NvU32 size); // super +NvHandle __nvoc_up_thunk_GpuResource_profilerBaseGetInternalObjectHandle(struct ProfilerBase *pGpuResource); // super +NvBool __nvoc_up_thunk_RmResource_profilerBaseAccessCallback(struct ProfilerBase *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseGetMemInterMapParams(struct ProfilerBase *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseCheckMemInterUnmap(struct ProfilerBase *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseGetMemoryMappingDescriptor(struct ProfilerBase *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseControlSerialization_Prologue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_profilerBaseControlSerialization_Epilogue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_profilerBaseControl_Prologue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_profilerBaseControl_Epilogue(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_profilerBaseCanCopy(struct ProfilerBase *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseIsDuplicate(struct ProfilerBase *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_profilerBasePreDestruct(struct ProfilerBase *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseControlFilter(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_profilerBaseIsPartialUnmapSupported(struct ProfilerBase *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseMapTo(struct ProfilerBase *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_profilerBaseUnmapFrom(struct ProfilerBase *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_profilerBaseGetRefCount(struct ProfilerBase *pResource); // super +void __nvoc_up_thunk_RsResource_profilerBaseAddAdditionalDependants(struct RsClient *pClient, struct ProfilerBase *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevControl(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevMap(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevUnmap(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_profilerDevShareCallback(struct ProfilerDev *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevGetRegBaseOffsetAndSize(struct ProfilerDev *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevGetMapAddrSpace(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevInternalControlForward(struct ProfilerDev *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_profilerDevGetInternalObjectHandle(struct ProfilerDev *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_profilerDevAccessCallback(struct ProfilerDev *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_profilerDevGetMemInterMapParams(struct ProfilerDev *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_profilerDevCheckMemInterUnmap(struct ProfilerDev *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_profilerDevGetMemoryMappingDescriptor(struct ProfilerDev *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_profilerDevControlSerialization_Prologue(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_profilerDevControlSerialization_Epilogue(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_profilerDevControl_Prologue(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_profilerDevControl_Epilogue(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_profilerDevCanCopy(struct ProfilerDev *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_profilerDevIsDuplicate(struct ProfilerDev *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_profilerDevPreDestruct(struct ProfilerDev *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_profilerDevControlFilter(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_profilerDevIsPartialUnmapSupported(struct ProfilerDev *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_profilerDevMapTo(struct ProfilerDev *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_profilerDevUnmapFrom(struct ProfilerDev *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_profilerDevGetRefCount(struct ProfilerDev *pResource); // this +void __nvoc_up_thunk_RsResource_profilerDevAddAdditionalDependants(struct RsClient *pClient, struct ProfilerDev *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in ProfilerDev to superclasses // profilerDevControl: virtual inherited (gpures) base (profilerBase) -static NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevControl(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevControl(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset), pCallContext, pParams); } // profilerDevMap: virtual inherited (gpures) base (profilerBase) -static NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevMap(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevMap(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // profilerDevUnmap: virtual inherited (gpures) base (profilerBase) -static NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevUnmap(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevUnmap(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset), pCallContext, pCpuMapping); } // profilerDevShareCallback: virtual inherited (gpures) base (profilerBase) -static NvBool __nvoc_up_thunk_GpuResource_profilerDevShareCallback(struct ProfilerDev *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_profilerDevShareCallback(struct ProfilerDev *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // profilerDevGetRegBaseOffsetAndSize: virtual inherited (gpures) base (profilerBase) -static NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevGetRegBaseOffsetAndSize(struct ProfilerDev *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevGetRegBaseOffsetAndSize(struct ProfilerDev *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset), pGpu, pOffset, pSize); } // profilerDevGetMapAddrSpace: virtual inherited (gpures) base (profilerBase) -static NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevGetMapAddrSpace(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevGetMapAddrSpace(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // profilerDevInternalControlForward: virtual inherited (gpures) base (profilerBase) -static NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevInternalControlForward(struct ProfilerDev *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_profilerDevInternalControlForward(struct ProfilerDev *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset), command, pParams, size); } // profilerDevGetInternalObjectHandle: virtual inherited (gpures) base (profilerBase) -static NvHandle __nvoc_up_thunk_GpuResource_profilerDevGetInternalObjectHandle(struct ProfilerDev *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_profilerDevGetInternalObjectHandle(struct ProfilerDev *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ProfilerDev_GpuResource.offset)); } // profilerDevAccessCallback: virtual inherited (rmres) base (profilerBase) -static NvBool __nvoc_up_thunk_RmResource_profilerDevAccessCallback(struct ProfilerDev *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_profilerDevAccessCallback(struct ProfilerDev *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // profilerDevGetMemInterMapParams: virtual inherited (rmres) base (profilerBase) -static NV_STATUS __nvoc_up_thunk_RmResource_profilerDevGetMemInterMapParams(struct ProfilerDev *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_profilerDevGetMemInterMapParams(struct ProfilerDev *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), pParams); } // profilerDevCheckMemInterUnmap: virtual inherited (rmres) base (profilerBase) -static NV_STATUS __nvoc_up_thunk_RmResource_profilerDevCheckMemInterUnmap(struct ProfilerDev *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_profilerDevCheckMemInterUnmap(struct ProfilerDev *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), bSubdeviceHandleProvided); } // profilerDevGetMemoryMappingDescriptor: virtual inherited (rmres) base (profilerBase) -static NV_STATUS __nvoc_up_thunk_RmResource_profilerDevGetMemoryMappingDescriptor(struct ProfilerDev *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_profilerDevGetMemoryMappingDescriptor(struct ProfilerDev *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), ppMemDesc); } // profilerDevControlSerialization_Prologue: virtual inherited (rmres) base (profilerBase) -static NV_STATUS __nvoc_up_thunk_RmResource_profilerDevControlSerialization_Prologue(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_profilerDevControlSerialization_Prologue(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), pCallContext, pParams); } // profilerDevControlSerialization_Epilogue: virtual inherited (rmres) base (profilerBase) -static void __nvoc_up_thunk_RmResource_profilerDevControlSerialization_Epilogue(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_profilerDevControlSerialization_Epilogue(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), pCallContext, pParams); } // profilerDevControl_Prologue: virtual inherited (rmres) base (profilerBase) -static NV_STATUS __nvoc_up_thunk_RmResource_profilerDevControl_Prologue(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_profilerDevControl_Prologue(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), pCallContext, pParams); } // profilerDevControl_Epilogue: virtual inherited (rmres) base (profilerBase) -static void __nvoc_up_thunk_RmResource_profilerDevControl_Epilogue(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_profilerDevControl_Epilogue(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RmResource.offset), pCallContext, pParams); } // profilerDevCanCopy: virtual inherited (res) base (profilerBase) -static NvBool __nvoc_up_thunk_RsResource_profilerDevCanCopy(struct ProfilerDev *pResource) { +NvBool __nvoc_up_thunk_RsResource_profilerDevCanCopy(struct ProfilerDev *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset)); } // profilerDevIsDuplicate: virtual inherited (res) base (profilerBase) -static NV_STATUS __nvoc_up_thunk_RsResource_profilerDevIsDuplicate(struct ProfilerDev *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_profilerDevIsDuplicate(struct ProfilerDev *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset), hMemory, pDuplicate); } // profilerDevPreDestruct: virtual inherited (res) base (profilerBase) -static void __nvoc_up_thunk_RsResource_profilerDevPreDestruct(struct ProfilerDev *pResource) { +void __nvoc_up_thunk_RsResource_profilerDevPreDestruct(struct ProfilerDev *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset)); } // profilerDevControlFilter: virtual inherited (res) base (profilerBase) -static NV_STATUS __nvoc_up_thunk_RsResource_profilerDevControlFilter(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_profilerDevControlFilter(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset), pCallContext, pParams); } // profilerDevIsPartialUnmapSupported: inline virtual inherited (res) base (profilerBase) body -static NvBool __nvoc_up_thunk_RsResource_profilerDevIsPartialUnmapSupported(struct ProfilerDev *pResource) { +NvBool __nvoc_up_thunk_RsResource_profilerDevIsPartialUnmapSupported(struct ProfilerDev *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset)); } // profilerDevMapTo: virtual inherited (res) base (profilerBase) -static NV_STATUS __nvoc_up_thunk_RsResource_profilerDevMapTo(struct ProfilerDev *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_profilerDevMapTo(struct ProfilerDev *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset), pParams); } // profilerDevUnmapFrom: virtual inherited (res) base (profilerBase) -static NV_STATUS __nvoc_up_thunk_RsResource_profilerDevUnmapFrom(struct ProfilerDev *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_profilerDevUnmapFrom(struct ProfilerDev *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset), pParams); } // profilerDevGetRefCount: virtual inherited (res) base (profilerBase) -static NvU32 __nvoc_up_thunk_RsResource_profilerDevGetRefCount(struct ProfilerDev *pResource) { +NvU32 __nvoc_up_thunk_RsResource_profilerDevGetRefCount(struct ProfilerDev *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset)); } // profilerDevAddAdditionalDependants: virtual inherited (res) base (profilerBase) -static void __nvoc_up_thunk_RsResource_profilerDevAddAdditionalDependants(struct RsClient *pClient, struct ProfilerDev *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_profilerDevAddAdditionalDependants(struct RsClient *pClient, struct ProfilerDev *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ProfilerDev_RsResource.offset), pReference); } @@ -1469,88 +2333,138 @@ static void __nvoc_init_funcTable_ProfilerDev_1(ProfilerDev *pThis, RmHalspecOwn { pThis->__profilerDevDestructState__ = &profilerDevDestructState_FWCLIENT; } - - // profilerDevControl -- virtual inherited (gpures) base (profilerBase) - pThis->__profilerDevControl__ = &__nvoc_up_thunk_GpuResource_profilerDevControl; - - // profilerDevMap -- virtual inherited (gpures) base (profilerBase) - pThis->__profilerDevMap__ = &__nvoc_up_thunk_GpuResource_profilerDevMap; - - // profilerDevUnmap -- virtual inherited (gpures) base (profilerBase) - pThis->__profilerDevUnmap__ = &__nvoc_up_thunk_GpuResource_profilerDevUnmap; - - // profilerDevShareCallback -- virtual inherited (gpures) base (profilerBase) - pThis->__profilerDevShareCallback__ = &__nvoc_up_thunk_GpuResource_profilerDevShareCallback; - - // profilerDevGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (profilerBase) - pThis->__profilerDevGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_profilerDevGetRegBaseOffsetAndSize; - - // profilerDevGetMapAddrSpace -- virtual inherited (gpures) base (profilerBase) - pThis->__profilerDevGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_profilerDevGetMapAddrSpace; - - // profilerDevInternalControlForward -- virtual inherited (gpures) base (profilerBase) - pThis->__profilerDevInternalControlForward__ = &__nvoc_up_thunk_GpuResource_profilerDevInternalControlForward; - - // profilerDevGetInternalObjectHandle -- virtual inherited (gpures) base (profilerBase) - pThis->__profilerDevGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_profilerDevGetInternalObjectHandle; - - // profilerDevAccessCallback -- virtual inherited (rmres) base (profilerBase) - pThis->__profilerDevAccessCallback__ = &__nvoc_up_thunk_RmResource_profilerDevAccessCallback; - - // profilerDevGetMemInterMapParams -- virtual inherited (rmres) base (profilerBase) - pThis->__profilerDevGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_profilerDevGetMemInterMapParams; - - // profilerDevCheckMemInterUnmap -- virtual inherited (rmres) base (profilerBase) - pThis->__profilerDevCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_profilerDevCheckMemInterUnmap; - - // profilerDevGetMemoryMappingDescriptor -- virtual inherited (rmres) base (profilerBase) - pThis->__profilerDevGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_profilerDevGetMemoryMappingDescriptor; - - // profilerDevControlSerialization_Prologue -- virtual inherited (rmres) base (profilerBase) - pThis->__profilerDevControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_profilerDevControlSerialization_Prologue; - - // profilerDevControlSerialization_Epilogue -- virtual inherited (rmres) base (profilerBase) - pThis->__profilerDevControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerDevControlSerialization_Epilogue; - - // profilerDevControl_Prologue -- virtual inherited (rmres) base (profilerBase) - pThis->__profilerDevControl_Prologue__ = &__nvoc_up_thunk_RmResource_profilerDevControl_Prologue; - - // profilerDevControl_Epilogue -- virtual inherited (rmres) base (profilerBase) - pThis->__profilerDevControl_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerDevControl_Epilogue; - - // profilerDevCanCopy -- virtual inherited (res) base (profilerBase) - pThis->__profilerDevCanCopy__ = &__nvoc_up_thunk_RsResource_profilerDevCanCopy; - - // profilerDevIsDuplicate -- virtual inherited (res) base (profilerBase) - pThis->__profilerDevIsDuplicate__ = &__nvoc_up_thunk_RsResource_profilerDevIsDuplicate; - - // profilerDevPreDestruct -- virtual inherited (res) base (profilerBase) - pThis->__profilerDevPreDestruct__ = &__nvoc_up_thunk_RsResource_profilerDevPreDestruct; - - // profilerDevControlFilter -- virtual inherited (res) base (profilerBase) - pThis->__profilerDevControlFilter__ = &__nvoc_up_thunk_RsResource_profilerDevControlFilter; - - // profilerDevIsPartialUnmapSupported -- inline virtual inherited (res) base (profilerBase) body - pThis->__profilerDevIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_profilerDevIsPartialUnmapSupported; - - // profilerDevMapTo -- virtual inherited (res) base (profilerBase) - pThis->__profilerDevMapTo__ = &__nvoc_up_thunk_RsResource_profilerDevMapTo; - - // profilerDevUnmapFrom -- virtual inherited (res) base (profilerBase) - pThis->__profilerDevUnmapFrom__ = &__nvoc_up_thunk_RsResource_profilerDevUnmapFrom; - - // profilerDevGetRefCount -- virtual inherited (res) base (profilerBase) - pThis->__profilerDevGetRefCount__ = &__nvoc_up_thunk_RsResource_profilerDevGetRefCount; - - // profilerDevAddAdditionalDependants -- virtual inherited (res) base (profilerBase) - pThis->__profilerDevAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_profilerDevAddAdditionalDependants; -} // End __nvoc_init_funcTable_ProfilerDev_1 with approximately 35 basic block(s). +} // End __nvoc_init_funcTable_ProfilerDev_1 with approximately 10 basic block(s). // Initialize vtable(s) for 30 virtual method(s). void __nvoc_init_funcTable_ProfilerDev(ProfilerDev *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 30 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__ProfilerDev vtable = { + .__profilerDevControl__ = &__nvoc_up_thunk_GpuResource_profilerDevControl, // virtual inherited (gpures) base (profilerBase) + .ProfilerBase.__profilerBaseControl__ = &__nvoc_up_thunk_GpuResource_profilerBaseControl, // virtual inherited (gpures) base (gpures) + .ProfilerBase.GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__profilerDevMap__ = &__nvoc_up_thunk_GpuResource_profilerDevMap, // virtual inherited (gpures) base (profilerBase) + .ProfilerBase.__profilerBaseMap__ = &__nvoc_up_thunk_GpuResource_profilerBaseMap, // virtual inherited (gpures) base (gpures) + .ProfilerBase.GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__profilerDevUnmap__ = &__nvoc_up_thunk_GpuResource_profilerDevUnmap, // virtual inherited (gpures) base (profilerBase) + .ProfilerBase.__profilerBaseUnmap__ = &__nvoc_up_thunk_GpuResource_profilerBaseUnmap, // virtual inherited (gpures) base (gpures) + .ProfilerBase.GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__profilerDevShareCallback__ = &__nvoc_up_thunk_GpuResource_profilerDevShareCallback, // virtual inherited (gpures) base (profilerBase) + .ProfilerBase.__profilerBaseShareCallback__ = &__nvoc_up_thunk_GpuResource_profilerBaseShareCallback, // virtual inherited (gpures) base (gpures) + .ProfilerBase.GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__profilerDevGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_profilerDevGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (profilerBase) + .ProfilerBase.__profilerBaseGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_profilerBaseGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .ProfilerBase.GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__profilerDevGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_profilerDevGetMapAddrSpace, // virtual inherited (gpures) base (profilerBase) + .ProfilerBase.__profilerBaseGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_profilerBaseGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .ProfilerBase.GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__profilerDevInternalControlForward__ = &__nvoc_up_thunk_GpuResource_profilerDevInternalControlForward, // virtual inherited (gpures) base (profilerBase) + .ProfilerBase.__profilerBaseInternalControlForward__ = &__nvoc_up_thunk_GpuResource_profilerBaseInternalControlForward, // virtual inherited (gpures) base (gpures) + .ProfilerBase.GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__profilerDevGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_profilerDevGetInternalObjectHandle, // virtual inherited (gpures) base (profilerBase) + .ProfilerBase.__profilerBaseGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_profilerBaseGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .ProfilerBase.GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__profilerDevAccessCallback__ = &__nvoc_up_thunk_RmResource_profilerDevAccessCallback, // virtual inherited (rmres) base (profilerBase) + .ProfilerBase.__profilerBaseAccessCallback__ = &__nvoc_up_thunk_RmResource_profilerBaseAccessCallback, // virtual inherited (rmres) base (gpures) + .ProfilerBase.GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__profilerDevGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_profilerDevGetMemInterMapParams, // virtual inherited (rmres) base (profilerBase) + .ProfilerBase.__profilerBaseGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_profilerBaseGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .ProfilerBase.GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__profilerDevCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_profilerDevCheckMemInterUnmap, // virtual inherited (rmres) base (profilerBase) + .ProfilerBase.__profilerBaseCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_profilerBaseCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .ProfilerBase.GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__profilerDevGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_profilerDevGetMemoryMappingDescriptor, // virtual inherited (rmres) base (profilerBase) + .ProfilerBase.__profilerBaseGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_profilerBaseGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .ProfilerBase.GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__profilerDevControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_profilerDevControlSerialization_Prologue, // virtual inherited (rmres) base (profilerBase) + .ProfilerBase.__profilerBaseControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_profilerBaseControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .ProfilerBase.GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__profilerDevControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerDevControlSerialization_Epilogue, // virtual inherited (rmres) base (profilerBase) + .ProfilerBase.__profilerBaseControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerBaseControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .ProfilerBase.GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__profilerDevControl_Prologue__ = &__nvoc_up_thunk_RmResource_profilerDevControl_Prologue, // virtual inherited (rmres) base (profilerBase) + .ProfilerBase.__profilerBaseControl_Prologue__ = &__nvoc_up_thunk_RmResource_profilerBaseControl_Prologue, // virtual inherited (rmres) base (gpures) + .ProfilerBase.GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__profilerDevControl_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerDevControl_Epilogue, // virtual inherited (rmres) base (profilerBase) + .ProfilerBase.__profilerBaseControl_Epilogue__ = &__nvoc_up_thunk_RmResource_profilerBaseControl_Epilogue, // virtual inherited (rmres) base (gpures) + .ProfilerBase.GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__profilerDevCanCopy__ = &__nvoc_up_thunk_RsResource_profilerDevCanCopy, // virtual inherited (res) base (profilerBase) + .ProfilerBase.__profilerBaseCanCopy__ = &__nvoc_up_thunk_RsResource_profilerBaseCanCopy, // virtual inherited (res) base (gpures) + .ProfilerBase.GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__profilerDevIsDuplicate__ = &__nvoc_up_thunk_RsResource_profilerDevIsDuplicate, // virtual inherited (res) base (profilerBase) + .ProfilerBase.__profilerBaseIsDuplicate__ = &__nvoc_up_thunk_RsResource_profilerBaseIsDuplicate, // virtual inherited (res) base (gpures) + .ProfilerBase.GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__profilerDevPreDestruct__ = &__nvoc_up_thunk_RsResource_profilerDevPreDestruct, // virtual inherited (res) base (profilerBase) + .ProfilerBase.__profilerBasePreDestruct__ = &__nvoc_up_thunk_RsResource_profilerBasePreDestruct, // virtual inherited (res) base (gpures) + .ProfilerBase.GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__profilerDevControlFilter__ = &__nvoc_up_thunk_RsResource_profilerDevControlFilter, // virtual inherited (res) base (profilerBase) + .ProfilerBase.__profilerBaseControlFilter__ = &__nvoc_up_thunk_RsResource_profilerBaseControlFilter, // virtual inherited (res) base (gpures) + .ProfilerBase.GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__profilerDevIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_profilerDevIsPartialUnmapSupported, // inline virtual inherited (res) base (profilerBase) body + .ProfilerBase.__profilerBaseIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_profilerBaseIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .ProfilerBase.GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .ProfilerBase.GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .ProfilerBase.GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__profilerDevMapTo__ = &__nvoc_up_thunk_RsResource_profilerDevMapTo, // virtual inherited (res) base (profilerBase) + .ProfilerBase.__profilerBaseMapTo__ = &__nvoc_up_thunk_RsResource_profilerBaseMapTo, // virtual inherited (res) base (gpures) + .ProfilerBase.GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__profilerDevUnmapFrom__ = &__nvoc_up_thunk_RsResource_profilerDevUnmapFrom, // virtual inherited (res) base (profilerBase) + .ProfilerBase.__profilerBaseUnmapFrom__ = &__nvoc_up_thunk_RsResource_profilerBaseUnmapFrom, // virtual inherited (res) base (gpures) + .ProfilerBase.GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__profilerDevGetRefCount__ = &__nvoc_up_thunk_RsResource_profilerDevGetRefCount, // virtual inherited (res) base (profilerBase) + .ProfilerBase.__profilerBaseGetRefCount__ = &__nvoc_up_thunk_RsResource_profilerBaseGetRefCount, // virtual inherited (res) base (gpures) + .ProfilerBase.GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__profilerDevAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_profilerDevAddAdditionalDependants, // virtual inherited (res) base (profilerBase) + .ProfilerBase.__profilerBaseAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_profilerBaseAddAdditionalDependants, // virtual inherited (res) base (gpures) + .ProfilerBase.GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .ProfilerBase.GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .ProfilerBase.GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.ProfilerBase.GpuResource.RmResource.RsResource; // (res) super^4 + pThis->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.ProfilerBase.GpuResource.RmResource; // (rmres) super^3 + pThis->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_vtable = &vtable.ProfilerBase.GpuResource; // (gpures) super^2 + pThis->__nvoc_base_ProfilerBase.__nvoc_vtable = &vtable.ProfilerBase; // (profilerBase) super + pThis->__nvoc_vtable = &vtable; // (profilerDev) this + + // Initialize vtable(s) with 5 per-object function pointer(s). __nvoc_init_funcTable_ProfilerDev_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_profiler_v2_nvoc.h b/src/nvidia/generated/g_profiler_v2_nvoc.h index 05fec6bdc3..b0c7f4cee7 100644 --- a/src/nvidia/generated/g_profiler_v2_nvoc.h +++ b/src/nvidia/generated/g_profiler_v2_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -52,11 +52,14 @@ extern "C" { #include "nvoc/utility.h" #include "gpu/hwpm/kern_hwpm_common_defs.h" +#include "class/clb1cc.h" // MAXWELL_PROFILER_CONTEXT + #include "class/clb2cc.h" // MAXWELL_PROFILER_DEVICE typedef struct { - NvBool bMemoryProfilingPermitted; + NvBool bVideoMemoryProfilingPermitted; + NvBool bSysMemoryProfilingPermitted; NvBool bAdminProfilingPermitted; NvBool bDevProfilingPermitted; } PROFILER_CLIENT_PERMISSIONS; @@ -72,10 +75,15 @@ typedef struct #endif +// Metadata including vtable +struct NVOC_VTABLE__ProfilerBase; + + struct ProfilerBase { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__ProfilerBase *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -88,7 +96,7 @@ struct ProfilerBase { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct ProfilerBase *__nvoc_pbase_ProfilerBase; // profilerBase - // Vtable with 59 per-object function pointers + // Vtable with 34 per-object function pointers NV_STATUS (*__profilerBaseConstructState__)(struct ProfilerBase * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); // halified (2 hals) body void (*__profilerBaseDestructState__)(struct ProfilerBase * /*this*/); // halified (2 hals) body NV_STATUS (*__profilerBaseCtrlCmdReserveHwpmLegacy__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_RESERVE_HWPM_LEGACY_PARAMS *); // exported (id=0xb0cc0101) @@ -123,6 +131,27 @@ struct ProfilerBase { NV_STATUS (*__profilerBaseCtrlCmdReleaseCgControls__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_POWER_RELEASE_FEATURES_PARAMS *); // halified (2 hals) exported (id=0xb0cc0302) body NV_STATUS (*__profilerBaseCtrlCmdDisableDynamicMMABoost__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_DISABLE_DYNAMIC_MMA_BOOST_PARAMS *); // exported (id=0xb0cc0117) NV_STATUS (*__profilerBaseCtrlCmdGetDynamicMMABoostStatus__)(struct ProfilerBase * /*this*/, NVB0CC_CTRL_GET_DYNAMIC_MMA_BOOST_STATUS_PARAMS *); // exported (id=0xb0cc0118) + + // Data members + NvU32 maxPmaChannels; + NvU32 pmaVchIdx; + NvBool bLegacyHwpm; + struct RsResourceRef **ppBytesAvailable; + struct RsResourceRef **ppStreamBuffers; + struct RsResourceRef *pBoundCntBuf; + struct RsResourceRef *pBoundPmaBuf; + NvU64 profilerId; + HWPM_PMA_STREAM *pPmaStreamList; + NvBool *pBindPointAllocated; + NvBool bMmaBoostDisabled; + NvHandle hSubDevice; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__ProfilerBase { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + NV_STATUS (*__profilerBaseControl__)(struct ProfilerBase * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__profilerBaseMap__)(struct ProfilerBase * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__profilerBaseUnmap__)(struct ProfilerBase * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -148,20 +177,6 @@ struct ProfilerBase { NV_STATUS (*__profilerBaseUnmapFrom__)(struct ProfilerBase * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__profilerBaseGetRefCount__)(struct ProfilerBase * /*this*/); // virtual inherited (res) base (gpures) void (*__profilerBaseAddAdditionalDependants__)(struct RsClient *, struct ProfilerBase * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - NvU32 maxPmaChannels; - NvU32 pmaVchIdx; - NvBool bLegacyHwpm; - struct RsResourceRef **ppBytesAvailable; - struct RsResourceRef **ppStreamBuffers; - struct RsResourceRef *pBoundCntBuf; - struct RsResourceRef *pBoundPmaBuf; - NvU64 profilerId; - HWPM_PMA_STREAM *pPmaStreamList; - NvBool *pBindPointAllocated; - NvBool bMmaBoostDisabled; - NvHandle hSubDevice; }; #ifndef __NVOC_CLASS_ProfilerBase_TYPEDEF__ @@ -271,55 +286,55 @@ NV_STATUS __nvoc_objCreate_ProfilerBase(ProfilerBase**, Dynamic*, NvU32, CALL_CO #define profilerBaseCtrlCmdDisableDynamicMMABoost(pProfiler, pParams) profilerBaseCtrlCmdDisableDynamicMMABoost_DISPATCH(pProfiler, pParams) #define profilerBaseCtrlCmdGetDynamicMMABoostStatus_FNPTR(pProfiler) pProfiler->__profilerBaseCtrlCmdGetDynamicMMABoostStatus__ #define profilerBaseCtrlCmdGetDynamicMMABoostStatus(pProfiler, pParams) profilerBaseCtrlCmdGetDynamicMMABoostStatus_DISPATCH(pProfiler, pParams) -#define profilerBaseControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define profilerBaseControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define profilerBaseControl(pGpuResource, pCallContext, pParams) profilerBaseControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define profilerBaseMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define profilerBaseMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define profilerBaseMap(pGpuResource, pCallContext, pParams, pCpuMapping) profilerBaseMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define profilerBaseUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define profilerBaseUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define profilerBaseUnmap(pGpuResource, pCallContext, pCpuMapping) profilerBaseUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define profilerBaseShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define profilerBaseShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define profilerBaseShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) profilerBaseShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define profilerBaseGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define profilerBaseGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define profilerBaseGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) profilerBaseGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define profilerBaseGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define profilerBaseGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define profilerBaseGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) profilerBaseGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define profilerBaseInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define profilerBaseInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define profilerBaseInternalControlForward(pGpuResource, command, pParams, size) profilerBaseInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define profilerBaseGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define profilerBaseGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define profilerBaseGetInternalObjectHandle(pGpuResource) profilerBaseGetInternalObjectHandle_DISPATCH(pGpuResource) -#define profilerBaseAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define profilerBaseAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define profilerBaseAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) profilerBaseAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define profilerBaseGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define profilerBaseGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define profilerBaseGetMemInterMapParams(pRmResource, pParams) profilerBaseGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define profilerBaseCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define profilerBaseCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define profilerBaseCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) profilerBaseCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define profilerBaseGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define profilerBaseGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define profilerBaseGetMemoryMappingDescriptor(pRmResource, ppMemDesc) profilerBaseGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define profilerBaseControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define profilerBaseControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define profilerBaseControlSerialization_Prologue(pResource, pCallContext, pParams) profilerBaseControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define profilerBaseControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define profilerBaseControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define profilerBaseControlSerialization_Epilogue(pResource, pCallContext, pParams) profilerBaseControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define profilerBaseControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define profilerBaseControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define profilerBaseControl_Prologue(pResource, pCallContext, pParams) profilerBaseControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define profilerBaseControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define profilerBaseControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define profilerBaseControl_Epilogue(pResource, pCallContext, pParams) profilerBaseControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define profilerBaseCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define profilerBaseCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define profilerBaseCanCopy(pResource) profilerBaseCanCopy_DISPATCH(pResource) -#define profilerBaseIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define profilerBaseIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define profilerBaseIsDuplicate(pResource, hMemory, pDuplicate) profilerBaseIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define profilerBasePreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define profilerBasePreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define profilerBasePreDestruct(pResource) profilerBasePreDestruct_DISPATCH(pResource) -#define profilerBaseControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define profilerBaseControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define profilerBaseControlFilter(pResource, pCallContext, pParams) profilerBaseControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define profilerBaseIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define profilerBaseIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define profilerBaseIsPartialUnmapSupported(pResource) profilerBaseIsPartialUnmapSupported_DISPATCH(pResource) -#define profilerBaseMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define profilerBaseMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define profilerBaseMapTo(pResource, pParams) profilerBaseMapTo_DISPATCH(pResource, pParams) -#define profilerBaseUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define profilerBaseUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define profilerBaseUnmapFrom(pResource, pParams) profilerBaseUnmapFrom_DISPATCH(pResource, pParams) -#define profilerBaseGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define profilerBaseGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define profilerBaseGetRefCount(pResource) profilerBaseGetRefCount_DISPATCH(pResource) -#define profilerBaseAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define profilerBaseAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define profilerBaseAddAdditionalDependants(pClient, pResource, pReference) profilerBaseAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions @@ -460,103 +475,103 @@ static inline NV_STATUS profilerBaseCtrlCmdGetDynamicMMABoostStatus_DISPATCH(str } static inline NV_STATUS profilerBaseControl_DISPATCH(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__profilerBaseControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__profilerBaseControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS profilerBaseMap_DISPATCH(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__profilerBaseMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__profilerBaseMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS profilerBaseUnmap_DISPATCH(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__profilerBaseUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__profilerBaseUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool profilerBaseShareCallback_DISPATCH(struct ProfilerBase *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__profilerBaseShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__profilerBaseShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS profilerBaseGetRegBaseOffsetAndSize_DISPATCH(struct ProfilerBase *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__profilerBaseGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__profilerBaseGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS profilerBaseGetMapAddrSpace_DISPATCH(struct ProfilerBase *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__profilerBaseGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__profilerBaseGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS profilerBaseInternalControlForward_DISPATCH(struct ProfilerBase *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__profilerBaseInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__profilerBaseInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle profilerBaseGetInternalObjectHandle_DISPATCH(struct ProfilerBase *pGpuResource) { - return pGpuResource->__profilerBaseGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__profilerBaseGetInternalObjectHandle__(pGpuResource); } static inline NvBool profilerBaseAccessCallback_DISPATCH(struct ProfilerBase *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__profilerBaseAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__profilerBaseAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS profilerBaseGetMemInterMapParams_DISPATCH(struct ProfilerBase *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__profilerBaseGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__profilerBaseGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS profilerBaseCheckMemInterUnmap_DISPATCH(struct ProfilerBase *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__profilerBaseCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__profilerBaseCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS profilerBaseGetMemoryMappingDescriptor_DISPATCH(struct ProfilerBase *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__profilerBaseGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__profilerBaseGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS profilerBaseControlSerialization_Prologue_DISPATCH(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__profilerBaseControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__profilerBaseControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void profilerBaseControlSerialization_Epilogue_DISPATCH(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__profilerBaseControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__profilerBaseControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS profilerBaseControl_Prologue_DISPATCH(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__profilerBaseControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__profilerBaseControl_Prologue__(pResource, pCallContext, pParams); } static inline void profilerBaseControl_Epilogue_DISPATCH(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__profilerBaseControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__profilerBaseControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool profilerBaseCanCopy_DISPATCH(struct ProfilerBase *pResource) { - return pResource->__profilerBaseCanCopy__(pResource); + return pResource->__nvoc_vtable->__profilerBaseCanCopy__(pResource); } static inline NV_STATUS profilerBaseIsDuplicate_DISPATCH(struct ProfilerBase *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__profilerBaseIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__profilerBaseIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void profilerBasePreDestruct_DISPATCH(struct ProfilerBase *pResource) { - pResource->__profilerBasePreDestruct__(pResource); + pResource->__nvoc_vtable->__profilerBasePreDestruct__(pResource); } static inline NV_STATUS profilerBaseControlFilter_DISPATCH(struct ProfilerBase *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__profilerBaseControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__profilerBaseControlFilter__(pResource, pCallContext, pParams); } static inline NvBool profilerBaseIsPartialUnmapSupported_DISPATCH(struct ProfilerBase *pResource) { - return pResource->__profilerBaseIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__profilerBaseIsPartialUnmapSupported__(pResource); } static inline NV_STATUS profilerBaseMapTo_DISPATCH(struct ProfilerBase *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__profilerBaseMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__profilerBaseMapTo__(pResource, pParams); } static inline NV_STATUS profilerBaseUnmapFrom_DISPATCH(struct ProfilerBase *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__profilerBaseUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__profilerBaseUnmapFrom__(pResource, pParams); } static inline NvU32 profilerBaseGetRefCount_DISPATCH(struct ProfilerBase *pResource) { - return pResource->__profilerBaseGetRefCount__(pResource); + return pResource->__nvoc_vtable->__profilerBaseGetRefCount__(pResource); } static inline void profilerBaseAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ProfilerBase *pResource, RsResourceRef *pReference) { - pResource->__profilerBaseAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__profilerBaseAddAdditionalDependants__(pClient, pResource, pReference); } static inline NV_STATUS profilerBaseConstructState_56cd7a(struct ProfilerBase *pProf, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { @@ -621,8 +636,8 @@ static inline NV_STATUS profilerBaseCtrlCmdInternalAllocPmaStream_56cd7a(struct NV_STATUS profilerBaseCtrlCmdInternalQuiescePmaChannel_IMPL(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_QUIESCE_PMA_CHANNEL_PARAMS *pParams); -static inline NV_STATUS profilerBaseCtrlCmdInternalSriovPromotePmaStream_108313(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_SRIOV_PROMOTE_PMA_STREAM_PARAMS *pParams) { - NV_ASSERT_OR_RETURN_PRECOMP(0, ((NvBool)(0 != 0))); +static inline NV_STATUS profilerBaseCtrlCmdInternalSriovPromotePmaStream_86b752(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_SRIOV_PROMOTE_PMA_STREAM_PARAMS *pParams) { + NV_ASSERT_OR_RETURN_PRECOMP(0, NV_FALSE); } NV_STATUS profilerBaseCtrlCmdInternalSriovPromotePmaStream_VF(struct ProfilerBase *pProfiler, NVB0CC_CTRL_INTERNAL_SRIOV_PROMOTE_PMA_STREAM_PARAMS *pParams); @@ -697,10 +712,330 @@ static inline NV_STATUS profilerBaseQuiesceStreamout(struct ProfilerBase *pProf, #endif +// Metadata including vtable +struct NVOC_VTABLE__ProfilerCtx; + + +struct ProfilerCtx { + + // Metadata + const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__ProfilerCtx *__nvoc_vtable; + + // Parent (i.e. superclass or base class) object pointers + struct ProfilerBase __nvoc_base_ProfilerBase; + + // Ancestor object pointers for `staticCast` feature + struct Object *__nvoc_pbase_Object; // obj super^5 + struct RsResource *__nvoc_pbase_RsResource; // res super^4 + struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super^4 + struct RmResource *__nvoc_pbase_RmResource; // rmres super^3 + struct GpuResource *__nvoc_pbase_GpuResource; // gpures super^2 + struct ProfilerBase *__nvoc_pbase_ProfilerBase; // profilerBase super + struct ProfilerCtx *__nvoc_pbase_ProfilerCtx; // profilerCtx + + // Vtable with 4 per-object function pointers + NV_STATUS (*__profilerCtxConstructStatePrologue__)(struct ProfilerCtx * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); // halified (2 hals) body + NV_STATUS (*__profilerCtxConstructStateInterlude__)(struct ProfilerCtx * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); // halified (2 hals) body + NV_STATUS (*__profilerCtxConstructStateEpilogue__)(struct ProfilerCtx * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); // halified (2 hals) body + void (*__profilerCtxDestruct__)(struct ProfilerCtx * /*this*/); // halified (2 hals) override (res) base (profilerBase) body +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__ProfilerCtx { + const struct NVOC_VTABLE__ProfilerBase ProfilerBase; // (profilerBase) 25 function pointers + + NV_STATUS (*__profilerCtxControl__)(struct ProfilerCtx * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (profilerBase) + NV_STATUS (*__profilerCtxMap__)(struct ProfilerCtx * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (profilerBase) + NV_STATUS (*__profilerCtxUnmap__)(struct ProfilerCtx * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (profilerBase) + NvBool (*__profilerCtxShareCallback__)(struct ProfilerCtx * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (profilerBase) + NV_STATUS (*__profilerCtxGetRegBaseOffsetAndSize__)(struct ProfilerCtx * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (profilerBase) + NV_STATUS (*__profilerCtxGetMapAddrSpace__)(struct ProfilerCtx * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (profilerBase) + NV_STATUS (*__profilerCtxInternalControlForward__)(struct ProfilerCtx * /*this*/, NvU32, void *, NvU32); // virtual inherited (gpures) base (profilerBase) + NvHandle (*__profilerCtxGetInternalObjectHandle__)(struct ProfilerCtx * /*this*/); // virtual inherited (gpures) base (profilerBase) + NvBool (*__profilerCtxAccessCallback__)(struct ProfilerCtx * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (profilerBase) + NV_STATUS (*__profilerCtxGetMemInterMapParams__)(struct ProfilerCtx * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (profilerBase) + NV_STATUS (*__profilerCtxCheckMemInterUnmap__)(struct ProfilerCtx * /*this*/, NvBool); // virtual inherited (rmres) base (profilerBase) + NV_STATUS (*__profilerCtxGetMemoryMappingDescriptor__)(struct ProfilerCtx * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (profilerBase) + NV_STATUS (*__profilerCtxControlSerialization_Prologue__)(struct ProfilerCtx * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (profilerBase) + void (*__profilerCtxControlSerialization_Epilogue__)(struct ProfilerCtx * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (profilerBase) + NV_STATUS (*__profilerCtxControl_Prologue__)(struct ProfilerCtx * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (profilerBase) + void (*__profilerCtxControl_Epilogue__)(struct ProfilerCtx * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (profilerBase) + NvBool (*__profilerCtxCanCopy__)(struct ProfilerCtx * /*this*/); // virtual inherited (res) base (profilerBase) + NV_STATUS (*__profilerCtxIsDuplicate__)(struct ProfilerCtx * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (profilerBase) + void (*__profilerCtxPreDestruct__)(struct ProfilerCtx * /*this*/); // virtual inherited (res) base (profilerBase) + NV_STATUS (*__profilerCtxControlFilter__)(struct ProfilerCtx * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (profilerBase) + NvBool (*__profilerCtxIsPartialUnmapSupported__)(struct ProfilerCtx * /*this*/); // inline virtual inherited (res) base (profilerBase) body + NV_STATUS (*__profilerCtxMapTo__)(struct ProfilerCtx * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (profilerBase) + NV_STATUS (*__profilerCtxUnmapFrom__)(struct ProfilerCtx * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (profilerBase) + NvU32 (*__profilerCtxGetRefCount__)(struct ProfilerCtx * /*this*/); // virtual inherited (res) base (profilerBase) + void (*__profilerCtxAddAdditionalDependants__)(struct RsClient *, struct ProfilerCtx * /*this*/, RsResourceRef *); // virtual inherited (res) base (profilerBase) +}; + +#ifndef __NVOC_CLASS_ProfilerCtx_TYPEDEF__ +#define __NVOC_CLASS_ProfilerCtx_TYPEDEF__ +typedef struct ProfilerCtx ProfilerCtx; +#endif /* __NVOC_CLASS_ProfilerCtx_TYPEDEF__ */ + +#ifndef __nvoc_class_id_ProfilerCtx +#define __nvoc_class_id_ProfilerCtx 0xe99229 +#endif /* __nvoc_class_id_ProfilerCtx */ + +// Casting support +extern const struct NVOC_CLASS_DEF __nvoc_class_def_ProfilerCtx; + +#define __staticCast_ProfilerCtx(pThis) \ + ((pThis)->__nvoc_pbase_ProfilerCtx) + +#ifdef __nvoc_profiler_v2_h_disabled +#define __dynamicCast_ProfilerCtx(pThis) ((ProfilerCtx*)NULL) +#else //__nvoc_profiler_v2_h_disabled +#define __dynamicCast_ProfilerCtx(pThis) \ + ((ProfilerCtx*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(ProfilerCtx))) +#endif //__nvoc_profiler_v2_h_disabled + +NV_STATUS __nvoc_objCreateDynamic_ProfilerCtx(ProfilerCtx**, Dynamic*, NvU32, va_list); + +NV_STATUS __nvoc_objCreate_ProfilerCtx(ProfilerCtx**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams); +#define __objCreate_ProfilerCtx(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \ + __nvoc_objCreate_ProfilerCtx((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams) + + +// Wrapper macros +#define profilerCtxConstructStatePrologue_FNPTR(pResource) pResource->__profilerCtxConstructStatePrologue__ +#define profilerCtxConstructStatePrologue(pResource, pCallContext, pParams) profilerCtxConstructStatePrologue_DISPATCH(pResource, pCallContext, pParams) +#define profilerCtxConstructStatePrologue_HAL(pResource, pCallContext, pParams) profilerCtxConstructStatePrologue_DISPATCH(pResource, pCallContext, pParams) +#define profilerCtxConstructStateInterlude_FNPTR(pResource) pResource->__profilerCtxConstructStateInterlude__ +#define profilerCtxConstructStateInterlude(pResource, pCallContext, pParams) profilerCtxConstructStateInterlude_DISPATCH(pResource, pCallContext, pParams) +#define profilerCtxConstructStateInterlude_HAL(pResource, pCallContext, pParams) profilerCtxConstructStateInterlude_DISPATCH(pResource, pCallContext, pParams) +#define profilerCtxConstructStateEpilogue_FNPTR(pResource) pResource->__profilerCtxConstructStateEpilogue__ +#define profilerCtxConstructStateEpilogue(pResource, pCallContext, pParams) profilerCtxConstructStateEpilogue_DISPATCH(pResource, pCallContext, pParams) +#define profilerCtxConstructStateEpilogue_HAL(pResource, pCallContext, pParams) profilerCtxConstructStateEpilogue_DISPATCH(pResource, pCallContext, pParams) +#define profilerCtxDestruct_FNPTR(pResource) pResource->__profilerCtxDestruct__ +#define __nvoc_profilerCtxDestruct(pResource) profilerCtxDestruct_DISPATCH(pResource) +#define profilerCtxControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ +#define profilerCtxControl(pGpuResource, pCallContext, pParams) profilerCtxControl_DISPATCH(pGpuResource, pCallContext, pParams) +#define profilerCtxMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ +#define profilerCtxMap(pGpuResource, pCallContext, pParams, pCpuMapping) profilerCtxMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) +#define profilerCtxUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ +#define profilerCtxUnmap(pGpuResource, pCallContext, pCpuMapping) profilerCtxUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) +#define profilerCtxShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ +#define profilerCtxShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) profilerCtxShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) +#define profilerCtxGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ +#define profilerCtxGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) profilerCtxGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) +#define profilerCtxGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ +#define profilerCtxGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) profilerCtxGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) +#define profilerCtxInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ +#define profilerCtxInternalControlForward(pGpuResource, command, pParams, size) profilerCtxInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) +#define profilerCtxGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ +#define profilerCtxGetInternalObjectHandle(pGpuResource) profilerCtxGetInternalObjectHandle_DISPATCH(pGpuResource) +#define profilerCtxAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ +#define profilerCtxAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) profilerCtxAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) +#define profilerCtxGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ +#define profilerCtxGetMemInterMapParams(pRmResource, pParams) profilerCtxGetMemInterMapParams_DISPATCH(pRmResource, pParams) +#define profilerCtxCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ +#define profilerCtxCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) profilerCtxCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) +#define profilerCtxGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ +#define profilerCtxGetMemoryMappingDescriptor(pRmResource, ppMemDesc) profilerCtxGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) +#define profilerCtxControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ +#define profilerCtxControlSerialization_Prologue(pResource, pCallContext, pParams) profilerCtxControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define profilerCtxControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ +#define profilerCtxControlSerialization_Epilogue(pResource, pCallContext, pParams) profilerCtxControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define profilerCtxControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ +#define profilerCtxControl_Prologue(pResource, pCallContext, pParams) profilerCtxControl_Prologue_DISPATCH(pResource, pCallContext, pParams) +#define profilerCtxControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ +#define profilerCtxControl_Epilogue(pResource, pCallContext, pParams) profilerCtxControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) +#define profilerCtxCanCopy_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ +#define profilerCtxCanCopy(pResource) profilerCtxCanCopy_DISPATCH(pResource) +#define profilerCtxIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ +#define profilerCtxIsDuplicate(pResource, hMemory, pDuplicate) profilerCtxIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) +#define profilerCtxPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ +#define profilerCtxPreDestruct(pResource) profilerCtxPreDestruct_DISPATCH(pResource) +#define profilerCtxControlFilter_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ +#define profilerCtxControlFilter(pResource, pCallContext, pParams) profilerCtxControlFilter_DISPATCH(pResource, pCallContext, pParams) +#define profilerCtxIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ +#define profilerCtxIsPartialUnmapSupported(pResource) profilerCtxIsPartialUnmapSupported_DISPATCH(pResource) +#define profilerCtxMapTo_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ +#define profilerCtxMapTo(pResource, pParams) profilerCtxMapTo_DISPATCH(pResource, pParams) +#define profilerCtxUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ +#define profilerCtxUnmapFrom(pResource, pParams) profilerCtxUnmapFrom_DISPATCH(pResource, pParams) +#define profilerCtxGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ +#define profilerCtxGetRefCount(pResource) profilerCtxGetRefCount_DISPATCH(pResource) +#define profilerCtxAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ +#define profilerCtxAddAdditionalDependants(pClient, pResource, pReference) profilerCtxAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) + +// Dispatch functions +static inline NV_STATUS profilerCtxConstructStatePrologue_DISPATCH(struct ProfilerCtx *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + return pResource->__profilerCtxConstructStatePrologue__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS profilerCtxConstructStateInterlude_DISPATCH(struct ProfilerCtx *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + return pResource->__profilerCtxConstructStateInterlude__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS profilerCtxConstructStateEpilogue_DISPATCH(struct ProfilerCtx *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + return pResource->__profilerCtxConstructStateEpilogue__(pResource, pCallContext, pParams); +} + +static inline void profilerCtxDestruct_DISPATCH(struct ProfilerCtx *pResource) { + pResource->__profilerCtxDestruct__(pResource); +} + +static inline NV_STATUS profilerCtxControl_DISPATCH(struct ProfilerCtx *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pGpuResource->__nvoc_vtable->__profilerCtxControl__(pGpuResource, pCallContext, pParams); +} + +static inline NV_STATUS profilerCtxMap_DISPATCH(struct ProfilerCtx *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__nvoc_vtable->__profilerCtxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); +} + +static inline NV_STATUS profilerCtxUnmap_DISPATCH(struct ProfilerCtx *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { + return pGpuResource->__nvoc_vtable->__profilerCtxUnmap__(pGpuResource, pCallContext, pCpuMapping); +} + +static inline NvBool profilerCtxShareCallback_DISPATCH(struct ProfilerCtx *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { + return pGpuResource->__nvoc_vtable->__profilerCtxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); +} + +static inline NV_STATUS profilerCtxGetRegBaseOffsetAndSize_DISPATCH(struct ProfilerCtx *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { + return pGpuResource->__nvoc_vtable->__profilerCtxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); +} + +static inline NV_STATUS profilerCtxGetMapAddrSpace_DISPATCH(struct ProfilerCtx *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { + return pGpuResource->__nvoc_vtable->__profilerCtxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); +} + +static inline NV_STATUS profilerCtxInternalControlForward_DISPATCH(struct ProfilerCtx *pGpuResource, NvU32 command, void *pParams, NvU32 size) { + return pGpuResource->__nvoc_vtable->__profilerCtxInternalControlForward__(pGpuResource, command, pParams, size); +} + +static inline NvHandle profilerCtxGetInternalObjectHandle_DISPATCH(struct ProfilerCtx *pGpuResource) { + return pGpuResource->__nvoc_vtable->__profilerCtxGetInternalObjectHandle__(pGpuResource); +} + +static inline NvBool profilerCtxAccessCallback_DISPATCH(struct ProfilerCtx *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { + return pResource->__nvoc_vtable->__profilerCtxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); +} + +static inline NV_STATUS profilerCtxGetMemInterMapParams_DISPATCH(struct ProfilerCtx *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { + return pRmResource->__nvoc_vtable->__profilerCtxGetMemInterMapParams__(pRmResource, pParams); +} + +static inline NV_STATUS profilerCtxCheckMemInterUnmap_DISPATCH(struct ProfilerCtx *pRmResource, NvBool bSubdeviceHandleProvided) { + return pRmResource->__nvoc_vtable->__profilerCtxCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); +} + +static inline NV_STATUS profilerCtxGetMemoryMappingDescriptor_DISPATCH(struct ProfilerCtx *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { + return pRmResource->__nvoc_vtable->__profilerCtxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); +} + +static inline NV_STATUS profilerCtxControlSerialization_Prologue_DISPATCH(struct ProfilerCtx *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__nvoc_vtable->__profilerCtxControlSerialization_Prologue__(pResource, pCallContext, pParams); +} + +static inline void profilerCtxControlSerialization_Epilogue_DISPATCH(struct ProfilerCtx *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__nvoc_vtable->__profilerCtxControlSerialization_Epilogue__(pResource, pCallContext, pParams); +} + +static inline NV_STATUS profilerCtxControl_Prologue_DISPATCH(struct ProfilerCtx *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__nvoc_vtable->__profilerCtxControl_Prologue__(pResource, pCallContext, pParams); +} + +static inline void profilerCtxControl_Epilogue_DISPATCH(struct ProfilerCtx *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + pResource->__nvoc_vtable->__profilerCtxControl_Epilogue__(pResource, pCallContext, pParams); +} + +static inline NvBool profilerCtxCanCopy_DISPATCH(struct ProfilerCtx *pResource) { + return pResource->__nvoc_vtable->__profilerCtxCanCopy__(pResource); +} + +static inline NV_STATUS profilerCtxIsDuplicate_DISPATCH(struct ProfilerCtx *pResource, NvHandle hMemory, NvBool *pDuplicate) { + return pResource->__nvoc_vtable->__profilerCtxIsDuplicate__(pResource, hMemory, pDuplicate); +} + +static inline void profilerCtxPreDestruct_DISPATCH(struct ProfilerCtx *pResource) { + pResource->__nvoc_vtable->__profilerCtxPreDestruct__(pResource); +} + +static inline NV_STATUS profilerCtxControlFilter_DISPATCH(struct ProfilerCtx *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { + return pResource->__nvoc_vtable->__profilerCtxControlFilter__(pResource, pCallContext, pParams); +} + +static inline NvBool profilerCtxIsPartialUnmapSupported_DISPATCH(struct ProfilerCtx *pResource) { + return pResource->__nvoc_vtable->__profilerCtxIsPartialUnmapSupported__(pResource); +} + +static inline NV_STATUS profilerCtxMapTo_DISPATCH(struct ProfilerCtx *pResource, RS_RES_MAP_TO_PARAMS *pParams) { + return pResource->__nvoc_vtable->__profilerCtxMapTo__(pResource, pParams); +} + +static inline NV_STATUS profilerCtxUnmapFrom_DISPATCH(struct ProfilerCtx *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { + return pResource->__nvoc_vtable->__profilerCtxUnmapFrom__(pResource, pParams); +} + +static inline NvU32 profilerCtxGetRefCount_DISPATCH(struct ProfilerCtx *pResource) { + return pResource->__nvoc_vtable->__profilerCtxGetRefCount__(pResource); +} + +static inline void profilerCtxAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ProfilerCtx *pResource, RsResourceRef *pReference) { + pResource->__nvoc_vtable->__profilerCtxAddAdditionalDependants__(pClient, pResource, pReference); +} + +NV_STATUS profilerCtxConstructStatePrologue_FWCLIENT(struct ProfilerCtx *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); + +static inline NV_STATUS profilerCtxConstructStatePrologue_92bfc3(struct ProfilerCtx *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +NV_STATUS profilerCtxConstructStateInterlude_IMPL(struct ProfilerCtx *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); + +static inline NV_STATUS profilerCtxConstructStateInterlude_92bfc3(struct ProfilerCtx *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +static inline NV_STATUS profilerCtxConstructStateEpilogue_56cd7a(struct ProfilerCtx *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + return NV_OK; +} + +static inline NV_STATUS profilerCtxConstructStateEpilogue_92bfc3(struct ProfilerCtx *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + NV_ASSERT_PRECOMP(0); + return NV_ERR_NOT_SUPPORTED; +} + +void profilerCtxDestruct_FWCLIENT(struct ProfilerCtx *pResource); + +static inline void profilerCtxDestruct_b3696a(struct ProfilerCtx *pResource) { + return; +} + +NV_STATUS profilerCtxConstruct_IMPL(struct ProfilerCtx *arg_pResource, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); + +#define __nvoc_profilerCtxConstruct(arg_pResource, arg_pCallContext, arg_pParams) profilerCtxConstruct_IMPL(arg_pResource, arg_pCallContext, arg_pParams) +#undef PRIVATE_FIELD + + +// Private field names are wrapped in PRIVATE_FIELD, which does nothing for +// the matching C source file, but causes diagnostics to be issued if another +// source file references the field. +#ifdef NVOC_PROFILER_V2_H_PRIVATE_ACCESS_ALLOWED +#define PRIVATE_FIELD(x) x +#else +#define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) +#endif + + +// Metadata including vtable +struct NVOC_VTABLE__ProfilerDev; + + struct ProfilerDev { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__ProfilerDev *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct ProfilerBase __nvoc_base_ProfilerBase; @@ -714,12 +1049,19 @@ struct ProfilerDev { struct ProfilerBase *__nvoc_pbase_ProfilerBase; // profilerBase super struct ProfilerDev *__nvoc_pbase_ProfilerDev; // profilerDev - // Vtable with 30 per-object function pointers + // Vtable with 5 per-object function pointers NV_STATUS (*__profilerDevConstructState__)(struct ProfilerDev * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *, PROFILER_CLIENT_PERMISSIONS); // halified (2 hals) override (profilerBase) base (profilerBase) NV_STATUS (*__profilerDevConstructStatePrologue__)(struct ProfilerDev * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); // halified (2 hals) body NV_STATUS (*__profilerDevConstructStateInterlude__)(struct ProfilerDev * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *, PROFILER_CLIENT_PERMISSIONS); // halified (2 hals) body NV_STATUS (*__profilerDevConstructStateEpilogue__)(struct ProfilerDev * /*this*/, CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *); // halified (2 hals) body void (*__profilerDevDestructState__)(struct ProfilerDev * /*this*/); // halified (2 hals) override (profilerBase) base (profilerBase) body +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__ProfilerDev { + const struct NVOC_VTABLE__ProfilerBase ProfilerBase; // (profilerBase) 25 function pointers + NV_STATUS (*__profilerDevControl__)(struct ProfilerDev * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (profilerBase) NV_STATUS (*__profilerDevMap__)(struct ProfilerDev * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (profilerBase) NV_STATUS (*__profilerDevUnmap__)(struct ProfilerDev * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (profilerBase) @@ -792,55 +1134,55 @@ NV_STATUS __nvoc_objCreate_ProfilerDev(ProfilerDev**, Dynamic*, NvU32, CALL_CONT #define profilerDevDestructState_FNPTR(pResource) pResource->__profilerDevDestructState__ #define profilerDevDestructState(pResource) profilerDevDestructState_DISPATCH(pResource) #define profilerDevDestructState_HAL(pResource) profilerDevDestructState_DISPATCH(pResource) -#define profilerDevControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__gpuresControl__ +#define profilerDevControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define profilerDevControl(pGpuResource, pCallContext, pParams) profilerDevControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define profilerDevMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__gpuresMap__ +#define profilerDevMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define profilerDevMap(pGpuResource, pCallContext, pParams, pCpuMapping) profilerDevMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define profilerDevUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__gpuresUnmap__ +#define profilerDevUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define profilerDevUnmap(pGpuResource, pCallContext, pCpuMapping) profilerDevUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define profilerDevShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__gpuresShareCallback__ +#define profilerDevShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define profilerDevShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) profilerDevShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define profilerDevGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define profilerDevGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define profilerDevGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) profilerDevGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define profilerDevGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define profilerDevGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define profilerDevGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) profilerDevGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define profilerDevInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define profilerDevInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define profilerDevInternalControlForward(pGpuResource, command, pParams, size) profilerDevInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define profilerDevGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define profilerDevGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define profilerDevGetInternalObjectHandle(pGpuResource) profilerDevGetInternalObjectHandle_DISPATCH(pGpuResource) -#define profilerDevAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define profilerDevAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define profilerDevAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) profilerDevAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define profilerDevGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define profilerDevGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define profilerDevGetMemInterMapParams(pRmResource, pParams) profilerDevGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define profilerDevCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define profilerDevCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define profilerDevCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) profilerDevCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define profilerDevGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define profilerDevGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define profilerDevGetMemoryMappingDescriptor(pRmResource, ppMemDesc) profilerDevGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define profilerDevControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define profilerDevControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define profilerDevControlSerialization_Prologue(pResource, pCallContext, pParams) profilerDevControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define profilerDevControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define profilerDevControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define profilerDevControlSerialization_Epilogue(pResource, pCallContext, pParams) profilerDevControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define profilerDevControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define profilerDevControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define profilerDevControl_Prologue(pResource, pCallContext, pParams) profilerDevControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define profilerDevControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define profilerDevControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define profilerDevControl_Epilogue(pResource, pCallContext, pParams) profilerDevControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define profilerDevCanCopy_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define profilerDevCanCopy_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define profilerDevCanCopy(pResource) profilerDevCanCopy_DISPATCH(pResource) -#define profilerDevIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define profilerDevIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define profilerDevIsDuplicate(pResource, hMemory, pDuplicate) profilerDevIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define profilerDevPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define profilerDevPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define profilerDevPreDestruct(pResource) profilerDevPreDestruct_DISPATCH(pResource) -#define profilerDevControlFilter_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define profilerDevControlFilter_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define profilerDevControlFilter(pResource, pCallContext, pParams) profilerDevControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define profilerDevIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define profilerDevIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define profilerDevIsPartialUnmapSupported(pResource) profilerDevIsPartialUnmapSupported_DISPATCH(pResource) -#define profilerDevMapTo_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define profilerDevMapTo_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define profilerDevMapTo(pResource, pParams) profilerDevMapTo_DISPATCH(pResource, pParams) -#define profilerDevUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define profilerDevUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define profilerDevUnmapFrom(pResource, pParams) profilerDevUnmapFrom_DISPATCH(pResource, pParams) -#define profilerDevGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define profilerDevGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define profilerDevGetRefCount(pResource) profilerDevGetRefCount_DISPATCH(pResource) -#define profilerDevAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define profilerDevAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ProfilerBase.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define profilerDevAddAdditionalDependants(pClient, pResource, pReference) profilerDevAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions @@ -865,103 +1207,103 @@ static inline void profilerDevDestructState_DISPATCH(struct ProfilerDev *pResour } static inline NV_STATUS profilerDevControl_DISPATCH(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__profilerDevControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__profilerDevControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS profilerDevMap_DISPATCH(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__profilerDevMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__profilerDevMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS profilerDevUnmap_DISPATCH(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__profilerDevUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__profilerDevUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool profilerDevShareCallback_DISPATCH(struct ProfilerDev *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__profilerDevShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__profilerDevShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS profilerDevGetRegBaseOffsetAndSize_DISPATCH(struct ProfilerDev *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__profilerDevGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__profilerDevGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS profilerDevGetMapAddrSpace_DISPATCH(struct ProfilerDev *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__profilerDevGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__profilerDevGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS profilerDevInternalControlForward_DISPATCH(struct ProfilerDev *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__profilerDevInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__profilerDevInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle profilerDevGetInternalObjectHandle_DISPATCH(struct ProfilerDev *pGpuResource) { - return pGpuResource->__profilerDevGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__profilerDevGetInternalObjectHandle__(pGpuResource); } static inline NvBool profilerDevAccessCallback_DISPATCH(struct ProfilerDev *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__profilerDevAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__profilerDevAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS profilerDevGetMemInterMapParams_DISPATCH(struct ProfilerDev *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__profilerDevGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__profilerDevGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS profilerDevCheckMemInterUnmap_DISPATCH(struct ProfilerDev *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__profilerDevCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__profilerDevCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS profilerDevGetMemoryMappingDescriptor_DISPATCH(struct ProfilerDev *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__profilerDevGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__profilerDevGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS profilerDevControlSerialization_Prologue_DISPATCH(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__profilerDevControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__profilerDevControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void profilerDevControlSerialization_Epilogue_DISPATCH(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__profilerDevControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__profilerDevControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS profilerDevControl_Prologue_DISPATCH(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__profilerDevControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__profilerDevControl_Prologue__(pResource, pCallContext, pParams); } static inline void profilerDevControl_Epilogue_DISPATCH(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__profilerDevControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__profilerDevControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool profilerDevCanCopy_DISPATCH(struct ProfilerDev *pResource) { - return pResource->__profilerDevCanCopy__(pResource); + return pResource->__nvoc_vtable->__profilerDevCanCopy__(pResource); } static inline NV_STATUS profilerDevIsDuplicate_DISPATCH(struct ProfilerDev *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__profilerDevIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__profilerDevIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void profilerDevPreDestruct_DISPATCH(struct ProfilerDev *pResource) { - pResource->__profilerDevPreDestruct__(pResource); + pResource->__nvoc_vtable->__profilerDevPreDestruct__(pResource); } static inline NV_STATUS profilerDevControlFilter_DISPATCH(struct ProfilerDev *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__profilerDevControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__profilerDevControlFilter__(pResource, pCallContext, pParams); } static inline NvBool profilerDevIsPartialUnmapSupported_DISPATCH(struct ProfilerDev *pResource) { - return pResource->__profilerDevIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__profilerDevIsPartialUnmapSupported__(pResource); } static inline NV_STATUS profilerDevMapTo_DISPATCH(struct ProfilerDev *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__profilerDevMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__profilerDevMapTo__(pResource, pParams); } static inline NV_STATUS profilerDevUnmapFrom_DISPATCH(struct ProfilerDev *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__profilerDevUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__profilerDevUnmapFrom__(pResource, pParams); } static inline NvU32 profilerDevGetRefCount_DISPATCH(struct ProfilerDev *pResource) { - return pResource->__profilerDevGetRefCount__(pResource); + return pResource->__nvoc_vtable->__profilerDevGetRefCount__(pResource); } static inline void profilerDevAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ProfilerDev *pResource, RsResourceRef *pReference) { - pResource->__profilerDevAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__profilerDevAddAdditionalDependants__(pClient, pResource, pReference); } NvBool profilerDevQueryCapabilities_IMPL(struct ProfilerDev *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams, PROFILER_CLIENT_PERMISSIONS *pClientPermissions); diff --git a/src/nvidia/generated/g_ref_count_nvoc.c b/src/nvidia/generated/g_ref_count_nvoc.c index 8c5cd34a4f..56122f5310 100644 --- a/src/nvidia/generated/g_ref_count_nvoc.c +++ b/src/nvidia/generated/g_ref_count_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJREFCNT = /*pExportInfo=*/ &__nvoc_export_info_OBJREFCNT }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJREFCNT = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_ref_count_nvoc.h b/src/nvidia/generated/g_ref_count_nvoc.h index 9edc32d277..113adcf7d7 100644 --- a/src/nvidia/generated/g_ref_count_nvoc.h +++ b/src/nvidia/generated/g_ref_count_nvoc.h @@ -7,14 +7,14 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2013-2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2013-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -70,7 +70,8 @@ typedef struct MAKE_MAP(REFCNT_REQUESTER_ENTRY_MAP, REFCNT_REQUESTER_ENTRY); -typedef struct OBJREFCNT *POBJREFCNT; + +struct OBJREFCNT; #ifndef __NVOC_CLASS_OBJREFCNT_TYPEDEF__ #define __NVOC_CLASS_OBJREFCNT_TYPEDEF__ diff --git a/src/nvidia/generated/g_reg_mem_nvoc.c b/src/nvidia/generated/g_reg_mem_nvoc.c index e4d91fead5..391f183038 100644 --- a/src/nvidia/generated/g_reg_mem_nvoc.c +++ b/src/nvidia/generated/g_reg_mem_nvoc.c @@ -93,138 +93,207 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_RegisterMemory = /*pExportInfo=*/ &__nvoc_export_info_RegisterMemory }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super +NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super +NvBool __nvoc_down_thunk_RegisterMemory_resCanCopy(struct RsResource *pRegisterMemory); // this + // 1 down-thunk(s) defined to bridge methods in RegisterMemory from superclasses // regmemCanCopy: virtual override (res) base (mem) -static NvBool __nvoc_down_thunk_RegisterMemory_resCanCopy(struct RsResource *pRegisterMemory) { +NvBool __nvoc_down_thunk_RegisterMemory_resCanCopy(struct RsResource *pRegisterMemory) { return regmemCanCopy((struct RegisterMemory *)(((unsigned char *) pRegisterMemory) - __nvoc_rtti_RegisterMemory_RsResource.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_Memory_regmemIsDuplicate(struct RegisterMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate); // this +NV_STATUS __nvoc_up_thunk_Memory_regmemGetMapAddrSpace(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_Memory_regmemControl(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_regmemMap(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_regmemUnmap(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_regmemGetMemInterMapParams(struct RegisterMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_regmemCheckMemInterUnmap(struct RegisterMemory *pMemory, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_Memory_regmemGetMemoryMappingDescriptor(struct RegisterMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_Memory_regmemCheckCopyPermissions(struct RegisterMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // this +NV_STATUS __nvoc_up_thunk_Memory_regmemIsReady(struct RegisterMemory *pMemory, NvBool bCopyConstructorContext); // this +NvBool __nvoc_up_thunk_Memory_regmemIsGpuMapAllowed(struct RegisterMemory *pMemory, struct OBJGPU *pGpu); // this +NvBool __nvoc_up_thunk_Memory_regmemIsExportAllowed(struct RegisterMemory *pMemory); // this +NvBool __nvoc_up_thunk_RmResource_regmemAccessCallback(struct RegisterMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_regmemShareCallback(struct RegisterMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_regmemControlSerialization_Prologue(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_regmemControlSerialization_Epilogue(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_regmemControl_Prologue(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_regmemControl_Epilogue(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RsResource_regmemPreDestruct(struct RegisterMemory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_regmemControlFilter(struct RegisterMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_regmemIsPartialUnmapSupported(struct RegisterMemory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_regmemMapTo(struct RegisterMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_regmemUnmapFrom(struct RegisterMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_regmemGetRefCount(struct RegisterMemory *pResource); // this +void __nvoc_up_thunk_RsResource_regmemAddAdditionalDependants(struct RsClient *pClient, struct RegisterMemory *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in RegisterMemory to superclasses // regmemIsDuplicate: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_regmemIsDuplicate(struct RegisterMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_Memory_regmemIsDuplicate(struct RegisterMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), hMemory, pDuplicate); } // regmemGetMapAddrSpace: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_regmemGetMapAddrSpace(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_Memory_regmemGetMapAddrSpace(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); } // regmemControl: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_regmemControl(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_regmemControl(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), pCallContext, pParams); } // regmemMap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_regmemMap(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_regmemMap(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), pCallContext, pParams, pCpuMapping); } // regmemUnmap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_regmemUnmap(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_regmemUnmap(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), pCallContext, pCpuMapping); } // regmemGetMemInterMapParams: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_regmemGetMemInterMapParams(struct RegisterMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_regmemGetMemInterMapParams(struct RegisterMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), pParams); } // regmemCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_regmemCheckMemInterUnmap(struct RegisterMemory *pMemory, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_Memory_regmemCheckMemInterUnmap(struct RegisterMemory *pMemory, NvBool bSubdeviceHandleProvided) { return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), bSubdeviceHandleProvided); } // regmemGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_regmemGetMemoryMappingDescriptor(struct RegisterMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_Memory_regmemGetMemoryMappingDescriptor(struct RegisterMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), ppMemDesc); } // regmemCheckCopyPermissions: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_regmemCheckCopyPermissions(struct RegisterMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { +NV_STATUS __nvoc_up_thunk_Memory_regmemCheckCopyPermissions(struct RegisterMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), pDstGpu, pDstDevice); } // regmemIsReady: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_regmemIsReady(struct RegisterMemory *pMemory, NvBool bCopyConstructorContext) { +NV_STATUS __nvoc_up_thunk_Memory_regmemIsReady(struct RegisterMemory *pMemory, NvBool bCopyConstructorContext) { return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), bCopyConstructorContext); } // regmemIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_regmemIsGpuMapAllowed(struct RegisterMemory *pMemory, struct OBJGPU *pGpu) { +NvBool __nvoc_up_thunk_Memory_regmemIsGpuMapAllowed(struct RegisterMemory *pMemory, struct OBJGPU *pGpu) { return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset), pGpu); } // regmemIsExportAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_regmemIsExportAllowed(struct RegisterMemory *pMemory) { +NvBool __nvoc_up_thunk_Memory_regmemIsExportAllowed(struct RegisterMemory *pMemory) { return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_RegisterMemory_Memory.offset)); } // regmemAccessCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_regmemAccessCallback(struct RegisterMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_regmemAccessCallback(struct RegisterMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // regmemShareCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_regmemShareCallback(struct RegisterMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_regmemShareCallback(struct RegisterMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // regmemControlSerialization_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_regmemControlSerialization_Prologue(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_regmemControlSerialization_Prologue(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RmResource.offset), pCallContext, pParams); } // regmemControlSerialization_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_regmemControlSerialization_Epilogue(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_regmemControlSerialization_Epilogue(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RmResource.offset), pCallContext, pParams); } // regmemControl_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_regmemControl_Prologue(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_regmemControl_Prologue(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RmResource.offset), pCallContext, pParams); } // regmemControl_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_regmemControl_Epilogue(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_regmemControl_Epilogue(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RmResource.offset), pCallContext, pParams); } // regmemPreDestruct: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_regmemPreDestruct(struct RegisterMemory *pResource) { +void __nvoc_up_thunk_RsResource_regmemPreDestruct(struct RegisterMemory *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RsResource.offset)); } // regmemControlFilter: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_regmemControlFilter(struct RegisterMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_regmemControlFilter(struct RegisterMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RsResource.offset), pCallContext, pParams); } // regmemIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body -static NvBool __nvoc_up_thunk_RsResource_regmemIsPartialUnmapSupported(struct RegisterMemory *pResource) { +NvBool __nvoc_up_thunk_RsResource_regmemIsPartialUnmapSupported(struct RegisterMemory *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RsResource.offset)); } // regmemMapTo: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_regmemMapTo(struct RegisterMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_regmemMapTo(struct RegisterMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RsResource.offset), pParams); } // regmemUnmapFrom: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_regmemUnmapFrom(struct RegisterMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_regmemUnmapFrom(struct RegisterMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RsResource.offset), pParams); } // regmemGetRefCount: virtual inherited (res) base (mem) -static NvU32 __nvoc_up_thunk_RsResource_regmemGetRefCount(struct RegisterMemory *pResource) { +NvU32 __nvoc_up_thunk_RsResource_regmemGetRefCount(struct RegisterMemory *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RsResource.offset)); } // regmemAddAdditionalDependants: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_regmemAddAdditionalDependants(struct RsClient *pClient, struct RegisterMemory *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_regmemAddAdditionalDependants(struct RsClient *pClient, struct RegisterMemory *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RegisterMemory_RsResource.offset), pReference); } @@ -267,92 +336,112 @@ NV_STATUS __nvoc_ctor_RegisterMemory(RegisterMemory *pThis, CALL_CONTEXT * arg_p // Vtable initialization static void __nvoc_init_funcTable_RegisterMemory_1(RegisterMemory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // regmemCanCopy -- virtual override (res) base (mem) - pThis->__regmemCanCopy__ = ®memCanCopy_IMPL; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_RegisterMemory_resCanCopy; - - // regmemIsDuplicate -- virtual inherited (mem) base (mem) - pThis->__regmemIsDuplicate__ = &__nvoc_up_thunk_Memory_regmemIsDuplicate; - - // regmemGetMapAddrSpace -- virtual inherited (mem) base (mem) - pThis->__regmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_regmemGetMapAddrSpace; - - // regmemControl -- virtual inherited (mem) base (mem) - pThis->__regmemControl__ = &__nvoc_up_thunk_Memory_regmemControl; - - // regmemMap -- virtual inherited (mem) base (mem) - pThis->__regmemMap__ = &__nvoc_up_thunk_Memory_regmemMap; - - // regmemUnmap -- virtual inherited (mem) base (mem) - pThis->__regmemUnmap__ = &__nvoc_up_thunk_Memory_regmemUnmap; - - // regmemGetMemInterMapParams -- virtual inherited (mem) base (mem) - pThis->__regmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_regmemGetMemInterMapParams; - - // regmemCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body - pThis->__regmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_regmemCheckMemInterUnmap; - - // regmemGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) - pThis->__regmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_regmemGetMemoryMappingDescriptor; - - // regmemCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body - pThis->__regmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_regmemCheckCopyPermissions; - - // regmemIsReady -- virtual inherited (mem) base (mem) - pThis->__regmemIsReady__ = &__nvoc_up_thunk_Memory_regmemIsReady; - - // regmemIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__regmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_regmemIsGpuMapAllowed; - - // regmemIsExportAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__regmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_regmemIsExportAllowed; - - // regmemAccessCallback -- virtual inherited (rmres) base (mem) - pThis->__regmemAccessCallback__ = &__nvoc_up_thunk_RmResource_regmemAccessCallback; - - // regmemShareCallback -- virtual inherited (rmres) base (mem) - pThis->__regmemShareCallback__ = &__nvoc_up_thunk_RmResource_regmemShareCallback; - - // regmemControlSerialization_Prologue -- virtual inherited (rmres) base (mem) - pThis->__regmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_regmemControlSerialization_Prologue; - - // regmemControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__regmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_regmemControlSerialization_Epilogue; - - // regmemControl_Prologue -- virtual inherited (rmres) base (mem) - pThis->__regmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_regmemControl_Prologue; - - // regmemControl_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__regmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_regmemControl_Epilogue; - - // regmemPreDestruct -- virtual inherited (res) base (mem) - pThis->__regmemPreDestruct__ = &__nvoc_up_thunk_RsResource_regmemPreDestruct; - - // regmemControlFilter -- virtual inherited (res) base (mem) - pThis->__regmemControlFilter__ = &__nvoc_up_thunk_RsResource_regmemControlFilter; - - // regmemIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body - pThis->__regmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_regmemIsPartialUnmapSupported; - - // regmemMapTo -- virtual inherited (res) base (mem) - pThis->__regmemMapTo__ = &__nvoc_up_thunk_RsResource_regmemMapTo; - - // regmemUnmapFrom -- virtual inherited (res) base (mem) - pThis->__regmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_regmemUnmapFrom; - - // regmemGetRefCount -- virtual inherited (res) base (mem) - pThis->__regmemGetRefCount__ = &__nvoc_up_thunk_RsResource_regmemGetRefCount; - - // regmemAddAdditionalDependants -- virtual inherited (res) base (mem) - pThis->__regmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_regmemAddAdditionalDependants; -} // End __nvoc_init_funcTable_RegisterMemory_1 with approximately 27 basic block(s). +} // End __nvoc_init_funcTable_RegisterMemory_1 // Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_RegisterMemory(RegisterMemory *pThis) { - // Initialize vtable(s) with 26 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__RegisterMemory vtable = { + .__regmemCanCopy__ = ®memCanCopy_IMPL, // virtual override (res) base (mem) + .Memory.__memCanCopy__ = &__nvoc_up_thunk_RsResource_memCanCopy, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_RegisterMemory_resCanCopy, // virtual + .__regmemIsDuplicate__ = &__nvoc_up_thunk_Memory_regmemIsDuplicate, // virtual inherited (mem) base (mem) + .Memory.__memIsDuplicate__ = &memIsDuplicate_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resIsDuplicate__ = &__nvoc_down_thunk_Memory_resIsDuplicate, // virtual + .__regmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_regmemGetMapAddrSpace, // virtual inherited (mem) base (mem) + .Memory.__memGetMapAddrSpace__ = &memGetMapAddrSpace_IMPL, // virtual + .__regmemControl__ = &__nvoc_up_thunk_Memory_regmemControl, // virtual inherited (mem) base (mem) + .Memory.__memControl__ = &memControl_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_Memory_resControl, // virtual + .__regmemMap__ = &__nvoc_up_thunk_Memory_regmemMap, // virtual inherited (mem) base (mem) + .Memory.__memMap__ = &memMap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_Memory_resMap, // virtual + .__regmemUnmap__ = &__nvoc_up_thunk_Memory_regmemUnmap, // virtual inherited (mem) base (mem) + .Memory.__memUnmap__ = &memUnmap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_Memory_resUnmap, // virtual + .__regmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_regmemGetMemInterMapParams, // virtual inherited (mem) base (mem) + .Memory.__memGetMemInterMapParams__ = &memGetMemInterMapParams_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_Memory_rmresGetMemInterMapParams, // virtual + .__regmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_regmemCheckMemInterUnmap, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckMemInterUnmap__ = &memCheckMemInterUnmap_ac1694, // inline virtual override (rmres) base (rmres) body + .Memory.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_Memory_rmresCheckMemInterUnmap, // virtual + .__regmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_regmemGetMemoryMappingDescriptor, // virtual inherited (mem) base (mem) + .Memory.__memGetMemoryMappingDescriptor__ = &memGetMemoryMappingDescriptor_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor, // virtual + .__regmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_regmemCheckCopyPermissions, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckCopyPermissions__ = &memCheckCopyPermissions_ac1694, // inline virtual body + .__regmemIsReady__ = &__nvoc_up_thunk_Memory_regmemIsReady, // virtual inherited (mem) base (mem) + .Memory.__memIsReady__ = &memIsReady_IMPL, // virtual + .__regmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_regmemIsGpuMapAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsGpuMapAllowed__ = &memIsGpuMapAllowed_e661f0, // inline virtual body + .__regmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_regmemIsExportAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsExportAllowed__ = &memIsExportAllowed_e661f0, // inline virtual body + .__regmemAccessCallback__ = &__nvoc_up_thunk_RmResource_regmemAccessCallback, // virtual inherited (rmres) base (mem) + .Memory.__memAccessCallback__ = &__nvoc_up_thunk_RmResource_memAccessCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__regmemShareCallback__ = &__nvoc_up_thunk_RmResource_regmemShareCallback, // virtual inherited (rmres) base (mem) + .Memory.__memShareCallback__ = &__nvoc_up_thunk_RmResource_memShareCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__regmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_regmemControlSerialization_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__regmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_regmemControlSerialization_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__regmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_regmemControl_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Prologue__ = &__nvoc_up_thunk_RmResource_memControl_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__regmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_regmemControl_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memControl_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__regmemPreDestruct__ = &__nvoc_up_thunk_RsResource_regmemPreDestruct, // virtual inherited (res) base (mem) + .Memory.__memPreDestruct__ = &__nvoc_up_thunk_RsResource_memPreDestruct, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__regmemControlFilter__ = &__nvoc_up_thunk_RsResource_regmemControlFilter, // virtual inherited (res) base (mem) + .Memory.__memControlFilter__ = &__nvoc_up_thunk_RsResource_memControlFilter, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__regmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_regmemIsPartialUnmapSupported, // inline virtual inherited (res) base (mem) body + .Memory.__memIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .Memory.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .Memory.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__regmemMapTo__ = &__nvoc_up_thunk_RsResource_regmemMapTo, // virtual inherited (res) base (mem) + .Memory.__memMapTo__ = &__nvoc_up_thunk_RsResource_memMapTo, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__regmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_regmemUnmapFrom, // virtual inherited (res) base (mem) + .Memory.__memUnmapFrom__ = &__nvoc_up_thunk_RsResource_memUnmapFrom, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__regmemGetRefCount__ = &__nvoc_up_thunk_RsResource_regmemGetRefCount, // virtual inherited (res) base (mem) + .Memory.__memGetRefCount__ = &__nvoc_up_thunk_RsResource_memGetRefCount, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__regmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_regmemAddAdditionalDependants, // virtual inherited (res) base (mem) + .Memory.__memAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memAddAdditionalDependants, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.Memory.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable = &vtable.Memory.RmResource; // (rmres) super^2 + pThis->__nvoc_base_Memory.__nvoc_vtable = &vtable.Memory; // (mem) super + pThis->__nvoc_vtable = &vtable; // (regmem) this __nvoc_init_funcTable_RegisterMemory_1(pThis); } diff --git a/src/nvidia/generated/g_reg_mem_nvoc.h b/src/nvidia/generated/g_reg_mem_nvoc.h index fb0164059c..86508c377b 100644 --- a/src/nvidia/generated/g_reg_mem_nvoc.h +++ b/src/nvidia/generated/g_reg_mem_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -60,10 +60,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__RegisterMemory; + + struct RegisterMemory { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__RegisterMemory *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; @@ -75,8 +80,13 @@ struct RegisterMemory { struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 struct Memory *__nvoc_pbase_Memory; // mem super struct RegisterMemory *__nvoc_pbase_RegisterMemory; // regmem +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__RegisterMemory { + const struct NVOC_VTABLE__Memory Memory; // (mem) 26 function pointers - // Vtable with 26 per-object function pointers NvBool (*__regmemCanCopy__)(struct RegisterMemory * /*this*/); // virtual override (res) base (mem) NV_STATUS (*__regmemIsDuplicate__)(struct RegisterMemory * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) NV_STATUS (*__regmemGetMapAddrSpace__)(struct RegisterMemory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (mem) @@ -135,162 +145,162 @@ NV_STATUS __nvoc_objCreate_RegisterMemory(RegisterMemory**, Dynamic*, NvU32, CAL // Wrapper macros -#define regmemCanCopy_FNPTR(pRegisterMemory) pRegisterMemory->__regmemCanCopy__ +#define regmemCanCopy_FNPTR(pRegisterMemory) pRegisterMemory->__nvoc_vtable->__regmemCanCopy__ #define regmemCanCopy(pRegisterMemory) regmemCanCopy_DISPATCH(pRegisterMemory) -#define regmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define regmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsDuplicate__ #define regmemIsDuplicate(pMemory, hMemory, pDuplicate) regmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define regmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ +#define regmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMapAddrSpace__ #define regmemGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) regmemGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define regmemControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ +#define regmemControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memControl__ #define regmemControl(pMemory, pCallContext, pParams) regmemControl_DISPATCH(pMemory, pCallContext, pParams) -#define regmemMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define regmemMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memMap__ #define regmemMap(pMemory, pCallContext, pParams, pCpuMapping) regmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define regmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ +#define regmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memUnmap__ #define regmemUnmap(pMemory, pCallContext, pCpuMapping) regmemUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define regmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ +#define regmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemInterMapParams__ #define regmemGetMemInterMapParams(pMemory, pParams) regmemGetMemInterMapParams_DISPATCH(pMemory, pParams) -#define regmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define regmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckMemInterUnmap__ #define regmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) regmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define regmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ +#define regmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemoryMappingDescriptor__ #define regmemGetMemoryMappingDescriptor(pMemory, ppMemDesc) regmemGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define regmemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ +#define regmemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckCopyPermissions__ #define regmemCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) regmemCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define regmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define regmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsReady__ #define regmemIsReady(pMemory, bCopyConstructorContext) regmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) -#define regmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define regmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsGpuMapAllowed__ #define regmemIsGpuMapAllowed(pMemory, pGpu) regmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define regmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define regmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsExportAllowed__ #define regmemIsExportAllowed(pMemory) regmemIsExportAllowed_DISPATCH(pMemory) -#define regmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define regmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define regmemAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) regmemAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define regmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define regmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define regmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) regmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define regmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define regmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define regmemControlSerialization_Prologue(pResource, pCallContext, pParams) regmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define regmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define regmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define regmemControlSerialization_Epilogue(pResource, pCallContext, pParams) regmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define regmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define regmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define regmemControl_Prologue(pResource, pCallContext, pParams) regmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define regmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define regmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define regmemControl_Epilogue(pResource, pCallContext, pParams) regmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define regmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define regmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define regmemPreDestruct(pResource) regmemPreDestruct_DISPATCH(pResource) -#define regmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define regmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define regmemControlFilter(pResource, pCallContext, pParams) regmemControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define regmemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define regmemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define regmemIsPartialUnmapSupported(pResource) regmemIsPartialUnmapSupported_DISPATCH(pResource) -#define regmemMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define regmemMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define regmemMapTo(pResource, pParams) regmemMapTo_DISPATCH(pResource, pParams) -#define regmemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define regmemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define regmemUnmapFrom(pResource, pParams) regmemUnmapFrom_DISPATCH(pResource, pParams) -#define regmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define regmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define regmemGetRefCount(pResource) regmemGetRefCount_DISPATCH(pResource) -#define regmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define regmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define regmemAddAdditionalDependants(pClient, pResource, pReference) regmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool regmemCanCopy_DISPATCH(struct RegisterMemory *pRegisterMemory) { - return pRegisterMemory->__regmemCanCopy__(pRegisterMemory); + return pRegisterMemory->__nvoc_vtable->__regmemCanCopy__(pRegisterMemory); } static inline NV_STATUS regmemIsDuplicate_DISPATCH(struct RegisterMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__regmemIsDuplicate__(pMemory, hMemory, pDuplicate); + return pMemory->__nvoc_vtable->__regmemIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS regmemGetMapAddrSpace_DISPATCH(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pMemory->__regmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); + return pMemory->__nvoc_vtable->__regmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS regmemControl_DISPATCH(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__regmemControl__(pMemory, pCallContext, pParams); + return pMemory->__nvoc_vtable->__regmemControl__(pMemory, pCallContext, pParams); } static inline NV_STATUS regmemMap_DISPATCH(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__regmemMap__(pMemory, pCallContext, pParams, pCpuMapping); + return pMemory->__nvoc_vtable->__regmemMap__(pMemory, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS regmemUnmap_DISPATCH(struct RegisterMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__regmemUnmap__(pMemory, pCallContext, pCpuMapping); + return pMemory->__nvoc_vtable->__regmemUnmap__(pMemory, pCallContext, pCpuMapping); } static inline NV_STATUS regmemGetMemInterMapParams_DISPATCH(struct RegisterMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__regmemGetMemInterMapParams__(pMemory, pParams); + return pMemory->__nvoc_vtable->__regmemGetMemInterMapParams__(pMemory, pParams); } static inline NV_STATUS regmemCheckMemInterUnmap_DISPATCH(struct RegisterMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__regmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); + return pMemory->__nvoc_vtable->__regmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } static inline NV_STATUS regmemGetMemoryMappingDescriptor_DISPATCH(struct RegisterMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__regmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); + return pMemory->__nvoc_vtable->__regmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } static inline NV_STATUS regmemCheckCopyPermissions_DISPATCH(struct RegisterMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__regmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); + return pMemory->__nvoc_vtable->__regmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } static inline NV_STATUS regmemIsReady_DISPATCH(struct RegisterMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__regmemIsReady__(pMemory, bCopyConstructorContext); + return pMemory->__nvoc_vtable->__regmemIsReady__(pMemory, bCopyConstructorContext); } static inline NvBool regmemIsGpuMapAllowed_DISPATCH(struct RegisterMemory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__regmemIsGpuMapAllowed__(pMemory, pGpu); + return pMemory->__nvoc_vtable->__regmemIsGpuMapAllowed__(pMemory, pGpu); } static inline NvBool regmemIsExportAllowed_DISPATCH(struct RegisterMemory *pMemory) { - return pMemory->__regmemIsExportAllowed__(pMemory); + return pMemory->__nvoc_vtable->__regmemIsExportAllowed__(pMemory); } static inline NvBool regmemAccessCallback_DISPATCH(struct RegisterMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__regmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__regmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool regmemShareCallback_DISPATCH(struct RegisterMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__regmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__regmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS regmemControlSerialization_Prologue_DISPATCH(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__regmemControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__regmemControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void regmemControlSerialization_Epilogue_DISPATCH(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__regmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__regmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS regmemControl_Prologue_DISPATCH(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__regmemControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__regmemControl_Prologue__(pResource, pCallContext, pParams); } static inline void regmemControl_Epilogue_DISPATCH(struct RegisterMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__regmemControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__regmemControl_Epilogue__(pResource, pCallContext, pParams); } static inline void regmemPreDestruct_DISPATCH(struct RegisterMemory *pResource) { - pResource->__regmemPreDestruct__(pResource); + pResource->__nvoc_vtable->__regmemPreDestruct__(pResource); } static inline NV_STATUS regmemControlFilter_DISPATCH(struct RegisterMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__regmemControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__regmemControlFilter__(pResource, pCallContext, pParams); } static inline NvBool regmemIsPartialUnmapSupported_DISPATCH(struct RegisterMemory *pResource) { - return pResource->__regmemIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__regmemIsPartialUnmapSupported__(pResource); } static inline NV_STATUS regmemMapTo_DISPATCH(struct RegisterMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__regmemMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__regmemMapTo__(pResource, pParams); } static inline NV_STATUS regmemUnmapFrom_DISPATCH(struct RegisterMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__regmemUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__regmemUnmapFrom__(pResource, pParams); } static inline NvU32 regmemGetRefCount_DISPATCH(struct RegisterMemory *pResource) { - return pResource->__regmemGetRefCount__(pResource); + return pResource->__nvoc_vtable->__regmemGetRefCount__(pResource); } static inline void regmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct RegisterMemory *pResource, RsResourceRef *pReference) { - pResource->__regmemAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__regmemAddAdditionalDependants__(pClient, pResource, pReference); } NvBool regmemCanCopy_IMPL(struct RegisterMemory *pRegisterMemory); diff --git a/src/nvidia/generated/g_resource_fwd_decls_nvoc.h b/src/nvidia/generated/g_resource_fwd_decls_nvoc.h index 5f4bfc1837..fdfce08044 100644 --- a/src/nvidia/generated/g_resource_fwd_decls_nvoc.h +++ b/src/nvidia/generated/g_resource_fwd_decls_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -419,6 +419,17 @@ typedef struct Profiler Profiler; #define __nvoc_class_id_Profiler 0x65b4c7 #endif /* __nvoc_class_id_Profiler */ +struct ProfilerCtx; + +#ifndef __NVOC_CLASS_ProfilerCtx_TYPEDEF__ +#define __NVOC_CLASS_ProfilerCtx_TYPEDEF__ +typedef struct ProfilerCtx ProfilerCtx; +#endif /* __NVOC_CLASS_ProfilerCtx_TYPEDEF__ */ + +#ifndef __nvoc_class_id_ProfilerCtx +#define __nvoc_class_id_ProfilerCtx 0xe99229 +#endif /* __nvoc_class_id_ProfilerCtx */ + struct ProfilerDev; #ifndef __NVOC_CLASS_ProfilerDev_TYPEDEF__ @@ -1281,6 +1292,7 @@ struct NVOCFwdDeclHack { struct KernelSMDebuggerSession *PRIVATE_FIELD(KernelSMDebuggerSession_GT200_DEBUGGER); struct GSyncApi *PRIVATE_FIELD(GSyncApi_NV30_GSYNC); struct Profiler *PRIVATE_FIELD(Profiler_GF100_PROFILER); + struct ProfilerCtx *PRIVATE_FIELD(ProfilerCtx_MAXWELL_PROFILER_CONTEXT); struct ProfilerDev *PRIVATE_FIELD(ProfilerDev_MAXWELL_PROFILER_DEVICE); struct PerfBuffer *PRIVATE_FIELD(PerfBuffer_G84_PERFBUFFER); struct VgpuApi *PRIVATE_FIELD(VgpuApi_KEPLER_DEVICE_VGPU); diff --git a/src/nvidia/generated/g_resource_nvoc.c b/src/nvidia/generated/g_resource_nvoc.c index 3484592741..76af511adb 100644 --- a/src/nvidia/generated/g_resource_nvoc.c +++ b/src/nvidia/generated/g_resource_nvoc.c @@ -49,6 +49,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_RmResourceCommon = /*pExportInfo=*/ &__nvoc_export_info_RmResourceCommon }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_RmResourceCommon = { /*numEntries=*/ 0, @@ -161,98 +165,120 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_RmResource = /*pExportInfo=*/ &__nvoc_export_info_RmResource }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this + // 6 down-thunk(s) defined to bridge methods in RmResource from superclasses // rmresAccessCallback: virtual override (res) base (res) -static NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) - __nvoc_rtti_RmResource_RsResource.offset), pInvokingClient, pAllocParams, accessRight); } // rmresShareCallback: virtual override (res) base (res) -static NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) - __nvoc_rtti_RmResource_RsResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // rmresControlSerialization_Prologue: virtual override (res) base (res) -static NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) - __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pParams); } // rmresControlSerialization_Epilogue: virtual override (res) base (res) -static void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) - __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pParams); } // rmresControl_Prologue: virtual override (res) base (res) -static NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) - __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pParams); } // rmresControl_Epilogue: virtual override (res) base (res) -static void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) - __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pParams); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // this +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // this + // 12 up-thunk(s) defined to bridge methods in RmResource to superclasses // rmresCanCopy: virtual inherited (res) base (res) -static NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource) { +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset)); } // rmresIsDuplicate: virtual inherited (res) base (res) -static NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset), hMemory, pDuplicate); } // rmresPreDestruct: virtual inherited (res) base (res) -static void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource) { +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset)); } // rmresControl: virtual inherited (res) base (res) -static NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pParams); } // rmresControlFilter: virtual inherited (res) base (res) -static NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pParams); } // rmresMap: virtual inherited (res) base (res) -static NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pParams, pCpuMapping); } // rmresUnmap: virtual inherited (res) base (res) -static NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset), pCallContext, pCpuMapping); } // rmresIsPartialUnmapSupported: inline virtual inherited (res) base (res) body -static NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource) { +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset)); } // rmresMapTo: virtual inherited (res) base (res) -static NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset), pParams); } // rmresUnmapFrom: virtual inherited (res) base (res) -static NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset), pParams); } // rmresGetRefCount: virtual inherited (res) base (res) -static NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource) { +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset)); } // rmresAddAdditionalDependants: virtual inherited (res) base (res) -static void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RmResource_RsResource.offset), pReference); } @@ -302,82 +328,58 @@ NV_STATUS __nvoc_ctor_RmResource(RmResource *pThis, struct CALL_CONTEXT * arg_pC // Vtable initialization static void __nvoc_init_funcTable_RmResource_1(RmResource *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // rmresAccessCallback -- virtual override (res) base (res) - pThis->__rmresAccessCallback__ = &rmresAccessCallback_IMPL; - pThis->__nvoc_base_RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback; - - // rmresShareCallback -- virtual override (res) base (res) - pThis->__rmresShareCallback__ = &rmresShareCallback_IMPL; - pThis->__nvoc_base_RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback; - - // rmresGetMemInterMapParams -- virtual - pThis->__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL; - - // rmresCheckMemInterUnmap -- virtual - pThis->__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL; - - // rmresGetMemoryMappingDescriptor -- virtual - pThis->__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL; - - // rmresControlSerialization_Prologue -- virtual override (res) base (res) - pThis->__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL; - pThis->__nvoc_base_RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue; - - // rmresControlSerialization_Epilogue -- virtual override (res) base (res) - pThis->__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL; - pThis->__nvoc_base_RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue; - - // rmresControl_Prologue -- virtual override (res) base (res) - pThis->__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL; - pThis->__nvoc_base_RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue; - - // rmresControl_Epilogue -- virtual override (res) base (res) - pThis->__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL; - pThis->__nvoc_base_RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue; - - // rmresCanCopy -- virtual inherited (res) base (res) - pThis->__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy; - - // rmresIsDuplicate -- virtual inherited (res) base (res) - pThis->__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate; - - // rmresPreDestruct -- virtual inherited (res) base (res) - pThis->__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct; - - // rmresControl -- virtual inherited (res) base (res) - pThis->__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl; - - // rmresControlFilter -- virtual inherited (res) base (res) - pThis->__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter; - - // rmresMap -- virtual inherited (res) base (res) - pThis->__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap; - - // rmresUnmap -- virtual inherited (res) base (res) - pThis->__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap; - - // rmresIsPartialUnmapSupported -- inline virtual inherited (res) base (res) body - pThis->__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported; - - // rmresMapTo -- virtual inherited (res) base (res) - pThis->__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo; - - // rmresUnmapFrom -- virtual inherited (res) base (res) - pThis->__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom; - - // rmresGetRefCount -- virtual inherited (res) base (res) - pThis->__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount; - - // rmresAddAdditionalDependants -- virtual inherited (res) base (res) - pThis->__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants; -} // End __nvoc_init_funcTable_RmResource_1 with approximately 27 basic block(s). +} // End __nvoc_init_funcTable_RmResource_1 // Initialize vtable(s) for 21 virtual method(s). void __nvoc_init_funcTable_RmResource(RmResource *pThis) { - // Initialize vtable(s) with 21 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__RmResource vtable = { + .__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .RsResource.__resControl__ = &resControl_IMPL, // virtual + .__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .RsResource.__resMap__ = &resMap_IMPL, // virtual + .__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RsResource.__nvoc_vtable = &vtable.RsResource; // (res) super + pThis->__nvoc_vtable = &vtable; // (rmres) this __nvoc_init_funcTable_RmResource_1(pThis); } diff --git a/src/nvidia/generated/g_resource_nvoc.h b/src/nvidia/generated/g_resource_nvoc.h index e48bebe7d1..94f7c80395 100644 --- a/src/nvidia/generated/g_resource_nvoc.h +++ b/src/nvidia/generated/g_resource_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -45,6 +45,7 @@ extern "C" { #include "core/core.h" #include "resserv/rs_resource.h" #include "rmapi/control.h" +#include "os/nv_memory_area.h" /* Forward declarations */ struct MEMORY_DESCRIPTOR; @@ -120,12 +121,12 @@ struct RS_INTER_UNMAP_PRIVATE struct RS_CPU_MAPPING_PRIVATE { - NvU64 gpuAddress; - NvU64 gpuMapLength; + MemoryArea memArea; OBJGPU *pGpu; NvP64 pPriv; NvU32 protect; NvBool bKernel; + MemoryRange backingRangeStore; }; typedef struct RMRES_MEM_INTER_MAP_PARAMS RMRES_MEM_INTER_MAP_PARAMS; @@ -206,10 +207,15 @@ NV_STATUS rmrescmnConstruct_IMPL(struct RmResourceCommon *arg_pResourceCommmon); #endif +// Metadata including vtable +struct NVOC_VTABLE__RmResource; + + struct RmResource { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__RmResource *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RsResource __nvoc_base_RsResource; @@ -221,7 +227,16 @@ struct RmResource { struct RmResourceCommon *__nvoc_pbase_RmResourceCommon; // rmrescmn super struct RmResource *__nvoc_pbase_RmResource; // rmres - // Vtable with 21 per-object function pointers + // Data members + NvU32 rpcGpuInstance; + NvBool bRpcFree; +}; + + +// Metadata including vtable with 21 function pointers plus superclass metadata +struct NVOC_VTABLE__RmResource { + const struct NVOC_VTABLE__RsResource RsResource; // (res) 18 function pointers + NvBool (*__rmresAccessCallback__)(struct RmResource * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual override (res) base (res) NvBool (*__rmresShareCallback__)(struct RmResource * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual override (res) base (res) NV_STATUS (*__rmresGetMemInterMapParams__)(struct RmResource * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual @@ -243,10 +258,6 @@ struct RmResource { NV_STATUS (*__rmresUnmapFrom__)(struct RmResource * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (res) NvU32 (*__rmresGetRefCount__)(struct RmResource * /*this*/); // virtual inherited (res) base (res) void (*__rmresAddAdditionalDependants__)(struct RsClient *, struct RmResource * /*this*/, RsResourceRef *); // virtual inherited (res) base (res) - - // Data members - NvU32 rpcGpuInstance; - NvBool bRpcFree; }; #ifndef __NVOC_CLASS_RmResource_TYPEDEF__ @@ -279,132 +290,132 @@ NV_STATUS __nvoc_objCreate_RmResource(RmResource**, Dynamic*, NvU32, struct CALL // Wrapper macros -#define rmresAccessCallback_FNPTR(pResource) pResource->__rmresAccessCallback__ +#define rmresAccessCallback_FNPTR(pResource) pResource->__nvoc_vtable->__rmresAccessCallback__ #define rmresAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) rmresAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define rmresShareCallback_FNPTR(pResource) pResource->__rmresShareCallback__ +#define rmresShareCallback_FNPTR(pResource) pResource->__nvoc_vtable->__rmresShareCallback__ #define rmresShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) rmresShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define rmresGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__rmresGetMemInterMapParams__ +#define rmresGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_vtable->__rmresGetMemInterMapParams__ #define rmresGetMemInterMapParams(pRmResource, pParams) rmresGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define rmresCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__rmresCheckMemInterUnmap__ +#define rmresCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_vtable->__rmresCheckMemInterUnmap__ #define rmresCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) rmresCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define rmresGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__rmresGetMemoryMappingDescriptor__ +#define rmresGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define rmresGetMemoryMappingDescriptor(pRmResource, ppMemDesc) rmresGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define rmresControlSerialization_Prologue_FNPTR(pResource) pResource->__rmresControlSerialization_Prologue__ +#define rmresControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_vtable->__rmresControlSerialization_Prologue__ #define rmresControlSerialization_Prologue(pResource, pCallContext, pParams) rmresControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define rmresControlSerialization_Epilogue_FNPTR(pResource) pResource->__rmresControlSerialization_Epilogue__ +#define rmresControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define rmresControlSerialization_Epilogue(pResource, pCallContext, pParams) rmresControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define rmresControl_Prologue_FNPTR(pResource) pResource->__rmresControl_Prologue__ +#define rmresControl_Prologue_FNPTR(pResource) pResource->__nvoc_vtable->__rmresControl_Prologue__ #define rmresControl_Prologue(pResource, pCallContext, pParams) rmresControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define rmresControl_Epilogue_FNPTR(pResource) pResource->__rmresControl_Epilogue__ +#define rmresControl_Epilogue_FNPTR(pResource) pResource->__nvoc_vtable->__rmresControl_Epilogue__ #define rmresControl_Epilogue(pResource, pCallContext, pParams) rmresControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define rmresCanCopy_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resCanCopy__ +#define rmresCanCopy_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define rmresCanCopy(pResource) rmresCanCopy_DISPATCH(pResource) -#define rmresIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resIsDuplicate__ +#define rmresIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define rmresIsDuplicate(pResource, hMemory, pDuplicate) rmresIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define rmresPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resPreDestruct__ +#define rmresPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define rmresPreDestruct(pResource) rmresPreDestruct_DISPATCH(pResource) -#define rmresControl_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resControl__ +#define rmresControl_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resControl__ #define rmresControl(pResource, pCallContext, pParams) rmresControl_DISPATCH(pResource, pCallContext, pParams) -#define rmresControlFilter_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resControlFilter__ +#define rmresControlFilter_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define rmresControlFilter(pResource, pCallContext, pParams) rmresControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define rmresMap_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resMap__ +#define rmresMap_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define rmresMap(pResource, pCallContext, pParams, pCpuMapping) rmresMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define rmresUnmap_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resUnmap__ +#define rmresUnmap_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define rmresUnmap(pResource, pCallContext, pCpuMapping) rmresUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define rmresIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define rmresIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define rmresIsPartialUnmapSupported(pResource) rmresIsPartialUnmapSupported_DISPATCH(pResource) -#define rmresMapTo_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resMapTo__ +#define rmresMapTo_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define rmresMapTo(pResource, pParams) rmresMapTo_DISPATCH(pResource, pParams) -#define rmresUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resUnmapFrom__ +#define rmresUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define rmresUnmapFrom(pResource, pParams) rmresUnmapFrom_DISPATCH(pResource, pParams) -#define rmresGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resGetRefCount__ +#define rmresGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define rmresGetRefCount(pResource) rmresGetRefCount_DISPATCH(pResource) -#define rmresAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define rmresAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define rmresAddAdditionalDependants(pClient, pResource, pReference) rmresAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool rmresAccessCallback_DISPATCH(struct RmResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__rmresAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__rmresAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool rmresShareCallback_DISPATCH(struct RmResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__rmresShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__rmresShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS rmresGetMemInterMapParams_DISPATCH(struct RmResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__rmresGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__rmresGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS rmresCheckMemInterUnmap_DISPATCH(struct RmResource *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__rmresCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__rmresCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS rmresGetMemoryMappingDescriptor_DISPATCH(struct RmResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__rmresGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__rmresGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS rmresControlSerialization_Prologue_DISPATCH(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__rmresControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__rmresControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void rmresControlSerialization_Epilogue_DISPATCH(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__rmresControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__rmresControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS rmresControl_Prologue_DISPATCH(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__rmresControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__rmresControl_Prologue__(pResource, pCallContext, pParams); } static inline void rmresControl_Epilogue_DISPATCH(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__rmresControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__rmresControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool rmresCanCopy_DISPATCH(struct RmResource *pResource) { - return pResource->__rmresCanCopy__(pResource); + return pResource->__nvoc_vtable->__rmresCanCopy__(pResource); } static inline NV_STATUS rmresIsDuplicate_DISPATCH(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__rmresIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__rmresIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void rmresPreDestruct_DISPATCH(struct RmResource *pResource) { - pResource->__rmresPreDestruct__(pResource); + pResource->__nvoc_vtable->__rmresPreDestruct__(pResource); } static inline NV_STATUS rmresControl_DISPATCH(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__rmresControl__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__rmresControl__(pResource, pCallContext, pParams); } static inline NV_STATUS rmresControlFilter_DISPATCH(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__rmresControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__rmresControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS rmresMap_DISPATCH(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__rmresMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__rmresMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS rmresUnmap_DISPATCH(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__rmresUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__rmresUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool rmresIsPartialUnmapSupported_DISPATCH(struct RmResource *pResource) { - return pResource->__rmresIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__rmresIsPartialUnmapSupported__(pResource); } static inline NV_STATUS rmresMapTo_DISPATCH(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__rmresMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__rmresMapTo__(pResource, pParams); } static inline NV_STATUS rmresUnmapFrom_DISPATCH(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__rmresUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__rmresUnmapFrom__(pResource, pParams); } static inline NvU32 rmresGetRefCount_DISPATCH(struct RmResource *pResource) { - return pResource->__rmresGetRefCount__(pResource); + return pResource->__nvoc_vtable->__rmresGetRefCount__(pResource); } static inline void rmresAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference) { - pResource->__rmresAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__rmresAddAdditionalDependants__(pClient, pResource, pReference); } NvBool rmresAccessCallback_IMPL(struct RmResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); diff --git a/src/nvidia/generated/g_resserv_nvoc.h b/src/nvidia/generated/g_resserv_nvoc.h index cc2e9d3b34..27a6bee211 100644 --- a/src/nvidia/generated/g_resserv_nvoc.h +++ b/src/nvidia/generated/g_resserv_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_rg_line_callback_nvoc.c b/src/nvidia/generated/g_rg_line_callback_nvoc.c index 65ad2e1ab7..4571297d7a 100644 --- a/src/nvidia/generated/g_rg_line_callback_nvoc.c +++ b/src/nvidia/generated/g_rg_line_callback_nvoc.c @@ -93,130 +93,198 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_RgLineCallback = /*pExportInfo=*/ &__nvoc_export_info_RgLineCallback }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_rglcbControl(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_rglcbMap(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_rglcbUnmap(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_rglcbShareCallback(struct RgLineCallback *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_rglcbGetRegBaseOffsetAndSize(struct RgLineCallback *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_rglcbGetMapAddrSpace(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_rglcbInternalControlForward(struct RgLineCallback *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_rglcbGetInternalObjectHandle(struct RgLineCallback *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_rglcbAccessCallback(struct RgLineCallback *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_rglcbGetMemInterMapParams(struct RgLineCallback *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_rglcbCheckMemInterUnmap(struct RgLineCallback *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_rglcbGetMemoryMappingDescriptor(struct RgLineCallback *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_rglcbControlSerialization_Prologue(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_rglcbControlSerialization_Epilogue(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_rglcbControl_Prologue(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_rglcbControl_Epilogue(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_rglcbCanCopy(struct RgLineCallback *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_rglcbIsDuplicate(struct RgLineCallback *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_rglcbPreDestruct(struct RgLineCallback *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_rglcbControlFilter(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_rglcbIsPartialUnmapSupported(struct RgLineCallback *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_rglcbMapTo(struct RgLineCallback *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_rglcbUnmapFrom(struct RgLineCallback *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_rglcbGetRefCount(struct RgLineCallback *pResource); // this +void __nvoc_up_thunk_RsResource_rglcbAddAdditionalDependants(struct RsClient *pClient, struct RgLineCallback *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in RgLineCallback to superclasses // rglcbControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_rglcbControl(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_rglcbControl(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset), pCallContext, pParams); } // rglcbMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_rglcbMap(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_rglcbMap(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // rglcbUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_rglcbUnmap(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_rglcbUnmap(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset), pCallContext, pCpuMapping); } // rglcbShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_rglcbShareCallback(struct RgLineCallback *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_rglcbShareCallback(struct RgLineCallback *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // rglcbGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_rglcbGetRegBaseOffsetAndSize(struct RgLineCallback *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_rglcbGetRegBaseOffsetAndSize(struct RgLineCallback *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset), pGpu, pOffset, pSize); } // rglcbGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_rglcbGetMapAddrSpace(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_rglcbGetMapAddrSpace(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // rglcbInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_rglcbInternalControlForward(struct RgLineCallback *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_rglcbInternalControlForward(struct RgLineCallback *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset), command, pParams, size); } // rglcbGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_rglcbGetInternalObjectHandle(struct RgLineCallback *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_rglcbGetInternalObjectHandle(struct RgLineCallback *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_RgLineCallback_GpuResource.offset)); } // rglcbAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_rglcbAccessCallback(struct RgLineCallback *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_rglcbAccessCallback(struct RgLineCallback *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // rglcbGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_rglcbGetMemInterMapParams(struct RgLineCallback *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_rglcbGetMemInterMapParams(struct RgLineCallback *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), pParams); } // rglcbCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_rglcbCheckMemInterUnmap(struct RgLineCallback *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_rglcbCheckMemInterUnmap(struct RgLineCallback *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), bSubdeviceHandleProvided); } // rglcbGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_rglcbGetMemoryMappingDescriptor(struct RgLineCallback *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_rglcbGetMemoryMappingDescriptor(struct RgLineCallback *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), ppMemDesc); } // rglcbControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_rglcbControlSerialization_Prologue(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_rglcbControlSerialization_Prologue(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), pCallContext, pParams); } // rglcbControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_rglcbControlSerialization_Epilogue(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_rglcbControlSerialization_Epilogue(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), pCallContext, pParams); } // rglcbControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_rglcbControl_Prologue(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_rglcbControl_Prologue(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), pCallContext, pParams); } // rglcbControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_rglcbControl_Epilogue(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_rglcbControl_Epilogue(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RmResource.offset), pCallContext, pParams); } // rglcbCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_rglcbCanCopy(struct RgLineCallback *pResource) { +NvBool __nvoc_up_thunk_RsResource_rglcbCanCopy(struct RgLineCallback *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset)); } // rglcbIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_rglcbIsDuplicate(struct RgLineCallback *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_rglcbIsDuplicate(struct RgLineCallback *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset), hMemory, pDuplicate); } // rglcbPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_rglcbPreDestruct(struct RgLineCallback *pResource) { +void __nvoc_up_thunk_RsResource_rglcbPreDestruct(struct RgLineCallback *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset)); } // rglcbControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_rglcbControlFilter(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_rglcbControlFilter(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset), pCallContext, pParams); } // rglcbIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_rglcbIsPartialUnmapSupported(struct RgLineCallback *pResource) { +NvBool __nvoc_up_thunk_RsResource_rglcbIsPartialUnmapSupported(struct RgLineCallback *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset)); } // rglcbMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_rglcbMapTo(struct RgLineCallback *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_rglcbMapTo(struct RgLineCallback *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset), pParams); } // rglcbUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_rglcbUnmapFrom(struct RgLineCallback *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_rglcbUnmapFrom(struct RgLineCallback *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset), pParams); } // rglcbGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_rglcbGetRefCount(struct RgLineCallback *pResource) { +NvU32 __nvoc_up_thunk_RsResource_rglcbGetRefCount(struct RgLineCallback *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset)); } // rglcbAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_rglcbAddAdditionalDependants(struct RsClient *pClient, struct RgLineCallback *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_rglcbAddAdditionalDependants(struct RsClient *pClient, struct RgLineCallback *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RgLineCallback_RsResource.offset), pReference); } @@ -260,88 +328,110 @@ NV_STATUS __nvoc_ctor_RgLineCallback(RgLineCallback *pThis, struct CALL_CONTEXT // Vtable initialization static void __nvoc_init_funcTable_RgLineCallback_1(RgLineCallback *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // rglcbControl -- virtual inherited (gpures) base (gpures) - pThis->__rglcbControl__ = &__nvoc_up_thunk_GpuResource_rglcbControl; - - // rglcbMap -- virtual inherited (gpures) base (gpures) - pThis->__rglcbMap__ = &__nvoc_up_thunk_GpuResource_rglcbMap; - - // rglcbUnmap -- virtual inherited (gpures) base (gpures) - pThis->__rglcbUnmap__ = &__nvoc_up_thunk_GpuResource_rglcbUnmap; - - // rglcbShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__rglcbShareCallback__ = &__nvoc_up_thunk_GpuResource_rglcbShareCallback; - - // rglcbGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__rglcbGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_rglcbGetRegBaseOffsetAndSize; - - // rglcbGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__rglcbGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_rglcbGetMapAddrSpace; - - // rglcbInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__rglcbInternalControlForward__ = &__nvoc_up_thunk_GpuResource_rglcbInternalControlForward; - - // rglcbGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__rglcbGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_rglcbGetInternalObjectHandle; - - // rglcbAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__rglcbAccessCallback__ = &__nvoc_up_thunk_RmResource_rglcbAccessCallback; - - // rglcbGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__rglcbGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_rglcbGetMemInterMapParams; - - // rglcbCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__rglcbCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_rglcbCheckMemInterUnmap; - - // rglcbGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__rglcbGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_rglcbGetMemoryMappingDescriptor; - - // rglcbControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__rglcbControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_rglcbControlSerialization_Prologue; - - // rglcbControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__rglcbControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_rglcbControlSerialization_Epilogue; - - // rglcbControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__rglcbControl_Prologue__ = &__nvoc_up_thunk_RmResource_rglcbControl_Prologue; - - // rglcbControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__rglcbControl_Epilogue__ = &__nvoc_up_thunk_RmResource_rglcbControl_Epilogue; - - // rglcbCanCopy -- virtual inherited (res) base (gpures) - pThis->__rglcbCanCopy__ = &__nvoc_up_thunk_RsResource_rglcbCanCopy; - - // rglcbIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__rglcbIsDuplicate__ = &__nvoc_up_thunk_RsResource_rglcbIsDuplicate; - - // rglcbPreDestruct -- virtual inherited (res) base (gpures) - pThis->__rglcbPreDestruct__ = &__nvoc_up_thunk_RsResource_rglcbPreDestruct; - - // rglcbControlFilter -- virtual inherited (res) base (gpures) - pThis->__rglcbControlFilter__ = &__nvoc_up_thunk_RsResource_rglcbControlFilter; - - // rglcbIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__rglcbIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rglcbIsPartialUnmapSupported; - - // rglcbMapTo -- virtual inherited (res) base (gpures) - pThis->__rglcbMapTo__ = &__nvoc_up_thunk_RsResource_rglcbMapTo; - - // rglcbUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__rglcbUnmapFrom__ = &__nvoc_up_thunk_RsResource_rglcbUnmapFrom; - - // rglcbGetRefCount -- virtual inherited (res) base (gpures) - pThis->__rglcbGetRefCount__ = &__nvoc_up_thunk_RsResource_rglcbGetRefCount; - - // rglcbAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__rglcbAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rglcbAddAdditionalDependants; -} // End __nvoc_init_funcTable_RgLineCallback_1 with approximately 25 basic block(s). +} // End __nvoc_init_funcTable_RgLineCallback_1 // Initialize vtable(s) for 25 virtual method(s). void __nvoc_init_funcTable_RgLineCallback(RgLineCallback *pThis) { - // Initialize vtable(s) with 25 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__RgLineCallback vtable = { + .__rglcbControl__ = &__nvoc_up_thunk_GpuResource_rglcbControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__rglcbMap__ = &__nvoc_up_thunk_GpuResource_rglcbMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__rglcbUnmap__ = &__nvoc_up_thunk_GpuResource_rglcbUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__rglcbShareCallback__ = &__nvoc_up_thunk_GpuResource_rglcbShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__rglcbGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_rglcbGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__rglcbGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_rglcbGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__rglcbInternalControlForward__ = &__nvoc_up_thunk_GpuResource_rglcbInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__rglcbGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_rglcbGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__rglcbAccessCallback__ = &__nvoc_up_thunk_RmResource_rglcbAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__rglcbGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_rglcbGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__rglcbCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_rglcbCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__rglcbGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_rglcbGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__rglcbControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_rglcbControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__rglcbControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_rglcbControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__rglcbControl_Prologue__ = &__nvoc_up_thunk_RmResource_rglcbControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__rglcbControl_Epilogue__ = &__nvoc_up_thunk_RmResource_rglcbControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__rglcbCanCopy__ = &__nvoc_up_thunk_RsResource_rglcbCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__rglcbIsDuplicate__ = &__nvoc_up_thunk_RsResource_rglcbIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__rglcbPreDestruct__ = &__nvoc_up_thunk_RsResource_rglcbPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__rglcbControlFilter__ = &__nvoc_up_thunk_RsResource_rglcbControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__rglcbIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rglcbIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__rglcbMapTo__ = &__nvoc_up_thunk_RsResource_rglcbMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__rglcbUnmapFrom__ = &__nvoc_up_thunk_RsResource_rglcbUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__rglcbGetRefCount__ = &__nvoc_up_thunk_RsResource_rglcbGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__rglcbAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rglcbAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (rglcb) this __nvoc_init_funcTable_RgLineCallback_1(pThis); } diff --git a/src/nvidia/generated/g_rg_line_callback_nvoc.h b/src/nvidia/generated/g_rg_line_callback_nvoc.h index 3f68e93c56..1e9d3428a2 100644 --- a/src/nvidia/generated/g_rg_line_callback_nvoc.h +++ b/src/nvidia/generated/g_rg_line_callback_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -73,10 +73,15 @@ typedef struct DispCommon DispCommon; #endif +// Metadata including vtable +struct NVOC_VTABLE__RgLineCallback; + + struct RgLineCallback { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__RgLineCallback *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -89,7 +94,21 @@ struct RgLineCallback { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct RgLineCallback *__nvoc_pbase_RgLineCallback; // rglcb - // Vtable with 25 per-object function pointers + // Data members + NvU32 subDeviceInstance; + NvU32 head; + NvU32 rgLineNum; + NV0092_REGISTER_RG_LINE_CALLBACK_FN pCallbkFn; + NvP64 pCallbkParams; + NvU32 rgIntrLine; + struct DispCommon *pDispCommon; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__RgLineCallback { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + NV_STATUS (*__rglcbControl__)(struct RgLineCallback * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__rglcbMap__)(struct RgLineCallback * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__rglcbUnmap__)(struct RgLineCallback * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -115,15 +134,6 @@ struct RgLineCallback { NV_STATUS (*__rglcbUnmapFrom__)(struct RgLineCallback * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__rglcbGetRefCount__)(struct RgLineCallback * /*this*/); // virtual inherited (res) base (gpures) void (*__rglcbAddAdditionalDependants__)(struct RsClient *, struct RgLineCallback * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - NvU32 subDeviceInstance; - NvU32 head; - NvU32 rgLineNum; - NV0092_REGISTER_RG_LINE_CALLBACK_FN pCallbkFn; - NvP64 pCallbkParams; - NvU32 rgIntrLine; - struct DispCommon *pDispCommon; }; #ifndef __NVOC_CLASS_RgLineCallback_TYPEDEF__ @@ -156,156 +166,156 @@ NV_STATUS __nvoc_objCreate_RgLineCallback(RgLineCallback**, Dynamic*, NvU32, str // Wrapper macros -#define rglcbControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define rglcbControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define rglcbControl(pGpuResource, pCallContext, pParams) rglcbControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define rglcbMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define rglcbMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define rglcbMap(pGpuResource, pCallContext, pParams, pCpuMapping) rglcbMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define rglcbUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define rglcbUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define rglcbUnmap(pGpuResource, pCallContext, pCpuMapping) rglcbUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define rglcbShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define rglcbShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define rglcbShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) rglcbShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define rglcbGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define rglcbGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define rglcbGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) rglcbGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define rglcbGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define rglcbGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define rglcbGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) rglcbGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define rglcbInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define rglcbInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define rglcbInternalControlForward(pGpuResource, command, pParams, size) rglcbInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define rglcbGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define rglcbGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define rglcbGetInternalObjectHandle(pGpuResource) rglcbGetInternalObjectHandle_DISPATCH(pGpuResource) -#define rglcbAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define rglcbAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define rglcbAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) rglcbAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define rglcbGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define rglcbGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define rglcbGetMemInterMapParams(pRmResource, pParams) rglcbGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define rglcbCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define rglcbCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define rglcbCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) rglcbCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define rglcbGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define rglcbGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define rglcbGetMemoryMappingDescriptor(pRmResource, ppMemDesc) rglcbGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define rglcbControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define rglcbControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define rglcbControlSerialization_Prologue(pResource, pCallContext, pParams) rglcbControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define rglcbControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define rglcbControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define rglcbControlSerialization_Epilogue(pResource, pCallContext, pParams) rglcbControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define rglcbControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define rglcbControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define rglcbControl_Prologue(pResource, pCallContext, pParams) rglcbControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define rglcbControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define rglcbControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define rglcbControl_Epilogue(pResource, pCallContext, pParams) rglcbControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define rglcbCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define rglcbCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define rglcbCanCopy(pResource) rglcbCanCopy_DISPATCH(pResource) -#define rglcbIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define rglcbIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define rglcbIsDuplicate(pResource, hMemory, pDuplicate) rglcbIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define rglcbPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define rglcbPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define rglcbPreDestruct(pResource) rglcbPreDestruct_DISPATCH(pResource) -#define rglcbControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define rglcbControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define rglcbControlFilter(pResource, pCallContext, pParams) rglcbControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define rglcbIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define rglcbIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define rglcbIsPartialUnmapSupported(pResource) rglcbIsPartialUnmapSupported_DISPATCH(pResource) -#define rglcbMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define rglcbMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define rglcbMapTo(pResource, pParams) rglcbMapTo_DISPATCH(pResource, pParams) -#define rglcbUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define rglcbUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define rglcbUnmapFrom(pResource, pParams) rglcbUnmapFrom_DISPATCH(pResource, pParams) -#define rglcbGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define rglcbGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define rglcbGetRefCount(pResource) rglcbGetRefCount_DISPATCH(pResource) -#define rglcbAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define rglcbAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define rglcbAddAdditionalDependants(pClient, pResource, pReference) rglcbAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NV_STATUS rglcbControl_DISPATCH(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__rglcbControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__rglcbControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS rglcbMap_DISPATCH(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__rglcbMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__rglcbMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS rglcbUnmap_DISPATCH(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__rglcbUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__rglcbUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool rglcbShareCallback_DISPATCH(struct RgLineCallback *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__rglcbShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__rglcbShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS rglcbGetRegBaseOffsetAndSize_DISPATCH(struct RgLineCallback *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__rglcbGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__rglcbGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS rglcbGetMapAddrSpace_DISPATCH(struct RgLineCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__rglcbGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__rglcbGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS rglcbInternalControlForward_DISPATCH(struct RgLineCallback *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__rglcbInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__rglcbInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle rglcbGetInternalObjectHandle_DISPATCH(struct RgLineCallback *pGpuResource) { - return pGpuResource->__rglcbGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__rglcbGetInternalObjectHandle__(pGpuResource); } static inline NvBool rglcbAccessCallback_DISPATCH(struct RgLineCallback *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__rglcbAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__rglcbAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS rglcbGetMemInterMapParams_DISPATCH(struct RgLineCallback *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__rglcbGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__rglcbGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS rglcbCheckMemInterUnmap_DISPATCH(struct RgLineCallback *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__rglcbCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__rglcbCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS rglcbGetMemoryMappingDescriptor_DISPATCH(struct RgLineCallback *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__rglcbGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__rglcbGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS rglcbControlSerialization_Prologue_DISPATCH(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__rglcbControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__rglcbControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void rglcbControlSerialization_Epilogue_DISPATCH(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__rglcbControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__rglcbControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS rglcbControl_Prologue_DISPATCH(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__rglcbControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__rglcbControl_Prologue__(pResource, pCallContext, pParams); } static inline void rglcbControl_Epilogue_DISPATCH(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__rglcbControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__rglcbControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool rglcbCanCopy_DISPATCH(struct RgLineCallback *pResource) { - return pResource->__rglcbCanCopy__(pResource); + return pResource->__nvoc_vtable->__rglcbCanCopy__(pResource); } static inline NV_STATUS rglcbIsDuplicate_DISPATCH(struct RgLineCallback *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__rglcbIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__rglcbIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void rglcbPreDestruct_DISPATCH(struct RgLineCallback *pResource) { - pResource->__rglcbPreDestruct__(pResource); + pResource->__nvoc_vtable->__rglcbPreDestruct__(pResource); } static inline NV_STATUS rglcbControlFilter_DISPATCH(struct RgLineCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__rglcbControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__rglcbControlFilter__(pResource, pCallContext, pParams); } static inline NvBool rglcbIsPartialUnmapSupported_DISPATCH(struct RgLineCallback *pResource) { - return pResource->__rglcbIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__rglcbIsPartialUnmapSupported__(pResource); } static inline NV_STATUS rglcbMapTo_DISPATCH(struct RgLineCallback *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__rglcbMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__rglcbMapTo__(pResource, pParams); } static inline NV_STATUS rglcbUnmapFrom_DISPATCH(struct RgLineCallback *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__rglcbUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__rglcbUnmapFrom__(pResource, pParams); } static inline NvU32 rglcbGetRefCount_DISPATCH(struct RgLineCallback *pResource) { - return pResource->__rglcbGetRefCount__(pResource); + return pResource->__nvoc_vtable->__rglcbGetRefCount__(pResource); } static inline void rglcbAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct RgLineCallback *pResource, RsResourceRef *pReference) { - pResource->__rglcbAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__rglcbAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS rglcbConstruct_IMPL(struct RgLineCallback *arg_pRgLineCallback, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_rmconfig_private.h b/src/nvidia/generated/g_rmconfig_private.h index 8cb187d96c..e74da7ca9d 100644 --- a/src/nvidia/generated/g_rmconfig_private.h +++ b/src/nvidia/generated/g_rmconfig_private.h @@ -451,6 +451,10 @@ #define IsdPASCALorBetter(pGpu) (1 || (pGpu)) +// Any COMPUTE chip? +#define IsCOMPUTE(pGpu) rmcfg_IsCOMPUTE(pGpu) + + // Any PASCAL chip? #define IsPASCAL(pGpu) (IsPASCAL_CLASSIC_GPUS(pGpu) || IsPASCAL_TEGRA_BIG_GPUS(pGpu)) #define IsPASCALorBetter(pGpu) (IsPASCAL_CLASSIC_GPUSorBetter(pGpu) || IsPASCAL_TEGRA_BIG_GPUSorBetter(pGpu)) diff --git a/src/nvidia/generated/g_rmconfig_util.c b/src/nvidia/generated/g_rmconfig_util.c index 2e29c9e11c..a8414bc041 100644 --- a/src/nvidia/generated/g_rmconfig_util.c +++ b/src/nvidia/generated/g_rmconfig_util.c @@ -286,6 +286,11 @@ NvBool rmcfg_IsDISPLAYLESS_CLASSIC_GPUSorBetter(POBJGPU pGpu) return IsGF117(pGpu) || IsGK20A(pGpu) || IsGM108(pGpu) || IsGV11B(pGpu) || IsGA100(pGpu) || IsGA10B(pGpu) || IsGH100(pGpu) || IsGB100(pGpu) || IsGB102orBetter(pGpu); } +NvBool rmcfg_IsCOMPUTE(POBJGPU pGpu) +{ + return IsGA100(pGpu) || IsGH100(pGpu) || IsGB100(pGpu) || IsGB102(pGpu); +} + NvBool rmcfg_IsdTURING(POBJGPU pGpu) { return IsTU102(pGpu) || IsTU104(pGpu) || IsTU106(pGpu) || IsTU116(pGpu) || IsTU117(pGpu); diff --git a/src/nvidia/generated/g_rmconfig_util.h b/src/nvidia/generated/g_rmconfig_util.h index 4d4ebc0369..fa85a2bbf9 100644 --- a/src/nvidia/generated/g_rmconfig_util.h +++ b/src/nvidia/generated/g_rmconfig_util.h @@ -71,6 +71,7 @@ NvBool rmcfg_IsGB10X(POBJGPU pGpu); NvBool rmcfg_IsGB10XorBetter(POBJGPU pGpu); NvBool rmcfg_IsDISPLAYLESS_CLASSIC_GPUS(POBJGPU pGpu); NvBool rmcfg_IsDISPLAYLESS_CLASSIC_GPUSorBetter(POBJGPU pGpu); +NvBool rmcfg_IsCOMPUTE(POBJGPU pGpu); NvBool rmcfg_IsdTURING(POBJGPU pGpu); NvBool rmcfg_IsTURING_CLASSIC_GPUS(POBJGPU pGpu); NvBool rmcfg_IsdAMPERE(POBJGPU pGpu); diff --git a/src/nvidia/generated/g_rpc-structures.h b/src/nvidia/generated/g_rpc-structures.h index 288b87cf0e..0410c48e10 100644 --- a/src/nvidia/generated/g_rpc-structures.h +++ b/src/nvidia/generated/g_rpc-structures.h @@ -565,7 +565,14 @@ typedef struct rpc_ctrl_gr_ctxsw_preemption_bind_v1A_0E NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS_v12_01 ctrlParams; } rpc_ctrl_gr_ctxsw_preemption_bind_v1A_0E; -typedef rpc_ctrl_gr_ctxsw_preemption_bind_v1A_0E rpc_ctrl_gr_ctxsw_preemption_bind_v; +typedef struct rpc_ctrl_gr_ctxsw_preemption_bind_v28_07 +{ + NvHandle hClient; + NvHandle hObject; + NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS_v28_07 ctrlParams; +} rpc_ctrl_gr_ctxsw_preemption_bind_v28_07; + +typedef rpc_ctrl_gr_ctxsw_preemption_bind_v28_07 rpc_ctrl_gr_ctxsw_preemption_bind_v; typedef struct rpc_ctrl_gr_set_ctxsw_preemption_mode_v1A_0E { @@ -1312,6 +1319,7 @@ typedef struct rpc_rc_triggered_v17_02 { NvU32 nv2080EngineType; NvU32 chid; + NvU32 gfid; NvU32 exceptLevel; NvU32 exceptType; NvU32 scope; @@ -1507,6 +1515,13 @@ typedef struct rpc_nvlink_is_gpu_degraded_v17_00 typedef rpc_nvlink_is_gpu_degraded_v17_00 rpc_nvlink_is_gpu_degraded_v; +typedef struct rpc_nvlink_fatal_error_recovery_v17_00 +{ + NV2080_CTRL_NVLINK_FATAL_ERROR_RECOVERY_PARAMS_v17_00 params; +} rpc_nvlink_fatal_error_recovery_v17_00; + +typedef rpc_nvlink_fatal_error_recovery_v17_00 rpc_nvlink_fatal_error_recovery_v; + typedef struct rpc_update_gsp_trace_v01_00 { NvU32 records; @@ -1613,6 +1628,25 @@ typedef struct rpc_ctrl_cmd_nvlink_inband_send_data_v26_05 typedef rpc_ctrl_cmd_nvlink_inband_send_data_v26_05 rpc_ctrl_cmd_nvlink_inband_send_data_v; +typedef struct rpc_ctrl_cmd_internal_control_gsp_trace_v28_00 +{ + NvU32 bufferSize; + NvU32 tracepointMask; + NvU32 bufferWatermark; + NvU64 bufferAddr NV_ALIGN_BYTES(8); + NvU8 flag; +} rpc_ctrl_cmd_internal_control_gsp_trace_v28_00; + +typedef rpc_ctrl_cmd_internal_control_gsp_trace_v28_00 rpc_ctrl_cmd_internal_control_gsp_trace_v; + +typedef struct rpc_recovery_action_v28_01 +{ + NvU32 type; + NvBool value; +} rpc_recovery_action_v28_01; + +typedef rpc_recovery_action_v28_01 rpc_recovery_action_v; + #endif @@ -3980,6 +4014,43 @@ static vmiopd_mdesc_t vmiopd_mdesc_t_rpc_ctrl_set_channel_interleave_level_v1A_0 }; #endif +#ifndef SKIP_PRINT_rpc_ctrl_gr_ctxsw_preemption_bind_v28_07 +static vmiopd_fdesc_t vmiopd_fdesc_t_rpc_ctrl_gr_ctxsw_preemption_bind_v28_07[] = { + { + .vtype = vtype_NvHandle, + .offset = NV_OFFSETOF(rpc_ctrl_gr_ctxsw_preemption_bind_v28_07, hClient), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "hClient" + #endif + }, + { + .vtype = vtype_NvHandle, + .offset = NV_OFFSETOF(rpc_ctrl_gr_ctxsw_preemption_bind_v28_07, hObject), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "hObject" + #endif + }, + { + .vtype = vtype_NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS_v28_07, + .offset = NV_OFFSETOF(rpc_ctrl_gr_ctxsw_preemption_bind_v28_07, ctrlParams), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "ctrlParams" + #endif + }, + { + .vtype = vt_end + } +}; + +static vmiopd_mdesc_t vmiopd_mdesc_t_rpc_ctrl_gr_ctxsw_preemption_bind_v28_07 = { + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "rpc_ctrl_gr_ctxsw_preemption_bind", + #endif + .header_length = sizeof(rpc_ctrl_gr_ctxsw_preemption_bind_v28_07), + .fdesc = vmiopd_fdesc_t_rpc_ctrl_gr_ctxsw_preemption_bind_v28_07 +}; +#endif + #ifndef SKIP_PRINT_rpc_ctrl_gr_ctxsw_preemption_bind_v1A_0E static vmiopd_fdesc_t vmiopd_fdesc_t_rpc_ctrl_gr_ctxsw_preemption_bind_v1A_0E[] = { { @@ -7184,6 +7255,13 @@ static vmiopd_fdesc_t vmiopd_fdesc_t_rpc_rc_triggered_v17_02[] = { .name = "chid" #endif }, + { + .vtype = vtype_NvU32, + .offset = NV_OFFSETOF(rpc_rc_triggered_v17_02, gfid), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "gfid" + #endif + }, { .vtype = vtype_NvU32, .offset = NV_OFFSETOF(rpc_rc_triggered_v17_02, exceptLevel), @@ -7968,6 +8046,29 @@ static vmiopd_mdesc_t vmiopd_mdesc_t_rpc_nvlink_is_gpu_degraded_v17_00 = { }; #endif +#ifndef SKIP_PRINT_rpc_nvlink_fatal_error_recovery_v17_00 +static vmiopd_fdesc_t vmiopd_fdesc_t_rpc_nvlink_fatal_error_recovery_v17_00[] = { + { + .vtype = vtype_NV2080_CTRL_NVLINK_FATAL_ERROR_RECOVERY_PARAMS_v17_00, + .offset = NV_OFFSETOF(rpc_nvlink_fatal_error_recovery_v17_00, params), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "params" + #endif + }, + { + .vtype = vt_end + } +}; + +static vmiopd_mdesc_t vmiopd_mdesc_t_rpc_nvlink_fatal_error_recovery_v17_00 = { + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "rpc_nvlink_fatal_error_recovery", + #endif + .header_length = sizeof(rpc_nvlink_fatal_error_recovery_v17_00), + .fdesc = vmiopd_fdesc_t_rpc_nvlink_fatal_error_recovery_v17_00 +}; +#endif + #ifndef SKIP_PRINT_rpc_update_gsp_trace_v01_00 static vmiopd_fdesc_t vmiopd_fdesc_t_rpc_update_gsp_trace_v01_00[] = { { @@ -8388,6 +8489,87 @@ static vmiopd_mdesc_t vmiopd_mdesc_t_rpc_ctrl_cmd_nvlink_inband_send_data_v26_05 }; #endif +#ifndef SKIP_PRINT_rpc_ctrl_cmd_internal_control_gsp_trace_v28_00 +static vmiopd_fdesc_t vmiopd_fdesc_t_rpc_ctrl_cmd_internal_control_gsp_trace_v28_00[] = { + { + .vtype = vtype_NvU32, + .offset = NV_OFFSETOF(rpc_ctrl_cmd_internal_control_gsp_trace_v28_00, bufferSize), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "bufferSize" + #endif + }, + { + .vtype = vtype_NvU32, + .offset = NV_OFFSETOF(rpc_ctrl_cmd_internal_control_gsp_trace_v28_00, tracepointMask), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "tracepointMask" + #endif + }, + { + .vtype = vtype_NvU32, + .offset = NV_OFFSETOF(rpc_ctrl_cmd_internal_control_gsp_trace_v28_00, bufferWatermark), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "bufferWatermark" + #endif + }, + { + .vtype = vtype_NvU64, + .offset = NV_OFFSETOF(rpc_ctrl_cmd_internal_control_gsp_trace_v28_00, bufferAddr), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "bufferAddr" + #endif + }, + { + .vtype = vtype_NvU8, + .offset = NV_OFFSETOF(rpc_ctrl_cmd_internal_control_gsp_trace_v28_00, flag), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "flag" + #endif + }, + { + .vtype = vt_end + } +}; + +static vmiopd_mdesc_t vmiopd_mdesc_t_rpc_ctrl_cmd_internal_control_gsp_trace_v28_00 = { + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "rpc_ctrl_cmd_internal_control_gsp_trace", + #endif + .header_length = sizeof(rpc_ctrl_cmd_internal_control_gsp_trace_v28_00), + .fdesc = vmiopd_fdesc_t_rpc_ctrl_cmd_internal_control_gsp_trace_v28_00 +}; +#endif + +#ifndef SKIP_PRINT_rpc_recovery_action_v28_01 +static vmiopd_fdesc_t vmiopd_fdesc_t_rpc_recovery_action_v28_01[] = { + { + .vtype = vtype_NvU32, + .offset = NV_OFFSETOF(rpc_recovery_action_v28_01, type), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "type" + #endif + }, + { + .vtype = vtype_NvBool, + .offset = NV_OFFSETOF(rpc_recovery_action_v28_01, value), + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "value" + #endif + }, + { + .vtype = vt_end + } +}; + +static vmiopd_mdesc_t vmiopd_mdesc_t_rpc_recovery_action_v28_01 = { + #if (defined(DEBUG) || defined(DEVELOP)) + .name = "rpc_recovery_action", + #endif + .header_length = sizeof(rpc_recovery_action_v28_01), + .fdesc = vmiopd_fdesc_t_rpc_recovery_action_v28_01 +}; +#endif + #endif #ifdef RPC_DEBUG_PRINT_FUNCTIONS @@ -8829,6 +9011,13 @@ vmiopd_mdesc_t *rpcdebugCtrlSetChannelInterleaveLevel_v1A_0A(void) } #endif +#ifndef SKIP_PRINT_rpc_ctrl_gr_ctxsw_preemption_bind_v28_07 +vmiopd_mdesc_t *rpcdebugCtrlGrCtxswPreemptionBind_v28_07(void) +{ + return &vmiopd_mdesc_t_rpc_ctrl_gr_ctxsw_preemption_bind_v28_07; +} +#endif + #ifndef SKIP_PRINT_rpc_ctrl_gr_ctxsw_preemption_bind_v1A_0E vmiopd_mdesc_t *rpcdebugCtrlGrCtxswPreemptionBind_v1A_0E(void) { @@ -9578,6 +9767,13 @@ vmiopd_mdesc_t *rpcdebugNvlinkIsGpuDegraded_v17_00(void) } #endif +#ifndef SKIP_PRINT_rpc_nvlink_fatal_error_recovery_v17_00 +vmiopd_mdesc_t *rpcdebugNvlinkFatalErrorRecovery_v17_00(void) +{ + return &vmiopd_mdesc_t_rpc_nvlink_fatal_error_recovery_v17_00; +} +#endif + #ifndef SKIP_PRINT_rpc_update_gsp_trace_v01_00 vmiopd_mdesc_t *rpcdebugUpdateGspTrace_v01_00(void) { @@ -9669,6 +9865,20 @@ vmiopd_mdesc_t *rpcdebugCtrlCmdNvlinkInbandSendData_v26_05(void) } #endif +#ifndef SKIP_PRINT_rpc_ctrl_cmd_internal_control_gsp_trace_v28_00 +vmiopd_mdesc_t *rpcdebugCtrlCmdInternalControlGspTrace_v28_00(void) +{ + return &vmiopd_mdesc_t_rpc_ctrl_cmd_internal_control_gsp_trace_v28_00; +} +#endif + +#ifndef SKIP_PRINT_rpc_recovery_action_v28_01 +vmiopd_mdesc_t *rpcdebugRecoveryAction_v28_01(void) +{ + return &vmiopd_mdesc_t_rpc_recovery_action_v28_01; +} +#endif + #endif @@ -9781,6 +9991,7 @@ typedef union rpc_generic_union { rpc_ctrl_set_tsg_interleave_level_v ctrl_set_tsg_interleave_level_v; rpc_ctrl_set_channel_interleave_level_v1A_0A ctrl_set_channel_interleave_level_v1A_0A; rpc_ctrl_set_channel_interleave_level_v ctrl_set_channel_interleave_level_v; + rpc_ctrl_gr_ctxsw_preemption_bind_v28_07 ctrl_gr_ctxsw_preemption_bind_v28_07; rpc_ctrl_gr_ctxsw_preemption_bind_v1A_0E ctrl_gr_ctxsw_preemption_bind_v1A_0E; rpc_ctrl_gr_ctxsw_preemption_bind_v ctrl_gr_ctxsw_preemption_bind_v; rpc_ctrl_gr_set_ctxsw_preemption_mode_v1A_0E ctrl_gr_set_ctxsw_preemption_mode_v1A_0E; @@ -9989,6 +10200,8 @@ typedef union rpc_generic_union { rpc_nvlink_inband_received_data_4096_v nvlink_inband_received_data_4096_v; rpc_nvlink_is_gpu_degraded_v17_00 nvlink_is_gpu_degraded_v17_00; rpc_nvlink_is_gpu_degraded_v nvlink_is_gpu_degraded_v; + rpc_nvlink_fatal_error_recovery_v17_00 nvlink_fatal_error_recovery_v17_00; + rpc_nvlink_fatal_error_recovery_v nvlink_fatal_error_recovery_v; rpc_update_gsp_trace_v01_00 update_gsp_trace_v01_00; rpc_update_gsp_trace_v update_gsp_trace_v; rpc_gsp_post_nocat_record_v01_00 gsp_post_nocat_record_v01_00; @@ -10014,6 +10227,10 @@ typedef union rpc_generic_union { rpc_fecs_error_v fecs_error_v; rpc_ctrl_cmd_nvlink_inband_send_data_v26_05 ctrl_cmd_nvlink_inband_send_data_v26_05; rpc_ctrl_cmd_nvlink_inband_send_data_v ctrl_cmd_nvlink_inband_send_data_v; + rpc_ctrl_cmd_internal_control_gsp_trace_v28_00 ctrl_cmd_internal_control_gsp_trace_v28_00; + rpc_ctrl_cmd_internal_control_gsp_trace_v ctrl_cmd_internal_control_gsp_trace_v; + rpc_recovery_action_v28_01 recovery_action_v28_01; + rpc_recovery_action_v recovery_action_v; } rpc_generic_union; #endif diff --git a/src/nvidia/generated/g_rpc_hal.h b/src/nvidia/generated/g_rpc_hal.h index 3d700c7bbf..820bd90171 100644 --- a/src/nvidia/generated/g_rpc_hal.h +++ b/src/nvidia/generated/g_rpc_hal.h @@ -72,7 +72,7 @@ typedef NV_STATUS RpcEccNotifierWriteAck(POBJGPU, POBJRPC); typedef NV_STATUS RpcAllocMemory(POBJGPU, POBJRPC, NvHandle, NvHandle, NvHandle, NvU32, NvU32, MEMORY_DESCRIPTOR*); typedef NV_STATUS RpcCtrlDbgReadSingleSmErrorState(POBJGPU, POBJRPC, NvHandle, NvHandle, void*); -typedef NV_STATUS RpcDisableChannels(POBJGPU, POBJRPC, NvU32); +typedef NV_STATUS RpcDisableChannels(POBJGPU, POBJRPC, void *); typedef NV_STATUS RpcGpuExecRegOps(POBJGPU, POBJRPC, NvHandle, NvHandle, NV2080_CTRL_GPU_EXEC_REG_OPS_PARAMS*, NV2080_CTRL_GPU_REG_OP*); typedef NV_STATUS RpcCtrlGpuPromoteCtx(POBJGPU, POBJRPC, NvHandle, NvHandle, void*); @@ -150,6 +150,7 @@ typedef NV_STATUS RpcCtrlGetNvlinkStatus(POBJGPU, POBJRPC, NvHandle, NvHand typedef NV_STATUS RpcGetStaticData(POBJGPU, POBJRPC); typedef NV_STATUS RpcCtrlGrGetTpcPartitionMode(POBJGPU, POBJRPC, NvHandle, NvHandle, void*); typedef NV_STATUS RpcCtrlStopChannel(POBJGPU, POBJRPC, NvHandle, NvHandle, void*); +typedef NV_STATUS RpcCtrlCmdInternalControlGspTrace(POBJGPU, POBJRPC, NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE_PARAMS*); typedef NV_STATUS RpcSetSurfaceProperties(POBJGPU, POBJRPC, NvHandle, NVA080_CTRL_VGPU_DISPLAY_SET_SURFACE_PROPERTIES*, NvBool); @@ -300,6 +301,7 @@ typedef struct RPC_HAL_IFACES { RpcGetStaticData *rpcGetStaticData; /* GET_STATIC_DATA published for OpenRM */ RpcCtrlGrGetTpcPartitionMode *rpcCtrlGrGetTpcPartitionMode; /* CTRL_GR_GET_TPC_PARTITION_MODE */ RpcCtrlStopChannel *rpcCtrlStopChannel; /* CTRL_STOP_CHANNEL */ + RpcCtrlCmdInternalControlGspTrace *rpcCtrlCmdInternalControlGspTrace; /* CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE */ RpcSetSurfaceProperties *rpcSetSurfaceProperties; /* SET_SURFACE_PROPERTIES */ RpcCtrlGpfifoSetWorkSubmitTokenNotifIndex *rpcCtrlGpfifoSetWorkSubmitTokenNotifIndex; /* CTRL_GPFIFO_SET_WORK_SUBMIT_TOKEN_NOTIF_INDEX */ RpcCtrlTimerSetGrTickFreq *rpcCtrlTimerSetGrTickFreq; /* CTRL_TIMER_SET_GR_TICK_FREQ */ @@ -378,8 +380,8 @@ typedef struct RPC_HAL_IFACES { (_pRpc)->_hal.rpcAllocMemory(_pGpu, _pRpc, _arg0, _arg1, _arg2, _arg3, _arg4, _pArg5) #define rpcCtrlDbgReadSingleSmErrorState_HAL(_pGpu, _pRpc, _arg0, _arg1, _pArg2) \ (_pRpc)->_hal.rpcCtrlDbgReadSingleSmErrorState(_pGpu, _pRpc, _arg0, _arg1, _pArg2) -#define rpcDisableChannels_HAL(_pGpu, _pRpc, _arg0) \ - (_pRpc)->_hal.rpcDisableChannels(_pGpu, _pRpc, _arg0) +#define rpcDisableChannels_HAL(_pGpu, _pRpc, _pArg0) \ + (_pRpc)->_hal.rpcDisableChannels(_pGpu, _pRpc, _pArg0) #define rpcGpuExecRegOps_HAL(_pGpu, _pRpc, _arg0, _arg1, _pArg2, _pArg3) \ (_pRpc)->_hal.rpcGpuExecRegOps(_pGpu, _pRpc, _arg0, _arg1, _pArg2, _pArg3) #define rpcCtrlGpuPromoteCtx_HAL(_pGpu, _pRpc, _arg0, _arg1, _pArg2) \ @@ -520,6 +522,8 @@ typedef struct RPC_HAL_IFACES { (_pRpc)->_hal.rpcCtrlGrGetTpcPartitionMode(_pGpu, _pRpc, _arg0, _arg1, _pArg2) #define rpcCtrlStopChannel_HAL(_pGpu, _pRpc, _arg0, _arg1, _pArg2) \ (_pRpc)->_hal.rpcCtrlStopChannel(_pGpu, _pRpc, _arg0, _arg1, _pArg2) +#define rpcCtrlCmdInternalControlGspTrace_HAL(_pGpu, _pRpc, _pArg0) \ + (_pRpc)->_hal.rpcCtrlCmdInternalControlGspTrace(_pGpu, _pRpc, _pArg0) #define rpcSetSurfaceProperties_HAL(_pGpu, _pRpc, _arg0, _pArg1, _arg2) \ (_pRpc)->_hal.rpcSetSurfaceProperties(_pGpu, _pRpc, _arg0, _pArg1, _arg2) #define rpcCtrlGpfifoSetWorkSubmitTokenNotifIndex_HAL(_pGpu, _pRpc, _arg0, _arg1, _pArg2) \ diff --git a/src/nvidia/generated/g_rpc_private.h b/src/nvidia/generated/g_rpc_private.h index b15c59cffb..8e675a8ed3 100644 --- a/src/nvidia/generated/g_rpc_private.h +++ b/src/nvidia/generated/g_rpc_private.h @@ -159,6 +159,7 @@ RpcCtrlVaspaceCopyServerReservedPdes rpcCtrlVaspaceCopyServerReservedPdes_STUB // RPC:CTRL_GR_CTXSW_PREEMPTION_BIND RpcCtrlGrCtxswPreemptionBind rpcCtrlGrCtxswPreemptionBind_v1A_0E; +RpcCtrlGrCtxswPreemptionBind rpcCtrlGrCtxswPreemptionBind_v28_07; RpcCtrlGrCtxswPreemptionBind rpcCtrlGrCtxswPreemptionBind_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102 // RPC:CTRL_ALLOC_PMA_STREAM @@ -327,6 +328,10 @@ RpcCtrlGrGetTpcPartitionMode rpcCtrlGrGetTpcPartitionMode_STUB; // TU10X, RpcCtrlStopChannel rpcCtrlStopChannel_v1A_1E; RpcCtrlStopChannel rpcCtrlStopChannel_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102 + // RPC:CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE +RpcCtrlCmdInternalControlGspTrace rpcCtrlCmdInternalControlGspTrace_v28_00; +RpcCtrlCmdInternalControlGspTrace rpcCtrlCmdInternalControlGspTrace_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102 + // RPC:SET_SURFACE_PROPERTIES RpcSetSurfaceProperties rpcSetSurfaceProperties_v07_07; RpcSetSurfaceProperties rpcSetSurfaceProperties_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102 @@ -2316,6 +2321,40 @@ static void rpc_iGrp_ipVersions_Install_v27_06(IGRP_IP_VERSIONS_TABLE_INFO *pInf #endif // } +// No enabled chips use this variant provider +static void rpc_iGrp_ipVersions_Install_v28_00(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) +{ +#if 0 + + POBJGPU pGpu = pInfo->pGpu; + OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; + RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; + + // avoid possible unused warnings + pGpu += 0; + pRpcHal += 0; + + +#endif // +} + +// No enabled chips use this variant provider +static void rpc_iGrp_ipVersions_Install_v28_07(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) +{ +#if 0 + + POBJGPU pGpu = pInfo->pGpu; + OBJRPC *pRpc = (OBJRPC *) pInfo->pDynamic; + RPC_HAL_IFACES *pRpcHal = &pRpc->_hal; + + // avoid possible unused warnings + pGpu += 0; + pRpcHal += 0; + + +#endif // +} + @@ -2404,8 +2443,10 @@ static NV_STATUS rpc_iGrp_ipVersions_Wrapup(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) pRpcHal->rpcCtrlSetZbcStencilClear = rpcCtrlSetZbcStencilClear_v27_06; if (IsIPVersionInRange(pRpc, 0x1E040000, 0xFFFFFFFF)) pRpcHal->rpcCtrlVaspaceCopyServerReservedPdes = rpcCtrlVaspaceCopyServerReservedPdes_v1E_04; - if (IsIPVersionInRange(pRpc, 0x1A0E0000, 0xFFFFFFFF)) + if (IsIPVersionInRange(pRpc, 0x1A0E0000, 0x2806FFFF)) pRpcHal->rpcCtrlGrCtxswPreemptionBind = rpcCtrlGrCtxswPreemptionBind_v1A_0E; + if (IsIPVersionInRange(pRpc, 0x28070000, 0xFFFFFFFF)) + pRpcHal->rpcCtrlGrCtxswPreemptionBind = rpcCtrlGrCtxswPreemptionBind_v28_07; if (IsIPVersionInRange(pRpc, 0x1A140000, 0xFFFFFFFF)) pRpcHal->rpcCtrlAllocPmaStream = rpcCtrlAllocPmaStream_v1A_14; if (IsIPVersionInRange(pRpc, 0x1A0F0000, 0xFFFFFFFF)) @@ -2488,6 +2529,8 @@ static NV_STATUS rpc_iGrp_ipVersions_Wrapup(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) pRpcHal->rpcCtrlGrGetTpcPartitionMode = rpcCtrlGrGetTpcPartitionMode_v1C_04; if (IsIPVersionInRange(pRpc, 0x1A1E0000, 0xFFFFFFFF)) pRpcHal->rpcCtrlStopChannel = rpcCtrlStopChannel_v1A_1E; + if (IsIPVersionInRange(pRpc, 0x28000000, 0xFFFFFFFF)) + pRpcHal->rpcCtrlCmdInternalControlGspTrace = rpcCtrlCmdInternalControlGspTrace_v28_00; if (IsIPVersionInRange(pRpc, 0x07070000, 0xFFFFFFFF)) pRpcHal->rpcSetSurfaceProperties = rpcSetSurfaceProperties_v07_07; if (IsIPVersionInRange(pRpc, 0x1F0A0000, 0xFFFFFFFF)) @@ -2707,6 +2750,7 @@ static NV_STATUS rpc_iGrp_ipVersions_Wrapup(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcGetStaticData); _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcCtrlGrGetTpcPartitionMode); _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcCtrlStopChannel); + _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcCtrlCmdInternalControlGspTrace); _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcSetSurfaceProperties); _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcCtrlGpfifoSetWorkSubmitTokenNotifIndex); _RPC_HAL_VERIFY_INTERFACE(pRpcHal->rpcCtrlTimerSetGrTickFreq); @@ -3077,6 +3121,12 @@ static NV_STATUS rpc_iGrp_ipVersions_getInfo(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v27_06[] = { { 0x27060000, 0xFFFFFFFF, }, // }; + static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v28_00[] = { + { 0x28000000, 0xFFFFFFFF, }, // + }; + static const IGRP_IP_VERSION_RANGE RPC_IGRP_IP_VERSIONS_RANGES_v28_07[] = { + { 0x28070000, 0xFFFFFFFF, }, // + }; #define _RPC_HAL_IGRP_ENTRY_INIT(v) \ { RPC_IGRP_IP_VERSIONS_RANGES_##v, NV_ARRAY_ELEMENTS(RPC_IGRP_IP_VERSIONS_RANGES_##v), rpc_iGrp_ipVersions_Install_##v, } @@ -3184,6 +3234,8 @@ static NV_STATUS rpc_iGrp_ipVersions_getInfo(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) _RPC_HAL_IGRP_ENTRY_INIT(v27_01), // _RPC_HAL_IGRP_ENTRY_INIT(v27_03), // _RPC_HAL_IGRP_ENTRY_INIT(v27_06), // + _RPC_HAL_IGRP_ENTRY_INIT(v28_00), // + _RPC_HAL_IGRP_ENTRY_INIT(v28_07), // }; #undef _RPC_HAL_IGRP_ENTRY_INIT @@ -3286,6 +3338,7 @@ static void rpcHalIfacesSetup_TU102(RPC_HAL_IFACES *pRpcHal) rpcGetStaticData_STUB, // rpcGetStaticData rpcCtrlGrGetTpcPartitionMode_STUB, // rpcCtrlGrGetTpcPartitionMode rpcCtrlStopChannel_STUB, // rpcCtrlStopChannel + rpcCtrlCmdInternalControlGspTrace_STUB, // rpcCtrlCmdInternalControlGspTrace rpcSetSurfaceProperties_STUB, // rpcSetSurfaceProperties rpcCtrlGpfifoSetWorkSubmitTokenNotifIndex_STUB, // rpcCtrlGpfifoSetWorkSubmitTokenNotifIndex rpcCtrlTimerSetGrTickFreq_STUB, // rpcCtrlTimerSetGrTickFreq @@ -3473,6 +3526,7 @@ static void rpcHalIfacesSetup_GA100(RPC_HAL_IFACES *pRpcHal) rpcGetStaticData_STUB, // rpcGetStaticData rpcCtrlGrGetTpcPartitionMode_STUB, // rpcCtrlGrGetTpcPartitionMode rpcCtrlStopChannel_STUB, // rpcCtrlStopChannel + rpcCtrlCmdInternalControlGspTrace_STUB, // rpcCtrlCmdInternalControlGspTrace rpcSetSurfaceProperties_STUB, // rpcSetSurfaceProperties rpcCtrlGpfifoSetWorkSubmitTokenNotifIndex_STUB, // rpcCtrlGpfifoSetWorkSubmitTokenNotifIndex rpcCtrlTimerSetGrTickFreq_STUB, // rpcCtrlTimerSetGrTickFreq @@ -3672,6 +3726,7 @@ static void rpcHalIfacesSetup_AD102(RPC_HAL_IFACES *pRpcHal) rpcGetStaticData_STUB, // rpcGetStaticData rpcCtrlGrGetTpcPartitionMode_STUB, // rpcCtrlGrGetTpcPartitionMode rpcCtrlStopChannel_STUB, // rpcCtrlStopChannel + rpcCtrlCmdInternalControlGspTrace_STUB, // rpcCtrlCmdInternalControlGspTrace rpcSetSurfaceProperties_STUB, // rpcSetSurfaceProperties rpcCtrlGpfifoSetWorkSubmitTokenNotifIndex_STUB, // rpcCtrlGpfifoSetWorkSubmitTokenNotifIndex rpcCtrlTimerSetGrTickFreq_STUB, // rpcCtrlTimerSetGrTickFreq @@ -3859,6 +3914,7 @@ static void rpcHalIfacesSetup_GH100(RPC_HAL_IFACES *pRpcHal) rpcGetStaticData_STUB, // rpcGetStaticData rpcCtrlGrGetTpcPartitionMode_STUB, // rpcCtrlGrGetTpcPartitionMode rpcCtrlStopChannel_STUB, // rpcCtrlStopChannel + rpcCtrlCmdInternalControlGspTrace_STUB, // rpcCtrlCmdInternalControlGspTrace rpcSetSurfaceProperties_STUB, // rpcSetSurfaceProperties rpcCtrlGpfifoSetWorkSubmitTokenNotifIndex_STUB, // rpcCtrlGpfifoSetWorkSubmitTokenNotifIndex rpcCtrlTimerSetGrTickFreq_STUB, // rpcCtrlTimerSetGrTickFreq @@ -4010,6 +4066,7 @@ static void rpcHalIfacesSetup_GB100(RPC_HAL_IFACES *pRpcHal) rpcGetStaticData_STUB, // rpcGetStaticData rpcCtrlGrGetTpcPartitionMode_STUB, // rpcCtrlGrGetTpcPartitionMode rpcCtrlStopChannel_STUB, // rpcCtrlStopChannel + rpcCtrlCmdInternalControlGspTrace_STUB, // rpcCtrlCmdInternalControlGspTrace rpcSetSurfaceProperties_STUB, // rpcSetSurfaceProperties rpcCtrlGpfifoSetWorkSubmitTokenNotifIndex_STUB, // rpcCtrlGpfifoSetWorkSubmitTokenNotifIndex rpcCtrlTimerSetGrTickFreq_STUB, // rpcCtrlTimerSetGrTickFreq diff --git a/src/nvidia/generated/g_rpcstructurecopy_private.h b/src/nvidia/generated/g_rpcstructurecopy_private.h index cff3a4423b..0dc50c90b6 100644 --- a/src/nvidia/generated/g_rpcstructurecopy_private.h +++ b/src/nvidia/generated/g_rpcstructurecopy_private.h @@ -48,6 +48,7 @@ Deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_GLOBAL_SM_ORDER_PARAMS deserial // RPCSTRUCTURECOPY:NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS Deserialize_NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS deserialize_NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS_v25_05; Deserialize_NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS deserialize_NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS_v27_05; +Deserialize_NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS deserialize_NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS_v28_04; Deserialize_NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS deserialize_NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102 // RPCSTRUCTURECOPY:NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS @@ -143,6 +144,7 @@ Deserialize_NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS deserial // RPCSTRUCTURECOPY:GPU_PARTITION_INFO Deserialize_GPU_PARTITION_INFO deserialize_GPU_PARTITION_INFO_v24_05; +Deserialize_GPU_PARTITION_INFO deserialize_GPU_PARTITION_INFO_v28_02; Deserialize_GPU_PARTITION_INFO deserialize_GPU_PARTITION_INFO_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102 // RPCSTRUCTURECOPY:NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS @@ -198,6 +200,8 @@ Deserialize_NV2080_CTRL_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS deserialize_NV208 Deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v24_06; Deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v26_02; Deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v27_04; +Deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v28_01; +Deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v28_08; Deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_STUB; // TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102 // RPCSTRUCTURECOPY:VGPU_CE_GET_CAPS_V2 @@ -995,6 +999,74 @@ static void rpcstructurecopy_iGrp_ipVersions_Install_v27_05(IGRP_IP_VERSIONS_TAB #endif // } +// No enabled chips use this variant provider +static void rpcstructurecopy_iGrp_ipVersions_Install_v28_01(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) +{ +#if 0 + + POBJGPU pGpu = pInfo->pGpu; + OBJRPCSTRUCTURECOPY *pRpcstructurecopy = (OBJRPCSTRUCTURECOPY *) pInfo->pDynamic; + RPCSTRUCTURECOPY_HAL_IFACES *pRpcstructurecopyHal = &pRpcstructurecopy->_hal; + + // avoid possible unused warnings + pGpu += 0; + pRpcstructurecopyHal += 0; + + +#endif // +} + +// No enabled chips use this variant provider +static void rpcstructurecopy_iGrp_ipVersions_Install_v28_02(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) +{ +#if 0 + + POBJGPU pGpu = pInfo->pGpu; + OBJRPCSTRUCTURECOPY *pRpcstructurecopy = (OBJRPCSTRUCTURECOPY *) pInfo->pDynamic; + RPCSTRUCTURECOPY_HAL_IFACES *pRpcstructurecopyHal = &pRpcstructurecopy->_hal; + + // avoid possible unused warnings + pGpu += 0; + pRpcstructurecopyHal += 0; + + +#endif // +} + +// No enabled chips use this variant provider +static void rpcstructurecopy_iGrp_ipVersions_Install_v28_04(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) +{ +#if 0 + + POBJGPU pGpu = pInfo->pGpu; + OBJRPCSTRUCTURECOPY *pRpcstructurecopy = (OBJRPCSTRUCTURECOPY *) pInfo->pDynamic; + RPCSTRUCTURECOPY_HAL_IFACES *pRpcstructurecopyHal = &pRpcstructurecopy->_hal; + + // avoid possible unused warnings + pGpu += 0; + pRpcstructurecopyHal += 0; + + +#endif // +} + +// No enabled chips use this variant provider +static void rpcstructurecopy_iGrp_ipVersions_Install_v28_08(IGRP_IP_VERSIONS_TABLE_INFO *pInfo) +{ +#if 0 + + POBJGPU pGpu = pInfo->pGpu; + OBJRPCSTRUCTURECOPY *pRpcstructurecopy = (OBJRPCSTRUCTURECOPY *) pInfo->pDynamic; + RPCSTRUCTURECOPY_HAL_IFACES *pRpcstructurecopyHal = &pRpcstructurecopy->_hal; + + // avoid possible unused warnings + pGpu += 0; + pRpcstructurecopyHal += 0; + + +#endif // +} + @@ -1029,8 +1101,10 @@ static NV_STATUS rpcstructurecopy_iGrp_ipVersions_Wrapup(IGRP_IP_VERSIONS_TABLE_ pRpcstructurecopyHal->deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_GLOBAL_SM_ORDER_PARAMS = deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_GLOBAL_SM_ORDER_PARAMS_v1F_01; if (IsIPVersionInRange(pRpcstructurecopy, 0x25050000, 0x2704FFFF)) pRpcstructurecopyHal->deserialize_NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS = deserialize_NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS_v25_05; - if (IsIPVersionInRange(pRpcstructurecopy, 0x27050000, 0xFFFFFFFF)) + if (IsIPVersionInRange(pRpcstructurecopy, 0x27050000, 0x2803FFFF)) pRpcstructurecopyHal->deserialize_NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS = deserialize_NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS_v27_05; + if (IsIPVersionInRange(pRpcstructurecopy, 0x28040000, 0xFFFFFFFF)) + pRpcstructurecopyHal->deserialize_NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS = deserialize_NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS_v28_04; if (IsIPVersionInRange(pRpcstructurecopy, 0x250E0000, 0xFFFFFFFF)) pRpcstructurecopyHal->deserialize_NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS = deserialize_NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS_v25_0E; if (IsIPVersionInRange(pRpcstructurecopy, 0x03000000, 0xFFFFFFFF)) @@ -1081,8 +1155,10 @@ static NV_STATUS rpcstructurecopy_iGrp_ipVersions_Wrapup(IGRP_IP_VERSIONS_TABLE_ pRpcstructurecopyHal->deserialize_VGPU_BSP_GET_CAPS = deserialize_VGPU_BSP_GET_CAPS_v25_00; if (IsIPVersionInRange(pRpcstructurecopy, 0x1F080000, 0xFFFFFFFF)) pRpcstructurecopyHal->deserialize_NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS = deserialize_NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS_v1F_08; - if (IsIPVersionInRange(pRpcstructurecopy, 0x24050000, 0xFFFFFFFF)) + if (IsIPVersionInRange(pRpcstructurecopy, 0x24050000, 0x2801FFFF)) pRpcstructurecopyHal->deserialize_GPU_PARTITION_INFO = deserialize_GPU_PARTITION_INFO_v24_05; + if (IsIPVersionInRange(pRpcstructurecopy, 0x28020000, 0xFFFFFFFF)) + pRpcstructurecopyHal->deserialize_GPU_PARTITION_INFO = deserialize_GPU_PARTITION_INFO_v28_02; if (IsIPVersionInRange(pRpcstructurecopy, 0x1E090000, 0xFFFFFFFF)) pRpcstructurecopyHal->deserialize_NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS = deserialize_NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS_v1E_09; if (IsIPVersionInRange(pRpcstructurecopy, 0x16000000, 0xFFFFFFFF)) @@ -1113,8 +1189,12 @@ static NV_STATUS rpcstructurecopy_iGrp_ipVersions_Wrapup(IGRP_IP_VERSIONS_TABLE_ pRpcstructurecopyHal->deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS = deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v24_06; if (IsIPVersionInRange(pRpcstructurecopy, 0x26020000, 0x2703FFFF)) pRpcstructurecopyHal->deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS = deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v26_02; - if (IsIPVersionInRange(pRpcstructurecopy, 0x27040000, 0xFFFFFFFF)) + if (IsIPVersionInRange(pRpcstructurecopy, 0x27040000, 0x2800FFFF)) pRpcstructurecopyHal->deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS = deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v27_04; + if (IsIPVersionInRange(pRpcstructurecopy, 0x28010000, 0x2807FFFF)) + pRpcstructurecopyHal->deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS = deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v28_01; + if (IsIPVersionInRange(pRpcstructurecopy, 0x28080000, 0xFFFFFFFF)) + pRpcstructurecopyHal->deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS = deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v28_08; if (IsIPVersionInRange(pRpcstructurecopy, 0x24090000, 0xFFFFFFFF)) pRpcstructurecopyHal->deserialize_VGPU_CE_GET_CAPS_V2 = deserialize_VGPU_CE_GET_CAPS_V2_v24_09; if (IsIPVersionInRange(pRpcstructurecopy, 0x1C090000, 0x2701FFFF)) @@ -1321,6 +1401,18 @@ static NV_STATUS rpcstructurecopy_iGrp_ipVersions_getInfo(IGRP_IP_VERSIONS_TABLE static const IGRP_IP_VERSION_RANGE RPCSTRUCTURECOPY_IGRP_IP_VERSIONS_RANGES_v27_05[] = { { 0x27050000, 0xFFFFFFFF, }, // }; + static const IGRP_IP_VERSION_RANGE RPCSTRUCTURECOPY_IGRP_IP_VERSIONS_RANGES_v28_01[] = { + { 0x28010000, 0xFFFFFFFF, }, // + }; + static const IGRP_IP_VERSION_RANGE RPCSTRUCTURECOPY_IGRP_IP_VERSIONS_RANGES_v28_02[] = { + { 0x28020000, 0xFFFFFFFF, }, // + }; + static const IGRP_IP_VERSION_RANGE RPCSTRUCTURECOPY_IGRP_IP_VERSIONS_RANGES_v28_04[] = { + { 0x28040000, 0xFFFFFFFF, }, // + }; + static const IGRP_IP_VERSION_RANGE RPCSTRUCTURECOPY_IGRP_IP_VERSIONS_RANGES_v28_08[] = { + { 0x28080000, 0xFFFFFFFF, }, // + }; #define _RPCSTRUCTURECOPY_HAL_IGRP_ENTRY_INIT(v) \ { RPCSTRUCTURECOPY_IGRP_IP_VERSIONS_RANGES_##v, NV_ARRAY_ELEMENTS(RPCSTRUCTURECOPY_IGRP_IP_VERSIONS_RANGES_##v), rpcstructurecopy_iGrp_ipVersions_Install_##v, } @@ -1371,6 +1463,10 @@ static NV_STATUS rpcstructurecopy_iGrp_ipVersions_getInfo(IGRP_IP_VERSIONS_TABLE _RPCSTRUCTURECOPY_HAL_IGRP_ENTRY_INIT(v27_02), // _RPCSTRUCTURECOPY_HAL_IGRP_ENTRY_INIT(v27_04), // _RPCSTRUCTURECOPY_HAL_IGRP_ENTRY_INIT(v27_05), // + _RPCSTRUCTURECOPY_HAL_IGRP_ENTRY_INIT(v28_01), // + _RPCSTRUCTURECOPY_HAL_IGRP_ENTRY_INIT(v28_02), // + _RPCSTRUCTURECOPY_HAL_IGRP_ENTRY_INIT(v28_04), // + _RPCSTRUCTURECOPY_HAL_IGRP_ENTRY_INIT(v28_08), // }; #undef _RPCSTRUCTURECOPY_HAL_IGRP_ENTRY_INIT diff --git a/src/nvidia/generated/g_rs_client_nvoc.c b/src/nvidia/generated/g_rs_client_nvoc.c index fc53582bdc..1b0771beed 100644 --- a/src/nvidia/generated/g_rs_client_nvoc.c +++ b/src/nvidia/generated/g_rs_client_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_RsClient = /*pExportInfo=*/ &__nvoc_export_info_RsClient }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_RsClient = { /*numEntries=*/ 0, @@ -96,49 +100,30 @@ NV_STATUS __nvoc_ctor_RsClient(RsClient *pThis, struct PORT_MEM_ALLOCATOR * arg_ // Vtable initialization static void __nvoc_init_funcTable_RsClient_1(RsClient *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // clientValidate -- virtual - pThis->__clientValidate__ = &clientValidate_IMPL; - - // clientValidateLocks -- virtual - pThis->__clientValidateLocks__ = &clientValidateLocks_IMPL; - - // clientGetCachedPrivilege -- virtual - pThis->__clientGetCachedPrivilege__ = &clientGetCachedPrivilege_IMPL; - - // clientIsAdmin -- virtual - pThis->__clientIsAdmin__ = &clientIsAdmin_IMPL; - - // clientFreeResource -- virtual - pThis->__clientFreeResource__ = &clientFreeResource_IMPL; - - // clientDestructResourceRef -- virtual - pThis->__clientDestructResourceRef__ = &clientDestructResourceRef_IMPL; - - // clientUnmapMemory -- virtual - pThis->__clientUnmapMemory__ = &clientUnmapMemory_IMPL; - - // clientInterMap -- virtual - pThis->__clientInterMap__ = &clientInterMap_IMPL; - - // clientInterUnmap -- virtual - pThis->__clientInterUnmap__ = &clientInterUnmap_IMPL; - - // clientValidateNewResourceHandle -- virtual - pThis->__clientValidateNewResourceHandle__ = &clientValidateNewResourceHandle_IMPL; - - // clientPostProcessPendingFreeList -- virtual - pThis->__clientPostProcessPendingFreeList__ = &clientPostProcessPendingFreeList_IMPL; - - // clientShareResource -- virtual - pThis->__clientShareResource__ = &clientShareResource_IMPL; -} // End __nvoc_init_funcTable_RsClient_1 with approximately 12 basic block(s). +} // End __nvoc_init_funcTable_RsClient_1 // Initialize vtable(s) for 12 virtual method(s). void __nvoc_init_funcTable_RsClient(RsClient *pThis) { - // Initialize vtable(s) with 12 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__RsClient vtable = { + .__clientValidate__ = &clientValidate_IMPL, // virtual + .__clientValidateLocks__ = &clientValidateLocks_IMPL, // virtual + .__clientGetCachedPrivilege__ = &clientGetCachedPrivilege_IMPL, // virtual + .__clientIsAdmin__ = &clientIsAdmin_IMPL, // virtual + .__clientFreeResource__ = &clientFreeResource_IMPL, // virtual + .__clientDestructResourceRef__ = &clientDestructResourceRef_IMPL, // virtual + .__clientUnmapMemory__ = &clientUnmapMemory_IMPL, // virtual + .__clientInterMap__ = &clientInterMap_IMPL, // virtual + .__clientInterUnmap__ = &clientInterUnmap_IMPL, // virtual + .__clientValidateNewResourceHandle__ = &clientValidateNewResourceHandle_IMPL, // virtual + .__clientPostProcessPendingFreeList__ = &clientPostProcessPendingFreeList_IMPL, // virtual + .__clientShareResource__ = &clientShareResource_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_vtable = &vtable; // (client) this __nvoc_init_funcTable_RsClient_1(pThis); } @@ -277,95 +262,117 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_RsClientResource = /*pExportInfo=*/ &__nvoc_export_info_RsClientResource }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_clientresCanCopy(struct RsClientResource *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_clientresIsDuplicate(struct RsClientResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_clientresPreDestruct(struct RsClientResource *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_clientresControl(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_clientresControlFilter(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_clientresControlSerialization_Prologue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RsResource_clientresControlSerialization_Epilogue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_clientresControl_Prologue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RsResource_clientresControl_Epilogue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_clientresMap(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_clientresUnmap(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_clientresIsPartialUnmapSupported(struct RsClientResource *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_clientresMapTo(struct RsClientResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_clientresUnmapFrom(struct RsClientResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_clientresGetRefCount(struct RsClientResource *pResource); // this +NvBool __nvoc_up_thunk_RsResource_clientresAccessCallback(struct RsClientResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RsResource_clientresShareCallback(struct RsClientResource *pResource, struct RsClient *pInvokingClient, RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +void __nvoc_up_thunk_RsResource_clientresAddAdditionalDependants(struct RsClient *pClient, struct RsClientResource *pResource, RsResourceRef *pReference); // this + // 18 up-thunk(s) defined to bridge methods in RsClientResource to superclasses // clientresCanCopy: virtual inherited (res) base (res) -static NvBool __nvoc_up_thunk_RsResource_clientresCanCopy(struct RsClientResource *pResource) { +NvBool __nvoc_up_thunk_RsResource_clientresCanCopy(struct RsClientResource *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset)); } // clientresIsDuplicate: virtual inherited (res) base (res) -static NV_STATUS __nvoc_up_thunk_RsResource_clientresIsDuplicate(struct RsClientResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_clientresIsDuplicate(struct RsClientResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), hMemory, pDuplicate); } // clientresPreDestruct: virtual inherited (res) base (res) -static void __nvoc_up_thunk_RsResource_clientresPreDestruct(struct RsClientResource *pResource) { +void __nvoc_up_thunk_RsResource_clientresPreDestruct(struct RsClientResource *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset)); } // clientresControl: virtual inherited (res) base (res) -static NV_STATUS __nvoc_up_thunk_RsResource_clientresControl(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_clientresControl(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pParams); } // clientresControlFilter: virtual inherited (res) base (res) -static NV_STATUS __nvoc_up_thunk_RsResource_clientresControlFilter(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_clientresControlFilter(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pParams); } // clientresControlSerialization_Prologue: virtual inherited (res) base (res) -static NV_STATUS __nvoc_up_thunk_RsResource_clientresControlSerialization_Prologue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_clientresControlSerialization_Prologue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlSerialization_Prologue((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pParams); } // clientresControlSerialization_Epilogue: virtual inherited (res) base (res) -static void __nvoc_up_thunk_RsResource_clientresControlSerialization_Epilogue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RsResource_clientresControlSerialization_Epilogue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { resControlSerialization_Epilogue((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pParams); } // clientresControl_Prologue: virtual inherited (res) base (res) -static NV_STATUS __nvoc_up_thunk_RsResource_clientresControl_Prologue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_clientresControl_Prologue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControl_Prologue((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pParams); } // clientresControl_Epilogue: virtual inherited (res) base (res) -static void __nvoc_up_thunk_RsResource_clientresControl_Epilogue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RsResource_clientresControl_Epilogue(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { resControl_Epilogue((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pParams); } // clientresMap: virtual inherited (res) base (res) -static NV_STATUS __nvoc_up_thunk_RsResource_clientresMap(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_clientresMap(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pParams, pCpuMapping); } // clientresUnmap: virtual inherited (res) base (res) -static NV_STATUS __nvoc_up_thunk_RsResource_clientresUnmap(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_clientresUnmap(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pCallContext, pCpuMapping); } // clientresIsPartialUnmapSupported: inline virtual inherited (res) base (res) body -static NvBool __nvoc_up_thunk_RsResource_clientresIsPartialUnmapSupported(struct RsClientResource *pResource) { +NvBool __nvoc_up_thunk_RsResource_clientresIsPartialUnmapSupported(struct RsClientResource *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset)); } // clientresMapTo: virtual inherited (res) base (res) -static NV_STATUS __nvoc_up_thunk_RsResource_clientresMapTo(struct RsClientResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_clientresMapTo(struct RsClientResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pParams); } // clientresUnmapFrom: virtual inherited (res) base (res) -static NV_STATUS __nvoc_up_thunk_RsResource_clientresUnmapFrom(struct RsClientResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_clientresUnmapFrom(struct RsClientResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pParams); } // clientresGetRefCount: virtual inherited (res) base (res) -static NvU32 __nvoc_up_thunk_RsResource_clientresGetRefCount(struct RsClientResource *pResource) { +NvU32 __nvoc_up_thunk_RsResource_clientresGetRefCount(struct RsClientResource *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset)); } // clientresAccessCallback: virtual inherited (res) base (res) -static NvBool __nvoc_up_thunk_RsResource_clientresAccessCallback(struct RsClientResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RsResource_clientresAccessCallback(struct RsClientResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return resAccessCallback((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pInvokingClient, pAllocParams, accessRight); } // clientresShareCallback: virtual inherited (res) base (res) -static NvBool __nvoc_up_thunk_RsResource_clientresShareCallback(struct RsClientResource *pResource, struct RsClient *pInvokingClient, RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RsResource_clientresShareCallback(struct RsClientResource *pResource, struct RsClient *pInvokingClient, RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return resShareCallback((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // clientresAddAdditionalDependants: virtual inherited (res) base (res) -static void __nvoc_up_thunk_RsResource_clientresAddAdditionalDependants(struct RsClient *pClient, struct RsClientResource *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_clientresAddAdditionalDependants(struct RsClient *pClient, struct RsClientResource *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_RsClientResource_RsResource.offset), pReference); } @@ -409,67 +416,55 @@ NV_STATUS __nvoc_ctor_RsClientResource(RsClientResource *pThis, struct CALL_CONT // Vtable initialization static void __nvoc_init_funcTable_RsClientResource_1(RsClientResource *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // clientresCanCopy -- virtual inherited (res) base (res) - pThis->__clientresCanCopy__ = &__nvoc_up_thunk_RsResource_clientresCanCopy; - - // clientresIsDuplicate -- virtual inherited (res) base (res) - pThis->__clientresIsDuplicate__ = &__nvoc_up_thunk_RsResource_clientresIsDuplicate; - - // clientresPreDestruct -- virtual inherited (res) base (res) - pThis->__clientresPreDestruct__ = &__nvoc_up_thunk_RsResource_clientresPreDestruct; - - // clientresControl -- virtual inherited (res) base (res) - pThis->__clientresControl__ = &__nvoc_up_thunk_RsResource_clientresControl; - - // clientresControlFilter -- virtual inherited (res) base (res) - pThis->__clientresControlFilter__ = &__nvoc_up_thunk_RsResource_clientresControlFilter; - - // clientresControlSerialization_Prologue -- virtual inherited (res) base (res) - pThis->__clientresControlSerialization_Prologue__ = &__nvoc_up_thunk_RsResource_clientresControlSerialization_Prologue; - - // clientresControlSerialization_Epilogue -- virtual inherited (res) base (res) - pThis->__clientresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RsResource_clientresControlSerialization_Epilogue; - - // clientresControl_Prologue -- virtual inherited (res) base (res) - pThis->__clientresControl_Prologue__ = &__nvoc_up_thunk_RsResource_clientresControl_Prologue; - - // clientresControl_Epilogue -- virtual inherited (res) base (res) - pThis->__clientresControl_Epilogue__ = &__nvoc_up_thunk_RsResource_clientresControl_Epilogue; - - // clientresMap -- virtual inherited (res) base (res) - pThis->__clientresMap__ = &__nvoc_up_thunk_RsResource_clientresMap; - - // clientresUnmap -- virtual inherited (res) base (res) - pThis->__clientresUnmap__ = &__nvoc_up_thunk_RsResource_clientresUnmap; - - // clientresIsPartialUnmapSupported -- inline virtual inherited (res) base (res) body - pThis->__clientresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_clientresIsPartialUnmapSupported; - - // clientresMapTo -- virtual inherited (res) base (res) - pThis->__clientresMapTo__ = &__nvoc_up_thunk_RsResource_clientresMapTo; - - // clientresUnmapFrom -- virtual inherited (res) base (res) - pThis->__clientresUnmapFrom__ = &__nvoc_up_thunk_RsResource_clientresUnmapFrom; - - // clientresGetRefCount -- virtual inherited (res) base (res) - pThis->__clientresGetRefCount__ = &__nvoc_up_thunk_RsResource_clientresGetRefCount; - - // clientresAccessCallback -- virtual inherited (res) base (res) - pThis->__clientresAccessCallback__ = &__nvoc_up_thunk_RsResource_clientresAccessCallback; - - // clientresShareCallback -- virtual inherited (res) base (res) - pThis->__clientresShareCallback__ = &__nvoc_up_thunk_RsResource_clientresShareCallback; - - // clientresAddAdditionalDependants -- virtual inherited (res) base (res) - pThis->__clientresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_clientresAddAdditionalDependants; -} // End __nvoc_init_funcTable_RsClientResource_1 with approximately 18 basic block(s). +} // End __nvoc_init_funcTable_RsClientResource_1 // Initialize vtable(s) for 18 virtual method(s). void __nvoc_init_funcTable_RsClientResource(RsClientResource *pThis) { - // Initialize vtable(s) with 18 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__RsClientResource vtable = { + .__clientresCanCopy__ = &__nvoc_up_thunk_RsResource_clientresCanCopy, // virtual inherited (res) base (res) + .RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__clientresIsDuplicate__ = &__nvoc_up_thunk_RsResource_clientresIsDuplicate, // virtual inherited (res) base (res) + .RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__clientresPreDestruct__ = &__nvoc_up_thunk_RsResource_clientresPreDestruct, // virtual inherited (res) base (res) + .RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__clientresControl__ = &__nvoc_up_thunk_RsResource_clientresControl, // virtual inherited (res) base (res) + .RsResource.__resControl__ = &resControl_IMPL, // virtual + .__clientresControlFilter__ = &__nvoc_up_thunk_RsResource_clientresControlFilter, // virtual inherited (res) base (res) + .RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__clientresControlSerialization_Prologue__ = &__nvoc_up_thunk_RsResource_clientresControlSerialization_Prologue, // virtual inherited (res) base (res) + .RsResource.__resControlSerialization_Prologue__ = &resControlSerialization_Prologue_IMPL, // virtual + .__clientresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RsResource_clientresControlSerialization_Epilogue, // virtual inherited (res) base (res) + .RsResource.__resControlSerialization_Epilogue__ = &resControlSerialization_Epilogue_IMPL, // virtual + .__clientresControl_Prologue__ = &__nvoc_up_thunk_RsResource_clientresControl_Prologue, // virtual inherited (res) base (res) + .RsResource.__resControl_Prologue__ = &resControl_Prologue_IMPL, // virtual + .__clientresControl_Epilogue__ = &__nvoc_up_thunk_RsResource_clientresControl_Epilogue, // virtual inherited (res) base (res) + .RsResource.__resControl_Epilogue__ = &resControl_Epilogue_IMPL, // virtual + .__clientresMap__ = &__nvoc_up_thunk_RsResource_clientresMap, // virtual inherited (res) base (res) + .RsResource.__resMap__ = &resMap_IMPL, // virtual + .__clientresUnmap__ = &__nvoc_up_thunk_RsResource_clientresUnmap, // virtual inherited (res) base (res) + .RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__clientresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_clientresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__clientresMapTo__ = &__nvoc_up_thunk_RsResource_clientresMapTo, // virtual inherited (res) base (res) + .RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__clientresUnmapFrom__ = &__nvoc_up_thunk_RsResource_clientresUnmapFrom, // virtual inherited (res) base (res) + .RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__clientresGetRefCount__ = &__nvoc_up_thunk_RsResource_clientresGetRefCount, // virtual inherited (res) base (res) + .RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__clientresAccessCallback__ = &__nvoc_up_thunk_RsResource_clientresAccessCallback, // virtual inherited (res) base (res) + .RsResource.__resAccessCallback__ = &resAccessCallback_IMPL, // virtual + .__clientresShareCallback__ = &__nvoc_up_thunk_RsResource_clientresShareCallback, // virtual inherited (res) base (res) + .RsResource.__resShareCallback__ = &resShareCallback_IMPL, // virtual + .__clientresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_clientresAddAdditionalDependants, // virtual inherited (res) base (res) + .RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RsResource.__nvoc_vtable = &vtable.RsResource; // (res) super + pThis->__nvoc_vtable = &vtable; // (clientres) this __nvoc_init_funcTable_RsClientResource_1(pThis); } diff --git a/src/nvidia/generated/g_rs_client_nvoc.h b/src/nvidia/generated/g_rs_client_nvoc.h index 20799d20e9..a8b149ee65 100644 --- a/src/nvidia/generated/g_rs_client_nvoc.h +++ b/src/nvidia/generated/g_rs_client_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -88,10 +88,15 @@ MAKE_LIST(AccessBackRefList, AccessBackRef); #endif +// Metadata including vtable +struct NVOC_VTABLE__RsClient; + + struct RsClient { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__RsClient *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; @@ -100,20 +105,6 @@ struct RsClient { struct Object *__nvoc_pbase_Object; // obj super struct RsClient *__nvoc_pbase_RsClient; // client - // Vtable with 12 per-object function pointers - NV_STATUS (*__clientValidate__)(struct RsClient * /*this*/, const API_SECURITY_INFO *); // virtual - NV_STATUS (*__clientValidateLocks__)(struct RsClient * /*this*/, RsServer *, const CLIENT_ENTRY *); // virtual - RS_PRIV_LEVEL (*__clientGetCachedPrivilege__)(struct RsClient * /*this*/); // virtual - NvBool (*__clientIsAdmin__)(struct RsClient * /*this*/, RS_PRIV_LEVEL); // virtual - NV_STATUS (*__clientFreeResource__)(struct RsClient * /*this*/, RsServer *, struct RS_RES_FREE_PARAMS_INTERNAL *); // virtual - NV_STATUS (*__clientDestructResourceRef__)(struct RsClient * /*this*/, RsServer *, struct RsResourceRef *); // virtual - NV_STATUS (*__clientUnmapMemory__)(struct RsClient * /*this*/, struct RsResourceRef *, struct RS_LOCK_INFO *, struct RsCpuMapping **, API_SECURITY_INFO *); // virtual - NV_STATUS (*__clientInterMap__)(struct RsClient * /*this*/, struct RsResourceRef *, struct RsResourceRef *, struct RS_INTER_MAP_PARAMS *); // virtual - NV_STATUS (*__clientInterUnmap__)(struct RsClient * /*this*/, struct RsResourceRef *, struct RS_INTER_UNMAP_PARAMS *); // virtual - NV_STATUS (*__clientValidateNewResourceHandle__)(struct RsClient * /*this*/, NvHandle, NvBool); // virtual - NV_STATUS (*__clientPostProcessPendingFreeList__)(struct RsClient * /*this*/, struct RsResourceRef **); // virtual - NV_STATUS (*__clientShareResource__)(struct RsClient * /*this*/, struct RsResourceRef *, RS_SHARE_POLICY *, struct CALL_CONTEXT *); // virtual - // Data members NvHandle hClient; CLIENT_TYPE type; @@ -132,6 +123,24 @@ struct RsClient { struct ListNode disabledClientNode; }; + +// Metadata including vtable with 12 function pointers plus superclass metadata +struct NVOC_VTABLE__RsClient { + + NV_STATUS (*__clientValidate__)(struct RsClient * /*this*/, const API_SECURITY_INFO *); // virtual + NV_STATUS (*__clientValidateLocks__)(struct RsClient * /*this*/, RsServer *, const CLIENT_ENTRY *); // virtual + RS_PRIV_LEVEL (*__clientGetCachedPrivilege__)(struct RsClient * /*this*/); // virtual + NvBool (*__clientIsAdmin__)(struct RsClient * /*this*/, RS_PRIV_LEVEL); // virtual + NV_STATUS (*__clientFreeResource__)(struct RsClient * /*this*/, RsServer *, struct RS_RES_FREE_PARAMS_INTERNAL *); // virtual + NV_STATUS (*__clientDestructResourceRef__)(struct RsClient * /*this*/, RsServer *, struct RsResourceRef *); // virtual + NV_STATUS (*__clientUnmapMemory__)(struct RsClient * /*this*/, struct RsResourceRef *, struct RS_LOCK_INFO *, struct RsCpuMapping **, API_SECURITY_INFO *); // virtual + NV_STATUS (*__clientInterMap__)(struct RsClient * /*this*/, struct RsResourceRef *, struct RsResourceRef *, struct RS_INTER_MAP_PARAMS *); // virtual + NV_STATUS (*__clientInterUnmap__)(struct RsClient * /*this*/, struct RsResourceRef *, struct RS_INTER_UNMAP_PARAMS *); // virtual + NV_STATUS (*__clientValidateNewResourceHandle__)(struct RsClient * /*this*/, NvHandle, NvBool); // virtual + NV_STATUS (*__clientPostProcessPendingFreeList__)(struct RsClient * /*this*/, struct RsResourceRef **); // virtual + NV_STATUS (*__clientShareResource__)(struct RsClient * /*this*/, struct RsResourceRef *, RS_SHARE_POLICY *, struct CALL_CONTEXT *); // virtual +}; + #ifndef __NVOC_CLASS_RsClient_TYPEDEF__ #define __NVOC_CLASS_RsClient_TYPEDEF__ typedef struct RsClient RsClient; @@ -162,78 +171,78 @@ NV_STATUS __nvoc_objCreate_RsClient(RsClient**, Dynamic*, NvU32, struct PORT_MEM // Wrapper macros -#define clientValidate_FNPTR(pClient) pClient->__clientValidate__ +#define clientValidate_FNPTR(pClient) pClient->__nvoc_vtable->__clientValidate__ #define clientValidate(pClient, pSecInfo) clientValidate_DISPATCH(pClient, pSecInfo) -#define clientValidateLocks_FNPTR(pClient) pClient->__clientValidateLocks__ +#define clientValidateLocks_FNPTR(pClient) pClient->__nvoc_vtable->__clientValidateLocks__ #define clientValidateLocks(pClient, pServer, pClientEntry) clientValidateLocks_DISPATCH(pClient, pServer, pClientEntry) -#define clientGetCachedPrivilege_FNPTR(pClient) pClient->__clientGetCachedPrivilege__ +#define clientGetCachedPrivilege_FNPTR(pClient) pClient->__nvoc_vtable->__clientGetCachedPrivilege__ #define clientGetCachedPrivilege(pClient) clientGetCachedPrivilege_DISPATCH(pClient) -#define clientIsAdmin_FNPTR(pClient) pClient->__clientIsAdmin__ +#define clientIsAdmin_FNPTR(pClient) pClient->__nvoc_vtable->__clientIsAdmin__ #define clientIsAdmin(pClient, privLevel) clientIsAdmin_DISPATCH(pClient, privLevel) -#define clientFreeResource_FNPTR(pClient) pClient->__clientFreeResource__ +#define clientFreeResource_FNPTR(pClient) pClient->__nvoc_vtable->__clientFreeResource__ #define clientFreeResource(pClient, pServer, pParams) clientFreeResource_DISPATCH(pClient, pServer, pParams) -#define clientDestructResourceRef_FNPTR(pClient) pClient->__clientDestructResourceRef__ +#define clientDestructResourceRef_FNPTR(pClient) pClient->__nvoc_vtable->__clientDestructResourceRef__ #define clientDestructResourceRef(pClient, pServer, pResourceRef) clientDestructResourceRef_DISPATCH(pClient, pServer, pResourceRef) -#define clientUnmapMemory_FNPTR(pClient) pClient->__clientUnmapMemory__ +#define clientUnmapMemory_FNPTR(pClient) pClient->__nvoc_vtable->__clientUnmapMemory__ #define clientUnmapMemory(pClient, pResourceRef, pLockInfo, ppCpuMapping, pSecInfo) clientUnmapMemory_DISPATCH(pClient, pResourceRef, pLockInfo, ppCpuMapping, pSecInfo) -#define clientInterMap_FNPTR(pClient) pClient->__clientInterMap__ +#define clientInterMap_FNPTR(pClient) pClient->__nvoc_vtable->__clientInterMap__ #define clientInterMap(pClient, pMapperRef, pMappableRef, pParams) clientInterMap_DISPATCH(pClient, pMapperRef, pMappableRef, pParams) -#define clientInterUnmap_FNPTR(pClient) pClient->__clientInterUnmap__ +#define clientInterUnmap_FNPTR(pClient) pClient->__nvoc_vtable->__clientInterUnmap__ #define clientInterUnmap(pClient, pMapperRef, pParams) clientInterUnmap_DISPATCH(pClient, pMapperRef, pParams) -#define clientValidateNewResourceHandle_FNPTR(pClient) pClient->__clientValidateNewResourceHandle__ +#define clientValidateNewResourceHandle_FNPTR(pClient) pClient->__nvoc_vtable->__clientValidateNewResourceHandle__ #define clientValidateNewResourceHandle(pClient, hResource, bRestrict) clientValidateNewResourceHandle_DISPATCH(pClient, hResource, bRestrict) -#define clientPostProcessPendingFreeList_FNPTR(pClient) pClient->__clientPostProcessPendingFreeList__ +#define clientPostProcessPendingFreeList_FNPTR(pClient) pClient->__nvoc_vtable->__clientPostProcessPendingFreeList__ #define clientPostProcessPendingFreeList(pClient, ppFirstLowPriRef) clientPostProcessPendingFreeList_DISPATCH(pClient, ppFirstLowPriRef) -#define clientShareResource_FNPTR(pClient) pClient->__clientShareResource__ +#define clientShareResource_FNPTR(pClient) pClient->__nvoc_vtable->__clientShareResource__ #define clientShareResource(pClient, pResourceRef, pSharePolicy, pCallContext) clientShareResource_DISPATCH(pClient, pResourceRef, pSharePolicy, pCallContext) // Dispatch functions static inline NV_STATUS clientValidate_DISPATCH(struct RsClient *pClient, const API_SECURITY_INFO *pSecInfo) { - return pClient->__clientValidate__(pClient, pSecInfo); + return pClient->__nvoc_vtable->__clientValidate__(pClient, pSecInfo); } static inline NV_STATUS clientValidateLocks_DISPATCH(struct RsClient *pClient, RsServer *pServer, const CLIENT_ENTRY *pClientEntry) { - return pClient->__clientValidateLocks__(pClient, pServer, pClientEntry); + return pClient->__nvoc_vtable->__clientValidateLocks__(pClient, pServer, pClientEntry); } static inline RS_PRIV_LEVEL clientGetCachedPrivilege_DISPATCH(struct RsClient *pClient) { - return pClient->__clientGetCachedPrivilege__(pClient); + return pClient->__nvoc_vtable->__clientGetCachedPrivilege__(pClient); } static inline NvBool clientIsAdmin_DISPATCH(struct RsClient *pClient, RS_PRIV_LEVEL privLevel) { - return pClient->__clientIsAdmin__(pClient, privLevel); + return pClient->__nvoc_vtable->__clientIsAdmin__(pClient, privLevel); } static inline NV_STATUS clientFreeResource_DISPATCH(struct RsClient *pClient, RsServer *pServer, struct RS_RES_FREE_PARAMS_INTERNAL *pParams) { - return pClient->__clientFreeResource__(pClient, pServer, pParams); + return pClient->__nvoc_vtable->__clientFreeResource__(pClient, pServer, pParams); } static inline NV_STATUS clientDestructResourceRef_DISPATCH(struct RsClient *pClient, RsServer *pServer, struct RsResourceRef *pResourceRef) { - return pClient->__clientDestructResourceRef__(pClient, pServer, pResourceRef); + return pClient->__nvoc_vtable->__clientDestructResourceRef__(pClient, pServer, pResourceRef); } static inline NV_STATUS clientUnmapMemory_DISPATCH(struct RsClient *pClient, struct RsResourceRef *pResourceRef, struct RS_LOCK_INFO *pLockInfo, struct RsCpuMapping **ppCpuMapping, API_SECURITY_INFO *pSecInfo) { - return pClient->__clientUnmapMemory__(pClient, pResourceRef, pLockInfo, ppCpuMapping, pSecInfo); + return pClient->__nvoc_vtable->__clientUnmapMemory__(pClient, pResourceRef, pLockInfo, ppCpuMapping, pSecInfo); } static inline NV_STATUS clientInterMap_DISPATCH(struct RsClient *pClient, struct RsResourceRef *pMapperRef, struct RsResourceRef *pMappableRef, struct RS_INTER_MAP_PARAMS *pParams) { - return pClient->__clientInterMap__(pClient, pMapperRef, pMappableRef, pParams); + return pClient->__nvoc_vtable->__clientInterMap__(pClient, pMapperRef, pMappableRef, pParams); } static inline NV_STATUS clientInterUnmap_DISPATCH(struct RsClient *pClient, struct RsResourceRef *pMapperRef, struct RS_INTER_UNMAP_PARAMS *pParams) { - return pClient->__clientInterUnmap__(pClient, pMapperRef, pParams); + return pClient->__nvoc_vtable->__clientInterUnmap__(pClient, pMapperRef, pParams); } static inline NV_STATUS clientValidateNewResourceHandle_DISPATCH(struct RsClient *pClient, NvHandle hResource, NvBool bRestrict) { - return pClient->__clientValidateNewResourceHandle__(pClient, hResource, bRestrict); + return pClient->__nvoc_vtable->__clientValidateNewResourceHandle__(pClient, hResource, bRestrict); } static inline NV_STATUS clientPostProcessPendingFreeList_DISPATCH(struct RsClient *pClient, struct RsResourceRef **ppFirstLowPriRef) { - return pClient->__clientPostProcessPendingFreeList__(pClient, ppFirstLowPriRef); + return pClient->__nvoc_vtable->__clientPostProcessPendingFreeList__(pClient, ppFirstLowPriRef); } static inline NV_STATUS clientShareResource_DISPATCH(struct RsClient *pClient, struct RsResourceRef *pResourceRef, RS_SHARE_POLICY *pSharePolicy, struct CALL_CONTEXT *pCallContext) { - return pClient->__clientShareResource__(pClient, pResourceRef, pSharePolicy, pCallContext); + return pClient->__nvoc_vtable->__clientShareResource__(pClient, pResourceRef, pSharePolicy, pCallContext); } NV_STATUS clientValidate_IMPL(struct RsClient *pClient, const API_SECURITY_INFO *pSecInfo); @@ -520,10 +529,15 @@ NV_STATUS clientUnmapResourceRefMappings(struct RsClient *pClient, CALL_CONTEXT #endif +// Metadata including vtable +struct NVOC_VTABLE__RsClientResource; + + struct RsClientResource { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__RsClientResource *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RsResource __nvoc_base_RsResource; @@ -533,7 +547,15 @@ struct RsClientResource { struct RsResource *__nvoc_pbase_RsResource; // res super struct RsClientResource *__nvoc_pbase_RsClientResource; // clientres - // Vtable with 18 per-object function pointers + // Data members + struct RsClient *pClient; +}; + + +// Metadata including vtable with 18 function pointers plus superclass metadata +struct NVOC_VTABLE__RsClientResource { + const struct NVOC_VTABLE__RsResource RsResource; // (res) 18 function pointers + NvBool (*__clientresCanCopy__)(struct RsClientResource * /*this*/); // virtual inherited (res) base (res) NV_STATUS (*__clientresIsDuplicate__)(struct RsClientResource * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (res) void (*__clientresPreDestruct__)(struct RsClientResource * /*this*/); // virtual inherited (res) base (res) @@ -552,9 +574,6 @@ struct RsClientResource { NvBool (*__clientresAccessCallback__)(struct RsClientResource * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (res) base (res) NvBool (*__clientresShareCallback__)(struct RsClientResource * /*this*/, struct RsClient *, RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (res) base (res) void (*__clientresAddAdditionalDependants__)(struct RsClient *, struct RsClientResource * /*this*/, RsResourceRef *); // virtual inherited (res) base (res) - - // Data members - struct RsClient *pClient; }; #ifndef __NVOC_CLASS_RsClientResource_TYPEDEF__ @@ -587,114 +606,114 @@ NV_STATUS __nvoc_objCreate_RsClientResource(RsClientResource**, Dynamic*, NvU32, // Wrapper macros -#define clientresCanCopy_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resCanCopy__ +#define clientresCanCopy_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define clientresCanCopy(pResource) clientresCanCopy_DISPATCH(pResource) -#define clientresIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resIsDuplicate__ +#define clientresIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define clientresIsDuplicate(pResource, hMemory, pDuplicate) clientresIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define clientresPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resPreDestruct__ +#define clientresPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define clientresPreDestruct(pResource) clientresPreDestruct_DISPATCH(pResource) -#define clientresControl_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resControl__ +#define clientresControl_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resControl__ #define clientresControl(pResource, pCallContext, pParams) clientresControl_DISPATCH(pResource, pCallContext, pParams) -#define clientresControlFilter_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resControlFilter__ +#define clientresControlFilter_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define clientresControlFilter(pResource, pCallContext, pParams) clientresControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define clientresControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resControlSerialization_Prologue__ +#define clientresControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resControlSerialization_Prologue__ #define clientresControlSerialization_Prologue(pResource, pCallContext, pParams) clientresControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define clientresControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resControlSerialization_Epilogue__ +#define clientresControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resControlSerialization_Epilogue__ #define clientresControlSerialization_Epilogue(pResource, pCallContext, pParams) clientresControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define clientresControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resControl_Prologue__ +#define clientresControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resControl_Prologue__ #define clientresControl_Prologue(pResource, pCallContext, pParams) clientresControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define clientresControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resControl_Epilogue__ +#define clientresControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resControl_Epilogue__ #define clientresControl_Epilogue(pResource, pCallContext, pParams) clientresControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define clientresMap_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resMap__ +#define clientresMap_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define clientresMap(pResource, pCallContext, pParams, pCpuMapping) clientresMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define clientresUnmap_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resUnmap__ +#define clientresUnmap_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define clientresUnmap(pResource, pCallContext, pCpuMapping) clientresUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define clientresIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define clientresIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define clientresIsPartialUnmapSupported(pResource) clientresIsPartialUnmapSupported_DISPATCH(pResource) -#define clientresMapTo_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resMapTo__ +#define clientresMapTo_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define clientresMapTo(pResource, pParams) clientresMapTo_DISPATCH(pResource, pParams) -#define clientresUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resUnmapFrom__ +#define clientresUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define clientresUnmapFrom(pResource, pParams) clientresUnmapFrom_DISPATCH(pResource, pParams) -#define clientresGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resGetRefCount__ +#define clientresGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define clientresGetRefCount(pResource) clientresGetRefCount_DISPATCH(pResource) -#define clientresAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resAccessCallback__ +#define clientresAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resAccessCallback__ #define clientresAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) clientresAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define clientresShareCallback_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resShareCallback__ +#define clientresShareCallback_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resShareCallback__ #define clientresShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) clientresShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define clientresAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define clientresAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define clientresAddAdditionalDependants(pClient, pResource, pReference) clientresAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool clientresCanCopy_DISPATCH(struct RsClientResource *pResource) { - return pResource->__clientresCanCopy__(pResource); + return pResource->__nvoc_vtable->__clientresCanCopy__(pResource); } static inline NV_STATUS clientresIsDuplicate_DISPATCH(struct RsClientResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__clientresIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__clientresIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void clientresPreDestruct_DISPATCH(struct RsClientResource *pResource) { - pResource->__clientresPreDestruct__(pResource); + pResource->__nvoc_vtable->__clientresPreDestruct__(pResource); } static inline NV_STATUS clientresControl_DISPATCH(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__clientresControl__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__clientresControl__(pResource, pCallContext, pParams); } static inline NV_STATUS clientresControlFilter_DISPATCH(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__clientresControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__clientresControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS clientresControlSerialization_Prologue_DISPATCH(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__clientresControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__clientresControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void clientresControlSerialization_Epilogue_DISPATCH(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__clientresControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__clientresControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS clientresControl_Prologue_DISPATCH(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__clientresControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__clientresControl_Prologue__(pResource, pCallContext, pParams); } static inline void clientresControl_Epilogue_DISPATCH(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__clientresControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__clientresControl_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS clientresMap_DISPATCH(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__clientresMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__clientresMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS clientresUnmap_DISPATCH(struct RsClientResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__clientresUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__clientresUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool clientresIsPartialUnmapSupported_DISPATCH(struct RsClientResource *pResource) { - return pResource->__clientresIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__clientresIsPartialUnmapSupported__(pResource); } static inline NV_STATUS clientresMapTo_DISPATCH(struct RsClientResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__clientresMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__clientresMapTo__(pResource, pParams); } static inline NV_STATUS clientresUnmapFrom_DISPATCH(struct RsClientResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__clientresUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__clientresUnmapFrom__(pResource, pParams); } static inline NvU32 clientresGetRefCount_DISPATCH(struct RsClientResource *pResource) { - return pResource->__clientresGetRefCount__(pResource); + return pResource->__nvoc_vtable->__clientresGetRefCount__(pResource); } static inline NvBool clientresAccessCallback_DISPATCH(struct RsClientResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__clientresAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__clientresAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool clientresShareCallback_DISPATCH(struct RsClientResource *pResource, struct RsClient *pInvokingClient, RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__clientresShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__clientresShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline void clientresAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct RsClientResource *pResource, RsResourceRef *pReference) { - pResource->__clientresAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__clientresAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS clientresConstruct_IMPL(struct RsClientResource *arg_pClientRes, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_rs_resource_nvoc.c b/src/nvidia/generated/g_rs_resource_nvoc.c index 9c3baf9131..8d0c92f592 100644 --- a/src/nvidia/generated/g_rs_resource_nvoc.c +++ b/src/nvidia/generated/g_rs_resource_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_RsResource = /*pExportInfo=*/ &__nvoc_export_info_RsResource }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_RsResource = { /*numEntries=*/ 0, @@ -96,67 +100,36 @@ NV_STATUS __nvoc_ctor_RsResource(RsResource *pThis, struct CALL_CONTEXT * arg_pC // Vtable initialization static void __nvoc_init_funcTable_RsResource_1(RsResource *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // resCanCopy -- virtual - pThis->__resCanCopy__ = &resCanCopy_IMPL; - - // resIsDuplicate -- virtual - pThis->__resIsDuplicate__ = &resIsDuplicate_IMPL; - - // resPreDestruct -- virtual - pThis->__resPreDestruct__ = &resPreDestruct_IMPL; - - // resControl -- virtual - pThis->__resControl__ = &resControl_IMPL; - - // resControlFilter -- virtual - pThis->__resControlFilter__ = &resControlFilter_IMPL; - - // resControlSerialization_Prologue -- virtual - pThis->__resControlSerialization_Prologue__ = &resControlSerialization_Prologue_IMPL; - - // resControlSerialization_Epilogue -- virtual - pThis->__resControlSerialization_Epilogue__ = &resControlSerialization_Epilogue_IMPL; - - // resControl_Prologue -- virtual - pThis->__resControl_Prologue__ = &resControl_Prologue_IMPL; - - // resControl_Epilogue -- virtual - pThis->__resControl_Epilogue__ = &resControl_Epilogue_IMPL; - - // resMap -- virtual - pThis->__resMap__ = &resMap_IMPL; - - // resUnmap -- virtual - pThis->__resUnmap__ = &resUnmap_IMPL; - - // resIsPartialUnmapSupported -- inline virtual body - pThis->__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_bf6dfa; - - // resMapTo -- virtual - pThis->__resMapTo__ = &resMapTo_IMPL; - - // resUnmapFrom -- virtual - pThis->__resUnmapFrom__ = &resUnmapFrom_IMPL; - - // resGetRefCount -- virtual - pThis->__resGetRefCount__ = &resGetRefCount_IMPL; - - // resAccessCallback -- virtual - pThis->__resAccessCallback__ = &resAccessCallback_IMPL; - - // resShareCallback -- virtual - pThis->__resShareCallback__ = &resShareCallback_IMPL; - - // resAddAdditionalDependants -- virtual - pThis->__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL; -} // End __nvoc_init_funcTable_RsResource_1 with approximately 18 basic block(s). +} // End __nvoc_init_funcTable_RsResource_1 // Initialize vtable(s) for 18 virtual method(s). void __nvoc_init_funcTable_RsResource(RsResource *pThis) { - // Initialize vtable(s) with 18 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__RsResource vtable = { + .__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__resControl__ = &resControl_IMPL, // virtual + .__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__resControlSerialization_Prologue__ = &resControlSerialization_Prologue_IMPL, // virtual + .__resControlSerialization_Epilogue__ = &resControlSerialization_Epilogue_IMPL, // virtual + .__resControl_Prologue__ = &resControl_Prologue_IMPL, // virtual + .__resControl_Epilogue__ = &resControl_Epilogue_IMPL, // virtual + .__resMap__ = &resMap_IMPL, // virtual + .__resUnmap__ = &resUnmap_IMPL, // virtual + .__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__resMapTo__ = &resMapTo_IMPL, // virtual + .__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__resAccessCallback__ = &resAccessCallback_IMPL, // virtual + .__resShareCallback__ = &resShareCallback_IMPL, // virtual + .__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_vtable = &vtable; // (res) this __nvoc_init_funcTable_RsResource_1(pThis); } diff --git a/src/nvidia/generated/g_rs_resource_nvoc.h b/src/nvidia/generated/g_rs_resource_nvoc.h index 4b7be6951e..eaba257ffc 100644 --- a/src/nvidia/generated/g_rs_resource_nvoc.h +++ b/src/nvidia/generated/g_rs_resource_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -257,10 +257,15 @@ struct RS_RES_DTOR_PARAMS #endif +// Metadata including vtable +struct NVOC_VTABLE__RsResource; + + struct RsResource { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__RsResource *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; @@ -269,7 +274,16 @@ struct RsResource { struct Object *__nvoc_pbase_Object; // obj super struct RsResource *__nvoc_pbase_RsResource; // res - // Vtable with 18 per-object function pointers + // Data members + RsResourceRef *pResourceRef; + struct RS_RES_DTOR_PARAMS dtorParams; + NvBool bConstructed; +}; + + +// Metadata including vtable with 18 function pointers plus superclass metadata +struct NVOC_VTABLE__RsResource { + NvBool (*__resCanCopy__)(struct RsResource * /*this*/); // virtual NV_STATUS (*__resIsDuplicate__)(struct RsResource * /*this*/, NvHandle, NvBool *); // virtual void (*__resPreDestruct__)(struct RsResource * /*this*/); // virtual @@ -288,11 +302,6 @@ struct RsResource { NvBool (*__resAccessCallback__)(struct RsResource * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual NvBool (*__resShareCallback__)(struct RsResource * /*this*/, struct RsClient *, RsResourceRef *, RS_SHARE_POLICY *); // virtual void (*__resAddAdditionalDependants__)(struct RsClient *, struct RsResource * /*this*/, RsResourceRef *); // virtual - - // Data members - RsResourceRef *pResourceRef; - struct RS_RES_DTOR_PARAMS dtorParams; - NvBool bConstructed; }; #ifndef __NVOC_CLASS_RsResource_TYPEDEF__ @@ -325,114 +334,114 @@ NV_STATUS __nvoc_objCreate_RsResource(RsResource**, Dynamic*, NvU32, struct CALL // Wrapper macros -#define resCanCopy_FNPTR(pResource) pResource->__resCanCopy__ +#define resCanCopy_FNPTR(pResource) pResource->__nvoc_vtable->__resCanCopy__ #define resCanCopy(pResource) resCanCopy_DISPATCH(pResource) -#define resIsDuplicate_FNPTR(pResource) pResource->__resIsDuplicate__ +#define resIsDuplicate_FNPTR(pResource) pResource->__nvoc_vtable->__resIsDuplicate__ #define resIsDuplicate(pResource, hMemory, pDuplicate) resIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define resPreDestruct_FNPTR(pResource) pResource->__resPreDestruct__ +#define resPreDestruct_FNPTR(pResource) pResource->__nvoc_vtable->__resPreDestruct__ #define resPreDestruct(pResource) resPreDestruct_DISPATCH(pResource) -#define resControl_FNPTR(pResource) pResource->__resControl__ +#define resControl_FNPTR(pResource) pResource->__nvoc_vtable->__resControl__ #define resControl(pResource, pCallContext, pParams) resControl_DISPATCH(pResource, pCallContext, pParams) -#define resControlFilter_FNPTR(pResource) pResource->__resControlFilter__ +#define resControlFilter_FNPTR(pResource) pResource->__nvoc_vtable->__resControlFilter__ #define resControlFilter(pResource, pCallContext, pParams) resControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define resControlSerialization_Prologue_FNPTR(pResource) pResource->__resControlSerialization_Prologue__ +#define resControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_vtable->__resControlSerialization_Prologue__ #define resControlSerialization_Prologue(pResource, pCallContext, pParams) resControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define resControlSerialization_Epilogue_FNPTR(pResource) pResource->__resControlSerialization_Epilogue__ +#define resControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_vtable->__resControlSerialization_Epilogue__ #define resControlSerialization_Epilogue(pResource, pCallContext, pParams) resControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define resControl_Prologue_FNPTR(pResource) pResource->__resControl_Prologue__ +#define resControl_Prologue_FNPTR(pResource) pResource->__nvoc_vtable->__resControl_Prologue__ #define resControl_Prologue(pResource, pCallContext, pParams) resControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define resControl_Epilogue_FNPTR(pResource) pResource->__resControl_Epilogue__ +#define resControl_Epilogue_FNPTR(pResource) pResource->__nvoc_vtable->__resControl_Epilogue__ #define resControl_Epilogue(pResource, pCallContext, pParams) resControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define resMap_FNPTR(pResource) pResource->__resMap__ +#define resMap_FNPTR(pResource) pResource->__nvoc_vtable->__resMap__ #define resMap(pResource, pCallContext, pParams, pCpuMapping) resMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define resUnmap_FNPTR(pResource) pResource->__resUnmap__ +#define resUnmap_FNPTR(pResource) pResource->__nvoc_vtable->__resUnmap__ #define resUnmap(pResource, pCallContext, pCpuMapping) resUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define resIsPartialUnmapSupported_FNPTR(pResource) pResource->__resIsPartialUnmapSupported__ +#define resIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_vtable->__resIsPartialUnmapSupported__ #define resIsPartialUnmapSupported(pResource) resIsPartialUnmapSupported_DISPATCH(pResource) -#define resMapTo_FNPTR(pResource) pResource->__resMapTo__ +#define resMapTo_FNPTR(pResource) pResource->__nvoc_vtable->__resMapTo__ #define resMapTo(pResource, pParams) resMapTo_DISPATCH(pResource, pParams) -#define resUnmapFrom_FNPTR(pResource) pResource->__resUnmapFrom__ +#define resUnmapFrom_FNPTR(pResource) pResource->__nvoc_vtable->__resUnmapFrom__ #define resUnmapFrom(pResource, pParams) resUnmapFrom_DISPATCH(pResource, pParams) -#define resGetRefCount_FNPTR(pResource) pResource->__resGetRefCount__ +#define resGetRefCount_FNPTR(pResource) pResource->__nvoc_vtable->__resGetRefCount__ #define resGetRefCount(pResource) resGetRefCount_DISPATCH(pResource) -#define resAccessCallback_FNPTR(pResource) pResource->__resAccessCallback__ +#define resAccessCallback_FNPTR(pResource) pResource->__nvoc_vtable->__resAccessCallback__ #define resAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) resAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define resShareCallback_FNPTR(pResource) pResource->__resShareCallback__ +#define resShareCallback_FNPTR(pResource) pResource->__nvoc_vtable->__resShareCallback__ #define resShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) resShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define resAddAdditionalDependants_FNPTR(pResource) pResource->__resAddAdditionalDependants__ +#define resAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_vtable->__resAddAdditionalDependants__ #define resAddAdditionalDependants(pClient, pResource, pReference) resAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool resCanCopy_DISPATCH(struct RsResource *pResource) { - return pResource->__resCanCopy__(pResource); + return pResource->__nvoc_vtable->__resCanCopy__(pResource); } static inline NV_STATUS resIsDuplicate_DISPATCH(struct RsResource *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__resIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__resIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void resPreDestruct_DISPATCH(struct RsResource *pResource) { - pResource->__resPreDestruct__(pResource); + pResource->__nvoc_vtable->__resPreDestruct__(pResource); } static inline NV_STATUS resControl_DISPATCH(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__resControl__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__resControl__(pResource, pCallContext, pParams); } static inline NV_STATUS resControlFilter_DISPATCH(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__resControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__resControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS resControlSerialization_Prologue_DISPATCH(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__resControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__resControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void resControlSerialization_Epilogue_DISPATCH(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__resControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__resControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS resControl_Prologue_DISPATCH(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__resControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__resControl_Prologue__(pResource, pCallContext, pParams); } static inline void resControl_Epilogue_DISPATCH(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__resControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__resControl_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS resMap_DISPATCH(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__resMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__resMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS resUnmap_DISPATCH(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__resUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__resUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool resIsPartialUnmapSupported_DISPATCH(struct RsResource *pResource) { - return pResource->__resIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__resIsPartialUnmapSupported__(pResource); } static inline NV_STATUS resMapTo_DISPATCH(struct RsResource *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__resMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__resMapTo__(pResource, pParams); } static inline NV_STATUS resUnmapFrom_DISPATCH(struct RsResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__resUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__resUnmapFrom__(pResource, pParams); } static inline NvU32 resGetRefCount_DISPATCH(struct RsResource *pResource) { - return pResource->__resGetRefCount__(pResource); + return pResource->__nvoc_vtable->__resGetRefCount__(pResource); } static inline NvBool resAccessCallback_DISPATCH(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__resAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__resAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool resShareCallback_DISPATCH(struct RsResource *pResource, struct RsClient *pInvokingClient, RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__resShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__resShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline void resAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct RsResource *pResource, RsResourceRef *pReference) { - pResource->__resAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__resAddAdditionalDependants__(pClient, pResource, pReference); } NvBool resCanCopy_IMPL(struct RsResource *pResource); @@ -457,8 +466,8 @@ NV_STATUS resMap_IMPL(struct RsResource *pResource, struct CALL_CONTEXT *pCallCo NV_STATUS resUnmap_IMPL(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); -static inline NvBool resIsPartialUnmapSupported_bf6dfa(struct RsResource *pResource) { - return ((NvBool)(0 != 0)); +static inline NvBool resIsPartialUnmapSupported_d69453(struct RsResource *pResource) { + return NV_FALSE; } NV_STATUS resMapTo_IMPL(struct RsResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); diff --git a/src/nvidia/generated/g_rs_server_nvoc.c b/src/nvidia/generated/g_rs_server_nvoc.c index e279a428f3..4a65f192dc 100644 --- a/src/nvidia/generated/g_rs_server_nvoc.c +++ b/src/nvidia/generated/g_rs_server_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_RsShared = /*pExportInfo=*/ &__nvoc_export_info_RsShared }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_RsShared = { /*numEntries=*/ 0, @@ -237,6 +241,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_RsSession = /*pExportInfo=*/ &__nvoc_export_info_RsSession }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_RsSession = { /*numEntries=*/ 0, @@ -276,19 +284,20 @@ NV_STATUS __nvoc_ctor_RsSession(RsSession *pThis) { // Vtable initialization static void __nvoc_init_funcTable_RsSession_1(RsSession *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // sessionRemoveDependant -- virtual - pThis->__sessionRemoveDependant__ = &sessionRemoveDependant_IMPL; - - // sessionRemoveDependency -- virtual - pThis->__sessionRemoveDependency__ = &sessionRemoveDependency_IMPL; -} // End __nvoc_init_funcTable_RsSession_1 with approximately 2 basic block(s). +} // End __nvoc_init_funcTable_RsSession_1 // Initialize vtable(s) for 2 virtual method(s). void __nvoc_init_funcTable_RsSession(RsSession *pThis) { - // Initialize vtable(s) with 2 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__RsSession vtable = { + .__sessionRemoveDependant__ = &sessionRemoveDependant_IMPL, // virtual + .__sessionRemoveDependency__ = &sessionRemoveDependency_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_vtable = &vtable; // (session) this __nvoc_init_funcTable_RsSession_1(pThis); } diff --git a/src/nvidia/generated/g_rs_server_nvoc.h b/src/nvidia/generated/g_rs_server_nvoc.h index a42645cf9c..48d229e044 100644 --- a/src/nvidia/generated/g_rs_server_nvoc.h +++ b/src/nvidia/generated/g_rs_server_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -70,7 +70,8 @@ struct CLIENT_ENTRY PORT_RWLOCK *pLock; struct RsClient *pClient; NvHandle hClient; - NvU64 lockOwnerTid; ///< Thread id of the lock owner + NvU64 lockOwnerTid; ///< Thread id of the write lock owner + volatile NvU32 lockReadOwnerCnt; NvU32 refCount; NvBool bPendingFree; ListNode node; @@ -174,10 +175,15 @@ MAKE_INTRUSIVE_MAP(RsSharedMap, RsShared, node); #endif +// Metadata including vtable +struct NVOC_VTABLE__RsSession; + + struct RsSession { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__RsSession *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RsShared __nvoc_base_RsShared; @@ -187,10 +193,6 @@ struct RsSession { struct RsShared *__nvoc_pbase_RsShared; // shr super struct RsSession *__nvoc_pbase_RsSession; // session - // Vtable with 2 per-object function pointers - void (*__sessionRemoveDependant__)(struct RsSession * /*this*/, struct RsResourceRef *); // virtual - void (*__sessionRemoveDependency__)(struct RsSession * /*this*/, struct RsResourceRef *); // virtual - // Data members PORT_RWLOCK *pLock; NvBool bValid; @@ -198,6 +200,14 @@ struct RsSession { RsResourceRefList dependants; }; + +// Metadata including vtable with 2 function pointers plus superclass metadata +struct NVOC_VTABLE__RsSession { + + void (*__sessionRemoveDependant__)(struct RsSession * /*this*/, struct RsResourceRef *); // virtual + void (*__sessionRemoveDependency__)(struct RsSession * /*this*/, struct RsResourceRef *); // virtual +}; + #ifndef __NVOC_CLASS_RsSession_TYPEDEF__ #define __NVOC_CLASS_RsSession_TYPEDEF__ typedef struct RsSession RsSession; @@ -228,18 +238,18 @@ NV_STATUS __nvoc_objCreate_RsSession(RsSession**, Dynamic*, NvU32); // Wrapper macros -#define sessionRemoveDependant_FNPTR(pSession) pSession->__sessionRemoveDependant__ +#define sessionRemoveDependant_FNPTR(pSession) pSession->__nvoc_vtable->__sessionRemoveDependant__ #define sessionRemoveDependant(pSession, pResourceRef) sessionRemoveDependant_DISPATCH(pSession, pResourceRef) -#define sessionRemoveDependency_FNPTR(pSession) pSession->__sessionRemoveDependency__ +#define sessionRemoveDependency_FNPTR(pSession) pSession->__nvoc_vtable->__sessionRemoveDependency__ #define sessionRemoveDependency(pSession, pResourceRef) sessionRemoveDependency_DISPATCH(pSession, pResourceRef) // Dispatch functions static inline void sessionRemoveDependant_DISPATCH(struct RsSession *pSession, struct RsResourceRef *pResourceRef) { - pSession->__sessionRemoveDependant__(pSession, pResourceRef); + pSession->__nvoc_vtable->__sessionRemoveDependant__(pSession, pResourceRef); } static inline void sessionRemoveDependency_DISPATCH(struct RsSession *pSession, struct RsResourceRef *pResourceRef) { - pSession->__sessionRemoveDependency__(pSession, pResourceRef); + pSession->__nvoc_vtable->__sessionRemoveDependency__(pSession, pResourceRef); } void sessionRemoveDependant_IMPL(struct RsSession *pSession, struct RsResourceRef *pResourceRef); @@ -988,7 +998,8 @@ extern NV_STATUS serverAllocResourceLookupLockFlags(RsServer *pServer, extern NV_STATUS serverFreeResourceLookupLockFlags(RsServer *pServer, RS_LOCK_ENUM lock, RS_RES_FREE_PARAMS_INTERNAL *pParams, - LOCK_ACCESS_TYPE *pAccess); + LOCK_ACCESS_TYPE *pAccess, + NvBool *pbSupportForceROLock); /** * Lookup locking flags for a resource copy @@ -1364,6 +1375,15 @@ NV_STATUS resservRestoreTlsCallContext(CALL_CONTEXT *pOldCallContext); */ RsResourceRef *resservGetContextRefByType(NvU32 internalClassId, NvBool bSearchAncestors); +/** + * Test if a client handle is currently locked for LOCK_ACCESS_READ or not. + * The caller must hold the client lock in either mode to acquire an accurate + * result. Callers without the client list lock are subject to race conditions. + * + * @param[out] pClientEntry Pointer to the CLIENT_ENTRY + */ +NvBool serverIsClientLockedForRead(CLIENT_ENTRY* pClientEntry); + #ifdef __cplusplus } #endif diff --git a/src/nvidia/generated/g_sdk-structures.h b/src/nvidia/generated/g_sdk-structures.h index d247a9e043..d2720c86bb 100644 --- a/src/nvidia/generated/g_sdk-structures.h +++ b/src/nvidia/generated/g_sdk-structures.h @@ -517,7 +517,33 @@ typedef struct GPU_PARTITION_INFO_v24_05 NvU64 validCTSIdMask NV_ALIGN_BYTES(8); } GPU_PARTITION_INFO_v24_05; -typedef GPU_PARTITION_INFO_v24_05 GPU_PARTITION_INFO_v; +typedef struct GPU_PARTITION_INFO_v28_02 +{ + NvU32 swizzId; + NvU32 grEngCount; + NvU32 veidCount; + NvU32 ceCount; + NvU32 gpcCount; + NvU32 virtualGpcCount; + NvU32 gfxGpcCount; + NvU32 gpcsPerGr[NV2080_CTRL_GPU_MAX_SMC_IDS]; + NvU32 virtualGpcsPerGr[NV2080_CTRL_GPU_MAX_SMC_IDS]; + NvU32 gfxGpcPerGr[NV2080_CTRL_GPU_MAX_SMC_IDS]; + NvU32 veidsPerGr[NV2080_CTRL_GPU_MAX_SMC_IDS]; + NvU32 nvDecCount; + NvU32 nvEncCount; + NvU32 nvJpgCount; + NvU32 partitionFlag; + NvU32 smCount; + NvU32 nvOfaCount; + NvU64 memSize NV_ALIGN_BYTES(8); + NvBool bValid; + NV2080_CTRL_GPU_PARTITION_SPAN_v18_03 span; + NvU64 validCTSIdMask NV_ALIGN_BYTES(8); + NvU64 validGfxCTSIdMask NV_ALIGN_BYTES(8); +} GPU_PARTITION_INFO_v28_02; + +typedef GPU_PARTITION_INFO_v28_02 GPU_PARTITION_INFO_v; typedef struct NV2080_CTRL_CMD_FB_GET_FB_REGION_FB_REGION_INFO_v03_00 { @@ -731,6 +757,13 @@ typedef struct NV2080_CTRL_NVLINK_IS_GPU_DEGRADED_PARAMS_v17_00 typedef NV2080_CTRL_NVLINK_IS_GPU_DEGRADED_PARAMS_v17_00 NV2080_CTRL_NVLINK_IS_GPU_DEGRADED_PARAMS_v; +typedef struct NV2080_CTRL_NVLINK_FATAL_ERROR_RECOVERY_PARAMS_v17_00 +{ + NvBool bRecoverable; +} NV2080_CTRL_NVLINK_FATAL_ERROR_RECOVERY_PARAMS_v17_00; + +typedef NV2080_CTRL_NVLINK_FATAL_ERROR_RECOVERY_PARAMS_v17_00 NV2080_CTRL_NVLINK_FATAL_ERROR_RECOVERY_PARAMS_v; + typedef struct NV_DEVICE_NAME_v13_06 { NvU8 adapterName[NV2080_GPU_MAX_NAME_STRING_LENGTH]; @@ -990,6 +1023,13 @@ typedef struct alloc_object_NVC9FA_VIDEO_OFA_v1F_00 typedef alloc_object_NVC9FA_VIDEO_OFA_v1F_00 alloc_object_NVC9FA_VIDEO_OFA_v; +typedef struct alloc_object_NVB1CC_ALLOC_PARAMETERS_v1A_03 +{ + NvHandle hSubDevice; +} alloc_object_NVB1CC_ALLOC_PARAMETERS_v1A_03; + +typedef alloc_object_NVB1CC_ALLOC_PARAMETERS_v1A_03 alloc_object_NVB1CC_ALLOC_PARAMETERS_v; + typedef struct alloc_object_NVB2CC_ALLOC_PARAMETERS_v1A_03 { NvHandle hClientTarget; @@ -1064,6 +1104,7 @@ typedef union alloc_object_params_v25_08 alloc_object_NVC638_ALLOCATION_PARAMETERS_v18_06 param_NVC638_ALLOCATION_PARAMETERS; alloc_object_NV503C_ALLOC_PARAMETERS_v18_15 param_NV503C_ALLOC_PARAMETERS; alloc_object_NVC670_ALLOCATION_PARAMETERS_v1A_01 param_NVC670_ALLOCATION_PARAMETERS; + alloc_object_NVB1CC_ALLOC_PARAMETERS_v1A_03 param_NVB1CC_ALLOC_PARAMETERS; alloc_object_NVB2CC_ALLOC_PARAMETERS_v1A_03 param_NVB2CC_ALLOC_PARAMETERS; NV_GR_ALLOCATION_PARAMETERS_v1A_17 param_NV_GR_ALLOCATION_PARAMETERS; alloc_object_NV_UVM_CHANNEL_RETAINER_ALLOC_PARAMS_v1A_1B param_NV_UVM_CHANNEL_RETAINER_ALLOC_PARAMS; @@ -1093,6 +1134,7 @@ typedef union alloc_object_params_v26_00 alloc_object_NVC638_ALLOCATION_PARAMETERS_v18_06 param_NVC638_ALLOCATION_PARAMETERS; alloc_object_NV503C_ALLOC_PARAMETERS_v18_15 param_NV503C_ALLOC_PARAMETERS; alloc_object_NVC670_ALLOCATION_PARAMETERS_v1A_01 param_NVC670_ALLOCATION_PARAMETERS; + alloc_object_NVB1CC_ALLOC_PARAMETERS_v1A_03 param_NVB1CC_ALLOC_PARAMETERS; alloc_object_NVB2CC_ALLOC_PARAMETERS_v1A_03 param_NVB2CC_ALLOC_PARAMETERS; NV_GR_ALLOCATION_PARAMETERS_v1A_17 param_NV_GR_ALLOCATION_PARAMETERS; alloc_object_NV_UVM_CHANNEL_RETAINER_ALLOC_PARAMS_v1A_1B param_NV_UVM_CHANNEL_RETAINER_ALLOC_PARAMS; @@ -1123,6 +1165,7 @@ typedef union alloc_object_params_v27_00 alloc_object_NVC638_ALLOCATION_PARAMETERS_v18_06 param_NVC638_ALLOCATION_PARAMETERS; alloc_object_NV503C_ALLOC_PARAMETERS_v18_15 param_NV503C_ALLOC_PARAMETERS; alloc_object_NVC670_ALLOCATION_PARAMETERS_v1A_01 param_NVC670_ALLOCATION_PARAMETERS; + alloc_object_NVB1CC_ALLOC_PARAMETERS_v1A_03 param_NVB1CC_ALLOC_PARAMETERS; alloc_object_NVB2CC_ALLOC_PARAMETERS_v1A_03 param_NVB2CC_ALLOC_PARAMETERS; NV_GR_ALLOCATION_PARAMETERS_v1A_17 param_NV_GR_ALLOCATION_PARAMETERS; alloc_object_NV_UVM_CHANNEL_RETAINER_ALLOC_PARAMS_v1A_1B param_NV_UVM_CHANNEL_RETAINER_ALLOC_PARAMS; @@ -1254,13 +1297,24 @@ typedef struct NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS_v12_01 NvU32 flags; NvHandle hClient; NvHandle hChannel; - NvU64 vMemPtrs[NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_END] NV_ALIGN_BYTES(8); + NvU64 vMemPtrs[NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_END_v03_00] NV_ALIGN_BYTES(8); NvU32 gfxpPreemptMode; NvU32 cilpPreemptMode; NV2080_CTRL_GR_ROUTE_INFO_v12_01 grRouteInfo; } NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS_v12_01; -typedef NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS_v12_01 NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS_v; +typedef struct NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS_v28_07 +{ + NvU32 flags; + NvHandle hClient; + NvHandle hChannel; + NvU64 vMemPtrs[NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_END_v28_07] NV_ALIGN_BYTES(8); + NvU32 gfxpPreemptMode; + NvU32 cilpPreemptMode; + NV2080_CTRL_GR_ROUTE_INFO_v12_01 grRouteInfo; +} NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS_v28_07; + +typedef NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS_v28_07 NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS_v; typedef struct NV2080_CTRL_GR_CTXSW_ZCULL_BIND_PARAMS_v03_00 { @@ -1990,7 +2044,21 @@ typedef struct NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v27_04 NvU32 flags; } NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v27_04; -typedef NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v27_04 NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v; +typedef struct NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v28_01 +{ + NV2080_CTRL_GPU_QUERY_ECC_UNIT_STATUS_v15_01 units[NV2080_CTRL_GPU_ECC_UNIT_COUNT_v28_01]; + NvBool bFatalPoisonError; + NvU32 flags; +} NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v28_01; + +typedef struct NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v28_08 +{ + NV2080_CTRL_GPU_QUERY_ECC_UNIT_STATUS_v15_01 units[NV2080_CTRL_GPU_ECC_UNIT_COUNT_v28_08]; + NvBool bFatalPoisonError; + NvU32 flags; +} NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v28_08; + +typedef NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v28_08 NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v; typedef struct NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v24_06 { @@ -3557,7 +3625,23 @@ typedef struct NV2080_CTRL_INTERNAL_DEVICE_INFO_v27_05 NvU32 deviceBroadcastPriBase; } NV2080_CTRL_INTERNAL_DEVICE_INFO_v27_05; -typedef NV2080_CTRL_INTERNAL_DEVICE_INFO_v27_05 NV2080_CTRL_INTERNAL_DEVICE_INFO_v; +typedef struct NV2080_CTRL_INTERNAL_DEVICE_INFO_v28_04 +{ + NvU32 faultId; + NvU32 instanceId; + NvU32 typeEnum; + NvU32 resetId; + NvU32 devicePriBase; + NvU32 isEngine; + NvU32 rlEngId; + NvU32 runlistPriBase; + NvU32 groupId; + NvU32 ginTargetId; + NvU32 deviceBroadcastPriBase; + NvU32 groupLocalInstanceId; +} NV2080_CTRL_INTERNAL_DEVICE_INFO_v28_04; + +typedef NV2080_CTRL_INTERNAL_DEVICE_INFO_v28_04 NV2080_CTRL_INTERNAL_DEVICE_INFO_v; typedef struct NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS_v25_05 { @@ -3571,7 +3655,13 @@ typedef struct NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS_v27_05 NV2080_CTRL_INTERNAL_DEVICE_INFO_v27_05 deviceInfoTable[NV2080_CTRL_CMD_INTERNAL_DEVICE_INFO_MAX_ENTRIES_V25_05]; } NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS_v27_05; -typedef NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS_v27_05 NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS_v; +typedef struct NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS_v28_04 +{ + NvU32 numEntries; + NV2080_CTRL_INTERNAL_DEVICE_INFO_v28_04 deviceInfoTable[NV2080_CTRL_CMD_INTERNAL_DEVICE_INFO_MAX_ENTRIES_V28_04]; +} NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS_v28_04; + +typedef NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS_v28_04 NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS_v; typedef struct NV2080_CTRL_INTERNAL_MEMSYS_GET_STATIC_CONFIG_PARAMS_v25_06 { diff --git a/src/nvidia/generated/g_sec2_context_nvoc.c b/src/nvidia/generated/g_sec2_context_nvoc.c index 1aa5e2a640..d81635fc5f 100644 --- a/src/nvidia/generated/g_sec2_context_nvoc.c +++ b/src/nvidia/generated/g_sec2_context_nvoc.c @@ -120,165 +120,275 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_Sec2Context = /*pExportInfo=*/ &__nvoc_export_info_Sec2Context }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super^2 +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super^2 +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap(struct RmResource *pChannelDescendant, NvBool bSubdeviceHandleProvided); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^3 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^3 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^3 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super^2 +NV_STATUS __nvoc_up_thunk_GpuResource_chandesControl(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesMap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesUnmap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_GpuResource_chandesShareCallback(struct ChannelDescendant *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize(struct ChannelDescendant *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesInternalControlForward(struct ChannelDescendant *pGpuResource, NvU32 command, void *pParams, NvU32 size); // super +NvHandle __nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle(struct ChannelDescendant *pGpuResource); // super +NvBool __nvoc_up_thunk_RmResource_chandesAccessCallback(struct ChannelDescendant *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemInterMapParams(struct ChannelDescendant *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor(struct ChannelDescendant *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControl_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControl_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesCanCopy(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesIsDuplicate(struct ChannelDescendant *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_chandesPreDestruct(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesControlFilter(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesMapTo(struct ChannelDescendant *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesUnmapFrom(struct ChannelDescendant *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_chandesGetRefCount(struct ChannelDescendant *pResource); // super +void __nvoc_up_thunk_RsResource_chandesAddAdditionalDependants(struct RsClient *pClient, struct ChannelDescendant *pResource, RsResourceRef *pReference); // super +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_chandesGetNotificationListPtr(struct ChannelDescendant *pNotifier); // super +struct NotifShare * __nvoc_up_thunk_Notifier_chandesGetNotificationShare(struct ChannelDescendant *pNotifier); // super +void __nvoc_up_thunk_Notifier_chandesSetNotificationShare(struct ChannelDescendant *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesUnregisterEvent(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_up_thunk_ChannelDescendant_sec2ctxGetSwMethods(struct Sec2Context *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods); // this +NvBool __nvoc_up_thunk_ChannelDescendant_sec2ctxIsSwMethodStalling(struct Sec2Context *pChannelDescendant, NvU32 hHandle); // this +NV_STATUS __nvoc_up_thunk_ChannelDescendant_sec2ctxCheckMemInterUnmap(struct Sec2Context *pChannelDescendant, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxControl(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxMap(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxUnmap(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_sec2ctxShareCallback(struct Sec2Context *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxGetRegBaseOffsetAndSize(struct Sec2Context *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxGetMapAddrSpace(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxInternalControlForward(struct Sec2Context *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_sec2ctxGetInternalObjectHandle(struct Sec2Context *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_sec2ctxAccessCallback(struct Sec2Context *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_sec2ctxGetMemInterMapParams(struct Sec2Context *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_sec2ctxGetMemoryMappingDescriptor(struct Sec2Context *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_sec2ctxControlSerialization_Prologue(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_sec2ctxControlSerialization_Epilogue(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_sec2ctxControl_Prologue(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_sec2ctxControl_Epilogue(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_sec2ctxCanCopy(struct Sec2Context *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_sec2ctxIsDuplicate(struct Sec2Context *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_sec2ctxPreDestruct(struct Sec2Context *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_sec2ctxControlFilter(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_sec2ctxIsPartialUnmapSupported(struct Sec2Context *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_sec2ctxMapTo(struct Sec2Context *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_sec2ctxUnmapFrom(struct Sec2Context *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_sec2ctxGetRefCount(struct Sec2Context *pResource); // this +void __nvoc_up_thunk_RsResource_sec2ctxAddAdditionalDependants(struct RsClient *pClient, struct Sec2Context *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_sec2ctxGetNotificationListPtr(struct Sec2Context *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_sec2ctxGetNotificationShare(struct Sec2Context *pNotifier); // this +void __nvoc_up_thunk_Notifier_sec2ctxSetNotificationShare(struct Sec2Context *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_sec2ctxUnregisterEvent(struct Sec2Context *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_sec2ctxGetOrAllocNotifShare(struct Sec2Context *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 32 up-thunk(s) defined to bridge methods in Sec2Context to superclasses // sec2ctxGetSwMethods: virtual inherited (chandes) base (chandes) -static NV_STATUS __nvoc_up_thunk_ChannelDescendant_sec2ctxGetSwMethods(struct Sec2Context *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { +NV_STATUS __nvoc_up_thunk_ChannelDescendant_sec2ctxGetSwMethods(struct Sec2Context *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { return chandesGetSwMethods((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_Sec2Context_ChannelDescendant.offset), ppMethods, pNumMethods); } // sec2ctxIsSwMethodStalling: virtual inherited (chandes) base (chandes) -static NvBool __nvoc_up_thunk_ChannelDescendant_sec2ctxIsSwMethodStalling(struct Sec2Context *pChannelDescendant, NvU32 hHandle) { +NvBool __nvoc_up_thunk_ChannelDescendant_sec2ctxIsSwMethodStalling(struct Sec2Context *pChannelDescendant, NvU32 hHandle) { return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_Sec2Context_ChannelDescendant.offset), hHandle); } // sec2ctxCheckMemInterUnmap: virtual inherited (chandes) base (chandes) -static NV_STATUS __nvoc_up_thunk_ChannelDescendant_sec2ctxCheckMemInterUnmap(struct Sec2Context *pChannelDescendant, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_ChannelDescendant_sec2ctxCheckMemInterUnmap(struct Sec2Context *pChannelDescendant, NvBool bSubdeviceHandleProvided) { return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_Sec2Context_ChannelDescendant.offset), bSubdeviceHandleProvided); } // sec2ctxControl: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxControl(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxControl(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset), pCallContext, pParams); } // sec2ctxMap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxMap(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxMap(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // sec2ctxUnmap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxUnmap(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxUnmap(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset), pCallContext, pCpuMapping); } // sec2ctxShareCallback: virtual inherited (gpures) base (chandes) -static NvBool __nvoc_up_thunk_GpuResource_sec2ctxShareCallback(struct Sec2Context *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_sec2ctxShareCallback(struct Sec2Context *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // sec2ctxGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxGetRegBaseOffsetAndSize(struct Sec2Context *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxGetRegBaseOffsetAndSize(struct Sec2Context *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset), pGpu, pOffset, pSize); } // sec2ctxGetMapAddrSpace: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxGetMapAddrSpace(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxGetMapAddrSpace(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // sec2ctxInternalControlForward: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxInternalControlForward(struct Sec2Context *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_sec2ctxInternalControlForward(struct Sec2Context *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset), command, pParams, size); } // sec2ctxGetInternalObjectHandle: virtual inherited (gpures) base (chandes) -static NvHandle __nvoc_up_thunk_GpuResource_sec2ctxGetInternalObjectHandle(struct Sec2Context *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_sec2ctxGetInternalObjectHandle(struct Sec2Context *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Sec2Context_GpuResource.offset)); } // sec2ctxAccessCallback: virtual inherited (rmres) base (chandes) -static NvBool __nvoc_up_thunk_RmResource_sec2ctxAccessCallback(struct Sec2Context *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_sec2ctxAccessCallback(struct Sec2Context *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // sec2ctxGetMemInterMapParams: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_sec2ctxGetMemInterMapParams(struct Sec2Context *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_sec2ctxGetMemInterMapParams(struct Sec2Context *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Sec2Context_RmResource.offset), pParams); } // sec2ctxGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_sec2ctxGetMemoryMappingDescriptor(struct Sec2Context *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_sec2ctxGetMemoryMappingDescriptor(struct Sec2Context *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Sec2Context_RmResource.offset), ppMemDesc); } // sec2ctxControlSerialization_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_sec2ctxControlSerialization_Prologue(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_sec2ctxControlSerialization_Prologue(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RmResource.offset), pCallContext, pParams); } // sec2ctxControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_sec2ctxControlSerialization_Epilogue(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_sec2ctxControlSerialization_Epilogue(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RmResource.offset), pCallContext, pParams); } // sec2ctxControl_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_sec2ctxControl_Prologue(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_sec2ctxControl_Prologue(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RmResource.offset), pCallContext, pParams); } // sec2ctxControl_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_sec2ctxControl_Epilogue(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_sec2ctxControl_Epilogue(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RmResource.offset), pCallContext, pParams); } // sec2ctxCanCopy: virtual inherited (res) base (chandes) -static NvBool __nvoc_up_thunk_RsResource_sec2ctxCanCopy(struct Sec2Context *pResource) { +NvBool __nvoc_up_thunk_RsResource_sec2ctxCanCopy(struct Sec2Context *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RsResource.offset)); } // sec2ctxIsDuplicate: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_sec2ctxIsDuplicate(struct Sec2Context *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_sec2ctxIsDuplicate(struct Sec2Context *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RsResource.offset), hMemory, pDuplicate); } // sec2ctxPreDestruct: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_sec2ctxPreDestruct(struct Sec2Context *pResource) { +void __nvoc_up_thunk_RsResource_sec2ctxPreDestruct(struct Sec2Context *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RsResource.offset)); } // sec2ctxControlFilter: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_sec2ctxControlFilter(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_sec2ctxControlFilter(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RsResource.offset), pCallContext, pParams); } // sec2ctxIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body -static NvBool __nvoc_up_thunk_RsResource_sec2ctxIsPartialUnmapSupported(struct Sec2Context *pResource) { +NvBool __nvoc_up_thunk_RsResource_sec2ctxIsPartialUnmapSupported(struct Sec2Context *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RsResource.offset)); } // sec2ctxMapTo: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_sec2ctxMapTo(struct Sec2Context *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_sec2ctxMapTo(struct Sec2Context *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RsResource.offset), pParams); } // sec2ctxUnmapFrom: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_sec2ctxUnmapFrom(struct Sec2Context *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_sec2ctxUnmapFrom(struct Sec2Context *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RsResource.offset), pParams); } // sec2ctxGetRefCount: virtual inherited (res) base (chandes) -static NvU32 __nvoc_up_thunk_RsResource_sec2ctxGetRefCount(struct Sec2Context *pResource) { +NvU32 __nvoc_up_thunk_RsResource_sec2ctxGetRefCount(struct Sec2Context *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RsResource.offset)); } // sec2ctxAddAdditionalDependants: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_sec2ctxAddAdditionalDependants(struct RsClient *pClient, struct Sec2Context *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_sec2ctxAddAdditionalDependants(struct RsClient *pClient, struct Sec2Context *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Sec2Context_RsResource.offset), pReference); } // sec2ctxGetNotificationListPtr: virtual inherited (notify) base (chandes) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_sec2ctxGetNotificationListPtr(struct Sec2Context *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_sec2ctxGetNotificationListPtr(struct Sec2Context *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_Sec2Context_Notifier.offset)); } // sec2ctxGetNotificationShare: virtual inherited (notify) base (chandes) -static struct NotifShare * __nvoc_up_thunk_Notifier_sec2ctxGetNotificationShare(struct Sec2Context *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_sec2ctxGetNotificationShare(struct Sec2Context *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_Sec2Context_Notifier.offset)); } // sec2ctxSetNotificationShare: virtual inherited (notify) base (chandes) -static void __nvoc_up_thunk_Notifier_sec2ctxSetNotificationShare(struct Sec2Context *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_sec2ctxSetNotificationShare(struct Sec2Context *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_Sec2Context_Notifier.offset), pNotifShare); } // sec2ctxUnregisterEvent: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_sec2ctxUnregisterEvent(struct Sec2Context *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_sec2ctxUnregisterEvent(struct Sec2Context *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_Sec2Context_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // sec2ctxGetOrAllocNotifShare: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_sec2ctxGetOrAllocNotifShare(struct Sec2Context *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_sec2ctxGetOrAllocNotifShare(struct Sec2Context *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_Sec2Context_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -332,109 +442,162 @@ static void __nvoc_init_funcTable_Sec2Context_1(Sec2Context *pThis, RmHalspecOwn PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - - // sec2ctxGetSwMethods -- virtual inherited (chandes) base (chandes) - pThis->__sec2ctxGetSwMethods__ = &__nvoc_up_thunk_ChannelDescendant_sec2ctxGetSwMethods; - - // sec2ctxIsSwMethodStalling -- virtual inherited (chandes) base (chandes) - pThis->__sec2ctxIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_sec2ctxIsSwMethodStalling; - - // sec2ctxCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) - pThis->__sec2ctxCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_sec2ctxCheckMemInterUnmap; - - // sec2ctxControl -- virtual inherited (gpures) base (chandes) - pThis->__sec2ctxControl__ = &__nvoc_up_thunk_GpuResource_sec2ctxControl; - - // sec2ctxMap -- virtual inherited (gpures) base (chandes) - pThis->__sec2ctxMap__ = &__nvoc_up_thunk_GpuResource_sec2ctxMap; - - // sec2ctxUnmap -- virtual inherited (gpures) base (chandes) - pThis->__sec2ctxUnmap__ = &__nvoc_up_thunk_GpuResource_sec2ctxUnmap; - - // sec2ctxShareCallback -- virtual inherited (gpures) base (chandes) - pThis->__sec2ctxShareCallback__ = &__nvoc_up_thunk_GpuResource_sec2ctxShareCallback; - - // sec2ctxGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) - pThis->__sec2ctxGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_sec2ctxGetRegBaseOffsetAndSize; - - // sec2ctxGetMapAddrSpace -- virtual inherited (gpures) base (chandes) - pThis->__sec2ctxGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_sec2ctxGetMapAddrSpace; - - // sec2ctxInternalControlForward -- virtual inherited (gpures) base (chandes) - pThis->__sec2ctxInternalControlForward__ = &__nvoc_up_thunk_GpuResource_sec2ctxInternalControlForward; - - // sec2ctxGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) - pThis->__sec2ctxGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_sec2ctxGetInternalObjectHandle; - - // sec2ctxAccessCallback -- virtual inherited (rmres) base (chandes) - pThis->__sec2ctxAccessCallback__ = &__nvoc_up_thunk_RmResource_sec2ctxAccessCallback; - - // sec2ctxGetMemInterMapParams -- virtual inherited (rmres) base (chandes) - pThis->__sec2ctxGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_sec2ctxGetMemInterMapParams; - - // sec2ctxGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) - pThis->__sec2ctxGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_sec2ctxGetMemoryMappingDescriptor; - - // sec2ctxControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__sec2ctxControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_sec2ctxControlSerialization_Prologue; - - // sec2ctxControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__sec2ctxControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_sec2ctxControlSerialization_Epilogue; - - // sec2ctxControl_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__sec2ctxControl_Prologue__ = &__nvoc_up_thunk_RmResource_sec2ctxControl_Prologue; - - // sec2ctxControl_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__sec2ctxControl_Epilogue__ = &__nvoc_up_thunk_RmResource_sec2ctxControl_Epilogue; - - // sec2ctxCanCopy -- virtual inherited (res) base (chandes) - pThis->__sec2ctxCanCopy__ = &__nvoc_up_thunk_RsResource_sec2ctxCanCopy; - - // sec2ctxIsDuplicate -- virtual inherited (res) base (chandes) - pThis->__sec2ctxIsDuplicate__ = &__nvoc_up_thunk_RsResource_sec2ctxIsDuplicate; - - // sec2ctxPreDestruct -- virtual inherited (res) base (chandes) - pThis->__sec2ctxPreDestruct__ = &__nvoc_up_thunk_RsResource_sec2ctxPreDestruct; - - // sec2ctxControlFilter -- virtual inherited (res) base (chandes) - pThis->__sec2ctxControlFilter__ = &__nvoc_up_thunk_RsResource_sec2ctxControlFilter; - - // sec2ctxIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body - pThis->__sec2ctxIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_sec2ctxIsPartialUnmapSupported; - - // sec2ctxMapTo -- virtual inherited (res) base (chandes) - pThis->__sec2ctxMapTo__ = &__nvoc_up_thunk_RsResource_sec2ctxMapTo; - - // sec2ctxUnmapFrom -- virtual inherited (res) base (chandes) - pThis->__sec2ctxUnmapFrom__ = &__nvoc_up_thunk_RsResource_sec2ctxUnmapFrom; - - // sec2ctxGetRefCount -- virtual inherited (res) base (chandes) - pThis->__sec2ctxGetRefCount__ = &__nvoc_up_thunk_RsResource_sec2ctxGetRefCount; - - // sec2ctxAddAdditionalDependants -- virtual inherited (res) base (chandes) - pThis->__sec2ctxAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_sec2ctxAddAdditionalDependants; - - // sec2ctxGetNotificationListPtr -- virtual inherited (notify) base (chandes) - pThis->__sec2ctxGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_sec2ctxGetNotificationListPtr; - - // sec2ctxGetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__sec2ctxGetNotificationShare__ = &__nvoc_up_thunk_Notifier_sec2ctxGetNotificationShare; - - // sec2ctxSetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__sec2ctxSetNotificationShare__ = &__nvoc_up_thunk_Notifier_sec2ctxSetNotificationShare; - - // sec2ctxUnregisterEvent -- virtual inherited (notify) base (chandes) - pThis->__sec2ctxUnregisterEvent__ = &__nvoc_up_thunk_Notifier_sec2ctxUnregisterEvent; - - // sec2ctxGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) - pThis->__sec2ctxGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_sec2ctxGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_Sec2Context_1 with approximately 32 basic block(s). +} // End __nvoc_init_funcTable_Sec2Context_1 // Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_Sec2Context(Sec2Context *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 32 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__Sec2Context vtable = { + .__sec2ctxGetSwMethods__ = &__nvoc_up_thunk_ChannelDescendant_sec2ctxGetSwMethods, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesGetSwMethods__ = &chandesGetSwMethods_IMPL, // virtual + .__sec2ctxIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_sec2ctxIsSwMethodStalling, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesIsSwMethodStalling__ = &chandesIsSwMethodStalling_IMPL, // virtual + .__sec2ctxCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_sec2ctxCheckMemInterUnmap, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesCheckMemInterUnmap__ = &chandesCheckMemInterUnmap_IMPL, // virtual override (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap, // virtual + .__sec2ctxControl__ = &__nvoc_up_thunk_GpuResource_sec2ctxControl, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesControl__ = &__nvoc_up_thunk_GpuResource_chandesControl, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__sec2ctxMap__ = &__nvoc_up_thunk_GpuResource_sec2ctxMap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesMap__ = &__nvoc_up_thunk_GpuResource_chandesMap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__sec2ctxUnmap__ = &__nvoc_up_thunk_GpuResource_sec2ctxUnmap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesUnmap__ = &__nvoc_up_thunk_GpuResource_chandesUnmap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__sec2ctxShareCallback__ = &__nvoc_up_thunk_GpuResource_sec2ctxShareCallback, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesShareCallback__ = &__nvoc_up_thunk_GpuResource_chandesShareCallback, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__sec2ctxGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_sec2ctxGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__sec2ctxGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_sec2ctxGetMapAddrSpace, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__sec2ctxInternalControlForward__ = &__nvoc_up_thunk_GpuResource_sec2ctxInternalControlForward, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesInternalControlForward__ = &__nvoc_up_thunk_GpuResource_chandesInternalControlForward, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__sec2ctxGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_sec2ctxGetInternalObjectHandle, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__sec2ctxAccessCallback__ = &__nvoc_up_thunk_RmResource_sec2ctxAccessCallback, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesAccessCallback__ = &__nvoc_up_thunk_RmResource_chandesAccessCallback, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__sec2ctxGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_sec2ctxGetMemInterMapParams, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_chandesGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__sec2ctxGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_sec2ctxGetMemoryMappingDescriptor, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__sec2ctxControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_sec2ctxControlSerialization_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__sec2ctxControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_sec2ctxControlSerialization_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__sec2ctxControl_Prologue__ = &__nvoc_up_thunk_RmResource_sec2ctxControl_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControl_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__sec2ctxControl_Epilogue__ = &__nvoc_up_thunk_RmResource_sec2ctxControl_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControl_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__sec2ctxCanCopy__ = &__nvoc_up_thunk_RsResource_sec2ctxCanCopy, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesCanCopy__ = &__nvoc_up_thunk_RsResource_chandesCanCopy, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__sec2ctxIsDuplicate__ = &__nvoc_up_thunk_RsResource_sec2ctxIsDuplicate, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesIsDuplicate__ = &__nvoc_up_thunk_RsResource_chandesIsDuplicate, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__sec2ctxPreDestruct__ = &__nvoc_up_thunk_RsResource_sec2ctxPreDestruct, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesPreDestruct__ = &__nvoc_up_thunk_RsResource_chandesPreDestruct, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__sec2ctxControlFilter__ = &__nvoc_up_thunk_RsResource_sec2ctxControlFilter, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesControlFilter__ = &__nvoc_up_thunk_RsResource_chandesControlFilter, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__sec2ctxIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_sec2ctxIsPartialUnmapSupported, // inline virtual inherited (res) base (chandes) body + .ChannelDescendant.__chandesIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .ChannelDescendant.GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .ChannelDescendant.GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__sec2ctxMapTo__ = &__nvoc_up_thunk_RsResource_sec2ctxMapTo, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesMapTo__ = &__nvoc_up_thunk_RsResource_chandesMapTo, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__sec2ctxUnmapFrom__ = &__nvoc_up_thunk_RsResource_sec2ctxUnmapFrom, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesUnmapFrom__ = &__nvoc_up_thunk_RsResource_chandesUnmapFrom, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__sec2ctxGetRefCount__ = &__nvoc_up_thunk_RsResource_sec2ctxGetRefCount, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesGetRefCount__ = &__nvoc_up_thunk_RsResource_chandesGetRefCount, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__sec2ctxAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_sec2ctxAddAdditionalDependants, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_chandesAddAdditionalDependants, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__sec2ctxGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_sec2ctxGetNotificationListPtr, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationListPtr, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__sec2ctxGetNotificationShare__ = &__nvoc_up_thunk_Notifier_sec2ctxGetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__sec2ctxSetNotificationShare__ = &__nvoc_up_thunk_Notifier_sec2ctxSetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesSetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesSetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__sec2ctxUnregisterEvent__ = &__nvoc_up_thunk_Notifier_sec2ctxUnregisterEvent, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesUnregisterEvent__ = &__nvoc_up_thunk_Notifier_chandesUnregisterEvent, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__sec2ctxGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_sec2ctxGetOrAllocNotifShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource.RsResource; // (res) super^4 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource; // (rmres) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource; // (gpures) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier.INotifier; // (inotify) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier; // (notify) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_vtable = &vtable.ChannelDescendant; // (chandes) super + pThis->__nvoc_vtable = &vtable; // (sec2ctx) this __nvoc_init_funcTable_Sec2Context_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_sec2_context_nvoc.h b/src/nvidia/generated/g_sec2_context_nvoc.h index ad4d973b8a..ceba2da1c2 100644 --- a/src/nvidia/generated/g_sec2_context_nvoc.h +++ b/src/nvidia/generated/g_sec2_context_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -61,10 +61,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__Sec2Context; + + struct Sec2Context { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__Sec2Context *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; @@ -79,8 +84,13 @@ struct Sec2Context { struct Notifier *__nvoc_pbase_Notifier; // notify super^2 struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super struct Sec2Context *__nvoc_pbase_Sec2Context; // sec2ctx +}; + + +// Metadata including vtable with 32 function pointers plus superclass metadata +struct NVOC_VTABLE__Sec2Context { + const struct NVOC_VTABLE__ChannelDescendant ChannelDescendant; // (chandes) 32 function pointers - // Vtable with 32 per-object function pointers NV_STATUS (*__sec2ctxGetSwMethods__)(struct Sec2Context * /*this*/, const METHOD **, NvU32 *); // virtual inherited (chandes) base (chandes) NvBool (*__sec2ctxIsSwMethodStalling__)(struct Sec2Context * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) NV_STATUS (*__sec2ctxCheckMemInterUnmap__)(struct Sec2Context * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) @@ -145,198 +155,198 @@ NV_STATUS __nvoc_objCreate_Sec2Context(Sec2Context**, Dynamic*, NvU32, struct CA // Wrapper macros -#define sec2ctxGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ +#define sec2ctxGetSwMethods_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesGetSwMethods__ #define sec2ctxGetSwMethods(pChannelDescendant, ppMethods, pNumMethods) sec2ctxGetSwMethods_DISPATCH(pChannelDescendant, ppMethods, pNumMethods) -#define sec2ctxIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ +#define sec2ctxIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesIsSwMethodStalling__ #define sec2ctxIsSwMethodStalling(pChannelDescendant, hHandle) sec2ctxIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define sec2ctxCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ +#define sec2ctxCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesCheckMemInterUnmap__ #define sec2ctxCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) sec2ctxCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) -#define sec2ctxControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define sec2ctxControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define sec2ctxControl(pGpuResource, pCallContext, pParams) sec2ctxControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define sec2ctxMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define sec2ctxMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define sec2ctxMap(pGpuResource, pCallContext, pParams, pCpuMapping) sec2ctxMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define sec2ctxUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define sec2ctxUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define sec2ctxUnmap(pGpuResource, pCallContext, pCpuMapping) sec2ctxUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define sec2ctxShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ +#define sec2ctxShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define sec2ctxShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) sec2ctxShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define sec2ctxGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define sec2ctxGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define sec2ctxGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) sec2ctxGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define sec2ctxGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define sec2ctxGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define sec2ctxGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) sec2ctxGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define sec2ctxInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define sec2ctxInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define sec2ctxInternalControlForward(pGpuResource, command, pParams, size) sec2ctxInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define sec2ctxGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define sec2ctxGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define sec2ctxGetInternalObjectHandle(pGpuResource) sec2ctxGetInternalObjectHandle_DISPATCH(pGpuResource) -#define sec2ctxAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define sec2ctxAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define sec2ctxAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) sec2ctxAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define sec2ctxGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define sec2ctxGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define sec2ctxGetMemInterMapParams(pRmResource, pParams) sec2ctxGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define sec2ctxGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define sec2ctxGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define sec2ctxGetMemoryMappingDescriptor(pRmResource, ppMemDesc) sec2ctxGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define sec2ctxControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define sec2ctxControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define sec2ctxControlSerialization_Prologue(pResource, pCallContext, pParams) sec2ctxControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define sec2ctxControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define sec2ctxControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define sec2ctxControlSerialization_Epilogue(pResource, pCallContext, pParams) sec2ctxControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define sec2ctxControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define sec2ctxControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define sec2ctxControl_Prologue(pResource, pCallContext, pParams) sec2ctxControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define sec2ctxControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define sec2ctxControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define sec2ctxControl_Epilogue(pResource, pCallContext, pParams) sec2ctxControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define sec2ctxCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define sec2ctxCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define sec2ctxCanCopy(pResource) sec2ctxCanCopy_DISPATCH(pResource) -#define sec2ctxIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define sec2ctxIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define sec2ctxIsDuplicate(pResource, hMemory, pDuplicate) sec2ctxIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define sec2ctxPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define sec2ctxPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define sec2ctxPreDestruct(pResource) sec2ctxPreDestruct_DISPATCH(pResource) -#define sec2ctxControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define sec2ctxControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define sec2ctxControlFilter(pResource, pCallContext, pParams) sec2ctxControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define sec2ctxIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define sec2ctxIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define sec2ctxIsPartialUnmapSupported(pResource) sec2ctxIsPartialUnmapSupported_DISPATCH(pResource) -#define sec2ctxMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define sec2ctxMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define sec2ctxMapTo(pResource, pParams) sec2ctxMapTo_DISPATCH(pResource, pParams) -#define sec2ctxUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define sec2ctxUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define sec2ctxUnmapFrom(pResource, pParams) sec2ctxUnmapFrom_DISPATCH(pResource, pParams) -#define sec2ctxGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define sec2ctxGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define sec2ctxGetRefCount(pResource) sec2ctxGetRefCount_DISPATCH(pResource) -#define sec2ctxAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define sec2ctxAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define sec2ctxAddAdditionalDependants(pClient, pResource, pReference) sec2ctxAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define sec2ctxGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define sec2ctxGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define sec2ctxGetNotificationListPtr(pNotifier) sec2ctxGetNotificationListPtr_DISPATCH(pNotifier) -#define sec2ctxGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define sec2ctxGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define sec2ctxGetNotificationShare(pNotifier) sec2ctxGetNotificationShare_DISPATCH(pNotifier) -#define sec2ctxSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define sec2ctxSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define sec2ctxSetNotificationShare(pNotifier, pNotifShare) sec2ctxSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define sec2ctxUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define sec2ctxUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define sec2ctxUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) sec2ctxUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define sec2ctxGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define sec2ctxGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define sec2ctxGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) sec2ctxGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS sec2ctxGetSwMethods_DISPATCH(struct Sec2Context *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) { - return pChannelDescendant->__sec2ctxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); + return pChannelDescendant->__nvoc_vtable->__sec2ctxGetSwMethods__(pChannelDescendant, ppMethods, pNumMethods); } static inline NvBool sec2ctxIsSwMethodStalling_DISPATCH(struct Sec2Context *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__sec2ctxIsSwMethodStalling__(pChannelDescendant, hHandle); + return pChannelDescendant->__nvoc_vtable->__sec2ctxIsSwMethodStalling__(pChannelDescendant, hHandle); } static inline NV_STATUS sec2ctxCheckMemInterUnmap_DISPATCH(struct Sec2Context *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return pChannelDescendant->__sec2ctxCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); + return pChannelDescendant->__nvoc_vtable->__sec2ctxCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } static inline NV_STATUS sec2ctxControl_DISPATCH(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__sec2ctxControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__sec2ctxControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS sec2ctxMap_DISPATCH(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__sec2ctxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__sec2ctxMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS sec2ctxUnmap_DISPATCH(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__sec2ctxUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__sec2ctxUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool sec2ctxShareCallback_DISPATCH(struct Sec2Context *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__sec2ctxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__sec2ctxShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS sec2ctxGetRegBaseOffsetAndSize_DISPATCH(struct Sec2Context *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__sec2ctxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__sec2ctxGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS sec2ctxGetMapAddrSpace_DISPATCH(struct Sec2Context *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__sec2ctxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__sec2ctxGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS sec2ctxInternalControlForward_DISPATCH(struct Sec2Context *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__sec2ctxInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__sec2ctxInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle sec2ctxGetInternalObjectHandle_DISPATCH(struct Sec2Context *pGpuResource) { - return pGpuResource->__sec2ctxGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__sec2ctxGetInternalObjectHandle__(pGpuResource); } static inline NvBool sec2ctxAccessCallback_DISPATCH(struct Sec2Context *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__sec2ctxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__sec2ctxAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS sec2ctxGetMemInterMapParams_DISPATCH(struct Sec2Context *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__sec2ctxGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__sec2ctxGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS sec2ctxGetMemoryMappingDescriptor_DISPATCH(struct Sec2Context *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__sec2ctxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__sec2ctxGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS sec2ctxControlSerialization_Prologue_DISPATCH(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__sec2ctxControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__sec2ctxControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void sec2ctxControlSerialization_Epilogue_DISPATCH(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__sec2ctxControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__sec2ctxControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS sec2ctxControl_Prologue_DISPATCH(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__sec2ctxControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__sec2ctxControl_Prologue__(pResource, pCallContext, pParams); } static inline void sec2ctxControl_Epilogue_DISPATCH(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__sec2ctxControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__sec2ctxControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool sec2ctxCanCopy_DISPATCH(struct Sec2Context *pResource) { - return pResource->__sec2ctxCanCopy__(pResource); + return pResource->__nvoc_vtable->__sec2ctxCanCopy__(pResource); } static inline NV_STATUS sec2ctxIsDuplicate_DISPATCH(struct Sec2Context *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__sec2ctxIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__sec2ctxIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void sec2ctxPreDestruct_DISPATCH(struct Sec2Context *pResource) { - pResource->__sec2ctxPreDestruct__(pResource); + pResource->__nvoc_vtable->__sec2ctxPreDestruct__(pResource); } static inline NV_STATUS sec2ctxControlFilter_DISPATCH(struct Sec2Context *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__sec2ctxControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__sec2ctxControlFilter__(pResource, pCallContext, pParams); } static inline NvBool sec2ctxIsPartialUnmapSupported_DISPATCH(struct Sec2Context *pResource) { - return pResource->__sec2ctxIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__sec2ctxIsPartialUnmapSupported__(pResource); } static inline NV_STATUS sec2ctxMapTo_DISPATCH(struct Sec2Context *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__sec2ctxMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__sec2ctxMapTo__(pResource, pParams); } static inline NV_STATUS sec2ctxUnmapFrom_DISPATCH(struct Sec2Context *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__sec2ctxUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__sec2ctxUnmapFrom__(pResource, pParams); } static inline NvU32 sec2ctxGetRefCount_DISPATCH(struct Sec2Context *pResource) { - return pResource->__sec2ctxGetRefCount__(pResource); + return pResource->__nvoc_vtable->__sec2ctxGetRefCount__(pResource); } static inline void sec2ctxAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct Sec2Context *pResource, RsResourceRef *pReference) { - pResource->__sec2ctxAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__sec2ctxAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * sec2ctxGetNotificationListPtr_DISPATCH(struct Sec2Context *pNotifier) { - return pNotifier->__sec2ctxGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__sec2ctxGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * sec2ctxGetNotificationShare_DISPATCH(struct Sec2Context *pNotifier) { - return pNotifier->__sec2ctxGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__sec2ctxGetNotificationShare__(pNotifier); } static inline void sec2ctxSetNotificationShare_DISPATCH(struct Sec2Context *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__sec2ctxSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__sec2ctxSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS sec2ctxUnregisterEvent_DISPATCH(struct Sec2Context *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__sec2ctxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__sec2ctxUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS sec2ctxGetOrAllocNotifShare_DISPATCH(struct Sec2Context *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__sec2ctxGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__sec2ctxGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS sec2ctxConstructHal_KERNEL(struct Sec2Context *pSec2Context, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); diff --git a/src/nvidia/generated/g_sec2_utils_nvoc.c b/src/nvidia/generated/g_sec2_utils_nvoc.c index 733f1310da..b8ec019671 100644 --- a/src/nvidia/generated/g_sec2_utils_nvoc.c +++ b/src/nvidia/generated/g_sec2_utils_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_Sec2Utils = /*pExportInfo=*/ &__nvoc_export_info_Sec2Utils }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_Sec2Utils = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_sec2_utils_nvoc.h b/src/nvidia/generated/g_sec2_utils_nvoc.h index 184985ee5c..a4d46966f5 100644 --- a/src/nvidia/generated/g_sec2_utils_nvoc.h +++ b/src/nvidia/generated/g_sec2_utils_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_sem_surf_nvoc.c b/src/nvidia/generated/g_sem_surf_nvoc.c index 31d8716278..6ed5b23e1a 100644 --- a/src/nvidia/generated/g_sem_surf_nvoc.c +++ b/src/nvidia/generated/g_sem_surf_nvoc.c @@ -192,133 +192,201 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Semaphor }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NvBool __nvoc_down_thunk_SemaphoreSurface_resCanCopy(struct RsResource *pSemSurf); // this + // 1 down-thunk(s) defined to bridge methods in SemaphoreSurface from superclasses // semsurfCanCopy: inline virtual override (res) base (gpures) body -static NvBool __nvoc_down_thunk_SemaphoreSurface_resCanCopy(struct RsResource *pSemSurf) { +NvBool __nvoc_down_thunk_SemaphoreSurface_resCanCopy(struct RsResource *pSemSurf) { return semsurfCanCopy((struct SemaphoreSurface *)(((unsigned char *) pSemSurf) - __nvoc_rtti_SemaphoreSurface_RsResource.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_semsurfControl(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_semsurfMap(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_semsurfUnmap(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_semsurfShareCallback(struct SemaphoreSurface *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_semsurfGetRegBaseOffsetAndSize(struct SemaphoreSurface *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_semsurfGetMapAddrSpace(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_semsurfInternalControlForward(struct SemaphoreSurface *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_semsurfGetInternalObjectHandle(struct SemaphoreSurface *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_semsurfAccessCallback(struct SemaphoreSurface *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_semsurfGetMemInterMapParams(struct SemaphoreSurface *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_semsurfCheckMemInterUnmap(struct SemaphoreSurface *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_semsurfGetMemoryMappingDescriptor(struct SemaphoreSurface *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_semsurfControlSerialization_Prologue(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_semsurfControlSerialization_Epilogue(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_semsurfControl_Prologue(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_semsurfControl_Epilogue(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_semsurfIsDuplicate(struct SemaphoreSurface *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_semsurfPreDestruct(struct SemaphoreSurface *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_semsurfControlFilter(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_semsurfIsPartialUnmapSupported(struct SemaphoreSurface *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_semsurfMapTo(struct SemaphoreSurface *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_semsurfUnmapFrom(struct SemaphoreSurface *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_semsurfGetRefCount(struct SemaphoreSurface *pResource); // this +void __nvoc_up_thunk_RsResource_semsurfAddAdditionalDependants(struct RsClient *pClient, struct SemaphoreSurface *pResource, RsResourceRef *pReference); // this + // 24 up-thunk(s) defined to bridge methods in SemaphoreSurface to superclasses // semsurfControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_semsurfControl(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_semsurfControl(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset), pCallContext, pParams); } // semsurfMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_semsurfMap(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_semsurfMap(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // semsurfUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_semsurfUnmap(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_semsurfUnmap(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset), pCallContext, pCpuMapping); } // semsurfShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_semsurfShareCallback(struct SemaphoreSurface *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_semsurfShareCallback(struct SemaphoreSurface *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // semsurfGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_semsurfGetRegBaseOffsetAndSize(struct SemaphoreSurface *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_semsurfGetRegBaseOffsetAndSize(struct SemaphoreSurface *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset), pGpu, pOffset, pSize); } // semsurfGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_semsurfGetMapAddrSpace(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_semsurfGetMapAddrSpace(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // semsurfInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_semsurfInternalControlForward(struct SemaphoreSurface *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_semsurfInternalControlForward(struct SemaphoreSurface *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset), command, pParams, size); } // semsurfGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_semsurfGetInternalObjectHandle(struct SemaphoreSurface *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_semsurfGetInternalObjectHandle(struct SemaphoreSurface *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SemaphoreSurface_GpuResource.offset)); } // semsurfAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_semsurfAccessCallback(struct SemaphoreSurface *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_semsurfAccessCallback(struct SemaphoreSurface *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // semsurfGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_semsurfGetMemInterMapParams(struct SemaphoreSurface *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_semsurfGetMemInterMapParams(struct SemaphoreSurface *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), pParams); } // semsurfCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_semsurfCheckMemInterUnmap(struct SemaphoreSurface *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_semsurfCheckMemInterUnmap(struct SemaphoreSurface *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), bSubdeviceHandleProvided); } // semsurfGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_semsurfGetMemoryMappingDescriptor(struct SemaphoreSurface *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_semsurfGetMemoryMappingDescriptor(struct SemaphoreSurface *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), ppMemDesc); } // semsurfControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_semsurfControlSerialization_Prologue(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_semsurfControlSerialization_Prologue(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), pCallContext, pParams); } // semsurfControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_semsurfControlSerialization_Epilogue(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_semsurfControlSerialization_Epilogue(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), pCallContext, pParams); } // semsurfControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_semsurfControl_Prologue(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_semsurfControl_Prologue(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), pCallContext, pParams); } // semsurfControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_semsurfControl_Epilogue(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_semsurfControl_Epilogue(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RmResource.offset), pCallContext, pParams); } // semsurfIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_semsurfIsDuplicate(struct SemaphoreSurface *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_semsurfIsDuplicate(struct SemaphoreSurface *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset), hMemory, pDuplicate); } // semsurfPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_semsurfPreDestruct(struct SemaphoreSurface *pResource) { +void __nvoc_up_thunk_RsResource_semsurfPreDestruct(struct SemaphoreSurface *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset)); } // semsurfControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_semsurfControlFilter(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_semsurfControlFilter(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset), pCallContext, pParams); } // semsurfIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_semsurfIsPartialUnmapSupported(struct SemaphoreSurface *pResource) { +NvBool __nvoc_up_thunk_RsResource_semsurfIsPartialUnmapSupported(struct SemaphoreSurface *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset)); } // semsurfMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_semsurfMapTo(struct SemaphoreSurface *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_semsurfMapTo(struct SemaphoreSurface *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset), pParams); } // semsurfUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_semsurfUnmapFrom(struct SemaphoreSurface *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_semsurfUnmapFrom(struct SemaphoreSurface *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset), pParams); } // semsurfGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_semsurfGetRefCount(struct SemaphoreSurface *pResource) { +NvU32 __nvoc_up_thunk_RsResource_semsurfGetRefCount(struct SemaphoreSurface *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset)); } // semsurfAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_semsurfAddAdditionalDependants(struct RsClient *pClient, struct SemaphoreSurface *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_semsurfAddAdditionalDependants(struct RsClient *pClient, struct SemaphoreSurface *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SemaphoreSurface_RsResource.offset), pReference); } @@ -363,10 +431,6 @@ NV_STATUS __nvoc_ctor_SemaphoreSurface(SemaphoreSurface *pThis, CALL_CONTEXT * a static void __nvoc_init_funcTable_SemaphoreSurface_1(SemaphoreSurface *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // semsurfCanCopy -- inline virtual override (res) base (gpures) body - pThis->__semsurfCanCopy__ = &semsurfCanCopy_0c883b; - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_SemaphoreSurface_resCanCopy; - // semsurfCtrlCmdRefMemory -- exported (id=0xda0001) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__semsurfCtrlCmdRefMemory__ = &semsurfCtrlCmdRefMemory_IMPL; @@ -396,85 +460,124 @@ static void __nvoc_init_funcTable_SemaphoreSurface_1(SemaphoreSurface *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) pThis->__semsurfCtrlCmdUnregisterWaiter__ = &semsurfCtrlCmdUnregisterWaiter_IMPL; #endif - - // semsurfControl -- virtual inherited (gpures) base (gpures) - pThis->__semsurfControl__ = &__nvoc_up_thunk_GpuResource_semsurfControl; - - // semsurfMap -- virtual inherited (gpures) base (gpures) - pThis->__semsurfMap__ = &__nvoc_up_thunk_GpuResource_semsurfMap; - - // semsurfUnmap -- virtual inherited (gpures) base (gpures) - pThis->__semsurfUnmap__ = &__nvoc_up_thunk_GpuResource_semsurfUnmap; - - // semsurfShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__semsurfShareCallback__ = &__nvoc_up_thunk_GpuResource_semsurfShareCallback; - - // semsurfGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__semsurfGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_semsurfGetRegBaseOffsetAndSize; - - // semsurfGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__semsurfGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_semsurfGetMapAddrSpace; - - // semsurfInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__semsurfInternalControlForward__ = &__nvoc_up_thunk_GpuResource_semsurfInternalControlForward; - - // semsurfGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__semsurfGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_semsurfGetInternalObjectHandle; - - // semsurfAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__semsurfAccessCallback__ = &__nvoc_up_thunk_RmResource_semsurfAccessCallback; - - // semsurfGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__semsurfGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_semsurfGetMemInterMapParams; - - // semsurfCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__semsurfCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_semsurfCheckMemInterUnmap; - - // semsurfGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__semsurfGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_semsurfGetMemoryMappingDescriptor; - - // semsurfControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__semsurfControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_semsurfControlSerialization_Prologue; - - // semsurfControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__semsurfControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_semsurfControlSerialization_Epilogue; - - // semsurfControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__semsurfControl_Prologue__ = &__nvoc_up_thunk_RmResource_semsurfControl_Prologue; - - // semsurfControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__semsurfControl_Epilogue__ = &__nvoc_up_thunk_RmResource_semsurfControl_Epilogue; - - // semsurfIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__semsurfIsDuplicate__ = &__nvoc_up_thunk_RsResource_semsurfIsDuplicate; - - // semsurfPreDestruct -- virtual inherited (res) base (gpures) - pThis->__semsurfPreDestruct__ = &__nvoc_up_thunk_RsResource_semsurfPreDestruct; - - // semsurfControlFilter -- virtual inherited (res) base (gpures) - pThis->__semsurfControlFilter__ = &__nvoc_up_thunk_RsResource_semsurfControlFilter; - - // semsurfIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__semsurfIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_semsurfIsPartialUnmapSupported; - - // semsurfMapTo -- virtual inherited (res) base (gpures) - pThis->__semsurfMapTo__ = &__nvoc_up_thunk_RsResource_semsurfMapTo; - - // semsurfUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__semsurfUnmapFrom__ = &__nvoc_up_thunk_RsResource_semsurfUnmapFrom; - - // semsurfGetRefCount -- virtual inherited (res) base (gpures) - pThis->__semsurfGetRefCount__ = &__nvoc_up_thunk_RsResource_semsurfGetRefCount; - - // semsurfAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__semsurfAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_semsurfAddAdditionalDependants; -} // End __nvoc_init_funcTable_SemaphoreSurface_1 with approximately 32 basic block(s). +} // End __nvoc_init_funcTable_SemaphoreSurface_1 with approximately 6 basic block(s). // Initialize vtable(s) for 31 virtual method(s). void __nvoc_init_funcTable_SemaphoreSurface(SemaphoreSurface *pThis) { - // Initialize vtable(s) with 31 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__SemaphoreSurface vtable = { + .__semsurfCanCopy__ = &semsurfCanCopy_e661f0, // inline virtual override (res) base (gpures) body + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_SemaphoreSurface_resCanCopy, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400009u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif + .__semsurfControl__ = &__nvoc_up_thunk_GpuResource_semsurfControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__semsurfMap__ = &__nvoc_up_thunk_GpuResource_semsurfMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__semsurfUnmap__ = &__nvoc_up_thunk_GpuResource_semsurfUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__semsurfShareCallback__ = &__nvoc_up_thunk_GpuResource_semsurfShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__semsurfGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_semsurfGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__semsurfGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_semsurfGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__semsurfInternalControlForward__ = &__nvoc_up_thunk_GpuResource_semsurfInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__semsurfGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_semsurfGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__semsurfAccessCallback__ = &__nvoc_up_thunk_RmResource_semsurfAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__semsurfGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_semsurfGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__semsurfCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_semsurfCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__semsurfGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_semsurfGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__semsurfControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_semsurfControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__semsurfControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_semsurfControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__semsurfControl_Prologue__ = &__nvoc_up_thunk_RmResource_semsurfControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__semsurfControl_Epilogue__ = &__nvoc_up_thunk_RmResource_semsurfControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__semsurfIsDuplicate__ = &__nvoc_up_thunk_RsResource_semsurfIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__semsurfPreDestruct__ = &__nvoc_up_thunk_RsResource_semsurfPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__semsurfControlFilter__ = &__nvoc_up_thunk_RsResource_semsurfControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__semsurfIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_semsurfIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__semsurfMapTo__ = &__nvoc_up_thunk_RsResource_semsurfMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__semsurfUnmapFrom__ = &__nvoc_up_thunk_RsResource_semsurfUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__semsurfGetRefCount__ = &__nvoc_up_thunk_RsResource_semsurfGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__semsurfAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_semsurfAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (semsurf) this + + // Initialize vtable(s) with 6 per-object function pointer(s). __nvoc_init_funcTable_SemaphoreSurface_1(pThis); } diff --git a/src/nvidia/generated/g_sem_surf_nvoc.h b/src/nvidia/generated/g_sem_surf_nvoc.h index e87672c771..d1a00f0828 100644 --- a/src/nvidia/generated/g_sem_surf_nvoc.h +++ b/src/nvidia/generated/g_sem_surf_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -161,10 +161,15 @@ MAKE_INTRUSIVE_MAP(SEM_CHANNEL_BINDING, #endif +// Metadata including vtable +struct NVOC_VTABLE__SemaphoreSurface; + + struct SemaphoreSurface { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__SemaphoreSurface *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -177,14 +182,25 @@ struct SemaphoreSurface { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct SemaphoreSurface *__nvoc_pbase_SemaphoreSurface; // semsurf - // Vtable with 31 per-object function pointers - NvBool (*__semsurfCanCopy__)(struct SemaphoreSurface * /*this*/); // inline virtual override (res) base (gpures) body + // Vtable with 6 per-object function pointers NV_STATUS (*__semsurfCtrlCmdRefMemory__)(struct SemaphoreSurface * /*this*/, NV_SEMAPHORE_SURFACE_CTRL_REF_MEMORY_PARAMS *); // exported (id=0xda0001) NV_STATUS (*__semsurfCtrlCmdBindChannel__)(struct SemaphoreSurface * /*this*/, NV_SEMAPHORE_SURFACE_CTRL_BIND_CHANNEL_PARAMS *); // exported (id=0xda0002) NV_STATUS (*__semsurfCtrlCmdUnbindChannel__)(struct SemaphoreSurface * /*this*/, NV_SEMAPHORE_SURFACE_CTRL_UNBIND_CHANNEL_PARAMS *); // exported (id=0xda0006) NV_STATUS (*__semsurfCtrlCmdRegisterWaiter__)(struct SemaphoreSurface * /*this*/, NV_SEMAPHORE_SURFACE_CTRL_REGISTER_WAITER_PARAMS *); // exported (id=0xda0003) NV_STATUS (*__semsurfCtrlCmdSetValue__)(struct SemaphoreSurface * /*this*/, NV_SEMAPHORE_SURFACE_CTRL_SET_VALUE_PARAMS *); // exported (id=0xda0004) NV_STATUS (*__semsurfCtrlCmdUnregisterWaiter__)(struct SemaphoreSurface * /*this*/, NV_SEMAPHORE_SURFACE_CTRL_UNREGISTER_WAITER_PARAMS *); // exported (id=0xda0005) + + // Data members + SEM_SHARED_DATA *pShared; + SEM_CHANNEL_BINDING boundChannelMap; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__SemaphoreSurface { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + + NvBool (*__semsurfCanCopy__)(struct SemaphoreSurface * /*this*/); // inline virtual override (res) base (gpures) body NV_STATUS (*__semsurfControl__)(struct SemaphoreSurface * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__semsurfMap__)(struct SemaphoreSurface * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__semsurfUnmap__)(struct SemaphoreSurface * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -209,10 +225,6 @@ struct SemaphoreSurface { NV_STATUS (*__semsurfUnmapFrom__)(struct SemaphoreSurface * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__semsurfGetRefCount__)(struct SemaphoreSurface * /*this*/); // virtual inherited (res) base (gpures) void (*__semsurfAddAdditionalDependants__)(struct RsClient *, struct SemaphoreSurface * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - SEM_SHARED_DATA *pShared; - SEM_CHANNEL_BINDING boundChannelMap; }; #ifndef __NVOC_CLASS_SemaphoreSurface_TYPEDEF__ @@ -245,7 +257,7 @@ NV_STATUS __nvoc_objCreate_SemaphoreSurface(SemaphoreSurface**, Dynamic*, NvU32, // Wrapper macros -#define semsurfCanCopy_FNPTR(pSemSurf) pSemSurf->__semsurfCanCopy__ +#define semsurfCanCopy_FNPTR(pSemSurf) pSemSurf->__nvoc_vtable->__semsurfCanCopy__ #define semsurfCanCopy(pSemSurf) semsurfCanCopy_DISPATCH(pSemSurf) #define semsurfCtrlCmdRefMemory_FNPTR(pSemaphoreSurf) pSemaphoreSurf->__semsurfCtrlCmdRefMemory__ #define semsurfCtrlCmdRefMemory(pSemaphoreSurf, pParams) semsurfCtrlCmdRefMemory_DISPATCH(pSemaphoreSurf, pParams) @@ -259,58 +271,58 @@ NV_STATUS __nvoc_objCreate_SemaphoreSurface(SemaphoreSurface**, Dynamic*, NvU32, #define semsurfCtrlCmdSetValue(pSemaphoreSurf, pParams) semsurfCtrlCmdSetValue_DISPATCH(pSemaphoreSurf, pParams) #define semsurfCtrlCmdUnregisterWaiter_FNPTR(pSemaphoreSurf) pSemaphoreSurf->__semsurfCtrlCmdUnregisterWaiter__ #define semsurfCtrlCmdUnregisterWaiter(pSemaphoreSurf, pParams) semsurfCtrlCmdUnregisterWaiter_DISPATCH(pSemaphoreSurf, pParams) -#define semsurfControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define semsurfControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define semsurfControl(pGpuResource, pCallContext, pParams) semsurfControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define semsurfMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define semsurfMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define semsurfMap(pGpuResource, pCallContext, pParams, pCpuMapping) semsurfMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define semsurfUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define semsurfUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define semsurfUnmap(pGpuResource, pCallContext, pCpuMapping) semsurfUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define semsurfShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define semsurfShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define semsurfShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) semsurfShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define semsurfGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define semsurfGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define semsurfGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) semsurfGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define semsurfGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define semsurfGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define semsurfGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) semsurfGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define semsurfInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define semsurfInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define semsurfInternalControlForward(pGpuResource, command, pParams, size) semsurfInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define semsurfGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define semsurfGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define semsurfGetInternalObjectHandle(pGpuResource) semsurfGetInternalObjectHandle_DISPATCH(pGpuResource) -#define semsurfAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define semsurfAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define semsurfAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) semsurfAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define semsurfGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define semsurfGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define semsurfGetMemInterMapParams(pRmResource, pParams) semsurfGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define semsurfCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define semsurfCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define semsurfCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) semsurfCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define semsurfGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define semsurfGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define semsurfGetMemoryMappingDescriptor(pRmResource, ppMemDesc) semsurfGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define semsurfControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define semsurfControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define semsurfControlSerialization_Prologue(pResource, pCallContext, pParams) semsurfControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define semsurfControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define semsurfControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define semsurfControlSerialization_Epilogue(pResource, pCallContext, pParams) semsurfControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define semsurfControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define semsurfControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define semsurfControl_Prologue(pResource, pCallContext, pParams) semsurfControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define semsurfControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define semsurfControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define semsurfControl_Epilogue(pResource, pCallContext, pParams) semsurfControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define semsurfIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define semsurfIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define semsurfIsDuplicate(pResource, hMemory, pDuplicate) semsurfIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define semsurfPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define semsurfPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define semsurfPreDestruct(pResource) semsurfPreDestruct_DISPATCH(pResource) -#define semsurfControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define semsurfControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define semsurfControlFilter(pResource, pCallContext, pParams) semsurfControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define semsurfIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define semsurfIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define semsurfIsPartialUnmapSupported(pResource) semsurfIsPartialUnmapSupported_DISPATCH(pResource) -#define semsurfMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define semsurfMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define semsurfMapTo(pResource, pParams) semsurfMapTo_DISPATCH(pResource, pParams) -#define semsurfUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define semsurfUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define semsurfUnmapFrom(pResource, pParams) semsurfUnmapFrom_DISPATCH(pResource, pParams) -#define semsurfGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define semsurfGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define semsurfGetRefCount(pResource) semsurfGetRefCount_DISPATCH(pResource) -#define semsurfAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define semsurfAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define semsurfAddAdditionalDependants(pClient, pResource, pReference) semsurfAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool semsurfCanCopy_DISPATCH(struct SemaphoreSurface *pSemSurf) { - return pSemSurf->__semsurfCanCopy__(pSemSurf); + return pSemSurf->__nvoc_vtable->__semsurfCanCopy__(pSemSurf); } static inline NV_STATUS semsurfCtrlCmdRefMemory_DISPATCH(struct SemaphoreSurface *pSemaphoreSurf, NV_SEMAPHORE_SURFACE_CTRL_REF_MEMORY_PARAMS *pParams) { @@ -338,103 +350,103 @@ static inline NV_STATUS semsurfCtrlCmdUnregisterWaiter_DISPATCH(struct Semaphore } static inline NV_STATUS semsurfControl_DISPATCH(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__semsurfControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__semsurfControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS semsurfMap_DISPATCH(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__semsurfMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__semsurfMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS semsurfUnmap_DISPATCH(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__semsurfUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__semsurfUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool semsurfShareCallback_DISPATCH(struct SemaphoreSurface *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__semsurfShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__semsurfShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS semsurfGetRegBaseOffsetAndSize_DISPATCH(struct SemaphoreSurface *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__semsurfGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__semsurfGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS semsurfGetMapAddrSpace_DISPATCH(struct SemaphoreSurface *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__semsurfGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__semsurfGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS semsurfInternalControlForward_DISPATCH(struct SemaphoreSurface *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__semsurfInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__semsurfInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle semsurfGetInternalObjectHandle_DISPATCH(struct SemaphoreSurface *pGpuResource) { - return pGpuResource->__semsurfGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__semsurfGetInternalObjectHandle__(pGpuResource); } static inline NvBool semsurfAccessCallback_DISPATCH(struct SemaphoreSurface *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__semsurfAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__semsurfAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS semsurfGetMemInterMapParams_DISPATCH(struct SemaphoreSurface *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__semsurfGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__semsurfGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS semsurfCheckMemInterUnmap_DISPATCH(struct SemaphoreSurface *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__semsurfCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__semsurfCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS semsurfGetMemoryMappingDescriptor_DISPATCH(struct SemaphoreSurface *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__semsurfGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__semsurfGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS semsurfControlSerialization_Prologue_DISPATCH(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__semsurfControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__semsurfControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void semsurfControlSerialization_Epilogue_DISPATCH(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__semsurfControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__semsurfControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS semsurfControl_Prologue_DISPATCH(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__semsurfControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__semsurfControl_Prologue__(pResource, pCallContext, pParams); } static inline void semsurfControl_Epilogue_DISPATCH(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__semsurfControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__semsurfControl_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS semsurfIsDuplicate_DISPATCH(struct SemaphoreSurface *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__semsurfIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__semsurfIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void semsurfPreDestruct_DISPATCH(struct SemaphoreSurface *pResource) { - pResource->__semsurfPreDestruct__(pResource); + pResource->__nvoc_vtable->__semsurfPreDestruct__(pResource); } static inline NV_STATUS semsurfControlFilter_DISPATCH(struct SemaphoreSurface *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__semsurfControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__semsurfControlFilter__(pResource, pCallContext, pParams); } static inline NvBool semsurfIsPartialUnmapSupported_DISPATCH(struct SemaphoreSurface *pResource) { - return pResource->__semsurfIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__semsurfIsPartialUnmapSupported__(pResource); } static inline NV_STATUS semsurfMapTo_DISPATCH(struct SemaphoreSurface *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__semsurfMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__semsurfMapTo__(pResource, pParams); } static inline NV_STATUS semsurfUnmapFrom_DISPATCH(struct SemaphoreSurface *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__semsurfUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__semsurfUnmapFrom__(pResource, pParams); } static inline NvU32 semsurfGetRefCount_DISPATCH(struct SemaphoreSurface *pResource) { - return pResource->__semsurfGetRefCount__(pResource); + return pResource->__nvoc_vtable->__semsurfGetRefCount__(pResource); } static inline void semsurfAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct SemaphoreSurface *pResource, RsResourceRef *pReference) { - pResource->__semsurfAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__semsurfAddAdditionalDependants__(pClient, pResource, pReference); } -static inline NvBool semsurfCanCopy_0c883b(struct SemaphoreSurface *pSemSurf) { - return ((NvBool)(0 == 0)); +static inline NvBool semsurfCanCopy_e661f0(struct SemaphoreSurface *pSemSurf) { + return NV_TRUE; } NV_STATUS semsurfCtrlCmdRefMemory_IMPL(struct SemaphoreSurface *pSemaphoreSurf, NV_SEMAPHORE_SURFACE_CTRL_REF_MEMORY_PARAMS *pParams); diff --git a/src/nvidia/generated/g_spdm_nvoc.c b/src/nvidia/generated/g_spdm_nvoc.c index 2b7e6ce293..4a8fbc81b1 100644 --- a/src/nvidia/generated/g_spdm_nvoc.c +++ b/src/nvidia/generated/g_spdm_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_Spdm = /*pExportInfo=*/ &__nvoc_export_info_Spdm }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_Spdm = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_spdm_nvoc.h b/src/nvidia/generated/g_spdm_nvoc.h index 837882236e..c008daa47d 100644 --- a/src/nvidia/generated/g_spdm_nvoc.h +++ b/src/nvidia/generated/g_spdm_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -123,6 +123,8 @@ struct Spdm { void *pDeviceIOContext; void *pMsgLog; size_t msgLogMaxSize; + void *pTranscriptLog; + NvU32 transcriptLogSize; NvBool bExportSecretCleared; NvU32 sessionMsgCount; struct TMR_EVENT *pHeartbeatEvent; @@ -333,6 +335,20 @@ static inline NV_STATUS spdmRetrieveExportSecret(OBJGPU *pGpu, struct Spdm *pSpd #define spdmRetrieveExportSecret_HAL(pGpu, pSpdm, keySize, pKeyOut) spdmRetrieveExportSecret(pGpu, pSpdm, keySize, pKeyOut) +NV_STATUS spdmSendApplicationMessage_IMPL(OBJGPU *pGpu, struct Spdm *pSpdm, NvU8 *pRequest, NvU32 requestSize, NvU8 *pResponse, NvU32 *pResponseSize); + + +#ifdef __nvoc_spdm_h_disabled +static inline NV_STATUS spdmSendApplicationMessage(OBJGPU *pGpu, struct Spdm *pSpdm, NvU8 *pRequest, NvU32 requestSize, NvU8 *pResponse, NvU32 *pResponseSize) { + NV_ASSERT_FAILED_PRECOMP("Spdm was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else //__nvoc_spdm_h_disabled +#define spdmSendApplicationMessage(pGpu, pSpdm, pRequest, requestSize, pResponse, pResponseSize) spdmSendApplicationMessage_IMPL(pGpu, pSpdm, pRequest, requestSize, pResponse, pResponseSize) +#endif //__nvoc_spdm_h_disabled + +#define spdmSendApplicationMessage_HAL(pGpu, pSpdm, pRequest, requestSize, pResponse, pResponseSize) spdmSendApplicationMessage(pGpu, pSpdm, pRequest, requestSize, pResponse, pResponseSize) + NV_STATUS spdmGetCertChains_GH100(OBJGPU *pGpu, struct Spdm *pSpdm, void *pKeyExCertChain, NvU32 *pKeyExCertChainSize, void *pAttestationCertChain, NvU32 *pAttestationCertChainSize); static inline NV_STATUS spdmGetCertChains_46f6a7(OBJGPU *pGpu, struct Spdm *pSpdm, void *pKeyExCertChain, NvU32 *pKeyExCertChainSize, void *pAttestationCertChain, NvU32 *pAttestationCertChainSize) { diff --git a/src/nvidia/generated/g_standard_mem_nvoc.c b/src/nvidia/generated/g_standard_mem_nvoc.c index 1fc6b7796b..e4ce808187 100644 --- a/src/nvidia/generated/g_standard_mem_nvoc.c +++ b/src/nvidia/generated/g_standard_mem_nvoc.c @@ -93,138 +93,207 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_StandardMemory = /*pExportInfo=*/ &__nvoc_export_info_StandardMemory }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super +NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super +NvBool __nvoc_down_thunk_StandardMemory_resCanCopy(struct RsResource *pStandardMemory); // this + // 1 down-thunk(s) defined to bridge methods in StandardMemory from superclasses // stdmemCanCopy: virtual override (res) base (mem) -static NvBool __nvoc_down_thunk_StandardMemory_resCanCopy(struct RsResource *pStandardMemory) { +NvBool __nvoc_down_thunk_StandardMemory_resCanCopy(struct RsResource *pStandardMemory) { return stdmemCanCopy((struct StandardMemory *)(((unsigned char *) pStandardMemory) - __nvoc_rtti_StandardMemory_RsResource.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemIsDuplicate(struct StandardMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate); // this +NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMapAddrSpace(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_Memory_stdmemControl(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_stdmemMap(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_stdmemUnmap(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMemInterMapParams(struct StandardMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_stdmemCheckMemInterUnmap(struct StandardMemory *pMemory, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMemoryMappingDescriptor(struct StandardMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_Memory_stdmemCheckCopyPermissions(struct StandardMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // this +NV_STATUS __nvoc_up_thunk_Memory_stdmemIsReady(struct StandardMemory *pMemory, NvBool bCopyConstructorContext); // this +NvBool __nvoc_up_thunk_Memory_stdmemIsGpuMapAllowed(struct StandardMemory *pMemory, struct OBJGPU *pGpu); // this +NvBool __nvoc_up_thunk_Memory_stdmemIsExportAllowed(struct StandardMemory *pMemory); // this +NvBool __nvoc_up_thunk_RmResource_stdmemAccessCallback(struct StandardMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_stdmemShareCallback(struct StandardMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_stdmemControlSerialization_Prologue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_stdmemControlSerialization_Epilogue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_stdmemControl_Prologue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_stdmemControl_Epilogue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RsResource_stdmemPreDestruct(struct StandardMemory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_stdmemControlFilter(struct StandardMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_stdmemIsPartialUnmapSupported(struct StandardMemory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_stdmemMapTo(struct StandardMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_stdmemUnmapFrom(struct StandardMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_stdmemGetRefCount(struct StandardMemory *pResource); // this +void __nvoc_up_thunk_RsResource_stdmemAddAdditionalDependants(struct RsClient *pClient, struct StandardMemory *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in StandardMemory to superclasses // stdmemIsDuplicate: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_stdmemIsDuplicate(struct StandardMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_Memory_stdmemIsDuplicate(struct StandardMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), hMemory, pDuplicate); } // stdmemGetMapAddrSpace: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMapAddrSpace(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMapAddrSpace(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); } // stdmemControl: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_stdmemControl(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_stdmemControl(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), pCallContext, pParams); } // stdmemMap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_stdmemMap(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_stdmemMap(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), pCallContext, pParams, pCpuMapping); } // stdmemUnmap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_stdmemUnmap(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_stdmemUnmap(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), pCallContext, pCpuMapping); } // stdmemGetMemInterMapParams: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMemInterMapParams(struct StandardMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMemInterMapParams(struct StandardMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), pParams); } // stdmemCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_stdmemCheckMemInterUnmap(struct StandardMemory *pMemory, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_Memory_stdmemCheckMemInterUnmap(struct StandardMemory *pMemory, NvBool bSubdeviceHandleProvided) { return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), bSubdeviceHandleProvided); } // stdmemGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMemoryMappingDescriptor(struct StandardMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMemoryMappingDescriptor(struct StandardMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), ppMemDesc); } // stdmemCheckCopyPermissions: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_stdmemCheckCopyPermissions(struct StandardMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { +NV_STATUS __nvoc_up_thunk_Memory_stdmemCheckCopyPermissions(struct StandardMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), pDstGpu, pDstDevice); } // stdmemIsReady: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_stdmemIsReady(struct StandardMemory *pMemory, NvBool bCopyConstructorContext) { +NV_STATUS __nvoc_up_thunk_Memory_stdmemIsReady(struct StandardMemory *pMemory, NvBool bCopyConstructorContext) { return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), bCopyConstructorContext); } // stdmemIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_stdmemIsGpuMapAllowed(struct StandardMemory *pMemory, struct OBJGPU *pGpu) { +NvBool __nvoc_up_thunk_Memory_stdmemIsGpuMapAllowed(struct StandardMemory *pMemory, struct OBJGPU *pGpu) { return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset), pGpu); } // stdmemIsExportAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_stdmemIsExportAllowed(struct StandardMemory *pMemory) { +NvBool __nvoc_up_thunk_Memory_stdmemIsExportAllowed(struct StandardMemory *pMemory) { return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_StandardMemory_Memory.offset)); } // stdmemAccessCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_stdmemAccessCallback(struct StandardMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_stdmemAccessCallback(struct StandardMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // stdmemShareCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_stdmemShareCallback(struct StandardMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_stdmemShareCallback(struct StandardMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // stdmemControlSerialization_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_stdmemControlSerialization_Prologue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_stdmemControlSerialization_Prologue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RmResource.offset), pCallContext, pParams); } // stdmemControlSerialization_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_stdmemControlSerialization_Epilogue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_stdmemControlSerialization_Epilogue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RmResource.offset), pCallContext, pParams); } // stdmemControl_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_stdmemControl_Prologue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_stdmemControl_Prologue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RmResource.offset), pCallContext, pParams); } // stdmemControl_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_stdmemControl_Epilogue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_stdmemControl_Epilogue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RmResource.offset), pCallContext, pParams); } // stdmemPreDestruct: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_stdmemPreDestruct(struct StandardMemory *pResource) { +void __nvoc_up_thunk_RsResource_stdmemPreDestruct(struct StandardMemory *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RsResource.offset)); } // stdmemControlFilter: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_stdmemControlFilter(struct StandardMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_stdmemControlFilter(struct StandardMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RsResource.offset), pCallContext, pParams); } // stdmemIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body -static NvBool __nvoc_up_thunk_RsResource_stdmemIsPartialUnmapSupported(struct StandardMemory *pResource) { +NvBool __nvoc_up_thunk_RsResource_stdmemIsPartialUnmapSupported(struct StandardMemory *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RsResource.offset)); } // stdmemMapTo: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_stdmemMapTo(struct StandardMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_stdmemMapTo(struct StandardMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RsResource.offset), pParams); } // stdmemUnmapFrom: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_stdmemUnmapFrom(struct StandardMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_stdmemUnmapFrom(struct StandardMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RsResource.offset), pParams); } // stdmemGetRefCount: virtual inherited (res) base (mem) -static NvU32 __nvoc_up_thunk_RsResource_stdmemGetRefCount(struct StandardMemory *pResource) { +NvU32 __nvoc_up_thunk_RsResource_stdmemGetRefCount(struct StandardMemory *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RsResource.offset)); } // stdmemAddAdditionalDependants: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_stdmemAddAdditionalDependants(struct RsClient *pClient, struct StandardMemory *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_stdmemAddAdditionalDependants(struct RsClient *pClient, struct StandardMemory *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_StandardMemory_RsResource.offset), pReference); } @@ -267,92 +336,112 @@ NV_STATUS __nvoc_ctor_StandardMemory(StandardMemory *pThis, CALL_CONTEXT * arg_p // Vtable initialization static void __nvoc_init_funcTable_StandardMemory_1(StandardMemory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // stdmemCanCopy -- virtual override (res) base (mem) - pThis->__stdmemCanCopy__ = &stdmemCanCopy_IMPL; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_StandardMemory_resCanCopy; - - // stdmemIsDuplicate -- virtual inherited (mem) base (mem) - pThis->__stdmemIsDuplicate__ = &__nvoc_up_thunk_Memory_stdmemIsDuplicate; - - // stdmemGetMapAddrSpace -- virtual inherited (mem) base (mem) - pThis->__stdmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_stdmemGetMapAddrSpace; - - // stdmemControl -- virtual inherited (mem) base (mem) - pThis->__stdmemControl__ = &__nvoc_up_thunk_Memory_stdmemControl; - - // stdmemMap -- virtual inherited (mem) base (mem) - pThis->__stdmemMap__ = &__nvoc_up_thunk_Memory_stdmemMap; - - // stdmemUnmap -- virtual inherited (mem) base (mem) - pThis->__stdmemUnmap__ = &__nvoc_up_thunk_Memory_stdmemUnmap; - - // stdmemGetMemInterMapParams -- virtual inherited (mem) base (mem) - pThis->__stdmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_stdmemGetMemInterMapParams; - - // stdmemCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body - pThis->__stdmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_stdmemCheckMemInterUnmap; - - // stdmemGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) - pThis->__stdmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_stdmemGetMemoryMappingDescriptor; - - // stdmemCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body - pThis->__stdmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_stdmemCheckCopyPermissions; - - // stdmemIsReady -- virtual inherited (mem) base (mem) - pThis->__stdmemIsReady__ = &__nvoc_up_thunk_Memory_stdmemIsReady; - - // stdmemIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__stdmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_stdmemIsGpuMapAllowed; - - // stdmemIsExportAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__stdmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_stdmemIsExportAllowed; - - // stdmemAccessCallback -- virtual inherited (rmres) base (mem) - pThis->__stdmemAccessCallback__ = &__nvoc_up_thunk_RmResource_stdmemAccessCallback; - - // stdmemShareCallback -- virtual inherited (rmres) base (mem) - pThis->__stdmemShareCallback__ = &__nvoc_up_thunk_RmResource_stdmemShareCallback; - - // stdmemControlSerialization_Prologue -- virtual inherited (rmres) base (mem) - pThis->__stdmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_stdmemControlSerialization_Prologue; - - // stdmemControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__stdmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_stdmemControlSerialization_Epilogue; - - // stdmemControl_Prologue -- virtual inherited (rmres) base (mem) - pThis->__stdmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_stdmemControl_Prologue; - - // stdmemControl_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__stdmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_stdmemControl_Epilogue; - - // stdmemPreDestruct -- virtual inherited (res) base (mem) - pThis->__stdmemPreDestruct__ = &__nvoc_up_thunk_RsResource_stdmemPreDestruct; - - // stdmemControlFilter -- virtual inherited (res) base (mem) - pThis->__stdmemControlFilter__ = &__nvoc_up_thunk_RsResource_stdmemControlFilter; - - // stdmemIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body - pThis->__stdmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_stdmemIsPartialUnmapSupported; - - // stdmemMapTo -- virtual inherited (res) base (mem) - pThis->__stdmemMapTo__ = &__nvoc_up_thunk_RsResource_stdmemMapTo; - - // stdmemUnmapFrom -- virtual inherited (res) base (mem) - pThis->__stdmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_stdmemUnmapFrom; - - // stdmemGetRefCount -- virtual inherited (res) base (mem) - pThis->__stdmemGetRefCount__ = &__nvoc_up_thunk_RsResource_stdmemGetRefCount; - - // stdmemAddAdditionalDependants -- virtual inherited (res) base (mem) - pThis->__stdmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_stdmemAddAdditionalDependants; -} // End __nvoc_init_funcTable_StandardMemory_1 with approximately 27 basic block(s). +} // End __nvoc_init_funcTable_StandardMemory_1 // Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_StandardMemory(StandardMemory *pThis) { - // Initialize vtable(s) with 26 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__StandardMemory vtable = { + .__stdmemCanCopy__ = &stdmemCanCopy_IMPL, // virtual override (res) base (mem) + .Memory.__memCanCopy__ = &__nvoc_up_thunk_RsResource_memCanCopy, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_StandardMemory_resCanCopy, // virtual + .__stdmemIsDuplicate__ = &__nvoc_up_thunk_Memory_stdmemIsDuplicate, // virtual inherited (mem) base (mem) + .Memory.__memIsDuplicate__ = &memIsDuplicate_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resIsDuplicate__ = &__nvoc_down_thunk_Memory_resIsDuplicate, // virtual + .__stdmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_stdmemGetMapAddrSpace, // virtual inherited (mem) base (mem) + .Memory.__memGetMapAddrSpace__ = &memGetMapAddrSpace_IMPL, // virtual + .__stdmemControl__ = &__nvoc_up_thunk_Memory_stdmemControl, // virtual inherited (mem) base (mem) + .Memory.__memControl__ = &memControl_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_Memory_resControl, // virtual + .__stdmemMap__ = &__nvoc_up_thunk_Memory_stdmemMap, // virtual inherited (mem) base (mem) + .Memory.__memMap__ = &memMap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_Memory_resMap, // virtual + .__stdmemUnmap__ = &__nvoc_up_thunk_Memory_stdmemUnmap, // virtual inherited (mem) base (mem) + .Memory.__memUnmap__ = &memUnmap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_Memory_resUnmap, // virtual + .__stdmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_stdmemGetMemInterMapParams, // virtual inherited (mem) base (mem) + .Memory.__memGetMemInterMapParams__ = &memGetMemInterMapParams_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_Memory_rmresGetMemInterMapParams, // virtual + .__stdmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_stdmemCheckMemInterUnmap, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckMemInterUnmap__ = &memCheckMemInterUnmap_ac1694, // inline virtual override (rmres) base (rmres) body + .Memory.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_Memory_rmresCheckMemInterUnmap, // virtual + .__stdmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_stdmemGetMemoryMappingDescriptor, // virtual inherited (mem) base (mem) + .Memory.__memGetMemoryMappingDescriptor__ = &memGetMemoryMappingDescriptor_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor, // virtual + .__stdmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_stdmemCheckCopyPermissions, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckCopyPermissions__ = &memCheckCopyPermissions_ac1694, // inline virtual body + .__stdmemIsReady__ = &__nvoc_up_thunk_Memory_stdmemIsReady, // virtual inherited (mem) base (mem) + .Memory.__memIsReady__ = &memIsReady_IMPL, // virtual + .__stdmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_stdmemIsGpuMapAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsGpuMapAllowed__ = &memIsGpuMapAllowed_e661f0, // inline virtual body + .__stdmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_stdmemIsExportAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsExportAllowed__ = &memIsExportAllowed_e661f0, // inline virtual body + .__stdmemAccessCallback__ = &__nvoc_up_thunk_RmResource_stdmemAccessCallback, // virtual inherited (rmres) base (mem) + .Memory.__memAccessCallback__ = &__nvoc_up_thunk_RmResource_memAccessCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__stdmemShareCallback__ = &__nvoc_up_thunk_RmResource_stdmemShareCallback, // virtual inherited (rmres) base (mem) + .Memory.__memShareCallback__ = &__nvoc_up_thunk_RmResource_memShareCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__stdmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_stdmemControlSerialization_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__stdmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_stdmemControlSerialization_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__stdmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_stdmemControl_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Prologue__ = &__nvoc_up_thunk_RmResource_memControl_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__stdmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_stdmemControl_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memControl_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__stdmemPreDestruct__ = &__nvoc_up_thunk_RsResource_stdmemPreDestruct, // virtual inherited (res) base (mem) + .Memory.__memPreDestruct__ = &__nvoc_up_thunk_RsResource_memPreDestruct, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__stdmemControlFilter__ = &__nvoc_up_thunk_RsResource_stdmemControlFilter, // virtual inherited (res) base (mem) + .Memory.__memControlFilter__ = &__nvoc_up_thunk_RsResource_memControlFilter, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__stdmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_stdmemIsPartialUnmapSupported, // inline virtual inherited (res) base (mem) body + .Memory.__memIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .Memory.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .Memory.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__stdmemMapTo__ = &__nvoc_up_thunk_RsResource_stdmemMapTo, // virtual inherited (res) base (mem) + .Memory.__memMapTo__ = &__nvoc_up_thunk_RsResource_memMapTo, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__stdmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_stdmemUnmapFrom, // virtual inherited (res) base (mem) + .Memory.__memUnmapFrom__ = &__nvoc_up_thunk_RsResource_memUnmapFrom, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__stdmemGetRefCount__ = &__nvoc_up_thunk_RsResource_stdmemGetRefCount, // virtual inherited (res) base (mem) + .Memory.__memGetRefCount__ = &__nvoc_up_thunk_RsResource_memGetRefCount, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__stdmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_stdmemAddAdditionalDependants, // virtual inherited (res) base (mem) + .Memory.__memAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memAddAdditionalDependants, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.Memory.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable = &vtable.Memory.RmResource; // (rmres) super^2 + pThis->__nvoc_base_Memory.__nvoc_vtable = &vtable.Memory; // (mem) super + pThis->__nvoc_vtable = &vtable; // (stdmem) this __nvoc_init_funcTable_StandardMemory_1(pThis); } diff --git a/src/nvidia/generated/g_standard_mem_nvoc.h b/src/nvidia/generated/g_standard_mem_nvoc.h index 1a0d168ccb..702105ac40 100644 --- a/src/nvidia/generated/g_standard_mem_nvoc.h +++ b/src/nvidia/generated/g_standard_mem_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -74,10 +74,15 @@ typedef struct MemoryManager MemoryManager; #endif +// Metadata including vtable +struct NVOC_VTABLE__StandardMemory; + + struct StandardMemory { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__StandardMemory *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; @@ -89,8 +94,13 @@ struct StandardMemory { struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 struct Memory *__nvoc_pbase_Memory; // mem super struct StandardMemory *__nvoc_pbase_StandardMemory; // stdmem +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__StandardMemory { + const struct NVOC_VTABLE__Memory Memory; // (mem) 26 function pointers - // Vtable with 26 per-object function pointers NvBool (*__stdmemCanCopy__)(struct StandardMemory * /*this*/); // virtual override (res) base (mem) NV_STATUS (*__stdmemIsDuplicate__)(struct StandardMemory * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) NV_STATUS (*__stdmemGetMapAddrSpace__)(struct StandardMemory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (mem) @@ -149,162 +159,162 @@ NV_STATUS __nvoc_objCreate_StandardMemory(StandardMemory**, Dynamic*, NvU32, CAL // Wrapper macros -#define stdmemCanCopy_FNPTR(pStandardMemory) pStandardMemory->__stdmemCanCopy__ +#define stdmemCanCopy_FNPTR(pStandardMemory) pStandardMemory->__nvoc_vtable->__stdmemCanCopy__ #define stdmemCanCopy(pStandardMemory) stdmemCanCopy_DISPATCH(pStandardMemory) -#define stdmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define stdmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsDuplicate__ #define stdmemIsDuplicate(pMemory, hMemory, pDuplicate) stdmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define stdmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ +#define stdmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMapAddrSpace__ #define stdmemGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) stdmemGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define stdmemControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ +#define stdmemControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memControl__ #define stdmemControl(pMemory, pCallContext, pParams) stdmemControl_DISPATCH(pMemory, pCallContext, pParams) -#define stdmemMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define stdmemMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memMap__ #define stdmemMap(pMemory, pCallContext, pParams, pCpuMapping) stdmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define stdmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ +#define stdmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memUnmap__ #define stdmemUnmap(pMemory, pCallContext, pCpuMapping) stdmemUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define stdmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ +#define stdmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemInterMapParams__ #define stdmemGetMemInterMapParams(pMemory, pParams) stdmemGetMemInterMapParams_DISPATCH(pMemory, pParams) -#define stdmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define stdmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckMemInterUnmap__ #define stdmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) stdmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define stdmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ +#define stdmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemoryMappingDescriptor__ #define stdmemGetMemoryMappingDescriptor(pMemory, ppMemDesc) stdmemGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define stdmemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ +#define stdmemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckCopyPermissions__ #define stdmemCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) stdmemCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define stdmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define stdmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsReady__ #define stdmemIsReady(pMemory, bCopyConstructorContext) stdmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) -#define stdmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define stdmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsGpuMapAllowed__ #define stdmemIsGpuMapAllowed(pMemory, pGpu) stdmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define stdmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define stdmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsExportAllowed__ #define stdmemIsExportAllowed(pMemory) stdmemIsExportAllowed_DISPATCH(pMemory) -#define stdmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define stdmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define stdmemAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) stdmemAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define stdmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define stdmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define stdmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) stdmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define stdmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define stdmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define stdmemControlSerialization_Prologue(pResource, pCallContext, pParams) stdmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define stdmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define stdmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define stdmemControlSerialization_Epilogue(pResource, pCallContext, pParams) stdmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define stdmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define stdmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define stdmemControl_Prologue(pResource, pCallContext, pParams) stdmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define stdmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define stdmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define stdmemControl_Epilogue(pResource, pCallContext, pParams) stdmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define stdmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define stdmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define stdmemPreDestruct(pResource) stdmemPreDestruct_DISPATCH(pResource) -#define stdmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define stdmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define stdmemControlFilter(pResource, pCallContext, pParams) stdmemControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define stdmemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define stdmemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define stdmemIsPartialUnmapSupported(pResource) stdmemIsPartialUnmapSupported_DISPATCH(pResource) -#define stdmemMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define stdmemMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define stdmemMapTo(pResource, pParams) stdmemMapTo_DISPATCH(pResource, pParams) -#define stdmemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define stdmemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define stdmemUnmapFrom(pResource, pParams) stdmemUnmapFrom_DISPATCH(pResource, pParams) -#define stdmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define stdmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define stdmemGetRefCount(pResource) stdmemGetRefCount_DISPATCH(pResource) -#define stdmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define stdmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define stdmemAddAdditionalDependants(pClient, pResource, pReference) stdmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool stdmemCanCopy_DISPATCH(struct StandardMemory *pStandardMemory) { - return pStandardMemory->__stdmemCanCopy__(pStandardMemory); + return pStandardMemory->__nvoc_vtable->__stdmemCanCopy__(pStandardMemory); } static inline NV_STATUS stdmemIsDuplicate_DISPATCH(struct StandardMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__stdmemIsDuplicate__(pMemory, hMemory, pDuplicate); + return pMemory->__nvoc_vtable->__stdmemIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS stdmemGetMapAddrSpace_DISPATCH(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pMemory->__stdmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); + return pMemory->__nvoc_vtable->__stdmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS stdmemControl_DISPATCH(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__stdmemControl__(pMemory, pCallContext, pParams); + return pMemory->__nvoc_vtable->__stdmemControl__(pMemory, pCallContext, pParams); } static inline NV_STATUS stdmemMap_DISPATCH(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__stdmemMap__(pMemory, pCallContext, pParams, pCpuMapping); + return pMemory->__nvoc_vtable->__stdmemMap__(pMemory, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS stdmemUnmap_DISPATCH(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__stdmemUnmap__(pMemory, pCallContext, pCpuMapping); + return pMemory->__nvoc_vtable->__stdmemUnmap__(pMemory, pCallContext, pCpuMapping); } static inline NV_STATUS stdmemGetMemInterMapParams_DISPATCH(struct StandardMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__stdmemGetMemInterMapParams__(pMemory, pParams); + return pMemory->__nvoc_vtable->__stdmemGetMemInterMapParams__(pMemory, pParams); } static inline NV_STATUS stdmemCheckMemInterUnmap_DISPATCH(struct StandardMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__stdmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); + return pMemory->__nvoc_vtable->__stdmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } static inline NV_STATUS stdmemGetMemoryMappingDescriptor_DISPATCH(struct StandardMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__stdmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); + return pMemory->__nvoc_vtable->__stdmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } static inline NV_STATUS stdmemCheckCopyPermissions_DISPATCH(struct StandardMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__stdmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); + return pMemory->__nvoc_vtable->__stdmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } static inline NV_STATUS stdmemIsReady_DISPATCH(struct StandardMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__stdmemIsReady__(pMemory, bCopyConstructorContext); + return pMemory->__nvoc_vtable->__stdmemIsReady__(pMemory, bCopyConstructorContext); } static inline NvBool stdmemIsGpuMapAllowed_DISPATCH(struct StandardMemory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__stdmemIsGpuMapAllowed__(pMemory, pGpu); + return pMemory->__nvoc_vtable->__stdmemIsGpuMapAllowed__(pMemory, pGpu); } static inline NvBool stdmemIsExportAllowed_DISPATCH(struct StandardMemory *pMemory) { - return pMemory->__stdmemIsExportAllowed__(pMemory); + return pMemory->__nvoc_vtable->__stdmemIsExportAllowed__(pMemory); } static inline NvBool stdmemAccessCallback_DISPATCH(struct StandardMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__stdmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__stdmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool stdmemShareCallback_DISPATCH(struct StandardMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__stdmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__stdmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS stdmemControlSerialization_Prologue_DISPATCH(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__stdmemControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__stdmemControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void stdmemControlSerialization_Epilogue_DISPATCH(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__stdmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__stdmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS stdmemControl_Prologue_DISPATCH(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__stdmemControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__stdmemControl_Prologue__(pResource, pCallContext, pParams); } static inline void stdmemControl_Epilogue_DISPATCH(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__stdmemControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__stdmemControl_Epilogue__(pResource, pCallContext, pParams); } static inline void stdmemPreDestruct_DISPATCH(struct StandardMemory *pResource) { - pResource->__stdmemPreDestruct__(pResource); + pResource->__nvoc_vtable->__stdmemPreDestruct__(pResource); } static inline NV_STATUS stdmemControlFilter_DISPATCH(struct StandardMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__stdmemControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__stdmemControlFilter__(pResource, pCallContext, pParams); } static inline NvBool stdmemIsPartialUnmapSupported_DISPATCH(struct StandardMemory *pResource) { - return pResource->__stdmemIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__stdmemIsPartialUnmapSupported__(pResource); } static inline NV_STATUS stdmemMapTo_DISPATCH(struct StandardMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__stdmemMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__stdmemMapTo__(pResource, pParams); } static inline NV_STATUS stdmemUnmapFrom_DISPATCH(struct StandardMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__stdmemUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__stdmemUnmapFrom__(pResource, pParams); } static inline NvU32 stdmemGetRefCount_DISPATCH(struct StandardMemory *pResource) { - return pResource->__stdmemGetRefCount__(pResource); + return pResource->__nvoc_vtable->__stdmemGetRefCount__(pResource); } static inline void stdmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct StandardMemory *pResource, RsResourceRef *pReference) { - pResource->__stdmemAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__stdmemAddAdditionalDependants__(pClient, pResource, pReference); } NvU64 stdmemGetSysmemPageSize_IMPL(struct OBJGPU *pGpu, struct StandardMemory *pMemory); diff --git a/src/nvidia/generated/g_subdevice_diag_nvoc.c b/src/nvidia/generated/g_subdevice_diag_nvoc.c index c4fa09dfcb..25935fa19e 100644 --- a/src/nvidia/generated/g_subdevice_diag_nvoc.c +++ b/src/nvidia/generated/g_subdevice_diag_nvoc.c @@ -360,158 +360,236 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DiagApi[ }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_down_thunk_DiagApi_gpuresControl(struct GpuResource *pDiagApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_down_thunk_DiagApi_resControlFilter(struct RsResource *pDiagApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this + // 2 down-thunk(s) defined to bridge methods in DiagApi from superclasses // diagapiControl: virtual override (res) base (gpures) -static NV_STATUS __nvoc_down_thunk_DiagApi_gpuresControl(struct GpuResource *pDiagApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_down_thunk_DiagApi_gpuresControl(struct GpuResource *pDiagApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return diagapiControl((struct DiagApi *)(((unsigned char *) pDiagApi) - __nvoc_rtti_DiagApi_GpuResource.offset), pCallContext, pParams); } // diagapiControlFilter: virtual override (res) base (gpures) -static NV_STATUS __nvoc_down_thunk_DiagApi_resControlFilter(struct RsResource *pDiagApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_down_thunk_DiagApi_resControlFilter(struct RsResource *pDiagApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return diagapiControlFilter((struct DiagApi *)(((unsigned char *) pDiagApi) - __nvoc_rtti_DiagApi_RsResource.offset), pCallContext, pParams); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_diagapiMap(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_diagapiUnmap(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_diagapiShareCallback(struct DiagApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_diagapiGetRegBaseOffsetAndSize(struct DiagApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_diagapiGetMapAddrSpace(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_diagapiInternalControlForward(struct DiagApi *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_diagapiGetInternalObjectHandle(struct DiagApi *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_diagapiAccessCallback(struct DiagApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_diagapiGetMemInterMapParams(struct DiagApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_diagapiCheckMemInterUnmap(struct DiagApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_diagapiGetMemoryMappingDescriptor(struct DiagApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_diagapiControlSerialization_Prologue(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_diagapiControlSerialization_Epilogue(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_diagapiControl_Prologue(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_diagapiControl_Epilogue(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_diagapiCanCopy(struct DiagApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_diagapiIsDuplicate(struct DiagApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_diagapiPreDestruct(struct DiagApi *pResource); // this +NvBool __nvoc_up_thunk_RsResource_diagapiIsPartialUnmapSupported(struct DiagApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_diagapiMapTo(struct DiagApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_diagapiUnmapFrom(struct DiagApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_diagapiGetRefCount(struct DiagApi *pResource); // this +void __nvoc_up_thunk_RsResource_diagapiAddAdditionalDependants(struct RsClient *pClient, struct DiagApi *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_diagapiGetNotificationListPtr(struct DiagApi *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_diagapiGetNotificationShare(struct DiagApi *pNotifier); // this +void __nvoc_up_thunk_Notifier_diagapiSetNotificationShare(struct DiagApi *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_diagapiUnregisterEvent(struct DiagApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_diagapiGetOrAllocNotifShare(struct DiagApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 28 up-thunk(s) defined to bridge methods in DiagApi to superclasses // diagapiMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_diagapiMap(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_diagapiMap(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DiagApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // diagapiUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_diagapiUnmap(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_diagapiUnmap(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DiagApi_GpuResource.offset), pCallContext, pCpuMapping); } // diagapiShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_diagapiShareCallback(struct DiagApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_diagapiShareCallback(struct DiagApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DiagApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // diagapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_diagapiGetRegBaseOffsetAndSize(struct DiagApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_diagapiGetRegBaseOffsetAndSize(struct DiagApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DiagApi_GpuResource.offset), pGpu, pOffset, pSize); } // diagapiGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_diagapiGetMapAddrSpace(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_diagapiGetMapAddrSpace(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DiagApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // diagapiInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_diagapiInternalControlForward(struct DiagApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_diagapiInternalControlForward(struct DiagApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DiagApi_GpuResource.offset), command, pParams, size); } // diagapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_diagapiGetInternalObjectHandle(struct DiagApi *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_diagapiGetInternalObjectHandle(struct DiagApi *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_DiagApi_GpuResource.offset)); } // diagapiAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_diagapiAccessCallback(struct DiagApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_diagapiAccessCallback(struct DiagApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // diagapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_diagapiGetMemInterMapParams(struct DiagApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_diagapiGetMemInterMapParams(struct DiagApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DiagApi_RmResource.offset), pParams); } // diagapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_diagapiCheckMemInterUnmap(struct DiagApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_diagapiCheckMemInterUnmap(struct DiagApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DiagApi_RmResource.offset), bSubdeviceHandleProvided); } // diagapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_diagapiGetMemoryMappingDescriptor(struct DiagApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_diagapiGetMemoryMappingDescriptor(struct DiagApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_DiagApi_RmResource.offset), ppMemDesc); } // diagapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_diagapiControlSerialization_Prologue(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_diagapiControlSerialization_Prologue(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RmResource.offset), pCallContext, pParams); } // diagapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_diagapiControlSerialization_Epilogue(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_diagapiControlSerialization_Epilogue(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RmResource.offset), pCallContext, pParams); } // diagapiControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_diagapiControl_Prologue(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_diagapiControl_Prologue(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RmResource.offset), pCallContext, pParams); } // diagapiControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_diagapiControl_Epilogue(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_diagapiControl_Epilogue(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RmResource.offset), pCallContext, pParams); } // diagapiCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_diagapiCanCopy(struct DiagApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_diagapiCanCopy(struct DiagApi *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RsResource.offset)); } // diagapiIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_diagapiIsDuplicate(struct DiagApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_diagapiIsDuplicate(struct DiagApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RsResource.offset), hMemory, pDuplicate); } // diagapiPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_diagapiPreDestruct(struct DiagApi *pResource) { +void __nvoc_up_thunk_RsResource_diagapiPreDestruct(struct DiagApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RsResource.offset)); } // diagapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_diagapiIsPartialUnmapSupported(struct DiagApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_diagapiIsPartialUnmapSupported(struct DiagApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RsResource.offset)); } // diagapiMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_diagapiMapTo(struct DiagApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_diagapiMapTo(struct DiagApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RsResource.offset), pParams); } // diagapiUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_diagapiUnmapFrom(struct DiagApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_diagapiUnmapFrom(struct DiagApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RsResource.offset), pParams); } // diagapiGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_diagapiGetRefCount(struct DiagApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_diagapiGetRefCount(struct DiagApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RsResource.offset)); } // diagapiAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_diagapiAddAdditionalDependants(struct RsClient *pClient, struct DiagApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_diagapiAddAdditionalDependants(struct RsClient *pClient, struct DiagApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_DiagApi_RsResource.offset), pReference); } // diagapiGetNotificationListPtr: virtual inherited (notify) base (notify) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_diagapiGetNotificationListPtr(struct DiagApi *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_diagapiGetNotificationListPtr(struct DiagApi *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DiagApi_Notifier.offset)); } // diagapiGetNotificationShare: virtual inherited (notify) base (notify) -static struct NotifShare * __nvoc_up_thunk_Notifier_diagapiGetNotificationShare(struct DiagApi *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_diagapiGetNotificationShare(struct DiagApi *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DiagApi_Notifier.offset)); } // diagapiSetNotificationShare: virtual inherited (notify) base (notify) -static void __nvoc_up_thunk_Notifier_diagapiSetNotificationShare(struct DiagApi *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_diagapiSetNotificationShare(struct DiagApi *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DiagApi_Notifier.offset), pNotifShare); } // diagapiUnregisterEvent: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_diagapiUnregisterEvent(struct DiagApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_diagapiUnregisterEvent(struct DiagApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DiagApi_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // diagapiGetOrAllocNotifShare: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_diagapiGetOrAllocNotifShare(struct DiagApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_diagapiGetOrAllocNotifShare(struct DiagApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_DiagApi_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -572,14 +650,6 @@ static void __nvoc_init_funcTable_DiagApi_1(DiagApi *pThis, RmHalspecOwner *pRmh PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // diagapiControl -- virtual override (res) base (gpures) - pThis->__diagapiControl__ = &diagapiControl_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresControl__ = &__nvoc_down_thunk_DiagApi_gpuresControl; - - // diagapiControlFilter -- virtual override (res) base (gpures) - pThis->__diagapiControlFilter__ = &diagapiControlFilter_IMPL; - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ = &__nvoc_down_thunk_DiagApi_resControlFilter; - // diagapiCtrlCmdFifoCheckEngineContext -- exported (id=0x208f0401) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__diagapiCtrlCmdFifoCheckEngineContext__ = &diagapiCtrlCmdFifoCheckEngineContext_IMPL; @@ -664,97 +734,159 @@ static void __nvoc_init_funcTable_DiagApi_1(DiagApi *pThis, RmHalspecOwner *pRmh #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__diagapiCtrlCmdUcodeCoverageGetData__ = &diagapiCtrlCmdUcodeCoverageGetData_IMPL; #endif - - // diagapiMap -- virtual inherited (gpures) base (gpures) - pThis->__diagapiMap__ = &__nvoc_up_thunk_GpuResource_diagapiMap; - - // diagapiUnmap -- virtual inherited (gpures) base (gpures) - pThis->__diagapiUnmap__ = &__nvoc_up_thunk_GpuResource_diagapiUnmap; - - // diagapiShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__diagapiShareCallback__ = &__nvoc_up_thunk_GpuResource_diagapiShareCallback; - - // diagapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__diagapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_diagapiGetRegBaseOffsetAndSize; - - // diagapiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__diagapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_diagapiGetMapAddrSpace; - - // diagapiInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__diagapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_diagapiInternalControlForward; - - // diagapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__diagapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_diagapiGetInternalObjectHandle; - - // diagapiAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__diagapiAccessCallback__ = &__nvoc_up_thunk_RmResource_diagapiAccessCallback; - - // diagapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__diagapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_diagapiGetMemInterMapParams; - - // diagapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__diagapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_diagapiCheckMemInterUnmap; - - // diagapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__diagapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_diagapiGetMemoryMappingDescriptor; - - // diagapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__diagapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_diagapiControlSerialization_Prologue; - - // diagapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__diagapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_diagapiControlSerialization_Epilogue; - - // diagapiControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__diagapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_diagapiControl_Prologue; - - // diagapiControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__diagapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_diagapiControl_Epilogue; - - // diagapiCanCopy -- virtual inherited (res) base (gpures) - pThis->__diagapiCanCopy__ = &__nvoc_up_thunk_RsResource_diagapiCanCopy; - - // diagapiIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__diagapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_diagapiIsDuplicate; - - // diagapiPreDestruct -- virtual inherited (res) base (gpures) - pThis->__diagapiPreDestruct__ = &__nvoc_up_thunk_RsResource_diagapiPreDestruct; - - // diagapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__diagapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_diagapiIsPartialUnmapSupported; - - // diagapiMapTo -- virtual inherited (res) base (gpures) - pThis->__diagapiMapTo__ = &__nvoc_up_thunk_RsResource_diagapiMapTo; - - // diagapiUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__diagapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_diagapiUnmapFrom; - - // diagapiGetRefCount -- virtual inherited (res) base (gpures) - pThis->__diagapiGetRefCount__ = &__nvoc_up_thunk_RsResource_diagapiGetRefCount; - - // diagapiAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__diagapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_diagapiAddAdditionalDependants; - - // diagapiGetNotificationListPtr -- virtual inherited (notify) base (notify) - pThis->__diagapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_diagapiGetNotificationListPtr; - - // diagapiGetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__diagapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_diagapiGetNotificationShare; - - // diagapiSetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__diagapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_diagapiSetNotificationShare; - - // diagapiUnregisterEvent -- virtual inherited (notify) base (notify) - pThis->__diagapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_diagapiUnregisterEvent; - - // diagapiGetOrAllocNotifShare -- virtual inherited (notify) base (notify) - pThis->__diagapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_diagapiGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_DiagApi_1 with approximately 49 basic block(s). +} // End __nvoc_init_funcTable_DiagApi_1 with approximately 17 basic block(s). // Initialize vtable(s) for 46 virtual method(s). void __nvoc_init_funcTable_DiagApi(DiagApi *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 46 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__DiagApi vtable = { + .__diagapiControl__ = &diagapiControl_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresControl__ = &__nvoc_down_thunk_DiagApi_gpuresControl, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__diagapiControlFilter__ = &diagapiControlFilter_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &__nvoc_down_thunk_DiagApi_resControlFilter, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif + .__diagapiMap__ = &__nvoc_up_thunk_GpuResource_diagapiMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__diagapiUnmap__ = &__nvoc_up_thunk_GpuResource_diagapiUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__diagapiShareCallback__ = &__nvoc_up_thunk_GpuResource_diagapiShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__diagapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_diagapiGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__diagapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_diagapiGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__diagapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_diagapiInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__diagapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_diagapiGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__diagapiAccessCallback__ = &__nvoc_up_thunk_RmResource_diagapiAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__diagapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_diagapiGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__diagapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_diagapiCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__diagapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_diagapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__diagapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_diagapiControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__diagapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_diagapiControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__diagapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_diagapiControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__diagapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_diagapiControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__diagapiCanCopy__ = &__nvoc_up_thunk_RsResource_diagapiCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__diagapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_diagapiIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__diagapiPreDestruct__ = &__nvoc_up_thunk_RsResource_diagapiPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__diagapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_diagapiIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__diagapiMapTo__ = &__nvoc_up_thunk_RsResource_diagapiMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__diagapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_diagapiUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__diagapiGetRefCount__ = &__nvoc_up_thunk_RsResource_diagapiGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__diagapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_diagapiAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__diagapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_diagapiGetNotificationListPtr, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__diagapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_diagapiGetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__diagapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_diagapiSetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__diagapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_diagapiUnregisterEvent, // virtual inherited (notify) base (notify) + .Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__diagapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_diagapiGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.Notifier.INotifier; // (inotify) super^2 + pThis->__nvoc_base_Notifier.__nvoc_vtable = &vtable.Notifier; // (notify) super + pThis->__nvoc_vtable = &vtable; // (diagapi) this + + // Initialize vtable(s) with 16 per-object function pointer(s). __nvoc_init_funcTable_DiagApi_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_subdevice_diag_nvoc.h b/src/nvidia/generated/g_subdevice_diag_nvoc.h index 4c1df1eda3..5f089111d0 100644 --- a/src/nvidia/generated/g_subdevice_diag_nvoc.h +++ b/src/nvidia/generated/g_subdevice_diag_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -64,10 +64,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__DiagApi; + + struct DiagApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__DiagApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -83,9 +88,7 @@ struct DiagApi { struct Notifier *__nvoc_pbase_Notifier; // notify super struct DiagApi *__nvoc_pbase_DiagApi; // diagapi - // Vtable with 46 per-object function pointers - NV_STATUS (*__diagapiControl__)(struct DiagApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (gpures) - NV_STATUS (*__diagapiControlFilter__)(struct DiagApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (gpures) + // Vtable with 16 per-object function pointers NV_STATUS (*__diagapiCtrlCmdFifoCheckEngineContext__)(struct DiagApi * /*this*/, NV208F_CTRL_FIFO_CHECK_ENGINE_CONTEXT_PARAMS *); // exported (id=0x208f0401) NV_STATUS (*__diagapiCtrlCmdFifoEnableVirtualContext__)(struct DiagApi * /*this*/, NV208F_CTRL_FIFO_ENABLE_VIRTUAL_CONTEXT_PARAMS *); // exported (id=0x208f0402) NV_STATUS (*__diagapiCtrlCmdFifoGetChannelState__)(struct DiagApi * /*this*/, NV208F_CTRL_FIFO_GET_CHANNEL_STATE_PARAMS *); // halified (2 hals) exported (id=0x208f0403) body @@ -102,6 +105,19 @@ struct DiagApi { NV_STATUS (*__diagapiCtrlCmdUcodeCoverageGetState__)(struct DiagApi * /*this*/, NV208F_CTRL_UCODE_COVERAGE_GET_STATE_PARAMS *); // exported (id=0x208f1901) NV_STATUS (*__diagapiCtrlCmdUcodeCoverageSetState__)(struct DiagApi * /*this*/, NV208F_CTRL_UCODE_COVERAGE_SET_STATE_PARAMS *); // exported (id=0x208f1902) NV_STATUS (*__diagapiCtrlCmdUcodeCoverageGetData__)(struct DiagApi * /*this*/, NV208F_CTRL_UCODE_COVERAGE_GET_DATA_PARAMS *); // exported (id=0x208f1903) + + // Data members + NvU32 notifyActions[1]; +}; + + +// Metadata including vtable with 30 function pointers plus superclass metadata +struct NVOC_VTABLE__DiagApi { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + const struct NVOC_VTABLE__Notifier Notifier; // (notify) 5 function pointers + + NV_STATUS (*__diagapiControl__)(struct DiagApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (gpures) + NV_STATUS (*__diagapiControlFilter__)(struct DiagApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual override (res) base (gpures) NV_STATUS (*__diagapiMap__)(struct DiagApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__diagapiUnmap__)(struct DiagApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NvBool (*__diagapiShareCallback__)(struct DiagApi * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) @@ -130,9 +146,6 @@ struct DiagApi { void (*__diagapiSetNotificationShare__)(struct DiagApi * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) NV_STATUS (*__diagapiUnregisterEvent__)(struct DiagApi * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) NV_STATUS (*__diagapiGetOrAllocNotifShare__)(struct DiagApi * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) - - // Data members - NvU32 notifyActions[1]; }; #ifndef __NVOC_CLASS_DiagApi_TYPEDEF__ @@ -165,9 +178,9 @@ NV_STATUS __nvoc_objCreate_DiagApi(DiagApi**, Dynamic*, NvU32, struct CALL_CONTE // Wrapper macros -#define diagapiControl_FNPTR(pDiagApi) pDiagApi->__diagapiControl__ +#define diagapiControl_FNPTR(pDiagApi) pDiagApi->__nvoc_vtable->__diagapiControl__ #define diagapiControl(pDiagApi, pCallContext, pParams) diagapiControl_DISPATCH(pDiagApi, pCallContext, pParams) -#define diagapiControlFilter_FNPTR(pDiagApi) pDiagApi->__diagapiControlFilter__ +#define diagapiControlFilter_FNPTR(pDiagApi) pDiagApi->__nvoc_vtable->__diagapiControlFilter__ #define diagapiControlFilter(pDiagApi, pCallContext, pParams) diagapiControlFilter_DISPATCH(pDiagApi, pCallContext, pParams) #define diagapiCtrlCmdFifoCheckEngineContext_FNPTR(pDiagApi) pDiagApi->__diagapiCtrlCmdFifoCheckEngineContext__ #define diagapiCtrlCmdFifoCheckEngineContext(pDiagApi, pCheckEngineContextParams) diagapiCtrlCmdFifoCheckEngineContext_DISPATCH(pDiagApi, pCheckEngineContextParams) @@ -202,70 +215,70 @@ NV_STATUS __nvoc_objCreate_DiagApi(DiagApi**, Dynamic*, NvU32, struct CALL_CONTE #define diagapiCtrlCmdUcodeCoverageSetState(pDiagApi, pParams) diagapiCtrlCmdUcodeCoverageSetState_DISPATCH(pDiagApi, pParams) #define diagapiCtrlCmdUcodeCoverageGetData_FNPTR(pDiagApi) pDiagApi->__diagapiCtrlCmdUcodeCoverageGetData__ #define diagapiCtrlCmdUcodeCoverageGetData(pDiagApi, pParams) diagapiCtrlCmdUcodeCoverageGetData_DISPATCH(pDiagApi, pParams) -#define diagapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define diagapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define diagapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) diagapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define diagapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define diagapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define diagapiUnmap(pGpuResource, pCallContext, pCpuMapping) diagapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define diagapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define diagapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define diagapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) diagapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define diagapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define diagapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define diagapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) diagapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define diagapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define diagapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define diagapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) diagapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define diagapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define diagapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define diagapiInternalControlForward(pGpuResource, command, pParams, size) diagapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define diagapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define diagapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define diagapiGetInternalObjectHandle(pGpuResource) diagapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define diagapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define diagapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define diagapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) diagapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define diagapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define diagapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define diagapiGetMemInterMapParams(pRmResource, pParams) diagapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define diagapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define diagapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define diagapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) diagapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define diagapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define diagapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define diagapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) diagapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define diagapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define diagapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define diagapiControlSerialization_Prologue(pResource, pCallContext, pParams) diagapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define diagapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define diagapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define diagapiControlSerialization_Epilogue(pResource, pCallContext, pParams) diagapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define diagapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define diagapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define diagapiControl_Prologue(pResource, pCallContext, pParams) diagapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define diagapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define diagapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define diagapiControl_Epilogue(pResource, pCallContext, pParams) diagapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define diagapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define diagapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define diagapiCanCopy(pResource) diagapiCanCopy_DISPATCH(pResource) -#define diagapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define diagapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define diagapiIsDuplicate(pResource, hMemory, pDuplicate) diagapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define diagapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define diagapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define diagapiPreDestruct(pResource) diagapiPreDestruct_DISPATCH(pResource) -#define diagapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define diagapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define diagapiIsPartialUnmapSupported(pResource) diagapiIsPartialUnmapSupported_DISPATCH(pResource) -#define diagapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define diagapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define diagapiMapTo(pResource, pParams) diagapiMapTo_DISPATCH(pResource, pParams) -#define diagapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define diagapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define diagapiUnmapFrom(pResource, pParams) diagapiUnmapFrom_DISPATCH(pResource, pParams) -#define diagapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define diagapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define diagapiGetRefCount(pResource) diagapiGetRefCount_DISPATCH(pResource) -#define diagapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define diagapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define diagapiAddAdditionalDependants(pClient, pResource, pReference) diagapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define diagapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define diagapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define diagapiGetNotificationListPtr(pNotifier) diagapiGetNotificationListPtr_DISPATCH(pNotifier) -#define diagapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define diagapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define diagapiGetNotificationShare(pNotifier) diagapiGetNotificationShare_DISPATCH(pNotifier) -#define diagapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define diagapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define diagapiSetNotificationShare(pNotifier, pNotifShare) diagapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define diagapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define diagapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define diagapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) diagapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define diagapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define diagapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define diagapiGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) diagapiGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS diagapiControl_DISPATCH(struct DiagApi *pDiagApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pDiagApi->__diagapiControl__(pDiagApi, pCallContext, pParams); + return pDiagApi->__nvoc_vtable->__diagapiControl__(pDiagApi, pCallContext, pParams); } static inline NV_STATUS diagapiControlFilter_DISPATCH(struct DiagApi *pDiagApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pDiagApi->__diagapiControlFilter__(pDiagApi, pCallContext, pParams); + return pDiagApi->__nvoc_vtable->__diagapiControlFilter__(pDiagApi, pCallContext, pParams); } static inline NV_STATUS diagapiCtrlCmdFifoCheckEngineContext_DISPATCH(struct DiagApi *pDiagApi, NV208F_CTRL_FIFO_CHECK_ENGINE_CONTEXT_PARAMS *pCheckEngineContextParams) { @@ -333,115 +346,115 @@ static inline NV_STATUS diagapiCtrlCmdUcodeCoverageGetData_DISPATCH(struct DiagA } static inline NV_STATUS diagapiMap_DISPATCH(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__diagapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__diagapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS diagapiUnmap_DISPATCH(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__diagapiUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__diagapiUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool diagapiShareCallback_DISPATCH(struct DiagApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__diagapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__diagapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS diagapiGetRegBaseOffsetAndSize_DISPATCH(struct DiagApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__diagapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__diagapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS diagapiGetMapAddrSpace_DISPATCH(struct DiagApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__diagapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__diagapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS diagapiInternalControlForward_DISPATCH(struct DiagApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__diagapiInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__diagapiInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle diagapiGetInternalObjectHandle_DISPATCH(struct DiagApi *pGpuResource) { - return pGpuResource->__diagapiGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__diagapiGetInternalObjectHandle__(pGpuResource); } static inline NvBool diagapiAccessCallback_DISPATCH(struct DiagApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__diagapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__diagapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS diagapiGetMemInterMapParams_DISPATCH(struct DiagApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__diagapiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__diagapiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS diagapiCheckMemInterUnmap_DISPATCH(struct DiagApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__diagapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__diagapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS diagapiGetMemoryMappingDescriptor_DISPATCH(struct DiagApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__diagapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__diagapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS diagapiControlSerialization_Prologue_DISPATCH(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__diagapiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__diagapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void diagapiControlSerialization_Epilogue_DISPATCH(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__diagapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__diagapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS diagapiControl_Prologue_DISPATCH(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__diagapiControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__diagapiControl_Prologue__(pResource, pCallContext, pParams); } static inline void diagapiControl_Epilogue_DISPATCH(struct DiagApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__diagapiControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__diagapiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool diagapiCanCopy_DISPATCH(struct DiagApi *pResource) { - return pResource->__diagapiCanCopy__(pResource); + return pResource->__nvoc_vtable->__diagapiCanCopy__(pResource); } static inline NV_STATUS diagapiIsDuplicate_DISPATCH(struct DiagApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__diagapiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__diagapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void diagapiPreDestruct_DISPATCH(struct DiagApi *pResource) { - pResource->__diagapiPreDestruct__(pResource); + pResource->__nvoc_vtable->__diagapiPreDestruct__(pResource); } static inline NvBool diagapiIsPartialUnmapSupported_DISPATCH(struct DiagApi *pResource) { - return pResource->__diagapiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__diagapiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS diagapiMapTo_DISPATCH(struct DiagApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__diagapiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__diagapiMapTo__(pResource, pParams); } static inline NV_STATUS diagapiUnmapFrom_DISPATCH(struct DiagApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__diagapiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__diagapiUnmapFrom__(pResource, pParams); } static inline NvU32 diagapiGetRefCount_DISPATCH(struct DiagApi *pResource) { - return pResource->__diagapiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__diagapiGetRefCount__(pResource); } static inline void diagapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct DiagApi *pResource, RsResourceRef *pReference) { - pResource->__diagapiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__diagapiAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * diagapiGetNotificationListPtr_DISPATCH(struct DiagApi *pNotifier) { - return pNotifier->__diagapiGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__diagapiGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * diagapiGetNotificationShare_DISPATCH(struct DiagApi *pNotifier) { - return pNotifier->__diagapiGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__diagapiGetNotificationShare__(pNotifier); } static inline void diagapiSetNotificationShare_DISPATCH(struct DiagApi *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__diagapiSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__diagapiSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS diagapiUnregisterEvent_DISPATCH(struct DiagApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__diagapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__diagapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS diagapiGetOrAllocNotifShare_DISPATCH(struct DiagApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__diagapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__diagapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS diagapiControl_IMPL(struct DiagApi *pDiagApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); diff --git a/src/nvidia/generated/g_subdevice_nvoc.c b/src/nvidia/generated/g_subdevice_nvoc.c index 8353b947fb..80435fe14c 100644 --- a/src/nvidia/generated/g_subdevice_nvoc.c +++ b/src/nvidia/generated/g_subdevice_nvoc.c @@ -208,21 +208,6 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [6] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x114u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuSetSdm_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x114u) - /*flags=*/ 0x114u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x20800120u, - /*paramSize=*/ sizeof(NV2080_CTRL_GPU_SET_SDM_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdGpuSetSdm" -#endif - }, - { /* [7] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -237,7 +222,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuExecRegOps" #endif }, - { /* [8] */ + { /* [7] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -252,7 +237,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetEngines" #endif }, - { /* [9] */ + { /* [8] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -267,7 +252,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetEngineClasslist" #endif }, - { /* [10] */ + { /* [9] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -282,7 +267,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetEngineFaultInfo" #endif }, - { /* [11] */ + { /* [10] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -297,7 +282,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuQueryMode" #endif }, - { /* [12] */ + { /* [11] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10244u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -312,7 +297,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuPromoteCtx" #endif }, - { /* [13] */ + { /* [12] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c240u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -327,7 +312,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuEvictCtx" #endif }, - { /* [14] */ + { /* [13] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14244u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -342,7 +327,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuInitializeCtx" #endif }, - { /* [15] */ + { /* [14] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40158u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -357,7 +342,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuQueryEccStatus" #endif }, - { /* [16] */ + { /* [15] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x114u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -372,7 +357,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuSetComputeModeRules" #endif }, - { /* [17] */ + { /* [16] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -387,7 +372,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuQueryComputeModeRules" #endif }, - { /* [18] */ + { /* [17] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -402,7 +387,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuQueryEccConfiguration" #endif }, - { /* [19] */ + { /* [18] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40044u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -417,7 +402,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuSetEccConfiguration" #endif }, - { /* [20] */ + { /* [19] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40044u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -432,7 +417,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuResetEccErrorStatus" #endif }, - { /* [21] */ + { /* [20] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -447,7 +432,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetFermiGpcInfo" #endif }, - { /* [22] */ + { /* [21] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -462,7 +447,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetFermiTpcInfo" #endif }, - { /* [23] */ + { /* [22] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -477,7 +462,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetFermiZcullInfo" #endif }, - { /* [24] */ + { /* [23] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x448u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -492,7 +477,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetOEMBoardInfo" #endif }, - { /* [25] */ + { /* [24] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10au) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -507,7 +492,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetId" #endif }, - { /* [26] */ + { /* [25] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -522,7 +507,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuAcquireComputeModeReservation" #endif }, - { /* [27] */ + { /* [26] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -537,7 +522,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuReleaseComputeModeReservation" #endif }, - { /* [28] */ + { /* [27] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -552,7 +537,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetEnginePartnerList" #endif }, - { /* [29] */ + { /* [28] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -567,7 +552,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetGidInfo" #endif }, - { /* [30] */ + { /* [29] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -582,7 +567,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetInforomObjectVersion" #endif }, - { /* [31] */ + { /* [30] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -597,7 +582,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuSetOptimusInfo" #endif }, - { /* [32] */ + { /* [31] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -612,7 +597,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetIpVersion" #endif }, - { /* [33] */ + { /* [32] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -627,7 +612,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuQueryIllumSupport" #endif }, - { /* [34] */ + { /* [33] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -642,7 +627,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetIllum" #endif }, - { /* [35] */ + { /* [34] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -657,7 +642,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuSetIllum" #endif }, - { /* [36] */ + { /* [35] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x448u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -672,7 +657,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetInforomImageVersion" #endif }, - { /* [37] */ + { /* [36] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -687,7 +672,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuQueryInforomEccSupport" #endif }, - { /* [38] */ + { /* [37] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -702,7 +687,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetPhysicalBridgeVersionInfo" #endif }, - { /* [39] */ + { /* [38] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -717,7 +702,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetAllBridgesUpstreamOfGpu" #endif }, - { /* [40] */ + { /* [39] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -732,7 +717,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuQueryScrubberStatus" #endif }, - { /* [41] */ + { /* [40] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -747,7 +732,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetVprCaps" #endif }, - { /* [42] */ + { /* [41] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x3u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -762,7 +747,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuHandleGpuSR" #endif }, - { /* [43] */ + { /* [42] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -777,7 +762,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetPesInfo" #endif }, - { /* [44] */ + { /* [43] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x448u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -792,7 +777,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetOEMInfo" #endif }, - { /* [45] */ + { /* [44] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -807,7 +792,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetVprInfo" #endif }, - { /* [46] */ + { /* [45] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -822,7 +807,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetEncoderCapacity" #endif }, - { /* [47] */ + { /* [46] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -837,7 +822,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetNvencSwSessionStats" #endif }, - { /* [48] */ + { /* [47] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -852,7 +837,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetNvencSwSessionInfo" #endif }, - { /* [49] */ + { /* [48] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -867,7 +852,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuSetFabricAddr" #endif }, - { /* [50] */ + { /* [49] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -882,7 +867,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetEnginesV2" #endif }, - { /* [51] */ + { /* [50] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -897,7 +882,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuQueryFunctionStatus" #endif }, - { /* [52] */ + { /* [51] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -912,7 +897,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuSetPartitions" #endif }, - { /* [53] */ + { /* [52] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -927,7 +912,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetPartitions" #endif }, - { /* [54] */ + { /* [53] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40040u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -942,7 +927,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuReportNonReplayableFault" #endif }, - { /* [55] */ + { /* [54] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -957,7 +942,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetEngineRunlistPriBase" #endif }, - { /* [56] */ + { /* [55] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -972,7 +957,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetHwEngineId" #endif }, - { /* [57] */ + { /* [56] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -987,7 +972,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetNvfbcSwSessionStats" #endif }, - { /* [58] */ + { /* [57] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1002,7 +987,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetNvfbcSwSessionInfo" #endif }, - { /* [59] */ + { /* [58] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x448u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1017,7 +1002,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetVmmuSegmentSize" #endif }, - { /* [60] */ + { /* [59] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1032,7 +1017,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetPartitionCapacity" #endif }, - { /* [61] */ + { /* [60] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1047,7 +1032,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetCachedInfo" #endif }, - { /* [62] */ + { /* [61] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1062,7 +1047,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuSetPartitioningMode" #endif }, - { /* [63] */ + { /* [62] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1077,7 +1062,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuDescribePartitions" #endif }, - { /* [64] */ + { /* [63] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1092,7 +1077,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetMaxSupportedPageSize" #endif }, - { /* [65] */ + { /* [64] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1107,7 +1092,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetActivePartitionIds" #endif }, - { /* [66] */ + { /* [65] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1122,7 +1107,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetPids" #endif }, - { /* [67] */ + { /* [66] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1137,7 +1122,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetPidInfo" #endif }, - { /* [68] */ + { /* [67] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1152,7 +1137,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuHandleVfPriFault" #endif }, - { /* [69] */ + { /* [68] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x107u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1167,7 +1152,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuSetComputePolicyConfig" #endif }, - { /* [70] */ + { /* [69] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1182,7 +1167,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetComputePolicyConfig" #endif }, - { /* [71] */ + { /* [70] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1197,7 +1182,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetGfid" #endif }, - { /* [72] */ + { /* [71] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1212,7 +1197,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdUpdateGfidP2pCapability" #endif }, - { /* [73] */ + { /* [72] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x110u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1227,7 +1212,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdValidateMemMapRequest" #endif }, - { /* [74] */ + { /* [73] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1242,7 +1227,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuSetEgmGpaFabricAddr" #endif }, - { /* [75] */ + { /* [74] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xau) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1257,7 +1242,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetEngineLoadTimes" #endif }, - { /* [76] */ + { /* [75] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1272,7 +1257,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGetP2pCaps" #endif }, - { /* [77] */ + { /* [76] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1287,7 +1272,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetComputeProfiles" #endif }, - { /* [78] */ + { /* [77] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1302,7 +1287,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGetGpuFabricProbeInfo" #endif }, - { /* [79] */ + { /* [78] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40448u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1317,7 +1302,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetChipDetails" #endif }, - { /* [80] */ + { /* [79] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1330,15 +1315,45 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "subdeviceCtrlCmdGpuMigratableOps" +#endif + }, + { /* [80] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100048u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuMarkDeviceForReset_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100048u) + /*flags=*/ 0x100048u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x208001a9u, + /*paramSize=*/ 0, + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdGpuMarkDeviceForReset" #endif }, { /* [81] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100048u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuUnmarkDeviceForReset_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100048u) + /*flags=*/ 0x100048u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x208001aau, + /*paramSize=*/ 0, + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdGpuUnmarkDeviceForReset" +#endif + }, + { /* [82] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetResetStatus_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) - /*flags=*/ 0x48u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) + /*flags=*/ 0x158u, /*accessRight=*/0x0u, /*methodId=*/ 0x208001abu, /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_RESET_STATUS_PARAMS), @@ -1347,7 +1362,37 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetResetStatus" #endif }, - { /* [82] */ + { /* [83] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100048u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuMarkDeviceForDrainAndReset_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100048u) + /*flags=*/ 0x100048u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x208001acu, + /*paramSize=*/ 0, + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdGpuMarkDeviceForDrainAndReset" +#endif + }, + { /* [84] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100048u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuUnmarkDeviceForDrainAndReset_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100048u) + /*flags=*/ 0x100048u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x208001adu, + /*paramSize=*/ 0, + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdGpuUnmarkDeviceForDrainAndReset" +#endif + }, + { /* [85] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1362,7 +1407,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetDrainAndResetStatus" #endif }, - { /* [83] */ + { /* [86] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1377,7 +1422,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetNvencSwSessionInfoV2" #endif }, - { /* [84] */ + { /* [87] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1392,7 +1437,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetConstructedFalconInfo" #endif }, - { /* [85] */ + { /* [88] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1407,22 +1452,37 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetVfCaps" #endif }, - { /* [86] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) + { /* [89] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGspStartTrace_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) - /*flags=*/ 0xd0u, + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdGpuGetRecoveryAction_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + /*flags=*/ 0x108u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x208001b2u, + /*paramSize=*/ sizeof(NV2080_CTRL_GPU_GET_RECOVERY_ACTION_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdGpuGetRecoveryAction" +#endif + }, + { /* [90] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x102d0u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalControlGspTrace_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x102d0u) + /*flags=*/ 0x102d0u, /*accessRight=*/0x0u, /*methodId=*/ 0x208001e3u, - /*paramSize=*/ sizeof(NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE_INFO_PARAMS), + /*paramSize=*/ sizeof(NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), #if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdInternalGspStartTrace" + /*func=*/ "subdeviceCtrlCmdInternalControlGspTrace" #endif }, - { /* [87] */ + { /* [91] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1437,7 +1497,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlGpuGetFipsStatus" #endif }, - { /* [88] */ + { /* [92] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1452,7 +1512,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdEventSetNotification" #endif }, - { /* [89] */ + { /* [93] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1467,7 +1527,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdEventSetTrigger" #endif }, - { /* [90] */ + { /* [94] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1482,7 +1542,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdEventSetMemoryNotifies" #endif }, - { /* [91] */ + { /* [95] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1497,7 +1557,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdEventSetSemaphoreMemory" #endif }, - { /* [92] */ + { /* [96] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1512,7 +1572,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdEventSetSemaMemValidation" #endif }, - { /* [93] */ + { /* [97] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1527,7 +1587,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdEventSetTriggerFifo" #endif }, - { /* [94] */ + { /* [98] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1542,7 +1602,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdEventVideoBindEvtbuf" #endif }, - { /* [95] */ + { /* [99] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1557,7 +1617,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdEventGspTraceRatsBindEvtbuf" #endif }, - { /* [96] */ + { /* [100] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1572,7 +1632,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdTimerSchedule" #endif }, - { /* [97] */ + { /* [101] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1587,7 +1647,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdTimerCancel" #endif }, - { /* [98] */ + { /* [102] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1602,7 +1662,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdTimerGetTime" #endif }, - { /* [99] */ + { /* [103] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1617,7 +1677,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdTimerGetRegisterOffset" #endif }, - { /* [100] */ + { /* [104] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1632,7 +1692,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdTimerGetGpuCpuTimeCorrelationInfo" #endif }, - { /* [101] */ + { /* [105] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x208u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1647,7 +1707,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdTimerSetGrTickFreq" #endif }, - { /* [102] */ + { /* [106] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1662,7 +1722,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdI2cReadBuffer" #endif }, - { /* [103] */ + { /* [107] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1677,7 +1737,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdI2cWriteBuffer" #endif }, - { /* [104] */ + { /* [108] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1692,7 +1752,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdI2cReadReg" #endif }, - { /* [105] */ + { /* [109] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1707,7 +1767,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdI2cWriteReg" #endif }, - { /* [106] */ + { /* [110] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xau) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1722,7 +1782,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBiosGetSKUInfo" #endif }, - { /* [107] */ + { /* [111] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1737,7 +1797,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBiosGetPostTime" #endif }, - { /* [108] */ + { /* [112] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1752,7 +1812,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBiosGetUefiSupport" #endif }, - { /* [109] */ + { /* [113] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1767,13 +1827,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBiosGetNbsiV2" #endif }, - { /* [110] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) + { /* [114] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x60048u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdBiosGetInfoV2_DISPATCH, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) - /*flags=*/ 0x40048u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x60048u) + /*flags=*/ 0x60048u, /*accessRight=*/0x0u, /*methodId=*/ 0x20800810u, /*paramSize=*/ sizeof(NV2080_CTRL_BIOS_GET_INFO_V2_PARAMS), @@ -1782,7 +1842,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBiosGetInfoV2" #endif }, - { /* [111] */ + { /* [115] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1797,7 +1857,22 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDisplayGetStaticInfo" #endif }, - { /* [112] */ + { /* [116] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGsyncGetRasterSyncDecodeMode_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20800a14u, + /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GSYNC_GET_RASTER_SYNC_DECODE_MODE_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdInternalGsyncGetRasterSyncDecodeMode" +#endif + }, + { /* [117] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x5c0c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1812,7 +1887,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMemSysGetStaticConfig" #endif }, - { /* [113] */ + { /* [118] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1827,7 +1902,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalUvmRegisterAccessCntrBuffer" #endif }, - { /* [114] */ + { /* [119] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1842,7 +1917,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalUvmUnregisterAccessCntrBuffer" #endif }, - { /* [115] */ + { /* [120] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1857,7 +1932,22 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetCaps" #endif }, - { /* [116] */ + { /* [121] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc1u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalNvlinkEnableNvlinkPeer_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc1u) + /*flags=*/ 0xc1u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20800a21u, + /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_NVLINK_ENABLE_NVLINK_PEER_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdInternalNvlinkEnableNvlinkPeer" +#endif + }, + { /* [122] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1872,7 +1962,37 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetGlobalSmOrder" #endif }, - { /* [117] */ + { /* [123] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalNvlinkCoreCallback_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) + /*flags=*/ 0xd0u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20800a24u, + /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdInternalNvlinkCoreCallback" +#endif + }, + { /* [124] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalNvlinkUpdateRemoteLocalSid_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) + /*flags=*/ 0xd0u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20800a25u, + /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdInternalNvlinkUpdateRemoteLocalSid" +#endif + }, + { /* [125] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1887,7 +2007,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetFloorsweepingMasks" #endif }, - { /* [118] */ + { /* [126] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8000u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1902,7 +2022,22 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetCtxBufferPtes" #endif }, - { /* [119] */ + { /* [127] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalNvlinkGetAliEnabled_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20800a29u, + /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_NVLINK_GET_ALI_ENABLED_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdInternalNvlinkGetAliEnabled" +#endif + }, + { /* [128] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1917,7 +2052,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetInfo" #endif }, - { /* [120] */ + { /* [129] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1932,7 +2067,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetZcullInfo" #endif }, - { /* [121] */ + { /* [130] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1947,7 +2082,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetRopInfo" #endif }, - { /* [122] */ + { /* [131] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1962,7 +2097,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetPpcMasks" #endif }, - { /* [123] */ + { /* [132] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c1c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1977,7 +2112,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetContextBuffersInfo" #endif }, - { /* [124] */ + { /* [133] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -1992,7 +2127,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetSmIssueRateModifier" #endif }, - { /* [125] */ + { /* [134] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x404c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2007,7 +2142,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGetChipInfo" #endif }, - { /* [126] */ + { /* [135] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2022,7 +2157,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGrInternalSetFecsTraceHwEnable" #endif }, - { /* [127] */ + { /* [136] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2037,7 +2172,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGrInternalGetFecsTraceHwEnable" #endif }, - { /* [128] */ + { /* [137] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2052,7 +2187,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGrInternalSetFecsTraceRdOffset" #endif }, - { /* [129] */ + { /* [138] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2067,7 +2202,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGrInternalSetFecsTraceWrOffset" #endif }, - { /* [130] */ + { /* [139] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2082,7 +2217,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGrInternalGetFecsTraceRdOffset" #endif }, - { /* [131] */ + { /* [140] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2097,7 +2232,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetFecsRecordSize" #endif }, - { /* [132] */ + { /* [141] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10040u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2112,7 +2247,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGrStaticGetFecsTraceDefines" #endif }, - { /* [133] */ + { /* [142] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2127,7 +2262,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetFecsTraceDefines" #endif }, - { /* [134] */ + { /* [143] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c4c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2142,7 +2277,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGetDeviceInfoTable" #endif }, - { /* [135] */ + { /* [144] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2157,7 +2292,22 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGetUserRegisterAccessMap" #endif }, - { /* [136] */ + { /* [145] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalNvlinkUpdateHshubMux_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) + /*flags=*/ 0xd0u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20800a42u, + /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_NVLINK_UPDATE_HSHUB_MUX_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdInternalNvlinkUpdateHshubMux" +#endif + }, + { /* [146] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2172,7 +2322,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalKMIGmgrPromoteGpuInstanceMemRange" #endif }, - { /* [137] */ + { /* [147] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2187,7 +2337,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalInitBug4208224War" #endif }, - { /* [138] */ + { /* [148] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2202,7 +2352,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrInternalStaticGetPdbProperties" #endif }, - { /* [139] */ + { /* [149] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2217,7 +2367,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDisplayWriteInstMem" #endif }, - { /* [140] */ + { /* [150] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2232,7 +2382,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalRecoverAllComputeContexts" #endif }, - { /* [141] */ + { /* [151] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2247,7 +2397,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDisplayGetIpVersion" #endif }, - { /* [142] */ + { /* [152] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2262,7 +2412,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGetSmcMode" #endif }, - { /* [143] */ + { /* [153] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2277,7 +2427,37 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDisplaySetupRgLineIntr" #endif }, - { /* [144] */ + { /* [154] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalNvlinkPreSetupNvlinkPeer_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) + /*flags=*/ 0xd0u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20800a4eu, + /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdInternalNvlinkPreSetupNvlinkPeer" +#endif + }, + { /* [155] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalNvlinkPostSetupNvlinkPeer_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) + /*flags=*/ 0xd0u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20800a50u, + /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdInternalNvlinkPostSetupNvlinkPeer" +#endif + }, + { /* [156] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2292,7 +2472,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMemSysSetPartitionableMem" #endif }, - { /* [145] */ + { /* [157] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2307,7 +2487,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalFifoPromoteRunlistBuffers" #endif }, - { /* [146] */ + { /* [158] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2322,7 +2502,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDisplaySetImportedImpData" #endif }, - { /* [147] */ + { /* [159] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2337,7 +2517,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdIsEgpuBridge" #endif }, - { /* [148] */ + { /* [160] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2352,7 +2532,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries" #endif }, - { /* [149] */ + { /* [161] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2367,7 +2547,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDisplaySetChannelPushbuffer" #endif }, - { /* [150] */ + { /* [162] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2382,7 +2562,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGmmuGetStaticInfo" #endif }, - { /* [151] */ + { /* [163] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2397,7 +2577,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbGetHeapReservationSize" #endif }, - { /* [152] */ + { /* [164] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2412,7 +2592,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdIntrGetKernelTable" #endif }, - { /* [153] */ + { /* [165] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2427,7 +2607,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDisplayGetDisplayMask" #endif }, - { /* [154] */ + { /* [166] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2442,7 +2622,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalFifoGetNumChannels" #endif }, - { /* [155] */ + { /* [167] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2457,7 +2637,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalStaticKMIGmgrGetProfiles" #endif }, - { /* [156] */ + { /* [168] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2472,7 +2652,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalStaticKMIGmgrGetPartitionableEngines" #endif }, - { /* [157] */ + { /* [169] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2487,7 +2667,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalStaticKMIGmgrGetSwizzIdFbMemPageRanges" #endif }, - { /* [158] */ + { /* [170] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2502,7 +2682,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKMemSysGetMIGMemoryConfig" #endif }, - { /* [159] */ + { /* [171] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2517,7 +2697,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbSetZbcReferenced" #endif }, - { /* [160] */ + { /* [172] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2532,7 +2712,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalRcWatchdogTimeout" #endif }, - { /* [161] */ + { /* [173] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2547,7 +2727,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMemSysGetMIGMemoryPartitionTable" #endif }, - { /* [162] */ + { /* [174] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2562,7 +2742,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMemSysL2InvalidateEvict" #endif }, - { /* [163] */ + { /* [175] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2577,7 +2757,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMemSysFlushL2AllRamsAndCaches" #endif }, - { /* [164] */ + { /* [176] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2592,7 +2772,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMemSysDisableNvlinkPeers" #endif }, - { /* [165] */ + { /* [177] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2607,7 +2787,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMemSysProgramRawCompressionMode" #endif }, - { /* [166] */ + { /* [178] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2622,7 +2802,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalBusFlushWithSysmembar" #endif }, - { /* [167] */ + { /* [179] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2637,7 +2817,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalBusSetupP2pMailboxLocal" #endif }, - { /* [168] */ + { /* [180] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2652,7 +2832,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalBusSetupP2pMailboxRemote" #endif }, - { /* [169] */ + { /* [181] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2667,7 +2847,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalBusDestroyP2pMailbox" #endif }, - { /* [170] */ + { /* [182] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2682,7 +2862,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalBusCreateC2cPeerMapping" #endif }, - { /* [171] */ + { /* [183] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2697,7 +2877,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping" #endif }, - { /* [172] */ + { /* [184] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2712,7 +2892,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDisplayPreUnixConsole" #endif }, - { /* [173] */ + { /* [185] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2727,7 +2907,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDisplayPostUnixConsole" #endif }, - { /* [174] */ + { /* [186] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2742,7 +2922,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdHshubGetMaxHshubsPerShim" #endif }, - { /* [175] */ + { /* [187] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2757,7 +2937,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfCudaLimitDisable" #endif }, - { /* [176] */ + { /* [188] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2772,7 +2952,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPmgrUnsetDynamicBoostLimit" #endif }, - { /* [177] */ + { /* [189] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2787,7 +2967,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfOptpCliClear" #endif }, - { /* [178] */ + { /* [190] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2802,7 +2982,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfGpuBoostSyncSetControl" #endif }, - { /* [179] */ + { /* [191] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2817,7 +2997,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfSyncGpuBoostSetLimits" #endif }, - { /* [180] */ + { /* [192] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2832,7 +3012,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfGpuBoostSyncGetInfo" #endif }, - { /* [181] */ + { /* [193] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2847,7 +3027,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfGetAuxPowerState" #endif }, - { /* [182] */ + { /* [194] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2862,7 +3042,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdHshubPeerConnConfig" #endif }, - { /* [183] */ + { /* [195] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2877,7 +3057,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdHshubFirstLinkPeerId" #endif }, - { /* [184] */ + { /* [196] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2892,7 +3072,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdHshubGetHshubIdForLinks" #endif }, - { /* [185] */ + { /* [197] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2907,7 +3087,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdHshubGetNumUnits" #endif }, - { /* [186] */ + { /* [198] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2922,7 +3102,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdHshubNextHshubId" #endif }, - { /* [187] */ + { /* [199] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2937,7 +3117,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdHshubEgmConfig" #endif }, - { /* [188] */ + { /* [200] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2952,7 +3132,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfPerfmonClientReservationCheck" #endif }, - { /* [189] */ + { /* [201] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2967,7 +3147,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfPerfmonClientReservationSet" #endif }, - { /* [190] */ + { /* [202] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2982,7 +3162,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfBoostSet_2x" #endif }, - { /* [191] */ + { /* [203] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -2997,7 +3177,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGmmuRegisterFaultBuffer" #endif }, - { /* [192] */ + { /* [204] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3012,7 +3192,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGmmuUnregisterFaultBuffer" #endif }, - { /* [193] */ + { /* [205] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3027,7 +3207,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGmmuRegisterClientShadowFaultBuffer" #endif }, - { /* [194] */ + { /* [206] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3042,7 +3222,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGmmuUnregisterClientShadowFaultBuffer" #endif }, - { /* [195] */ + { /* [207] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3057,7 +3237,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGmmuCopyReservedSplitGVASpacePdesServer" #endif }, - { /* [196] */ + { /* [208] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3072,7 +3252,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfBoostSet_3x" #endif }, - { /* [197] */ + { /* [209] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3087,7 +3267,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfBoostClear_3x" #endif }, - { /* [198] */ + { /* [210] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3102,7 +3282,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalKMIGmgrExportGPUInstance" #endif }, - { /* [199] */ + { /* [211] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3117,7 +3297,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalKMIGmgrImportGPUInstance" #endif }, - { /* [200] */ + { /* [212] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3132,7 +3312,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBifGetStaticInfo" #endif }, - { /* [201] */ + { /* [213] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3147,7 +3327,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalNvlinkEnableComputePeerAddr" #endif }, - { /* [202] */ + { /* [214] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3162,7 +3342,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalNvlinkGetSetNvswitchFabricAddr" #endif }, - { /* [203] */ + { /* [215] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3177,7 +3357,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBifGetAspmL1Flags" #endif }, - { /* [204] */ + { /* [216] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3192,7 +3372,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfCfControllerSetMaxVGpuVMCount" #endif }, - { /* [205] */ + { /* [217] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3207,7 +3387,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCcuGetSampleInfo" #endif }, - { /* [206] */ + { /* [218] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3222,7 +3402,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCcuMap" #endif }, - { /* [207] */ + { /* [219] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3237,7 +3417,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCcuUnmap" #endif }, - { /* [208] */ + { /* [220] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3252,7 +3432,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalSetP2pCaps" #endif }, - { /* [209] */ + { /* [221] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3267,7 +3447,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalRemoveP2pCaps" #endif }, - { /* [210] */ + { /* [222] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3282,7 +3462,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGetPcieP2pCaps" #endif }, - { /* [211] */ + { /* [223] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3297,7 +3477,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBifSetPcieRo" #endif }, - { /* [212] */ + { /* [224] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3312,7 +3492,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalStaticKMIGmgrGetComputeInstanceProfiles" #endif }, - { /* [213] */ + { /* [225] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3327,7 +3507,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCcuSetStreamState" #endif }, - { /* [214] */ + { /* [226] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3342,7 +3522,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalInitGpuIntr" #endif }, - { /* [215] */ + { /* [227] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3357,7 +3537,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGsyncOptimizeTiming" #endif }, - { /* [216] */ + { /* [228] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3372,7 +3552,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGsyncGetDisplayIds" #endif }, - { /* [217] */ + { /* [229] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3387,7 +3567,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGsyncSetStereoSync" #endif }, - { /* [218] */ + { /* [230] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3402,7 +3582,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalFbsrInit" #endif }, - { /* [219] */ + { /* [231] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3417,7 +3597,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalFifoToggleActiveChannelScheduling" #endif }, - { /* [220] */ + { /* [232] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3432,7 +3612,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGsyncGetVactiveLines" #endif }, - { /* [221] */ + { /* [233] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3447,7 +3627,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalMemmgrGetVgpuHostRmReservedFb" #endif }, - { /* [222] */ + { /* [234] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3462,7 +3642,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPostInitBrightcStateLoad" #endif }, - { /* [223] */ + { /* [235] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3477,7 +3657,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalNvlinkGetNumActiveLinksPerIoctrl" #endif }, - { /* [224] */ + { /* [236] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3492,7 +3672,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalNvlinkGetTotalNumLinksPerIoctrl" #endif }, - { /* [225] */ + { /* [237] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3507,7 +3687,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGsyncIsDisplayIdValid" #endif }, - { /* [226] */ + { /* [238] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3522,7 +3702,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync" #endif }, - { /* [227] */ + { /* [239] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3537,7 +3717,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalSmbpbiPfmReqHndlrCapUpdate" #endif }, - { /* [228] */ + { /* [240] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3552,7 +3732,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPmgrPfmReqHndlrStateLoadSync" #endif }, - { /* [229] */ + { /* [241] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3567,7 +3747,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalThermPfmReqHndlrStateInitSync" #endif }, - { /* [230] */ + { /* [242] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3582,7 +3762,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfPfmReqHndlrGetPm1State" #endif }, - { /* [231] */ + { /* [243] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3597,7 +3777,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfPfmReqHndlrSetPm1State" #endif }, - { /* [232] */ + { /* [244] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3612,7 +3792,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPmgrPfmReqHndlrUpdateEdppLimit" #endif }, - { /* [233] */ + { /* [245] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3627,7 +3807,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalThermPfmReqHndlrUpdateTgpuLimit" #endif }, - { /* [234] */ + { /* [246] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3642,7 +3822,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTgpMode" #endif }, - { /* [235] */ + { /* [247] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3657,7 +3837,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPmgrPfmReqHndlrConfigureTurboV2" #endif }, - { /* [236] */ + { /* [248] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3672,7 +3852,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateInfo" #endif }, - { /* [237] */ + { /* [249] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3687,7 +3867,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfPfmReqHndlrGetVpstateMapping" #endif }, - { /* [238] */ + { /* [250] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3702,7 +3882,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPerfPfmReqHndlrSetVpstate" #endif }, - { /* [239] */ + { /* [251] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3717,7 +3897,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalFifoGetNumSecureChannels" #endif }, - { /* [240] */ + { /* [252] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3732,7 +3912,22 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdSpdmPartition" #endif }, - { /* [241] */ + { /* [253] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceSpdmRetrieveTranscript_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20800adau, + /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_SPDM_RETRIEVE_TRANSCRIPT_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceSpdmRetrieveTranscript" +#endif + }, + { /* [254] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3747,7 +3942,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBifDisableSystemMemoryAccess" #endif }, - { /* [242] */ + { /* [255] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3762,7 +3957,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDisplayPinsetsToLockpins" #endif }, - { /* [243] */ + { /* [256] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3777,7 +3972,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalDetectHsVideoBridge" #endif }, - { /* [244] */ + { /* [257] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3792,7 +3987,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDisplaySetSliLinkGpioSwControl" #endif }, - { /* [245] */ + { /* [258] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3807,7 +4002,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalSetStaticEdidData" #endif }, - { /* [246] */ + { /* [259] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3822,7 +4017,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalConfComputeDeriveSwlKeys" #endif }, - { /* [247] */ + { /* [260] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3837,7 +4032,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalConfComputeDeriveLceKeys" #endif }, - { /* [248] */ + { /* [261] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3852,7 +4047,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalConfComputeRotateKeys" #endif }, - { /* [249] */ + { /* [262] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3867,7 +4062,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalConfComputeRCChannelsForKeyRotation" #endif }, - { /* [250] */ + { /* [263] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3882,7 +4077,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalConfComputeSetGpuState" #endif }, - { /* [251] */ + { /* [264] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3897,7 +4092,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalConfComputeSetSecurityPolicy" #endif }, - { /* [252] */ + { /* [265] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3912,7 +4107,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGpuClientLowPowerModeEnter" #endif }, - { /* [253] */ + { /* [266] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3927,7 +4122,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalNvlinkPostFatalErrorRecovery" #endif }, - { /* [254] */ + { /* [267] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3942,7 +4137,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGpuGetGspRmFreeHeap" #endif }, - { /* [255] */ + { /* [268] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3957,7 +4152,37 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGpuSetIllum" #endif }, - { /* [256] */ + { /* [269] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGsyncApplyStereoPinAlwaysHiWar_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20800aedu, + /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GSYNC_APPLY_STEREO_PIN_ALWAYS_HI_WAR_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdInternalGsyncApplyStereoPinAlwaysHiWar" +#endif + }, + { /* [270] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdInternalGpuGetPFBar1Spa_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20800aeeu, + /*paramSize=*/ sizeof(NV2080_CTRL_INTERNAL_GPU_GET_PF_BAR1_SPA_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdInternalGpuGetPFBar1Spa" +#endif + }, + { /* [271] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3972,7 +4197,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalDisplayAcpiSubsytemActivated" #endif }, - { /* [257] */ + { /* [272] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -3987,7 +4212,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalDisplayPreModeSet" #endif }, - { /* [258] */ + { /* [273] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4002,7 +4227,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalDisplayPostModeSet" #endif }, - { /* [259] */ + { /* [274] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4017,7 +4242,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalConfComputeGetStaticInfo" #endif }, - { /* [260] */ + { /* [275] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4032,7 +4257,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp" #endif }, - { /* [261] */ + { /* [276] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4047,7 +4272,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGetLocalAtsConfig" #endif }, - { /* [262] */ + { /* [277] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4062,7 +4287,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalSetPeerAtsConfig" #endif }, - { /* [263] */ + { /* [278] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4077,7 +4302,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalPmgrPfmReqHndlrGetEdppLimitInfo" #endif }, - { /* [264] */ + { /* [279] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4092,7 +4317,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalInitUserSharedData" #endif }, - { /* [265] */ + { /* [280] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4107,7 +4332,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalUserSharedDataSetDataPoll" #endif }, - { /* [266] */ + { /* [281] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4122,7 +4347,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdSetGpfifo" #endif }, - { /* [267] */ + { /* [282] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4137,7 +4362,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFifoBindEngines" #endif }, - { /* [268] */ + { /* [283] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4152,7 +4377,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdSetOperationalProperties" #endif }, - { /* [269] */ + { /* [284] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4167,7 +4392,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGetPhysicalChannelCount" #endif }, - { /* [270] */ + { /* [285] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x20008u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4182,7 +4407,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFifoGetInfo" #endif }, - { /* [271] */ + { /* [286] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4197,7 +4422,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFifoDisableChannels" #endif }, - { /* [272] */ + { /* [287] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4212,7 +4437,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFifoGetChannelMemInfo" #endif }, - { /* [273] */ + { /* [288] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4227,7 +4452,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFifoGetUserdLocation" #endif }, - { /* [274] */ + { /* [289] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4242,7 +4467,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFifoObjschedSwGetLog" #endif }, - { /* [275] */ + { /* [290] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x5c040u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4257,7 +4482,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFifoGetDeviceInfoTable" #endif }, - { /* [276] */ + { /* [291] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4272,7 +4497,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFifoClearFaultedBit" #endif }, - { /* [277] */ + { /* [292] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x68u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4287,7 +4512,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFifoRunlistSetSchedPolicy" #endif }, - { /* [278] */ + { /* [293] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4302,7 +4527,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFifoUpdateChannelInfo" #endif }, - { /* [279] */ + { /* [294] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4317,7 +4542,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFifoDisableUsermodeChannels" #endif }, - { /* [280] */ + { /* [295] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4332,7 +4557,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFifoSetupVfZombieSubctxPdb" #endif }, - { /* [281] */ + { /* [296] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4347,7 +4572,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFifoGetAllocatedChannels" #endif }, - { /* [282] */ + { /* [297] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4362,7 +4587,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFifoDisableChannelsForKeyRotation" #endif }, - { /* [283] */ + { /* [298] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4377,7 +4602,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFifoDisableChannelsForKeyRotationV2" #endif }, - { /* [284] */ + { /* [299] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4392,7 +4617,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFifoObjschedGetState" #endif }, - { /* [285] */ + { /* [300] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4407,7 +4632,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFifoObjschedSetState" #endif }, - { /* [286] */ + { /* [301] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4422,7 +4647,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFifoObjschedGetCaps" #endif }, - { /* [287] */ + { /* [302] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4437,7 +4662,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetInfo" #endif }, - { /* [288] */ + { /* [303] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4452,7 +4677,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrCtxswZcullMode" #endif }, - { /* [289] */ + { /* [304] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4467,7 +4692,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetZcullInfo" #endif }, - { /* [290] */ + { /* [305] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4482,7 +4707,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrCtxswPmMode" #endif }, - { /* [291] */ + { /* [306] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80348u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4497,7 +4722,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrCtxswZcullBind" #endif }, - { /* [292] */ + { /* [307] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4512,7 +4737,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrCtxswPmBind" #endif }, - { /* [293] */ + { /* [308] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4527,7 +4752,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrSetGpcTileMap" #endif }, - { /* [294] */ + { /* [309] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4542,7 +4767,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrCtxswSmpcMode" #endif }, - { /* [295] */ + { /* [310] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4557,7 +4782,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetSmToGpcTpcMappings" #endif }, - { /* [296] */ + { /* [311] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x348u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4572,7 +4797,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrSetCtxswPreemptionMode" #endif }, - { /* [297] */ + { /* [312] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4587,7 +4812,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrCtxswPreemptionBind" #endif }, - { /* [298] */ + { /* [313] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4602,7 +4827,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrPcSamplingMode" #endif }, - { /* [299] */ + { /* [314] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4617,7 +4842,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetROPInfo" #endif }, - { /* [300] */ + { /* [315] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4632,7 +4857,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetCtxswStats" #endif }, - { /* [301] */ + { /* [316] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4647,7 +4872,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetCtxBufferSize" #endif }, - { /* [302] */ + { /* [317] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8000u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4662,7 +4887,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetCtxBufferInfo" #endif }, - { /* [303] */ + { /* [318] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4677,7 +4902,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetGlobalSmOrder" #endif }, - { /* [304] */ + { /* [319] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4692,7 +4917,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetCurrentResidentChannel" #endif }, - { /* [305] */ + { /* [320] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4707,7 +4932,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetVatAlarmData" #endif }, - { /* [306] */ + { /* [321] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4722,7 +4947,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetAttributeBufferSize" #endif }, - { /* [307] */ + { /* [322] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4737,7 +4962,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGfxPoolQuerySize" #endif }, - { /* [308] */ + { /* [323] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4752,7 +4977,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGfxPoolInitialize" #endif }, - { /* [309] */ + { /* [324] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4767,7 +4992,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGfxPoolAddSlots" #endif }, - { /* [310] */ + { /* [325] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4782,7 +5007,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGfxPoolRemoveSlots" #endif }, - { /* [311] */ + { /* [326] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10au) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4797,7 +5022,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetCapsV2" #endif }, - { /* [312] */ + { /* [327] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4812,7 +5037,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetInfoV2" #endif }, - { /* [313] */ + { /* [328] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4827,7 +5052,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetGpcMask" #endif }, - { /* [314] */ + { /* [329] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4842,7 +5067,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetTpcMask" #endif }, - { /* [315] */ + { /* [330] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4857,7 +5082,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrSetTpcPartitionMode" #endif }, - { /* [316] */ + { /* [331] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4872,7 +5097,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetEngineContextProperties" #endif }, - { /* [317] */ + { /* [332] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4887,7 +5112,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetSmIssueRateModifier" #endif }, - { /* [318] */ + { /* [333] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4902,7 +5127,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrFecsBindEvtbufForUid" #endif }, - { /* [319] */ + { /* [334] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4917,7 +5142,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetPhysGpcMask" #endif }, - { /* [320] */ + { /* [335] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4932,7 +5157,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetPpcMask" #endif }, - { /* [321] */ + { /* [336] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4947,7 +5172,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetNumTpcsForGpc" #endif }, - { /* [322] */ + { /* [337] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4962,7 +5187,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetCtxswModes" #endif }, - { /* [323] */ + { /* [338] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4977,7 +5202,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetGpcTileMap" #endif }, - { /* [324] */ + { /* [339] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -4992,7 +5217,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetZcullMask" #endif }, - { /* [325] */ + { /* [340] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x918u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5007,7 +5232,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrFecsBindEvtbufForUidV2" #endif }, - { /* [326] */ + { /* [341] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5022,7 +5247,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrGetGfxGpcAndTpcInfo" #endif }, - { /* [327] */ + { /* [342] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5037,7 +5262,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKGrCtxswSetupBind" #endif }, - { /* [328] */ + { /* [343] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5052,22 +5277,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbGetInfoV2" #endif }, - { /* [329] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetCarveoutAddressInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - /*flags=*/ 0x8u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x2080130bu, - /*paramSize=*/ sizeof(NV2080_CTRL_FB_GET_SYSTEM_CARVEOUT_ADDRESS_SPACE_INFO), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdFbGetCarveoutAddressInfo" -#endif - }, - { /* [330] */ + { /* [344] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5082,7 +5292,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbGetCalibrationLockFailed" #endif }, - { /* [331] */ + { /* [345] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5097,22 +5307,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbFlushGpuCache" #endif }, - { /* [332] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbSetGpuCacheAllocPolicy_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - /*flags=*/ 0x8u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x2080130fu, - /*paramSize=*/ sizeof(NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdFbSetGpuCacheAllocPolicy" -#endif - }, - { /* [333] */ + { /* [346] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5127,22 +5322,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbGetBar1Offset" #endif }, - { /* [334] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetGpuCacheAllocPolicy_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - /*flags=*/ 0x8u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x20801312u, - /*paramSize=*/ sizeof(NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdFbGetGpuCacheAllocPolicy" -#endif - }, - { /* [335] */ + { /* [347] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5157,7 +5337,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbIsKind" #endif }, - { /* [336] */ + { /* [348] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40148u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5172,37 +5352,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbGetGpuCacheInfo" #endif }, - { /* [337] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - /*flags=*/ 0x8u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x20801318u, - /*paramSize=*/ sizeof(NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2" -#endif - }, - { /* [338] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - /*flags=*/ 0x8u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x20801319u, - /*paramSize=*/ sizeof(NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2" -#endif - }, - { /* [339] */ + { /* [349] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5217,7 +5367,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbGetFBRegionInfo" #endif }, - { /* [340] */ + { /* [350] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5232,7 +5382,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbGetOfflinedPages" #endif }, - { /* [341] */ + { /* [351] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40158u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5247,7 +5397,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbGetLTCInfoForFBP" #endif }, - { /* [342] */ + { /* [352] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5262,7 +5412,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbCBCOp" #endif }, - { /* [343] */ + { /* [353] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5277,7 +5427,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbGetCtagsForCbcEviction" #endif }, - { /* [344] */ + { /* [354] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5292,7 +5442,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbSetupVprRegion" #endif }, - { /* [345] */ + { /* [355] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5307,7 +5457,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbGetCliManagedOfflinedPages" #endif }, - { /* [346] */ + { /* [356] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5322,7 +5472,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbGetCompBitCopyConstructInfo" #endif }, - { /* [347] */ + { /* [357] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5337,7 +5487,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbSetRrd" #endif }, - { /* [348] */ + { /* [358] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5352,7 +5502,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbSetReadLimit" #endif }, - { /* [349] */ + { /* [359] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5367,7 +5517,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbSetWriteLimit" #endif }, - { /* [350] */ + { /* [360] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5382,7 +5532,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbPatchPbrForMining" #endif }, - { /* [351] */ + { /* [361] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5397,13 +5547,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbGetMemAlignment" #endif }, - { /* [352] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + { /* [362] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x58u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetRemappedRows_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) - /*flags=*/ 0x48u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x58u) + /*flags=*/ 0x58u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801344u, /*paramSize=*/ sizeof(NV2080_CTRL_FB_GET_REMAPPED_ROWS_PARAMS), @@ -5412,7 +5562,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbGetRemappedRows" #endif }, - { /* [353] */ + { /* [363] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5427,13 +5577,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbGetFsInfo" #endif }, - { /* [354] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + { /* [364] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x58u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetRowRemapperHistogram_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) - /*flags=*/ 0x48u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x58u) + /*flags=*/ 0x58u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801347u, /*paramSize=*/ sizeof(NV2080_CTRL_FB_GET_ROW_REMAPPER_HISTOGRAM_PARAMS), @@ -5442,7 +5592,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbGetRowRemapperHistogram" #endif }, - { /* [355] */ + { /* [365] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5457,7 +5607,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbGetDynamicOfflinedPages" #endif }, - { /* [356] */ + { /* [366] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5472,7 +5622,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbUpdateNumaStatus" #endif }, - { /* [357] */ + { /* [367] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5487,7 +5637,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFbGetNumaInfo" #endif }, - { /* [358] */ + { /* [368] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5502,7 +5652,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGbGetSemaphoreSurfaceLayout" #endif }, - { /* [359] */ + { /* [369] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100008u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5517,7 +5667,22 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGmmuCommitTlbInvalidate" #endif }, - { /* [360] */ + { /* [370] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFbGetStaticBar1Info_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20801354u, + /*paramSize=*/ sizeof(NV2080_CTRL_FB_GET_STATIC_BAR1_INFO_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdFbGetStaticBar1Info" +#endif + }, + { /* [371] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50bu) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5532,7 +5697,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMcGetArchInfo" #endif }, - { /* [361] */ + { /* [372] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5547,7 +5712,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMcServiceInterrupts" #endif }, - { /* [362] */ + { /* [373] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5562,37 +5727,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMcGetManufacturer" #endif }, - { /* [363] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdMcQueryHostclkSlowdownStatus_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - /*flags=*/ 0x8u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x20801708u, - /*paramSize=*/ sizeof(NV2080_CTRL_MC_QUERY_HOSTCLK_SLOWDOWN_STATUS_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdMcQueryHostclkSlowdownStatus" -#endif - }, - { /* [364] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdMcSetHostclkSlowdownStatus_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - /*flags=*/ 0x8u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x20801709u, - /*paramSize=*/ sizeof(NV2080_CTRL_MC_SET_HOSTCLK_SLOWDOWN_STATUS_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdMcSetHostclkSlowdownStatus" -#endif - }, - { /* [365] */ + { /* [374] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5607,7 +5742,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMcChangeReplayableFaultOwnership" #endif }, - { /* [366] */ + { /* [375] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5622,7 +5757,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMcGetEngineNotificationIntrVectors" #endif }, - { /* [367] */ + { /* [376] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5637,7 +5772,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMcGetStaticIntrTable" #endif }, - { /* [368] */ + { /* [377] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x518u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5652,7 +5787,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPciInfo" #endif }, - { /* [369] */ + { /* [378] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x518u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5667,7 +5802,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPciBarInfo" #endif }, - { /* [370] */ + { /* [379] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5682,7 +5817,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusSetPcieLinkWidth" #endif }, - { /* [371] */ + { /* [380] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5697,7 +5832,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusSetPcieSpeed" #endif }, - { /* [372] */ + { /* [381] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5712,7 +5847,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusServiceGpuMultifunctionState" #endif }, - { /* [373] */ + { /* [382] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5727,7 +5862,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPexCounters" #endif }, - { /* [374] */ + { /* [383] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5742,7 +5877,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusClearPexCounters" #endif }, - { /* [375] */ + { /* [384] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5757,7 +5892,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusFreezePexCounters" #endif }, - { /* [376] */ + { /* [385] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5772,7 +5907,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPexLaneCounters" #endif }, - { /* [377] */ + { /* [386] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5787,7 +5922,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPcieLtrLatency" #endif }, - { /* [378] */ + { /* [387] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5802,7 +5937,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusSetPcieLtrLatency" #endif }, - { /* [379] */ + { /* [388] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5817,7 +5952,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPexUtilCounters" #endif }, - { /* [380] */ + { /* [389] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5832,7 +5967,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusClearPexUtilCounters" #endif }, - { /* [381] */ + { /* [390] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5847,7 +5982,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetBFD" #endif }, - { /* [382] */ + { /* [391] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5862,7 +5997,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetAspmDisableFlags" #endif }, - { /* [383] */ + { /* [392] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x20118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5877,7 +6012,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetInfoV2" #endif }, - { /* [384] */ + { /* [393] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5892,7 +6027,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusControlPublicAspmBits" #endif }, - { /* [385] */ + { /* [394] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5907,7 +6042,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetNvlinkPeerIdMask" #endif }, - { /* [386] */ + { /* [395] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5922,7 +6057,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusSetEomParameters" #endif }, - { /* [387] */ + { /* [396] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5937,7 +6072,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetUphyDlnCfgSpace" #endif }, - { /* [388] */ + { /* [397] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5952,7 +6087,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetEomStatus" #endif }, - { /* [389] */ + { /* [398] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5967,7 +6102,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPcieReqAtomicsCaps" #endif }, - { /* [390] */ + { /* [399] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5982,7 +6117,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics" #endif }, - { /* [391] */ + { /* [400] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -5997,7 +6132,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetC2CInfo" #endif }, - { /* [392] */ + { /* [401] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1000u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6012,7 +6147,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusSysmemAccess" #endif }, - { /* [393] */ + { /* [402] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50040u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6027,7 +6162,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusSetP2pMapping" #endif }, - { /* [394] */ + { /* [403] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50040u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6042,7 +6177,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusUnsetP2pMapping" #endif }, - { /* [395] */ + { /* [404] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40448u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6057,7 +6192,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPcieCplAtomicsCaps" #endif }, - { /* [396] */ + { /* [405] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x318u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6072,7 +6207,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKPerfBoost" #endif }, - { /* [397] */ + { /* [406] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6087,7 +6222,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfGetLevelInfo_V2" #endif }, - { /* [398] */ + { /* [407] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6102,7 +6237,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfGetPowerstate" #endif }, - { /* [399] */ + { /* [408] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6117,7 +6252,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfSetPowerstate" #endif }, - { /* [400] */ + { /* [409] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6132,7 +6267,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfNotifyVideoevent" #endif }, - { /* [401] */ + { /* [410] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6147,7 +6282,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfGetCurrentPstate" #endif }, - { /* [402] */ + { /* [411] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6162,7 +6297,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfRatedTdpGetControl" #endif }, - { /* [403] */ + { /* [412] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6177,7 +6312,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfRatedTdpSetControl" #endif }, - { /* [404] */ + { /* [413] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6192,7 +6327,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample" #endif }, - { /* [405] */ + { /* [414] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6207,7 +6342,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfSetAuxPowerState" #endif }, - { /* [406] */ + { /* [415] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6222,7 +6357,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfReservePerfmonHw" #endif }, - { /* [407] */ + { /* [416] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6237,7 +6372,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2" #endif }, - { /* [408] */ + { /* [417] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6252,7 +6387,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcReadVirtualMem" #endif }, - { /* [409] */ + { /* [418] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6267,7 +6402,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcGetErrorCount" #endif }, - { /* [410] */ + { /* [419] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6282,7 +6417,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcSetCleanErrorHistory" #endif }, - { /* [411] */ + { /* [420] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6297,7 +6432,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcGetWatchdogInfo" #endif }, - { /* [412] */ + { /* [421] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6312,7 +6447,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcDisableWatchdog" #endif }, - { /* [413] */ + { /* [422] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6327,7 +6462,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcEnableWatchdog" #endif }, - { /* [414] */ + { /* [423] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6342,7 +6477,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcReleaseWatchdogRequests" #endif }, - { /* [415] */ + { /* [424] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40154u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6357,7 +6492,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdSetRcRecovery" #endif }, - { /* [416] */ + { /* [425] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40154u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6372,7 +6507,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGetRcRecovery" #endif }, - { /* [417] */ + { /* [426] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6387,7 +6522,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcSoftDisableWatchdog" #endif }, - { /* [418] */ + { /* [427] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6402,7 +6537,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdSetRcInfo" #endif }, - { /* [419] */ + { /* [428] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6417,7 +6552,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGetRcInfo" #endif }, - { /* [420] */ + { /* [429] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6432,7 +6567,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcGetErrorV2" #endif }, - { /* [421] */ + { /* [430] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6447,7 +6582,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGpioProgramDirection" #endif }, - { /* [422] */ + { /* [431] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6462,7 +6597,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGpioProgramOutput" #endif }, - { /* [423] */ + { /* [432] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6477,7 +6612,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGpioReadInput" #endif }, - { /* [424] */ + { /* [433] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6492,7 +6627,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGpioActivateHwFunction" #endif }, - { /* [425] */ + { /* [434] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6507,7 +6642,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvdGetDumpSize" #endif }, - { /* [426] */ + { /* [435] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6522,7 +6657,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvdGetDump" #endif }, - { /* [427] */ + { /* [436] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6537,7 +6672,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvdGetNocatJournalRpt" #endif }, - { /* [428] */ + { /* [437] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6552,7 +6687,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvdSetNocatJournalData" #endif }, - { /* [429] */ + { /* [438] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6567,7 +6702,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvdInsertNocatJournalRecord" #endif }, - { /* [430] */ + { /* [439] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6582,7 +6717,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDmaInvalidateTLB" #endif }, - { /* [431] */ + { /* [440] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6597,7 +6732,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDmaGetInfo" #endif }, - { /* [432] */ + { /* [441] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6612,7 +6747,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPmgrGetModuleInfo" #endif }, - { /* [433] */ + { /* [442] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6627,7 +6762,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuProcessPostGc6ExitTasks" #endif }, - { /* [434] */ + { /* [443] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6642,7 +6777,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGc6Entry" #endif }, - { /* [435] */ + { /* [444] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6657,7 +6792,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGc6Exit" #endif }, - { /* [436] */ + { /* [445] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6672,7 +6807,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdLpwrDifrCtrl" #endif }, - { /* [437] */ + { /* [446] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6687,7 +6822,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdLpwrDifrPrefetchResponse" #endif }, - { /* [438] */ + { /* [447] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6702,7 +6837,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetCaps" #endif }, - { /* [439] */ + { /* [448] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x349u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6717,7 +6852,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetCePceMask" #endif }, - { /* [440] */ + { /* [449] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6732,7 +6867,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetCapsV2" #endif }, - { /* [441] */ + { /* [450] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6747,7 +6882,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeUpdatePceLceMappings" #endif }, - { /* [442] */ + { /* [451] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6762,7 +6897,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeUpdateClassDB" #endif }, - { /* [443] */ + { /* [452] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x101d0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6777,7 +6912,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetPhysicalCaps" #endif }, - { /* [444] */ + { /* [453] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c040u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6792,7 +6927,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetFaultMethodBufferSize" #endif }, - { /* [445] */ + { /* [454] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6807,7 +6942,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetHubPceMask" #endif }, - { /* [446] */ + { /* [455] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6822,7 +6957,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetAllCaps" #endif }, - { /* [447] */ + { /* [456] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6837,7 +6972,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetAllPhysicalCaps" #endif }, - { /* [448] */ + { /* [457] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x145u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6852,7 +6987,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetLceShimInfo" #endif }, - { /* [449] */ + { /* [458] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6867,7 +7002,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeUpdatePceLceMappingsV2" #endif }, - { /* [450] */ + { /* [459] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6882,7 +7017,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetHubPceMaskV2" #endif }, - { /* [451] */ + { /* [460] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6897,7 +7032,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetPceConfigForLceType" #endif }, - { /* [452] */ + { /* [461] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x154u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6912,7 +7047,22 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetDecompLceMask" #endif }, - { /* [453] */ + { /* [462] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x154u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdCeIsDecompLceEnabled_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x154u) + /*flags=*/ 0x154u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20802a12u, + /*paramSize=*/ sizeof(NV2080_CTRL_CE_IS_DECOMP_LCE_ENABLED_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdCeIsDecompLceEnabled" +#endif + }, + { /* [463] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6927,7 +7077,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetNvlinkCaps" #endif }, - { /* [454] */ + { /* [464] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6942,7 +7092,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetNvlinkStatus" #endif }, - { /* [455] */ + { /* [465] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6957,7 +7107,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetNvlinkErrInfo" #endif }, - { /* [456] */ + { /* [466] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6972,7 +7122,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGetNvlinkCounters" #endif }, - { /* [457] */ + { /* [467] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6987,7 +7137,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdClearNvlinkCounters" #endif }, - { /* [458] */ + { /* [468] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7002,7 +7152,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetLinkFatalErrorCounts" #endif }, - { /* [459] */ + { /* [469] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7017,7 +7167,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkSetupEom" #endif }, - { /* [460] */ + { /* [470] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7032,7 +7182,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetPowerState" #endif }, - { /* [461] */ + { /* [471] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7047,7 +7197,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinGetLinkFomValues" #endif }, - { /* [462] */ + { /* [472] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7062,7 +7212,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetNvlinkEccErrors" #endif }, - { /* [463] */ + { /* [473] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7077,22 +7227,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkReadTpCounters" #endif }, - { /* [464] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkEnableNvlinkPeer_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) - /*flags=*/ 0x41u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x20803017u, - /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_ENABLE_NVLINK_PEER_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdNvlinkEnableNvlinkPeer" -#endif - }, - { /* [465] */ + { /* [474] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7107,97 +7242,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetLpCounters" #endif }, - { /* [466] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkCoreCallback_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) - /*flags=*/ 0x41u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x20803019u, - /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdNvlinkCoreCallback" -#endif - }, - { /* [467] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkGetAliEnabled_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) - /*flags=*/ 0x40u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x2080301au, - /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_GET_ALI_ENABLED_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdNvlinkGetAliEnabled" -#endif - }, - { /* [468] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) - /*flags=*/ 0x41u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x2080301bu, - /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid" -#endif - }, - { /* [469] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkUpdateHshubMux_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) - /*flags=*/ 0x41u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x2080301cu, - /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdNvlinkUpdateHshubMux" -#endif - }, - { /* [470] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) - /*flags=*/ 0x41u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x2080301du, - /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer" -#endif - }, - { /* [471] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) - /*flags=*/ 0x41u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x2080301eu, - /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer" -#endif - }, - { /* [472] */ + { /* [475] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7212,7 +7257,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkRemoveNvlinkMapping" #endif }, - { /* [473] */ + { /* [476] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7227,7 +7272,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkSaveRestoreHshubState" #endif }, - { /* [474] */ + { /* [477] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7242,7 +7287,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkProgramBufferready" #endif }, - { /* [475] */ + { /* [478] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7257,7 +7302,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkUpdateCurrentConfig" #endif }, - { /* [476] */ + { /* [479] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7272,7 +7317,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkSetLoopbackMode" #endif }, - { /* [477] */ + { /* [480] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7287,7 +7332,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkUpdatePeerLinkMask" #endif }, - { /* [478] */ + { /* [481] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7302,7 +7347,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkUpdateLinkConnection" #endif }, - { /* [479] */ + { /* [482] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7317,7 +7362,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkEnableLinksPostTopology" #endif }, - { /* [480] */ + { /* [483] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7332,7 +7377,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPreLinkTrainAli" #endif }, - { /* [481] */ + { /* [484] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7347,7 +7392,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetRefreshCounters" #endif }, - { /* [482] */ + { /* [485] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7362,7 +7407,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkClearRefreshCounters" #endif }, - { /* [483] */ + { /* [486] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10041u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7377,7 +7422,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetLinkMaskPostRxDet" #endif }, - { /* [484] */ + { /* [487] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7392,7 +7437,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkLinkTrainAli" #endif }, - { /* [485] */ + { /* [488] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7407,7 +7452,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetNvlinkDeviceInfo" #endif }, - { /* [486] */ + { /* [489] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7422,7 +7467,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetIoctrlDeviceInfo" #endif }, - { /* [487] */ + { /* [490] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7437,7 +7482,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkProgramLinkSpeed" #endif }, - { /* [488] */ + { /* [491] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7452,7 +7497,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkAreLinksTrained" #endif }, - { /* [489] */ + { /* [492] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7467,7 +7512,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkResetLinks" #endif }, - { /* [490] */ + { /* [493] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7482,7 +7527,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkDisableDlInterrupts" #endif }, - { /* [491] */ + { /* [494] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7497,7 +7542,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetLinkAndClockInfo" #endif }, - { /* [492] */ + { /* [495] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7512,7 +7557,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkSetupNvlinkSysmem" #endif }, - { /* [493] */ + { /* [496] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7527,7 +7572,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkProcessForcedConfigs" #endif }, - { /* [494] */ + { /* [497] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7542,7 +7587,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkSyncLaneShutdownProps" #endif }, - { /* [495] */ + { /* [498] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7557,7 +7602,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkEnableSysmemNvlinkAts" #endif }, - { /* [496] */ + { /* [499] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7572,7 +7617,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkHshubGetSysmemNvlinkMask" #endif }, - { /* [497] */ + { /* [500] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7587,7 +7632,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetSetNvswitchFlaAddr" #endif }, - { /* [498] */ + { /* [501] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10041u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7602,7 +7647,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkSyncLinkMasksAndVbiosInfo" #endif }, - { /* [499] */ + { /* [502] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7617,7 +7662,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkEnableLinks" #endif }, - { /* [500] */ + { /* [503] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7632,7 +7677,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkProcessInitDisabledLinks" #endif }, - { /* [501] */ + { /* [504] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7647,7 +7692,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkEomControl" #endif }, - { /* [502] */ + { /* [505] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7662,7 +7707,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkSetL1Threshold" #endif }, - { /* [503] */ + { /* [506] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7677,7 +7722,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetL1Threshold" #endif }, - { /* [504] */ + { /* [507] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10250u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7692,7 +7737,22 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkInbandSendData" #endif }, - { /* [505] */ + { /* [508] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkIsGpuDegraded_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + /*flags=*/ 0x44u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20803041u, + /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_IS_GPU_DEGRADED_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdNvlinkIsGpuDegraded" +#endif + }, + { /* [509] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7707,7 +7767,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkDirectConnectCheck" #endif }, - { /* [506] */ + { /* [510] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7722,7 +7782,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPostFaultUp" #endif }, - { /* [507] */ + { /* [511] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7737,7 +7797,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetPortEvents" #endif }, - { /* [508] */ + { /* [512] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7752,7 +7812,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdIsNvlinkReducedConfig" #endif }, - { /* [509] */ + { /* [513] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7767,7 +7827,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPAOS" #endif }, - { /* [510] */ + { /* [514] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7782,7 +7842,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGetNvlinkCountersV2" #endif }, - { /* [511] */ + { /* [515] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7797,7 +7857,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdClearNvlinkCountersV2" #endif }, - { /* [512] */ + { /* [516] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7812,7 +7872,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkClearLpCounters" #endif }, - { /* [513] */ + { /* [517] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7827,7 +7887,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPLTC" #endif }, - { /* [514] */ + { /* [518] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7842,7 +7902,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPPLM" #endif }, - { /* [515] */ + { /* [519] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7857,7 +7917,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPPSLC" #endif }, - { /* [516] */ + { /* [520] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7872,7 +7932,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMCAM" #endif }, - { /* [517] */ + { /* [521] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7887,22 +7947,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTECR" #endif }, - { /* [518] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkPRMAccessMTWE_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) - /*flags=*/ 0x44u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x2080305du, - /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_PRM_ACCESS_MTWE_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTWE" -#endif - }, - { /* [519] */ + { /* [522] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7917,7 +7962,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTEWE" #endif }, - { /* [520] */ + { /* [523] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7932,7 +7977,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTSDE" #endif }, - { /* [521] */ + { /* [524] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7947,7 +7992,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTCAP" #endif }, - { /* [522] */ + { /* [525] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7962,22 +8007,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPMTU" #endif }, - { /* [523] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkPRMAccessMCIA_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) - /*flags=*/ 0x44u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x20803063u, - /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_PRM_ACCESS_MCIA_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMCIA" -#endif - }, - { /* [524] */ + { /* [526] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7992,7 +8022,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPMLP" #endif }, - { /* [525] */ + { /* [527] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8007,7 +8037,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessGHPKT" #endif }, - { /* [526] */ + { /* [528] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8022,7 +8052,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPDDR" #endif }, - { /* [527] */ + { /* [529] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8037,7 +8067,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPPTT" #endif }, - { /* [528] */ + { /* [530] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8052,7 +8082,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPPCNT" #endif }, - { /* [529] */ + { /* [531] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8067,7 +8097,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMGIR" #endif }, - { /* [530] */ + { /* [532] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8082,7 +8112,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPPAOS" #endif }, - { /* [531] */ + { /* [533] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8097,7 +8127,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPPHCR" #endif }, - { /* [532] */ + { /* [534] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8112,7 +8142,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessSLTP" #endif }, - { /* [533] */ + { /* [535] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8127,7 +8157,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPGUID" #endif }, - { /* [534] */ + { /* [536] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8142,7 +8172,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPPRT" #endif }, - { /* [535] */ + { /* [537] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8157,7 +8187,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPTYS" #endif }, - { /* [536] */ + { /* [538] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8172,7 +8202,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessSLRG" #endif }, - { /* [537] */ + { /* [539] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8187,7 +8217,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPMAOS" #endif }, - { /* [538] */ + { /* [540] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8202,7 +8232,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPPLR" #endif }, - { /* [539] */ + { /* [541] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8217,7 +8247,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetSupportedCounters" #endif }, - { /* [540] */ + { /* [542] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8232,7 +8262,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMORD" #endif }, - { /* [541] */ + { /* [543] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8247,7 +8277,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTRC_CAP" #endif }, - { /* [542] */ + { /* [544] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8262,7 +8292,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTRC_CONF" #endif }, - { /* [543] */ + { /* [545] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8277,7 +8307,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTRC_CTRL" #endif }, - { /* [544] */ + { /* [546] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8292,7 +8322,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTEIM" #endif }, - { /* [545] */ + { /* [547] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8307,7 +8337,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTIE" #endif }, - { /* [546] */ + { /* [548] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8322,7 +8352,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTIM" #endif }, - { /* [547] */ + { /* [549] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8337,7 +8367,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMPSCR" #endif }, - { /* [548] */ + { /* [550] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8352,7 +8382,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTSR" #endif }, - { /* [549] */ + { /* [551] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8367,7 +8397,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPPSLS" #endif }, - { /* [550] */ + { /* [552] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8382,7 +8412,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMLPC" #endif }, - { /* [551] */ + { /* [553] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8397,7 +8427,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPLIB" #endif }, - { /* [552] */ + { /* [554] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8412,7 +8442,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdSetNvlinkHwErrorInjectSettings" #endif }, - { /* [553] */ + { /* [555] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8427,7 +8457,67 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGetNvlinkHwErrorInjectSettings" #endif }, - { /* [554] */ + { /* [556] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkGetPlatformInfo_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20803083u, + /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_GET_PLATFORM_INFO_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdNvlinkGetPlatformInfo" +#endif + }, + { /* [557] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkGetSupportedBWMode_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20803085u, + /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_GET_SUPPORTED_BW_MODE_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdNvlinkGetSupportedBWMode" +#endif + }, + { /* [558] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkSetBWMode_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) + /*flags=*/ 0x4u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20803086u, + /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_SET_BW_MODE_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdNvlinkSetBWMode" +#endif + }, + { /* [559] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdNvlinkGetBWMode_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20803087u, + /*paramSize=*/ sizeof(NV2080_CTRL_NVLINK_GET_BW_MODE_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdNvlinkGetBWMode" +#endif + }, + { /* [560] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8442,7 +8532,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlcnGetDmemUsage" #endif }, - { /* [555] */ + { /* [561] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8457,7 +8547,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlcnGetEngineArch" #endif }, - { /* [556] */ + { /* [562] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8472,7 +8562,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlcnUstreamerQueueInfo" #endif }, - { /* [557] */ + { /* [563] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8487,7 +8577,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlcnUstreamerControlGet" #endif }, - { /* [558] */ + { /* [564] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8502,7 +8592,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlcnUstreamerControlSet" #endif }, - { /* [559] */ + { /* [565] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8517,7 +8607,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlcnGetCtxBufferInfo" #endif }, - { /* [560] */ + { /* [566] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8532,7 +8622,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlcnGetCtxBufferSize" #endif }, - { /* [561] */ + { /* [567] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8547,43 +8637,28 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdEccGetClientExposedCounters" #endif }, - { /* [562] */ + { /* [568] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdEccGetEciCounters_IMPL, + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdEccGetVolatileCounts_IMPL, #endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803401u, - /*paramSize=*/ sizeof(NV2080_CTRL_ECC_GET_ECI_COUNTERS_PARAMS), + /*paramSize=*/ sizeof(NV2080_CTRL_ECC_GET_VOLATILE_COUNTS_PARAMS), /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), #if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdEccGetEciCounters" + /*func=*/ "subdeviceCtrlCmdEccGetVolatileCounts" #endif }, - { /* [563] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + { /* [569] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdEccGetVolatileCounts_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) - /*flags=*/ 0x48u, - /*accessRight=*/0x0u, - /*methodId=*/ 0x20803402u, - /*paramSize=*/ sizeof(NV2080_CTRL_ECC_GET_VOLATILE_COUNTS_PARAMS), - /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), -#if NV_PRINTF_STRINGS_ALLOWED - /*func=*/ "subdeviceCtrlCmdEccGetVolatileCounts" -#endif - }, - { /* [564] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - /*pFunc=*/ (void (*)(void)) NULL, -#else - /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFlaRange_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - /*flags=*/ 0x8u, + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdFlaRange_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0x20803501u, /*paramSize=*/ sizeof(NV2080_CTRL_FLA_RANGE_PARAMS), @@ -8592,7 +8667,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlaRange" #endif }, - { /* [565] */ + { /* [570] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10244u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8607,7 +8682,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlaSetupInstanceMemBlock" #endif }, - { /* [566] */ + { /* [571] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10004u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8622,7 +8697,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlaGetRange" #endif }, - { /* [567] */ + { /* [572] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8637,7 +8712,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlaGetFabricMemStats" #endif }, - { /* [568] */ + { /* [573] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40549u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8652,7 +8727,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGspGetFeatures" #endif }, - { /* [569] */ + { /* [574] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8667,7 +8742,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGspGetRmHeapStats" #endif }, - { /* [570] */ + { /* [575] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8682,7 +8757,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGrmgrGetGrFsInfo" #endif }, - { /* [571] */ + { /* [576] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x3u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8697,7 +8772,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdOsUnixGc6BlockerRefCnt" #endif }, - { /* [572] */ + { /* [577] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8712,7 +8787,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdOsUnixAllowDisallowGcoff" #endif }, - { /* [573] */ + { /* [578] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8727,7 +8802,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdOsUnixAudioDynamicPower" #endif }, - { /* [574] */ + { /* [579] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xbu) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8742,7 +8817,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdOsUnixVidmemPersistenceStatus" #endif }, - { /* [575] */ + { /* [580] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8757,7 +8832,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdOsUnixUpdateTgpStatus" #endif }, - { /* [576] */ + { /* [581] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8772,7 +8847,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalBootloadGspVgpuPluginTask" #endif }, - { /* [577] */ + { /* [582] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8787,7 +8862,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalShutdownGspVgpuPluginTask" #endif }, - { /* [578] */ + { /* [583] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8802,7 +8877,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalPgpuAddVgpuType" #endif }, - { /* [579] */ + { /* [584] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8817,7 +8892,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalEnumerateVgpuPerPgpu" #endif }, - { /* [580] */ + { /* [585] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8832,7 +8907,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalClearGuestVmInfo" #endif }, - { /* [581] */ + { /* [586] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8847,13 +8922,13 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalGetVgpuFbUsage" #endif }, - { /* [582] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + { /* [587] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d0u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdVgpuMgrInternalSetVgpuEncoderCapacity_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) - /*flags=*/ 0xc0u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d0u) + /*flags=*/ 0x1d0u, /*accessRight=*/0x0u, /*methodId=*/ 0x20804007u, /*paramSize=*/ sizeof(NV2080_CTRL_VGPU_MGR_INTERNAL_SET_VGPU_ENCODER_CAPACITY_PARAMS), @@ -8862,7 +8937,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalSetVgpuEncoderCapacity" #endif }, - { /* [583] */ + { /* [588] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8877,7 +8952,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalCleanupGspVgpuPluginResources" #endif }, - { /* [584] */ + { /* [589] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8892,7 +8967,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalGetPgpuFsEncoding" #endif }, - { /* [585] */ + { /* [590] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8907,7 +8982,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalGetPgpuMigrationSupport" #endif }, - { /* [586] */ + { /* [591] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8922,7 +8997,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalSetVgpuMgrConfig" #endif }, - { /* [587] */ + { /* [592] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8937,7 +9012,22 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalFreeStates" #endif }, - { /* [588] */ + { /* [593] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) subdeviceCtrlCmdVgpuMgrInternalGetFrameRateLimiterStatus_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + /*flags=*/ 0xc0u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x2080400du, + /*paramSize=*/ sizeof(NV2080_CTRL_VGPU_MGR_GET_FRAME_RATE_LIMITER_STATUS_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalGetFrameRateLimiterStatus" +#endif + }, + { /* [594] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8952,7 +9042,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGetAvailableHshubMask" #endif }, - { /* [589] */ + { /* [595] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8967,7 +9057,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlSetEcThrottleMode" #endif }, - { /* [590] */ + { /* [596] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8985,165 +9075,243 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +void __nvoc_down_thunk_Subdevice_resPreDestruct(struct RsResource *pResource); // this +NV_STATUS __nvoc_down_thunk_Subdevice_gpuresInternalControlForward(struct GpuResource *pSubdevice, NvU32 command, void *pParams, NvU32 size); // this + // 2 down-thunk(s) defined to bridge methods in Subdevice from superclasses // subdevicePreDestruct: virtual override (res) base (gpures) -static void __nvoc_down_thunk_Subdevice_resPreDestruct(struct RsResource *pResource) { +void __nvoc_down_thunk_Subdevice_resPreDestruct(struct RsResource *pResource) { subdevicePreDestruct((struct Subdevice *)(((unsigned char *) pResource) - __nvoc_rtti_Subdevice_RsResource.offset)); } // subdeviceInternalControlForward: virtual override (gpures) base (gpures) -static NV_STATUS __nvoc_down_thunk_Subdevice_gpuresInternalControlForward(struct GpuResource *pSubdevice, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_down_thunk_Subdevice_gpuresInternalControlForward(struct GpuResource *pSubdevice, NvU32 command, void *pParams, NvU32 size) { return subdeviceInternalControlForward((struct Subdevice *)(((unsigned char *) pSubdevice) - __nvoc_rtti_Subdevice_GpuResource.offset), command, pParams, size); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_subdeviceControl(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_subdeviceMap(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_subdeviceUnmap(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_subdeviceShareCallback(struct Subdevice *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_subdeviceGetRegBaseOffsetAndSize(struct Subdevice *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_subdeviceGetMapAddrSpace(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NvHandle __nvoc_up_thunk_GpuResource_subdeviceGetInternalObjectHandle(struct Subdevice *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_subdeviceAccessCallback(struct Subdevice *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_subdeviceGetMemInterMapParams(struct Subdevice *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_subdeviceCheckMemInterUnmap(struct Subdevice *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_subdeviceGetMemoryMappingDescriptor(struct Subdevice *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_subdeviceControlSerialization_Prologue(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_subdeviceControlSerialization_Epilogue(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_subdeviceControl_Prologue(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_subdeviceControl_Epilogue(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_subdeviceCanCopy(struct Subdevice *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_subdeviceIsDuplicate(struct Subdevice *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +NV_STATUS __nvoc_up_thunk_RsResource_subdeviceControlFilter(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_subdeviceIsPartialUnmapSupported(struct Subdevice *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_subdeviceMapTo(struct Subdevice *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_subdeviceUnmapFrom(struct Subdevice *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_subdeviceGetRefCount(struct Subdevice *pResource); // this +void __nvoc_up_thunk_RsResource_subdeviceAddAdditionalDependants(struct RsClient *pClient, struct Subdevice *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_subdeviceGetNotificationListPtr(struct Subdevice *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_subdeviceGetNotificationShare(struct Subdevice *pNotifier); // this +void __nvoc_up_thunk_Notifier_subdeviceSetNotificationShare(struct Subdevice *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_subdeviceUnregisterEvent(struct Subdevice *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_subdeviceGetOrAllocNotifShare(struct Subdevice *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 28 up-thunk(s) defined to bridge methods in Subdevice to superclasses // subdeviceControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_subdeviceControl(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_subdeviceControl(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Subdevice_GpuResource.offset), pCallContext, pParams); } // subdeviceMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_subdeviceMap(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_subdeviceMap(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Subdevice_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // subdeviceUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_subdeviceUnmap(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_subdeviceUnmap(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Subdevice_GpuResource.offset), pCallContext, pCpuMapping); } // subdeviceShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_subdeviceShareCallback(struct Subdevice *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_subdeviceShareCallback(struct Subdevice *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Subdevice_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // subdeviceGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_subdeviceGetRegBaseOffsetAndSize(struct Subdevice *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_subdeviceGetRegBaseOffsetAndSize(struct Subdevice *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Subdevice_GpuResource.offset), pGpu, pOffset, pSize); } // subdeviceGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_subdeviceGetMapAddrSpace(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_subdeviceGetMapAddrSpace(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Subdevice_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // subdeviceGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_subdeviceGetInternalObjectHandle(struct Subdevice *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_subdeviceGetInternalObjectHandle(struct Subdevice *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_Subdevice_GpuResource.offset)); } // subdeviceAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_subdeviceAccessCallback(struct Subdevice *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_subdeviceAccessCallback(struct Subdevice *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // subdeviceGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_subdeviceGetMemInterMapParams(struct Subdevice *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_subdeviceGetMemInterMapParams(struct Subdevice *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Subdevice_RmResource.offset), pParams); } // subdeviceCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_subdeviceCheckMemInterUnmap(struct Subdevice *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_subdeviceCheckMemInterUnmap(struct Subdevice *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Subdevice_RmResource.offset), bSubdeviceHandleProvided); } // subdeviceGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_subdeviceGetMemoryMappingDescriptor(struct Subdevice *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_subdeviceGetMemoryMappingDescriptor(struct Subdevice *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_Subdevice_RmResource.offset), ppMemDesc); } // subdeviceControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_subdeviceControlSerialization_Prologue(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_subdeviceControlSerialization_Prologue(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RmResource.offset), pCallContext, pParams); } // subdeviceControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_subdeviceControlSerialization_Epilogue(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_subdeviceControlSerialization_Epilogue(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RmResource.offset), pCallContext, pParams); } // subdeviceControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_subdeviceControl_Prologue(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_subdeviceControl_Prologue(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RmResource.offset), pCallContext, pParams); } // subdeviceControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_subdeviceControl_Epilogue(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_subdeviceControl_Epilogue(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RmResource.offset), pCallContext, pParams); } // subdeviceCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_subdeviceCanCopy(struct Subdevice *pResource) { +NvBool __nvoc_up_thunk_RsResource_subdeviceCanCopy(struct Subdevice *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RsResource.offset)); } // subdeviceIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_subdeviceIsDuplicate(struct Subdevice *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_subdeviceIsDuplicate(struct Subdevice *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RsResource.offset), hMemory, pDuplicate); } // subdeviceControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_subdeviceControlFilter(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_subdeviceControlFilter(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RsResource.offset), pCallContext, pParams); } // subdeviceIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_subdeviceIsPartialUnmapSupported(struct Subdevice *pResource) { +NvBool __nvoc_up_thunk_RsResource_subdeviceIsPartialUnmapSupported(struct Subdevice *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RsResource.offset)); } // subdeviceMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_subdeviceMapTo(struct Subdevice *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_subdeviceMapTo(struct Subdevice *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RsResource.offset), pParams); } // subdeviceUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_subdeviceUnmapFrom(struct Subdevice *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_subdeviceUnmapFrom(struct Subdevice *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RsResource.offset), pParams); } // subdeviceGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_subdeviceGetRefCount(struct Subdevice *pResource) { +NvU32 __nvoc_up_thunk_RsResource_subdeviceGetRefCount(struct Subdevice *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RsResource.offset)); } // subdeviceAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_subdeviceAddAdditionalDependants(struct RsClient *pClient, struct Subdevice *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_subdeviceAddAdditionalDependants(struct RsClient *pClient, struct Subdevice *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_Subdevice_RsResource.offset), pReference); } // subdeviceGetNotificationListPtr: virtual inherited (notify) base (notify) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_subdeviceGetNotificationListPtr(struct Subdevice *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_subdeviceGetNotificationListPtr(struct Subdevice *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_Subdevice_Notifier.offset)); } // subdeviceGetNotificationShare: virtual inherited (notify) base (notify) -static struct NotifShare * __nvoc_up_thunk_Notifier_subdeviceGetNotificationShare(struct Subdevice *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_subdeviceGetNotificationShare(struct Subdevice *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_Subdevice_Notifier.offset)); } // subdeviceSetNotificationShare: virtual inherited (notify) base (notify) -static void __nvoc_up_thunk_Notifier_subdeviceSetNotificationShare(struct Subdevice *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_subdeviceSetNotificationShare(struct Subdevice *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_Subdevice_Notifier.offset), pNotifShare); } // subdeviceUnregisterEvent: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_subdeviceUnregisterEvent(struct Subdevice *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_subdeviceUnregisterEvent(struct Subdevice *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_Subdevice_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // subdeviceGetOrAllocNotifShare: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_subdeviceGetOrAllocNotifShare(struct Subdevice *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_subdeviceGetOrAllocNotifShare(struct Subdevice *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_Subdevice_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } const struct NVOC_EXPORT_INFO __nvoc_export_info_Subdevice = { - /*numEntries=*/ 591, + /*numEntries=*/ 597, /*pExportEntries=*/ __nvoc_exported_method_def_Subdevice }; @@ -9198,18 +9366,10 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // subdevicePreDestruct -- virtual override (res) base (gpures) - pThis->__subdevicePreDestruct__ = &subdevicePreDestruct_IMPL; - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ = &__nvoc_down_thunk_Subdevice_resPreDestruct; - - // subdeviceInternalControlForward -- virtual override (gpures) base (gpures) - pThis->__subdeviceInternalControlForward__ = &subdeviceInternalControlForward_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresInternalControlForward__ = &__nvoc_down_thunk_Subdevice_gpuresInternalControlForward; - // subdeviceCtrlCmdBiosGetInfoV2 -- halified (2 hals) exported (id=0x20800810) body if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { - pThis->__subdeviceCtrlCmdBiosGetInfoV2__ = &subdeviceCtrlCmdBiosGetInfoV2_ac1694; + pThis->__subdeviceCtrlCmdBiosGetInfoV2__ = &subdeviceCtrlCmdBiosGetInfoV2_VF; } else { @@ -9256,16 +9416,6 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdMcGetManufacturer__ = &subdeviceCtrlCmdMcGetManufacturer_IMPL; #endif - // subdeviceCtrlCmdMcQueryHostclkSlowdownStatus -- exported (id=0x20801708) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - pThis->__subdeviceCtrlCmdMcQueryHostclkSlowdownStatus__ = &subdeviceCtrlCmdMcQueryHostclkSlowdownStatus_IMPL; -#endif - - // subdeviceCtrlCmdMcSetHostclkSlowdownStatus -- exported (id=0x20801709) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - pThis->__subdeviceCtrlCmdMcSetHostclkSlowdownStatus__ = &subdeviceCtrlCmdMcSetHostclkSlowdownStatus_IMPL; -#endif - // subdeviceCtrlCmdMcChangeReplayableFaultOwnership -- exported (id=0x2080170c) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) pThis->__subdeviceCtrlCmdMcChangeReplayableFaultOwnership__ = &subdeviceCtrlCmdMcChangeReplayableFaultOwnership_IMPL; @@ -9471,6 +9621,21 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdNvlinkGetSupportedCounters__ = &subdeviceCtrlCmdNvlinkGetSupportedCounters_IMPL; #endif + // subdeviceCtrlCmdNvlinkGetSupportedBWMode -- exported (id=0x20803085) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + pThis->__subdeviceCtrlCmdNvlinkGetSupportedBWMode__ = &subdeviceCtrlCmdNvlinkGetSupportedBWMode_IMPL; +#endif + + // subdeviceCtrlCmdNvlinkGetBWMode -- exported (id=0x20803087) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + pThis->__subdeviceCtrlCmdNvlinkGetBWMode__ = &subdeviceCtrlCmdNvlinkGetBWMode_IMPL; +#endif + + // subdeviceCtrlCmdNvlinkSetBWMode -- exported (id=0x20803086) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) + pThis->__subdeviceCtrlCmdNvlinkSetBWMode__ = &subdeviceCtrlCmdNvlinkSetBWMode_IMPL; +#endif + // subdeviceCtrlCmdGetNvlinkCountersV2 -- exported (id=0x20803050) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdGetNvlinkCountersV2__ = &subdeviceCtrlCmdGetNvlinkCountersV2_IMPL; @@ -9561,46 +9726,11 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdNvlinkClearLpCounters__ = &subdeviceCtrlCmdNvlinkClearLpCounters_IMPL; #endif - // subdeviceCtrlCmdNvlinkEnableNvlinkPeer -- exported (id=0x20803017) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) - pThis->__subdeviceCtrlCmdNvlinkEnableNvlinkPeer__ = &subdeviceCtrlCmdNvlinkEnableNvlinkPeer_IMPL; -#endif - - // subdeviceCtrlCmdNvlinkCoreCallback -- exported (id=0x20803019) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) - pThis->__subdeviceCtrlCmdNvlinkCoreCallback__ = &subdeviceCtrlCmdNvlinkCoreCallback_IMPL; -#endif - - // subdeviceCtrlCmdNvlinkGetAliEnabled -- exported (id=0x2080301a) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) - pThis->__subdeviceCtrlCmdNvlinkGetAliEnabled__ = &subdeviceCtrlCmdNvlinkGetAliEnabled_IMPL; -#endif - // subdeviceCtrlCmdNvlinkSetLoopbackMode -- exported (id=0x20803023) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) pThis->__subdeviceCtrlCmdNvlinkSetLoopbackMode__ = &subdeviceCtrlCmdNvlinkSetLoopbackMode_IMPL; #endif - // subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid -- exported (id=0x2080301b) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) - pThis->__subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid__ = &subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid_IMPL; -#endif - - // subdeviceCtrlCmdNvlinkUpdateHshubMux -- exported (id=0x2080301c) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) - pThis->__subdeviceCtrlCmdNvlinkUpdateHshubMux__ = &subdeviceCtrlCmdNvlinkUpdateHshubMux_IMPL; -#endif - - // subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer -- exported (id=0x2080301d) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) - pThis->__subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer__ = &subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer_IMPL; -#endif - - // subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer -- exported (id=0x2080301e) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) - pThis->__subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer__ = &subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer_IMPL; -#endif - // subdeviceCtrlCmdNvlinkRemoveNvlinkMapping -- exported (id=0x2080301f) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) pThis->__subdeviceCtrlCmdNvlinkRemoveNvlinkMapping__ = &subdeviceCtrlCmdNvlinkRemoveNvlinkMapping_IMPL; @@ -9781,6 +9911,11 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdNvlinkGetPortEvents__ = &subdeviceCtrlCmdNvlinkGetPortEvents_IMPL; #endif + // subdeviceCtrlCmdNvlinkIsGpuDegraded -- exported (id=0x20803041) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) + pThis->__subdeviceCtrlCmdNvlinkIsGpuDegraded__ = &subdeviceCtrlCmdNvlinkIsGpuDegraded_IMPL; +#endif + // subdeviceCtrlCmdNvlinkPRMAccessPAOS -- exported (id=0x20803047) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdNvlinkPRMAccessPAOS__ = &subdeviceCtrlCmdNvlinkPRMAccessPAOS_IMPL; @@ -9811,11 +9946,6 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdNvlinkPRMAccessMTECR__ = &subdeviceCtrlCmdNvlinkPRMAccessMTECR_IMPL; #endif - // subdeviceCtrlCmdNvlinkPRMAccessMTWE -- exported (id=0x2080305d) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) - pThis->__subdeviceCtrlCmdNvlinkPRMAccessMTWE__ = &subdeviceCtrlCmdNvlinkPRMAccessMTWE_IMPL; -#endif - // subdeviceCtrlCmdNvlinkPRMAccessMTEWE -- exported (id=0x2080305e) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdNvlinkPRMAccessMTEWE__ = &subdeviceCtrlCmdNvlinkPRMAccessMTEWE_IMPL; @@ -9836,11 +9966,6 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdNvlinkPRMAccessPMTU__ = &subdeviceCtrlCmdNvlinkPRMAccessPMTU_IMPL; #endif - // subdeviceCtrlCmdNvlinkPRMAccessMCIA -- exported (id=0x20803063) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) - pThis->__subdeviceCtrlCmdNvlinkPRMAccessMCIA__ = &subdeviceCtrlCmdNvlinkPRMAccessMCIA_IMPL; -#endif - // subdeviceCtrlCmdNvlinkPRMAccessPMLP -- exported (id=0x20803064) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) pThis->__subdeviceCtrlCmdNvlinkPRMAccessPMLP__ = &subdeviceCtrlCmdNvlinkPRMAccessPMLP_IMPL; @@ -9976,6 +10101,11 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdNvlinkPRMAccessPLIB__ = &subdeviceCtrlCmdNvlinkPRMAccessPLIB_IMPL; #endif + // subdeviceCtrlCmdNvlinkGetPlatformInfo -- exported (id=0x20803083) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + pThis->__subdeviceCtrlCmdNvlinkGetPlatformInfo__ = &subdeviceCtrlCmdNvlinkGetPlatformInfo_IMPL; +#endif + // subdeviceCtrlCmdI2cReadBuffer -- exported (id=0x20800601) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdI2cReadBuffer__ = &subdeviceCtrlCmdI2cReadBuffer_IMPL; @@ -10128,11 +10258,6 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdFbGetInfoV2__ = &subdeviceCtrlCmdFbGetInfoV2_IMPL; #endif - // subdeviceCtrlCmdFbGetCarveoutAddressInfo -- exported (id=0x2080130b) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - pThis->__subdeviceCtrlCmdFbGetCarveoutAddressInfo__ = &subdeviceCtrlCmdFbGetCarveoutAddressInfo_IMPL; -#endif - // subdeviceCtrlCmdFbGetCalibrationLockFailed -- exported (id=0x2080130c) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdFbGetCalibrationLockFailed__ = &subdeviceCtrlCmdFbGetCalibrationLockFailed_IMPL; @@ -10143,26 +10268,6 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdFbFlushGpuCache__ = &subdeviceCtrlCmdFbFlushGpuCache_IMPL; #endif - // subdeviceCtrlCmdFbSetGpuCacheAllocPolicy -- exported (id=0x2080130f) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - pThis->__subdeviceCtrlCmdFbSetGpuCacheAllocPolicy__ = &subdeviceCtrlCmdFbSetGpuCacheAllocPolicy_IMPL; -#endif - - // subdeviceCtrlCmdFbGetGpuCacheAllocPolicy -- exported (id=0x20801312) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - pThis->__subdeviceCtrlCmdFbGetGpuCacheAllocPolicy__ = &subdeviceCtrlCmdFbGetGpuCacheAllocPolicy_IMPL; -#endif - - // subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2 -- exported (id=0x20801318) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - pThis->__subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2__ = &subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2_IMPL; -#endif - - // subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2 -- exported (id=0x20801319) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) - pThis->__subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2__ = &subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2_IMPL; -#endif - // subdeviceCtrlCmdFbGetGpuCacheInfo -- exported (id=0x20801315) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40148u) pThis->__subdeviceCtrlCmdFbGetGpuCacheInfo__ = &subdeviceCtrlCmdFbGetGpuCacheInfo_IMPL; @@ -10209,7 +10314,7 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * #endif // subdeviceCtrlCmdFbGetRemappedRows -- exported (id=0x20801344) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x58u) pThis->__subdeviceCtrlCmdFbGetRemappedRows__ = &subdeviceCtrlCmdFbGetRemappedRows_IMPL; #endif @@ -10219,7 +10324,7 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * #endif // subdeviceCtrlCmdFbGetRowRemapperHistogram -- exported (id=0x20801347) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x58u) pThis->__subdeviceCtrlCmdFbGetRowRemapperHistogram__ = &subdeviceCtrlCmdFbGetRowRemapperHistogram_IMPL; #endif @@ -10328,6 +10433,11 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdGmmuCommitTlbInvalidate__ = &subdeviceCtrlCmdGmmuCommitTlbInvalidate_IMPL; #endif + // subdeviceCtrlCmdFbGetStaticBar1Info -- exported (id=0x20801354) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + pThis->__subdeviceCtrlCmdFbGetStaticBar1Info__ = &subdeviceCtrlCmdFbGetStaticBar1Info_IMPL; +#endif + // subdeviceCtrlCmdSetGpfifo -- exported (id=0x20801102) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdSetGpfifo__ = &subdeviceCtrlCmdSetGpfifo_IMPL; @@ -10492,16 +10602,6 @@ static void __nvoc_init_funcTable_Subdevice_1(Subdevice *pThis, RmHalspecOwner * #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10au) pThis->__subdeviceCtrlCmdKGrGetCapsV2__ = &subdeviceCtrlCmdKGrGetCapsV2_IMPL; #endif -} // End __nvoc_init_funcTable_Subdevice_1 with approximately 263 basic block(s). - -// Vtable initialization 2/3 -static void __nvoc_init_funcTable_Subdevice_2(Subdevice *pThis, RmHalspecOwner *pRmhalspecowner) { - RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; - const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; - PORT_UNREFERENCED_VARIABLE(pThis); - PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); - PORT_UNREFERENCED_VARIABLE(rmVariantHal); - PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); // subdeviceCtrlCmdKGrGetCtxswModes -- exported (id=0x20801235) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) @@ -10572,6 +10672,16 @@ static void __nvoc_init_funcTable_Subdevice_2(Subdevice *pThis, RmHalspecOwner * #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x348u) pThis->__subdeviceCtrlCmdKGrSetCtxswPreemptionMode__ = &subdeviceCtrlCmdKGrSetCtxswPreemptionMode_IMPL; #endif +} // End __nvoc_init_funcTable_Subdevice_1 with approximately 263 basic block(s). + +// Vtable initialization 2/3 +static void __nvoc_init_funcTable_Subdevice_2(Subdevice *pThis, RmHalspecOwner *pRmhalspecowner) { + RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; + const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; + PORT_UNREFERENCED_VARIABLE(pThis); + PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); + PORT_UNREFERENCED_VARIABLE(rmVariantHal); + PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); // subdeviceCtrlCmdKGrCtxswPreemptionBind -- exported (id=0x20801211) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) @@ -10888,11 +10998,6 @@ static void __nvoc_init_funcTable_Subdevice_2(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdGpuGetSdm__ = &subdeviceCtrlCmdGpuGetSdm_IMPL; #endif - // subdeviceCtrlCmdGpuSetSdm -- exported (id=0x20800120) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x114u) - pThis->__subdeviceCtrlCmdGpuSetSdm__ = &subdeviceCtrlCmdGpuSetSdm_IMPL; -#endif - // subdeviceCtrlCmdGpuGetSimulationInfo -- exported (id=0x20800119) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50bu) pThis->__subdeviceCtrlCmdGpuGetSimulationInfo__ = &subdeviceCtrlCmdGpuGetSimulationInfo_IMPL; @@ -11173,8 +11278,28 @@ static void __nvoc_init_funcTable_Subdevice_2(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdGetGpuFabricProbeInfo__ = &subdeviceCtrlCmdGetGpuFabricProbeInfo_IMPL; #endif + // subdeviceCtrlCmdGpuMarkDeviceForReset -- exported (id=0x208001a9) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100048u) + pThis->__subdeviceCtrlCmdGpuMarkDeviceForReset__ = &subdeviceCtrlCmdGpuMarkDeviceForReset_IMPL; +#endif + + // subdeviceCtrlCmdGpuUnmarkDeviceForReset -- exported (id=0x208001aa) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100048u) + pThis->__subdeviceCtrlCmdGpuUnmarkDeviceForReset__ = &subdeviceCtrlCmdGpuUnmarkDeviceForReset_IMPL; +#endif + + // subdeviceCtrlCmdGpuMarkDeviceForDrainAndReset -- exported (id=0x208001ac) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100048u) + pThis->__subdeviceCtrlCmdGpuMarkDeviceForDrainAndReset__ = &subdeviceCtrlCmdGpuMarkDeviceForDrainAndReset_IMPL; +#endif + + // subdeviceCtrlCmdGpuUnmarkDeviceForDrainAndReset -- exported (id=0x208001ad) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100048u) + pThis->__subdeviceCtrlCmdGpuUnmarkDeviceForDrainAndReset__ = &subdeviceCtrlCmdGpuUnmarkDeviceForDrainAndReset_IMPL; +#endif + // subdeviceCtrlCmdGpuGetResetStatus -- exported (id=0x208001ab) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) pThis->__subdeviceCtrlCmdGpuGetResetStatus__ = &subdeviceCtrlCmdGpuGetResetStatus_IMPL; #endif @@ -11198,6 +11323,11 @@ static void __nvoc_init_funcTable_Subdevice_2(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdGpuGetVfCaps__ = &subdeviceCtrlCmdGpuGetVfCaps_IMPL; #endif + // subdeviceCtrlCmdGpuGetRecoveryAction -- exported (id=0x208001b2) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) + pThis->__subdeviceCtrlCmdGpuGetRecoveryAction__ = &subdeviceCtrlCmdGpuGetRecoveryAction_IMPL; +#endif + // subdeviceCtrlCmdEventSetTrigger -- exported (id=0x20800302) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__subdeviceCtrlCmdEventSetTrigger__ = &subdeviceCtrlCmdEventSetTrigger_IMPL; @@ -11463,6 +11593,11 @@ static void __nvoc_init_funcTable_Subdevice_2(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdCeGetDecompLceMask__ = &subdeviceCtrlCmdCeGetDecompLceMask_IMPL; #endif + // subdeviceCtrlCmdCeIsDecompLceEnabled -- exported (id=0x20802a12) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x154u) + pThis->__subdeviceCtrlCmdCeIsDecompLceEnabled__ = &subdeviceCtrlCmdCeIsDecompLceEnabled_IMPL; +#endif + // subdeviceCtrlCmdFlcnGetDmemUsage -- exported (id=0x20803101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdFlcnGetDmemUsage__ = &subdeviceCtrlCmdFlcnGetDmemUsage_IMPL; @@ -11503,12 +11638,7 @@ static void __nvoc_init_funcTable_Subdevice_2(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdEccGetClientExposedCounters__ = &subdeviceCtrlCmdEccGetClientExposedCounters_IMPL; #endif - // subdeviceCtrlCmdEccGetEciCounters -- exported (id=0x20803401) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) - pThis->__subdeviceCtrlCmdEccGetEciCounters__ = &subdeviceCtrlCmdEccGetEciCounters_IMPL; -#endif - - // subdeviceCtrlCmdEccGetVolatileCounts -- exported (id=0x20803402) + // subdeviceCtrlCmdEccGetVolatileCounts -- exported (id=0x20803401) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__subdeviceCtrlCmdEccGetVolatileCounts__ = &subdeviceCtrlCmdEccGetVolatileCounts_IMPL; #endif @@ -11817,16 +11947,6 @@ static void __nvoc_init_funcTable_Subdevice_2(Subdevice *pThis, RmHalspecOwner * #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalBusFlushWithSysmembar__ = &subdeviceCtrlCmdInternalBusFlushWithSysmembar_IMPL; #endif -} // End __nvoc_init_funcTable_Subdevice_2 with approximately 263 basic block(s). - -// Vtable initialization 3/3 -static void __nvoc_init_funcTable_Subdevice_3(Subdevice *pThis, RmHalspecOwner *pRmhalspecowner) { - RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; - const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; - PORT_UNREFERENCED_VARIABLE(pThis); - PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); - PORT_UNREFERENCED_VARIABLE(rmVariantHal); - PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); // subdeviceCtrlCmdInternalBusSetupP2pMailboxLocal -- exported (id=0x20800a71) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) @@ -11853,6 +11973,11 @@ static void __nvoc_init_funcTable_Subdevice_3(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping__ = &subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping_IMPL; #endif + // subdeviceCtrlCmdInternalGpuGetPFBar1Spa -- exported (id=0x20800aee) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + pThis->__subdeviceCtrlCmdInternalGpuGetPFBar1Spa__ = &subdeviceCtrlCmdInternalGpuGetPFBar1Spa_IMPL; +#endif + // subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries -- exported (id=0x20800a57) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries__ = &subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries_IMPL; @@ -11872,6 +11997,16 @@ static void __nvoc_init_funcTable_Subdevice_3(Subdevice *pThis, RmHalspecOwner * #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) pThis->__subdeviceCtrlCmdInternalGmmuUnregisterFaultBuffer__ = &subdeviceCtrlCmdInternalGmmuUnregisterFaultBuffer_IMPL; #endif +} // End __nvoc_init_funcTable_Subdevice_2 with approximately 263 basic block(s). + +// Vtable initialization 3/3 +static void __nvoc_init_funcTable_Subdevice_3(Subdevice *pThis, RmHalspecOwner *pRmhalspecowner) { + RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; + const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; + PORT_UNREFERENCED_VARIABLE(pThis); + PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); + PORT_UNREFERENCED_VARIABLE(rmVariantHal); + PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); // subdeviceCtrlCmdInternalGmmuRegisterClientShadowFaultBuffer -- exported (id=0x20800a9d) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) @@ -12078,6 +12213,41 @@ static void __nvoc_init_funcTable_Subdevice_3(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdInternalNvlinkPostFatalErrorRecovery__ = &subdeviceCtrlCmdInternalNvlinkPostFatalErrorRecovery_IMPL; #endif + // subdeviceCtrlCmdInternalNvlinkEnableNvlinkPeer -- exported (id=0x20800a21) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc1u) + pThis->__subdeviceCtrlCmdInternalNvlinkEnableNvlinkPeer__ = &subdeviceCtrlCmdInternalNvlinkEnableNvlinkPeer_IMPL; +#endif + + // subdeviceCtrlCmdInternalNvlinkCoreCallback -- exported (id=0x20800a24) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) + pThis->__subdeviceCtrlCmdInternalNvlinkCoreCallback__ = &subdeviceCtrlCmdInternalNvlinkCoreCallback_IMPL; +#endif + + // subdeviceCtrlCmdInternalNvlinkUpdateRemoteLocalSid -- exported (id=0x20800a25) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) + pThis->__subdeviceCtrlCmdInternalNvlinkUpdateRemoteLocalSid__ = &subdeviceCtrlCmdInternalNvlinkUpdateRemoteLocalSid_IMPL; +#endif + + // subdeviceCtrlCmdInternalNvlinkGetAliEnabled -- exported (id=0x20800a29) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + pThis->__subdeviceCtrlCmdInternalNvlinkGetAliEnabled__ = &subdeviceCtrlCmdInternalNvlinkGetAliEnabled_IMPL; +#endif + + // subdeviceCtrlCmdInternalNvlinkPreSetupNvlinkPeer -- exported (id=0x20800a4e) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) + pThis->__subdeviceCtrlCmdInternalNvlinkPreSetupNvlinkPeer__ = &subdeviceCtrlCmdInternalNvlinkPreSetupNvlinkPeer_IMPL; +#endif + + // subdeviceCtrlCmdInternalNvlinkPostSetupNvlinkPeer -- exported (id=0x20800a50) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) + pThis->__subdeviceCtrlCmdInternalNvlinkPostSetupNvlinkPeer__ = &subdeviceCtrlCmdInternalNvlinkPostSetupNvlinkPeer_IMPL; +#endif + + // subdeviceCtrlCmdInternalNvlinkUpdateHshubMux -- exported (id=0x20800a42) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) + pThis->__subdeviceCtrlCmdInternalNvlinkUpdateHshubMux__ = &subdeviceCtrlCmdInternalNvlinkUpdateHshubMux_IMPL; +#endif + // subdeviceCtrlCmdInternalSetP2pCaps -- exported (id=0x20800ab5) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalSetP2pCaps__ = &subdeviceCtrlCmdInternalSetP2pCaps_IMPL; @@ -12148,6 +12318,16 @@ static void __nvoc_init_funcTable_Subdevice_3(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync__ = &subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync_IMPL; #endif + // subdeviceCtrlCmdInternalGsyncApplyStereoPinAlwaysHiWar -- exported (id=0x20800aed) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + pThis->__subdeviceCtrlCmdInternalGsyncApplyStereoPinAlwaysHiWar__ = &subdeviceCtrlCmdInternalGsyncApplyStereoPinAlwaysHiWar_IMPL; +#endif + + // subdeviceCtrlCmdInternalGsyncGetRasterSyncDecodeMode -- exported (id=0x20800a14) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + pThis->__subdeviceCtrlCmdInternalGsyncGetRasterSyncDecodeMode__ = &subdeviceCtrlCmdInternalGsyncGetRasterSyncDecodeMode_IMPL; +#endif + // subdeviceCtrlCmdInternalFbsrInit -- exported (id=0x20800ac2) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) pThis->__subdeviceCtrlCmdInternalFbsrInit__ = &subdeviceCtrlCmdInternalFbsrInit_IMPL; @@ -12283,9 +12463,9 @@ static void __nvoc_init_funcTable_Subdevice_3(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdInternalUserSharedDataSetDataPoll__ = &subdeviceCtrlCmdInternalUserSharedDataSetDataPoll_IMPL; #endif - // subdeviceCtrlCmdInternalGspStartTrace -- exported (id=0x208001e3) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) - pThis->__subdeviceCtrlCmdInternalGspStartTrace__ = &subdeviceCtrlCmdInternalGspStartTrace_IMPL; + // subdeviceCtrlCmdInternalControlGspTrace -- exported (id=0x208001e3) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x102d0u) + pThis->__subdeviceCtrlCmdInternalControlGspTrace__ = &subdeviceCtrlCmdInternalControlGspTrace_IMPL; #endif // subdeviceCtrlCmdInternalGpuClientLowPowerModeEnter -- exported (id=0x20800ae9) @@ -12329,7 +12509,7 @@ static void __nvoc_init_funcTable_Subdevice_3(Subdevice *pThis, RmHalspecOwner * #endif // subdeviceCtrlCmdVgpuMgrInternalSetVgpuEncoderCapacity -- exported (id=0x20804007) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d0u) pThis->__subdeviceCtrlCmdVgpuMgrInternalSetVgpuEncoderCapacity__ = &subdeviceCtrlCmdVgpuMgrInternalSetVgpuEncoderCapacity_IMPL; #endif @@ -12358,6 +12538,11 @@ static void __nvoc_init_funcTable_Subdevice_3(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdVgpuMgrInternalFreeStates__ = &subdeviceCtrlCmdVgpuMgrInternalFreeStates_IMPL; #endif + // subdeviceCtrlCmdVgpuMgrInternalGetFrameRateLimiterStatus -- exported (id=0x2080400d) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) + pThis->__subdeviceCtrlCmdVgpuMgrInternalGetFrameRateLimiterStatus__ = &subdeviceCtrlCmdVgpuMgrInternalGetFrameRateLimiterStatus_IMPL; +#endif + // subdeviceCtrlCmdGetAvailableHshubMask -- exported (id=0x20804101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) pThis->__subdeviceCtrlCmdGetAvailableHshubMask__ = &subdeviceCtrlCmdGetAvailableHshubMask_IMPL; @@ -12393,96 +12578,1231 @@ static void __nvoc_init_funcTable_Subdevice_3(Subdevice *pThis, RmHalspecOwner * pThis->__subdeviceCtrlCmdSpdmPartition__ = &subdeviceCtrlCmdSpdmPartition_IMPL; #endif - // subdeviceControl -- virtual inherited (gpures) base (gpures) - pThis->__subdeviceControl__ = &__nvoc_up_thunk_GpuResource_subdeviceControl; - - // subdeviceMap -- virtual inherited (gpures) base (gpures) - pThis->__subdeviceMap__ = &__nvoc_up_thunk_GpuResource_subdeviceMap; - - // subdeviceUnmap -- virtual inherited (gpures) base (gpures) - pThis->__subdeviceUnmap__ = &__nvoc_up_thunk_GpuResource_subdeviceUnmap; - - // subdeviceShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__subdeviceShareCallback__ = &__nvoc_up_thunk_GpuResource_subdeviceShareCallback; - - // subdeviceGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__subdeviceGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_subdeviceGetRegBaseOffsetAndSize; - - // subdeviceGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__subdeviceGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_subdeviceGetMapAddrSpace; - - // subdeviceGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__subdeviceGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_subdeviceGetInternalObjectHandle; - - // subdeviceAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__subdeviceAccessCallback__ = &__nvoc_up_thunk_RmResource_subdeviceAccessCallback; + // subdeviceSpdmRetrieveTranscript -- exported (id=0x20800ada) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + pThis->__subdeviceSpdmRetrieveTranscript__ = &subdeviceSpdmRetrieveTranscript_IMPL; +#endif +} // End __nvoc_init_funcTable_Subdevice_3 with approximately 115 basic block(s). - // subdeviceGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__subdeviceGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_subdeviceGetMemInterMapParams; - // subdeviceCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__subdeviceCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_subdeviceCheckMemInterUnmap; +// Initialize vtable(s) for 627 virtual method(s). +void __nvoc_init_funcTable_Subdevice(Subdevice *pThis, RmHalspecOwner *pRmhalspecowner) { - // subdeviceGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__subdeviceGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_subdeviceGetMemoryMappingDescriptor; - - // subdeviceControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__subdeviceControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_subdeviceControlSerialization_Prologue; - - // subdeviceControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__subdeviceControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_subdeviceControlSerialization_Epilogue; - - // subdeviceControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__subdeviceControl_Prologue__ = &__nvoc_up_thunk_RmResource_subdeviceControl_Prologue; - - // subdeviceControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__subdeviceControl_Epilogue__ = &__nvoc_up_thunk_RmResource_subdeviceControl_Epilogue; - - // subdeviceCanCopy -- virtual inherited (res) base (gpures) - pThis->__subdeviceCanCopy__ = &__nvoc_up_thunk_RsResource_subdeviceCanCopy; - - // subdeviceIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__subdeviceIsDuplicate__ = &__nvoc_up_thunk_RsResource_subdeviceIsDuplicate; - - // subdeviceControlFilter -- virtual inherited (res) base (gpures) - pThis->__subdeviceControlFilter__ = &__nvoc_up_thunk_RsResource_subdeviceControlFilter; - - // subdeviceIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__subdeviceIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_subdeviceIsPartialUnmapSupported; - - // subdeviceMapTo -- virtual inherited (res) base (gpures) - pThis->__subdeviceMapTo__ = &__nvoc_up_thunk_RsResource_subdeviceMapTo; - - // subdeviceUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__subdeviceUnmapFrom__ = &__nvoc_up_thunk_RsResource_subdeviceUnmapFrom; - - // subdeviceGetRefCount -- virtual inherited (res) base (gpures) - pThis->__subdeviceGetRefCount__ = &__nvoc_up_thunk_RsResource_subdeviceGetRefCount; - - // subdeviceAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__subdeviceAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_subdeviceAddAdditionalDependants; - - // subdeviceGetNotificationListPtr -- virtual inherited (notify) base (notify) - pThis->__subdeviceGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_subdeviceGetNotificationListPtr; - - // subdeviceGetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__subdeviceGetNotificationShare__ = &__nvoc_up_thunk_Notifier_subdeviceGetNotificationShare; - - // subdeviceSetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__subdeviceSetNotificationShare__ = &__nvoc_up_thunk_Notifier_subdeviceSetNotificationShare; - - // subdeviceUnregisterEvent -- virtual inherited (notify) base (notify) - pThis->__subdeviceUnregisterEvent__ = &__nvoc_up_thunk_Notifier_subdeviceUnregisterEvent; - - // subdeviceGetOrAllocNotifShare -- virtual inherited (notify) base (notify) - pThis->__subdeviceGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_subdeviceGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_Subdevice_3 with approximately 141 basic block(s). - - -// Initialize vtable(s) for 621 virtual method(s). -void __nvoc_init_funcTable_Subdevice(Subdevice *pThis, RmHalspecOwner *pRmhalspecowner) { - - // Initialize vtable(s) with 621 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__Subdevice vtable = { + .__subdevicePreDestruct__ = &subdevicePreDestruct_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &__nvoc_down_thunk_Subdevice_resPreDestruct, // virtual + .__subdeviceInternalControlForward__ = &subdeviceInternalControlForward_IMPL, // virtual override (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &__nvoc_down_thunk_Subdevice_gpuresInternalControlForward, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50bu) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x518u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x20118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x518u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1000u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10041u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x41u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10041u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10250u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x318u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x509u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40148u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x58u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x58u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100008u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x20008u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x244u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x68u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10au) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80348u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x348u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8000u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8000u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x918u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c1c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c0c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10040u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x20118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2010au) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50au) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50bu) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x448u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40448u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x448u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x448u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x3u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x114u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14244u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10244u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c240u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10au) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40040u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x448u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x107u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x110u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xau) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100048u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100048u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100048u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100048u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x208u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x349u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x145u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x154u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x154u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10244u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10004u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x80u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x3u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xbu) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x404c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c4c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x400c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x101d0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c040u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100c0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc1u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xd0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x102d0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__subdeviceControl__ = &__nvoc_up_thunk_GpuResource_subdeviceControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__subdeviceMap__ = &__nvoc_up_thunk_GpuResource_subdeviceMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__subdeviceUnmap__ = &__nvoc_up_thunk_GpuResource_subdeviceUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__subdeviceShareCallback__ = &__nvoc_up_thunk_GpuResource_subdeviceShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__subdeviceGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_subdeviceGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__subdeviceGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_subdeviceGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__subdeviceGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_subdeviceGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__subdeviceAccessCallback__ = &__nvoc_up_thunk_RmResource_subdeviceAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__subdeviceGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_subdeviceGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__subdeviceCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_subdeviceCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__subdeviceGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_subdeviceGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__subdeviceControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_subdeviceControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__subdeviceControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_subdeviceControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__subdeviceControl_Prologue__ = &__nvoc_up_thunk_RmResource_subdeviceControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__subdeviceControl_Epilogue__ = &__nvoc_up_thunk_RmResource_subdeviceControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__subdeviceCanCopy__ = &__nvoc_up_thunk_RsResource_subdeviceCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__subdeviceIsDuplicate__ = &__nvoc_up_thunk_RsResource_subdeviceIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__subdeviceControlFilter__ = &__nvoc_up_thunk_RsResource_subdeviceControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__subdeviceIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_subdeviceIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__subdeviceMapTo__ = &__nvoc_up_thunk_RsResource_subdeviceMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__subdeviceUnmapFrom__ = &__nvoc_up_thunk_RsResource_subdeviceUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__subdeviceGetRefCount__ = &__nvoc_up_thunk_RsResource_subdeviceGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__subdeviceAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_subdeviceAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__subdeviceGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_subdeviceGetNotificationListPtr, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__subdeviceGetNotificationShare__ = &__nvoc_up_thunk_Notifier_subdeviceGetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__subdeviceSetNotificationShare__ = &__nvoc_up_thunk_Notifier_subdeviceSetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__subdeviceUnregisterEvent__ = &__nvoc_up_thunk_Notifier_subdeviceUnregisterEvent, // virtual inherited (notify) base (notify) + .Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__subdeviceGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_subdeviceGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.Notifier.INotifier; // (inotify) super^2 + pThis->__nvoc_base_Notifier.__nvoc_vtable = &vtable.Notifier; // (notify) super + pThis->__nvoc_vtable = &vtable; // (subdevice) this + + // Initialize vtable(s) with 597 per-object function pointer(s). // To reduce stack pressure with some unoptimized builds, the logic is distributed among 3 functions. __nvoc_init_funcTable_Subdevice_1(pThis, pRmhalspecowner); __nvoc_init_funcTable_Subdevice_2(pThis, pRmhalspecowner); diff --git a/src/nvidia/generated/g_subdevice_nvoc.h b/src/nvidia/generated/g_subdevice_nvoc.h index d9ea5a02f4..4d92201941 100644 --- a/src/nvidia/generated/g_subdevice_nvoc.h +++ b/src/nvidia/generated/g_subdevice_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -124,10 +124,15 @@ typedef struct P2PApi P2PApi; #endif +// Metadata including vtable +struct NVOC_VTABLE__Subdevice; + + struct Subdevice { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__Subdevice *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -143,9 +148,7 @@ struct Subdevice { struct Notifier *__nvoc_pbase_Notifier; // notify super struct Subdevice *__nvoc_pbase_Subdevice; // subdevice - // Vtable with 621 per-object function pointers - void (*__subdevicePreDestruct__)(struct Subdevice * /*this*/); // virtual override (res) base (gpures) - NV_STATUS (*__subdeviceInternalControlForward__)(struct Subdevice * /*this*/, NvU32, void *, NvU32); // virtual override (gpures) base (gpures) + // Vtable with 597 per-object function pointers NV_STATUS (*__subdeviceCtrlCmdBiosGetInfoV2__)(struct Subdevice * /*this*/, NV2080_CTRL_BIOS_GET_INFO_V2_PARAMS *); // halified (2 hals) exported (id=0x20800810) body NV_STATUS (*__subdeviceCtrlCmdBiosGetNbsiV2__)(struct Subdevice * /*this*/, NV2080_CTRL_BIOS_GET_NBSI_V2_PARAMS *); // exported (id=0x2080080e) NV_STATUS (*__subdeviceCtrlCmdBiosGetSKUInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS *); // halified (2 hals) exported (id=0x20800808) @@ -153,8 +156,6 @@ struct Subdevice { NV_STATUS (*__subdeviceCtrlCmdBiosGetUefiSupport__)(struct Subdevice * /*this*/, NV2080_CTRL_BIOS_GET_UEFI_SUPPORT_PARAMS *); // exported (id=0x2080080b) NV_STATUS (*__subdeviceCtrlCmdMcGetArchInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_MC_GET_ARCH_INFO_PARAMS *); // exported (id=0x20801701) NV_STATUS (*__subdeviceCtrlCmdMcGetManufacturer__)(struct Subdevice * /*this*/, NV2080_CTRL_MC_GET_MANUFACTURER_PARAMS *); // exported (id=0x20801703) - NV_STATUS (*__subdeviceCtrlCmdMcQueryHostclkSlowdownStatus__)(struct Subdevice * /*this*/, NV2080_CTRL_MC_QUERY_HOSTCLK_SLOWDOWN_STATUS_PARAMS *); // exported (id=0x20801708) - NV_STATUS (*__subdeviceCtrlCmdMcSetHostclkSlowdownStatus__)(struct Subdevice * /*this*/, NV2080_CTRL_MC_SET_HOSTCLK_SLOWDOWN_STATUS_PARAMS *); // exported (id=0x20801709) NV_STATUS (*__subdeviceCtrlCmdMcChangeReplayableFaultOwnership__)(struct Subdevice * /*this*/, NV2080_CTRL_MC_CHANGE_REPLAYABLE_FAULT_OWNERSHIP_PARAMS *); // exported (id=0x2080170c) NV_STATUS (*__subdeviceCtrlCmdMcServiceInterrupts__)(struct Subdevice * /*this*/, NV2080_CTRL_MC_SERVICE_INTERRUPTS_PARAMS *); // exported (id=0x20801702) NV_STATUS (*__subdeviceCtrlCmdMcGetEngineNotificationIntrVectors__)(struct Subdevice * /*this*/, NV2080_CTRL_MC_GET_ENGINE_NOTIFICATION_INTR_VECTORS_PARAMS *); // exported (id=0x2080170d) @@ -190,6 +191,9 @@ struct Subdevice { NV_STATUS (*__subdeviceCtrlCmdBusSetP2pMapping__)(struct Subdevice * /*this*/, NV2080_CTRL_BUS_SET_P2P_MAPPING_PARAMS *); // halified (2 hals) exported (id=0x2080182e) body NV_STATUS (*__subdeviceCtrlCmdBusUnsetP2pMapping__)(struct Subdevice * /*this*/, NV2080_CTRL_BUS_UNSET_P2P_MAPPING_PARAMS *); // halified (2 hals) exported (id=0x2080182f) body NV_STATUS (*__subdeviceCtrlCmdNvlinkGetSupportedCounters__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_SUPPORTED_COUNTERS_PARAMS *); // exported (id=0x20803074) + NV_STATUS (*__subdeviceCtrlCmdNvlinkGetSupportedBWMode__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_SUPPORTED_BW_MODE_PARAMS *); // exported (id=0x20803085) + NV_STATUS (*__subdeviceCtrlCmdNvlinkGetBWMode__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_BW_MODE_PARAMS *); // exported (id=0x20803087) + NV_STATUS (*__subdeviceCtrlCmdNvlinkSetBWMode__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_SET_BW_MODE_PARAMS *); // exported (id=0x20803086) NV_STATUS (*__subdeviceCtrlCmdGetNvlinkCountersV2__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_COUNTERS_V2_PARAMS *); // exported (id=0x20803050) NV_STATUS (*__subdeviceCtrlCmdClearNvlinkCountersV2__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_CLEAR_COUNTERS_V2_PARAMS *); // exported (id=0x20803051) NV_STATUS (*__subdeviceCtrlCmdGetNvlinkCounters__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_COUNTERS_PARAMS *); // exported (id=0x20803004) @@ -207,14 +211,7 @@ struct Subdevice { NV_STATUS (*__subdeviceCtrlCmdNvlinkReadTpCounters__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_READ_TP_COUNTERS_PARAMS *); // exported (id=0x20803015) NV_STATUS (*__subdeviceCtrlCmdNvlinkGetLpCounters__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_LP_COUNTERS_PARAMS *); // exported (id=0x20803018) NV_STATUS (*__subdeviceCtrlCmdNvlinkClearLpCounters__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_LP_COUNTERS_PARAMS *); // exported (id=0x20803052) - NV_STATUS (*__subdeviceCtrlCmdNvlinkEnableNvlinkPeer__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_ENABLE_NVLINK_PEER_PARAMS *); // exported (id=0x20803017) - NV_STATUS (*__subdeviceCtrlCmdNvlinkCoreCallback__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS *); // exported (id=0x20803019) - NV_STATUS (*__subdeviceCtrlCmdNvlinkGetAliEnabled__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_ALI_ENABLED_PARAMS *); // exported (id=0x2080301a) NV_STATUS (*__subdeviceCtrlCmdNvlinkSetLoopbackMode__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_PARAMS *); // exported (id=0x20803023) - NV_STATUS (*__subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS *); // exported (id=0x2080301b) - NV_STATUS (*__subdeviceCtrlCmdNvlinkUpdateHshubMux__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_PARAMS *); // exported (id=0x2080301c) - NV_STATUS (*__subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS *); // exported (id=0x2080301d) - NV_STATUS (*__subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS *); // exported (id=0x2080301e) NV_STATUS (*__subdeviceCtrlCmdNvlinkRemoveNvlinkMapping__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_REMOVE_NVLINK_MAPPING_PARAMS *); // exported (id=0x2080301f) NV_STATUS (*__subdeviceCtrlCmdNvlinkSaveRestoreHshubState__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_SAVE_RESTORE_HSHUB_STATE_PARAMS *); // exported (id=0x20803020) NV_STATUS (*__subdeviceCtrlCmdNvlinkProgramBufferready__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PROGRAM_BUFFERREADY_PARAMS *); // exported (id=0x20803021) @@ -251,18 +248,17 @@ struct Subdevice { NV_STATUS (*__subdeviceCtrlCmdNvlinkGetL1Threshold__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_L1_THRESHOLD_PARAMS *); // exported (id=0x2080303f) NV_STATUS (*__subdeviceCtrlCmdIsNvlinkReducedConfig__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_IS_REDUCED_CONFIG_PARAMS *); // exported (id=0x20803046) NV_STATUS (*__subdeviceCtrlCmdNvlinkGetPortEvents__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_PORT_EVENTS_PARAMS *); // exported (id=0x20803044) + NV_STATUS (*__subdeviceCtrlCmdNvlinkIsGpuDegraded__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_IS_GPU_DEGRADED_PARAMS *); // exported (id=0x20803041) NV_STATUS (*__subdeviceCtrlCmdNvlinkPRMAccessPAOS__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PRM_ACCESS_PAOS_PARAMS *); // exported (id=0x20803047) NV_STATUS (*__subdeviceCtrlCmdNvlinkPRMAccessPLTC__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PRM_ACCESS_PLTC_PARAMS *); // exported (id=0x20803053) NV_STATUS (*__subdeviceCtrlCmdNvlinkPRMAccessPPLM__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PRM_ACCESS_PPLM_PARAMS *); // exported (id=0x20803054) NV_STATUS (*__subdeviceCtrlCmdNvlinkPRMAccessPPSLC__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PRM_ACCESS_PPSLC_PARAMS *); // exported (id=0x20803055) NV_STATUS (*__subdeviceCtrlCmdNvlinkPRMAccessMCAM__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PRM_ACCESS_MCAM_PARAMS *); // exported (id=0x20803056) NV_STATUS (*__subdeviceCtrlCmdNvlinkPRMAccessMTECR__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PRM_ACCESS_MTECR_PARAMS *); // exported (id=0x2080305c) - NV_STATUS (*__subdeviceCtrlCmdNvlinkPRMAccessMTWE__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PRM_ACCESS_MTWE_PARAMS *); // exported (id=0x2080305d) NV_STATUS (*__subdeviceCtrlCmdNvlinkPRMAccessMTEWE__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PRM_ACCESS_MTEWE_PARAMS *); // exported (id=0x2080305e) NV_STATUS (*__subdeviceCtrlCmdNvlinkPRMAccessMTSDE__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PRM_ACCESS_MTSDE_PARAMS *); // exported (id=0x2080305f) NV_STATUS (*__subdeviceCtrlCmdNvlinkPRMAccessMTCAP__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PRM_ACCESS_MTCAP_PARAMS *); // exported (id=0x20803061) NV_STATUS (*__subdeviceCtrlCmdNvlinkPRMAccessPMTU__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PRM_ACCESS_PMTU_PARAMS *); // exported (id=0x20803062) - NV_STATUS (*__subdeviceCtrlCmdNvlinkPRMAccessMCIA__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PRM_ACCESS_MCIA_PARAMS *); // exported (id=0x20803063) NV_STATUS (*__subdeviceCtrlCmdNvlinkPRMAccessPMLP__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PRM_ACCESS_PMLP_PARAMS *); // exported (id=0x20803064) NV_STATUS (*__subdeviceCtrlCmdNvlinkPRMAccessGHPKT__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PRM_ACCESS_GHPKT_PARAMS *); // exported (id=0x20803065) NV_STATUS (*__subdeviceCtrlCmdNvlinkPRMAccessPDDR__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PRM_ACCESS_PDDR_PARAMS *); // exported (id=0x20803066) @@ -290,6 +286,7 @@ struct Subdevice { NV_STATUS (*__subdeviceCtrlCmdNvlinkPRMAccessPPSLS__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PRM_ACCESS_PPSLS_PARAMS *); // exported (id=0x2080307e) NV_STATUS (*__subdeviceCtrlCmdNvlinkPRMAccessMLPC__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PRM_ACCESS_MLPC_PARAMS *); // exported (id=0x2080307f) NV_STATUS (*__subdeviceCtrlCmdNvlinkPRMAccessPLIB__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_PRM_ACCESS_PLIB_PARAMS *); // exported (id=0x20803080) + NV_STATUS (*__subdeviceCtrlCmdNvlinkGetPlatformInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_NVLINK_GET_PLATFORM_INFO_PARAMS *); // exported (id=0x20803083) NV_STATUS (*__subdeviceCtrlCmdI2cReadBuffer__)(struct Subdevice * /*this*/, NV2080_CTRL_I2C_READ_BUFFER_PARAMS *); // exported (id=0x20800601) NV_STATUS (*__subdeviceCtrlCmdI2cWriteBuffer__)(struct Subdevice * /*this*/, NV2080_CTRL_I2C_WRITE_BUFFER_PARAMS *); // exported (id=0x20800602) NV_STATUS (*__subdeviceCtrlCmdI2cReadReg__)(struct Subdevice * /*this*/, NV2080_CTRL_I2C_RW_REG_PARAMS *); // exported (id=0x20800603) @@ -315,13 +312,8 @@ struct Subdevice { NV_STATUS (*__subdeviceCtrlCmdGbGetSemaphoreSurfaceLayout__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_SEMAPHORE_SURFACE_LAYOUT_PARAMS *); // exported (id=0x20801352) NV_STATUS (*__subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_MEMMGR_MEMORY_TRANSFER_WITH_GSP_PARAMS *); // halified (singleton optimized) exported (id=0x20800afa) body NV_STATUS (*__subdeviceCtrlCmdFbGetInfoV2__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_INFO_V2_PARAMS *); // exported (id=0x20801303) - NV_STATUS (*__subdeviceCtrlCmdFbGetCarveoutAddressInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_SYSTEM_CARVEOUT_ADDRESS_SPACE_INFO *); // exported (id=0x2080130b) NV_STATUS (*__subdeviceCtrlCmdFbGetCalibrationLockFailed__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_CALIBRATION_LOCK_FAILED_PARAMS *); // exported (id=0x2080130c) NV_STATUS (*__subdeviceCtrlCmdFbFlushGpuCache__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_FLUSH_GPU_CACHE_PARAMS *); // exported (id=0x2080130e) - NV_STATUS (*__subdeviceCtrlCmdFbSetGpuCacheAllocPolicy__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS *); // exported (id=0x2080130f) - NV_STATUS (*__subdeviceCtrlCmdFbGetGpuCacheAllocPolicy__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS *); // exported (id=0x20801312) - NV_STATUS (*__subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS *); // exported (id=0x20801318) - NV_STATUS (*__subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS *); // exported (id=0x20801319) NV_STATUS (*__subdeviceCtrlCmdFbGetGpuCacheInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_GPU_CACHE_INFO_PARAMS *); // exported (id=0x20801315) NV_STATUS (*__subdeviceCtrlCmdFbGetCliManagedOfflinedPages__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_CLI_MANAGED_OFFLINED_PAGES_PARAMS *); // exported (id=0x2080133c) NV_STATUS (*__subdeviceCtrlCmdFbGetOfflinedPages__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_OFFLINED_PAGES_PARAMS *); // halified (2 hals) exported (id=0x20801322) body @@ -350,6 +342,7 @@ struct Subdevice { NV_STATUS (*__subdeviceCtrlCmdFbSetReadLimit__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_SET_READ_LIMIT_PARAMS *); // exported (id=0x2080133f) NV_STATUS (*__subdeviceCtrlCmdFbSetWriteLimit__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_SET_WRITE_LIMIT_PARAMS *); // exported (id=0x20801340) NV_STATUS (*__subdeviceCtrlCmdGmmuCommitTlbInvalidate__)(struct Subdevice * /*this*/, NV2080_CTRL_GMMU_COMMIT_TLB_INVALIDATE_PARAMS *); // exported (id=0x20801353) + NV_STATUS (*__subdeviceCtrlCmdFbGetStaticBar1Info__)(struct Subdevice * /*this*/, NV2080_CTRL_FB_GET_STATIC_BAR1_INFO_PARAMS *); // exported (id=0x20801354) NV_STATUS (*__subdeviceCtrlCmdSetGpfifo__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_SET_GPFIFO_PARAMS *); // exported (id=0x20801102) NV_STATUS (*__subdeviceCtrlCmdSetOperationalProperties__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_SET_OPERATIONAL_PROPERTIES_PARAMS *); // exported (id=0x20801104) NV_STATUS (*__subdeviceCtrlCmdFifoBindEngines__)(struct Subdevice * /*this*/, NV2080_CTRL_FIFO_BIND_ENGINES_PARAMS *); // exported (id=0x20801103) @@ -454,7 +447,6 @@ struct Subdevice { NV_STATUS (*__subdeviceCtrlCmdGpuSetEgmGpaFabricAddr__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_SET_EGM_GPA_FABRIC_BASE_ADDR_PARAMS *); // exported (id=0x20800199) NV_STATUS (*__subdeviceCtrlCmdGpuSetPower__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_SET_POWER_PARAMS *); // exported (id=0x20800112) NV_STATUS (*__subdeviceCtrlCmdGpuGetSdm__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_SDM_PARAMS *); // exported (id=0x20800118) - NV_STATUS (*__subdeviceCtrlCmdGpuSetSdm__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_SET_SDM_PARAMS *); // exported (id=0x20800120) NV_STATUS (*__subdeviceCtrlCmdGpuGetSimulationInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_SIMULATION_INFO_PARAMS *); // exported (id=0x20800119) NV_STATUS (*__subdeviceCtrlCmdGpuGetEngines__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_ENGINES_PARAMS *); // exported (id=0x20800123) NV_STATUS (*__subdeviceCtrlCmdGpuGetEnginesV2__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_ENGINES_V2_PARAMS *); // exported (id=0x20800170) @@ -508,11 +500,16 @@ struct Subdevice { NV_STATUS (*__subdeviceCtrlCmdGpuGetEngineLoadTimes__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_ENGINE_LOAD_TIMES_PARAMS *); // exported (id=0x2080019b) NV_STATUS (*__subdeviceCtrlCmdGetP2pCaps__)(struct Subdevice * /*this*/, NV2080_CTRL_GET_P2P_CAPS_PARAMS *); // exported (id=0x208001a0) NV_STATUS (*__subdeviceCtrlCmdGetGpuFabricProbeInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_GET_GPU_FABRIC_PROBE_INFO_PARAMS *); // exported (id=0x208001a3) + NV_STATUS (*__subdeviceCtrlCmdGpuMarkDeviceForReset__)(struct Subdevice * /*this*/); // exported (id=0x208001a9) + NV_STATUS (*__subdeviceCtrlCmdGpuUnmarkDeviceForReset__)(struct Subdevice * /*this*/); // exported (id=0x208001aa) + NV_STATUS (*__subdeviceCtrlCmdGpuMarkDeviceForDrainAndReset__)(struct Subdevice * /*this*/); // exported (id=0x208001ac) + NV_STATUS (*__subdeviceCtrlCmdGpuUnmarkDeviceForDrainAndReset__)(struct Subdevice * /*this*/); // exported (id=0x208001ad) NV_STATUS (*__subdeviceCtrlCmdGpuGetResetStatus__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_RESET_STATUS_PARAMS *); // exported (id=0x208001ab) NV_STATUS (*__subdeviceCtrlCmdGpuGetDrainAndResetStatus__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_DRAIN_AND_RESET_STATUS_PARAMS *); // exported (id=0x208001ae) NV_STATUS (*__subdeviceCtrlCmdGpuGetConstructedFalconInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_CONSTRUCTED_FALCON_INFO_PARAMS *); // exported (id=0x208001b0) NV_STATUS (*__subdeviceCtrlGpuGetFipsStatus__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_FIPS_STATUS_PARAMS *); // exported (id=0x208001e4) NV_STATUS (*__subdeviceCtrlCmdGpuGetVfCaps__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_VF_CAPS_PARAMS *); // exported (id=0x208001b1) + NV_STATUS (*__subdeviceCtrlCmdGpuGetRecoveryAction__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_GET_RECOVERY_ACTION_PARAMS *); // exported (id=0x208001b2) NV_STATUS (*__subdeviceCtrlCmdEventSetTrigger__)(struct Subdevice * /*this*/); // exported (id=0x20800302) NV_STATUS (*__subdeviceCtrlCmdEventSetTriggerFifo__)(struct Subdevice * /*this*/, NV2080_CTRL_EVENT_SET_TRIGGER_FIFO_PARAMS *); // exported (id=0x20800308) NV_STATUS (*__subdeviceCtrlCmdEventSetNotification__)(struct Subdevice * /*this*/, NV2080_CTRL_EVENT_SET_NOTIFICATION_PARAMS *); // exported (id=0x20800301) @@ -561,6 +558,7 @@ struct Subdevice { NV_STATUS (*__subdeviceCtrlCmdCeGetCapsV2__)(struct Subdevice * /*this*/, NV2080_CTRL_CE_GET_CAPS_V2_PARAMS *); // halified (2 hals) exported (id=0x20802a03) NV_STATUS (*__subdeviceCtrlCmdCeGetAllCaps__)(struct Subdevice * /*this*/, NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS *); // halified (2 hals) exported (id=0x20802a0a) NV_STATUS (*__subdeviceCtrlCmdCeGetDecompLceMask__)(struct Subdevice * /*this*/, NV2080_CTRL_CE_GET_DECOMP_LCE_MASK_PARAMS *); // exported (id=0x20802a11) + NV_STATUS (*__subdeviceCtrlCmdCeIsDecompLceEnabled__)(struct Subdevice * /*this*/, NV2080_CTRL_CE_IS_DECOMP_LCE_ENABLED_PARAMS *); // exported (id=0x20802a12) NV_STATUS (*__subdeviceCtrlCmdFlcnGetDmemUsage__)(struct Subdevice * /*this*/, NV2080_CTRL_FLCN_GET_DMEM_USAGE_PARAMS *); // exported (id=0x20803101) NV_STATUS (*__subdeviceCtrlCmdFlcnGetEngineArch__)(struct Subdevice * /*this*/, NV2080_CTRL_FLCN_GET_ENGINE_ARCH_PARAMS *); // exported (id=0x20803118) NV_STATUS (*__subdeviceCtrlCmdFlcnUstreamerQueueInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_FLCN_USTREAMER_QUEUE_INFO_PARAMS *); // exported (id=0x20803120) @@ -569,8 +567,7 @@ struct Subdevice { NV_STATUS (*__subdeviceCtrlCmdFlcnGetCtxBufferInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_FLCN_GET_CTX_BUFFER_INFO_PARAMS *); // exported (id=0x20803124) NV_STATUS (*__subdeviceCtrlCmdFlcnGetCtxBufferSize__)(struct Subdevice * /*this*/, NV2080_CTRL_FLCN_GET_CTX_BUFFER_SIZE_PARAMS *); // exported (id=0x20803125) NV_STATUS (*__subdeviceCtrlCmdEccGetClientExposedCounters__)(struct Subdevice * /*this*/, NV2080_CTRL_ECC_GET_CLIENT_EXPOSED_COUNTERS_PARAMS *); // exported (id=0x20803400) - NV_STATUS (*__subdeviceCtrlCmdEccGetEciCounters__)(struct Subdevice * /*this*/, NV2080_CTRL_ECC_GET_ECI_COUNTERS_PARAMS *); // exported (id=0x20803401) - NV_STATUS (*__subdeviceCtrlCmdEccGetVolatileCounts__)(struct Subdevice * /*this*/, NV2080_CTRL_ECC_GET_VOLATILE_COUNTS_PARAMS *); // exported (id=0x20803402) + NV_STATUS (*__subdeviceCtrlCmdEccGetVolatileCounts__)(struct Subdevice * /*this*/, NV2080_CTRL_ECC_GET_VOLATILE_COUNTS_PARAMS *); // exported (id=0x20803401) NV_STATUS (*__subdeviceCtrlCmdGpuQueryEccConfiguration__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_QUERY_ECC_CONFIGURATION_PARAMS *); // halified (2 hals) exported (id=0x20800133) body NV_STATUS (*__subdeviceCtrlCmdGpuSetEccConfiguration__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_SET_ECC_CONFIGURATION_PARAMS *); // halified (2 hals) exported (id=0x20800134) body NV_STATUS (*__subdeviceCtrlCmdGpuResetEccErrorStatus__)(struct Subdevice * /*this*/, NV2080_CTRL_GPU_RESET_ECC_ERROR_STATUS_PARAMS *); // halified (2 hals) exported (id=0x20800136) body @@ -633,6 +630,7 @@ struct Subdevice { NV_STATUS (*__subdeviceCtrlCmdInternalBusDestroyP2pMailbox__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_BUS_DESTROY_P2P_MAILBOX_PARAMS *); // exported (id=0x20800a73) NV_STATUS (*__subdeviceCtrlCmdInternalBusCreateC2cPeerMapping__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_BUS_CREATE_C2C_PEER_MAPPING_PARAMS *); // exported (id=0x20800a74) NV_STATUS (*__subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_BUS_REMOVE_C2C_PEER_MAPPING_PARAMS *); // exported (id=0x20800a75) + NV_STATUS (*__subdeviceCtrlCmdInternalGpuGetPFBar1Spa__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GPU_GET_PF_BAR1_SPA_PARAMS *); // exported (id=0x20800aee) NV_STATUS (*__subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_VMMU_GET_SPA_FOR_GPA_ENTRIES_PARAMS *); // exported (id=0x20800a57) NV_STATUS (*__subdeviceCtrlCmdGmmuGetStaticInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GMMU_GET_STATIC_INFO_PARAMS *); // exported (id=0x20800a59) NV_STATUS (*__subdeviceCtrlCmdInternalGmmuRegisterFaultBuffer__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GMMU_REGISTER_FAULT_BUFFER_PARAMS *); // exported (id=0x20800a9b) @@ -676,6 +674,13 @@ struct Subdevice { NV_STATUS (*__subdeviceCtrlCmdInternalNvlinkGetNumActiveLinksPerIoctrl__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_NVLINK_GET_NUM_ACTIVE_LINK_PER_IOCTRL_PARAMS *); // exported (id=0x20800ac7) NV_STATUS (*__subdeviceCtrlCmdInternalNvlinkGetTotalNumLinksPerIoctrl__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_NVLINK_GET_TOTAL_NUM_LINK_PER_IOCTRL_PARAMS *); // exported (id=0x20800ac8) NV_STATUS (*__subdeviceCtrlCmdInternalNvlinkPostFatalErrorRecovery__)(struct Subdevice * /*this*/); // exported (id=0x20800aea) + NV_STATUS (*__subdeviceCtrlCmdInternalNvlinkEnableNvlinkPeer__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_NVLINK_ENABLE_NVLINK_PEER_PARAMS *); // exported (id=0x20800a21) + NV_STATUS (*__subdeviceCtrlCmdInternalNvlinkCoreCallback__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS *); // exported (id=0x20800a24) + NV_STATUS (*__subdeviceCtrlCmdInternalNvlinkUpdateRemoteLocalSid__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS *); // exported (id=0x20800a25) + NV_STATUS (*__subdeviceCtrlCmdInternalNvlinkGetAliEnabled__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_NVLINK_GET_ALI_ENABLED_PARAMS *); // exported (id=0x20800a29) + NV_STATUS (*__subdeviceCtrlCmdInternalNvlinkPreSetupNvlinkPeer__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS *); // exported (id=0x20800a4e) + NV_STATUS (*__subdeviceCtrlCmdInternalNvlinkPostSetupNvlinkPeer__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS *); // exported (id=0x20800a50) + NV_STATUS (*__subdeviceCtrlCmdInternalNvlinkUpdateHshubMux__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_NVLINK_UPDATE_HSHUB_MUX_PARAMS *); // exported (id=0x20800a42) NV_STATUS (*__subdeviceCtrlCmdInternalSetP2pCaps__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_SET_P2P_CAPS_PARAMS *); // exported (id=0x20800ab5) NV_STATUS (*__subdeviceCtrlCmdInternalRemoveP2pCaps__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_REMOVE_P2P_CAPS_PARAMS *); // exported (id=0x20800ab6) NV_STATUS (*__subdeviceCtrlCmdInternalGetPcieP2pCaps__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GET_PCIE_P2P_CAPS_PARAMS *); // exported (id=0x20800ab8) @@ -688,6 +693,8 @@ struct Subdevice { NV_STATUS (*__subdeviceCtrlCmdInternalGsyncGetVactiveLines__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GSYNC_GET_VERTICAL_ACTIVE_LINES_PARAMS *); // exported (id=0x20800ac4) NV_STATUS (*__subdeviceCtrlCmdInternalGsyncIsDisplayIdValid__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GSYNC_IS_DISPLAYID_VALID_PARAMS *); // exported (id=0x20800ac9) NV_STATUS (*__subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GSYNC_SET_OR_RESTORE_RASTER_SYNC_PARAMS *); // exported (id=0x20800aca) + NV_STATUS (*__subdeviceCtrlCmdInternalGsyncApplyStereoPinAlwaysHiWar__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GSYNC_APPLY_STEREO_PIN_ALWAYS_HI_WAR_PARAMS *); // exported (id=0x20800aed) + NV_STATUS (*__subdeviceCtrlCmdInternalGsyncGetRasterSyncDecodeMode__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GSYNC_GET_RASTER_SYNC_DECODE_MODE_PARAMS *); // exported (id=0x20800a14) NV_STATUS (*__subdeviceCtrlCmdInternalFbsrInit__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_FBSR_INIT_PARAMS *); // exported (id=0x20800ac2) NV_STATUS (*__subdeviceCtrlCmdInternalPostInitBrightcStateLoad__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_INIT_BRIGHTC_STATE_LOAD_PARAMS *); // exported (id=0x20800ac6) NV_STATUS (*__subdeviceCtrlCmdInternalSetStaticEdidData__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_SET_STATIC_EDID_DATA_PARAMS *); // exported (id=0x20800adf) @@ -715,7 +722,7 @@ struct Subdevice { NV_STATUS (*__subdeviceCtrlCmdInternalConfComputeSetSecurityPolicy__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_SET_SECURITY_POLICY_PARAMS *); // exported (id=0x20800ae8) NV_STATUS (*__subdeviceCtrlCmdInternalInitUserSharedData__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_INIT_USER_SHARED_DATA_PARAMS *); // exported (id=0x20800afe) NV_STATUS (*__subdeviceCtrlCmdInternalUserSharedDataSetDataPoll__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_USER_SHARED_DATA_SET_DATA_POLL_PARAMS *); // exported (id=0x20800aff) - NV_STATUS (*__subdeviceCtrlCmdInternalGspStartTrace__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE_INFO_PARAMS *); // exported (id=0x208001e3) + NV_STATUS (*__subdeviceCtrlCmdInternalControlGspTrace__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE_PARAMS *); // exported (id=0x208001e3) NV_STATUS (*__subdeviceCtrlCmdInternalGpuClientLowPowerModeEnter__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GPU_CLIENT_LOW_POWER_MODE_ENTER_PARAMS *); // exported (id=0x20800ae9) NV_STATUS (*__subdeviceCtrlCmdInternalGpuSetIllum__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_GPU_SET_ILLUM_PARAMS *); // exported (id=0x20800aec) NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalBootloadGspVgpuPluginTask__)(struct Subdevice * /*this*/, NV2080_CTRL_VGPU_MGR_INTERNAL_BOOTLOAD_GSP_VGPU_PLUGIN_TASK_PARAMS *); // exported (id=0x20804001) @@ -730,6 +737,7 @@ struct Subdevice { NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalGetPgpuMigrationSupport__)(struct Subdevice * /*this*/, NV2080_CTRL_VGPU_MGR_INTERNAL_GET_PGPU_MIGRATION_SUPPORT_PARAMS *); // exported (id=0x2080400a) NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalSetVgpuMgrConfig__)(struct Subdevice * /*this*/, NV2080_CTRL_VGPU_MGR_INTERNAL_SET_VGPU_MGR_CONFIG_PARAMS *); // exported (id=0x2080400b) NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalFreeStates__)(struct Subdevice * /*this*/, NV2080_CTRL_VGPU_MGR_INTERNAL_FREE_STATES_PARAMS *); // exported (id=0x2080400c) + NV_STATUS (*__subdeviceCtrlCmdVgpuMgrInternalGetFrameRateLimiterStatus__)(struct Subdevice * /*this*/, NV2080_CTRL_VGPU_MGR_GET_FRAME_RATE_LIMITER_STATUS_PARAMS *); // exported (id=0x2080400d) NV_STATUS (*__subdeviceCtrlCmdGetAvailableHshubMask__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_HSHUB_GET_AVAILABLE_MASK_PARAMS *); // exported (id=0x20804101) NV_STATUS (*__subdeviceCtrlSetEcThrottleMode__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_HSHUB_SET_EC_THROTTLE_MODE_PARAMS *); // exported (id=0x20804102) NV_STATUS (*__subdeviceCtrlCmdCcuMap__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_CCU_MAP_INFO_PARAMS *); // exported (id=0x20800ab3) @@ -737,34 +745,7 @@ struct Subdevice { NV_STATUS (*__subdeviceCtrlCmdCcuSetStreamState__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_CCU_STREAM_STATE_PARAMS *); // exported (id=0x20800abd) NV_STATUS (*__subdeviceCtrlCmdCcuGetSampleInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_CCU_SAMPLE_INFO_PARAMS *); // exported (id=0x20800ab2) NV_STATUS (*__subdeviceCtrlCmdSpdmPartition__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_SPDM_PARTITION_PARAMS *); // exported (id=0x20800ad9) - NV_STATUS (*__subdeviceControl__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) - NV_STATUS (*__subdeviceMap__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) - NV_STATUS (*__subdeviceUnmap__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) - NvBool (*__subdeviceShareCallback__)(struct Subdevice * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) - NV_STATUS (*__subdeviceGetRegBaseOffsetAndSize__)(struct Subdevice * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) - NV_STATUS (*__subdeviceGetMapAddrSpace__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) - NvHandle (*__subdeviceGetInternalObjectHandle__)(struct Subdevice * /*this*/); // virtual inherited (gpures) base (gpures) - NvBool (*__subdeviceAccessCallback__)(struct Subdevice * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__subdeviceGetMemInterMapParams__)(struct Subdevice * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__subdeviceCheckMemInterUnmap__)(struct Subdevice * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__subdeviceGetMemoryMappingDescriptor__)(struct Subdevice * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__subdeviceControlSerialization_Prologue__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) - void (*__subdeviceControlSerialization_Epilogue__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) - NV_STATUS (*__subdeviceControl_Prologue__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) - void (*__subdeviceControl_Epilogue__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) - NvBool (*__subdeviceCanCopy__)(struct Subdevice * /*this*/); // virtual inherited (res) base (gpures) - NV_STATUS (*__subdeviceIsDuplicate__)(struct Subdevice * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) - NV_STATUS (*__subdeviceControlFilter__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) - NvBool (*__subdeviceIsPartialUnmapSupported__)(struct Subdevice * /*this*/); // inline virtual inherited (res) base (gpures) body - NV_STATUS (*__subdeviceMapTo__)(struct Subdevice * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) - NV_STATUS (*__subdeviceUnmapFrom__)(struct Subdevice * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) - NvU32 (*__subdeviceGetRefCount__)(struct Subdevice * /*this*/); // virtual inherited (res) base (gpures) - void (*__subdeviceAddAdditionalDependants__)(struct RsClient *, struct Subdevice * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - PEVENTNOTIFICATION * (*__subdeviceGetNotificationListPtr__)(struct Subdevice * /*this*/); // virtual inherited (notify) base (notify) - struct NotifShare * (*__subdeviceGetNotificationShare__)(struct Subdevice * /*this*/); // virtual inherited (notify) base (notify) - void (*__subdeviceSetNotificationShare__)(struct Subdevice * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) - NV_STATUS (*__subdeviceUnregisterEvent__)(struct Subdevice * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) - NV_STATUS (*__subdeviceGetOrAllocNotifShare__)(struct Subdevice * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) + NV_STATUS (*__subdeviceSpdmRetrieveTranscript__)(struct Subdevice * /*this*/, NV2080_CTRL_INTERNAL_SPDM_RETRIEVE_TRANSCRIPT_PARAMS *); // exported (id=0x20800ada) // Data members NvU32 deviceInst; @@ -772,7 +753,7 @@ struct Subdevice { struct Device *pDevice; NvBool bMaxGrTickFreqRequested; NvU64 P2PfbMappedBytes; - NvU32 notifyActions[190]; + NvU32 notifyActions[195]; NvHandle hNotifierMemory; struct Memory *pNotifierMemory; NvHandle hSemMemory; @@ -799,6 +780,44 @@ struct Subdevice { TMR_EVENT *pTimerEvent; }; + +// Metadata including vtable with 30 function pointers plus superclass metadata +struct NVOC_VTABLE__Subdevice { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + const struct NVOC_VTABLE__Notifier Notifier; // (notify) 5 function pointers + + void (*__subdevicePreDestruct__)(struct Subdevice * /*this*/); // virtual override (res) base (gpures) + NV_STATUS (*__subdeviceInternalControlForward__)(struct Subdevice * /*this*/, NvU32, void *, NvU32); // virtual override (gpures) base (gpures) + NV_STATUS (*__subdeviceControl__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__subdeviceMap__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__subdeviceUnmap__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) + NvBool (*__subdeviceShareCallback__)(struct Subdevice * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__subdeviceGetRegBaseOffsetAndSize__)(struct Subdevice * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual inherited (gpures) base (gpures) + NV_STATUS (*__subdeviceGetMapAddrSpace__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (gpures) base (gpures) + NvHandle (*__subdeviceGetInternalObjectHandle__)(struct Subdevice * /*this*/); // virtual inherited (gpures) base (gpures) + NvBool (*__subdeviceAccessCallback__)(struct Subdevice * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__subdeviceGetMemInterMapParams__)(struct Subdevice * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__subdeviceCheckMemInterUnmap__)(struct Subdevice * /*this*/, NvBool); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__subdeviceGetMemoryMappingDescriptor__)(struct Subdevice * /*this*/, struct MEMORY_DESCRIPTOR **); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__subdeviceControlSerialization_Prologue__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__subdeviceControlSerialization_Epilogue__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NV_STATUS (*__subdeviceControl_Prologue__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + void (*__subdeviceControl_Epilogue__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (rmres) base (gpures) + NvBool (*__subdeviceCanCopy__)(struct Subdevice * /*this*/); // virtual inherited (res) base (gpures) + NV_STATUS (*__subdeviceIsDuplicate__)(struct Subdevice * /*this*/, NvHandle, NvBool *); // virtual inherited (res) base (gpures) + NV_STATUS (*__subdeviceControlFilter__)(struct Subdevice * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (gpures) + NvBool (*__subdeviceIsPartialUnmapSupported__)(struct Subdevice * /*this*/); // inline virtual inherited (res) base (gpures) body + NV_STATUS (*__subdeviceMapTo__)(struct Subdevice * /*this*/, RS_RES_MAP_TO_PARAMS *); // virtual inherited (res) base (gpures) + NV_STATUS (*__subdeviceUnmapFrom__)(struct Subdevice * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) + NvU32 (*__subdeviceGetRefCount__)(struct Subdevice * /*this*/); // virtual inherited (res) base (gpures) + void (*__subdeviceAddAdditionalDependants__)(struct RsClient *, struct Subdevice * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) + PEVENTNOTIFICATION * (*__subdeviceGetNotificationListPtr__)(struct Subdevice * /*this*/); // virtual inherited (notify) base (notify) + struct NotifShare * (*__subdeviceGetNotificationShare__)(struct Subdevice * /*this*/); // virtual inherited (notify) base (notify) + void (*__subdeviceSetNotificationShare__)(struct Subdevice * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) + NV_STATUS (*__subdeviceUnregisterEvent__)(struct Subdevice * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) + NV_STATUS (*__subdeviceGetOrAllocNotifShare__)(struct Subdevice * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) +}; + #ifndef __NVOC_CLASS_Subdevice_TYPEDEF__ #define __NVOC_CLASS_Subdevice_TYPEDEF__ typedef struct Subdevice Subdevice; @@ -829,9 +848,9 @@ NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_C // Wrapper macros -#define subdevicePreDestruct_FNPTR(pResource) pResource->__subdevicePreDestruct__ +#define subdevicePreDestruct_FNPTR(pResource) pResource->__nvoc_vtable->__subdevicePreDestruct__ #define subdevicePreDestruct(pResource) subdevicePreDestruct_DISPATCH(pResource) -#define subdeviceInternalControlForward_FNPTR(pSubdevice) pSubdevice->__subdeviceInternalControlForward__ +#define subdeviceInternalControlForward_FNPTR(pSubdevice) pSubdevice->__nvoc_vtable->__subdeviceInternalControlForward__ #define subdeviceInternalControlForward(pSubdevice, command, pParams, size) subdeviceInternalControlForward_DISPATCH(pSubdevice, command, pParams, size) #define subdeviceCtrlCmdBiosGetInfoV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdBiosGetInfoV2__ #define subdeviceCtrlCmdBiosGetInfoV2(pSubdevice, pBiosInfoParams) subdeviceCtrlCmdBiosGetInfoV2_DISPATCH(pSubdevice, pBiosInfoParams) @@ -850,10 +869,6 @@ NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_C #define subdeviceCtrlCmdMcGetArchInfo(pSubdevice, pArchInfoParams) subdeviceCtrlCmdMcGetArchInfo_DISPATCH(pSubdevice, pArchInfoParams) #define subdeviceCtrlCmdMcGetManufacturer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdMcGetManufacturer__ #define subdeviceCtrlCmdMcGetManufacturer(pSubdevice, pManufacturerParams) subdeviceCtrlCmdMcGetManufacturer_DISPATCH(pSubdevice, pManufacturerParams) -#define subdeviceCtrlCmdMcQueryHostclkSlowdownStatus_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdMcQueryHostclkSlowdownStatus__ -#define subdeviceCtrlCmdMcQueryHostclkSlowdownStatus(pSubdevice, pGetStatusParams) subdeviceCtrlCmdMcQueryHostclkSlowdownStatus_DISPATCH(pSubdevice, pGetStatusParams) -#define subdeviceCtrlCmdMcSetHostclkSlowdownStatus_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdMcSetHostclkSlowdownStatus__ -#define subdeviceCtrlCmdMcSetHostclkSlowdownStatus(pSubdevice, pParams) subdeviceCtrlCmdMcSetHostclkSlowdownStatus_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdMcChangeReplayableFaultOwnership_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdMcChangeReplayableFaultOwnership__ #define subdeviceCtrlCmdMcChangeReplayableFaultOwnership(pSubdevice, pReplayableFaultOwnrshpParams) subdeviceCtrlCmdMcChangeReplayableFaultOwnership_DISPATCH(pSubdevice, pReplayableFaultOwnrshpParams) #define subdeviceCtrlCmdMcServiceInterrupts_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdMcServiceInterrupts__ @@ -930,6 +945,12 @@ NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_C #define subdeviceCtrlCmdBusUnsetP2pMapping_HAL(pSubdevice, pParams) subdeviceCtrlCmdBusUnsetP2pMapping_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdNvlinkGetSupportedCounters_FNPTR(arg_this) arg_this->__subdeviceCtrlCmdNvlinkGetSupportedCounters__ #define subdeviceCtrlCmdNvlinkGetSupportedCounters(arg_this, arg2) subdeviceCtrlCmdNvlinkGetSupportedCounters_DISPATCH(arg_this, arg2) +#define subdeviceCtrlCmdNvlinkGetSupportedBWMode_FNPTR(arg_this) arg_this->__subdeviceCtrlCmdNvlinkGetSupportedBWMode__ +#define subdeviceCtrlCmdNvlinkGetSupportedBWMode(arg_this, arg2) subdeviceCtrlCmdNvlinkGetSupportedBWMode_DISPATCH(arg_this, arg2) +#define subdeviceCtrlCmdNvlinkGetBWMode_FNPTR(arg_this) arg_this->__subdeviceCtrlCmdNvlinkGetBWMode__ +#define subdeviceCtrlCmdNvlinkGetBWMode(arg_this, arg2) subdeviceCtrlCmdNvlinkGetBWMode_DISPATCH(arg_this, arg2) +#define subdeviceCtrlCmdNvlinkSetBWMode_FNPTR(arg_this) arg_this->__subdeviceCtrlCmdNvlinkSetBWMode__ +#define subdeviceCtrlCmdNvlinkSetBWMode(arg_this, arg2) subdeviceCtrlCmdNvlinkSetBWMode_DISPATCH(arg_this, arg2) #define subdeviceCtrlCmdGetNvlinkCountersV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGetNvlinkCountersV2__ #define subdeviceCtrlCmdGetNvlinkCountersV2(pSubdevice, pParams) subdeviceCtrlCmdGetNvlinkCountersV2_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdClearNvlinkCountersV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdClearNvlinkCountersV2__ @@ -965,22 +986,8 @@ NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_C #define subdeviceCtrlCmdNvlinkGetLpCounters(pSubdevice, pParams) subdeviceCtrlCmdNvlinkGetLpCounters_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdNvlinkClearLpCounters_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkClearLpCounters__ #define subdeviceCtrlCmdNvlinkClearLpCounters(pSubdevice, pParams) subdeviceCtrlCmdNvlinkClearLpCounters_DISPATCH(pSubdevice, pParams) -#define subdeviceCtrlCmdNvlinkEnableNvlinkPeer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkEnableNvlinkPeer__ -#define subdeviceCtrlCmdNvlinkEnableNvlinkPeer(pSubdevice, pParams) subdeviceCtrlCmdNvlinkEnableNvlinkPeer_DISPATCH(pSubdevice, pParams) -#define subdeviceCtrlCmdNvlinkCoreCallback_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkCoreCallback__ -#define subdeviceCtrlCmdNvlinkCoreCallback(pSubdevice, pParams) subdeviceCtrlCmdNvlinkCoreCallback_DISPATCH(pSubdevice, pParams) -#define subdeviceCtrlCmdNvlinkGetAliEnabled_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkGetAliEnabled__ -#define subdeviceCtrlCmdNvlinkGetAliEnabled(pSubdevice, pParams) subdeviceCtrlCmdNvlinkGetAliEnabled_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdNvlinkSetLoopbackMode_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkSetLoopbackMode__ #define subdeviceCtrlCmdNvlinkSetLoopbackMode(pSubdevice, pParams) subdeviceCtrlCmdNvlinkSetLoopbackMode_DISPATCH(pSubdevice, pParams) -#define subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid__ -#define subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid(pSubdevice, pParams) subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid_DISPATCH(pSubdevice, pParams) -#define subdeviceCtrlCmdNvlinkUpdateHshubMux_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkUpdateHshubMux__ -#define subdeviceCtrlCmdNvlinkUpdateHshubMux(pSubdevice, pParams) subdeviceCtrlCmdNvlinkUpdateHshubMux_DISPATCH(pSubdevice, pParams) -#define subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer__ -#define subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer(pSubdevice, pParams) subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer_DISPATCH(pSubdevice, pParams) -#define subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer__ -#define subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer(pSubdevice, pParams) subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdNvlinkRemoveNvlinkMapping_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkRemoveNvlinkMapping__ #define subdeviceCtrlCmdNvlinkRemoveNvlinkMapping(pSubdevice, pParams) subdeviceCtrlCmdNvlinkRemoveNvlinkMapping_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdNvlinkSaveRestoreHshubState_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkSaveRestoreHshubState__ @@ -1053,6 +1060,8 @@ NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_C #define subdeviceCtrlCmdIsNvlinkReducedConfig(pSubdevice, pParams) subdeviceCtrlCmdIsNvlinkReducedConfig_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdNvlinkGetPortEvents_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkGetPortEvents__ #define subdeviceCtrlCmdNvlinkGetPortEvents(pSubdevice, pParams) subdeviceCtrlCmdNvlinkGetPortEvents_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdNvlinkIsGpuDegraded_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdNvlinkIsGpuDegraded__ +#define subdeviceCtrlCmdNvlinkIsGpuDegraded(pSubdevice, pParams) subdeviceCtrlCmdNvlinkIsGpuDegraded_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdNvlinkPRMAccessPAOS_FNPTR(arg_this) arg_this->__subdeviceCtrlCmdNvlinkPRMAccessPAOS__ #define subdeviceCtrlCmdNvlinkPRMAccessPAOS(arg_this, arg2) subdeviceCtrlCmdNvlinkPRMAccessPAOS_DISPATCH(arg_this, arg2) #define subdeviceCtrlCmdNvlinkPRMAccessPLTC_FNPTR(arg_this) arg_this->__subdeviceCtrlCmdNvlinkPRMAccessPLTC__ @@ -1065,8 +1074,6 @@ NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_C #define subdeviceCtrlCmdNvlinkPRMAccessMCAM(arg_this, arg2) subdeviceCtrlCmdNvlinkPRMAccessMCAM_DISPATCH(arg_this, arg2) #define subdeviceCtrlCmdNvlinkPRMAccessMTECR_FNPTR(arg_this) arg_this->__subdeviceCtrlCmdNvlinkPRMAccessMTECR__ #define subdeviceCtrlCmdNvlinkPRMAccessMTECR(arg_this, arg2) subdeviceCtrlCmdNvlinkPRMAccessMTECR_DISPATCH(arg_this, arg2) -#define subdeviceCtrlCmdNvlinkPRMAccessMTWE_FNPTR(arg_this) arg_this->__subdeviceCtrlCmdNvlinkPRMAccessMTWE__ -#define subdeviceCtrlCmdNvlinkPRMAccessMTWE(arg_this, arg2) subdeviceCtrlCmdNvlinkPRMAccessMTWE_DISPATCH(arg_this, arg2) #define subdeviceCtrlCmdNvlinkPRMAccessMTEWE_FNPTR(arg_this) arg_this->__subdeviceCtrlCmdNvlinkPRMAccessMTEWE__ #define subdeviceCtrlCmdNvlinkPRMAccessMTEWE(arg_this, arg2) subdeviceCtrlCmdNvlinkPRMAccessMTEWE_DISPATCH(arg_this, arg2) #define subdeviceCtrlCmdNvlinkPRMAccessMTSDE_FNPTR(arg_this) arg_this->__subdeviceCtrlCmdNvlinkPRMAccessMTSDE__ @@ -1075,8 +1082,6 @@ NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_C #define subdeviceCtrlCmdNvlinkPRMAccessMTCAP(arg_this, arg2) subdeviceCtrlCmdNvlinkPRMAccessMTCAP_DISPATCH(arg_this, arg2) #define subdeviceCtrlCmdNvlinkPRMAccessPMTU_FNPTR(arg_this) arg_this->__subdeviceCtrlCmdNvlinkPRMAccessPMTU__ #define subdeviceCtrlCmdNvlinkPRMAccessPMTU(arg_this, arg2) subdeviceCtrlCmdNvlinkPRMAccessPMTU_DISPATCH(arg_this, arg2) -#define subdeviceCtrlCmdNvlinkPRMAccessMCIA_FNPTR(arg_this) arg_this->__subdeviceCtrlCmdNvlinkPRMAccessMCIA__ -#define subdeviceCtrlCmdNvlinkPRMAccessMCIA(arg_this, arg2) subdeviceCtrlCmdNvlinkPRMAccessMCIA_DISPATCH(arg_this, arg2) #define subdeviceCtrlCmdNvlinkPRMAccessPMLP_FNPTR(arg_this) arg_this->__subdeviceCtrlCmdNvlinkPRMAccessPMLP__ #define subdeviceCtrlCmdNvlinkPRMAccessPMLP(arg_this, arg2) subdeviceCtrlCmdNvlinkPRMAccessPMLP_DISPATCH(arg_this, arg2) #define subdeviceCtrlCmdNvlinkPRMAccessGHPKT_FNPTR(arg_this) arg_this->__subdeviceCtrlCmdNvlinkPRMAccessGHPKT__ @@ -1131,6 +1136,8 @@ NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_C #define subdeviceCtrlCmdNvlinkPRMAccessMLPC(arg_this, arg2) subdeviceCtrlCmdNvlinkPRMAccessMLPC_DISPATCH(arg_this, arg2) #define subdeviceCtrlCmdNvlinkPRMAccessPLIB_FNPTR(arg_this) arg_this->__subdeviceCtrlCmdNvlinkPRMAccessPLIB__ #define subdeviceCtrlCmdNvlinkPRMAccessPLIB(arg_this, arg2) subdeviceCtrlCmdNvlinkPRMAccessPLIB_DISPATCH(arg_this, arg2) +#define subdeviceCtrlCmdNvlinkGetPlatformInfo_FNPTR(arg_this) arg_this->__subdeviceCtrlCmdNvlinkGetPlatformInfo__ +#define subdeviceCtrlCmdNvlinkGetPlatformInfo(arg_this, arg2) subdeviceCtrlCmdNvlinkGetPlatformInfo_DISPATCH(arg_this, arg2) #define subdeviceCtrlCmdI2cReadBuffer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdI2cReadBuffer__ #define subdeviceCtrlCmdI2cReadBuffer(pSubdevice, pI2cParams) subdeviceCtrlCmdI2cReadBuffer_DISPATCH(pSubdevice, pI2cParams) #define subdeviceCtrlCmdI2cWriteBuffer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdI2cWriteBuffer__ @@ -1192,20 +1199,10 @@ NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_C #define subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp_HAL(pSubdevice, pParams) subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdFbGetInfoV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetInfoV2__ #define subdeviceCtrlCmdFbGetInfoV2(pSubdevice, pFbInfoParams) subdeviceCtrlCmdFbGetInfoV2_DISPATCH(pSubdevice, pFbInfoParams) -#define subdeviceCtrlCmdFbGetCarveoutAddressInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetCarveoutAddressInfo__ -#define subdeviceCtrlCmdFbGetCarveoutAddressInfo(pSubdevice, pParams) subdeviceCtrlCmdFbGetCarveoutAddressInfo_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdFbGetCalibrationLockFailed_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetCalibrationLockFailed__ #define subdeviceCtrlCmdFbGetCalibrationLockFailed(pSubdevice, pGCLFParams) subdeviceCtrlCmdFbGetCalibrationLockFailed_DISPATCH(pSubdevice, pGCLFParams) #define subdeviceCtrlCmdFbFlushGpuCache_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbFlushGpuCache__ #define subdeviceCtrlCmdFbFlushGpuCache(pSubdevice, pCacheFlushParams) subdeviceCtrlCmdFbFlushGpuCache_DISPATCH(pSubdevice, pCacheFlushParams) -#define subdeviceCtrlCmdFbSetGpuCacheAllocPolicy_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbSetGpuCacheAllocPolicy__ -#define subdeviceCtrlCmdFbSetGpuCacheAllocPolicy(pSubdevice, pParams) subdeviceCtrlCmdFbSetGpuCacheAllocPolicy_DISPATCH(pSubdevice, pParams) -#define subdeviceCtrlCmdFbGetGpuCacheAllocPolicy_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetGpuCacheAllocPolicy__ -#define subdeviceCtrlCmdFbGetGpuCacheAllocPolicy(pSubdevice, pGpuCacheAllocPolicyParams) subdeviceCtrlCmdFbGetGpuCacheAllocPolicy_DISPATCH(pSubdevice, pGpuCacheAllocPolicyParams) -#define subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2__ -#define subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2(pSubdevice, pParams) subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2_DISPATCH(pSubdevice, pParams) -#define subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2__ -#define subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2(pSubdevice, pParams) subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdFbGetGpuCacheInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetGpuCacheInfo__ #define subdeviceCtrlCmdFbGetGpuCacheInfo(pSubdevice, pGpuCacheParams) subdeviceCtrlCmdFbGetGpuCacheInfo_DISPATCH(pSubdevice, pGpuCacheParams) #define subdeviceCtrlCmdFbGetCliManagedOfflinedPages_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetCliManagedOfflinedPages__ @@ -1267,6 +1264,8 @@ NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_C #define subdeviceCtrlCmdFbSetWriteLimit(pSubdevice, pParams) subdeviceCtrlCmdFbSetWriteLimit_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdGmmuCommitTlbInvalidate_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGmmuCommitTlbInvalidate__ #define subdeviceCtrlCmdGmmuCommitTlbInvalidate(pSubdevice, pParams) subdeviceCtrlCmdGmmuCommitTlbInvalidate_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdFbGetStaticBar1Info_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFbGetStaticBar1Info__ +#define subdeviceCtrlCmdFbGetStaticBar1Info(pSubdevice, pParams) subdeviceCtrlCmdFbGetStaticBar1Info_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdSetGpfifo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdSetGpfifo__ #define subdeviceCtrlCmdSetGpfifo(pSubdevice, pSetGpFifoParams) subdeviceCtrlCmdSetGpfifo_DISPATCH(pSubdevice, pSetGpFifoParams) #define subdeviceCtrlCmdSetOperationalProperties_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdSetOperationalProperties__ @@ -1481,8 +1480,6 @@ NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_C #define subdeviceCtrlCmdGpuSetPower(pSubdevice, pSetPowerParams) subdeviceCtrlCmdGpuSetPower_DISPATCH(pSubdevice, pSetPowerParams) #define subdeviceCtrlCmdGpuGetSdm_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetSdm__ #define subdeviceCtrlCmdGpuGetSdm(pSubdevice, pSdmParams) subdeviceCtrlCmdGpuGetSdm_DISPATCH(pSubdevice, pSdmParams) -#define subdeviceCtrlCmdGpuSetSdm_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuSetSdm__ -#define subdeviceCtrlCmdGpuSetSdm(pSubdevice, pSdmParams) subdeviceCtrlCmdGpuSetSdm_DISPATCH(pSubdevice, pSdmParams) #define subdeviceCtrlCmdGpuGetSimulationInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetSimulationInfo__ #define subdeviceCtrlCmdGpuGetSimulationInfo(pSubdevice, pGpuSimulationInfoParams) subdeviceCtrlCmdGpuGetSimulationInfo_DISPATCH(pSubdevice, pGpuSimulationInfoParams) #define subdeviceCtrlCmdGpuGetEngines_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetEngines__ @@ -1592,6 +1589,14 @@ NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_C #define subdeviceCtrlCmdGetP2pCaps(pSubdevice, pParams) subdeviceCtrlCmdGetP2pCaps_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdGetGpuFabricProbeInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGetGpuFabricProbeInfo__ #define subdeviceCtrlCmdGetGpuFabricProbeInfo(pSubdevice, pParams) subdeviceCtrlCmdGetGpuFabricProbeInfo_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuMarkDeviceForReset_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuMarkDeviceForReset__ +#define subdeviceCtrlCmdGpuMarkDeviceForReset(pSubdevice) subdeviceCtrlCmdGpuMarkDeviceForReset_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdGpuUnmarkDeviceForReset_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuUnmarkDeviceForReset__ +#define subdeviceCtrlCmdGpuUnmarkDeviceForReset(pSubdevice) subdeviceCtrlCmdGpuUnmarkDeviceForReset_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdGpuMarkDeviceForDrainAndReset_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuMarkDeviceForDrainAndReset__ +#define subdeviceCtrlCmdGpuMarkDeviceForDrainAndReset(pSubdevice) subdeviceCtrlCmdGpuMarkDeviceForDrainAndReset_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdGpuUnmarkDeviceForDrainAndReset_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuUnmarkDeviceForDrainAndReset__ +#define subdeviceCtrlCmdGpuUnmarkDeviceForDrainAndReset(pSubdevice) subdeviceCtrlCmdGpuUnmarkDeviceForDrainAndReset_DISPATCH(pSubdevice) #define subdeviceCtrlCmdGpuGetResetStatus_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetResetStatus__ #define subdeviceCtrlCmdGpuGetResetStatus(pSubdevice, pParams) subdeviceCtrlCmdGpuGetResetStatus_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdGpuGetDrainAndResetStatus_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetDrainAndResetStatus__ @@ -1602,6 +1607,8 @@ NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_C #define subdeviceCtrlGpuGetFipsStatus(pSubdevice, pParams) subdeviceCtrlGpuGetFipsStatus_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdGpuGetVfCaps_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetVfCaps__ #define subdeviceCtrlCmdGpuGetVfCaps(pSubdevice, pParams) subdeviceCtrlCmdGpuGetVfCaps_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdGpuGetRecoveryAction_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuGetRecoveryAction__ +#define subdeviceCtrlCmdGpuGetRecoveryAction(pSubdevice, pParams) subdeviceCtrlCmdGpuGetRecoveryAction_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdEventSetTrigger_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdEventSetTrigger__ #define subdeviceCtrlCmdEventSetTrigger(pSubdevice) subdeviceCtrlCmdEventSetTrigger_DISPATCH(pSubdevice) #define subdeviceCtrlCmdEventSetTriggerFifo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdEventSetTriggerFifo__ @@ -1703,6 +1710,8 @@ NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_C #define subdeviceCtrlCmdCeGetAllCaps_HAL(pSubdevice, pCeCapsParams) subdeviceCtrlCmdCeGetAllCaps_DISPATCH(pSubdevice, pCeCapsParams) #define subdeviceCtrlCmdCeGetDecompLceMask_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdCeGetDecompLceMask__ #define subdeviceCtrlCmdCeGetDecompLceMask(pSubdevice, pParams) subdeviceCtrlCmdCeGetDecompLceMask_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdCeIsDecompLceEnabled_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdCeIsDecompLceEnabled__ +#define subdeviceCtrlCmdCeIsDecompLceEnabled(pSubdevice, pParams) subdeviceCtrlCmdCeIsDecompLceEnabled_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdFlcnGetDmemUsage_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFlcnGetDmemUsage__ #define subdeviceCtrlCmdFlcnGetDmemUsage(pSubdevice, pFlcnDmemUsageParams) subdeviceCtrlCmdFlcnGetDmemUsage_DISPATCH(pSubdevice, pFlcnDmemUsageParams) #define subdeviceCtrlCmdFlcnGetEngineArch_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFlcnGetEngineArch__ @@ -1719,8 +1728,6 @@ NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_C #define subdeviceCtrlCmdFlcnGetCtxBufferSize(pSubdevice, pParams) subdeviceCtrlCmdFlcnGetCtxBufferSize_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdEccGetClientExposedCounters_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdEccGetClientExposedCounters__ #define subdeviceCtrlCmdEccGetClientExposedCounters(pSubdevice, pParams) subdeviceCtrlCmdEccGetClientExposedCounters_DISPATCH(pSubdevice, pParams) -#define subdeviceCtrlCmdEccGetEciCounters_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdEccGetEciCounters__ -#define subdeviceCtrlCmdEccGetEciCounters(pSubdevice, pParams) subdeviceCtrlCmdEccGetEciCounters_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdEccGetVolatileCounts_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdEccGetVolatileCounts__ #define subdeviceCtrlCmdEccGetVolatileCounts(pSubdevice, pParams) subdeviceCtrlCmdEccGetVolatileCounts_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdGpuQueryEccConfiguration_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGpuQueryEccConfiguration__ @@ -1851,6 +1858,8 @@ NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_C #define subdeviceCtrlCmdInternalBusCreateC2cPeerMapping(pSubdevice, pParams) subdeviceCtrlCmdInternalBusCreateC2cPeerMapping_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping__ #define subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping(pSubdevice, pParams) subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalGpuGetPFBar1Spa_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGpuGetPFBar1Spa__ +#define subdeviceCtrlCmdInternalGpuGetPFBar1Spa(pSubdevice, pConfigParams) subdeviceCtrlCmdInternalGpuGetPFBar1Spa_DISPATCH(pSubdevice, pConfigParams) #define subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries__ #define subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries(pSubdevice, pParams) subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdGmmuGetStaticInfo_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGmmuGetStaticInfo__ @@ -1939,6 +1948,20 @@ NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_C #define subdeviceCtrlCmdInternalNvlinkGetTotalNumLinksPerIoctrl(pSubdevice, pParams) subdeviceCtrlCmdInternalNvlinkGetTotalNumLinksPerIoctrl_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdInternalNvlinkPostFatalErrorRecovery_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalNvlinkPostFatalErrorRecovery__ #define subdeviceCtrlCmdInternalNvlinkPostFatalErrorRecovery(pSubdevice) subdeviceCtrlCmdInternalNvlinkPostFatalErrorRecovery_DISPATCH(pSubdevice) +#define subdeviceCtrlCmdInternalNvlinkEnableNvlinkPeer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalNvlinkEnableNvlinkPeer__ +#define subdeviceCtrlCmdInternalNvlinkEnableNvlinkPeer(pSubdevice, pParams) subdeviceCtrlCmdInternalNvlinkEnableNvlinkPeer_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalNvlinkCoreCallback_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalNvlinkCoreCallback__ +#define subdeviceCtrlCmdInternalNvlinkCoreCallback(pSubdevice, pParams) subdeviceCtrlCmdInternalNvlinkCoreCallback_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalNvlinkUpdateRemoteLocalSid_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalNvlinkUpdateRemoteLocalSid__ +#define subdeviceCtrlCmdInternalNvlinkUpdateRemoteLocalSid(pSubdevice, pParams) subdeviceCtrlCmdInternalNvlinkUpdateRemoteLocalSid_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalNvlinkGetAliEnabled_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalNvlinkGetAliEnabled__ +#define subdeviceCtrlCmdInternalNvlinkGetAliEnabled(pSubdevice, pParams) subdeviceCtrlCmdInternalNvlinkGetAliEnabled_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalNvlinkPreSetupNvlinkPeer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalNvlinkPreSetupNvlinkPeer__ +#define subdeviceCtrlCmdInternalNvlinkPreSetupNvlinkPeer(pSubdevice, pParams) subdeviceCtrlCmdInternalNvlinkPreSetupNvlinkPeer_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalNvlinkPostSetupNvlinkPeer_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalNvlinkPostSetupNvlinkPeer__ +#define subdeviceCtrlCmdInternalNvlinkPostSetupNvlinkPeer(pSubdevice, pParams) subdeviceCtrlCmdInternalNvlinkPostSetupNvlinkPeer_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalNvlinkUpdateHshubMux_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalNvlinkUpdateHshubMux__ +#define subdeviceCtrlCmdInternalNvlinkUpdateHshubMux(pSubdevice, pParams) subdeviceCtrlCmdInternalNvlinkUpdateHshubMux_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdInternalSetP2pCaps_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalSetP2pCaps__ #define subdeviceCtrlCmdInternalSetP2pCaps(pSubdevice, pParams) subdeviceCtrlCmdInternalSetP2pCaps_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdInternalRemoveP2pCaps_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalRemoveP2pCaps__ @@ -1965,6 +1988,10 @@ NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_C #define subdeviceCtrlCmdInternalGsyncIsDisplayIdValid(pSubdevice, pAttachParams) subdeviceCtrlCmdInternalGsyncIsDisplayIdValid_DISPATCH(pSubdevice, pAttachParams) #define subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync__ #define subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync(pSubdevice, pAttachParams) subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync_DISPATCH(pSubdevice, pAttachParams) +#define subdeviceCtrlCmdInternalGsyncApplyStereoPinAlwaysHiWar_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGsyncApplyStereoPinAlwaysHiWar__ +#define subdeviceCtrlCmdInternalGsyncApplyStereoPinAlwaysHiWar(pSubdevice, pAttachParams) subdeviceCtrlCmdInternalGsyncApplyStereoPinAlwaysHiWar_DISPATCH(pSubdevice, pAttachParams) +#define subdeviceCtrlCmdInternalGsyncGetRasterSyncDecodeMode_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGsyncGetRasterSyncDecodeMode__ +#define subdeviceCtrlCmdInternalGsyncGetRasterSyncDecodeMode(pSubdevice, pParams) subdeviceCtrlCmdInternalGsyncGetRasterSyncDecodeMode_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdInternalFbsrInit_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalFbsrInit__ #define subdeviceCtrlCmdInternalFbsrInit(pSubdevice, pParams) subdeviceCtrlCmdInternalFbsrInit_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdInternalPostInitBrightcStateLoad_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalPostInitBrightcStateLoad__ @@ -2019,8 +2046,8 @@ NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_C #define subdeviceCtrlCmdInternalInitUserSharedData(pSubdevice, pParams) subdeviceCtrlCmdInternalInitUserSharedData_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdInternalUserSharedDataSetDataPoll_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalUserSharedDataSetDataPoll__ #define subdeviceCtrlCmdInternalUserSharedDataSetDataPoll(pSubdevice, pParams) subdeviceCtrlCmdInternalUserSharedDataSetDataPoll_DISPATCH(pSubdevice, pParams) -#define subdeviceCtrlCmdInternalGspStartTrace_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGspStartTrace__ -#define subdeviceCtrlCmdInternalGspStartTrace(pSubdevice, pParams) subdeviceCtrlCmdInternalGspStartTrace_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdInternalControlGspTrace_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalControlGspTrace__ +#define subdeviceCtrlCmdInternalControlGspTrace(pSubdevice, pParams) subdeviceCtrlCmdInternalControlGspTrace_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdInternalGpuClientLowPowerModeEnter_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGpuClientLowPowerModeEnter__ #define subdeviceCtrlCmdInternalGpuClientLowPowerModeEnter(pSubdevice, pParams) subdeviceCtrlCmdInternalGpuClientLowPowerModeEnter_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdInternalGpuSetIllum_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdInternalGpuSetIllum__ @@ -2049,6 +2076,8 @@ NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_C #define subdeviceCtrlCmdVgpuMgrInternalSetVgpuMgrConfig(pSubdevice, pParams) subdeviceCtrlCmdVgpuMgrInternalSetVgpuMgrConfig_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdVgpuMgrInternalFreeStates_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalFreeStates__ #define subdeviceCtrlCmdVgpuMgrInternalFreeStates(pSubdevice, pParams) subdeviceCtrlCmdVgpuMgrInternalFreeStates_DISPATCH(pSubdevice, pParams) +#define subdeviceCtrlCmdVgpuMgrInternalGetFrameRateLimiterStatus_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalGetFrameRateLimiterStatus__ +#define subdeviceCtrlCmdVgpuMgrInternalGetFrameRateLimiterStatus(pSubdevice, pParams) subdeviceCtrlCmdVgpuMgrInternalGetFrameRateLimiterStatus_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdGetAvailableHshubMask_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdGetAvailableHshubMask__ #define subdeviceCtrlCmdGetAvailableHshubMask(pSubdevice, pParams) subdeviceCtrlCmdGetAvailableHshubMask_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlSetEcThrottleMode_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlSetEcThrottleMode__ @@ -2063,70 +2092,72 @@ NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_C #define subdeviceCtrlCmdCcuGetSampleInfo(pSubdevice, pParams) subdeviceCtrlCmdCcuGetSampleInfo_DISPATCH(pSubdevice, pParams) #define subdeviceCtrlCmdSpdmPartition_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdSpdmPartition__ #define subdeviceCtrlCmdSpdmPartition(pSubdevice, pSpdmPartitionParams) subdeviceCtrlCmdSpdmPartition_DISPATCH(pSubdevice, pSpdmPartitionParams) -#define subdeviceControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define subdeviceSpdmRetrieveTranscript_FNPTR(pSubdevice) pSubdevice->__subdeviceSpdmRetrieveTranscript__ +#define subdeviceSpdmRetrieveTranscript(pSubdevice, pSpdmRetrieveSessionTranscriptParams) subdeviceSpdmRetrieveTranscript_DISPATCH(pSubdevice, pSpdmRetrieveSessionTranscriptParams) +#define subdeviceControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define subdeviceControl(pGpuResource, pCallContext, pParams) subdeviceControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define subdeviceMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define subdeviceMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define subdeviceMap(pGpuResource, pCallContext, pParams, pCpuMapping) subdeviceMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define subdeviceUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define subdeviceUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define subdeviceUnmap(pGpuResource, pCallContext, pCpuMapping) subdeviceUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define subdeviceShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define subdeviceShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define subdeviceShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) subdeviceShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define subdeviceGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define subdeviceGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define subdeviceGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) subdeviceGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define subdeviceGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define subdeviceGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define subdeviceGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) subdeviceGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define subdeviceGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define subdeviceGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define subdeviceGetInternalObjectHandle(pGpuResource) subdeviceGetInternalObjectHandle_DISPATCH(pGpuResource) -#define subdeviceAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define subdeviceAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define subdeviceAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) subdeviceAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define subdeviceGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define subdeviceGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define subdeviceGetMemInterMapParams(pRmResource, pParams) subdeviceGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define subdeviceCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define subdeviceCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define subdeviceCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) subdeviceCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define subdeviceGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define subdeviceGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define subdeviceGetMemoryMappingDescriptor(pRmResource, ppMemDesc) subdeviceGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define subdeviceControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define subdeviceControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define subdeviceControlSerialization_Prologue(pResource, pCallContext, pParams) subdeviceControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define subdeviceControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define subdeviceControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define subdeviceControlSerialization_Epilogue(pResource, pCallContext, pParams) subdeviceControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define subdeviceControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define subdeviceControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define subdeviceControl_Prologue(pResource, pCallContext, pParams) subdeviceControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define subdeviceControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define subdeviceControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define subdeviceControl_Epilogue(pResource, pCallContext, pParams) subdeviceControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define subdeviceCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define subdeviceCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define subdeviceCanCopy(pResource) subdeviceCanCopy_DISPATCH(pResource) -#define subdeviceIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define subdeviceIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define subdeviceIsDuplicate(pResource, hMemory, pDuplicate) subdeviceIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define subdeviceControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define subdeviceControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define subdeviceControlFilter(pResource, pCallContext, pParams) subdeviceControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define subdeviceIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define subdeviceIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define subdeviceIsPartialUnmapSupported(pResource) subdeviceIsPartialUnmapSupported_DISPATCH(pResource) -#define subdeviceMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define subdeviceMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define subdeviceMapTo(pResource, pParams) subdeviceMapTo_DISPATCH(pResource, pParams) -#define subdeviceUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define subdeviceUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define subdeviceUnmapFrom(pResource, pParams) subdeviceUnmapFrom_DISPATCH(pResource, pParams) -#define subdeviceGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define subdeviceGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define subdeviceGetRefCount(pResource) subdeviceGetRefCount_DISPATCH(pResource) -#define subdeviceAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define subdeviceAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define subdeviceAddAdditionalDependants(pClient, pResource, pReference) subdeviceAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define subdeviceGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define subdeviceGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define subdeviceGetNotificationListPtr(pNotifier) subdeviceGetNotificationListPtr_DISPATCH(pNotifier) -#define subdeviceGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define subdeviceGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define subdeviceGetNotificationShare(pNotifier) subdeviceGetNotificationShare_DISPATCH(pNotifier) -#define subdeviceSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define subdeviceSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define subdeviceSetNotificationShare(pNotifier, pNotifShare) subdeviceSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define subdeviceUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define subdeviceUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define subdeviceUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) subdeviceUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define subdeviceGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define subdeviceGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define subdeviceGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) subdeviceGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline void subdevicePreDestruct_DISPATCH(struct Subdevice *pResource) { - pResource->__subdevicePreDestruct__(pResource); + pResource->__nvoc_vtable->__subdevicePreDestruct__(pResource); } static inline NV_STATUS subdeviceInternalControlForward_DISPATCH(struct Subdevice *pSubdevice, NvU32 command, void *pParams, NvU32 size) { - return pSubdevice->__subdeviceInternalControlForward__(pSubdevice, command, pParams, size); + return pSubdevice->__nvoc_vtable->__subdeviceInternalControlForward__(pSubdevice, command, pParams, size); } static inline NV_STATUS subdeviceCtrlCmdBiosGetInfoV2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_BIOS_GET_INFO_V2_PARAMS *pBiosInfoParams) { @@ -2157,14 +2188,6 @@ static inline NV_STATUS subdeviceCtrlCmdMcGetManufacturer_DISPATCH(struct Subdev return pSubdevice->__subdeviceCtrlCmdMcGetManufacturer__(pSubdevice, pManufacturerParams); } -static inline NV_STATUS subdeviceCtrlCmdMcQueryHostclkSlowdownStatus_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_MC_QUERY_HOSTCLK_SLOWDOWN_STATUS_PARAMS *pGetStatusParams) { - return pSubdevice->__subdeviceCtrlCmdMcQueryHostclkSlowdownStatus__(pSubdevice, pGetStatusParams); -} - -static inline NV_STATUS subdeviceCtrlCmdMcSetHostclkSlowdownStatus_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_MC_SET_HOSTCLK_SLOWDOWN_STATUS_PARAMS *pParams) { - return pSubdevice->__subdeviceCtrlCmdMcSetHostclkSlowdownStatus__(pSubdevice, pParams); -} - static inline NV_STATUS subdeviceCtrlCmdMcChangeReplayableFaultOwnership_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_MC_CHANGE_REPLAYABLE_FAULT_OWNERSHIP_PARAMS *pReplayableFaultOwnrshpParams) { return pSubdevice->__subdeviceCtrlCmdMcChangeReplayableFaultOwnership__(pSubdevice, pReplayableFaultOwnrshpParams); } @@ -2305,6 +2328,18 @@ static inline NV_STATUS subdeviceCtrlCmdNvlinkGetSupportedCounters_DISPATCH(stru return arg_this->__subdeviceCtrlCmdNvlinkGetSupportedCounters__(arg_this, arg2); } +static inline NV_STATUS subdeviceCtrlCmdNvlinkGetSupportedBWMode_DISPATCH(struct Subdevice *arg_this, NV2080_CTRL_NVLINK_GET_SUPPORTED_BW_MODE_PARAMS *arg2) { + return arg_this->__subdeviceCtrlCmdNvlinkGetSupportedBWMode__(arg_this, arg2); +} + +static inline NV_STATUS subdeviceCtrlCmdNvlinkGetBWMode_DISPATCH(struct Subdevice *arg_this, NV2080_CTRL_NVLINK_GET_BW_MODE_PARAMS *arg2) { + return arg_this->__subdeviceCtrlCmdNvlinkGetBWMode__(arg_this, arg2); +} + +static inline NV_STATUS subdeviceCtrlCmdNvlinkSetBWMode_DISPATCH(struct Subdevice *arg_this, NV2080_CTRL_NVLINK_SET_BW_MODE_PARAMS *arg2) { + return arg_this->__subdeviceCtrlCmdNvlinkSetBWMode__(arg_this, arg2); +} + static inline NV_STATUS subdeviceCtrlCmdGetNvlinkCountersV2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_COUNTERS_V2_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGetNvlinkCountersV2__(pSubdevice, pParams); } @@ -2373,38 +2408,10 @@ static inline NV_STATUS subdeviceCtrlCmdNvlinkClearLpCounters_DISPATCH(struct Su return pSubdevice->__subdeviceCtrlCmdNvlinkClearLpCounters__(pSubdevice, pParams); } -static inline NV_STATUS subdeviceCtrlCmdNvlinkEnableNvlinkPeer_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_ENABLE_NVLINK_PEER_PARAMS *pParams) { - return pSubdevice->__subdeviceCtrlCmdNvlinkEnableNvlinkPeer__(pSubdevice, pParams); -} - -static inline NV_STATUS subdeviceCtrlCmdNvlinkCoreCallback_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS *pParams) { - return pSubdevice->__subdeviceCtrlCmdNvlinkCoreCallback__(pSubdevice, pParams); -} - -static inline NV_STATUS subdeviceCtrlCmdNvlinkGetAliEnabled_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_ALI_ENABLED_PARAMS *pParams) { - return pSubdevice->__subdeviceCtrlCmdNvlinkGetAliEnabled__(pSubdevice, pParams); -} - static inline NV_STATUS subdeviceCtrlCmdNvlinkSetLoopbackMode_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkSetLoopbackMode__(pSubdevice, pParams); } -static inline NV_STATUS subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS *pParams) { - return pSubdevice->__subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid__(pSubdevice, pParams); -} - -static inline NV_STATUS subdeviceCtrlCmdNvlinkUpdateHshubMux_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_PARAMS *pParams) { - return pSubdevice->__subdeviceCtrlCmdNvlinkUpdateHshubMux__(pSubdevice, pParams); -} - -static inline NV_STATUS subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS *pParams) { - return pSubdevice->__subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer__(pSubdevice, pParams); -} - -static inline NV_STATUS subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS *pParams) { - return pSubdevice->__subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer__(pSubdevice, pParams); -} - static inline NV_STATUS subdeviceCtrlCmdNvlinkRemoveNvlinkMapping_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_REMOVE_NVLINK_MAPPING_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdNvlinkRemoveNvlinkMapping__(pSubdevice, pParams); } @@ -2549,6 +2556,10 @@ static inline NV_STATUS subdeviceCtrlCmdNvlinkGetPortEvents_DISPATCH(struct Subd return pSubdevice->__subdeviceCtrlCmdNvlinkGetPortEvents__(pSubdevice, pParams); } +static inline NV_STATUS subdeviceCtrlCmdNvlinkIsGpuDegraded_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_IS_GPU_DEGRADED_PARAMS *pParams) { + return pSubdevice->__subdeviceCtrlCmdNvlinkIsGpuDegraded__(pSubdevice, pParams); +} + static inline NV_STATUS subdeviceCtrlCmdNvlinkPRMAccessPAOS_DISPATCH(struct Subdevice *arg_this, NV2080_CTRL_NVLINK_PRM_ACCESS_PAOS_PARAMS *arg2) { return arg_this->__subdeviceCtrlCmdNvlinkPRMAccessPAOS__(arg_this, arg2); } @@ -2573,10 +2584,6 @@ static inline NV_STATUS subdeviceCtrlCmdNvlinkPRMAccessMTECR_DISPATCH(struct Sub return arg_this->__subdeviceCtrlCmdNvlinkPRMAccessMTECR__(arg_this, arg2); } -static inline NV_STATUS subdeviceCtrlCmdNvlinkPRMAccessMTWE_DISPATCH(struct Subdevice *arg_this, NV2080_CTRL_NVLINK_PRM_ACCESS_MTWE_PARAMS *arg2) { - return arg_this->__subdeviceCtrlCmdNvlinkPRMAccessMTWE__(arg_this, arg2); -} - static inline NV_STATUS subdeviceCtrlCmdNvlinkPRMAccessMTEWE_DISPATCH(struct Subdevice *arg_this, NV2080_CTRL_NVLINK_PRM_ACCESS_MTEWE_PARAMS *arg2) { return arg_this->__subdeviceCtrlCmdNvlinkPRMAccessMTEWE__(arg_this, arg2); } @@ -2593,10 +2600,6 @@ static inline NV_STATUS subdeviceCtrlCmdNvlinkPRMAccessPMTU_DISPATCH(struct Subd return arg_this->__subdeviceCtrlCmdNvlinkPRMAccessPMTU__(arg_this, arg2); } -static inline NV_STATUS subdeviceCtrlCmdNvlinkPRMAccessMCIA_DISPATCH(struct Subdevice *arg_this, NV2080_CTRL_NVLINK_PRM_ACCESS_MCIA_PARAMS *arg2) { - return arg_this->__subdeviceCtrlCmdNvlinkPRMAccessMCIA__(arg_this, arg2); -} - static inline NV_STATUS subdeviceCtrlCmdNvlinkPRMAccessPMLP_DISPATCH(struct Subdevice *arg_this, NV2080_CTRL_NVLINK_PRM_ACCESS_PMLP_PARAMS *arg2) { return arg_this->__subdeviceCtrlCmdNvlinkPRMAccessPMLP__(arg_this, arg2); } @@ -2705,6 +2708,10 @@ static inline NV_STATUS subdeviceCtrlCmdNvlinkPRMAccessPLIB_DISPATCH(struct Subd return arg_this->__subdeviceCtrlCmdNvlinkPRMAccessPLIB__(arg_this, arg2); } +static inline NV_STATUS subdeviceCtrlCmdNvlinkGetPlatformInfo_DISPATCH(struct Subdevice *arg_this, NV2080_CTRL_NVLINK_GET_PLATFORM_INFO_PARAMS *arg2) { + return arg_this->__subdeviceCtrlCmdNvlinkGetPlatformInfo__(arg_this, arg2); +} + static inline NV_STATUS subdeviceCtrlCmdI2cReadBuffer_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_I2C_READ_BUFFER_PARAMS *pI2cParams) { return pSubdevice->__subdeviceCtrlCmdI2cReadBuffer__(pSubdevice, pI2cParams); } @@ -2805,10 +2812,6 @@ static inline NV_STATUS subdeviceCtrlCmdFbGetInfoV2_DISPATCH(struct Subdevice *p return pSubdevice->__subdeviceCtrlCmdFbGetInfoV2__(pSubdevice, pFbInfoParams); } -static inline NV_STATUS subdeviceCtrlCmdFbGetCarveoutAddressInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_SYSTEM_CARVEOUT_ADDRESS_SPACE_INFO *pParams) { - return pSubdevice->__subdeviceCtrlCmdFbGetCarveoutAddressInfo__(pSubdevice, pParams); -} - static inline NV_STATUS subdeviceCtrlCmdFbGetCalibrationLockFailed_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_CALIBRATION_LOCK_FAILED_PARAMS *pGCLFParams) { return pSubdevice->__subdeviceCtrlCmdFbGetCalibrationLockFailed__(pSubdevice, pGCLFParams); } @@ -2817,22 +2820,6 @@ static inline NV_STATUS subdeviceCtrlCmdFbFlushGpuCache_DISPATCH(struct Subdevic return pSubdevice->__subdeviceCtrlCmdFbFlushGpuCache__(pSubdevice, pCacheFlushParams); } -static inline NV_STATUS subdeviceCtrlCmdFbSetGpuCacheAllocPolicy_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS *pParams) { - return pSubdevice->__subdeviceCtrlCmdFbSetGpuCacheAllocPolicy__(pSubdevice, pParams); -} - -static inline NV_STATUS subdeviceCtrlCmdFbGetGpuCacheAllocPolicy_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS *pGpuCacheAllocPolicyParams) { - return pSubdevice->__subdeviceCtrlCmdFbGetGpuCacheAllocPolicy__(pSubdevice, pGpuCacheAllocPolicyParams); -} - -static inline NV_STATUS subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS *pParams) { - return pSubdevice->__subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2__(pSubdevice, pParams); -} - -static inline NV_STATUS subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS *pParams) { - return pSubdevice->__subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2__(pSubdevice, pParams); -} - static inline NV_STATUS subdeviceCtrlCmdFbGetGpuCacheInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_GPU_CACHE_INFO_PARAMS *pGpuCacheParams) { return pSubdevice->__subdeviceCtrlCmdFbGetGpuCacheInfo__(pSubdevice, pGpuCacheParams); } @@ -2945,6 +2932,10 @@ static inline NV_STATUS subdeviceCtrlCmdGmmuCommitTlbInvalidate_DISPATCH(struct return pSubdevice->__subdeviceCtrlCmdGmmuCommitTlbInvalidate__(pSubdevice, pParams); } +static inline NV_STATUS subdeviceCtrlCmdFbGetStaticBar1Info_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_STATIC_BAR1_INFO_PARAMS *pParams) { + return pSubdevice->__subdeviceCtrlCmdFbGetStaticBar1Info__(pSubdevice, pParams); +} + static inline NV_STATUS subdeviceCtrlCmdSetGpfifo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_SET_GPFIFO_PARAMS *pSetGpFifoParams) { return pSubdevice->__subdeviceCtrlCmdSetGpfifo__(pSubdevice, pSetGpFifoParams); } @@ -3361,10 +3352,6 @@ static inline NV_STATUS subdeviceCtrlCmdGpuGetSdm_DISPATCH(struct Subdevice *pSu return pSubdevice->__subdeviceCtrlCmdGpuGetSdm__(pSubdevice, pSdmParams); } -static inline NV_STATUS subdeviceCtrlCmdGpuSetSdm_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_SDM_PARAMS *pSdmParams) { - return pSubdevice->__subdeviceCtrlCmdGpuSetSdm__(pSubdevice, pSdmParams); -} - static inline NV_STATUS subdeviceCtrlCmdGpuGetSimulationInfo_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_SIMULATION_INFO_PARAMS *pGpuSimulationInfoParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetSimulationInfo__(pSubdevice, pGpuSimulationInfoParams); } @@ -3577,6 +3564,22 @@ static inline NV_STATUS subdeviceCtrlCmdGetGpuFabricProbeInfo_DISPATCH(struct Su return pSubdevice->__subdeviceCtrlCmdGetGpuFabricProbeInfo__(pSubdevice, pParams); } +static inline NV_STATUS subdeviceCtrlCmdGpuMarkDeviceForReset_DISPATCH(struct Subdevice *pSubdevice) { + return pSubdevice->__subdeviceCtrlCmdGpuMarkDeviceForReset__(pSubdevice); +} + +static inline NV_STATUS subdeviceCtrlCmdGpuUnmarkDeviceForReset_DISPATCH(struct Subdevice *pSubdevice) { + return pSubdevice->__subdeviceCtrlCmdGpuUnmarkDeviceForReset__(pSubdevice); +} + +static inline NV_STATUS subdeviceCtrlCmdGpuMarkDeviceForDrainAndReset_DISPATCH(struct Subdevice *pSubdevice) { + return pSubdevice->__subdeviceCtrlCmdGpuMarkDeviceForDrainAndReset__(pSubdevice); +} + +static inline NV_STATUS subdeviceCtrlCmdGpuUnmarkDeviceForDrainAndReset_DISPATCH(struct Subdevice *pSubdevice) { + return pSubdevice->__subdeviceCtrlCmdGpuUnmarkDeviceForDrainAndReset__(pSubdevice); +} + static inline NV_STATUS subdeviceCtrlCmdGpuGetResetStatus_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_RESET_STATUS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGpuGetResetStatus__(pSubdevice, pParams); } @@ -3597,6 +3600,10 @@ static inline NV_STATUS subdeviceCtrlCmdGpuGetVfCaps_DISPATCH(struct Subdevice * return pSubdevice->__subdeviceCtrlCmdGpuGetVfCaps__(pSubdevice, pParams); } +static inline NV_STATUS subdeviceCtrlCmdGpuGetRecoveryAction_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_RECOVERY_ACTION_PARAMS *pParams) { + return pSubdevice->__subdeviceCtrlCmdGpuGetRecoveryAction__(pSubdevice, pParams); +} + static inline NV_STATUS subdeviceCtrlCmdEventSetTrigger_DISPATCH(struct Subdevice *pSubdevice) { return pSubdevice->__subdeviceCtrlCmdEventSetTrigger__(pSubdevice); } @@ -3789,6 +3796,10 @@ static inline NV_STATUS subdeviceCtrlCmdCeGetDecompLceMask_DISPATCH(struct Subde return pSubdevice->__subdeviceCtrlCmdCeGetDecompLceMask__(pSubdevice, pParams); } +static inline NV_STATUS subdeviceCtrlCmdCeIsDecompLceEnabled_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CE_IS_DECOMP_LCE_ENABLED_PARAMS *pParams) { + return pSubdevice->__subdeviceCtrlCmdCeIsDecompLceEnabled__(pSubdevice, pParams); +} + static inline NV_STATUS subdeviceCtrlCmdFlcnGetDmemUsage_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_GET_DMEM_USAGE_PARAMS *pFlcnDmemUsageParams) { return pSubdevice->__subdeviceCtrlCmdFlcnGetDmemUsage__(pSubdevice, pFlcnDmemUsageParams); } @@ -3821,10 +3832,6 @@ static inline NV_STATUS subdeviceCtrlCmdEccGetClientExposedCounters_DISPATCH(str return pSubdevice->__subdeviceCtrlCmdEccGetClientExposedCounters__(pSubdevice, pParams); } -static inline NV_STATUS subdeviceCtrlCmdEccGetEciCounters_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_ECC_GET_ECI_COUNTERS_PARAMS *pParams) { - return pSubdevice->__subdeviceCtrlCmdEccGetEciCounters__(pSubdevice, pParams); -} - static inline NV_STATUS subdeviceCtrlCmdEccGetVolatileCounts_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_ECC_GET_VOLATILE_COUNTS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdEccGetVolatileCounts__(pSubdevice, pParams); } @@ -4077,6 +4084,10 @@ static inline NV_STATUS subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping_DISPATCH return pSubdevice->__subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping__(pSubdevice, pParams); } +static inline NV_STATUS subdeviceCtrlCmdInternalGpuGetPFBar1Spa_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPU_GET_PF_BAR1_SPA_PARAMS *pConfigParams) { + return pSubdevice->__subdeviceCtrlCmdInternalGpuGetPFBar1Spa__(pSubdevice, pConfigParams); +} + static inline NV_STATUS subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_VMMU_GET_SPA_FOR_GPA_ENTRIES_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries__(pSubdevice, pParams); } @@ -4249,6 +4260,34 @@ static inline NV_STATUS subdeviceCtrlCmdInternalNvlinkPostFatalErrorRecovery_DIS return pSubdevice->__subdeviceCtrlCmdInternalNvlinkPostFatalErrorRecovery__(pSubdevice); } +static inline NV_STATUS subdeviceCtrlCmdInternalNvlinkEnableNvlinkPeer_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_ENABLE_NVLINK_PEER_PARAMS *pParams) { + return pSubdevice->__subdeviceCtrlCmdInternalNvlinkEnableNvlinkPeer__(pSubdevice, pParams); +} + +static inline NV_STATUS subdeviceCtrlCmdInternalNvlinkCoreCallback_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS *pParams) { + return pSubdevice->__subdeviceCtrlCmdInternalNvlinkCoreCallback__(pSubdevice, pParams); +} + +static inline NV_STATUS subdeviceCtrlCmdInternalNvlinkUpdateRemoteLocalSid_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS *pParams) { + return pSubdevice->__subdeviceCtrlCmdInternalNvlinkUpdateRemoteLocalSid__(pSubdevice, pParams); +} + +static inline NV_STATUS subdeviceCtrlCmdInternalNvlinkGetAliEnabled_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_GET_ALI_ENABLED_PARAMS *pParams) { + return pSubdevice->__subdeviceCtrlCmdInternalNvlinkGetAliEnabled__(pSubdevice, pParams); +} + +static inline NV_STATUS subdeviceCtrlCmdInternalNvlinkPreSetupNvlinkPeer_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS *pParams) { + return pSubdevice->__subdeviceCtrlCmdInternalNvlinkPreSetupNvlinkPeer__(pSubdevice, pParams); +} + +static inline NV_STATUS subdeviceCtrlCmdInternalNvlinkPostSetupNvlinkPeer_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS *pParams) { + return pSubdevice->__subdeviceCtrlCmdInternalNvlinkPostSetupNvlinkPeer__(pSubdevice, pParams); +} + +static inline NV_STATUS subdeviceCtrlCmdInternalNvlinkUpdateHshubMux_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_UPDATE_HSHUB_MUX_PARAMS *pParams) { + return pSubdevice->__subdeviceCtrlCmdInternalNvlinkUpdateHshubMux__(pSubdevice, pParams); +} + static inline NV_STATUS subdeviceCtrlCmdInternalSetP2pCaps_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_SET_P2P_CAPS_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalSetP2pCaps__(pSubdevice, pParams); } @@ -4297,6 +4336,14 @@ static inline NV_STATUS subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync_ return pSubdevice->__subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync__(pSubdevice, pAttachParams); } +static inline NV_STATUS subdeviceCtrlCmdInternalGsyncApplyStereoPinAlwaysHiWar_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_APPLY_STEREO_PIN_ALWAYS_HI_WAR_PARAMS *pAttachParams) { + return pSubdevice->__subdeviceCtrlCmdInternalGsyncApplyStereoPinAlwaysHiWar__(pSubdevice, pAttachParams); +} + +static inline NV_STATUS subdeviceCtrlCmdInternalGsyncGetRasterSyncDecodeMode_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_GET_RASTER_SYNC_DECODE_MODE_PARAMS *pParams) { + return pSubdevice->__subdeviceCtrlCmdInternalGsyncGetRasterSyncDecodeMode__(pSubdevice, pParams); +} + static inline NV_STATUS subdeviceCtrlCmdInternalFbsrInit_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FBSR_INIT_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdInternalFbsrInit__(pSubdevice, pParams); } @@ -4405,8 +4452,8 @@ static inline NV_STATUS subdeviceCtrlCmdInternalUserSharedDataSetDataPoll_DISPAT return pSubdevice->__subdeviceCtrlCmdInternalUserSharedDataSetDataPoll__(pSubdevice, pParams); } -static inline NV_STATUS subdeviceCtrlCmdInternalGspStartTrace_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE_INFO_PARAMS *pParams) { - return pSubdevice->__subdeviceCtrlCmdInternalGspStartTrace__(pSubdevice, pParams); +static inline NV_STATUS subdeviceCtrlCmdInternalControlGspTrace_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE_PARAMS *pParams) { + return pSubdevice->__subdeviceCtrlCmdInternalControlGspTrace__(pSubdevice, pParams); } static inline NV_STATUS subdeviceCtrlCmdInternalGpuClientLowPowerModeEnter_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPU_CLIENT_LOW_POWER_MODE_ENTER_PARAMS *pParams) { @@ -4465,6 +4512,10 @@ static inline NV_STATUS subdeviceCtrlCmdVgpuMgrInternalFreeStates_DISPATCH(struc return pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalFreeStates__(pSubdevice, pParams); } +static inline NV_STATUS subdeviceCtrlCmdVgpuMgrInternalGetFrameRateLimiterStatus_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_GET_FRAME_RATE_LIMITER_STATUS_PARAMS *pParams) { + return pSubdevice->__subdeviceCtrlCmdVgpuMgrInternalGetFrameRateLimiterStatus__(pSubdevice, pParams); +} + static inline NV_STATUS subdeviceCtrlCmdGetAvailableHshubMask_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_HSHUB_GET_AVAILABLE_MASK_PARAMS *pParams) { return pSubdevice->__subdeviceCtrlCmdGetAvailableHshubMask__(pSubdevice, pParams); } @@ -4493,125 +4544,127 @@ static inline NV_STATUS subdeviceCtrlCmdSpdmPartition_DISPATCH(struct Subdevice return pSubdevice->__subdeviceCtrlCmdSpdmPartition__(pSubdevice, pSpdmPartitionParams); } +static inline NV_STATUS subdeviceSpdmRetrieveTranscript_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_SPDM_RETRIEVE_TRANSCRIPT_PARAMS *pSpdmRetrieveSessionTranscriptParams) { + return pSubdevice->__subdeviceSpdmRetrieveTranscript__(pSubdevice, pSpdmRetrieveSessionTranscriptParams); +} + static inline NV_STATUS subdeviceControl_DISPATCH(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__subdeviceControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__subdeviceControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS subdeviceMap_DISPATCH(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__subdeviceMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__subdeviceMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS subdeviceUnmap_DISPATCH(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__subdeviceUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__subdeviceUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool subdeviceShareCallback_DISPATCH(struct Subdevice *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__subdeviceShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__subdeviceShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS subdeviceGetRegBaseOffsetAndSize_DISPATCH(struct Subdevice *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__subdeviceGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__subdeviceGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS subdeviceGetMapAddrSpace_DISPATCH(struct Subdevice *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__subdeviceGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__subdeviceGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NvHandle subdeviceGetInternalObjectHandle_DISPATCH(struct Subdevice *pGpuResource) { - return pGpuResource->__subdeviceGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__subdeviceGetInternalObjectHandle__(pGpuResource); } static inline NvBool subdeviceAccessCallback_DISPATCH(struct Subdevice *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__subdeviceAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__subdeviceAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS subdeviceGetMemInterMapParams_DISPATCH(struct Subdevice *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__subdeviceGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__subdeviceGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS subdeviceCheckMemInterUnmap_DISPATCH(struct Subdevice *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__subdeviceCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__subdeviceCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS subdeviceGetMemoryMappingDescriptor_DISPATCH(struct Subdevice *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__subdeviceGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__subdeviceGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS subdeviceControlSerialization_Prologue_DISPATCH(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__subdeviceControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__subdeviceControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void subdeviceControlSerialization_Epilogue_DISPATCH(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__subdeviceControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__subdeviceControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS subdeviceControl_Prologue_DISPATCH(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__subdeviceControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__subdeviceControl_Prologue__(pResource, pCallContext, pParams); } static inline void subdeviceControl_Epilogue_DISPATCH(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__subdeviceControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__subdeviceControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool subdeviceCanCopy_DISPATCH(struct Subdevice *pResource) { - return pResource->__subdeviceCanCopy__(pResource); + return pResource->__nvoc_vtable->__subdeviceCanCopy__(pResource); } static inline NV_STATUS subdeviceIsDuplicate_DISPATCH(struct Subdevice *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__subdeviceIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__subdeviceIsDuplicate__(pResource, hMemory, pDuplicate); } static inline NV_STATUS subdeviceControlFilter_DISPATCH(struct Subdevice *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__subdeviceControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__subdeviceControlFilter__(pResource, pCallContext, pParams); } static inline NvBool subdeviceIsPartialUnmapSupported_DISPATCH(struct Subdevice *pResource) { - return pResource->__subdeviceIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__subdeviceIsPartialUnmapSupported__(pResource); } static inline NV_STATUS subdeviceMapTo_DISPATCH(struct Subdevice *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__subdeviceMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__subdeviceMapTo__(pResource, pParams); } static inline NV_STATUS subdeviceUnmapFrom_DISPATCH(struct Subdevice *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__subdeviceUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__subdeviceUnmapFrom__(pResource, pParams); } static inline NvU32 subdeviceGetRefCount_DISPATCH(struct Subdevice *pResource) { - return pResource->__subdeviceGetRefCount__(pResource); + return pResource->__nvoc_vtable->__subdeviceGetRefCount__(pResource); } static inline void subdeviceAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct Subdevice *pResource, RsResourceRef *pReference) { - pResource->__subdeviceAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__subdeviceAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * subdeviceGetNotificationListPtr_DISPATCH(struct Subdevice *pNotifier) { - return pNotifier->__subdeviceGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__subdeviceGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * subdeviceGetNotificationShare_DISPATCH(struct Subdevice *pNotifier) { - return pNotifier->__subdeviceGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__subdeviceGetNotificationShare__(pNotifier); } static inline void subdeviceSetNotificationShare_DISPATCH(struct Subdevice *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__subdeviceSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__subdeviceSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS subdeviceUnregisterEvent_DISPATCH(struct Subdevice *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__subdeviceUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__subdeviceUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS subdeviceGetOrAllocNotifShare_DISPATCH(struct Subdevice *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__subdeviceGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__subdeviceGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } void subdevicePreDestruct_IMPL(struct Subdevice *pResource); NV_STATUS subdeviceInternalControlForward_IMPL(struct Subdevice *pSubdevice, NvU32 command, void *pParams, NvU32 size); -static inline NV_STATUS subdeviceCtrlCmdBiosGetInfoV2_ac1694(struct Subdevice *pSubdevice, NV2080_CTRL_BIOS_GET_INFO_V2_PARAMS *pBiosInfoParams) { - return NV_OK; -} +NV_STATUS subdeviceCtrlCmdBiosGetInfoV2_VF(struct Subdevice *pSubdevice, NV2080_CTRL_BIOS_GET_INFO_V2_PARAMS *pBiosInfoParams); static inline NV_STATUS subdeviceCtrlCmdBiosGetInfoV2_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_BIOS_GET_INFO_V2_PARAMS *pBiosInfoParams) { NV_ASSERT_PRECOMP(0); @@ -4637,10 +4690,6 @@ NV_STATUS subdeviceCtrlCmdMcGetArchInfo_IMPL(struct Subdevice *pSubdevice, NV208 NV_STATUS subdeviceCtrlCmdMcGetManufacturer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_MC_GET_MANUFACTURER_PARAMS *pManufacturerParams); -NV_STATUS subdeviceCtrlCmdMcQueryHostclkSlowdownStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_MC_QUERY_HOSTCLK_SLOWDOWN_STATUS_PARAMS *pGetStatusParams); - -NV_STATUS subdeviceCtrlCmdMcSetHostclkSlowdownStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_MC_SET_HOSTCLK_SLOWDOWN_STATUS_PARAMS *pParams); - NV_STATUS subdeviceCtrlCmdMcChangeReplayableFaultOwnership_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_MC_CHANGE_REPLAYABLE_FAULT_OWNERSHIP_PARAMS *pReplayableFaultOwnrshpParams); NV_STATUS subdeviceCtrlCmdMcServiceInterrupts_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_MC_SERVICE_INTERRUPTS_PARAMS *pServiceInterruptParams); @@ -4739,6 +4788,12 @@ static inline NV_STATUS subdeviceCtrlCmdBusUnsetP2pMapping_5baef9(struct Subdevi NV_STATUS subdeviceCtrlCmdNvlinkGetSupportedCounters_IMPL(struct Subdevice *arg1, NV2080_CTRL_NVLINK_GET_SUPPORTED_COUNTERS_PARAMS *arg2); +NV_STATUS subdeviceCtrlCmdNvlinkGetSupportedBWMode_IMPL(struct Subdevice *arg1, NV2080_CTRL_NVLINK_GET_SUPPORTED_BW_MODE_PARAMS *arg2); + +NV_STATUS subdeviceCtrlCmdNvlinkGetBWMode_IMPL(struct Subdevice *arg1, NV2080_CTRL_NVLINK_GET_BW_MODE_PARAMS *arg2); + +NV_STATUS subdeviceCtrlCmdNvlinkSetBWMode_IMPL(struct Subdevice *arg1, NV2080_CTRL_NVLINK_SET_BW_MODE_PARAMS *arg2); + NV_STATUS subdeviceCtrlCmdGetNvlinkCountersV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_COUNTERS_V2_PARAMS *pParams); NV_STATUS subdeviceCtrlCmdClearNvlinkCountersV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_CLEAR_COUNTERS_V2_PARAMS *pParams); @@ -4775,22 +4830,8 @@ NV_STATUS subdeviceCtrlCmdNvlinkGetLpCounters_IMPL(struct Subdevice *pSubdevice, NV_STATUS subdeviceCtrlCmdNvlinkClearLpCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_LP_COUNTERS_PARAMS *pParams); -NV_STATUS subdeviceCtrlCmdNvlinkEnableNvlinkPeer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_ENABLE_NVLINK_PEER_PARAMS *pParams); - -NV_STATUS subdeviceCtrlCmdNvlinkCoreCallback_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS *pParams); - -NV_STATUS subdeviceCtrlCmdNvlinkGetAliEnabled_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_ALI_ENABLED_PARAMS *pParams); - NV_STATUS subdeviceCtrlCmdNvlinkSetLoopbackMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_PARAMS *pParams); -NV_STATUS subdeviceCtrlCmdNvlinkUpdateRemoteLocalSid_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS *pParams); - -NV_STATUS subdeviceCtrlCmdNvlinkUpdateHshubMux_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_PARAMS *pParams); - -NV_STATUS subdeviceCtrlCmdNvlinkPreSetupNvlinkPeer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS *pParams); - -NV_STATUS subdeviceCtrlCmdNvlinkPostSetupNvlinkPeer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS *pParams); - NV_STATUS subdeviceCtrlCmdNvlinkRemoveNvlinkMapping_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_REMOVE_NVLINK_MAPPING_PARAMS *pParams); NV_STATUS subdeviceCtrlCmdNvlinkSaveRestoreHshubState_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_SAVE_RESTORE_HSHUB_STATE_PARAMS *pParams); @@ -4863,6 +4904,8 @@ NV_STATUS subdeviceCtrlCmdIsNvlinkReducedConfig_IMPL(struct Subdevice *pSubdevic NV_STATUS subdeviceCtrlCmdNvlinkGetPortEvents_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_GET_PORT_EVENTS_PARAMS *pParams); +NV_STATUS subdeviceCtrlCmdNvlinkIsGpuDegraded_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_NVLINK_IS_GPU_DEGRADED_PARAMS *pParams); + NV_STATUS subdeviceCtrlCmdNvlinkPRMAccessPAOS_IMPL(struct Subdevice *arg1, NV2080_CTRL_NVLINK_PRM_ACCESS_PAOS_PARAMS *arg2); NV_STATUS subdeviceCtrlCmdNvlinkPRMAccessPLTC_IMPL(struct Subdevice *arg1, NV2080_CTRL_NVLINK_PRM_ACCESS_PLTC_PARAMS *arg2); @@ -4875,8 +4918,6 @@ NV_STATUS subdeviceCtrlCmdNvlinkPRMAccessMCAM_IMPL(struct Subdevice *arg1, NV208 NV_STATUS subdeviceCtrlCmdNvlinkPRMAccessMTECR_IMPL(struct Subdevice *arg1, NV2080_CTRL_NVLINK_PRM_ACCESS_MTECR_PARAMS *arg2); -NV_STATUS subdeviceCtrlCmdNvlinkPRMAccessMTWE_IMPL(struct Subdevice *arg1, NV2080_CTRL_NVLINK_PRM_ACCESS_MTWE_PARAMS *arg2); - NV_STATUS subdeviceCtrlCmdNvlinkPRMAccessMTEWE_IMPL(struct Subdevice *arg1, NV2080_CTRL_NVLINK_PRM_ACCESS_MTEWE_PARAMS *arg2); NV_STATUS subdeviceCtrlCmdNvlinkPRMAccessMTSDE_IMPL(struct Subdevice *arg1, NV2080_CTRL_NVLINK_PRM_ACCESS_MTSDE_PARAMS *arg2); @@ -4885,8 +4926,6 @@ NV_STATUS subdeviceCtrlCmdNvlinkPRMAccessMTCAP_IMPL(struct Subdevice *arg1, NV20 NV_STATUS subdeviceCtrlCmdNvlinkPRMAccessPMTU_IMPL(struct Subdevice *arg1, NV2080_CTRL_NVLINK_PRM_ACCESS_PMTU_PARAMS *arg2); -NV_STATUS subdeviceCtrlCmdNvlinkPRMAccessMCIA_IMPL(struct Subdevice *arg1, NV2080_CTRL_NVLINK_PRM_ACCESS_MCIA_PARAMS *arg2); - NV_STATUS subdeviceCtrlCmdNvlinkPRMAccessPMLP_IMPL(struct Subdevice *arg1, NV2080_CTRL_NVLINK_PRM_ACCESS_PMLP_PARAMS *arg2); NV_STATUS subdeviceCtrlCmdNvlinkPRMAccessGHPKT_IMPL(struct Subdevice *arg1, NV2080_CTRL_NVLINK_PRM_ACCESS_GHPKT_PARAMS *arg2); @@ -4941,6 +4980,8 @@ NV_STATUS subdeviceCtrlCmdNvlinkPRMAccessMLPC_IMPL(struct Subdevice *arg1, NV208 NV_STATUS subdeviceCtrlCmdNvlinkPRMAccessPLIB_IMPL(struct Subdevice *arg1, NV2080_CTRL_NVLINK_PRM_ACCESS_PLIB_PARAMS *arg2); +NV_STATUS subdeviceCtrlCmdNvlinkGetPlatformInfo_IMPL(struct Subdevice *arg1, NV2080_CTRL_NVLINK_GET_PLATFORM_INFO_PARAMS *arg2); + NV_STATUS subdeviceCtrlCmdI2cReadBuffer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_I2C_READ_BUFFER_PARAMS *pI2cParams); NV_STATUS subdeviceCtrlCmdI2cWriteBuffer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_I2C_WRITE_BUFFER_PARAMS *pI2cParams); @@ -5028,20 +5069,10 @@ static inline NV_STATUS subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp_46f6 NV_STATUS subdeviceCtrlCmdFbGetInfoV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_INFO_V2_PARAMS *pFbInfoParams); -NV_STATUS subdeviceCtrlCmdFbGetCarveoutAddressInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_SYSTEM_CARVEOUT_ADDRESS_SPACE_INFO *pParams); - NV_STATUS subdeviceCtrlCmdFbGetCalibrationLockFailed_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_CALIBRATION_LOCK_FAILED_PARAMS *pGCLFParams); NV_STATUS subdeviceCtrlCmdFbFlushGpuCache_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_FLUSH_GPU_CACHE_PARAMS *pCacheFlushParams); -NV_STATUS subdeviceCtrlCmdFbSetGpuCacheAllocPolicy_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS *pParams); - -NV_STATUS subdeviceCtrlCmdFbGetGpuCacheAllocPolicy_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS *pGpuCacheAllocPolicyParams); - -NV_STATUS subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS *pParams); - -NV_STATUS subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS *pParams); - NV_STATUS subdeviceCtrlCmdFbGetGpuCacheInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_GPU_CACHE_INFO_PARAMS *pGpuCacheParams); NV_STATUS subdeviceCtrlCmdFbGetCliManagedOfflinedPages_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_CLI_MANAGED_OFFLINED_PAGES_PARAMS *pOsOfflinedParams); @@ -5127,6 +5158,8 @@ NV_STATUS subdeviceCtrlCmdFbSetWriteLimit_IMPL(struct Subdevice *pSubdevice, NV2 NV_STATUS subdeviceCtrlCmdGmmuCommitTlbInvalidate_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GMMU_COMMIT_TLB_INVALIDATE_PARAMS *pParams); +NV_STATUS subdeviceCtrlCmdFbGetStaticBar1Info_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_STATIC_BAR1_INFO_PARAMS *pParams); + NV_STATUS subdeviceCtrlCmdSetGpfifo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_SET_GPFIFO_PARAMS *pSetGpFifoParams); NV_STATUS subdeviceCtrlCmdSetOperationalProperties_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_SET_OPERATIONAL_PROPERTIES_PARAMS *pSetOperationalProperties); @@ -5362,8 +5395,6 @@ NV_STATUS subdeviceCtrlCmdGpuSetPower_IMPL(struct Subdevice *pSubdevice, NV2080_ NV_STATUS subdeviceCtrlCmdGpuGetSdm_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_SDM_PARAMS *pSdmParams); -NV_STATUS subdeviceCtrlCmdGpuSetSdm_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_SET_SDM_PARAMS *pSdmParams); - NV_STATUS subdeviceCtrlCmdGpuGetSimulationInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_SIMULATION_INFO_PARAMS *pGpuSimulationInfoParams); NV_STATUS subdeviceCtrlCmdGpuGetEngines_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_ENGINES_PARAMS *pParams); @@ -5484,6 +5515,14 @@ NV_STATUS subdeviceCtrlCmdGetP2pCaps_IMPL(struct Subdevice *pSubdevice, NV2080_C NV_STATUS subdeviceCtrlCmdGetGpuFabricProbeInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_GET_GPU_FABRIC_PROBE_INFO_PARAMS *pParams); +NV_STATUS subdeviceCtrlCmdGpuMarkDeviceForReset_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdGpuUnmarkDeviceForReset_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdGpuMarkDeviceForDrainAndReset_IMPL(struct Subdevice *pSubdevice); + +NV_STATUS subdeviceCtrlCmdGpuUnmarkDeviceForDrainAndReset_IMPL(struct Subdevice *pSubdevice); + NV_STATUS subdeviceCtrlCmdGpuGetResetStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_RESET_STATUS_PARAMS *pParams); NV_STATUS subdeviceCtrlCmdGpuGetDrainAndResetStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_DRAIN_AND_RESET_STATUS_PARAMS *pParams); @@ -5494,6 +5533,8 @@ NV_STATUS subdeviceCtrlGpuGetFipsStatus_IMPL(struct Subdevice *pSubdevice, NV208 NV_STATUS subdeviceCtrlCmdGpuGetVfCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_VF_CAPS_PARAMS *pParams); +NV_STATUS subdeviceCtrlCmdGpuGetRecoveryAction_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_RECOVERY_ACTION_PARAMS *pParams); + NV_STATUS subdeviceCtrlCmdEventSetTrigger_IMPL(struct Subdevice *pSubdevice); NV_STATUS subdeviceCtrlCmdEventSetTriggerFifo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_EVENT_SET_TRIGGER_FIFO_PARAMS *pTriggerFifoParams); @@ -5606,6 +5647,8 @@ NV_STATUS subdeviceCtrlCmdCeGetAllCaps_IMPL(struct Subdevice *pSubdevice, NV2080 NV_STATUS subdeviceCtrlCmdCeGetDecompLceMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CE_GET_DECOMP_LCE_MASK_PARAMS *pParams); +NV_STATUS subdeviceCtrlCmdCeIsDecompLceEnabled_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CE_IS_DECOMP_LCE_ENABLED_PARAMS *pParams); + NV_STATUS subdeviceCtrlCmdFlcnGetDmemUsage_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_GET_DMEM_USAGE_PARAMS *pFlcnDmemUsageParams); NV_STATUS subdeviceCtrlCmdFlcnGetEngineArch_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FLCN_GET_ENGINE_ARCH_PARAMS *pParams); @@ -5622,8 +5665,6 @@ NV_STATUS subdeviceCtrlCmdFlcnGetCtxBufferSize_IMPL(struct Subdevice *pSubdevice NV_STATUS subdeviceCtrlCmdEccGetClientExposedCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_ECC_GET_CLIENT_EXPOSED_COUNTERS_PARAMS *pParams); -NV_STATUS subdeviceCtrlCmdEccGetEciCounters_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_ECC_GET_ECI_COUNTERS_PARAMS *pParams); - NV_STATUS subdeviceCtrlCmdEccGetVolatileCounts_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_ECC_GET_VOLATILE_COUNTS_PARAMS *pParams); NV_STATUS subdeviceCtrlCmdGpuQueryEccConfiguration_VF(struct Subdevice *pSubdevice, NV2080_CTRL_GPU_QUERY_ECC_CONFIGURATION_PARAMS *pConfig); @@ -5770,6 +5811,8 @@ NV_STATUS subdeviceCtrlCmdInternalBusCreateC2cPeerMapping_IMPL(struct Subdevice NV_STATUS subdeviceCtrlCmdInternalBusRemoveC2cPeerMapping_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_BUS_REMOVE_C2C_PEER_MAPPING_PARAMS *pParams); +NV_STATUS subdeviceCtrlCmdInternalGpuGetPFBar1Spa_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPU_GET_PF_BAR1_SPA_PARAMS *pConfigParams); + NV_STATUS subdeviceCtrlCmdInternalVmmuGetSpaForGpaEntries_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_VMMU_GET_SPA_FOR_GPA_ENTRIES_PARAMS *pParams); NV_STATUS subdeviceCtrlCmdGmmuGetStaticInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GMMU_GET_STATIC_INFO_PARAMS *pParams); @@ -5868,6 +5911,20 @@ NV_STATUS subdeviceCtrlCmdInternalNvlinkGetTotalNumLinksPerIoctrl_IMPL(struct Su NV_STATUS subdeviceCtrlCmdInternalNvlinkPostFatalErrorRecovery_IMPL(struct Subdevice *pSubdevice); +NV_STATUS subdeviceCtrlCmdInternalNvlinkEnableNvlinkPeer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_ENABLE_NVLINK_PEER_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalNvlinkCoreCallback_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalNvlinkUpdateRemoteLocalSid_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalNvlinkGetAliEnabled_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_GET_ALI_ENABLED_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalNvlinkPreSetupNvlinkPeer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalNvlinkPostSetupNvlinkPeer_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdInternalNvlinkUpdateHshubMux_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_NVLINK_UPDATE_HSHUB_MUX_PARAMS *pParams); + NV_STATUS subdeviceCtrlCmdInternalSetP2pCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_SET_P2P_CAPS_PARAMS *pParams); NV_STATUS subdeviceCtrlCmdInternalRemoveP2pCaps_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_REMOVE_P2P_CAPS_PARAMS *pParams); @@ -5906,6 +5963,10 @@ NV_STATUS subdeviceCtrlCmdInternalGsyncIsDisplayIdValid_IMPL(struct Subdevice *p NV_STATUS subdeviceCtrlCmdInternalGsyncSetOrRestoreGpioRasterSync_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_SET_OR_RESTORE_RASTER_SYNC_PARAMS *pAttachParams); +NV_STATUS subdeviceCtrlCmdInternalGsyncApplyStereoPinAlwaysHiWar_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_APPLY_STEREO_PIN_ALWAYS_HI_WAR_PARAMS *pAttachParams); + +NV_STATUS subdeviceCtrlCmdInternalGsyncGetRasterSyncDecodeMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GSYNC_GET_RASTER_SYNC_DECODE_MODE_PARAMS *pParams); + NV_STATUS subdeviceCtrlCmdInternalFbsrInit_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_FBSR_INIT_PARAMS *pParams); NV_STATUS subdeviceCtrlCmdInternalPostInitBrightcStateLoad_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_INIT_BRIGHTC_STATE_LOAD_PARAMS *pParams); @@ -5960,7 +6021,7 @@ NV_STATUS subdeviceCtrlCmdInternalInitUserSharedData_IMPL(struct Subdevice *pSub NV_STATUS subdeviceCtrlCmdInternalUserSharedDataSetDataPoll_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_USER_SHARED_DATA_SET_DATA_POLL_PARAMS *pParams); -NV_STATUS subdeviceCtrlCmdInternalGspStartTrace_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE_INFO_PARAMS *pParams); +NV_STATUS subdeviceCtrlCmdInternalControlGspTrace_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE_PARAMS *pParams); NV_STATUS subdeviceCtrlCmdInternalGpuClientLowPowerModeEnter_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GPU_CLIENT_LOW_POWER_MODE_ENTER_PARAMS *pParams); @@ -5990,6 +6051,8 @@ NV_STATUS subdeviceCtrlCmdVgpuMgrInternalSetVgpuMgrConfig_IMPL(struct Subdevice NV_STATUS subdeviceCtrlCmdVgpuMgrInternalFreeStates_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_INTERNAL_FREE_STATES_PARAMS *pParams); +NV_STATUS subdeviceCtrlCmdVgpuMgrInternalGetFrameRateLimiterStatus_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_VGPU_MGR_GET_FRAME_RATE_LIMITER_STATUS_PARAMS *pParams); + NV_STATUS subdeviceCtrlCmdGetAvailableHshubMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_HSHUB_GET_AVAILABLE_MASK_PARAMS *pParams); NV_STATUS subdeviceCtrlSetEcThrottleMode_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_HSHUB_SET_EC_THROTTLE_MODE_PARAMS *pParams); @@ -6004,6 +6067,8 @@ NV_STATUS subdeviceCtrlCmdCcuGetSampleInfo_IMPL(struct Subdevice *pSubdevice, NV NV_STATUS subdeviceCtrlCmdSpdmPartition_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_SPDM_PARTITION_PARAMS *pSpdmPartitionParams); +NV_STATUS subdeviceSpdmRetrieveTranscript_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_SPDM_RETRIEVE_TRANSCRIPT_PARAMS *pSpdmRetrieveSessionTranscriptParams); + static inline NV_STATUS subdeviceSetPerfmonReservation(struct Subdevice *pSubdevice, NvBool bReservation, NvBool bClientHandlesGrGating, NvBool bRmHandlesIdleSlow) { return NV_OK; } diff --git a/src/nvidia/generated/g_sw_test_nvoc.c b/src/nvidia/generated/g_sw_test_nvoc.c index 31b292d109..31af35e01d 100644 --- a/src/nvidia/generated/g_sw_test_nvoc.c +++ b/src/nvidia/generated/g_sw_test_nvoc.c @@ -120,168 +120,278 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_SoftwareMethodTest = /*pExportInfo=*/ &__nvoc_export_info_SoftwareMethodTest }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super^2 +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super^2 +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap(struct RmResource *pChannelDescendant, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_down_thunk_SoftwareMethodTest_chandesGetSwMethods(struct ChannelDescendant *pSwTest, const METHOD **ppMethods, NvU32 *pNumMethods); // this + // 1 down-thunk(s) defined to bridge methods in SoftwareMethodTest from superclasses // swtestGetSwMethods: virtual override (chandes) base (chandes) -static NV_STATUS __nvoc_down_thunk_SoftwareMethodTest_chandesGetSwMethods(struct ChannelDescendant *pSwTest, const METHOD **ppMethods, NvU32 *pNumMethods) { +NV_STATUS __nvoc_down_thunk_SoftwareMethodTest_chandesGetSwMethods(struct ChannelDescendant *pSwTest, const METHOD **ppMethods, NvU32 *pNumMethods) { return swtestGetSwMethods((struct SoftwareMethodTest *)(((unsigned char *) pSwTest) - __nvoc_rtti_SoftwareMethodTest_ChannelDescendant.offset), ppMethods, pNumMethods); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^3 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^3 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^3 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super^2 +NV_STATUS __nvoc_up_thunk_GpuResource_chandesControl(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesMap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesUnmap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_GpuResource_chandesShareCallback(struct ChannelDescendant *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize(struct ChannelDescendant *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesInternalControlForward(struct ChannelDescendant *pGpuResource, NvU32 command, void *pParams, NvU32 size); // super +NvHandle __nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle(struct ChannelDescendant *pGpuResource); // super +NvBool __nvoc_up_thunk_RmResource_chandesAccessCallback(struct ChannelDescendant *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemInterMapParams(struct ChannelDescendant *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor(struct ChannelDescendant *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControl_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControl_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesCanCopy(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesIsDuplicate(struct ChannelDescendant *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_chandesPreDestruct(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesControlFilter(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesMapTo(struct ChannelDescendant *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesUnmapFrom(struct ChannelDescendant *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_chandesGetRefCount(struct ChannelDescendant *pResource); // super +void __nvoc_up_thunk_RsResource_chandesAddAdditionalDependants(struct RsClient *pClient, struct ChannelDescendant *pResource, RsResourceRef *pReference); // super +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_chandesGetNotificationListPtr(struct ChannelDescendant *pNotifier); // super +struct NotifShare * __nvoc_up_thunk_Notifier_chandesGetNotificationShare(struct ChannelDescendant *pNotifier); // super +void __nvoc_up_thunk_Notifier_chandesSetNotificationShare(struct ChannelDescendant *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesUnregisterEvent(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NvBool __nvoc_up_thunk_ChannelDescendant_swtestIsSwMethodStalling(struct SoftwareMethodTest *pChannelDescendant, NvU32 hHandle); // this +NV_STATUS __nvoc_up_thunk_ChannelDescendant_swtestCheckMemInterUnmap(struct SoftwareMethodTest *pChannelDescendant, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_GpuResource_swtestControl(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_swtestMap(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_swtestUnmap(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_swtestShareCallback(struct SoftwareMethodTest *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_swtestGetRegBaseOffsetAndSize(struct SoftwareMethodTest *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_swtestGetMapAddrSpace(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_swtestInternalControlForward(struct SoftwareMethodTest *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_swtestGetInternalObjectHandle(struct SoftwareMethodTest *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_swtestAccessCallback(struct SoftwareMethodTest *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_swtestGetMemInterMapParams(struct SoftwareMethodTest *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_swtestGetMemoryMappingDescriptor(struct SoftwareMethodTest *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_swtestControlSerialization_Prologue(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_swtestControlSerialization_Epilogue(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_swtestControl_Prologue(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_swtestControl_Epilogue(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_swtestCanCopy(struct SoftwareMethodTest *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_swtestIsDuplicate(struct SoftwareMethodTest *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_swtestPreDestruct(struct SoftwareMethodTest *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_swtestControlFilter(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_swtestIsPartialUnmapSupported(struct SoftwareMethodTest *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_swtestMapTo(struct SoftwareMethodTest *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_swtestUnmapFrom(struct SoftwareMethodTest *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_swtestGetRefCount(struct SoftwareMethodTest *pResource); // this +void __nvoc_up_thunk_RsResource_swtestAddAdditionalDependants(struct RsClient *pClient, struct SoftwareMethodTest *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_swtestGetNotificationListPtr(struct SoftwareMethodTest *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_swtestGetNotificationShare(struct SoftwareMethodTest *pNotifier); // this +void __nvoc_up_thunk_Notifier_swtestSetNotificationShare(struct SoftwareMethodTest *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_swtestUnregisterEvent(struct SoftwareMethodTest *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_swtestGetOrAllocNotifShare(struct SoftwareMethodTest *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 31 up-thunk(s) defined to bridge methods in SoftwareMethodTest to superclasses // swtestIsSwMethodStalling: virtual inherited (chandes) base (chandes) -static NvBool __nvoc_up_thunk_ChannelDescendant_swtestIsSwMethodStalling(struct SoftwareMethodTest *pChannelDescendant, NvU32 hHandle) { +NvBool __nvoc_up_thunk_ChannelDescendant_swtestIsSwMethodStalling(struct SoftwareMethodTest *pChannelDescendant, NvU32 hHandle) { return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_SoftwareMethodTest_ChannelDescendant.offset), hHandle); } // swtestCheckMemInterUnmap: virtual inherited (chandes) base (chandes) -static NV_STATUS __nvoc_up_thunk_ChannelDescendant_swtestCheckMemInterUnmap(struct SoftwareMethodTest *pChannelDescendant, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_ChannelDescendant_swtestCheckMemInterUnmap(struct SoftwareMethodTest *pChannelDescendant, NvBool bSubdeviceHandleProvided) { return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_SoftwareMethodTest_ChannelDescendant.offset), bSubdeviceHandleProvided); } // swtestControl: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_swtestControl(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_swtestControl(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset), pCallContext, pParams); } // swtestMap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_swtestMap(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_swtestMap(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // swtestUnmap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_swtestUnmap(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_swtestUnmap(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset), pCallContext, pCpuMapping); } // swtestShareCallback: virtual inherited (gpures) base (chandes) -static NvBool __nvoc_up_thunk_GpuResource_swtestShareCallback(struct SoftwareMethodTest *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_swtestShareCallback(struct SoftwareMethodTest *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // swtestGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_swtestGetRegBaseOffsetAndSize(struct SoftwareMethodTest *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_swtestGetRegBaseOffsetAndSize(struct SoftwareMethodTest *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset), pGpu, pOffset, pSize); } // swtestGetMapAddrSpace: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_swtestGetMapAddrSpace(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_swtestGetMapAddrSpace(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // swtestInternalControlForward: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_swtestInternalControlForward(struct SoftwareMethodTest *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_swtestInternalControlForward(struct SoftwareMethodTest *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset), command, pParams, size); } // swtestGetInternalObjectHandle: virtual inherited (gpures) base (chandes) -static NvHandle __nvoc_up_thunk_GpuResource_swtestGetInternalObjectHandle(struct SoftwareMethodTest *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_swtestGetInternalObjectHandle(struct SoftwareMethodTest *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_SoftwareMethodTest_GpuResource.offset)); } // swtestAccessCallback: virtual inherited (rmres) base (chandes) -static NvBool __nvoc_up_thunk_RmResource_swtestAccessCallback(struct SoftwareMethodTest *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_swtestAccessCallback(struct SoftwareMethodTest *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // swtestGetMemInterMapParams: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_swtestGetMemInterMapParams(struct SoftwareMethodTest *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_swtestGetMemInterMapParams(struct SoftwareMethodTest *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_SoftwareMethodTest_RmResource.offset), pParams); } // swtestGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_swtestGetMemoryMappingDescriptor(struct SoftwareMethodTest *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_swtestGetMemoryMappingDescriptor(struct SoftwareMethodTest *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_SoftwareMethodTest_RmResource.offset), ppMemDesc); } // swtestControlSerialization_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_swtestControlSerialization_Prologue(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_swtestControlSerialization_Prologue(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RmResource.offset), pCallContext, pParams); } // swtestControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_swtestControlSerialization_Epilogue(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_swtestControlSerialization_Epilogue(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RmResource.offset), pCallContext, pParams); } // swtestControl_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_swtestControl_Prologue(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_swtestControl_Prologue(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RmResource.offset), pCallContext, pParams); } // swtestControl_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_swtestControl_Epilogue(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_swtestControl_Epilogue(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RmResource.offset), pCallContext, pParams); } // swtestCanCopy: virtual inherited (res) base (chandes) -static NvBool __nvoc_up_thunk_RsResource_swtestCanCopy(struct SoftwareMethodTest *pResource) { +NvBool __nvoc_up_thunk_RsResource_swtestCanCopy(struct SoftwareMethodTest *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset)); } // swtestIsDuplicate: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_swtestIsDuplicate(struct SoftwareMethodTest *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_swtestIsDuplicate(struct SoftwareMethodTest *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset), hMemory, pDuplicate); } // swtestPreDestruct: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_swtestPreDestruct(struct SoftwareMethodTest *pResource) { +void __nvoc_up_thunk_RsResource_swtestPreDestruct(struct SoftwareMethodTest *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset)); } // swtestControlFilter: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_swtestControlFilter(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_swtestControlFilter(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset), pCallContext, pParams); } // swtestIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body -static NvBool __nvoc_up_thunk_RsResource_swtestIsPartialUnmapSupported(struct SoftwareMethodTest *pResource) { +NvBool __nvoc_up_thunk_RsResource_swtestIsPartialUnmapSupported(struct SoftwareMethodTest *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset)); } // swtestMapTo: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_swtestMapTo(struct SoftwareMethodTest *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_swtestMapTo(struct SoftwareMethodTest *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset), pParams); } // swtestUnmapFrom: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_swtestUnmapFrom(struct SoftwareMethodTest *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_swtestUnmapFrom(struct SoftwareMethodTest *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset), pParams); } // swtestGetRefCount: virtual inherited (res) base (chandes) -static NvU32 __nvoc_up_thunk_RsResource_swtestGetRefCount(struct SoftwareMethodTest *pResource) { +NvU32 __nvoc_up_thunk_RsResource_swtestGetRefCount(struct SoftwareMethodTest *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset)); } // swtestAddAdditionalDependants: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_swtestAddAdditionalDependants(struct RsClient *pClient, struct SoftwareMethodTest *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_swtestAddAdditionalDependants(struct RsClient *pClient, struct SoftwareMethodTest *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SoftwareMethodTest_RsResource.offset), pReference); } // swtestGetNotificationListPtr: virtual inherited (notify) base (chandes) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_swtestGetNotificationListPtr(struct SoftwareMethodTest *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_swtestGetNotificationListPtr(struct SoftwareMethodTest *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_SoftwareMethodTest_Notifier.offset)); } // swtestGetNotificationShare: virtual inherited (notify) base (chandes) -static struct NotifShare * __nvoc_up_thunk_Notifier_swtestGetNotificationShare(struct SoftwareMethodTest *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_swtestGetNotificationShare(struct SoftwareMethodTest *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_SoftwareMethodTest_Notifier.offset)); } // swtestSetNotificationShare: virtual inherited (notify) base (chandes) -static void __nvoc_up_thunk_Notifier_swtestSetNotificationShare(struct SoftwareMethodTest *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_swtestSetNotificationShare(struct SoftwareMethodTest *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_SoftwareMethodTest_Notifier.offset), pNotifShare); } // swtestUnregisterEvent: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_swtestUnregisterEvent(struct SoftwareMethodTest *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_swtestUnregisterEvent(struct SoftwareMethodTest *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_SoftwareMethodTest_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // swtestGetOrAllocNotifShare: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_swtestGetOrAllocNotifShare(struct SoftwareMethodTest *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_swtestGetOrAllocNotifShare(struct SoftwareMethodTest *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_SoftwareMethodTest_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -325,110 +435,162 @@ NV_STATUS __nvoc_ctor_SoftwareMethodTest(SoftwareMethodTest *pThis, RmHalspecOwn // Vtable initialization static void __nvoc_init_funcTable_SoftwareMethodTest_1(SoftwareMethodTest *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // swtestGetSwMethods -- virtual override (chandes) base (chandes) - pThis->__swtestGetSwMethods__ = &swtestGetSwMethods_IMPL; - pThis->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ = &__nvoc_down_thunk_SoftwareMethodTest_chandesGetSwMethods; - - // swtestIsSwMethodStalling -- virtual inherited (chandes) base (chandes) - pThis->__swtestIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_swtestIsSwMethodStalling; - - // swtestCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) - pThis->__swtestCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_swtestCheckMemInterUnmap; - - // swtestControl -- virtual inherited (gpures) base (chandes) - pThis->__swtestControl__ = &__nvoc_up_thunk_GpuResource_swtestControl; - - // swtestMap -- virtual inherited (gpures) base (chandes) - pThis->__swtestMap__ = &__nvoc_up_thunk_GpuResource_swtestMap; - - // swtestUnmap -- virtual inherited (gpures) base (chandes) - pThis->__swtestUnmap__ = &__nvoc_up_thunk_GpuResource_swtestUnmap; - - // swtestShareCallback -- virtual inherited (gpures) base (chandes) - pThis->__swtestShareCallback__ = &__nvoc_up_thunk_GpuResource_swtestShareCallback; - - // swtestGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) - pThis->__swtestGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_swtestGetRegBaseOffsetAndSize; - - // swtestGetMapAddrSpace -- virtual inherited (gpures) base (chandes) - pThis->__swtestGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_swtestGetMapAddrSpace; - - // swtestInternalControlForward -- virtual inherited (gpures) base (chandes) - pThis->__swtestInternalControlForward__ = &__nvoc_up_thunk_GpuResource_swtestInternalControlForward; - - // swtestGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) - pThis->__swtestGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_swtestGetInternalObjectHandle; - - // swtestAccessCallback -- virtual inherited (rmres) base (chandes) - pThis->__swtestAccessCallback__ = &__nvoc_up_thunk_RmResource_swtestAccessCallback; - - // swtestGetMemInterMapParams -- virtual inherited (rmres) base (chandes) - pThis->__swtestGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_swtestGetMemInterMapParams; - - // swtestGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) - pThis->__swtestGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_swtestGetMemoryMappingDescriptor; - - // swtestControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__swtestControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_swtestControlSerialization_Prologue; - - // swtestControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__swtestControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_swtestControlSerialization_Epilogue; - - // swtestControl_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__swtestControl_Prologue__ = &__nvoc_up_thunk_RmResource_swtestControl_Prologue; - - // swtestControl_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__swtestControl_Epilogue__ = &__nvoc_up_thunk_RmResource_swtestControl_Epilogue; - - // swtestCanCopy -- virtual inherited (res) base (chandes) - pThis->__swtestCanCopy__ = &__nvoc_up_thunk_RsResource_swtestCanCopy; - - // swtestIsDuplicate -- virtual inherited (res) base (chandes) - pThis->__swtestIsDuplicate__ = &__nvoc_up_thunk_RsResource_swtestIsDuplicate; - - // swtestPreDestruct -- virtual inherited (res) base (chandes) - pThis->__swtestPreDestruct__ = &__nvoc_up_thunk_RsResource_swtestPreDestruct; - - // swtestControlFilter -- virtual inherited (res) base (chandes) - pThis->__swtestControlFilter__ = &__nvoc_up_thunk_RsResource_swtestControlFilter; - - // swtestIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body - pThis->__swtestIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_swtestIsPartialUnmapSupported; - - // swtestMapTo -- virtual inherited (res) base (chandes) - pThis->__swtestMapTo__ = &__nvoc_up_thunk_RsResource_swtestMapTo; - - // swtestUnmapFrom -- virtual inherited (res) base (chandes) - pThis->__swtestUnmapFrom__ = &__nvoc_up_thunk_RsResource_swtestUnmapFrom; - - // swtestGetRefCount -- virtual inherited (res) base (chandes) - pThis->__swtestGetRefCount__ = &__nvoc_up_thunk_RsResource_swtestGetRefCount; - - // swtestAddAdditionalDependants -- virtual inherited (res) base (chandes) - pThis->__swtestAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_swtestAddAdditionalDependants; - - // swtestGetNotificationListPtr -- virtual inherited (notify) base (chandes) - pThis->__swtestGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_swtestGetNotificationListPtr; - - // swtestGetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__swtestGetNotificationShare__ = &__nvoc_up_thunk_Notifier_swtestGetNotificationShare; - - // swtestSetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__swtestSetNotificationShare__ = &__nvoc_up_thunk_Notifier_swtestSetNotificationShare; - - // swtestUnregisterEvent -- virtual inherited (notify) base (chandes) - pThis->__swtestUnregisterEvent__ = &__nvoc_up_thunk_Notifier_swtestUnregisterEvent; - - // swtestGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) - pThis->__swtestGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_swtestGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_SoftwareMethodTest_1 with approximately 33 basic block(s). +} // End __nvoc_init_funcTable_SoftwareMethodTest_1 // Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_SoftwareMethodTest(SoftwareMethodTest *pThis) { - // Initialize vtable(s) with 32 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__SoftwareMethodTest vtable = { + .__swtestGetSwMethods__ = &swtestGetSwMethods_IMPL, // virtual override (chandes) base (chandes) + .ChannelDescendant.__chandesGetSwMethods__ = &__nvoc_down_thunk_SoftwareMethodTest_chandesGetSwMethods, // virtual + .__swtestIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_swtestIsSwMethodStalling, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesIsSwMethodStalling__ = &chandesIsSwMethodStalling_IMPL, // virtual + .__swtestCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_swtestCheckMemInterUnmap, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesCheckMemInterUnmap__ = &chandesCheckMemInterUnmap_IMPL, // virtual override (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap, // virtual + .__swtestControl__ = &__nvoc_up_thunk_GpuResource_swtestControl, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesControl__ = &__nvoc_up_thunk_GpuResource_chandesControl, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__swtestMap__ = &__nvoc_up_thunk_GpuResource_swtestMap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesMap__ = &__nvoc_up_thunk_GpuResource_chandesMap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__swtestUnmap__ = &__nvoc_up_thunk_GpuResource_swtestUnmap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesUnmap__ = &__nvoc_up_thunk_GpuResource_chandesUnmap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__swtestShareCallback__ = &__nvoc_up_thunk_GpuResource_swtestShareCallback, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesShareCallback__ = &__nvoc_up_thunk_GpuResource_chandesShareCallback, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__swtestGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_swtestGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__swtestGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_swtestGetMapAddrSpace, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__swtestInternalControlForward__ = &__nvoc_up_thunk_GpuResource_swtestInternalControlForward, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesInternalControlForward__ = &__nvoc_up_thunk_GpuResource_chandesInternalControlForward, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__swtestGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_swtestGetInternalObjectHandle, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__swtestAccessCallback__ = &__nvoc_up_thunk_RmResource_swtestAccessCallback, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesAccessCallback__ = &__nvoc_up_thunk_RmResource_chandesAccessCallback, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__swtestGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_swtestGetMemInterMapParams, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_chandesGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__swtestGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_swtestGetMemoryMappingDescriptor, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__swtestControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_swtestControlSerialization_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__swtestControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_swtestControlSerialization_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__swtestControl_Prologue__ = &__nvoc_up_thunk_RmResource_swtestControl_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControl_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__swtestControl_Epilogue__ = &__nvoc_up_thunk_RmResource_swtestControl_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControl_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__swtestCanCopy__ = &__nvoc_up_thunk_RsResource_swtestCanCopy, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesCanCopy__ = &__nvoc_up_thunk_RsResource_chandesCanCopy, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__swtestIsDuplicate__ = &__nvoc_up_thunk_RsResource_swtestIsDuplicate, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesIsDuplicate__ = &__nvoc_up_thunk_RsResource_chandesIsDuplicate, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__swtestPreDestruct__ = &__nvoc_up_thunk_RsResource_swtestPreDestruct, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesPreDestruct__ = &__nvoc_up_thunk_RsResource_chandesPreDestruct, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__swtestControlFilter__ = &__nvoc_up_thunk_RsResource_swtestControlFilter, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesControlFilter__ = &__nvoc_up_thunk_RsResource_chandesControlFilter, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__swtestIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_swtestIsPartialUnmapSupported, // inline virtual inherited (res) base (chandes) body + .ChannelDescendant.__chandesIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .ChannelDescendant.GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .ChannelDescendant.GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__swtestMapTo__ = &__nvoc_up_thunk_RsResource_swtestMapTo, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesMapTo__ = &__nvoc_up_thunk_RsResource_chandesMapTo, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__swtestUnmapFrom__ = &__nvoc_up_thunk_RsResource_swtestUnmapFrom, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesUnmapFrom__ = &__nvoc_up_thunk_RsResource_chandesUnmapFrom, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__swtestGetRefCount__ = &__nvoc_up_thunk_RsResource_swtestGetRefCount, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesGetRefCount__ = &__nvoc_up_thunk_RsResource_chandesGetRefCount, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__swtestAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_swtestAddAdditionalDependants, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_chandesAddAdditionalDependants, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__swtestGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_swtestGetNotificationListPtr, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationListPtr, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__swtestGetNotificationShare__ = &__nvoc_up_thunk_Notifier_swtestGetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__swtestSetNotificationShare__ = &__nvoc_up_thunk_Notifier_swtestSetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesSetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesSetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__swtestUnregisterEvent__ = &__nvoc_up_thunk_Notifier_swtestUnregisterEvent, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesUnregisterEvent__ = &__nvoc_up_thunk_Notifier_chandesUnregisterEvent, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__swtestGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_swtestGetOrAllocNotifShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource.RsResource; // (res) super^4 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource; // (rmres) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource; // (gpures) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier.INotifier; // (inotify) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier; // (notify) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_vtable = &vtable.ChannelDescendant; // (chandes) super + pThis->__nvoc_vtable = &vtable; // (swtest) this __nvoc_init_funcTable_SoftwareMethodTest_1(pThis); } diff --git a/src/nvidia/generated/g_sw_test_nvoc.h b/src/nvidia/generated/g_sw_test_nvoc.h index edcfd95e58..49e4d1c346 100644 --- a/src/nvidia/generated/g_sw_test_nvoc.h +++ b/src/nvidia/generated/g_sw_test_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -59,10 +59,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__SoftwareMethodTest; + + struct SoftwareMethodTest { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__SoftwareMethodTest *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; @@ -77,8 +82,13 @@ struct SoftwareMethodTest { struct Notifier *__nvoc_pbase_Notifier; // notify super^2 struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super struct SoftwareMethodTest *__nvoc_pbase_SoftwareMethodTest; // swtest +}; + + +// Metadata including vtable with 32 function pointers plus superclass metadata +struct NVOC_VTABLE__SoftwareMethodTest { + const struct NVOC_VTABLE__ChannelDescendant ChannelDescendant; // (chandes) 32 function pointers - // Vtable with 32 per-object function pointers NV_STATUS (*__swtestGetSwMethods__)(struct SoftwareMethodTest * /*this*/, const METHOD **, NvU32 *); // virtual override (chandes) base (chandes) NvBool (*__swtestIsSwMethodStalling__)(struct SoftwareMethodTest * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) NV_STATUS (*__swtestCheckMemInterUnmap__)(struct SoftwareMethodTest * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) @@ -143,198 +153,198 @@ NV_STATUS __nvoc_objCreate_SoftwareMethodTest(SoftwareMethodTest**, Dynamic*, Nv // Wrapper macros -#define swtestGetSwMethods_FNPTR(pSwTest) pSwTest->__swtestGetSwMethods__ +#define swtestGetSwMethods_FNPTR(pSwTest) pSwTest->__nvoc_vtable->__swtestGetSwMethods__ #define swtestGetSwMethods(pSwTest, ppMethods, pNumMethods) swtestGetSwMethods_DISPATCH(pSwTest, ppMethods, pNumMethods) -#define swtestIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ +#define swtestIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesIsSwMethodStalling__ #define swtestIsSwMethodStalling(pChannelDescendant, hHandle) swtestIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define swtestCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ +#define swtestCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesCheckMemInterUnmap__ #define swtestCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) swtestCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) -#define swtestControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define swtestControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define swtestControl(pGpuResource, pCallContext, pParams) swtestControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define swtestMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define swtestMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define swtestMap(pGpuResource, pCallContext, pParams, pCpuMapping) swtestMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define swtestUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define swtestUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define swtestUnmap(pGpuResource, pCallContext, pCpuMapping) swtestUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define swtestShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ +#define swtestShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define swtestShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) swtestShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define swtestGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define swtestGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define swtestGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) swtestGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define swtestGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define swtestGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define swtestGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) swtestGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define swtestInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define swtestInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define swtestInternalControlForward(pGpuResource, command, pParams, size) swtestInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define swtestGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define swtestGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define swtestGetInternalObjectHandle(pGpuResource) swtestGetInternalObjectHandle_DISPATCH(pGpuResource) -#define swtestAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define swtestAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define swtestAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) swtestAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define swtestGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define swtestGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define swtestGetMemInterMapParams(pRmResource, pParams) swtestGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define swtestGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define swtestGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define swtestGetMemoryMappingDescriptor(pRmResource, ppMemDesc) swtestGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define swtestControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define swtestControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define swtestControlSerialization_Prologue(pResource, pCallContext, pParams) swtestControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define swtestControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define swtestControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define swtestControlSerialization_Epilogue(pResource, pCallContext, pParams) swtestControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define swtestControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define swtestControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define swtestControl_Prologue(pResource, pCallContext, pParams) swtestControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define swtestControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define swtestControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define swtestControl_Epilogue(pResource, pCallContext, pParams) swtestControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define swtestCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define swtestCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define swtestCanCopy(pResource) swtestCanCopy_DISPATCH(pResource) -#define swtestIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define swtestIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define swtestIsDuplicate(pResource, hMemory, pDuplicate) swtestIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define swtestPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define swtestPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define swtestPreDestruct(pResource) swtestPreDestruct_DISPATCH(pResource) -#define swtestControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define swtestControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define swtestControlFilter(pResource, pCallContext, pParams) swtestControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define swtestIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define swtestIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define swtestIsPartialUnmapSupported(pResource) swtestIsPartialUnmapSupported_DISPATCH(pResource) -#define swtestMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define swtestMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define swtestMapTo(pResource, pParams) swtestMapTo_DISPATCH(pResource, pParams) -#define swtestUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define swtestUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define swtestUnmapFrom(pResource, pParams) swtestUnmapFrom_DISPATCH(pResource, pParams) -#define swtestGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define swtestGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define swtestGetRefCount(pResource) swtestGetRefCount_DISPATCH(pResource) -#define swtestAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define swtestAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define swtestAddAdditionalDependants(pClient, pResource, pReference) swtestAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define swtestGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define swtestGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define swtestGetNotificationListPtr(pNotifier) swtestGetNotificationListPtr_DISPATCH(pNotifier) -#define swtestGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define swtestGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define swtestGetNotificationShare(pNotifier) swtestGetNotificationShare_DISPATCH(pNotifier) -#define swtestSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define swtestSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define swtestSetNotificationShare(pNotifier, pNotifShare) swtestSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define swtestUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define swtestUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define swtestUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) swtestUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define swtestGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define swtestGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define swtestGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) swtestGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS swtestGetSwMethods_DISPATCH(struct SoftwareMethodTest *pSwTest, const METHOD **ppMethods, NvU32 *pNumMethods) { - return pSwTest->__swtestGetSwMethods__(pSwTest, ppMethods, pNumMethods); + return pSwTest->__nvoc_vtable->__swtestGetSwMethods__(pSwTest, ppMethods, pNumMethods); } static inline NvBool swtestIsSwMethodStalling_DISPATCH(struct SoftwareMethodTest *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__swtestIsSwMethodStalling__(pChannelDescendant, hHandle); + return pChannelDescendant->__nvoc_vtable->__swtestIsSwMethodStalling__(pChannelDescendant, hHandle); } static inline NV_STATUS swtestCheckMemInterUnmap_DISPATCH(struct SoftwareMethodTest *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return pChannelDescendant->__swtestCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); + return pChannelDescendant->__nvoc_vtable->__swtestCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } static inline NV_STATUS swtestControl_DISPATCH(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__swtestControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__swtestControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS swtestMap_DISPATCH(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__swtestMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__swtestMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS swtestUnmap_DISPATCH(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__swtestUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__swtestUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool swtestShareCallback_DISPATCH(struct SoftwareMethodTest *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__swtestShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__swtestShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS swtestGetRegBaseOffsetAndSize_DISPATCH(struct SoftwareMethodTest *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__swtestGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__swtestGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS swtestGetMapAddrSpace_DISPATCH(struct SoftwareMethodTest *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__swtestGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__swtestGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS swtestInternalControlForward_DISPATCH(struct SoftwareMethodTest *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__swtestInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__swtestInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle swtestGetInternalObjectHandle_DISPATCH(struct SoftwareMethodTest *pGpuResource) { - return pGpuResource->__swtestGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__swtestGetInternalObjectHandle__(pGpuResource); } static inline NvBool swtestAccessCallback_DISPATCH(struct SoftwareMethodTest *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__swtestAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__swtestAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS swtestGetMemInterMapParams_DISPATCH(struct SoftwareMethodTest *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__swtestGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__swtestGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS swtestGetMemoryMappingDescriptor_DISPATCH(struct SoftwareMethodTest *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__swtestGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__swtestGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS swtestControlSerialization_Prologue_DISPATCH(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__swtestControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__swtestControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void swtestControlSerialization_Epilogue_DISPATCH(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__swtestControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__swtestControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS swtestControl_Prologue_DISPATCH(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__swtestControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__swtestControl_Prologue__(pResource, pCallContext, pParams); } static inline void swtestControl_Epilogue_DISPATCH(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__swtestControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__swtestControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool swtestCanCopy_DISPATCH(struct SoftwareMethodTest *pResource) { - return pResource->__swtestCanCopy__(pResource); + return pResource->__nvoc_vtable->__swtestCanCopy__(pResource); } static inline NV_STATUS swtestIsDuplicate_DISPATCH(struct SoftwareMethodTest *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__swtestIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__swtestIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void swtestPreDestruct_DISPATCH(struct SoftwareMethodTest *pResource) { - pResource->__swtestPreDestruct__(pResource); + pResource->__nvoc_vtable->__swtestPreDestruct__(pResource); } static inline NV_STATUS swtestControlFilter_DISPATCH(struct SoftwareMethodTest *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__swtestControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__swtestControlFilter__(pResource, pCallContext, pParams); } static inline NvBool swtestIsPartialUnmapSupported_DISPATCH(struct SoftwareMethodTest *pResource) { - return pResource->__swtestIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__swtestIsPartialUnmapSupported__(pResource); } static inline NV_STATUS swtestMapTo_DISPATCH(struct SoftwareMethodTest *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__swtestMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__swtestMapTo__(pResource, pParams); } static inline NV_STATUS swtestUnmapFrom_DISPATCH(struct SoftwareMethodTest *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__swtestUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__swtestUnmapFrom__(pResource, pParams); } static inline NvU32 swtestGetRefCount_DISPATCH(struct SoftwareMethodTest *pResource) { - return pResource->__swtestGetRefCount__(pResource); + return pResource->__nvoc_vtable->__swtestGetRefCount__(pResource); } static inline void swtestAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct SoftwareMethodTest *pResource, RsResourceRef *pReference) { - pResource->__swtestAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__swtestAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * swtestGetNotificationListPtr_DISPATCH(struct SoftwareMethodTest *pNotifier) { - return pNotifier->__swtestGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__swtestGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * swtestGetNotificationShare_DISPATCH(struct SoftwareMethodTest *pNotifier) { - return pNotifier->__swtestGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__swtestGetNotificationShare__(pNotifier); } static inline void swtestSetNotificationShare_DISPATCH(struct SoftwareMethodTest *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__swtestSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__swtestSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS swtestUnregisterEvent_DISPATCH(struct SoftwareMethodTest *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__swtestUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__swtestUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS swtestGetOrAllocNotifShare_DISPATCH(struct SoftwareMethodTest *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__swtestGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__swtestGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS swtestGetSwMethods_IMPL(struct SoftwareMethodTest *pSwTest, const METHOD **ppMethods, NvU32 *pNumMethods); diff --git a/src/nvidia/generated/g_swintr_nvoc.c b/src/nvidia/generated/g_swintr_nvoc.c index 6ca8b60a60..143fd0c8a7 100644 --- a/src/nvidia/generated/g_swintr_nvoc.c +++ b/src/nvidia/generated/g_swintr_nvoc.c @@ -75,98 +75,120 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_SwIntr = /*pExportInfo=*/ &__nvoc_export_info_SwIntr }; +// Down-thunk(s) to bridge methods from ancestors (if any) +void __nvoc_down_thunk_SwIntr_intrservRegisterIntrService(OBJGPU *pGpu, struct IntrService *pSwIntr, IntrServiceRecord pRecords[175]); // this +NvU32 __nvoc_down_thunk_SwIntr_intrservServiceInterrupt(OBJGPU *pGpu, struct IntrService *pSwIntr, IntrServiceServiceInterruptArguments *pParams); // this + // 2 down-thunk(s) defined to bridge methods in SwIntr from superclasses // swintrRegisterIntrService: virtual override (intrserv) base (intrserv) -static void __nvoc_down_thunk_SwIntr_intrservRegisterIntrService(OBJGPU *pGpu, struct IntrService *pSwIntr, IntrServiceRecord pRecords[175]) { +void __nvoc_down_thunk_SwIntr_intrservRegisterIntrService(OBJGPU *pGpu, struct IntrService *pSwIntr, IntrServiceRecord pRecords[175]) { swintrRegisterIntrService(pGpu, (struct SwIntr *)(((unsigned char *) pSwIntr) - __nvoc_rtti_SwIntr_IntrService.offset), pRecords); } // swintrServiceInterrupt: virtual override (intrserv) base (intrserv) -static NvU32 __nvoc_down_thunk_SwIntr_intrservServiceInterrupt(OBJGPU *pGpu, struct IntrService *pSwIntr, IntrServiceServiceInterruptArguments *pParams) { +NvU32 __nvoc_down_thunk_SwIntr_intrservServiceInterrupt(OBJGPU *pGpu, struct IntrService *pSwIntr, IntrServiceServiceInterruptArguments *pParams) { return swintrServiceInterrupt(pGpu, (struct SwIntr *)(((unsigned char *) pSwIntr) - __nvoc_rtti_SwIntr_IntrService.offset), pParams); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrConstructEngine(struct OBJGPU *pGpu, struct SwIntr *pEngstate, ENGDESCRIPTOR arg3); // this +void __nvoc_up_thunk_OBJENGSTATE_swintrInitMissing(struct OBJGPU *pGpu, struct SwIntr *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePreInitLocked(struct OBJGPU *pGpu, struct SwIntr *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePreInitUnlocked(struct OBJGPU *pGpu, struct SwIntr *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStateInitLocked(struct OBJGPU *pGpu, struct SwIntr *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStateInitUnlocked(struct OBJGPU *pGpu, struct SwIntr *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePreLoad(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStateLoad(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePostLoad(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePreUnload(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStateUnload(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePostUnload(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3); // this +void __nvoc_up_thunk_OBJENGSTATE_swintrStateDestroy(struct OBJGPU *pGpu, struct SwIntr *pEngstate); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_swintrIsPresent(struct OBJGPU *pGpu, struct SwIntr *pEngstate); // this +NvBool __nvoc_up_thunk_IntrService_swintrClearInterrupt(OBJGPU *pGpu, struct SwIntr *pIntrService, IntrServiceClearInterruptArguments *pParams); // this +NV_STATUS __nvoc_up_thunk_IntrService_swintrServiceNotificationInterrupt(OBJGPU *pGpu, struct SwIntr *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams); // this + // 16 up-thunk(s) defined to bridge methods in SwIntr to superclasses // swintrConstructEngine: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrConstructEngine(struct OBJGPU *pGpu, struct SwIntr *pEngstate, ENGDESCRIPTOR arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrConstructEngine(struct OBJGPU *pGpu, struct SwIntr *pEngstate, ENGDESCRIPTOR arg3) { return engstateConstructEngine(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset), arg3); } // swintrInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_swintrInitMissing(struct OBJGPU *pGpu, struct SwIntr *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_swintrInitMissing(struct OBJGPU *pGpu, struct SwIntr *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset)); } // swintrStatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePreInitLocked(struct OBJGPU *pGpu, struct SwIntr *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePreInitLocked(struct OBJGPU *pGpu, struct SwIntr *pEngstate) { return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset)); } // swintrStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePreInitUnlocked(struct OBJGPU *pGpu, struct SwIntr *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePreInitUnlocked(struct OBJGPU *pGpu, struct SwIntr *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset)); } // swintrStateInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStateInitLocked(struct OBJGPU *pGpu, struct SwIntr *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStateInitLocked(struct OBJGPU *pGpu, struct SwIntr *pEngstate) { return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset)); } // swintrStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStateInitUnlocked(struct OBJGPU *pGpu, struct SwIntr *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStateInitUnlocked(struct OBJGPU *pGpu, struct SwIntr *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset)); } // swintrStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePreLoad(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePreLoad(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset), arg3); } // swintrStateLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStateLoad(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStateLoad(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3) { return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset), arg3); } // swintrStatePostLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePostLoad(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePostLoad(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3) { return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset), arg3); } // swintrStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePreUnload(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePreUnload(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset), arg3); } // swintrStateUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStateUnload(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStateUnload(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3) { return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset), arg3); } // swintrStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePostUnload(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_swintrStatePostUnload(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset), arg3); } // swintrStateDestroy: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_swintrStateDestroy(struct OBJGPU *pGpu, struct SwIntr *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_swintrStateDestroy(struct OBJGPU *pGpu, struct SwIntr *pEngstate) { engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset)); } // swintrIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_swintrIsPresent(struct OBJGPU *pGpu, struct SwIntr *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_swintrIsPresent(struct OBJGPU *pGpu, struct SwIntr *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_SwIntr_OBJENGSTATE.offset)); } // swintrClearInterrupt: virtual inherited (intrserv) base (intrserv) -static NvBool __nvoc_up_thunk_IntrService_swintrClearInterrupt(OBJGPU *pGpu, struct SwIntr *pIntrService, IntrServiceClearInterruptArguments *pParams) { +NvBool __nvoc_up_thunk_IntrService_swintrClearInterrupt(OBJGPU *pGpu, struct SwIntr *pIntrService, IntrServiceClearInterruptArguments *pParams) { return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_SwIntr_IntrService.offset), pParams); } // swintrServiceNotificationInterrupt: virtual inherited (intrserv) base (intrserv) -static NV_STATUS __nvoc_up_thunk_IntrService_swintrServiceNotificationInterrupt(OBJGPU *pGpu, struct SwIntr *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { +NV_STATUS __nvoc_up_thunk_IntrService_swintrServiceNotificationInterrupt(OBJGPU *pGpu, struct SwIntr *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { return intrservServiceNotificationInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_SwIntr_IntrService.offset), pParams); } @@ -211,69 +233,56 @@ NV_STATUS __nvoc_ctor_SwIntr(SwIntr *pThis) { // Vtable initialization static void __nvoc_init_funcTable_SwIntr_1(SwIntr *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // swintrRegisterIntrService -- virtual override (intrserv) base (intrserv) - pThis->__swintrRegisterIntrService__ = &swintrRegisterIntrService_IMPL; - pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_SwIntr_intrservRegisterIntrService; - - // swintrServiceInterrupt -- virtual override (intrserv) base (intrserv) - pThis->__swintrServiceInterrupt__ = &swintrServiceInterrupt_IMPL; - pThis->__nvoc_base_IntrService.__intrservServiceInterrupt__ = &__nvoc_down_thunk_SwIntr_intrservServiceInterrupt; - - // swintrConstructEngine -- virtual inherited (engstate) base (engstate) - pThis->__swintrConstructEngine__ = &__nvoc_up_thunk_OBJENGSTATE_swintrConstructEngine; - - // swintrInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__swintrInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_swintrInitMissing; - - // swintrStatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__swintrStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStatePreInitLocked; - - // swintrStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__swintrStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStatePreInitUnlocked; - - // swintrStateInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__swintrStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStateInitLocked; - - // swintrStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__swintrStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStateInitUnlocked; - - // swintrStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__swintrStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStatePreLoad; - - // swintrStateLoad -- virtual inherited (engstate) base (engstate) - pThis->__swintrStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStateLoad; - - // swintrStatePostLoad -- virtual inherited (engstate) base (engstate) - pThis->__swintrStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStatePostLoad; - - // swintrStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__swintrStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStatePreUnload; - - // swintrStateUnload -- virtual inherited (engstate) base (engstate) - pThis->__swintrStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStateUnload; - - // swintrStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__swintrStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStatePostUnload; - - // swintrStateDestroy -- virtual inherited (engstate) base (engstate) - pThis->__swintrStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStateDestroy; - - // swintrIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__swintrIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_swintrIsPresent; - - // swintrClearInterrupt -- virtual inherited (intrserv) base (intrserv) - pThis->__swintrClearInterrupt__ = &__nvoc_up_thunk_IntrService_swintrClearInterrupt; - - // swintrServiceNotificationInterrupt -- virtual inherited (intrserv) base (intrserv) - pThis->__swintrServiceNotificationInterrupt__ = &__nvoc_up_thunk_IntrService_swintrServiceNotificationInterrupt; -} // End __nvoc_init_funcTable_SwIntr_1 with approximately 20 basic block(s). +} // End __nvoc_init_funcTable_SwIntr_1 // Initialize vtable(s) for 18 virtual method(s). void __nvoc_init_funcTable_SwIntr(SwIntr *pThis) { - // Initialize vtable(s) with 18 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__SwIntr vtable = { + .__swintrRegisterIntrService__ = &swintrRegisterIntrService_IMPL, // virtual override (intrserv) base (intrserv) + .IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_SwIntr_intrservRegisterIntrService, // virtual + .__swintrServiceInterrupt__ = &swintrServiceInterrupt_IMPL, // virtual override (intrserv) base (intrserv) + .IntrService.__intrservServiceInterrupt__ = &__nvoc_down_thunk_SwIntr_intrservServiceInterrupt, // virtual + .__swintrConstructEngine__ = &__nvoc_up_thunk_OBJENGSTATE_swintrConstructEngine, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &engstateConstructEngine_IMPL, // virtual + .__swintrInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_swintrInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__swintrStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStatePreInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__swintrStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__swintrStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStateInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &engstateStateInitLocked_IMPL, // virtual + .__swintrStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__swintrStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__swintrStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStateLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &engstateStateLoad_IMPL, // virtual + .__swintrStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStatePostLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL, // virtual + .__swintrStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__swintrStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStateUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &engstateStateUnload_IMPL, // virtual + .__swintrStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__swintrStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_swintrStateDestroy, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &engstateStateDestroy_IMPL, // virtual + .__swintrIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_swintrIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + .__swintrClearInterrupt__ = &__nvoc_up_thunk_IntrService_swintrClearInterrupt, // virtual inherited (intrserv) base (intrserv) + .IntrService.__intrservClearInterrupt__ = &intrservClearInterrupt_IMPL, // virtual + .__swintrServiceNotificationInterrupt__ = &__nvoc_up_thunk_IntrService_swintrServiceNotificationInterrupt, // virtual inherited (intrserv) base (intrserv) + .IntrService.__intrservServiceNotificationInterrupt__ = &intrservServiceNotificationInterrupt_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_base_IntrService.__nvoc_vtable = &vtable.IntrService; // (intrserv) super + pThis->__nvoc_vtable = &vtable; // (swintr) this __nvoc_init_funcTable_SwIntr_1(pThis); } diff --git a/src/nvidia/generated/g_swintr_nvoc.h b/src/nvidia/generated/g_swintr_nvoc.h index d89c0eed61..f699612f61 100644 --- a/src/nvidia/generated/g_swintr_nvoc.h +++ b/src/nvidia/generated/g_swintr_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -63,10 +63,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__SwIntr; + + struct SwIntr { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__SwIntr *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -77,8 +82,14 @@ struct SwIntr { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct IntrService *__nvoc_pbase_IntrService; // intrserv super struct SwIntr *__nvoc_pbase_SwIntr; // swintr +}; + + +// Metadata including vtable with 18 function pointers plus superclass metadata +struct NVOC_VTABLE__SwIntr { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + const struct NVOC_VTABLE__IntrService IntrService; // (intrserv) 4 function pointers - // Vtable with 18 per-object function pointers void (*__swintrRegisterIntrService__)(OBJGPU *, struct SwIntr * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) NvU32 (*__swintrServiceInterrupt__)(OBJGPU *, struct SwIntr * /*this*/, IntrServiceServiceInterruptArguments *); // virtual override (intrserv) base (intrserv) NV_STATUS (*__swintrConstructEngine__)(struct OBJGPU *, struct SwIntr * /*this*/, ENGDESCRIPTOR); // virtual inherited (engstate) base (engstate) @@ -133,114 +144,114 @@ NV_STATUS __nvoc_objCreate_SwIntr(SwIntr**, Dynamic*, NvU32); // Wrapper macros -#define swintrRegisterIntrService_FNPTR(pSwIntr) pSwIntr->__swintrRegisterIntrService__ +#define swintrRegisterIntrService_FNPTR(pSwIntr) pSwIntr->__nvoc_vtable->__swintrRegisterIntrService__ #define swintrRegisterIntrService(pGpu, pSwIntr, pRecords) swintrRegisterIntrService_DISPATCH(pGpu, pSwIntr, pRecords) -#define swintrServiceInterrupt_FNPTR(pSwIntr) pSwIntr->__swintrServiceInterrupt__ +#define swintrServiceInterrupt_FNPTR(pSwIntr) pSwIntr->__nvoc_vtable->__swintrServiceInterrupt__ #define swintrServiceInterrupt(pGpu, pSwIntr, pParams) swintrServiceInterrupt_DISPATCH(pGpu, pSwIntr, pParams) -#define swintrConstructEngine_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ +#define swintrConstructEngine_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateConstructEngine__ #define swintrConstructEngine(pGpu, pEngstate, arg3) swintrConstructEngine_DISPATCH(pGpu, pEngstate, arg3) -#define swintrInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define swintrInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define swintrInitMissing(pGpu, pEngstate) swintrInitMissing_DISPATCH(pGpu, pEngstate) -#define swintrStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define swintrStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define swintrStatePreInitLocked(pGpu, pEngstate) swintrStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define swintrStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define swintrStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define swintrStatePreInitUnlocked(pGpu, pEngstate) swintrStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define swintrStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define swintrStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitLocked__ #define swintrStateInitLocked(pGpu, pEngstate) swintrStateInitLocked_DISPATCH(pGpu, pEngstate) -#define swintrStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define swintrStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define swintrStateInitUnlocked(pGpu, pEngstate) swintrStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define swintrStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define swintrStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define swintrStatePreLoad(pGpu, pEngstate, arg3) swintrStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define swintrStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define swintrStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateLoad__ #define swintrStateLoad(pGpu, pEngstate, arg3) swintrStateLoad_DISPATCH(pGpu, pEngstate, arg3) -#define swintrStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define swintrStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostLoad__ #define swintrStatePostLoad(pGpu, pEngstate, arg3) swintrStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define swintrStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define swintrStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define swintrStatePreUnload(pGpu, pEngstate, arg3) swintrStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define swintrStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define swintrStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateUnload__ #define swintrStateUnload(pGpu, pEngstate, arg3) swintrStateUnload_DISPATCH(pGpu, pEngstate, arg3) -#define swintrStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define swintrStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define swintrStatePostUnload(pGpu, pEngstate, arg3) swintrStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define swintrStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define swintrStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateDestroy__ #define swintrStateDestroy(pGpu, pEngstate) swintrStateDestroy_DISPATCH(pGpu, pEngstate) -#define swintrIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define swintrIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define swintrIsPresent(pGpu, pEngstate) swintrIsPresent_DISPATCH(pGpu, pEngstate) -#define swintrClearInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservClearInterrupt__ +#define swintrClearInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__nvoc_vtable->__intrservClearInterrupt__ #define swintrClearInterrupt(pGpu, pIntrService, pParams) swintrClearInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define swintrServiceNotificationInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ +#define swintrServiceNotificationInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__nvoc_vtable->__intrservServiceNotificationInterrupt__ #define swintrServiceNotificationInterrupt(pGpu, pIntrService, pParams) swintrServiceNotificationInterrupt_DISPATCH(pGpu, pIntrService, pParams) // Dispatch functions static inline void swintrRegisterIntrService_DISPATCH(OBJGPU *pGpu, struct SwIntr *pSwIntr, IntrServiceRecord pRecords[175]) { - pSwIntr->__swintrRegisterIntrService__(pGpu, pSwIntr, pRecords); + pSwIntr->__nvoc_vtable->__swintrRegisterIntrService__(pGpu, pSwIntr, pRecords); } static inline NvU32 swintrServiceInterrupt_DISPATCH(OBJGPU *pGpu, struct SwIntr *pSwIntr, IntrServiceServiceInterruptArguments *pParams) { - return pSwIntr->__swintrServiceInterrupt__(pGpu, pSwIntr, pParams); + return pSwIntr->__nvoc_vtable->__swintrServiceInterrupt__(pGpu, pSwIntr, pParams); } static inline NV_STATUS swintrConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct SwIntr *pEngstate, ENGDESCRIPTOR arg3) { - return pEngstate->__swintrConstructEngine__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__swintrConstructEngine__(pGpu, pEngstate, arg3); } static inline void swintrInitMissing_DISPATCH(struct OBJGPU *pGpu, struct SwIntr *pEngstate) { - pEngstate->__swintrInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__swintrInitMissing__(pGpu, pEngstate); } static inline NV_STATUS swintrStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct SwIntr *pEngstate) { - return pEngstate->__swintrStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__swintrStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS swintrStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct SwIntr *pEngstate) { - return pEngstate->__swintrStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__swintrStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS swintrStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct SwIntr *pEngstate) { - return pEngstate->__swintrStateInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__swintrStateInitLocked__(pGpu, pEngstate); } static inline NV_STATUS swintrStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct SwIntr *pEngstate) { - return pEngstate->__swintrStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__swintrStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS swintrStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3) { - return pEngstate->__swintrStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__swintrStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS swintrStateLoad_DISPATCH(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3) { - return pEngstate->__swintrStateLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__swintrStateLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS swintrStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3) { - return pEngstate->__swintrStatePostLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__swintrStatePostLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS swintrStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3) { - return pEngstate->__swintrStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__swintrStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS swintrStateUnload_DISPATCH(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3) { - return pEngstate->__swintrStateUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__swintrStateUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS swintrStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct SwIntr *pEngstate, NvU32 arg3) { - return pEngstate->__swintrStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__swintrStatePostUnload__(pGpu, pEngstate, arg3); } static inline void swintrStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct SwIntr *pEngstate) { - pEngstate->__swintrStateDestroy__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__swintrStateDestroy__(pGpu, pEngstate); } static inline NvBool swintrIsPresent_DISPATCH(struct OBJGPU *pGpu, struct SwIntr *pEngstate) { - return pEngstate->__swintrIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__swintrIsPresent__(pGpu, pEngstate); } static inline NvBool swintrClearInterrupt_DISPATCH(OBJGPU *pGpu, struct SwIntr *pIntrService, IntrServiceClearInterruptArguments *pParams) { - return pIntrService->__swintrClearInterrupt__(pGpu, pIntrService, pParams); + return pIntrService->__nvoc_vtable->__swintrClearInterrupt__(pGpu, pIntrService, pParams); } static inline NV_STATUS swintrServiceNotificationInterrupt_DISPATCH(OBJGPU *pGpu, struct SwIntr *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { - return pIntrService->__swintrServiceNotificationInterrupt__(pGpu, pIntrService, pParams); + return pIntrService->__nvoc_vtable->__swintrServiceNotificationInterrupt__(pGpu, pIntrService, pParams); } void swintrRegisterIntrService_IMPL(OBJGPU *pGpu, struct SwIntr *pSwIntr, IntrServiceRecord pRecords[175]); diff --git a/src/nvidia/generated/g_syncgpuboost_nvoc.c b/src/nvidia/generated/g_syncgpuboost_nvoc.c index f388532068..a2d0683135 100644 --- a/src/nvidia/generated/g_syncgpuboost_nvoc.c +++ b/src/nvidia/generated/g_syncgpuboost_nvoc.c @@ -84,110 +84,153 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_SyncGpuBoost = /*pExportInfo=*/ &__nvoc_export_info_SyncGpuBoost }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_RmResource_syncgpuboostAccessCallback(struct SyncGpuBoost *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_syncgpuboostShareCallback(struct SyncGpuBoost *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_syncgpuboostGetMemInterMapParams(struct SyncGpuBoost *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_syncgpuboostCheckMemInterUnmap(struct SyncGpuBoost *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_syncgpuboostGetMemoryMappingDescriptor(struct SyncGpuBoost *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_syncgpuboostControlSerialization_Prologue(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_syncgpuboostControlSerialization_Epilogue(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_syncgpuboostControl_Prologue(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_syncgpuboostControl_Epilogue(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_syncgpuboostCanCopy(struct SyncGpuBoost *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostIsDuplicate(struct SyncGpuBoost *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_syncgpuboostPreDestruct(struct SyncGpuBoost *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostControl(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostControlFilter(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostMap(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostUnmap(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_RsResource_syncgpuboostIsPartialUnmapSupported(struct SyncGpuBoost *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostMapTo(struct SyncGpuBoost *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostUnmapFrom(struct SyncGpuBoost *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_syncgpuboostGetRefCount(struct SyncGpuBoost *pResource); // this +void __nvoc_up_thunk_RsResource_syncgpuboostAddAdditionalDependants(struct RsClient *pClient, struct SyncGpuBoost *pResource, RsResourceRef *pReference); // this + // 21 up-thunk(s) defined to bridge methods in SyncGpuBoost to superclasses // syncgpuboostAccessCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_syncgpuboostAccessCallback(struct SyncGpuBoost *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_syncgpuboostAccessCallback(struct SyncGpuBoost *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // syncgpuboostShareCallback: virtual inherited (rmres) base (rmres) -static NvBool __nvoc_up_thunk_RmResource_syncgpuboostShareCallback(struct SyncGpuBoost *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_syncgpuboostShareCallback(struct SyncGpuBoost *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // syncgpuboostGetMemInterMapParams: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_syncgpuboostGetMemInterMapParams(struct SyncGpuBoost *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_syncgpuboostGetMemInterMapParams(struct SyncGpuBoost *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), pParams); } // syncgpuboostCheckMemInterUnmap: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_syncgpuboostCheckMemInterUnmap(struct SyncGpuBoost *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_syncgpuboostCheckMemInterUnmap(struct SyncGpuBoost *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), bSubdeviceHandleProvided); } // syncgpuboostGetMemoryMappingDescriptor: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_syncgpuboostGetMemoryMappingDescriptor(struct SyncGpuBoost *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_syncgpuboostGetMemoryMappingDescriptor(struct SyncGpuBoost *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), ppMemDesc); } // syncgpuboostControlSerialization_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_syncgpuboostControlSerialization_Prologue(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_syncgpuboostControlSerialization_Prologue(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), pCallContext, pParams); } // syncgpuboostControlSerialization_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_syncgpuboostControlSerialization_Epilogue(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_syncgpuboostControlSerialization_Epilogue(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), pCallContext, pParams); } // syncgpuboostControl_Prologue: virtual inherited (rmres) base (rmres) -static NV_STATUS __nvoc_up_thunk_RmResource_syncgpuboostControl_Prologue(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_syncgpuboostControl_Prologue(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), pCallContext, pParams); } // syncgpuboostControl_Epilogue: virtual inherited (rmres) base (rmres) -static void __nvoc_up_thunk_RmResource_syncgpuboostControl_Epilogue(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_syncgpuboostControl_Epilogue(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RmResource.offset), pCallContext, pParams); } // syncgpuboostCanCopy: virtual inherited (res) base (rmres) -static NvBool __nvoc_up_thunk_RsResource_syncgpuboostCanCopy(struct SyncGpuBoost *pResource) { +NvBool __nvoc_up_thunk_RsResource_syncgpuboostCanCopy(struct SyncGpuBoost *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset)); } // syncgpuboostIsDuplicate: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostIsDuplicate(struct SyncGpuBoost *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostIsDuplicate(struct SyncGpuBoost *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), hMemory, pDuplicate); } // syncgpuboostPreDestruct: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_syncgpuboostPreDestruct(struct SyncGpuBoost *pResource) { +void __nvoc_up_thunk_RsResource_syncgpuboostPreDestruct(struct SyncGpuBoost *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset)); } // syncgpuboostControl: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostControl(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostControl(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControl((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), pCallContext, pParams); } // syncgpuboostControlFilter: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostControlFilter(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostControlFilter(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), pCallContext, pParams); } // syncgpuboostMap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostMap(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostMap(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return resMap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), pCallContext, pParams, pCpuMapping); } // syncgpuboostUnmap: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostUnmap(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostUnmap(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return resUnmap((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), pCallContext, pCpuMapping); } // syncgpuboostIsPartialUnmapSupported: inline virtual inherited (res) base (rmres) body -static NvBool __nvoc_up_thunk_RsResource_syncgpuboostIsPartialUnmapSupported(struct SyncGpuBoost *pResource) { +NvBool __nvoc_up_thunk_RsResource_syncgpuboostIsPartialUnmapSupported(struct SyncGpuBoost *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset)); } // syncgpuboostMapTo: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostMapTo(struct SyncGpuBoost *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostMapTo(struct SyncGpuBoost *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), pParams); } // syncgpuboostUnmapFrom: virtual inherited (res) base (rmres) -static NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostUnmapFrom(struct SyncGpuBoost *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_syncgpuboostUnmapFrom(struct SyncGpuBoost *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), pParams); } // syncgpuboostGetRefCount: virtual inherited (res) base (rmres) -static NvU32 __nvoc_up_thunk_RsResource_syncgpuboostGetRefCount(struct SyncGpuBoost *pResource) { +NvU32 __nvoc_up_thunk_RsResource_syncgpuboostGetRefCount(struct SyncGpuBoost *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset)); } // syncgpuboostAddAdditionalDependants: virtual inherited (res) base (rmres) -static void __nvoc_up_thunk_RsResource_syncgpuboostAddAdditionalDependants(struct RsClient *pClient, struct SyncGpuBoost *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_syncgpuboostAddAdditionalDependants(struct RsClient *pClient, struct SyncGpuBoost *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SyncGpuBoost_RsResource.offset), pReference); } @@ -231,76 +274,80 @@ NV_STATUS __nvoc_ctor_SyncGpuBoost(SyncGpuBoost *pThis, struct CALL_CONTEXT * ar // Vtable initialization static void __nvoc_init_funcTable_SyncGpuBoost_1(SyncGpuBoost *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // syncgpuboostAccessCallback -- virtual inherited (rmres) base (rmres) - pThis->__syncgpuboostAccessCallback__ = &__nvoc_up_thunk_RmResource_syncgpuboostAccessCallback; - - // syncgpuboostShareCallback -- virtual inherited (rmres) base (rmres) - pThis->__syncgpuboostShareCallback__ = &__nvoc_up_thunk_RmResource_syncgpuboostShareCallback; - - // syncgpuboostGetMemInterMapParams -- virtual inherited (rmres) base (rmres) - pThis->__syncgpuboostGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_syncgpuboostGetMemInterMapParams; - - // syncgpuboostCheckMemInterUnmap -- virtual inherited (rmres) base (rmres) - pThis->__syncgpuboostCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_syncgpuboostCheckMemInterUnmap; - - // syncgpuboostGetMemoryMappingDescriptor -- virtual inherited (rmres) base (rmres) - pThis->__syncgpuboostGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_syncgpuboostGetMemoryMappingDescriptor; - - // syncgpuboostControlSerialization_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__syncgpuboostControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_syncgpuboostControlSerialization_Prologue; - - // syncgpuboostControlSerialization_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__syncgpuboostControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_syncgpuboostControlSerialization_Epilogue; - - // syncgpuboostControl_Prologue -- virtual inherited (rmres) base (rmres) - pThis->__syncgpuboostControl_Prologue__ = &__nvoc_up_thunk_RmResource_syncgpuboostControl_Prologue; - - // syncgpuboostControl_Epilogue -- virtual inherited (rmres) base (rmres) - pThis->__syncgpuboostControl_Epilogue__ = &__nvoc_up_thunk_RmResource_syncgpuboostControl_Epilogue; - - // syncgpuboostCanCopy -- virtual inherited (res) base (rmres) - pThis->__syncgpuboostCanCopy__ = &__nvoc_up_thunk_RsResource_syncgpuboostCanCopy; - - // syncgpuboostIsDuplicate -- virtual inherited (res) base (rmres) - pThis->__syncgpuboostIsDuplicate__ = &__nvoc_up_thunk_RsResource_syncgpuboostIsDuplicate; - - // syncgpuboostPreDestruct -- virtual inherited (res) base (rmres) - pThis->__syncgpuboostPreDestruct__ = &__nvoc_up_thunk_RsResource_syncgpuboostPreDestruct; - - // syncgpuboostControl -- virtual inherited (res) base (rmres) - pThis->__syncgpuboostControl__ = &__nvoc_up_thunk_RsResource_syncgpuboostControl; - - // syncgpuboostControlFilter -- virtual inherited (res) base (rmres) - pThis->__syncgpuboostControlFilter__ = &__nvoc_up_thunk_RsResource_syncgpuboostControlFilter; - - // syncgpuboostMap -- virtual inherited (res) base (rmres) - pThis->__syncgpuboostMap__ = &__nvoc_up_thunk_RsResource_syncgpuboostMap; - - // syncgpuboostUnmap -- virtual inherited (res) base (rmres) - pThis->__syncgpuboostUnmap__ = &__nvoc_up_thunk_RsResource_syncgpuboostUnmap; - - // syncgpuboostIsPartialUnmapSupported -- inline virtual inherited (res) base (rmres) body - pThis->__syncgpuboostIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_syncgpuboostIsPartialUnmapSupported; - - // syncgpuboostMapTo -- virtual inherited (res) base (rmres) - pThis->__syncgpuboostMapTo__ = &__nvoc_up_thunk_RsResource_syncgpuboostMapTo; - - // syncgpuboostUnmapFrom -- virtual inherited (res) base (rmres) - pThis->__syncgpuboostUnmapFrom__ = &__nvoc_up_thunk_RsResource_syncgpuboostUnmapFrom; - - // syncgpuboostGetRefCount -- virtual inherited (res) base (rmres) - pThis->__syncgpuboostGetRefCount__ = &__nvoc_up_thunk_RsResource_syncgpuboostGetRefCount; - - // syncgpuboostAddAdditionalDependants -- virtual inherited (res) base (rmres) - pThis->__syncgpuboostAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_syncgpuboostAddAdditionalDependants; -} // End __nvoc_init_funcTable_SyncGpuBoost_1 with approximately 21 basic block(s). +} // End __nvoc_init_funcTable_SyncGpuBoost_1 // Initialize vtable(s) for 21 virtual method(s). void __nvoc_init_funcTable_SyncGpuBoost(SyncGpuBoost *pThis) { - // Initialize vtable(s) with 21 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__SyncGpuBoost vtable = { + .__syncgpuboostAccessCallback__ = &__nvoc_up_thunk_RmResource_syncgpuboostAccessCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__syncgpuboostShareCallback__ = &__nvoc_up_thunk_RmResource_syncgpuboostShareCallback, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__syncgpuboostGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_syncgpuboostGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__syncgpuboostCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_syncgpuboostCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__syncgpuboostGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_syncgpuboostGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__syncgpuboostControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_syncgpuboostControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__syncgpuboostControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_syncgpuboostControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__syncgpuboostControl_Prologue__ = &__nvoc_up_thunk_RmResource_syncgpuboostControl_Prologue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__syncgpuboostControl_Epilogue__ = &__nvoc_up_thunk_RmResource_syncgpuboostControl_Epilogue, // virtual inherited (rmres) base (rmres) + .RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__syncgpuboostCanCopy__ = &__nvoc_up_thunk_RsResource_syncgpuboostCanCopy, // virtual inherited (res) base (rmres) + .RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__syncgpuboostIsDuplicate__ = &__nvoc_up_thunk_RsResource_syncgpuboostIsDuplicate, // virtual inherited (res) base (rmres) + .RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__syncgpuboostPreDestruct__ = &__nvoc_up_thunk_RsResource_syncgpuboostPreDestruct, // virtual inherited (res) base (rmres) + .RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__syncgpuboostControl__ = &__nvoc_up_thunk_RsResource_syncgpuboostControl, // virtual inherited (res) base (rmres) + .RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControl__ = &resControl_IMPL, // virtual + .__syncgpuboostControlFilter__ = &__nvoc_up_thunk_RsResource_syncgpuboostControlFilter, // virtual inherited (res) base (rmres) + .RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__syncgpuboostMap__ = &__nvoc_up_thunk_RsResource_syncgpuboostMap, // virtual inherited (res) base (rmres) + .RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMap__ = &resMap_IMPL, // virtual + .__syncgpuboostUnmap__ = &__nvoc_up_thunk_RsResource_syncgpuboostUnmap, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmap__ = &resUnmap_IMPL, // virtual + .__syncgpuboostIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_syncgpuboostIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__syncgpuboostMapTo__ = &__nvoc_up_thunk_RsResource_syncgpuboostMapTo, // virtual inherited (res) base (rmres) + .RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__syncgpuboostUnmapFrom__ = &__nvoc_up_thunk_RsResource_syncgpuboostUnmapFrom, // virtual inherited (res) base (rmres) + .RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__syncgpuboostGetRefCount__ = &__nvoc_up_thunk_RsResource_syncgpuboostGetRefCount, // virtual inherited (res) base (rmres) + .RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__syncgpuboostAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_syncgpuboostAddAdditionalDependants, // virtual inherited (res) base (rmres) + .RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.RmResource.RsResource; // (res) super^2 + pThis->__nvoc_base_RmResource.__nvoc_vtable = &vtable.RmResource; // (rmres) super + pThis->__nvoc_vtable = &vtable; // (syncgpuboost) this __nvoc_init_funcTable_SyncGpuBoost_1(pThis); } diff --git a/src/nvidia/generated/g_syncgpuboost_nvoc.h b/src/nvidia/generated/g_syncgpuboost_nvoc.h index 4694f93b5e..c51ae0b845 100644 --- a/src/nvidia/generated/g_syncgpuboost_nvoc.h +++ b/src/nvidia/generated/g_syncgpuboost_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -58,10 +58,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__SyncGpuBoost; + + struct SyncGpuBoost { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__SyncGpuBoost *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct RmResource __nvoc_base_RmResource; @@ -73,7 +78,15 @@ struct SyncGpuBoost { struct RmResource *__nvoc_pbase_RmResource; // rmres super struct SyncGpuBoost *__nvoc_pbase_SyncGpuBoost; // syncgpuboost - // Vtable with 21 per-object function pointers + // Data members + NvU32 gpuBoostGroupId; +}; + + +// Metadata including vtable with 21 function pointers plus superclass metadata +struct NVOC_VTABLE__SyncGpuBoost { + const struct NVOC_VTABLE__RmResource RmResource; // (rmres) 21 function pointers + NvBool (*__syncgpuboostAccessCallback__)(struct SyncGpuBoost * /*this*/, struct RsClient *, void *, RsAccessRight); // virtual inherited (rmres) base (rmres) NvBool (*__syncgpuboostShareCallback__)(struct SyncGpuBoost * /*this*/, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *); // virtual inherited (rmres) base (rmres) NV_STATUS (*__syncgpuboostGetMemInterMapParams__)(struct SyncGpuBoost * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual inherited (rmres) base (rmres) @@ -95,9 +108,6 @@ struct SyncGpuBoost { NV_STATUS (*__syncgpuboostUnmapFrom__)(struct SyncGpuBoost * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (rmres) NvU32 (*__syncgpuboostGetRefCount__)(struct SyncGpuBoost * /*this*/); // virtual inherited (res) base (rmres) void (*__syncgpuboostAddAdditionalDependants__)(struct RsClient *, struct SyncGpuBoost * /*this*/, RsResourceRef *); // virtual inherited (res) base (rmres) - - // Data members - NvU32 gpuBoostGroupId; }; #ifndef __NVOC_CLASS_SyncGpuBoost_TYPEDEF__ @@ -130,132 +140,132 @@ NV_STATUS __nvoc_objCreate_SyncGpuBoost(SyncGpuBoost**, Dynamic*, NvU32, struct // Wrapper macros -#define syncgpuboostAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresAccessCallback__ +#define syncgpuboostAccessCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define syncgpuboostAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) syncgpuboostAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define syncgpuboostShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresShareCallback__ +#define syncgpuboostShareCallback_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define syncgpuboostShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) syncgpuboostShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define syncgpuboostGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define syncgpuboostGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define syncgpuboostGetMemInterMapParams(pRmResource, pParams) syncgpuboostGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define syncgpuboostCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define syncgpuboostCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define syncgpuboostCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) syncgpuboostCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define syncgpuboostGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define syncgpuboostGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define syncgpuboostGetMemoryMappingDescriptor(pRmResource, ppMemDesc) syncgpuboostGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define syncgpuboostControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define syncgpuboostControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define syncgpuboostControlSerialization_Prologue(pResource, pCallContext, pParams) syncgpuboostControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define syncgpuboostControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define syncgpuboostControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define syncgpuboostControlSerialization_Epilogue(pResource, pCallContext, pParams) syncgpuboostControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define syncgpuboostControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Prologue__ +#define syncgpuboostControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define syncgpuboostControl_Prologue(pResource, pCallContext, pParams) syncgpuboostControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define syncgpuboostControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define syncgpuboostControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define syncgpuboostControl_Epilogue(pResource, pCallContext, pParams) syncgpuboostControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define syncgpuboostCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define syncgpuboostCanCopy_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define syncgpuboostCanCopy(pResource) syncgpuboostCanCopy_DISPATCH(pResource) -#define syncgpuboostIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define syncgpuboostIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define syncgpuboostIsDuplicate(pResource, hMemory, pDuplicate) syncgpuboostIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define syncgpuboostPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define syncgpuboostPreDestruct_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define syncgpuboostPreDestruct(pResource) syncgpuboostPreDestruct_DISPATCH(pResource) -#define syncgpuboostControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControl__ +#define syncgpuboostControl_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControl__ #define syncgpuboostControl(pResource, pCallContext, pParams) syncgpuboostControl_DISPATCH(pResource, pCallContext, pParams) -#define syncgpuboostControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define syncgpuboostControlFilter_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define syncgpuboostControlFilter(pResource, pCallContext, pParams) syncgpuboostControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define syncgpuboostMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMap__ +#define syncgpuboostMap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMap__ #define syncgpuboostMap(pResource, pCallContext, pParams, pCpuMapping) syncgpuboostMap_DISPATCH(pResource, pCallContext, pParams, pCpuMapping) -#define syncgpuboostUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmap__ +#define syncgpuboostUnmap_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmap__ #define syncgpuboostUnmap(pResource, pCallContext, pCpuMapping) syncgpuboostUnmap_DISPATCH(pResource, pCallContext, pCpuMapping) -#define syncgpuboostIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define syncgpuboostIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define syncgpuboostIsPartialUnmapSupported(pResource) syncgpuboostIsPartialUnmapSupported_DISPATCH(pResource) -#define syncgpuboostMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define syncgpuboostMapTo_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define syncgpuboostMapTo(pResource, pParams) syncgpuboostMapTo_DISPATCH(pResource, pParams) -#define syncgpuboostUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define syncgpuboostUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define syncgpuboostUnmapFrom(pResource, pParams) syncgpuboostUnmapFrom_DISPATCH(pResource, pParams) -#define syncgpuboostGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define syncgpuboostGetRefCount_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define syncgpuboostGetRefCount(pResource) syncgpuboostGetRefCount_DISPATCH(pResource) -#define syncgpuboostAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define syncgpuboostAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define syncgpuboostAddAdditionalDependants(pClient, pResource, pReference) syncgpuboostAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool syncgpuboostAccessCallback_DISPATCH(struct SyncGpuBoost *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__syncgpuboostAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__syncgpuboostAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool syncgpuboostShareCallback_DISPATCH(struct SyncGpuBoost *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__syncgpuboostShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__syncgpuboostShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS syncgpuboostGetMemInterMapParams_DISPATCH(struct SyncGpuBoost *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__syncgpuboostGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__syncgpuboostGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS syncgpuboostCheckMemInterUnmap_DISPATCH(struct SyncGpuBoost *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__syncgpuboostCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__syncgpuboostCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS syncgpuboostGetMemoryMappingDescriptor_DISPATCH(struct SyncGpuBoost *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__syncgpuboostGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__syncgpuboostGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS syncgpuboostControlSerialization_Prologue_DISPATCH(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__syncgpuboostControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__syncgpuboostControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void syncgpuboostControlSerialization_Epilogue_DISPATCH(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__syncgpuboostControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__syncgpuboostControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS syncgpuboostControl_Prologue_DISPATCH(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__syncgpuboostControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__syncgpuboostControl_Prologue__(pResource, pCallContext, pParams); } static inline void syncgpuboostControl_Epilogue_DISPATCH(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__syncgpuboostControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__syncgpuboostControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool syncgpuboostCanCopy_DISPATCH(struct SyncGpuBoost *pResource) { - return pResource->__syncgpuboostCanCopy__(pResource); + return pResource->__nvoc_vtable->__syncgpuboostCanCopy__(pResource); } static inline NV_STATUS syncgpuboostIsDuplicate_DISPATCH(struct SyncGpuBoost *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__syncgpuboostIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__syncgpuboostIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void syncgpuboostPreDestruct_DISPATCH(struct SyncGpuBoost *pResource) { - pResource->__syncgpuboostPreDestruct__(pResource); + pResource->__nvoc_vtable->__syncgpuboostPreDestruct__(pResource); } static inline NV_STATUS syncgpuboostControl_DISPATCH(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__syncgpuboostControl__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__syncgpuboostControl__(pResource, pCallContext, pParams); } static inline NV_STATUS syncgpuboostControlFilter_DISPATCH(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__syncgpuboostControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__syncgpuboostControlFilter__(pResource, pCallContext, pParams); } static inline NV_STATUS syncgpuboostMap_DISPATCH(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pResource->__syncgpuboostMap__(pResource, pCallContext, pParams, pCpuMapping); + return pResource->__nvoc_vtable->__syncgpuboostMap__(pResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS syncgpuboostUnmap_DISPATCH(struct SyncGpuBoost *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pResource->__syncgpuboostUnmap__(pResource, pCallContext, pCpuMapping); + return pResource->__nvoc_vtable->__syncgpuboostUnmap__(pResource, pCallContext, pCpuMapping); } static inline NvBool syncgpuboostIsPartialUnmapSupported_DISPATCH(struct SyncGpuBoost *pResource) { - return pResource->__syncgpuboostIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__syncgpuboostIsPartialUnmapSupported__(pResource); } static inline NV_STATUS syncgpuboostMapTo_DISPATCH(struct SyncGpuBoost *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__syncgpuboostMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__syncgpuboostMapTo__(pResource, pParams); } static inline NV_STATUS syncgpuboostUnmapFrom_DISPATCH(struct SyncGpuBoost *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__syncgpuboostUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__syncgpuboostUnmapFrom__(pResource, pParams); } static inline NvU32 syncgpuboostGetRefCount_DISPATCH(struct SyncGpuBoost *pResource) { - return pResource->__syncgpuboostGetRefCount__(pResource); + return pResource->__nvoc_vtable->__syncgpuboostGetRefCount__(pResource); } static inline void syncgpuboostAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct SyncGpuBoost *pResource, RsResourceRef *pReference) { - pResource->__syncgpuboostAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__syncgpuboostAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS syncgpuboostConstruct_IMPL(struct SyncGpuBoost *arg_pResource, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_syncpoint_mem_nvoc.h b/src/nvidia/generated/g_syncpoint_mem_nvoc.h index 2e7e253ce8..54557a5681 100644 --- a/src/nvidia/generated/g_syncpoint_mem_nvoc.h +++ b/src/nvidia/generated/g_syncpoint_mem_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -58,10 +58,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__SyncpointMemory; + + struct SyncpointMemory { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__SyncpointMemory *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; @@ -73,8 +78,13 @@ struct SyncpointMemory { struct RmResource *__nvoc_pbase_RmResource; // rmres super^2 struct Memory *__nvoc_pbase_Memory; // mem super struct SyncpointMemory *__nvoc_pbase_SyncpointMemory; // syncpoint +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__SyncpointMemory { + const struct NVOC_VTABLE__Memory Memory; // (mem) 26 function pointers - // Vtable with 26 per-object function pointers NvBool (*__syncpointCanCopy__)(struct SyncpointMemory * /*this*/); // virtual override (res) base (mem) NV_STATUS (*__syncpointIsDuplicate__)(struct SyncpointMemory * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) NV_STATUS (*__syncpointGetMapAddrSpace__)(struct SyncpointMemory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (mem) @@ -133,162 +143,162 @@ NV_STATUS __nvoc_objCreate_SyncpointMemory(SyncpointMemory**, Dynamic*, NvU32, C // Wrapper macros -#define syncpointCanCopy_FNPTR(pSyncpointMemory) pSyncpointMemory->__syncpointCanCopy__ +#define syncpointCanCopy_FNPTR(pSyncpointMemory) pSyncpointMemory->__nvoc_vtable->__syncpointCanCopy__ #define syncpointCanCopy(pSyncpointMemory) syncpointCanCopy_DISPATCH(pSyncpointMemory) -#define syncpointIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define syncpointIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsDuplicate__ #define syncpointIsDuplicate(pMemory, hMemory, pDuplicate) syncpointIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define syncpointGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ +#define syncpointGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMapAddrSpace__ #define syncpointGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) syncpointGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define syncpointControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ +#define syncpointControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memControl__ #define syncpointControl(pMemory, pCallContext, pParams) syncpointControl_DISPATCH(pMemory, pCallContext, pParams) -#define syncpointMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define syncpointMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memMap__ #define syncpointMap(pMemory, pCallContext, pParams, pCpuMapping) syncpointMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define syncpointUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ +#define syncpointUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memUnmap__ #define syncpointUnmap(pMemory, pCallContext, pCpuMapping) syncpointUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define syncpointGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemInterMapParams__ +#define syncpointGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemInterMapParams__ #define syncpointGetMemInterMapParams(pMemory, pParams) syncpointGetMemInterMapParams_DISPATCH(pMemory, pParams) -#define syncpointCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define syncpointCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckMemInterUnmap__ #define syncpointCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) syncpointCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define syncpointGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ +#define syncpointGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemoryMappingDescriptor__ #define syncpointGetMemoryMappingDescriptor(pMemory, ppMemDesc) syncpointGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define syncpointCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ +#define syncpointCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckCopyPermissions__ #define syncpointCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) syncpointCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define syncpointIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define syncpointIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsReady__ #define syncpointIsReady(pMemory, bCopyConstructorContext) syncpointIsReady_DISPATCH(pMemory, bCopyConstructorContext) -#define syncpointIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define syncpointIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsGpuMapAllowed__ #define syncpointIsGpuMapAllowed(pMemory, pGpu) syncpointIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define syncpointIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define syncpointIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsExportAllowed__ #define syncpointIsExportAllowed(pMemory) syncpointIsExportAllowed_DISPATCH(pMemory) -#define syncpointAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define syncpointAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define syncpointAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) syncpointAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define syncpointShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define syncpointShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define syncpointShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) syncpointShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define syncpointControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define syncpointControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define syncpointControlSerialization_Prologue(pResource, pCallContext, pParams) syncpointControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define syncpointControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define syncpointControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define syncpointControlSerialization_Epilogue(pResource, pCallContext, pParams) syncpointControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define syncpointControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define syncpointControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define syncpointControl_Prologue(pResource, pCallContext, pParams) syncpointControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define syncpointControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define syncpointControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define syncpointControl_Epilogue(pResource, pCallContext, pParams) syncpointControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define syncpointPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define syncpointPreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define syncpointPreDestruct(pResource) syncpointPreDestruct_DISPATCH(pResource) -#define syncpointControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define syncpointControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define syncpointControlFilter(pResource, pCallContext, pParams) syncpointControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define syncpointIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define syncpointIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define syncpointIsPartialUnmapSupported(pResource) syncpointIsPartialUnmapSupported_DISPATCH(pResource) -#define syncpointMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define syncpointMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define syncpointMapTo(pResource, pParams) syncpointMapTo_DISPATCH(pResource, pParams) -#define syncpointUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define syncpointUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define syncpointUnmapFrom(pResource, pParams) syncpointUnmapFrom_DISPATCH(pResource, pParams) -#define syncpointGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define syncpointGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define syncpointGetRefCount(pResource) syncpointGetRefCount_DISPATCH(pResource) -#define syncpointAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define syncpointAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define syncpointAddAdditionalDependants(pClient, pResource, pReference) syncpointAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool syncpointCanCopy_DISPATCH(struct SyncpointMemory *pSyncpointMemory) { - return pSyncpointMemory->__syncpointCanCopy__(pSyncpointMemory); + return pSyncpointMemory->__nvoc_vtable->__syncpointCanCopy__(pSyncpointMemory); } static inline NV_STATUS syncpointIsDuplicate_DISPATCH(struct SyncpointMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__syncpointIsDuplicate__(pMemory, hMemory, pDuplicate); + return pMemory->__nvoc_vtable->__syncpointIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS syncpointGetMapAddrSpace_DISPATCH(struct SyncpointMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pMemory->__syncpointGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); + return pMemory->__nvoc_vtable->__syncpointGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS syncpointControl_DISPATCH(struct SyncpointMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__syncpointControl__(pMemory, pCallContext, pParams); + return pMemory->__nvoc_vtable->__syncpointControl__(pMemory, pCallContext, pParams); } static inline NV_STATUS syncpointMap_DISPATCH(struct SyncpointMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__syncpointMap__(pMemory, pCallContext, pParams, pCpuMapping); + return pMemory->__nvoc_vtable->__syncpointMap__(pMemory, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS syncpointUnmap_DISPATCH(struct SyncpointMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__syncpointUnmap__(pMemory, pCallContext, pCpuMapping); + return pMemory->__nvoc_vtable->__syncpointUnmap__(pMemory, pCallContext, pCpuMapping); } static inline NV_STATUS syncpointGetMemInterMapParams_DISPATCH(struct SyncpointMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__syncpointGetMemInterMapParams__(pMemory, pParams); + return pMemory->__nvoc_vtable->__syncpointGetMemInterMapParams__(pMemory, pParams); } static inline NV_STATUS syncpointCheckMemInterUnmap_DISPATCH(struct SyncpointMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__syncpointCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); + return pMemory->__nvoc_vtable->__syncpointCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } static inline NV_STATUS syncpointGetMemoryMappingDescriptor_DISPATCH(struct SyncpointMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__syncpointGetMemoryMappingDescriptor__(pMemory, ppMemDesc); + return pMemory->__nvoc_vtable->__syncpointGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } static inline NV_STATUS syncpointCheckCopyPermissions_DISPATCH(struct SyncpointMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__syncpointCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); + return pMemory->__nvoc_vtable->__syncpointCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } static inline NV_STATUS syncpointIsReady_DISPATCH(struct SyncpointMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__syncpointIsReady__(pMemory, bCopyConstructorContext); + return pMemory->__nvoc_vtable->__syncpointIsReady__(pMemory, bCopyConstructorContext); } static inline NvBool syncpointIsGpuMapAllowed_DISPATCH(struct SyncpointMemory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__syncpointIsGpuMapAllowed__(pMemory, pGpu); + return pMemory->__nvoc_vtable->__syncpointIsGpuMapAllowed__(pMemory, pGpu); } static inline NvBool syncpointIsExportAllowed_DISPATCH(struct SyncpointMemory *pMemory) { - return pMemory->__syncpointIsExportAllowed__(pMemory); + return pMemory->__nvoc_vtable->__syncpointIsExportAllowed__(pMemory); } static inline NvBool syncpointAccessCallback_DISPATCH(struct SyncpointMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__syncpointAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__syncpointAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool syncpointShareCallback_DISPATCH(struct SyncpointMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__syncpointShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__syncpointShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS syncpointControlSerialization_Prologue_DISPATCH(struct SyncpointMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__syncpointControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__syncpointControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void syncpointControlSerialization_Epilogue_DISPATCH(struct SyncpointMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__syncpointControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__syncpointControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS syncpointControl_Prologue_DISPATCH(struct SyncpointMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__syncpointControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__syncpointControl_Prologue__(pResource, pCallContext, pParams); } static inline void syncpointControl_Epilogue_DISPATCH(struct SyncpointMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__syncpointControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__syncpointControl_Epilogue__(pResource, pCallContext, pParams); } static inline void syncpointPreDestruct_DISPATCH(struct SyncpointMemory *pResource) { - pResource->__syncpointPreDestruct__(pResource); + pResource->__nvoc_vtable->__syncpointPreDestruct__(pResource); } static inline NV_STATUS syncpointControlFilter_DISPATCH(struct SyncpointMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__syncpointControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__syncpointControlFilter__(pResource, pCallContext, pParams); } static inline NvBool syncpointIsPartialUnmapSupported_DISPATCH(struct SyncpointMemory *pResource) { - return pResource->__syncpointIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__syncpointIsPartialUnmapSupported__(pResource); } static inline NV_STATUS syncpointMapTo_DISPATCH(struct SyncpointMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__syncpointMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__syncpointMapTo__(pResource, pParams); } static inline NV_STATUS syncpointUnmapFrom_DISPATCH(struct SyncpointMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__syncpointUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__syncpointUnmapFrom__(pResource, pParams); } static inline NvU32 syncpointGetRefCount_DISPATCH(struct SyncpointMemory *pResource) { - return pResource->__syncpointGetRefCount__(pResource); + return pResource->__nvoc_vtable->__syncpointGetRefCount__(pResource); } static inline void syncpointAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct SyncpointMemory *pResource, RsResourceRef *pReference) { - pResource->__syncpointAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__syncpointAddAdditionalDependants__(pClient, pResource, pReference); } NvBool syncpointCanCopy_IMPL(struct SyncpointMemory *pSyncpointMemory); diff --git a/src/nvidia/generated/g_system_mem_nvoc.c b/src/nvidia/generated/g_system_mem_nvoc.c index ad155bb391..fdb97e270b 100644 --- a/src/nvidia/generated/g_system_mem_nvoc.c +++ b/src/nvidia/generated/g_system_mem_nvoc.c @@ -141,135 +141,230 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_SystemMe }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NvBool __nvoc_down_thunk_StandardMemory_resCanCopy(struct RsResource *pStandardMemory); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^3 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^3 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^3 +NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource); // super^2 +void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource); // super^2 +void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference); // super^2 +NV_STATUS __nvoc_up_thunk_Memory_stdmemIsDuplicate(struct StandardMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMapAddrSpace(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemControl(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemMap(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemUnmap(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMemInterMapParams(struct StandardMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemCheckMemInterUnmap(struct StandardMemory *pMemory, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMemoryMappingDescriptor(struct StandardMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemCheckCopyPermissions(struct StandardMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemIsReady(struct StandardMemory *pMemory, NvBool bCopyConstructorContext); // super +NvBool __nvoc_up_thunk_Memory_stdmemIsGpuMapAllowed(struct StandardMemory *pMemory, struct OBJGPU *pGpu); // super +NvBool __nvoc_up_thunk_Memory_stdmemIsExportAllowed(struct StandardMemory *pMemory); // super +NvBool __nvoc_up_thunk_RmResource_stdmemAccessCallback(struct StandardMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_stdmemShareCallback(struct StandardMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_stdmemControlSerialization_Prologue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_stdmemControlSerialization_Epilogue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_stdmemControl_Prologue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_stdmemControl_Epilogue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RsResource_stdmemPreDestruct(struct StandardMemory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_stdmemControlFilter(struct StandardMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_stdmemIsPartialUnmapSupported(struct StandardMemory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_stdmemMapTo(struct StandardMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_stdmemUnmapFrom(struct StandardMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_stdmemGetRefCount(struct StandardMemory *pResource); // super +void __nvoc_up_thunk_RsResource_stdmemAddAdditionalDependants(struct RsClient *pClient, struct StandardMemory *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_StandardMemory_sysmemCanCopy(struct SystemMemory *pStandardMemory); // this +NV_STATUS __nvoc_up_thunk_Memory_sysmemIsDuplicate(struct SystemMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate); // this +NV_STATUS __nvoc_up_thunk_Memory_sysmemGetMapAddrSpace(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_Memory_sysmemControl(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_sysmemMap(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_sysmemUnmap(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_sysmemGetMemInterMapParams(struct SystemMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_sysmemCheckMemInterUnmap(struct SystemMemory *pMemory, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_Memory_sysmemGetMemoryMappingDescriptor(struct SystemMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_Memory_sysmemCheckCopyPermissions(struct SystemMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // this +NV_STATUS __nvoc_up_thunk_Memory_sysmemIsReady(struct SystemMemory *pMemory, NvBool bCopyConstructorContext); // this +NvBool __nvoc_up_thunk_Memory_sysmemIsGpuMapAllowed(struct SystemMemory *pMemory, struct OBJGPU *pGpu); // this +NvBool __nvoc_up_thunk_Memory_sysmemIsExportAllowed(struct SystemMemory *pMemory); // this +NvBool __nvoc_up_thunk_RmResource_sysmemAccessCallback(struct SystemMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_sysmemShareCallback(struct SystemMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_sysmemControlSerialization_Prologue(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_sysmemControlSerialization_Epilogue(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_sysmemControl_Prologue(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_sysmemControl_Epilogue(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RsResource_sysmemPreDestruct(struct SystemMemory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_sysmemControlFilter(struct SystemMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_sysmemIsPartialUnmapSupported(struct SystemMemory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_sysmemMapTo(struct SystemMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_sysmemUnmapFrom(struct SystemMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_sysmemGetRefCount(struct SystemMemory *pResource); // this +void __nvoc_up_thunk_RsResource_sysmemAddAdditionalDependants(struct RsClient *pClient, struct SystemMemory *pResource, RsResourceRef *pReference); // this + // 26 up-thunk(s) defined to bridge methods in SystemMemory to superclasses // sysmemCanCopy: virtual inherited (stdmem) base (stdmem) -static NvBool __nvoc_up_thunk_StandardMemory_sysmemCanCopy(struct SystemMemory *pStandardMemory) { +NvBool __nvoc_up_thunk_StandardMemory_sysmemCanCopy(struct SystemMemory *pStandardMemory) { return stdmemCanCopy((struct StandardMemory *)(((unsigned char *) pStandardMemory) + __nvoc_rtti_SystemMemory_StandardMemory.offset)); } // sysmemIsDuplicate: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_sysmemIsDuplicate(struct SystemMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_Memory_sysmemIsDuplicate(struct SystemMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), hMemory, pDuplicate); } // sysmemGetMapAddrSpace: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_sysmemGetMapAddrSpace(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_Memory_sysmemGetMapAddrSpace(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); } // sysmemControl: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_sysmemControl(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_sysmemControl(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), pCallContext, pParams); } // sysmemMap: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_sysmemMap(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_sysmemMap(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), pCallContext, pParams, pCpuMapping); } // sysmemUnmap: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_sysmemUnmap(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_sysmemUnmap(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), pCallContext, pCpuMapping); } // sysmemGetMemInterMapParams: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_sysmemGetMemInterMapParams(struct SystemMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_sysmemGetMemInterMapParams(struct SystemMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), pParams); } // sysmemCheckMemInterUnmap: inline virtual inherited (mem) base (stdmem) body -static NV_STATUS __nvoc_up_thunk_Memory_sysmemCheckMemInterUnmap(struct SystemMemory *pMemory, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_Memory_sysmemCheckMemInterUnmap(struct SystemMemory *pMemory, NvBool bSubdeviceHandleProvided) { return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), bSubdeviceHandleProvided); } // sysmemGetMemoryMappingDescriptor: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_sysmemGetMemoryMappingDescriptor(struct SystemMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_Memory_sysmemGetMemoryMappingDescriptor(struct SystemMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), ppMemDesc); } // sysmemCheckCopyPermissions: inline virtual inherited (mem) base (stdmem) body -static NV_STATUS __nvoc_up_thunk_Memory_sysmemCheckCopyPermissions(struct SystemMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { +NV_STATUS __nvoc_up_thunk_Memory_sysmemCheckCopyPermissions(struct SystemMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), pDstGpu, pDstDevice); } // sysmemIsReady: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_sysmemIsReady(struct SystemMemory *pMemory, NvBool bCopyConstructorContext) { +NV_STATUS __nvoc_up_thunk_Memory_sysmemIsReady(struct SystemMemory *pMemory, NvBool bCopyConstructorContext) { return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), bCopyConstructorContext); } // sysmemIsGpuMapAllowed: inline virtual inherited (mem) base (stdmem) body -static NvBool __nvoc_up_thunk_Memory_sysmemIsGpuMapAllowed(struct SystemMemory *pMemory, struct OBJGPU *pGpu) { +NvBool __nvoc_up_thunk_Memory_sysmemIsGpuMapAllowed(struct SystemMemory *pMemory, struct OBJGPU *pGpu) { return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset), pGpu); } // sysmemIsExportAllowed: inline virtual inherited (mem) base (stdmem) body -static NvBool __nvoc_up_thunk_Memory_sysmemIsExportAllowed(struct SystemMemory *pMemory) { +NvBool __nvoc_up_thunk_Memory_sysmemIsExportAllowed(struct SystemMemory *pMemory) { return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_SystemMemory_Memory.offset)); } // sysmemAccessCallback: virtual inherited (rmres) base (stdmem) -static NvBool __nvoc_up_thunk_RmResource_sysmemAccessCallback(struct SystemMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_sysmemAccessCallback(struct SystemMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // sysmemShareCallback: virtual inherited (rmres) base (stdmem) -static NvBool __nvoc_up_thunk_RmResource_sysmemShareCallback(struct SystemMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_sysmemShareCallback(struct SystemMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // sysmemControlSerialization_Prologue: virtual inherited (rmres) base (stdmem) -static NV_STATUS __nvoc_up_thunk_RmResource_sysmemControlSerialization_Prologue(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_sysmemControlSerialization_Prologue(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RmResource.offset), pCallContext, pParams); } // sysmemControlSerialization_Epilogue: virtual inherited (rmres) base (stdmem) -static void __nvoc_up_thunk_RmResource_sysmemControlSerialization_Epilogue(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_sysmemControlSerialization_Epilogue(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RmResource.offset), pCallContext, pParams); } // sysmemControl_Prologue: virtual inherited (rmres) base (stdmem) -static NV_STATUS __nvoc_up_thunk_RmResource_sysmemControl_Prologue(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_sysmemControl_Prologue(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RmResource.offset), pCallContext, pParams); } // sysmemControl_Epilogue: virtual inherited (rmres) base (stdmem) -static void __nvoc_up_thunk_RmResource_sysmemControl_Epilogue(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_sysmemControl_Epilogue(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RmResource.offset), pCallContext, pParams); } // sysmemPreDestruct: virtual inherited (res) base (stdmem) -static void __nvoc_up_thunk_RsResource_sysmemPreDestruct(struct SystemMemory *pResource) { +void __nvoc_up_thunk_RsResource_sysmemPreDestruct(struct SystemMemory *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RsResource.offset)); } // sysmemControlFilter: virtual inherited (res) base (stdmem) -static NV_STATUS __nvoc_up_thunk_RsResource_sysmemControlFilter(struct SystemMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_sysmemControlFilter(struct SystemMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RsResource.offset), pCallContext, pParams); } // sysmemIsPartialUnmapSupported: inline virtual inherited (res) base (stdmem) body -static NvBool __nvoc_up_thunk_RsResource_sysmemIsPartialUnmapSupported(struct SystemMemory *pResource) { +NvBool __nvoc_up_thunk_RsResource_sysmemIsPartialUnmapSupported(struct SystemMemory *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RsResource.offset)); } // sysmemMapTo: virtual inherited (res) base (stdmem) -static NV_STATUS __nvoc_up_thunk_RsResource_sysmemMapTo(struct SystemMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_sysmemMapTo(struct SystemMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RsResource.offset), pParams); } // sysmemUnmapFrom: virtual inherited (res) base (stdmem) -static NV_STATUS __nvoc_up_thunk_RsResource_sysmemUnmapFrom(struct SystemMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_sysmemUnmapFrom(struct SystemMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RsResource.offset), pParams); } // sysmemGetRefCount: virtual inherited (res) base (stdmem) -static NvU32 __nvoc_up_thunk_RsResource_sysmemGetRefCount(struct SystemMemory *pResource) { +NvU32 __nvoc_up_thunk_RsResource_sysmemGetRefCount(struct SystemMemory *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RsResource.offset)); } // sysmemAddAdditionalDependants: virtual inherited (res) base (stdmem) -static void __nvoc_up_thunk_RsResource_sysmemAddAdditionalDependants(struct RsClient *pClient, struct SystemMemory *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_sysmemAddAdditionalDependants(struct RsClient *pClient, struct SystemMemory *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_SystemMemory_RsResource.offset), pReference); } @@ -322,91 +417,145 @@ static void __nvoc_init_funcTable_SystemMemory_1(SystemMemory *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x101u) pThis->__sysmemCtrlCmdGetSurfacePhysPages__ = &sysmemCtrlCmdGetSurfacePhysPages_IMPL; #endif - - // sysmemCanCopy -- virtual inherited (stdmem) base (stdmem) - pThis->__sysmemCanCopy__ = &__nvoc_up_thunk_StandardMemory_sysmemCanCopy; - - // sysmemIsDuplicate -- virtual inherited (mem) base (stdmem) - pThis->__sysmemIsDuplicate__ = &__nvoc_up_thunk_Memory_sysmemIsDuplicate; - - // sysmemGetMapAddrSpace -- virtual inherited (mem) base (stdmem) - pThis->__sysmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_sysmemGetMapAddrSpace; - - // sysmemControl -- virtual inherited (mem) base (stdmem) - pThis->__sysmemControl__ = &__nvoc_up_thunk_Memory_sysmemControl; - - // sysmemMap -- virtual inherited (mem) base (stdmem) - pThis->__sysmemMap__ = &__nvoc_up_thunk_Memory_sysmemMap; - - // sysmemUnmap -- virtual inherited (mem) base (stdmem) - pThis->__sysmemUnmap__ = &__nvoc_up_thunk_Memory_sysmemUnmap; - - // sysmemGetMemInterMapParams -- virtual inherited (mem) base (stdmem) - pThis->__sysmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_sysmemGetMemInterMapParams; - - // sysmemCheckMemInterUnmap -- inline virtual inherited (mem) base (stdmem) body - pThis->__sysmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_sysmemCheckMemInterUnmap; - - // sysmemGetMemoryMappingDescriptor -- virtual inherited (mem) base (stdmem) - pThis->__sysmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_sysmemGetMemoryMappingDescriptor; - - // sysmemCheckCopyPermissions -- inline virtual inherited (mem) base (stdmem) body - pThis->__sysmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_sysmemCheckCopyPermissions; - - // sysmemIsReady -- virtual inherited (mem) base (stdmem) - pThis->__sysmemIsReady__ = &__nvoc_up_thunk_Memory_sysmemIsReady; - - // sysmemIsGpuMapAllowed -- inline virtual inherited (mem) base (stdmem) body - pThis->__sysmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_sysmemIsGpuMapAllowed; - - // sysmemIsExportAllowed -- inline virtual inherited (mem) base (stdmem) body - pThis->__sysmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_sysmemIsExportAllowed; - - // sysmemAccessCallback -- virtual inherited (rmres) base (stdmem) - pThis->__sysmemAccessCallback__ = &__nvoc_up_thunk_RmResource_sysmemAccessCallback; - - // sysmemShareCallback -- virtual inherited (rmres) base (stdmem) - pThis->__sysmemShareCallback__ = &__nvoc_up_thunk_RmResource_sysmemShareCallback; - - // sysmemControlSerialization_Prologue -- virtual inherited (rmres) base (stdmem) - pThis->__sysmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_sysmemControlSerialization_Prologue; - - // sysmemControlSerialization_Epilogue -- virtual inherited (rmres) base (stdmem) - pThis->__sysmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_sysmemControlSerialization_Epilogue; - - // sysmemControl_Prologue -- virtual inherited (rmres) base (stdmem) - pThis->__sysmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_sysmemControl_Prologue; - - // sysmemControl_Epilogue -- virtual inherited (rmres) base (stdmem) - pThis->__sysmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_sysmemControl_Epilogue; - - // sysmemPreDestruct -- virtual inherited (res) base (stdmem) - pThis->__sysmemPreDestruct__ = &__nvoc_up_thunk_RsResource_sysmemPreDestruct; - - // sysmemControlFilter -- virtual inherited (res) base (stdmem) - pThis->__sysmemControlFilter__ = &__nvoc_up_thunk_RsResource_sysmemControlFilter; - - // sysmemIsPartialUnmapSupported -- inline virtual inherited (res) base (stdmem) body - pThis->__sysmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_sysmemIsPartialUnmapSupported; - - // sysmemMapTo -- virtual inherited (res) base (stdmem) - pThis->__sysmemMapTo__ = &__nvoc_up_thunk_RsResource_sysmemMapTo; - - // sysmemUnmapFrom -- virtual inherited (res) base (stdmem) - pThis->__sysmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_sysmemUnmapFrom; - - // sysmemGetRefCount -- virtual inherited (res) base (stdmem) - pThis->__sysmemGetRefCount__ = &__nvoc_up_thunk_RsResource_sysmemGetRefCount; - - // sysmemAddAdditionalDependants -- virtual inherited (res) base (stdmem) - pThis->__sysmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_sysmemAddAdditionalDependants; -} // End __nvoc_init_funcTable_SystemMemory_1 with approximately 28 basic block(s). +} // End __nvoc_init_funcTable_SystemMemory_1 with approximately 2 basic block(s). // Initialize vtable(s) for 28 virtual method(s). void __nvoc_init_funcTable_SystemMemory(SystemMemory *pThis) { - // Initialize vtable(s) with 28 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__SystemMemory vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x101u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x101u) +#endif + .__sysmemCanCopy__ = &__nvoc_up_thunk_StandardMemory_sysmemCanCopy, // virtual inherited (stdmem) base (stdmem) + .StandardMemory.__stdmemCanCopy__ = &stdmemCanCopy_IMPL, // virtual override (res) base (mem) + .StandardMemory.Memory.__memCanCopy__ = &__nvoc_up_thunk_RsResource_memCanCopy, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_StandardMemory_resCanCopy, // virtual + .__sysmemIsDuplicate__ = &__nvoc_up_thunk_Memory_sysmemIsDuplicate, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemIsDuplicate__ = &__nvoc_up_thunk_Memory_stdmemIsDuplicate, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memIsDuplicate__ = &memIsDuplicate_IMPL, // virtual override (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resIsDuplicate__ = &__nvoc_down_thunk_Memory_resIsDuplicate, // virtual + .__sysmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_sysmemGetMapAddrSpace, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_stdmemGetMapAddrSpace, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memGetMapAddrSpace__ = &memGetMapAddrSpace_IMPL, // virtual + .__sysmemControl__ = &__nvoc_up_thunk_Memory_sysmemControl, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemControl__ = &__nvoc_up_thunk_Memory_stdmemControl, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memControl__ = &memControl_IMPL, // virtual override (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_Memory_resControl, // virtual + .__sysmemMap__ = &__nvoc_up_thunk_Memory_sysmemMap, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemMap__ = &__nvoc_up_thunk_Memory_stdmemMap, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memMap__ = &memMap_IMPL, // virtual override (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_Memory_resMap, // virtual + .__sysmemUnmap__ = &__nvoc_up_thunk_Memory_sysmemUnmap, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemUnmap__ = &__nvoc_up_thunk_Memory_stdmemUnmap, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memUnmap__ = &memUnmap_IMPL, // virtual override (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_Memory_resUnmap, // virtual + .__sysmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_sysmemGetMemInterMapParams, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_stdmemGetMemInterMapParams, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memGetMemInterMapParams__ = &memGetMemInterMapParams_IMPL, // virtual override (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_Memory_rmresGetMemInterMapParams, // virtual + .__sysmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_sysmemCheckMemInterUnmap, // inline virtual inherited (mem) base (stdmem) body + .StandardMemory.__stdmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_stdmemCheckMemInterUnmap, // inline virtual inherited (mem) base (mem) body + .StandardMemory.Memory.__memCheckMemInterUnmap__ = &memCheckMemInterUnmap_ac1694, // inline virtual override (rmres) base (rmres) body + .StandardMemory.Memory.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_Memory_rmresCheckMemInterUnmap, // virtual + .__sysmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_sysmemGetMemoryMappingDescriptor, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_stdmemGetMemoryMappingDescriptor, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memGetMemoryMappingDescriptor__ = &memGetMemoryMappingDescriptor_IMPL, // virtual override (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor, // virtual + .__sysmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_sysmemCheckCopyPermissions, // inline virtual inherited (mem) base (stdmem) body + .StandardMemory.__stdmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_stdmemCheckCopyPermissions, // inline virtual inherited (mem) base (mem) body + .StandardMemory.Memory.__memCheckCopyPermissions__ = &memCheckCopyPermissions_ac1694, // inline virtual body + .__sysmemIsReady__ = &__nvoc_up_thunk_Memory_sysmemIsReady, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemIsReady__ = &__nvoc_up_thunk_Memory_stdmemIsReady, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memIsReady__ = &memIsReady_IMPL, // virtual + .__sysmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_sysmemIsGpuMapAllowed, // inline virtual inherited (mem) base (stdmem) body + .StandardMemory.__stdmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_stdmemIsGpuMapAllowed, // inline virtual inherited (mem) base (mem) body + .StandardMemory.Memory.__memIsGpuMapAllowed__ = &memIsGpuMapAllowed_e661f0, // inline virtual body + .__sysmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_sysmemIsExportAllowed, // inline virtual inherited (mem) base (stdmem) body + .StandardMemory.__stdmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_stdmemIsExportAllowed, // inline virtual inherited (mem) base (mem) body + .StandardMemory.Memory.__memIsExportAllowed__ = &memIsExportAllowed_e661f0, // inline virtual body + .__sysmemAccessCallback__ = &__nvoc_up_thunk_RmResource_sysmemAccessCallback, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemAccessCallback__ = &__nvoc_up_thunk_RmResource_stdmemAccessCallback, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memAccessCallback__ = &__nvoc_up_thunk_RmResource_memAccessCallback, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__sysmemShareCallback__ = &__nvoc_up_thunk_RmResource_sysmemShareCallback, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemShareCallback__ = &__nvoc_up_thunk_RmResource_stdmemShareCallback, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memShareCallback__ = &__nvoc_up_thunk_RmResource_memShareCallback, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__sysmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_sysmemControlSerialization_Prologue, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_stdmemControlSerialization_Prologue, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__sysmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_sysmemControlSerialization_Epilogue, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_stdmemControlSerialization_Epilogue, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__sysmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_sysmemControl_Prologue, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_stdmemControl_Prologue, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memControl_Prologue__ = &__nvoc_up_thunk_RmResource_memControl_Prologue, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__sysmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_sysmemControl_Epilogue, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_stdmemControl_Epilogue, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memControl_Epilogue, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__sysmemPreDestruct__ = &__nvoc_up_thunk_RsResource_sysmemPreDestruct, // virtual inherited (res) base (stdmem) + .StandardMemory.__stdmemPreDestruct__ = &__nvoc_up_thunk_RsResource_stdmemPreDestruct, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memPreDestruct__ = &__nvoc_up_thunk_RsResource_memPreDestruct, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__sysmemControlFilter__ = &__nvoc_up_thunk_RsResource_sysmemControlFilter, // virtual inherited (res) base (stdmem) + .StandardMemory.__stdmemControlFilter__ = &__nvoc_up_thunk_RsResource_stdmemControlFilter, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memControlFilter__ = &__nvoc_up_thunk_RsResource_memControlFilter, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__sysmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_sysmemIsPartialUnmapSupported, // inline virtual inherited (res) base (stdmem) body + .StandardMemory.__stdmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_stdmemIsPartialUnmapSupported, // inline virtual inherited (res) base (mem) body + .StandardMemory.Memory.__memIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .StandardMemory.Memory.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .StandardMemory.Memory.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__sysmemMapTo__ = &__nvoc_up_thunk_RsResource_sysmemMapTo, // virtual inherited (res) base (stdmem) + .StandardMemory.__stdmemMapTo__ = &__nvoc_up_thunk_RsResource_stdmemMapTo, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memMapTo__ = &__nvoc_up_thunk_RsResource_memMapTo, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__sysmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_sysmemUnmapFrom, // virtual inherited (res) base (stdmem) + .StandardMemory.__stdmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_stdmemUnmapFrom, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memUnmapFrom__ = &__nvoc_up_thunk_RsResource_memUnmapFrom, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__sysmemGetRefCount__ = &__nvoc_up_thunk_RsResource_sysmemGetRefCount, // virtual inherited (res) base (stdmem) + .StandardMemory.__stdmemGetRefCount__ = &__nvoc_up_thunk_RsResource_stdmemGetRefCount, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memGetRefCount__ = &__nvoc_up_thunk_RsResource_memGetRefCount, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__sysmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_sysmemAddAdditionalDependants, // virtual inherited (res) base (stdmem) + .StandardMemory.__stdmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_stdmemAddAdditionalDependants, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memAddAdditionalDependants, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.StandardMemory.Memory.RmResource.RsResource; // (res) super^4 + pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable = &vtable.StandardMemory.Memory.RmResource; // (rmres) super^3 + pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable = &vtable.StandardMemory.Memory; // (mem) super^2 + pThis->__nvoc_base_StandardMemory.__nvoc_vtable = &vtable.StandardMemory; // (stdmem) super + pThis->__nvoc_vtable = &vtable; // (sysmem) this + + // Initialize vtable(s) with 2 per-object function pointer(s). __nvoc_init_funcTable_SystemMemory_1(pThis); } diff --git a/src/nvidia/generated/g_system_mem_nvoc.h b/src/nvidia/generated/g_system_mem_nvoc.h index 1eba5c264a..e125af1f70 100644 --- a/src/nvidia/generated/g_system_mem_nvoc.h +++ b/src/nvidia/generated/g_system_mem_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -56,10 +56,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__SystemMemory; + + struct SystemMemory { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__SystemMemory *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct StandardMemory __nvoc_base_StandardMemory; @@ -73,9 +78,16 @@ struct SystemMemory { struct StandardMemory *__nvoc_pbase_StandardMemory; // stdmem super struct SystemMemory *__nvoc_pbase_SystemMemory; // sysmem - // Vtable with 28 per-object function pointers + // Vtable with 2 per-object function pointers NV_STATUS (*__sysmemCtrlCmdGetSurfaceNumPhysPages__)(struct SystemMemory * /*this*/, NV003E_CTRL_GET_SURFACE_NUM_PHYS_PAGES_PARAMS *); // exported (id=0x3e0102) NV_STATUS (*__sysmemCtrlCmdGetSurfacePhysPages__)(struct SystemMemory * /*this*/, NV003E_CTRL_GET_SURFACE_PHYS_PAGES_PARAMS *); // exported (id=0x3e0103) +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__SystemMemory { + const struct NVOC_VTABLE__StandardMemory StandardMemory; // (stdmem) 26 function pointers + NvBool (*__sysmemCanCopy__)(struct SystemMemory * /*this*/); // virtual inherited (stdmem) base (stdmem) NV_STATUS (*__sysmemIsDuplicate__)(struct SystemMemory * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (stdmem) NV_STATUS (*__sysmemGetMapAddrSpace__)(struct SystemMemory * /*this*/, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *); // virtual inherited (mem) base (stdmem) @@ -138,57 +150,57 @@ NV_STATUS __nvoc_objCreate_SystemMemory(SystemMemory**, Dynamic*, NvU32, CALL_CO #define sysmemCtrlCmdGetSurfaceNumPhysPages(pStandardMemory, pParams) sysmemCtrlCmdGetSurfaceNumPhysPages_DISPATCH(pStandardMemory, pParams) #define sysmemCtrlCmdGetSurfacePhysPages_FNPTR(pStandardMemory) pStandardMemory->__sysmemCtrlCmdGetSurfacePhysPages__ #define sysmemCtrlCmdGetSurfacePhysPages(pStandardMemory, pParams) sysmemCtrlCmdGetSurfacePhysPages_DISPATCH(pStandardMemory, pParams) -#define sysmemCanCopy_FNPTR(pStandardMemory) pStandardMemory->__nvoc_base_StandardMemory.__stdmemCanCopy__ +#define sysmemCanCopy_FNPTR(pStandardMemory) pStandardMemory->__nvoc_base_StandardMemory.__nvoc_vtable->__stdmemCanCopy__ #define sysmemCanCopy(pStandardMemory) sysmemCanCopy_DISPATCH(pStandardMemory) -#define sysmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsDuplicate__ +#define sysmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memIsDuplicate__ #define sysmemIsDuplicate(pMemory, hMemory, pDuplicate) sysmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define sysmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMapAddrSpace__ +#define sysmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memGetMapAddrSpace__ #define sysmemGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) sysmemGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define sysmemControl_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memControl__ +#define sysmemControl_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memControl__ #define sysmemControl(pMemory, pCallContext, pParams) sysmemControl_DISPATCH(pMemory, pCallContext, pParams) -#define sysmemMap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memMap__ +#define sysmemMap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memMap__ #define sysmemMap(pMemory, pCallContext, pParams, pCpuMapping) sysmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define sysmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memUnmap__ +#define sysmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memUnmap__ #define sysmemUnmap(pMemory, pCallContext, pCpuMapping) sysmemUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define sysmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMemInterMapParams__ +#define sysmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memGetMemInterMapParams__ #define sysmemGetMemInterMapParams(pMemory, pParams) sysmemGetMemInterMapParams_DISPATCH(pMemory, pParams) -#define sysmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define sysmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memCheckMemInterUnmap__ #define sysmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) sysmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define sysmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ +#define sysmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memGetMemoryMappingDescriptor__ #define sysmemGetMemoryMappingDescriptor(pMemory, ppMemDesc) sysmemGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define sysmemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memCheckCopyPermissions__ +#define sysmemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memCheckCopyPermissions__ #define sysmemCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) sysmemCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define sysmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsReady__ +#define sysmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memIsReady__ #define sysmemIsReady(pMemory, bCopyConstructorContext) sysmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) -#define sysmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define sysmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memIsGpuMapAllowed__ #define sysmemIsGpuMapAllowed(pMemory, pGpu) sysmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define sysmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsExportAllowed__ +#define sysmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memIsExportAllowed__ #define sysmemIsExportAllowed(pMemory) sysmemIsExportAllowed_DISPATCH(pMemory) -#define sysmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define sysmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define sysmemAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) sysmemAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define sysmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define sysmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define sysmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) sysmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define sysmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define sysmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define sysmemControlSerialization_Prologue(pResource, pCallContext, pParams) sysmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define sysmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define sysmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define sysmemControlSerialization_Epilogue(pResource, pCallContext, pParams) sysmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define sysmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define sysmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define sysmemControl_Prologue(pResource, pCallContext, pParams) sysmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define sysmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define sysmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define sysmemControl_Epilogue(pResource, pCallContext, pParams) sysmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define sysmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define sysmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define sysmemPreDestruct(pResource) sysmemPreDestruct_DISPATCH(pResource) -#define sysmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define sysmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define sysmemControlFilter(pResource, pCallContext, pParams) sysmemControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define sysmemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define sysmemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define sysmemIsPartialUnmapSupported(pResource) sysmemIsPartialUnmapSupported_DISPATCH(pResource) -#define sysmemMapTo_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define sysmemMapTo_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define sysmemMapTo(pResource, pParams) sysmemMapTo_DISPATCH(pResource, pParams) -#define sysmemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define sysmemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define sysmemUnmapFrom(pResource, pParams) sysmemUnmapFrom_DISPATCH(pResource, pParams) -#define sysmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define sysmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define sysmemGetRefCount(pResource) sysmemGetRefCount_DISPATCH(pResource) -#define sysmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define sysmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define sysmemAddAdditionalDependants(pClient, pResource, pReference) sysmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions @@ -201,107 +213,107 @@ static inline NV_STATUS sysmemCtrlCmdGetSurfacePhysPages_DISPATCH(struct SystemM } static inline NvBool sysmemCanCopy_DISPATCH(struct SystemMemory *pStandardMemory) { - return pStandardMemory->__sysmemCanCopy__(pStandardMemory); + return pStandardMemory->__nvoc_vtable->__sysmemCanCopy__(pStandardMemory); } static inline NV_STATUS sysmemIsDuplicate_DISPATCH(struct SystemMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__sysmemIsDuplicate__(pMemory, hMemory, pDuplicate); + return pMemory->__nvoc_vtable->__sysmemIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS sysmemGetMapAddrSpace_DISPATCH(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pMemory->__sysmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); + return pMemory->__nvoc_vtable->__sysmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS sysmemControl_DISPATCH(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__sysmemControl__(pMemory, pCallContext, pParams); + return pMemory->__nvoc_vtable->__sysmemControl__(pMemory, pCallContext, pParams); } static inline NV_STATUS sysmemMap_DISPATCH(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__sysmemMap__(pMemory, pCallContext, pParams, pCpuMapping); + return pMemory->__nvoc_vtable->__sysmemMap__(pMemory, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS sysmemUnmap_DISPATCH(struct SystemMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__sysmemUnmap__(pMemory, pCallContext, pCpuMapping); + return pMemory->__nvoc_vtable->__sysmemUnmap__(pMemory, pCallContext, pCpuMapping); } static inline NV_STATUS sysmemGetMemInterMapParams_DISPATCH(struct SystemMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__sysmemGetMemInterMapParams__(pMemory, pParams); + return pMemory->__nvoc_vtable->__sysmemGetMemInterMapParams__(pMemory, pParams); } static inline NV_STATUS sysmemCheckMemInterUnmap_DISPATCH(struct SystemMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__sysmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); + return pMemory->__nvoc_vtable->__sysmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } static inline NV_STATUS sysmemGetMemoryMappingDescriptor_DISPATCH(struct SystemMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__sysmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); + return pMemory->__nvoc_vtable->__sysmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } static inline NV_STATUS sysmemCheckCopyPermissions_DISPATCH(struct SystemMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__sysmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); + return pMemory->__nvoc_vtable->__sysmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } static inline NV_STATUS sysmemIsReady_DISPATCH(struct SystemMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__sysmemIsReady__(pMemory, bCopyConstructorContext); + return pMemory->__nvoc_vtable->__sysmemIsReady__(pMemory, bCopyConstructorContext); } static inline NvBool sysmemIsGpuMapAllowed_DISPATCH(struct SystemMemory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__sysmemIsGpuMapAllowed__(pMemory, pGpu); + return pMemory->__nvoc_vtable->__sysmemIsGpuMapAllowed__(pMemory, pGpu); } static inline NvBool sysmemIsExportAllowed_DISPATCH(struct SystemMemory *pMemory) { - return pMemory->__sysmemIsExportAllowed__(pMemory); + return pMemory->__nvoc_vtable->__sysmemIsExportAllowed__(pMemory); } static inline NvBool sysmemAccessCallback_DISPATCH(struct SystemMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__sysmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__sysmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool sysmemShareCallback_DISPATCH(struct SystemMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__sysmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__sysmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS sysmemControlSerialization_Prologue_DISPATCH(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__sysmemControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__sysmemControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void sysmemControlSerialization_Epilogue_DISPATCH(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__sysmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__sysmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS sysmemControl_Prologue_DISPATCH(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__sysmemControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__sysmemControl_Prologue__(pResource, pCallContext, pParams); } static inline void sysmemControl_Epilogue_DISPATCH(struct SystemMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__sysmemControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__sysmemControl_Epilogue__(pResource, pCallContext, pParams); } static inline void sysmemPreDestruct_DISPATCH(struct SystemMemory *pResource) { - pResource->__sysmemPreDestruct__(pResource); + pResource->__nvoc_vtable->__sysmemPreDestruct__(pResource); } static inline NV_STATUS sysmemControlFilter_DISPATCH(struct SystemMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__sysmemControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__sysmemControlFilter__(pResource, pCallContext, pParams); } static inline NvBool sysmemIsPartialUnmapSupported_DISPATCH(struct SystemMemory *pResource) { - return pResource->__sysmemIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__sysmemIsPartialUnmapSupported__(pResource); } static inline NV_STATUS sysmemMapTo_DISPATCH(struct SystemMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__sysmemMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__sysmemMapTo__(pResource, pParams); } static inline NV_STATUS sysmemUnmapFrom_DISPATCH(struct SystemMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__sysmemUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__sysmemUnmapFrom__(pResource, pParams); } static inline NvU32 sysmemGetRefCount_DISPATCH(struct SystemMemory *pResource) { - return pResource->__sysmemGetRefCount__(pResource); + return pResource->__nvoc_vtable->__sysmemGetRefCount__(pResource); } static inline void sysmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct SystemMemory *pResource, RsResourceRef *pReference) { - pResource->__sysmemAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__sysmemAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS sysmemInitAllocRequest_HMM(struct OBJGPU *pGpu, struct SystemMemory *pSystemMemory, MEMORY_ALLOCATION_REQUEST *pAllocRequest); diff --git a/src/nvidia/generated/g_system_nvoc.c b/src/nvidia/generated/g_system_nvoc.c index 8b7c42905f..19c1e92ef0 100644 --- a/src/nvidia/generated/g_system_nvoc.c +++ b/src/nvidia/generated/g_system_nvoc.c @@ -66,6 +66,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJSYS = /*pExportInfo=*/ &__nvoc_export_info_OBJSYS }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJSYS = { /*numEntries=*/ 0, @@ -90,13 +94,15 @@ void __nvoc_init_dataField_OBJSYS(OBJSYS *pThis) { pThis->setProperty(pThis, PDB_PROP_SYS_IS_AGGRESSIVE_GC6_ENABLED, (0)); pThis->setProperty(pThis, PDB_PROP_SYS_PRIORITY_BOOST, (0)); pThis->setProperty(pThis, PDB_PROP_SYS_PRIORITY_THROTTLE_DELAY_US, 16 * 1000); - pThis->setProperty(pThis, PDB_PROP_SYS_RM_LOCK_TIME_COLLECT, ((NvBool)(0 != 0))); - pThis->setProperty(pThis, PDB_PROP_SYS_ENABLE_RM_TEST_ONLY_CODE, ((NvBool)(0 != 0))); - pThis->setProperty(pThis, PDB_PROP_SYS_ROUTE_TO_PHYSICAL_LOCK_BYPASS, ((NvBool)(0 == 0))); + pThis->setProperty(pThis, PDB_PROP_SYS_RM_LOCK_TIME_COLLECT, NV_FALSE); + pThis->setProperty(pThis, PDB_PROP_SYS_ENABLE_RM_TEST_ONLY_CODE, NV_FALSE); + pThis->setProperty(pThis, PDB_PROP_SYS_ROUTE_TO_PHYSICAL_LOCK_BYPASS, NV_TRUE); + pThis->setProperty(pThis, PDB_PROP_SYS_ENABLE_FORCE_SHARED_LOCK, NV_TRUE); - pThis->bUseDeferredClientListFree = ((NvBool)(0 != 0)); + pThis->bUseDeferredClientListFree = NV_FALSE; pThis->clientListDeferredFreeLimit = 0; + pThis->setProperty(pThis, PDB_PROP_SYS_RECOVERY_REBOOT_REQUIRED, NV_FALSE); } NV_STATUS __nvoc_ctor_Object(Object* ); @@ -126,16 +132,19 @@ NV_STATUS __nvoc_ctor_OBJSYS(OBJSYS *pThis) { // Vtable initialization static void __nvoc_init_funcTable_OBJSYS_1(OBJSYS *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // sysCaptureState -- virtual - pThis->__sysCaptureState__ = &sysCaptureState_IMPL; -} // End __nvoc_init_funcTable_OBJSYS_1 with approximately 1 basic block(s). +} // End __nvoc_init_funcTable_OBJSYS_1 // Initialize vtable(s) for 1 virtual method(s). void __nvoc_init_funcTable_OBJSYS(OBJSYS *pThis) { - // Initialize vtable(s) with 1 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__OBJSYS vtable = { + .__sysCaptureState__ = &sysCaptureState_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_vtable = &vtable; // (sys) this __nvoc_init_funcTable_OBJSYS_1(pThis); } diff --git a/src/nvidia/generated/g_system_nvoc.h b/src/nvidia/generated/g_system_nvoc.h index f114258d9d..164c69e43f 100644 --- a/src/nvidia/generated/g_system_nvoc.h +++ b/src/nvidia/generated/g_system_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -321,6 +321,12 @@ typedef struct SYS_STATIC_CONFIG /*! Indicates confidentail compute OS support is enabled or not */ NvBool bOsCCEnabled; + /*! Indicates SEV-SNP confidential compute OS support is enabled or not */ + NvBool bOsCCSevSnpEnabled; + + /*! Indicates SEV-SNP vTOM confidential compute OS support is enabled or not */ + NvBool bOsCCSnpVtomEnabled; + /*! Indicates Intel TDX confidentail compute OS support is enabled or not */ NvBool bOsCCTdxEnabled; } SYS_STATIC_CONFIG; @@ -375,10 +381,15 @@ MAKE_MULTIMAP(SYS_MEM_EXPORT_CACHE, SysMemExportCacheEntry); #endif +// Metadata including vtable +struct NVOC_VTABLE__OBJSYS; + + struct OBJSYS { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__OBJSYS *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; @@ -389,10 +400,7 @@ struct OBJSYS { struct OBJTRACEABLE *__nvoc_pbase_OBJTRACEABLE; // traceable super struct OBJSYS *__nvoc_pbase_OBJSYS; // sys - // Vtable with 1 per-object function pointer - NV_STATUS (*__sysCaptureState__)(struct OBJSYS * /*this*/); // virtual - - // 32 PDB properties + // 34 PDB properties NvBool PDB_PROP_SYS_SBIOS_NVIF_POWERMIZER_LIMIT; NvBool PDB_PROP_SYS_MXM_THERMAL_CONTROL_PRESENT; NvBool PDB_PROP_SYS_POWER_BATTERY; @@ -424,7 +432,9 @@ struct OBJSYS { NvBool PDB_PROP_SYS_ROUTE_TO_PHYSICAL_LOCK_BYPASS; NvBool PDB_PROP_SYS_IS_QSYNC_FW_REVISION_CHECK_DISABLED; NvBool PDB_PROP_SYS_GPU_LOCK_MIDPATH_ENABLED; + NvBool PDB_PROP_SYS_ENABLE_FORCE_SHARED_LOCK; NvBool PDB_PROP_SYS_DESTRUCTING; + NvBool PDB_PROP_SYS_RECOVERY_REBOOT_REQUIRED; // Data members NvU32 apiLockMask; @@ -440,7 +450,6 @@ struct OBJSYS { NvU32 gridSwPkg; void *pSema; NvU32 binMask; - PNODE pMemFilterList; NvU64 rmInstanceId; NvU32 currentCid; NvBool bUseDeferredClientListFree; @@ -471,6 +480,13 @@ struct OBJSYS { NvBool bIsGridBuild; }; + +// Metadata including vtable with 1 function pointer plus superclass metadata +struct NVOC_VTABLE__OBJSYS { + + NV_STATUS (*__sysCaptureState__)(struct OBJSYS * /*this*/); // virtual +}; + #ifndef __NVOC_CLASS_OBJSYS_TYPEDEF__ #define __NVOC_CLASS_OBJSYS_TYPEDEF__ typedef struct OBJSYS OBJSYS; @@ -548,10 +564,14 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJSYS; #define PDB_PROP_SYS_VALIDATE_CLIENT_HANDLE_BASE_NAME PDB_PROP_SYS_VALIDATE_CLIENT_HANDLE #define PDB_PROP_SYS_FABRIC_IS_EXTERNALLY_MANAGED_BASE_CAST #define PDB_PROP_SYS_FABRIC_IS_EXTERNALLY_MANAGED_BASE_NAME PDB_PROP_SYS_FABRIC_IS_EXTERNALLY_MANAGED +#define PDB_PROP_SYS_ENABLE_FORCE_SHARED_LOCK_BASE_CAST +#define PDB_PROP_SYS_ENABLE_FORCE_SHARED_LOCK_BASE_NAME PDB_PROP_SYS_ENABLE_FORCE_SHARED_LOCK #define PDB_PROP_SYS_IS_AGGRESSIVE_GC6_ENABLED_BASE_CAST #define PDB_PROP_SYS_IS_AGGRESSIVE_GC6_ENABLED_BASE_NAME PDB_PROP_SYS_IS_AGGRESSIVE_GC6_ENABLED #define PDB_PROP_SYS_HASWELL_CPU_C0_STEPPING_BASE_CAST #define PDB_PROP_SYS_HASWELL_CPU_C0_STEPPING_BASE_NAME PDB_PROP_SYS_HASWELL_CPU_C0_STEPPING +#define PDB_PROP_SYS_RECOVERY_REBOOT_REQUIRED_BASE_CAST +#define PDB_PROP_SYS_RECOVERY_REBOOT_REQUIRED_BASE_NAME PDB_PROP_SYS_RECOVERY_REBOOT_REQUIRED #define PDB_PROP_SYS_RM_LOCK_TIME_COLLECT_BASE_CAST #define PDB_PROP_SYS_RM_LOCK_TIME_COLLECT_BASE_NAME PDB_PROP_SYS_RM_LOCK_TIME_COLLECT #define PDB_PROP_SYS_DEBUGGER_DISABLED_BASE_CAST @@ -567,12 +587,12 @@ NV_STATUS __nvoc_objCreate_OBJSYS(OBJSYS**, Dynamic*, NvU32); // Wrapper macros -#define sysCaptureState_FNPTR(arg_this) arg_this->__sysCaptureState__ +#define sysCaptureState_FNPTR(arg_this) arg_this->__nvoc_vtable->__sysCaptureState__ #define sysCaptureState(arg_this) sysCaptureState_DISPATCH(arg_this) // Dispatch functions static inline NV_STATUS sysCaptureState_DISPATCH(struct OBJSYS *arg_this) { - return arg_this->__sysCaptureState__(arg_this); + return arg_this->__nvoc_vtable->__sysCaptureState__(arg_this); } NV_STATUS sysCaptureState_IMPL(struct OBJSYS *arg1); @@ -653,6 +673,16 @@ static inline NV_STATUS sysSyncExternalFabricMgmtWAR(struct OBJSYS *arg1, OBJGPU #define sysSyncExternalFabricMgmtWAR(arg1, arg2) sysSyncExternalFabricMgmtWAR_IMPL(arg1, arg2) #endif //__nvoc_system_h_disabled +void sysSetRecoveryRebootRequired_IMPL(struct OBJSYS *pSys, NvBool bRebootRequired); + +#ifdef __nvoc_system_h_disabled +static inline void sysSetRecoveryRebootRequired(struct OBJSYS *pSys, NvBool bRebootRequired) { + NV_ASSERT_FAILED_PRECOMP("OBJSYS was disabled!"); +} +#else //__nvoc_system_h_disabled +#define sysSetRecoveryRebootRequired(pSys, bRebootRequired) sysSetRecoveryRebootRequired_IMPL(pSys, bRebootRequired) +#endif //__nvoc_system_h_disabled + #undef PRIVATE_FIELD diff --git a/src/nvidia/generated/g_third_party_p2p_nvoc.c b/src/nvidia/generated/g_third_party_p2p_nvoc.c index 659ab761aa..5568b33195 100644 --- a/src/nvidia/generated/g_third_party_p2p_nvoc.c +++ b/src/nvidia/generated/g_third_party_p2p_nvoc.c @@ -66,6 +66,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_P2PTokenShare = /*pExportInfo=*/ &__nvoc_export_info_P2PTokenShare }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_P2PTokenShare = { /*numEntries=*/ 0, @@ -358,130 +362,198 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ThirdPar }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pControl(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pMap(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pUnmap(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_thirdpartyp2pShareCallback(struct ThirdPartyP2P *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pGetRegBaseOffsetAndSize(struct ThirdPartyP2P *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pGetMapAddrSpace(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pInternalControlForward(struct ThirdPartyP2P *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_thirdpartyp2pGetInternalObjectHandle(struct ThirdPartyP2P *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_thirdpartyp2pAccessCallback(struct ThirdPartyP2P *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_thirdpartyp2pGetMemInterMapParams(struct ThirdPartyP2P *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_thirdpartyp2pCheckMemInterUnmap(struct ThirdPartyP2P *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_thirdpartyp2pGetMemoryMappingDescriptor(struct ThirdPartyP2P *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_thirdpartyp2pControlSerialization_Prologue(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_thirdpartyp2pControlSerialization_Epilogue(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_thirdpartyp2pControl_Prologue(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_thirdpartyp2pControl_Epilogue(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_thirdpartyp2pCanCopy(struct ThirdPartyP2P *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_thirdpartyp2pIsDuplicate(struct ThirdPartyP2P *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_thirdpartyp2pPreDestruct(struct ThirdPartyP2P *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_thirdpartyp2pControlFilter(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_thirdpartyp2pIsPartialUnmapSupported(struct ThirdPartyP2P *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_thirdpartyp2pMapTo(struct ThirdPartyP2P *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_thirdpartyp2pUnmapFrom(struct ThirdPartyP2P *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_thirdpartyp2pGetRefCount(struct ThirdPartyP2P *pResource); // this +void __nvoc_up_thunk_RsResource_thirdpartyp2pAddAdditionalDependants(struct RsClient *pClient, struct ThirdPartyP2P *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in ThirdPartyP2P to superclasses // thirdpartyp2pControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pControl(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pControl(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset), pCallContext, pParams); } // thirdpartyp2pMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pMap(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pMap(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // thirdpartyp2pUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pUnmap(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pUnmap(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset), pCallContext, pCpuMapping); } // thirdpartyp2pShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_thirdpartyp2pShareCallback(struct ThirdPartyP2P *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_thirdpartyp2pShareCallback(struct ThirdPartyP2P *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // thirdpartyp2pGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pGetRegBaseOffsetAndSize(struct ThirdPartyP2P *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pGetRegBaseOffsetAndSize(struct ThirdPartyP2P *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset), pGpu, pOffset, pSize); } // thirdpartyp2pGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pGetMapAddrSpace(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pGetMapAddrSpace(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // thirdpartyp2pInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pInternalControlForward(struct ThirdPartyP2P *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_thirdpartyp2pInternalControlForward(struct ThirdPartyP2P *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset), command, pParams, size); } // thirdpartyp2pGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_thirdpartyp2pGetInternalObjectHandle(struct ThirdPartyP2P *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_thirdpartyp2pGetInternalObjectHandle(struct ThirdPartyP2P *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ThirdPartyP2P_GpuResource.offset)); } // thirdpartyp2pAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_thirdpartyp2pAccessCallback(struct ThirdPartyP2P *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_thirdpartyp2pAccessCallback(struct ThirdPartyP2P *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // thirdpartyp2pGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_thirdpartyp2pGetMemInterMapParams(struct ThirdPartyP2P *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_thirdpartyp2pGetMemInterMapParams(struct ThirdPartyP2P *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), pParams); } // thirdpartyp2pCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_thirdpartyp2pCheckMemInterUnmap(struct ThirdPartyP2P *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_thirdpartyp2pCheckMemInterUnmap(struct ThirdPartyP2P *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), bSubdeviceHandleProvided); } // thirdpartyp2pGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_thirdpartyp2pGetMemoryMappingDescriptor(struct ThirdPartyP2P *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_thirdpartyp2pGetMemoryMappingDescriptor(struct ThirdPartyP2P *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), ppMemDesc); } // thirdpartyp2pControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_thirdpartyp2pControlSerialization_Prologue(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_thirdpartyp2pControlSerialization_Prologue(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), pCallContext, pParams); } // thirdpartyp2pControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_thirdpartyp2pControlSerialization_Epilogue(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_thirdpartyp2pControlSerialization_Epilogue(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), pCallContext, pParams); } // thirdpartyp2pControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_thirdpartyp2pControl_Prologue(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_thirdpartyp2pControl_Prologue(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), pCallContext, pParams); } // thirdpartyp2pControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_thirdpartyp2pControl_Epilogue(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_thirdpartyp2pControl_Epilogue(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RmResource.offset), pCallContext, pParams); } // thirdpartyp2pCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_thirdpartyp2pCanCopy(struct ThirdPartyP2P *pResource) { +NvBool __nvoc_up_thunk_RsResource_thirdpartyp2pCanCopy(struct ThirdPartyP2P *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset)); } // thirdpartyp2pIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_thirdpartyp2pIsDuplicate(struct ThirdPartyP2P *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_thirdpartyp2pIsDuplicate(struct ThirdPartyP2P *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset), hMemory, pDuplicate); } // thirdpartyp2pPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_thirdpartyp2pPreDestruct(struct ThirdPartyP2P *pResource) { +void __nvoc_up_thunk_RsResource_thirdpartyp2pPreDestruct(struct ThirdPartyP2P *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset)); } // thirdpartyp2pControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_thirdpartyp2pControlFilter(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_thirdpartyp2pControlFilter(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset), pCallContext, pParams); } // thirdpartyp2pIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_thirdpartyp2pIsPartialUnmapSupported(struct ThirdPartyP2P *pResource) { +NvBool __nvoc_up_thunk_RsResource_thirdpartyp2pIsPartialUnmapSupported(struct ThirdPartyP2P *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset)); } // thirdpartyp2pMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_thirdpartyp2pMapTo(struct ThirdPartyP2P *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_thirdpartyp2pMapTo(struct ThirdPartyP2P *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset), pParams); } // thirdpartyp2pUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_thirdpartyp2pUnmapFrom(struct ThirdPartyP2P *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_thirdpartyp2pUnmapFrom(struct ThirdPartyP2P *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset), pParams); } // thirdpartyp2pGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_thirdpartyp2pGetRefCount(struct ThirdPartyP2P *pResource) { +NvU32 __nvoc_up_thunk_RsResource_thirdpartyp2pGetRefCount(struct ThirdPartyP2P *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset)); } // thirdpartyp2pAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_thirdpartyp2pAddAdditionalDependants(struct RsClient *pClient, struct ThirdPartyP2P *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_thirdpartyp2pAddAdditionalDependants(struct RsClient *pClient, struct ThirdPartyP2P *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ThirdPartyP2P_RsResource.offset), pReference); } @@ -550,88 +622,122 @@ static void __nvoc_init_funcTable_ThirdPartyP2P_1(ThirdPartyP2P *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__thirdpartyp2pCtrlCmdRegisterPid__ = &thirdpartyp2pCtrlCmdRegisterPid_IMPL; #endif - - // thirdpartyp2pControl -- virtual inherited (gpures) base (gpures) - pThis->__thirdpartyp2pControl__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pControl; - - // thirdpartyp2pMap -- virtual inherited (gpures) base (gpures) - pThis->__thirdpartyp2pMap__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pMap; - - // thirdpartyp2pUnmap -- virtual inherited (gpures) base (gpures) - pThis->__thirdpartyp2pUnmap__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pUnmap; - - // thirdpartyp2pShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__thirdpartyp2pShareCallback__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pShareCallback; - - // thirdpartyp2pGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__thirdpartyp2pGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pGetRegBaseOffsetAndSize; - - // thirdpartyp2pGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__thirdpartyp2pGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pGetMapAddrSpace; - - // thirdpartyp2pInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__thirdpartyp2pInternalControlForward__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pInternalControlForward; - - // thirdpartyp2pGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__thirdpartyp2pGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pGetInternalObjectHandle; - - // thirdpartyp2pAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__thirdpartyp2pAccessCallback__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pAccessCallback; - - // thirdpartyp2pGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__thirdpartyp2pGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pGetMemInterMapParams; - - // thirdpartyp2pCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__thirdpartyp2pCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pCheckMemInterUnmap; - - // thirdpartyp2pGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__thirdpartyp2pGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pGetMemoryMappingDescriptor; - - // thirdpartyp2pControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__thirdpartyp2pControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pControlSerialization_Prologue; - - // thirdpartyp2pControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__thirdpartyp2pControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pControlSerialization_Epilogue; - - // thirdpartyp2pControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__thirdpartyp2pControl_Prologue__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pControl_Prologue; - - // thirdpartyp2pControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__thirdpartyp2pControl_Epilogue__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pControl_Epilogue; - - // thirdpartyp2pCanCopy -- virtual inherited (res) base (gpures) - pThis->__thirdpartyp2pCanCopy__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pCanCopy; - - // thirdpartyp2pIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__thirdpartyp2pIsDuplicate__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pIsDuplicate; - - // thirdpartyp2pPreDestruct -- virtual inherited (res) base (gpures) - pThis->__thirdpartyp2pPreDestruct__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pPreDestruct; - - // thirdpartyp2pControlFilter -- virtual inherited (res) base (gpures) - pThis->__thirdpartyp2pControlFilter__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pControlFilter; - - // thirdpartyp2pIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__thirdpartyp2pIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pIsPartialUnmapSupported; - - // thirdpartyp2pMapTo -- virtual inherited (res) base (gpures) - pThis->__thirdpartyp2pMapTo__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pMapTo; - - // thirdpartyp2pUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__thirdpartyp2pUnmapFrom__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pUnmapFrom; - - // thirdpartyp2pGetRefCount -- virtual inherited (res) base (gpures) - pThis->__thirdpartyp2pGetRefCount__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pGetRefCount; - - // thirdpartyp2pAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__thirdpartyp2pAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pAddAdditionalDependants; -} // End __nvoc_init_funcTable_ThirdPartyP2P_1 with approximately 30 basic block(s). +} // End __nvoc_init_funcTable_ThirdPartyP2P_1 with approximately 5 basic block(s). // Initialize vtable(s) for 30 virtual method(s). void __nvoc_init_funcTable_ThirdPartyP2P(ThirdPartyP2P *pThis) { - // Initialize vtable(s) with 30 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__ThirdPartyP2P vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__thirdpartyp2pControl__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__thirdpartyp2pMap__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__thirdpartyp2pUnmap__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__thirdpartyp2pShareCallback__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__thirdpartyp2pGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__thirdpartyp2pGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__thirdpartyp2pInternalControlForward__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__thirdpartyp2pGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_thirdpartyp2pGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__thirdpartyp2pAccessCallback__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__thirdpartyp2pGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__thirdpartyp2pCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__thirdpartyp2pGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__thirdpartyp2pControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__thirdpartyp2pControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__thirdpartyp2pControl_Prologue__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__thirdpartyp2pControl_Epilogue__ = &__nvoc_up_thunk_RmResource_thirdpartyp2pControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__thirdpartyp2pCanCopy__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__thirdpartyp2pIsDuplicate__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__thirdpartyp2pPreDestruct__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__thirdpartyp2pControlFilter__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__thirdpartyp2pIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__thirdpartyp2pMapTo__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__thirdpartyp2pUnmapFrom__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__thirdpartyp2pGetRefCount__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__thirdpartyp2pAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_thirdpartyp2pAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (thirdpartyp2p) this + + // Initialize vtable(s) with 5 per-object function pointer(s). __nvoc_init_funcTable_ThirdPartyP2P_1(pThis); } diff --git a/src/nvidia/generated/g_third_party_p2p_nvoc.h b/src/nvidia/generated/g_third_party_p2p_nvoc.h index be7c92d689..67a62b7833 100644 --- a/src/nvidia/generated/g_third_party_p2p_nvoc.h +++ b/src/nvidia/generated/g_third_party_p2p_nvoc.h @@ -7,14 +7,14 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2009-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2009-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -126,7 +126,15 @@ struct _def_client_third_party_p2p_mapping_extent_info NvU64 address; NvU64 length; - NvU64 fbApertureOffset; + // Memory Area scatterlist of BAR1 PAs + MemoryArea memArea; + + // + // VGPU RPC returns contiguous range, so we preallocate range instead of portMemAlloc + // TODO: look into unifying VGPU/non-vgpu cases + // + MemoryRange vgpuRange; + PMEMORY_DESCRIPTOR pMemDesc; NvU32 refCount; ListNode listNode; // Node in the list. @@ -288,10 +296,15 @@ void shrp2pDestruct_IMPL(struct P2PTokenShare *pP2PTokenShare); #endif +// Metadata including vtable +struct NVOC_VTABLE__ThirdPartyP2P; + + struct ThirdPartyP2P { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__ThirdPartyP2P *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -304,12 +317,36 @@ struct ThirdPartyP2P { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct ThirdPartyP2P *__nvoc_pbase_ThirdPartyP2P; // thirdpartyp2p - // Vtable with 30 per-object function pointers + // Vtable with 5 per-object function pointers NV_STATUS (*__thirdpartyp2pCtrlCmdRegisterVaSpace__)(struct ThirdPartyP2P * /*this*/, NV503C_CTRL_REGISTER_VA_SPACE_PARAMS *); // exported (id=0x503c0102) NV_STATUS (*__thirdpartyp2pCtrlCmdUnregisterVaSpace__)(struct ThirdPartyP2P * /*this*/, NV503C_CTRL_UNREGISTER_VA_SPACE_PARAMS *); // exported (id=0x503c0103) NV_STATUS (*__thirdpartyp2pCtrlCmdRegisterVidmem__)(struct ThirdPartyP2P * /*this*/, NV503C_CTRL_REGISTER_VIDMEM_PARAMS *); // exported (id=0x503c0104) NV_STATUS (*__thirdpartyp2pCtrlCmdUnregisterVidmem__)(struct ThirdPartyP2P * /*this*/, NV503C_CTRL_UNREGISTER_VIDMEM_PARAMS *); // exported (id=0x503c0105) NV_STATUS (*__thirdpartyp2pCtrlCmdRegisterPid__)(struct ThirdPartyP2P * /*this*/, NV503C_CTRL_REGISTER_PID_PARAMS *); // exported (id=0x503c0106) + + // Data members + NODE Node; + NvHandle hClient; + NvHandle hThirdPartyP2P; + CLI_THIRD_PARTY_P2P_TYPE type; + struct Subdevice *pSubdevice; + NvU32 peerIndex; + NvU32 flags; + NvU64 p2pToken; + CLI_THIRD_PARTY_P2P_PID_CLIENT_INFO pidClientList[256]; + CLI_THIRD_PARTY_P2P_VASPACE_INFO_MAP vaSpaceInfoMap; + THIRD_PARTY_P2P_DESTROY_CALLBACK *pDestroyCallback; + void *pData; + CLI_THIRD_PARTY_P2P_VIDMEM_INFO_MAP vidmemInfoMap; + struct P2PTokenShare *pTokenShare; + PNODE pAddressRangeTree; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__ThirdPartyP2P { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + NV_STATUS (*__thirdpartyp2pControl__)(struct ThirdPartyP2P * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__thirdpartyp2pMap__)(struct ThirdPartyP2P * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__thirdpartyp2pUnmap__)(struct ThirdPartyP2P * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -335,23 +372,6 @@ struct ThirdPartyP2P { NV_STATUS (*__thirdpartyp2pUnmapFrom__)(struct ThirdPartyP2P * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__thirdpartyp2pGetRefCount__)(struct ThirdPartyP2P * /*this*/); // virtual inherited (res) base (gpures) void (*__thirdpartyp2pAddAdditionalDependants__)(struct RsClient *, struct ThirdPartyP2P * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - NODE Node; - NvHandle hClient; - NvHandle hThirdPartyP2P; - CLI_THIRD_PARTY_P2P_TYPE type; - struct Subdevice *pSubdevice; - NvU32 peerIndex; - NvU32 flags; - NvU64 p2pToken; - CLI_THIRD_PARTY_P2P_PID_CLIENT_INFO pidClientList[256]; - CLI_THIRD_PARTY_P2P_VASPACE_INFO_MAP vaSpaceInfoMap; - THIRD_PARTY_P2P_DESTROY_CALLBACK *pDestroyCallback; - void *pData; - CLI_THIRD_PARTY_P2P_VIDMEM_INFO_MAP vidmemInfoMap; - struct P2PTokenShare *pTokenShare; - PNODE pAddressRangeTree; }; #ifndef __NVOC_CLASS_ThirdPartyP2P_TYPEDEF__ @@ -394,55 +414,55 @@ NV_STATUS __nvoc_objCreate_ThirdPartyP2P(ThirdPartyP2P**, Dynamic*, NvU32, struc #define thirdpartyp2pCtrlCmdUnregisterVidmem(pThirdPartyP2P, pUnregisterVidmemParams) thirdpartyp2pCtrlCmdUnregisterVidmem_DISPATCH(pThirdPartyP2P, pUnregisterVidmemParams) #define thirdpartyp2pCtrlCmdRegisterPid_FNPTR(pThirdPartyP2P) pThirdPartyP2P->__thirdpartyp2pCtrlCmdRegisterPid__ #define thirdpartyp2pCtrlCmdRegisterPid(pThirdPartyP2P, pParams) thirdpartyp2pCtrlCmdRegisterPid_DISPATCH(pThirdPartyP2P, pParams) -#define thirdpartyp2pControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define thirdpartyp2pControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define thirdpartyp2pControl(pGpuResource, pCallContext, pParams) thirdpartyp2pControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define thirdpartyp2pMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define thirdpartyp2pMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define thirdpartyp2pMap(pGpuResource, pCallContext, pParams, pCpuMapping) thirdpartyp2pMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define thirdpartyp2pUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define thirdpartyp2pUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define thirdpartyp2pUnmap(pGpuResource, pCallContext, pCpuMapping) thirdpartyp2pUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define thirdpartyp2pShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define thirdpartyp2pShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define thirdpartyp2pShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) thirdpartyp2pShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define thirdpartyp2pGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define thirdpartyp2pGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define thirdpartyp2pGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) thirdpartyp2pGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define thirdpartyp2pGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define thirdpartyp2pGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define thirdpartyp2pGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) thirdpartyp2pGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define thirdpartyp2pInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define thirdpartyp2pInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define thirdpartyp2pInternalControlForward(pGpuResource, command, pParams, size) thirdpartyp2pInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define thirdpartyp2pGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define thirdpartyp2pGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define thirdpartyp2pGetInternalObjectHandle(pGpuResource) thirdpartyp2pGetInternalObjectHandle_DISPATCH(pGpuResource) -#define thirdpartyp2pAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define thirdpartyp2pAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define thirdpartyp2pAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) thirdpartyp2pAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define thirdpartyp2pGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define thirdpartyp2pGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define thirdpartyp2pGetMemInterMapParams(pRmResource, pParams) thirdpartyp2pGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define thirdpartyp2pCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define thirdpartyp2pCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define thirdpartyp2pCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) thirdpartyp2pCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define thirdpartyp2pGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define thirdpartyp2pGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define thirdpartyp2pGetMemoryMappingDescriptor(pRmResource, ppMemDesc) thirdpartyp2pGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define thirdpartyp2pControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define thirdpartyp2pControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define thirdpartyp2pControlSerialization_Prologue(pResource, pCallContext, pParams) thirdpartyp2pControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define thirdpartyp2pControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define thirdpartyp2pControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define thirdpartyp2pControlSerialization_Epilogue(pResource, pCallContext, pParams) thirdpartyp2pControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define thirdpartyp2pControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define thirdpartyp2pControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define thirdpartyp2pControl_Prologue(pResource, pCallContext, pParams) thirdpartyp2pControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define thirdpartyp2pControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define thirdpartyp2pControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define thirdpartyp2pControl_Epilogue(pResource, pCallContext, pParams) thirdpartyp2pControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define thirdpartyp2pCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define thirdpartyp2pCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define thirdpartyp2pCanCopy(pResource) thirdpartyp2pCanCopy_DISPATCH(pResource) -#define thirdpartyp2pIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define thirdpartyp2pIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define thirdpartyp2pIsDuplicate(pResource, hMemory, pDuplicate) thirdpartyp2pIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define thirdpartyp2pPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define thirdpartyp2pPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define thirdpartyp2pPreDestruct(pResource) thirdpartyp2pPreDestruct_DISPATCH(pResource) -#define thirdpartyp2pControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define thirdpartyp2pControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define thirdpartyp2pControlFilter(pResource, pCallContext, pParams) thirdpartyp2pControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define thirdpartyp2pIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define thirdpartyp2pIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define thirdpartyp2pIsPartialUnmapSupported(pResource) thirdpartyp2pIsPartialUnmapSupported_DISPATCH(pResource) -#define thirdpartyp2pMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define thirdpartyp2pMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define thirdpartyp2pMapTo(pResource, pParams) thirdpartyp2pMapTo_DISPATCH(pResource, pParams) -#define thirdpartyp2pUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define thirdpartyp2pUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define thirdpartyp2pUnmapFrom(pResource, pParams) thirdpartyp2pUnmapFrom_DISPATCH(pResource, pParams) -#define thirdpartyp2pGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define thirdpartyp2pGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define thirdpartyp2pGetRefCount(pResource) thirdpartyp2pGetRefCount_DISPATCH(pResource) -#define thirdpartyp2pAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define thirdpartyp2pAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define thirdpartyp2pAddAdditionalDependants(pClient, pResource, pReference) thirdpartyp2pAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions @@ -467,103 +487,103 @@ static inline NV_STATUS thirdpartyp2pCtrlCmdRegisterPid_DISPATCH(struct ThirdPar } static inline NV_STATUS thirdpartyp2pControl_DISPATCH(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__thirdpartyp2pControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__thirdpartyp2pControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS thirdpartyp2pMap_DISPATCH(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__thirdpartyp2pMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__thirdpartyp2pMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS thirdpartyp2pUnmap_DISPATCH(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__thirdpartyp2pUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__thirdpartyp2pUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool thirdpartyp2pShareCallback_DISPATCH(struct ThirdPartyP2P *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__thirdpartyp2pShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__thirdpartyp2pShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS thirdpartyp2pGetRegBaseOffsetAndSize_DISPATCH(struct ThirdPartyP2P *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__thirdpartyp2pGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__thirdpartyp2pGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS thirdpartyp2pGetMapAddrSpace_DISPATCH(struct ThirdPartyP2P *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__thirdpartyp2pGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__thirdpartyp2pGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS thirdpartyp2pInternalControlForward_DISPATCH(struct ThirdPartyP2P *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__thirdpartyp2pInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__thirdpartyp2pInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle thirdpartyp2pGetInternalObjectHandle_DISPATCH(struct ThirdPartyP2P *pGpuResource) { - return pGpuResource->__thirdpartyp2pGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__thirdpartyp2pGetInternalObjectHandle__(pGpuResource); } static inline NvBool thirdpartyp2pAccessCallback_DISPATCH(struct ThirdPartyP2P *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__thirdpartyp2pAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__thirdpartyp2pAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS thirdpartyp2pGetMemInterMapParams_DISPATCH(struct ThirdPartyP2P *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__thirdpartyp2pGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__thirdpartyp2pGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS thirdpartyp2pCheckMemInterUnmap_DISPATCH(struct ThirdPartyP2P *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__thirdpartyp2pCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__thirdpartyp2pCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS thirdpartyp2pGetMemoryMappingDescriptor_DISPATCH(struct ThirdPartyP2P *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__thirdpartyp2pGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__thirdpartyp2pGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS thirdpartyp2pControlSerialization_Prologue_DISPATCH(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__thirdpartyp2pControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__thirdpartyp2pControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void thirdpartyp2pControlSerialization_Epilogue_DISPATCH(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__thirdpartyp2pControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__thirdpartyp2pControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS thirdpartyp2pControl_Prologue_DISPATCH(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__thirdpartyp2pControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__thirdpartyp2pControl_Prologue__(pResource, pCallContext, pParams); } static inline void thirdpartyp2pControl_Epilogue_DISPATCH(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__thirdpartyp2pControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__thirdpartyp2pControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool thirdpartyp2pCanCopy_DISPATCH(struct ThirdPartyP2P *pResource) { - return pResource->__thirdpartyp2pCanCopy__(pResource); + return pResource->__nvoc_vtable->__thirdpartyp2pCanCopy__(pResource); } static inline NV_STATUS thirdpartyp2pIsDuplicate_DISPATCH(struct ThirdPartyP2P *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__thirdpartyp2pIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__thirdpartyp2pIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void thirdpartyp2pPreDestruct_DISPATCH(struct ThirdPartyP2P *pResource) { - pResource->__thirdpartyp2pPreDestruct__(pResource); + pResource->__nvoc_vtable->__thirdpartyp2pPreDestruct__(pResource); } static inline NV_STATUS thirdpartyp2pControlFilter_DISPATCH(struct ThirdPartyP2P *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__thirdpartyp2pControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__thirdpartyp2pControlFilter__(pResource, pCallContext, pParams); } static inline NvBool thirdpartyp2pIsPartialUnmapSupported_DISPATCH(struct ThirdPartyP2P *pResource) { - return pResource->__thirdpartyp2pIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__thirdpartyp2pIsPartialUnmapSupported__(pResource); } static inline NV_STATUS thirdpartyp2pMapTo_DISPATCH(struct ThirdPartyP2P *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__thirdpartyp2pMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__thirdpartyp2pMapTo__(pResource, pParams); } static inline NV_STATUS thirdpartyp2pUnmapFrom_DISPATCH(struct ThirdPartyP2P *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__thirdpartyp2pUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__thirdpartyp2pUnmapFrom__(pResource, pParams); } static inline NvU32 thirdpartyp2pGetRefCount_DISPATCH(struct ThirdPartyP2P *pResource) { - return pResource->__thirdpartyp2pGetRefCount__(pResource); + return pResource->__nvoc_vtable->__thirdpartyp2pGetRefCount__(pResource); } static inline void thirdpartyp2pAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ThirdPartyP2P *pResource, RsResourceRef *pReference) { - pResource->__thirdpartyp2pAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__thirdpartyp2pAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS thirdpartyp2pCtrlCmdRegisterVaSpace_IMPL(struct ThirdPartyP2P *pThirdPartyP2P, NV503C_CTRL_REGISTER_VA_SPACE_PARAMS *pRegisterVaSpaceParams); @@ -683,7 +703,7 @@ NV_STATUS CliAddThirdPartyP2PMappingInfo (struct ThirdPartyP2P*, NvHan NV_STATUS CliGetThirdPartyP2PMappingInfoFromKey (struct ThirdPartyP2P*, NvHandle, void *, PCLI_THIRD_PARTY_P2P_MAPPING_INFO *); // Register pid & client with a third-party P2P Info object -NV_STATUS CliAddThirdPartyP2PClientPid (NvHandle, NvHandle, NvU32, NvU32); +NV_STATUS CliAddThirdPartyP2PClientPid (struct ThirdPartyP2P*, NvU32, NvHandle); // Unregister pid & client from a third-party P2P Info object NV_STATUS CliDelThirdPartyP2PClientPid (struct RmClient*, NvHandle, NvU32, NvU32); diff --git a/src/nvidia/generated/g_timed_sema_nvoc.c b/src/nvidia/generated/g_timed_sema_nvoc.c index 2505c6c9a3..2c53a20e80 100644 --- a/src/nvidia/generated/g_timed_sema_nvoc.c +++ b/src/nvidia/generated/g_timed_sema_nvoc.c @@ -174,168 +174,278 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_TimedSem }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super^2 +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super^2 +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap(struct RmResource *pChannelDescendant, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_down_thunk_TimedSemaSwObject_chandesGetSwMethods(struct ChannelDescendant *pTimedSemSw, const METHOD **ppMethods, NvU32 *pNumMethods); // this + // 1 down-thunk(s) defined to bridge methods in TimedSemaSwObject from superclasses // tsemaGetSwMethods: virtual override (chandes) base (chandes) -static NV_STATUS __nvoc_down_thunk_TimedSemaSwObject_chandesGetSwMethods(struct ChannelDescendant *pTimedSemSw, const METHOD **ppMethods, NvU32 *pNumMethods) { +NV_STATUS __nvoc_down_thunk_TimedSemaSwObject_chandesGetSwMethods(struct ChannelDescendant *pTimedSemSw, const METHOD **ppMethods, NvU32 *pNumMethods) { return tsemaGetSwMethods((struct TimedSemaSwObject *)(((unsigned char *) pTimedSemSw) - __nvoc_rtti_TimedSemaSwObject_ChannelDescendant.offset), ppMethods, pNumMethods); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^3 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^3 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^3 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super^2 +NV_STATUS __nvoc_up_thunk_GpuResource_chandesControl(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesMap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesUnmap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_GpuResource_chandesShareCallback(struct ChannelDescendant *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize(struct ChannelDescendant *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesInternalControlForward(struct ChannelDescendant *pGpuResource, NvU32 command, void *pParams, NvU32 size); // super +NvHandle __nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle(struct ChannelDescendant *pGpuResource); // super +NvBool __nvoc_up_thunk_RmResource_chandesAccessCallback(struct ChannelDescendant *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemInterMapParams(struct ChannelDescendant *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor(struct ChannelDescendant *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControl_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControl_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesCanCopy(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesIsDuplicate(struct ChannelDescendant *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_chandesPreDestruct(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesControlFilter(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesMapTo(struct ChannelDescendant *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesUnmapFrom(struct ChannelDescendant *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_chandesGetRefCount(struct ChannelDescendant *pResource); // super +void __nvoc_up_thunk_RsResource_chandesAddAdditionalDependants(struct RsClient *pClient, struct ChannelDescendant *pResource, RsResourceRef *pReference); // super +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_chandesGetNotificationListPtr(struct ChannelDescendant *pNotifier); // super +struct NotifShare * __nvoc_up_thunk_Notifier_chandesGetNotificationShare(struct ChannelDescendant *pNotifier); // super +void __nvoc_up_thunk_Notifier_chandesSetNotificationShare(struct ChannelDescendant *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesUnregisterEvent(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NvBool __nvoc_up_thunk_ChannelDescendant_tsemaIsSwMethodStalling(struct TimedSemaSwObject *pChannelDescendant, NvU32 hHandle); // this +NV_STATUS __nvoc_up_thunk_ChannelDescendant_tsemaCheckMemInterUnmap(struct TimedSemaSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_GpuResource_tsemaControl(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_tsemaMap(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_tsemaUnmap(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_tsemaShareCallback(struct TimedSemaSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_tsemaGetRegBaseOffsetAndSize(struct TimedSemaSwObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_tsemaGetMapAddrSpace(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_tsemaInternalControlForward(struct TimedSemaSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_tsemaGetInternalObjectHandle(struct TimedSemaSwObject *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_tsemaAccessCallback(struct TimedSemaSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_tsemaGetMemInterMapParams(struct TimedSemaSwObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_tsemaGetMemoryMappingDescriptor(struct TimedSemaSwObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_tsemaControlSerialization_Prologue(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_tsemaControlSerialization_Epilogue(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_tsemaControl_Prologue(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_tsemaControl_Epilogue(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_tsemaCanCopy(struct TimedSemaSwObject *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_tsemaIsDuplicate(struct TimedSemaSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_tsemaPreDestruct(struct TimedSemaSwObject *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_tsemaControlFilter(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_tsemaIsPartialUnmapSupported(struct TimedSemaSwObject *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_tsemaMapTo(struct TimedSemaSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_tsemaUnmapFrom(struct TimedSemaSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_tsemaGetRefCount(struct TimedSemaSwObject *pResource); // this +void __nvoc_up_thunk_RsResource_tsemaAddAdditionalDependants(struct RsClient *pClient, struct TimedSemaSwObject *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_tsemaGetNotificationListPtr(struct TimedSemaSwObject *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_tsemaGetNotificationShare(struct TimedSemaSwObject *pNotifier); // this +void __nvoc_up_thunk_Notifier_tsemaSetNotificationShare(struct TimedSemaSwObject *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_tsemaUnregisterEvent(struct TimedSemaSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_tsemaGetOrAllocNotifShare(struct TimedSemaSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 31 up-thunk(s) defined to bridge methods in TimedSemaSwObject to superclasses // tsemaIsSwMethodStalling: virtual inherited (chandes) base (chandes) -static NvBool __nvoc_up_thunk_ChannelDescendant_tsemaIsSwMethodStalling(struct TimedSemaSwObject *pChannelDescendant, NvU32 hHandle) { +NvBool __nvoc_up_thunk_ChannelDescendant_tsemaIsSwMethodStalling(struct TimedSemaSwObject *pChannelDescendant, NvU32 hHandle) { return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_TimedSemaSwObject_ChannelDescendant.offset), hHandle); } // tsemaCheckMemInterUnmap: virtual inherited (chandes) base (chandes) -static NV_STATUS __nvoc_up_thunk_ChannelDescendant_tsemaCheckMemInterUnmap(struct TimedSemaSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_ChannelDescendant_tsemaCheckMemInterUnmap(struct TimedSemaSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_TimedSemaSwObject_ChannelDescendant.offset), bSubdeviceHandleProvided); } // tsemaControl: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_tsemaControl(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_tsemaControl(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset), pCallContext, pParams); } // tsemaMap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_tsemaMap(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_tsemaMap(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // tsemaUnmap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_tsemaUnmap(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_tsemaUnmap(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset), pCallContext, pCpuMapping); } // tsemaShareCallback: virtual inherited (gpures) base (chandes) -static NvBool __nvoc_up_thunk_GpuResource_tsemaShareCallback(struct TimedSemaSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_tsemaShareCallback(struct TimedSemaSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // tsemaGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_tsemaGetRegBaseOffsetAndSize(struct TimedSemaSwObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_tsemaGetRegBaseOffsetAndSize(struct TimedSemaSwObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset), pGpu, pOffset, pSize); } // tsemaGetMapAddrSpace: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_tsemaGetMapAddrSpace(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_tsemaGetMapAddrSpace(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // tsemaInternalControlForward: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_tsemaInternalControlForward(struct TimedSemaSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_tsemaInternalControlForward(struct TimedSemaSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset), command, pParams, size); } // tsemaGetInternalObjectHandle: virtual inherited (gpures) base (chandes) -static NvHandle __nvoc_up_thunk_GpuResource_tsemaGetInternalObjectHandle(struct TimedSemaSwObject *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_tsemaGetInternalObjectHandle(struct TimedSemaSwObject *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimedSemaSwObject_GpuResource.offset)); } // tsemaAccessCallback: virtual inherited (rmres) base (chandes) -static NvBool __nvoc_up_thunk_RmResource_tsemaAccessCallback(struct TimedSemaSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_tsemaAccessCallback(struct TimedSemaSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // tsemaGetMemInterMapParams: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_tsemaGetMemInterMapParams(struct TimedSemaSwObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_tsemaGetMemInterMapParams(struct TimedSemaSwObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_TimedSemaSwObject_RmResource.offset), pParams); } // tsemaGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_tsemaGetMemoryMappingDescriptor(struct TimedSemaSwObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_tsemaGetMemoryMappingDescriptor(struct TimedSemaSwObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_TimedSemaSwObject_RmResource.offset), ppMemDesc); } // tsemaControlSerialization_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_tsemaControlSerialization_Prologue(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_tsemaControlSerialization_Prologue(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RmResource.offset), pCallContext, pParams); } // tsemaControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_tsemaControlSerialization_Epilogue(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_tsemaControlSerialization_Epilogue(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RmResource.offset), pCallContext, pParams); } // tsemaControl_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_tsemaControl_Prologue(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_tsemaControl_Prologue(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RmResource.offset), pCallContext, pParams); } // tsemaControl_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_tsemaControl_Epilogue(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_tsemaControl_Epilogue(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RmResource.offset), pCallContext, pParams); } // tsemaCanCopy: virtual inherited (res) base (chandes) -static NvBool __nvoc_up_thunk_RsResource_tsemaCanCopy(struct TimedSemaSwObject *pResource) { +NvBool __nvoc_up_thunk_RsResource_tsemaCanCopy(struct TimedSemaSwObject *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset)); } // tsemaIsDuplicate: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_tsemaIsDuplicate(struct TimedSemaSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_tsemaIsDuplicate(struct TimedSemaSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset), hMemory, pDuplicate); } // tsemaPreDestruct: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_tsemaPreDestruct(struct TimedSemaSwObject *pResource) { +void __nvoc_up_thunk_RsResource_tsemaPreDestruct(struct TimedSemaSwObject *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset)); } // tsemaControlFilter: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_tsemaControlFilter(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_tsemaControlFilter(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset), pCallContext, pParams); } // tsemaIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body -static NvBool __nvoc_up_thunk_RsResource_tsemaIsPartialUnmapSupported(struct TimedSemaSwObject *pResource) { +NvBool __nvoc_up_thunk_RsResource_tsemaIsPartialUnmapSupported(struct TimedSemaSwObject *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset)); } // tsemaMapTo: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_tsemaMapTo(struct TimedSemaSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_tsemaMapTo(struct TimedSemaSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset), pParams); } // tsemaUnmapFrom: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_tsemaUnmapFrom(struct TimedSemaSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_tsemaUnmapFrom(struct TimedSemaSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset), pParams); } // tsemaGetRefCount: virtual inherited (res) base (chandes) -static NvU32 __nvoc_up_thunk_RsResource_tsemaGetRefCount(struct TimedSemaSwObject *pResource) { +NvU32 __nvoc_up_thunk_RsResource_tsemaGetRefCount(struct TimedSemaSwObject *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset)); } // tsemaAddAdditionalDependants: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_tsemaAddAdditionalDependants(struct RsClient *pClient, struct TimedSemaSwObject *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_tsemaAddAdditionalDependants(struct RsClient *pClient, struct TimedSemaSwObject *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimedSemaSwObject_RsResource.offset), pReference); } // tsemaGetNotificationListPtr: virtual inherited (notify) base (chandes) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_tsemaGetNotificationListPtr(struct TimedSemaSwObject *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_tsemaGetNotificationListPtr(struct TimedSemaSwObject *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_TimedSemaSwObject_Notifier.offset)); } // tsemaGetNotificationShare: virtual inherited (notify) base (chandes) -static struct NotifShare * __nvoc_up_thunk_Notifier_tsemaGetNotificationShare(struct TimedSemaSwObject *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_tsemaGetNotificationShare(struct TimedSemaSwObject *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_TimedSemaSwObject_Notifier.offset)); } // tsemaSetNotificationShare: virtual inherited (notify) base (chandes) -static void __nvoc_up_thunk_Notifier_tsemaSetNotificationShare(struct TimedSemaSwObject *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_tsemaSetNotificationShare(struct TimedSemaSwObject *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_TimedSemaSwObject_Notifier.offset), pNotifShare); } // tsemaUnregisterEvent: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_tsemaUnregisterEvent(struct TimedSemaSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_tsemaUnregisterEvent(struct TimedSemaSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_TimedSemaSwObject_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // tsemaGetOrAllocNotifShare: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_tsemaGetOrAllocNotifShare(struct TimedSemaSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_tsemaGetOrAllocNotifShare(struct TimedSemaSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_TimedSemaSwObject_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -380,10 +490,6 @@ NV_STATUS __nvoc_ctor_TimedSemaSwObject(TimedSemaSwObject *pThis, RmHalspecOwner static void __nvoc_init_funcTable_TimedSemaSwObject_1(TimedSemaSwObject *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // tsemaGetSwMethods -- virtual override (chandes) base (chandes) - pThis->__tsemaGetSwMethods__ = &tsemaGetSwMethods_IMPL; - pThis->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ = &__nvoc_down_thunk_TimedSemaSwObject_chandesGetSwMethods; - // tsemaCtrlCmdFlush -- exported (id=0x90740101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__tsemaCtrlCmdFlush__ = &tsemaCtrlCmdFlush_IMPL; @@ -398,106 +504,170 @@ static void __nvoc_init_funcTable_TimedSemaSwObject_1(TimedSemaSwObject *pThis) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__tsemaCtrlCmdRelease__ = &tsemaCtrlCmdRelease_IMPL; #endif - - // tsemaIsSwMethodStalling -- virtual inherited (chandes) base (chandes) - pThis->__tsemaIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_tsemaIsSwMethodStalling; - - // tsemaCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) - pThis->__tsemaCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_tsemaCheckMemInterUnmap; - - // tsemaControl -- virtual inherited (gpures) base (chandes) - pThis->__tsemaControl__ = &__nvoc_up_thunk_GpuResource_tsemaControl; - - // tsemaMap -- virtual inherited (gpures) base (chandes) - pThis->__tsemaMap__ = &__nvoc_up_thunk_GpuResource_tsemaMap; - - // tsemaUnmap -- virtual inherited (gpures) base (chandes) - pThis->__tsemaUnmap__ = &__nvoc_up_thunk_GpuResource_tsemaUnmap; - - // tsemaShareCallback -- virtual inherited (gpures) base (chandes) - pThis->__tsemaShareCallback__ = &__nvoc_up_thunk_GpuResource_tsemaShareCallback; - - // tsemaGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) - pThis->__tsemaGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_tsemaGetRegBaseOffsetAndSize; - - // tsemaGetMapAddrSpace -- virtual inherited (gpures) base (chandes) - pThis->__tsemaGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_tsemaGetMapAddrSpace; - - // tsemaInternalControlForward -- virtual inherited (gpures) base (chandes) - pThis->__tsemaInternalControlForward__ = &__nvoc_up_thunk_GpuResource_tsemaInternalControlForward; - - // tsemaGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) - pThis->__tsemaGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_tsemaGetInternalObjectHandle; - - // tsemaAccessCallback -- virtual inherited (rmres) base (chandes) - pThis->__tsemaAccessCallback__ = &__nvoc_up_thunk_RmResource_tsemaAccessCallback; - - // tsemaGetMemInterMapParams -- virtual inherited (rmres) base (chandes) - pThis->__tsemaGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_tsemaGetMemInterMapParams; - - // tsemaGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) - pThis->__tsemaGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_tsemaGetMemoryMappingDescriptor; - - // tsemaControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__tsemaControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_tsemaControlSerialization_Prologue; - - // tsemaControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__tsemaControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_tsemaControlSerialization_Epilogue; - - // tsemaControl_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__tsemaControl_Prologue__ = &__nvoc_up_thunk_RmResource_tsemaControl_Prologue; - - // tsemaControl_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__tsemaControl_Epilogue__ = &__nvoc_up_thunk_RmResource_tsemaControl_Epilogue; - - // tsemaCanCopy -- virtual inherited (res) base (chandes) - pThis->__tsemaCanCopy__ = &__nvoc_up_thunk_RsResource_tsemaCanCopy; - - // tsemaIsDuplicate -- virtual inherited (res) base (chandes) - pThis->__tsemaIsDuplicate__ = &__nvoc_up_thunk_RsResource_tsemaIsDuplicate; - - // tsemaPreDestruct -- virtual inherited (res) base (chandes) - pThis->__tsemaPreDestruct__ = &__nvoc_up_thunk_RsResource_tsemaPreDestruct; - - // tsemaControlFilter -- virtual inherited (res) base (chandes) - pThis->__tsemaControlFilter__ = &__nvoc_up_thunk_RsResource_tsemaControlFilter; - - // tsemaIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body - pThis->__tsemaIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_tsemaIsPartialUnmapSupported; - - // tsemaMapTo -- virtual inherited (res) base (chandes) - pThis->__tsemaMapTo__ = &__nvoc_up_thunk_RsResource_tsemaMapTo; - - // tsemaUnmapFrom -- virtual inherited (res) base (chandes) - pThis->__tsemaUnmapFrom__ = &__nvoc_up_thunk_RsResource_tsemaUnmapFrom; - - // tsemaGetRefCount -- virtual inherited (res) base (chandes) - pThis->__tsemaGetRefCount__ = &__nvoc_up_thunk_RsResource_tsemaGetRefCount; - - // tsemaAddAdditionalDependants -- virtual inherited (res) base (chandes) - pThis->__tsemaAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_tsemaAddAdditionalDependants; - - // tsemaGetNotificationListPtr -- virtual inherited (notify) base (chandes) - pThis->__tsemaGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_tsemaGetNotificationListPtr; - - // tsemaGetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__tsemaGetNotificationShare__ = &__nvoc_up_thunk_Notifier_tsemaGetNotificationShare; - - // tsemaSetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__tsemaSetNotificationShare__ = &__nvoc_up_thunk_Notifier_tsemaSetNotificationShare; - - // tsemaUnregisterEvent -- virtual inherited (notify) base (chandes) - pThis->__tsemaUnregisterEvent__ = &__nvoc_up_thunk_Notifier_tsemaUnregisterEvent; - - // tsemaGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) - pThis->__tsemaGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_tsemaGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_TimedSemaSwObject_1 with approximately 36 basic block(s). +} // End __nvoc_init_funcTable_TimedSemaSwObject_1 with approximately 3 basic block(s). // Initialize vtable(s) for 35 virtual method(s). void __nvoc_init_funcTable_TimedSemaSwObject(TimedSemaSwObject *pThis) { - // Initialize vtable(s) with 35 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__TimedSemaSwObject vtable = { + .__tsemaGetSwMethods__ = &tsemaGetSwMethods_IMPL, // virtual override (chandes) base (chandes) + .ChannelDescendant.__chandesGetSwMethods__ = &__nvoc_down_thunk_TimedSemaSwObject_chandesGetSwMethods, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif + .__tsemaIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_tsemaIsSwMethodStalling, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesIsSwMethodStalling__ = &chandesIsSwMethodStalling_IMPL, // virtual + .__tsemaCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_tsemaCheckMemInterUnmap, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesCheckMemInterUnmap__ = &chandesCheckMemInterUnmap_IMPL, // virtual override (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap, // virtual + .__tsemaControl__ = &__nvoc_up_thunk_GpuResource_tsemaControl, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesControl__ = &__nvoc_up_thunk_GpuResource_chandesControl, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__tsemaMap__ = &__nvoc_up_thunk_GpuResource_tsemaMap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesMap__ = &__nvoc_up_thunk_GpuResource_chandesMap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__tsemaUnmap__ = &__nvoc_up_thunk_GpuResource_tsemaUnmap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesUnmap__ = &__nvoc_up_thunk_GpuResource_chandesUnmap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__tsemaShareCallback__ = &__nvoc_up_thunk_GpuResource_tsemaShareCallback, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesShareCallback__ = &__nvoc_up_thunk_GpuResource_chandesShareCallback, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__tsemaGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_tsemaGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__tsemaGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_tsemaGetMapAddrSpace, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__tsemaInternalControlForward__ = &__nvoc_up_thunk_GpuResource_tsemaInternalControlForward, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesInternalControlForward__ = &__nvoc_up_thunk_GpuResource_chandesInternalControlForward, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__tsemaGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_tsemaGetInternalObjectHandle, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__tsemaAccessCallback__ = &__nvoc_up_thunk_RmResource_tsemaAccessCallback, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesAccessCallback__ = &__nvoc_up_thunk_RmResource_chandesAccessCallback, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__tsemaGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_tsemaGetMemInterMapParams, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_chandesGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__tsemaGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_tsemaGetMemoryMappingDescriptor, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__tsemaControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_tsemaControlSerialization_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__tsemaControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_tsemaControlSerialization_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__tsemaControl_Prologue__ = &__nvoc_up_thunk_RmResource_tsemaControl_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControl_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__tsemaControl_Epilogue__ = &__nvoc_up_thunk_RmResource_tsemaControl_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControl_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__tsemaCanCopy__ = &__nvoc_up_thunk_RsResource_tsemaCanCopy, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesCanCopy__ = &__nvoc_up_thunk_RsResource_chandesCanCopy, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__tsemaIsDuplicate__ = &__nvoc_up_thunk_RsResource_tsemaIsDuplicate, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesIsDuplicate__ = &__nvoc_up_thunk_RsResource_chandesIsDuplicate, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__tsemaPreDestruct__ = &__nvoc_up_thunk_RsResource_tsemaPreDestruct, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesPreDestruct__ = &__nvoc_up_thunk_RsResource_chandesPreDestruct, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__tsemaControlFilter__ = &__nvoc_up_thunk_RsResource_tsemaControlFilter, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesControlFilter__ = &__nvoc_up_thunk_RsResource_chandesControlFilter, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__tsemaIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_tsemaIsPartialUnmapSupported, // inline virtual inherited (res) base (chandes) body + .ChannelDescendant.__chandesIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .ChannelDescendant.GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .ChannelDescendant.GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__tsemaMapTo__ = &__nvoc_up_thunk_RsResource_tsemaMapTo, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesMapTo__ = &__nvoc_up_thunk_RsResource_chandesMapTo, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__tsemaUnmapFrom__ = &__nvoc_up_thunk_RsResource_tsemaUnmapFrom, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesUnmapFrom__ = &__nvoc_up_thunk_RsResource_chandesUnmapFrom, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__tsemaGetRefCount__ = &__nvoc_up_thunk_RsResource_tsemaGetRefCount, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesGetRefCount__ = &__nvoc_up_thunk_RsResource_chandesGetRefCount, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__tsemaAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_tsemaAddAdditionalDependants, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_chandesAddAdditionalDependants, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__tsemaGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_tsemaGetNotificationListPtr, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationListPtr, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__tsemaGetNotificationShare__ = &__nvoc_up_thunk_Notifier_tsemaGetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__tsemaSetNotificationShare__ = &__nvoc_up_thunk_Notifier_tsemaSetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesSetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesSetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__tsemaUnregisterEvent__ = &__nvoc_up_thunk_Notifier_tsemaUnregisterEvent, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesUnregisterEvent__ = &__nvoc_up_thunk_Notifier_chandesUnregisterEvent, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__tsemaGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_tsemaGetOrAllocNotifShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource.RsResource; // (res) super^4 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource; // (rmres) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource; // (gpures) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier.INotifier; // (inotify) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier; // (notify) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_vtable = &vtable.ChannelDescendant; // (chandes) super + pThis->__nvoc_vtable = &vtable; // (tsema) this + + // Initialize vtable(s) with 3 per-object function pointer(s). __nvoc_init_funcTable_TimedSemaSwObject_1(pThis); } diff --git a/src/nvidia/generated/g_timed_sema_nvoc.h b/src/nvidia/generated/g_timed_sema_nvoc.h index 68928b492b..3d332973e1 100644 --- a/src/nvidia/generated/g_timed_sema_nvoc.h +++ b/src/nvidia/generated/g_timed_sema_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -72,10 +72,15 @@ MAKE_LIST(GF100_TIMED_SEM_ENTRY_LIST, GF100_TIMED_SEM_ENTRY); #endif +// Metadata including vtable +struct NVOC_VTABLE__TimedSemaSwObject; + + struct TimedSemaSwObject { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__TimedSemaSwObject *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; @@ -91,11 +96,34 @@ struct TimedSemaSwObject { struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super struct TimedSemaSwObject *__nvoc_pbase_TimedSemaSwObject; // tsema - // Vtable with 35 per-object function pointers - NV_STATUS (*__tsemaGetSwMethods__)(struct TimedSemaSwObject * /*this*/, const METHOD **, NvU32 *); // virtual override (chandes) base (chandes) + // Vtable with 3 per-object function pointers NV_STATUS (*__tsemaCtrlCmdFlush__)(struct TimedSemaSwObject * /*this*/, NV9074_CTRL_CMD_FLUSH_PARAMS *); // exported (id=0x90740101) NV_STATUS (*__tsemaCtrlCmdGetTime__)(struct TimedSemaSwObject * /*this*/, NV9074_CTRL_CMD_GET_TIME_PARAMS *); // exported (id=0x90740102) NV_STATUS (*__tsemaCtrlCmdRelease__)(struct TimedSemaSwObject * /*this*/, NV9074_CTRL_CMD_RELEASE_PARAMS *); // exported (id=0x90740103) + + // Data members + NvU32 NotifierHi; + NvU32 NotifierLo; + NvU32 SemaphoreHi; + NvU32 SemaphoreLo; + NvU32 WaitTimestampHi; + NvU32 WaitTimestampLo; + NvU32 ReleaseValue; + NvU32 Flags; + NvU64 NotifierGPUVA; + NvU64 SemaphoreGPUVA; + NvU64 WaitTimestamp; + NvU64 FlushLimitTimestamp; + struct TMR_EVENT *pTmrEvent; + GF100_TIMED_SEM_ENTRY_LIST entryList; +}; + + +// Metadata including vtable with 32 function pointers plus superclass metadata +struct NVOC_VTABLE__TimedSemaSwObject { + const struct NVOC_VTABLE__ChannelDescendant ChannelDescendant; // (chandes) 32 function pointers + + NV_STATUS (*__tsemaGetSwMethods__)(struct TimedSemaSwObject * /*this*/, const METHOD **, NvU32 *); // virtual override (chandes) base (chandes) NvBool (*__tsemaIsSwMethodStalling__)(struct TimedSemaSwObject * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) NV_STATUS (*__tsemaCheckMemInterUnmap__)(struct TimedSemaSwObject * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) NV_STATUS (*__tsemaControl__)(struct TimedSemaSwObject * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (chandes) @@ -127,22 +155,6 @@ struct TimedSemaSwObject { void (*__tsemaSetNotificationShare__)(struct TimedSemaSwObject * /*this*/, struct NotifShare *); // virtual inherited (notify) base (chandes) NV_STATUS (*__tsemaUnregisterEvent__)(struct TimedSemaSwObject * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (chandes) NV_STATUS (*__tsemaGetOrAllocNotifShare__)(struct TimedSemaSwObject * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (chandes) - - // Data members - NvU32 NotifierHi; - NvU32 NotifierLo; - NvU32 SemaphoreHi; - NvU32 SemaphoreLo; - NvU32 WaitTimestampHi; - NvU32 WaitTimestampLo; - NvU32 ReleaseValue; - NvU32 Flags; - NvU64 NotifierGPUVA; - NvU64 SemaphoreGPUVA; - NvU64 WaitTimestamp; - NvU64 FlushLimitTimestamp; - struct TMR_EVENT *pTmrEvent; - GF100_TIMED_SEM_ENTRY_LIST entryList; }; #ifndef __NVOC_CLASS_TimedSemaSwObject_TYPEDEF__ @@ -175,7 +187,7 @@ NV_STATUS __nvoc_objCreate_TimedSemaSwObject(TimedSemaSwObject**, Dynamic*, NvU3 // Wrapper macros -#define tsemaGetSwMethods_FNPTR(pTimedSemSw) pTimedSemSw->__tsemaGetSwMethods__ +#define tsemaGetSwMethods_FNPTR(pTimedSemSw) pTimedSemSw->__nvoc_vtable->__tsemaGetSwMethods__ #define tsemaGetSwMethods(pTimedSemSw, ppMethods, pNumMethods) tsemaGetSwMethods_DISPATCH(pTimedSemSw, ppMethods, pNumMethods) #define tsemaCtrlCmdFlush_FNPTR(pTimedSemaSwObject) pTimedSemaSwObject->__tsemaCtrlCmdFlush__ #define tsemaCtrlCmdFlush(pTimedSemaSwObject, pFlushParams) tsemaCtrlCmdFlush_DISPATCH(pTimedSemaSwObject, pFlushParams) @@ -183,72 +195,72 @@ NV_STATUS __nvoc_objCreate_TimedSemaSwObject(TimedSemaSwObject**, Dynamic*, NvU3 #define tsemaCtrlCmdGetTime(pTimedSemaSwObject, pGetTimeParams) tsemaCtrlCmdGetTime_DISPATCH(pTimedSemaSwObject, pGetTimeParams) #define tsemaCtrlCmdRelease_FNPTR(pTimedSemaSwObject) pTimedSemaSwObject->__tsemaCtrlCmdRelease__ #define tsemaCtrlCmdRelease(pTimedSemaSwObject, pReleaseParams) tsemaCtrlCmdRelease_DISPATCH(pTimedSemaSwObject, pReleaseParams) -#define tsemaIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ +#define tsemaIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesIsSwMethodStalling__ #define tsemaIsSwMethodStalling(pChannelDescendant, hHandle) tsemaIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define tsemaCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ +#define tsemaCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesCheckMemInterUnmap__ #define tsemaCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) tsemaCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) -#define tsemaControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define tsemaControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define tsemaControl(pGpuResource, pCallContext, pParams) tsemaControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define tsemaMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define tsemaMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define tsemaMap(pGpuResource, pCallContext, pParams, pCpuMapping) tsemaMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define tsemaUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define tsemaUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define tsemaUnmap(pGpuResource, pCallContext, pCpuMapping) tsemaUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define tsemaShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ +#define tsemaShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define tsemaShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) tsemaShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define tsemaGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define tsemaGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define tsemaGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) tsemaGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define tsemaGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define tsemaGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define tsemaGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) tsemaGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define tsemaInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define tsemaInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define tsemaInternalControlForward(pGpuResource, command, pParams, size) tsemaInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define tsemaGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define tsemaGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define tsemaGetInternalObjectHandle(pGpuResource) tsemaGetInternalObjectHandle_DISPATCH(pGpuResource) -#define tsemaAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define tsemaAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define tsemaAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) tsemaAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define tsemaGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define tsemaGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define tsemaGetMemInterMapParams(pRmResource, pParams) tsemaGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define tsemaGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define tsemaGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define tsemaGetMemoryMappingDescriptor(pRmResource, ppMemDesc) tsemaGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define tsemaControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define tsemaControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define tsemaControlSerialization_Prologue(pResource, pCallContext, pParams) tsemaControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define tsemaControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define tsemaControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define tsemaControlSerialization_Epilogue(pResource, pCallContext, pParams) tsemaControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define tsemaControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define tsemaControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define tsemaControl_Prologue(pResource, pCallContext, pParams) tsemaControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define tsemaControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define tsemaControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define tsemaControl_Epilogue(pResource, pCallContext, pParams) tsemaControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define tsemaCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define tsemaCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define tsemaCanCopy(pResource) tsemaCanCopy_DISPATCH(pResource) -#define tsemaIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define tsemaIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define tsemaIsDuplicate(pResource, hMemory, pDuplicate) tsemaIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define tsemaPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define tsemaPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define tsemaPreDestruct(pResource) tsemaPreDestruct_DISPATCH(pResource) -#define tsemaControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define tsemaControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define tsemaControlFilter(pResource, pCallContext, pParams) tsemaControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define tsemaIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define tsemaIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define tsemaIsPartialUnmapSupported(pResource) tsemaIsPartialUnmapSupported_DISPATCH(pResource) -#define tsemaMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define tsemaMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define tsemaMapTo(pResource, pParams) tsemaMapTo_DISPATCH(pResource, pParams) -#define tsemaUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define tsemaUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define tsemaUnmapFrom(pResource, pParams) tsemaUnmapFrom_DISPATCH(pResource, pParams) -#define tsemaGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define tsemaGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define tsemaGetRefCount(pResource) tsemaGetRefCount_DISPATCH(pResource) -#define tsemaAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define tsemaAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define tsemaAddAdditionalDependants(pClient, pResource, pReference) tsemaAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define tsemaGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define tsemaGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define tsemaGetNotificationListPtr(pNotifier) tsemaGetNotificationListPtr_DISPATCH(pNotifier) -#define tsemaGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define tsemaGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define tsemaGetNotificationShare(pNotifier) tsemaGetNotificationShare_DISPATCH(pNotifier) -#define tsemaSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define tsemaSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define tsemaSetNotificationShare(pNotifier, pNotifShare) tsemaSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define tsemaUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define tsemaUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define tsemaUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) tsemaUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define tsemaGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define tsemaGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define tsemaGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) tsemaGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS tsemaGetSwMethods_DISPATCH(struct TimedSemaSwObject *pTimedSemSw, const METHOD **ppMethods, NvU32 *pNumMethods) { - return pTimedSemSw->__tsemaGetSwMethods__(pTimedSemSw, ppMethods, pNumMethods); + return pTimedSemSw->__nvoc_vtable->__tsemaGetSwMethods__(pTimedSemSw, ppMethods, pNumMethods); } static inline NV_STATUS tsemaCtrlCmdFlush_DISPATCH(struct TimedSemaSwObject *pTimedSemaSwObject, NV9074_CTRL_CMD_FLUSH_PARAMS *pFlushParams) { @@ -264,127 +276,127 @@ static inline NV_STATUS tsemaCtrlCmdRelease_DISPATCH(struct TimedSemaSwObject *p } static inline NvBool tsemaIsSwMethodStalling_DISPATCH(struct TimedSemaSwObject *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__tsemaIsSwMethodStalling__(pChannelDescendant, hHandle); + return pChannelDescendant->__nvoc_vtable->__tsemaIsSwMethodStalling__(pChannelDescendant, hHandle); } static inline NV_STATUS tsemaCheckMemInterUnmap_DISPATCH(struct TimedSemaSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return pChannelDescendant->__tsemaCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); + return pChannelDescendant->__nvoc_vtable->__tsemaCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } static inline NV_STATUS tsemaControl_DISPATCH(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__tsemaControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__tsemaControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS tsemaMap_DISPATCH(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__tsemaMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__tsemaMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS tsemaUnmap_DISPATCH(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__tsemaUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__tsemaUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool tsemaShareCallback_DISPATCH(struct TimedSemaSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__tsemaShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__tsemaShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS tsemaGetRegBaseOffsetAndSize_DISPATCH(struct TimedSemaSwObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__tsemaGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__tsemaGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS tsemaGetMapAddrSpace_DISPATCH(struct TimedSemaSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__tsemaGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__tsemaGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS tsemaInternalControlForward_DISPATCH(struct TimedSemaSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__tsemaInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__tsemaInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle tsemaGetInternalObjectHandle_DISPATCH(struct TimedSemaSwObject *pGpuResource) { - return pGpuResource->__tsemaGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__tsemaGetInternalObjectHandle__(pGpuResource); } static inline NvBool tsemaAccessCallback_DISPATCH(struct TimedSemaSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__tsemaAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__tsemaAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS tsemaGetMemInterMapParams_DISPATCH(struct TimedSemaSwObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__tsemaGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__tsemaGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS tsemaGetMemoryMappingDescriptor_DISPATCH(struct TimedSemaSwObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__tsemaGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__tsemaGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS tsemaControlSerialization_Prologue_DISPATCH(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__tsemaControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__tsemaControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void tsemaControlSerialization_Epilogue_DISPATCH(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__tsemaControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__tsemaControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS tsemaControl_Prologue_DISPATCH(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__tsemaControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__tsemaControl_Prologue__(pResource, pCallContext, pParams); } static inline void tsemaControl_Epilogue_DISPATCH(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__tsemaControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__tsemaControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool tsemaCanCopy_DISPATCH(struct TimedSemaSwObject *pResource) { - return pResource->__tsemaCanCopy__(pResource); + return pResource->__nvoc_vtable->__tsemaCanCopy__(pResource); } static inline NV_STATUS tsemaIsDuplicate_DISPATCH(struct TimedSemaSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__tsemaIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__tsemaIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void tsemaPreDestruct_DISPATCH(struct TimedSemaSwObject *pResource) { - pResource->__tsemaPreDestruct__(pResource); + pResource->__nvoc_vtable->__tsemaPreDestruct__(pResource); } static inline NV_STATUS tsemaControlFilter_DISPATCH(struct TimedSemaSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__tsemaControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__tsemaControlFilter__(pResource, pCallContext, pParams); } static inline NvBool tsemaIsPartialUnmapSupported_DISPATCH(struct TimedSemaSwObject *pResource) { - return pResource->__tsemaIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__tsemaIsPartialUnmapSupported__(pResource); } static inline NV_STATUS tsemaMapTo_DISPATCH(struct TimedSemaSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__tsemaMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__tsemaMapTo__(pResource, pParams); } static inline NV_STATUS tsemaUnmapFrom_DISPATCH(struct TimedSemaSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__tsemaUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__tsemaUnmapFrom__(pResource, pParams); } static inline NvU32 tsemaGetRefCount_DISPATCH(struct TimedSemaSwObject *pResource) { - return pResource->__tsemaGetRefCount__(pResource); + return pResource->__nvoc_vtable->__tsemaGetRefCount__(pResource); } static inline void tsemaAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct TimedSemaSwObject *pResource, RsResourceRef *pReference) { - pResource->__tsemaAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__tsemaAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * tsemaGetNotificationListPtr_DISPATCH(struct TimedSemaSwObject *pNotifier) { - return pNotifier->__tsemaGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__tsemaGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * tsemaGetNotificationShare_DISPATCH(struct TimedSemaSwObject *pNotifier) { - return pNotifier->__tsemaGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__tsemaGetNotificationShare__(pNotifier); } static inline void tsemaSetNotificationShare_DISPATCH(struct TimedSemaSwObject *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__tsemaSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__tsemaSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS tsemaUnregisterEvent_DISPATCH(struct TimedSemaSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__tsemaUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__tsemaUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS tsemaGetOrAllocNotifShare_DISPATCH(struct TimedSemaSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__tsemaGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__tsemaGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS tsemaRelease_KERNEL(OBJGPU *pGpu, NvU64 semaphoreVA, NvU64 notifierVA, NvU32 hVASpace, NvU32 releasevalue, NvU32 completionStatus, struct Device *pDevice); diff --git a/src/nvidia/generated/g_tmr_nvoc.c b/src/nvidia/generated/g_tmr_nvoc.c index f286916782..f236657845 100644 --- a/src/nvidia/generated/g_tmr_nvoc.c +++ b/src/nvidia/generated/g_tmr_nvoc.c @@ -135,158 +135,236 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_TimerApi }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NV_STATUS __nvoc_down_thunk_TimerApi_gpuresGetRegBaseOffsetAndSize(struct GpuResource *pTimerApi, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this + // 1 down-thunk(s) defined to bridge methods in TimerApi from superclasses // tmrapiGetRegBaseOffsetAndSize: virtual override (gpures) base (gpures) -static NV_STATUS __nvoc_down_thunk_TimerApi_gpuresGetRegBaseOffsetAndSize(struct GpuResource *pTimerApi, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_down_thunk_TimerApi_gpuresGetRegBaseOffsetAndSize(struct GpuResource *pTimerApi, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return tmrapiGetRegBaseOffsetAndSize((struct TimerApi *)(((unsigned char *) pTimerApi) - __nvoc_rtti_TimerApi_GpuResource.offset), pGpu, pOffset, pSize); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_tmrapiControl(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_tmrapiMap(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_tmrapiUnmap(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_tmrapiShareCallback(struct TimerApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_tmrapiGetMapAddrSpace(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_tmrapiInternalControlForward(struct TimerApi *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_tmrapiGetInternalObjectHandle(struct TimerApi *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_tmrapiAccessCallback(struct TimerApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_tmrapiGetMemInterMapParams(struct TimerApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_tmrapiCheckMemInterUnmap(struct TimerApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_tmrapiGetMemoryMappingDescriptor(struct TimerApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_tmrapiControlSerialization_Prologue(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_tmrapiControlSerialization_Epilogue(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_tmrapiControl_Prologue(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_tmrapiControl_Epilogue(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_tmrapiCanCopy(struct TimerApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_tmrapiIsDuplicate(struct TimerApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_tmrapiPreDestruct(struct TimerApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_tmrapiControlFilter(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_tmrapiIsPartialUnmapSupported(struct TimerApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_tmrapiMapTo(struct TimerApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_tmrapiUnmapFrom(struct TimerApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_tmrapiGetRefCount(struct TimerApi *pResource); // this +void __nvoc_up_thunk_RsResource_tmrapiAddAdditionalDependants(struct RsClient *pClient, struct TimerApi *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_tmrapiGetNotificationListPtr(struct TimerApi *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_tmrapiGetNotificationShare(struct TimerApi *pNotifier); // this +void __nvoc_up_thunk_Notifier_tmrapiSetNotificationShare(struct TimerApi *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_tmrapiUnregisterEvent(struct TimerApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_tmrapiGetOrAllocNotifShare(struct TimerApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 29 up-thunk(s) defined to bridge methods in TimerApi to superclasses // tmrapiControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_tmrapiControl(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_tmrapiControl(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimerApi_GpuResource.offset), pCallContext, pParams); } // tmrapiMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_tmrapiMap(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_tmrapiMap(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimerApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // tmrapiUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_tmrapiUnmap(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_tmrapiUnmap(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimerApi_GpuResource.offset), pCallContext, pCpuMapping); } // tmrapiShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_tmrapiShareCallback(struct TimerApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_tmrapiShareCallback(struct TimerApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimerApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // tmrapiGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_tmrapiGetMapAddrSpace(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_tmrapiGetMapAddrSpace(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimerApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // tmrapiInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_tmrapiInternalControlForward(struct TimerApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_tmrapiInternalControlForward(struct TimerApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimerApi_GpuResource.offset), command, pParams, size); } // tmrapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_tmrapiGetInternalObjectHandle(struct TimerApi *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_tmrapiGetInternalObjectHandle(struct TimerApi *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_TimerApi_GpuResource.offset)); } // tmrapiAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_tmrapiAccessCallback(struct TimerApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_tmrapiAccessCallback(struct TimerApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // tmrapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_tmrapiGetMemInterMapParams(struct TimerApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_tmrapiGetMemInterMapParams(struct TimerApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_TimerApi_RmResource.offset), pParams); } // tmrapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_tmrapiCheckMemInterUnmap(struct TimerApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_tmrapiCheckMemInterUnmap(struct TimerApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_TimerApi_RmResource.offset), bSubdeviceHandleProvided); } // tmrapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_tmrapiGetMemoryMappingDescriptor(struct TimerApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_tmrapiGetMemoryMappingDescriptor(struct TimerApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_TimerApi_RmResource.offset), ppMemDesc); } // tmrapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_tmrapiControlSerialization_Prologue(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_tmrapiControlSerialization_Prologue(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RmResource.offset), pCallContext, pParams); } // tmrapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_tmrapiControlSerialization_Epilogue(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_tmrapiControlSerialization_Epilogue(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RmResource.offset), pCallContext, pParams); } // tmrapiControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_tmrapiControl_Prologue(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_tmrapiControl_Prologue(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RmResource.offset), pCallContext, pParams); } // tmrapiControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_tmrapiControl_Epilogue(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_tmrapiControl_Epilogue(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RmResource.offset), pCallContext, pParams); } // tmrapiCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_tmrapiCanCopy(struct TimerApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_tmrapiCanCopy(struct TimerApi *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RsResource.offset)); } // tmrapiIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_tmrapiIsDuplicate(struct TimerApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_tmrapiIsDuplicate(struct TimerApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RsResource.offset), hMemory, pDuplicate); } // tmrapiPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_tmrapiPreDestruct(struct TimerApi *pResource) { +void __nvoc_up_thunk_RsResource_tmrapiPreDestruct(struct TimerApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RsResource.offset)); } // tmrapiControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_tmrapiControlFilter(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_tmrapiControlFilter(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RsResource.offset), pCallContext, pParams); } // tmrapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_tmrapiIsPartialUnmapSupported(struct TimerApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_tmrapiIsPartialUnmapSupported(struct TimerApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RsResource.offset)); } // tmrapiMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_tmrapiMapTo(struct TimerApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_tmrapiMapTo(struct TimerApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RsResource.offset), pParams); } // tmrapiUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_tmrapiUnmapFrom(struct TimerApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_tmrapiUnmapFrom(struct TimerApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RsResource.offset), pParams); } // tmrapiGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_tmrapiGetRefCount(struct TimerApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_tmrapiGetRefCount(struct TimerApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RsResource.offset)); } // tmrapiAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_tmrapiAddAdditionalDependants(struct RsClient *pClient, struct TimerApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_tmrapiAddAdditionalDependants(struct RsClient *pClient, struct TimerApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_TimerApi_RsResource.offset), pReference); } // tmrapiGetNotificationListPtr: virtual inherited (notify) base (notify) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_tmrapiGetNotificationListPtr(struct TimerApi *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_tmrapiGetNotificationListPtr(struct TimerApi *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_TimerApi_Notifier.offset)); } // tmrapiGetNotificationShare: virtual inherited (notify) base (notify) -static struct NotifShare * __nvoc_up_thunk_Notifier_tmrapiGetNotificationShare(struct TimerApi *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_tmrapiGetNotificationShare(struct TimerApi *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_TimerApi_Notifier.offset)); } // tmrapiSetNotificationShare: virtual inherited (notify) base (notify) -static void __nvoc_up_thunk_Notifier_tmrapiSetNotificationShare(struct TimerApi *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_tmrapiSetNotificationShare(struct TimerApi *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_TimerApi_Notifier.offset), pNotifShare); } // tmrapiUnregisterEvent: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_tmrapiUnregisterEvent(struct TimerApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_tmrapiUnregisterEvent(struct TimerApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_TimerApi_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // tmrapiGetOrAllocNotifShare: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_tmrapiGetOrAllocNotifShare(struct TimerApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_tmrapiGetOrAllocNotifShare(struct TimerApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_TimerApi_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -338,108 +416,135 @@ NV_STATUS __nvoc_ctor_TimerApi(TimerApi *pThis, struct CALL_CONTEXT * arg_pCallC static void __nvoc_init_funcTable_TimerApi_1(TimerApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // tmrapiGetRegBaseOffsetAndSize -- virtual override (gpures) base (gpures) - pThis->__tmrapiGetRegBaseOffsetAndSize__ = &tmrapiGetRegBaseOffsetAndSize_IMPL; - pThis->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &__nvoc_down_thunk_TimerApi_gpuresGetRegBaseOffsetAndSize; - // tmrapiCtrlCmdTmrSetAlarmNotify -- exported (id=0x40110) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__tmrapiCtrlCmdTmrSetAlarmNotify__ = &tmrapiCtrlCmdTmrSetAlarmNotify_IMPL; #endif - - // tmrapiControl -- virtual inherited (gpures) base (gpures) - pThis->__tmrapiControl__ = &__nvoc_up_thunk_GpuResource_tmrapiControl; - - // tmrapiMap -- virtual inherited (gpures) base (gpures) - pThis->__tmrapiMap__ = &__nvoc_up_thunk_GpuResource_tmrapiMap; - - // tmrapiUnmap -- virtual inherited (gpures) base (gpures) - pThis->__tmrapiUnmap__ = &__nvoc_up_thunk_GpuResource_tmrapiUnmap; - - // tmrapiShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__tmrapiShareCallback__ = &__nvoc_up_thunk_GpuResource_tmrapiShareCallback; - - // tmrapiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__tmrapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_tmrapiGetMapAddrSpace; - - // tmrapiInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__tmrapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_tmrapiInternalControlForward; - - // tmrapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__tmrapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_tmrapiGetInternalObjectHandle; - - // tmrapiAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__tmrapiAccessCallback__ = &__nvoc_up_thunk_RmResource_tmrapiAccessCallback; - - // tmrapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__tmrapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_tmrapiGetMemInterMapParams; - - // tmrapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__tmrapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_tmrapiCheckMemInterUnmap; - - // tmrapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__tmrapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_tmrapiGetMemoryMappingDescriptor; - - // tmrapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__tmrapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_tmrapiControlSerialization_Prologue; - - // tmrapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__tmrapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_tmrapiControlSerialization_Epilogue; - - // tmrapiControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__tmrapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_tmrapiControl_Prologue; - - // tmrapiControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__tmrapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_tmrapiControl_Epilogue; - - // tmrapiCanCopy -- virtual inherited (res) base (gpures) - pThis->__tmrapiCanCopy__ = &__nvoc_up_thunk_RsResource_tmrapiCanCopy; - - // tmrapiIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__tmrapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_tmrapiIsDuplicate; - - // tmrapiPreDestruct -- virtual inherited (res) base (gpures) - pThis->__tmrapiPreDestruct__ = &__nvoc_up_thunk_RsResource_tmrapiPreDestruct; - - // tmrapiControlFilter -- virtual inherited (res) base (gpures) - pThis->__tmrapiControlFilter__ = &__nvoc_up_thunk_RsResource_tmrapiControlFilter; - - // tmrapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__tmrapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_tmrapiIsPartialUnmapSupported; - - // tmrapiMapTo -- virtual inherited (res) base (gpures) - pThis->__tmrapiMapTo__ = &__nvoc_up_thunk_RsResource_tmrapiMapTo; - - // tmrapiUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__tmrapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_tmrapiUnmapFrom; - - // tmrapiGetRefCount -- virtual inherited (res) base (gpures) - pThis->__tmrapiGetRefCount__ = &__nvoc_up_thunk_RsResource_tmrapiGetRefCount; - - // tmrapiAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__tmrapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_tmrapiAddAdditionalDependants; - - // tmrapiGetNotificationListPtr -- virtual inherited (notify) base (notify) - pThis->__tmrapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_tmrapiGetNotificationListPtr; - - // tmrapiGetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__tmrapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_tmrapiGetNotificationShare; - - // tmrapiSetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__tmrapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_tmrapiSetNotificationShare; - - // tmrapiUnregisterEvent -- virtual inherited (notify) base (notify) - pThis->__tmrapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_tmrapiUnregisterEvent; - - // tmrapiGetOrAllocNotifShare -- virtual inherited (notify) base (notify) - pThis->__tmrapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_tmrapiGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_TimerApi_1 with approximately 32 basic block(s). +} // End __nvoc_init_funcTable_TimerApi_1 with approximately 1 basic block(s). // Initialize vtable(s) for 31 virtual method(s). void __nvoc_init_funcTable_TimerApi(TimerApi *pThis) { - // Initialize vtable(s) with 31 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__TimerApi vtable = { + .__tmrapiGetRegBaseOffsetAndSize__ = &tmrapiGetRegBaseOffsetAndSize_IMPL, // virtual override (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &__nvoc_down_thunk_TimerApi_gpuresGetRegBaseOffsetAndSize, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__tmrapiControl__ = &__nvoc_up_thunk_GpuResource_tmrapiControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__tmrapiMap__ = &__nvoc_up_thunk_GpuResource_tmrapiMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__tmrapiUnmap__ = &__nvoc_up_thunk_GpuResource_tmrapiUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__tmrapiShareCallback__ = &__nvoc_up_thunk_GpuResource_tmrapiShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__tmrapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_tmrapiGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__tmrapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_tmrapiInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__tmrapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_tmrapiGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__tmrapiAccessCallback__ = &__nvoc_up_thunk_RmResource_tmrapiAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__tmrapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_tmrapiGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__tmrapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_tmrapiCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__tmrapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_tmrapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__tmrapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_tmrapiControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__tmrapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_tmrapiControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__tmrapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_tmrapiControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__tmrapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_tmrapiControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__tmrapiCanCopy__ = &__nvoc_up_thunk_RsResource_tmrapiCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__tmrapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_tmrapiIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__tmrapiPreDestruct__ = &__nvoc_up_thunk_RsResource_tmrapiPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__tmrapiControlFilter__ = &__nvoc_up_thunk_RsResource_tmrapiControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__tmrapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_tmrapiIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__tmrapiMapTo__ = &__nvoc_up_thunk_RsResource_tmrapiMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__tmrapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_tmrapiUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__tmrapiGetRefCount__ = &__nvoc_up_thunk_RsResource_tmrapiGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__tmrapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_tmrapiAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__tmrapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_tmrapiGetNotificationListPtr, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__tmrapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_tmrapiGetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__tmrapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_tmrapiSetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__tmrapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_tmrapiUnregisterEvent, // virtual inherited (notify) base (notify) + .Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__tmrapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_tmrapiGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.Notifier.INotifier; // (inotify) super^2 + pThis->__nvoc_base_Notifier.__nvoc_vtable = &vtable.Notifier; // (notify) super + pThis->__nvoc_vtable = &vtable; // (tmrapi) this + + // Initialize vtable(s) with 1 per-object function pointer(s). __nvoc_init_funcTable_TimerApi_1(pThis); } diff --git a/src/nvidia/generated/g_tmr_nvoc.h b/src/nvidia/generated/g_tmr_nvoc.h index 7cc013e99d..0fa89d2e9f 100644 --- a/src/nvidia/generated/g_tmr_nvoc.h +++ b/src/nvidia/generated/g_tmr_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -95,10 +95,15 @@ typedef NV_STATUS (*TIMEPROC_COUNTDOWN)(OBJGPU *, THREAD_STATE_NODE *); #endif +// Metadata including vtable +struct NVOC_VTABLE__TimerApi; + + struct TimerApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__TimerApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -114,9 +119,17 @@ struct TimerApi { struct Notifier *__nvoc_pbase_Notifier; // notify super struct TimerApi *__nvoc_pbase_TimerApi; // tmrapi - // Vtable with 31 per-object function pointers - NV_STATUS (*__tmrapiGetRegBaseOffsetAndSize__)(struct TimerApi * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual override (gpures) base (gpures) + // Vtable with 1 per-object function pointer NV_STATUS (*__tmrapiCtrlCmdTmrSetAlarmNotify__)(struct TimerApi * /*this*/, NV0004_CTRL_TMR_SET_ALARM_NOTIFY_PARAMS *); // exported (id=0x40110) +}; + + +// Metadata including vtable with 30 function pointers plus superclass metadata +struct NVOC_VTABLE__TimerApi { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + const struct NVOC_VTABLE__Notifier Notifier; // (notify) 5 function pointers + + NV_STATUS (*__tmrapiGetRegBaseOffsetAndSize__)(struct TimerApi * /*this*/, struct OBJGPU *, NvU32 *, NvU32 *); // virtual override (gpures) base (gpures) NV_STATUS (*__tmrapiControl__)(struct TimerApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__tmrapiMap__)(struct TimerApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__tmrapiUnmap__)(struct TimerApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -178,72 +191,72 @@ NV_STATUS __nvoc_objCreate_TimerApi(TimerApi**, Dynamic*, NvU32, struct CALL_CON // Wrapper macros -#define tmrapiGetRegBaseOffsetAndSize_FNPTR(pTimerApi) pTimerApi->__tmrapiGetRegBaseOffsetAndSize__ +#define tmrapiGetRegBaseOffsetAndSize_FNPTR(pTimerApi) pTimerApi->__nvoc_vtable->__tmrapiGetRegBaseOffsetAndSize__ #define tmrapiGetRegBaseOffsetAndSize(pTimerApi, pGpu, pOffset, pSize) tmrapiGetRegBaseOffsetAndSize_DISPATCH(pTimerApi, pGpu, pOffset, pSize) #define tmrapiCtrlCmdTmrSetAlarmNotify_FNPTR(pTimerApi) pTimerApi->__tmrapiCtrlCmdTmrSetAlarmNotify__ #define tmrapiCtrlCmdTmrSetAlarmNotify(pTimerApi, pParams) tmrapiCtrlCmdTmrSetAlarmNotify_DISPATCH(pTimerApi, pParams) -#define tmrapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define tmrapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define tmrapiControl(pGpuResource, pCallContext, pParams) tmrapiControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define tmrapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define tmrapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define tmrapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) tmrapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define tmrapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define tmrapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define tmrapiUnmap(pGpuResource, pCallContext, pCpuMapping) tmrapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define tmrapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define tmrapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define tmrapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) tmrapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define tmrapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define tmrapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define tmrapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) tmrapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define tmrapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define tmrapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define tmrapiInternalControlForward(pGpuResource, command, pParams, size) tmrapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define tmrapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define tmrapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define tmrapiGetInternalObjectHandle(pGpuResource) tmrapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define tmrapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define tmrapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define tmrapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) tmrapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define tmrapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define tmrapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define tmrapiGetMemInterMapParams(pRmResource, pParams) tmrapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define tmrapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define tmrapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define tmrapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) tmrapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define tmrapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define tmrapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define tmrapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) tmrapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define tmrapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define tmrapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define tmrapiControlSerialization_Prologue(pResource, pCallContext, pParams) tmrapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define tmrapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define tmrapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define tmrapiControlSerialization_Epilogue(pResource, pCallContext, pParams) tmrapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define tmrapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define tmrapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define tmrapiControl_Prologue(pResource, pCallContext, pParams) tmrapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define tmrapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define tmrapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define tmrapiControl_Epilogue(pResource, pCallContext, pParams) tmrapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define tmrapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define tmrapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define tmrapiCanCopy(pResource) tmrapiCanCopy_DISPATCH(pResource) -#define tmrapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define tmrapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define tmrapiIsDuplicate(pResource, hMemory, pDuplicate) tmrapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define tmrapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define tmrapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define tmrapiPreDestruct(pResource) tmrapiPreDestruct_DISPATCH(pResource) -#define tmrapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define tmrapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define tmrapiControlFilter(pResource, pCallContext, pParams) tmrapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define tmrapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define tmrapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define tmrapiIsPartialUnmapSupported(pResource) tmrapiIsPartialUnmapSupported_DISPATCH(pResource) -#define tmrapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define tmrapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define tmrapiMapTo(pResource, pParams) tmrapiMapTo_DISPATCH(pResource, pParams) -#define tmrapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define tmrapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define tmrapiUnmapFrom(pResource, pParams) tmrapiUnmapFrom_DISPATCH(pResource, pParams) -#define tmrapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define tmrapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define tmrapiGetRefCount(pResource) tmrapiGetRefCount_DISPATCH(pResource) -#define tmrapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define tmrapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define tmrapiAddAdditionalDependants(pClient, pResource, pReference) tmrapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define tmrapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define tmrapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define tmrapiGetNotificationListPtr(pNotifier) tmrapiGetNotificationListPtr_DISPATCH(pNotifier) -#define tmrapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define tmrapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define tmrapiGetNotificationShare(pNotifier) tmrapiGetNotificationShare_DISPATCH(pNotifier) -#define tmrapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define tmrapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define tmrapiSetNotificationShare(pNotifier, pNotifShare) tmrapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define tmrapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define tmrapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define tmrapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) tmrapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define tmrapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define tmrapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define tmrapiGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) tmrapiGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS tmrapiGetRegBaseOffsetAndSize_DISPATCH(struct TimerApi *pTimerApi, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pTimerApi->__tmrapiGetRegBaseOffsetAndSize__(pTimerApi, pGpu, pOffset, pSize); + return pTimerApi->__nvoc_vtable->__tmrapiGetRegBaseOffsetAndSize__(pTimerApi, pGpu, pOffset, pSize); } static inline NV_STATUS tmrapiCtrlCmdTmrSetAlarmNotify_DISPATCH(struct TimerApi *pTimerApi, NV0004_CTRL_TMR_SET_ALARM_NOTIFY_PARAMS *pParams) { @@ -251,119 +264,119 @@ static inline NV_STATUS tmrapiCtrlCmdTmrSetAlarmNotify_DISPATCH(struct TimerApi } static inline NV_STATUS tmrapiControl_DISPATCH(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__tmrapiControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__tmrapiControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS tmrapiMap_DISPATCH(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__tmrapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__tmrapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS tmrapiUnmap_DISPATCH(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__tmrapiUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__tmrapiUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool tmrapiShareCallback_DISPATCH(struct TimerApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__tmrapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__tmrapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS tmrapiGetMapAddrSpace_DISPATCH(struct TimerApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__tmrapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__tmrapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS tmrapiInternalControlForward_DISPATCH(struct TimerApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__tmrapiInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__tmrapiInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle tmrapiGetInternalObjectHandle_DISPATCH(struct TimerApi *pGpuResource) { - return pGpuResource->__tmrapiGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__tmrapiGetInternalObjectHandle__(pGpuResource); } static inline NvBool tmrapiAccessCallback_DISPATCH(struct TimerApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__tmrapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__tmrapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS tmrapiGetMemInterMapParams_DISPATCH(struct TimerApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__tmrapiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__tmrapiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS tmrapiCheckMemInterUnmap_DISPATCH(struct TimerApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__tmrapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__tmrapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS tmrapiGetMemoryMappingDescriptor_DISPATCH(struct TimerApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__tmrapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__tmrapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS tmrapiControlSerialization_Prologue_DISPATCH(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__tmrapiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__tmrapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void tmrapiControlSerialization_Epilogue_DISPATCH(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__tmrapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__tmrapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS tmrapiControl_Prologue_DISPATCH(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__tmrapiControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__tmrapiControl_Prologue__(pResource, pCallContext, pParams); } static inline void tmrapiControl_Epilogue_DISPATCH(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__tmrapiControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__tmrapiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool tmrapiCanCopy_DISPATCH(struct TimerApi *pResource) { - return pResource->__tmrapiCanCopy__(pResource); + return pResource->__nvoc_vtable->__tmrapiCanCopy__(pResource); } static inline NV_STATUS tmrapiIsDuplicate_DISPATCH(struct TimerApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__tmrapiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__tmrapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void tmrapiPreDestruct_DISPATCH(struct TimerApi *pResource) { - pResource->__tmrapiPreDestruct__(pResource); + pResource->__nvoc_vtable->__tmrapiPreDestruct__(pResource); } static inline NV_STATUS tmrapiControlFilter_DISPATCH(struct TimerApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__tmrapiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__tmrapiControlFilter__(pResource, pCallContext, pParams); } static inline NvBool tmrapiIsPartialUnmapSupported_DISPATCH(struct TimerApi *pResource) { - return pResource->__tmrapiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__tmrapiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS tmrapiMapTo_DISPATCH(struct TimerApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__tmrapiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__tmrapiMapTo__(pResource, pParams); } static inline NV_STATUS tmrapiUnmapFrom_DISPATCH(struct TimerApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__tmrapiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__tmrapiUnmapFrom__(pResource, pParams); } static inline NvU32 tmrapiGetRefCount_DISPATCH(struct TimerApi *pResource) { - return pResource->__tmrapiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__tmrapiGetRefCount__(pResource); } static inline void tmrapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct TimerApi *pResource, RsResourceRef *pReference) { - pResource->__tmrapiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__tmrapiAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * tmrapiGetNotificationListPtr_DISPATCH(struct TimerApi *pNotifier) { - return pNotifier->__tmrapiGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__tmrapiGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * tmrapiGetNotificationShare_DISPATCH(struct TimerApi *pNotifier) { - return pNotifier->__tmrapiGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__tmrapiGetNotificationShare__(pNotifier); } static inline void tmrapiSetNotificationShare_DISPATCH(struct TimerApi *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__tmrapiSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__tmrapiSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS tmrapiUnregisterEvent_DISPATCH(struct TimerApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__tmrapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__tmrapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS tmrapiGetOrAllocNotifShare_DISPATCH(struct TimerApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__tmrapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__tmrapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS tmrapiGetRegBaseOffsetAndSize_IMPL(struct TimerApi *pTimerApi, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); diff --git a/src/nvidia/generated/g_traceable_nvoc.c b/src/nvidia/generated/g_traceable_nvoc.c index 3029cc6ea9..bd5a7637d7 100644 --- a/src/nvidia/generated/g_traceable_nvoc.c +++ b/src/nvidia/generated/g_traceable_nvoc.c @@ -49,6 +49,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJTRACEABLE = /*pExportInfo=*/ &__nvoc_export_info_OBJTRACEABLE }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJTRACEABLE = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_traceable_nvoc.h b/src/nvidia/generated/g_traceable_nvoc.h index 86ca72dd3c..77f6d55703 100644 --- a/src/nvidia/generated/g_traceable_nvoc.h +++ b/src/nvidia/generated/g_traceable_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_usermode_api_nvoc.c b/src/nvidia/generated/g_usermode_api_nvoc.c index 659a4496ea..fb32d738b4 100644 --- a/src/nvidia/generated/g_usermode_api_nvoc.c +++ b/src/nvidia/generated/g_usermode_api_nvoc.c @@ -93,138 +93,207 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_UserModeApi = /*pExportInfo=*/ &__nvoc_export_info_UserModeApi }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super +NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super +NvBool __nvoc_down_thunk_UserModeApi_resCanCopy(struct RsResource *pUserModeApi); // this +NV_STATUS __nvoc_down_thunk_UserModeApi_memGetMemInterMapParams(struct Memory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this + // 2 down-thunk(s) defined to bridge methods in UserModeApi from superclasses // usrmodeCanCopy: virtual override (res) base (mem) -static NvBool __nvoc_down_thunk_UserModeApi_resCanCopy(struct RsResource *pUserModeApi) { +NvBool __nvoc_down_thunk_UserModeApi_resCanCopy(struct RsResource *pUserModeApi) { return usrmodeCanCopy((struct UserModeApi *)(((unsigned char *) pUserModeApi) - __nvoc_rtti_UserModeApi_RsResource.offset)); } // usrmodeGetMemInterMapParams: virtual override (rmres) base (mem) -static NV_STATUS __nvoc_down_thunk_UserModeApi_memGetMemInterMapParams(struct Memory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_down_thunk_UserModeApi_memGetMemInterMapParams(struct Memory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return usrmodeGetMemInterMapParams((struct UserModeApi *)(((unsigned char *) pMemory) - __nvoc_rtti_UserModeApi_Memory.offset), pParams); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource); // super +void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_Memory_usrmodeIsDuplicate(struct UserModeApi *pMemory, NvHandle hMemory, NvBool *pDuplicate); // this +NV_STATUS __nvoc_up_thunk_Memory_usrmodeGetMapAddrSpace(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_Memory_usrmodeControl(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_usrmodeMap(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_usrmodeUnmap(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_usrmodeCheckMemInterUnmap(struct UserModeApi *pMemory, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_Memory_usrmodeGetMemoryMappingDescriptor(struct UserModeApi *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_Memory_usrmodeCheckCopyPermissions(struct UserModeApi *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // this +NV_STATUS __nvoc_up_thunk_Memory_usrmodeIsReady(struct UserModeApi *pMemory, NvBool bCopyConstructorContext); // this +NvBool __nvoc_up_thunk_Memory_usrmodeIsGpuMapAllowed(struct UserModeApi *pMemory, struct OBJGPU *pGpu); // this +NvBool __nvoc_up_thunk_Memory_usrmodeIsExportAllowed(struct UserModeApi *pMemory); // this +NvBool __nvoc_up_thunk_RmResource_usrmodeAccessCallback(struct UserModeApi *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_usrmodeShareCallback(struct UserModeApi *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_usrmodeControlSerialization_Prologue(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_usrmodeControlSerialization_Epilogue(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_usrmodeControl_Prologue(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_usrmodeControl_Epilogue(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RsResource_usrmodePreDestruct(struct UserModeApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_usrmodeControlFilter(struct UserModeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_usrmodeIsPartialUnmapSupported(struct UserModeApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_usrmodeMapTo(struct UserModeApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_usrmodeUnmapFrom(struct UserModeApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_usrmodeGetRefCount(struct UserModeApi *pResource); // this +void __nvoc_up_thunk_RsResource_usrmodeAddAdditionalDependants(struct RsClient *pClient, struct UserModeApi *pResource, RsResourceRef *pReference); // this + // 24 up-thunk(s) defined to bridge methods in UserModeApi to superclasses // usrmodeIsDuplicate: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_usrmodeIsDuplicate(struct UserModeApi *pMemory, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_Memory_usrmodeIsDuplicate(struct UserModeApi *pMemory, NvHandle hMemory, NvBool *pDuplicate) { return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), hMemory, pDuplicate); } // usrmodeGetMapAddrSpace: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_usrmodeGetMapAddrSpace(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_Memory_usrmodeGetMapAddrSpace(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), pCallContext, mapFlags, pAddrSpace); } // usrmodeControl: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_usrmodeControl(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_usrmodeControl(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), pCallContext, pParams); } // usrmodeMap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_usrmodeMap(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_usrmodeMap(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), pCallContext, pParams, pCpuMapping); } // usrmodeUnmap: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_usrmodeUnmap(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_usrmodeUnmap(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), pCallContext, pCpuMapping); } // usrmodeCheckMemInterUnmap: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_usrmodeCheckMemInterUnmap(struct UserModeApi *pMemory, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_Memory_usrmodeCheckMemInterUnmap(struct UserModeApi *pMemory, NvBool bSubdeviceHandleProvided) { return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), bSubdeviceHandleProvided); } // usrmodeGetMemoryMappingDescriptor: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_usrmodeGetMemoryMappingDescriptor(struct UserModeApi *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_Memory_usrmodeGetMemoryMappingDescriptor(struct UserModeApi *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), ppMemDesc); } // usrmodeCheckCopyPermissions: inline virtual inherited (mem) base (mem) body -static NV_STATUS __nvoc_up_thunk_Memory_usrmodeCheckCopyPermissions(struct UserModeApi *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { +NV_STATUS __nvoc_up_thunk_Memory_usrmodeCheckCopyPermissions(struct UserModeApi *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), pDstGpu, pDstDevice); } // usrmodeIsReady: virtual inherited (mem) base (mem) -static NV_STATUS __nvoc_up_thunk_Memory_usrmodeIsReady(struct UserModeApi *pMemory, NvBool bCopyConstructorContext) { +NV_STATUS __nvoc_up_thunk_Memory_usrmodeIsReady(struct UserModeApi *pMemory, NvBool bCopyConstructorContext) { return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), bCopyConstructorContext); } // usrmodeIsGpuMapAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_usrmodeIsGpuMapAllowed(struct UserModeApi *pMemory, struct OBJGPU *pGpu) { +NvBool __nvoc_up_thunk_Memory_usrmodeIsGpuMapAllowed(struct UserModeApi *pMemory, struct OBJGPU *pGpu) { return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_UserModeApi_Memory.offset), pGpu); } // usrmodeIsExportAllowed: inline virtual inherited (mem) base (mem) body -static NvBool __nvoc_up_thunk_Memory_usrmodeIsExportAllowed(struct UserModeApi *pMemory) { +NvBool __nvoc_up_thunk_Memory_usrmodeIsExportAllowed(struct UserModeApi *pMemory) { return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_UserModeApi_Memory.offset)); } // usrmodeAccessCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_usrmodeAccessCallback(struct UserModeApi *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_usrmodeAccessCallback(struct UserModeApi *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // usrmodeShareCallback: virtual inherited (rmres) base (mem) -static NvBool __nvoc_up_thunk_RmResource_usrmodeShareCallback(struct UserModeApi *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_usrmodeShareCallback(struct UserModeApi *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // usrmodeControlSerialization_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_usrmodeControlSerialization_Prologue(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_usrmodeControlSerialization_Prologue(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RmResource.offset), pCallContext, pParams); } // usrmodeControlSerialization_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_usrmodeControlSerialization_Epilogue(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_usrmodeControlSerialization_Epilogue(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RmResource.offset), pCallContext, pParams); } // usrmodeControl_Prologue: virtual inherited (rmres) base (mem) -static NV_STATUS __nvoc_up_thunk_RmResource_usrmodeControl_Prologue(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_usrmodeControl_Prologue(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RmResource.offset), pCallContext, pParams); } // usrmodeControl_Epilogue: virtual inherited (rmres) base (mem) -static void __nvoc_up_thunk_RmResource_usrmodeControl_Epilogue(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_usrmodeControl_Epilogue(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RmResource.offset), pCallContext, pParams); } // usrmodePreDestruct: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_usrmodePreDestruct(struct UserModeApi *pResource) { +void __nvoc_up_thunk_RsResource_usrmodePreDestruct(struct UserModeApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RsResource.offset)); } // usrmodeControlFilter: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_usrmodeControlFilter(struct UserModeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_usrmodeControlFilter(struct UserModeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RsResource.offset), pCallContext, pParams); } // usrmodeIsPartialUnmapSupported: inline virtual inherited (res) base (mem) body -static NvBool __nvoc_up_thunk_RsResource_usrmodeIsPartialUnmapSupported(struct UserModeApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_usrmodeIsPartialUnmapSupported(struct UserModeApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RsResource.offset)); } // usrmodeMapTo: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_usrmodeMapTo(struct UserModeApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_usrmodeMapTo(struct UserModeApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RsResource.offset), pParams); } // usrmodeUnmapFrom: virtual inherited (res) base (mem) -static NV_STATUS __nvoc_up_thunk_RsResource_usrmodeUnmapFrom(struct UserModeApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_usrmodeUnmapFrom(struct UserModeApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RsResource.offset), pParams); } // usrmodeGetRefCount: virtual inherited (res) base (mem) -static NvU32 __nvoc_up_thunk_RsResource_usrmodeGetRefCount(struct UserModeApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_usrmodeGetRefCount(struct UserModeApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RsResource.offset)); } // usrmodeAddAdditionalDependants: virtual inherited (res) base (mem) -static void __nvoc_up_thunk_RsResource_usrmodeAddAdditionalDependants(struct RsClient *pClient, struct UserModeApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_usrmodeAddAdditionalDependants(struct RsClient *pClient, struct UserModeApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UserModeApi_RsResource.offset), pReference); } @@ -267,93 +336,112 @@ NV_STATUS __nvoc_ctor_UserModeApi(UserModeApi *pThis, CALL_CONTEXT * arg_pCallCo // Vtable initialization static void __nvoc_init_funcTable_UserModeApi_1(UserModeApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // usrmodeCanCopy -- virtual override (res) base (mem) - pThis->__usrmodeCanCopy__ = &usrmodeCanCopy_IMPL; - pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_UserModeApi_resCanCopy; - - // usrmodeGetMemInterMapParams -- virtual override (rmres) base (mem) - pThis->__usrmodeGetMemInterMapParams__ = &usrmodeGetMemInterMapParams_IMPL; - pThis->__nvoc_base_Memory.__memGetMemInterMapParams__ = &__nvoc_down_thunk_UserModeApi_memGetMemInterMapParams; - - // usrmodeIsDuplicate -- virtual inherited (mem) base (mem) - pThis->__usrmodeIsDuplicate__ = &__nvoc_up_thunk_Memory_usrmodeIsDuplicate; - - // usrmodeGetMapAddrSpace -- virtual inherited (mem) base (mem) - pThis->__usrmodeGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_usrmodeGetMapAddrSpace; - - // usrmodeControl -- virtual inherited (mem) base (mem) - pThis->__usrmodeControl__ = &__nvoc_up_thunk_Memory_usrmodeControl; - - // usrmodeMap -- virtual inherited (mem) base (mem) - pThis->__usrmodeMap__ = &__nvoc_up_thunk_Memory_usrmodeMap; - - // usrmodeUnmap -- virtual inherited (mem) base (mem) - pThis->__usrmodeUnmap__ = &__nvoc_up_thunk_Memory_usrmodeUnmap; - - // usrmodeCheckMemInterUnmap -- inline virtual inherited (mem) base (mem) body - pThis->__usrmodeCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_usrmodeCheckMemInterUnmap; - - // usrmodeGetMemoryMappingDescriptor -- virtual inherited (mem) base (mem) - pThis->__usrmodeGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_usrmodeGetMemoryMappingDescriptor; - - // usrmodeCheckCopyPermissions -- inline virtual inherited (mem) base (mem) body - pThis->__usrmodeCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_usrmodeCheckCopyPermissions; - - // usrmodeIsReady -- virtual inherited (mem) base (mem) - pThis->__usrmodeIsReady__ = &__nvoc_up_thunk_Memory_usrmodeIsReady; - - // usrmodeIsGpuMapAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__usrmodeIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_usrmodeIsGpuMapAllowed; - - // usrmodeIsExportAllowed -- inline virtual inherited (mem) base (mem) body - pThis->__usrmodeIsExportAllowed__ = &__nvoc_up_thunk_Memory_usrmodeIsExportAllowed; - - // usrmodeAccessCallback -- virtual inherited (rmres) base (mem) - pThis->__usrmodeAccessCallback__ = &__nvoc_up_thunk_RmResource_usrmodeAccessCallback; - - // usrmodeShareCallback -- virtual inherited (rmres) base (mem) - pThis->__usrmodeShareCallback__ = &__nvoc_up_thunk_RmResource_usrmodeShareCallback; - - // usrmodeControlSerialization_Prologue -- virtual inherited (rmres) base (mem) - pThis->__usrmodeControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_usrmodeControlSerialization_Prologue; - - // usrmodeControlSerialization_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__usrmodeControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_usrmodeControlSerialization_Epilogue; - - // usrmodeControl_Prologue -- virtual inherited (rmres) base (mem) - pThis->__usrmodeControl_Prologue__ = &__nvoc_up_thunk_RmResource_usrmodeControl_Prologue; - - // usrmodeControl_Epilogue -- virtual inherited (rmres) base (mem) - pThis->__usrmodeControl_Epilogue__ = &__nvoc_up_thunk_RmResource_usrmodeControl_Epilogue; - - // usrmodePreDestruct -- virtual inherited (res) base (mem) - pThis->__usrmodePreDestruct__ = &__nvoc_up_thunk_RsResource_usrmodePreDestruct; - - // usrmodeControlFilter -- virtual inherited (res) base (mem) - pThis->__usrmodeControlFilter__ = &__nvoc_up_thunk_RsResource_usrmodeControlFilter; - - // usrmodeIsPartialUnmapSupported -- inline virtual inherited (res) base (mem) body - pThis->__usrmodeIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_usrmodeIsPartialUnmapSupported; - - // usrmodeMapTo -- virtual inherited (res) base (mem) - pThis->__usrmodeMapTo__ = &__nvoc_up_thunk_RsResource_usrmodeMapTo; - - // usrmodeUnmapFrom -- virtual inherited (res) base (mem) - pThis->__usrmodeUnmapFrom__ = &__nvoc_up_thunk_RsResource_usrmodeUnmapFrom; - - // usrmodeGetRefCount -- virtual inherited (res) base (mem) - pThis->__usrmodeGetRefCount__ = &__nvoc_up_thunk_RsResource_usrmodeGetRefCount; - - // usrmodeAddAdditionalDependants -- virtual inherited (res) base (mem) - pThis->__usrmodeAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_usrmodeAddAdditionalDependants; -} // End __nvoc_init_funcTable_UserModeApi_1 with approximately 28 basic block(s). +} // End __nvoc_init_funcTable_UserModeApi_1 // Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_UserModeApi(UserModeApi *pThis) { - // Initialize vtable(s) with 26 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__UserModeApi vtable = { + .__usrmodeCanCopy__ = &usrmodeCanCopy_IMPL, // virtual override (res) base (mem) + .Memory.__memCanCopy__ = &__nvoc_up_thunk_RsResource_memCanCopy, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_UserModeApi_resCanCopy, // virtual + .__usrmodeGetMemInterMapParams__ = &usrmodeGetMemInterMapParams_IMPL, // virtual override (rmres) base (mem) + .Memory.__memGetMemInterMapParams__ = &__nvoc_down_thunk_UserModeApi_memGetMemInterMapParams, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_Memory_rmresGetMemInterMapParams, // virtual + .__usrmodeIsDuplicate__ = &__nvoc_up_thunk_Memory_usrmodeIsDuplicate, // virtual inherited (mem) base (mem) + .Memory.__memIsDuplicate__ = &memIsDuplicate_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resIsDuplicate__ = &__nvoc_down_thunk_Memory_resIsDuplicate, // virtual + .__usrmodeGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_usrmodeGetMapAddrSpace, // virtual inherited (mem) base (mem) + .Memory.__memGetMapAddrSpace__ = &memGetMapAddrSpace_IMPL, // virtual + .__usrmodeControl__ = &__nvoc_up_thunk_Memory_usrmodeControl, // virtual inherited (mem) base (mem) + .Memory.__memControl__ = &memControl_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_Memory_resControl, // virtual + .__usrmodeMap__ = &__nvoc_up_thunk_Memory_usrmodeMap, // virtual inherited (mem) base (mem) + .Memory.__memMap__ = &memMap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_Memory_resMap, // virtual + .__usrmodeUnmap__ = &__nvoc_up_thunk_Memory_usrmodeUnmap, // virtual inherited (mem) base (mem) + .Memory.__memUnmap__ = &memUnmap_IMPL, // virtual override (res) base (rmres) + .Memory.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_Memory_resUnmap, // virtual + .__usrmodeCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_usrmodeCheckMemInterUnmap, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckMemInterUnmap__ = &memCheckMemInterUnmap_ac1694, // inline virtual override (rmres) base (rmres) body + .Memory.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_Memory_rmresCheckMemInterUnmap, // virtual + .__usrmodeGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_usrmodeGetMemoryMappingDescriptor, // virtual inherited (mem) base (mem) + .Memory.__memGetMemoryMappingDescriptor__ = &memGetMemoryMappingDescriptor_IMPL, // virtual override (rmres) base (rmres) + .Memory.RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor, // virtual + .__usrmodeCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_usrmodeCheckCopyPermissions, // inline virtual inherited (mem) base (mem) body + .Memory.__memCheckCopyPermissions__ = &memCheckCopyPermissions_ac1694, // inline virtual body + .__usrmodeIsReady__ = &__nvoc_up_thunk_Memory_usrmodeIsReady, // virtual inherited (mem) base (mem) + .Memory.__memIsReady__ = &memIsReady_IMPL, // virtual + .__usrmodeIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_usrmodeIsGpuMapAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsGpuMapAllowed__ = &memIsGpuMapAllowed_e661f0, // inline virtual body + .__usrmodeIsExportAllowed__ = &__nvoc_up_thunk_Memory_usrmodeIsExportAllowed, // inline virtual inherited (mem) base (mem) body + .Memory.__memIsExportAllowed__ = &memIsExportAllowed_e661f0, // inline virtual body + .__usrmodeAccessCallback__ = &__nvoc_up_thunk_RmResource_usrmodeAccessCallback, // virtual inherited (rmres) base (mem) + .Memory.__memAccessCallback__ = &__nvoc_up_thunk_RmResource_memAccessCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__usrmodeShareCallback__ = &__nvoc_up_thunk_RmResource_usrmodeShareCallback, // virtual inherited (rmres) base (mem) + .Memory.__memShareCallback__ = &__nvoc_up_thunk_RmResource_memShareCallback, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__usrmodeControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_usrmodeControlSerialization_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__usrmodeControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_usrmodeControlSerialization_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__usrmodeControl_Prologue__ = &__nvoc_up_thunk_RmResource_usrmodeControl_Prologue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Prologue__ = &__nvoc_up_thunk_RmResource_memControl_Prologue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__usrmodeControl_Epilogue__ = &__nvoc_up_thunk_RmResource_usrmodeControl_Epilogue, // virtual inherited (rmres) base (mem) + .Memory.__memControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memControl_Epilogue, // virtual inherited (rmres) base (rmres) + .Memory.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .Memory.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__usrmodePreDestruct__ = &__nvoc_up_thunk_RsResource_usrmodePreDestruct, // virtual inherited (res) base (mem) + .Memory.__memPreDestruct__ = &__nvoc_up_thunk_RsResource_memPreDestruct, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__usrmodeControlFilter__ = &__nvoc_up_thunk_RsResource_usrmodeControlFilter, // virtual inherited (res) base (mem) + .Memory.__memControlFilter__ = &__nvoc_up_thunk_RsResource_memControlFilter, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__usrmodeIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_usrmodeIsPartialUnmapSupported, // inline virtual inherited (res) base (mem) body + .Memory.__memIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .Memory.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .Memory.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__usrmodeMapTo__ = &__nvoc_up_thunk_RsResource_usrmodeMapTo, // virtual inherited (res) base (mem) + .Memory.__memMapTo__ = &__nvoc_up_thunk_RsResource_memMapTo, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__usrmodeUnmapFrom__ = &__nvoc_up_thunk_RsResource_usrmodeUnmapFrom, // virtual inherited (res) base (mem) + .Memory.__memUnmapFrom__ = &__nvoc_up_thunk_RsResource_memUnmapFrom, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__usrmodeGetRefCount__ = &__nvoc_up_thunk_RsResource_usrmodeGetRefCount, // virtual inherited (res) base (mem) + .Memory.__memGetRefCount__ = &__nvoc_up_thunk_RsResource_memGetRefCount, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__usrmodeAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_usrmodeAddAdditionalDependants, // virtual inherited (res) base (mem) + .Memory.__memAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memAddAdditionalDependants, // virtual inherited (res) base (rmres) + .Memory.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .Memory.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.Memory.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable = &vtable.Memory.RmResource; // (rmres) super^2 + pThis->__nvoc_base_Memory.__nvoc_vtable = &vtable.Memory; // (mem) super + pThis->__nvoc_vtable = &vtable; // (usrmode) this __nvoc_init_funcTable_UserModeApi_1(pThis); } diff --git a/src/nvidia/generated/g_usermode_api_nvoc.h b/src/nvidia/generated/g_usermode_api_nvoc.h index 3ed72b63c2..a8dff774e2 100644 --- a/src/nvidia/generated/g_usermode_api_nvoc.h +++ b/src/nvidia/generated/g_usermode_api_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -63,10 +63,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__UserModeApi; + + struct UserModeApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__UserModeApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct Memory __nvoc_base_Memory; @@ -79,7 +84,16 @@ struct UserModeApi { struct Memory *__nvoc_pbase_Memory; // mem super struct UserModeApi *__nvoc_pbase_UserModeApi; // usrmode - // Vtable with 26 per-object function pointers + // Data members + NvBool bPrivMapping; + NvBool bInternalMmio; +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__UserModeApi { + const struct NVOC_VTABLE__Memory Memory; // (mem) 26 function pointers + NvBool (*__usrmodeCanCopy__)(struct UserModeApi * /*this*/); // virtual override (res) base (mem) NV_STATUS (*__usrmodeGetMemInterMapParams__)(struct UserModeApi * /*this*/, RMRES_MEM_INTER_MAP_PARAMS *); // virtual override (rmres) base (mem) NV_STATUS (*__usrmodeIsDuplicate__)(struct UserModeApi * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (mem) @@ -106,10 +120,6 @@ struct UserModeApi { NV_STATUS (*__usrmodeUnmapFrom__)(struct UserModeApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (mem) NvU32 (*__usrmodeGetRefCount__)(struct UserModeApi * /*this*/); // virtual inherited (res) base (mem) void (*__usrmodeAddAdditionalDependants__)(struct RsClient *, struct UserModeApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (mem) - - // Data members - NvBool bPrivMapping; - NvBool bInternalMmio; }; #ifndef __NVOC_CLASS_UserModeApi_TYPEDEF__ @@ -142,162 +152,162 @@ NV_STATUS __nvoc_objCreate_UserModeApi(UserModeApi**, Dynamic*, NvU32, CALL_CONT // Wrapper macros -#define usrmodeCanCopy_FNPTR(pUserModeApi) pUserModeApi->__usrmodeCanCopy__ +#define usrmodeCanCopy_FNPTR(pUserModeApi) pUserModeApi->__nvoc_vtable->__usrmodeCanCopy__ #define usrmodeCanCopy(pUserModeApi) usrmodeCanCopy_DISPATCH(pUserModeApi) -#define usrmodeGetMemInterMapParams_FNPTR(pMemory) pMemory->__usrmodeGetMemInterMapParams__ +#define usrmodeGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_vtable->__usrmodeGetMemInterMapParams__ #define usrmodeGetMemInterMapParams(pMemory, pParams) usrmodeGetMemInterMapParams_DISPATCH(pMemory, pParams) -#define usrmodeIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsDuplicate__ +#define usrmodeIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsDuplicate__ #define usrmodeIsDuplicate(pMemory, hMemory, pDuplicate) usrmodeIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define usrmodeGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMapAddrSpace__ +#define usrmodeGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMapAddrSpace__ #define usrmodeGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) usrmodeGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define usrmodeControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memControl__ +#define usrmodeControl_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memControl__ #define usrmodeControl(pMemory, pCallContext, pParams) usrmodeControl_DISPATCH(pMemory, pCallContext, pParams) -#define usrmodeMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memMap__ +#define usrmodeMap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memMap__ #define usrmodeMap(pMemory, pCallContext, pParams, pCpuMapping) usrmodeMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define usrmodeUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memUnmap__ +#define usrmodeUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memUnmap__ #define usrmodeUnmap(pMemory, pCallContext, pCpuMapping) usrmodeUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define usrmodeCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define usrmodeCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckMemInterUnmap__ #define usrmodeCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) usrmodeCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define usrmodeGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ +#define usrmodeGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memGetMemoryMappingDescriptor__ #define usrmodeGetMemoryMappingDescriptor(pMemory, ppMemDesc) usrmodeGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define usrmodeCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memCheckCopyPermissions__ +#define usrmodeCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memCheckCopyPermissions__ #define usrmodeCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) usrmodeCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define usrmodeIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsReady__ +#define usrmodeIsReady_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsReady__ #define usrmodeIsReady(pMemory, bCopyConstructorContext) usrmodeIsReady_DISPATCH(pMemory, bCopyConstructorContext) -#define usrmodeIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define usrmodeIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsGpuMapAllowed__ #define usrmodeIsGpuMapAllowed(pMemory, pGpu) usrmodeIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define usrmodeIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__memIsExportAllowed__ +#define usrmodeIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_Memory.__nvoc_vtable->__memIsExportAllowed__ #define usrmodeIsExportAllowed(pMemory) usrmodeIsExportAllowed_DISPATCH(pMemory) -#define usrmodeAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define usrmodeAccessCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define usrmodeAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) usrmodeAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define usrmodeShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define usrmodeShareCallback_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define usrmodeShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) usrmodeShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define usrmodeControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define usrmodeControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define usrmodeControlSerialization_Prologue(pResource, pCallContext, pParams) usrmodeControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define usrmodeControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define usrmodeControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define usrmodeControlSerialization_Epilogue(pResource, pCallContext, pParams) usrmodeControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define usrmodeControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define usrmodeControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define usrmodeControl_Prologue(pResource, pCallContext, pParams) usrmodeControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define usrmodeControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define usrmodeControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define usrmodeControl_Epilogue(pResource, pCallContext, pParams) usrmodeControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define usrmodePreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define usrmodePreDestruct_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define usrmodePreDestruct(pResource) usrmodePreDestruct_DISPATCH(pResource) -#define usrmodeControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define usrmodeControlFilter_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define usrmodeControlFilter(pResource, pCallContext, pParams) usrmodeControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define usrmodeIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define usrmodeIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define usrmodeIsPartialUnmapSupported(pResource) usrmodeIsPartialUnmapSupported_DISPATCH(pResource) -#define usrmodeMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define usrmodeMapTo_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define usrmodeMapTo(pResource, pParams) usrmodeMapTo_DISPATCH(pResource, pParams) -#define usrmodeUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define usrmodeUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define usrmodeUnmapFrom(pResource, pParams) usrmodeUnmapFrom_DISPATCH(pResource, pParams) -#define usrmodeGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define usrmodeGetRefCount_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define usrmodeGetRefCount(pResource) usrmodeGetRefCount_DISPATCH(pResource) -#define usrmodeAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define usrmodeAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define usrmodeAddAdditionalDependants(pClient, pResource, pReference) usrmodeAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool usrmodeCanCopy_DISPATCH(struct UserModeApi *pUserModeApi) { - return pUserModeApi->__usrmodeCanCopy__(pUserModeApi); + return pUserModeApi->__nvoc_vtable->__usrmodeCanCopy__(pUserModeApi); } static inline NV_STATUS usrmodeGetMemInterMapParams_DISPATCH(struct UserModeApi *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__usrmodeGetMemInterMapParams__(pMemory, pParams); + return pMemory->__nvoc_vtable->__usrmodeGetMemInterMapParams__(pMemory, pParams); } static inline NV_STATUS usrmodeIsDuplicate_DISPATCH(struct UserModeApi *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__usrmodeIsDuplicate__(pMemory, hMemory, pDuplicate); + return pMemory->__nvoc_vtable->__usrmodeIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS usrmodeGetMapAddrSpace_DISPATCH(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pMemory->__usrmodeGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); + return pMemory->__nvoc_vtable->__usrmodeGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS usrmodeControl_DISPATCH(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__usrmodeControl__(pMemory, pCallContext, pParams); + return pMemory->__nvoc_vtable->__usrmodeControl__(pMemory, pCallContext, pParams); } static inline NV_STATUS usrmodeMap_DISPATCH(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__usrmodeMap__(pMemory, pCallContext, pParams, pCpuMapping); + return pMemory->__nvoc_vtable->__usrmodeMap__(pMemory, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS usrmodeUnmap_DISPATCH(struct UserModeApi *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__usrmodeUnmap__(pMemory, pCallContext, pCpuMapping); + return pMemory->__nvoc_vtable->__usrmodeUnmap__(pMemory, pCallContext, pCpuMapping); } static inline NV_STATUS usrmodeCheckMemInterUnmap_DISPATCH(struct UserModeApi *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__usrmodeCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); + return pMemory->__nvoc_vtable->__usrmodeCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } static inline NV_STATUS usrmodeGetMemoryMappingDescriptor_DISPATCH(struct UserModeApi *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__usrmodeGetMemoryMappingDescriptor__(pMemory, ppMemDesc); + return pMemory->__nvoc_vtable->__usrmodeGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } static inline NV_STATUS usrmodeCheckCopyPermissions_DISPATCH(struct UserModeApi *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__usrmodeCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); + return pMemory->__nvoc_vtable->__usrmodeCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } static inline NV_STATUS usrmodeIsReady_DISPATCH(struct UserModeApi *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__usrmodeIsReady__(pMemory, bCopyConstructorContext); + return pMemory->__nvoc_vtable->__usrmodeIsReady__(pMemory, bCopyConstructorContext); } static inline NvBool usrmodeIsGpuMapAllowed_DISPATCH(struct UserModeApi *pMemory, struct OBJGPU *pGpu) { - return pMemory->__usrmodeIsGpuMapAllowed__(pMemory, pGpu); + return pMemory->__nvoc_vtable->__usrmodeIsGpuMapAllowed__(pMemory, pGpu); } static inline NvBool usrmodeIsExportAllowed_DISPATCH(struct UserModeApi *pMemory) { - return pMemory->__usrmodeIsExportAllowed__(pMemory); + return pMemory->__nvoc_vtable->__usrmodeIsExportAllowed__(pMemory); } static inline NvBool usrmodeAccessCallback_DISPATCH(struct UserModeApi *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__usrmodeAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__usrmodeAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool usrmodeShareCallback_DISPATCH(struct UserModeApi *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__usrmodeShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__usrmodeShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS usrmodeControlSerialization_Prologue_DISPATCH(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__usrmodeControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__usrmodeControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void usrmodeControlSerialization_Epilogue_DISPATCH(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__usrmodeControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__usrmodeControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS usrmodeControl_Prologue_DISPATCH(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__usrmodeControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__usrmodeControl_Prologue__(pResource, pCallContext, pParams); } static inline void usrmodeControl_Epilogue_DISPATCH(struct UserModeApi *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__usrmodeControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__usrmodeControl_Epilogue__(pResource, pCallContext, pParams); } static inline void usrmodePreDestruct_DISPATCH(struct UserModeApi *pResource) { - pResource->__usrmodePreDestruct__(pResource); + pResource->__nvoc_vtable->__usrmodePreDestruct__(pResource); } static inline NV_STATUS usrmodeControlFilter_DISPATCH(struct UserModeApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__usrmodeControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__usrmodeControlFilter__(pResource, pCallContext, pParams); } static inline NvBool usrmodeIsPartialUnmapSupported_DISPATCH(struct UserModeApi *pResource) { - return pResource->__usrmodeIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__usrmodeIsPartialUnmapSupported__(pResource); } static inline NV_STATUS usrmodeMapTo_DISPATCH(struct UserModeApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__usrmodeMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__usrmodeMapTo__(pResource, pParams); } static inline NV_STATUS usrmodeUnmapFrom_DISPATCH(struct UserModeApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__usrmodeUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__usrmodeUnmapFrom__(pResource, pParams); } static inline NvU32 usrmodeGetRefCount_DISPATCH(struct UserModeApi *pResource) { - return pResource->__usrmodeGetRefCount__(pResource); + return pResource->__nvoc_vtable->__usrmodeGetRefCount__(pResource); } static inline void usrmodeAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct UserModeApi *pResource, RsResourceRef *pReference) { - pResource->__usrmodeAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__usrmodeAddAdditionalDependants__(pClient, pResource, pReference); } NvBool usrmodeCanCopy_IMPL(struct UserModeApi *pUserModeApi); diff --git a/src/nvidia/generated/g_uvm_channel_retainer_nvoc.c b/src/nvidia/generated/g_uvm_channel_retainer_nvoc.c index 9cae1b6522..05df91bac1 100644 --- a/src/nvidia/generated/g_uvm_channel_retainer_nvoc.c +++ b/src/nvidia/generated/g_uvm_channel_retainer_nvoc.c @@ -93,130 +93,198 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_UvmChannelRetainer = /*pExportInfo=*/ &__nvoc_export_info_UvmChannelRetainer }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrControl(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrMap(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrUnmap(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_uvmchanrtnrShareCallback(struct UvmChannelRetainer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrGetRegBaseOffsetAndSize(struct UvmChannelRetainer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrGetMapAddrSpace(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrInternalControlForward(struct UvmChannelRetainer *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_uvmchanrtnrGetInternalObjectHandle(struct UvmChannelRetainer *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_uvmchanrtnrAccessCallback(struct UvmChannelRetainer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_uvmchanrtnrGetMemInterMapParams(struct UvmChannelRetainer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_uvmchanrtnrCheckMemInterUnmap(struct UvmChannelRetainer *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_uvmchanrtnrGetMemoryMappingDescriptor(struct UvmChannelRetainer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_uvmchanrtnrControlSerialization_Prologue(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_uvmchanrtnrControlSerialization_Epilogue(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_uvmchanrtnrControl_Prologue(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_uvmchanrtnrControl_Epilogue(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_uvmchanrtnrCanCopy(struct UvmChannelRetainer *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_uvmchanrtnrIsDuplicate(struct UvmChannelRetainer *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_uvmchanrtnrPreDestruct(struct UvmChannelRetainer *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_uvmchanrtnrControlFilter(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_uvmchanrtnrIsPartialUnmapSupported(struct UvmChannelRetainer *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_uvmchanrtnrMapTo(struct UvmChannelRetainer *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_uvmchanrtnrUnmapFrom(struct UvmChannelRetainer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_uvmchanrtnrGetRefCount(struct UvmChannelRetainer *pResource); // this +void __nvoc_up_thunk_RsResource_uvmchanrtnrAddAdditionalDependants(struct RsClient *pClient, struct UvmChannelRetainer *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in UvmChannelRetainer to superclasses // uvmchanrtnrControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrControl(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrControl(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset), pCallContext, pParams); } // uvmchanrtnrMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrMap(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrMap(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // uvmchanrtnrUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrUnmap(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrUnmap(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset), pCallContext, pCpuMapping); } // uvmchanrtnrShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_uvmchanrtnrShareCallback(struct UvmChannelRetainer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_uvmchanrtnrShareCallback(struct UvmChannelRetainer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // uvmchanrtnrGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrGetRegBaseOffsetAndSize(struct UvmChannelRetainer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrGetRegBaseOffsetAndSize(struct UvmChannelRetainer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset), pGpu, pOffset, pSize); } // uvmchanrtnrGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrGetMapAddrSpace(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrGetMapAddrSpace(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // uvmchanrtnrInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrInternalControlForward(struct UvmChannelRetainer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_uvmchanrtnrInternalControlForward(struct UvmChannelRetainer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset), command, pParams, size); } // uvmchanrtnrGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_uvmchanrtnrGetInternalObjectHandle(struct UvmChannelRetainer *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_uvmchanrtnrGetInternalObjectHandle(struct UvmChannelRetainer *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmChannelRetainer_GpuResource.offset)); } // uvmchanrtnrAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_uvmchanrtnrAccessCallback(struct UvmChannelRetainer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_uvmchanrtnrAccessCallback(struct UvmChannelRetainer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // uvmchanrtnrGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_uvmchanrtnrGetMemInterMapParams(struct UvmChannelRetainer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_uvmchanrtnrGetMemInterMapParams(struct UvmChannelRetainer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), pParams); } // uvmchanrtnrCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_uvmchanrtnrCheckMemInterUnmap(struct UvmChannelRetainer *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_uvmchanrtnrCheckMemInterUnmap(struct UvmChannelRetainer *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), bSubdeviceHandleProvided); } // uvmchanrtnrGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_uvmchanrtnrGetMemoryMappingDescriptor(struct UvmChannelRetainer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_uvmchanrtnrGetMemoryMappingDescriptor(struct UvmChannelRetainer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), ppMemDesc); } // uvmchanrtnrControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_uvmchanrtnrControlSerialization_Prologue(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_uvmchanrtnrControlSerialization_Prologue(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), pCallContext, pParams); } // uvmchanrtnrControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_uvmchanrtnrControlSerialization_Epilogue(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_uvmchanrtnrControlSerialization_Epilogue(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), pCallContext, pParams); } // uvmchanrtnrControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_uvmchanrtnrControl_Prologue(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_uvmchanrtnrControl_Prologue(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), pCallContext, pParams); } // uvmchanrtnrControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_uvmchanrtnrControl_Epilogue(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_uvmchanrtnrControl_Epilogue(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RmResource.offset), pCallContext, pParams); } // uvmchanrtnrCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_uvmchanrtnrCanCopy(struct UvmChannelRetainer *pResource) { +NvBool __nvoc_up_thunk_RsResource_uvmchanrtnrCanCopy(struct UvmChannelRetainer *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset)); } // uvmchanrtnrIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_uvmchanrtnrIsDuplicate(struct UvmChannelRetainer *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_uvmchanrtnrIsDuplicate(struct UvmChannelRetainer *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset), hMemory, pDuplicate); } // uvmchanrtnrPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_uvmchanrtnrPreDestruct(struct UvmChannelRetainer *pResource) { +void __nvoc_up_thunk_RsResource_uvmchanrtnrPreDestruct(struct UvmChannelRetainer *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset)); } // uvmchanrtnrControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_uvmchanrtnrControlFilter(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_uvmchanrtnrControlFilter(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset), pCallContext, pParams); } // uvmchanrtnrIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_uvmchanrtnrIsPartialUnmapSupported(struct UvmChannelRetainer *pResource) { +NvBool __nvoc_up_thunk_RsResource_uvmchanrtnrIsPartialUnmapSupported(struct UvmChannelRetainer *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset)); } // uvmchanrtnrMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_uvmchanrtnrMapTo(struct UvmChannelRetainer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_uvmchanrtnrMapTo(struct UvmChannelRetainer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset), pParams); } // uvmchanrtnrUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_uvmchanrtnrUnmapFrom(struct UvmChannelRetainer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_uvmchanrtnrUnmapFrom(struct UvmChannelRetainer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset), pParams); } // uvmchanrtnrGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_uvmchanrtnrGetRefCount(struct UvmChannelRetainer *pResource) { +NvU32 __nvoc_up_thunk_RsResource_uvmchanrtnrGetRefCount(struct UvmChannelRetainer *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset)); } // uvmchanrtnrAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_uvmchanrtnrAddAdditionalDependants(struct RsClient *pClient, struct UvmChannelRetainer *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_uvmchanrtnrAddAdditionalDependants(struct RsClient *pClient, struct UvmChannelRetainer *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmChannelRetainer_RsResource.offset), pReference); } @@ -270,88 +338,110 @@ static void __nvoc_init_funcTable_UvmChannelRetainer_1(UvmChannelRetainer *pThis PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - - // uvmchanrtnrControl -- virtual inherited (gpures) base (gpures) - pThis->__uvmchanrtnrControl__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrControl; - - // uvmchanrtnrMap -- virtual inherited (gpures) base (gpures) - pThis->__uvmchanrtnrMap__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrMap; - - // uvmchanrtnrUnmap -- virtual inherited (gpures) base (gpures) - pThis->__uvmchanrtnrUnmap__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrUnmap; - - // uvmchanrtnrShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__uvmchanrtnrShareCallback__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrShareCallback; - - // uvmchanrtnrGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__uvmchanrtnrGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrGetRegBaseOffsetAndSize; - - // uvmchanrtnrGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__uvmchanrtnrGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrGetMapAddrSpace; - - // uvmchanrtnrInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__uvmchanrtnrInternalControlForward__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrInternalControlForward; - - // uvmchanrtnrGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__uvmchanrtnrGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrGetInternalObjectHandle; - - // uvmchanrtnrAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__uvmchanrtnrAccessCallback__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrAccessCallback; - - // uvmchanrtnrGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__uvmchanrtnrGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrGetMemInterMapParams; - - // uvmchanrtnrCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__uvmchanrtnrCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrCheckMemInterUnmap; - - // uvmchanrtnrGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__uvmchanrtnrGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrGetMemoryMappingDescriptor; - - // uvmchanrtnrControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__uvmchanrtnrControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrControlSerialization_Prologue; - - // uvmchanrtnrControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__uvmchanrtnrControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrControlSerialization_Epilogue; - - // uvmchanrtnrControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__uvmchanrtnrControl_Prologue__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrControl_Prologue; - - // uvmchanrtnrControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__uvmchanrtnrControl_Epilogue__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrControl_Epilogue; - - // uvmchanrtnrCanCopy -- virtual inherited (res) base (gpures) - pThis->__uvmchanrtnrCanCopy__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrCanCopy; - - // uvmchanrtnrIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__uvmchanrtnrIsDuplicate__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrIsDuplicate; - - // uvmchanrtnrPreDestruct -- virtual inherited (res) base (gpures) - pThis->__uvmchanrtnrPreDestruct__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrPreDestruct; - - // uvmchanrtnrControlFilter -- virtual inherited (res) base (gpures) - pThis->__uvmchanrtnrControlFilter__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrControlFilter; - - // uvmchanrtnrIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__uvmchanrtnrIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrIsPartialUnmapSupported; - - // uvmchanrtnrMapTo -- virtual inherited (res) base (gpures) - pThis->__uvmchanrtnrMapTo__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrMapTo; - - // uvmchanrtnrUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__uvmchanrtnrUnmapFrom__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrUnmapFrom; - - // uvmchanrtnrGetRefCount -- virtual inherited (res) base (gpures) - pThis->__uvmchanrtnrGetRefCount__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrGetRefCount; - - // uvmchanrtnrAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__uvmchanrtnrAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrAddAdditionalDependants; -} // End __nvoc_init_funcTable_UvmChannelRetainer_1 with approximately 25 basic block(s). +} // End __nvoc_init_funcTable_UvmChannelRetainer_1 // Initialize vtable(s) for 25 virtual method(s). void __nvoc_init_funcTable_UvmChannelRetainer(UvmChannelRetainer *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 25 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__UvmChannelRetainer vtable = { + .__uvmchanrtnrControl__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__uvmchanrtnrMap__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__uvmchanrtnrUnmap__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__uvmchanrtnrShareCallback__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__uvmchanrtnrGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__uvmchanrtnrGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__uvmchanrtnrInternalControlForward__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__uvmchanrtnrGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_uvmchanrtnrGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__uvmchanrtnrAccessCallback__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__uvmchanrtnrGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__uvmchanrtnrCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__uvmchanrtnrGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__uvmchanrtnrControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__uvmchanrtnrControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__uvmchanrtnrControl_Prologue__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__uvmchanrtnrControl_Epilogue__ = &__nvoc_up_thunk_RmResource_uvmchanrtnrControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__uvmchanrtnrCanCopy__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__uvmchanrtnrIsDuplicate__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__uvmchanrtnrPreDestruct__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__uvmchanrtnrControlFilter__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__uvmchanrtnrIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__uvmchanrtnrMapTo__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__uvmchanrtnrUnmapFrom__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__uvmchanrtnrGetRefCount__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__uvmchanrtnrAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_uvmchanrtnrAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (uvmchanrtnr) this __nvoc_init_funcTable_UvmChannelRetainer_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_uvm_channel_retainer_nvoc.h b/src/nvidia/generated/g_uvm_channel_retainer_nvoc.h index b97129af68..f3a1011113 100644 --- a/src/nvidia/generated/g_uvm_channel_retainer_nvoc.h +++ b/src/nvidia/generated/g_uvm_channel_retainer_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -74,10 +74,15 @@ typedef struct OBJGPU OBJGPU; #endif +// Metadata including vtable +struct NVOC_VTABLE__UvmChannelRetainer; + + struct UvmChannelRetainer { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__UvmChannelRetainer *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -90,7 +95,17 @@ struct UvmChannelRetainer { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct UvmChannelRetainer *__nvoc_pbase_UvmChannelRetainer; // uvmchanrtnr - // Vtable with 25 per-object function pointers + // Data members + MEMORY_DESCRIPTOR *pInstMemDesc; + NvU32 chId; + NvU32 runlistId; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__UvmChannelRetainer { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + NV_STATUS (*__uvmchanrtnrControl__)(struct UvmChannelRetainer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__uvmchanrtnrMap__)(struct UvmChannelRetainer * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__uvmchanrtnrUnmap__)(struct UvmChannelRetainer * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -116,11 +131,6 @@ struct UvmChannelRetainer { NV_STATUS (*__uvmchanrtnrUnmapFrom__)(struct UvmChannelRetainer * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__uvmchanrtnrGetRefCount__)(struct UvmChannelRetainer * /*this*/); // virtual inherited (res) base (gpures) void (*__uvmchanrtnrAddAdditionalDependants__)(struct RsClient *, struct UvmChannelRetainer * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - MEMORY_DESCRIPTOR *pInstMemDesc; - NvU32 chId; - NvU32 runlistId; }; #ifndef __NVOC_CLASS_UvmChannelRetainer_TYPEDEF__ @@ -153,156 +163,156 @@ NV_STATUS __nvoc_objCreate_UvmChannelRetainer(UvmChannelRetainer**, Dynamic*, Nv // Wrapper macros -#define uvmchanrtnrControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define uvmchanrtnrControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define uvmchanrtnrControl(pGpuResource, pCallContext, pParams) uvmchanrtnrControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define uvmchanrtnrMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define uvmchanrtnrMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define uvmchanrtnrMap(pGpuResource, pCallContext, pParams, pCpuMapping) uvmchanrtnrMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define uvmchanrtnrUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define uvmchanrtnrUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define uvmchanrtnrUnmap(pGpuResource, pCallContext, pCpuMapping) uvmchanrtnrUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define uvmchanrtnrShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define uvmchanrtnrShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define uvmchanrtnrShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) uvmchanrtnrShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define uvmchanrtnrGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define uvmchanrtnrGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define uvmchanrtnrGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) uvmchanrtnrGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define uvmchanrtnrGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define uvmchanrtnrGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define uvmchanrtnrGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) uvmchanrtnrGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define uvmchanrtnrInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define uvmchanrtnrInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define uvmchanrtnrInternalControlForward(pGpuResource, command, pParams, size) uvmchanrtnrInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define uvmchanrtnrGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define uvmchanrtnrGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define uvmchanrtnrGetInternalObjectHandle(pGpuResource) uvmchanrtnrGetInternalObjectHandle_DISPATCH(pGpuResource) -#define uvmchanrtnrAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define uvmchanrtnrAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define uvmchanrtnrAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) uvmchanrtnrAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define uvmchanrtnrGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define uvmchanrtnrGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define uvmchanrtnrGetMemInterMapParams(pRmResource, pParams) uvmchanrtnrGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define uvmchanrtnrCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define uvmchanrtnrCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define uvmchanrtnrCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) uvmchanrtnrCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define uvmchanrtnrGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define uvmchanrtnrGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define uvmchanrtnrGetMemoryMappingDescriptor(pRmResource, ppMemDesc) uvmchanrtnrGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define uvmchanrtnrControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define uvmchanrtnrControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define uvmchanrtnrControlSerialization_Prologue(pResource, pCallContext, pParams) uvmchanrtnrControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define uvmchanrtnrControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define uvmchanrtnrControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define uvmchanrtnrControlSerialization_Epilogue(pResource, pCallContext, pParams) uvmchanrtnrControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define uvmchanrtnrControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define uvmchanrtnrControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define uvmchanrtnrControl_Prologue(pResource, pCallContext, pParams) uvmchanrtnrControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define uvmchanrtnrControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define uvmchanrtnrControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define uvmchanrtnrControl_Epilogue(pResource, pCallContext, pParams) uvmchanrtnrControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define uvmchanrtnrCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define uvmchanrtnrCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define uvmchanrtnrCanCopy(pResource) uvmchanrtnrCanCopy_DISPATCH(pResource) -#define uvmchanrtnrIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define uvmchanrtnrIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define uvmchanrtnrIsDuplicate(pResource, hMemory, pDuplicate) uvmchanrtnrIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define uvmchanrtnrPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define uvmchanrtnrPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define uvmchanrtnrPreDestruct(pResource) uvmchanrtnrPreDestruct_DISPATCH(pResource) -#define uvmchanrtnrControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define uvmchanrtnrControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define uvmchanrtnrControlFilter(pResource, pCallContext, pParams) uvmchanrtnrControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define uvmchanrtnrIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define uvmchanrtnrIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define uvmchanrtnrIsPartialUnmapSupported(pResource) uvmchanrtnrIsPartialUnmapSupported_DISPATCH(pResource) -#define uvmchanrtnrMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define uvmchanrtnrMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define uvmchanrtnrMapTo(pResource, pParams) uvmchanrtnrMapTo_DISPATCH(pResource, pParams) -#define uvmchanrtnrUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define uvmchanrtnrUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define uvmchanrtnrUnmapFrom(pResource, pParams) uvmchanrtnrUnmapFrom_DISPATCH(pResource, pParams) -#define uvmchanrtnrGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define uvmchanrtnrGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define uvmchanrtnrGetRefCount(pResource) uvmchanrtnrGetRefCount_DISPATCH(pResource) -#define uvmchanrtnrAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define uvmchanrtnrAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define uvmchanrtnrAddAdditionalDependants(pClient, pResource, pReference) uvmchanrtnrAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NV_STATUS uvmchanrtnrControl_DISPATCH(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__uvmchanrtnrControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__uvmchanrtnrControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS uvmchanrtnrMap_DISPATCH(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__uvmchanrtnrMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__uvmchanrtnrMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS uvmchanrtnrUnmap_DISPATCH(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__uvmchanrtnrUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__uvmchanrtnrUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool uvmchanrtnrShareCallback_DISPATCH(struct UvmChannelRetainer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__uvmchanrtnrShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__uvmchanrtnrShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS uvmchanrtnrGetRegBaseOffsetAndSize_DISPATCH(struct UvmChannelRetainer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__uvmchanrtnrGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__uvmchanrtnrGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS uvmchanrtnrGetMapAddrSpace_DISPATCH(struct UvmChannelRetainer *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__uvmchanrtnrGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__uvmchanrtnrGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS uvmchanrtnrInternalControlForward_DISPATCH(struct UvmChannelRetainer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__uvmchanrtnrInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__uvmchanrtnrInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle uvmchanrtnrGetInternalObjectHandle_DISPATCH(struct UvmChannelRetainer *pGpuResource) { - return pGpuResource->__uvmchanrtnrGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__uvmchanrtnrGetInternalObjectHandle__(pGpuResource); } static inline NvBool uvmchanrtnrAccessCallback_DISPATCH(struct UvmChannelRetainer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__uvmchanrtnrAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__uvmchanrtnrAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS uvmchanrtnrGetMemInterMapParams_DISPATCH(struct UvmChannelRetainer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__uvmchanrtnrGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__uvmchanrtnrGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS uvmchanrtnrCheckMemInterUnmap_DISPATCH(struct UvmChannelRetainer *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__uvmchanrtnrCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__uvmchanrtnrCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS uvmchanrtnrGetMemoryMappingDescriptor_DISPATCH(struct UvmChannelRetainer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__uvmchanrtnrGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__uvmchanrtnrGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS uvmchanrtnrControlSerialization_Prologue_DISPATCH(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__uvmchanrtnrControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__uvmchanrtnrControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void uvmchanrtnrControlSerialization_Epilogue_DISPATCH(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__uvmchanrtnrControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__uvmchanrtnrControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS uvmchanrtnrControl_Prologue_DISPATCH(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__uvmchanrtnrControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__uvmchanrtnrControl_Prologue__(pResource, pCallContext, pParams); } static inline void uvmchanrtnrControl_Epilogue_DISPATCH(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__uvmchanrtnrControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__uvmchanrtnrControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool uvmchanrtnrCanCopy_DISPATCH(struct UvmChannelRetainer *pResource) { - return pResource->__uvmchanrtnrCanCopy__(pResource); + return pResource->__nvoc_vtable->__uvmchanrtnrCanCopy__(pResource); } static inline NV_STATUS uvmchanrtnrIsDuplicate_DISPATCH(struct UvmChannelRetainer *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__uvmchanrtnrIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__uvmchanrtnrIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void uvmchanrtnrPreDestruct_DISPATCH(struct UvmChannelRetainer *pResource) { - pResource->__uvmchanrtnrPreDestruct__(pResource); + pResource->__nvoc_vtable->__uvmchanrtnrPreDestruct__(pResource); } static inline NV_STATUS uvmchanrtnrControlFilter_DISPATCH(struct UvmChannelRetainer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__uvmchanrtnrControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__uvmchanrtnrControlFilter__(pResource, pCallContext, pParams); } static inline NvBool uvmchanrtnrIsPartialUnmapSupported_DISPATCH(struct UvmChannelRetainer *pResource) { - return pResource->__uvmchanrtnrIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__uvmchanrtnrIsPartialUnmapSupported__(pResource); } static inline NV_STATUS uvmchanrtnrMapTo_DISPATCH(struct UvmChannelRetainer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__uvmchanrtnrMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__uvmchanrtnrMapTo__(pResource, pParams); } static inline NV_STATUS uvmchanrtnrUnmapFrom_DISPATCH(struct UvmChannelRetainer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__uvmchanrtnrUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__uvmchanrtnrUnmapFrom__(pResource, pParams); } static inline NvU32 uvmchanrtnrGetRefCount_DISPATCH(struct UvmChannelRetainer *pResource) { - return pResource->__uvmchanrtnrGetRefCount__(pResource); + return pResource->__nvoc_vtable->__uvmchanrtnrGetRefCount__(pResource); } static inline void uvmchanrtnrAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct UvmChannelRetainer *pResource, RsResourceRef *pReference) { - pResource->__uvmchanrtnrAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__uvmchanrtnrAddAdditionalDependants__(pClient, pResource, pReference); } NvBool uvmchanrtnrIsAllocationAllowed_IMPL(struct UvmChannelRetainer *pUvmChannelRetainer, CALL_CONTEXT *pCallContext, struct KernelChannel *pKernelChannel); diff --git a/src/nvidia/generated/g_uvm_nvoc.c b/src/nvidia/generated/g_uvm_nvoc.c index 82f63c64bc..dec616ef87 100644 --- a/src/nvidia/generated/g_uvm_nvoc.c +++ b/src/nvidia/generated/g_uvm_nvoc.c @@ -75,98 +75,120 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJUVM = /*pExportInfo=*/ &__nvoc_export_info_OBJUVM }; +// Down-thunk(s) to bridge methods from ancestors (if any) +void __nvoc_down_thunk_OBJUVM_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pUvm); // this +NV_STATUS __nvoc_down_thunk_OBJUVM_engstateStateInitUnlocked(OBJGPU *pGpu, struct OBJENGSTATE *pUvm); // this +void __nvoc_down_thunk_OBJUVM_intrservRegisterIntrService(OBJGPU *arg1, struct IntrService *pUvm, IntrServiceRecord arg3[175]); // this +NvU32 __nvoc_down_thunk_OBJUVM_intrservServiceInterrupt(OBJGPU *arg1, struct IntrService *pUvm, IntrServiceServiceInterruptArguments *arg3); // this + // 4 down-thunk(s) defined to bridge methods in OBJUVM from superclasses // uvmStateDestroy: virtual override (engstate) base (engstate) -static void __nvoc_down_thunk_OBJUVM_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pUvm) { +void __nvoc_down_thunk_OBJUVM_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pUvm) { uvmStateDestroy(pGpu, (struct OBJUVM *)(((unsigned char *) pUvm) - __nvoc_rtti_OBJUVM_OBJENGSTATE.offset)); } // uvmStateInitUnlocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_OBJUVM_engstateStateInitUnlocked(OBJGPU *pGpu, struct OBJENGSTATE *pUvm) { +NV_STATUS __nvoc_down_thunk_OBJUVM_engstateStateInitUnlocked(OBJGPU *pGpu, struct OBJENGSTATE *pUvm) { return uvmStateInitUnlocked(pGpu, (struct OBJUVM *)(((unsigned char *) pUvm) - __nvoc_rtti_OBJUVM_OBJENGSTATE.offset)); } // uvmRegisterIntrService: virtual override (intrserv) base (intrserv) -static void __nvoc_down_thunk_OBJUVM_intrservRegisterIntrService(OBJGPU *arg1, struct IntrService *pUvm, IntrServiceRecord arg3[175]) { +void __nvoc_down_thunk_OBJUVM_intrservRegisterIntrService(OBJGPU *arg1, struct IntrService *pUvm, IntrServiceRecord arg3[175]) { uvmRegisterIntrService(arg1, (struct OBJUVM *)(((unsigned char *) pUvm) - __nvoc_rtti_OBJUVM_IntrService.offset), arg3); } // uvmServiceInterrupt: virtual override (intrserv) base (intrserv) -static NvU32 __nvoc_down_thunk_OBJUVM_intrservServiceInterrupt(OBJGPU *arg1, struct IntrService *pUvm, IntrServiceServiceInterruptArguments *arg3) { +NvU32 __nvoc_down_thunk_OBJUVM_intrservServiceInterrupt(OBJGPU *arg1, struct IntrService *pUvm, IntrServiceServiceInterruptArguments *arg3) { return uvmServiceInterrupt(arg1, (struct OBJUVM *)(((unsigned char *) pUvm) - __nvoc_rtti_OBJUVM_IntrService.offset), arg3); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmConstructEngine(OBJGPU *pGpu, struct OBJUVM *pEngstate, ENGDESCRIPTOR arg3); // this +void __nvoc_up_thunk_OBJENGSTATE_uvmInitMissing(OBJGPU *pGpu, struct OBJUVM *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePreInitLocked(OBJGPU *pGpu, struct OBJUVM *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePreInitUnlocked(OBJGPU *pGpu, struct OBJUVM *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStateInitLocked(OBJGPU *pGpu, struct OBJUVM *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePreLoad(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStateLoad(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePostLoad(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePreUnload(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStateUnload(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePostUnload(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_uvmIsPresent(OBJGPU *pGpu, struct OBJUVM *pEngstate); // this +NvBool __nvoc_up_thunk_IntrService_uvmClearInterrupt(OBJGPU *pGpu, struct OBJUVM *pIntrService, IntrServiceClearInterruptArguments *pParams); // this +NV_STATUS __nvoc_up_thunk_IntrService_uvmServiceNotificationInterrupt(OBJGPU *pGpu, struct OBJUVM *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams); // this + // 14 up-thunk(s) defined to bridge methods in OBJUVM to superclasses // uvmConstructEngine: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmConstructEngine(OBJGPU *pGpu, struct OBJUVM *pEngstate, ENGDESCRIPTOR arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmConstructEngine(OBJGPU *pGpu, struct OBJUVM *pEngstate, ENGDESCRIPTOR arg3) { return engstateConstructEngine(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset), arg3); } // uvmInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_uvmInitMissing(OBJGPU *pGpu, struct OBJUVM *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_uvmInitMissing(OBJGPU *pGpu, struct OBJUVM *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset)); } // uvmStatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePreInitLocked(OBJGPU *pGpu, struct OBJUVM *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePreInitLocked(OBJGPU *pGpu, struct OBJUVM *pEngstate) { return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset)); } // uvmStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePreInitUnlocked(OBJGPU *pGpu, struct OBJUVM *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePreInitUnlocked(OBJGPU *pGpu, struct OBJUVM *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset)); } // uvmStateInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStateInitLocked(OBJGPU *pGpu, struct OBJUVM *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStateInitLocked(OBJGPU *pGpu, struct OBJUVM *pEngstate) { return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset)); } // uvmStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePreLoad(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePreLoad(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset), arg3); } // uvmStateLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStateLoad(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStateLoad(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset), arg3); } // uvmStatePostLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePostLoad(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePostLoad(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset), arg3); } // uvmStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePreUnload(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePreUnload(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset), arg3); } // uvmStateUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStateUnload(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStateUnload(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset), arg3); } // uvmStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePostUnload(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_uvmStatePostUnload(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset), arg3); } // uvmIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_uvmIsPresent(OBJGPU *pGpu, struct OBJUVM *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_uvmIsPresent(OBJGPU *pGpu, struct OBJUVM *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_OBJUVM_OBJENGSTATE.offset)); } // uvmClearInterrupt: virtual inherited (intrserv) base (intrserv) -static NvBool __nvoc_up_thunk_IntrService_uvmClearInterrupt(OBJGPU *pGpu, struct OBJUVM *pIntrService, IntrServiceClearInterruptArguments *pParams) { +NvBool __nvoc_up_thunk_IntrService_uvmClearInterrupt(OBJGPU *pGpu, struct OBJUVM *pIntrService, IntrServiceClearInterruptArguments *pParams) { return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_OBJUVM_IntrService.offset), pParams); } // uvmServiceNotificationInterrupt: virtual inherited (intrserv) base (intrserv) -static NV_STATUS __nvoc_up_thunk_IntrService_uvmServiceNotificationInterrupt(OBJGPU *pGpu, struct OBJUVM *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { +NV_STATUS __nvoc_up_thunk_IntrService_uvmServiceNotificationInterrupt(OBJGPU *pGpu, struct OBJUVM *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { return intrservServiceNotificationInterrupt(pGpu, (struct IntrService *)(((unsigned char *) pIntrService) + __nvoc_rtti_OBJUVM_IntrService.offset), pParams); } @@ -241,14 +263,6 @@ static void __nvoc_init_funcTable_OBJUVM_1(OBJUVM *pThis, RmHalspecOwner *pRmhal PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // uvmStateDestroy -- virtual override (engstate) base (engstate) - pThis->__uvmStateDestroy__ = &uvmStateDestroy_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_OBJUVM_engstateStateDestroy; - - // uvmStateInitUnlocked -- virtual override (engstate) base (engstate) - pThis->__uvmStateInitUnlocked__ = &uvmStateInitUnlocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ = &__nvoc_down_thunk_OBJUVM_engstateStateInitUnlocked; - // uvmAccessCntrBufferUnregister -- halified (2 hals) if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */ { @@ -279,14 +293,6 @@ static void __nvoc_init_funcTable_OBJUVM_1(OBJUVM *pThis, RmHalspecOwner *pRmhal pThis->__uvmAccessCntrSetCounterLimit__ = &uvmAccessCntrSetCounterLimit_GV100; } - // uvmRegisterIntrService -- virtual override (intrserv) base (intrserv) - pThis->__uvmRegisterIntrService__ = &uvmRegisterIntrService_IMPL; - pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_OBJUVM_intrservRegisterIntrService; - - // uvmServiceInterrupt -- virtual override (intrserv) base (intrserv) - pThis->__uvmServiceInterrupt__ = &uvmServiceInterrupt_IMPL; - pThis->__nvoc_base_IntrService.__intrservServiceInterrupt__ = &__nvoc_down_thunk_OBJUVM_intrservServiceInterrupt; - // uvmGetRegOffsetAccessCntrBufferPut -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x40000000UL) )) /* ChipHal: GB100 */ { @@ -356,55 +362,58 @@ static void __nvoc_init_funcTable_OBJUVM_1(OBJUVM *pThis, RmHalspecOwner *pRmhal { pThis->__uvmGetRegOffsetAccessCntrBufferSize__ = &uvmGetRegOffsetAccessCntrBufferSize_TU102; } - - // uvmConstructEngine -- virtual inherited (engstate) base (engstate) - pThis->__uvmConstructEngine__ = &__nvoc_up_thunk_OBJENGSTATE_uvmConstructEngine; - - // uvmInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__uvmInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_uvmInitMissing; - - // uvmStatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__uvmStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStatePreInitLocked; - - // uvmStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__uvmStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStatePreInitUnlocked; - - // uvmStateInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__uvmStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStateInitLocked; - - // uvmStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__uvmStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStatePreLoad; - - // uvmStateLoad -- virtual inherited (engstate) base (engstate) - pThis->__uvmStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStateLoad; - - // uvmStatePostLoad -- virtual inherited (engstate) base (engstate) - pThis->__uvmStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStatePostLoad; - - // uvmStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__uvmStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStatePreUnload; - - // uvmStateUnload -- virtual inherited (engstate) base (engstate) - pThis->__uvmStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStateUnload; - - // uvmStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__uvmStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStatePostUnload; - - // uvmIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__uvmIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_uvmIsPresent; - - // uvmClearInterrupt -- virtual inherited (intrserv) base (intrserv) - pThis->__uvmClearInterrupt__ = &__nvoc_up_thunk_IntrService_uvmClearInterrupt; - - // uvmServiceNotificationInterrupt -- virtual inherited (intrserv) base (intrserv) - pThis->__uvmServiceNotificationInterrupt__ = &__nvoc_up_thunk_IntrService_uvmServiceNotificationInterrupt; -} // End __nvoc_init_funcTable_OBJUVM_1 with approximately 42 basic block(s). +} // End __nvoc_init_funcTable_OBJUVM_1 with approximately 20 basic block(s). // Initialize vtable(s) for 28 virtual method(s). void __nvoc_init_funcTable_OBJUVM(OBJUVM *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 28 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__OBJUVM vtable = { + .__uvmStateDestroy__ = &uvmStateDestroy_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_down_thunk_OBJUVM_engstateStateDestroy, // virtual + .__uvmStateInitUnlocked__ = &uvmStateInitUnlocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &__nvoc_down_thunk_OBJUVM_engstateStateInitUnlocked, // virtual + .__uvmRegisterIntrService__ = &uvmRegisterIntrService_IMPL, // virtual override (intrserv) base (intrserv) + .IntrService.__intrservRegisterIntrService__ = &__nvoc_down_thunk_OBJUVM_intrservRegisterIntrService, // virtual + .__uvmServiceInterrupt__ = &uvmServiceInterrupt_IMPL, // virtual override (intrserv) base (intrserv) + .IntrService.__intrservServiceInterrupt__ = &__nvoc_down_thunk_OBJUVM_intrservServiceInterrupt, // virtual + .__uvmConstructEngine__ = &__nvoc_up_thunk_OBJENGSTATE_uvmConstructEngine, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &engstateConstructEngine_IMPL, // virtual + .__uvmInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_uvmInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__uvmStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStatePreInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__uvmStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__uvmStateInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStateInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &engstateStateInitLocked_IMPL, // virtual + .__uvmStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__uvmStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStateLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &engstateStateLoad_IMPL, // virtual + .__uvmStatePostLoad__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStatePostLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostLoad__ = &engstateStatePostLoad_IMPL, // virtual + .__uvmStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__uvmStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStateUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &engstateStateUnload_IMPL, // virtual + .__uvmStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_uvmStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__uvmIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_uvmIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + .__uvmClearInterrupt__ = &__nvoc_up_thunk_IntrService_uvmClearInterrupt, // virtual inherited (intrserv) base (intrserv) + .IntrService.__intrservClearInterrupt__ = &intrservClearInterrupt_IMPL, // virtual + .__uvmServiceNotificationInterrupt__ = &__nvoc_up_thunk_IntrService_uvmServiceNotificationInterrupt, // virtual inherited (intrserv) base (intrserv) + .IntrService.__intrservServiceNotificationInterrupt__ = &intrservServiceNotificationInterrupt_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_base_IntrService.__nvoc_vtable = &vtable.IntrService; // (intrserv) super + pThis->__nvoc_vtable = &vtable; // (uvm) this + + // Initialize vtable(s) with 10 per-object function pointer(s). __nvoc_init_funcTable_OBJUVM_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_uvm_nvoc.h b/src/nvidia/generated/g_uvm_nvoc.h index 6af41435cb..ced4b15c16 100644 --- a/src/nvidia/generated/g_uvm_nvoc.h +++ b/src/nvidia/generated/g_uvm_nvoc.h @@ -7,14 +7,14 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2012-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2012-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -116,10 +116,15 @@ typedef enum #endif +// Metadata including vtable +struct NVOC_VTABLE__OBJUVM; + + struct OBJUVM { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__OBJUVM *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -131,14 +136,10 @@ struct OBJUVM { struct IntrService *__nvoc_pbase_IntrService; // intrserv super struct OBJUVM *__nvoc_pbase_OBJUVM; // uvm - // Vtable with 28 per-object function pointers - void (*__uvmStateDestroy__)(OBJGPU *, struct OBJUVM * /*this*/); // virtual override (engstate) base (engstate) - NV_STATUS (*__uvmStateInitUnlocked__)(OBJGPU *, struct OBJUVM * /*this*/); // virtual override (engstate) base (engstate) + // Vtable with 10 per-object function pointers NV_STATUS (*__uvmAccessCntrBufferUnregister__)(OBJGPU *, struct OBJUVM * /*this*/, NvU32); // halified (2 hals) NV_STATUS (*__uvmAccessCntrBufferRegister__)(OBJGPU *, struct OBJUVM * /*this*/, NvU32, NvU32, RmPhysAddr *); // halified (2 hals) NV_STATUS (*__uvmAccessCntrSetCounterLimit__)(OBJGPU *, struct OBJUVM * /*this*/, NvU32, NvU32, NvU32); // halified (2 hals) body - void (*__uvmRegisterIntrService__)(OBJGPU *, struct OBJUVM * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) - NvU32 (*__uvmServiceInterrupt__)(OBJGPU *, struct OBJUVM * /*this*/, IntrServiceServiceInterruptArguments *); // virtual override (intrserv) base (intrserv) NvU32 (*__uvmGetRegOffsetAccessCntrBufferPut__)(struct OBJUVM * /*this*/, NvU32); // halified (2 hals) body NvU32 (*__uvmGetRegOffsetAccessCntrBufferGet__)(struct OBJUVM * /*this*/, NvU32); // halified (2 hals) body NvU32 (*__uvmGetRegOffsetAccessCntrBufferHi__)(struct OBJUVM * /*this*/, NvU32); // halified (2 hals) body @@ -146,6 +147,25 @@ struct OBJUVM { NvU32 (*__uvmGetRegOffsetAccessCntrBufferConfig__)(struct OBJUVM * /*this*/, NvU32); // halified (2 hals) body NvU32 (*__uvmGetRegOffsetAccessCntrBufferInfo__)(struct OBJUVM * /*this*/, NvU32); // halified (2 hals) body NvU32 (*__uvmGetRegOffsetAccessCntrBufferSize__)(struct OBJUVM * /*this*/, NvU32); // halified (2 hals) body + + // Data members + ACCESS_CNTR_BUFFER *pAccessCounterBuffers; + NvU32 accessCounterBufferCount; + NvHandle hClient; + NvHandle hSubdevice; + RM_API *pRmApi; +}; + + +// Metadata including vtable with 18 function pointers plus superclass metadata +struct NVOC_VTABLE__OBJUVM { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + const struct NVOC_VTABLE__IntrService IntrService; // (intrserv) 4 function pointers + + void (*__uvmStateDestroy__)(OBJGPU *, struct OBJUVM * /*this*/); // virtual override (engstate) base (engstate) + NV_STATUS (*__uvmStateInitUnlocked__)(OBJGPU *, struct OBJUVM * /*this*/); // virtual override (engstate) base (engstate) + void (*__uvmRegisterIntrService__)(OBJGPU *, struct OBJUVM * /*this*/, IntrServiceRecord *); // virtual override (intrserv) base (intrserv) + NvU32 (*__uvmServiceInterrupt__)(OBJGPU *, struct OBJUVM * /*this*/, IntrServiceServiceInterruptArguments *); // virtual override (intrserv) base (intrserv) NV_STATUS (*__uvmConstructEngine__)(OBJGPU *, struct OBJUVM * /*this*/, ENGDESCRIPTOR); // virtual inherited (engstate) base (engstate) void (*__uvmInitMissing__)(OBJGPU *, struct OBJUVM * /*this*/); // virtual inherited (engstate) base (engstate) NV_STATUS (*__uvmStatePreInitLocked__)(OBJGPU *, struct OBJUVM * /*this*/); // virtual inherited (engstate) base (engstate) @@ -160,13 +180,6 @@ struct OBJUVM { NvBool (*__uvmIsPresent__)(OBJGPU *, struct OBJUVM * /*this*/); // virtual inherited (engstate) base (engstate) NvBool (*__uvmClearInterrupt__)(OBJGPU *, struct OBJUVM * /*this*/, IntrServiceClearInterruptArguments *); // virtual inherited (intrserv) base (intrserv) NV_STATUS (*__uvmServiceNotificationInterrupt__)(OBJGPU *, struct OBJUVM * /*this*/, IntrServiceServiceNotificationInterruptArguments *); // virtual inherited (intrserv) base (intrserv) - - // Data members - ACCESS_CNTR_BUFFER *pAccessCounterBuffers; - NvU32 accessCounterBufferCount; - NvHandle hClient; - NvHandle hSubdevice; - RM_API *pRmApi; }; #ifndef __NVOC_CLASS_OBJUVM_TYPEDEF__ @@ -203,9 +216,9 @@ NV_STATUS __nvoc_objCreate_OBJUVM(OBJUVM**, Dynamic*, NvU32); // Wrapper macros -#define uvmStateDestroy_FNPTR(pUvm) pUvm->__uvmStateDestroy__ +#define uvmStateDestroy_FNPTR(pUvm) pUvm->__nvoc_vtable->__uvmStateDestroy__ #define uvmStateDestroy(pGpu, pUvm) uvmStateDestroy_DISPATCH(pGpu, pUvm) -#define uvmStateInitUnlocked_FNPTR(pUvm) pUvm->__uvmStateInitUnlocked__ +#define uvmStateInitUnlocked_FNPTR(pUvm) pUvm->__nvoc_vtable->__uvmStateInitUnlocked__ #define uvmStateInitUnlocked(pGpu, pUvm) uvmStateInitUnlocked_DISPATCH(pGpu, pUvm) #define uvmAccessCntrBufferUnregister_FNPTR(arg_this) arg_this->__uvmAccessCntrBufferUnregister__ #define uvmAccessCntrBufferUnregister(arg1, arg_this, accessCounterIndex) uvmAccessCntrBufferUnregister_DISPATCH(arg1, arg_this, accessCounterIndex) @@ -216,9 +229,9 @@ NV_STATUS __nvoc_objCreate_OBJUVM(OBJUVM**, Dynamic*, NvU32); #define uvmAccessCntrSetCounterLimit_FNPTR(pUvm) pUvm->__uvmAccessCntrSetCounterLimit__ #define uvmAccessCntrSetCounterLimit(pGpu, pUvm, accessCounterIndex, arg4, arg5) uvmAccessCntrSetCounterLimit_DISPATCH(pGpu, pUvm, accessCounterIndex, arg4, arg5) #define uvmAccessCntrSetCounterLimit_HAL(pGpu, pUvm, accessCounterIndex, arg4, arg5) uvmAccessCntrSetCounterLimit_DISPATCH(pGpu, pUvm, accessCounterIndex, arg4, arg5) -#define uvmRegisterIntrService_FNPTR(pUvm) pUvm->__uvmRegisterIntrService__ +#define uvmRegisterIntrService_FNPTR(pUvm) pUvm->__nvoc_vtable->__uvmRegisterIntrService__ #define uvmRegisterIntrService(arg1, pUvm, arg3) uvmRegisterIntrService_DISPATCH(arg1, pUvm, arg3) -#define uvmServiceInterrupt_FNPTR(pUvm) pUvm->__uvmServiceInterrupt__ +#define uvmServiceInterrupt_FNPTR(pUvm) pUvm->__nvoc_vtable->__uvmServiceInterrupt__ #define uvmServiceInterrupt(arg1, pUvm, arg3) uvmServiceInterrupt_DISPATCH(arg1, pUvm, arg3) #define uvmGetRegOffsetAccessCntrBufferPut_FNPTR(pUvm) pUvm->__uvmGetRegOffsetAccessCntrBufferPut__ #define uvmGetRegOffsetAccessCntrBufferPut(pUvm, accessCounterIndex) uvmGetRegOffsetAccessCntrBufferPut_DISPATCH(pUvm, accessCounterIndex) @@ -241,42 +254,42 @@ NV_STATUS __nvoc_objCreate_OBJUVM(OBJUVM**, Dynamic*, NvU32); #define uvmGetRegOffsetAccessCntrBufferSize_FNPTR(pUvm) pUvm->__uvmGetRegOffsetAccessCntrBufferSize__ #define uvmGetRegOffsetAccessCntrBufferSize(pUvm, accessCounterIndex) uvmGetRegOffsetAccessCntrBufferSize_DISPATCH(pUvm, accessCounterIndex) #define uvmGetRegOffsetAccessCntrBufferSize_HAL(pUvm, accessCounterIndex) uvmGetRegOffsetAccessCntrBufferSize_DISPATCH(pUvm, accessCounterIndex) -#define uvmConstructEngine_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ +#define uvmConstructEngine_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateConstructEngine__ #define uvmConstructEngine(pGpu, pEngstate, arg3) uvmConstructEngine_DISPATCH(pGpu, pEngstate, arg3) -#define uvmInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define uvmInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define uvmInitMissing(pGpu, pEngstate) uvmInitMissing_DISPATCH(pGpu, pEngstate) -#define uvmStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define uvmStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define uvmStatePreInitLocked(pGpu, pEngstate) uvmStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define uvmStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define uvmStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define uvmStatePreInitUnlocked(pGpu, pEngstate) uvmStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define uvmStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ +#define uvmStateInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitLocked__ #define uvmStateInitLocked(pGpu, pEngstate) uvmStateInitLocked_DISPATCH(pGpu, pEngstate) -#define uvmStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define uvmStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define uvmStatePreLoad(pGpu, pEngstate, arg3) uvmStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define uvmStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define uvmStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateLoad__ #define uvmStateLoad(pGpu, pEngstate, arg3) uvmStateLoad_DISPATCH(pGpu, pEngstate, arg3) -#define uvmStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ +#define uvmStatePostLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostLoad__ #define uvmStatePostLoad(pGpu, pEngstate, arg3) uvmStatePostLoad_DISPATCH(pGpu, pEngstate, arg3) -#define uvmStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define uvmStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define uvmStatePreUnload(pGpu, pEngstate, arg3) uvmStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define uvmStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define uvmStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateUnload__ #define uvmStateUnload(pGpu, pEngstate, arg3) uvmStateUnload_DISPATCH(pGpu, pEngstate, arg3) -#define uvmStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define uvmStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define uvmStatePostUnload(pGpu, pEngstate, arg3) uvmStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define uvmIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define uvmIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define uvmIsPresent(pGpu, pEngstate) uvmIsPresent_DISPATCH(pGpu, pEngstate) -#define uvmClearInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservClearInterrupt__ +#define uvmClearInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__nvoc_vtable->__intrservClearInterrupt__ #define uvmClearInterrupt(pGpu, pIntrService, pParams) uvmClearInterrupt_DISPATCH(pGpu, pIntrService, pParams) -#define uvmServiceNotificationInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ +#define uvmServiceNotificationInterrupt_FNPTR(pIntrService) pIntrService->__nvoc_base_IntrService.__nvoc_vtable->__intrservServiceNotificationInterrupt__ #define uvmServiceNotificationInterrupt(pGpu, pIntrService, pParams) uvmServiceNotificationInterrupt_DISPATCH(pGpu, pIntrService, pParams) // Dispatch functions static inline void uvmStateDestroy_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pUvm) { - pUvm->__uvmStateDestroy__(pGpu, pUvm); + pUvm->__nvoc_vtable->__uvmStateDestroy__(pGpu, pUvm); } static inline NV_STATUS uvmStateInitUnlocked_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pUvm) { - return pUvm->__uvmStateInitUnlocked__(pGpu, pUvm); + return pUvm->__nvoc_vtable->__uvmStateInitUnlocked__(pGpu, pUvm); } static inline NV_STATUS uvmAccessCntrBufferUnregister_DISPATCH(OBJGPU *arg1, struct OBJUVM *arg_this, NvU32 accessCounterIndex) { @@ -292,11 +305,11 @@ static inline NV_STATUS uvmAccessCntrSetCounterLimit_DISPATCH(OBJGPU *pGpu, stru } static inline void uvmRegisterIntrService_DISPATCH(OBJGPU *arg1, struct OBJUVM *pUvm, IntrServiceRecord arg3[175]) { - pUvm->__uvmRegisterIntrService__(arg1, pUvm, arg3); + pUvm->__nvoc_vtable->__uvmRegisterIntrService__(arg1, pUvm, arg3); } static inline NvU32 uvmServiceInterrupt_DISPATCH(OBJGPU *arg1, struct OBJUVM *pUvm, IntrServiceServiceInterruptArguments *arg3) { - return pUvm->__uvmServiceInterrupt__(arg1, pUvm, arg3); + return pUvm->__nvoc_vtable->__uvmServiceInterrupt__(arg1, pUvm, arg3); } static inline NvU32 uvmGetRegOffsetAccessCntrBufferPut_DISPATCH(struct OBJUVM *pUvm, NvU32 accessCounterIndex) { @@ -328,59 +341,59 @@ static inline NvU32 uvmGetRegOffsetAccessCntrBufferSize_DISPATCH(struct OBJUVM * } static inline NV_STATUS uvmConstructEngine_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pEngstate, ENGDESCRIPTOR arg3) { - return pEngstate->__uvmConstructEngine__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__uvmConstructEngine__(pGpu, pEngstate, arg3); } static inline void uvmInitMissing_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pEngstate) { - pEngstate->__uvmInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__uvmInitMissing__(pGpu, pEngstate); } static inline NV_STATUS uvmStatePreInitLocked_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pEngstate) { - return pEngstate->__uvmStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__uvmStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS uvmStatePreInitUnlocked_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pEngstate) { - return pEngstate->__uvmStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__uvmStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS uvmStateInitLocked_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pEngstate) { - return pEngstate->__uvmStateInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__uvmStateInitLocked__(pGpu, pEngstate); } static inline NV_STATUS uvmStatePreLoad_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { - return pEngstate->__uvmStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__uvmStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS uvmStateLoad_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { - return pEngstate->__uvmStateLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__uvmStateLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS uvmStatePostLoad_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { - return pEngstate->__uvmStatePostLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__uvmStatePostLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS uvmStatePreUnload_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { - return pEngstate->__uvmStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__uvmStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS uvmStateUnload_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { - return pEngstate->__uvmStateUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__uvmStateUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS uvmStatePostUnload_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pEngstate, NvU32 arg3) { - return pEngstate->__uvmStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__uvmStatePostUnload__(pGpu, pEngstate, arg3); } static inline NvBool uvmIsPresent_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pEngstate) { - return pEngstate->__uvmIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__uvmIsPresent__(pGpu, pEngstate); } static inline NvBool uvmClearInterrupt_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pIntrService, IntrServiceClearInterruptArguments *pParams) { - return pIntrService->__uvmClearInterrupt__(pGpu, pIntrService, pParams); + return pIntrService->__nvoc_vtable->__uvmClearInterrupt__(pGpu, pIntrService, pParams); } static inline NV_STATUS uvmServiceNotificationInterrupt_DISPATCH(OBJGPU *pGpu, struct OBJUVM *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) { - return pIntrService->__uvmServiceNotificationInterrupt__(pGpu, pIntrService, pParams); + return pIntrService->__nvoc_vtable->__uvmServiceNotificationInterrupt__(pGpu, pIntrService, pParams); } NV_STATUS uvmInitializeAccessCntrBuffer_IMPL(OBJGPU *pGpu, struct OBJUVM *pUvm, struct AccessCounterBuffer *pAccessCounterBuffer); diff --git a/src/nvidia/generated/g_uvm_sw_nvoc.c b/src/nvidia/generated/g_uvm_sw_nvoc.c index fa06b7f712..2932540c06 100644 --- a/src/nvidia/generated/g_uvm_sw_nvoc.c +++ b/src/nvidia/generated/g_uvm_sw_nvoc.c @@ -120,168 +120,278 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_UvmSwObject = /*pExportInfo=*/ &__nvoc_export_info_UvmSwObject }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super^2 +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super^2 +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super^2 +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super^2 +NV_STATUS __nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap(struct RmResource *pChannelDescendant, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_down_thunk_UvmSwObject_chandesGetSwMethods(struct ChannelDescendant *pUvmSw, const METHOD **ppMethods, NvU32 *pNumMethods); // this + // 1 down-thunk(s) defined to bridge methods in UvmSwObject from superclasses // uvmswGetSwMethods: virtual halified (singleton optimized) override (chandes) base (chandes) body -static NV_STATUS __nvoc_down_thunk_UvmSwObject_chandesGetSwMethods(struct ChannelDescendant *pUvmSw, const METHOD **ppMethods, NvU32 *pNumMethods) { +NV_STATUS __nvoc_down_thunk_UvmSwObject_chandesGetSwMethods(struct ChannelDescendant *pUvmSw, const METHOD **ppMethods, NvU32 *pNumMethods) { return uvmswGetSwMethods((struct UvmSwObject *)(((unsigned char *) pUvmSw) - __nvoc_rtti_UvmSwObject_ChannelDescendant.offset), ppMethods, pNumMethods); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^3 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^3 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^3 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super^2 +NV_STATUS __nvoc_up_thunk_GpuResource_chandesControl(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesMap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesUnmap(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_up_thunk_GpuResource_chandesShareCallback(struct ChannelDescendant *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize(struct ChannelDescendant *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace(struct ChannelDescendant *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super +NV_STATUS __nvoc_up_thunk_GpuResource_chandesInternalControlForward(struct ChannelDescendant *pGpuResource, NvU32 command, void *pParams, NvU32 size); // super +NvHandle __nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle(struct ChannelDescendant *pGpuResource); // super +NvBool __nvoc_up_thunk_RmResource_chandesAccessCallback(struct ChannelDescendant *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemInterMapParams(struct ChannelDescendant *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor(struct ChannelDescendant *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_chandesControl_Prologue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_chandesControl_Epilogue(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesCanCopy(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesIsDuplicate(struct ChannelDescendant *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_chandesPreDestruct(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesControlFilter(struct ChannelDescendant *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported(struct ChannelDescendant *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesMapTo(struct ChannelDescendant *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_chandesUnmapFrom(struct ChannelDescendant *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_chandesGetRefCount(struct ChannelDescendant *pResource); // super +void __nvoc_up_thunk_RsResource_chandesAddAdditionalDependants(struct RsClient *pClient, struct ChannelDescendant *pResource, RsResourceRef *pReference); // super +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_chandesGetNotificationListPtr(struct ChannelDescendant *pNotifier); // super +struct NotifShare * __nvoc_up_thunk_Notifier_chandesGetNotificationShare(struct ChannelDescendant *pNotifier); // super +void __nvoc_up_thunk_Notifier_chandesSetNotificationShare(struct ChannelDescendant *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesUnregisterEvent(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare(struct ChannelDescendant *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super +NvBool __nvoc_up_thunk_ChannelDescendant_uvmswIsSwMethodStalling(struct UvmSwObject *pChannelDescendant, NvU32 hHandle); // this +NV_STATUS __nvoc_up_thunk_ChannelDescendant_uvmswCheckMemInterUnmap(struct UvmSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_GpuResource_uvmswControl(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_uvmswMap(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_uvmswUnmap(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_uvmswShareCallback(struct UvmSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_uvmswGetRegBaseOffsetAndSize(struct UvmSwObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_uvmswGetMapAddrSpace(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_uvmswInternalControlForward(struct UvmSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_uvmswGetInternalObjectHandle(struct UvmSwObject *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_uvmswAccessCallback(struct UvmSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_uvmswGetMemInterMapParams(struct UvmSwObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_uvmswGetMemoryMappingDescriptor(struct UvmSwObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_uvmswControlSerialization_Prologue(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_uvmswControlSerialization_Epilogue(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_uvmswControl_Prologue(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_uvmswControl_Epilogue(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_uvmswCanCopy(struct UvmSwObject *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_uvmswIsDuplicate(struct UvmSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_uvmswPreDestruct(struct UvmSwObject *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_uvmswControlFilter(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_uvmswIsPartialUnmapSupported(struct UvmSwObject *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_uvmswMapTo(struct UvmSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_uvmswUnmapFrom(struct UvmSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_uvmswGetRefCount(struct UvmSwObject *pResource); // this +void __nvoc_up_thunk_RsResource_uvmswAddAdditionalDependants(struct RsClient *pClient, struct UvmSwObject *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_uvmswGetNotificationListPtr(struct UvmSwObject *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_uvmswGetNotificationShare(struct UvmSwObject *pNotifier); // this +void __nvoc_up_thunk_Notifier_uvmswSetNotificationShare(struct UvmSwObject *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_uvmswUnregisterEvent(struct UvmSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_uvmswGetOrAllocNotifShare(struct UvmSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 31 up-thunk(s) defined to bridge methods in UvmSwObject to superclasses // uvmswIsSwMethodStalling: virtual inherited (chandes) base (chandes) -static NvBool __nvoc_up_thunk_ChannelDescendant_uvmswIsSwMethodStalling(struct UvmSwObject *pChannelDescendant, NvU32 hHandle) { +NvBool __nvoc_up_thunk_ChannelDescendant_uvmswIsSwMethodStalling(struct UvmSwObject *pChannelDescendant, NvU32 hHandle) { return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_UvmSwObject_ChannelDescendant.offset), hHandle); } // uvmswCheckMemInterUnmap: virtual inherited (chandes) base (chandes) -static NV_STATUS __nvoc_up_thunk_ChannelDescendant_uvmswCheckMemInterUnmap(struct UvmSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_ChannelDescendant_uvmswCheckMemInterUnmap(struct UvmSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *) pChannelDescendant) + __nvoc_rtti_UvmSwObject_ChannelDescendant.offset), bSubdeviceHandleProvided); } // uvmswControl: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_uvmswControl(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_uvmswControl(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset), pCallContext, pParams); } // uvmswMap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_uvmswMap(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_uvmswMap(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // uvmswUnmap: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_uvmswUnmap(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_uvmswUnmap(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset), pCallContext, pCpuMapping); } // uvmswShareCallback: virtual inherited (gpures) base (chandes) -static NvBool __nvoc_up_thunk_GpuResource_uvmswShareCallback(struct UvmSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_uvmswShareCallback(struct UvmSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // uvmswGetRegBaseOffsetAndSize: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_uvmswGetRegBaseOffsetAndSize(struct UvmSwObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_uvmswGetRegBaseOffsetAndSize(struct UvmSwObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset), pGpu, pOffset, pSize); } // uvmswGetMapAddrSpace: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_uvmswGetMapAddrSpace(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_uvmswGetMapAddrSpace(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // uvmswInternalControlForward: virtual inherited (gpures) base (chandes) -static NV_STATUS __nvoc_up_thunk_GpuResource_uvmswInternalControlForward(struct UvmSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_uvmswInternalControlForward(struct UvmSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset), command, pParams, size); } // uvmswGetInternalObjectHandle: virtual inherited (gpures) base (chandes) -static NvHandle __nvoc_up_thunk_GpuResource_uvmswGetInternalObjectHandle(struct UvmSwObject *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_uvmswGetInternalObjectHandle(struct UvmSwObject *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_UvmSwObject_GpuResource.offset)); } // uvmswAccessCallback: virtual inherited (rmres) base (chandes) -static NvBool __nvoc_up_thunk_RmResource_uvmswAccessCallback(struct UvmSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_uvmswAccessCallback(struct UvmSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // uvmswGetMemInterMapParams: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_uvmswGetMemInterMapParams(struct UvmSwObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_uvmswGetMemInterMapParams(struct UvmSwObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_UvmSwObject_RmResource.offset), pParams); } // uvmswGetMemoryMappingDescriptor: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_uvmswGetMemoryMappingDescriptor(struct UvmSwObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_uvmswGetMemoryMappingDescriptor(struct UvmSwObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_UvmSwObject_RmResource.offset), ppMemDesc); } // uvmswControlSerialization_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_uvmswControlSerialization_Prologue(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_uvmswControlSerialization_Prologue(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RmResource.offset), pCallContext, pParams); } // uvmswControlSerialization_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_uvmswControlSerialization_Epilogue(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_uvmswControlSerialization_Epilogue(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RmResource.offset), pCallContext, pParams); } // uvmswControl_Prologue: virtual inherited (rmres) base (chandes) -static NV_STATUS __nvoc_up_thunk_RmResource_uvmswControl_Prologue(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_uvmswControl_Prologue(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RmResource.offset), pCallContext, pParams); } // uvmswControl_Epilogue: virtual inherited (rmres) base (chandes) -static void __nvoc_up_thunk_RmResource_uvmswControl_Epilogue(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_uvmswControl_Epilogue(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RmResource.offset), pCallContext, pParams); } // uvmswCanCopy: virtual inherited (res) base (chandes) -static NvBool __nvoc_up_thunk_RsResource_uvmswCanCopy(struct UvmSwObject *pResource) { +NvBool __nvoc_up_thunk_RsResource_uvmswCanCopy(struct UvmSwObject *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset)); } // uvmswIsDuplicate: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_uvmswIsDuplicate(struct UvmSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_uvmswIsDuplicate(struct UvmSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset), hMemory, pDuplicate); } // uvmswPreDestruct: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_uvmswPreDestruct(struct UvmSwObject *pResource) { +void __nvoc_up_thunk_RsResource_uvmswPreDestruct(struct UvmSwObject *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset)); } // uvmswControlFilter: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_uvmswControlFilter(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_uvmswControlFilter(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset), pCallContext, pParams); } // uvmswIsPartialUnmapSupported: inline virtual inherited (res) base (chandes) body -static NvBool __nvoc_up_thunk_RsResource_uvmswIsPartialUnmapSupported(struct UvmSwObject *pResource) { +NvBool __nvoc_up_thunk_RsResource_uvmswIsPartialUnmapSupported(struct UvmSwObject *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset)); } // uvmswMapTo: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_uvmswMapTo(struct UvmSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_uvmswMapTo(struct UvmSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset), pParams); } // uvmswUnmapFrom: virtual inherited (res) base (chandes) -static NV_STATUS __nvoc_up_thunk_RsResource_uvmswUnmapFrom(struct UvmSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_uvmswUnmapFrom(struct UvmSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset), pParams); } // uvmswGetRefCount: virtual inherited (res) base (chandes) -static NvU32 __nvoc_up_thunk_RsResource_uvmswGetRefCount(struct UvmSwObject *pResource) { +NvU32 __nvoc_up_thunk_RsResource_uvmswGetRefCount(struct UvmSwObject *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset)); } // uvmswAddAdditionalDependants: virtual inherited (res) base (chandes) -static void __nvoc_up_thunk_RsResource_uvmswAddAdditionalDependants(struct RsClient *pClient, struct UvmSwObject *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_uvmswAddAdditionalDependants(struct RsClient *pClient, struct UvmSwObject *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_UvmSwObject_RsResource.offset), pReference); } // uvmswGetNotificationListPtr: virtual inherited (notify) base (chandes) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_uvmswGetNotificationListPtr(struct UvmSwObject *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_uvmswGetNotificationListPtr(struct UvmSwObject *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_UvmSwObject_Notifier.offset)); } // uvmswGetNotificationShare: virtual inherited (notify) base (chandes) -static struct NotifShare * __nvoc_up_thunk_Notifier_uvmswGetNotificationShare(struct UvmSwObject *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_uvmswGetNotificationShare(struct UvmSwObject *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_UvmSwObject_Notifier.offset)); } // uvmswSetNotificationShare: virtual inherited (notify) base (chandes) -static void __nvoc_up_thunk_Notifier_uvmswSetNotificationShare(struct UvmSwObject *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_uvmswSetNotificationShare(struct UvmSwObject *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_UvmSwObject_Notifier.offset), pNotifShare); } // uvmswUnregisterEvent: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_uvmswUnregisterEvent(struct UvmSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_uvmswUnregisterEvent(struct UvmSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_UvmSwObject_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // uvmswGetOrAllocNotifShare: virtual inherited (notify) base (chandes) -static NV_STATUS __nvoc_up_thunk_Notifier_uvmswGetOrAllocNotifShare(struct UvmSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_uvmswGetOrAllocNotifShare(struct UvmSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_UvmSwObject_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -335,110 +445,162 @@ static void __nvoc_init_funcTable_UvmSwObject_1(UvmSwObject *pThis, RmHalspecOwn PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - - // uvmswGetSwMethods -- virtual halified (singleton optimized) override (chandes) base (chandes) body - pThis->__uvmswGetSwMethods__ = &uvmswGetSwMethods_56cd7a; - pThis->__nvoc_base_ChannelDescendant.__chandesGetSwMethods__ = &__nvoc_down_thunk_UvmSwObject_chandesGetSwMethods; - - // uvmswIsSwMethodStalling -- virtual inherited (chandes) base (chandes) - pThis->__uvmswIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_uvmswIsSwMethodStalling; - - // uvmswCheckMemInterUnmap -- virtual inherited (chandes) base (chandes) - pThis->__uvmswCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_uvmswCheckMemInterUnmap; - - // uvmswControl -- virtual inherited (gpures) base (chandes) - pThis->__uvmswControl__ = &__nvoc_up_thunk_GpuResource_uvmswControl; - - // uvmswMap -- virtual inherited (gpures) base (chandes) - pThis->__uvmswMap__ = &__nvoc_up_thunk_GpuResource_uvmswMap; - - // uvmswUnmap -- virtual inherited (gpures) base (chandes) - pThis->__uvmswUnmap__ = &__nvoc_up_thunk_GpuResource_uvmswUnmap; - - // uvmswShareCallback -- virtual inherited (gpures) base (chandes) - pThis->__uvmswShareCallback__ = &__nvoc_up_thunk_GpuResource_uvmswShareCallback; - - // uvmswGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (chandes) - pThis->__uvmswGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_uvmswGetRegBaseOffsetAndSize; - - // uvmswGetMapAddrSpace -- virtual inherited (gpures) base (chandes) - pThis->__uvmswGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_uvmswGetMapAddrSpace; - - // uvmswInternalControlForward -- virtual inherited (gpures) base (chandes) - pThis->__uvmswInternalControlForward__ = &__nvoc_up_thunk_GpuResource_uvmswInternalControlForward; - - // uvmswGetInternalObjectHandle -- virtual inherited (gpures) base (chandes) - pThis->__uvmswGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_uvmswGetInternalObjectHandle; - - // uvmswAccessCallback -- virtual inherited (rmres) base (chandes) - pThis->__uvmswAccessCallback__ = &__nvoc_up_thunk_RmResource_uvmswAccessCallback; - - // uvmswGetMemInterMapParams -- virtual inherited (rmres) base (chandes) - pThis->__uvmswGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_uvmswGetMemInterMapParams; - - // uvmswGetMemoryMappingDescriptor -- virtual inherited (rmres) base (chandes) - pThis->__uvmswGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_uvmswGetMemoryMappingDescriptor; - - // uvmswControlSerialization_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__uvmswControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_uvmswControlSerialization_Prologue; - - // uvmswControlSerialization_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__uvmswControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_uvmswControlSerialization_Epilogue; - - // uvmswControl_Prologue -- virtual inherited (rmres) base (chandes) - pThis->__uvmswControl_Prologue__ = &__nvoc_up_thunk_RmResource_uvmswControl_Prologue; - - // uvmswControl_Epilogue -- virtual inherited (rmres) base (chandes) - pThis->__uvmswControl_Epilogue__ = &__nvoc_up_thunk_RmResource_uvmswControl_Epilogue; - - // uvmswCanCopy -- virtual inherited (res) base (chandes) - pThis->__uvmswCanCopy__ = &__nvoc_up_thunk_RsResource_uvmswCanCopy; - - // uvmswIsDuplicate -- virtual inherited (res) base (chandes) - pThis->__uvmswIsDuplicate__ = &__nvoc_up_thunk_RsResource_uvmswIsDuplicate; - - // uvmswPreDestruct -- virtual inherited (res) base (chandes) - pThis->__uvmswPreDestruct__ = &__nvoc_up_thunk_RsResource_uvmswPreDestruct; - - // uvmswControlFilter -- virtual inherited (res) base (chandes) - pThis->__uvmswControlFilter__ = &__nvoc_up_thunk_RsResource_uvmswControlFilter; - - // uvmswIsPartialUnmapSupported -- inline virtual inherited (res) base (chandes) body - pThis->__uvmswIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_uvmswIsPartialUnmapSupported; - - // uvmswMapTo -- virtual inherited (res) base (chandes) - pThis->__uvmswMapTo__ = &__nvoc_up_thunk_RsResource_uvmswMapTo; - - // uvmswUnmapFrom -- virtual inherited (res) base (chandes) - pThis->__uvmswUnmapFrom__ = &__nvoc_up_thunk_RsResource_uvmswUnmapFrom; - - // uvmswGetRefCount -- virtual inherited (res) base (chandes) - pThis->__uvmswGetRefCount__ = &__nvoc_up_thunk_RsResource_uvmswGetRefCount; - - // uvmswAddAdditionalDependants -- virtual inherited (res) base (chandes) - pThis->__uvmswAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_uvmswAddAdditionalDependants; - - // uvmswGetNotificationListPtr -- virtual inherited (notify) base (chandes) - pThis->__uvmswGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_uvmswGetNotificationListPtr; - - // uvmswGetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__uvmswGetNotificationShare__ = &__nvoc_up_thunk_Notifier_uvmswGetNotificationShare; - - // uvmswSetNotificationShare -- virtual inherited (notify) base (chandes) - pThis->__uvmswSetNotificationShare__ = &__nvoc_up_thunk_Notifier_uvmswSetNotificationShare; - - // uvmswUnregisterEvent -- virtual inherited (notify) base (chandes) - pThis->__uvmswUnregisterEvent__ = &__nvoc_up_thunk_Notifier_uvmswUnregisterEvent; - - // uvmswGetOrAllocNotifShare -- virtual inherited (notify) base (chandes) - pThis->__uvmswGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_uvmswGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_UvmSwObject_1 with approximately 33 basic block(s). +} // End __nvoc_init_funcTable_UvmSwObject_1 // Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_UvmSwObject(UvmSwObject *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 32 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__UvmSwObject vtable = { + .__uvmswGetSwMethods__ = &uvmswGetSwMethods_56cd7a, // virtual halified (singleton optimized) override (chandes) base (chandes) body + .ChannelDescendant.__chandesGetSwMethods__ = &__nvoc_down_thunk_UvmSwObject_chandesGetSwMethods, // virtual + .__uvmswIsSwMethodStalling__ = &__nvoc_up_thunk_ChannelDescendant_uvmswIsSwMethodStalling, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesIsSwMethodStalling__ = &chandesIsSwMethodStalling_IMPL, // virtual + .__uvmswCheckMemInterUnmap__ = &__nvoc_up_thunk_ChannelDescendant_uvmswCheckMemInterUnmap, // virtual inherited (chandes) base (chandes) + .ChannelDescendant.__chandesCheckMemInterUnmap__ = &chandesCheckMemInterUnmap_IMPL, // virtual override (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_ChannelDescendant_rmresCheckMemInterUnmap, // virtual + .__uvmswControl__ = &__nvoc_up_thunk_GpuResource_uvmswControl, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesControl__ = &__nvoc_up_thunk_GpuResource_chandesControl, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__uvmswMap__ = &__nvoc_up_thunk_GpuResource_uvmswMap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesMap__ = &__nvoc_up_thunk_GpuResource_chandesMap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__uvmswUnmap__ = &__nvoc_up_thunk_GpuResource_uvmswUnmap, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesUnmap__ = &__nvoc_up_thunk_GpuResource_chandesUnmap, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__uvmswShareCallback__ = &__nvoc_up_thunk_GpuResource_uvmswShareCallback, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesShareCallback__ = &__nvoc_up_thunk_GpuResource_chandesShareCallback, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__uvmswGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_uvmswGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_chandesGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__uvmswGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_uvmswGetMapAddrSpace, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_chandesGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__uvmswInternalControlForward__ = &__nvoc_up_thunk_GpuResource_uvmswInternalControlForward, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesInternalControlForward__ = &__nvoc_up_thunk_GpuResource_chandesInternalControlForward, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__uvmswGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_uvmswGetInternalObjectHandle, // virtual inherited (gpures) base (chandes) + .ChannelDescendant.__chandesGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_chandesGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__uvmswAccessCallback__ = &__nvoc_up_thunk_RmResource_uvmswAccessCallback, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesAccessCallback__ = &__nvoc_up_thunk_RmResource_chandesAccessCallback, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__uvmswGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_uvmswGetMemInterMapParams, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_chandesGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__uvmswGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_uvmswGetMemoryMappingDescriptor, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_chandesGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__uvmswControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_uvmswControlSerialization_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__uvmswControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_uvmswControlSerialization_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__uvmswControl_Prologue__ = &__nvoc_up_thunk_RmResource_uvmswControl_Prologue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Prologue__ = &__nvoc_up_thunk_RmResource_chandesControl_Prologue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__uvmswControl_Epilogue__ = &__nvoc_up_thunk_RmResource_uvmswControl_Epilogue, // virtual inherited (rmres) base (chandes) + .ChannelDescendant.__chandesControl_Epilogue__ = &__nvoc_up_thunk_RmResource_chandesControl_Epilogue, // virtual inherited (rmres) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__uvmswCanCopy__ = &__nvoc_up_thunk_RsResource_uvmswCanCopy, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesCanCopy__ = &__nvoc_up_thunk_RsResource_chandesCanCopy, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__uvmswIsDuplicate__ = &__nvoc_up_thunk_RsResource_uvmswIsDuplicate, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesIsDuplicate__ = &__nvoc_up_thunk_RsResource_chandesIsDuplicate, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__uvmswPreDestruct__ = &__nvoc_up_thunk_RsResource_uvmswPreDestruct, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesPreDestruct__ = &__nvoc_up_thunk_RsResource_chandesPreDestruct, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__uvmswControlFilter__ = &__nvoc_up_thunk_RsResource_uvmswControlFilter, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesControlFilter__ = &__nvoc_up_thunk_RsResource_chandesControlFilter, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__uvmswIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_uvmswIsPartialUnmapSupported, // inline virtual inherited (res) base (chandes) body + .ChannelDescendant.__chandesIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_chandesIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .ChannelDescendant.GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .ChannelDescendant.GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .ChannelDescendant.GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__uvmswMapTo__ = &__nvoc_up_thunk_RsResource_uvmswMapTo, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesMapTo__ = &__nvoc_up_thunk_RsResource_chandesMapTo, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__uvmswUnmapFrom__ = &__nvoc_up_thunk_RsResource_uvmswUnmapFrom, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesUnmapFrom__ = &__nvoc_up_thunk_RsResource_chandesUnmapFrom, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__uvmswGetRefCount__ = &__nvoc_up_thunk_RsResource_uvmswGetRefCount, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesGetRefCount__ = &__nvoc_up_thunk_RsResource_chandesGetRefCount, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__uvmswAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_uvmswAddAdditionalDependants, // virtual inherited (res) base (chandes) + .ChannelDescendant.__chandesAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_chandesAddAdditionalDependants, // virtual inherited (res) base (gpures) + .ChannelDescendant.GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .ChannelDescendant.GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .ChannelDescendant.GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__uvmswGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_uvmswGetNotificationListPtr, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationListPtr, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__uvmswGetNotificationShare__ = &__nvoc_up_thunk_Notifier_uvmswGetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesGetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__uvmswSetNotificationShare__ = &__nvoc_up_thunk_Notifier_uvmswSetNotificationShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesSetNotificationShare__ = &__nvoc_up_thunk_Notifier_chandesSetNotificationShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__uvmswUnregisterEvent__ = &__nvoc_up_thunk_Notifier_uvmswUnregisterEvent, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesUnregisterEvent__ = &__nvoc_up_thunk_Notifier_chandesUnregisterEvent, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__uvmswGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_uvmswGetOrAllocNotifShare, // virtual inherited (notify) base (chandes) + .ChannelDescendant.__chandesGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_chandesGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .ChannelDescendant.Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .ChannelDescendant.Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource.RsResource; // (res) super^4 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource.RmResource; // (rmres) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable = &vtable.ChannelDescendant.GpuResource; // (gpures) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier.INotifier; // (inotify) super^3 + pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable = &vtable.ChannelDescendant.Notifier; // (notify) super^2 + pThis->__nvoc_base_ChannelDescendant.__nvoc_vtable = &vtable.ChannelDescendant; // (chandes) super + pThis->__nvoc_vtable = &vtable; // (uvmsw) this __nvoc_init_funcTable_UvmSwObject_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_uvm_sw_nvoc.h b/src/nvidia/generated/g_uvm_sw_nvoc.h index e606749637..9384ef4d49 100644 --- a/src/nvidia/generated/g_uvm_sw_nvoc.h +++ b/src/nvidia/generated/g_uvm_sw_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -59,10 +59,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__UvmSwObject; + + struct UvmSwObject { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__UvmSwObject *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct ChannelDescendant __nvoc_base_ChannelDescendant; @@ -78,7 +83,19 @@ struct UvmSwObject { struct ChannelDescendant *__nvoc_pbase_ChannelDescendant; // chandes super struct UvmSwObject *__nvoc_pbase_UvmSwObject; // uvmsw - // Vtable with 32 per-object function pointers + // Data members + NvU32 methodA; + NvU32 methodB; + NvBool bCancelMethodASet; + NvBool bCancelMethodBSet; + NvBool bClearMethodASet; +}; + + +// Metadata including vtable with 32 function pointers plus superclass metadata +struct NVOC_VTABLE__UvmSwObject { + const struct NVOC_VTABLE__ChannelDescendant ChannelDescendant; // (chandes) 32 function pointers + NV_STATUS (*__uvmswGetSwMethods__)(struct UvmSwObject * /*this*/, const METHOD **, NvU32 *); // virtual halified (singleton optimized) override (chandes) base (chandes) body NvBool (*__uvmswIsSwMethodStalling__)(struct UvmSwObject * /*this*/, NvU32); // virtual inherited (chandes) base (chandes) NV_STATUS (*__uvmswCheckMemInterUnmap__)(struct UvmSwObject * /*this*/, NvBool); // virtual inherited (chandes) base (chandes) @@ -111,13 +128,6 @@ struct UvmSwObject { void (*__uvmswSetNotificationShare__)(struct UvmSwObject * /*this*/, struct NotifShare *); // virtual inherited (notify) base (chandes) NV_STATUS (*__uvmswUnregisterEvent__)(struct UvmSwObject * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (chandes) NV_STATUS (*__uvmswGetOrAllocNotifShare__)(struct UvmSwObject * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (chandes) - - // Data members - NvU32 methodA; - NvU32 methodB; - NvBool bCancelMethodASet; - NvBool bCancelMethodBSet; - NvBool bClearMethodASet; }; #ifndef __NVOC_CLASS_UvmSwObject_TYPEDEF__ @@ -150,199 +160,199 @@ NV_STATUS __nvoc_objCreate_UvmSwObject(UvmSwObject**, Dynamic*, NvU32, struct CA // Wrapper macros -#define uvmswGetSwMethods_FNPTR(pUvmSw) pUvmSw->__uvmswGetSwMethods__ +#define uvmswGetSwMethods_FNPTR(pUvmSw) pUvmSw->__nvoc_vtable->__uvmswGetSwMethods__ #define uvmswGetSwMethods(pUvmSw, ppMethods, pNumMethods) uvmswGetSwMethods_DISPATCH(pUvmSw, ppMethods, pNumMethods) #define uvmswGetSwMethods_HAL(pUvmSw, ppMethods, pNumMethods) uvmswGetSwMethods_DISPATCH(pUvmSw, ppMethods, pNumMethods) -#define uvmswIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesIsSwMethodStalling__ +#define uvmswIsSwMethodStalling_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesIsSwMethodStalling__ #define uvmswIsSwMethodStalling(pChannelDescendant, hHandle) uvmswIsSwMethodStalling_DISPATCH(pChannelDescendant, hHandle) -#define uvmswCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__chandesCheckMemInterUnmap__ +#define uvmswCheckMemInterUnmap_FNPTR(pChannelDescendant) pChannelDescendant->__nvoc_base_ChannelDescendant.__nvoc_vtable->__chandesCheckMemInterUnmap__ #define uvmswCheckMemInterUnmap(pChannelDescendant, bSubdeviceHandleProvided) uvmswCheckMemInterUnmap_DISPATCH(pChannelDescendant, bSubdeviceHandleProvided) -#define uvmswControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresControl__ +#define uvmswControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define uvmswControl(pGpuResource, pCallContext, pParams) uvmswControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define uvmswMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresMap__ +#define uvmswMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define uvmswMap(pGpuResource, pCallContext, pParams, pCpuMapping) uvmswMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define uvmswUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresUnmap__ +#define uvmswUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define uvmswUnmap(pGpuResource, pCallContext, pCpuMapping) uvmswUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define uvmswShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresShareCallback__ +#define uvmswShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define uvmswShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) uvmswShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define uvmswGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define uvmswGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define uvmswGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) uvmswGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define uvmswGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define uvmswGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define uvmswGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) uvmswGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define uvmswInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define uvmswInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define uvmswInternalControlForward(pGpuResource, command, pParams, size) uvmswInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define uvmswGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define uvmswGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define uvmswGetInternalObjectHandle(pGpuResource) uvmswGetInternalObjectHandle_DISPATCH(pGpuResource) -#define uvmswAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define uvmswAccessCallback_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define uvmswAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) uvmswAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define uvmswGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define uvmswGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define uvmswGetMemInterMapParams(pRmResource, pParams) uvmswGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define uvmswGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define uvmswGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define uvmswGetMemoryMappingDescriptor(pRmResource, ppMemDesc) uvmswGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define uvmswControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define uvmswControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define uvmswControlSerialization_Prologue(pResource, pCallContext, pParams) uvmswControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define uvmswControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define uvmswControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define uvmswControlSerialization_Epilogue(pResource, pCallContext, pParams) uvmswControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define uvmswControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define uvmswControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define uvmswControl_Prologue(pResource, pCallContext, pParams) uvmswControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define uvmswControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define uvmswControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define uvmswControl_Epilogue(pResource, pCallContext, pParams) uvmswControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define uvmswCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define uvmswCanCopy_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define uvmswCanCopy(pResource) uvmswCanCopy_DISPATCH(pResource) -#define uvmswIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define uvmswIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define uvmswIsDuplicate(pResource, hMemory, pDuplicate) uvmswIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define uvmswPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define uvmswPreDestruct_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define uvmswPreDestruct(pResource) uvmswPreDestruct_DISPATCH(pResource) -#define uvmswControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define uvmswControlFilter_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define uvmswControlFilter(pResource, pCallContext, pParams) uvmswControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define uvmswIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define uvmswIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define uvmswIsPartialUnmapSupported(pResource) uvmswIsPartialUnmapSupported_DISPATCH(pResource) -#define uvmswMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define uvmswMapTo_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define uvmswMapTo(pResource, pParams) uvmswMapTo_DISPATCH(pResource, pParams) -#define uvmswUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define uvmswUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define uvmswUnmapFrom(pResource, pParams) uvmswUnmapFrom_DISPATCH(pResource, pParams) -#define uvmswGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define uvmswGetRefCount_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define uvmswGetRefCount(pResource) uvmswGetRefCount_DISPATCH(pResource) -#define uvmswAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define uvmswAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define uvmswAddAdditionalDependants(pClient, pResource, pReference) uvmswAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define uvmswGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define uvmswGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define uvmswGetNotificationListPtr(pNotifier) uvmswGetNotificationListPtr_DISPATCH(pNotifier) -#define uvmswGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define uvmswGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define uvmswGetNotificationShare(pNotifier) uvmswGetNotificationShare_DISPATCH(pNotifier) -#define uvmswSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifySetNotificationShare__ +#define uvmswSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define uvmswSetNotificationShare(pNotifier, pNotifShare) uvmswSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define uvmswUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define uvmswUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define uvmswUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) uvmswUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define uvmswGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define uvmswGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define uvmswGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) uvmswGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions static inline NV_STATUS uvmswGetSwMethods_DISPATCH(struct UvmSwObject *pUvmSw, const METHOD **ppMethods, NvU32 *pNumMethods) { - return pUvmSw->__uvmswGetSwMethods__(pUvmSw, ppMethods, pNumMethods); + return pUvmSw->__nvoc_vtable->__uvmswGetSwMethods__(pUvmSw, ppMethods, pNumMethods); } static inline NvBool uvmswIsSwMethodStalling_DISPATCH(struct UvmSwObject *pChannelDescendant, NvU32 hHandle) { - return pChannelDescendant->__uvmswIsSwMethodStalling__(pChannelDescendant, hHandle); + return pChannelDescendant->__nvoc_vtable->__uvmswIsSwMethodStalling__(pChannelDescendant, hHandle); } static inline NV_STATUS uvmswCheckMemInterUnmap_DISPATCH(struct UvmSwObject *pChannelDescendant, NvBool bSubdeviceHandleProvided) { - return pChannelDescendant->__uvmswCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); + return pChannelDescendant->__nvoc_vtable->__uvmswCheckMemInterUnmap__(pChannelDescendant, bSubdeviceHandleProvided); } static inline NV_STATUS uvmswControl_DISPATCH(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__uvmswControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__uvmswControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS uvmswMap_DISPATCH(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__uvmswMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__uvmswMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS uvmswUnmap_DISPATCH(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__uvmswUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__uvmswUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool uvmswShareCallback_DISPATCH(struct UvmSwObject *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__uvmswShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__uvmswShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS uvmswGetRegBaseOffsetAndSize_DISPATCH(struct UvmSwObject *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__uvmswGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__uvmswGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS uvmswGetMapAddrSpace_DISPATCH(struct UvmSwObject *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__uvmswGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__uvmswGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS uvmswInternalControlForward_DISPATCH(struct UvmSwObject *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__uvmswInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__uvmswInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle uvmswGetInternalObjectHandle_DISPATCH(struct UvmSwObject *pGpuResource) { - return pGpuResource->__uvmswGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__uvmswGetInternalObjectHandle__(pGpuResource); } static inline NvBool uvmswAccessCallback_DISPATCH(struct UvmSwObject *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__uvmswAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__uvmswAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS uvmswGetMemInterMapParams_DISPATCH(struct UvmSwObject *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__uvmswGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__uvmswGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS uvmswGetMemoryMappingDescriptor_DISPATCH(struct UvmSwObject *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__uvmswGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__uvmswGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS uvmswControlSerialization_Prologue_DISPATCH(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__uvmswControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__uvmswControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void uvmswControlSerialization_Epilogue_DISPATCH(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__uvmswControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__uvmswControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS uvmswControl_Prologue_DISPATCH(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__uvmswControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__uvmswControl_Prologue__(pResource, pCallContext, pParams); } static inline void uvmswControl_Epilogue_DISPATCH(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__uvmswControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__uvmswControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool uvmswCanCopy_DISPATCH(struct UvmSwObject *pResource) { - return pResource->__uvmswCanCopy__(pResource); + return pResource->__nvoc_vtable->__uvmswCanCopy__(pResource); } static inline NV_STATUS uvmswIsDuplicate_DISPATCH(struct UvmSwObject *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__uvmswIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__uvmswIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void uvmswPreDestruct_DISPATCH(struct UvmSwObject *pResource) { - pResource->__uvmswPreDestruct__(pResource); + pResource->__nvoc_vtable->__uvmswPreDestruct__(pResource); } static inline NV_STATUS uvmswControlFilter_DISPATCH(struct UvmSwObject *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__uvmswControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__uvmswControlFilter__(pResource, pCallContext, pParams); } static inline NvBool uvmswIsPartialUnmapSupported_DISPATCH(struct UvmSwObject *pResource) { - return pResource->__uvmswIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__uvmswIsPartialUnmapSupported__(pResource); } static inline NV_STATUS uvmswMapTo_DISPATCH(struct UvmSwObject *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__uvmswMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__uvmswMapTo__(pResource, pParams); } static inline NV_STATUS uvmswUnmapFrom_DISPATCH(struct UvmSwObject *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__uvmswUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__uvmswUnmapFrom__(pResource, pParams); } static inline NvU32 uvmswGetRefCount_DISPATCH(struct UvmSwObject *pResource) { - return pResource->__uvmswGetRefCount__(pResource); + return pResource->__nvoc_vtable->__uvmswGetRefCount__(pResource); } static inline void uvmswAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct UvmSwObject *pResource, RsResourceRef *pReference) { - pResource->__uvmswAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__uvmswAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * uvmswGetNotificationListPtr_DISPATCH(struct UvmSwObject *pNotifier) { - return pNotifier->__uvmswGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__uvmswGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * uvmswGetNotificationShare_DISPATCH(struct UvmSwObject *pNotifier) { - return pNotifier->__uvmswGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__uvmswGetNotificationShare__(pNotifier); } static inline void uvmswSetNotificationShare_DISPATCH(struct UvmSwObject *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__uvmswSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__uvmswSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS uvmswUnregisterEvent_DISPATCH(struct UvmSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__uvmswUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__uvmswUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS uvmswGetOrAllocNotifShare_DISPATCH(struct UvmSwObject *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__uvmswGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__uvmswGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } static inline NV_STATUS uvmswGetSwMethods_56cd7a(struct UvmSwObject *pUvmSw, const METHOD **ppMethods, NvU32 *pNumMethods) { diff --git a/src/nvidia/generated/g_vaspace_api_nvoc.c b/src/nvidia/generated/g_vaspace_api_nvoc.c index 3f2c2e6613..17f48141dc 100644 --- a/src/nvidia/generated/g_vaspace_api_nvoc.c +++ b/src/nvidia/generated/g_vaspace_api_nvoc.c @@ -192,133 +192,201 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VaSpaceA }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NvBool __nvoc_down_thunk_VaSpaceApi_resCanCopy(struct RsResource *pResource); // this + // 1 down-thunk(s) defined to bridge methods in VaSpaceApi from superclasses // vaspaceapiCanCopy: virtual override (res) base (gpures) -static NvBool __nvoc_down_thunk_VaSpaceApi_resCanCopy(struct RsResource *pResource) { +NvBool __nvoc_down_thunk_VaSpaceApi_resCanCopy(struct RsResource *pResource) { return vaspaceapiCanCopy((struct VaSpaceApi *)(((unsigned char *) pResource) - __nvoc_rtti_VaSpaceApi_RsResource.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiControl(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiMap(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiUnmap(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_vaspaceapiShareCallback(struct VaSpaceApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiGetRegBaseOffsetAndSize(struct VaSpaceApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiGetMapAddrSpace(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiInternalControlForward(struct VaSpaceApi *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_vaspaceapiGetInternalObjectHandle(struct VaSpaceApi *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_vaspaceapiAccessCallback(struct VaSpaceApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_vaspaceapiGetMemInterMapParams(struct VaSpaceApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_vaspaceapiCheckMemInterUnmap(struct VaSpaceApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_vaspaceapiGetMemoryMappingDescriptor(struct VaSpaceApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_vaspaceapiControlSerialization_Prologue(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_vaspaceapiControlSerialization_Epilogue(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_vaspaceapiControl_Prologue(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_vaspaceapiControl_Epilogue(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_vaspaceapiIsDuplicate(struct VaSpaceApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_vaspaceapiPreDestruct(struct VaSpaceApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_vaspaceapiControlFilter(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_vaspaceapiIsPartialUnmapSupported(struct VaSpaceApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_vaspaceapiMapTo(struct VaSpaceApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_vaspaceapiUnmapFrom(struct VaSpaceApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_vaspaceapiGetRefCount(struct VaSpaceApi *pResource); // this +void __nvoc_up_thunk_RsResource_vaspaceapiAddAdditionalDependants(struct RsClient *pClient, struct VaSpaceApi *pResource, RsResourceRef *pReference); // this + // 24 up-thunk(s) defined to bridge methods in VaSpaceApi to superclasses // vaspaceapiControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiControl(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiControl(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset), pCallContext, pParams); } // vaspaceapiMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiMap(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiMap(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // vaspaceapiUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiUnmap(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiUnmap(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset), pCallContext, pCpuMapping); } // vaspaceapiShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_vaspaceapiShareCallback(struct VaSpaceApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_vaspaceapiShareCallback(struct VaSpaceApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // vaspaceapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiGetRegBaseOffsetAndSize(struct VaSpaceApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiGetRegBaseOffsetAndSize(struct VaSpaceApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset), pGpu, pOffset, pSize); } // vaspaceapiGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiGetMapAddrSpace(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiGetMapAddrSpace(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // vaspaceapiInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiInternalControlForward(struct VaSpaceApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_vaspaceapiInternalControlForward(struct VaSpaceApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset), command, pParams, size); } // vaspaceapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_vaspaceapiGetInternalObjectHandle(struct VaSpaceApi *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_vaspaceapiGetInternalObjectHandle(struct VaSpaceApi *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VaSpaceApi_GpuResource.offset)); } // vaspaceapiAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_vaspaceapiAccessCallback(struct VaSpaceApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_vaspaceapiAccessCallback(struct VaSpaceApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // vaspaceapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vaspaceapiGetMemInterMapParams(struct VaSpaceApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_vaspaceapiGetMemInterMapParams(struct VaSpaceApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), pParams); } // vaspaceapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vaspaceapiCheckMemInterUnmap(struct VaSpaceApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_vaspaceapiCheckMemInterUnmap(struct VaSpaceApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), bSubdeviceHandleProvided); } // vaspaceapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vaspaceapiGetMemoryMappingDescriptor(struct VaSpaceApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_vaspaceapiGetMemoryMappingDescriptor(struct VaSpaceApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), ppMemDesc); } // vaspaceapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vaspaceapiControlSerialization_Prologue(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_vaspaceapiControlSerialization_Prologue(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), pCallContext, pParams); } // vaspaceapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_vaspaceapiControlSerialization_Epilogue(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_vaspaceapiControlSerialization_Epilogue(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), pCallContext, pParams); } // vaspaceapiControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vaspaceapiControl_Prologue(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_vaspaceapiControl_Prologue(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), pCallContext, pParams); } // vaspaceapiControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_vaspaceapiControl_Epilogue(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_vaspaceapiControl_Epilogue(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RmResource.offset), pCallContext, pParams); } // vaspaceapiIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_vaspaceapiIsDuplicate(struct VaSpaceApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_vaspaceapiIsDuplicate(struct VaSpaceApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset), hMemory, pDuplicate); } // vaspaceapiPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_vaspaceapiPreDestruct(struct VaSpaceApi *pResource) { +void __nvoc_up_thunk_RsResource_vaspaceapiPreDestruct(struct VaSpaceApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset)); } // vaspaceapiControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_vaspaceapiControlFilter(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_vaspaceapiControlFilter(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset), pCallContext, pParams); } // vaspaceapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_vaspaceapiIsPartialUnmapSupported(struct VaSpaceApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_vaspaceapiIsPartialUnmapSupported(struct VaSpaceApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset)); } // vaspaceapiMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_vaspaceapiMapTo(struct VaSpaceApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_vaspaceapiMapTo(struct VaSpaceApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset), pParams); } // vaspaceapiUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_vaspaceapiUnmapFrom(struct VaSpaceApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_vaspaceapiUnmapFrom(struct VaSpaceApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset), pParams); } // vaspaceapiGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_vaspaceapiGetRefCount(struct VaSpaceApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_vaspaceapiGetRefCount(struct VaSpaceApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset)); } // vaspaceapiAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_vaspaceapiAddAdditionalDependants(struct RsClient *pClient, struct VaSpaceApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_vaspaceapiAddAdditionalDependants(struct RsClient *pClient, struct VaSpaceApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VaSpaceApi_RsResource.offset), pReference); } @@ -363,10 +431,6 @@ NV_STATUS __nvoc_ctor_VaSpaceApi(VaSpaceApi *pThis, struct CALL_CONTEXT * arg_pC static void __nvoc_init_funcTable_VaSpaceApi_1(VaSpaceApi *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - // vaspaceapiCanCopy -- virtual override (res) base (gpures) - pThis->__vaspaceapiCanCopy__ = &vaspaceapiCanCopy_IMPL; - pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_down_thunk_VaSpaceApi_resCanCopy; - // vaspaceapiCtrlCmdVaspaceGetGmmuFormat -- exported (id=0x90f10101) #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__vaspaceapiCtrlCmdVaspaceGetGmmuFormat__ = &vaspaceapiCtrlCmdVaspaceGetGmmuFormat_IMPL; @@ -396,85 +460,124 @@ static void __nvoc_init_funcTable_VaSpaceApi_1(VaSpaceApi *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__vaspaceapiCtrlCmdVaspaceGetHostRmManagedSize__ = &vaspaceapiCtrlCmdVaspaceGetHostRmManagedSize_IMPL; #endif - - // vaspaceapiControl -- virtual inherited (gpures) base (gpures) - pThis->__vaspaceapiControl__ = &__nvoc_up_thunk_GpuResource_vaspaceapiControl; - - // vaspaceapiMap -- virtual inherited (gpures) base (gpures) - pThis->__vaspaceapiMap__ = &__nvoc_up_thunk_GpuResource_vaspaceapiMap; - - // vaspaceapiUnmap -- virtual inherited (gpures) base (gpures) - pThis->__vaspaceapiUnmap__ = &__nvoc_up_thunk_GpuResource_vaspaceapiUnmap; - - // vaspaceapiShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__vaspaceapiShareCallback__ = &__nvoc_up_thunk_GpuResource_vaspaceapiShareCallback; - - // vaspaceapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__vaspaceapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_vaspaceapiGetRegBaseOffsetAndSize; - - // vaspaceapiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__vaspaceapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_vaspaceapiGetMapAddrSpace; - - // vaspaceapiInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__vaspaceapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_vaspaceapiInternalControlForward; - - // vaspaceapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__vaspaceapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_vaspaceapiGetInternalObjectHandle; - - // vaspaceapiAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__vaspaceapiAccessCallback__ = &__nvoc_up_thunk_RmResource_vaspaceapiAccessCallback; - - // vaspaceapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__vaspaceapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_vaspaceapiGetMemInterMapParams; - - // vaspaceapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__vaspaceapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_vaspaceapiCheckMemInterUnmap; - - // vaspaceapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__vaspaceapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_vaspaceapiGetMemoryMappingDescriptor; - - // vaspaceapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__vaspaceapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_vaspaceapiControlSerialization_Prologue; - - // vaspaceapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__vaspaceapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_vaspaceapiControlSerialization_Epilogue; - - // vaspaceapiControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__vaspaceapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_vaspaceapiControl_Prologue; - - // vaspaceapiControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__vaspaceapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_vaspaceapiControl_Epilogue; - - // vaspaceapiIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__vaspaceapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_vaspaceapiIsDuplicate; - - // vaspaceapiPreDestruct -- virtual inherited (res) base (gpures) - pThis->__vaspaceapiPreDestruct__ = &__nvoc_up_thunk_RsResource_vaspaceapiPreDestruct; - - // vaspaceapiControlFilter -- virtual inherited (res) base (gpures) - pThis->__vaspaceapiControlFilter__ = &__nvoc_up_thunk_RsResource_vaspaceapiControlFilter; - - // vaspaceapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__vaspaceapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_vaspaceapiIsPartialUnmapSupported; - - // vaspaceapiMapTo -- virtual inherited (res) base (gpures) - pThis->__vaspaceapiMapTo__ = &__nvoc_up_thunk_RsResource_vaspaceapiMapTo; - - // vaspaceapiUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__vaspaceapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_vaspaceapiUnmapFrom; - - // vaspaceapiGetRefCount -- virtual inherited (res) base (gpures) - pThis->__vaspaceapiGetRefCount__ = &__nvoc_up_thunk_RsResource_vaspaceapiGetRefCount; - - // vaspaceapiAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__vaspaceapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_vaspaceapiAddAdditionalDependants; -} // End __nvoc_init_funcTable_VaSpaceApi_1 with approximately 32 basic block(s). +} // End __nvoc_init_funcTable_VaSpaceApi_1 with approximately 6 basic block(s). // Initialize vtable(s) for 31 virtual method(s). void __nvoc_init_funcTable_VaSpaceApi(VaSpaceApi *pThis) { - // Initialize vtable(s) with 31 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__VaSpaceApi vtable = { + .__vaspaceapiCanCopy__ = &vaspaceapiCanCopy_IMPL, // virtual override (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_VaSpaceApi_resCanCopy, // virtual +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8000u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8000u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8000u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x14004u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif + .__vaspaceapiControl__ = &__nvoc_up_thunk_GpuResource_vaspaceapiControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__vaspaceapiMap__ = &__nvoc_up_thunk_GpuResource_vaspaceapiMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__vaspaceapiUnmap__ = &__nvoc_up_thunk_GpuResource_vaspaceapiUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__vaspaceapiShareCallback__ = &__nvoc_up_thunk_GpuResource_vaspaceapiShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__vaspaceapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_vaspaceapiGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__vaspaceapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_vaspaceapiGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__vaspaceapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_vaspaceapiInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__vaspaceapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_vaspaceapiGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__vaspaceapiAccessCallback__ = &__nvoc_up_thunk_RmResource_vaspaceapiAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__vaspaceapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_vaspaceapiGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__vaspaceapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_vaspaceapiCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__vaspaceapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_vaspaceapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__vaspaceapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_vaspaceapiControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__vaspaceapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_vaspaceapiControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__vaspaceapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_vaspaceapiControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__vaspaceapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_vaspaceapiControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__vaspaceapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_vaspaceapiIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__vaspaceapiPreDestruct__ = &__nvoc_up_thunk_RsResource_vaspaceapiPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__vaspaceapiControlFilter__ = &__nvoc_up_thunk_RsResource_vaspaceapiControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__vaspaceapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_vaspaceapiIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__vaspaceapiMapTo__ = &__nvoc_up_thunk_RsResource_vaspaceapiMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__vaspaceapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_vaspaceapiUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__vaspaceapiGetRefCount__ = &__nvoc_up_thunk_RsResource_vaspaceapiGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__vaspaceapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_vaspaceapiAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (vaspaceapi) this + + // Initialize vtable(s) with 6 per-object function pointer(s). __nvoc_init_funcTable_VaSpaceApi_1(pThis); } diff --git a/src/nvidia/generated/g_vaspace_api_nvoc.h b/src/nvidia/generated/g_vaspace_api_nvoc.h index ec33b9d433..ea01b70525 100644 --- a/src/nvidia/generated/g_vaspace_api_nvoc.h +++ b/src/nvidia/generated/g_vaspace_api_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -72,10 +72,15 @@ typedef enum #endif +// Metadata including vtable +struct NVOC_VTABLE__VaSpaceApi; + + struct VaSpaceApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__VaSpaceApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -88,14 +93,24 @@ struct VaSpaceApi { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct VaSpaceApi *__nvoc_pbase_VaSpaceApi; // vaspaceapi - // Vtable with 31 per-object function pointers - NvBool (*__vaspaceapiCanCopy__)(struct VaSpaceApi * /*this*/); // virtual override (res) base (gpures) + // Vtable with 6 per-object function pointers NV_STATUS (*__vaspaceapiCtrlCmdVaspaceGetGmmuFormat__)(struct VaSpaceApi * /*this*/, NV90F1_CTRL_VASPACE_GET_GMMU_FORMAT_PARAMS *); // exported (id=0x90f10101) NV_STATUS (*__vaspaceapiCtrlCmdVaspaceGetPageLevelInfo__)(struct VaSpaceApi * /*this*/, NV90F1_CTRL_VASPACE_GET_PAGE_LEVEL_INFO_PARAMS *); // exported (id=0x90f10102) NV_STATUS (*__vaspaceapiCtrlCmdVaspaceReserveEntries__)(struct VaSpaceApi * /*this*/, NV90F1_CTRL_VASPACE_RESERVE_ENTRIES_PARAMS *); // exported (id=0x90f10103) NV_STATUS (*__vaspaceapiCtrlCmdVaspaceReleaseEntries__)(struct VaSpaceApi * /*this*/, NV90F1_CTRL_VASPACE_RELEASE_ENTRIES_PARAMS *); // exported (id=0x90f10104) NV_STATUS (*__vaspaceapiCtrlCmdVaspaceCopyServerReservedPdes__)(struct VaSpaceApi * /*this*/, NV90F1_CTRL_VASPACE_COPY_SERVER_RESERVED_PDES_PARAMS *); // exported (id=0x90f10106) NV_STATUS (*__vaspaceapiCtrlCmdVaspaceGetHostRmManagedSize__)(struct VaSpaceApi * /*this*/, NV90F1_CTRL_VASPACE_GET_HOST_RM_MANAGED_SIZE_PARAMS *); // exported (id=0x90f10107) + + // Data members + struct OBJVASPACE *pVASpace; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__VaSpaceApi { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + + NvBool (*__vaspaceapiCanCopy__)(struct VaSpaceApi * /*this*/); // virtual override (res) base (gpures) NV_STATUS (*__vaspaceapiControl__)(struct VaSpaceApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__vaspaceapiMap__)(struct VaSpaceApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__vaspaceapiUnmap__)(struct VaSpaceApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -120,9 +135,6 @@ struct VaSpaceApi { NV_STATUS (*__vaspaceapiUnmapFrom__)(struct VaSpaceApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__vaspaceapiGetRefCount__)(struct VaSpaceApi * /*this*/); // virtual inherited (res) base (gpures) void (*__vaspaceapiAddAdditionalDependants__)(struct RsClient *, struct VaSpaceApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - struct OBJVASPACE *pVASpace; }; #ifndef __NVOC_CLASS_VaSpaceApi_TYPEDEF__ @@ -155,7 +167,7 @@ NV_STATUS __nvoc_objCreate_VaSpaceApi(VaSpaceApi**, Dynamic*, NvU32, struct CALL // Wrapper macros -#define vaspaceapiCanCopy_FNPTR(pResource) pResource->__vaspaceapiCanCopy__ +#define vaspaceapiCanCopy_FNPTR(pResource) pResource->__nvoc_vtable->__vaspaceapiCanCopy__ #define vaspaceapiCanCopy(pResource) vaspaceapiCanCopy_DISPATCH(pResource) #define vaspaceapiCtrlCmdVaspaceGetGmmuFormat_FNPTR(pVaspaceApi) pVaspaceApi->__vaspaceapiCtrlCmdVaspaceGetGmmuFormat__ #define vaspaceapiCtrlCmdVaspaceGetGmmuFormat(pVaspaceApi, pGmmuFormatParams) vaspaceapiCtrlCmdVaspaceGetGmmuFormat_DISPATCH(pVaspaceApi, pGmmuFormatParams) @@ -169,58 +181,58 @@ NV_STATUS __nvoc_objCreate_VaSpaceApi(VaSpaceApi**, Dynamic*, NvU32, struct CALL #define vaspaceapiCtrlCmdVaspaceCopyServerReservedPdes(pVaspaceApi, pCopyServerReservedPdesParams) vaspaceapiCtrlCmdVaspaceCopyServerReservedPdes_DISPATCH(pVaspaceApi, pCopyServerReservedPdesParams) #define vaspaceapiCtrlCmdVaspaceGetHostRmManagedSize_FNPTR(pVaspaceApi) pVaspaceApi->__vaspaceapiCtrlCmdVaspaceGetHostRmManagedSize__ #define vaspaceapiCtrlCmdVaspaceGetHostRmManagedSize(pVaspaceApi, pVaspaceGetHostRmManagedSizeParams) vaspaceapiCtrlCmdVaspaceGetHostRmManagedSize_DISPATCH(pVaspaceApi, pVaspaceGetHostRmManagedSizeParams) -#define vaspaceapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define vaspaceapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define vaspaceapiControl(pGpuResource, pCallContext, pParams) vaspaceapiControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define vaspaceapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define vaspaceapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define vaspaceapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) vaspaceapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define vaspaceapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define vaspaceapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define vaspaceapiUnmap(pGpuResource, pCallContext, pCpuMapping) vaspaceapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define vaspaceapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define vaspaceapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define vaspaceapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) vaspaceapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define vaspaceapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define vaspaceapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define vaspaceapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) vaspaceapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define vaspaceapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define vaspaceapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define vaspaceapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) vaspaceapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define vaspaceapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define vaspaceapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define vaspaceapiInternalControlForward(pGpuResource, command, pParams, size) vaspaceapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define vaspaceapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define vaspaceapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define vaspaceapiGetInternalObjectHandle(pGpuResource) vaspaceapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define vaspaceapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define vaspaceapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define vaspaceapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) vaspaceapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define vaspaceapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define vaspaceapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define vaspaceapiGetMemInterMapParams(pRmResource, pParams) vaspaceapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define vaspaceapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define vaspaceapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define vaspaceapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) vaspaceapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define vaspaceapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define vaspaceapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define vaspaceapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) vaspaceapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define vaspaceapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define vaspaceapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define vaspaceapiControlSerialization_Prologue(pResource, pCallContext, pParams) vaspaceapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define vaspaceapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define vaspaceapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define vaspaceapiControlSerialization_Epilogue(pResource, pCallContext, pParams) vaspaceapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define vaspaceapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define vaspaceapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define vaspaceapiControl_Prologue(pResource, pCallContext, pParams) vaspaceapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define vaspaceapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define vaspaceapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define vaspaceapiControl_Epilogue(pResource, pCallContext, pParams) vaspaceapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define vaspaceapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define vaspaceapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define vaspaceapiIsDuplicate(pResource, hMemory, pDuplicate) vaspaceapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define vaspaceapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define vaspaceapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define vaspaceapiPreDestruct(pResource) vaspaceapiPreDestruct_DISPATCH(pResource) -#define vaspaceapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define vaspaceapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define vaspaceapiControlFilter(pResource, pCallContext, pParams) vaspaceapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define vaspaceapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define vaspaceapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define vaspaceapiIsPartialUnmapSupported(pResource) vaspaceapiIsPartialUnmapSupported_DISPATCH(pResource) -#define vaspaceapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define vaspaceapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define vaspaceapiMapTo(pResource, pParams) vaspaceapiMapTo_DISPATCH(pResource, pParams) -#define vaspaceapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define vaspaceapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define vaspaceapiUnmapFrom(pResource, pParams) vaspaceapiUnmapFrom_DISPATCH(pResource, pParams) -#define vaspaceapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define vaspaceapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define vaspaceapiGetRefCount(pResource) vaspaceapiGetRefCount_DISPATCH(pResource) -#define vaspaceapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define vaspaceapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define vaspaceapiAddAdditionalDependants(pClient, pResource, pReference) vaspaceapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NvBool vaspaceapiCanCopy_DISPATCH(struct VaSpaceApi *pResource) { - return pResource->__vaspaceapiCanCopy__(pResource); + return pResource->__nvoc_vtable->__vaspaceapiCanCopy__(pResource); } static inline NV_STATUS vaspaceapiCtrlCmdVaspaceGetGmmuFormat_DISPATCH(struct VaSpaceApi *pVaspaceApi, NV90F1_CTRL_VASPACE_GET_GMMU_FORMAT_PARAMS *pGmmuFormatParams) { @@ -248,99 +260,99 @@ static inline NV_STATUS vaspaceapiCtrlCmdVaspaceGetHostRmManagedSize_DISPATCH(st } static inline NV_STATUS vaspaceapiControl_DISPATCH(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__vaspaceapiControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__vaspaceapiControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS vaspaceapiMap_DISPATCH(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__vaspaceapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__vaspaceapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS vaspaceapiUnmap_DISPATCH(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__vaspaceapiUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__vaspaceapiUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool vaspaceapiShareCallback_DISPATCH(struct VaSpaceApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__vaspaceapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__vaspaceapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS vaspaceapiGetRegBaseOffsetAndSize_DISPATCH(struct VaSpaceApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__vaspaceapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__vaspaceapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS vaspaceapiGetMapAddrSpace_DISPATCH(struct VaSpaceApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__vaspaceapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__vaspaceapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS vaspaceapiInternalControlForward_DISPATCH(struct VaSpaceApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__vaspaceapiInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__vaspaceapiInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle vaspaceapiGetInternalObjectHandle_DISPATCH(struct VaSpaceApi *pGpuResource) { - return pGpuResource->__vaspaceapiGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__vaspaceapiGetInternalObjectHandle__(pGpuResource); } static inline NvBool vaspaceapiAccessCallback_DISPATCH(struct VaSpaceApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__vaspaceapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__vaspaceapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS vaspaceapiGetMemInterMapParams_DISPATCH(struct VaSpaceApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__vaspaceapiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__vaspaceapiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS vaspaceapiCheckMemInterUnmap_DISPATCH(struct VaSpaceApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__vaspaceapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__vaspaceapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS vaspaceapiGetMemoryMappingDescriptor_DISPATCH(struct VaSpaceApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__vaspaceapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__vaspaceapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS vaspaceapiControlSerialization_Prologue_DISPATCH(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vaspaceapiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__vaspaceapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void vaspaceapiControlSerialization_Epilogue_DISPATCH(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vaspaceapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__vaspaceapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS vaspaceapiControl_Prologue_DISPATCH(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vaspaceapiControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__vaspaceapiControl_Prologue__(pResource, pCallContext, pParams); } static inline void vaspaceapiControl_Epilogue_DISPATCH(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vaspaceapiControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__vaspaceapiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS vaspaceapiIsDuplicate_DISPATCH(struct VaSpaceApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__vaspaceapiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__vaspaceapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void vaspaceapiPreDestruct_DISPATCH(struct VaSpaceApi *pResource) { - pResource->__vaspaceapiPreDestruct__(pResource); + pResource->__nvoc_vtable->__vaspaceapiPreDestruct__(pResource); } static inline NV_STATUS vaspaceapiControlFilter_DISPATCH(struct VaSpaceApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vaspaceapiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__vaspaceapiControlFilter__(pResource, pCallContext, pParams); } static inline NvBool vaspaceapiIsPartialUnmapSupported_DISPATCH(struct VaSpaceApi *pResource) { - return pResource->__vaspaceapiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__vaspaceapiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS vaspaceapiMapTo_DISPATCH(struct VaSpaceApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__vaspaceapiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__vaspaceapiMapTo__(pResource, pParams); } static inline NV_STATUS vaspaceapiUnmapFrom_DISPATCH(struct VaSpaceApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__vaspaceapiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__vaspaceapiUnmapFrom__(pResource, pParams); } static inline NvU32 vaspaceapiGetRefCount_DISPATCH(struct VaSpaceApi *pResource) { - return pResource->__vaspaceapiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__vaspaceapiGetRefCount__(pResource); } static inline void vaspaceapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VaSpaceApi *pResource, RsResourceRef *pReference) { - pResource->__vaspaceapiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__vaspaceapiAddAdditionalDependants__(pClient, pResource, pReference); } NvBool vaspaceapiCanCopy_IMPL(struct VaSpaceApi *pResource); diff --git a/src/nvidia/generated/g_vaspace_nvoc.c b/src/nvidia/generated/g_vaspace_nvoc.c index f864bd5d50..5e0489f0b5 100644 --- a/src/nvidia/generated/g_vaspace_nvoc.c +++ b/src/nvidia/generated/g_vaspace_nvoc.c @@ -63,6 +63,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJVASPACE = /*pExportInfo=*/ &__nvoc_export_info_OBJVASPACE }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJVASPACE = { /*numEntries=*/ 0, @@ -96,100 +100,47 @@ NV_STATUS __nvoc_ctor_OBJVASPACE(OBJVASPACE *pThis) { // Vtable initialization static void __nvoc_init_funcTable_OBJVASPACE_1(OBJVASPACE *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // vaspaceConstruct_ -- pure virtual - pThis->__vaspaceConstruct___ = NULL; - - // vaspaceAlloc -- pure virtual - pThis->__vaspaceAlloc__ = NULL; - - // vaspaceFree -- pure virtual - pThis->__vaspaceFree__ = NULL; - - // vaspaceApplyDefaultAlignment -- pure virtual - pThis->__vaspaceApplyDefaultAlignment__ = NULL; - - // vaspaceIncAllocRefCnt -- inline virtual body - pThis->__vaspaceIncAllocRefCnt__ = &vaspaceIncAllocRefCnt_b7902c; - - // vaspaceGetVaStart -- virtual - pThis->__vaspaceGetVaStart__ = &vaspaceGetVaStart_IMPL; - - // vaspaceGetVaLimit -- virtual - pThis->__vaspaceGetVaLimit__ = &vaspaceGetVaLimit_IMPL; - - // vaspaceGetVasInfo -- pure virtual - pThis->__vaspaceGetVasInfo__ = NULL; - - // vaspaceGetFlags -- inline virtual body - pThis->__vaspaceGetFlags__ = &vaspaceGetFlags_edd98b; - - // vaspaceMap -- inline virtual body - pThis->__vaspaceMap__ = &vaspaceMap_b7902c; - - // vaspaceUnmap -- inline virtual body - pThis->__vaspaceUnmap__ = &vaspaceUnmap_8b86a5; - - // vaspaceReserveMempool -- inline virtual body - pThis->__vaspaceReserveMempool__ = &vaspaceReserveMempool_ac1694; - - // vaspaceGetHeap -- inline virtual body - pThis->__vaspaceGetHeap__ = &vaspaceGetHeap_128d6d; - - // vaspaceGetMapPageSize -- inline virtual body - pThis->__vaspaceGetMapPageSize__ = &vaspaceGetMapPageSize_07238a; - - // vaspaceGetBigPageSize -- inline virtual body - pThis->__vaspaceGetBigPageSize__ = &vaspaceGetBigPageSize_07238a; - - // vaspaceIsMirrored -- inline virtual body - pThis->__vaspaceIsMirrored__ = &vaspaceIsMirrored_814c13; - - // vaspaceIsFaultCapable -- inline virtual body - pThis->__vaspaceIsFaultCapable__ = &vaspaceIsFaultCapable_814c13; - - // vaspaceIsExternallyOwned -- inline virtual body - pThis->__vaspaceIsExternallyOwned__ = &vaspaceIsExternallyOwned_814c13; - - // vaspaceIsAtsEnabled -- inline virtual body - pThis->__vaspaceIsAtsEnabled__ = &vaspaceIsAtsEnabled_814c13; - - // vaspaceGetPasid -- inline virtual body - pThis->__vaspaceGetPasid__ = &vaspaceGetPasid_b7902c; - - // vaspaceGetPageDirBase -- inline virtual body - pThis->__vaspaceGetPageDirBase__ = &vaspaceGetPageDirBase_128d6d; - - // vaspaceGetKernelPageDirBase -- inline virtual body - pThis->__vaspaceGetKernelPageDirBase__ = &vaspaceGetKernelPageDirBase_128d6d; - - // vaspacePinRootPageDir -- inline virtual body - pThis->__vaspacePinRootPageDir__ = &vaspacePinRootPageDir_b7902c; - - // vaspaceUnpinRootPageDir -- inline virtual body - pThis->__vaspaceUnpinRootPageDir__ = &vaspaceUnpinRootPageDir_8b86a5; - - // vaspaceInvalidateTlb -- virtual - pThis->__vaspaceInvalidateTlb__ = &vaspaceInvalidateTlb_IMPL; - - // vaspaceGetPageTableInfo -- inline virtual body - pThis->__vaspaceGetPageTableInfo__ = &vaspaceGetPageTableInfo_b7902c; - - // vaspaceGetPteInfo -- inline virtual body - pThis->__vaspaceGetPteInfo__ = &vaspaceGetPteInfo_b7902c; - - // vaspaceSetPteInfo -- inline virtual body - pThis->__vaspaceSetPteInfo__ = &vaspaceSetPteInfo_b7902c; - - // vaspaceFreeV2 -- inline virtual body - pThis->__vaspaceFreeV2__ = &vaspaceFreeV2_b7902c; -} // End __nvoc_init_funcTable_OBJVASPACE_1 with approximately 29 basic block(s). +} // End __nvoc_init_funcTable_OBJVASPACE_1 // Initialize vtable(s) for 29 virtual method(s). void __nvoc_init_funcTable_OBJVASPACE(OBJVASPACE *pThis) { - // Initialize vtable(s) with 29 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__OBJVASPACE vtable = { + .__vaspaceConstruct___ = NULL, // pure virtual + .__vaspaceAlloc__ = NULL, // pure virtual + .__vaspaceFree__ = NULL, // pure virtual + .__vaspaceApplyDefaultAlignment__ = NULL, // pure virtual + .__vaspaceIncAllocRefCnt__ = &vaspaceIncAllocRefCnt_14ee5e, // inline virtual body + .__vaspaceGetVaStart__ = &vaspaceGetVaStart_IMPL, // virtual + .__vaspaceGetVaLimit__ = &vaspaceGetVaLimit_IMPL, // virtual + .__vaspaceGetVasInfo__ = NULL, // pure virtual + .__vaspaceGetFlags__ = &vaspaceGetFlags_edd98b, // inline virtual body + .__vaspaceMap__ = &vaspaceMap_14ee5e, // inline virtual body + .__vaspaceUnmap__ = &vaspaceUnmap_af5be7, // inline virtual body + .__vaspaceReserveMempool__ = &vaspaceReserveMempool_ac1694, // inline virtual body + .__vaspaceGetHeap__ = &vaspaceGetHeap_9451a7, // inline virtual body + .__vaspaceGetMapPageSize__ = &vaspaceGetMapPageSize_c26fae, // inline virtual body + .__vaspaceGetBigPageSize__ = &vaspaceGetBigPageSize_c26fae, // inline virtual body + .__vaspaceIsMirrored__ = &vaspaceIsMirrored_2fa1ff, // inline virtual body + .__vaspaceIsFaultCapable__ = &vaspaceIsFaultCapable_2fa1ff, // inline virtual body + .__vaspaceIsExternallyOwned__ = &vaspaceIsExternallyOwned_2fa1ff, // inline virtual body + .__vaspaceIsAtsEnabled__ = &vaspaceIsAtsEnabled_2fa1ff, // inline virtual body + .__vaspaceGetPasid__ = &vaspaceGetPasid_14ee5e, // inline virtual body + .__vaspaceGetPageDirBase__ = &vaspaceGetPageDirBase_9451a7, // inline virtual body + .__vaspaceGetKernelPageDirBase__ = &vaspaceGetKernelPageDirBase_9451a7, // inline virtual body + .__vaspacePinRootPageDir__ = &vaspacePinRootPageDir_14ee5e, // inline virtual body + .__vaspaceUnpinRootPageDir__ = &vaspaceUnpinRootPageDir_af5be7, // inline virtual body + .__vaspaceInvalidateTlb__ = &vaspaceInvalidateTlb_IMPL, // virtual + .__vaspaceGetPageTableInfo__ = &vaspaceGetPageTableInfo_14ee5e, // inline virtual body + .__vaspaceGetPteInfo__ = &vaspaceGetPteInfo_14ee5e, // inline virtual body + .__vaspaceSetPteInfo__ = &vaspaceSetPteInfo_14ee5e, // inline virtual body + .__vaspaceFreeV2__ = &vaspaceFreeV2_14ee5e, // inline virtual body + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_vtable = &vtable; // (vaspace) this __nvoc_init_funcTable_OBJVASPACE_1(pThis); } diff --git a/src/nvidia/generated/g_vaspace_nvoc.h b/src/nvidia/generated/g_vaspace_nvoc.h index 3f4249dd62..de08f9d893 100644 --- a/src/nvidia/generated/g_vaspace_nvoc.h +++ b/src/nvidia/generated/g_vaspace_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -262,10 +262,15 @@ typedef enum #endif +// Metadata including vtable +struct NVOC_VTABLE__OBJVASPACE; + + struct OBJVASPACE { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__OBJVASPACE *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct Object __nvoc_base_Object; @@ -274,7 +279,19 @@ struct OBJVASPACE { struct Object *__nvoc_pbase_Object; // obj super struct OBJVASPACE *__nvoc_pbase_OBJVASPACE; // vaspace - // Vtable with 29 per-object function pointers + // Data members + NvU32 gpuMask; + ADDRESS_TRANSLATION addressTranslation; + NvU32 refCnt; + NvU32 vaspaceId; + NvU64 vasStart; + NvU64 vasLimit; +}; + + +// Metadata including vtable with 29 function pointers plus superclass metadata +struct NVOC_VTABLE__OBJVASPACE { + NV_STATUS (*__vaspaceConstruct___)(struct OBJVASPACE * /*this*/, NvU32, NvU32, NvU64, NvU64, NvU64, NvU64, NvU32); // pure virtual NV_STATUS (*__vaspaceAlloc__)(struct OBJVASPACE * /*this*/, NvU64, NvU64, NvU64, NvU64, NvU64, VAS_ALLOC_FLAGS, NvU64 *); // pure virtual NV_STATUS (*__vaspaceFree__)(struct OBJVASPACE * /*this*/, NvU64); // pure virtual @@ -304,14 +321,6 @@ struct OBJVASPACE { NV_STATUS (*__vaspaceGetPteInfo__)(struct OBJVASPACE * /*this*/, struct OBJGPU *, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *, RmPhysAddr *); // inline virtual body NV_STATUS (*__vaspaceSetPteInfo__)(struct OBJVASPACE * /*this*/, struct OBJGPU *, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *); // inline virtual body NV_STATUS (*__vaspaceFreeV2__)(struct OBJVASPACE * /*this*/, NvU64, NvU64 *); // inline virtual body - - // Data members - NvU32 gpuMask; - ADDRESS_TRANSLATION addressTranslation; - NvU32 refCnt; - NvU32 vaspaceId; - NvU64 vasStart; - NvU64 vasLimit; }; #ifndef __NVOC_CLASS_OBJVASPACE_TYPEDEF__ @@ -344,184 +353,184 @@ NV_STATUS __nvoc_objCreate_OBJVASPACE(OBJVASPACE**, Dynamic*, NvU32); // Wrapper macros -#define vaspaceConstruct__FNPTR(pVAS) pVAS->__vaspaceConstruct___ +#define vaspaceConstruct__FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceConstruct___ #define vaspaceConstruct_(pVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags) vaspaceConstruct__DISPATCH(pVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags) -#define vaspaceAlloc_FNPTR(pVAS) pVAS->__vaspaceAlloc__ +#define vaspaceAlloc_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceAlloc__ #define vaspaceAlloc(pVAS, size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr) vaspaceAlloc_DISPATCH(pVAS, size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr) -#define vaspaceFree_FNPTR(pVAS) pVAS->__vaspaceFree__ +#define vaspaceFree_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceFree__ #define vaspaceFree(pVAS, vAddr) vaspaceFree_DISPATCH(pVAS, vAddr) -#define vaspaceApplyDefaultAlignment_FNPTR(pVAS) pVAS->__vaspaceApplyDefaultAlignment__ +#define vaspaceApplyDefaultAlignment_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceApplyDefaultAlignment__ #define vaspaceApplyDefaultAlignment(pVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask) vaspaceApplyDefaultAlignment_DISPATCH(pVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask) -#define vaspaceIncAllocRefCnt_FNPTR(pVAS) pVAS->__vaspaceIncAllocRefCnt__ +#define vaspaceIncAllocRefCnt_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceIncAllocRefCnt__ #define vaspaceIncAllocRefCnt(pVAS, vAddr) vaspaceIncAllocRefCnt_DISPATCH(pVAS, vAddr) -#define vaspaceGetVaStart_FNPTR(pVAS) pVAS->__vaspaceGetVaStart__ +#define vaspaceGetVaStart_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceGetVaStart__ #define vaspaceGetVaStart(pVAS) vaspaceGetVaStart_DISPATCH(pVAS) -#define vaspaceGetVaLimit_FNPTR(pVAS) pVAS->__vaspaceGetVaLimit__ +#define vaspaceGetVaLimit_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceGetVaLimit__ #define vaspaceGetVaLimit(pVAS) vaspaceGetVaLimit_DISPATCH(pVAS) -#define vaspaceGetVasInfo_FNPTR(pVAS) pVAS->__vaspaceGetVasInfo__ +#define vaspaceGetVasInfo_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceGetVasInfo__ #define vaspaceGetVasInfo(pVAS, pParams) vaspaceGetVasInfo_DISPATCH(pVAS, pParams) -#define vaspaceGetFlags_FNPTR(pVAS) pVAS->__vaspaceGetFlags__ +#define vaspaceGetFlags_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceGetFlags__ #define vaspaceGetFlags(pVAS) vaspaceGetFlags_DISPATCH(pVAS) -#define vaspaceMap_FNPTR(pVAS) pVAS->__vaspaceMap__ +#define vaspaceMap_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceMap__ #define vaspaceMap(pVAS, pGpu, vaLo, vaHi, pTarget, flags) vaspaceMap_DISPATCH(pVAS, pGpu, vaLo, vaHi, pTarget, flags) -#define vaspaceUnmap_FNPTR(pVAS) pVAS->__vaspaceUnmap__ +#define vaspaceUnmap_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceUnmap__ #define vaspaceUnmap(pVAS, pGpu, vaLo, vaHi) vaspaceUnmap_DISPATCH(pVAS, pGpu, vaLo, vaHi) -#define vaspaceReserveMempool_FNPTR(pVAS) pVAS->__vaspaceReserveMempool__ +#define vaspaceReserveMempool_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceReserveMempool__ #define vaspaceReserveMempool(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags) vaspaceReserveMempool_DISPATCH(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags) -#define vaspaceGetHeap_FNPTR(pVAS) pVAS->__vaspaceGetHeap__ +#define vaspaceGetHeap_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceGetHeap__ #define vaspaceGetHeap(pVAS) vaspaceGetHeap_DISPATCH(pVAS) -#define vaspaceGetMapPageSize_FNPTR(pVAS) pVAS->__vaspaceGetMapPageSize__ +#define vaspaceGetMapPageSize_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceGetMapPageSize__ #define vaspaceGetMapPageSize(pVAS, pGpu, pMemBlock) vaspaceGetMapPageSize_DISPATCH(pVAS, pGpu, pMemBlock) -#define vaspaceGetBigPageSize_FNPTR(pVAS) pVAS->__vaspaceGetBigPageSize__ +#define vaspaceGetBigPageSize_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceGetBigPageSize__ #define vaspaceGetBigPageSize(pVAS) vaspaceGetBigPageSize_DISPATCH(pVAS) -#define vaspaceIsMirrored_FNPTR(pVAS) pVAS->__vaspaceIsMirrored__ +#define vaspaceIsMirrored_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceIsMirrored__ #define vaspaceIsMirrored(pVAS) vaspaceIsMirrored_DISPATCH(pVAS) -#define vaspaceIsFaultCapable_FNPTR(pVAS) pVAS->__vaspaceIsFaultCapable__ +#define vaspaceIsFaultCapable_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceIsFaultCapable__ #define vaspaceIsFaultCapable(pVAS) vaspaceIsFaultCapable_DISPATCH(pVAS) -#define vaspaceIsExternallyOwned_FNPTR(pVAS) pVAS->__vaspaceIsExternallyOwned__ +#define vaspaceIsExternallyOwned_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceIsExternallyOwned__ #define vaspaceIsExternallyOwned(pVAS) vaspaceIsExternallyOwned_DISPATCH(pVAS) -#define vaspaceIsAtsEnabled_FNPTR(pVAS) pVAS->__vaspaceIsAtsEnabled__ +#define vaspaceIsAtsEnabled_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceIsAtsEnabled__ #define vaspaceIsAtsEnabled(pVAS) vaspaceIsAtsEnabled_DISPATCH(pVAS) -#define vaspaceGetPasid_FNPTR(pVAS) pVAS->__vaspaceGetPasid__ +#define vaspaceGetPasid_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceGetPasid__ #define vaspaceGetPasid(pVAS, pPasid) vaspaceGetPasid_DISPATCH(pVAS, pPasid) -#define vaspaceGetPageDirBase_FNPTR(pVAS) pVAS->__vaspaceGetPageDirBase__ +#define vaspaceGetPageDirBase_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceGetPageDirBase__ #define vaspaceGetPageDirBase(pVAS, pGpu) vaspaceGetPageDirBase_DISPATCH(pVAS, pGpu) -#define vaspaceGetKernelPageDirBase_FNPTR(pVAS) pVAS->__vaspaceGetKernelPageDirBase__ +#define vaspaceGetKernelPageDirBase_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceGetKernelPageDirBase__ #define vaspaceGetKernelPageDirBase(pVAS, pGpu) vaspaceGetKernelPageDirBase_DISPATCH(pVAS, pGpu) -#define vaspacePinRootPageDir_FNPTR(pVAS) pVAS->__vaspacePinRootPageDir__ +#define vaspacePinRootPageDir_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspacePinRootPageDir__ #define vaspacePinRootPageDir(pVAS, pGpu) vaspacePinRootPageDir_DISPATCH(pVAS, pGpu) -#define vaspaceUnpinRootPageDir_FNPTR(pVAS) pVAS->__vaspaceUnpinRootPageDir__ +#define vaspaceUnpinRootPageDir_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceUnpinRootPageDir__ #define vaspaceUnpinRootPageDir(pVAS, pGpu) vaspaceUnpinRootPageDir_DISPATCH(pVAS, pGpu) -#define vaspaceInvalidateTlb_FNPTR(pVAS) pVAS->__vaspaceInvalidateTlb__ +#define vaspaceInvalidateTlb_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceInvalidateTlb__ #define vaspaceInvalidateTlb(pVAS, pGpu, type) vaspaceInvalidateTlb_DISPATCH(pVAS, pGpu, type) -#define vaspaceGetPageTableInfo_FNPTR(pVAS) pVAS->__vaspaceGetPageTableInfo__ +#define vaspaceGetPageTableInfo_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceGetPageTableInfo__ #define vaspaceGetPageTableInfo(pVAS, pParams) vaspaceGetPageTableInfo_DISPATCH(pVAS, pParams) -#define vaspaceGetPteInfo_FNPTR(pVAS) pVAS->__vaspaceGetPteInfo__ +#define vaspaceGetPteInfo_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceGetPteInfo__ #define vaspaceGetPteInfo(pVAS, pGpu, pParams, pPhysAddr) vaspaceGetPteInfo_DISPATCH(pVAS, pGpu, pParams, pPhysAddr) -#define vaspaceSetPteInfo_FNPTR(pVAS) pVAS->__vaspaceSetPteInfo__ +#define vaspaceSetPteInfo_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceSetPteInfo__ #define vaspaceSetPteInfo(pVAS, pGpu, pParams) vaspaceSetPteInfo_DISPATCH(pVAS, pGpu, pParams) -#define vaspaceFreeV2_FNPTR(pVAS) pVAS->__vaspaceFreeV2__ +#define vaspaceFreeV2_FNPTR(pVAS) pVAS->__nvoc_vtable->__vaspaceFreeV2__ #define vaspaceFreeV2(pVAS, vAddr, pSize) vaspaceFreeV2_DISPATCH(pVAS, vAddr, pSize) // Dispatch functions static inline NV_STATUS vaspaceConstruct__DISPATCH(struct OBJVASPACE *pVAS, NvU32 classId, NvU32 vaspaceId, NvU64 vaStart, NvU64 vaLimit, NvU64 vaStartInternal, NvU64 vaLimitInternal, NvU32 flags) { - return pVAS->__vaspaceConstruct___(pVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags); + return pVAS->__nvoc_vtable->__vaspaceConstruct___(pVAS, classId, vaspaceId, vaStart, vaLimit, vaStartInternal, vaLimitInternal, flags); } static inline NV_STATUS vaspaceAlloc_DISPATCH(struct OBJVASPACE *pVAS, NvU64 size, NvU64 align, NvU64 rangeLo, NvU64 rangeHi, NvU64 pageSizeLockMask, VAS_ALLOC_FLAGS flags, NvU64 *pAddr) { - return pVAS->__vaspaceAlloc__(pVAS, size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr); + return pVAS->__nvoc_vtable->__vaspaceAlloc__(pVAS, size, align, rangeLo, rangeHi, pageSizeLockMask, flags, pAddr); } static inline NV_STATUS vaspaceFree_DISPATCH(struct OBJVASPACE *pVAS, NvU64 vAddr) { - return pVAS->__vaspaceFree__(pVAS, vAddr); + return pVAS->__nvoc_vtable->__vaspaceFree__(pVAS, vAddr); } static inline NV_STATUS vaspaceApplyDefaultAlignment_DISPATCH(struct OBJVASPACE *pVAS, const FB_ALLOC_INFO *pAllocInfo, NvU64 *pAlign, NvU64 *pSize, NvU64 *pPageSizeLockMask) { - return pVAS->__vaspaceApplyDefaultAlignment__(pVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask); + return pVAS->__nvoc_vtable->__vaspaceApplyDefaultAlignment__(pVAS, pAllocInfo, pAlign, pSize, pPageSizeLockMask); } static inline NV_STATUS vaspaceIncAllocRefCnt_DISPATCH(struct OBJVASPACE *pVAS, NvU64 vAddr) { - return pVAS->__vaspaceIncAllocRefCnt__(pVAS, vAddr); + return pVAS->__nvoc_vtable->__vaspaceIncAllocRefCnt__(pVAS, vAddr); } static inline NvU64 vaspaceGetVaStart_DISPATCH(struct OBJVASPACE *pVAS) { - return pVAS->__vaspaceGetVaStart__(pVAS); + return pVAS->__nvoc_vtable->__vaspaceGetVaStart__(pVAS); } static inline NvU64 vaspaceGetVaLimit_DISPATCH(struct OBJVASPACE *pVAS) { - return pVAS->__vaspaceGetVaLimit__(pVAS); + return pVAS->__nvoc_vtable->__vaspaceGetVaLimit__(pVAS); } static inline NV_STATUS vaspaceGetVasInfo_DISPATCH(struct OBJVASPACE *pVAS, NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS *pParams) { - return pVAS->__vaspaceGetVasInfo__(pVAS, pParams); + return pVAS->__nvoc_vtable->__vaspaceGetVasInfo__(pVAS, pParams); } static inline NvU32 vaspaceGetFlags_DISPATCH(struct OBJVASPACE *pVAS) { - return pVAS->__vaspaceGetFlags__(pVAS); + return pVAS->__nvoc_vtable->__vaspaceGetFlags__(pVAS); } static inline NV_STATUS vaspaceMap_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { - return pVAS->__vaspaceMap__(pVAS, pGpu, vaLo, vaHi, pTarget, flags); + return pVAS->__nvoc_vtable->__vaspaceMap__(pVAS, pGpu, vaLo, vaHi, pTarget, flags); } static inline void vaspaceUnmap_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { - pVAS->__vaspaceUnmap__(pVAS, pGpu, vaLo, vaHi); + pVAS->__nvoc_vtable->__vaspaceUnmap__(pVAS, pGpu, vaLo, vaHi); } static inline NV_STATUS vaspaceReserveMempool_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { - return pVAS->__vaspaceReserveMempool__(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags); + return pVAS->__nvoc_vtable->__vaspaceReserveMempool__(pVAS, pGpu, pDevice, size, pageSizeLockMask, flags); } static inline OBJEHEAP * vaspaceGetHeap_DISPATCH(struct OBJVASPACE *pVAS) { - return pVAS->__vaspaceGetHeap__(pVAS); + return pVAS->__nvoc_vtable->__vaspaceGetHeap__(pVAS); } static inline NvU64 vaspaceGetMapPageSize_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, EMEMBLOCK *pMemBlock) { - return pVAS->__vaspaceGetMapPageSize__(pVAS, pGpu, pMemBlock); + return pVAS->__nvoc_vtable->__vaspaceGetMapPageSize__(pVAS, pGpu, pMemBlock); } static inline NvU64 vaspaceGetBigPageSize_DISPATCH(struct OBJVASPACE *pVAS) { - return pVAS->__vaspaceGetBigPageSize__(pVAS); + return pVAS->__nvoc_vtable->__vaspaceGetBigPageSize__(pVAS); } static inline NvBool vaspaceIsMirrored_DISPATCH(struct OBJVASPACE *pVAS) { - return pVAS->__vaspaceIsMirrored__(pVAS); + return pVAS->__nvoc_vtable->__vaspaceIsMirrored__(pVAS); } static inline NvBool vaspaceIsFaultCapable_DISPATCH(struct OBJVASPACE *pVAS) { - return pVAS->__vaspaceIsFaultCapable__(pVAS); + return pVAS->__nvoc_vtable->__vaspaceIsFaultCapable__(pVAS); } static inline NvBool vaspaceIsExternallyOwned_DISPATCH(struct OBJVASPACE *pVAS) { - return pVAS->__vaspaceIsExternallyOwned__(pVAS); + return pVAS->__nvoc_vtable->__vaspaceIsExternallyOwned__(pVAS); } static inline NvBool vaspaceIsAtsEnabled_DISPATCH(struct OBJVASPACE *pVAS) { - return pVAS->__vaspaceIsAtsEnabled__(pVAS); + return pVAS->__nvoc_vtable->__vaspaceIsAtsEnabled__(pVAS); } static inline NV_STATUS vaspaceGetPasid_DISPATCH(struct OBJVASPACE *pVAS, NvU32 *pPasid) { - return pVAS->__vaspaceGetPasid__(pVAS, pPasid); + return pVAS->__nvoc_vtable->__vaspaceGetPasid__(pVAS, pPasid); } static inline PMEMORY_DESCRIPTOR vaspaceGetPageDirBase_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { - return pVAS->__vaspaceGetPageDirBase__(pVAS, pGpu); + return pVAS->__nvoc_vtable->__vaspaceGetPageDirBase__(pVAS, pGpu); } static inline PMEMORY_DESCRIPTOR vaspaceGetKernelPageDirBase_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { - return pVAS->__vaspaceGetKernelPageDirBase__(pVAS, pGpu); + return pVAS->__nvoc_vtable->__vaspaceGetKernelPageDirBase__(pVAS, pGpu); } static inline NV_STATUS vaspacePinRootPageDir_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { - return pVAS->__vaspacePinRootPageDir__(pVAS, pGpu); + return pVAS->__nvoc_vtable->__vaspacePinRootPageDir__(pVAS, pGpu); } static inline void vaspaceUnpinRootPageDir_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { - pVAS->__vaspaceUnpinRootPageDir__(pVAS, pGpu); + pVAS->__nvoc_vtable->__vaspaceUnpinRootPageDir__(pVAS, pGpu); } static inline void vaspaceInvalidateTlb_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type) { - pVAS->__vaspaceInvalidateTlb__(pVAS, pGpu, type); + pVAS->__nvoc_vtable->__vaspaceInvalidateTlb__(pVAS, pGpu, type); } static inline NV_STATUS vaspaceGetPageTableInfo_DISPATCH(struct OBJVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { - return pVAS->__vaspaceGetPageTableInfo__(pVAS, pParams); + return pVAS->__nvoc_vtable->__vaspaceGetPageTableInfo__(pVAS, pParams); } static inline NV_STATUS vaspaceGetPteInfo_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { - return pVAS->__vaspaceGetPteInfo__(pVAS, pGpu, pParams, pPhysAddr); + return pVAS->__nvoc_vtable->__vaspaceGetPteInfo__(pVAS, pGpu, pParams, pPhysAddr); } static inline NV_STATUS vaspaceSetPteInfo_DISPATCH(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { - return pVAS->__vaspaceSetPteInfo__(pVAS, pGpu, pParams); + return pVAS->__nvoc_vtable->__vaspaceSetPteInfo__(pVAS, pGpu, pParams); } static inline NV_STATUS vaspaceFreeV2_DISPATCH(struct OBJVASPACE *pVAS, NvU64 vAddr, NvU64 *pSize) { - return pVAS->__vaspaceFreeV2__(pVAS, vAddr, pSize); + return pVAS->__nvoc_vtable->__vaspaceFreeV2__(pVAS, vAddr, pSize); } -static inline NV_STATUS vaspaceIncAllocRefCnt_b7902c(struct OBJVASPACE *pVAS, NvU64 vAddr) { - NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); +static inline NV_STATUS vaspaceIncAllocRefCnt_14ee5e(struct OBJVASPACE *pVAS, NvU64 vAddr) { + NV_ASSERT_PRECOMP(NV_FALSE); return NV_ERR_NOT_SUPPORTED; } @@ -533,97 +542,97 @@ static inline NvU32 vaspaceGetFlags_edd98b(struct OBJVASPACE *pVAS) { return 0U; } -static inline NV_STATUS vaspaceMap_b7902c(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { - NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); +static inline NV_STATUS vaspaceMap_14ee5e(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi, const MMU_MAP_TARGET *pTarget, const VAS_MAP_FLAGS flags) { + NV_ASSERT_PRECOMP(NV_FALSE); return NV_ERR_NOT_SUPPORTED; } -static inline void vaspaceUnmap_8b86a5(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { - NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); +static inline void vaspaceUnmap_af5be7(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, const NvU64 vaLo, const NvU64 vaHi) { + NV_ASSERT_PRECOMP(NV_FALSE); } static inline NV_STATUS vaspaceReserveMempool_ac1694(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, struct Device *pDevice, NvU64 size, NvU64 pageSizeLockMask, NvU32 flags) { return NV_OK; } -static inline OBJEHEAP *vaspaceGetHeap_128d6d(struct OBJVASPACE *pVAS) { - NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); +static inline OBJEHEAP *vaspaceGetHeap_9451a7(struct OBJVASPACE *pVAS) { + NV_ASSERT_PRECOMP(NV_FALSE); return ((void *)0); } -static inline NvU64 vaspaceGetMapPageSize_07238a(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, EMEMBLOCK *pMemBlock) { - NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); +static inline NvU64 vaspaceGetMapPageSize_c26fae(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, EMEMBLOCK *pMemBlock) { + NV_ASSERT_PRECOMP(NV_FALSE); return 0U; } -static inline NvU64 vaspaceGetBigPageSize_07238a(struct OBJVASPACE *pVAS) { - NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); +static inline NvU64 vaspaceGetBigPageSize_c26fae(struct OBJVASPACE *pVAS) { + NV_ASSERT_PRECOMP(NV_FALSE); return 0U; } -static inline NvBool vaspaceIsMirrored_814c13(struct OBJVASPACE *pVAS) { - NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); - return ((NvBool)(0 != 0)); +static inline NvBool vaspaceIsMirrored_2fa1ff(struct OBJVASPACE *pVAS) { + NV_ASSERT_PRECOMP(NV_FALSE); + return NV_FALSE; } -static inline NvBool vaspaceIsFaultCapable_814c13(struct OBJVASPACE *pVAS) { - NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); - return ((NvBool)(0 != 0)); +static inline NvBool vaspaceIsFaultCapable_2fa1ff(struct OBJVASPACE *pVAS) { + NV_ASSERT_PRECOMP(NV_FALSE); + return NV_FALSE; } -static inline NvBool vaspaceIsExternallyOwned_814c13(struct OBJVASPACE *pVAS) { - NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); - return ((NvBool)(0 != 0)); +static inline NvBool vaspaceIsExternallyOwned_2fa1ff(struct OBJVASPACE *pVAS) { + NV_ASSERT_PRECOMP(NV_FALSE); + return NV_FALSE; } -static inline NvBool vaspaceIsAtsEnabled_814c13(struct OBJVASPACE *pVAS) { - NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); - return ((NvBool)(0 != 0)); +static inline NvBool vaspaceIsAtsEnabled_2fa1ff(struct OBJVASPACE *pVAS) { + NV_ASSERT_PRECOMP(NV_FALSE); + return NV_FALSE; } -static inline NV_STATUS vaspaceGetPasid_b7902c(struct OBJVASPACE *pVAS, NvU32 *pPasid) { - NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); +static inline NV_STATUS vaspaceGetPasid_14ee5e(struct OBJVASPACE *pVAS, NvU32 *pPasid) { + NV_ASSERT_PRECOMP(NV_FALSE); return NV_ERR_NOT_SUPPORTED; } -static inline PMEMORY_DESCRIPTOR vaspaceGetPageDirBase_128d6d(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { - NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); +static inline PMEMORY_DESCRIPTOR vaspaceGetPageDirBase_9451a7(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { + NV_ASSERT_PRECOMP(NV_FALSE); return ((void *)0); } -static inline PMEMORY_DESCRIPTOR vaspaceGetKernelPageDirBase_128d6d(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { - NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); +static inline PMEMORY_DESCRIPTOR vaspaceGetKernelPageDirBase_9451a7(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { + NV_ASSERT_PRECOMP(NV_FALSE); return ((void *)0); } -static inline NV_STATUS vaspacePinRootPageDir_b7902c(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { - NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); +static inline NV_STATUS vaspacePinRootPageDir_14ee5e(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { + NV_ASSERT_PRECOMP(NV_FALSE); return NV_ERR_NOT_SUPPORTED; } -static inline void vaspaceUnpinRootPageDir_8b86a5(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { - NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); +static inline void vaspaceUnpinRootPageDir_af5be7(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu) { + NV_ASSERT_PRECOMP(NV_FALSE); } void vaspaceInvalidateTlb_IMPL(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, VAS_PTE_UPDATE_TYPE type); -static inline NV_STATUS vaspaceGetPageTableInfo_b7902c(struct OBJVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { - NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); +static inline NV_STATUS vaspaceGetPageTableInfo_14ee5e(struct OBJVASPACE *pVAS, NV0080_CTRL_DMA_GET_PDE_INFO_PARAMS *pParams) { + NV_ASSERT_PRECOMP(NV_FALSE); return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS vaspaceGetPteInfo_b7902c(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { - NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); +static inline NV_STATUS vaspaceGetPteInfo_14ee5e(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_GET_PTE_INFO_PARAMS *pParams, RmPhysAddr *pPhysAddr) { + NV_ASSERT_PRECOMP(NV_FALSE); return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS vaspaceSetPteInfo_b7902c(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { - NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); +static inline NV_STATUS vaspaceSetPteInfo_14ee5e(struct OBJVASPACE *pVAS, struct OBJGPU *pGpu, NV0080_CTRL_DMA_SET_PTE_INFO_PARAMS *pParams) { + NV_ASSERT_PRECOMP(NV_FALSE); return NV_ERR_NOT_SUPPORTED; } -static inline NV_STATUS vaspaceFreeV2_b7902c(struct OBJVASPACE *pVAS, NvU64 vAddr, NvU64 *pSize) { - NV_ASSERT_PRECOMP(((NvBool)(0 != 0))); +static inline NV_STATUS vaspaceFreeV2_14ee5e(struct OBJVASPACE *pVAS, NvU64 vAddr, NvU64 *pSize) { + NV_ASSERT_PRECOMP(NV_FALSE); return NV_ERR_NOT_SUPPORTED; } diff --git a/src/nvidia/generated/g_vblank_callback_nvoc.c b/src/nvidia/generated/g_vblank_callback_nvoc.c index 5ec09ec98c..7a623eac3a 100644 --- a/src/nvidia/generated/g_vblank_callback_nvoc.c +++ b/src/nvidia/generated/g_vblank_callback_nvoc.c @@ -117,130 +117,198 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VblankCa }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_vblcbControl(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vblcbMap(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vblcbUnmap(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_vblcbShareCallback(struct VblankCallback *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vblcbGetRegBaseOffsetAndSize(struct VblankCallback *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vblcbGetMapAddrSpace(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vblcbInternalControlForward(struct VblankCallback *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_vblcbGetInternalObjectHandle(struct VblankCallback *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_vblcbAccessCallback(struct VblankCallback *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_vblcbGetMemInterMapParams(struct VblankCallback *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_vblcbCheckMemInterUnmap(struct VblankCallback *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_vblcbGetMemoryMappingDescriptor(struct VblankCallback *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_vblcbControlSerialization_Prologue(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_vblcbControlSerialization_Epilogue(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_vblcbControl_Prologue(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_vblcbControl_Epilogue(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_vblcbCanCopy(struct VblankCallback *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_vblcbIsDuplicate(struct VblankCallback *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_vblcbPreDestruct(struct VblankCallback *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_vblcbControlFilter(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_vblcbIsPartialUnmapSupported(struct VblankCallback *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_vblcbMapTo(struct VblankCallback *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_vblcbUnmapFrom(struct VblankCallback *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_vblcbGetRefCount(struct VblankCallback *pResource); // this +void __nvoc_up_thunk_RsResource_vblcbAddAdditionalDependants(struct RsClient *pClient, struct VblankCallback *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in VblankCallback to superclasses // vblcbControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vblcbControl(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_vblcbControl(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset), pCallContext, pParams); } // vblcbMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vblcbMap(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_vblcbMap(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // vblcbUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vblcbUnmap(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_vblcbUnmap(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset), pCallContext, pCpuMapping); } // vblcbShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_vblcbShareCallback(struct VblankCallback *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_vblcbShareCallback(struct VblankCallback *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // vblcbGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vblcbGetRegBaseOffsetAndSize(struct VblankCallback *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_vblcbGetRegBaseOffsetAndSize(struct VblankCallback *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset), pGpu, pOffset, pSize); } // vblcbGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vblcbGetMapAddrSpace(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_vblcbGetMapAddrSpace(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // vblcbInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vblcbInternalControlForward(struct VblankCallback *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_vblcbInternalControlForward(struct VblankCallback *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset), command, pParams, size); } // vblcbGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_vblcbGetInternalObjectHandle(struct VblankCallback *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_vblcbGetInternalObjectHandle(struct VblankCallback *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VblankCallback_GpuResource.offset)); } // vblcbAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_vblcbAccessCallback(struct VblankCallback *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_vblcbAccessCallback(struct VblankCallback *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // vblcbGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vblcbGetMemInterMapParams(struct VblankCallback *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_vblcbGetMemInterMapParams(struct VblankCallback *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VblankCallback_RmResource.offset), pParams); } // vblcbCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vblcbCheckMemInterUnmap(struct VblankCallback *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_vblcbCheckMemInterUnmap(struct VblankCallback *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VblankCallback_RmResource.offset), bSubdeviceHandleProvided); } // vblcbGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vblcbGetMemoryMappingDescriptor(struct VblankCallback *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_vblcbGetMemoryMappingDescriptor(struct VblankCallback *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VblankCallback_RmResource.offset), ppMemDesc); } // vblcbControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vblcbControlSerialization_Prologue(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_vblcbControlSerialization_Prologue(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RmResource.offset), pCallContext, pParams); } // vblcbControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_vblcbControlSerialization_Epilogue(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_vblcbControlSerialization_Epilogue(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RmResource.offset), pCallContext, pParams); } // vblcbControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vblcbControl_Prologue(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_vblcbControl_Prologue(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RmResource.offset), pCallContext, pParams); } // vblcbControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_vblcbControl_Epilogue(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_vblcbControl_Epilogue(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RmResource.offset), pCallContext, pParams); } // vblcbCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_vblcbCanCopy(struct VblankCallback *pResource) { +NvBool __nvoc_up_thunk_RsResource_vblcbCanCopy(struct VblankCallback *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RsResource.offset)); } // vblcbIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_vblcbIsDuplicate(struct VblankCallback *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_vblcbIsDuplicate(struct VblankCallback *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RsResource.offset), hMemory, pDuplicate); } // vblcbPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_vblcbPreDestruct(struct VblankCallback *pResource) { +void __nvoc_up_thunk_RsResource_vblcbPreDestruct(struct VblankCallback *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RsResource.offset)); } // vblcbControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_vblcbControlFilter(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_vblcbControlFilter(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RsResource.offset), pCallContext, pParams); } // vblcbIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_vblcbIsPartialUnmapSupported(struct VblankCallback *pResource) { +NvBool __nvoc_up_thunk_RsResource_vblcbIsPartialUnmapSupported(struct VblankCallback *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RsResource.offset)); } // vblcbMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_vblcbMapTo(struct VblankCallback *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_vblcbMapTo(struct VblankCallback *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RsResource.offset), pParams); } // vblcbUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_vblcbUnmapFrom(struct VblankCallback *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_vblcbUnmapFrom(struct VblankCallback *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RsResource.offset), pParams); } // vblcbGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_vblcbGetRefCount(struct VblankCallback *pResource) { +NvU32 __nvoc_up_thunk_RsResource_vblcbGetRefCount(struct VblankCallback *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RsResource.offset)); } // vblcbAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_vblcbAddAdditionalDependants(struct RsClient *pClient, struct VblankCallback *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_vblcbAddAdditionalDependants(struct RsClient *pClient, struct VblankCallback *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VblankCallback_RsResource.offset), pReference); } @@ -289,88 +357,114 @@ static void __nvoc_init_funcTable_VblankCallback_1(VblankCallback *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) pThis->__vblcbCtrlSetVBlankNotification__ = &vblcbCtrlSetVBlankNotification_IMPL; #endif - - // vblcbControl -- virtual inherited (gpures) base (gpures) - pThis->__vblcbControl__ = &__nvoc_up_thunk_GpuResource_vblcbControl; - - // vblcbMap -- virtual inherited (gpures) base (gpures) - pThis->__vblcbMap__ = &__nvoc_up_thunk_GpuResource_vblcbMap; - - // vblcbUnmap -- virtual inherited (gpures) base (gpures) - pThis->__vblcbUnmap__ = &__nvoc_up_thunk_GpuResource_vblcbUnmap; - - // vblcbShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__vblcbShareCallback__ = &__nvoc_up_thunk_GpuResource_vblcbShareCallback; - - // vblcbGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__vblcbGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_vblcbGetRegBaseOffsetAndSize; - - // vblcbGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__vblcbGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_vblcbGetMapAddrSpace; - - // vblcbInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__vblcbInternalControlForward__ = &__nvoc_up_thunk_GpuResource_vblcbInternalControlForward; - - // vblcbGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__vblcbGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_vblcbGetInternalObjectHandle; - - // vblcbAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__vblcbAccessCallback__ = &__nvoc_up_thunk_RmResource_vblcbAccessCallback; - - // vblcbGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__vblcbGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_vblcbGetMemInterMapParams; - - // vblcbCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__vblcbCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_vblcbCheckMemInterUnmap; - - // vblcbGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__vblcbGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_vblcbGetMemoryMappingDescriptor; - - // vblcbControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__vblcbControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_vblcbControlSerialization_Prologue; - - // vblcbControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__vblcbControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_vblcbControlSerialization_Epilogue; - - // vblcbControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__vblcbControl_Prologue__ = &__nvoc_up_thunk_RmResource_vblcbControl_Prologue; - - // vblcbControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__vblcbControl_Epilogue__ = &__nvoc_up_thunk_RmResource_vblcbControl_Epilogue; - - // vblcbCanCopy -- virtual inherited (res) base (gpures) - pThis->__vblcbCanCopy__ = &__nvoc_up_thunk_RsResource_vblcbCanCopy; - - // vblcbIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__vblcbIsDuplicate__ = &__nvoc_up_thunk_RsResource_vblcbIsDuplicate; - - // vblcbPreDestruct -- virtual inherited (res) base (gpures) - pThis->__vblcbPreDestruct__ = &__nvoc_up_thunk_RsResource_vblcbPreDestruct; - - // vblcbControlFilter -- virtual inherited (res) base (gpures) - pThis->__vblcbControlFilter__ = &__nvoc_up_thunk_RsResource_vblcbControlFilter; - - // vblcbIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__vblcbIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_vblcbIsPartialUnmapSupported; - - // vblcbMapTo -- virtual inherited (res) base (gpures) - pThis->__vblcbMapTo__ = &__nvoc_up_thunk_RsResource_vblcbMapTo; - - // vblcbUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__vblcbUnmapFrom__ = &__nvoc_up_thunk_RsResource_vblcbUnmapFrom; - - // vblcbGetRefCount -- virtual inherited (res) base (gpures) - pThis->__vblcbGetRefCount__ = &__nvoc_up_thunk_RsResource_vblcbGetRefCount; - - // vblcbAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__vblcbAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_vblcbAddAdditionalDependants; -} // End __nvoc_init_funcTable_VblankCallback_1 with approximately 26 basic block(s). +} // End __nvoc_init_funcTable_VblankCallback_1 with approximately 1 basic block(s). // Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_VblankCallback(VblankCallback *pThis) { - // Initialize vtable(s) with 26 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__VblankCallback vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) +#endif + .__vblcbControl__ = &__nvoc_up_thunk_GpuResource_vblcbControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__vblcbMap__ = &__nvoc_up_thunk_GpuResource_vblcbMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__vblcbUnmap__ = &__nvoc_up_thunk_GpuResource_vblcbUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__vblcbShareCallback__ = &__nvoc_up_thunk_GpuResource_vblcbShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__vblcbGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_vblcbGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__vblcbGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_vblcbGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__vblcbInternalControlForward__ = &__nvoc_up_thunk_GpuResource_vblcbInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__vblcbGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_vblcbGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__vblcbAccessCallback__ = &__nvoc_up_thunk_RmResource_vblcbAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__vblcbGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_vblcbGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__vblcbCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_vblcbCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__vblcbGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_vblcbGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__vblcbControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_vblcbControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__vblcbControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_vblcbControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__vblcbControl_Prologue__ = &__nvoc_up_thunk_RmResource_vblcbControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__vblcbControl_Epilogue__ = &__nvoc_up_thunk_RmResource_vblcbControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__vblcbCanCopy__ = &__nvoc_up_thunk_RsResource_vblcbCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__vblcbIsDuplicate__ = &__nvoc_up_thunk_RsResource_vblcbIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__vblcbPreDestruct__ = &__nvoc_up_thunk_RsResource_vblcbPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__vblcbControlFilter__ = &__nvoc_up_thunk_RsResource_vblcbControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__vblcbIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_vblcbIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__vblcbMapTo__ = &__nvoc_up_thunk_RsResource_vblcbMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__vblcbUnmapFrom__ = &__nvoc_up_thunk_RsResource_vblcbUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__vblcbGetRefCount__ = &__nvoc_up_thunk_RsResource_vblcbGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__vblcbAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_vblcbAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (vblcb) this + + // Initialize vtable(s) with 1 per-object function pointer(s). __nvoc_init_funcTable_VblankCallback_1(pThis); } diff --git a/src/nvidia/generated/g_vblank_callback_nvoc.h b/src/nvidia/generated/g_vblank_callback_nvoc.h index 597c116e4f..ddb0291e6c 100644 --- a/src/nvidia/generated/g_vblank_callback_nvoc.h +++ b/src/nvidia/generated/g_vblank_callback_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -67,10 +67,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__VblankCallback; + + struct VblankCallback { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__VblankCallback *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -83,8 +88,22 @@ struct VblankCallback { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct VblankCallback *__nvoc_pbase_VblankCallback; // vblcb - // Vtable with 26 per-object function pointers + // Vtable with 1 per-object function pointer NV_STATUS (*__vblcbCtrlSetVBlankNotification__)(struct VblankCallback * /*this*/, NV9010_CTRL_CMD_SET_VBLANK_NOTIFICATION_PARAMS *); // exported (id=0x90100101) + + // Data members + VBLANKCALLBACK CallBack; + OSVBLANKCALLBACKPROC pProc; + NvP64 pParm1; + NvP64 pParm2; + NvU32 LogicalHead; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__VblankCallback { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + NV_STATUS (*__vblcbControl__)(struct VblankCallback * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__vblcbMap__)(struct VblankCallback * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__vblcbUnmap__)(struct VblankCallback * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -110,13 +129,6 @@ struct VblankCallback { NV_STATUS (*__vblcbUnmapFrom__)(struct VblankCallback * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__vblcbGetRefCount__)(struct VblankCallback * /*this*/); // virtual inherited (res) base (gpures) void (*__vblcbAddAdditionalDependants__)(struct RsClient *, struct VblankCallback * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - VBLANKCALLBACK CallBack; - OSVBLANKCALLBACKPROC pProc; - NvP64 pParm1; - NvP64 pParm2; - NvU32 LogicalHead; }; #ifndef __NVOC_CLASS_VblankCallback_TYPEDEF__ @@ -151,55 +163,55 @@ NV_STATUS __nvoc_objCreate_VblankCallback(VblankCallback**, Dynamic*, NvU32, CAL // Wrapper macros #define vblcbCtrlSetVBlankNotification_FNPTR(pVblankCallback) pVblankCallback->__vblcbCtrlSetVBlankNotification__ #define vblcbCtrlSetVBlankNotification(pVblankCallback, pParams) vblcbCtrlSetVBlankNotification_DISPATCH(pVblankCallback, pParams) -#define vblcbControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define vblcbControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define vblcbControl(pGpuResource, pCallContext, pParams) vblcbControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define vblcbMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define vblcbMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define vblcbMap(pGpuResource, pCallContext, pParams, pCpuMapping) vblcbMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define vblcbUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define vblcbUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define vblcbUnmap(pGpuResource, pCallContext, pCpuMapping) vblcbUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define vblcbShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define vblcbShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define vblcbShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) vblcbShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define vblcbGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define vblcbGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define vblcbGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) vblcbGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define vblcbGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define vblcbGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define vblcbGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) vblcbGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define vblcbInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define vblcbInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define vblcbInternalControlForward(pGpuResource, command, pParams, size) vblcbInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define vblcbGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define vblcbGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define vblcbGetInternalObjectHandle(pGpuResource) vblcbGetInternalObjectHandle_DISPATCH(pGpuResource) -#define vblcbAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define vblcbAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define vblcbAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) vblcbAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define vblcbGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define vblcbGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define vblcbGetMemInterMapParams(pRmResource, pParams) vblcbGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define vblcbCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define vblcbCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define vblcbCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) vblcbCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define vblcbGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define vblcbGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define vblcbGetMemoryMappingDescriptor(pRmResource, ppMemDesc) vblcbGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define vblcbControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define vblcbControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define vblcbControlSerialization_Prologue(pResource, pCallContext, pParams) vblcbControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define vblcbControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define vblcbControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define vblcbControlSerialization_Epilogue(pResource, pCallContext, pParams) vblcbControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define vblcbControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define vblcbControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define vblcbControl_Prologue(pResource, pCallContext, pParams) vblcbControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define vblcbControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define vblcbControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define vblcbControl_Epilogue(pResource, pCallContext, pParams) vblcbControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define vblcbCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define vblcbCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define vblcbCanCopy(pResource) vblcbCanCopy_DISPATCH(pResource) -#define vblcbIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define vblcbIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define vblcbIsDuplicate(pResource, hMemory, pDuplicate) vblcbIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define vblcbPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define vblcbPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define vblcbPreDestruct(pResource) vblcbPreDestruct_DISPATCH(pResource) -#define vblcbControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define vblcbControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define vblcbControlFilter(pResource, pCallContext, pParams) vblcbControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define vblcbIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define vblcbIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define vblcbIsPartialUnmapSupported(pResource) vblcbIsPartialUnmapSupported_DISPATCH(pResource) -#define vblcbMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define vblcbMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define vblcbMapTo(pResource, pParams) vblcbMapTo_DISPATCH(pResource, pParams) -#define vblcbUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define vblcbUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define vblcbUnmapFrom(pResource, pParams) vblcbUnmapFrom_DISPATCH(pResource, pParams) -#define vblcbGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define vblcbGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define vblcbGetRefCount(pResource) vblcbGetRefCount_DISPATCH(pResource) -#define vblcbAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define vblcbAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define vblcbAddAdditionalDependants(pClient, pResource, pReference) vblcbAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions @@ -208,103 +220,103 @@ static inline NV_STATUS vblcbCtrlSetVBlankNotification_DISPATCH(struct VblankCal } static inline NV_STATUS vblcbControl_DISPATCH(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__vblcbControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__vblcbControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS vblcbMap_DISPATCH(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__vblcbMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__vblcbMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS vblcbUnmap_DISPATCH(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__vblcbUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__vblcbUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool vblcbShareCallback_DISPATCH(struct VblankCallback *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__vblcbShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__vblcbShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS vblcbGetRegBaseOffsetAndSize_DISPATCH(struct VblankCallback *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__vblcbGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__vblcbGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS vblcbGetMapAddrSpace_DISPATCH(struct VblankCallback *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__vblcbGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__vblcbGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS vblcbInternalControlForward_DISPATCH(struct VblankCallback *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__vblcbInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__vblcbInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle vblcbGetInternalObjectHandle_DISPATCH(struct VblankCallback *pGpuResource) { - return pGpuResource->__vblcbGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__vblcbGetInternalObjectHandle__(pGpuResource); } static inline NvBool vblcbAccessCallback_DISPATCH(struct VblankCallback *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__vblcbAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__vblcbAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS vblcbGetMemInterMapParams_DISPATCH(struct VblankCallback *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__vblcbGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__vblcbGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS vblcbCheckMemInterUnmap_DISPATCH(struct VblankCallback *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__vblcbCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__vblcbCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS vblcbGetMemoryMappingDescriptor_DISPATCH(struct VblankCallback *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__vblcbGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__vblcbGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS vblcbControlSerialization_Prologue_DISPATCH(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vblcbControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__vblcbControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void vblcbControlSerialization_Epilogue_DISPATCH(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vblcbControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__vblcbControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS vblcbControl_Prologue_DISPATCH(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vblcbControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__vblcbControl_Prologue__(pResource, pCallContext, pParams); } static inline void vblcbControl_Epilogue_DISPATCH(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vblcbControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__vblcbControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool vblcbCanCopy_DISPATCH(struct VblankCallback *pResource) { - return pResource->__vblcbCanCopy__(pResource); + return pResource->__nvoc_vtable->__vblcbCanCopy__(pResource); } static inline NV_STATUS vblcbIsDuplicate_DISPATCH(struct VblankCallback *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__vblcbIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__vblcbIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void vblcbPreDestruct_DISPATCH(struct VblankCallback *pResource) { - pResource->__vblcbPreDestruct__(pResource); + pResource->__nvoc_vtable->__vblcbPreDestruct__(pResource); } static inline NV_STATUS vblcbControlFilter_DISPATCH(struct VblankCallback *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vblcbControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__vblcbControlFilter__(pResource, pCallContext, pParams); } static inline NvBool vblcbIsPartialUnmapSupported_DISPATCH(struct VblankCallback *pResource) { - return pResource->__vblcbIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__vblcbIsPartialUnmapSupported__(pResource); } static inline NV_STATUS vblcbMapTo_DISPATCH(struct VblankCallback *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__vblcbMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__vblcbMapTo__(pResource, pParams); } static inline NV_STATUS vblcbUnmapFrom_DISPATCH(struct VblankCallback *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__vblcbUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__vblcbUnmapFrom__(pResource, pParams); } static inline NvU32 vblcbGetRefCount_DISPATCH(struct VblankCallback *pResource) { - return pResource->__vblcbGetRefCount__(pResource); + return pResource->__nvoc_vtable->__vblcbGetRefCount__(pResource); } static inline void vblcbAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VblankCallback *pResource, RsResourceRef *pReference) { - pResource->__vblcbAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__vblcbAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS vblcbCtrlSetVBlankNotification_IMPL(struct VblankCallback *pVblankCallback, NV9010_CTRL_CMD_SET_VBLANK_NOTIFICATION_PARAMS *pParams); diff --git a/src/nvidia/generated/g_vgpuapi_nvoc.c b/src/nvidia/generated/g_vgpuapi_nvoc.c index c2e22e3b91..82a4e51fc9 100644 --- a/src/nvidia/generated/g_vgpuapi_nvoc.c +++ b/src/nvidia/generated/g_vgpuapi_nvoc.c @@ -147,130 +147,198 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuApi[ }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiControl(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiMap(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiUnmap(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_vgpuapiShareCallback(struct VgpuApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiGetRegBaseOffsetAndSize(struct VgpuApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiGetMapAddrSpace(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiInternalControlForward(struct VgpuApi *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_vgpuapiGetInternalObjectHandle(struct VgpuApi *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_vgpuapiAccessCallback(struct VgpuApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_vgpuapiGetMemInterMapParams(struct VgpuApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_vgpuapiCheckMemInterUnmap(struct VgpuApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_vgpuapiGetMemoryMappingDescriptor(struct VgpuApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_vgpuapiControlSerialization_Prologue(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_vgpuapiControlSerialization_Epilogue(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_vgpuapiControl_Prologue(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_vgpuapiControl_Epilogue(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_vgpuapiCanCopy(struct VgpuApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_vgpuapiIsDuplicate(struct VgpuApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_vgpuapiPreDestruct(struct VgpuApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_vgpuapiControlFilter(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_vgpuapiIsPartialUnmapSupported(struct VgpuApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_vgpuapiMapTo(struct VgpuApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_vgpuapiUnmapFrom(struct VgpuApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_vgpuapiGetRefCount(struct VgpuApi *pResource); // this +void __nvoc_up_thunk_RsResource_vgpuapiAddAdditionalDependants(struct RsClient *pClient, struct VgpuApi *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in VgpuApi to superclasses // vgpuapiControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiControl(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiControl(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset), pCallContext, pParams); } // vgpuapiMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiMap(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiMap(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // vgpuapiUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiUnmap(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiUnmap(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset), pCallContext, pCpuMapping); } // vgpuapiShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_vgpuapiShareCallback(struct VgpuApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_vgpuapiShareCallback(struct VgpuApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // vgpuapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiGetRegBaseOffsetAndSize(struct VgpuApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiGetRegBaseOffsetAndSize(struct VgpuApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset), pGpu, pOffset, pSize); } // vgpuapiGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiGetMapAddrSpace(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiGetMapAddrSpace(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // vgpuapiInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiInternalControlForward(struct VgpuApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuapiInternalControlForward(struct VgpuApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset), command, pParams, size); } // vgpuapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_vgpuapiGetInternalObjectHandle(struct VgpuApi *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_vgpuapiGetInternalObjectHandle(struct VgpuApi *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuApi_GpuResource.offset)); } // vgpuapiAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_vgpuapiAccessCallback(struct VgpuApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_vgpuapiAccessCallback(struct VgpuApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // vgpuapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vgpuapiGetMemInterMapParams(struct VgpuApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_vgpuapiGetMemInterMapParams(struct VgpuApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VgpuApi_RmResource.offset), pParams); } // vgpuapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vgpuapiCheckMemInterUnmap(struct VgpuApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_vgpuapiCheckMemInterUnmap(struct VgpuApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VgpuApi_RmResource.offset), bSubdeviceHandleProvided); } // vgpuapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vgpuapiGetMemoryMappingDescriptor(struct VgpuApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_vgpuapiGetMemoryMappingDescriptor(struct VgpuApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VgpuApi_RmResource.offset), ppMemDesc); } // vgpuapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vgpuapiControlSerialization_Prologue(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_vgpuapiControlSerialization_Prologue(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RmResource.offset), pCallContext, pParams); } // vgpuapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_vgpuapiControlSerialization_Epilogue(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_vgpuapiControlSerialization_Epilogue(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RmResource.offset), pCallContext, pParams); } // vgpuapiControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vgpuapiControl_Prologue(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_vgpuapiControl_Prologue(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RmResource.offset), pCallContext, pParams); } // vgpuapiControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_vgpuapiControl_Epilogue(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_vgpuapiControl_Epilogue(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RmResource.offset), pCallContext, pParams); } // vgpuapiCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_vgpuapiCanCopy(struct VgpuApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_vgpuapiCanCopy(struct VgpuApi *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RsResource.offset)); } // vgpuapiIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_vgpuapiIsDuplicate(struct VgpuApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_vgpuapiIsDuplicate(struct VgpuApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RsResource.offset), hMemory, pDuplicate); } // vgpuapiPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_vgpuapiPreDestruct(struct VgpuApi *pResource) { +void __nvoc_up_thunk_RsResource_vgpuapiPreDestruct(struct VgpuApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RsResource.offset)); } // vgpuapiControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_vgpuapiControlFilter(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_vgpuapiControlFilter(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RsResource.offset), pCallContext, pParams); } // vgpuapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_vgpuapiIsPartialUnmapSupported(struct VgpuApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_vgpuapiIsPartialUnmapSupported(struct VgpuApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RsResource.offset)); } // vgpuapiMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_vgpuapiMapTo(struct VgpuApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_vgpuapiMapTo(struct VgpuApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RsResource.offset), pParams); } // vgpuapiUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_vgpuapiUnmapFrom(struct VgpuApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_vgpuapiUnmapFrom(struct VgpuApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RsResource.offset), pParams); } // vgpuapiGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_vgpuapiGetRefCount(struct VgpuApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_vgpuapiGetRefCount(struct VgpuApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RsResource.offset)); } // vgpuapiAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_vgpuapiAddAdditionalDependants(struct RsClient *pClient, struct VgpuApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_vgpuapiAddAdditionalDependants(struct RsClient *pClient, struct VgpuApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuApi_RsResource.offset), pReference); } @@ -329,88 +397,118 @@ static void __nvoc_init_funcTable_VgpuApi_1(VgpuApi *pThis) { #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuapiCtrlCmdVGpuGetConfig__ = &vgpuapiCtrlCmdVGpuGetConfig_IMPL; #endif - - // vgpuapiControl -- virtual inherited (gpures) base (gpures) - pThis->__vgpuapiControl__ = &__nvoc_up_thunk_GpuResource_vgpuapiControl; - - // vgpuapiMap -- virtual inherited (gpures) base (gpures) - pThis->__vgpuapiMap__ = &__nvoc_up_thunk_GpuResource_vgpuapiMap; - - // vgpuapiUnmap -- virtual inherited (gpures) base (gpures) - pThis->__vgpuapiUnmap__ = &__nvoc_up_thunk_GpuResource_vgpuapiUnmap; - - // vgpuapiShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__vgpuapiShareCallback__ = &__nvoc_up_thunk_GpuResource_vgpuapiShareCallback; - - // vgpuapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__vgpuapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_vgpuapiGetRegBaseOffsetAndSize; - - // vgpuapiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__vgpuapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_vgpuapiGetMapAddrSpace; - - // vgpuapiInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__vgpuapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_vgpuapiInternalControlForward; - - // vgpuapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__vgpuapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_vgpuapiGetInternalObjectHandle; - - // vgpuapiAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__vgpuapiAccessCallback__ = &__nvoc_up_thunk_RmResource_vgpuapiAccessCallback; - - // vgpuapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__vgpuapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_vgpuapiGetMemInterMapParams; - - // vgpuapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__vgpuapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_vgpuapiCheckMemInterUnmap; - - // vgpuapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__vgpuapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_vgpuapiGetMemoryMappingDescriptor; - - // vgpuapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__vgpuapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_vgpuapiControlSerialization_Prologue; - - // vgpuapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__vgpuapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_vgpuapiControlSerialization_Epilogue; - - // vgpuapiControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__vgpuapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_vgpuapiControl_Prologue; - - // vgpuapiControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__vgpuapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_vgpuapiControl_Epilogue; - - // vgpuapiCanCopy -- virtual inherited (res) base (gpures) - pThis->__vgpuapiCanCopy__ = &__nvoc_up_thunk_RsResource_vgpuapiCanCopy; - - // vgpuapiIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__vgpuapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_vgpuapiIsDuplicate; - - // vgpuapiPreDestruct -- virtual inherited (res) base (gpures) - pThis->__vgpuapiPreDestruct__ = &__nvoc_up_thunk_RsResource_vgpuapiPreDestruct; - - // vgpuapiControlFilter -- virtual inherited (res) base (gpures) - pThis->__vgpuapiControlFilter__ = &__nvoc_up_thunk_RsResource_vgpuapiControlFilter; - - // vgpuapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__vgpuapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_vgpuapiIsPartialUnmapSupported; - - // vgpuapiMapTo -- virtual inherited (res) base (gpures) - pThis->__vgpuapiMapTo__ = &__nvoc_up_thunk_RsResource_vgpuapiMapTo; - - // vgpuapiUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__vgpuapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_vgpuapiUnmapFrom; - - // vgpuapiGetRefCount -- virtual inherited (res) base (gpures) - pThis->__vgpuapiGetRefCount__ = &__nvoc_up_thunk_RsResource_vgpuapiGetRefCount; - - // vgpuapiAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__vgpuapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_vgpuapiAddAdditionalDependants; -} // End __nvoc_init_funcTable_VgpuApi_1 with approximately 28 basic block(s). +} // End __nvoc_init_funcTable_VgpuApi_1 with approximately 3 basic block(s). // Initialize vtable(s) for 28 virtual method(s). void __nvoc_init_funcTable_VgpuApi(VgpuApi *pThis) { - // Initialize vtable(s) with 28 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__VgpuApi vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__vgpuapiControl__ = &__nvoc_up_thunk_GpuResource_vgpuapiControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__vgpuapiMap__ = &__nvoc_up_thunk_GpuResource_vgpuapiMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__vgpuapiUnmap__ = &__nvoc_up_thunk_GpuResource_vgpuapiUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__vgpuapiShareCallback__ = &__nvoc_up_thunk_GpuResource_vgpuapiShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__vgpuapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_vgpuapiGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__vgpuapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_vgpuapiGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__vgpuapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_vgpuapiInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__vgpuapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_vgpuapiGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__vgpuapiAccessCallback__ = &__nvoc_up_thunk_RmResource_vgpuapiAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__vgpuapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_vgpuapiGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__vgpuapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_vgpuapiCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__vgpuapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_vgpuapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__vgpuapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_vgpuapiControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__vgpuapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_vgpuapiControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__vgpuapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_vgpuapiControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__vgpuapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_vgpuapiControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__vgpuapiCanCopy__ = &__nvoc_up_thunk_RsResource_vgpuapiCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__vgpuapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_vgpuapiIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__vgpuapiPreDestruct__ = &__nvoc_up_thunk_RsResource_vgpuapiPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__vgpuapiControlFilter__ = &__nvoc_up_thunk_RsResource_vgpuapiControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__vgpuapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_vgpuapiIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__vgpuapiMapTo__ = &__nvoc_up_thunk_RsResource_vgpuapiMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__vgpuapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_vgpuapiUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__vgpuapiGetRefCount__ = &__nvoc_up_thunk_RsResource_vgpuapiGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__vgpuapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_vgpuapiAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (vgpuapi) this + + // Initialize vtable(s) with 3 per-object function pointer(s). __nvoc_init_funcTable_VgpuApi_1(pThis); } diff --git a/src/nvidia/generated/g_vgpuapi_nvoc.h b/src/nvidia/generated/g_vgpuapi_nvoc.h index 99fb8b7901..39bbce92d0 100644 --- a/src/nvidia/generated/g_vgpuapi_nvoc.h +++ b/src/nvidia/generated/g_vgpuapi_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -59,10 +59,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__VgpuApi; + + struct VgpuApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__VgpuApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -75,10 +80,22 @@ struct VgpuApi { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct VgpuApi *__nvoc_pbase_VgpuApi; // vgpuapi - // Vtable with 28 per-object function pointers + // Vtable with 3 per-object function pointers NV_STATUS (*__vgpuapiCtrlCmdVgpuDisplaySetSurfaceProperties__)(struct VgpuApi * /*this*/, NVA080_CTRL_VGPU_DISPLAY_SET_SURFACE_PROPERTIES *); // exported (id=0xa0800103) NV_STATUS (*__vgpuapiCtrlCmdVgpuDisplayCleanupSurface__)(struct VgpuApi * /*this*/, NVA080_CTRL_VGPU_DISPLAY_CLEANUP_SURFACE_PARAMS *); // exported (id=0xa0800104) NV_STATUS (*__vgpuapiCtrlCmdVGpuGetConfig__)(struct VgpuApi * /*this*/, NVA080_CTRL_VGPU_GET_CONFIG_PARAMS *); // exported (id=0xa0800301) + + // Data members + NODE node; + NvHandle handle; + NvHandle hDevice; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__VgpuApi { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + NV_STATUS (*__vgpuapiControl__)(struct VgpuApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__vgpuapiMap__)(struct VgpuApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__vgpuapiUnmap__)(struct VgpuApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -104,11 +121,6 @@ struct VgpuApi { NV_STATUS (*__vgpuapiUnmapFrom__)(struct VgpuApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__vgpuapiGetRefCount__)(struct VgpuApi * /*this*/); // virtual inherited (res) base (gpures) void (*__vgpuapiAddAdditionalDependants__)(struct RsClient *, struct VgpuApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - NODE node; - NvHandle handle; - NvHandle hDevice; }; #ifndef __NVOC_CLASS_VgpuApi_TYPEDEF__ @@ -147,55 +159,55 @@ NV_STATUS __nvoc_objCreate_VgpuApi(VgpuApi**, Dynamic*, NvU32, struct CALL_CONTE #define vgpuapiCtrlCmdVgpuDisplayCleanupSurface(pVgpuApi, pParams) vgpuapiCtrlCmdVgpuDisplayCleanupSurface_DISPATCH(pVgpuApi, pParams) #define vgpuapiCtrlCmdVGpuGetConfig_FNPTR(pVgpuApi) pVgpuApi->__vgpuapiCtrlCmdVGpuGetConfig__ #define vgpuapiCtrlCmdVGpuGetConfig(pVgpuApi, pParams) vgpuapiCtrlCmdVGpuGetConfig_DISPATCH(pVgpuApi, pParams) -#define vgpuapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define vgpuapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define vgpuapiControl(pGpuResource, pCallContext, pParams) vgpuapiControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define vgpuapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define vgpuapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define vgpuapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) vgpuapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define vgpuapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define vgpuapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define vgpuapiUnmap(pGpuResource, pCallContext, pCpuMapping) vgpuapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define vgpuapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define vgpuapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define vgpuapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) vgpuapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define vgpuapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define vgpuapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define vgpuapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) vgpuapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define vgpuapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define vgpuapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define vgpuapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) vgpuapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define vgpuapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define vgpuapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define vgpuapiInternalControlForward(pGpuResource, command, pParams, size) vgpuapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define vgpuapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define vgpuapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define vgpuapiGetInternalObjectHandle(pGpuResource) vgpuapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define vgpuapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define vgpuapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define vgpuapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) vgpuapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define vgpuapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define vgpuapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define vgpuapiGetMemInterMapParams(pRmResource, pParams) vgpuapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define vgpuapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define vgpuapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define vgpuapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) vgpuapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define vgpuapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define vgpuapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define vgpuapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) vgpuapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define vgpuapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define vgpuapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define vgpuapiControlSerialization_Prologue(pResource, pCallContext, pParams) vgpuapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define vgpuapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define vgpuapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define vgpuapiControlSerialization_Epilogue(pResource, pCallContext, pParams) vgpuapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define vgpuapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define vgpuapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define vgpuapiControl_Prologue(pResource, pCallContext, pParams) vgpuapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define vgpuapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define vgpuapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define vgpuapiControl_Epilogue(pResource, pCallContext, pParams) vgpuapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define vgpuapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define vgpuapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define vgpuapiCanCopy(pResource) vgpuapiCanCopy_DISPATCH(pResource) -#define vgpuapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define vgpuapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define vgpuapiIsDuplicate(pResource, hMemory, pDuplicate) vgpuapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define vgpuapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define vgpuapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define vgpuapiPreDestruct(pResource) vgpuapiPreDestruct_DISPATCH(pResource) -#define vgpuapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define vgpuapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define vgpuapiControlFilter(pResource, pCallContext, pParams) vgpuapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define vgpuapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define vgpuapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define vgpuapiIsPartialUnmapSupported(pResource) vgpuapiIsPartialUnmapSupported_DISPATCH(pResource) -#define vgpuapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define vgpuapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define vgpuapiMapTo(pResource, pParams) vgpuapiMapTo_DISPATCH(pResource, pParams) -#define vgpuapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define vgpuapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define vgpuapiUnmapFrom(pResource, pParams) vgpuapiUnmapFrom_DISPATCH(pResource, pParams) -#define vgpuapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define vgpuapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define vgpuapiGetRefCount(pResource) vgpuapiGetRefCount_DISPATCH(pResource) -#define vgpuapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define vgpuapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define vgpuapiAddAdditionalDependants(pClient, pResource, pReference) vgpuapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions @@ -212,103 +224,103 @@ static inline NV_STATUS vgpuapiCtrlCmdVGpuGetConfig_DISPATCH(struct VgpuApi *pVg } static inline NV_STATUS vgpuapiControl_DISPATCH(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__vgpuapiControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__vgpuapiControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS vgpuapiMap_DISPATCH(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__vgpuapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__vgpuapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS vgpuapiUnmap_DISPATCH(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__vgpuapiUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__vgpuapiUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool vgpuapiShareCallback_DISPATCH(struct VgpuApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__vgpuapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__vgpuapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS vgpuapiGetRegBaseOffsetAndSize_DISPATCH(struct VgpuApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__vgpuapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__vgpuapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS vgpuapiGetMapAddrSpace_DISPATCH(struct VgpuApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__vgpuapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__vgpuapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS vgpuapiInternalControlForward_DISPATCH(struct VgpuApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__vgpuapiInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__vgpuapiInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle vgpuapiGetInternalObjectHandle_DISPATCH(struct VgpuApi *pGpuResource) { - return pGpuResource->__vgpuapiGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__vgpuapiGetInternalObjectHandle__(pGpuResource); } static inline NvBool vgpuapiAccessCallback_DISPATCH(struct VgpuApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__vgpuapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__vgpuapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS vgpuapiGetMemInterMapParams_DISPATCH(struct VgpuApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__vgpuapiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__vgpuapiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS vgpuapiCheckMemInterUnmap_DISPATCH(struct VgpuApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__vgpuapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__vgpuapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS vgpuapiGetMemoryMappingDescriptor_DISPATCH(struct VgpuApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__vgpuapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__vgpuapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS vgpuapiControlSerialization_Prologue_DISPATCH(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vgpuapiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__vgpuapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void vgpuapiControlSerialization_Epilogue_DISPATCH(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vgpuapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__vgpuapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS vgpuapiControl_Prologue_DISPATCH(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vgpuapiControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__vgpuapiControl_Prologue__(pResource, pCallContext, pParams); } static inline void vgpuapiControl_Epilogue_DISPATCH(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vgpuapiControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__vgpuapiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool vgpuapiCanCopy_DISPATCH(struct VgpuApi *pResource) { - return pResource->__vgpuapiCanCopy__(pResource); + return pResource->__nvoc_vtable->__vgpuapiCanCopy__(pResource); } static inline NV_STATUS vgpuapiIsDuplicate_DISPATCH(struct VgpuApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__vgpuapiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__vgpuapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void vgpuapiPreDestruct_DISPATCH(struct VgpuApi *pResource) { - pResource->__vgpuapiPreDestruct__(pResource); + pResource->__nvoc_vtable->__vgpuapiPreDestruct__(pResource); } static inline NV_STATUS vgpuapiControlFilter_DISPATCH(struct VgpuApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vgpuapiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__vgpuapiControlFilter__(pResource, pCallContext, pParams); } static inline NvBool vgpuapiIsPartialUnmapSupported_DISPATCH(struct VgpuApi *pResource) { - return pResource->__vgpuapiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__vgpuapiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS vgpuapiMapTo_DISPATCH(struct VgpuApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__vgpuapiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__vgpuapiMapTo__(pResource, pParams); } static inline NV_STATUS vgpuapiUnmapFrom_DISPATCH(struct VgpuApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__vgpuapiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__vgpuapiUnmapFrom__(pResource, pParams); } static inline NvU32 vgpuapiGetRefCount_DISPATCH(struct VgpuApi *pResource) { - return pResource->__vgpuapiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__vgpuapiGetRefCount__(pResource); } static inline void vgpuapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VgpuApi *pResource, RsResourceRef *pReference) { - pResource->__vgpuapiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__vgpuapiAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS vgpuapiCtrlCmdVgpuDisplaySetSurfaceProperties_IMPL(struct VgpuApi *pVgpuApi, NVA080_CTRL_VGPU_DISPLAY_SET_SURFACE_PROPERTIES *pParams); diff --git a/src/nvidia/generated/g_vgpuconfigapi_nvoc.c b/src/nvidia/generated/g_vgpuconfigapi_nvoc.c index 468383cdce..001608957e 100644 --- a/src/nvidia/generated/g_vgpuconfigapi_nvoc.c +++ b/src/nvidia/generated/g_vgpuconfigapi_nvoc.c @@ -388,12 +388,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf #endif }, { /* [18] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) - /*flags=*/ 0x4u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, /*accessRight=*/0x0u, /*methodId=*/ 0xa081011bu, /*paramSize=*/ sizeof(NVA081_CTRL_VGPU_CONFIG_UPDATE_HETEROGENEOUS_INFO_PARAMS), @@ -475,167 +475,260 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VgpuConf /*pClassInfo=*/ &(__nvoc_class_def_VgpuConfigApi.classInfo), #if NV_PRINTF_STRINGS_ALLOWED /*func=*/ "vgpuconfigapiCtrlCmdVgpuSetVmName" +#endif + }, + { /* [24] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) vgpuconfigapiCtrlCmdVgpuConfigGetMigrationBandwidth_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + /*flags=*/ 0x8u, + /*accessRight=*/0x0u, + /*methodId=*/ 0xa0810122u, + /*paramSize=*/ sizeof(NVA081_CTRL_VGPU_CONFIG_GET_MIGRATION_BANDWIDTH_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_VgpuConfigApi.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "vgpuconfigapiCtrlCmdVgpuConfigGetMigrationBandwidth" #endif }, }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiControl(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiMap(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiUnmap(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_vgpuconfigapiShareCallback(struct VgpuConfigApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiGetRegBaseOffsetAndSize(struct VgpuConfigApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiGetMapAddrSpace(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiInternalControlForward(struct VgpuConfigApi *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_vgpuconfigapiGetInternalObjectHandle(struct VgpuConfigApi *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_vgpuconfigapiAccessCallback(struct VgpuConfigApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_vgpuconfigapiGetMemInterMapParams(struct VgpuConfigApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_vgpuconfigapiCheckMemInterUnmap(struct VgpuConfigApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_vgpuconfigapiGetMemoryMappingDescriptor(struct VgpuConfigApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_vgpuconfigapiControlSerialization_Prologue(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_vgpuconfigapiControlSerialization_Epilogue(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_vgpuconfigapiControl_Prologue(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_vgpuconfigapiControl_Epilogue(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_vgpuconfigapiCanCopy(struct VgpuConfigApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_vgpuconfigapiIsDuplicate(struct VgpuConfigApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_vgpuconfigapiPreDestruct(struct VgpuConfigApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_vgpuconfigapiControlFilter(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_vgpuconfigapiIsPartialUnmapSupported(struct VgpuConfigApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_vgpuconfigapiMapTo(struct VgpuConfigApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_vgpuconfigapiUnmapFrom(struct VgpuConfigApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_vgpuconfigapiGetRefCount(struct VgpuConfigApi *pResource); // this +void __nvoc_up_thunk_RsResource_vgpuconfigapiAddAdditionalDependants(struct RsClient *pClient, struct VgpuConfigApi *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_vgpuconfigapiGetNotificationListPtr(struct VgpuConfigApi *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_vgpuconfigapiGetNotificationShare(struct VgpuConfigApi *pNotifier); // this +void __nvoc_up_thunk_Notifier_vgpuconfigapiSetNotificationShare(struct VgpuConfigApi *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_vgpuconfigapiUnregisterEvent(struct VgpuConfigApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_vgpuconfigapiGetOrAllocNotifShare(struct VgpuConfigApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 30 up-thunk(s) defined to bridge methods in VgpuConfigApi to superclasses // vgpuconfigapiControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiControl(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiControl(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset), pCallContext, pParams); } // vgpuconfigapiMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiMap(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiMap(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // vgpuconfigapiUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiUnmap(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiUnmap(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset), pCallContext, pCpuMapping); } // vgpuconfigapiShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_vgpuconfigapiShareCallback(struct VgpuConfigApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_vgpuconfigapiShareCallback(struct VgpuConfigApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // vgpuconfigapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiGetRegBaseOffsetAndSize(struct VgpuConfigApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiGetRegBaseOffsetAndSize(struct VgpuConfigApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset), pGpu, pOffset, pSize); } // vgpuconfigapiGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiGetMapAddrSpace(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiGetMapAddrSpace(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // vgpuconfigapiInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiInternalControlForward(struct VgpuConfigApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_vgpuconfigapiInternalControlForward(struct VgpuConfigApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset), command, pParams, size); } // vgpuconfigapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_vgpuconfigapiGetInternalObjectHandle(struct VgpuConfigApi *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_vgpuconfigapiGetInternalObjectHandle(struct VgpuConfigApi *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VgpuConfigApi_GpuResource.offset)); } // vgpuconfigapiAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_vgpuconfigapiAccessCallback(struct VgpuConfigApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_vgpuconfigapiAccessCallback(struct VgpuConfigApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // vgpuconfigapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vgpuconfigapiGetMemInterMapParams(struct VgpuConfigApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_vgpuconfigapiGetMemInterMapParams(struct VgpuConfigApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), pParams); } // vgpuconfigapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vgpuconfigapiCheckMemInterUnmap(struct VgpuConfigApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_vgpuconfigapiCheckMemInterUnmap(struct VgpuConfigApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), bSubdeviceHandleProvided); } // vgpuconfigapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vgpuconfigapiGetMemoryMappingDescriptor(struct VgpuConfigApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_vgpuconfigapiGetMemoryMappingDescriptor(struct VgpuConfigApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), ppMemDesc); } // vgpuconfigapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vgpuconfigapiControlSerialization_Prologue(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_vgpuconfigapiControlSerialization_Prologue(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), pCallContext, pParams); } // vgpuconfigapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_vgpuconfigapiControlSerialization_Epilogue(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_vgpuconfigapiControlSerialization_Epilogue(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), pCallContext, pParams); } // vgpuconfigapiControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vgpuconfigapiControl_Prologue(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_vgpuconfigapiControl_Prologue(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), pCallContext, pParams); } // vgpuconfigapiControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_vgpuconfigapiControl_Epilogue(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_vgpuconfigapiControl_Epilogue(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RmResource.offset), pCallContext, pParams); } // vgpuconfigapiCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_vgpuconfigapiCanCopy(struct VgpuConfigApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_vgpuconfigapiCanCopy(struct VgpuConfigApi *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset)); } // vgpuconfigapiIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_vgpuconfigapiIsDuplicate(struct VgpuConfigApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_vgpuconfigapiIsDuplicate(struct VgpuConfigApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset), hMemory, pDuplicate); } // vgpuconfigapiPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_vgpuconfigapiPreDestruct(struct VgpuConfigApi *pResource) { +void __nvoc_up_thunk_RsResource_vgpuconfigapiPreDestruct(struct VgpuConfigApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset)); } // vgpuconfigapiControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_vgpuconfigapiControlFilter(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_vgpuconfigapiControlFilter(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset), pCallContext, pParams); } // vgpuconfigapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_vgpuconfigapiIsPartialUnmapSupported(struct VgpuConfigApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_vgpuconfigapiIsPartialUnmapSupported(struct VgpuConfigApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset)); } // vgpuconfigapiMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_vgpuconfigapiMapTo(struct VgpuConfigApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_vgpuconfigapiMapTo(struct VgpuConfigApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset), pParams); } // vgpuconfigapiUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_vgpuconfigapiUnmapFrom(struct VgpuConfigApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_vgpuconfigapiUnmapFrom(struct VgpuConfigApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset), pParams); } // vgpuconfigapiGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_vgpuconfigapiGetRefCount(struct VgpuConfigApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_vgpuconfigapiGetRefCount(struct VgpuConfigApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset)); } // vgpuconfigapiAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_vgpuconfigapiAddAdditionalDependants(struct RsClient *pClient, struct VgpuConfigApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_vgpuconfigapiAddAdditionalDependants(struct RsClient *pClient, struct VgpuConfigApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VgpuConfigApi_RsResource.offset), pReference); } // vgpuconfigapiGetNotificationListPtr: virtual inherited (notify) base (notify) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_vgpuconfigapiGetNotificationListPtr(struct VgpuConfigApi *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_vgpuconfigapiGetNotificationListPtr(struct VgpuConfigApi *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_VgpuConfigApi_Notifier.offset)); } // vgpuconfigapiGetNotificationShare: virtual inherited (notify) base (notify) -static struct NotifShare * __nvoc_up_thunk_Notifier_vgpuconfigapiGetNotificationShare(struct VgpuConfigApi *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_vgpuconfigapiGetNotificationShare(struct VgpuConfigApi *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_VgpuConfigApi_Notifier.offset)); } // vgpuconfigapiSetNotificationShare: virtual inherited (notify) base (notify) -static void __nvoc_up_thunk_Notifier_vgpuconfigapiSetNotificationShare(struct VgpuConfigApi *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_vgpuconfigapiSetNotificationShare(struct VgpuConfigApi *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_VgpuConfigApi_Notifier.offset), pNotifShare); } // vgpuconfigapiUnregisterEvent: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_vgpuconfigapiUnregisterEvent(struct VgpuConfigApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_vgpuconfigapiUnregisterEvent(struct VgpuConfigApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_VgpuConfigApi_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // vgpuconfigapiGetOrAllocNotifShare: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_vgpuconfigapiGetOrAllocNotifShare(struct VgpuConfigApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_vgpuconfigapiGetOrAllocNotifShare(struct VgpuConfigApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_VgpuConfigApi_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } const struct NVOC_EXPORT_INFO __nvoc_export_info_VgpuConfigApi = { - /*numEntries=*/ 24, + /*numEntries=*/ 25, /*pExportEntries=*/ __nvoc_exported_method_def_VgpuConfigApi }; @@ -791,7 +884,7 @@ static void __nvoc_init_funcTable_VgpuConfigApi_1(VgpuConfigApi *pThis) { #endif // vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo -- exported (id=0xa081011b) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) pThis->__vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo__ = &vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo_IMPL; #endif @@ -800,102 +893,183 @@ static void __nvoc_init_funcTable_VgpuConfigApi_1(VgpuConfigApi *pThis) { pThis->__vgpuconfigapiCtrlCmdVgpuSetVmName__ = &vgpuconfigapiCtrlCmdVgpuSetVmName_IMPL; #endif - // vgpuconfigapiControl -- virtual inherited (gpures) base (gpures) - pThis->__vgpuconfigapiControl__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiControl; - - // vgpuconfigapiMap -- virtual inherited (gpures) base (gpures) - pThis->__vgpuconfigapiMap__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiMap; - - // vgpuconfigapiUnmap -- virtual inherited (gpures) base (gpures) - pThis->__vgpuconfigapiUnmap__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiUnmap; - - // vgpuconfigapiShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__vgpuconfigapiShareCallback__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiShareCallback; - - // vgpuconfigapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__vgpuconfigapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiGetRegBaseOffsetAndSize; - - // vgpuconfigapiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__vgpuconfigapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiGetMapAddrSpace; - - // vgpuconfigapiInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__vgpuconfigapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiInternalControlForward; - - // vgpuconfigapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__vgpuconfigapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiGetInternalObjectHandle; - - // vgpuconfigapiAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__vgpuconfigapiAccessCallback__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiAccessCallback; - - // vgpuconfigapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__vgpuconfigapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiGetMemInterMapParams; - - // vgpuconfigapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__vgpuconfigapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiCheckMemInterUnmap; - - // vgpuconfigapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__vgpuconfigapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiGetMemoryMappingDescriptor; - - // vgpuconfigapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__vgpuconfigapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiControlSerialization_Prologue; - - // vgpuconfigapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__vgpuconfigapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiControlSerialization_Epilogue; - - // vgpuconfigapiControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__vgpuconfigapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiControl_Prologue; - - // vgpuconfigapiControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__vgpuconfigapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiControl_Epilogue; - - // vgpuconfigapiCanCopy -- virtual inherited (res) base (gpures) - pThis->__vgpuconfigapiCanCopy__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiCanCopy; - - // vgpuconfigapiIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__vgpuconfigapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiIsDuplicate; - - // vgpuconfigapiPreDestruct -- virtual inherited (res) base (gpures) - pThis->__vgpuconfigapiPreDestruct__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiPreDestruct; - - // vgpuconfigapiControlFilter -- virtual inherited (res) base (gpures) - pThis->__vgpuconfigapiControlFilter__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiControlFilter; - - // vgpuconfigapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__vgpuconfigapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiIsPartialUnmapSupported; - - // vgpuconfigapiMapTo -- virtual inherited (res) base (gpures) - pThis->__vgpuconfigapiMapTo__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiMapTo; - - // vgpuconfigapiUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__vgpuconfigapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiUnmapFrom; - - // vgpuconfigapiGetRefCount -- virtual inherited (res) base (gpures) - pThis->__vgpuconfigapiGetRefCount__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiGetRefCount; - - // vgpuconfigapiAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__vgpuconfigapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiAddAdditionalDependants; - - // vgpuconfigapiGetNotificationListPtr -- virtual inherited (notify) base (notify) - pThis->__vgpuconfigapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_vgpuconfigapiGetNotificationListPtr; - - // vgpuconfigapiGetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__vgpuconfigapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_vgpuconfigapiGetNotificationShare; - - // vgpuconfigapiSetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__vgpuconfigapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_vgpuconfigapiSetNotificationShare; - - // vgpuconfigapiUnregisterEvent -- virtual inherited (notify) base (notify) - pThis->__vgpuconfigapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_vgpuconfigapiUnregisterEvent; - - // vgpuconfigapiGetOrAllocNotifShare -- virtual inherited (notify) base (notify) - pThis->__vgpuconfigapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_vgpuconfigapiGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_VgpuConfigApi_1 with approximately 54 basic block(s). + // vgpuconfigapiCtrlCmdVgpuConfigGetMigrationBandwidth -- exported (id=0xa0810122) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) + pThis->__vgpuconfigapiCtrlCmdVgpuConfigGetMigrationBandwidth__ = &vgpuconfigapiCtrlCmdVgpuConfigGetMigrationBandwidth_IMPL; +#endif +} // End __nvoc_init_funcTable_VgpuConfigApi_1 with approximately 25 basic block(s). -// Initialize vtable(s) for 54 virtual method(s). +// Initialize vtable(s) for 55 virtual method(s). void __nvoc_init_funcTable_VgpuConfigApi(VgpuConfigApi *pThis) { - // Initialize vtable(s) with 54 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__VgpuConfigApi vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) +#endif + .__vgpuconfigapiControl__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__vgpuconfigapiMap__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__vgpuconfigapiUnmap__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__vgpuconfigapiShareCallback__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__vgpuconfigapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__vgpuconfigapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__vgpuconfigapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__vgpuconfigapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_vgpuconfigapiGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__vgpuconfigapiAccessCallback__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__vgpuconfigapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__vgpuconfigapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__vgpuconfigapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__vgpuconfigapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__vgpuconfigapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__vgpuconfigapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__vgpuconfigapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_vgpuconfigapiControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__vgpuconfigapiCanCopy__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__vgpuconfigapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__vgpuconfigapiPreDestruct__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__vgpuconfigapiControlFilter__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__vgpuconfigapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__vgpuconfigapiMapTo__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__vgpuconfigapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__vgpuconfigapiGetRefCount__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__vgpuconfigapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_vgpuconfigapiAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__vgpuconfigapiGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_vgpuconfigapiGetNotificationListPtr, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__vgpuconfigapiGetNotificationShare__ = &__nvoc_up_thunk_Notifier_vgpuconfigapiGetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__vgpuconfigapiSetNotificationShare__ = &__nvoc_up_thunk_Notifier_vgpuconfigapiSetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__vgpuconfigapiUnregisterEvent__ = &__nvoc_up_thunk_Notifier_vgpuconfigapiUnregisterEvent, // virtual inherited (notify) base (notify) + .Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__vgpuconfigapiGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_vgpuconfigapiGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.Notifier.INotifier; // (inotify) super^2 + pThis->__nvoc_base_Notifier.__nvoc_vtable = &vtable.Notifier; // (notify) super + pThis->__nvoc_vtable = &vtable; // (vgpuconfigapi) this + + // Initialize vtable(s) with 25 per-object function pointer(s). __nvoc_init_funcTable_VgpuConfigApi_1(pThis); } diff --git a/src/nvidia/generated/g_vgpuconfigapi_nvoc.h b/src/nvidia/generated/g_vgpuconfigapi_nvoc.h index 7994419c2f..2ef07fb638 100644 --- a/src/nvidia/generated/g_vgpuconfigapi_nvoc.h +++ b/src/nvidia/generated/g_vgpuconfigapi_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -64,10 +64,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__VgpuConfigApi; + + struct VgpuConfigApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__VgpuConfigApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -83,7 +88,7 @@ struct VgpuConfigApi { struct Notifier *__nvoc_pbase_Notifier; // notify super struct VgpuConfigApi *__nvoc_pbase_VgpuConfigApi; // vgpuconfigapi - // Vtable with 54 per-object function pointers + // Vtable with 25 per-object function pointers NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigSetInfo__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_CONFIG_INFO_PARAMS *); // exported (id=0xa0810101) NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigEnumerateVgpuPerPgpu__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_CONFIG_ENUMERATE_VGPU_PER_PGPU_PARAMS *); // exported (id=0xa0810102) NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetVgpuTypeInfo__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_TYPE_INFO_PARAMS *); // exported (id=0xa0810103) @@ -108,6 +113,18 @@ struct VgpuConfigApi { NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigValidateSwizzId__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_CONFIG_VALIDATE_SWIZZID_PARAMS *); // exported (id=0xa081011a) NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_CONFIG_UPDATE_HETEROGENEOUS_INFO_PARAMS *); // exported (id=0xa081011b) NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuSetVmName__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_SET_VM_NAME_PARAMS *); // exported (id=0xa0810120) + NV_STATUS (*__vgpuconfigapiCtrlCmdVgpuConfigGetMigrationBandwidth__)(struct VgpuConfigApi * /*this*/, NVA081_CTRL_VGPU_CONFIG_GET_MIGRATION_BANDWIDTH_PARAMS *); // exported (id=0xa0810122) + + // Data members + NvU32 notifyActions[5]; +}; + + +// Metadata including vtable with 30 function pointers plus superclass metadata +struct NVOC_VTABLE__VgpuConfigApi { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + const struct NVOC_VTABLE__Notifier Notifier; // (notify) 5 function pointers + NV_STATUS (*__vgpuconfigapiControl__)(struct VgpuConfigApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__vgpuconfigapiMap__)(struct VgpuConfigApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__vgpuconfigapiUnmap__)(struct VgpuConfigApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -138,9 +155,6 @@ struct VgpuConfigApi { void (*__vgpuconfigapiSetNotificationShare__)(struct VgpuConfigApi * /*this*/, struct NotifShare *); // virtual inherited (notify) base (notify) NV_STATUS (*__vgpuconfigapiUnregisterEvent__)(struct VgpuConfigApi * /*this*/, NvHandle, NvHandle, NvHandle, NvHandle); // virtual inherited (notify) base (notify) NV_STATUS (*__vgpuconfigapiGetOrAllocNotifShare__)(struct VgpuConfigApi * /*this*/, NvHandle, NvHandle, struct NotifShare **); // virtual inherited (notify) base (notify) - - // Data members - NvU32 notifyActions[5]; }; #ifndef __NVOC_CLASS_VgpuConfigApi_TYPEDEF__ @@ -221,65 +235,67 @@ NV_STATUS __nvoc_objCreate_VgpuConfigApi(VgpuConfigApi**, Dynamic*, NvU32, struc #define vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo_DISPATCH(pVgpuConfigApi, pParams) #define vgpuconfigapiCtrlCmdVgpuSetVmName_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuSetVmName__ #define vgpuconfigapiCtrlCmdVgpuSetVmName(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdVgpuSetVmName_DISPATCH(pVgpuConfigApi, pParams) -#define vgpuconfigapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define vgpuconfigapiCtrlCmdVgpuConfigGetMigrationBandwidth_FNPTR(pVgpuConfigApi) pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetMigrationBandwidth__ +#define vgpuconfigapiCtrlCmdVgpuConfigGetMigrationBandwidth(pVgpuConfigApi, pParams) vgpuconfigapiCtrlCmdVgpuConfigGetMigrationBandwidth_DISPATCH(pVgpuConfigApi, pParams) +#define vgpuconfigapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define vgpuconfigapiControl(pGpuResource, pCallContext, pParams) vgpuconfigapiControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define vgpuconfigapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define vgpuconfigapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define vgpuconfigapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) vgpuconfigapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define vgpuconfigapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define vgpuconfigapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define vgpuconfigapiUnmap(pGpuResource, pCallContext, pCpuMapping) vgpuconfigapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define vgpuconfigapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define vgpuconfigapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define vgpuconfigapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) vgpuconfigapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define vgpuconfigapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define vgpuconfigapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define vgpuconfigapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) vgpuconfigapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define vgpuconfigapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define vgpuconfigapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define vgpuconfigapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) vgpuconfigapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define vgpuconfigapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define vgpuconfigapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define vgpuconfigapiInternalControlForward(pGpuResource, command, pParams, size) vgpuconfigapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define vgpuconfigapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define vgpuconfigapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define vgpuconfigapiGetInternalObjectHandle(pGpuResource) vgpuconfigapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define vgpuconfigapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define vgpuconfigapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define vgpuconfigapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) vgpuconfigapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define vgpuconfigapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define vgpuconfigapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define vgpuconfigapiGetMemInterMapParams(pRmResource, pParams) vgpuconfigapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define vgpuconfigapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define vgpuconfigapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define vgpuconfigapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) vgpuconfigapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define vgpuconfigapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define vgpuconfigapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define vgpuconfigapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) vgpuconfigapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define vgpuconfigapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define vgpuconfigapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define vgpuconfigapiControlSerialization_Prologue(pResource, pCallContext, pParams) vgpuconfigapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define vgpuconfigapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define vgpuconfigapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define vgpuconfigapiControlSerialization_Epilogue(pResource, pCallContext, pParams) vgpuconfigapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define vgpuconfigapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define vgpuconfigapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define vgpuconfigapiControl_Prologue(pResource, pCallContext, pParams) vgpuconfigapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define vgpuconfigapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define vgpuconfigapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define vgpuconfigapiControl_Epilogue(pResource, pCallContext, pParams) vgpuconfigapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define vgpuconfigapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define vgpuconfigapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define vgpuconfigapiCanCopy(pResource) vgpuconfigapiCanCopy_DISPATCH(pResource) -#define vgpuconfigapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define vgpuconfigapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define vgpuconfigapiIsDuplicate(pResource, hMemory, pDuplicate) vgpuconfigapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define vgpuconfigapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define vgpuconfigapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define vgpuconfigapiPreDestruct(pResource) vgpuconfigapiPreDestruct_DISPATCH(pResource) -#define vgpuconfigapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define vgpuconfigapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define vgpuconfigapiControlFilter(pResource, pCallContext, pParams) vgpuconfigapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define vgpuconfigapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define vgpuconfigapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define vgpuconfigapiIsPartialUnmapSupported(pResource) vgpuconfigapiIsPartialUnmapSupported_DISPATCH(pResource) -#define vgpuconfigapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define vgpuconfigapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define vgpuconfigapiMapTo(pResource, pParams) vgpuconfigapiMapTo_DISPATCH(pResource, pParams) -#define vgpuconfigapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define vgpuconfigapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define vgpuconfigapiUnmapFrom(pResource, pParams) vgpuconfigapiUnmapFrom_DISPATCH(pResource, pParams) -#define vgpuconfigapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define vgpuconfigapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define vgpuconfigapiGetRefCount(pResource) vgpuconfigapiGetRefCount_DISPATCH(pResource) -#define vgpuconfigapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define vgpuconfigapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define vgpuconfigapiAddAdditionalDependants(pClient, pResource, pReference) vgpuconfigapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define vgpuconfigapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define vgpuconfigapiGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define vgpuconfigapiGetNotificationListPtr(pNotifier) vgpuconfigapiGetNotificationListPtr_DISPATCH(pNotifier) -#define vgpuconfigapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define vgpuconfigapiGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define vgpuconfigapiGetNotificationShare(pNotifier) vgpuconfigapiGetNotificationShare_DISPATCH(pNotifier) -#define vgpuconfigapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define vgpuconfigapiSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define vgpuconfigapiSetNotificationShare(pNotifier, pNotifShare) vgpuconfigapiSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define vgpuconfigapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define vgpuconfigapiUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define vgpuconfigapiUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) vgpuconfigapiUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define vgpuconfigapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define vgpuconfigapiGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define vgpuconfigapiGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) vgpuconfigapiGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions @@ -379,124 +395,128 @@ static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuSetVmName_DISPATCH(struct VgpuCo return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuSetVmName__(pVgpuConfigApi, pParams); } +static inline NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetMigrationBandwidth_DISPATCH(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_MIGRATION_BANDWIDTH_PARAMS *pParams) { + return pVgpuConfigApi->__vgpuconfigapiCtrlCmdVgpuConfigGetMigrationBandwidth__(pVgpuConfigApi, pParams); +} + static inline NV_STATUS vgpuconfigapiControl_DISPATCH(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__vgpuconfigapiControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__vgpuconfigapiControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS vgpuconfigapiMap_DISPATCH(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__vgpuconfigapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__vgpuconfigapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS vgpuconfigapiUnmap_DISPATCH(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__vgpuconfigapiUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__vgpuconfigapiUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool vgpuconfigapiShareCallback_DISPATCH(struct VgpuConfigApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__vgpuconfigapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__vgpuconfigapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS vgpuconfigapiGetRegBaseOffsetAndSize_DISPATCH(struct VgpuConfigApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__vgpuconfigapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__vgpuconfigapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS vgpuconfigapiGetMapAddrSpace_DISPATCH(struct VgpuConfigApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__vgpuconfigapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__vgpuconfigapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS vgpuconfigapiInternalControlForward_DISPATCH(struct VgpuConfigApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__vgpuconfigapiInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__vgpuconfigapiInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle vgpuconfigapiGetInternalObjectHandle_DISPATCH(struct VgpuConfigApi *pGpuResource) { - return pGpuResource->__vgpuconfigapiGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__vgpuconfigapiGetInternalObjectHandle__(pGpuResource); } static inline NvBool vgpuconfigapiAccessCallback_DISPATCH(struct VgpuConfigApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__vgpuconfigapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__vgpuconfigapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS vgpuconfigapiGetMemInterMapParams_DISPATCH(struct VgpuConfigApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__vgpuconfigapiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__vgpuconfigapiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS vgpuconfigapiCheckMemInterUnmap_DISPATCH(struct VgpuConfigApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__vgpuconfigapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__vgpuconfigapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS vgpuconfigapiGetMemoryMappingDescriptor_DISPATCH(struct VgpuConfigApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__vgpuconfigapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__vgpuconfigapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS vgpuconfigapiControlSerialization_Prologue_DISPATCH(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vgpuconfigapiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__vgpuconfigapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void vgpuconfigapiControlSerialization_Epilogue_DISPATCH(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vgpuconfigapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__vgpuconfigapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS vgpuconfigapiControl_Prologue_DISPATCH(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vgpuconfigapiControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__vgpuconfigapiControl_Prologue__(pResource, pCallContext, pParams); } static inline void vgpuconfigapiControl_Epilogue_DISPATCH(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vgpuconfigapiControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__vgpuconfigapiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool vgpuconfigapiCanCopy_DISPATCH(struct VgpuConfigApi *pResource) { - return pResource->__vgpuconfigapiCanCopy__(pResource); + return pResource->__nvoc_vtable->__vgpuconfigapiCanCopy__(pResource); } static inline NV_STATUS vgpuconfigapiIsDuplicate_DISPATCH(struct VgpuConfigApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__vgpuconfigapiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__vgpuconfigapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void vgpuconfigapiPreDestruct_DISPATCH(struct VgpuConfigApi *pResource) { - pResource->__vgpuconfigapiPreDestruct__(pResource); + pResource->__nvoc_vtable->__vgpuconfigapiPreDestruct__(pResource); } static inline NV_STATUS vgpuconfigapiControlFilter_DISPATCH(struct VgpuConfigApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vgpuconfigapiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__vgpuconfigapiControlFilter__(pResource, pCallContext, pParams); } static inline NvBool vgpuconfigapiIsPartialUnmapSupported_DISPATCH(struct VgpuConfigApi *pResource) { - return pResource->__vgpuconfigapiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__vgpuconfigapiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS vgpuconfigapiMapTo_DISPATCH(struct VgpuConfigApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__vgpuconfigapiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__vgpuconfigapiMapTo__(pResource, pParams); } static inline NV_STATUS vgpuconfigapiUnmapFrom_DISPATCH(struct VgpuConfigApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__vgpuconfigapiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__vgpuconfigapiUnmapFrom__(pResource, pParams); } static inline NvU32 vgpuconfigapiGetRefCount_DISPATCH(struct VgpuConfigApi *pResource) { - return pResource->__vgpuconfigapiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__vgpuconfigapiGetRefCount__(pResource); } static inline void vgpuconfigapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VgpuConfigApi *pResource, RsResourceRef *pReference) { - pResource->__vgpuconfigapiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__vgpuconfigapiAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * vgpuconfigapiGetNotificationListPtr_DISPATCH(struct VgpuConfigApi *pNotifier) { - return pNotifier->__vgpuconfigapiGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__vgpuconfigapiGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * vgpuconfigapiGetNotificationShare_DISPATCH(struct VgpuConfigApi *pNotifier) { - return pNotifier->__vgpuconfigapiGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__vgpuconfigapiGetNotificationShare__(pNotifier); } static inline void vgpuconfigapiSetNotificationShare_DISPATCH(struct VgpuConfigApi *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__vgpuconfigapiSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__vgpuconfigapiSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS vgpuconfigapiUnregisterEvent_DISPATCH(struct VgpuConfigApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__vgpuconfigapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__vgpuconfigapiUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS vgpuconfigapiGetOrAllocNotifShare_DISPATCH(struct VgpuConfigApi *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__vgpuconfigapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__vgpuconfigapiGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigSetInfo_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_INFO_PARAMS *pParams); @@ -547,6 +567,8 @@ NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo_IMPL(struct Vgpu NV_STATUS vgpuconfigapiCtrlCmdVgpuSetVmName_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_SET_VM_NAME_PARAMS *pParams); +NV_STATUS vgpuconfigapiCtrlCmdVgpuConfigGetMigrationBandwidth_IMPL(struct VgpuConfigApi *pVgpuConfigApi, NVA081_CTRL_VGPU_CONFIG_GET_MIGRATION_BANDWIDTH_PARAMS *pParams); + NV_STATUS vgpuconfigapiConstruct_IMPL(struct VgpuConfigApi *arg_pResource, struct CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); #define __nvoc_vgpuconfigapiConstruct(arg_pResource, arg_pCallContext, arg_pParams) vgpuconfigapiConstruct_IMPL(arg_pResource, arg_pCallContext, arg_pParams) diff --git a/src/nvidia/generated/g_video_mem_nvoc.c b/src/nvidia/generated/g_video_mem_nvoc.c index 60336abc88..c4de53ed30 100644 --- a/src/nvidia/generated/g_video_mem_nvoc.c +++ b/src/nvidia/generated/g_video_mem_nvoc.c @@ -102,138 +102,233 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_VideoMemory = /*pExportInfo=*/ &__nvoc_export_info_VideoMemory }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NvBool __nvoc_down_thunk_StandardMemory_resCanCopy(struct RsResource *pStandardMemory); // super +NV_STATUS __nvoc_down_thunk_VideoMemory_memCheckCopyPermissions(struct Memory *pVideoMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // this + // 1 down-thunk(s) defined to bridge methods in VideoMemory from superclasses // vidmemCheckCopyPermissions: virtual override (mem) base (stdmem) -static NV_STATUS __nvoc_down_thunk_VideoMemory_memCheckCopyPermissions(struct Memory *pVideoMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { +NV_STATUS __nvoc_down_thunk_VideoMemory_memCheckCopyPermissions(struct Memory *pVideoMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { return vidmemCheckCopyPermissions((struct VideoMemory *)(((unsigned char *) pVideoMemory) - __nvoc_rtti_VideoMemory_Memory.offset), pDstGpu, pDstDevice); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^3 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^3 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^3 +NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource); // super^2 +void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource); // super^2 +void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference); // super^2 +NV_STATUS __nvoc_up_thunk_Memory_stdmemIsDuplicate(struct StandardMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMapAddrSpace(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemControl(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemMap(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemUnmap(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMemInterMapParams(struct StandardMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemCheckMemInterUnmap(struct StandardMemory *pMemory, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMemoryMappingDescriptor(struct StandardMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemCheckCopyPermissions(struct StandardMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemIsReady(struct StandardMemory *pMemory, NvBool bCopyConstructorContext); // super +NvBool __nvoc_up_thunk_Memory_stdmemIsGpuMapAllowed(struct StandardMemory *pMemory, struct OBJGPU *pGpu); // super +NvBool __nvoc_up_thunk_Memory_stdmemIsExportAllowed(struct StandardMemory *pMemory); // super +NvBool __nvoc_up_thunk_RmResource_stdmemAccessCallback(struct StandardMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_stdmemShareCallback(struct StandardMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_stdmemControlSerialization_Prologue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_stdmemControlSerialization_Epilogue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_stdmemControl_Prologue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_stdmemControl_Epilogue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RsResource_stdmemPreDestruct(struct StandardMemory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_stdmemControlFilter(struct StandardMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_stdmemIsPartialUnmapSupported(struct StandardMemory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_stdmemMapTo(struct StandardMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_stdmemUnmapFrom(struct StandardMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_stdmemGetRefCount(struct StandardMemory *pResource); // super +void __nvoc_up_thunk_RsResource_stdmemAddAdditionalDependants(struct RsClient *pClient, struct StandardMemory *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_StandardMemory_vidmemCanCopy(struct VideoMemory *pStandardMemory); // this +NV_STATUS __nvoc_up_thunk_Memory_vidmemIsDuplicate(struct VideoMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate); // this +NV_STATUS __nvoc_up_thunk_Memory_vidmemGetMapAddrSpace(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_Memory_vidmemControl(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_vidmemMap(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_vidmemUnmap(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_vidmemGetMemInterMapParams(struct VideoMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_vidmemCheckMemInterUnmap(struct VideoMemory *pMemory, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_Memory_vidmemGetMemoryMappingDescriptor(struct VideoMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_Memory_vidmemIsReady(struct VideoMemory *pMemory, NvBool bCopyConstructorContext); // this +NvBool __nvoc_up_thunk_Memory_vidmemIsGpuMapAllowed(struct VideoMemory *pMemory, struct OBJGPU *pGpu); // this +NvBool __nvoc_up_thunk_Memory_vidmemIsExportAllowed(struct VideoMemory *pMemory); // this +NvBool __nvoc_up_thunk_RmResource_vidmemAccessCallback(struct VideoMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_vidmemShareCallback(struct VideoMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_vidmemControlSerialization_Prologue(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_vidmemControlSerialization_Epilogue(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_vidmemControl_Prologue(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_vidmemControl_Epilogue(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RsResource_vidmemPreDestruct(struct VideoMemory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_vidmemControlFilter(struct VideoMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_vidmemIsPartialUnmapSupported(struct VideoMemory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_vidmemMapTo(struct VideoMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_vidmemUnmapFrom(struct VideoMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_vidmemGetRefCount(struct VideoMemory *pResource); // this +void __nvoc_up_thunk_RsResource_vidmemAddAdditionalDependants(struct RsClient *pClient, struct VideoMemory *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in VideoMemory to superclasses // vidmemCanCopy: virtual inherited (stdmem) base (stdmem) -static NvBool __nvoc_up_thunk_StandardMemory_vidmemCanCopy(struct VideoMemory *pStandardMemory) { +NvBool __nvoc_up_thunk_StandardMemory_vidmemCanCopy(struct VideoMemory *pStandardMemory) { return stdmemCanCopy((struct StandardMemory *)(((unsigned char *) pStandardMemory) + __nvoc_rtti_VideoMemory_StandardMemory.offset)); } // vidmemIsDuplicate: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_vidmemIsDuplicate(struct VideoMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_Memory_vidmemIsDuplicate(struct VideoMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), hMemory, pDuplicate); } // vidmemGetMapAddrSpace: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_vidmemGetMapAddrSpace(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_Memory_vidmemGetMapAddrSpace(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); } // vidmemControl: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_vidmemControl(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_vidmemControl(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), pCallContext, pParams); } // vidmemMap: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_vidmemMap(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_vidmemMap(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), pCallContext, pParams, pCpuMapping); } // vidmemUnmap: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_vidmemUnmap(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_vidmemUnmap(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), pCallContext, pCpuMapping); } // vidmemGetMemInterMapParams: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_vidmemGetMemInterMapParams(struct VideoMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_vidmemGetMemInterMapParams(struct VideoMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), pParams); } // vidmemCheckMemInterUnmap: inline virtual inherited (mem) base (stdmem) body -static NV_STATUS __nvoc_up_thunk_Memory_vidmemCheckMemInterUnmap(struct VideoMemory *pMemory, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_Memory_vidmemCheckMemInterUnmap(struct VideoMemory *pMemory, NvBool bSubdeviceHandleProvided) { return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), bSubdeviceHandleProvided); } // vidmemGetMemoryMappingDescriptor: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_vidmemGetMemoryMappingDescriptor(struct VideoMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_Memory_vidmemGetMemoryMappingDescriptor(struct VideoMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), ppMemDesc); } // vidmemIsReady: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_vidmemIsReady(struct VideoMemory *pMemory, NvBool bCopyConstructorContext) { +NV_STATUS __nvoc_up_thunk_Memory_vidmemIsReady(struct VideoMemory *pMemory, NvBool bCopyConstructorContext) { return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), bCopyConstructorContext); } // vidmemIsGpuMapAllowed: inline virtual inherited (mem) base (stdmem) body -static NvBool __nvoc_up_thunk_Memory_vidmemIsGpuMapAllowed(struct VideoMemory *pMemory, struct OBJGPU *pGpu) { +NvBool __nvoc_up_thunk_Memory_vidmemIsGpuMapAllowed(struct VideoMemory *pMemory, struct OBJGPU *pGpu) { return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VideoMemory_Memory.offset), pGpu); } // vidmemIsExportAllowed: inline virtual inherited (mem) base (stdmem) body -static NvBool __nvoc_up_thunk_Memory_vidmemIsExportAllowed(struct VideoMemory *pMemory) { +NvBool __nvoc_up_thunk_Memory_vidmemIsExportAllowed(struct VideoMemory *pMemory) { return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VideoMemory_Memory.offset)); } // vidmemAccessCallback: virtual inherited (rmres) base (stdmem) -static NvBool __nvoc_up_thunk_RmResource_vidmemAccessCallback(struct VideoMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_vidmemAccessCallback(struct VideoMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // vidmemShareCallback: virtual inherited (rmres) base (stdmem) -static NvBool __nvoc_up_thunk_RmResource_vidmemShareCallback(struct VideoMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_vidmemShareCallback(struct VideoMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // vidmemControlSerialization_Prologue: virtual inherited (rmres) base (stdmem) -static NV_STATUS __nvoc_up_thunk_RmResource_vidmemControlSerialization_Prologue(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_vidmemControlSerialization_Prologue(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RmResource.offset), pCallContext, pParams); } // vidmemControlSerialization_Epilogue: virtual inherited (rmres) base (stdmem) -static void __nvoc_up_thunk_RmResource_vidmemControlSerialization_Epilogue(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_vidmemControlSerialization_Epilogue(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RmResource.offset), pCallContext, pParams); } // vidmemControl_Prologue: virtual inherited (rmres) base (stdmem) -static NV_STATUS __nvoc_up_thunk_RmResource_vidmemControl_Prologue(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_vidmemControl_Prologue(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RmResource.offset), pCallContext, pParams); } // vidmemControl_Epilogue: virtual inherited (rmres) base (stdmem) -static void __nvoc_up_thunk_RmResource_vidmemControl_Epilogue(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_vidmemControl_Epilogue(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RmResource.offset), pCallContext, pParams); } // vidmemPreDestruct: virtual inherited (res) base (stdmem) -static void __nvoc_up_thunk_RsResource_vidmemPreDestruct(struct VideoMemory *pResource) { +void __nvoc_up_thunk_RsResource_vidmemPreDestruct(struct VideoMemory *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RsResource.offset)); } // vidmemControlFilter: virtual inherited (res) base (stdmem) -static NV_STATUS __nvoc_up_thunk_RsResource_vidmemControlFilter(struct VideoMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_vidmemControlFilter(struct VideoMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RsResource.offset), pCallContext, pParams); } // vidmemIsPartialUnmapSupported: inline virtual inherited (res) base (stdmem) body -static NvBool __nvoc_up_thunk_RsResource_vidmemIsPartialUnmapSupported(struct VideoMemory *pResource) { +NvBool __nvoc_up_thunk_RsResource_vidmemIsPartialUnmapSupported(struct VideoMemory *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RsResource.offset)); } // vidmemMapTo: virtual inherited (res) base (stdmem) -static NV_STATUS __nvoc_up_thunk_RsResource_vidmemMapTo(struct VideoMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_vidmemMapTo(struct VideoMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RsResource.offset), pParams); } // vidmemUnmapFrom: virtual inherited (res) base (stdmem) -static NV_STATUS __nvoc_up_thunk_RsResource_vidmemUnmapFrom(struct VideoMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_vidmemUnmapFrom(struct VideoMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RsResource.offset), pParams); } // vidmemGetRefCount: virtual inherited (res) base (stdmem) -static NvU32 __nvoc_up_thunk_RsResource_vidmemGetRefCount(struct VideoMemory *pResource) { +NvU32 __nvoc_up_thunk_RsResource_vidmemGetRefCount(struct VideoMemory *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RsResource.offset)); } // vidmemAddAdditionalDependants: virtual inherited (res) base (stdmem) -static void __nvoc_up_thunk_RsResource_vidmemAddAdditionalDependants(struct RsClient *pClient, struct VideoMemory *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_vidmemAddAdditionalDependants(struct RsClient *pClient, struct VideoMemory *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VideoMemory_RsResource.offset), pReference); } @@ -277,92 +372,139 @@ NV_STATUS __nvoc_ctor_VideoMemory(VideoMemory *pThis, CALL_CONTEXT * arg_pCallCo // Vtable initialization static void __nvoc_init_funcTable_VideoMemory_1(VideoMemory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // vidmemCheckCopyPermissions -- virtual override (mem) base (stdmem) - pThis->__vidmemCheckCopyPermissions__ = &vidmemCheckCopyPermissions_IMPL; - pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memCheckCopyPermissions__ = &__nvoc_down_thunk_VideoMemory_memCheckCopyPermissions; - - // vidmemCanCopy -- virtual inherited (stdmem) base (stdmem) - pThis->__vidmemCanCopy__ = &__nvoc_up_thunk_StandardMemory_vidmemCanCopy; - - // vidmemIsDuplicate -- virtual inherited (mem) base (stdmem) - pThis->__vidmemIsDuplicate__ = &__nvoc_up_thunk_Memory_vidmemIsDuplicate; - - // vidmemGetMapAddrSpace -- virtual inherited (mem) base (stdmem) - pThis->__vidmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_vidmemGetMapAddrSpace; - - // vidmemControl -- virtual inherited (mem) base (stdmem) - pThis->__vidmemControl__ = &__nvoc_up_thunk_Memory_vidmemControl; - - // vidmemMap -- virtual inherited (mem) base (stdmem) - pThis->__vidmemMap__ = &__nvoc_up_thunk_Memory_vidmemMap; - - // vidmemUnmap -- virtual inherited (mem) base (stdmem) - pThis->__vidmemUnmap__ = &__nvoc_up_thunk_Memory_vidmemUnmap; - - // vidmemGetMemInterMapParams -- virtual inherited (mem) base (stdmem) - pThis->__vidmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_vidmemGetMemInterMapParams; - - // vidmemCheckMemInterUnmap -- inline virtual inherited (mem) base (stdmem) body - pThis->__vidmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_vidmemCheckMemInterUnmap; - - // vidmemGetMemoryMappingDescriptor -- virtual inherited (mem) base (stdmem) - pThis->__vidmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_vidmemGetMemoryMappingDescriptor; - - // vidmemIsReady -- virtual inherited (mem) base (stdmem) - pThis->__vidmemIsReady__ = &__nvoc_up_thunk_Memory_vidmemIsReady; - - // vidmemIsGpuMapAllowed -- inline virtual inherited (mem) base (stdmem) body - pThis->__vidmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_vidmemIsGpuMapAllowed; - - // vidmemIsExportAllowed -- inline virtual inherited (mem) base (stdmem) body - pThis->__vidmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_vidmemIsExportAllowed; - - // vidmemAccessCallback -- virtual inherited (rmres) base (stdmem) - pThis->__vidmemAccessCallback__ = &__nvoc_up_thunk_RmResource_vidmemAccessCallback; - - // vidmemShareCallback -- virtual inherited (rmres) base (stdmem) - pThis->__vidmemShareCallback__ = &__nvoc_up_thunk_RmResource_vidmemShareCallback; - - // vidmemControlSerialization_Prologue -- virtual inherited (rmres) base (stdmem) - pThis->__vidmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_vidmemControlSerialization_Prologue; - - // vidmemControlSerialization_Epilogue -- virtual inherited (rmres) base (stdmem) - pThis->__vidmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_vidmemControlSerialization_Epilogue; - - // vidmemControl_Prologue -- virtual inherited (rmres) base (stdmem) - pThis->__vidmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_vidmemControl_Prologue; - - // vidmemControl_Epilogue -- virtual inherited (rmres) base (stdmem) - pThis->__vidmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_vidmemControl_Epilogue; - - // vidmemPreDestruct -- virtual inherited (res) base (stdmem) - pThis->__vidmemPreDestruct__ = &__nvoc_up_thunk_RsResource_vidmemPreDestruct; - - // vidmemControlFilter -- virtual inherited (res) base (stdmem) - pThis->__vidmemControlFilter__ = &__nvoc_up_thunk_RsResource_vidmemControlFilter; - - // vidmemIsPartialUnmapSupported -- inline virtual inherited (res) base (stdmem) body - pThis->__vidmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_vidmemIsPartialUnmapSupported; - - // vidmemMapTo -- virtual inherited (res) base (stdmem) - pThis->__vidmemMapTo__ = &__nvoc_up_thunk_RsResource_vidmemMapTo; - - // vidmemUnmapFrom -- virtual inherited (res) base (stdmem) - pThis->__vidmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_vidmemUnmapFrom; - - // vidmemGetRefCount -- virtual inherited (res) base (stdmem) - pThis->__vidmemGetRefCount__ = &__nvoc_up_thunk_RsResource_vidmemGetRefCount; - - // vidmemAddAdditionalDependants -- virtual inherited (res) base (stdmem) - pThis->__vidmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_vidmemAddAdditionalDependants; -} // End __nvoc_init_funcTable_VideoMemory_1 with approximately 27 basic block(s). +} // End __nvoc_init_funcTable_VideoMemory_1 // Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_VideoMemory(VideoMemory *pThis) { - // Initialize vtable(s) with 26 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__VideoMemory vtable = { + .__vidmemCheckCopyPermissions__ = &vidmemCheckCopyPermissions_IMPL, // virtual override (mem) base (stdmem) + .StandardMemory.__stdmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_stdmemCheckCopyPermissions, // inline virtual inherited (mem) base (mem) body + .StandardMemory.Memory.__memCheckCopyPermissions__ = &__nvoc_down_thunk_VideoMemory_memCheckCopyPermissions, // inline virtual body + .__vidmemCanCopy__ = &__nvoc_up_thunk_StandardMemory_vidmemCanCopy, // virtual inherited (stdmem) base (stdmem) + .StandardMemory.__stdmemCanCopy__ = &stdmemCanCopy_IMPL, // virtual override (res) base (mem) + .StandardMemory.Memory.__memCanCopy__ = &__nvoc_up_thunk_RsResource_memCanCopy, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_StandardMemory_resCanCopy, // virtual + .__vidmemIsDuplicate__ = &__nvoc_up_thunk_Memory_vidmemIsDuplicate, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemIsDuplicate__ = &__nvoc_up_thunk_Memory_stdmemIsDuplicate, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memIsDuplicate__ = &memIsDuplicate_IMPL, // virtual override (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resIsDuplicate__ = &__nvoc_down_thunk_Memory_resIsDuplicate, // virtual + .__vidmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_vidmemGetMapAddrSpace, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_stdmemGetMapAddrSpace, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memGetMapAddrSpace__ = &memGetMapAddrSpace_IMPL, // virtual + .__vidmemControl__ = &__nvoc_up_thunk_Memory_vidmemControl, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemControl__ = &__nvoc_up_thunk_Memory_stdmemControl, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memControl__ = &memControl_IMPL, // virtual override (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_Memory_resControl, // virtual + .__vidmemMap__ = &__nvoc_up_thunk_Memory_vidmemMap, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemMap__ = &__nvoc_up_thunk_Memory_stdmemMap, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memMap__ = &memMap_IMPL, // virtual override (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_Memory_resMap, // virtual + .__vidmemUnmap__ = &__nvoc_up_thunk_Memory_vidmemUnmap, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemUnmap__ = &__nvoc_up_thunk_Memory_stdmemUnmap, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memUnmap__ = &memUnmap_IMPL, // virtual override (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_Memory_resUnmap, // virtual + .__vidmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_vidmemGetMemInterMapParams, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_stdmemGetMemInterMapParams, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memGetMemInterMapParams__ = &memGetMemInterMapParams_IMPL, // virtual override (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_Memory_rmresGetMemInterMapParams, // virtual + .__vidmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_vidmemCheckMemInterUnmap, // inline virtual inherited (mem) base (stdmem) body + .StandardMemory.__stdmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_stdmemCheckMemInterUnmap, // inline virtual inherited (mem) base (mem) body + .StandardMemory.Memory.__memCheckMemInterUnmap__ = &memCheckMemInterUnmap_ac1694, // inline virtual override (rmres) base (rmres) body + .StandardMemory.Memory.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_Memory_rmresCheckMemInterUnmap, // virtual + .__vidmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_vidmemGetMemoryMappingDescriptor, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_stdmemGetMemoryMappingDescriptor, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memGetMemoryMappingDescriptor__ = &memGetMemoryMappingDescriptor_IMPL, // virtual override (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor, // virtual + .__vidmemIsReady__ = &__nvoc_up_thunk_Memory_vidmemIsReady, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemIsReady__ = &__nvoc_up_thunk_Memory_stdmemIsReady, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memIsReady__ = &memIsReady_IMPL, // virtual + .__vidmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_vidmemIsGpuMapAllowed, // inline virtual inherited (mem) base (stdmem) body + .StandardMemory.__stdmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_stdmemIsGpuMapAllowed, // inline virtual inherited (mem) base (mem) body + .StandardMemory.Memory.__memIsGpuMapAllowed__ = &memIsGpuMapAllowed_e661f0, // inline virtual body + .__vidmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_vidmemIsExportAllowed, // inline virtual inherited (mem) base (stdmem) body + .StandardMemory.__stdmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_stdmemIsExportAllowed, // inline virtual inherited (mem) base (mem) body + .StandardMemory.Memory.__memIsExportAllowed__ = &memIsExportAllowed_e661f0, // inline virtual body + .__vidmemAccessCallback__ = &__nvoc_up_thunk_RmResource_vidmemAccessCallback, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemAccessCallback__ = &__nvoc_up_thunk_RmResource_stdmemAccessCallback, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memAccessCallback__ = &__nvoc_up_thunk_RmResource_memAccessCallback, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__vidmemShareCallback__ = &__nvoc_up_thunk_RmResource_vidmemShareCallback, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemShareCallback__ = &__nvoc_up_thunk_RmResource_stdmemShareCallback, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memShareCallback__ = &__nvoc_up_thunk_RmResource_memShareCallback, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__vidmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_vidmemControlSerialization_Prologue, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_stdmemControlSerialization_Prologue, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__vidmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_vidmemControlSerialization_Epilogue, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_stdmemControlSerialization_Epilogue, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__vidmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_vidmemControl_Prologue, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_stdmemControl_Prologue, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memControl_Prologue__ = &__nvoc_up_thunk_RmResource_memControl_Prologue, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__vidmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_vidmemControl_Epilogue, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_stdmemControl_Epilogue, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memControl_Epilogue, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__vidmemPreDestruct__ = &__nvoc_up_thunk_RsResource_vidmemPreDestruct, // virtual inherited (res) base (stdmem) + .StandardMemory.__stdmemPreDestruct__ = &__nvoc_up_thunk_RsResource_stdmemPreDestruct, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memPreDestruct__ = &__nvoc_up_thunk_RsResource_memPreDestruct, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__vidmemControlFilter__ = &__nvoc_up_thunk_RsResource_vidmemControlFilter, // virtual inherited (res) base (stdmem) + .StandardMemory.__stdmemControlFilter__ = &__nvoc_up_thunk_RsResource_stdmemControlFilter, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memControlFilter__ = &__nvoc_up_thunk_RsResource_memControlFilter, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__vidmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_vidmemIsPartialUnmapSupported, // inline virtual inherited (res) base (stdmem) body + .StandardMemory.__stdmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_stdmemIsPartialUnmapSupported, // inline virtual inherited (res) base (mem) body + .StandardMemory.Memory.__memIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .StandardMemory.Memory.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .StandardMemory.Memory.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__vidmemMapTo__ = &__nvoc_up_thunk_RsResource_vidmemMapTo, // virtual inherited (res) base (stdmem) + .StandardMemory.__stdmemMapTo__ = &__nvoc_up_thunk_RsResource_stdmemMapTo, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memMapTo__ = &__nvoc_up_thunk_RsResource_memMapTo, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__vidmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_vidmemUnmapFrom, // virtual inherited (res) base (stdmem) + .StandardMemory.__stdmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_stdmemUnmapFrom, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memUnmapFrom__ = &__nvoc_up_thunk_RsResource_memUnmapFrom, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__vidmemGetRefCount__ = &__nvoc_up_thunk_RsResource_vidmemGetRefCount, // virtual inherited (res) base (stdmem) + .StandardMemory.__stdmemGetRefCount__ = &__nvoc_up_thunk_RsResource_stdmemGetRefCount, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memGetRefCount__ = &__nvoc_up_thunk_RsResource_memGetRefCount, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__vidmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_vidmemAddAdditionalDependants, // virtual inherited (res) base (stdmem) + .StandardMemory.__stdmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_stdmemAddAdditionalDependants, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memAddAdditionalDependants, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.StandardMemory.Memory.RmResource.RsResource; // (res) super^4 + pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable = &vtable.StandardMemory.Memory.RmResource; // (rmres) super^3 + pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable = &vtable.StandardMemory.Memory; // (mem) super^2 + pThis->__nvoc_base_StandardMemory.__nvoc_vtable = &vtable.StandardMemory; // (stdmem) super + pThis->__nvoc_vtable = &vtable; // (vidmem) this __nvoc_init_funcTable_VideoMemory_1(pThis); } diff --git a/src/nvidia/generated/g_video_mem_nvoc.h b/src/nvidia/generated/g_video_mem_nvoc.h index 02f63ec7fe..d3387b1f49 100644 --- a/src/nvidia/generated/g_video_mem_nvoc.h +++ b/src/nvidia/generated/g_video_mem_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -71,10 +71,15 @@ typedef struct Device Device; #endif +// Metadata including vtable +struct NVOC_VTABLE__VideoMemory; + + struct VideoMemory { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__VideoMemory *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct StandardMemory __nvoc_base_StandardMemory; @@ -87,8 +92,13 @@ struct VideoMemory { struct Memory *__nvoc_pbase_Memory; // mem super^2 struct StandardMemory *__nvoc_pbase_StandardMemory; // stdmem super struct VideoMemory *__nvoc_pbase_VideoMemory; // vidmem +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__VideoMemory { + const struct NVOC_VTABLE__StandardMemory StandardMemory; // (stdmem) 26 function pointers - // Vtable with 26 per-object function pointers NV_STATUS (*__vidmemCheckCopyPermissions__)(struct VideoMemory * /*this*/, struct OBJGPU *, struct Device *); // virtual override (mem) base (stdmem) NvBool (*__vidmemCanCopy__)(struct VideoMemory * /*this*/); // virtual inherited (stdmem) base (stdmem) NV_STATUS (*__vidmemIsDuplicate__)(struct VideoMemory * /*this*/, NvHandle, NvBool *); // virtual inherited (mem) base (stdmem) @@ -147,162 +157,162 @@ NV_STATUS __nvoc_objCreate_VideoMemory(VideoMemory**, Dynamic*, NvU32, CALL_CONT // Wrapper macros -#define vidmemCheckCopyPermissions_FNPTR(pVideoMemory) pVideoMemory->__vidmemCheckCopyPermissions__ +#define vidmemCheckCopyPermissions_FNPTR(pVideoMemory) pVideoMemory->__nvoc_vtable->__vidmemCheckCopyPermissions__ #define vidmemCheckCopyPermissions(pVideoMemory, pDstGpu, pDstDevice) vidmemCheckCopyPermissions_DISPATCH(pVideoMemory, pDstGpu, pDstDevice) -#define vidmemCanCopy_FNPTR(pStandardMemory) pStandardMemory->__nvoc_base_StandardMemory.__stdmemCanCopy__ +#define vidmemCanCopy_FNPTR(pStandardMemory) pStandardMemory->__nvoc_base_StandardMemory.__nvoc_vtable->__stdmemCanCopy__ #define vidmemCanCopy(pStandardMemory) vidmemCanCopy_DISPATCH(pStandardMemory) -#define vidmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsDuplicate__ +#define vidmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memIsDuplicate__ #define vidmemIsDuplicate(pMemory, hMemory, pDuplicate) vidmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define vidmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMapAddrSpace__ +#define vidmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memGetMapAddrSpace__ #define vidmemGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) vidmemGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define vidmemControl_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memControl__ +#define vidmemControl_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memControl__ #define vidmemControl(pMemory, pCallContext, pParams) vidmemControl_DISPATCH(pMemory, pCallContext, pParams) -#define vidmemMap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memMap__ +#define vidmemMap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memMap__ #define vidmemMap(pMemory, pCallContext, pParams, pCpuMapping) vidmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define vidmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memUnmap__ +#define vidmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memUnmap__ #define vidmemUnmap(pMemory, pCallContext, pCpuMapping) vidmemUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define vidmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMemInterMapParams__ +#define vidmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memGetMemInterMapParams__ #define vidmemGetMemInterMapParams(pMemory, pParams) vidmemGetMemInterMapParams_DISPATCH(pMemory, pParams) -#define vidmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define vidmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memCheckMemInterUnmap__ #define vidmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) vidmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define vidmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ +#define vidmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memGetMemoryMappingDescriptor__ #define vidmemGetMemoryMappingDescriptor(pMemory, ppMemDesc) vidmemGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define vidmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsReady__ +#define vidmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memIsReady__ #define vidmemIsReady(pMemory, bCopyConstructorContext) vidmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) -#define vidmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define vidmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memIsGpuMapAllowed__ #define vidmemIsGpuMapAllowed(pMemory, pGpu) vidmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define vidmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsExportAllowed__ +#define vidmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memIsExportAllowed__ #define vidmemIsExportAllowed(pMemory) vidmemIsExportAllowed_DISPATCH(pMemory) -#define vidmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define vidmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define vidmemAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) vidmemAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define vidmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define vidmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define vidmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) vidmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define vidmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define vidmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define vidmemControlSerialization_Prologue(pResource, pCallContext, pParams) vidmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define vidmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define vidmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define vidmemControlSerialization_Epilogue(pResource, pCallContext, pParams) vidmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define vidmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define vidmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define vidmemControl_Prologue(pResource, pCallContext, pParams) vidmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define vidmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define vidmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define vidmemControl_Epilogue(pResource, pCallContext, pParams) vidmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define vidmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define vidmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define vidmemPreDestruct(pResource) vidmemPreDestruct_DISPATCH(pResource) -#define vidmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define vidmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define vidmemControlFilter(pResource, pCallContext, pParams) vidmemControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define vidmemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define vidmemIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define vidmemIsPartialUnmapSupported(pResource) vidmemIsPartialUnmapSupported_DISPATCH(pResource) -#define vidmemMapTo_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define vidmemMapTo_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define vidmemMapTo(pResource, pParams) vidmemMapTo_DISPATCH(pResource, pParams) -#define vidmemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define vidmemUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define vidmemUnmapFrom(pResource, pParams) vidmemUnmapFrom_DISPATCH(pResource, pParams) -#define vidmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define vidmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define vidmemGetRefCount(pResource) vidmemGetRefCount_DISPATCH(pResource) -#define vidmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define vidmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define vidmemAddAdditionalDependants(pClient, pResource, pReference) vidmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NV_STATUS vidmemCheckCopyPermissions_DISPATCH(struct VideoMemory *pVideoMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pVideoMemory->__vidmemCheckCopyPermissions__(pVideoMemory, pDstGpu, pDstDevice); + return pVideoMemory->__nvoc_vtable->__vidmemCheckCopyPermissions__(pVideoMemory, pDstGpu, pDstDevice); } static inline NvBool vidmemCanCopy_DISPATCH(struct VideoMemory *pStandardMemory) { - return pStandardMemory->__vidmemCanCopy__(pStandardMemory); + return pStandardMemory->__nvoc_vtable->__vidmemCanCopy__(pStandardMemory); } static inline NV_STATUS vidmemIsDuplicate_DISPATCH(struct VideoMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__vidmemIsDuplicate__(pMemory, hMemory, pDuplicate); + return pMemory->__nvoc_vtable->__vidmemIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS vidmemGetMapAddrSpace_DISPATCH(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pMemory->__vidmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); + return pMemory->__nvoc_vtable->__vidmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS vidmemControl_DISPATCH(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__vidmemControl__(pMemory, pCallContext, pParams); + return pMemory->__nvoc_vtable->__vidmemControl__(pMemory, pCallContext, pParams); } static inline NV_STATUS vidmemMap_DISPATCH(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__vidmemMap__(pMemory, pCallContext, pParams, pCpuMapping); + return pMemory->__nvoc_vtable->__vidmemMap__(pMemory, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS vidmemUnmap_DISPATCH(struct VideoMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__vidmemUnmap__(pMemory, pCallContext, pCpuMapping); + return pMemory->__nvoc_vtable->__vidmemUnmap__(pMemory, pCallContext, pCpuMapping); } static inline NV_STATUS vidmemGetMemInterMapParams_DISPATCH(struct VideoMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__vidmemGetMemInterMapParams__(pMemory, pParams); + return pMemory->__nvoc_vtable->__vidmemGetMemInterMapParams__(pMemory, pParams); } static inline NV_STATUS vidmemCheckMemInterUnmap_DISPATCH(struct VideoMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__vidmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); + return pMemory->__nvoc_vtable->__vidmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } static inline NV_STATUS vidmemGetMemoryMappingDescriptor_DISPATCH(struct VideoMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__vidmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); + return pMemory->__nvoc_vtable->__vidmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } static inline NV_STATUS vidmemIsReady_DISPATCH(struct VideoMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__vidmemIsReady__(pMemory, bCopyConstructorContext); + return pMemory->__nvoc_vtable->__vidmemIsReady__(pMemory, bCopyConstructorContext); } static inline NvBool vidmemIsGpuMapAllowed_DISPATCH(struct VideoMemory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__vidmemIsGpuMapAllowed__(pMemory, pGpu); + return pMemory->__nvoc_vtable->__vidmemIsGpuMapAllowed__(pMemory, pGpu); } static inline NvBool vidmemIsExportAllowed_DISPATCH(struct VideoMemory *pMemory) { - return pMemory->__vidmemIsExportAllowed__(pMemory); + return pMemory->__nvoc_vtable->__vidmemIsExportAllowed__(pMemory); } static inline NvBool vidmemAccessCallback_DISPATCH(struct VideoMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__vidmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__vidmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool vidmemShareCallback_DISPATCH(struct VideoMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__vidmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__vidmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS vidmemControlSerialization_Prologue_DISPATCH(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vidmemControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__vidmemControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void vidmemControlSerialization_Epilogue_DISPATCH(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vidmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__vidmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS vidmemControl_Prologue_DISPATCH(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vidmemControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__vidmemControl_Prologue__(pResource, pCallContext, pParams); } static inline void vidmemControl_Epilogue_DISPATCH(struct VideoMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vidmemControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__vidmemControl_Epilogue__(pResource, pCallContext, pParams); } static inline void vidmemPreDestruct_DISPATCH(struct VideoMemory *pResource) { - pResource->__vidmemPreDestruct__(pResource); + pResource->__nvoc_vtable->__vidmemPreDestruct__(pResource); } static inline NV_STATUS vidmemControlFilter_DISPATCH(struct VideoMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vidmemControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__vidmemControlFilter__(pResource, pCallContext, pParams); } static inline NvBool vidmemIsPartialUnmapSupported_DISPATCH(struct VideoMemory *pResource) { - return pResource->__vidmemIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__vidmemIsPartialUnmapSupported__(pResource); } static inline NV_STATUS vidmemMapTo_DISPATCH(struct VideoMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__vidmemMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__vidmemMapTo__(pResource, pParams); } static inline NV_STATUS vidmemUnmapFrom_DISPATCH(struct VideoMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__vidmemUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__vidmemUnmapFrom__(pResource, pParams); } static inline NvU32 vidmemGetRefCount_DISPATCH(struct VideoMemory *pResource) { - return pResource->__vidmemGetRefCount__(pResource); + return pResource->__nvoc_vtable->__vidmemGetRefCount__(pResource); } static inline void vidmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VideoMemory *pResource, RsResourceRef *pReference) { - pResource->__vidmemAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__vidmemAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS vidmemCheckCopyPermissions_IMPL(struct VideoMemory *pVideoMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); diff --git a/src/nvidia/generated/g_videoeventlist_nvoc.h b/src/nvidia/generated/g_videoeventlist_nvoc.h index d52223a7d6..23d07adb42 100644 --- a/src/nvidia/generated/g_videoeventlist_nvoc.h +++ b/src/nvidia/generated/g_videoeventlist_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_vidmem_access_bit_buffer_nvoc.c b/src/nvidia/generated/g_vidmem_access_bit_buffer_nvoc.c index 43f007ceca..7ab994edb8 100644 --- a/src/nvidia/generated/g_vidmem_access_bit_buffer_nvoc.c +++ b/src/nvidia/generated/g_vidmem_access_bit_buffer_nvoc.c @@ -118,12 +118,12 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_VidmemAccessBitBuffer = static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VidmemAccessBitBuffer[] = { { /* [0] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x16040u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) vidmemAccessBitBufCtrlCmdVidmemAccessBitDump_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x16040u) - /*flags=*/ 0x16040u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) + /*flags=*/ 0x48u, /*accessRight=*/0x0u, /*methodId=*/ 0xc7630103u, /*paramSize=*/ sizeof(NVC763_CTRL_VIDMEM_ACCESS_BIT_BUFFER_DUMP_PARAMS), @@ -135,155 +135,233 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_VidmemAc }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +PEVENTNOTIFICATION * __nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr(struct INotifier *pNotifier); // super +struct NotifShare * __nvoc_down_thunk_Notifier_inotifyGetNotificationShare(struct INotifier *pNotifier); // super +void __nvoc_down_thunk_Notifier_inotifySetNotificationShare(struct INotifier *pNotifier, struct NotifShare *pNotifShare); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyUnregisterEvent(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // super +NV_STATUS __nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare(struct INotifier *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufControl(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufMap(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufUnmap(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_vidmemAccessBitBufShareCallback(struct VidmemAccessBitBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufGetRegBaseOffsetAndSize(struct VidmemAccessBitBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufGetMapAddrSpace(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufInternalControlForward(struct VidmemAccessBitBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_vidmemAccessBitBufGetInternalObjectHandle(struct VidmemAccessBitBuffer *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_vidmemAccessBitBufAccessCallback(struct VidmemAccessBitBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_vidmemAccessBitBufGetMemInterMapParams(struct VidmemAccessBitBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_vidmemAccessBitBufCheckMemInterUnmap(struct VidmemAccessBitBuffer *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_vidmemAccessBitBufGetMemoryMappingDescriptor(struct VidmemAccessBitBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_vidmemAccessBitBufControlSerialization_Prologue(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_vidmemAccessBitBufControlSerialization_Epilogue(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_vidmemAccessBitBufControl_Prologue(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_vidmemAccessBitBufControl_Epilogue(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_vidmemAccessBitBufCanCopy(struct VidmemAccessBitBuffer *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_vidmemAccessBitBufIsDuplicate(struct VidmemAccessBitBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_vidmemAccessBitBufPreDestruct(struct VidmemAccessBitBuffer *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_vidmemAccessBitBufControlFilter(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_vidmemAccessBitBufIsPartialUnmapSupported(struct VidmemAccessBitBuffer *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_vidmemAccessBitBufMapTo(struct VidmemAccessBitBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_vidmemAccessBitBufUnmapFrom(struct VidmemAccessBitBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_vidmemAccessBitBufGetRefCount(struct VidmemAccessBitBuffer *pResource); // this +void __nvoc_up_thunk_RsResource_vidmemAccessBitBufAddAdditionalDependants(struct RsClient *pClient, struct VidmemAccessBitBuffer *pResource, RsResourceRef *pReference); // this +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_vidmemAccessBitBufGetNotificationListPtr(struct VidmemAccessBitBuffer *pNotifier); // this +struct NotifShare * __nvoc_up_thunk_Notifier_vidmemAccessBitBufGetNotificationShare(struct VidmemAccessBitBuffer *pNotifier); // this +void __nvoc_up_thunk_Notifier_vidmemAccessBitBufSetNotificationShare(struct VidmemAccessBitBuffer *pNotifier, struct NotifShare *pNotifShare); // this +NV_STATUS __nvoc_up_thunk_Notifier_vidmemAccessBitBufUnregisterEvent(struct VidmemAccessBitBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent); // this +NV_STATUS __nvoc_up_thunk_Notifier_vidmemAccessBitBufGetOrAllocNotifShare(struct VidmemAccessBitBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare); // this + // 30 up-thunk(s) defined to bridge methods in VidmemAccessBitBuffer to superclasses // vidmemAccessBitBufControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufControl(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufControl(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset), pCallContext, pParams); } // vidmemAccessBitBufMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufMap(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufMap(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // vidmemAccessBitBufUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufUnmap(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufUnmap(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset), pCallContext, pCpuMapping); } // vidmemAccessBitBufShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_vidmemAccessBitBufShareCallback(struct VidmemAccessBitBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_vidmemAccessBitBufShareCallback(struct VidmemAccessBitBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // vidmemAccessBitBufGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufGetRegBaseOffsetAndSize(struct VidmemAccessBitBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufGetRegBaseOffsetAndSize(struct VidmemAccessBitBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset), pGpu, pOffset, pSize); } // vidmemAccessBitBufGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufGetMapAddrSpace(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufGetMapAddrSpace(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // vidmemAccessBitBufInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufInternalControlForward(struct VidmemAccessBitBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_vidmemAccessBitBufInternalControlForward(struct VidmemAccessBitBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset), command, pParams, size); } // vidmemAccessBitBufGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_vidmemAccessBitBufGetInternalObjectHandle(struct VidmemAccessBitBuffer *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_vidmemAccessBitBufGetInternalObjectHandle(struct VidmemAccessBitBuffer *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_VidmemAccessBitBuffer_GpuResource.offset)); } // vidmemAccessBitBufAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_vidmemAccessBitBufAccessCallback(struct VidmemAccessBitBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_vidmemAccessBitBufAccessCallback(struct VidmemAccessBitBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // vidmemAccessBitBufGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vidmemAccessBitBufGetMemInterMapParams(struct VidmemAccessBitBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_vidmemAccessBitBufGetMemInterMapParams(struct VidmemAccessBitBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), pParams); } // vidmemAccessBitBufCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vidmemAccessBitBufCheckMemInterUnmap(struct VidmemAccessBitBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_vidmemAccessBitBufCheckMemInterUnmap(struct VidmemAccessBitBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), bSubdeviceHandleProvided); } // vidmemAccessBitBufGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vidmemAccessBitBufGetMemoryMappingDescriptor(struct VidmemAccessBitBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_vidmemAccessBitBufGetMemoryMappingDescriptor(struct VidmemAccessBitBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), ppMemDesc); } // vidmemAccessBitBufControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vidmemAccessBitBufControlSerialization_Prologue(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_vidmemAccessBitBufControlSerialization_Prologue(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), pCallContext, pParams); } // vidmemAccessBitBufControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_vidmemAccessBitBufControlSerialization_Epilogue(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_vidmemAccessBitBufControlSerialization_Epilogue(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), pCallContext, pParams); } // vidmemAccessBitBufControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_vidmemAccessBitBufControl_Prologue(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_vidmemAccessBitBufControl_Prologue(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), pCallContext, pParams); } // vidmemAccessBitBufControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_vidmemAccessBitBufControl_Epilogue(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_vidmemAccessBitBufControl_Epilogue(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RmResource.offset), pCallContext, pParams); } // vidmemAccessBitBufCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_vidmemAccessBitBufCanCopy(struct VidmemAccessBitBuffer *pResource) { +NvBool __nvoc_up_thunk_RsResource_vidmemAccessBitBufCanCopy(struct VidmemAccessBitBuffer *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset)); } // vidmemAccessBitBufIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_vidmemAccessBitBufIsDuplicate(struct VidmemAccessBitBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_vidmemAccessBitBufIsDuplicate(struct VidmemAccessBitBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset), hMemory, pDuplicate); } // vidmemAccessBitBufPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_vidmemAccessBitBufPreDestruct(struct VidmemAccessBitBuffer *pResource) { +void __nvoc_up_thunk_RsResource_vidmemAccessBitBufPreDestruct(struct VidmemAccessBitBuffer *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset)); } // vidmemAccessBitBufControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_vidmemAccessBitBufControlFilter(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_vidmemAccessBitBufControlFilter(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset), pCallContext, pParams); } // vidmemAccessBitBufIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_vidmemAccessBitBufIsPartialUnmapSupported(struct VidmemAccessBitBuffer *pResource) { +NvBool __nvoc_up_thunk_RsResource_vidmemAccessBitBufIsPartialUnmapSupported(struct VidmemAccessBitBuffer *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset)); } // vidmemAccessBitBufMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_vidmemAccessBitBufMapTo(struct VidmemAccessBitBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_vidmemAccessBitBufMapTo(struct VidmemAccessBitBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset), pParams); } // vidmemAccessBitBufUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_vidmemAccessBitBufUnmapFrom(struct VidmemAccessBitBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_vidmemAccessBitBufUnmapFrom(struct VidmemAccessBitBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset), pParams); } // vidmemAccessBitBufGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_vidmemAccessBitBufGetRefCount(struct VidmemAccessBitBuffer *pResource) { +NvU32 __nvoc_up_thunk_RsResource_vidmemAccessBitBufGetRefCount(struct VidmemAccessBitBuffer *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset)); } // vidmemAccessBitBufAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_vidmemAccessBitBufAddAdditionalDependants(struct RsClient *pClient, struct VidmemAccessBitBuffer *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_vidmemAccessBitBufAddAdditionalDependants(struct RsClient *pClient, struct VidmemAccessBitBuffer *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VidmemAccessBitBuffer_RsResource.offset), pReference); } // vidmemAccessBitBufGetNotificationListPtr: virtual inherited (notify) base (notify) -static PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_vidmemAccessBitBufGetNotificationListPtr(struct VidmemAccessBitBuffer *pNotifier) { +PEVENTNOTIFICATION * __nvoc_up_thunk_Notifier_vidmemAccessBitBufGetNotificationListPtr(struct VidmemAccessBitBuffer *pNotifier) { return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_VidmemAccessBitBuffer_Notifier.offset)); } // vidmemAccessBitBufGetNotificationShare: virtual inherited (notify) base (notify) -static struct NotifShare * __nvoc_up_thunk_Notifier_vidmemAccessBitBufGetNotificationShare(struct VidmemAccessBitBuffer *pNotifier) { +struct NotifShare * __nvoc_up_thunk_Notifier_vidmemAccessBitBufGetNotificationShare(struct VidmemAccessBitBuffer *pNotifier) { return notifyGetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_VidmemAccessBitBuffer_Notifier.offset)); } // vidmemAccessBitBufSetNotificationShare: virtual inherited (notify) base (notify) -static void __nvoc_up_thunk_Notifier_vidmemAccessBitBufSetNotificationShare(struct VidmemAccessBitBuffer *pNotifier, struct NotifShare *pNotifShare) { +void __nvoc_up_thunk_Notifier_vidmemAccessBitBufSetNotificationShare(struct VidmemAccessBitBuffer *pNotifier, struct NotifShare *pNotifShare) { notifySetNotificationShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_VidmemAccessBitBuffer_Notifier.offset), pNotifShare); } // vidmemAccessBitBufUnregisterEvent: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_vidmemAccessBitBufUnregisterEvent(struct VidmemAccessBitBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { +NV_STATUS __nvoc_up_thunk_Notifier_vidmemAccessBitBufUnregisterEvent(struct VidmemAccessBitBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { return notifyUnregisterEvent((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_VidmemAccessBitBuffer_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent); } // vidmemAccessBitBufGetOrAllocNotifShare: virtual inherited (notify) base (notify) -static NV_STATUS __nvoc_up_thunk_Notifier_vidmemAccessBitBufGetOrAllocNotifShare(struct VidmemAccessBitBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { +NV_STATUS __nvoc_up_thunk_Notifier_vidmemAccessBitBufGetOrAllocNotifShare(struct VidmemAccessBitBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *) pNotifier) + __nvoc_rtti_VidmemAccessBitBuffer_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare); } @@ -346,106 +424,134 @@ static void __nvoc_init_funcTable_VidmemAccessBitBuffer_1(VidmemAccessBitBuffer PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); // vidmemAccessBitBufCtrlCmdVidmemAccessBitDump -- exported (id=0xc7630103) -#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x16040u) +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) pThis->__vidmemAccessBitBufCtrlCmdVidmemAccessBitDump__ = &vidmemAccessBitBufCtrlCmdVidmemAccessBitDump_IMPL; #endif - - // vidmemAccessBitBufControl -- virtual inherited (gpures) base (gpures) - pThis->__vidmemAccessBitBufControl__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufControl; - - // vidmemAccessBitBufMap -- virtual inherited (gpures) base (gpures) - pThis->__vidmemAccessBitBufMap__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufMap; - - // vidmemAccessBitBufUnmap -- virtual inherited (gpures) base (gpures) - pThis->__vidmemAccessBitBufUnmap__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufUnmap; - - // vidmemAccessBitBufShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__vidmemAccessBitBufShareCallback__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufShareCallback; - - // vidmemAccessBitBufGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__vidmemAccessBitBufGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufGetRegBaseOffsetAndSize; - - // vidmemAccessBitBufGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__vidmemAccessBitBufGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufGetMapAddrSpace; - - // vidmemAccessBitBufInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__vidmemAccessBitBufInternalControlForward__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufInternalControlForward; - - // vidmemAccessBitBufGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__vidmemAccessBitBufGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufGetInternalObjectHandle; - - // vidmemAccessBitBufAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__vidmemAccessBitBufAccessCallback__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufAccessCallback; - - // vidmemAccessBitBufGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__vidmemAccessBitBufGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufGetMemInterMapParams; - - // vidmemAccessBitBufCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__vidmemAccessBitBufCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufCheckMemInterUnmap; - - // vidmemAccessBitBufGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__vidmemAccessBitBufGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufGetMemoryMappingDescriptor; - - // vidmemAccessBitBufControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__vidmemAccessBitBufControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufControlSerialization_Prologue; - - // vidmemAccessBitBufControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__vidmemAccessBitBufControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufControlSerialization_Epilogue; - - // vidmemAccessBitBufControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__vidmemAccessBitBufControl_Prologue__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufControl_Prologue; - - // vidmemAccessBitBufControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__vidmemAccessBitBufControl_Epilogue__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufControl_Epilogue; - - // vidmemAccessBitBufCanCopy -- virtual inherited (res) base (gpures) - pThis->__vidmemAccessBitBufCanCopy__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufCanCopy; - - // vidmemAccessBitBufIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__vidmemAccessBitBufIsDuplicate__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufIsDuplicate; - - // vidmemAccessBitBufPreDestruct -- virtual inherited (res) base (gpures) - pThis->__vidmemAccessBitBufPreDestruct__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufPreDestruct; - - // vidmemAccessBitBufControlFilter -- virtual inherited (res) base (gpures) - pThis->__vidmemAccessBitBufControlFilter__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufControlFilter; - - // vidmemAccessBitBufIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__vidmemAccessBitBufIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufIsPartialUnmapSupported; - - // vidmemAccessBitBufMapTo -- virtual inherited (res) base (gpures) - pThis->__vidmemAccessBitBufMapTo__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufMapTo; - - // vidmemAccessBitBufUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__vidmemAccessBitBufUnmapFrom__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufUnmapFrom; - - // vidmemAccessBitBufGetRefCount -- virtual inherited (res) base (gpures) - pThis->__vidmemAccessBitBufGetRefCount__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufGetRefCount; - - // vidmemAccessBitBufAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__vidmemAccessBitBufAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufAddAdditionalDependants; - - // vidmemAccessBitBufGetNotificationListPtr -- virtual inherited (notify) base (notify) - pThis->__vidmemAccessBitBufGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_vidmemAccessBitBufGetNotificationListPtr; - - // vidmemAccessBitBufGetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__vidmemAccessBitBufGetNotificationShare__ = &__nvoc_up_thunk_Notifier_vidmemAccessBitBufGetNotificationShare; - - // vidmemAccessBitBufSetNotificationShare -- virtual inherited (notify) base (notify) - pThis->__vidmemAccessBitBufSetNotificationShare__ = &__nvoc_up_thunk_Notifier_vidmemAccessBitBufSetNotificationShare; - - // vidmemAccessBitBufUnregisterEvent -- virtual inherited (notify) base (notify) - pThis->__vidmemAccessBitBufUnregisterEvent__ = &__nvoc_up_thunk_Notifier_vidmemAccessBitBufUnregisterEvent; - - // vidmemAccessBitBufGetOrAllocNotifShare -- virtual inherited (notify) base (notify) - pThis->__vidmemAccessBitBufGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_vidmemAccessBitBufGetOrAllocNotifShare; -} // End __nvoc_init_funcTable_VidmemAccessBitBuffer_1 with approximately 31 basic block(s). +} // End __nvoc_init_funcTable_VidmemAccessBitBuffer_1 with approximately 1 basic block(s). // Initialize vtable(s) for 31 virtual method(s). void __nvoc_init_funcTable_VidmemAccessBitBuffer(VidmemAccessBitBuffer *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 31 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__VidmemAccessBitBuffer vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif + .__vidmemAccessBitBufControl__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__vidmemAccessBitBufMap__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__vidmemAccessBitBufUnmap__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__vidmemAccessBitBufShareCallback__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__vidmemAccessBitBufGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__vidmemAccessBitBufGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__vidmemAccessBitBufInternalControlForward__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__vidmemAccessBitBufGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_vidmemAccessBitBufGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__vidmemAccessBitBufAccessCallback__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__vidmemAccessBitBufGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__vidmemAccessBitBufCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__vidmemAccessBitBufGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__vidmemAccessBitBufControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__vidmemAccessBitBufControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__vidmemAccessBitBufControl_Prologue__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__vidmemAccessBitBufControl_Epilogue__ = &__nvoc_up_thunk_RmResource_vidmemAccessBitBufControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__vidmemAccessBitBufCanCopy__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__vidmemAccessBitBufIsDuplicate__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__vidmemAccessBitBufPreDestruct__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__vidmemAccessBitBufControlFilter__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__vidmemAccessBitBufIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__vidmemAccessBitBufMapTo__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__vidmemAccessBitBufUnmapFrom__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__vidmemAccessBitBufGetRefCount__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__vidmemAccessBitBufAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_vidmemAccessBitBufAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + .__vidmemAccessBitBufGetNotificationListPtr__ = &__nvoc_up_thunk_Notifier_vidmemAccessBitBufGetNotificationListPtr, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationListPtr__ = ¬ifyGetNotificationListPtr_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationListPtr__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationListPtr, // pure virtual + .__vidmemAccessBitBufGetNotificationShare__ = &__nvoc_up_thunk_Notifier_vidmemAccessBitBufGetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetNotificationShare__ = ¬ifyGetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifyGetNotificationShare, // pure virtual + .__vidmemAccessBitBufSetNotificationShare__ = &__nvoc_up_thunk_Notifier_vidmemAccessBitBufSetNotificationShare, // virtual inherited (notify) base (notify) + .Notifier.__notifySetNotificationShare__ = ¬ifySetNotificationShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifySetNotificationShare__ = &__nvoc_down_thunk_Notifier_inotifySetNotificationShare, // pure virtual + .__vidmemAccessBitBufUnregisterEvent__ = &__nvoc_up_thunk_Notifier_vidmemAccessBitBufUnregisterEvent, // virtual inherited (notify) base (notify) + .Notifier.__notifyUnregisterEvent__ = ¬ifyUnregisterEvent_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyUnregisterEvent__ = &__nvoc_down_thunk_Notifier_inotifyUnregisterEvent, // pure virtual + .__vidmemAccessBitBufGetOrAllocNotifShare__ = &__nvoc_up_thunk_Notifier_vidmemAccessBitBufGetOrAllocNotifShare, // virtual inherited (notify) base (notify) + .Notifier.__notifyGetOrAllocNotifShare__ = ¬ifyGetOrAllocNotifShare_IMPL, // virtual override (inotify) base (inotify) + .Notifier.INotifier.__inotifyGetOrAllocNotifShare__ = &__nvoc_down_thunk_Notifier_inotifyGetOrAllocNotifShare, // pure virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_base_Notifier.__nvoc_base_INotifier.__nvoc_vtable = &vtable.Notifier.INotifier; // (inotify) super^2 + pThis->__nvoc_base_Notifier.__nvoc_vtable = &vtable.Notifier; // (notify) super + pThis->__nvoc_vtable = &vtable; // (vidmemAccessBitBuf) this + + // Initialize vtable(s) with 1 per-object function pointer(s). __nvoc_init_funcTable_VidmemAccessBitBuffer_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_vidmem_access_bit_buffer_nvoc.h b/src/nvidia/generated/g_vidmem_access_bit_buffer_nvoc.h index 575c7b2177..f96e7a3f1f 100644 --- a/src/nvidia/generated/g_vidmem_access_bit_buffer_nvoc.h +++ b/src/nvidia/generated/g_vidmem_access_bit_buffer_nvoc.h @@ -7,14 +7,14 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { #endif /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -95,10 +95,15 @@ typedef struct #endif +// Metadata including vtable +struct NVOC_VTABLE__VidmemAccessBitBuffer; + + struct VidmemAccessBitBuffer { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__VidmemAccessBitBuffer *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -114,8 +119,16 @@ struct VidmemAccessBitBuffer { struct Notifier *__nvoc_pbase_Notifier; // notify super struct VidmemAccessBitBuffer *__nvoc_pbase_VidmemAccessBitBuffer; // vidmemAccessBitBuf - // Vtable with 31 per-object function pointers + // Vtable with 1 per-object function pointer NV_STATUS (*__vidmemAccessBitBufCtrlCmdVidmemAccessBitDump__)(struct VidmemAccessBitBuffer * /*this*/, NVC763_CTRL_VIDMEM_ACCESS_BIT_BUFFER_DUMP_PARAMS *); // exported (id=0xc7630103) +}; + + +// Metadata including vtable with 30 function pointers plus superclass metadata +struct NVOC_VTABLE__VidmemAccessBitBuffer { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + const struct NVOC_VTABLE__Notifier Notifier; // (notify) 5 function pointers + NV_STATUS (*__vidmemAccessBitBufControl__)(struct VidmemAccessBitBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__vidmemAccessBitBufMap__)(struct VidmemAccessBitBuffer * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__vidmemAccessBitBufUnmap__)(struct VidmemAccessBitBuffer * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -180,65 +193,65 @@ NV_STATUS __nvoc_objCreate_VidmemAccessBitBuffer(VidmemAccessBitBuffer**, Dynami // Wrapper macros #define vidmemAccessBitBufCtrlCmdVidmemAccessBitDump_FNPTR(pVidmemAccessBitBuffer) pVidmemAccessBitBuffer->__vidmemAccessBitBufCtrlCmdVidmemAccessBitDump__ #define vidmemAccessBitBufCtrlCmdVidmemAccessBitDump(pVidmemAccessBitBuffer, pParams) vidmemAccessBitBufCtrlCmdVidmemAccessBitDump_DISPATCH(pVidmemAccessBitBuffer, pParams) -#define vidmemAccessBitBufControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define vidmemAccessBitBufControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define vidmemAccessBitBufControl(pGpuResource, pCallContext, pParams) vidmemAccessBitBufControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define vidmemAccessBitBufMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define vidmemAccessBitBufMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define vidmemAccessBitBufMap(pGpuResource, pCallContext, pParams, pCpuMapping) vidmemAccessBitBufMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define vidmemAccessBitBufUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define vidmemAccessBitBufUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define vidmemAccessBitBufUnmap(pGpuResource, pCallContext, pCpuMapping) vidmemAccessBitBufUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define vidmemAccessBitBufShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define vidmemAccessBitBufShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define vidmemAccessBitBufShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) vidmemAccessBitBufShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define vidmemAccessBitBufGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define vidmemAccessBitBufGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define vidmemAccessBitBufGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) vidmemAccessBitBufGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define vidmemAccessBitBufGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define vidmemAccessBitBufGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define vidmemAccessBitBufGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) vidmemAccessBitBufGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define vidmemAccessBitBufInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define vidmemAccessBitBufInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define vidmemAccessBitBufInternalControlForward(pGpuResource, command, pParams, size) vidmemAccessBitBufInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define vidmemAccessBitBufGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define vidmemAccessBitBufGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define vidmemAccessBitBufGetInternalObjectHandle(pGpuResource) vidmemAccessBitBufGetInternalObjectHandle_DISPATCH(pGpuResource) -#define vidmemAccessBitBufAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define vidmemAccessBitBufAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define vidmemAccessBitBufAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) vidmemAccessBitBufAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define vidmemAccessBitBufGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define vidmemAccessBitBufGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define vidmemAccessBitBufGetMemInterMapParams(pRmResource, pParams) vidmemAccessBitBufGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define vidmemAccessBitBufCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define vidmemAccessBitBufCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define vidmemAccessBitBufCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) vidmemAccessBitBufCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define vidmemAccessBitBufGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define vidmemAccessBitBufGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define vidmemAccessBitBufGetMemoryMappingDescriptor(pRmResource, ppMemDesc) vidmemAccessBitBufGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define vidmemAccessBitBufControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define vidmemAccessBitBufControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define vidmemAccessBitBufControlSerialization_Prologue(pResource, pCallContext, pParams) vidmemAccessBitBufControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define vidmemAccessBitBufControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define vidmemAccessBitBufControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define vidmemAccessBitBufControlSerialization_Epilogue(pResource, pCallContext, pParams) vidmemAccessBitBufControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define vidmemAccessBitBufControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define vidmemAccessBitBufControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define vidmemAccessBitBufControl_Prologue(pResource, pCallContext, pParams) vidmemAccessBitBufControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define vidmemAccessBitBufControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define vidmemAccessBitBufControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define vidmemAccessBitBufControl_Epilogue(pResource, pCallContext, pParams) vidmemAccessBitBufControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define vidmemAccessBitBufCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define vidmemAccessBitBufCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define vidmemAccessBitBufCanCopy(pResource) vidmemAccessBitBufCanCopy_DISPATCH(pResource) -#define vidmemAccessBitBufIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define vidmemAccessBitBufIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define vidmemAccessBitBufIsDuplicate(pResource, hMemory, pDuplicate) vidmemAccessBitBufIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define vidmemAccessBitBufPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define vidmemAccessBitBufPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define vidmemAccessBitBufPreDestruct(pResource) vidmemAccessBitBufPreDestruct_DISPATCH(pResource) -#define vidmemAccessBitBufControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define vidmemAccessBitBufControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define vidmemAccessBitBufControlFilter(pResource, pCallContext, pParams) vidmemAccessBitBufControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define vidmemAccessBitBufIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define vidmemAccessBitBufIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define vidmemAccessBitBufIsPartialUnmapSupported(pResource) vidmemAccessBitBufIsPartialUnmapSupported_DISPATCH(pResource) -#define vidmemAccessBitBufMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define vidmemAccessBitBufMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define vidmemAccessBitBufMapTo(pResource, pParams) vidmemAccessBitBufMapTo_DISPATCH(pResource, pParams) -#define vidmemAccessBitBufUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define vidmemAccessBitBufUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define vidmemAccessBitBufUnmapFrom(pResource, pParams) vidmemAccessBitBufUnmapFrom_DISPATCH(pResource, pParams) -#define vidmemAccessBitBufGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define vidmemAccessBitBufGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define vidmemAccessBitBufGetRefCount(pResource) vidmemAccessBitBufGetRefCount_DISPATCH(pResource) -#define vidmemAccessBitBufAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define vidmemAccessBitBufAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define vidmemAccessBitBufAddAdditionalDependants(pClient, pResource, pReference) vidmemAccessBitBufAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) -#define vidmemAccessBitBufGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationListPtr__ +#define vidmemAccessBitBufGetNotificationListPtr_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationListPtr__ #define vidmemAccessBitBufGetNotificationListPtr(pNotifier) vidmemAccessBitBufGetNotificationListPtr_DISPATCH(pNotifier) -#define vidmemAccessBitBufGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetNotificationShare__ +#define vidmemAccessBitBufGetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetNotificationShare__ #define vidmemAccessBitBufGetNotificationShare(pNotifier) vidmemAccessBitBufGetNotificationShare_DISPATCH(pNotifier) -#define vidmemAccessBitBufSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifySetNotificationShare__ +#define vidmemAccessBitBufSetNotificationShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifySetNotificationShare__ #define vidmemAccessBitBufSetNotificationShare(pNotifier, pNotifShare) vidmemAccessBitBufSetNotificationShare_DISPATCH(pNotifier, pNotifShare) -#define vidmemAccessBitBufUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyUnregisterEvent__ +#define vidmemAccessBitBufUnregisterEvent_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyUnregisterEvent__ #define vidmemAccessBitBufUnregisterEvent(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) vidmemAccessBitBufUnregisterEvent_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent) -#define vidmemAccessBitBufGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__notifyGetOrAllocNotifShare__ +#define vidmemAccessBitBufGetOrAllocNotifShare_FNPTR(pNotifier) pNotifier->__nvoc_base_Notifier.__nvoc_vtable->__notifyGetOrAllocNotifShare__ #define vidmemAccessBitBufGetOrAllocNotifShare(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) vidmemAccessBitBufGetOrAllocNotifShare_DISPATCH(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare) // Dispatch functions @@ -247,126 +260,128 @@ static inline NV_STATUS vidmemAccessBitBufCtrlCmdVidmemAccessBitDump_DISPATCH(st } static inline NV_STATUS vidmemAccessBitBufControl_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__vidmemAccessBitBufControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__vidmemAccessBitBufControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS vidmemAccessBitBufMap_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__vidmemAccessBitBufMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__vidmemAccessBitBufMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS vidmemAccessBitBufUnmap_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__vidmemAccessBitBufUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__vidmemAccessBitBufUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool vidmemAccessBitBufShareCallback_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__vidmemAccessBitBufShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__vidmemAccessBitBufShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS vidmemAccessBitBufGetRegBaseOffsetAndSize_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__vidmemAccessBitBufGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__vidmemAccessBitBufGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS vidmemAccessBitBufGetMapAddrSpace_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__vidmemAccessBitBufGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__vidmemAccessBitBufGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS vidmemAccessBitBufInternalControlForward_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__vidmemAccessBitBufInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__vidmemAccessBitBufInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle vidmemAccessBitBufGetInternalObjectHandle_DISPATCH(struct VidmemAccessBitBuffer *pGpuResource) { - return pGpuResource->__vidmemAccessBitBufGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__vidmemAccessBitBufGetInternalObjectHandle__(pGpuResource); } static inline NvBool vidmemAccessBitBufAccessCallback_DISPATCH(struct VidmemAccessBitBuffer *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__vidmemAccessBitBufAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__vidmemAccessBitBufAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS vidmemAccessBitBufGetMemInterMapParams_DISPATCH(struct VidmemAccessBitBuffer *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__vidmemAccessBitBufGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__vidmemAccessBitBufGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS vidmemAccessBitBufCheckMemInterUnmap_DISPATCH(struct VidmemAccessBitBuffer *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__vidmemAccessBitBufCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__vidmemAccessBitBufCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS vidmemAccessBitBufGetMemoryMappingDescriptor_DISPATCH(struct VidmemAccessBitBuffer *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__vidmemAccessBitBufGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__vidmemAccessBitBufGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS vidmemAccessBitBufControlSerialization_Prologue_DISPATCH(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vidmemAccessBitBufControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__vidmemAccessBitBufControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void vidmemAccessBitBufControlSerialization_Epilogue_DISPATCH(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vidmemAccessBitBufControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__vidmemAccessBitBufControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS vidmemAccessBitBufControl_Prologue_DISPATCH(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vidmemAccessBitBufControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__vidmemAccessBitBufControl_Prologue__(pResource, pCallContext, pParams); } static inline void vidmemAccessBitBufControl_Epilogue_DISPATCH(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vidmemAccessBitBufControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__vidmemAccessBitBufControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool vidmemAccessBitBufCanCopy_DISPATCH(struct VidmemAccessBitBuffer *pResource) { - return pResource->__vidmemAccessBitBufCanCopy__(pResource); + return pResource->__nvoc_vtable->__vidmemAccessBitBufCanCopy__(pResource); } static inline NV_STATUS vidmemAccessBitBufIsDuplicate_DISPATCH(struct VidmemAccessBitBuffer *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__vidmemAccessBitBufIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__vidmemAccessBitBufIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void vidmemAccessBitBufPreDestruct_DISPATCH(struct VidmemAccessBitBuffer *pResource) { - pResource->__vidmemAccessBitBufPreDestruct__(pResource); + pResource->__nvoc_vtable->__vidmemAccessBitBufPreDestruct__(pResource); } static inline NV_STATUS vidmemAccessBitBufControlFilter_DISPATCH(struct VidmemAccessBitBuffer *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vidmemAccessBitBufControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__vidmemAccessBitBufControlFilter__(pResource, pCallContext, pParams); } static inline NvBool vidmemAccessBitBufIsPartialUnmapSupported_DISPATCH(struct VidmemAccessBitBuffer *pResource) { - return pResource->__vidmemAccessBitBufIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__vidmemAccessBitBufIsPartialUnmapSupported__(pResource); } static inline NV_STATUS vidmemAccessBitBufMapTo_DISPATCH(struct VidmemAccessBitBuffer *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__vidmemAccessBitBufMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__vidmemAccessBitBufMapTo__(pResource, pParams); } static inline NV_STATUS vidmemAccessBitBufUnmapFrom_DISPATCH(struct VidmemAccessBitBuffer *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__vidmemAccessBitBufUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__vidmemAccessBitBufUnmapFrom__(pResource, pParams); } static inline NvU32 vidmemAccessBitBufGetRefCount_DISPATCH(struct VidmemAccessBitBuffer *pResource) { - return pResource->__vidmemAccessBitBufGetRefCount__(pResource); + return pResource->__nvoc_vtable->__vidmemAccessBitBufGetRefCount__(pResource); } static inline void vidmemAccessBitBufAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VidmemAccessBitBuffer *pResource, RsResourceRef *pReference) { - pResource->__vidmemAccessBitBufAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__vidmemAccessBitBufAddAdditionalDependants__(pClient, pResource, pReference); } static inline PEVENTNOTIFICATION * vidmemAccessBitBufGetNotificationListPtr_DISPATCH(struct VidmemAccessBitBuffer *pNotifier) { - return pNotifier->__vidmemAccessBitBufGetNotificationListPtr__(pNotifier); + return pNotifier->__nvoc_vtable->__vidmemAccessBitBufGetNotificationListPtr__(pNotifier); } static inline struct NotifShare * vidmemAccessBitBufGetNotificationShare_DISPATCH(struct VidmemAccessBitBuffer *pNotifier) { - return pNotifier->__vidmemAccessBitBufGetNotificationShare__(pNotifier); + return pNotifier->__nvoc_vtable->__vidmemAccessBitBufGetNotificationShare__(pNotifier); } static inline void vidmemAccessBitBufSetNotificationShare_DISPATCH(struct VidmemAccessBitBuffer *pNotifier, struct NotifShare *pNotifShare) { - pNotifier->__vidmemAccessBitBufSetNotificationShare__(pNotifier, pNotifShare); + pNotifier->__nvoc_vtable->__vidmemAccessBitBufSetNotificationShare__(pNotifier, pNotifShare); } static inline NV_STATUS vidmemAccessBitBufUnregisterEvent_DISPATCH(struct VidmemAccessBitBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) { - return pNotifier->__vidmemAccessBitBufUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); + return pNotifier->__nvoc_vtable->__vidmemAccessBitBufUnregisterEvent__(pNotifier, hNotifierClient, hNotifierResource, hEventClient, hEvent); } static inline NV_STATUS vidmemAccessBitBufGetOrAllocNotifShare_DISPATCH(struct VidmemAccessBitBuffer *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) { - return pNotifier->__vidmemAccessBitBufGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); + return pNotifier->__nvoc_vtable->__vidmemAccessBitBufGetOrAllocNotifShare__(pNotifier, hNotifierClient, hNotifierResource, ppNotifShare); } -NV_STATUS vidmemAccessBitBufConstructHelper_KERNEL(struct VidmemAccessBitBuffer *pVidmem, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams); +static inline NV_STATUS vidmemAccessBitBufConstructHelper_56cd7a(struct VidmemAccessBitBuffer *pVidmem, CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { + return NV_OK; +} #ifdef __nvoc_vidmem_access_bit_buffer_h_disabled @@ -375,7 +390,7 @@ static inline NV_STATUS vidmemAccessBitBufConstructHelper(struct VidmemAccessBit return NV_ERR_NOT_SUPPORTED; } #else //__nvoc_vidmem_access_bit_buffer_h_disabled -#define vidmemAccessBitBufConstructHelper(pVidmem, pCallContext, pParams) vidmemAccessBitBufConstructHelper_KERNEL(pVidmem, pCallContext, pParams) +#define vidmemAccessBitBufConstructHelper(pVidmem, pCallContext, pParams) vidmemAccessBitBufConstructHelper_56cd7a(pVidmem, pCallContext, pParams) #endif //__nvoc_vidmem_access_bit_buffer_h_disabled #define vidmemAccessBitBufConstructHelper_HAL(pVidmem, pCallContext, pParams) vidmemAccessBitBufConstructHelper(pVidmem, pCallContext, pParams) diff --git a/src/nvidia/generated/g_virt_mem_allocator_nvoc.c b/src/nvidia/generated/g_virt_mem_allocator_nvoc.c index 89665d3a94..20d40343af 100644 --- a/src/nvidia/generated/g_virt_mem_allocator_nvoc.c +++ b/src/nvidia/generated/g_virt_mem_allocator_nvoc.c @@ -66,78 +66,96 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_VirtMemAllocator = /*pExportInfo=*/ &__nvoc_export_info_VirtMemAllocator }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NV_STATUS __nvoc_down_thunk_VirtMemAllocator_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pDma, ENGDESCRIPTOR arg3); // this +NV_STATUS __nvoc_down_thunk_VirtMemAllocator_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pDma); // this +NV_STATUS __nvoc_down_thunk_VirtMemAllocator_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pDma, NvU32 arg3); // this + // 3 down-thunk(s) defined to bridge methods in VirtMemAllocator from superclasses // dmaConstructEngine: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_VirtMemAllocator_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pDma, ENGDESCRIPTOR arg3) { +NV_STATUS __nvoc_down_thunk_VirtMemAllocator_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pDma, ENGDESCRIPTOR arg3) { return dmaConstructEngine(pGpu, (struct VirtMemAllocator *)(((unsigned char *) pDma) - __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset), arg3); } // dmaStateInitLocked: virtual override (engstate) base (engstate) -static NV_STATUS __nvoc_down_thunk_VirtMemAllocator_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pDma) { +NV_STATUS __nvoc_down_thunk_VirtMemAllocator_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pDma) { return dmaStateInitLocked(pGpu, (struct VirtMemAllocator *)(((unsigned char *) pDma) - __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset)); } // dmaStatePostLoad: virtual halified (singleton optimized) override (engstate) base (engstate) body -static NV_STATUS __nvoc_down_thunk_VirtMemAllocator_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pDma, NvU32 arg3) { +NV_STATUS __nvoc_down_thunk_VirtMemAllocator_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pDma, NvU32 arg3) { return dmaStatePostLoad(pGpu, (struct VirtMemAllocator *)(((unsigned char *) pDma) - __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset), arg3); } +// Up-thunk(s) to bridge methods to ancestors (if any) +void __nvoc_up_thunk_OBJENGSTATE_dmaInitMissing(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStatePreInitLocked(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStatePreInitUnlocked(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStateInitUnlocked(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStatePreLoad(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStateLoad(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStatePreUnload(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStateUnload(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3); // this +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStatePostUnload(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3); // this +void __nvoc_up_thunk_OBJENGSTATE_dmaStateDestroy(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate); // this +NvBool __nvoc_up_thunk_OBJENGSTATE_dmaIsPresent(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate); // this + // 11 up-thunk(s) defined to bridge methods in VirtMemAllocator to superclasses // dmaInitMissing: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_dmaInitMissing(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_dmaInitMissing(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate) { engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset)); } // dmaStatePreInitLocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStatePreInitLocked(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStatePreInitLocked(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate) { return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset)); } // dmaStatePreInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStatePreInitUnlocked(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStatePreInitUnlocked(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate) { return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset)); } // dmaStateInitUnlocked: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStateInitUnlocked(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStateInitUnlocked(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate) { return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset)); } // dmaStatePreLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStatePreLoad(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStatePreLoad(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset), arg3); } // dmaStateLoad: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStateLoad(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStateLoad(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset), arg3); } // dmaStatePreUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStatePreUnload(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStatePreUnload(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset), arg3); } // dmaStateUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStateUnload(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStateUnload(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset), arg3); } // dmaStatePostUnload: virtual inherited (engstate) base (engstate) -static NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStatePostUnload(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { +NV_STATUS __nvoc_up_thunk_OBJENGSTATE_dmaStatePostUnload(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset), arg3); } // dmaStateDestroy: virtual inherited (engstate) base (engstate) -static void __nvoc_up_thunk_OBJENGSTATE_dmaStateDestroy(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate) { +void __nvoc_up_thunk_OBJENGSTATE_dmaStateDestroy(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate) { engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset)); } // dmaIsPresent: virtual inherited (engstate) base (engstate) -static NvBool __nvoc_up_thunk_OBJENGSTATE_dmaIsPresent(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate) { +NvBool __nvoc_up_thunk_OBJENGSTATE_dmaIsPresent(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate) { return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *) pEngstate) + __nvoc_rtti_VirtMemAllocator_OBJENGSTATE.offset)); } @@ -167,34 +185,34 @@ void __nvoc_init_dataField_VirtMemAllocator(VirtMemAllocator *pThis, RmHalspecOw PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // NVOC Property Hal field -- PDB_PROP_DMA_ENFORCE_32BIT_POINTER - if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ + // Hal field -- bDmaShaderAccessSupported + // default { - pThis->setProperty(pThis, PDB_PROP_DMA_ENFORCE_32BIT_POINTER, ((NvBool)(0 == 0))); + pThis->bDmaShaderAccessSupported = NV_FALSE; } - // NVOC Property Hal field -- PDB_PROP_DMA_SHADER_ACCESS_SUPPORTED - // default + // Hal field -- bDmaIsSupportedSparseVirtual + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_DMA_SHADER_ACCESS_SUPPORTED, ((NvBool)(0 != 0))); + pThis->bDmaIsSupportedSparseVirtual = NV_TRUE; } - // NVOC Property Hal field -- PDB_PROP_DMA_IS_SUPPORTED_SPARSE_VIRTUAL + // Hal field -- bDmaEnforce32BitPointer if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd1f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 */ { - pThis->setProperty(pThis, PDB_PROP_DMA_IS_SUPPORTED_SPARSE_VIRTUAL, ((NvBool)(0 == 0))); + pThis->bDmaEnforce32BitPointer = NV_TRUE; } - // NVOC Property Hal field -- PDB_PROP_DMA_ENABLE_FULL_COMP_TAG_LINE + // Hal field -- bDmaEnableFullCompTagLine // default { - pThis->setProperty(pThis, PDB_PROP_DMA_ENABLE_FULL_COMP_TAG_LINE, ((NvBool)(0 != 0))); + pThis->bDmaEnableFullCompTagLine = NV_FALSE; } - // NVOC Property Hal field -- PDB_PROP_DMA_MULTIPLE_VASPACES_SUPPORTED + // Hal field -- bDmaMultipleVaspaceSupported // default { - pThis->setProperty(pThis, PDB_PROP_DMA_MULTIPLE_VASPACES_SUPPORTED, ((NvBool)(0 == 0))); + pThis->bDmaMultipleVaspaceSupported = NV_TRUE; } } @@ -225,14 +243,6 @@ static void __nvoc_init_funcTable_VirtMemAllocator_1(VirtMemAllocator *pThis, Rm PORT_UNREFERENCED_VARIABLE(rmVariantHal); PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); - // dmaConstructEngine -- virtual override (engstate) base (engstate) - pThis->__dmaConstructEngine__ = &dmaConstructEngine_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_VirtMemAllocator_engstateConstructEngine; - - // dmaStateInitLocked -- virtual override (engstate) base (engstate) - pThis->__dmaStateInitLocked__ = &dmaStateInitLocked_IMPL; - pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_VirtMemAllocator_engstateStateInitLocked; - // dmaAllocBar1P2PMapping -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xd0000000UL) )) /* ChipHal: GH100 | GB100 | GB102 */ { @@ -254,50 +264,49 @@ static void __nvoc_init_funcTable_VirtMemAllocator_1(VirtMemAllocator *pThis, Rm { pThis->__dmaFreeBar1P2PMapping__ = &dmaFreeBar1P2PMapping_b3696a; } - - // dmaStatePostLoad -- virtual halified (singleton optimized) override (engstate) base (engstate) body - pThis->__dmaStatePostLoad__ = &dmaStatePostLoad_GM107; - pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_VirtMemAllocator_engstateStatePostLoad; - - // dmaInitMissing -- virtual inherited (engstate) base (engstate) - pThis->__dmaInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_dmaInitMissing; - - // dmaStatePreInitLocked -- virtual inherited (engstate) base (engstate) - pThis->__dmaStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStatePreInitLocked; - - // dmaStatePreInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__dmaStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStatePreInitUnlocked; - - // dmaStateInitUnlocked -- virtual inherited (engstate) base (engstate) - pThis->__dmaStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStateInitUnlocked; - - // dmaStatePreLoad -- virtual inherited (engstate) base (engstate) - pThis->__dmaStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStatePreLoad; - - // dmaStateLoad -- virtual inherited (engstate) base (engstate) - pThis->__dmaStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStateLoad; - - // dmaStatePreUnload -- virtual inherited (engstate) base (engstate) - pThis->__dmaStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStatePreUnload; - - // dmaStateUnload -- virtual inherited (engstate) base (engstate) - pThis->__dmaStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStateUnload; - - // dmaStatePostUnload -- virtual inherited (engstate) base (engstate) - pThis->__dmaStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStatePostUnload; - - // dmaStateDestroy -- virtual inherited (engstate) base (engstate) - pThis->__dmaStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStateDestroy; - - // dmaIsPresent -- virtual inherited (engstate) base (engstate) - pThis->__dmaIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_dmaIsPresent; -} // End __nvoc_init_funcTable_VirtMemAllocator_1 with approximately 21 basic block(s). +} // End __nvoc_init_funcTable_VirtMemAllocator_1 with approximately 4 basic block(s). // Initialize vtable(s) for 16 virtual method(s). void __nvoc_init_funcTable_VirtMemAllocator(VirtMemAllocator *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 16 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__VirtMemAllocator vtable = { + .__dmaConstructEngine__ = &dmaConstructEngine_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_down_thunk_VirtMemAllocator_engstateConstructEngine, // virtual + .__dmaStateInitLocked__ = &dmaStateInitLocked_IMPL, // virtual override (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_down_thunk_VirtMemAllocator_engstateStateInitLocked, // virtual + .__dmaStatePostLoad__ = &dmaStatePostLoad_GM107, // virtual halified (singleton optimized) override (engstate) base (engstate) body + .OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_down_thunk_VirtMemAllocator_engstateStatePostLoad, // virtual + .__dmaInitMissing__ = &__nvoc_up_thunk_OBJENGSTATE_dmaInitMissing, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateInitMissing__ = &engstateInitMissing_IMPL, // virtual + .__dmaStatePreInitLocked__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStatePreInitLocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitLocked__ = &engstateStatePreInitLocked_IMPL, // virtual + .__dmaStatePreInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStatePreInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreInitUnlocked__ = &engstateStatePreInitUnlocked_IMPL, // virtual + .__dmaStateInitUnlocked__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStateInitUnlocked, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateInitUnlocked__ = &engstateStateInitUnlocked_IMPL, // virtual + .__dmaStatePreLoad__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStatePreLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreLoad__ = &engstateStatePreLoad_IMPL, // virtual + .__dmaStateLoad__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStateLoad, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateLoad__ = &engstateStateLoad_IMPL, // virtual + .__dmaStatePreUnload__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStatePreUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePreUnload__ = &engstateStatePreUnload_IMPL, // virtual + .__dmaStateUnload__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStateUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateUnload__ = &engstateStateUnload_IMPL, // virtual + .__dmaStatePostUnload__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStatePostUnload, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStatePostUnload__ = &engstateStatePostUnload_IMPL, // virtual + .__dmaStateDestroy__ = &__nvoc_up_thunk_OBJENGSTATE_dmaStateDestroy, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateStateDestroy__ = &engstateStateDestroy_IMPL, // virtual + .__dmaIsPresent__ = &__nvoc_up_thunk_OBJENGSTATE_dmaIsPresent, // virtual inherited (engstate) base (engstate) + .OBJENGSTATE.__engstateIsPresent__ = &engstateIsPresent_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_OBJENGSTATE.__nvoc_vtable = &vtable.OBJENGSTATE; // (engstate) super + pThis->__nvoc_vtable = &vtable; // (dma) this + + // Initialize vtable(s) with 2 per-object function pointer(s). __nvoc_init_funcTable_VirtMemAllocator_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_virt_mem_allocator_nvoc.h b/src/nvidia/generated/g_virt_mem_allocator_nvoc.h index 125fe6c067..d8201d5603 100644 --- a/src/nvidia/generated/g_virt_mem_allocator_nvoc.h +++ b/src/nvidia/generated/g_virt_mem_allocator_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -107,10 +107,15 @@ typedef struct _def_dma_bar1p2p_mapping_params #endif +// Metadata including vtable +struct NVOC_VTABLE__VirtMemAllocator; + + struct VirtMemAllocator { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__VirtMemAllocator *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct OBJENGSTATE __nvoc_base_OBJENGSTATE; @@ -120,11 +125,31 @@ struct VirtMemAllocator { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct VirtMemAllocator *__nvoc_pbase_VirtMemAllocator; // dma - // Vtable with 16 per-object function pointers - NV_STATUS (*__dmaConstructEngine__)(struct OBJGPU *, struct VirtMemAllocator * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) - NV_STATUS (*__dmaStateInitLocked__)(struct OBJGPU *, struct VirtMemAllocator * /*this*/); // virtual override (engstate) base (engstate) + // Vtable with 2 per-object function pointers NV_STATUS (*__dmaAllocBar1P2PMapping__)(struct OBJGPU *, struct VirtMemAllocator * /*this*/, DMA_BAR1P2P_MAPPING_PRARAMS *); // halified (2 hals) body void (*__dmaFreeBar1P2PMapping__)(struct VirtMemAllocator * /*this*/, CLI_DMA_MAPPING_INFO *); // halified (2 hals) body + + // Data members + NvU32 gpuGartCaps; + NvU32 increaseRsvdPages; + NvBool bDmaMemoryMapOverride; + NvBool bDmaRestrictVaRange; + NvBool bDmaShaderAccessSupported; + NvBool bDmaIsSupportedSparseVirtual; + NvBool bDmaMmuInvalidateDisable; + NvBool bDmaEnforce32BitPointer; + NvBool bDmaEnableFullCompTagLine; + NvBool bDmaMultipleVaspaceSupported; + struct ENG_INFO_LINK_NODE *infoList; +}; + + +// Metadata including vtable with 14 function pointers plus superclass metadata +struct NVOC_VTABLE__VirtMemAllocator { + const struct NVOC_VTABLE__OBJENGSTATE OBJENGSTATE; // (engstate) 14 function pointers + + NV_STATUS (*__dmaConstructEngine__)(struct OBJGPU *, struct VirtMemAllocator * /*this*/, ENGDESCRIPTOR); // virtual override (engstate) base (engstate) + NV_STATUS (*__dmaStateInitLocked__)(struct OBJGPU *, struct VirtMemAllocator * /*this*/); // virtual override (engstate) base (engstate) NV_STATUS (*__dmaStatePostLoad__)(struct OBJGPU *, struct VirtMemAllocator * /*this*/, NvU32); // virtual halified (singleton optimized) override (engstate) base (engstate) body void (*__dmaInitMissing__)(struct OBJGPU *, struct VirtMemAllocator * /*this*/); // virtual inherited (engstate) base (engstate) NV_STATUS (*__dmaStatePreInitLocked__)(struct OBJGPU *, struct VirtMemAllocator * /*this*/); // virtual inherited (engstate) base (engstate) @@ -137,21 +162,6 @@ struct VirtMemAllocator { NV_STATUS (*__dmaStatePostUnload__)(struct OBJGPU *, struct VirtMemAllocator * /*this*/, NvU32); // virtual inherited (engstate) base (engstate) void (*__dmaStateDestroy__)(struct OBJGPU *, struct VirtMemAllocator * /*this*/); // virtual inherited (engstate) base (engstate) NvBool (*__dmaIsPresent__)(struct OBJGPU *, struct VirtMemAllocator * /*this*/); // virtual inherited (engstate) base (engstate) - - // 7 PDB properties - NvBool PDB_PROP_DMA_MMU_INVALIDATE_DISABLE; - NvBool PDB_PROP_DMA_ENFORCE_32BIT_POINTER; - NvBool PDB_PROP_DMA_MEMORY_MAP_OVERRIDE; - NvBool PDB_PROP_DMA_SHADER_ACCESS_SUPPORTED; - NvBool PDB_PROP_DMA_IS_SUPPORTED_SPARSE_VIRTUAL; - NvBool PDB_PROP_DMA_ENABLE_FULL_COMP_TAG_LINE; - NvBool PDB_PROP_DMA_MULTIPLE_VASPACES_SUPPORTED; - - // Data members - NvU32 gpuGartCaps; - NvU32 increaseRsvdPages; - NvBool bDmaRestrictVaRange; - struct ENG_INFO_LINK_NODE *infoList; }; #ifndef __NVOC_CLASS_VirtMemAllocator_TYPEDEF__ @@ -177,22 +187,8 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_VirtMemAllocator; #endif //__nvoc_virt_mem_allocator_h_disabled // Property macros -#define PDB_PROP_DMA_MMU_INVALIDATE_DISABLE_BASE_CAST -#define PDB_PROP_DMA_MMU_INVALIDATE_DISABLE_BASE_NAME PDB_PROP_DMA_MMU_INVALIDATE_DISABLE -#define PDB_PROP_DMA_IS_SUPPORTED_SPARSE_VIRTUAL_BASE_CAST -#define PDB_PROP_DMA_IS_SUPPORTED_SPARSE_VIRTUAL_BASE_NAME PDB_PROP_DMA_IS_SUPPORTED_SPARSE_VIRTUAL -#define PDB_PROP_DMA_ENFORCE_32BIT_POINTER_BASE_CAST -#define PDB_PROP_DMA_ENFORCE_32BIT_POINTER_BASE_NAME PDB_PROP_DMA_ENFORCE_32BIT_POINTER -#define PDB_PROP_DMA_MEMORY_MAP_OVERRIDE_BASE_CAST -#define PDB_PROP_DMA_MEMORY_MAP_OVERRIDE_BASE_NAME PDB_PROP_DMA_MEMORY_MAP_OVERRIDE -#define PDB_PROP_DMA_MULTIPLE_VASPACES_SUPPORTED_BASE_CAST -#define PDB_PROP_DMA_MULTIPLE_VASPACES_SUPPORTED_BASE_NAME PDB_PROP_DMA_MULTIPLE_VASPACES_SUPPORTED #define PDB_PROP_DMA_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. #define PDB_PROP_DMA_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING -#define PDB_PROP_DMA_ENABLE_FULL_COMP_TAG_LINE_BASE_CAST -#define PDB_PROP_DMA_ENABLE_FULL_COMP_TAG_LINE_BASE_NAME PDB_PROP_DMA_ENABLE_FULL_COMP_TAG_LINE -#define PDB_PROP_DMA_SHADER_ACCESS_SUPPORTED_BASE_CAST -#define PDB_PROP_DMA_SHADER_ACCESS_SUPPORTED_BASE_NAME PDB_PROP_DMA_SHADER_ACCESS_SUPPORTED NV_STATUS __nvoc_objCreateDynamic_VirtMemAllocator(VirtMemAllocator**, Dynamic*, NvU32, va_list); @@ -202,9 +198,9 @@ NV_STATUS __nvoc_objCreate_VirtMemAllocator(VirtMemAllocator**, Dynamic*, NvU32) // Wrapper macros -#define dmaConstructEngine_FNPTR(pDma) pDma->__dmaConstructEngine__ +#define dmaConstructEngine_FNPTR(pDma) pDma->__nvoc_vtable->__dmaConstructEngine__ #define dmaConstructEngine(pGpu, pDma, arg3) dmaConstructEngine_DISPATCH(pGpu, pDma, arg3) -#define dmaStateInitLocked_FNPTR(pDma) pDma->__dmaStateInitLocked__ +#define dmaStateInitLocked_FNPTR(pDma) pDma->__nvoc_vtable->__dmaStateInitLocked__ #define dmaStateInitLocked(pGpu, pDma) dmaStateInitLocked_DISPATCH(pGpu, pDma) #define dmaAllocBar1P2PMapping_FNPTR(pDma) pDma->__dmaAllocBar1P2PMapping__ #define dmaAllocBar1P2PMapping(pGpu, pDma, params) dmaAllocBar1P2PMapping_DISPATCH(pGpu, pDma, params) @@ -212,39 +208,39 @@ NV_STATUS __nvoc_objCreate_VirtMemAllocator(VirtMemAllocator**, Dynamic*, NvU32) #define dmaFreeBar1P2PMapping_FNPTR(pDma) pDma->__dmaFreeBar1P2PMapping__ #define dmaFreeBar1P2PMapping(pDma, arg2) dmaFreeBar1P2PMapping_DISPATCH(pDma, arg2) #define dmaFreeBar1P2PMapping_HAL(pDma, arg2) dmaFreeBar1P2PMapping_DISPATCH(pDma, arg2) -#define dmaStatePostLoad_FNPTR(pDma) pDma->__dmaStatePostLoad__ +#define dmaStatePostLoad_FNPTR(pDma) pDma->__nvoc_vtable->__dmaStatePostLoad__ #define dmaStatePostLoad(pGpu, pDma, arg3) dmaStatePostLoad_DISPATCH(pGpu, pDma, arg3) #define dmaStatePostLoad_HAL(pGpu, pDma, arg3) dmaStatePostLoad_DISPATCH(pGpu, pDma, arg3) -#define dmaInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateInitMissing__ +#define dmaInitMissing_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateInitMissing__ #define dmaInitMissing(pGpu, pEngstate) dmaInitMissing_DISPATCH(pGpu, pEngstate) -#define dmaStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ +#define dmaStatePreInitLocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitLocked__ #define dmaStatePreInitLocked(pGpu, pEngstate) dmaStatePreInitLocked_DISPATCH(pGpu, pEngstate) -#define dmaStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreInitUnlocked__ +#define dmaStatePreInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreInitUnlocked__ #define dmaStatePreInitUnlocked(pGpu, pEngstate) dmaStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) -#define dmaStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateInitUnlocked__ +#define dmaStateInitUnlocked_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateInitUnlocked__ #define dmaStateInitUnlocked(pGpu, pEngstate) dmaStateInitUnlocked_DISPATCH(pGpu, pEngstate) -#define dmaStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ +#define dmaStatePreLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreLoad__ #define dmaStatePreLoad(pGpu, pEngstate, arg3) dmaStatePreLoad_DISPATCH(pGpu, pEngstate, arg3) -#define dmaStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ +#define dmaStateLoad_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateLoad__ #define dmaStateLoad(pGpu, pEngstate, arg3) dmaStateLoad_DISPATCH(pGpu, pEngstate, arg3) -#define dmaStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ +#define dmaStatePreUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePreUnload__ #define dmaStatePreUnload(pGpu, pEngstate, arg3) dmaStatePreUnload_DISPATCH(pGpu, pEngstate, arg3) -#define dmaStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ +#define dmaStateUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateUnload__ #define dmaStateUnload(pGpu, pEngstate, arg3) dmaStateUnload_DISPATCH(pGpu, pEngstate, arg3) -#define dmaStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStatePostUnload__ +#define dmaStatePostUnload_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStatePostUnload__ #define dmaStatePostUnload(pGpu, pEngstate, arg3) dmaStatePostUnload_DISPATCH(pGpu, pEngstate, arg3) -#define dmaStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ +#define dmaStateDestroy_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateStateDestroy__ #define dmaStateDestroy(pGpu, pEngstate) dmaStateDestroy_DISPATCH(pGpu, pEngstate) -#define dmaIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ +#define dmaIsPresent_FNPTR(pEngstate) pEngstate->__nvoc_base_OBJENGSTATE.__nvoc_vtable->__engstateIsPresent__ #define dmaIsPresent(pGpu, pEngstate) dmaIsPresent_DISPATCH(pGpu, pEngstate) // Dispatch functions static inline NV_STATUS dmaConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, ENGDESCRIPTOR arg3) { - return pDma->__dmaConstructEngine__(pGpu, pDma, arg3); + return pDma->__nvoc_vtable->__dmaConstructEngine__(pGpu, pDma, arg3); } static inline NV_STATUS dmaStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma) { - return pDma->__dmaStateInitLocked__(pGpu, pDma); + return pDma->__nvoc_vtable->__dmaStateInitLocked__(pGpu, pDma); } static inline NV_STATUS dmaAllocBar1P2PMapping_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, DMA_BAR1P2P_MAPPING_PRARAMS *params) { @@ -256,51 +252,51 @@ static inline void dmaFreeBar1P2PMapping_DISPATCH(struct VirtMemAllocator *pDma, } static inline NV_STATUS dmaStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma, NvU32 arg3) { - return pDma->__dmaStatePostLoad__(pGpu, pDma, arg3); + return pDma->__nvoc_vtable->__dmaStatePostLoad__(pGpu, pDma, arg3); } static inline void dmaInitMissing_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate) { - pEngstate->__dmaInitMissing__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__dmaInitMissing__(pGpu, pEngstate); } static inline NV_STATUS dmaStatePreInitLocked_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate) { - return pEngstate->__dmaStatePreInitLocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__dmaStatePreInitLocked__(pGpu, pEngstate); } static inline NV_STATUS dmaStatePreInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate) { - return pEngstate->__dmaStatePreInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__dmaStatePreInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS dmaStateInitUnlocked_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate) { - return pEngstate->__dmaStateInitUnlocked__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__dmaStateInitUnlocked__(pGpu, pEngstate); } static inline NV_STATUS dmaStatePreLoad_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { - return pEngstate->__dmaStatePreLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__dmaStatePreLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS dmaStateLoad_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { - return pEngstate->__dmaStateLoad__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__dmaStateLoad__(pGpu, pEngstate, arg3); } static inline NV_STATUS dmaStatePreUnload_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { - return pEngstate->__dmaStatePreUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__dmaStatePreUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS dmaStateUnload_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { - return pEngstate->__dmaStateUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__dmaStateUnload__(pGpu, pEngstate, arg3); } static inline NV_STATUS dmaStatePostUnload_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate, NvU32 arg3) { - return pEngstate->__dmaStatePostUnload__(pGpu, pEngstate, arg3); + return pEngstate->__nvoc_vtable->__dmaStatePostUnload__(pGpu, pEngstate, arg3); } static inline void dmaStateDestroy_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate) { - pEngstate->__dmaStateDestroy__(pGpu, pEngstate); + pEngstate->__nvoc_vtable->__dmaStateDestroy__(pGpu, pEngstate); } static inline NvBool dmaIsPresent_DISPATCH(struct OBJGPU *pGpu, struct VirtMemAllocator *pEngstate) { - return pEngstate->__dmaIsPresent__(pGpu, pEngstate); + return pEngstate->__nvoc_vtable->__dmaIsPresent__(pGpu, pEngstate); } NV_STATUS dmaInit_GM107(struct OBJGPU *pGpu, struct VirtMemAllocator *pDma); diff --git a/src/nvidia/generated/g_virt_mem_mgr_nvoc.c b/src/nvidia/generated/g_virt_mem_mgr_nvoc.c index f68f60aa06..5a46b652c0 100644 --- a/src/nvidia/generated/g_virt_mem_mgr_nvoc.c +++ b/src/nvidia/generated/g_virt_mem_mgr_nvoc.c @@ -57,6 +57,10 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_OBJVMM = /*pExportInfo=*/ &__nvoc_export_info_OBJVMM }; +// Down-thunk(s) to bridge methods from ancestors (if any) + +// Up-thunk(s) to bridge methods to ancestors (if any) + const struct NVOC_EXPORT_INFO __nvoc_export_info_OBJVMM = { /*numEntries=*/ 0, diff --git a/src/nvidia/generated/g_virt_mem_mgr_nvoc.h b/src/nvidia/generated/g_virt_mem_mgr_nvoc.h index cab3a4d86b..7d73664cc8 100644 --- a/src/nvidia/generated/g_virt_mem_mgr_nvoc.h +++ b/src/nvidia/generated/g_virt_mem_mgr_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { diff --git a/src/nvidia/generated/g_virt_mem_range_nvoc.c b/src/nvidia/generated/g_virt_mem_range_nvoc.c index 49623512ed..13a5ee1a7f 100644 --- a/src/nvidia/generated/g_virt_mem_range_nvoc.c +++ b/src/nvidia/generated/g_virt_mem_range_nvoc.c @@ -111,135 +111,256 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_VirtualMemoryRange = /*pExportInfo=*/ &__nvoc_export_info_VirtualMemoryRange }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^4 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^4 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^4 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^4 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^4 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^4 +NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super^3 +NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided); // super^3 +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super^3 +NvBool __nvoc_down_thunk_StandardMemory_resCanCopy(struct RsResource *pStandardMemory); // super^2 +NV_STATUS __nvoc_down_thunk_VirtualMemory_resMapTo(struct RsResource *pVirtualMemory, struct RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_down_thunk_VirtualMemory_resUnmapFrom(struct RsResource *pVirtualMemory, struct RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvBool __nvoc_down_thunk_VirtualMemory_resIsPartialUnmapSupported(struct RsResource *pVirtualMemory); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^4 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^4 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^4 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^4 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^4 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^4 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^4 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^4 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^4 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^4 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^4 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^4 +NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource); // super^3 +void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource); // super^3 +void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference); // super^3 +NV_STATUS __nvoc_up_thunk_Memory_stdmemIsDuplicate(struct StandardMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super^2 +NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMapAddrSpace(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super^2 +NV_STATUS __nvoc_up_thunk_Memory_stdmemControl(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_Memory_stdmemMap(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_Memory_stdmemUnmap(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMemInterMapParams(struct StandardMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_Memory_stdmemCheckMemInterUnmap(struct StandardMemory *pMemory, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMemoryMappingDescriptor(struct StandardMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NV_STATUS __nvoc_up_thunk_Memory_stdmemCheckCopyPermissions(struct StandardMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // super^2 +NV_STATUS __nvoc_up_thunk_Memory_stdmemIsReady(struct StandardMemory *pMemory, NvBool bCopyConstructorContext); // super^2 +NvBool __nvoc_up_thunk_Memory_stdmemIsGpuMapAllowed(struct StandardMemory *pMemory, struct OBJGPU *pGpu); // super^2 +NvBool __nvoc_up_thunk_Memory_stdmemIsExportAllowed(struct StandardMemory *pMemory); // super^2 +NvBool __nvoc_up_thunk_RmResource_stdmemAccessCallback(struct StandardMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_up_thunk_RmResource_stdmemShareCallback(struct StandardMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_stdmemControlSerialization_Prologue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_stdmemControlSerialization_Epilogue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_stdmemControl_Prologue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_stdmemControl_Epilogue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RsResource_stdmemPreDestruct(struct StandardMemory *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_stdmemControlFilter(struct StandardMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_stdmemIsPartialUnmapSupported(struct StandardMemory *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_stdmemMapTo(struct StandardMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_stdmemUnmapFrom(struct StandardMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_stdmemGetRefCount(struct StandardMemory *pResource); // super^2 +void __nvoc_up_thunk_RsResource_stdmemAddAdditionalDependants(struct RsClient *pClient, struct StandardMemory *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_StandardMemory_virtmemCanCopy(struct VirtualMemory *pStandardMemory); // super +NV_STATUS __nvoc_up_thunk_Memory_virtmemIsDuplicate(struct VirtualMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super +NV_STATUS __nvoc_up_thunk_Memory_virtmemGetMapAddrSpace(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super +NV_STATUS __nvoc_up_thunk_Memory_virtmemControl(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_Memory_virtmemMap(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_Memory_virtmemUnmap(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_Memory_virtmemGetMemInterMapParams(struct VirtualMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_Memory_virtmemCheckMemInterUnmap(struct VirtualMemory *pMemory, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_Memory_virtmemGetMemoryMappingDescriptor(struct VirtualMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_Memory_virtmemCheckCopyPermissions(struct VirtualMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // super +NV_STATUS __nvoc_up_thunk_Memory_virtmemIsReady(struct VirtualMemory *pMemory, NvBool bCopyConstructorContext); // super +NvBool __nvoc_up_thunk_Memory_virtmemIsGpuMapAllowed(struct VirtualMemory *pMemory, struct OBJGPU *pGpu); // super +NvBool __nvoc_up_thunk_Memory_virtmemIsExportAllowed(struct VirtualMemory *pMemory); // super +NvBool __nvoc_up_thunk_RmResource_virtmemAccessCallback(struct VirtualMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_virtmemShareCallback(struct VirtualMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_virtmemControlSerialization_Prologue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_virtmemControlSerialization_Epilogue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_virtmemControl_Prologue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_virtmemControl_Epilogue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RsResource_virtmemPreDestruct(struct VirtualMemory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_virtmemControlFilter(struct VirtualMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_virtmemGetRefCount(struct VirtualMemory *pResource); // super +void __nvoc_up_thunk_RsResource_virtmemAddAdditionalDependants(struct RsClient *pClient, struct VirtualMemory *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_VirtualMemory_vmrangeMapTo(struct VirtualMemoryRange *pVirtualMemory, struct RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_VirtualMemory_vmrangeUnmapFrom(struct VirtualMemoryRange *pVirtualMemory, struct RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvBool __nvoc_up_thunk_VirtualMemory_vmrangeIsPartialUnmapSupported(struct VirtualMemoryRange *pVirtualMemory); // this +NvBool __nvoc_up_thunk_StandardMemory_vmrangeCanCopy(struct VirtualMemoryRange *pStandardMemory); // this +NV_STATUS __nvoc_up_thunk_Memory_vmrangeIsDuplicate(struct VirtualMemoryRange *pMemory, NvHandle hMemory, NvBool *pDuplicate); // this +NV_STATUS __nvoc_up_thunk_Memory_vmrangeGetMapAddrSpace(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_Memory_vmrangeControl(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_vmrangeMap(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_vmrangeUnmap(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_vmrangeGetMemInterMapParams(struct VirtualMemoryRange *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_vmrangeCheckMemInterUnmap(struct VirtualMemoryRange *pMemory, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_Memory_vmrangeGetMemoryMappingDescriptor(struct VirtualMemoryRange *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_Memory_vmrangeCheckCopyPermissions(struct VirtualMemoryRange *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // this +NV_STATUS __nvoc_up_thunk_Memory_vmrangeIsReady(struct VirtualMemoryRange *pMemory, NvBool bCopyConstructorContext); // this +NvBool __nvoc_up_thunk_Memory_vmrangeIsGpuMapAllowed(struct VirtualMemoryRange *pMemory, struct OBJGPU *pGpu); // this +NvBool __nvoc_up_thunk_Memory_vmrangeIsExportAllowed(struct VirtualMemoryRange *pMemory); // this +NvBool __nvoc_up_thunk_RmResource_vmrangeAccessCallback(struct VirtualMemoryRange *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_vmrangeShareCallback(struct VirtualMemoryRange *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_vmrangeControlSerialization_Prologue(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_vmrangeControlSerialization_Epilogue(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_vmrangeControl_Prologue(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_vmrangeControl_Epilogue(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RsResource_vmrangePreDestruct(struct VirtualMemoryRange *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_vmrangeControlFilter(struct VirtualMemoryRange *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_vmrangeGetRefCount(struct VirtualMemoryRange *pResource); // this +void __nvoc_up_thunk_RsResource_vmrangeAddAdditionalDependants(struct RsClient *pClient, struct VirtualMemoryRange *pResource, RsResourceRef *pReference); // this + // 26 up-thunk(s) defined to bridge methods in VirtualMemoryRange to superclasses // vmrangeMapTo: virtual inherited (virtmem) base (virtmem) -static NV_STATUS __nvoc_up_thunk_VirtualMemory_vmrangeMapTo(struct VirtualMemoryRange *pVirtualMemory, struct RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_VirtualMemory_vmrangeMapTo(struct VirtualMemoryRange *pVirtualMemory, struct RS_RES_MAP_TO_PARAMS *pParams) { return virtmemMapTo((struct VirtualMemory *)(((unsigned char *) pVirtualMemory) + __nvoc_rtti_VirtualMemoryRange_VirtualMemory.offset), pParams); } // vmrangeUnmapFrom: virtual inherited (virtmem) base (virtmem) -static NV_STATUS __nvoc_up_thunk_VirtualMemory_vmrangeUnmapFrom(struct VirtualMemoryRange *pVirtualMemory, struct RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_VirtualMemory_vmrangeUnmapFrom(struct VirtualMemoryRange *pVirtualMemory, struct RS_RES_UNMAP_FROM_PARAMS *pParams) { return virtmemUnmapFrom((struct VirtualMemory *)(((unsigned char *) pVirtualMemory) + __nvoc_rtti_VirtualMemoryRange_VirtualMemory.offset), pParams); } // vmrangeIsPartialUnmapSupported: inline virtual inherited (virtmem) base (virtmem) body -static NvBool __nvoc_up_thunk_VirtualMemory_vmrangeIsPartialUnmapSupported(struct VirtualMemoryRange *pVirtualMemory) { +NvBool __nvoc_up_thunk_VirtualMemory_vmrangeIsPartialUnmapSupported(struct VirtualMemoryRange *pVirtualMemory) { return virtmemIsPartialUnmapSupported((struct VirtualMemory *)(((unsigned char *) pVirtualMemory) + __nvoc_rtti_VirtualMemoryRange_VirtualMemory.offset)); } // vmrangeCanCopy: virtual inherited (stdmem) base (virtmem) -static NvBool __nvoc_up_thunk_StandardMemory_vmrangeCanCopy(struct VirtualMemoryRange *pStandardMemory) { +NvBool __nvoc_up_thunk_StandardMemory_vmrangeCanCopy(struct VirtualMemoryRange *pStandardMemory) { return stdmemCanCopy((struct StandardMemory *)(((unsigned char *) pStandardMemory) + __nvoc_rtti_VirtualMemoryRange_StandardMemory.offset)); } // vmrangeIsDuplicate: virtual inherited (mem) base (virtmem) -static NV_STATUS __nvoc_up_thunk_Memory_vmrangeIsDuplicate(struct VirtualMemoryRange *pMemory, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_Memory_vmrangeIsDuplicate(struct VirtualMemoryRange *pMemory, NvHandle hMemory, NvBool *pDuplicate) { return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), hMemory, pDuplicate); } // vmrangeGetMapAddrSpace: virtual inherited (mem) base (virtmem) -static NV_STATUS __nvoc_up_thunk_Memory_vmrangeGetMapAddrSpace(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_Memory_vmrangeGetMapAddrSpace(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), pCallContext, mapFlags, pAddrSpace); } // vmrangeControl: virtual inherited (mem) base (virtmem) -static NV_STATUS __nvoc_up_thunk_Memory_vmrangeControl(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_vmrangeControl(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), pCallContext, pParams); } // vmrangeMap: virtual inherited (mem) base (virtmem) -static NV_STATUS __nvoc_up_thunk_Memory_vmrangeMap(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_vmrangeMap(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), pCallContext, pParams, pCpuMapping); } // vmrangeUnmap: virtual inherited (mem) base (virtmem) -static NV_STATUS __nvoc_up_thunk_Memory_vmrangeUnmap(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_vmrangeUnmap(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), pCallContext, pCpuMapping); } // vmrangeGetMemInterMapParams: virtual inherited (mem) base (virtmem) -static NV_STATUS __nvoc_up_thunk_Memory_vmrangeGetMemInterMapParams(struct VirtualMemoryRange *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_vmrangeGetMemInterMapParams(struct VirtualMemoryRange *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), pParams); } // vmrangeCheckMemInterUnmap: inline virtual inherited (mem) base (virtmem) body -static NV_STATUS __nvoc_up_thunk_Memory_vmrangeCheckMemInterUnmap(struct VirtualMemoryRange *pMemory, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_Memory_vmrangeCheckMemInterUnmap(struct VirtualMemoryRange *pMemory, NvBool bSubdeviceHandleProvided) { return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), bSubdeviceHandleProvided); } // vmrangeGetMemoryMappingDescriptor: virtual inherited (mem) base (virtmem) -static NV_STATUS __nvoc_up_thunk_Memory_vmrangeGetMemoryMappingDescriptor(struct VirtualMemoryRange *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_Memory_vmrangeGetMemoryMappingDescriptor(struct VirtualMemoryRange *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), ppMemDesc); } // vmrangeCheckCopyPermissions: inline virtual inherited (mem) base (virtmem) body -static NV_STATUS __nvoc_up_thunk_Memory_vmrangeCheckCopyPermissions(struct VirtualMemoryRange *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { +NV_STATUS __nvoc_up_thunk_Memory_vmrangeCheckCopyPermissions(struct VirtualMemoryRange *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), pDstGpu, pDstDevice); } // vmrangeIsReady: virtual inherited (mem) base (virtmem) -static NV_STATUS __nvoc_up_thunk_Memory_vmrangeIsReady(struct VirtualMemoryRange *pMemory, NvBool bCopyConstructorContext) { +NV_STATUS __nvoc_up_thunk_Memory_vmrangeIsReady(struct VirtualMemoryRange *pMemory, NvBool bCopyConstructorContext) { return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), bCopyConstructorContext); } // vmrangeIsGpuMapAllowed: inline virtual inherited (mem) base (virtmem) body -static NvBool __nvoc_up_thunk_Memory_vmrangeIsGpuMapAllowed(struct VirtualMemoryRange *pMemory, struct OBJGPU *pGpu) { +NvBool __nvoc_up_thunk_Memory_vmrangeIsGpuMapAllowed(struct VirtualMemoryRange *pMemory, struct OBJGPU *pGpu) { return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset), pGpu); } // vmrangeIsExportAllowed: inline virtual inherited (mem) base (virtmem) body -static NvBool __nvoc_up_thunk_Memory_vmrangeIsExportAllowed(struct VirtualMemoryRange *pMemory) { +NvBool __nvoc_up_thunk_Memory_vmrangeIsExportAllowed(struct VirtualMemoryRange *pMemory) { return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemoryRange_Memory.offset)); } // vmrangeAccessCallback: virtual inherited (rmres) base (virtmem) -static NvBool __nvoc_up_thunk_RmResource_vmrangeAccessCallback(struct VirtualMemoryRange *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_vmrangeAccessCallback(struct VirtualMemoryRange *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemoryRange_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // vmrangeShareCallback: virtual inherited (rmres) base (virtmem) -static NvBool __nvoc_up_thunk_RmResource_vmrangeShareCallback(struct VirtualMemoryRange *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_vmrangeShareCallback(struct VirtualMemoryRange *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemoryRange_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // vmrangeControlSerialization_Prologue: virtual inherited (rmres) base (virtmem) -static NV_STATUS __nvoc_up_thunk_RmResource_vmrangeControlSerialization_Prologue(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_vmrangeControlSerialization_Prologue(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemoryRange_RmResource.offset), pCallContext, pParams); } // vmrangeControlSerialization_Epilogue: virtual inherited (rmres) base (virtmem) -static void __nvoc_up_thunk_RmResource_vmrangeControlSerialization_Epilogue(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_vmrangeControlSerialization_Epilogue(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemoryRange_RmResource.offset), pCallContext, pParams); } // vmrangeControl_Prologue: virtual inherited (rmres) base (virtmem) -static NV_STATUS __nvoc_up_thunk_RmResource_vmrangeControl_Prologue(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_vmrangeControl_Prologue(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemoryRange_RmResource.offset), pCallContext, pParams); } // vmrangeControl_Epilogue: virtual inherited (rmres) base (virtmem) -static void __nvoc_up_thunk_RmResource_vmrangeControl_Epilogue(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_vmrangeControl_Epilogue(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemoryRange_RmResource.offset), pCallContext, pParams); } // vmrangePreDestruct: virtual inherited (res) base (virtmem) -static void __nvoc_up_thunk_RsResource_vmrangePreDestruct(struct VirtualMemoryRange *pResource) { +void __nvoc_up_thunk_RsResource_vmrangePreDestruct(struct VirtualMemoryRange *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemoryRange_RsResource.offset)); } // vmrangeControlFilter: virtual inherited (res) base (virtmem) -static NV_STATUS __nvoc_up_thunk_RsResource_vmrangeControlFilter(struct VirtualMemoryRange *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_vmrangeControlFilter(struct VirtualMemoryRange *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemoryRange_RsResource.offset), pCallContext, pParams); } // vmrangeGetRefCount: virtual inherited (res) base (virtmem) -static NvU32 __nvoc_up_thunk_RsResource_vmrangeGetRefCount(struct VirtualMemoryRange *pResource) { +NvU32 __nvoc_up_thunk_RsResource_vmrangeGetRefCount(struct VirtualMemoryRange *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemoryRange_RsResource.offset)); } // vmrangeAddAdditionalDependants: virtual inherited (res) base (virtmem) -static void __nvoc_up_thunk_RsResource_vmrangeAddAdditionalDependants(struct RsClient *pClient, struct VirtualMemoryRange *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_vmrangeAddAdditionalDependants(struct RsClient *pClient, struct VirtualMemoryRange *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemoryRange_RsResource.offset), pReference); } @@ -282,91 +403,166 @@ NV_STATUS __nvoc_ctor_VirtualMemoryRange(VirtualMemoryRange *pThis, CALL_CONTEXT // Vtable initialization static void __nvoc_init_funcTable_VirtualMemoryRange_1(VirtualMemoryRange *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // vmrangeMapTo -- virtual inherited (virtmem) base (virtmem) - pThis->__vmrangeMapTo__ = &__nvoc_up_thunk_VirtualMemory_vmrangeMapTo; - - // vmrangeUnmapFrom -- virtual inherited (virtmem) base (virtmem) - pThis->__vmrangeUnmapFrom__ = &__nvoc_up_thunk_VirtualMemory_vmrangeUnmapFrom; - - // vmrangeIsPartialUnmapSupported -- inline virtual inherited (virtmem) base (virtmem) body - pThis->__vmrangeIsPartialUnmapSupported__ = &__nvoc_up_thunk_VirtualMemory_vmrangeIsPartialUnmapSupported; - - // vmrangeCanCopy -- virtual inherited (stdmem) base (virtmem) - pThis->__vmrangeCanCopy__ = &__nvoc_up_thunk_StandardMemory_vmrangeCanCopy; - - // vmrangeIsDuplicate -- virtual inherited (mem) base (virtmem) - pThis->__vmrangeIsDuplicate__ = &__nvoc_up_thunk_Memory_vmrangeIsDuplicate; - - // vmrangeGetMapAddrSpace -- virtual inherited (mem) base (virtmem) - pThis->__vmrangeGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_vmrangeGetMapAddrSpace; - - // vmrangeControl -- virtual inherited (mem) base (virtmem) - pThis->__vmrangeControl__ = &__nvoc_up_thunk_Memory_vmrangeControl; - - // vmrangeMap -- virtual inherited (mem) base (virtmem) - pThis->__vmrangeMap__ = &__nvoc_up_thunk_Memory_vmrangeMap; - - // vmrangeUnmap -- virtual inherited (mem) base (virtmem) - pThis->__vmrangeUnmap__ = &__nvoc_up_thunk_Memory_vmrangeUnmap; - - // vmrangeGetMemInterMapParams -- virtual inherited (mem) base (virtmem) - pThis->__vmrangeGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_vmrangeGetMemInterMapParams; - - // vmrangeCheckMemInterUnmap -- inline virtual inherited (mem) base (virtmem) body - pThis->__vmrangeCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_vmrangeCheckMemInterUnmap; - - // vmrangeGetMemoryMappingDescriptor -- virtual inherited (mem) base (virtmem) - pThis->__vmrangeGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_vmrangeGetMemoryMappingDescriptor; - - // vmrangeCheckCopyPermissions -- inline virtual inherited (mem) base (virtmem) body - pThis->__vmrangeCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_vmrangeCheckCopyPermissions; - - // vmrangeIsReady -- virtual inherited (mem) base (virtmem) - pThis->__vmrangeIsReady__ = &__nvoc_up_thunk_Memory_vmrangeIsReady; - - // vmrangeIsGpuMapAllowed -- inline virtual inherited (mem) base (virtmem) body - pThis->__vmrangeIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_vmrangeIsGpuMapAllowed; - - // vmrangeIsExportAllowed -- inline virtual inherited (mem) base (virtmem) body - pThis->__vmrangeIsExportAllowed__ = &__nvoc_up_thunk_Memory_vmrangeIsExportAllowed; - - // vmrangeAccessCallback -- virtual inherited (rmres) base (virtmem) - pThis->__vmrangeAccessCallback__ = &__nvoc_up_thunk_RmResource_vmrangeAccessCallback; - - // vmrangeShareCallback -- virtual inherited (rmres) base (virtmem) - pThis->__vmrangeShareCallback__ = &__nvoc_up_thunk_RmResource_vmrangeShareCallback; - - // vmrangeControlSerialization_Prologue -- virtual inherited (rmres) base (virtmem) - pThis->__vmrangeControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_vmrangeControlSerialization_Prologue; - - // vmrangeControlSerialization_Epilogue -- virtual inherited (rmres) base (virtmem) - pThis->__vmrangeControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_vmrangeControlSerialization_Epilogue; - - // vmrangeControl_Prologue -- virtual inherited (rmres) base (virtmem) - pThis->__vmrangeControl_Prologue__ = &__nvoc_up_thunk_RmResource_vmrangeControl_Prologue; - - // vmrangeControl_Epilogue -- virtual inherited (rmres) base (virtmem) - pThis->__vmrangeControl_Epilogue__ = &__nvoc_up_thunk_RmResource_vmrangeControl_Epilogue; - - // vmrangePreDestruct -- virtual inherited (res) base (virtmem) - pThis->__vmrangePreDestruct__ = &__nvoc_up_thunk_RsResource_vmrangePreDestruct; - - // vmrangeControlFilter -- virtual inherited (res) base (virtmem) - pThis->__vmrangeControlFilter__ = &__nvoc_up_thunk_RsResource_vmrangeControlFilter; - - // vmrangeGetRefCount -- virtual inherited (res) base (virtmem) - pThis->__vmrangeGetRefCount__ = &__nvoc_up_thunk_RsResource_vmrangeGetRefCount; - - // vmrangeAddAdditionalDependants -- virtual inherited (res) base (virtmem) - pThis->__vmrangeAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_vmrangeAddAdditionalDependants; -} // End __nvoc_init_funcTable_VirtualMemoryRange_1 with approximately 26 basic block(s). +} // End __nvoc_init_funcTable_VirtualMemoryRange_1 // Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_VirtualMemoryRange(VirtualMemoryRange *pThis) { - // Initialize vtable(s) with 26 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__VirtualMemoryRange vtable = { + .__vmrangeMapTo__ = &__nvoc_up_thunk_VirtualMemory_vmrangeMapTo, // virtual inherited (virtmem) base (virtmem) + .VirtualMemory.__virtmemMapTo__ = &virtmemMapTo_IMPL, // virtual override (res) base (stdmem) + .VirtualMemory.StandardMemory.__stdmemMapTo__ = &__nvoc_up_thunk_RsResource_stdmemMapTo, // virtual inherited (res) base (mem) + .VirtualMemory.StandardMemory.Memory.__memMapTo__ = &__nvoc_up_thunk_RsResource_memMapTo, // virtual inherited (res) base (rmres) + .VirtualMemory.StandardMemory.Memory.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .VirtualMemory.StandardMemory.Memory.RmResource.RsResource.__resMapTo__ = &__nvoc_down_thunk_VirtualMemory_resMapTo, // virtual + .__vmrangeUnmapFrom__ = &__nvoc_up_thunk_VirtualMemory_vmrangeUnmapFrom, // virtual inherited (virtmem) base (virtmem) + .VirtualMemory.__virtmemUnmapFrom__ = &virtmemUnmapFrom_IMPL, // virtual override (res) base (stdmem) + .VirtualMemory.StandardMemory.__stdmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_stdmemUnmapFrom, // virtual inherited (res) base (mem) + .VirtualMemory.StandardMemory.Memory.__memUnmapFrom__ = &__nvoc_up_thunk_RsResource_memUnmapFrom, // virtual inherited (res) base (rmres) + .VirtualMemory.StandardMemory.Memory.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .VirtualMemory.StandardMemory.Memory.RmResource.RsResource.__resUnmapFrom__ = &__nvoc_down_thunk_VirtualMemory_resUnmapFrom, // virtual + .__vmrangeIsPartialUnmapSupported__ = &__nvoc_up_thunk_VirtualMemory_vmrangeIsPartialUnmapSupported, // inline virtual inherited (virtmem) base (virtmem) body + .VirtualMemory.__virtmemIsPartialUnmapSupported__ = &virtmemIsPartialUnmapSupported_e661f0, // inline virtual override (res) base (stdmem) body + .VirtualMemory.StandardMemory.__stdmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_stdmemIsPartialUnmapSupported, // inline virtual inherited (res) base (mem) body + .VirtualMemory.StandardMemory.Memory.__memIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .VirtualMemory.StandardMemory.Memory.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .VirtualMemory.StandardMemory.Memory.RmResource.RsResource.__resIsPartialUnmapSupported__ = &__nvoc_down_thunk_VirtualMemory_resIsPartialUnmapSupported, // inline virtual body + .__vmrangeCanCopy__ = &__nvoc_up_thunk_StandardMemory_vmrangeCanCopy, // virtual inherited (stdmem) base (virtmem) + .VirtualMemory.__virtmemCanCopy__ = &__nvoc_up_thunk_StandardMemory_virtmemCanCopy, // virtual inherited (stdmem) base (stdmem) + .VirtualMemory.StandardMemory.__stdmemCanCopy__ = &stdmemCanCopy_IMPL, // virtual override (res) base (mem) + .VirtualMemory.StandardMemory.Memory.__memCanCopy__ = &__nvoc_up_thunk_RsResource_memCanCopy, // virtual inherited (res) base (rmres) + .VirtualMemory.StandardMemory.Memory.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .VirtualMemory.StandardMemory.Memory.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_StandardMemory_resCanCopy, // virtual + .__vmrangeIsDuplicate__ = &__nvoc_up_thunk_Memory_vmrangeIsDuplicate, // virtual inherited (mem) base (virtmem) + .VirtualMemory.__virtmemIsDuplicate__ = &__nvoc_up_thunk_Memory_virtmemIsDuplicate, // virtual inherited (mem) base (stdmem) + .VirtualMemory.StandardMemory.__stdmemIsDuplicate__ = &__nvoc_up_thunk_Memory_stdmemIsDuplicate, // virtual inherited (mem) base (mem) + .VirtualMemory.StandardMemory.Memory.__memIsDuplicate__ = &memIsDuplicate_IMPL, // virtual override (res) base (rmres) + .VirtualMemory.StandardMemory.Memory.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .VirtualMemory.StandardMemory.Memory.RmResource.RsResource.__resIsDuplicate__ = &__nvoc_down_thunk_Memory_resIsDuplicate, // virtual + .__vmrangeGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_vmrangeGetMapAddrSpace, // virtual inherited (mem) base (virtmem) + .VirtualMemory.__virtmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_virtmemGetMapAddrSpace, // virtual inherited (mem) base (stdmem) + .VirtualMemory.StandardMemory.__stdmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_stdmemGetMapAddrSpace, // virtual inherited (mem) base (mem) + .VirtualMemory.StandardMemory.Memory.__memGetMapAddrSpace__ = &memGetMapAddrSpace_IMPL, // virtual + .__vmrangeControl__ = &__nvoc_up_thunk_Memory_vmrangeControl, // virtual inherited (mem) base (virtmem) + .VirtualMemory.__virtmemControl__ = &__nvoc_up_thunk_Memory_virtmemControl, // virtual inherited (mem) base (stdmem) + .VirtualMemory.StandardMemory.__stdmemControl__ = &__nvoc_up_thunk_Memory_stdmemControl, // virtual inherited (mem) base (mem) + .VirtualMemory.StandardMemory.Memory.__memControl__ = &memControl_IMPL, // virtual override (res) base (rmres) + .VirtualMemory.StandardMemory.Memory.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .VirtualMemory.StandardMemory.Memory.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_Memory_resControl, // virtual + .__vmrangeMap__ = &__nvoc_up_thunk_Memory_vmrangeMap, // virtual inherited (mem) base (virtmem) + .VirtualMemory.__virtmemMap__ = &__nvoc_up_thunk_Memory_virtmemMap, // virtual inherited (mem) base (stdmem) + .VirtualMemory.StandardMemory.__stdmemMap__ = &__nvoc_up_thunk_Memory_stdmemMap, // virtual inherited (mem) base (mem) + .VirtualMemory.StandardMemory.Memory.__memMap__ = &memMap_IMPL, // virtual override (res) base (rmres) + .VirtualMemory.StandardMemory.Memory.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .VirtualMemory.StandardMemory.Memory.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_Memory_resMap, // virtual + .__vmrangeUnmap__ = &__nvoc_up_thunk_Memory_vmrangeUnmap, // virtual inherited (mem) base (virtmem) + .VirtualMemory.__virtmemUnmap__ = &__nvoc_up_thunk_Memory_virtmemUnmap, // virtual inherited (mem) base (stdmem) + .VirtualMemory.StandardMemory.__stdmemUnmap__ = &__nvoc_up_thunk_Memory_stdmemUnmap, // virtual inherited (mem) base (mem) + .VirtualMemory.StandardMemory.Memory.__memUnmap__ = &memUnmap_IMPL, // virtual override (res) base (rmres) + .VirtualMemory.StandardMemory.Memory.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .VirtualMemory.StandardMemory.Memory.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_Memory_resUnmap, // virtual + .__vmrangeGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_vmrangeGetMemInterMapParams, // virtual inherited (mem) base (virtmem) + .VirtualMemory.__virtmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_virtmemGetMemInterMapParams, // virtual inherited (mem) base (stdmem) + .VirtualMemory.StandardMemory.__stdmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_stdmemGetMemInterMapParams, // virtual inherited (mem) base (mem) + .VirtualMemory.StandardMemory.Memory.__memGetMemInterMapParams__ = &memGetMemInterMapParams_IMPL, // virtual override (rmres) base (rmres) + .VirtualMemory.StandardMemory.Memory.RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_Memory_rmresGetMemInterMapParams, // virtual + .__vmrangeCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_vmrangeCheckMemInterUnmap, // inline virtual inherited (mem) base (virtmem) body + .VirtualMemory.__virtmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_virtmemCheckMemInterUnmap, // inline virtual inherited (mem) base (stdmem) body + .VirtualMemory.StandardMemory.__stdmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_stdmemCheckMemInterUnmap, // inline virtual inherited (mem) base (mem) body + .VirtualMemory.StandardMemory.Memory.__memCheckMemInterUnmap__ = &memCheckMemInterUnmap_ac1694, // inline virtual override (rmres) base (rmres) body + .VirtualMemory.StandardMemory.Memory.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_Memory_rmresCheckMemInterUnmap, // virtual + .__vmrangeGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_vmrangeGetMemoryMappingDescriptor, // virtual inherited (mem) base (virtmem) + .VirtualMemory.__virtmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_virtmemGetMemoryMappingDescriptor, // virtual inherited (mem) base (stdmem) + .VirtualMemory.StandardMemory.__stdmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_stdmemGetMemoryMappingDescriptor, // virtual inherited (mem) base (mem) + .VirtualMemory.StandardMemory.Memory.__memGetMemoryMappingDescriptor__ = &memGetMemoryMappingDescriptor_IMPL, // virtual override (rmres) base (rmres) + .VirtualMemory.StandardMemory.Memory.RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor, // virtual + .__vmrangeCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_vmrangeCheckCopyPermissions, // inline virtual inherited (mem) base (virtmem) body + .VirtualMemory.__virtmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_virtmemCheckCopyPermissions, // inline virtual inherited (mem) base (stdmem) body + .VirtualMemory.StandardMemory.__stdmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_stdmemCheckCopyPermissions, // inline virtual inherited (mem) base (mem) body + .VirtualMemory.StandardMemory.Memory.__memCheckCopyPermissions__ = &memCheckCopyPermissions_ac1694, // inline virtual body + .__vmrangeIsReady__ = &__nvoc_up_thunk_Memory_vmrangeIsReady, // virtual inherited (mem) base (virtmem) + .VirtualMemory.__virtmemIsReady__ = &__nvoc_up_thunk_Memory_virtmemIsReady, // virtual inherited (mem) base (stdmem) + .VirtualMemory.StandardMemory.__stdmemIsReady__ = &__nvoc_up_thunk_Memory_stdmemIsReady, // virtual inherited (mem) base (mem) + .VirtualMemory.StandardMemory.Memory.__memIsReady__ = &memIsReady_IMPL, // virtual + .__vmrangeIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_vmrangeIsGpuMapAllowed, // inline virtual inherited (mem) base (virtmem) body + .VirtualMemory.__virtmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_virtmemIsGpuMapAllowed, // inline virtual inherited (mem) base (stdmem) body + .VirtualMemory.StandardMemory.__stdmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_stdmemIsGpuMapAllowed, // inline virtual inherited (mem) base (mem) body + .VirtualMemory.StandardMemory.Memory.__memIsGpuMapAllowed__ = &memIsGpuMapAllowed_e661f0, // inline virtual body + .__vmrangeIsExportAllowed__ = &__nvoc_up_thunk_Memory_vmrangeIsExportAllowed, // inline virtual inherited (mem) base (virtmem) body + .VirtualMemory.__virtmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_virtmemIsExportAllowed, // inline virtual inherited (mem) base (stdmem) body + .VirtualMemory.StandardMemory.__stdmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_stdmemIsExportAllowed, // inline virtual inherited (mem) base (mem) body + .VirtualMemory.StandardMemory.Memory.__memIsExportAllowed__ = &memIsExportAllowed_e661f0, // inline virtual body + .__vmrangeAccessCallback__ = &__nvoc_up_thunk_RmResource_vmrangeAccessCallback, // virtual inherited (rmres) base (virtmem) + .VirtualMemory.__virtmemAccessCallback__ = &__nvoc_up_thunk_RmResource_virtmemAccessCallback, // virtual inherited (rmres) base (stdmem) + .VirtualMemory.StandardMemory.__stdmemAccessCallback__ = &__nvoc_up_thunk_RmResource_stdmemAccessCallback, // virtual inherited (rmres) base (mem) + .VirtualMemory.StandardMemory.Memory.__memAccessCallback__ = &__nvoc_up_thunk_RmResource_memAccessCallback, // virtual inherited (rmres) base (rmres) + .VirtualMemory.StandardMemory.Memory.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .VirtualMemory.StandardMemory.Memory.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__vmrangeShareCallback__ = &__nvoc_up_thunk_RmResource_vmrangeShareCallback, // virtual inherited (rmres) base (virtmem) + .VirtualMemory.__virtmemShareCallback__ = &__nvoc_up_thunk_RmResource_virtmemShareCallback, // virtual inherited (rmres) base (stdmem) + .VirtualMemory.StandardMemory.__stdmemShareCallback__ = &__nvoc_up_thunk_RmResource_stdmemShareCallback, // virtual inherited (rmres) base (mem) + .VirtualMemory.StandardMemory.Memory.__memShareCallback__ = &__nvoc_up_thunk_RmResource_memShareCallback, // virtual inherited (rmres) base (rmres) + .VirtualMemory.StandardMemory.Memory.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .VirtualMemory.StandardMemory.Memory.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__vmrangeControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_vmrangeControlSerialization_Prologue, // virtual inherited (rmres) base (virtmem) + .VirtualMemory.__virtmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_virtmemControlSerialization_Prologue, // virtual inherited (rmres) base (stdmem) + .VirtualMemory.StandardMemory.__stdmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_stdmemControlSerialization_Prologue, // virtual inherited (rmres) base (mem) + .VirtualMemory.StandardMemory.Memory.__memControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .VirtualMemory.StandardMemory.Memory.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .VirtualMemory.StandardMemory.Memory.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__vmrangeControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_vmrangeControlSerialization_Epilogue, // virtual inherited (rmres) base (virtmem) + .VirtualMemory.__virtmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_virtmemControlSerialization_Epilogue, // virtual inherited (rmres) base (stdmem) + .VirtualMemory.StandardMemory.__stdmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_stdmemControlSerialization_Epilogue, // virtual inherited (rmres) base (mem) + .VirtualMemory.StandardMemory.Memory.__memControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .VirtualMemory.StandardMemory.Memory.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .VirtualMemory.StandardMemory.Memory.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__vmrangeControl_Prologue__ = &__nvoc_up_thunk_RmResource_vmrangeControl_Prologue, // virtual inherited (rmres) base (virtmem) + .VirtualMemory.__virtmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_virtmemControl_Prologue, // virtual inherited (rmres) base (stdmem) + .VirtualMemory.StandardMemory.__stdmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_stdmemControl_Prologue, // virtual inherited (rmres) base (mem) + .VirtualMemory.StandardMemory.Memory.__memControl_Prologue__ = &__nvoc_up_thunk_RmResource_memControl_Prologue, // virtual inherited (rmres) base (rmres) + .VirtualMemory.StandardMemory.Memory.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .VirtualMemory.StandardMemory.Memory.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__vmrangeControl_Epilogue__ = &__nvoc_up_thunk_RmResource_vmrangeControl_Epilogue, // virtual inherited (rmres) base (virtmem) + .VirtualMemory.__virtmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_virtmemControl_Epilogue, // virtual inherited (rmres) base (stdmem) + .VirtualMemory.StandardMemory.__stdmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_stdmemControl_Epilogue, // virtual inherited (rmres) base (mem) + .VirtualMemory.StandardMemory.Memory.__memControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memControl_Epilogue, // virtual inherited (rmres) base (rmres) + .VirtualMemory.StandardMemory.Memory.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .VirtualMemory.StandardMemory.Memory.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__vmrangePreDestruct__ = &__nvoc_up_thunk_RsResource_vmrangePreDestruct, // virtual inherited (res) base (virtmem) + .VirtualMemory.__virtmemPreDestruct__ = &__nvoc_up_thunk_RsResource_virtmemPreDestruct, // virtual inherited (res) base (stdmem) + .VirtualMemory.StandardMemory.__stdmemPreDestruct__ = &__nvoc_up_thunk_RsResource_stdmemPreDestruct, // virtual inherited (res) base (mem) + .VirtualMemory.StandardMemory.Memory.__memPreDestruct__ = &__nvoc_up_thunk_RsResource_memPreDestruct, // virtual inherited (res) base (rmres) + .VirtualMemory.StandardMemory.Memory.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .VirtualMemory.StandardMemory.Memory.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__vmrangeControlFilter__ = &__nvoc_up_thunk_RsResource_vmrangeControlFilter, // virtual inherited (res) base (virtmem) + .VirtualMemory.__virtmemControlFilter__ = &__nvoc_up_thunk_RsResource_virtmemControlFilter, // virtual inherited (res) base (stdmem) + .VirtualMemory.StandardMemory.__stdmemControlFilter__ = &__nvoc_up_thunk_RsResource_stdmemControlFilter, // virtual inherited (res) base (mem) + .VirtualMemory.StandardMemory.Memory.__memControlFilter__ = &__nvoc_up_thunk_RsResource_memControlFilter, // virtual inherited (res) base (rmres) + .VirtualMemory.StandardMemory.Memory.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .VirtualMemory.StandardMemory.Memory.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__vmrangeGetRefCount__ = &__nvoc_up_thunk_RsResource_vmrangeGetRefCount, // virtual inherited (res) base (virtmem) + .VirtualMemory.__virtmemGetRefCount__ = &__nvoc_up_thunk_RsResource_virtmemGetRefCount, // virtual inherited (res) base (stdmem) + .VirtualMemory.StandardMemory.__stdmemGetRefCount__ = &__nvoc_up_thunk_RsResource_stdmemGetRefCount, // virtual inherited (res) base (mem) + .VirtualMemory.StandardMemory.Memory.__memGetRefCount__ = &__nvoc_up_thunk_RsResource_memGetRefCount, // virtual inherited (res) base (rmres) + .VirtualMemory.StandardMemory.Memory.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .VirtualMemory.StandardMemory.Memory.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__vmrangeAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_vmrangeAddAdditionalDependants, // virtual inherited (res) base (virtmem) + .VirtualMemory.__virtmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_virtmemAddAdditionalDependants, // virtual inherited (res) base (stdmem) + .VirtualMemory.StandardMemory.__stdmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_stdmemAddAdditionalDependants, // virtual inherited (res) base (mem) + .VirtualMemory.StandardMemory.Memory.__memAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memAddAdditionalDependants, // virtual inherited (res) base (rmres) + .VirtualMemory.StandardMemory.Memory.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .VirtualMemory.StandardMemory.Memory.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.VirtualMemory.StandardMemory.Memory.RmResource.RsResource; // (res) super^5 + pThis->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable = &vtable.VirtualMemory.StandardMemory.Memory.RmResource; // (rmres) super^4 + pThis->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable = &vtable.VirtualMemory.StandardMemory.Memory; // (mem) super^3 + pThis->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_vtable = &vtable.VirtualMemory.StandardMemory; // (stdmem) super^2 + pThis->__nvoc_base_VirtualMemory.__nvoc_vtable = &vtable.VirtualMemory; // (virtmem) super + pThis->__nvoc_vtable = &vtable; // (vmrange) this __nvoc_init_funcTable_VirtualMemoryRange_1(pThis); } diff --git a/src/nvidia/generated/g_virt_mem_range_nvoc.h b/src/nvidia/generated/g_virt_mem_range_nvoc.h index 1826297362..7b131f5912 100644 --- a/src/nvidia/generated/g_virt_mem_range_nvoc.h +++ b/src/nvidia/generated/g_virt_mem_range_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -61,10 +61,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__VirtualMemoryRange; + + struct VirtualMemoryRange { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__VirtualMemoryRange *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct VirtualMemory __nvoc_base_VirtualMemory; @@ -78,8 +83,13 @@ struct VirtualMemoryRange { struct StandardMemory *__nvoc_pbase_StandardMemory; // stdmem super^2 struct VirtualMemory *__nvoc_pbase_VirtualMemory; // virtmem super struct VirtualMemoryRange *__nvoc_pbase_VirtualMemoryRange; // vmrange +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__VirtualMemoryRange { + const struct NVOC_VTABLE__VirtualMemory VirtualMemory; // (virtmem) 26 function pointers - // Vtable with 26 per-object function pointers NV_STATUS (*__vmrangeMapTo__)(struct VirtualMemoryRange * /*this*/, struct RS_RES_MAP_TO_PARAMS *); // virtual inherited (virtmem) base (virtmem) NV_STATUS (*__vmrangeUnmapFrom__)(struct VirtualMemoryRange * /*this*/, struct RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (virtmem) base (virtmem) NvBool (*__vmrangeIsPartialUnmapSupported__)(struct VirtualMemoryRange * /*this*/); // inline virtual inherited (virtmem) base (virtmem) body @@ -138,162 +148,162 @@ NV_STATUS __nvoc_objCreate_VirtualMemoryRange(VirtualMemoryRange**, Dynamic*, Nv // Wrapper macros -#define vmrangeMapTo_FNPTR(pVirtualMemory) pVirtualMemory->__nvoc_base_VirtualMemory.__virtmemMapTo__ +#define vmrangeMapTo_FNPTR(pVirtualMemory) pVirtualMemory->__nvoc_base_VirtualMemory.__nvoc_vtable->__virtmemMapTo__ #define vmrangeMapTo(pVirtualMemory, pParams) vmrangeMapTo_DISPATCH(pVirtualMemory, pParams) -#define vmrangeUnmapFrom_FNPTR(pVirtualMemory) pVirtualMemory->__nvoc_base_VirtualMemory.__virtmemUnmapFrom__ +#define vmrangeUnmapFrom_FNPTR(pVirtualMemory) pVirtualMemory->__nvoc_base_VirtualMemory.__nvoc_vtable->__virtmemUnmapFrom__ #define vmrangeUnmapFrom(pVirtualMemory, pParams) vmrangeUnmapFrom_DISPATCH(pVirtualMemory, pParams) -#define vmrangeIsPartialUnmapSupported_FNPTR(pVirtualMemory) pVirtualMemory->__nvoc_base_VirtualMemory.__virtmemIsPartialUnmapSupported__ +#define vmrangeIsPartialUnmapSupported_FNPTR(pVirtualMemory) pVirtualMemory->__nvoc_base_VirtualMemory.__nvoc_vtable->__virtmemIsPartialUnmapSupported__ #define vmrangeIsPartialUnmapSupported(pVirtualMemory) vmrangeIsPartialUnmapSupported_DISPATCH(pVirtualMemory) -#define vmrangeCanCopy_FNPTR(pStandardMemory) pStandardMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__stdmemCanCopy__ +#define vmrangeCanCopy_FNPTR(pStandardMemory) pStandardMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_vtable->__stdmemCanCopy__ #define vmrangeCanCopy(pStandardMemory) vmrangeCanCopy_DISPATCH(pStandardMemory) -#define vmrangeIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsDuplicate__ +#define vmrangeIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memIsDuplicate__ #define vmrangeIsDuplicate(pMemory, hMemory, pDuplicate) vmrangeIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define vmrangeGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMapAddrSpace__ +#define vmrangeGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memGetMapAddrSpace__ #define vmrangeGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) vmrangeGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define vmrangeControl_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memControl__ +#define vmrangeControl_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memControl__ #define vmrangeControl(pMemory, pCallContext, pParams) vmrangeControl_DISPATCH(pMemory, pCallContext, pParams) -#define vmrangeMap_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memMap__ +#define vmrangeMap_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memMap__ #define vmrangeMap(pMemory, pCallContext, pParams, pCpuMapping) vmrangeMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define vmrangeUnmap_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memUnmap__ +#define vmrangeUnmap_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memUnmap__ #define vmrangeUnmap(pMemory, pCallContext, pCpuMapping) vmrangeUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define vmrangeGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMemInterMapParams__ +#define vmrangeGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memGetMemInterMapParams__ #define vmrangeGetMemInterMapParams(pMemory, pParams) vmrangeGetMemInterMapParams_DISPATCH(pMemory, pParams) -#define vmrangeCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define vmrangeCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memCheckMemInterUnmap__ #define vmrangeCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) vmrangeCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define vmrangeGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ +#define vmrangeGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memGetMemoryMappingDescriptor__ #define vmrangeGetMemoryMappingDescriptor(pMemory, ppMemDesc) vmrangeGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define vmrangeCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memCheckCopyPermissions__ +#define vmrangeCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memCheckCopyPermissions__ #define vmrangeCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) vmrangeCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define vmrangeIsReady_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsReady__ +#define vmrangeIsReady_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memIsReady__ #define vmrangeIsReady(pMemory, bCopyConstructorContext) vmrangeIsReady_DISPATCH(pMemory, bCopyConstructorContext) -#define vmrangeIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define vmrangeIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memIsGpuMapAllowed__ #define vmrangeIsGpuMapAllowed(pMemory, pGpu) vmrangeIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define vmrangeIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsExportAllowed__ +#define vmrangeIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memIsExportAllowed__ #define vmrangeIsExportAllowed(pMemory) vmrangeIsExportAllowed_DISPATCH(pMemory) -#define vmrangeAccessCallback_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define vmrangeAccessCallback_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define vmrangeAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) vmrangeAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define vmrangeShareCallback_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define vmrangeShareCallback_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define vmrangeShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) vmrangeShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define vmrangeControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define vmrangeControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define vmrangeControlSerialization_Prologue(pResource, pCallContext, pParams) vmrangeControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define vmrangeControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define vmrangeControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define vmrangeControlSerialization_Epilogue(pResource, pCallContext, pParams) vmrangeControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define vmrangeControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define vmrangeControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define vmrangeControl_Prologue(pResource, pCallContext, pParams) vmrangeControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define vmrangeControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define vmrangeControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define vmrangeControl_Epilogue(pResource, pCallContext, pParams) vmrangeControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define vmrangePreDestruct_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define vmrangePreDestruct_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define vmrangePreDestruct(pResource) vmrangePreDestruct_DISPATCH(pResource) -#define vmrangeControlFilter_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define vmrangeControlFilter_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define vmrangeControlFilter(pResource, pCallContext, pParams) vmrangeControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define vmrangeGetRefCount_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define vmrangeGetRefCount_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define vmrangeGetRefCount(pResource) vmrangeGetRefCount_DISPATCH(pResource) -#define vmrangeAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define vmrangeAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_VirtualMemory.__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define vmrangeAddAdditionalDependants(pClient, pResource, pReference) vmrangeAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NV_STATUS vmrangeMapTo_DISPATCH(struct VirtualMemoryRange *pVirtualMemory, struct RS_RES_MAP_TO_PARAMS *pParams) { - return pVirtualMemory->__vmrangeMapTo__(pVirtualMemory, pParams); + return pVirtualMemory->__nvoc_vtable->__vmrangeMapTo__(pVirtualMemory, pParams); } static inline NV_STATUS vmrangeUnmapFrom_DISPATCH(struct VirtualMemoryRange *pVirtualMemory, struct RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pVirtualMemory->__vmrangeUnmapFrom__(pVirtualMemory, pParams); + return pVirtualMemory->__nvoc_vtable->__vmrangeUnmapFrom__(pVirtualMemory, pParams); } static inline NvBool vmrangeIsPartialUnmapSupported_DISPATCH(struct VirtualMemoryRange *pVirtualMemory) { - return pVirtualMemory->__vmrangeIsPartialUnmapSupported__(pVirtualMemory); + return pVirtualMemory->__nvoc_vtable->__vmrangeIsPartialUnmapSupported__(pVirtualMemory); } static inline NvBool vmrangeCanCopy_DISPATCH(struct VirtualMemoryRange *pStandardMemory) { - return pStandardMemory->__vmrangeCanCopy__(pStandardMemory); + return pStandardMemory->__nvoc_vtable->__vmrangeCanCopy__(pStandardMemory); } static inline NV_STATUS vmrangeIsDuplicate_DISPATCH(struct VirtualMemoryRange *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__vmrangeIsDuplicate__(pMemory, hMemory, pDuplicate); + return pMemory->__nvoc_vtable->__vmrangeIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS vmrangeGetMapAddrSpace_DISPATCH(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pMemory->__vmrangeGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); + return pMemory->__nvoc_vtable->__vmrangeGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS vmrangeControl_DISPATCH(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__vmrangeControl__(pMemory, pCallContext, pParams); + return pMemory->__nvoc_vtable->__vmrangeControl__(pMemory, pCallContext, pParams); } static inline NV_STATUS vmrangeMap_DISPATCH(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__vmrangeMap__(pMemory, pCallContext, pParams, pCpuMapping); + return pMemory->__nvoc_vtable->__vmrangeMap__(pMemory, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS vmrangeUnmap_DISPATCH(struct VirtualMemoryRange *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__vmrangeUnmap__(pMemory, pCallContext, pCpuMapping); + return pMemory->__nvoc_vtable->__vmrangeUnmap__(pMemory, pCallContext, pCpuMapping); } static inline NV_STATUS vmrangeGetMemInterMapParams_DISPATCH(struct VirtualMemoryRange *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__vmrangeGetMemInterMapParams__(pMemory, pParams); + return pMemory->__nvoc_vtable->__vmrangeGetMemInterMapParams__(pMemory, pParams); } static inline NV_STATUS vmrangeCheckMemInterUnmap_DISPATCH(struct VirtualMemoryRange *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__vmrangeCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); + return pMemory->__nvoc_vtable->__vmrangeCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } static inline NV_STATUS vmrangeGetMemoryMappingDescriptor_DISPATCH(struct VirtualMemoryRange *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__vmrangeGetMemoryMappingDescriptor__(pMemory, ppMemDesc); + return pMemory->__nvoc_vtable->__vmrangeGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } static inline NV_STATUS vmrangeCheckCopyPermissions_DISPATCH(struct VirtualMemoryRange *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__vmrangeCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); + return pMemory->__nvoc_vtable->__vmrangeCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } static inline NV_STATUS vmrangeIsReady_DISPATCH(struct VirtualMemoryRange *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__vmrangeIsReady__(pMemory, bCopyConstructorContext); + return pMemory->__nvoc_vtable->__vmrangeIsReady__(pMemory, bCopyConstructorContext); } static inline NvBool vmrangeIsGpuMapAllowed_DISPATCH(struct VirtualMemoryRange *pMemory, struct OBJGPU *pGpu) { - return pMemory->__vmrangeIsGpuMapAllowed__(pMemory, pGpu); + return pMemory->__nvoc_vtable->__vmrangeIsGpuMapAllowed__(pMemory, pGpu); } static inline NvBool vmrangeIsExportAllowed_DISPATCH(struct VirtualMemoryRange *pMemory) { - return pMemory->__vmrangeIsExportAllowed__(pMemory); + return pMemory->__nvoc_vtable->__vmrangeIsExportAllowed__(pMemory); } static inline NvBool vmrangeAccessCallback_DISPATCH(struct VirtualMemoryRange *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__vmrangeAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__vmrangeAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool vmrangeShareCallback_DISPATCH(struct VirtualMemoryRange *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__vmrangeShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__vmrangeShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS vmrangeControlSerialization_Prologue_DISPATCH(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vmrangeControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__vmrangeControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void vmrangeControlSerialization_Epilogue_DISPATCH(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vmrangeControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__vmrangeControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS vmrangeControl_Prologue_DISPATCH(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vmrangeControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__vmrangeControl_Prologue__(pResource, pCallContext, pParams); } static inline void vmrangeControl_Epilogue_DISPATCH(struct VirtualMemoryRange *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__vmrangeControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__vmrangeControl_Epilogue__(pResource, pCallContext, pParams); } static inline void vmrangePreDestruct_DISPATCH(struct VirtualMemoryRange *pResource) { - pResource->__vmrangePreDestruct__(pResource); + pResource->__nvoc_vtable->__vmrangePreDestruct__(pResource); } static inline NV_STATUS vmrangeControlFilter_DISPATCH(struct VirtualMemoryRange *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__vmrangeControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__vmrangeControlFilter__(pResource, pCallContext, pParams); } static inline NvU32 vmrangeGetRefCount_DISPATCH(struct VirtualMemoryRange *pResource) { - return pResource->__vmrangeGetRefCount__(pResource); + return pResource->__nvoc_vtable->__vmrangeGetRefCount__(pResource); } static inline void vmrangeAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VirtualMemoryRange *pResource, RsResourceRef *pReference) { - pResource->__vmrangeAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__vmrangeAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS vmrangeConstruct_IMPL(struct VirtualMemoryRange *arg_pVmRange, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_virtual_mem_nvoc.c b/src/nvidia/generated/g_virtual_mem_nvoc.c index b1324324da..fd0d670cf0 100644 --- a/src/nvidia/generated/g_virtual_mem_nvoc.c +++ b/src/nvidia/generated/g_virtual_mem_nvoc.c @@ -102,138 +102,233 @@ const struct NVOC_CLASS_DEF __nvoc_class_def_VirtualMemory = /*pExportInfo=*/ &__nvoc_export_info_VirtualMemory }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^3 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_down_thunk_Memory_resIsDuplicate(struct RsResource *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resControl(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resMap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_resUnmap(struct RsResource *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemInterMapParams(struct RmResource *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_rmresCheckMemInterUnmap(struct RmResource *pMemory, NvBool bSubdeviceHandleProvided); // super^2 +NV_STATUS __nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor(struct RmResource *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super^2 +NvBool __nvoc_down_thunk_StandardMemory_resCanCopy(struct RsResource *pStandardMemory); // super +NV_STATUS __nvoc_down_thunk_VirtualMemory_resMapTo(struct RsResource *pVirtualMemory, struct RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_down_thunk_VirtualMemory_resUnmapFrom(struct RsResource *pVirtualMemory, struct RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvBool __nvoc_down_thunk_VirtualMemory_resIsPartialUnmapSupported(struct RsResource *pVirtualMemory); // this + // 3 down-thunk(s) defined to bridge methods in VirtualMemory from superclasses // virtmemMapTo: virtual override (res) base (stdmem) -static NV_STATUS __nvoc_down_thunk_VirtualMemory_resMapTo(struct RsResource *pVirtualMemory, struct RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_down_thunk_VirtualMemory_resMapTo(struct RsResource *pVirtualMemory, struct RS_RES_MAP_TO_PARAMS *pParams) { return virtmemMapTo((struct VirtualMemory *)(((unsigned char *) pVirtualMemory) - __nvoc_rtti_VirtualMemory_RsResource.offset), pParams); } // virtmemUnmapFrom: virtual override (res) base (stdmem) -static NV_STATUS __nvoc_down_thunk_VirtualMemory_resUnmapFrom(struct RsResource *pVirtualMemory, struct RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_down_thunk_VirtualMemory_resUnmapFrom(struct RsResource *pVirtualMemory, struct RS_RES_UNMAP_FROM_PARAMS *pParams) { return virtmemUnmapFrom((struct VirtualMemory *)(((unsigned char *) pVirtualMemory) - __nvoc_rtti_VirtualMemory_RsResource.offset), pParams); } // virtmemIsPartialUnmapSupported: inline virtual override (res) base (stdmem) body -static NvBool __nvoc_down_thunk_VirtualMemory_resIsPartialUnmapSupported(struct RsResource *pVirtualMemory) { +NvBool __nvoc_down_thunk_VirtualMemory_resIsPartialUnmapSupported(struct RsResource *pVirtualMemory) { return virtmemIsPartialUnmapSupported((struct VirtualMemory *)(((unsigned char *) pVirtualMemory) - __nvoc_rtti_VirtualMemory_RsResource.offset)); } +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^3 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^3 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^3 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^3 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^3 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^3 +NvBool __nvoc_up_thunk_RmResource_memAccessCallback(struct Memory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_up_thunk_RmResource_memShareCallback(struct Memory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_memControlSerialization_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_memControlSerialization_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RmResource_memControl_Prologue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_up_thunk_RmResource_memControl_Epilogue(struct Memory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_memCanCopy(struct Memory *pResource); // super^2 +void __nvoc_up_thunk_RsResource_memPreDestruct(struct Memory *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_memControlFilter(struct Memory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NvBool __nvoc_up_thunk_RsResource_memIsPartialUnmapSupported(struct Memory *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_memMapTo(struct Memory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_memUnmapFrom(struct Memory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_memGetRefCount(struct Memory *pResource); // super^2 +void __nvoc_up_thunk_RsResource_memAddAdditionalDependants(struct RsClient *pClient, struct Memory *pResource, RsResourceRef *pReference); // super^2 +NV_STATUS __nvoc_up_thunk_Memory_stdmemIsDuplicate(struct StandardMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMapAddrSpace(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemControl(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemMap(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemUnmap(struct StandardMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMemInterMapParams(struct StandardMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemCheckMemInterUnmap(struct StandardMemory *pMemory, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemGetMemoryMappingDescriptor(struct StandardMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemCheckCopyPermissions(struct StandardMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // super +NV_STATUS __nvoc_up_thunk_Memory_stdmemIsReady(struct StandardMemory *pMemory, NvBool bCopyConstructorContext); // super +NvBool __nvoc_up_thunk_Memory_stdmemIsGpuMapAllowed(struct StandardMemory *pMemory, struct OBJGPU *pGpu); // super +NvBool __nvoc_up_thunk_Memory_stdmemIsExportAllowed(struct StandardMemory *pMemory); // super +NvBool __nvoc_up_thunk_RmResource_stdmemAccessCallback(struct StandardMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NvBool __nvoc_up_thunk_RmResource_stdmemShareCallback(struct StandardMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super +NV_STATUS __nvoc_up_thunk_RmResource_stdmemControlSerialization_Prologue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_stdmemControlSerialization_Epilogue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_stdmemControl_Prologue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_stdmemControl_Epilogue(struct StandardMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RsResource_stdmemPreDestruct(struct StandardMemory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_stdmemControlFilter(struct StandardMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_stdmemIsPartialUnmapSupported(struct StandardMemory *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_stdmemMapTo(struct StandardMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_stdmemUnmapFrom(struct StandardMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_stdmemGetRefCount(struct StandardMemory *pResource); // super +void __nvoc_up_thunk_RsResource_stdmemAddAdditionalDependants(struct RsClient *pClient, struct StandardMemory *pResource, RsResourceRef *pReference); // super +NvBool __nvoc_up_thunk_StandardMemory_virtmemCanCopy(struct VirtualMemory *pStandardMemory); // this +NV_STATUS __nvoc_up_thunk_Memory_virtmemIsDuplicate(struct VirtualMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate); // this +NV_STATUS __nvoc_up_thunk_Memory_virtmemGetMapAddrSpace(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_Memory_virtmemControl(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_virtmemMap(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_virtmemUnmap(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_Memory_virtmemGetMemInterMapParams(struct VirtualMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_Memory_virtmemCheckMemInterUnmap(struct VirtualMemory *pMemory, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_Memory_virtmemGetMemoryMappingDescriptor(struct VirtualMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_Memory_virtmemCheckCopyPermissions(struct VirtualMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice); // this +NV_STATUS __nvoc_up_thunk_Memory_virtmemIsReady(struct VirtualMemory *pMemory, NvBool bCopyConstructorContext); // this +NvBool __nvoc_up_thunk_Memory_virtmemIsGpuMapAllowed(struct VirtualMemory *pMemory, struct OBJGPU *pGpu); // this +NvBool __nvoc_up_thunk_Memory_virtmemIsExportAllowed(struct VirtualMemory *pMemory); // this +NvBool __nvoc_up_thunk_RmResource_virtmemAccessCallback(struct VirtualMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NvBool __nvoc_up_thunk_RmResource_virtmemShareCallback(struct VirtualMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_RmResource_virtmemControlSerialization_Prologue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_virtmemControlSerialization_Epilogue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_virtmemControl_Prologue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_virtmemControl_Epilogue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RsResource_virtmemPreDestruct(struct VirtualMemory *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_virtmemControlFilter(struct VirtualMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_virtmemGetRefCount(struct VirtualMemory *pResource); // this +void __nvoc_up_thunk_RsResource_virtmemAddAdditionalDependants(struct RsClient *pClient, struct VirtualMemory *pResource, RsResourceRef *pReference); // this + // 23 up-thunk(s) defined to bridge methods in VirtualMemory to superclasses // virtmemCanCopy: virtual inherited (stdmem) base (stdmem) -static NvBool __nvoc_up_thunk_StandardMemory_virtmemCanCopy(struct VirtualMemory *pStandardMemory) { +NvBool __nvoc_up_thunk_StandardMemory_virtmemCanCopy(struct VirtualMemory *pStandardMemory) { return stdmemCanCopy((struct StandardMemory *)(((unsigned char *) pStandardMemory) + __nvoc_rtti_VirtualMemory_StandardMemory.offset)); } // virtmemIsDuplicate: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_virtmemIsDuplicate(struct VirtualMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_Memory_virtmemIsDuplicate(struct VirtualMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { return memIsDuplicate((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), hMemory, pDuplicate); } // virtmemGetMapAddrSpace: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_virtmemGetMapAddrSpace(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_Memory_virtmemGetMapAddrSpace(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return memGetMapAddrSpace((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace); } // virtmemControl: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_virtmemControl(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_virtmemControl(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return memControl((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), pCallContext, pParams); } // virtmemMap: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_virtmemMap(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_virtmemMap(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { return memMap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), pCallContext, pParams, pCpuMapping); } // virtmemUnmap: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_virtmemUnmap(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_Memory_virtmemUnmap(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { return memUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), pCallContext, pCpuMapping); } // virtmemGetMemInterMapParams: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_virtmemGetMemInterMapParams(struct VirtualMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_Memory_virtmemGetMemInterMapParams(struct VirtualMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return memGetMemInterMapParams((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), pParams); } // virtmemCheckMemInterUnmap: inline virtual inherited (mem) base (stdmem) body -static NV_STATUS __nvoc_up_thunk_Memory_virtmemCheckMemInterUnmap(struct VirtualMemory *pMemory, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_Memory_virtmemCheckMemInterUnmap(struct VirtualMemory *pMemory, NvBool bSubdeviceHandleProvided) { return memCheckMemInterUnmap((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), bSubdeviceHandleProvided); } // virtmemGetMemoryMappingDescriptor: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_virtmemGetMemoryMappingDescriptor(struct VirtualMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_Memory_virtmemGetMemoryMappingDescriptor(struct VirtualMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), ppMemDesc); } // virtmemCheckCopyPermissions: inline virtual inherited (mem) base (stdmem) body -static NV_STATUS __nvoc_up_thunk_Memory_virtmemCheckCopyPermissions(struct VirtualMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { +NV_STATUS __nvoc_up_thunk_Memory_virtmemCheckCopyPermissions(struct VirtualMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { return memCheckCopyPermissions((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), pDstGpu, pDstDevice); } // virtmemIsReady: virtual inherited (mem) base (stdmem) -static NV_STATUS __nvoc_up_thunk_Memory_virtmemIsReady(struct VirtualMemory *pMemory, NvBool bCopyConstructorContext) { +NV_STATUS __nvoc_up_thunk_Memory_virtmemIsReady(struct VirtualMemory *pMemory, NvBool bCopyConstructorContext) { return memIsReady((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), bCopyConstructorContext); } // virtmemIsGpuMapAllowed: inline virtual inherited (mem) base (stdmem) body -static NvBool __nvoc_up_thunk_Memory_virtmemIsGpuMapAllowed(struct VirtualMemory *pMemory, struct OBJGPU *pGpu) { +NvBool __nvoc_up_thunk_Memory_virtmemIsGpuMapAllowed(struct VirtualMemory *pMemory, struct OBJGPU *pGpu) { return memIsGpuMapAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset), pGpu); } // virtmemIsExportAllowed: inline virtual inherited (mem) base (stdmem) body -static NvBool __nvoc_up_thunk_Memory_virtmemIsExportAllowed(struct VirtualMemory *pMemory) { +NvBool __nvoc_up_thunk_Memory_virtmemIsExportAllowed(struct VirtualMemory *pMemory) { return memIsExportAllowed((struct Memory *)(((unsigned char *) pMemory) + __nvoc_rtti_VirtualMemory_Memory.offset)); } // virtmemAccessCallback: virtual inherited (rmres) base (stdmem) -static NvBool __nvoc_up_thunk_RmResource_virtmemAccessCallback(struct VirtualMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_virtmemAccessCallback(struct VirtualMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // virtmemShareCallback: virtual inherited (rmres) base (stdmem) -static NvBool __nvoc_up_thunk_RmResource_virtmemShareCallback(struct VirtualMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_RmResource_virtmemShareCallback(struct VirtualMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return rmresShareCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // virtmemControlSerialization_Prologue: virtual inherited (rmres) base (stdmem) -static NV_STATUS __nvoc_up_thunk_RmResource_virtmemControlSerialization_Prologue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_virtmemControlSerialization_Prologue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemory_RmResource.offset), pCallContext, pParams); } // virtmemControlSerialization_Epilogue: virtual inherited (rmres) base (stdmem) -static void __nvoc_up_thunk_RmResource_virtmemControlSerialization_Epilogue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_virtmemControlSerialization_Epilogue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemory_RmResource.offset), pCallContext, pParams); } // virtmemControl_Prologue: virtual inherited (rmres) base (stdmem) -static NV_STATUS __nvoc_up_thunk_RmResource_virtmemControl_Prologue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_virtmemControl_Prologue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemory_RmResource.offset), pCallContext, pParams); } // virtmemControl_Epilogue: virtual inherited (rmres) base (stdmem) -static void __nvoc_up_thunk_RmResource_virtmemControl_Epilogue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_virtmemControl_Epilogue(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemory_RmResource.offset), pCallContext, pParams); } // virtmemPreDestruct: virtual inherited (res) base (stdmem) -static void __nvoc_up_thunk_RsResource_virtmemPreDestruct(struct VirtualMemory *pResource) { +void __nvoc_up_thunk_RsResource_virtmemPreDestruct(struct VirtualMemory *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemory_RsResource.offset)); } // virtmemControlFilter: virtual inherited (res) base (stdmem) -static NV_STATUS __nvoc_up_thunk_RsResource_virtmemControlFilter(struct VirtualMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_virtmemControlFilter(struct VirtualMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemory_RsResource.offset), pCallContext, pParams); } // virtmemGetRefCount: virtual inherited (res) base (stdmem) -static NvU32 __nvoc_up_thunk_RsResource_virtmemGetRefCount(struct VirtualMemory *pResource) { +NvU32 __nvoc_up_thunk_RsResource_virtmemGetRefCount(struct VirtualMemory *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemory_RsResource.offset)); } // virtmemAddAdditionalDependants: virtual inherited (res) base (stdmem) -static void __nvoc_up_thunk_RsResource_virtmemAddAdditionalDependants(struct RsClient *pClient, struct VirtualMemory *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_virtmemAddAdditionalDependants(struct RsClient *pClient, struct VirtualMemory *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_VirtualMemory_RsResource.offset), pReference); } @@ -277,94 +372,139 @@ NV_STATUS __nvoc_ctor_VirtualMemory(VirtualMemory *pThis, CALL_CONTEXT * arg_pCa // Vtable initialization static void __nvoc_init_funcTable_VirtualMemory_1(VirtualMemory *pThis) { PORT_UNREFERENCED_VARIABLE(pThis); - - // virtmemMapTo -- virtual override (res) base (stdmem) - pThis->__virtmemMapTo__ = &virtmemMapTo_IMPL; - pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ = &__nvoc_down_thunk_VirtualMemory_resMapTo; - - // virtmemUnmapFrom -- virtual override (res) base (stdmem) - pThis->__virtmemUnmapFrom__ = &virtmemUnmapFrom_IMPL; - pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ = &__nvoc_down_thunk_VirtualMemory_resUnmapFrom; - - // virtmemIsPartialUnmapSupported -- inline virtual override (res) base (stdmem) body - pThis->__virtmemIsPartialUnmapSupported__ = &virtmemIsPartialUnmapSupported_0c883b; - pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ = &__nvoc_down_thunk_VirtualMemory_resIsPartialUnmapSupported; - - // virtmemCanCopy -- virtual inherited (stdmem) base (stdmem) - pThis->__virtmemCanCopy__ = &__nvoc_up_thunk_StandardMemory_virtmemCanCopy; - - // virtmemIsDuplicate -- virtual inherited (mem) base (stdmem) - pThis->__virtmemIsDuplicate__ = &__nvoc_up_thunk_Memory_virtmemIsDuplicate; - - // virtmemGetMapAddrSpace -- virtual inherited (mem) base (stdmem) - pThis->__virtmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_virtmemGetMapAddrSpace; - - // virtmemControl -- virtual inherited (mem) base (stdmem) - pThis->__virtmemControl__ = &__nvoc_up_thunk_Memory_virtmemControl; - - // virtmemMap -- virtual inherited (mem) base (stdmem) - pThis->__virtmemMap__ = &__nvoc_up_thunk_Memory_virtmemMap; - - // virtmemUnmap -- virtual inherited (mem) base (stdmem) - pThis->__virtmemUnmap__ = &__nvoc_up_thunk_Memory_virtmemUnmap; - - // virtmemGetMemInterMapParams -- virtual inherited (mem) base (stdmem) - pThis->__virtmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_virtmemGetMemInterMapParams; - - // virtmemCheckMemInterUnmap -- inline virtual inherited (mem) base (stdmem) body - pThis->__virtmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_virtmemCheckMemInterUnmap; - - // virtmemGetMemoryMappingDescriptor -- virtual inherited (mem) base (stdmem) - pThis->__virtmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_virtmemGetMemoryMappingDescriptor; - - // virtmemCheckCopyPermissions -- inline virtual inherited (mem) base (stdmem) body - pThis->__virtmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_virtmemCheckCopyPermissions; - - // virtmemIsReady -- virtual inherited (mem) base (stdmem) - pThis->__virtmemIsReady__ = &__nvoc_up_thunk_Memory_virtmemIsReady; - - // virtmemIsGpuMapAllowed -- inline virtual inherited (mem) base (stdmem) body - pThis->__virtmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_virtmemIsGpuMapAllowed; - - // virtmemIsExportAllowed -- inline virtual inherited (mem) base (stdmem) body - pThis->__virtmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_virtmemIsExportAllowed; - - // virtmemAccessCallback -- virtual inherited (rmres) base (stdmem) - pThis->__virtmemAccessCallback__ = &__nvoc_up_thunk_RmResource_virtmemAccessCallback; - - // virtmemShareCallback -- virtual inherited (rmres) base (stdmem) - pThis->__virtmemShareCallback__ = &__nvoc_up_thunk_RmResource_virtmemShareCallback; - - // virtmemControlSerialization_Prologue -- virtual inherited (rmres) base (stdmem) - pThis->__virtmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_virtmemControlSerialization_Prologue; - - // virtmemControlSerialization_Epilogue -- virtual inherited (rmres) base (stdmem) - pThis->__virtmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_virtmemControlSerialization_Epilogue; - - // virtmemControl_Prologue -- virtual inherited (rmres) base (stdmem) - pThis->__virtmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_virtmemControl_Prologue; - - // virtmemControl_Epilogue -- virtual inherited (rmres) base (stdmem) - pThis->__virtmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_virtmemControl_Epilogue; - - // virtmemPreDestruct -- virtual inherited (res) base (stdmem) - pThis->__virtmemPreDestruct__ = &__nvoc_up_thunk_RsResource_virtmemPreDestruct; - - // virtmemControlFilter -- virtual inherited (res) base (stdmem) - pThis->__virtmemControlFilter__ = &__nvoc_up_thunk_RsResource_virtmemControlFilter; - - // virtmemGetRefCount -- virtual inherited (res) base (stdmem) - pThis->__virtmemGetRefCount__ = &__nvoc_up_thunk_RsResource_virtmemGetRefCount; - - // virtmemAddAdditionalDependants -- virtual inherited (res) base (stdmem) - pThis->__virtmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_virtmemAddAdditionalDependants; -} // End __nvoc_init_funcTable_VirtualMemory_1 with approximately 29 basic block(s). +} // End __nvoc_init_funcTable_VirtualMemory_1 // Initialize vtable(s) for 26 virtual method(s). void __nvoc_init_funcTable_VirtualMemory(VirtualMemory *pThis) { - // Initialize vtable(s) with 26 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__VirtualMemory vtable = { + .__virtmemMapTo__ = &virtmemMapTo_IMPL, // virtual override (res) base (stdmem) + .StandardMemory.__stdmemMapTo__ = &__nvoc_up_thunk_RsResource_stdmemMapTo, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memMapTo__ = &__nvoc_up_thunk_RsResource_memMapTo, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resMapTo__ = &__nvoc_down_thunk_VirtualMemory_resMapTo, // virtual + .__virtmemUnmapFrom__ = &virtmemUnmapFrom_IMPL, // virtual override (res) base (stdmem) + .StandardMemory.__stdmemUnmapFrom__ = &__nvoc_up_thunk_RsResource_stdmemUnmapFrom, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memUnmapFrom__ = &__nvoc_up_thunk_RsResource_memUnmapFrom, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resUnmapFrom__ = &__nvoc_down_thunk_VirtualMemory_resUnmapFrom, // virtual + .__virtmemIsPartialUnmapSupported__ = &virtmemIsPartialUnmapSupported_e661f0, // inline virtual override (res) base (stdmem) body + .StandardMemory.__stdmemIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_stdmemIsPartialUnmapSupported, // inline virtual inherited (res) base (mem) body + .StandardMemory.Memory.__memIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_memIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .StandardMemory.Memory.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .StandardMemory.Memory.RmResource.RsResource.__resIsPartialUnmapSupported__ = &__nvoc_down_thunk_VirtualMemory_resIsPartialUnmapSupported, // inline virtual body + .__virtmemCanCopy__ = &__nvoc_up_thunk_StandardMemory_virtmemCanCopy, // virtual inherited (stdmem) base (stdmem) + .StandardMemory.__stdmemCanCopy__ = &stdmemCanCopy_IMPL, // virtual override (res) base (mem) + .StandardMemory.Memory.__memCanCopy__ = &__nvoc_up_thunk_RsResource_memCanCopy, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resCanCopy__ = &__nvoc_down_thunk_StandardMemory_resCanCopy, // virtual + .__virtmemIsDuplicate__ = &__nvoc_up_thunk_Memory_virtmemIsDuplicate, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemIsDuplicate__ = &__nvoc_up_thunk_Memory_stdmemIsDuplicate, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memIsDuplicate__ = &memIsDuplicate_IMPL, // virtual override (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resIsDuplicate__ = &__nvoc_down_thunk_Memory_resIsDuplicate, // virtual + .__virtmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_virtmemGetMapAddrSpace, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemGetMapAddrSpace__ = &__nvoc_up_thunk_Memory_stdmemGetMapAddrSpace, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memGetMapAddrSpace__ = &memGetMapAddrSpace_IMPL, // virtual + .__virtmemControl__ = &__nvoc_up_thunk_Memory_virtmemControl, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemControl__ = &__nvoc_up_thunk_Memory_stdmemControl, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memControl__ = &memControl_IMPL, // virtual override (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_Memory_resControl, // virtual + .__virtmemMap__ = &__nvoc_up_thunk_Memory_virtmemMap, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemMap__ = &__nvoc_up_thunk_Memory_stdmemMap, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memMap__ = &memMap_IMPL, // virtual override (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_Memory_resMap, // virtual + .__virtmemUnmap__ = &__nvoc_up_thunk_Memory_virtmemUnmap, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemUnmap__ = &__nvoc_up_thunk_Memory_stdmemUnmap, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memUnmap__ = &memUnmap_IMPL, // virtual override (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_Memory_resUnmap, // virtual + .__virtmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_virtmemGetMemInterMapParams, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemGetMemInterMapParams__ = &__nvoc_up_thunk_Memory_stdmemGetMemInterMapParams, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memGetMemInterMapParams__ = &memGetMemInterMapParams_IMPL, // virtual override (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresGetMemInterMapParams__ = &__nvoc_down_thunk_Memory_rmresGetMemInterMapParams, // virtual + .__virtmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_virtmemCheckMemInterUnmap, // inline virtual inherited (mem) base (stdmem) body + .StandardMemory.__stdmemCheckMemInterUnmap__ = &__nvoc_up_thunk_Memory_stdmemCheckMemInterUnmap, // inline virtual inherited (mem) base (mem) body + .StandardMemory.Memory.__memCheckMemInterUnmap__ = &memCheckMemInterUnmap_ac1694, // inline virtual override (rmres) base (rmres) body + .StandardMemory.Memory.RmResource.__rmresCheckMemInterUnmap__ = &__nvoc_down_thunk_Memory_rmresCheckMemInterUnmap, // virtual + .__virtmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_virtmemGetMemoryMappingDescriptor, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_Memory_stdmemGetMemoryMappingDescriptor, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memGetMemoryMappingDescriptor__ = &memGetMemoryMappingDescriptor_IMPL, // virtual override (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresGetMemoryMappingDescriptor__ = &__nvoc_down_thunk_Memory_rmresGetMemoryMappingDescriptor, // virtual + .__virtmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_virtmemCheckCopyPermissions, // inline virtual inherited (mem) base (stdmem) body + .StandardMemory.__stdmemCheckCopyPermissions__ = &__nvoc_up_thunk_Memory_stdmemCheckCopyPermissions, // inline virtual inherited (mem) base (mem) body + .StandardMemory.Memory.__memCheckCopyPermissions__ = &memCheckCopyPermissions_ac1694, // inline virtual body + .__virtmemIsReady__ = &__nvoc_up_thunk_Memory_virtmemIsReady, // virtual inherited (mem) base (stdmem) + .StandardMemory.__stdmemIsReady__ = &__nvoc_up_thunk_Memory_stdmemIsReady, // virtual inherited (mem) base (mem) + .StandardMemory.Memory.__memIsReady__ = &memIsReady_IMPL, // virtual + .__virtmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_virtmemIsGpuMapAllowed, // inline virtual inherited (mem) base (stdmem) body + .StandardMemory.__stdmemIsGpuMapAllowed__ = &__nvoc_up_thunk_Memory_stdmemIsGpuMapAllowed, // inline virtual inherited (mem) base (mem) body + .StandardMemory.Memory.__memIsGpuMapAllowed__ = &memIsGpuMapAllowed_e661f0, // inline virtual body + .__virtmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_virtmemIsExportAllowed, // inline virtual inherited (mem) base (stdmem) body + .StandardMemory.__stdmemIsExportAllowed__ = &__nvoc_up_thunk_Memory_stdmemIsExportAllowed, // inline virtual inherited (mem) base (mem) body + .StandardMemory.Memory.__memIsExportAllowed__ = &memIsExportAllowed_e661f0, // inline virtual body + .__virtmemAccessCallback__ = &__nvoc_up_thunk_RmResource_virtmemAccessCallback, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemAccessCallback__ = &__nvoc_up_thunk_RmResource_stdmemAccessCallback, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memAccessCallback__ = &__nvoc_up_thunk_RmResource_memAccessCallback, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__virtmemShareCallback__ = &__nvoc_up_thunk_RmResource_virtmemShareCallback, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemShareCallback__ = &__nvoc_up_thunk_RmResource_stdmemShareCallback, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memShareCallback__ = &__nvoc_up_thunk_RmResource_memShareCallback, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresShareCallback__ = &rmresShareCallback_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__virtmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_virtmemControlSerialization_Prologue, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_stdmemControlSerialization_Prologue, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__virtmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_virtmemControlSerialization_Epilogue, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_stdmemControlSerialization_Epilogue, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_memControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__virtmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_virtmemControl_Prologue, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemControl_Prologue__ = &__nvoc_up_thunk_RmResource_stdmemControl_Prologue, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memControl_Prologue__ = &__nvoc_up_thunk_RmResource_memControl_Prologue, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__virtmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_virtmemControl_Epilogue, // virtual inherited (rmres) base (stdmem) + .StandardMemory.__stdmemControl_Epilogue__ = &__nvoc_up_thunk_RmResource_stdmemControl_Epilogue, // virtual inherited (rmres) base (mem) + .StandardMemory.Memory.__memControl_Epilogue__ = &__nvoc_up_thunk_RmResource_memControl_Epilogue, // virtual inherited (rmres) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__virtmemPreDestruct__ = &__nvoc_up_thunk_RsResource_virtmemPreDestruct, // virtual inherited (res) base (stdmem) + .StandardMemory.__stdmemPreDestruct__ = &__nvoc_up_thunk_RsResource_stdmemPreDestruct, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memPreDestruct__ = &__nvoc_up_thunk_RsResource_memPreDestruct, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__virtmemControlFilter__ = &__nvoc_up_thunk_RsResource_virtmemControlFilter, // virtual inherited (res) base (stdmem) + .StandardMemory.__stdmemControlFilter__ = &__nvoc_up_thunk_RsResource_stdmemControlFilter, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memControlFilter__ = &__nvoc_up_thunk_RsResource_memControlFilter, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__virtmemGetRefCount__ = &__nvoc_up_thunk_RsResource_virtmemGetRefCount, // virtual inherited (res) base (stdmem) + .StandardMemory.__stdmemGetRefCount__ = &__nvoc_up_thunk_RsResource_stdmemGetRefCount, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memGetRefCount__ = &__nvoc_up_thunk_RsResource_memGetRefCount, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__virtmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_virtmemAddAdditionalDependants, // virtual inherited (res) base (stdmem) + .StandardMemory.__stdmemAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_stdmemAddAdditionalDependants, // virtual inherited (res) base (mem) + .StandardMemory.Memory.__memAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_memAddAdditionalDependants, // virtual inherited (res) base (rmres) + .StandardMemory.Memory.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .StandardMemory.Memory.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.StandardMemory.Memory.RmResource.RsResource; // (res) super^4 + pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable = &vtable.StandardMemory.Memory.RmResource; // (rmres) super^3 + pThis->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable = &vtable.StandardMemory.Memory; // (mem) super^2 + pThis->__nvoc_base_StandardMemory.__nvoc_vtable = &vtable.StandardMemory; // (stdmem) super + pThis->__nvoc_vtable = &vtable; // (virtmem) this __nvoc_init_funcTable_VirtualMemory_1(pThis); } diff --git a/src/nvidia/generated/g_virtual_mem_nvoc.h b/src/nvidia/generated/g_virtual_mem_nvoc.h index f4f058c8e3..4d8fa3a33c 100644 --- a/src/nvidia/generated/g_virtual_mem_nvoc.h +++ b/src/nvidia/generated/g_virtual_mem_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -64,10 +64,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__VirtualMemory; + + struct VirtualMemory { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__VirtualMemory *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct StandardMemory __nvoc_base_StandardMemory; @@ -81,7 +86,21 @@ struct VirtualMemory { struct StandardMemory *__nvoc_pbase_StandardMemory; // stdmem super struct VirtualMemory *__nvoc_pbase_VirtualMemory; // virtmem - // Vtable with 26 per-object function pointers + // Data members + NvHandle hVASpace; + NvBool bAllowUnicastMapping; + NvBool bReserveVaOnAlloc; + NvBool bFlaVAS; + NvBool bRpcAlloc; + NODE *pDmaMappingList; + NvBool bOptimizePageTableMempoolUsage; +}; + + +// Metadata including vtable with 26 function pointers plus superclass metadata +struct NVOC_VTABLE__VirtualMemory { + const struct NVOC_VTABLE__StandardMemory StandardMemory; // (stdmem) 26 function pointers + NV_STATUS (*__virtmemMapTo__)(struct VirtualMemory * /*this*/, struct RS_RES_MAP_TO_PARAMS *); // virtual override (res) base (stdmem) NV_STATUS (*__virtmemUnmapFrom__)(struct VirtualMemory * /*this*/, struct RS_RES_UNMAP_FROM_PARAMS *); // virtual override (res) base (stdmem) NvBool (*__virtmemIsPartialUnmapSupported__)(struct VirtualMemory * /*this*/); // inline virtual override (res) base (stdmem) body @@ -108,15 +127,6 @@ struct VirtualMemory { NV_STATUS (*__virtmemControlFilter__)(struct VirtualMemory * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (res) base (stdmem) NvU32 (*__virtmemGetRefCount__)(struct VirtualMemory * /*this*/); // virtual inherited (res) base (stdmem) void (*__virtmemAddAdditionalDependants__)(struct RsClient *, struct VirtualMemory * /*this*/, RsResourceRef *); // virtual inherited (res) base (stdmem) - - // Data members - NvHandle hVASpace; - NvBool bAllowUnicastMapping; - NvBool bReserveVaOnAlloc; - NvBool bFlaVAS; - NvBool bRpcAlloc; - NODE *pDmaMappingList; - NvBool bOptimizePageTableMempoolUsage; }; #ifndef __NVOC_CLASS_VirtualMemory_TYPEDEF__ @@ -149,170 +159,170 @@ NV_STATUS __nvoc_objCreate_VirtualMemory(VirtualMemory**, Dynamic*, NvU32, CALL_ // Wrapper macros -#define virtmemMapTo_FNPTR(pVirtualMemory) pVirtualMemory->__virtmemMapTo__ +#define virtmemMapTo_FNPTR(pVirtualMemory) pVirtualMemory->__nvoc_vtable->__virtmemMapTo__ #define virtmemMapTo(pVirtualMemory, pParams) virtmemMapTo_DISPATCH(pVirtualMemory, pParams) -#define virtmemUnmapFrom_FNPTR(pVirtualMemory) pVirtualMemory->__virtmemUnmapFrom__ +#define virtmemUnmapFrom_FNPTR(pVirtualMemory) pVirtualMemory->__nvoc_vtable->__virtmemUnmapFrom__ #define virtmemUnmapFrom(pVirtualMemory, pParams) virtmemUnmapFrom_DISPATCH(pVirtualMemory, pParams) -#define virtmemIsPartialUnmapSupported_FNPTR(pVirtualMemory) pVirtualMemory->__virtmemIsPartialUnmapSupported__ +#define virtmemIsPartialUnmapSupported_FNPTR(pVirtualMemory) pVirtualMemory->__nvoc_vtable->__virtmemIsPartialUnmapSupported__ #define virtmemIsPartialUnmapSupported(pVirtualMemory) virtmemIsPartialUnmapSupported_DISPATCH(pVirtualMemory) -#define virtmemCanCopy_FNPTR(pStandardMemory) pStandardMemory->__nvoc_base_StandardMemory.__stdmemCanCopy__ +#define virtmemCanCopy_FNPTR(pStandardMemory) pStandardMemory->__nvoc_base_StandardMemory.__nvoc_vtable->__stdmemCanCopy__ #define virtmemCanCopy(pStandardMemory) virtmemCanCopy_DISPATCH(pStandardMemory) -#define virtmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsDuplicate__ +#define virtmemIsDuplicate_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memIsDuplicate__ #define virtmemIsDuplicate(pMemory, hMemory, pDuplicate) virtmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate) -#define virtmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMapAddrSpace__ +#define virtmemGetMapAddrSpace_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memGetMapAddrSpace__ #define virtmemGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) virtmemGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace) -#define virtmemControl_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memControl__ +#define virtmemControl_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memControl__ #define virtmemControl(pMemory, pCallContext, pParams) virtmemControl_DISPATCH(pMemory, pCallContext, pParams) -#define virtmemMap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memMap__ +#define virtmemMap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memMap__ #define virtmemMap(pMemory, pCallContext, pParams, pCpuMapping) virtmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping) -#define virtmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memUnmap__ +#define virtmemUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memUnmap__ #define virtmemUnmap(pMemory, pCallContext, pCpuMapping) virtmemUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping) -#define virtmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMemInterMapParams__ +#define virtmemGetMemInterMapParams_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memGetMemInterMapParams__ #define virtmemGetMemInterMapParams(pMemory, pParams) virtmemGetMemInterMapParams_DISPATCH(pMemory, pParams) -#define virtmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memCheckMemInterUnmap__ +#define virtmemCheckMemInterUnmap_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memCheckMemInterUnmap__ #define virtmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) virtmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided) -#define virtmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memGetMemoryMappingDescriptor__ +#define virtmemGetMemoryMappingDescriptor_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memGetMemoryMappingDescriptor__ #define virtmemGetMemoryMappingDescriptor(pMemory, ppMemDesc) virtmemGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc) -#define virtmemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memCheckCopyPermissions__ +#define virtmemCheckCopyPermissions_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memCheckCopyPermissions__ #define virtmemCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) virtmemCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice) -#define virtmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsReady__ +#define virtmemIsReady_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memIsReady__ #define virtmemIsReady(pMemory, bCopyConstructorContext) virtmemIsReady_DISPATCH(pMemory, bCopyConstructorContext) -#define virtmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsGpuMapAllowed__ +#define virtmemIsGpuMapAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memIsGpuMapAllowed__ #define virtmemIsGpuMapAllowed(pMemory, pGpu) virtmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu) -#define virtmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__memIsExportAllowed__ +#define virtmemIsExportAllowed_FNPTR(pMemory) pMemory->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_vtable->__memIsExportAllowed__ #define virtmemIsExportAllowed(pMemory) virtmemIsExportAllowed_DISPATCH(pMemory) -#define virtmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresAccessCallback__ +#define virtmemAccessCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define virtmemAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) virtmemAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define virtmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresShareCallback__ +#define virtmemShareCallback_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresShareCallback__ #define virtmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) virtmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy) -#define virtmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define virtmemControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define virtmemControlSerialization_Prologue(pResource, pCallContext, pParams) virtmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define virtmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define virtmemControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define virtmemControlSerialization_Epilogue(pResource, pCallContext, pParams) virtmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define virtmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define virtmemControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define virtmemControl_Prologue(pResource, pCallContext, pParams) virtmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define virtmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define virtmemControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define virtmemControl_Epilogue(pResource, pCallContext, pParams) virtmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define virtmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define virtmemPreDestruct_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define virtmemPreDestruct(pResource) virtmemPreDestruct_DISPATCH(pResource) -#define virtmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define virtmemControlFilter_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define virtmemControlFilter(pResource, pCallContext, pParams) virtmemControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define virtmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define virtmemGetRefCount_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define virtmemGetRefCount(pResource) virtmemGetRefCount_DISPATCH(pResource) -#define virtmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define virtmemAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_StandardMemory.__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define virtmemAddAdditionalDependants(pClient, pResource, pReference) virtmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions static inline NV_STATUS virtmemMapTo_DISPATCH(struct VirtualMemory *pVirtualMemory, struct RS_RES_MAP_TO_PARAMS *pParams) { - return pVirtualMemory->__virtmemMapTo__(pVirtualMemory, pParams); + return pVirtualMemory->__nvoc_vtable->__virtmemMapTo__(pVirtualMemory, pParams); } static inline NV_STATUS virtmemUnmapFrom_DISPATCH(struct VirtualMemory *pVirtualMemory, struct RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pVirtualMemory->__virtmemUnmapFrom__(pVirtualMemory, pParams); + return pVirtualMemory->__nvoc_vtable->__virtmemUnmapFrom__(pVirtualMemory, pParams); } static inline NvBool virtmemIsPartialUnmapSupported_DISPATCH(struct VirtualMemory *pVirtualMemory) { - return pVirtualMemory->__virtmemIsPartialUnmapSupported__(pVirtualMemory); + return pVirtualMemory->__nvoc_vtable->__virtmemIsPartialUnmapSupported__(pVirtualMemory); } static inline NvBool virtmemCanCopy_DISPATCH(struct VirtualMemory *pStandardMemory) { - return pStandardMemory->__virtmemCanCopy__(pStandardMemory); + return pStandardMemory->__nvoc_vtable->__virtmemCanCopy__(pStandardMemory); } static inline NV_STATUS virtmemIsDuplicate_DISPATCH(struct VirtualMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) { - return pMemory->__virtmemIsDuplicate__(pMemory, hMemory, pDuplicate); + return pMemory->__nvoc_vtable->__virtmemIsDuplicate__(pMemory, hMemory, pDuplicate); } static inline NV_STATUS virtmemGetMapAddrSpace_DISPATCH(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pMemory->__virtmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); + return pMemory->__nvoc_vtable->__virtmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS virtmemControl_DISPATCH(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pMemory->__virtmemControl__(pMemory, pCallContext, pParams); + return pMemory->__nvoc_vtable->__virtmemControl__(pMemory, pCallContext, pParams); } static inline NV_STATUS virtmemMap_DISPATCH(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) { - return pMemory->__virtmemMap__(pMemory, pCallContext, pParams, pCpuMapping); + return pMemory->__nvoc_vtable->__virtmemMap__(pMemory, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS virtmemUnmap_DISPATCH(struct VirtualMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) { - return pMemory->__virtmemUnmap__(pMemory, pCallContext, pCpuMapping); + return pMemory->__nvoc_vtable->__virtmemUnmap__(pMemory, pCallContext, pCpuMapping); } static inline NV_STATUS virtmemGetMemInterMapParams_DISPATCH(struct VirtualMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pMemory->__virtmemGetMemInterMapParams__(pMemory, pParams); + return pMemory->__nvoc_vtable->__virtmemGetMemInterMapParams__(pMemory, pParams); } static inline NV_STATUS virtmemCheckMemInterUnmap_DISPATCH(struct VirtualMemory *pMemory, NvBool bSubdeviceHandleProvided) { - return pMemory->__virtmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); + return pMemory->__nvoc_vtable->__virtmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided); } static inline NV_STATUS virtmemGetMemoryMappingDescriptor_DISPATCH(struct VirtualMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) { - return pMemory->__virtmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); + return pMemory->__nvoc_vtable->__virtmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc); } static inline NV_STATUS virtmemCheckCopyPermissions_DISPATCH(struct VirtualMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) { - return pMemory->__virtmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); + return pMemory->__nvoc_vtable->__virtmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice); } static inline NV_STATUS virtmemIsReady_DISPATCH(struct VirtualMemory *pMemory, NvBool bCopyConstructorContext) { - return pMemory->__virtmemIsReady__(pMemory, bCopyConstructorContext); + return pMemory->__nvoc_vtable->__virtmemIsReady__(pMemory, bCopyConstructorContext); } static inline NvBool virtmemIsGpuMapAllowed_DISPATCH(struct VirtualMemory *pMemory, struct OBJGPU *pGpu) { - return pMemory->__virtmemIsGpuMapAllowed__(pMemory, pGpu); + return pMemory->__nvoc_vtable->__virtmemIsGpuMapAllowed__(pMemory, pGpu); } static inline NvBool virtmemIsExportAllowed_DISPATCH(struct VirtualMemory *pMemory) { - return pMemory->__virtmemIsExportAllowed__(pMemory); + return pMemory->__nvoc_vtable->__virtmemIsExportAllowed__(pMemory); } static inline NvBool virtmemAccessCallback_DISPATCH(struct VirtualMemory *pResource, RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__virtmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__virtmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NvBool virtmemShareCallback_DISPATCH(struct VirtualMemory *pResource, RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pResource->__virtmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); + return pResource->__nvoc_vtable->__virtmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS virtmemControlSerialization_Prologue_DISPATCH(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__virtmemControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__virtmemControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void virtmemControlSerialization_Epilogue_DISPATCH(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__virtmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__virtmemControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS virtmemControl_Prologue_DISPATCH(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__virtmemControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__virtmemControl_Prologue__(pResource, pCallContext, pParams); } static inline void virtmemControl_Epilogue_DISPATCH(struct VirtualMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__virtmemControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__virtmemControl_Epilogue__(pResource, pCallContext, pParams); } static inline void virtmemPreDestruct_DISPATCH(struct VirtualMemory *pResource) { - pResource->__virtmemPreDestruct__(pResource); + pResource->__nvoc_vtable->__virtmemPreDestruct__(pResource); } static inline NV_STATUS virtmemControlFilter_DISPATCH(struct VirtualMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__virtmemControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__virtmemControlFilter__(pResource, pCallContext, pParams); } static inline NvU32 virtmemGetRefCount_DISPATCH(struct VirtualMemory *pResource) { - return pResource->__virtmemGetRefCount__(pResource); + return pResource->__nvoc_vtable->__virtmemGetRefCount__(pResource); } static inline void virtmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct VirtualMemory *pResource, RsResourceRef *pReference) { - pResource->__virtmemAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__virtmemAddAdditionalDependants__(pClient, pResource, pReference); } NV_STATUS virtmemMapTo_IMPL(struct VirtualMemory *pVirtualMemory, struct RS_RES_MAP_TO_PARAMS *pParams); NV_STATUS virtmemUnmapFrom_IMPL(struct VirtualMemory *pVirtualMemory, struct RS_RES_UNMAP_FROM_PARAMS *pParams); -static inline NvBool virtmemIsPartialUnmapSupported_0c883b(struct VirtualMemory *pVirtualMemory) { - return ((NvBool)(0 == 0)); +static inline NvBool virtmemIsPartialUnmapSupported_e661f0(struct VirtualMemory *pVirtualMemory) { + return NV_TRUE; } NV_STATUS virtmemConstruct_IMPL(struct VirtualMemory *arg_pVirtualMemory, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams); diff --git a/src/nvidia/generated/g_zbc_api_nvoc.c b/src/nvidia/generated/g_zbc_api_nvoc.c index 70ec96a1e4..452b0ff42e 100644 --- a/src/nvidia/generated/g_zbc_api_nvoc.c +++ b/src/nvidia/generated/g_zbc_api_nvoc.c @@ -207,130 +207,198 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_ZbcApi[] }; +// Down-thunk(s) to bridge methods from ancestors (if any) +NvBool __nvoc_down_thunk_RmResource_resAccessCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super^2 +NvBool __nvoc_down_thunk_RmResource_resShareCallback(struct RsResource *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControlSerialization_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControlSerialization_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_RmResource_resControl_Prologue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +void __nvoc_down_thunk_RmResource_resControl_Epilogue(struct RsResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_down_thunk_GpuResource_resControl(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resMap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // super +NV_STATUS __nvoc_down_thunk_GpuResource_resUnmap(struct RsResource *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // super +NvBool __nvoc_down_thunk_GpuResource_rmresShareCallback(struct RmResource *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // super + +// Up-thunk(s) to bridge methods to ancestors (if any) +NvBool __nvoc_up_thunk_RsResource_rmresCanCopy(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresIsDuplicate(struct RmResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super^2 +void __nvoc_up_thunk_RsResource_rmresPreDestruct(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControl(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresControlFilter(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmap(struct RmResource *pResource, struct CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping); // super^2 +NvBool __nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported(struct RmResource *pResource); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresMapTo(struct RmResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super^2 +NV_STATUS __nvoc_up_thunk_RsResource_rmresUnmapFrom(struct RmResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super^2 +NvU32 __nvoc_up_thunk_RsResource_rmresGetRefCount(struct RmResource *pResource); // super^2 +void __nvoc_up_thunk_RsResource_rmresAddAdditionalDependants(struct RsClient *pClient, struct RmResource *pResource, RsResourceRef *pReference); // super^2 +NvBool __nvoc_up_thunk_RmResource_gpuresAccessCallback(struct GpuResource *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams(struct GpuResource *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap(struct GpuResource *pRmResource, NvBool bSubdeviceHandleProvided); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor(struct GpuResource *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NV_STATUS __nvoc_up_thunk_RmResource_gpuresControl_Prologue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +void __nvoc_up_thunk_RmResource_gpuresControl_Epilogue(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresCanCopy(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresIsDuplicate(struct GpuResource *pResource, NvHandle hMemory, NvBool *pDuplicate); // super +void __nvoc_up_thunk_RsResource_gpuresPreDestruct(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresControlFilter(struct GpuResource *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // super +NvBool __nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported(struct GpuResource *pResource); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresMapTo(struct GpuResource *pResource, RS_RES_MAP_TO_PARAMS *pParams); // super +NV_STATUS __nvoc_up_thunk_RsResource_gpuresUnmapFrom(struct GpuResource *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // super +NvU32 __nvoc_up_thunk_RsResource_gpuresGetRefCount(struct GpuResource *pResource); // super +void __nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants(struct RsClient *pClient, struct GpuResource *pResource, RsResourceRef *pReference); // super +NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiControl(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiMap(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping); // this +NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiUnmap(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping); // this +NvBool __nvoc_up_thunk_GpuResource_zbcapiShareCallback(struct ZbcApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy); // this +NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiGetRegBaseOffsetAndSize(struct ZbcApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize); // this +NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiGetMapAddrSpace(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace); // this +NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiInternalControlForward(struct ZbcApi *pGpuResource, NvU32 command, void *pParams, NvU32 size); // this +NvHandle __nvoc_up_thunk_GpuResource_zbcapiGetInternalObjectHandle(struct ZbcApi *pGpuResource); // this +NvBool __nvoc_up_thunk_RmResource_zbcapiAccessCallback(struct ZbcApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight); // this +NV_STATUS __nvoc_up_thunk_RmResource_zbcapiGetMemInterMapParams(struct ZbcApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_zbcapiCheckMemInterUnmap(struct ZbcApi *pRmResource, NvBool bSubdeviceHandleProvided); // this +NV_STATUS __nvoc_up_thunk_RmResource_zbcapiGetMemoryMappingDescriptor(struct ZbcApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc); // this +NV_STATUS __nvoc_up_thunk_RmResource_zbcapiControlSerialization_Prologue(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_zbcapiControlSerialization_Epilogue(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NV_STATUS __nvoc_up_thunk_RmResource_zbcapiControl_Prologue(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +void __nvoc_up_thunk_RmResource_zbcapiControl_Epilogue(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_zbcapiCanCopy(struct ZbcApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_zbcapiIsDuplicate(struct ZbcApi *pResource, NvHandle hMemory, NvBool *pDuplicate); // this +void __nvoc_up_thunk_RsResource_zbcapiPreDestruct(struct ZbcApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_zbcapiControlFilter(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams); // this +NvBool __nvoc_up_thunk_RsResource_zbcapiIsPartialUnmapSupported(struct ZbcApi *pResource); // this +NV_STATUS __nvoc_up_thunk_RsResource_zbcapiMapTo(struct ZbcApi *pResource, RS_RES_MAP_TO_PARAMS *pParams); // this +NV_STATUS __nvoc_up_thunk_RsResource_zbcapiUnmapFrom(struct ZbcApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams); // this +NvU32 __nvoc_up_thunk_RsResource_zbcapiGetRefCount(struct ZbcApi *pResource); // this +void __nvoc_up_thunk_RsResource_zbcapiAddAdditionalDependants(struct RsClient *pClient, struct ZbcApi *pResource, RsResourceRef *pReference); // this + // 25 up-thunk(s) defined to bridge methods in ZbcApi to superclasses // zbcapiControl: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiControl(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiControl(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return gpuresControl((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset), pCallContext, pParams); } // zbcapiMap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiMap(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiMap(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { return gpuresMap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset), pCallContext, pParams, pCpuMapping); } // zbcapiUnmap: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiUnmap(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { +NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiUnmap(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { return gpuresUnmap((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset), pCallContext, pCpuMapping); } // zbcapiShareCallback: virtual inherited (gpures) base (gpures) -static NvBool __nvoc_up_thunk_GpuResource_zbcapiShareCallback(struct ZbcApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { +NvBool __nvoc_up_thunk_GpuResource_zbcapiShareCallback(struct ZbcApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { return gpuresShareCallback((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy); } // zbcapiGetRegBaseOffsetAndSize: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiGetRegBaseOffsetAndSize(struct ZbcApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { +NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiGetRegBaseOffsetAndSize(struct ZbcApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset), pGpu, pOffset, pSize); } // zbcapiGetMapAddrSpace: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiGetMapAddrSpace(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { +NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiGetMapAddrSpace(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset), pCallContext, mapFlags, pAddrSpace); } // zbcapiInternalControlForward: virtual inherited (gpures) base (gpures) -static NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiInternalControlForward(struct ZbcApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { +NV_STATUS __nvoc_up_thunk_GpuResource_zbcapiInternalControlForward(struct ZbcApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset), command, pParams, size); } // zbcapiGetInternalObjectHandle: virtual inherited (gpures) base (gpures) -static NvHandle __nvoc_up_thunk_GpuResource_zbcapiGetInternalObjectHandle(struct ZbcApi *pGpuResource) { +NvHandle __nvoc_up_thunk_GpuResource_zbcapiGetInternalObjectHandle(struct ZbcApi *pGpuResource) { return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *) pGpuResource) + __nvoc_rtti_ZbcApi_GpuResource.offset)); } // zbcapiAccessCallback: virtual inherited (rmres) base (gpures) -static NvBool __nvoc_up_thunk_RmResource_zbcapiAccessCallback(struct ZbcApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { +NvBool __nvoc_up_thunk_RmResource_zbcapiAccessCallback(struct ZbcApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { return rmresAccessCallback((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RmResource.offset), pInvokingClient, pAllocParams, accessRight); } // zbcapiGetMemInterMapParams: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_zbcapiGetMemInterMapParams(struct ZbcApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_zbcapiGetMemInterMapParams(struct ZbcApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ZbcApi_RmResource.offset), pParams); } // zbcapiCheckMemInterUnmap: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_zbcapiCheckMemInterUnmap(struct ZbcApi *pRmResource, NvBool bSubdeviceHandleProvided) { +NV_STATUS __nvoc_up_thunk_RmResource_zbcapiCheckMemInterUnmap(struct ZbcApi *pRmResource, NvBool bSubdeviceHandleProvided) { return rmresCheckMemInterUnmap((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ZbcApi_RmResource.offset), bSubdeviceHandleProvided); } // zbcapiGetMemoryMappingDescriptor: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_zbcapiGetMemoryMappingDescriptor(struct ZbcApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { +NV_STATUS __nvoc_up_thunk_RmResource_zbcapiGetMemoryMappingDescriptor(struct ZbcApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *) pRmResource) + __nvoc_rtti_ZbcApi_RmResource.offset), ppMemDesc); } // zbcapiControlSerialization_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_zbcapiControlSerialization_Prologue(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_zbcapiControlSerialization_Prologue(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RmResource.offset), pCallContext, pParams); } // zbcapiControlSerialization_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_zbcapiControlSerialization_Epilogue(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_zbcapiControlSerialization_Epilogue(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RmResource.offset), pCallContext, pParams); } // zbcapiControl_Prologue: virtual inherited (rmres) base (gpures) -static NV_STATUS __nvoc_up_thunk_RmResource_zbcapiControl_Prologue(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RmResource_zbcapiControl_Prologue(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return rmresControl_Prologue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RmResource.offset), pCallContext, pParams); } // zbcapiControl_Epilogue: virtual inherited (rmres) base (gpures) -static void __nvoc_up_thunk_RmResource_zbcapiControl_Epilogue(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +void __nvoc_up_thunk_RmResource_zbcapiControl_Epilogue(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { rmresControl_Epilogue((struct RmResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RmResource.offset), pCallContext, pParams); } // zbcapiCanCopy: virtual inherited (res) base (gpures) -static NvBool __nvoc_up_thunk_RsResource_zbcapiCanCopy(struct ZbcApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_zbcapiCanCopy(struct ZbcApi *pResource) { return resCanCopy((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RsResource.offset)); } // zbcapiIsDuplicate: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_zbcapiIsDuplicate(struct ZbcApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { +NV_STATUS __nvoc_up_thunk_RsResource_zbcapiIsDuplicate(struct ZbcApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { return resIsDuplicate((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RsResource.offset), hMemory, pDuplicate); } // zbcapiPreDestruct: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_zbcapiPreDestruct(struct ZbcApi *pResource) { +void __nvoc_up_thunk_RsResource_zbcapiPreDestruct(struct ZbcApi *pResource) { resPreDestruct((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RsResource.offset)); } // zbcapiControlFilter: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_zbcapiControlFilter(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_zbcapiControlFilter(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { return resControlFilter((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RsResource.offset), pCallContext, pParams); } // zbcapiIsPartialUnmapSupported: inline virtual inherited (res) base (gpures) body -static NvBool __nvoc_up_thunk_RsResource_zbcapiIsPartialUnmapSupported(struct ZbcApi *pResource) { +NvBool __nvoc_up_thunk_RsResource_zbcapiIsPartialUnmapSupported(struct ZbcApi *pResource) { return resIsPartialUnmapSupported((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RsResource.offset)); } // zbcapiMapTo: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_zbcapiMapTo(struct ZbcApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_zbcapiMapTo(struct ZbcApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { return resMapTo((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RsResource.offset), pParams); } // zbcapiUnmapFrom: virtual inherited (res) base (gpures) -static NV_STATUS __nvoc_up_thunk_RsResource_zbcapiUnmapFrom(struct ZbcApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { +NV_STATUS __nvoc_up_thunk_RsResource_zbcapiUnmapFrom(struct ZbcApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { return resUnmapFrom((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RsResource.offset), pParams); } // zbcapiGetRefCount: virtual inherited (res) base (gpures) -static NvU32 __nvoc_up_thunk_RsResource_zbcapiGetRefCount(struct ZbcApi *pResource) { +NvU32 __nvoc_up_thunk_RsResource_zbcapiGetRefCount(struct ZbcApi *pResource) { return resGetRefCount((struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RsResource.offset)); } // zbcapiAddAdditionalDependants: virtual inherited (res) base (gpures) -static void __nvoc_up_thunk_RsResource_zbcapiAddAdditionalDependants(struct RsClient *pClient, struct ZbcApi *pResource, RsResourceRef *pReference) { +void __nvoc_up_thunk_RsResource_zbcapiAddAdditionalDependants(struct RsClient *pClient, struct ZbcApi *pResource, RsResourceRef *pReference) { resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *) pResource) + __nvoc_rtti_ZbcApi_RsResource.offset), pReference); } @@ -432,88 +500,124 @@ static void __nvoc_init_funcTable_ZbcApi_1(ZbcApi *pThis, RmHalspecOwner *pRmhal #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) pThis->__zbcapiCtrlCmdGetZbcClearTableEntry__ = &zbcapiCtrlCmdGetZbcClearTableEntry_IMPL; #endif - - // zbcapiControl -- virtual inherited (gpures) base (gpures) - pThis->__zbcapiControl__ = &__nvoc_up_thunk_GpuResource_zbcapiControl; - - // zbcapiMap -- virtual inherited (gpures) base (gpures) - pThis->__zbcapiMap__ = &__nvoc_up_thunk_GpuResource_zbcapiMap; - - // zbcapiUnmap -- virtual inherited (gpures) base (gpures) - pThis->__zbcapiUnmap__ = &__nvoc_up_thunk_GpuResource_zbcapiUnmap; - - // zbcapiShareCallback -- virtual inherited (gpures) base (gpures) - pThis->__zbcapiShareCallback__ = &__nvoc_up_thunk_GpuResource_zbcapiShareCallback; - - // zbcapiGetRegBaseOffsetAndSize -- virtual inherited (gpures) base (gpures) - pThis->__zbcapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_zbcapiGetRegBaseOffsetAndSize; - - // zbcapiGetMapAddrSpace -- virtual inherited (gpures) base (gpures) - pThis->__zbcapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_zbcapiGetMapAddrSpace; - - // zbcapiInternalControlForward -- virtual inherited (gpures) base (gpures) - pThis->__zbcapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_zbcapiInternalControlForward; - - // zbcapiGetInternalObjectHandle -- virtual inherited (gpures) base (gpures) - pThis->__zbcapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_zbcapiGetInternalObjectHandle; - - // zbcapiAccessCallback -- virtual inherited (rmres) base (gpures) - pThis->__zbcapiAccessCallback__ = &__nvoc_up_thunk_RmResource_zbcapiAccessCallback; - - // zbcapiGetMemInterMapParams -- virtual inherited (rmres) base (gpures) - pThis->__zbcapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_zbcapiGetMemInterMapParams; - - // zbcapiCheckMemInterUnmap -- virtual inherited (rmres) base (gpures) - pThis->__zbcapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_zbcapiCheckMemInterUnmap; - - // zbcapiGetMemoryMappingDescriptor -- virtual inherited (rmres) base (gpures) - pThis->__zbcapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_zbcapiGetMemoryMappingDescriptor; - - // zbcapiControlSerialization_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__zbcapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_zbcapiControlSerialization_Prologue; - - // zbcapiControlSerialization_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__zbcapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_zbcapiControlSerialization_Epilogue; - - // zbcapiControl_Prologue -- virtual inherited (rmres) base (gpures) - pThis->__zbcapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_zbcapiControl_Prologue; - - // zbcapiControl_Epilogue -- virtual inherited (rmres) base (gpures) - pThis->__zbcapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_zbcapiControl_Epilogue; - - // zbcapiCanCopy -- virtual inherited (res) base (gpures) - pThis->__zbcapiCanCopy__ = &__nvoc_up_thunk_RsResource_zbcapiCanCopy; - - // zbcapiIsDuplicate -- virtual inherited (res) base (gpures) - pThis->__zbcapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_zbcapiIsDuplicate; - - // zbcapiPreDestruct -- virtual inherited (res) base (gpures) - pThis->__zbcapiPreDestruct__ = &__nvoc_up_thunk_RsResource_zbcapiPreDestruct; - - // zbcapiControlFilter -- virtual inherited (res) base (gpures) - pThis->__zbcapiControlFilter__ = &__nvoc_up_thunk_RsResource_zbcapiControlFilter; - - // zbcapiIsPartialUnmapSupported -- inline virtual inherited (res) base (gpures) body - pThis->__zbcapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_zbcapiIsPartialUnmapSupported; - - // zbcapiMapTo -- virtual inherited (res) base (gpures) - pThis->__zbcapiMapTo__ = &__nvoc_up_thunk_RsResource_zbcapiMapTo; - - // zbcapiUnmapFrom -- virtual inherited (res) base (gpures) - pThis->__zbcapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_zbcapiUnmapFrom; - - // zbcapiGetRefCount -- virtual inherited (res) base (gpures) - pThis->__zbcapiGetRefCount__ = &__nvoc_up_thunk_RsResource_zbcapiGetRefCount; - - // zbcapiAddAdditionalDependants -- virtual inherited (res) base (gpures) - pThis->__zbcapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_zbcapiAddAdditionalDependants; -} // End __nvoc_init_funcTable_ZbcApi_1 with approximately 33 basic block(s). +} // End __nvoc_init_funcTable_ZbcApi_1 with approximately 8 basic block(s). // Initialize vtable(s) for 32 virtual method(s). void __nvoc_init_funcTable_ZbcApi(ZbcApi *pThis, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 32 per-object function pointer(s). + // Per-class vtable definition + static const struct NVOC_VTABLE__ZbcApi vtable = { +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif +#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) +#endif + .__zbcapiControl__ = &__nvoc_up_thunk_GpuResource_zbcapiControl, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresControl__ = &gpuresControl_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresControl__ = &__nvoc_up_thunk_RsResource_rmresControl, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControl__ = &__nvoc_down_thunk_GpuResource_resControl, // virtual + .__zbcapiMap__ = &__nvoc_up_thunk_GpuResource_zbcapiMap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresMap__ = &gpuresMap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresMap__ = &__nvoc_up_thunk_RsResource_rmresMap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMap__ = &__nvoc_down_thunk_GpuResource_resMap, // virtual + .__zbcapiUnmap__ = &__nvoc_up_thunk_GpuResource_zbcapiUnmap, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresUnmap__ = &gpuresUnmap_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresUnmap__ = &__nvoc_up_thunk_RsResource_rmresUnmap, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmap__ = &__nvoc_down_thunk_GpuResource_resUnmap, // virtual + .__zbcapiShareCallback__ = &__nvoc_up_thunk_GpuResource_zbcapiShareCallback, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresShareCallback__ = &gpuresShareCallback_IMPL, // virtual override (res) base (rmres) + .GpuResource.RmResource.__rmresShareCallback__ = &__nvoc_down_thunk_GpuResource_rmresShareCallback, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resShareCallback__ = &__nvoc_down_thunk_RmResource_resShareCallback, // virtual + .__zbcapiGetRegBaseOffsetAndSize__ = &__nvoc_up_thunk_GpuResource_zbcapiGetRegBaseOffsetAndSize, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetRegBaseOffsetAndSize__ = &gpuresGetRegBaseOffsetAndSize_IMPL, // virtual + .__zbcapiGetMapAddrSpace__ = &__nvoc_up_thunk_GpuResource_zbcapiGetMapAddrSpace, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetMapAddrSpace__ = &gpuresGetMapAddrSpace_IMPL, // virtual + .__zbcapiInternalControlForward__ = &__nvoc_up_thunk_GpuResource_zbcapiInternalControlForward, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresInternalControlForward__ = &gpuresInternalControlForward_IMPL, // virtual + .__zbcapiGetInternalObjectHandle__ = &__nvoc_up_thunk_GpuResource_zbcapiGetInternalObjectHandle, // virtual inherited (gpures) base (gpures) + .GpuResource.__gpuresGetInternalObjectHandle__ = &gpuresGetInternalObjectHandle_IMPL, // virtual + .__zbcapiAccessCallback__ = &__nvoc_up_thunk_RmResource_zbcapiAccessCallback, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresAccessCallback__ = &__nvoc_up_thunk_RmResource_gpuresAccessCallback, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresAccessCallback__ = &rmresAccessCallback_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resAccessCallback__ = &__nvoc_down_thunk_RmResource_resAccessCallback, // virtual + .__zbcapiGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_zbcapiGetMemInterMapParams, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemInterMapParams__ = &__nvoc_up_thunk_RmResource_gpuresGetMemInterMapParams, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemInterMapParams__ = &rmresGetMemInterMapParams_IMPL, // virtual + .__zbcapiCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_zbcapiCheckMemInterUnmap, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresCheckMemInterUnmap__ = &__nvoc_up_thunk_RmResource_gpuresCheckMemInterUnmap, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresCheckMemInterUnmap__ = &rmresCheckMemInterUnmap_IMPL, // virtual + .__zbcapiGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_zbcapiGetMemoryMappingDescriptor, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresGetMemoryMappingDescriptor__ = &__nvoc_up_thunk_RmResource_gpuresGetMemoryMappingDescriptor, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresGetMemoryMappingDescriptor__ = &rmresGetMemoryMappingDescriptor_IMPL, // virtual + .__zbcapiControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_zbcapiControlSerialization_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Prologue__ = &rmresControlSerialization_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Prologue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Prologue, // virtual + .__zbcapiControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_zbcapiControlSerialization_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControlSerialization_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControlSerialization_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControlSerialization_Epilogue__ = &rmresControlSerialization_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControlSerialization_Epilogue__ = &__nvoc_down_thunk_RmResource_resControlSerialization_Epilogue, // virtual + .__zbcapiControl_Prologue__ = &__nvoc_up_thunk_RmResource_zbcapiControl_Prologue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Prologue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Prologue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Prologue__ = &rmresControl_Prologue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Prologue__ = &__nvoc_down_thunk_RmResource_resControl_Prologue, // virtual + .__zbcapiControl_Epilogue__ = &__nvoc_up_thunk_RmResource_zbcapiControl_Epilogue, // virtual inherited (rmres) base (gpures) + .GpuResource.__gpuresControl_Epilogue__ = &__nvoc_up_thunk_RmResource_gpuresControl_Epilogue, // virtual inherited (rmres) base (rmres) + .GpuResource.RmResource.__rmresControl_Epilogue__ = &rmresControl_Epilogue_IMPL, // virtual override (res) base (res) + .GpuResource.RmResource.RsResource.__resControl_Epilogue__ = &__nvoc_down_thunk_RmResource_resControl_Epilogue, // virtual + .__zbcapiCanCopy__ = &__nvoc_up_thunk_RsResource_zbcapiCanCopy, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresCanCopy__ = &__nvoc_up_thunk_RsResource_gpuresCanCopy, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresCanCopy__ = &__nvoc_up_thunk_RsResource_rmresCanCopy, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resCanCopy__ = &resCanCopy_IMPL, // virtual + .__zbcapiIsDuplicate__ = &__nvoc_up_thunk_RsResource_zbcapiIsDuplicate, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresIsDuplicate__ = &__nvoc_up_thunk_RsResource_gpuresIsDuplicate, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresIsDuplicate__ = &__nvoc_up_thunk_RsResource_rmresIsDuplicate, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resIsDuplicate__ = &resIsDuplicate_IMPL, // virtual + .__zbcapiPreDestruct__ = &__nvoc_up_thunk_RsResource_zbcapiPreDestruct, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresPreDestruct__ = &__nvoc_up_thunk_RsResource_gpuresPreDestruct, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresPreDestruct__ = &__nvoc_up_thunk_RsResource_rmresPreDestruct, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resPreDestruct__ = &resPreDestruct_IMPL, // virtual + .__zbcapiControlFilter__ = &__nvoc_up_thunk_RsResource_zbcapiControlFilter, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresControlFilter__ = &__nvoc_up_thunk_RsResource_gpuresControlFilter, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresControlFilter__ = &__nvoc_up_thunk_RsResource_rmresControlFilter, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resControlFilter__ = &resControlFilter_IMPL, // virtual + .__zbcapiIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_zbcapiIsPartialUnmapSupported, // inline virtual inherited (res) base (gpures) body + .GpuResource.__gpuresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_gpuresIsPartialUnmapSupported, // inline virtual inherited (res) base (rmres) body + .GpuResource.RmResource.__rmresIsPartialUnmapSupported__ = &__nvoc_up_thunk_RsResource_rmresIsPartialUnmapSupported, // inline virtual inherited (res) base (res) body + .GpuResource.RmResource.RsResource.__resIsPartialUnmapSupported__ = &resIsPartialUnmapSupported_d69453, // inline virtual body + .__zbcapiMapTo__ = &__nvoc_up_thunk_RsResource_zbcapiMapTo, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresMapTo__ = &__nvoc_up_thunk_RsResource_gpuresMapTo, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresMapTo__ = &__nvoc_up_thunk_RsResource_rmresMapTo, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resMapTo__ = &resMapTo_IMPL, // virtual + .__zbcapiUnmapFrom__ = &__nvoc_up_thunk_RsResource_zbcapiUnmapFrom, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresUnmapFrom__ = &__nvoc_up_thunk_RsResource_gpuresUnmapFrom, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresUnmapFrom__ = &__nvoc_up_thunk_RsResource_rmresUnmapFrom, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resUnmapFrom__ = &resUnmapFrom_IMPL, // virtual + .__zbcapiGetRefCount__ = &__nvoc_up_thunk_RsResource_zbcapiGetRefCount, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresGetRefCount__ = &__nvoc_up_thunk_RsResource_gpuresGetRefCount, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresGetRefCount__ = &__nvoc_up_thunk_RsResource_rmresGetRefCount, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resGetRefCount__ = &resGetRefCount_IMPL, // virtual + .__zbcapiAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_zbcapiAddAdditionalDependants, // virtual inherited (res) base (gpures) + .GpuResource.__gpuresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_gpuresAddAdditionalDependants, // virtual inherited (res) base (rmres) + .GpuResource.RmResource.__rmresAddAdditionalDependants__ = &__nvoc_up_thunk_RsResource_rmresAddAdditionalDependants, // virtual inherited (res) base (res) + .GpuResource.RmResource.RsResource.__resAddAdditionalDependants__ = &resAddAdditionalDependants_IMPL, // virtual + }; + + // Pointer(s) to per-class vtable(s) + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable = &vtable.GpuResource.RmResource.RsResource; // (res) super^3 + pThis->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable = &vtable.GpuResource.RmResource; // (rmres) super^2 + pThis->__nvoc_base_GpuResource.__nvoc_vtable = &vtable.GpuResource; // (gpures) super + pThis->__nvoc_vtable = &vtable; // (zbcapi) this + + // Initialize vtable(s) with 7 per-object function pointer(s). __nvoc_init_funcTable_ZbcApi_1(pThis, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_zbc_api_nvoc.h b/src/nvidia/generated/g_zbc_api_nvoc.h index 405a8c7714..700124936e 100644 --- a/src/nvidia/generated/g_zbc_api_nvoc.h +++ b/src/nvidia/generated/g_zbc_api_nvoc.h @@ -7,7 +7,7 @@ #ifdef NVOC_METADATA_VERSION #undef NVOC_METADATA_VERSION #endif -#define NVOC_METADATA_VERSION 0 +#define NVOC_METADATA_VERSION 1 #ifdef __cplusplus extern "C" { @@ -61,10 +61,15 @@ extern "C" { #endif +// Metadata including vtable +struct NVOC_VTABLE__ZbcApi; + + struct ZbcApi { // Metadata const struct NVOC_RTTI *__nvoc_rtti; + const struct NVOC_VTABLE__ZbcApi *__nvoc_vtable; // Parent (i.e. superclass or base class) object pointers struct GpuResource __nvoc_base_GpuResource; @@ -77,7 +82,7 @@ struct ZbcApi { struct GpuResource *__nvoc_pbase_GpuResource; // gpures super struct ZbcApi *__nvoc_pbase_ZbcApi; // zbcapi - // Vtable with 32 per-object function pointers + // Vtable with 7 per-object function pointers NV_STATUS (*__zbcapiCtrlCmdSetZbcColorClear__)(struct ZbcApi * /*this*/, NV9096_CTRL_SET_ZBC_COLOR_CLEAR_PARAMS *); // exported (id=0x90960101) NV_STATUS (*__zbcapiCtrlCmdSetZbcDepthClear__)(struct ZbcApi * /*this*/, NV9096_CTRL_SET_ZBC_DEPTH_CLEAR_PARAMS *); // exported (id=0x90960102) NV_STATUS (*__zbcapiCtrlCmdGetZbcClearTable__)(struct ZbcApi * /*this*/, NV9096_CTRL_GET_ZBC_CLEAR_TABLE_PARAMS *); // exported (id=0x90960103) @@ -85,6 +90,16 @@ struct ZbcApi { NV_STATUS (*__zbcapiCtrlCmdSetZbcStencilClear__)(struct ZbcApi * /*this*/, NV9096_CTRL_SET_ZBC_STENCIL_CLEAR_PARAMS *); // exported (id=0x90960105) NV_STATUS (*__zbcapiCtrlCmdGetZbcClearTableSize__)(struct ZbcApi * /*this*/, NV9096_CTRL_GET_ZBC_CLEAR_TABLE_SIZE_PARAMS *); // halified (2 hals) exported (id=0x90960106) body NV_STATUS (*__zbcapiCtrlCmdGetZbcClearTableEntry__)(struct ZbcApi * /*this*/, NV9096_CTRL_GET_ZBC_CLEAR_TABLE_ENTRY_PARAMS *); // exported (id=0x90960107) + + // Data members + NvBool bZbcUsed; +}; + + +// Metadata including vtable with 25 function pointers plus superclass metadata +struct NVOC_VTABLE__ZbcApi { + const struct NVOC_VTABLE__GpuResource GpuResource; // (gpures) 25 function pointers + NV_STATUS (*__zbcapiControl__)(struct ZbcApi * /*this*/, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__zbcapiMap__)(struct ZbcApi * /*this*/, struct CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) NV_STATUS (*__zbcapiUnmap__)(struct ZbcApi * /*this*/, struct CALL_CONTEXT *, struct RsCpuMapping *); // virtual inherited (gpures) base (gpures) @@ -110,9 +125,6 @@ struct ZbcApi { NV_STATUS (*__zbcapiUnmapFrom__)(struct ZbcApi * /*this*/, RS_RES_UNMAP_FROM_PARAMS *); // virtual inherited (res) base (gpures) NvU32 (*__zbcapiGetRefCount__)(struct ZbcApi * /*this*/); // virtual inherited (res) base (gpures) void (*__zbcapiAddAdditionalDependants__)(struct RsClient *, struct ZbcApi * /*this*/, RsResourceRef *); // virtual inherited (res) base (gpures) - - // Data members - NvBool bZbcUsed; }; #ifndef __NVOC_CLASS_ZbcApi_TYPEDEF__ @@ -160,55 +172,55 @@ NV_STATUS __nvoc_objCreate_ZbcApi(ZbcApi**, Dynamic*, NvU32, struct CALL_CONTEXT #define zbcapiCtrlCmdGetZbcClearTableSize_HAL(pZbcApi, pGetZBCClearTableSizeParams) zbcapiCtrlCmdGetZbcClearTableSize_DISPATCH(pZbcApi, pGetZBCClearTableSizeParams) #define zbcapiCtrlCmdGetZbcClearTableEntry_FNPTR(pZbcApi) pZbcApi->__zbcapiCtrlCmdGetZbcClearTableEntry__ #define zbcapiCtrlCmdGetZbcClearTableEntry(pZbcApi, pGetZBCClearTableEntryParams) zbcapiCtrlCmdGetZbcClearTableEntry_DISPATCH(pZbcApi, pGetZBCClearTableEntryParams) -#define zbcapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresControl__ +#define zbcapiControl_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresControl__ #define zbcapiControl(pGpuResource, pCallContext, pParams) zbcapiControl_DISPATCH(pGpuResource, pCallContext, pParams) -#define zbcapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresMap__ +#define zbcapiMap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresMap__ #define zbcapiMap(pGpuResource, pCallContext, pParams, pCpuMapping) zbcapiMap_DISPATCH(pGpuResource, pCallContext, pParams, pCpuMapping) -#define zbcapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresUnmap__ +#define zbcapiUnmap_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresUnmap__ #define zbcapiUnmap(pGpuResource, pCallContext, pCpuMapping) zbcapiUnmap_DISPATCH(pGpuResource, pCallContext, pCpuMapping) -#define zbcapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresShareCallback__ +#define zbcapiShareCallback_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresShareCallback__ #define zbcapiShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) zbcapiShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) -#define zbcapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetRegBaseOffsetAndSize__ +#define zbcapiGetRegBaseOffsetAndSize_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetRegBaseOffsetAndSize__ #define zbcapiGetRegBaseOffsetAndSize(pGpuResource, pGpu, pOffset, pSize) zbcapiGetRegBaseOffsetAndSize_DISPATCH(pGpuResource, pGpu, pOffset, pSize) -#define zbcapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetMapAddrSpace__ +#define zbcapiGetMapAddrSpace_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetMapAddrSpace__ #define zbcapiGetMapAddrSpace(pGpuResource, pCallContext, mapFlags, pAddrSpace) zbcapiGetMapAddrSpace_DISPATCH(pGpuResource, pCallContext, mapFlags, pAddrSpace) -#define zbcapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresInternalControlForward__ +#define zbcapiInternalControlForward_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresInternalControlForward__ #define zbcapiInternalControlForward(pGpuResource, command, pParams, size) zbcapiInternalControlForward_DISPATCH(pGpuResource, command, pParams, size) -#define zbcapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__gpuresGetInternalObjectHandle__ +#define zbcapiGetInternalObjectHandle_FNPTR(pGpuResource) pGpuResource->__nvoc_base_GpuResource.__nvoc_vtable->__gpuresGetInternalObjectHandle__ #define zbcapiGetInternalObjectHandle(pGpuResource) zbcapiGetInternalObjectHandle_DISPATCH(pGpuResource) -#define zbcapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresAccessCallback__ +#define zbcapiAccessCallback_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresAccessCallback__ #define zbcapiAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) zbcapiAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight) -#define zbcapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemInterMapParams__ +#define zbcapiGetMemInterMapParams_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemInterMapParams__ #define zbcapiGetMemInterMapParams(pRmResource, pParams) zbcapiGetMemInterMapParams_DISPATCH(pRmResource, pParams) -#define zbcapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresCheckMemInterUnmap__ +#define zbcapiCheckMemInterUnmap_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresCheckMemInterUnmap__ #define zbcapiCheckMemInterUnmap(pRmResource, bSubdeviceHandleProvided) zbcapiCheckMemInterUnmap_DISPATCH(pRmResource, bSubdeviceHandleProvided) -#define zbcapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresGetMemoryMappingDescriptor__ +#define zbcapiGetMemoryMappingDescriptor_FNPTR(pRmResource) pRmResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresGetMemoryMappingDescriptor__ #define zbcapiGetMemoryMappingDescriptor(pRmResource, ppMemDesc) zbcapiGetMemoryMappingDescriptor_DISPATCH(pRmResource, ppMemDesc) -#define zbcapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Prologue__ +#define zbcapiControlSerialization_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Prologue__ #define zbcapiControlSerialization_Prologue(pResource, pCallContext, pParams) zbcapiControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define zbcapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControlSerialization_Epilogue__ +#define zbcapiControlSerialization_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControlSerialization_Epilogue__ #define zbcapiControlSerialization_Epilogue(pResource, pCallContext, pParams) zbcapiControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define zbcapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Prologue__ +#define zbcapiControl_Prologue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Prologue__ #define zbcapiControl_Prologue(pResource, pCallContext, pParams) zbcapiControl_Prologue_DISPATCH(pResource, pCallContext, pParams) -#define zbcapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__rmresControl_Epilogue__ +#define zbcapiControl_Epilogue_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_vtable->__rmresControl_Epilogue__ #define zbcapiControl_Epilogue(pResource, pCallContext, pParams) zbcapiControl_Epilogue_DISPATCH(pResource, pCallContext, pParams) -#define zbcapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ +#define zbcapiCanCopy_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resCanCopy__ #define zbcapiCanCopy(pResource) zbcapiCanCopy_DISPATCH(pResource) -#define zbcapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsDuplicate__ +#define zbcapiIsDuplicate_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsDuplicate__ #define zbcapiIsDuplicate(pResource, hMemory, pDuplicate) zbcapiIsDuplicate_DISPATCH(pResource, hMemory, pDuplicate) -#define zbcapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resPreDestruct__ +#define zbcapiPreDestruct_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resPreDestruct__ #define zbcapiPreDestruct(pResource) zbcapiPreDestruct_DISPATCH(pResource) -#define zbcapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resControlFilter__ +#define zbcapiControlFilter_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resControlFilter__ #define zbcapiControlFilter(pResource, pCallContext, pParams) zbcapiControlFilter_DISPATCH(pResource, pCallContext, pParams) -#define zbcapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resIsPartialUnmapSupported__ +#define zbcapiIsPartialUnmapSupported_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resIsPartialUnmapSupported__ #define zbcapiIsPartialUnmapSupported(pResource) zbcapiIsPartialUnmapSupported_DISPATCH(pResource) -#define zbcapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resMapTo__ +#define zbcapiMapTo_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resMapTo__ #define zbcapiMapTo(pResource, pParams) zbcapiMapTo_DISPATCH(pResource, pParams) -#define zbcapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resUnmapFrom__ +#define zbcapiUnmapFrom_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resUnmapFrom__ #define zbcapiUnmapFrom(pResource, pParams) zbcapiUnmapFrom_DISPATCH(pResource, pParams) -#define zbcapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resGetRefCount__ +#define zbcapiGetRefCount_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resGetRefCount__ #define zbcapiGetRefCount(pResource) zbcapiGetRefCount_DISPATCH(pResource) -#define zbcapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__resAddAdditionalDependants__ +#define zbcapiAddAdditionalDependants_FNPTR(pResource) pResource->__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_vtable->__resAddAdditionalDependants__ #define zbcapiAddAdditionalDependants(pClient, pResource, pReference) zbcapiAddAdditionalDependants_DISPATCH(pClient, pResource, pReference) // Dispatch functions @@ -241,103 +253,103 @@ static inline NV_STATUS zbcapiCtrlCmdGetZbcClearTableEntry_DISPATCH(struct ZbcAp } static inline NV_STATUS zbcapiControl_DISPATCH(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pGpuResource->__zbcapiControl__(pGpuResource, pCallContext, pParams); + return pGpuResource->__nvoc_vtable->__zbcapiControl__(pGpuResource, pCallContext, pParams); } static inline NV_STATUS zbcapiMap_DISPATCH(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__zbcapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); + return pGpuResource->__nvoc_vtable->__zbcapiMap__(pGpuResource, pCallContext, pParams, pCpuMapping); } static inline NV_STATUS zbcapiUnmap_DISPATCH(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) { - return pGpuResource->__zbcapiUnmap__(pGpuResource, pCallContext, pCpuMapping); + return pGpuResource->__nvoc_vtable->__zbcapiUnmap__(pGpuResource, pCallContext, pCpuMapping); } static inline NvBool zbcapiShareCallback_DISPATCH(struct ZbcApi *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) { - return pGpuResource->__zbcapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); + return pGpuResource->__nvoc_vtable->__zbcapiShareCallback__(pGpuResource, pInvokingClient, pParentRef, pSharePolicy); } static inline NV_STATUS zbcapiGetRegBaseOffsetAndSize_DISPATCH(struct ZbcApi *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) { - return pGpuResource->__zbcapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); + return pGpuResource->__nvoc_vtable->__zbcapiGetRegBaseOffsetAndSize__(pGpuResource, pGpu, pOffset, pSize); } static inline NV_STATUS zbcapiGetMapAddrSpace_DISPATCH(struct ZbcApi *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) { - return pGpuResource->__zbcapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); + return pGpuResource->__nvoc_vtable->__zbcapiGetMapAddrSpace__(pGpuResource, pCallContext, mapFlags, pAddrSpace); } static inline NV_STATUS zbcapiInternalControlForward_DISPATCH(struct ZbcApi *pGpuResource, NvU32 command, void *pParams, NvU32 size) { - return pGpuResource->__zbcapiInternalControlForward__(pGpuResource, command, pParams, size); + return pGpuResource->__nvoc_vtable->__zbcapiInternalControlForward__(pGpuResource, command, pParams, size); } static inline NvHandle zbcapiGetInternalObjectHandle_DISPATCH(struct ZbcApi *pGpuResource) { - return pGpuResource->__zbcapiGetInternalObjectHandle__(pGpuResource); + return pGpuResource->__nvoc_vtable->__zbcapiGetInternalObjectHandle__(pGpuResource); } static inline NvBool zbcapiAccessCallback_DISPATCH(struct ZbcApi *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) { - return pResource->__zbcapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); + return pResource->__nvoc_vtable->__zbcapiAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight); } static inline NV_STATUS zbcapiGetMemInterMapParams_DISPATCH(struct ZbcApi *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) { - return pRmResource->__zbcapiGetMemInterMapParams__(pRmResource, pParams); + return pRmResource->__nvoc_vtable->__zbcapiGetMemInterMapParams__(pRmResource, pParams); } static inline NV_STATUS zbcapiCheckMemInterUnmap_DISPATCH(struct ZbcApi *pRmResource, NvBool bSubdeviceHandleProvided) { - return pRmResource->__zbcapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); + return pRmResource->__nvoc_vtable->__zbcapiCheckMemInterUnmap__(pRmResource, bSubdeviceHandleProvided); } static inline NV_STATUS zbcapiGetMemoryMappingDescriptor_DISPATCH(struct ZbcApi *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) { - return pRmResource->__zbcapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); + return pRmResource->__nvoc_vtable->__zbcapiGetMemoryMappingDescriptor__(pRmResource, ppMemDesc); } static inline NV_STATUS zbcapiControlSerialization_Prologue_DISPATCH(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__zbcapiControlSerialization_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__zbcapiControlSerialization_Prologue__(pResource, pCallContext, pParams); } static inline void zbcapiControlSerialization_Epilogue_DISPATCH(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__zbcapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__zbcapiControlSerialization_Epilogue__(pResource, pCallContext, pParams); } static inline NV_STATUS zbcapiControl_Prologue_DISPATCH(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__zbcapiControl_Prologue__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__zbcapiControl_Prologue__(pResource, pCallContext, pParams); } static inline void zbcapiControl_Epilogue_DISPATCH(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - pResource->__zbcapiControl_Epilogue__(pResource, pCallContext, pParams); + pResource->__nvoc_vtable->__zbcapiControl_Epilogue__(pResource, pCallContext, pParams); } static inline NvBool zbcapiCanCopy_DISPATCH(struct ZbcApi *pResource) { - return pResource->__zbcapiCanCopy__(pResource); + return pResource->__nvoc_vtable->__zbcapiCanCopy__(pResource); } static inline NV_STATUS zbcapiIsDuplicate_DISPATCH(struct ZbcApi *pResource, NvHandle hMemory, NvBool *pDuplicate) { - return pResource->__zbcapiIsDuplicate__(pResource, hMemory, pDuplicate); + return pResource->__nvoc_vtable->__zbcapiIsDuplicate__(pResource, hMemory, pDuplicate); } static inline void zbcapiPreDestruct_DISPATCH(struct ZbcApi *pResource) { - pResource->__zbcapiPreDestruct__(pResource); + pResource->__nvoc_vtable->__zbcapiPreDestruct__(pResource); } static inline NV_STATUS zbcapiControlFilter_DISPATCH(struct ZbcApi *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) { - return pResource->__zbcapiControlFilter__(pResource, pCallContext, pParams); + return pResource->__nvoc_vtable->__zbcapiControlFilter__(pResource, pCallContext, pParams); } static inline NvBool zbcapiIsPartialUnmapSupported_DISPATCH(struct ZbcApi *pResource) { - return pResource->__zbcapiIsPartialUnmapSupported__(pResource); + return pResource->__nvoc_vtable->__zbcapiIsPartialUnmapSupported__(pResource); } static inline NV_STATUS zbcapiMapTo_DISPATCH(struct ZbcApi *pResource, RS_RES_MAP_TO_PARAMS *pParams) { - return pResource->__zbcapiMapTo__(pResource, pParams); + return pResource->__nvoc_vtable->__zbcapiMapTo__(pResource, pParams); } static inline NV_STATUS zbcapiUnmapFrom_DISPATCH(struct ZbcApi *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) { - return pResource->__zbcapiUnmapFrom__(pResource, pParams); + return pResource->__nvoc_vtable->__zbcapiUnmapFrom__(pResource, pParams); } static inline NvU32 zbcapiGetRefCount_DISPATCH(struct ZbcApi *pResource) { - return pResource->__zbcapiGetRefCount__(pResource); + return pResource->__nvoc_vtable->__zbcapiGetRefCount__(pResource); } static inline void zbcapiAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ZbcApi *pResource, RsResourceRef *pReference) { - pResource->__zbcapiAddAdditionalDependants__(pClient, pResource, pReference); + pResource->__nvoc_vtable->__zbcapiAddAdditionalDependants__(pClient, pResource, pReference); } static inline NV_STATUS zbcapiConstructHal_56cd7a(struct ZbcApi *pZbcApi, struct CALL_CONTEXT *pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *pParams) { diff --git a/src/nvidia/generated/rmconfig.h b/src/nvidia/generated/rmconfig.h index c4fc73b815..b7078bdc90 100644 --- a/src/nvidia/generated/rmconfig.h +++ b/src/nvidia/generated/rmconfig.h @@ -161,6 +161,7 @@ #define RMCFG_CHIP_MAXWELL_CLASSIC_GPUS 0 #define RMCFG_CHIP_dPASCAL 0 #define RMCFG_CHIP_DPASCAL 0 +#define RMCFG_CHIP_COMPUTE 1 #define RMCFG_CHIP_PASCAL 0 #define RMCFG_CHIP_PASCAL_CLASSIC_GPUS 0 #define RMCFG_CHIP_dVOLTA 0 @@ -310,6 +311,8 @@ #define RMCFG_FEATURE_FABRIC_LINEAR_ADDRESSING 1 // Unicast fabric memory management #define RMCFG_FEATURE_GSP_RM_TRACE_RATS 1 #define RMCFG_FEATURE_TEGRA_BPMP 0 // Tegra BPMP integration +#define RMCFG_FEATURE_BINDATA_IMAGE 0 // Extract bindata from RM binary during compilation and save it in bindata_image.bin +#define RMCFG_FEATURE_BINDATA_EXTRACTION 0 // Load bindata from disk.(Needs BINDATA_IMAGE to be enabled) @@ -450,6 +453,7 @@ #define RMCFG_CLASS_NV9010_VBLANK_CALLBACK 1 #define RMCFG_CLASS_GF100_PROFILER 1 // Profiler Client Support #define RMCFG_CLASS_MAXWELL_PROFILER 1 // Base Profiler Class +#define RMCFG_CLASS_MAXWELL_PROFILER_CONTEXT 1 // Context level Profiler Client Support #define RMCFG_CLASS_MAXWELL_PROFILER_DEVICE 1 // Device level Profiler Client Support #define RMCFG_CLASS_GF100_SUBDEVICE_MASTER 1 #define RMCFG_CLASS_GF100_SUBDEVICE_INFOROM 1 // Inforom interface @@ -672,6 +676,7 @@ #define RMCFG_MODULE_RPPG 1 // RAM Periphery Power Gating Object Engine. #define RMCFG_MODULE_EI 1 // Engine Idle Framework Object Engine. #define RMCFG_MODULE_LPWR_SEQ 1 // LPWR Unified Sequencer Feature for Power Gating +#define RMCFG_MODULE_LPWR_MON 1 // LPWR Mon Feature to get Statistics. #define RMCFG_MODULE_DPU 0 // Display Falcon #define RMCFG_MODULE_PMGR 0 // PCB Manager engine #define RMCFG_MODULE_KERNEL_PMGR 1 // Kernel controls for Pmgr @@ -726,7 +731,7 @@ #define RMCFG_MODULE_HSHUB 0 // High Speed Hub #define RMCFG_MODULE_HSHUBMANAGER 0 // High Speed Hub Manager #define RMCFG_MODULE_KERNEL_HSHUB 1 // High Speed Hub on Kernel(CPU) RM -#define RMCFG_MODULE_GPUMON 1 // GPU Monitoring +#define RMCFG_MODULE_GPUMON 0 // GPU Monitoring #define RMCFG_MODULE_GPUBOOSTMGR 1 // Sync Gpu Boost Manager #define RMCFG_MODULE_GRIDDISPLAYLESS 0 // GRID Displayless #define RMCFG_MODULE_WINDOW 0 // NvDisplay WINDOW channel diff --git a/src/nvidia/inc/kernel/core/locks.h b/src/nvidia/inc/kernel/core/locks.h index e49ff15b01..ba25f8742c 100644 --- a/src/nvidia/inc/kernel/core/locks.h +++ b/src/nvidia/inc/kernel/core/locks.h @@ -179,11 +179,6 @@ void rmIntrMaskLockFree(NvU32 gpuInst); NvU64 rmIntrMaskLockAcquire(OBJGPU *pGpu); void rmIntrMaskLockRelease(OBJGPU *pGpu, NvU64 oldIrql); -// wrappers for handling lock-related NV_ASSERT_OR_RETURNs -#define LOCK_ASSERT_AND_RETURN(cond) NV_ASSERT_OR_ELSE_STR((cond), #cond, return NV_ERR_INVALID_LOCK_STATE) -#define IRQL_ASSERT_AND_RETURN(cond) NV_ASSERT_OR_ELSE_STR((cond), #cond, return NV_ERR_INVALID_IRQ_LEVEL) -#define LOCK_ASSERT_AND_RETURN_BOOL(cond, bRet) NV_ASSERT_OR_ELSE_STR((cond), #cond, return (bRet)) - #define LOCK_METER_OP(f,l,t,d0,d1,d2) #define LOCK_METER_DATA(t,d0,d1,d2) diff --git a/src/nvidia/inc/kernel/gpu/ce/kernel_ce_shared.h b/src/nvidia/inc/kernel/gpu/ce/kernel_ce_shared.h index a36f715d06..854bb32110 100644 --- a/src/nvidia/inc/kernel/gpu/ce/kernel_ce_shared.h +++ b/src/nvidia/inc/kernel/gpu/ce/kernel_ce_shared.h @@ -32,7 +32,6 @@ NvBool ceIsCeGrce(OBJGPU *pGpu, RM_ENGINE_TYPE ceEngineType); NvBool ceIsPartneredWithGr(OBJGPU *pGpu, RM_ENGINE_TYPE ceEngineType, RM_ENGINE_TYPE grEngineType); -NvU32 ceCountGrCe(OBJGPU *pGpu); -NvBool ceIsDecompLce(OBJGPU *pGpu, NvU32 nv2080EngineId); +NvU32 ceCountGrCe(OBJGPU *pGpu); #endif diff --git a/src/nvidia/inc/kernel/gpu/error_cont.h b/src/nvidia/inc/kernel/gpu/error_cont.h index 87dfb84b0b..a587c18c5f 100644 --- a/src/nvidia/inc/kernel/gpu/error_cont.h +++ b/src/nvidia/inc/kernel/gpu/error_cont.h @@ -199,6 +199,9 @@ typedef struct _NV_ERROR_CONT_LOCATION * _E12A_CE_POISON_IN_USER_CHANNEL occurs. * - RC_ALL_COMPUTE_CHANNELS_IN_SPECIFIC_PARTITION : RC Recovery compute channels of only specific MIG partition * as that error can be attributed to a specific MIG partition. + * - RC_ALL_CHANNELS_IN_VF : RC Recovery compute channels of only specific GFID + * as that error can be attributed to a VF. + * - RC_ALL_USER_CHANNELS : RC Recovery ALL user channels on a GPU. * - RC_ALL_COMPUTE_CHANNELS : RC Recovery ALL compute channels on a GPU that saw this interrupt. * (If MIG is enabled, then RC Recovery compute channels in all MIG partitions) * - CE_TSG_RESET : Reset the halted CE Engine. Impacts the CE channels loaded on the TSG when the CE Halted. @@ -242,14 +245,14 @@ typedef struct _NV_ERROR_CONT_LOCATION {ROBUST_CHANNEL_CONTAINED_ERROR , NV_FALSE , NV_FALSE , NV_TRUE , NV2080_NOTIFIERS_POISON_ERROR_NON_FATAL /* , No , RC_ALL_CHANNELS_IN_VF */ }}}, \ { NV_ERROR_CONT_ERR_ID_E21B_XALEP_INGRESS_UNCONTAINED_POISON, {{ROBUST_CHANNEL_UNCONTAINED_ERROR, NV_TRUE , NV_FALSE , NV_FALSE , NV2080_NOTIFIERS_POISON_ERROR_FATAL /* , No , RC_ALL_COMPUTE_CHANNELS */ }, \ {ROBUST_CHANNEL_UNCONTAINED_ERROR, NV_TRUE , NV_FALSE , NV_FALSE , NV2080_NOTIFIERS_POISON_ERROR_FATAL /* , No , RC_ALL_COMPUTE_CHANNELS */ }}}, \ - { NV_ERROR_CONT_ERR_ID_E22_PMU_POISON , {{ROBUST_CHANNEL_UNCONTAINED_ERROR, NV_TRUE , NV_FALSE , NV_FALSE , NV2080_NOTIFIERS_POISON_ERROR_FATAL /* , No , RC_ALL_COMPUTE_CHANNELS */ }, \ - {ROBUST_CHANNEL_UNCONTAINED_ERROR, NV_TRUE , NV_FALSE , NV_FALSE , NV2080_NOTIFIERS_POISON_ERROR_FATAL /* , No , RC_ALL_COMPUTE_CHANNELS */ }}}, \ - { NV_ERROR_CONT_ERR_ID_E23_SEC2_POISON , {{ROBUST_CHANNEL_UNCONTAINED_ERROR, NV_TRUE , NV_FALSE , NV_FALSE , NV2080_NOTIFIERS_POISON_ERROR_FATAL /* , No , RC_ALL_COMPUTE_CHANNELS */ }, \ - {ROBUST_CHANNEL_UNCONTAINED_ERROR, NV_TRUE , NV_FALSE , NV_FALSE , NV2080_NOTIFIERS_POISON_ERROR_FATAL /* , No , RC_ALL_COMPUTE_CHANNELS */ }}}, \ - { NV_ERROR_CONT_ERR_ID_E24_GSP_POISON , {{ROBUST_CHANNEL_UNCONTAINED_ERROR, NV_TRUE , NV_FALSE , NV_FALSE , NV2080_NOTIFIERS_POISON_ERROR_FATAL /* , No , NO_RC */ }, \ - {ROBUST_CHANNEL_UNCONTAINED_ERROR, NV_TRUE , NV_FALSE , NV_FALSE , NV2080_NOTIFIERS_POISON_ERROR_FATAL /* , No , NO_RC */ }}}, \ - { NV_ERROR_CONT_ERR_ID_E25_FBFALCON_POISON , {{ROBUST_CHANNEL_UNCONTAINED_ERROR, NV_TRUE , NV_FALSE , NV_FALSE , NV2080_NOTIFIERS_POISON_ERROR_FATAL /* , No , RC_ALL_COMPUTE_CHANNELS */ }, \ - {ROBUST_CHANNEL_UNCONTAINED_ERROR, NV_TRUE , NV_FALSE , NV_FALSE , NV2080_NOTIFIERS_POISON_ERROR_FATAL /* , No , RC_ALL_COMPUTE_CHANNELS */ }}}, \ + { NV_ERROR_CONT_ERR_ID_E22_PMU_POISON , {{ROBUST_CHANNEL_CONTAINED_ERROR , NV_TRUE , NV_FALSE , NV_FALSE , NV2080_NOTIFIERS_POISON_ERROR_FATAL /* , No , RC_ALL_COMPUTE_CHANNELS */ }, \ + {ROBUST_CHANNEL_CONTAINED_ERROR , NV_TRUE , NV_FALSE , NV_FALSE , NV2080_NOTIFIERS_POISON_ERROR_FATAL /* , No , RC_ALL_COMPUTE_CHANNELS */ }}}, \ + { NV_ERROR_CONT_ERR_ID_E23_SEC2_POISON , {{ROBUST_CHANNEL_CONTAINED_ERROR , NV_TRUE , NV_FALSE , NV_FALSE , NV2080_NOTIFIERS_POISON_ERROR_FATAL /* , No , RC_ALL_COMPUTE_CHANNELS */ }, \ + {ROBUST_CHANNEL_CONTAINED_ERROR , NV_TRUE , NV_FALSE , NV_FALSE , NV2080_NOTIFIERS_POISON_ERROR_FATAL /* , No , RC_ALL_COMPUTE_CHANNELS */ }}}, \ + { NV_ERROR_CONT_ERR_ID_E24_GSP_POISON , {{ROBUST_CHANNEL_CONTAINED_ERROR , NV_TRUE , NV_FALSE , NV_FALSE , NV2080_NOTIFIERS_POISON_ERROR_FATAL /* , No , RC_ALL_USER_CHANNELS */ }, \ + {ROBUST_CHANNEL_CONTAINED_ERROR , NV_TRUE , NV_FALSE , NV_FALSE , NV2080_NOTIFIERS_POISON_ERROR_FATAL /* , No , RC_ALL_USER_CHANNELS */ }}}, \ + { NV_ERROR_CONT_ERR_ID_E25_FBFALCON_POISON , {{ROBUST_CHANNEL_CONTAINED_ERROR , NV_TRUE , NV_FALSE , NV_FALSE , NV2080_NOTIFIERS_POISON_ERROR_FATAL /* , No , RC_ALL_COMPUTE_CHANNELS */ }, \ + {ROBUST_CHANNEL_CONTAINED_ERROR , NV_TRUE , NV_FALSE , NV_FALSE , NV2080_NOTIFIERS_POISON_ERROR_FATAL /* , No , RC_ALL_COMPUTE_CHANNELS */ }}}, \ { NV_ERROR_CONT_ERR_ID_E26_NVDEC_POISON , {{ROBUST_CHANNEL_CONTAINED_ERROR , NV_FALSE , NV_FALSE , NV_TRUE , NV2080_NOTIFIERS_POISON_ERROR_NON_FATAL /* , No , RC_COMPUTE_CHANNELS_IN_ADDRESS_SPACE */ }, \ {ROBUST_CHANNEL_CONTAINED_ERROR , NV_FALSE , NV_FALSE , NV_TRUE , NV2080_NOTIFIERS_POISON_ERROR_NON_FATAL /* , No , RC_COMPUTE_CHANNELS_IN_ADDRESS_SPACE */ }}}, \ { NV_ERROR_CONT_ERR_ID_E27_NVJPG_POISON , {{ROBUST_CHANNEL_CONTAINED_ERROR , NV_FALSE , NV_FALSE , NV_TRUE , NV2080_NOTIFIERS_POISON_ERROR_NON_FATAL /* , No , RC_COMPUTE_CHANNELS_IN_ADDRESS_SPACE */ }, \ diff --git a/src/nvidia/inc/kernel/gpu/external_device/dac_p2060.h b/src/nvidia/inc/kernel/gpu/external_device/dac_p2060.h index e47a63d9a8..9de1650620 100644 --- a/src/nvidia/inc/kernel/gpu/external_device/dac_p2060.h +++ b/src/nvidia/inc/kernel/gpu/external_device/dac_p2060.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -235,7 +235,9 @@ NV_STATUS gsyncSetUseHouse_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU3 NV_STATUS gsyncGetSyncStartDelay_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU32 *); NV_STATUS gsyncSetSyncStartDelay_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU32); NV_STATUS gsyncRefSignal_P2060 (OBJGPU *, PDACEXTERNALDEVICE, REFTYPE, GSYNCSYNCSIGNAL, NvBool bRate, NvU32 *); -NV_STATUS gsyncRefMaster_P2060 (OBJGPU *, PDACEXTERNALDEVICE, REFTYPE, NvU32 *DisplayMask, NvU32 *Refresh, NvBool retainMaster, NvBool skipSwapBarrierWar); +NV_STATUS gsyncRefMaster_P2060 (OBJGPU *, OBJGSYNC *, REFTYPE, NvU32 *DisplayMask, + NvU32 *Refresh, NvBool retainMaster, + NvBool skipSwapBarrierWar); NV_STATUS gsyncRefSlaves_P2060 (OBJGPU *, PDACEXTERNALDEVICE, REFTYPE, NvU32 *DisplayMask_s, NvU32 *Refresh); NV_STATUS gsyncGetCplStatus_P2060 (OBJGPU *, PDACEXTERNALDEVICE, GSYNCSTATUS, NvU32 *); NV_STATUS gsyncGetEmitTestSignal_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU32 *); diff --git a/src/nvidia/inc/kernel/gpu/external_device/dac_p2061.h b/src/nvidia/inc/kernel/gpu/external_device/dac_p2061.h index a066bb5948..eff75919c0 100644 --- a/src/nvidia/inc/kernel/gpu/external_device/dac_p2061.h +++ b/src/nvidia/inc/kernel/gpu/external_device/dac_p2061.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -33,5 +33,6 @@ NV_STATUS gsyncSetHouseSyncMode_P2061(OBJGPU *, DACEXTERNALDEVICE *, NvU8); NV_STATUS gsyncGetCplStatus_P2061 (OBJGPU *, DACEXTERNALDEVICE *, GSYNCSTATUS, NvU32 *); NV_STATUS gsyncSetSyncSkew_P2061_V204(OBJGPU *, DACEXTERNALDEVICE *, NvU32); NV_STATUS gsyncGetSyncSkew_P2061_V204(OBJGPU *, DACEXTERNALDEVICE *, NvU32 *); +NV_STATUS gsyncSetRasterSyncDecodeMode_P2061_V300(OBJGPU *, DACEXTERNALDEVICE *); #endif // DAC_P2061_H diff --git a/src/nvidia/inc/kernel/gpu/external_device/dev_p2061.h b/src/nvidia/inc/kernel/gpu/external_device/dev_p2061.h index 5c8366a528..9314159a09 100644 --- a/src/nvidia/inc/kernel/gpu/external_device/dev_p2061.h +++ b/src/nvidia/inc/kernel/gpu/external_device/dev_p2061.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -34,4 +34,13 @@ #define NV_P2061_STATUS6_INT_PORT_DIRECTION_INPUT 0 /* RWXVF */ #define NV_P2061_STATUS6_INT_PORT_DIRECTION_OUTPUT 1 /* RWXVF */ +// Used in FW 3.00 and above +#define NV_P2061_CONTROL5 0x33 /* RW-1R */ +#define NV_P2061_CONTROL5_RASTER_SYNC_DECODE_MODE 1:0 /* RWXVF */ +#define NV_P2061_CONTROL5_RASTER_SYNC_DECODE_MODE_VSYNC_SHORT_PULSE 0 /* RWXVF */ +#define NV_P2061_CONTROL5_RASTER_SYNC_DECODE_MODE_VSYNC_SINGLE_PULSE 1 /* RWXVF */ +#define NV_P2061_CONTROL5_SYNC_MODE 2:2 /* RWXVF */ +#define NV_P2061_CONTROL5_SYNC_MODE_FIXED_REFRESH_RATE 0 /* RWXVF */ +#define NV_P2061_CONTROL5_SYNC_MODE_VARIABLE_REFRESH_RATE 1 /* RWXVF */ + #endif //DEV_P2061_H diff --git a/src/nvidia/inc/kernel/gpu/fifo/kernel_sched_mgr.h b/src/nvidia/inc/kernel/gpu/fifo/kernel_sched_mgr.h deleted file mode 100644 index e31a1111bf..0000000000 --- a/src/nvidia/inc/kernel/gpu/fifo/kernel_sched_mgr.h +++ /dev/null @@ -1,3 +0,0 @@ - -#include "g_kernel_sched_mgr_nvoc.h" - diff --git a/src/nvidia/inc/kernel/gpu/fsp/kern_fsp_cot_payload.h b/src/nvidia/inc/kernel/gpu/fsp/kern_fsp_cot_payload.h new file mode 100644 index 0000000000..55071a8460 --- /dev/null +++ b/src/nvidia/inc/kernel/gpu/fsp/kern_fsp_cot_payload.h @@ -0,0 +1,58 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#pragma once +#ifndef KERN_FSP_COT_PAYLOAD_H +#define KERN_FSP_COT_PAYLOAD_H + +#pragma pack(1) +typedef struct +{ + NvU32 constBlob; + NvU8 msgType; + NvU16 vendorId; +} MCTP_HEADER; + +// Needed to remove unnecessary padding +#pragma pack(1) +typedef struct +{ + NvU16 version; + NvU16 size; + NvU64 gspFmcSysmemOffset; + NvU64 frtsSysmemOffset; + NvU32 frtsSysmemSize; + + // Note this is an offset from the end of FB + NvU64 frtsVidmemOffset; + NvU32 frtsVidmemSize; + + // Authentication related fields + NvU32 hash384[12]; + NvU32 publicKey[96]; + NvU32 signature[96]; + + NvU64 gspBootArgsSysmemOffset; +} NVDM_PAYLOAD_COT; +#pragma pack() + +#endif // KERN_FSP_COT_PAYLOAD_H diff --git a/src/nvidia/src/kernel/gpu/mmu/arch/ada/kern_gmmu_ad102.c b/src/nvidia/inc/kernel/gpu/fsp/kern_fsp_mctp_pkt_state.h similarity index 71% rename from src/nvidia/src/kernel/gpu/mmu/arch/ada/kern_gmmu_ad102.c rename to src/nvidia/inc/kernel/gpu/fsp/kern_fsp_mctp_pkt_state.h index e9aaadad1c..9a90dc38b9 100644 --- a/src/nvidia/src/kernel/gpu/mmu/arch/ada/kern_gmmu_ad102.c +++ b/src/nvidia/inc/kernel/gpu/fsp/kern_fsp_mctp_pkt_state.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -20,25 +20,17 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ +#pragma once +#ifndef KERN_FSP_MCTP_PKT_STATE_H +#define KERN_FSP_MCTP_PKT_STATE_H -#include "gpu/mmu/kern_gmmu.h" - -#include "published/ada/ad102/dev_fault.h" - -/*! - * @brief Get the engine ID associated with the max CE - * - * @param[in] pGpu OBJGPU pointer - * @param[in] pKernelGmmu KernelGmmu pointer - * - * return engine ID of the max CE - */ -NvU32 -kgmmuGetMaxCeEngineId_AD102 -( - OBJGPU *pGpu, - KernelGmmu *pKernelGmmu -) +// Type of packet, can either be SOM, EOM, neither, or both (1-packet messages) +typedef enum { - return NV_PFAULT_MMU_ENG_ID_CE5; -} + MCTP_PACKET_STATE_START, + MCTP_PACKET_STATE_INTERMEDIATE, + MCTP_PACKET_STATE_END, + MCTP_PACKET_STATE_SINGLE_PACKET +} MCTP_PACKET_STATE; + +#endif // KERN_FSP_MCTP_PKT_STATE_H diff --git a/src/nvidia/inc/kernel/gpu/gpu_ecc.h b/src/nvidia/inc/kernel/gpu/gpu_ecc.h new file mode 100644 index 0000000000..b1539a03e4 --- /dev/null +++ b/src/nvidia/inc/kernel/gpu/gpu_ecc.h @@ -0,0 +1,60 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _GPU_ECC_H_ +#define _GPU_ECC_H_ + +typedef struct ECC_INFO +{ + NvU32 address; + NvU32 addressExt; + NvU32 locationId; // Holds GPC#, Partition#, etc. depending on unit + NvU32 subLocationId; // Holds TPC#, sub-partition#, slice#, etc. depending on unit + NvU64 corTotCnt; + NvU64 corUniCnt; + NvU64 uncTotCnt; + NvU64 uncUniCnt; + NvBool bCorError; + NvBool bCorTotOverflow; + NvBool bCorUniOverflow; + NvBool bUncError; + NvBool bUncTotOverflow; + NvBool bUncUniOverflow; + NvBool bPermanentCorError; +} ECC_INFO; + +typedef struct ECC_COUNTERS +{ + NvU64 corCntTotCached; + NvU64 corCntTotVolatile; + NvU64 corCntUniCached; + NvU64 corCntUniVolatile; + NvU64 uncCntTotCached; + NvU64 uncCntUniCached; + NvU32 corTotOverflowCount; + NvU32 corUniOverflowCount; + NvU32 uncTotOverflowCount; + NvU32 uncUniOverflowCount; +} ECC_COUNTERS; + +#endif // _GPU_ECC_H diff --git a/src/nvidia/inc/kernel/gpu/gpu_engine_type.h b/src/nvidia/inc/kernel/gpu/gpu_engine_type.h index 5c1d76303d..098f16c62e 100644 --- a/src/nvidia/inc/kernel/gpu/gpu_engine_type.h +++ b/src/nvidia/inc/kernel/gpu/gpu_engine_type.h @@ -50,7 +50,6 @@ typedef enum RM_ENGINE_TYPE_COPY7 = (0x00000010), RM_ENGINE_TYPE_COPY8 = (0x00000011), RM_ENGINE_TYPE_COPY9 = (0x00000012), - // removal tracking bug: 3748354 RM_ENGINE_TYPE_COPY10 = (0x00000013), RM_ENGINE_TYPE_COPY11 = (0x00000014), RM_ENGINE_TYPE_COPY12 = (0x00000015), @@ -95,7 +94,6 @@ typedef enum RM_ENGINE_TYPE_NVJPEG6 = (0x0000003c), RM_ENGINE_TYPE_NVJPEG7 = (0x0000003d), RM_ENGINE_TYPE_OFA0 = (0x0000003e), - // removal tracking bug: 3748354 RM_ENGINE_TYPE_OFA1 = (0x0000003f), RM_ENGINE_TYPE_RESERVED40 = (0x00000040), RM_ENGINE_TYPE_RESERVED41 = (0x00000041), @@ -130,12 +128,10 @@ typedef enum #define RM_ENGINE_TYPE_CIPHER RM_ENGINE_TYPE_TSEC #define RM_ENGINE_TYPE_NVJPG RM_ENGINE_TYPE_NVJPEG0 -// removal tracking bug: 3748354 #define RM_ENGINE_TYPE_COPY_SIZE 20 #define RM_ENGINE_TYPE_NVENC_SIZE 3 #define RM_ENGINE_TYPE_NVJPEG_SIZE 8 #define RM_ENGINE_TYPE_NVDEC_SIZE 8 -// removal tracking bug: 3748354 #define RM_ENGINE_TYPE_OFA_SIZE 2 #define RM_ENGINE_TYPE_GR_SIZE 8 diff --git a/src/nvidia/inc/kernel/gpu/gpu_fabric_probe.h b/src/nvidia/inc/kernel/gpu/gpu_fabric_probe.h index af28009156..c590d05466 100644 --- a/src/nvidia/inc/kernel/gpu/gpu_fabric_probe.h +++ b/src/nvidia/inc/kernel/gpu/gpu_fabric_probe.h @@ -65,6 +65,7 @@ NvBool gpuFabricProbeIsSuccess(GPU_FABRIC_PROBE_INFO_KERNEL *pGpuFabricProbeInfo NV_STATUS gpuFabricProbeGetFmStatus(GPU_FABRIC_PROBE_INFO_KERNEL *pGpuFabricProbeInfoKernel); NvBool gpuFabricProbeIsSupported(OBJGPU *pGpu); NV_STATUS gpuFabricProbeSetBwMode(NvU8 mode); +NV_STATUS gpuFabricProbeSetBwModePerGpu(OBJGPU *pGpu, NvU8 mode); NV_STATUS gpuFabricProbeGetlinkMaskToBeReduced(GPU_FABRIC_PROBE_INFO_KERNEL *pGpuFabricProbeInfoKernel, NvU32 *linkMaskToBeReduced); NV_STATUS gpuFabricProbeReceiveUpdateKernelCallback(NvU32 gpuInstance, NvU64 *pNotifyGfIdMask, diff --git a/src/nvidia/inc/kernel/gpu/gpu_resource_desc.h b/src/nvidia/inc/kernel/gpu/gpu_resource_desc.h index a9bca9da25..9d8df25351 100644 --- a/src/nvidia/inc/kernel/gpu/gpu_resource_desc.h +++ b/src/nvidia/inc/kernel/gpu/gpu_resource_desc.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -32,6 +32,6 @@ typedef struct GPU_RESOURCE_DESC } GPU_RESOURCE_DESC; // CLASSDESCRIPTOR is deprecated, please use GPU_RESOURCE_DESC -typedef struct GPU_RESOURCE_DESC CLASSDESCRIPTOR, *PCLASSDESCRIPTOR; +typedef struct GPU_RESOURCE_DESC CLASSDESCRIPTOR; #endif // _GPU_RESOURCE_DESC_H_ diff --git a/src/nvidia/inc/kernel/gpu/gpu_shared_data_map.h b/src/nvidia/inc/kernel/gpu/gpu_shared_data_map.h index f38e3d3f3c..dff663a766 100644 --- a/src/nvidia/inc/kernel/gpu/gpu_shared_data_map.h +++ b/src/nvidia/inc/kernel/gpu/gpu_shared_data_map.h @@ -40,6 +40,7 @@ typedef struct GpuSharedDataMap { NvP64 pMapBuffer; NvU64 lastPolledDataMask; NvU32 processId; + NvU32 pollingRegistryOverride; TMR_EVENT *pRusdRefreshTmrEvent; diff --git a/src/nvidia/inc/kernel/gpu/gsp/gsp_static_config.h b/src/nvidia/inc/kernel/gpu/gsp/gsp_static_config.h index 48ff72b0da..24c6722bd4 100644 --- a/src/nvidia/inc/kernel/gpu/gsp/gsp_static_config.h +++ b/src/nvidia/inc/kernel/gpu/gsp/gsp_static_config.h @@ -30,7 +30,6 @@ // CPU RM (aka GSP client) via NV_RM_RPC_GET_GSP_STATIC_INFO() call. #include "ctrl/ctrl0080/ctrl0080gpu.h" -#include "ctrl/ctrl0080/ctrl0080gr.h" #include "ctrl/ctrl2080/ctrl2080bios.h" #include "ctrl/ctrl2080/ctrl2080fb.h" #include "ctrl/ctrl2080/ctrl2080gpu.h" @@ -41,6 +40,7 @@ #include "platform/chipset/chipset.h" // BUSINFO #include "gpu/nvbitmask.h" // NVGPU_ENGINE_CAPS_MASK_ARRAY_MAX + // VF related info for GSP-RM typedef struct GSP_VF_INFO { @@ -61,19 +61,6 @@ typedef struct NvU32 linkCap; } GSP_PCIE_CONFIG_REG; -typedef struct GspSMInfo_t -{ - NvU32 version; - NvU32 regBankCount; - NvU32 regBankRegCount; - NvU32 maxWarpsPerSM; - NvU32 maxThreadsPerWarp; - NvU32 geomGsObufEntries; - NvU32 geomXbufEntries; - NvU32 maxSPPerSM; - NvU32 rtCoreCount; -} GspSMInfo; - typedef struct { NvU32 ecidLow; @@ -86,9 +73,6 @@ typedef struct GspStaticConfigInfo_t { NvU8 grCapsBits[NV0080_CTRL_GR_CAPS_TBL_SIZE]; NV2080_CTRL_GPU_GET_GID_INFO_PARAMS gidInfo; - NV2080_CTRL_GPU_GET_FERMI_GPC_INFO_PARAMS gpcInfo; - NV2080_CTRL_GPU_GET_FERMI_TPC_INFO_PARAMS tpcInfo[MAX_GPC_COUNT]; - NV2080_CTRL_GPU_GET_FERMI_ZCULL_INFO_PARAMS zcullInfo[MAX_GPC_COUNT]; NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS SKUInfo; NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_PARAMS fbRegionInfoParams; @@ -97,8 +81,6 @@ typedef struct GspStaticConfigInfo_t NvU32 engineCaps[NVGPU_ENGINE_CAPS_MASK_ARRAY_MAX]; - GspSMInfo SM_info; - NvBool poisonFuseEnabled; NvU64 fb_length; @@ -108,9 +90,6 @@ typedef struct GspStaticConfigInfo_t NvU64 fbp_mask; NvU32 l2_cache_size; - NvU32 gfxpBufferSize[NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_CONTEXT_POOL]; - NvU32 gfxpBufferAlignment[NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_CONTEXT_POOL]; - NvU8 gpuNameString[NV2080_GPU_MAX_NAME_STRING_LENGTH]; NvU8 gpuShortNameString[NV2080_GPU_MAX_NAME_STRING_LENGTH]; NvU16 gpuNameString_Unicode[NV2080_GPU_MAX_NAME_STRING_LENGTH]; @@ -174,7 +153,7 @@ typedef struct GspStaticConfigInfo_t NvBool bIsGpuUefi; NvBool bIsEfiInit; - EcidManufacturingInfo ecidInfo[2]; + EcidManufacturingInfo ecidInfo[MAX_GROUP_COUNT]; } GspStaticConfigInfo; // Pushed from CPU-RM to GSP-RM @@ -207,6 +186,7 @@ typedef struct GspSystemInfo NvBool bUpstreamL1Unsupported; NvBool bUpstreamL1PorSupported; NvBool bUpstreamL1PorMobileOnly; + NvBool bSystemHasMux; NvU8 upstreamAddressValid; BUSINFO FHBBusInfo; BUSINFO chipsetIDInfo; @@ -222,6 +202,7 @@ typedef struct GspSystemInfo NvBool bPreserveVideoMemoryAllocations; NvBool bTdrEventSupported; NvBool bFeatureStretchVblankCapable; + NvBool bEnableDynamicGranularityPageArrays; NvBool bClockBoostSupported; } GspSystemInfo; diff --git a/src/nvidia/inc/kernel/gpu/gsp/gsp_trace_rats_macro.h b/src/nvidia/inc/kernel/gpu/gsp/gsp_trace_rats_macro.h index 3d704c8272..e8981ca607 100644 --- a/src/nvidia/inc/kernel/gpu/gsp/gsp_trace_rats_macro.h +++ b/src/nvidia/inc/kernel/gpu/gsp/gsp_trace_rats_macro.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -40,8 +40,4 @@ #define KERNEL_GSP_TRACING_RATS_ENABLED 1 -#ifndef GET_RATS_TIMESTAMP_NS -#define GET_RATS_TIMESTAMP_NS() NV_ASSERT(0) -#endif - -#endif +#endif // GSP_TRACE_RATS_MACRO_H diff --git a/src/nvidia/inc/kernel/gpu/gsp/kernel_gsp_trace_rats.h b/src/nvidia/inc/kernel/gpu/gsp/kernel_gsp_trace_rats.h index 1726d22f1c..cd1dceaeb2 100644 --- a/src/nvidia/inc/kernel/gpu/gsp/kernel_gsp_trace_rats.h +++ b/src/nvidia/inc/kernel/gpu/gsp/kernel_gsp_trace_rats.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -28,6 +28,7 @@ #include "containers/multimap.h" #include "class/cl90cdtrace.h" #include "rmapi/event_buffer.h" +#include "rmapi/rmapi.h" typedef struct { @@ -36,6 +37,8 @@ typedef struct NvHandle hNotifier; NvHandle hEventBuffer; NvU64 pUserInfo; + NvU32 *message_buffer; + MEMORY_DESCRIPTOR *pMemDesc; } NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE; MAKE_MULTIMAP(GspTraceEventBufferBindMultiMap, NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE); @@ -44,6 +47,8 @@ void gspTraceNotifyAllConsumers(OBJGPU *pGpu, void *pArgs); void gspTraceEventBufferLogRecord(OBJGPU *pGpu, NV_RATS_GSP_TRACE_RECORD *intrTraceRecord); +void gspTraceServiceVgpuEventTracing(OBJGPU *pGpu); + NV_STATUS gspTraceAddBindpoint(OBJGPU *pGpu, RsClient *pClient, RsResourceRef *pEventBufferRef, @@ -52,7 +57,7 @@ NV_STATUS gspTraceAddBindpoint(OBJGPU *pGpu, NvU32 gspLoggingBufferSize, NvU32 gspLoggingBufferWatermark); -void gspTraceRemoveBindpoint(OBJGPU *pGpu, NvU64 uid, NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE* pBind); +void gspTraceRemoveBindpoint(OBJGPU *pGpu, NvU64 uid, NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE *pBind); void gspTraceRemoveAllBindpoints(EventBuffer *pEventBuffer); diff --git a/src/nvidia/inc/kernel/gpu/gsplite/kernel_gsplite.h b/src/nvidia/inc/kernel/gpu/gsplite/kernel_gsplite.h new file mode 100644 index 0000000000..3ff0043b37 --- /dev/null +++ b/src/nvidia/inc/kernel/gpu/gsplite/kernel_gsplite.h @@ -0,0 +1,3 @@ + +#include "g_kernel_gsplite_nvoc.h" + diff --git a/src/nvidia/inc/kernel/gpu/intr/engine_idx.h b/src/nvidia/inc/kernel/gpu/intr/engine_idx.h index 92242993cc..0dca1eae70 100644 --- a/src/nvidia/inc/kernel/gpu/intr/engine_idx.h +++ b/src/nvidia/inc/kernel/gpu/intr/engine_idx.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/inc/kernel/gpu/mem_mgr/mem_scrub.h b/src/nvidia/inc/kernel/gpu/mem_mgr/mem_scrub.h index bf5293257e..0cdb933118 100644 --- a/src/nvidia/inc/kernel/gpu/mem_mgr/mem_scrub.h +++ b/src/nvidia/inc/kernel/gpu/mem_mgr/mem_scrub.h @@ -94,7 +94,7 @@ typedef struct OBJMEMSCRUB { Sec2Utils *pSec2Utils; #endif // !defined(SRT_BUILD) // Engine used for scrubbing - NvU32 engineType; + NvBool bIsEngineTypeSec2; struct OBJGPU *pGpu; VGPU_GUEST_PMA_SCRUB_BUFFER_RING vgpuScrubBuffRing; diff --git a/src/nvidia/inc/kernel/gpu/mem_mgr/phys_mem_allocator/phys_mem_allocator.h b/src/nvidia/inc/kernel/gpu/mem_mgr/phys_mem_allocator/phys_mem_allocator.h index 884d897c01..b024c143b1 100644 --- a/src/nvidia/inc/kernel/gpu/mem_mgr/phys_mem_allocator/phys_mem_allocator.h +++ b/src/nvidia/inc/kernel/gpu/mem_mgr/phys_mem_allocator/phys_mem_allocator.h @@ -654,6 +654,20 @@ NV_STATUS pmaGetRegionInfo(PMA *pPma, NvU32 *pRegSize, PMA_REGION_DESCRIPTOR **p */ void pmaGetFreeMemory(PMA *pPma, NvU64 *pBytesFree); +/*! + * @brief Returns information about the client address space size + * that can be allocated + * + * @param[in] pPma PMA pointer + * @param[in] pSize Pointer that will return the size of the + * client-allocatable address space + * + * @return + * void + */ +void +pmaGetClientAddrSpaceSize(PMA *pPma, NvU64 *pSize); + /*! * @brief Returns information about the largest free FB memory chunk across all regions. * diff --git a/src/nvidia/inc/kernel/gpuvideo/video_event.h b/src/nvidia/inc/kernel/gpuvideo/video_event.h index a419e36e1e..78cddbfeec 100644 --- a/src/nvidia/inc/kernel/gpuvideo/video_event.h +++ b/src/nvidia/inc/kernel/gpuvideo/video_event.h @@ -200,8 +200,9 @@ typedef struct #define VIDEO_ENGINE_EVENT__LOG_DATA_SIZE(s) (sizeof(VIDEO_ENGINE_EVENT__RECORD) + s.event_log_data.size) -#define VIDEO_ENGINE_EVENT__TRACE_ADDR__OFFSET_LO (0xF90UL) -#define VIDEO_ENGINE_EVENT__TRACE_ADDR__OFFSET_HI (0xF94UL) +#define VIDEO_ENGINE_EVENT__TRACE_ADDR__OFFSET_LO (0xF90UL) +#define VIDEO_ENGINE_EVENT__TRACE_ADDR__OFFSET_HI (0xF94UL) +#define VIDEO_ENGINE_EVENT__TRACE_ADDR__MEM_TARGET (0xF98UL) /*! * Client information passing down by RM and saved at offset VIDEO_ENGINE_EVENT__LOG_INFO__OFFSET diff --git a/src/nvidia/inc/kernel/os/nv_memory_area.h b/src/nvidia/inc/kernel/os/nv_memory_area.h index 1d55366356..55d7fb0920 100644 --- a/src/nvidia/inc/kernel/os/nv_memory_area.h +++ b/src/nvidia/inc/kernel/os/nv_memory_area.h @@ -36,4 +36,69 @@ typedef struct MemoryArea NvU64 numRanges; } MemoryArea; +static inline NvU64 memareaSize(MemoryArea memArea) +{ + NvU64 size = 0; + NvU64 idx = 0; + for (idx = 0; idx < memArea.numRanges; idx++) + { + size += memArea.pRanges[idx].size; + } + return size; +} + +static inline MemoryRange +mrangeMake +( + NvU64 start, + NvU64 size +) +{ + MemoryRange range; + range.start = start; + range.size = size; + return range; +} + +static inline NvU64 +mrangeLimit +( + MemoryRange a +) +{ + return a.start + a.size; +} + +static inline NvBool +mrangeIntersects +( + MemoryRange a, + MemoryRange b +) +{ + return ((a.start >= b.start) && (a.start < mrangeLimit(b))) || + ((b.start >= a.start) && (b.start < mrangeLimit(a))); +} + +static inline NvBool +mrangeContains +( + MemoryRange outer, + MemoryRange inner +) +{ + return (inner.start >= outer.start) && (mrangeLimit(inner) <= mrangeLimit(outer)); +} + +static inline MemoryRange +mrangeOffset +( + MemoryRange range, + NvU64 amt +) +{ + range.start += amt; + return range; +} + #endif /* NV_MEMORY_AREA_H */ diff --git a/src/nvidia/inc/kernel/platform/nvpcf.h b/src/nvidia/inc/kernel/platform/nvpcf.h index 6fd7a62df8..4f7d109736 100644 --- a/src/nvidia/inc/kernel/platform/nvpcf.h +++ b/src/nvidia/inc/kernel/platform/nvpcf.h @@ -435,5 +435,177 @@ typedef struct // Controller Entry, Output Params6 #define NVPCF_DYNAMIC_PARAMS_ENTRY_2X_OUTPUT_PARAM6_CMD0_UNSIGNED 31:0 +#define NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_VERSION_10 0x10 +#define NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_1X_HEADER_SIZE_02 0x02 +#define NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_1X_HEADER_FMT_SIZE_02 "2b" +#define NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_1X_HEADER_SIZE_04 0x04 +#define NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_1X_HEADER_FMT_SIZE_04 "4b" +#define NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_1X_ENTRY_SIZE_11 0x11 +#define NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_1X_ENTRY_FMT_SIZE_11 "1b4d" + +#define NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_VERSION_20 0x20 +#define NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_2X_HEADER_SIZE_02 0x02 +#define NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_2X_HEADER_FMT_SIZE_02 "2b" +#define NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_2X_HEADER_SIZE_04 0x04 +#define NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_2X_HEADER_FMT_SIZE_04 "4b" + +#define NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_VERSION_20_MIN_ENTRIES 0x01 +#define NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_VERSION_20_MAX_ENTRIES 0x08 + +typedef struct +{ + /*! + * Table version. + */ + NvU32 version; + + /*! + * Size of header in bytes. + */ + NvU32 headerSize; + + /*! + * Size of each table entry in bytes. + */ + NvU32 entrySize; + + /*! + * Number of entries. + */ + NvU32 entryCount; +} DC_SYSTEM_POWER_LIMITS_HEADER_1X; + +typedef struct +{ + /*! + * Table version. + */ + NvU32 version; + + /*! + * Size of header in bytes. + */ + NvU32 headerSize; + + /*! + * Size of each table entry in bytes. + */ + NvU32 entrySize; + + /*! + * Number of entries. + */ + NvU32 entryCount; +} DC_SYSTEM_POWER_LIMITS_HEADER_2X; + +typedef struct +{ + /* + * Params0 - Battery state of charge threshold (percent 0-100) + */ + NvU32 batteryStateOfChargePercent; + + /* + * Params1 - Battery current limit (milliamps) + */ + NvU32 batteryCurrentLimitmA; + + /* + * Params2 - Rest of system reserved power (milliwatts) + */ + NvU32 restOfSytemReservedPowermW; + + /* + * Params3 - Min CPU TDP (milliwatts) + */ + NvU32 minCpuTdpmW; + + /* + * Params4 - Max CPU TDP (milliwatts) + */ + NvU32 maxCpuTdpmW; +} DC_SYSTEM_POWER_LIMITS_ENTRY_1X; + +typedef struct +{ + /* + * Params0 - Battery state of charge threshold (percent 0-100) + */ + NvU8 batteryStateOfChargePercent; + + /* + * Params1 - Long timescale battery current limit (milliamps) + */ + NvU32 longTimescaleBatteryCurrentLimitmA; + + /* + * Params2 - Short timescale battery current limit (milliamps) + */ + NvU32 shortTimescaleBatteryCurrentLimitmA; +} DC_SYSTEM_POWER_LIMITS_ENTRY_2X; + +#define NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_2X_ENTRY_SIZE_09 0x09 +#define NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_2X_ENTRY_FMT_SIZE_09 "1b2d" + +#define NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_VERSION_10_MIN_ENTRIES 0x01 +#define NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_VERSION_10_MAX_ENTRIES 0x08 + +/* + * Layout of CPU TDP Limit Control 1x data used for static config and driver-sbios + * inter-communication + */ + +#define NVPCF_CPU_TDP_LIMIT_CONTROL_TABLE_1X_VERSION (0x10) +#define NVPCF_CPU_TDP_LIMIT_CONTROL_TABLE_1X_HEADER_SIZE_03 (0x03U) +#define NVPCF_CPU_TDP_LIMIT_CONTROL_TABLE_1X_HEADER_FMT_SIZE_03 ("3b") +#define NVPCF_CPU_TDP_LIMIT_CONTROL_TABLE_1X_BODY_SIZE_04 (0x04U) +#define NVPCF_CPU_TDP_LIMIT_CONTROL_TABLE_1X_BODY_FMT_SIZE_04 ("1d") + +/*! + * CPU TDP Limit Control Header, unpacked + */ +typedef struct +{ + /* + * CPU TDP Limit Control Table Version. + */ + NvU8 version; + + /* + * Size of CPU TDP Limit Control Table Header in bytes. + */ + NvU8 headerSize; + + /* + * Size of body entry in bytes. + */ + NvU8 bodySize; +} CPU_TDP_LIMIT_CONTROL_HEADER_1X; + +/*! + * CPU TDP Limit Control Table Common Entry, unpacked + */ +typedef struct +{ + NvU32 param0; +} CPU_TDP_LIMIT_CONTROL_BODY_1X; + +/*! + * CPU TDP Limit Control Header, packed + */ +typedef struct +{ + NvU8 version; + NvU8 headerSize; + NvU8 bodySize; +} CPU_TDP_LIMIT_CONTROL_HEADER_1X_PACKED; + +/*! + * CPU TDP Limit Control Table Output, packed + */ +typedef struct +{ + NvU32 param0; +} CPU_TDP_LIMIT_CONTROL_BODY_1X_PACKED; #endif // NVPCF_H diff --git a/src/nvidia/inc/kernel/platform/p2p/p2p_caps.h b/src/nvidia/inc/kernel/platform/p2p/p2p_caps.h index d6121d882b..4470dbb3d7 100644 --- a/src/nvidia/inc/kernel/platform/p2p/p2p_caps.h +++ b/src/nvidia/inc/kernel/platform/p2p/p2p_caps.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -35,9 +35,9 @@ typedef enum } P2P_CONNECTIVITY; NV_STATUS p2pGetCaps (NvU32 gpuMask, NvBool *pP2PWriteCapable, NvBool *pP2PReadCapable, - P2P_CONNECTIVITY *pConnectivity); + NvBool *pP2PAtomicsCapable, P2P_CONNECTIVITY *pConnectivity); NV_STATUS p2pGetCapsStatus (NvU32 gpuMask, NvU8 *pP2PWriteCapStatus, NvU8 *pP2PReadCapStatus, - P2P_CONNECTIVITY *pConnectivity + NvBool *pP2PAtomicsCapable, P2P_CONNECTIVITY *pConnectivity ); #endif // P2P_CAPS_H diff --git a/src/nvidia/inc/kernel/rmapi/control.h b/src/nvidia/inc/kernel/rmapi/control.h index 1a9e979d05..d5995d40e0 100644 --- a/src/nvidia/inc/kernel/rmapi/control.h +++ b/src/nvidia/inc/kernel/rmapi/control.h @@ -261,13 +261,6 @@ NV_STATUS embeddedParamCopyOut(RMAPI_PARAM_COPY *pParamCopy, RmCtrlParams *pRmC // ?? #define RMCTRL_FLAGS_ALLOW_WITHOUT_SYSMEM_ACCESS 0x000001000 -// -// This flag specifies that the control can be run by an admin privileged -// client running in a full SRIOV, vGPU-GSP-ENABLED hypervisor environment. -// Overrides regular privilege level flags. -// -#define RMCTRL_FLAGS_CPU_PLUGIN_FOR_VGPU_GSP 0x000002000 - // // This flag specifies that the control can be run by an admin privileged // client running in a full SRIOV, vGPU-GSP-DISABLED hypervisor environment. diff --git a/src/nvidia/inc/kernel/rmapi/mapping_list.h b/src/nvidia/inc/kernel/rmapi/mapping_list.h index c3ba29a911..ba6f9c9091 100644 --- a/src/nvidia/inc/kernel/rmapi/mapping_list.h +++ b/src/nvidia/inc/kernel/rmapi/mapping_list.h @@ -113,8 +113,7 @@ CliUpdateMemoryMappingInfo pCpuMapping->processId = osGetCurrentProcess(); pCpuMapping->pLinearAddress = cpuAddress; pCpuMapping->pPrivate->pPriv = priv; - pCpuMapping->pPrivate->gpuAddress = -1; - pCpuMapping->pPrivate->gpuMapLength = -1; + portMemSet(&pCpuMapping->pPrivate->memArea, 0, sizeof(MemoryArea)); return NV_OK; } @@ -148,8 +147,15 @@ CliUpdateDeviceMemoryMapping pCpuMapping->processId = osGetCurrentProcess(); pCpuMapping->pLinearAddress = cpuAddress; pCpuMapping->pPrivate->pPriv = priv; - pCpuMapping->pPrivate->gpuAddress = gpuAddress; - pCpuMapping->pPrivate->gpuMapLength = gpuMapLength; + if (gpuMapLength == 0 || gpuAddress == 0) + { + portMemSet(&pCpuMapping->pPrivate->memArea, 0, sizeof(MemoryArea)); + return NV_OK; + } + pCpuMapping->pPrivate->memArea.numRanges = 1; + pCpuMapping->pPrivate->memArea.pRanges = &pCpuMapping->pPrivate->backingRangeStore; + pCpuMapping->pPrivate->backingRangeStore.start = gpuAddress; + pCpuMapping->pPrivate->backingRangeStore.size = gpuMapLength; return NV_OK; } diff --git a/src/nvidia/inc/kernel/rmapi/nv_gpu_ops.h b/src/nvidia/inc/kernel/rmapi/nv_gpu_ops.h index 0021a1ba21..b9faec46ca 100644 --- a/src/nvidia/inc/kernel/rmapi/nv_gpu_ops.h +++ b/src/nvidia/inc/kernel/rmapi/nv_gpu_ops.h @@ -45,6 +45,11 @@ typedef struct gpuObject *gpuObjectHandle; typedef struct gpuRetainedChannel_struct gpuRetainedChannel; + +NV_STATUS calculatePCIELinkRateMBps(NvU32 lanes, + NvU32 pciLinkMaxSpeed, + NvU32 *pcieLinkRate); + NV_STATUS nvGpuOpsCreateSession(struct gpuSession **session); NV_STATUS nvGpuOpsDestroySession(struct gpuSession *session); @@ -180,6 +185,8 @@ NV_STATUS nvGpuOpsGetFbInfo(struct gpuDevice *device, gpuFbInfo * fbInfo); NV_STATUS nvGpuOpsGetEccInfo(struct gpuDevice *device, gpuEccInfo * eccInfo); +NV_STATUS nvGpuOpsGetNvlinkInfo(struct gpuDevice *device, gpuNvlinkInfo * nvlinkInfo); + NV_STATUS nvGpuOpsInitFaultInfo(struct gpuDevice *device, gpuFaultInfo *pFaultInfo); NV_STATUS nvGpuOpsDestroyFaultInfo(struct gpuDevice *device, @@ -227,6 +234,12 @@ NV_STATUS nvGpuOpsGetExternalAllocPtes(struct gpuAddressSpace *vaSpace, NvU64 size, gpuExternalMappingInfo *pGpuExternalMappingInfo); +NV_STATUS nvGpuOpsGetExternalAllocPhysAddrs(struct gpuAddressSpace *vaSpace, + NvHandle hDupedMemory, + NvU64 offset, + NvU64 size, + gpuExternalPhysAddrInfo *pGpuExternalPhysAddrInfo); + NV_STATUS nvGpuOpsRetainChannel(struct gpuAddressSpace *vaSpace, NvHandle hClient, NvHandle hChannel, @@ -279,6 +292,8 @@ NV_STATUS nvGpuOpsFlushReplayableFaultBuffer(gpuFaultInfo *pFaultInfo, NV_STATUS nvGpuOpsTogglePrefetchFaults(gpuFaultInfo *pFaultInfo, NvBool bEnable); +void nvGpuOpsReportFatalError(NV_STATUS error); + // Interface used for CCSL NV_STATUS nvGpuOpsCcslContextInit(struct ccslContext_t **ctx, gpuChannelHandle channel); diff --git a/src/nvidia/inc/kernel/rmapi/rmapi.h b/src/nvidia/inc/kernel/rmapi/rmapi.h index e3f08cdd71..305d790591 100644 --- a/src/nvidia/inc/kernel/rmapi/rmapi.h +++ b/src/nvidia/inc/kernel/rmapi/rmapi.h @@ -67,6 +67,15 @@ void rmapiShutdown(void); #define RMAPI_LOCK_FLAGS_WRITE (0x00000000) // Acquire API lock for WRITE - Default #define RMAPI_LOCK_FLAGS_LOW_PRIORITY NVBIT(2) // Deprioritize lock acquire +/** + * Acquire API lock for READ, even if NV_REG_STR_RM_READONLY_API_LOCK_MODULE is + * not set for the module. + * + * This allows to opt-in into the RO-locking behavior for specific paths while + * global enablement is pending. + */ +#define RMAPI_LOCK_FLAGS_READ_FORCE NVBIT(3) + /** * Acquire the RM API Lock * diff --git a/src/nvidia/inc/kernel/vgpu/dev_vgpu.h b/src/nvidia/inc/kernel/vgpu/dev_vgpu.h index 27c95995bb..f6acf18400 100644 --- a/src/nvidia/inc/kernel/vgpu/dev_vgpu.h +++ b/src/nvidia/inc/kernel/vgpu/dev_vgpu.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2015-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -142,6 +142,7 @@ #define NV_VGPU_EV_FLAGS_TYPE_ECC 0x00000005 /* RW--V */ #define NV_VGPU_EV_FLAGS_TYPE_NVENC_REPORTING_STATE 0x00000006 /* RW--V */ #define NV_VGPU_EV_FLAGS_TYPE_INBAND_RESPONSE 0x00000007 /* RW--V */ +#define NV_VGPU_EV_FLAGS_TYPE_TRACING 0x00000008 /* RW--V */ #define NV_VGPU_EV_NOTIFIER_TIMESTAMP 0x00000010 /* RW-4R */ #define NV_VGPU_EV_NOTIFIER_TIMESTAMP_HI 0x00000014 /* RW-4R */ #define NV_VGPU_EV_NOTIFIER_INFO32 0x00000018 /* RW-4R */ @@ -230,6 +231,8 @@ typedef union { volatile NvU32 guestEccStatus; // guest ecc status volatile NvU64 sysmemBitMapTablePfn; // Root node's pfn value of dirty sysmem tracking table volatile NvU32 guestOsType; // Guest OS type + volatile NvU32 requestedGspCaps; // requested GSP caps + volatile VGPU_GSP_BUF_INFO debugBuf; // Debug buffer address } ; volatile NvU8 buf[VGPU_GSP_CTRL_BUF_SIZE_V1]; } VGPU_GSP_CTRL_BUF_V1; @@ -248,6 +251,8 @@ ct_assert(NV_OFFSETOF(VGPU_GSP_CTRL_BUF_V1, getEventBuf ) == 0x048); ct_assert(NV_OFFSETOF(VGPU_GSP_CTRL_BUF_V1, guestEccStatus ) == 0x04C); ct_assert(NV_OFFSETOF(VGPU_GSP_CTRL_BUF_V1, sysmemBitMapTablePfn ) == 0x050); ct_assert(NV_OFFSETOF(VGPU_GSP_CTRL_BUF_V1, guestOsType ) == 0x058); +ct_assert(NV_OFFSETOF(VGPU_GSP_CTRL_BUF_V1, requestedGspCaps ) == 0x05C); +ct_assert(NV_OFFSETOF(VGPU_GSP_CTRL_BUF_V1, debugBuf ) == 0x060); /****** Response buffer: written by GSP vGPU plugin and read by guest RM ******/ @@ -259,6 +264,7 @@ typedef union { volatile NvU32 putEventBuf; // PUT index in circular event buffer volatile NvU32 hostEccStatus; // host ecc status volatile NvU32 usmType; // Host USM Type + volatile NvU32 enabledGspCaps; // Enabled GSP caps }; volatile NvU8 buf[VGPU_GSP_RESPONSE_BUF_SIZE_V1]; } VGPU_GSP_RESPONSE_BUF_V1; @@ -271,6 +277,7 @@ ct_assert(NV_OFFSETOF(VGPU_GSP_RESPONSE_BUF_V1, responseId ) == 0x000); ct_assert(NV_OFFSETOF(VGPU_GSP_RESPONSE_BUF_V1, putEventBuf ) == 0x004); ct_assert(NV_OFFSETOF(VGPU_GSP_RESPONSE_BUF_V1, hostEccStatus ) == 0x008); ct_assert(NV_OFFSETOF(VGPU_GSP_RESPONSE_BUF_V1, usmType ) == 0x00C); +ct_assert(NV_OFFSETOF(VGPU_GSP_RESPONSE_BUF_V1, enabledGspCaps ) == 0x010); /******************************************************************************/ /* GSP Control buffer format - Version 1 - END */ @@ -320,5 +327,10 @@ typedef struct { NvU64 nodePfns[MAX_PFNS_PER_4K_PAGE - 1]; } VGPU_GSP_SYSMEM_BITMAP_ROOT_NODE; +#define NV_VGPU_DEBUG_BUFF_DRIVER_SIZE 0x7FF +#define NV_VGPU_GSP_CAPS_DEBUG_BUFF_SUPPORTED 0:0 +#define NV_VGPU_GSP_CAPS_DEBUG_BUFF_SUPPORTED_TRUE 0x00000001 +#define NV_VGPU_GSP_CAPS_DEBUG_BUFF_SUPPORTED_FALSE 0x00000000 + ct_assert(sizeof(VGPU_GSP_SYSMEM_BITMAP_ROOT_NODE) == 0x1000); #endif // __vgpu_dev_nv_vgpu_h__ diff --git a/src/nvidia/inc/kernel/vgpu/rm_plugin_shared_code.h b/src/nvidia/inc/kernel/vgpu/rm_plugin_shared_code.h index c75cfb4d2c..d29f8a7c60 100644 --- a/src/nvidia/inc/kernel/vgpu/rm_plugin_shared_code.h +++ b/src/nvidia/inc/kernel/vgpu/rm_plugin_shared_code.h @@ -436,7 +436,36 @@ return_t deserialize_NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS_v12_01(NV2080_C dest->flags = src->flags; dest->hClient = src->hClient; dest->hChannel = src->hChannel; - for (i = 0; i < NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_END; ++i) + for (i = 0; i < NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_END_v03_00; ++i) + dest->vMemPtrs[i] = src->vMemPtrs[i]; + dest->gfxpPreemptMode = src->gfxpPreemptMode; + dest->cilpPreemptMode = src->cilpPreemptMode; + dest->grRouteInfo.flags = src->grRouteInfo.flags; + dest->grRouteInfo.route = src->grRouteInfo.route; + } + else + return FAILURE_T; +#endif + return SUCCESS_T; +} + +static +return_t deserialize_NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS_v28_07(NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS* pParams, + NvU8* buffer, + NvU32 bufferSize, + NvU32* offset) +{ +#ifdef COPY_INPUT_PARAMETERS + NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS_v28_07* src = (void*)(buffer); + NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS* dest = pParams; + + if (src && dest) { + NvU32 i; + + dest->flags = src->flags; + dest->hClient = src->hClient; + dest->hChannel = src->hChannel; + for (i = 0; i < NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_END_v28_07; ++i) dest->vMemPtrs[i] = src->vMemPtrs[i]; dest->gfxpPreemptMode = src->gfxpPreemptMode; dest->cilpPreemptMode = src->cilpPreemptMode; @@ -3100,7 +3129,36 @@ return_t serialize_NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS_v12_01(NV2080_CTR dest->flags = src->flags; dest->hClient = src->hClient; dest->hChannel = src->hChannel; - for (i = 0; i < NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_END; ++i) + for (i = 0; i < NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_END_v03_00; ++i) + dest->vMemPtrs[i] = src->vMemPtrs[i]; + dest->gfxpPreemptMode = src->gfxpPreemptMode; + dest->cilpPreemptMode = src->cilpPreemptMode; + dest->grRouteInfo.flags = src->grRouteInfo.flags; + dest->grRouteInfo.route = src->grRouteInfo.route; + } + else + return FAILURE_T; +#endif + return SUCCESS_T; +} + +static +return_t serialize_NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS_v28_07(NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS* pParams, + NvU8* buffer, + NvU32 bufferSize, + NvU32* offset) +{ +#ifdef COPY_INPUT_PARAMETERS + NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS* src = pParams; + NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS_v28_07* dest = (void*)(buffer); + + if (src && dest) { + NvU32 i; + + dest->flags = src->flags; + dest->hClient = src->hClient; + dest->hChannel = src->hChannel; + for (i = 0; i < NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_END_v28_07; ++i) dest->vMemPtrs[i] = src->vMemPtrs[i]; dest->gfxpPreemptMode = src->gfxpPreemptMode; dest->cilpPreemptMode = src->cilpPreemptMode; diff --git a/src/nvidia/inc/kernel/vgpu/rpc_global_enums.h b/src/nvidia/inc/kernel/vgpu/rpc_global_enums.h index 2bcbede9f0..14154ac5b8 100644 --- a/src/nvidia/inc/kernel/vgpu/rpc_global_enums.h +++ b/src/nvidia/inc/kernel/vgpu/rpc_global_enums.h @@ -220,7 +220,7 @@ enum { X(RM, GET_BRAND_CAPS, 210) X(RM, CTRL_CMD_NVLINK_INBAND_SEND_DATA, 211) X(RM, UPDATE_GPM_GUEST_BUFFER_INFO, 212) - X(RM, RESERVED_213, 213) + X(RM, CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE, 213) X(RM, CTRL_SET_ZBC_STENCIL_CLEAR, 214) X(RM, NUM_FUNCTIONS, 215) #ifdef DEFINING_X_IN_RPC_GLOBAL_ENUMS_H @@ -269,7 +269,8 @@ enum { E(NVLINK_FATAL_ERROR_RECOVERY, 0x101f) E(GSP_POST_NOCAT_RECORD, 0x1020) E(FECS_ERROR, 0x1021) - E(NUM_EVENTS, 0x1022) + E(RECOVERY_ACTION, 0x1022) + E(NUM_EVENTS, 0x1023) #ifdef DEFINING_E_IN_RPC_GLOBAL_ENUMS_H }; # undef E diff --git a/src/nvidia/inc/kernel/vgpu/rpc_headers.h b/src/nvidia/inc/kernel/vgpu/rpc_headers.h index 0e622f0471..cf52edc1c9 100644 --- a/src/nvidia/inc/kernel/vgpu/rpc_headers.h +++ b/src/nvidia/inc/kernel/vgpu/rpc_headers.h @@ -247,4 +247,12 @@ typedef struct VIRTUAL_DISPLAY_GET_NUM_HEADS_PARAMS #define VGPU_RPC_CTRL_DEBUG_READ_ALL_SM_ERROR_STATES_PER_RPC_v21_06 80 +typedef enum +{ + GPU_RECOVERY_EVENT_TYPE_REFRESH, + GPU_RECOVERY_EVENT_TYPE_GPU_DRAIN_P2P, + GPU_RECOVERY_EVENT_TYPE_SYS_REBOOT, +} GPU_RECOVERY_EVENT_TYPE; + + #endif // __vgpu_rpc_nv_headers_h__ diff --git a/src/nvidia/inc/kernel/vgpu/rpc_vgpu.h b/src/nvidia/inc/kernel/vgpu/rpc_vgpu.h index 1063f63b1f..0cb252b564 100644 --- a/src/nvidia/inc/kernel/vgpu/rpc_vgpu.h +++ b/src/nvidia/inc/kernel/vgpu/rpc_vgpu.h @@ -125,14 +125,6 @@ static NV_INLINE void NV_RM_RPC_UPDATE_GPU_PDES(OBJGPU *pGpu, ...) { } status = rpcGetEncoderCapacity_HAL(pGpu, pRpc, hClient, hObject, encoderCapacity); \ } while(0) -#define NV_RM_RPC_DISABLE_CHANNELS(pGpu, bDisable, status) \ - do \ - { \ - OBJRPC *pRpc = GPU_GET_RPC(pGpu); \ - if ((status == NV_OK) && (pRpc != NULL)) \ - status = rpcDisableChannels_HAL(pGpu, pRpc, bDisable); \ - } while(0) - #define NV_RM_RPC_SAVE_HIBERNATION_DATA(pGpu, status) \ do \ { \ diff --git a/src/nvidia/inc/kernel/vgpu/sdk-structures.h b/src/nvidia/inc/kernel/vgpu/sdk-structures.h index 2e3c20de96..97305a7ced 100644 --- a/src/nvidia/inc/kernel/vgpu/sdk-structures.h +++ b/src/nvidia/inc/kernel/vgpu/sdk-structures.h @@ -201,6 +201,8 @@ typedef struct VGPU_BSP_CAPS #define NV2080_CTRL_GPU_ECC_UNIT_COUNT_v24_06 (0x00000019) #define NV2080_CTRL_GPU_ECC_UNIT_COUNT_v26_02 (0x0000001E) #define NV2080_CTRL_GPU_ECC_UNIT_COUNT_v27_04 (0x0000001F) +#define NV2080_CTRL_GPU_ECC_UNIT_COUNT_v28_01 (0x00000021) +#define NV2080_CTRL_GPU_ECC_UNIT_COUNT_v28_08 (0x00000024) #define NV2080_ENGINE_TYPE_LAST_v18_01 (0x0000002a) #define NV2080_ENGINE_TYPE_LAST_v1C_09 (0x00000034) @@ -219,6 +221,10 @@ typedef struct VGPU_BSP_CAPS #define GMMU_FMT_MAX_LEVELS_v05_00 5 #define GMMU_FMT_MAX_LEVELS_v1A_12 6 +// Max number of GFXP buffers +#define NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_END_v03_00 8 +#define NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_END_v28_07 9 + //Maximum MMU FMT sub levels #define MMU_FMT_MAX_SUB_LEVELS_v09_02 2 @@ -260,6 +266,7 @@ typedef struct VGPU_BSP_CAPS #define NV0080_CTRL_BSP_CAPS_TBL_SIZE_V09_10 8 #define NV2080_CTRL_GPU_MAX_CONSTRUCTED_FALCONS_V25_01 0x40 #define NV2080_CTRL_CMD_INTERNAL_DEVICE_INFO_MAX_ENTRIES_V25_05 256 +#define NV2080_CTRL_CMD_INTERNAL_DEVICE_INFO_MAX_ENTRIES_V28_04 512 #define NV0080_CTRL_GR_CAPS_TBL_SIZE_v25_0E 23 #define NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_CONTEXT_POOL_v25_0E 5 @@ -316,6 +323,7 @@ typedef struct _GPU_PARTITION_INFO NvBool bValid; NV2080_CTRL_GPU_PARTITION_SPAN span; NvU64 validCTSIdMask; + NvU64 validGfxCTSIdMask; } GPU_PARTITION_INFO; typedef struct _GPU_EXEC_PARTITION_INFO @@ -440,7 +448,7 @@ typedef NV2080_CTRL_CE_GET_CAPS_V2_PARAMS VGPU_CE_GET_CAPS_V2[NV2080_ENGINE_TYPE typedef struct GSP_FIRMWARE GSP_FIRMWARE; -ct_assert(NV2080_CTRL_GPU_ECC_UNIT_COUNT == NV2080_CTRL_GPU_ECC_UNIT_COUNT_v27_04); +ct_assert(NV2080_CTRL_GPU_ECC_UNIT_COUNT == NV2080_CTRL_GPU_ECC_UNIT_COUNT_v28_08); ct_assert(NV2080_ENGINE_TYPE_LAST == 0x54); ct_assert(NV2080_CTRL_BUS_INFO_MAX_LIST_SIZE == NV2080_CTRL_BUS_INFO_MAX_LIST_SIZE_v1C_09); ct_assert(NV2080_CTRL_FB_FS_INFO_MAX_QUERIES == NV2080_CTRL_FB_FS_INFO_MAX_QUERIES_v24_00); @@ -486,7 +494,8 @@ ct_assert(MAX_NVDEC_ENGINES_V25_00 == NV2080_CTRL_CMD_INTERNAL_MAX_BSPS); ct_assert(NV0080_CTRL_NVJPG_CAPS_TBL_SIZE_V18_0C == NV0080_CTRL_NVJPG_CAPS_TBL_SIZE); ct_assert(NV0080_CTRL_BSP_CAPS_TBL_SIZE_V09_10 == NV0080_CTRL_BSP_CAPS_TBL_SIZE); ct_assert(NV2080_CTRL_GPU_MAX_CONSTRUCTED_FALCONS_V25_01 == NV2080_CTRL_GPU_MAX_CONSTRUCTED_FALCONS); -ct_assert(NV2080_CTRL_CMD_INTERNAL_DEVICE_INFO_MAX_ENTRIES_V25_05 == NV2080_CTRL_CMD_INTERNAL_DEVICE_INFO_MAX_ENTRIES); +ct_assert(NV2080_CTRL_CMD_INTERNAL_DEVICE_INFO_MAX_ENTRIES_V25_05 <= NV2080_CTRL_CMD_INTERNAL_DEVICE_INFO_MAX_ENTRIES); +ct_assert(NV2080_CTRL_CMD_INTERNAL_DEVICE_INFO_MAX_ENTRIES_V28_04 == NV2080_CTRL_CMD_INTERNAL_DEVICE_INFO_MAX_ENTRIES); ct_assert(NV0080_CTRL_GR_CAPS_TBL_SIZE_v25_0E == NV0080_CTRL_GR_CAPS_TBL_SIZE); ct_assert(NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_CONTEXT_POOL_v25_0E == NV2080_CTRL_CMD_GR_CTXSW_PREEMPTION_BIND_BUFFERS_CONTEXT_POOL); ct_assert(RPC_GR_BUFFER_TYPE_GRAPHICS_MAX_v25_0E == RPC_GR_BUFFER_TYPE_GRAPHICS_MAX); diff --git a/src/nvidia/inc/kernel/vgpu/vgpu_events.h b/src/nvidia/inc/kernel/vgpu/vgpu_events.h index 2bc3c52af5..0170220baf 100644 --- a/src/nvidia/inc/kernel/vgpu/vgpu_events.h +++ b/src/nvidia/inc/kernel/vgpu/vgpu_events.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2008-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2008-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -153,6 +153,8 @@ struct _object_vgpu VGPU_GSP_CTRL_BUF_RM *gspCtrlBuf; VGPU_GSP_RESPONSE_BUF_RM *gspResponseBuf; + VGPU_MEM_INFO debugBuff; + NvBool bGspPlugin; NvBool bIsBar2Physical; // Start offset of FB to use in Physical BAR2 mode diff --git a/src/nvidia/inc/kernel/vgpu/vgpu_version.h b/src/nvidia/inc/kernel/vgpu/vgpu_version.h index 8135c749de..a068fa3a20 100644 --- a/src/nvidia/inc/kernel/vgpu/vgpu_version.h +++ b/src/nvidia/inc/kernel/vgpu/vgpu_version.h @@ -28,10 +28,10 @@ #define NV_RPC_VERSION_NUMBER_MAJOR 31:24 /* R---D */ #define NV_RPC_VERSION_NUMBER_MINOR 23:16 /* R---D */ -#define RPC_VERSION_FROM_VGX_VERSION(major, minor) ( DRF_NUM(_RPC, _VERSION_NUMBER, _MAJOR, major) | \ - DRF_NUM(_RPC, _VERSION_NUMBER, _MINOR, minor)) -#define VGX_MAJOR_VERSION_NUMBER 0x27 -#define VGX_MINOR_VERSION_NUMBER 0x06 +#define RPC_VERSION_FROM_VGX_VERSION(major, minor) (DRF_NUM(_RPC, _VERSION_NUMBER, _MAJOR, major) | \ + DRF_NUM(_RPC, _VERSION_NUMBER, _MINOR, minor)) +#define VGX_MAJOR_VERSION_NUMBER 0x28 +#define VGX_MINOR_VERSION_NUMBER 0x08 #define VGX_MAJOR_VERSION_NUMBER_VGPU_12_0 0x1A #define VGX_MINOR_VERSION_NUMBER_VGPU_12_0 0x18 @@ -40,6 +40,8 @@ #define VGX_MAJOR_VERSION_NUMBER_VGPU_16_0 0x23 #define VGX_MAJOR_VERSION_NUMBER_VGPU_17_0 0x25 +#define VGX_MAJOR_VERSION_WITH_FB_COPY_LARGE_BLOCKSZ_SUPPORT 0x28 + /** * This macro have the mapping between internal (RPC) and external version * and is required to be updated appropriately with every new internal version. @@ -51,28 +53,29 @@ * 2. This is the first break in migration compatibility after a release. */ #define NV_VGPU_GRIDSW_INTERNAL_TO_EXTERNAL_VERSION_MAPPING \ - {{0x27, 0x0}, {0x27, 0x06}, {0x16, 0x1}}, \ - {{0x26, 0x0}, {0x26, 0x05}, {0x15, 0x1}}, \ - {{0x25, 0x0}, {0x25, 0x1B}, {0x14, 0x1}}, \ - {{0x24, 0x0}, {0x24, 0x0A}, {0x13, 0x1}}, \ - {{0x23, 0x0}, {0x23, 0x05}, {0x12, 0x1}}, \ - {{0x22, 0x0}, {0x22, 0x02}, {0x11, 0x1}}, \ - {{0x21, 0x0}, {0x21, 0x0C}, {0x10, 0x1}}, \ - {{0x20, 0x0}, {0x20, 0x04}, {0xF, 0x1}}, \ - {{0x1F, 0x0}, {0x1F, 0xF}, {0xE, 0x1}}, \ - {{0x1E, 0x0}, {0x1E, 0xE}, {0xD, 0x1}}, \ - {{0x1D, 0x0}, {0x1D, 0x6}, {0xC, 0x1}}, \ - {{0x1C, 0x0}, {0x1C, 0xA}, {0xB, 0x1}}, \ - {{0x1C, 0xB}, {0x1C, 0xC}, {0xB, 0x2}}, \ - {{0x1B, 0x0}, {0x1B, 0x5}, {0xA, 0x1}}, \ - {{0x1A, 0x0}, {0x1A, 0x18}, {0x9, 0x1}}, \ - {{0x1A, 0x19}, {0x1A, 0x24}, {0x9, 0x2}}, \ - {{0x19, 0x0}, {0x19, 0x1}, {0x8, 0x1}}, \ - {{0x18, 0x0}, {0x18, 0x14},{0x7, 0x1}}, \ - {{0x18, 0x15}, {0x18, 0x16},{0x7, 0x2}}, \ - {{0x17, 0x0}, {0x17, 0x6}, {0x6, 0x1}}, \ - {{0x16, 0x0}, {0x16, 0x6}, {0x5, 0x1}}, \ - {{0x16, 0x7}, {0x16, 0x7}, {0x5, 0x2}} + {{0x28, 0x00}, {0x28, 0x08}, {0x17, 0x01}}, \ + {{0x27, 0x00}, {0x27, 0x06}, {0x16, 0x01}}, \ + {{0x26, 0x00}, {0x26, 0x05}, {0x15, 0x01}}, \ + {{0x25, 0x00}, {0x25, 0x1B}, {0x14, 0x01}}, \ + {{0x24, 0x00}, {0x24, 0x0A}, {0x13, 0x01}}, \ + {{0x23, 0x00}, {0x23, 0x05}, {0x12, 0x01}}, \ + {{0x22, 0x00}, {0x22, 0x02}, {0x11, 0x01}}, \ + {{0x21, 0x00}, {0x21, 0x0C}, {0x10, 0x01}}, \ + {{0x20, 0x00}, {0x20, 0x04}, {0x0F, 0x01}}, \ + {{0x1F, 0x00}, {0x1F, 0x0F}, {0x0E, 0x01}}, \ + {{0x1E, 0x00}, {0x1E, 0x0E}, {0x0D, 0x01}}, \ + {{0x1D, 0x00}, {0x1D, 0x06}, {0x0C, 0x01}}, \ + {{0x1C, 0x00}, {0x1C, 0x0A}, {0x0B, 0x01}}, \ + {{0x1C, 0x0B}, {0x1C, 0x0C}, {0x0B, 0x02}}, \ + {{0x1B, 0x00}, {0x1B, 0x05}, {0x0A, 0x01}}, \ + {{0x1A, 0x00}, {0x1A, 0x18}, {0x09, 0x01}}, \ + {{0x1A, 0x19}, {0x1A, 0x24}, {0x09, 0x02}}, \ + {{0x19, 0x00}, {0x19, 0x01}, {0x08, 0x01}}, \ + {{0x18, 0x00}, {0x18, 0x14}, {0x07, 0x01}}, \ + {{0x18, 0x15}, {0x18, 0x16}, {0x07, 0x02}}, \ + {{0x17, 0x00}, {0x17, 0x06}, {0x06, 0x01}}, \ + {{0x16, 0x00}, {0x16, 0x06}, {0x05, 0x01}}, \ + {{0x16, 0x07}, {0x16, 0x07}, {0x05, 0x02}} /* * Internal Versioning @@ -101,7 +104,7 @@ /* WARNING: Should be updated with each vGPU release, if there is a break in * migration compatibility during the development of that release. */ -#define NV_VGPU_MAX_SUPPORTED_GRIDSW_VERSION_EXTERNAL_MAJOR 0x16 +#define NV_VGPU_MAX_SUPPORTED_GRIDSW_VERSION_EXTERNAL_MAJOR 0x17 #define NV_VGPU_MAX_SUPPORTED_GRIDSW_VERSION_EXTERNAL_MINOR 0x1 /* WARNING: Should be updated with each vGPU release, if minimum supported diff --git a/src/nvidia/inc/libraries/mmu/mmu_walk.h b/src/nvidia/inc/libraries/mmu/mmu_walk.h index 30bf049d0a..0d23e31e8a 100644 --- a/src/nvidia/inc/libraries/mmu/mmu_walk.h +++ b/src/nvidia/inc/libraries/mmu/mmu_walk.h @@ -440,15 +440,6 @@ typedef struct * 4K PTE) in MMU walker */ NvBool bAtsEnabled : 1; - /** - * @brief Indicates if the iterative implementation should be used - * @details In certain situations like running the MMU Tracer or running - * on platforms like PPC, the recursive implementation of the - * MMU Walker consumes too much stack space. Enabling this option - * changes the MMU Walker to use iteration instead of recursion to - * reduce stack usage. - */ - NvBool bUseIterative : 1; } MMU_WALK_FLAGS; /*! diff --git a/src/nvidia/inc/libraries/nvlog/internal/nvlog_printf_internal.h b/src/nvidia/inc/libraries/nvlog/internal/nvlog_printf_internal.h index 2c16be831e..8465949020 100644 --- a/src/nvidia/inc/libraries/nvlog/internal/nvlog_printf_internal.h +++ b/src/nvidia/inc/libraries/nvlog/internal/nvlog_printf_internal.h @@ -42,6 +42,8 @@ // Compile time stubbing out output below NVLOG_LEVEL level #define _NVLOG_NOTHING(...) ((void)0) +#include "nvport/nvport.h" + // // Use __COUNTER__ if available. If not, we can use __LINE__ since it is also // monotonically rising. If __COUNTER__ is unavailable, we can't have inline diff --git a/src/nvidia/inc/libraries/nvport/inline/memory_tracking.h b/src/nvidia/inc/libraries/nvport/inline/memory_tracking.h index 94bbe43114..1104c0c68c 100644 --- a/src/nvidia/inc/libraries/nvport/inline/memory_tracking.h +++ b/src/nvidia/inc/libraries/nvport/inline/memory_tracking.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2014-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2014-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -38,14 +38,6 @@ #define portMemExTrackingGetNext_SUPPORTED \ (PORT_MEM_TRACK_USE_FENCEPOSTS & PORT_MEM_TRACK_USE_ALLOCLIST) #define portMemExTrackingGetHeapSize_SUPPORTED (NVOS_IS_LIBOS) -// -// portMemExTrackingGetAllocUsableSize provides higher-fidelity tracking at the -// expense of higher runtime overhead, due to additional function calls in the -// portMemAlloc path. It is only enabled by default in debug ("checked") builds for -// this reason. -// -#define portMemExTrackingGetAllocUsableSize_SUPPORTED (PORT_IS_CHECKED_BUILD && NVOS_IS_LIBOS) - #define portMemExValidate_SUPPORTED 0 #define portMemExValidateAllocations_SUPPORTED 0 #define portMemExFreeAll_SUPPORTED 0 @@ -63,7 +55,15 @@ void _portMemAllocatorFree(PORT_MEM_ALLOCATOR *pAlloc, void *pMem); #if PORT_MEM_TRACK_USE_LIMIT /** @brief Initialize per VF tracking limit **/ -void portMemInitializeAllocatorTrackingLimit(NvU32 pid, NvLength limit, NvBool bLimitEnabled); +void portMemInitializeAllocatorTrackingLimit(NvU32 gfid, NvLength limit, NvBool bLimitEnabled); +/** @brief Init per Gfid mem tracking **/ +void portMemGfidTrackingInit(NvU32 gfid); +/** @brief Free per Gfid mem tracking **/ +void portMemGfidTrackingFree(NvU32 gfid); +#endif + +#if PORT_MEM_TRACK_USE_LIMIT +#define PORT_MEM_LIMIT_MAX_GFID 64 #endif typedef struct PORT_MEM_COUNTER @@ -170,21 +170,10 @@ PORT_MEM_ALLOCATOR *portMemExAllocatorCreateLockedOnExistingBlock_CallerInfo(voi #if PORT_MEM_TRACK_USE_FENCEPOSTS || PORT_MEM_TRACK_USE_ALLOCLIST || PORT_MEM_TRACK_USE_CALLERINFO || PORT_MEM_TRACK_USE_LIMIT // -// The blockSize of the allocation can be tracked in 1 of 2 places, -// depending on build configuration. To reduce per-alloc memory waste in -// allocating multiple fields for the same data, the following is the -// order in which they are preferred at compile time: -// -// 1. portMemExTrackingGetAllocUsableSize - the underlying malloc -// implementation has a function to get the allocation size from allocated -// pointer. No memory will be allocated in the PORT_MEM_HEADER to track the -// block size. -// 2. PORT_MEM_HEADER::blockSize - used when fenceposts or per-GFID limit -// tracking is enabled and portMemExTrackingGetAllocUsableSize is not -// available. +// The blockSize of the allocation is tracked in PORT_MEM_HEADER::blockSize +// when fenceposts or per-GFID limit tracking is enabled. // #define PORT_MEM_HEADER_HAS_BLOCK_SIZE \ - !PORT_IS_FUNC_SUPPORTED(portMemExTrackingGetAllocUsableSize) && \ (PORT_MEM_TRACK_USE_FENCEPOSTS || PORT_MEM_TRACK_USE_LIMIT) typedef struct PORT_MEM_HEADER @@ -202,7 +191,7 @@ typedef struct PORT_MEM_HEADER PORT_MEM_FENCE_HEAD fence; #endif #if PORT_MEM_TRACK_USE_LIMIT - NV_DECLARE_ALIGNED(NvU32 pid, 8); + NV_DECLARE_ALIGNED(NvU32 gfid, 8); #endif } PORT_MEM_HEADER; @@ -225,8 +214,7 @@ typedef struct PORT_MEM_FOOTER #define PORT_MEM_TRACK_ALLOC_SIZE \ PORT_MEM_TRACK_USE_COUNTER && \ - (PORT_IS_FUNC_SUPPORTED(portMemExTrackingGetAllocUsableSize) || \ - PORT_MEM_HEADER_HAS_BLOCK_SIZE) + PORT_MEM_HEADER_HAS_BLOCK_SIZE struct PORT_MEM_ALLOCATOR_TRACKING { @@ -244,6 +232,11 @@ struct PORT_MEM_ALLOCATOR_TRACKING #if PORT_MEM_TRACK_USE_CALLERINFO PORT_MEM_CALLERINFO callerInfo; #endif +#if PORT_MEM_TRACK_USE_LIMIT + NvLength limitGfid; + NvLength counterGfid; + NvU32 gfid; +#endif }; /// @brief Actual size of an allocator structure, including internals diff --git a/src/nvidia/inc/libraries/nvport/memory.h b/src/nvidia/inc/libraries/nvport/memory.h index af79ad777a..ad5ccdb706 100644 --- a/src/nvidia/inc/libraries/nvport/memory.h +++ b/src/nvidia/inc/libraries/nvport/memory.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2014-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2014-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -40,6 +40,16 @@ #include "nvport/inline/memory_libos.h" #endif +// Go straight at the memory or hardware. +#define PORT_MEM_RD08(p) (*(p)) +#define PORT_MEM_RD16(p) (*(p)) +#define PORT_MEM_RD32(p) (*(p)) +#define PORT_MEM_RD64(p) (*(p)) +#define PORT_MEM_WR08(p, v) (*(p) = (v)) +#define PORT_MEM_WR16(p, v) (*(p) = (v)) +#define PORT_MEM_WR32(p, v) (*(p) = (v)) +#define PORT_MEM_WR64(p, v) (*(p) = (v)) + /** * @defgroup NVPORT_MEMORY Memory * @brief This module contains memory management related functionality. @@ -561,6 +571,18 @@ typedef struct PORT_MEM_TRACK_ALLOCATOR_STATS */ NV_STATUS portMemExTrackingGetActiveStats(const PORT_MEM_ALLOCATOR *pAllocator, PORT_MEM_TRACK_ALLOCATOR_STATS *pStats); +/** + * @brief Returns the statistics of currently active allocations made with the + * given gfid. + * + * If the corresponding pTracking is not found, it returns + * NV_ERR_OBJECT_NOT_FOUND + */ +NV_STATUS portMemExTrackingGetGfidActiveStats( + NvU32 gfid, + PORT_MEM_TRACK_ALLOCATOR_STATS *pStats +); + /** * @brief Returns the statistics of all allocations made with the given * allocator since it was created. @@ -570,6 +592,18 @@ NV_STATUS portMemExTrackingGetActiveStats(const PORT_MEM_ALLOCATOR *pAllocator, */ NV_STATUS portMemExTrackingGetTotalStats(const PORT_MEM_ALLOCATOR *pAllocator, PORT_MEM_TRACK_ALLOCATOR_STATS *pStats); +/** + * @brief Returns the statistics of all allocations made with the given + * gfid. + * + * If the corresponding pTracking is not found, it returns + * NV_ERR_OBJECT_NOT_FOUND + */ +NV_STATUS portMemExTrackingGetGfidTotalStats( + NvU32 gfid, + PORT_MEM_TRACK_ALLOCATOR_STATS *pStats +); + /** * @brief Returns the statistics of peak allocations made with the given * allocator since it was created. @@ -585,6 +619,24 @@ NV_STATUS portMemExTrackingGetTotalStats(const PORT_MEM_ALLOCATOR *pAllocator, P */ NV_STATUS portMemExTrackingGetPeakStats(const PORT_MEM_ALLOCATOR *pAllocator, PORT_MEM_TRACK_ALLOCATOR_STATS *pStats); +/** + * @brief Returns the statistics of peak allocations made with the given + * gfid since it was created. + * + * Peak data reports the high-water mark based on the maximum size (the peak + * allocations doesn't report the largest number of allocations, it reports + * the number of allocations at the time the peak size was achieved). This is + * done so that the other peak stats, which are derived from peak size and + * peak allocations, are consistent with each other. + * + * If the corresponding pTracking is not found, it returns + * NV_ERR_OBJECT_NOT_FOUND + */ +NV_STATUS portMemExTrackingGetGfidPeakStats( + NvU32 gfid, + PORT_MEM_TRACK_ALLOCATOR_STATS *pStats +); + /** * @brief Cycles through the tracking infos for allocations by pAllocator * If pAllocator is NULL, it will cycle through all allocations. diff --git a/src/nvidia/inc/libraries/resserv/rs_server.h b/src/nvidia/inc/libraries/resserv/rs_server.h index 9b6b4b84c0..b10648cc13 100644 --- a/src/nvidia/inc/libraries/resserv/rs_server.h +++ b/src/nvidia/inc/libraries/resserv/rs_server.h @@ -55,7 +55,8 @@ struct CLIENT_ENTRY PORT_RWLOCK *pLock; RsClient *pClient; NvHandle hClient; - NvU64 lockOwnerTid; ///< Thread id of the lock owner + NvU64 lockOwnerTid; ///< Thread id of the write lock owner + volatile NvU32 lockReadOwnerCnt; NvU32 refCount; NvBool bPendingFree; ListNode node; @@ -804,7 +805,8 @@ extern NV_STATUS serverAllocResourceLookupLockFlags(RsServer *pServer, extern NV_STATUS serverFreeResourceLookupLockFlags(RsServer *pServer, RS_LOCK_ENUM lock, RS_RES_FREE_PARAMS_INTERNAL *pParams, - LOCK_ACCESS_TYPE *pAccess); + LOCK_ACCESS_TYPE *pAccess, + NvBool *pbSupportForceROLock); /** * Lookup locking flags for a resource copy @@ -1180,6 +1182,15 @@ NV_STATUS resservRestoreTlsCallContext(CALL_CONTEXT *pOldCallContext); */ RsResourceRef *resservGetContextRefByType(NvU32 internalClassId, NvBool bSearchAncestors); +/** + * Test if a client handle is currently locked for LOCK_ACCESS_READ or not. + * The caller must hold the client lock in either mode to acquire an accurate + * result. Callers without the client list lock are subject to race conditions. + * + * @param[out] pClientEntry Pointer to the CLIENT_ENTRY + */ +NvBool serverIsClientLockedForRead(CLIENT_ENTRY* pClientEntry); + #ifdef __cplusplus } #endif diff --git a/src/nvidia/inc/libraries/tls/tls.h b/src/nvidia/inc/libraries/tls/tls.h index e7a66c5bca..8e4d862eae 100644 --- a/src/nvidia/inc/libraries/tls/tls.h +++ b/src/nvidia/inc/libraries/tls/tls.h @@ -124,6 +124,7 @@ void tlsShutdown(void); enum { TLS_ENTRY_ID_THREADSTATE, TLS_ENTRY_ID_RESSERV_1, + TLS_ENTRY_ID_MAPPING_CONTEXT, TLS_ENTRY_ID_CURRENT_GPU_INSTANCE, TLS_ENTRY_ID_PRIORITY, TLS_ENTRY_ID_GPUMGR_EXPANDED_GPU_VISIBILITY, diff --git a/src/nvidia/inc/libraries/utils/nvprintf.h b/src/nvidia/inc/libraries/utils/nvprintf.h index f0ad602134..136879d01e 100644 --- a/src/nvidia/inc/libraries/utils/nvprintf.h +++ b/src/nvidia/inc/libraries/utils/nvprintf.h @@ -351,7 +351,7 @@ void NVRM_PRINTF_FUNCTION(const char *file, // In MODS builds, we allow all printfs, but don't automatically include the // __FILE__ or __FUNCTION__ references. // -#if NV_PRINTF_STRINGS_ALLOWED && (!defined(NV_MODS) || defined(SIM_BUILD) || defined(DEBUG) || defined(NV_MODS_INTERNAL)) +#if NV_PRINTF_STRINGS_ALLOWED && (!defined(NV_MODS) || defined(SIM_BUILD) || defined(DEBUG) || defined(DEVELOP) || defined(NV_MODS_INTERNAL)) #define NV_FILE_STR __FILE__ #define NV_FILE __FILE__ #define NV_FILE_FMT "%s" diff --git a/src/nvidia/interface/deprecated/rmapi_deprecated_utils.c b/src/nvidia/interface/deprecated/rmapi_deprecated_utils.c index 3014b28515..7c7aa928b9 100644 --- a/src/nvidia/interface/deprecated/rmapi_deprecated_utils.c +++ b/src/nvidia/interface/deprecated/rmapi_deprecated_utils.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -215,11 +215,6 @@ RmDeprecatedConvertOs32ToOs02Flags os02Flags = FLD_SET_DRF(OS02, _FLAGS, _LOCATION, _PCI, os02Flags); break; } - case NVOS32_ATTR_LOCATION_AGP: - { - os02Flags = FLD_SET_DRF(OS02, _FLAGS, _LOCATION, _AGP, os02Flags); - break; - } case NVOS32_ATTR_LOCATION_VIDMEM: { os02Flags = FLD_SET_DRF(OS02, _FLAGS, _LOCATION, _VIDMEM, os02Flags); diff --git a/src/nvidia/interface/nv_uvm_types.h b/src/nvidia/interface/nv_uvm_types.h index 235a6cb526..6d566a0762 100644 --- a/src/nvidia/interface/nv_uvm_types.h +++ b/src/nvidia/interface/nv_uvm_types.h @@ -543,6 +543,36 @@ typedef struct UvmGpuExternalMappingInfo_tag NvU32 pteSize; } UvmGpuExternalMappingInfo; +typedef struct UvmGpuExternalPhysAddrInfo_tag +{ + // In: Virtual permissions. Returns + // NV_ERR_INVALID_ACCESS_TYPE if input is + // inaccurate + UvmRmGpuMappingType mappingType; + + // In: Size of the buffer to store PhysAddrs (in bytes). + NvU64 physAddrBufferSize; + + // In: Page size for mapping + // If this field is passed as 0, the page size + // of the allocation is used for mapping. + // nvUvmInterfaceGetExternalAllocPtes must pass + // this field as zero. + NvU64 mappingPageSize; + + // In: Pointer to a buffer to store PhysAddrs. + // Out: The interface will fill the buffer with PhysAddrs + NvU64 *physAddrBuffer; + + // Out: Number of PhysAddrs filled in to the buffer. + NvU64 numWrittenPhysAddrs; + + // Out: Number of PhysAddrs remaining to be filled + // if the buffer is not sufficient to accommodate + // requested PhysAddrs. + NvU64 numRemainingPhysAddrs; +} UvmGpuExternalPhysAddrInfo; + typedef struct UvmGpuP2PCapsParams_tag { // Out: peerId[i] contains gpu[i]'s peer id of gpu[1 - i]. Only defined if @@ -660,6 +690,9 @@ typedef struct UvmGpuInfo_tag // Maximum number of TPCs per GPC NvU32 maxTpcPerGpcCount; + // Number of access counter buffers. + NvU32 accessCntrBufferCount; + // NV_TRUE if SMC is enabled on this GPU. NvBool smcEnabled; @@ -721,10 +754,12 @@ typedef struct UvmGpuFbInfo_tag // RM regions that are not registered with PMA either. NvU64 maxAllocatableAddress; - NvU32 heapSize; // RAM in KB available for user allocations - NvU32 reservedHeapSize; // RAM in KB reserved for internal RM allocation - NvBool bZeroFb; // Zero FB mode enabled. - NvU64 maxVidmemPageSize; // Largest GPU page size to access vidmem. + NvU32 heapSize; // RAM in KB available for user allocations + NvU32 reservedHeapSize; // RAM in KB reserved for internal RM allocation + NvBool bZeroFb; // Zero FB mode enabled. + NvU64 maxVidmemPageSize; // Largest GPU page size to access vidmem. + NvBool bStaticBar1Enabled; // Static BAR1 mode is enabled + NvU64 staticBar1Size; // The size of the static mapping } UvmGpuFbInfo; typedef struct UvmGpuEccInfo_tag @@ -736,6 +771,15 @@ typedef struct UvmGpuEccInfo_tag NvBool bEccEnabled; } UvmGpuEccInfo; +typedef struct UvmGpuNvlinkInfo_tag +{ + unsigned nvlinkMask; + unsigned nvlinkOffset; + void *nvlinkReadLocation; + NvBool *nvlinkErrorNotifier; + NvBool bNvlinkRecoveryEnabled; +} UvmGpuNvlinkInfo; + typedef struct UvmPmaAllocationOptions_tag { NvU32 flags; @@ -828,6 +872,41 @@ typedef NV_STATUS (*uvmEventIsrTopHalf_t) (const NvProcessorUuid *pGpuUuidStruct typedef void (*uvmEventIsrTopHalf_t) (void); #endif +/******************************************************************************* + uvmEventDrainP2P + This function will be called by the GPU driver to signal to UVM that the + GPU has encountered an uncontained error, and all peer work must be drained + to recover. When it is called, the following assumptions/guarantees are + valid/made: + + * Impacted user channels have been preempted and disabled + * UVM channels are still running normally and will continue to do + so unless an unrecoverable error is hit on said channels + * UVM must not return from this function until all enqueued work on + * peer channels has drained + * In the context of this function call, RM will still service faults + * UVM must prevent new peer work from being enqueued until the + uvmEventResumeP2P callback is issued + + Returns: + NV_OK if UVM has idled peer work and will prevent new peer workloads. + NV_ERR_TIMEOUT if peer work was unable to be drained within a timeout + XXX NV_ERR_* for any other failure (TBD) + +*/ +typedef NV_STATUS (*uvmEventDrainP2P_t) (const NvProcessorUuid *pGpuUuidStruct); + +/******************************************************************************* + uvmEventResumeP2P + This function will be called by the GPU driver to signal to UVM that the + GPU has recovered from the previously reported uncontained NVLINK error. + When it is called, the following assumptions/guarantees are valid/made: + + * UVM is again allowed to enqueue peer work + * UVM channels are still running normally +*/ +typedef NV_STATUS (*uvmEventResumeP2P_t) (const NvProcessorUuid *pGpuUuidStruct); + struct UvmOpsUvmEvents { uvmEventSuspend_t suspend; @@ -835,6 +914,8 @@ struct UvmOpsUvmEvents uvmEventStartDevice_t startDevice; uvmEventStopDevice_t stopDevice; uvmEventIsrTopHalf_t isrTopHalf; + uvmEventDrainP2P_t drainP2P; + uvmEventResumeP2P_t resumeP2P; }; #define UVM_CSL_SIGN_AUTH_TAG_SIZE_BYTES 32 @@ -1042,11 +1123,13 @@ typedef UvmGpuAccessCntrConfig gpuAccessCntrConfig; typedef UvmGpuFaultInfo gpuFaultInfo; typedef UvmGpuMemoryInfo gpuMemoryInfo; typedef UvmGpuExternalMappingInfo gpuExternalMappingInfo; +typedef UvmGpuExternalPhysAddrInfo gpuExternalPhysAddrInfo; typedef UvmGpuChannelResourceInfo gpuChannelResourceInfo; typedef UvmGpuChannelInstanceInfo gpuChannelInstanceInfo; typedef UvmGpuChannelResourceBindParams gpuChannelResourceBindParams; typedef UvmGpuFbInfo gpuFbInfo; typedef UvmGpuEccInfo gpuEccInfo; +typedef UvmGpuNvlinkInfo gpuNvlinkInfo; typedef UvmGpuPagingChannel *gpuPagingChannelHandle; typedef UvmGpuPagingChannelInfo gpuPagingChannelInfo; typedef UvmGpuPagingChannelAllocParams gpuPagingChannelAllocParams; diff --git a/src/nvidia/interface/nvrm_registry.h b/src/nvidia/interface/nvrm_registry.h index 9a15c34f58..4e034e305b 100644 --- a/src/nvidia/interface/nvrm_registry.h +++ b/src/nvidia/interface/nvrm_registry.h @@ -537,6 +537,12 @@ #define NV_REG_STR_RM_DUMP_NVLOG_DISABLE (0x00000000) #define NV_REG_STR_RM_DUMP_NVLOG_ENABLE (0x00000001) +// Type: Binary +// Comma separated list of XID values to suppress from the kernel log +// example: +// RmSuppressXidDump="43,31" +#define NV_REG_SUPPRESS_XID_DUMP "RmSuppressXidDump" +#define MAX_XID_SUPPRESS_KEY_LENGTH 64 // // Type DWORD @@ -975,6 +981,10 @@ // 0 - Do not allow P2P writes // 1 - Allow P2P writes // 2 - Do not override chipset-selected config (default) +// P2P atomics: +// 0 - Do not allow P2P atomics +// 1 - Allow P2P atomics +// 2 - Do not override chipset-selected config (default) // #define NV_REG_STR_CL_FORCE_P2P "ForceP2P" #define NV_REG_STR_CL_FORCE_P2P_READ 1:0 @@ -985,6 +995,10 @@ #define NV_REG_STR_CL_FORCE_P2P_WRITE_DISABLE 0x00000000 #define NV_REG_STR_CL_FORCE_P2P_WRITE_ENABLE 0x00000001 #define NV_REG_STR_CL_FORCE_P2P_WRITE_DEFAULT 0x00000002 +#define NV_REG_STR_CL_FORCE_P2P_ATOMICS 9:8 +#define NV_REG_STR_CL_FORCE_P2P_ATOMICS_DISABLE 0x00000000 +#define NV_REG_STR_CL_FORCE_P2P_ATOMICS_ENABLE 0x00000001 +#define NV_REG_STR_CL_FORCE_P2P_ATOMICS_DEFAULT 0x00000002 // // Type DWORD @@ -1072,6 +1086,25 @@ // Overrides the size of the BAR1 aperture. Used to shrink BAR1. It cannot be // greater than the physical size of BAR1. +// Type DWORD +// Encoding Numeric Value +// Forces the entire BAR1 to be statically allocated. +// +// DISABLE will force disable static BAR1 +// ENABLE will force the amount of video memory to be limited to the amount of BAR1 because +// further video memory cannot be mapped +// AUTO will only map static BAR1 if static BAR1 size is >1.8x the size of FB to allow for both +// static as well as dynamic BAR1 mappings +// ONLY_GPU will only map static BAR1 for existing GPU BAR1P2P use cases only +// +#define NV_REG_STR_RM_FORCE_STATIC_BAR1 "RMForceStaticBar1" +#define NV_REG_STR_RM_FORCE_STATIC_BAR1_DISABLE 0x00000000 +#define NV_REG_STR_RM_FORCE_STATIC_BAR1_ENABLE 0x00000001 +#define NV_REG_STR_RM_FORCE_STATIC_BAR1_AUTO 0x00000002 +#define NV_REG_STR_RM_FORCE_STATIC_BAR1_ONLY_GPU 0x00000003 +#define NV_REG_STR_RM_FORCE_STATIC_BAR1_MAX 0x00000004 +#define NV_REG_STR_RM_FORCE_STATIC_BAR1_DEFAULT NV_REG_STR_RM_FORCE_STATIC_BAR1_ONLY_GPU + #define NV_REG_STR_RM_BAR2_APERTURE_SIZE_MB "RMBar2ApertureSizeMB" // Type DWORD // Encoding Numeric Value @@ -1118,6 +1151,17 @@ #define NV_REG_STR_RM_SPLIT_VAS_MGMT_SERVER_CLIENT_RM_DISABLED 0x00000000 #define NV_REG_STR_RM_SPLIT_VAS_MGMT_SERVER_CLIENT_RM_ENABLED 0x00000001 +// +// Type: Dword +// Encoding: +// 0 - Disable PE FIRO Buffer +// 1 - Enable PE FIRO Buffer +// Default: disabled (0x0) +// +#define NV_REG_STR_RM_ENABLE_PE_FIRO_BUFFER "RMEnablePeFiroBuffer" +#define NV_REG_STR_RM_ENABLE_PE_FIRO_BUFFER_DISABLED 0x00000000 +#define NV_REG_STR_RM_ENABLE_PE_FIRO_BUFFER_ENABLED 0x00000001 + // // Restrict the VA range to be <= @ref VASPACE_SIZE_FERMI. // Used in cases where some engines support 49 bit VA and some don't. @@ -1846,6 +1890,13 @@ // // This option is only for Hopper+ GPU with NVLINK version 4.0. +#define NV_REG_STR_RM_NVLINK_BW_LINK_COUNT "RmNvlinkBandwidthLinkCount" +// Type: DWORD +// +// Link count RBM (Reduced Bandwidth Mode) requested. +// +// This option is only for Blackwell+ GPU with NVLINK version 5.0. + // // Type DWORD (Boolean) // 1 - Measure API and GPU lock hold/wait times which can be retrieved with the @@ -1958,7 +2009,6 @@ // // Enable/disable key rotation in Confidential Compute. -// If this is defined then NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION is ignored. // // 0 - Feature disabled // 1 - Feature enabled @@ -2010,55 +2060,9 @@ #define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_INTERNAL_KEYS_NO 0x00000000 #define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_INTERNAL_KEYS_YES 0x00000001 -// -// Enable/disable dummy key rotation in Confidential Compute. -// This is a temp reg key that will be removed once all RM clients -// support key rotation by default. -// -// 0 - Feature disabled -// 1 - Feature enabled -// -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION "RmConfComputeDummyKeyRotation" -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_ENABLED 0:0 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_ENABLED_NO 0x00000000 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_ENABLED_YES 0x00000001 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_SEC2_KEYS 1:1 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_SEC2_KEYS_NO 0x00000000 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_SEC2_KEYS_YES 0x00000001 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE2_KEYS 2:2 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE2_KEYS_NO 0x00000000 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE2_KEYS_YES 0x00000001 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE3_KEYS 3:3 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE3_KEYS_NO 0x00000000 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE3_KEYS_YES 0x00000001 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE4_KEYS 4:4 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE4_KEYS_NO 0x00000000 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE4_KEYS_YES 0x00000001 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE5_KEYS 5:5 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE5_KEYS_NO 0x00000000 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE5_KEYS_YES 0x00000001 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE6_KEYS 6:6 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE6_KEYS_NO 0x00000000 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE6_KEYS_YES 0x00000001 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE7_KEYS 7:7 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE7_KEYS_NO 0x00000000 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE7_KEYS_YES 0x00000001 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE8_KEYS 8:8 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE8_KEYS_NO 0x00000000 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE8_KEYS_YES 0x00000001 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE9_KEYS 9:9 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE9_KEYS_NO 0x00000000 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LCE9_KEYS_YES 0x00000001 - -// if all kernel keys should be considered for key rotation -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_KERNEL_KEYS 10:10 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_KERNEL_KEYS_NO 0x00000000 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_KERNEL_KEYS_YES 0x00000001 - -// if all user keys should be considered for key rotation -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_USER_KEYS 11:11 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_USER_KEYS_NO 0x00000000 -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_USER_KEYS_YES 0x00000001 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_ENABLED_ALL 12:0 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_ENABLED_ALL_NO 0x00000000 +#define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_ENABLED_ALL_YES 0x00001fff // // Set period for "keep-alive" heartbeat message sent between SPDM Requester and Responder. @@ -2118,40 +2122,6 @@ // #define NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_INTERNAL_THRESHOLD "RmKeyRotationInternalThreshold" -// -// Set lower threshold for dummy key rotation. -// This is a temp reg key that will be removed once all RM clients -// support prod key rotation. -// Value is in seconds. -// -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_LOWER_THRESHOLD "RmDummyKeyRotationLowerThreshold" - -// -// Set upper threshold for dummy key rotation. -// This is a temp reg key that will be removed once all RM clients -// support prod key rotation. -// Value is in seconds. -// -#define NV_REG_STR_RM_CONF_COMPUTE_DUMMY_KEY_ROTATION_UPPER_THRESHOLD "RmDummyKeyRotationUpperThreshold" - -// TYPE Dword -// Encoding boolean -// Regkey based solution to serialize VBlank Aggressive Handling in Top Half using spinlock -// 2 - Enable serialization of aggressive vblank callbacks when HMD is active -// -// -// 1 - Enable serialization of aggressive vblank callbacks in all scenarios -// (even when a HMD is not active) -// -// 0 - (default) Disable WAR -// This regkey settings are enabled when Aggressive Vblanks are enabled, -// if RmDisableAggressiveVblank is set to disable then these regkeys do not have any affect -#define NV_REG_STR_RM_BUG_2089053_WAR "RmBug2089053War" -#define NV_REG_STR_RM_BUG_2089053_WAR_ENABLE_ON_HMD_ACTIVE_ONLY 0x00000002 -#define NV_REG_STR_RM_BUG_2089053_WAR_ENABLE_ALWAYS 0x00000001 -#define NV_REG_STR_RM_BUG_2089053_WAR_DISABLE 0x00000000 -#define NV_REG_STR_RM_BUG_2089053_WAR_DEFAULT (NV_REG_STR_RM_BUG_2089053_WAR_ENABLE_ALWAYS) - // // Controls whether GSP-RM profiling is enabled. // 0 (default): disabled @@ -2223,17 +2193,6 @@ #define NV_REG_STR_RM_NVLINK_FORCED_LOOPBACK_ON_SWITCH_MODE_DEFAULT (0x00000000) #define NV_REG_STR_RM_NVLINK_FORCED_LOOPBACK_ON_SWITCH_MODE_ENABLED (0x00000001) -// -// Type: Dword -// Encoding: -// 0 - Iterative MMU Walker is not enabled. Normal recursive implementation is used. (default) -// 1 - Iterative MMU Walker is used -// -#define NV_REG_STR_RM_ITERATIVE_MMU_WALKER "RMUseIterativeMMUWalker" -#define NV_REG_STR_RM_ITERATIVE_MMU_WALKER_DISABLED 0x00000000 -#define NV_REG_STR_RM_ITERATIVE_MMU_WALKER_ENABLED 0x00000001 -#define NV_REG_STR_RM_ITERATIVE_MMU_WALKER_DEFAULT NV_REG_STR_RM_ITERATIVE_MMU_WALKER_DISABLED - // // Type DWORD // This set of MIG regkeys specifies a set of allocation requests to be issued to the GPU on boot. @@ -2313,6 +2272,18 @@ #define NV_REG_STR_RM_GPU_LOCK_MIDPATH_DISABLED 0x00000000 #define NV_REG_STR_RM_GPU_LOCK_MIDPATH_ENABLED 0x00000001 +// +// Type: DWORD (Boolean) +// +// If the forced shared (read) lock feature is enabled. +// +// 0 - The forced shared (read) lock is not enabled. +// 1 (default) - The forced shared (read) lock is enabled. +// +#define NV_REG_STR_RM_ENABLE_FORCE_SHARED_LOCK "RMEnableForceSharedLock" +#define NV_REG_STR_RM_ENABLE_FORCE_SHARED_LOCK_NO 0x00000000 +#define NV_REG_STR_RM_ENABLE_FORCE_SHARED_LOCK_YES 0x00000001 + // // This regkey controls the GPU load failure test. // Supported only on DEBUG, DEVELOP, or RELEASE drivers built with the parameter INSTRUMENT_RM=true @@ -2431,6 +2402,14 @@ #define NV_REG_RM_GSP_WPR_END_MARGIN_APPLY 31:31 #define NV_REG_RM_GSP_WPR_END_MARGIN_APPLY_ON_RETRY 0x00000000 #define NV_REG_RM_GSP_WPR_END_MARGIN_APPLY_ALWAYS 0x00000001 + +// +// Type DWORD +// Regkey to set the number of retry attempts at GSP bootstrap +// +#define NV_REG_STR_RM_GSP_BOOT_RETRY_ATTEMPTS "RmGspBootRetryAttempts" +#define NV_REG_STR_RM_GSP_BOOT_RETRY_ATTEMPTS_DEFAULT 4 + // // Type: Dword // This regkey toggles whether to release API lock during initialization to @@ -2501,12 +2480,49 @@ #define NV_REG_STR_RM_FORCE_GR_SCRUBBER_CHANNEL_DISABLE 0x00000000 #define NV_REG_STR_RM_FORCE_GR_SCRUBBER_CHANNEL_ENABLE 0x00000001 +// +// Type: Dword +// +// This regkey controls the per-runlist channel ID feature, which is only +// supported on Ampere+ HW +// +// On platforms or chips where this feature is supported in HW but not enabled +// by default, this regkey can override the default to enable it. It also +// allows turning off the feature on platforms or chips where it is already +// enabled by default. +// +// 0 - Force disable per-runlist channel IDs +// 1 - Force enable per-runlist channel IDs +// +#define NV_REG_STR_RM_DEBUG_OVERRIDE_PER_RUNLIST_CHANNEL_RAM "RMDebugOverridePerRunlistChannelRam" +#define NV_REG_STR_RM_DEBUG_OVERRIDE_PER_RUNLIST_CHANNEL_RAM_DISABLE 0 +#define NV_REG_STR_RM_DEBUG_OVERRIDE_PER_RUNLIST_CHANNEL_RAM_ENABLE 1 + +// +// Type: Dword +// +// This regkey controls RM User Shared Data polling for testing and debugging. +// supported on Ampere+ HW +// +// By default, RUSD polling is controlled through the allocation of the 00DE class +// with specified poll masks for specific data. +// Setting this key will force RUSD to poll all data, or no data. +// +// 0 - Default behavior +// 1 - Force disable all RUSD polling +// 2 - Force enable all RUSD polling +// +#define NV_REG_STR_RM_DEBUG_RUSD_POLLING "RMDebugRusdPolling" +#define NV_REG_STR_RM_DEBUG_RUSD_POLLING_DEFAULT 0 +#define NV_REG_STR_RM_DEBUG_RUSD_POLLING_FORCE_DISABLE 1 +#define NV_REG_STR_RM_DEBUG_RUSD_POLLING_FORCE_ENABLE 2 + +// Type DWORD (Boolean) +// Disable the check for FSP's fuse error detection status during boot. +// By default, the check would be enabled and we would bail out during boot on error. #define NV_REG_STR_RM_DISABLE_FSP_FUSE_ERROR_CHECK "RmDisableFspFuseErrorCheck" #define NV_REG_STR_RM_DISABLE_FSP_FUSE_ERROR_CHECK_YES (0x00000001) #define NV_REG_STR_RM_DISABLE_FSP_FUSE_ERROR_CHECK_NO (0x00000000) #define NV_REG_STR_RM_DISABLE_FSP_FUSE_ERROR_CHECK_DEFAULT (0x00000000) -// Type DWORD (Boolean) -// Disable the check for FSP's fuse error detection status during boot. -// By default, the check would be enabled and we would bail out during boot on error. #endif // NVRM_REGISTRY_H diff --git a/src/nvidia/interface/rmapi/src/g_finn_rm_api.c b/src/nvidia/interface/rmapi/src/g_finn_rm_api.c index 0407d8643d..ddd8e2e9a1 100644 --- a/src/nvidia/interface/rmapi/src/g_finn_rm_api.c +++ b/src/nvidia/interface/rmapi/src/g_finn_rm_api.c @@ -460,11 +460,6 @@ static NV_STATUS finnSerializeMessage_NV0080_CTRL_FIFO_GET_CAPS_PARAMS(const NV0 static NV_STATUS finnDeserializeMessage_NV0080_CTRL_FIFO_GET_CAPS_PARAMS(finn_bit_pump_for_read *bp, NV0080_CTRL_FIFO_GET_CAPS_PARAMS *api, NvLength api_size, NvBool deser_up); static NV_STATUS finnSerializeMessage_NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS(const NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS *api, finn_bit_pump_for_write *bp, NvBool seri_up); static NV_STATUS finnDeserializeMessage_NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS(finn_bit_pump_for_read *bp, NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS *api, NvLength api_size, NvBool deser_up); -#endif // (defined(NVRM)) - -static NV_STATUS finnSerializeMessage_NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS(const NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS *api, finn_bit_pump_for_write *bp, NvBool seri_up); -static NV_STATUS finnDeserializeMessage_NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS(finn_bit_pump_for_read *bp, NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS *api, NvLength api_size, NvBool deser_up); -#if (defined(NVRM)) static NV_STATUS finnSerializeMessage_NV0080_CTRL_GPU_GET_CLASSLIST_PARAMS(const NV0080_CTRL_GPU_GET_CLASSLIST_PARAMS *api, finn_bit_pump_for_write *bp, NvBool seri_up); static NV_STATUS finnDeserializeMessage_NV0080_CTRL_GPU_GET_CLASSLIST_PARAMS(finn_bit_pump_for_read *bp, NV0080_CTRL_GPU_GET_CLASSLIST_PARAMS *api, NvLength api_size, NvBool deser_up); static NV_STATUS finnSerializeMessage_NV0080_CTRL_GR_GET_CAPS_PARAMS(const NV0080_CTRL_GR_GET_CAPS_PARAMS *api, finn_bit_pump_for_write *bp, NvBool seri_up); @@ -509,11 +504,6 @@ static NV_STATUS finnSerializeMessage_NVB06F_CTRL_SAVE_ENGINE_CTX_DATA_PARAMS(co static NV_STATUS finnDeserializeMessage_NVB06F_CTRL_SAVE_ENGINE_CTX_DATA_PARAMS(finn_bit_pump_for_read *bp, NVB06F_CTRL_SAVE_ENGINE_CTX_DATA_PARAMS *api, NvLength api_size, NvBool deser_up); static NV_STATUS finnSerializeRecord_NV0080_CTRL_DMA_UPDATE_PDE_2_PAGE_TABLE_PARAMS(const NV0080_CTRL_DMA_UPDATE_PDE_2_PAGE_TABLE_PARAMS *api, finn_bit_pump_for_write *bp, NvBool seri_up); static NV_STATUS finnDeserializeRecord_NV0080_CTRL_DMA_UPDATE_PDE_2_PAGE_TABLE_PARAMS(finn_bit_pump_for_read *bp, NV0080_CTRL_DMA_UPDATE_PDE_2_PAGE_TABLE_PARAMS *api, NvLength api_size, NvBool deser_up); -#endif // (defined(NVRM)) - -static NV_STATUS finnSerializeRecord_NV0080_CTRL_FIFO_CHANNEL(const NV0080_CTRL_FIFO_CHANNEL *api, finn_bit_pump_for_write *bp, NvBool seri_up); -static NV_STATUS finnDeserializeRecord_NV0080_CTRL_FIFO_CHANNEL(finn_bit_pump_for_read *bp, NV0080_CTRL_FIFO_CHANNEL *api, NvLength api_size, NvBool deser_up); -#if (defined(NVRM)) static NV_STATUS finnSerializeRecord_NV2080_CTRL_GPUMON_SAMPLES(const NV2080_CTRL_GPUMON_SAMPLES *api, finn_bit_pump_for_write *bp, NvBool seri_up); static NV_STATUS finnDeserializeRecord_NV2080_CTRL_GPUMON_SAMPLES(finn_bit_pump_for_read *bp, NV2080_CTRL_GPUMON_SAMPLES *api, NvLength api_size, NvBool deser_up); #endif // (defined(NVRM)) @@ -1152,17 +1142,12 @@ static NvU64 finnUnserializedInterfaceSize_FINN_NV01_DEVICE_0_FB(NvU64 message) // Serialize this interface. static NV_STATUS finnSerializeInterface_FINN_NV01_DEVICE_0_FIFO(NvU64 message, const char *api_intf, finn_bit_pump_for_write *bp, NvBool seri_up) { - // Serialize one of 3 messages in this interface. + // Serialize one of 2 messages in this interface. switch (message) { #if (defined(NVRM)) case FINN_MESSAGE_ID(NV0080_CTRL_FIFO_GET_CAPS_PARAMS): return finnSerializeMessage_NV0080_CTRL_FIFO_GET_CAPS_PARAMS((const NV0080_CTRL_FIFO_GET_CAPS_PARAMS *) api_intf, bp, seri_up); -#endif // (defined(NVRM)) - - case FINN_MESSAGE_ID(NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS): - return finnSerializeMessage_NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS((const NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS *) api_intf, bp, seri_up); -#if (defined(NVRM)) case FINN_MESSAGE_ID(NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS): return finnSerializeMessage_NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS((const NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS *) api_intf, bp, seri_up); #endif // (defined(NVRM)) @@ -1181,17 +1166,12 @@ static NV_STATUS finnSerializeInterface_FINN_NV01_DEVICE_0_FIFO(NvU64 message, c // Deserialize this interface. static NV_STATUS finnDeserializeInterface_FINN_NV01_DEVICE_0_FIFO(NvU64 message, finn_bit_pump_for_read *bp, FINN_NV01_DEVICE_0_FIFO *api_intf, NvLength api_size, NvBool deser_up) { - // Deerialize one of 3 messages in this interface. + // Deerialize one of 2 messages in this interface. switch (message) { #if (defined(NVRM)) case FINN_MESSAGE_ID(NV0080_CTRL_FIFO_GET_CAPS_PARAMS): return finnDeserializeMessage_NV0080_CTRL_FIFO_GET_CAPS_PARAMS(bp, (NV0080_CTRL_FIFO_GET_CAPS_PARAMS *) api_intf, api_size, deser_up); -#endif // (defined(NVRM)) - - case FINN_MESSAGE_ID(NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS): - return finnDeserializeMessage_NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS(bp, (NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS *) api_intf, api_size, deser_up); -#if (defined(NVRM)) case FINN_MESSAGE_ID(NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS): return finnDeserializeMessage_NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS(bp, (NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS *) api_intf, api_size, deser_up); #endif // (defined(NVRM)) @@ -1216,11 +1196,6 @@ static NvU64 finnUnserializedInterfaceSize_FINN_NV01_DEVICE_0_FIFO(NvU64 message #if (defined(NVRM)) case FINN_MESSAGE_ID(NV0080_CTRL_FIFO_GET_CAPS_PARAMS): return sizeof(NV0080_CTRL_FIFO_GET_CAPS_PARAMS); -#endif // (defined(NVRM)) - - case FINN_MESSAGE_ID(NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS): - return sizeof(NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS); -#if (defined(NVRM)) case FINN_MESSAGE_ID(NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS): return sizeof(NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS); #endif // (defined(NVRM)) @@ -3106,197 +3081,6 @@ static NV_STATUS finnDeserializeMessage_NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS( return NV_OK; } -#endif // (defined(NVRM)) - - -// Serialize each of the 3 field(s). -static NV_STATUS finnSerializeMessage_NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS(const NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS *api, finn_bit_pump_for_write *bp, NvBool seri_up) -{ - // Serialize field-presence indicator for `fifoStartChannelListCount`. - if (finn_write_buffer(bp, 1, 1)) - { - FINN_ERROR(NV_ERR_BUFFER_TOO_SMALL); - return NV_ERR_BUFFER_TOO_SMALL; - } - - // Serialize 32-bit NvU32 primitive. - if (finn_write_buffer(bp, api->fifoStartChannelListCount, 32)) - { - FINN_ERROR(NV_ERR_BUFFER_TOO_SMALL); - return NV_ERR_BUFFER_TOO_SMALL; - } - - // Serialize each element in `channelHandle`. - { - NvLength i; - for (i = 0; i < 8; ++i) - { - // Serialize field-presence indicator for `channelHandle[i]`. - if (finn_write_buffer(bp, 1, 1)) - { - FINN_ERROR(NV_ERR_BUFFER_TOO_SMALL); - return NV_ERR_BUFFER_TOO_SMALL; - } - - // Serialize 32-bit NvU32 primitive. - if (finn_write_buffer(bp, (api->channelHandle)[i], 32)) - { - FINN_ERROR(NV_ERR_BUFFER_TOO_SMALL); - return NV_ERR_BUFFER_TOO_SMALL; - } - - } - } - - // Serialize data-presence (nonnull pointer) indicator. - if (finn_write_buffer(bp, !!(api->fifoStartChannelList), 1)) - { - FINN_ERROR(NV_ERR_BUFFER_TOO_SMALL); - return NV_ERR_BUFFER_TOO_SMALL; - } - - // Skip if pointer is null. - if (api->fifoStartChannelList) - { - // Serialize each element in `fifoStartChannelList`. - { - NvLength i; - for (i = 0; i < (api->fifoStartChannelListCount); ++i) - { - // Serialize field-presence indicator for `fifoStartChannelList[i]`. - if (finn_write_buffer(bp, 1, 1)) - { - FINN_ERROR(NV_ERR_BUFFER_TOO_SMALL); - return NV_ERR_BUFFER_TOO_SMALL; - } - - // Record has 1 field(s) to be serialized. - { - NV_STATUS status = finnSerializeRecord_NV0080_CTRL_FIFO_CHANNEL(((NV0080_CTRL_FIFO_CHANNEL *)(NvP64_VALUE(api->fifoStartChannelList))+(i)), bp, seri_up); - if (status != NV_OK) - return status; - } - - } - } - - // Free memory that was allocated during downward deserialization. - if (seri_up && api->fifoStartChannelList) - FINN_FREE(NvP64_VALUE(api->fifoStartChannelList)); - } - - - // Done - return NV_OK; -} - - -// Deserialize each of the 3 field(s). -static NV_STATUS finnDeserializeMessage_NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS(finn_bit_pump_for_read *bp, NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS *api, NvLength api_size, NvBool deser_up) -{ - // Check that the destination struct fits within the destination buffer. - if (sizeof(NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS) > api_size) - { - FINN_ERROR(NV_ERR_BUFFER_TOO_SMALL); - return NV_ERR_BUFFER_TOO_SMALL; - } - - // Check field-presence indicator for `fifoStartChannelListCount`. - if (!finn_read_buffer(bp, 1)) - { - FINN_ERROR(NV_ERR_LIB_RM_VERSION_MISMATCH); - return NV_ERR_LIB_RM_VERSION_MISMATCH; - } - - // Deserialize 32-bit NvU32 primitive. - api->fifoStartChannelListCount = (NvU32) finn_read_buffer(bp, 32); - - // Deserialize each element in `channelHandle`. - { - NvLength i; - for (i = 0; i < 8; ++i) - { - // Check field-presence indicator for `channelHandle[i]`. - if (!finn_read_buffer(bp, 1)) - { - FINN_ERROR(NV_ERR_LIB_RM_VERSION_MISMATCH); - return NV_ERR_LIB_RM_VERSION_MISMATCH; - } - - // Deserialize 32-bit NvU32 primitive. - (api->channelHandle)[i] = (NvU32) finn_read_buffer(bp, 32); - - } - } - - // Check data-presence (nonnull pointer) indicator for `fifoStartChannelList`. - if (finn_read_buffer(bp, 1)) - { - // Allocate memory and set pointer when deserializing down. - // (Calling code is expected to do so when deserializing up.) - if (!deser_up) - { - // The data-presence indicator would have been false - // if there were no data to deserialize. - if ((api->fifoStartChannelListCount) * (sizeof(NV0080_CTRL_FIFO_CHANNEL) /*fifoStartChannelList[i]*/) /*fifoStartChannelList*/ < 1) - { - FINN_ERROR(NV_ERR_BUFFER_TOO_SMALL); - return NV_ERR_BUFFER_TOO_SMALL; - } - - api->fifoStartChannelList = NV_PTR_TO_NvP64(FINN_MALLOC((api->fifoStartChannelListCount) * (sizeof(NV0080_CTRL_FIFO_CHANNEL) /*fifoStartChannelList[i]*/) /*fifoStartChannelList*/)); - if (!api->fifoStartChannelList) - { - FINN_ERROR(NV_ERR_NO_MEMORY); - return NV_ERR_NO_MEMORY; - } - - FINN_MEMZERO(NvP64_VALUE(api->fifoStartChannelList), (api->fifoStartChannelListCount) * (sizeof(NV0080_CTRL_FIFO_CHANNEL) /*fifoStartChannelList[i]*/) /*fifoStartChannelList*/); - } - - // Otherwise the pointer must be provided by caller. - else if (!api->fifoStartChannelList) - { - FINN_ERROR(NV_ERR_INVALID_POINTER); - return NV_ERR_INVALID_POINTER; - } - - // Deserialize each element in `fifoStartChannelList`. - { - NvLength i; - for (i = 0; i < (api->fifoStartChannelListCount); ++i) - { - // Check field-presence indicator for `fifoStartChannelList[i]`. - if (!finn_read_buffer(bp, 1)) - { - FINN_ERROR(NV_ERR_LIB_RM_VERSION_MISMATCH); - return NV_ERR_LIB_RM_VERSION_MISMATCH; - } - - // Record has 1 field(s) to be deserialized. - { - NV_STATUS status = finnDeserializeRecord_NV0080_CTRL_FIFO_CHANNEL(bp, ((NV0080_CTRL_FIFO_CHANNEL *)(NvP64_VALUE(api->fifoStartChannelList))+(i)), sizeof(NV0080_CTRL_FIFO_CHANNEL), deser_up); - if (status != NV_OK) - return status; - } - - } - } - - } - - // Nullify pointer only if FINN manages memory allocation. - else - { - if (!deser_up) - api->fifoStartChannelList = NV_PTR_TO_NvP64(NULL); - } - - // Done - return NV_OK; -} - -#if (defined(NVRM)) // Serialize each of the 2 field(s). static NV_STATUS finnSerializeMessage_NV0080_CTRL_GPU_GET_CLASSLIST_PARAMS(const NV0080_CTRL_GPU_GET_CLASSLIST_PARAMS *api, finn_bit_pump_for_write *bp, NvBool seri_up) @@ -6677,57 +6461,6 @@ static NV_STATUS finnDeserializeRecord_NV0080_CTRL_DMA_UPDATE_PDE_2_PAGE_TABLE_P return NV_OK; } -#endif // (defined(NVRM)) - - -// Serialize each of the 1 field(s). -static NV_STATUS finnSerializeRecord_NV0080_CTRL_FIFO_CHANNEL(const NV0080_CTRL_FIFO_CHANNEL *api, finn_bit_pump_for_write *bp, NvBool seri_up) -{ - // Serialize field-presence indicator for `hChannel`. - if (finn_write_buffer(bp, 1, 1)) - { - FINN_ERROR(NV_ERR_BUFFER_TOO_SMALL); - return NV_ERR_BUFFER_TOO_SMALL; - } - - // Serialize 32-bit NvU32 primitive. - if (finn_write_buffer(bp, api->hChannel, 32)) - { - FINN_ERROR(NV_ERR_BUFFER_TOO_SMALL); - return NV_ERR_BUFFER_TOO_SMALL; - } - - - // Done - return NV_OK; -} - - -// Deserialize each of the 1 field(s). -static NV_STATUS finnDeserializeRecord_NV0080_CTRL_FIFO_CHANNEL(finn_bit_pump_for_read *bp, NV0080_CTRL_FIFO_CHANNEL *api, NvLength api_size, NvBool deser_up) -{ - // Check that the destination struct fits within the destination buffer. - if (sizeof(NV0080_CTRL_FIFO_CHANNEL) > api_size) - { - FINN_ERROR(NV_ERR_BUFFER_TOO_SMALL); - return NV_ERR_BUFFER_TOO_SMALL; - } - - // Check field-presence indicator for `hChannel`. - if (!finn_read_buffer(bp, 1)) - { - FINN_ERROR(NV_ERR_LIB_RM_VERSION_MISMATCH); - return NV_ERR_LIB_RM_VERSION_MISMATCH; - } - - // Deserialize 32-bit NvU32 primitive. - api->hChannel = (NvU32) finn_read_buffer(bp, 32); - - // Done - return NV_OK; -} - -#if (defined(NVRM)) // Serialize each of the 5 field(s). static NV_STATUS finnSerializeRecord_NV2080_CTRL_GPUMON_SAMPLES(const NV2080_CTRL_GPUMON_SAMPLES *api, finn_bit_pump_for_write *bp, NvBool seri_up) diff --git a/src/nvidia/kernel/inc/gpuvideo/rmifvideng.h b/src/nvidia/kernel/inc/gpuvideo/rmifvideng.h new file mode 100644 index 0000000000..8296b14964 --- /dev/null +++ b/src/nvidia/kernel/inc/gpuvideo/rmifvideng.h @@ -0,0 +1,92 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + + + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef RMIFVIDENG_H +#define RMIFVIDENG_H + +/*! + * @file rmifvideng.h + * @brief RISC-V boot arguments / interface + */ + +#include + +/*! + * Video engine's frame-buffer interface block has several slots/indices which can + * be bound to support DMA to various surfaces in memory. This is an + * enumeration that gives name to each index based on type of memory-aperture + * the index is used to access. + * + * Traditionally, video falcons have used the 6th index for ucode, and we will + * continue to use that to allow legacy ucode to work seamlessly. + * + * Note: DO NOT CHANGE THE VALUE OF RM_VIDENG_DMAIDX_UCODE. That value is used by + * both the legacy video ucode, which assumes that it will use index 6, and by + * msdecos. Changing it will break legacy video ucode, unless it is updated to + * reflect the new value. + */ +typedef enum _RM_VIDENG_DMAIDX_TYPE +{ + RM_VIDENG_DMAIDX_RSVD0 = 0, + RM_VIDENG_DMAIDX_VIRT = 1, + RM_VIDENG_DMAIDX_PHYS_VID = 2, + RM_VIDENG_DMAIDX_PHYS_SYS_COH = 3, + RM_VIDENG_DMAIDX_PHYS_SYS_NCOH = 4, + RM_VIDENG_DMAIDX_RSVD1 = 5, + RM_VIDENG_DMAIDX_UCODE = 6, + RM_VIDENG_DMAIDX_END = 7 +} RM_VIDENG_DMAIDX_TYPE; + +/*! + * Configuration for riscv msdecos boot params + */ +#define NV_VIDENG_BOOT_PARAMS_VERSION 2 + +#define NV_VIDENG_BOOT_PARAMS_MEM_ADDR_LO 31:0 +#define NV_VIDENG_BOOT_PARAMS_MEM_ADDR_HI 27:0 +#define NV_VIDENG_BOOT_PARAMS_MEM_DMA_IDX 31:28 + +#define NV_VIDENG_TRACESURF_PARAMS_SIZE 27:0 +#define NV_VIDENG_TRACESURF_PARAMS_DMA_IDX 31:28 + +typedef struct +{ + /* + * *** WARNING *** + * First 3 fields must be frozen like that always. Should never + * be reordered or changed. + */ + NvU8 version; // version of boot params + NvU8 rsvd; // reserved byte + NvU16 size; // size of boot params + /* + * You can reorder or change below this point but update version. + * Make sure to align it to 16B as ucode expect 16byte alignment to DMA efficiently. + */ + NvU32 videoPgPmuHandshake; // Handshake between PMU and Video Ucode for SW controlled IDLE signal. + NvU64 rsvd2; // reserved field +} NV_VIDENG_BOOT_PARAMS, *PNV_VIDENG_BOOT_PARAMS; + +#endif // RMIFVIDENG_H diff --git a/src/nvidia/src/kernel/core/bin_data_pvt.h b/src/nvidia/src/kernel/core/bin_data_pvt.h index 99be5be616..b651581435 100644 --- a/src/nvidia/src/kernel/core/bin_data_pvt.h +++ b/src/nvidia/src/kernel/core/bin_data_pvt.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/src/kernel/core/hal_mgr.c b/src/nvidia/src/kernel/core/hal_mgr.c index d495aa3268..78e6c0d783 100644 --- a/src/nvidia/src/kernel/core/hal_mgr.c +++ b/src/nvidia/src/kernel/core/hal_mgr.c @@ -138,7 +138,7 @@ _halmgrIsChipSupported if (pPmcBoot42) { - if ((gpuGetArchitectureFromPmcBoot42(pPmcBoot42) == chipID[publicHalID].arch) && + if ((decodePmcBoot42Architecture(pPmcBoot42) == chipID[publicHalID].arch) && (DRF_VAL(_PMC, _BOOT_42, _IMPLEMENTATION, pPmcBoot42) == chipID[publicHalID].impl)) { retVal = NV_TRUE; diff --git a/src/nvidia/src/kernel/core/system.c b/src/nvidia/src/kernel/core/system.c index 0883f03d4c..31f2474487 100644 --- a/src/nvidia/src/kernel/core/system.c +++ b/src/nvidia/src/kernel/core/system.c @@ -788,6 +788,12 @@ sysInitRegistryOverrides_IMPL pSys->setProperty(pSys, PDB_PROP_SYS_ENABLE_RM_TEST_ONLY_CODE, !!data32); } + if (osReadRegistryDword(pGpu, NV_REG_STR_RM_ENABLE_FORCE_SHARED_LOCK, &data32) + == NV_OK) + { + pSys->setProperty(pSys, PDB_PROP_SYS_ENABLE_FORCE_SHARED_LOCK, !!data32); + } + gpumgrSetGpuNvlinkBwModeFromRegistry(pGpu); } @@ -818,3 +824,48 @@ sysSyncExternalFabricMgmtWAR_IMPL return status; } + +static void +_sysRefreshAllGpuRecoveryAction +( + void *pData +) +{ + NV_STATUS status; + OBJGPU *pGpu; + NvU32 i; + NvU32 gpuCount; + NvU32 gpuIndex; + NvU32 gpuMask; + + NV_ASSERT_OK_OR_ELSE(status, + rmGpuGroupLockAcquire(0, GPU_LOCK_GRP_ALL, GPUS_LOCK_FLAGS_NONE, RM_LOCK_MODULES_NONE, &gpuMask), + return); + + gpumgrGetGpuAttachInfo(&gpuCount, &gpuMask); + for (i = 0, gpuIndex = 0; i < gpuCount; i++) + { + pGpu = gpumgrGetNextGpu(gpuMask, &gpuIndex); + if (pGpu) + { + gpuRefreshRecoveryAction(pGpu, NV_TRUE); + } + } + + rmGpuGroupLockRelease(gpuMask, GPUS_LOCK_FLAGS_NONE); +} + +void +sysSetRecoveryRebootRequired_IMPL +( + OBJSYS *pSys, + NvBool bRebootRequired +) +{ + if (!!pSys->getProperty(pSys, PDB_PROP_SYS_RECOVERY_REBOOT_REQUIRED) != !!bRebootRequired) + { + pSys->setProperty(pSys, PDB_PROP_SYS_RECOVERY_REBOOT_REQUIRED, bRebootRequired); + osQueueSystemWorkItem(_sysRefreshAllGpuRecoveryAction, NULL); + } +} + diff --git a/src/nvidia/src/kernel/core/thread_state.c b/src/nvidia/src/kernel/core/thread_state.c index de2f7cd756..f1d9461c53 100644 --- a/src/nvidia/src/kernel/core/thread_state.c +++ b/src/nvidia/src/kernel/core/thread_state.c @@ -327,23 +327,22 @@ static NV_STATUS _threadNodeInitTime(THREAD_STATE_NODE *pThreadNode) computeTimeoutMsecs = pThreadNode->timeout.overrideTimeoutMsecs; } - NvBool deviceInit = ((pThreadNode->flags & THREAD_STATE_FLAGS_DEVICE_INIT) != 0); - if (deviceInit && hypervisorIsType(OS_HYPERVISOR_HYPERV)) + if ((pThreadNode->flags & THREAD_STATE_FLAGS_DEVICE_INIT) != 0) { // - // Hyper-V intercepts MMIO accesses to the GPU adding a lot of extra - // latency. This causes RM device init that is very heavy in MMIO - // accesses to take much longer than on baremetal. To WAR this, use a - // long 60 secs timeout for threads performing device init. This should - // leave us with a comfortable buffer as the longest init observed so - // far was 20 seconds on K80. + // Even on platforms with strict timing requirements (e.g. WDDM) there + // is an exception for initialization. While init time is an important + // performance metric, we do not want to functionally fail because of + // an arbitrary deadline. Thus, we set the timeout to give plenty of + // buffer room for some of the slower platforms: + // - P40 can take ~30 seconds when booting in passthrough due to + // Hyper-V intercepting all MMIO accesses (bug 1900927) + // - Hopper+ can take 3+ seconds due to memory link initialization // - // See bug 1900927 for more details. - // - const NvU32 HYPER_V_INIT_TIMEOUT_MS = 60 * 1000; + const NvU32 DEVICE_INIT_TIMEOUT_MS = 60 * 1000; - computeTimeoutMsecs = HYPER_V_INIT_TIMEOUT_MS; - nonComputeTimeoutMsecs = HYPER_V_INIT_TIMEOUT_MS; + computeTimeoutMsecs = DEVICE_INIT_TIMEOUT_MS; + nonComputeTimeoutMsecs = DEVICE_INIT_TIMEOUT_MS; } _threadStateSetNextCpuYieldTime(pThreadNode); diff --git a/src/nvidia/src/kernel/diagnostics/journal.c b/src/nvidia/src/kernel/diagnostics/journal.c index 67b168baef..c17d98b499 100644 --- a/src/nvidia/src/kernel/diagnostics/journal.c +++ b/src/nvidia/src/kernel/diagnostics/journal.c @@ -422,7 +422,7 @@ NV_STATUS rcdbAddAssertJournalRecWithLine(void *pVoidGpu, NvU32 lineNum, void** OBJGPU *pPossibleNULLGpu; JOURNAL_ASSERT_LIST *pAssertList; RmRCCommonAssert_RECORD newAssertRec; - RmRCCommonAssert_RECORD *pAssertRec; + RmRCCommonAssert_RECORD *pAssertRec = NULL; NV_STATUS rmStatus = NV_ERR_GENERIC; NvU32 i; @@ -503,7 +503,7 @@ NV_STATUS rcdbAddAssertJournalRecWithLine(void *pVoidGpu, NvU32 lineNum, void** portAtomicDecrementS32(&assertListRecursion); } - if (rmStatus == NV_OK) + if (rmStatus == NV_OK && pAssertRec != NULL) { RMTRACE_RMJOURNAL(_ASSERTLOG, (pPossibleNULLGpu ? pPossibleNULLGpu->gpuId : RMTRACE_UNKNOWN_GPUID), type, diff --git a/src/nvidia/src/kernel/diagnostics/nvlog.c b/src/nvidia/src/kernel/diagnostics/nvlog.c index e1527a3338..4f743b9cbb 100644 --- a/src/nvidia/src/kernel/diagnostics/nvlog.c +++ b/src/nvidia/src/kernel/diagnostics/nvlog.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2009-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2009-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/src/kernel/disp/nvfbc_session.c b/src/nvidia/src/kernel/disp/nvfbc_session.c index 7a95f55bfb..91eee1d79b 100644 --- a/src/nvidia/src/kernel/disp/nvfbc_session.c +++ b/src/nvidia/src/kernel/disp/nvfbc_session.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2008-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2008-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -75,7 +75,7 @@ nvfbcsessionConstruct_IMPL return NV_ERR_INVALID_ARGUMENT; } - pClient = serverutilGetClientUnderLock(hClient); + pClient = dynamicCast(pRsClient, RmClient); if (pClient == NULL) { return NV_ERR_INVALID_CLIENT; diff --git a/src/nvidia/src/kernel/gpu/arch/ada/kern_gpu_ad102.c b/src/nvidia/src/kernel/gpu/arch/ada/kern_gpu_ad102.c index a4886fd8c8..03cdbada8b 100644 --- a/src/nvidia/src/kernel/gpu/arch/ada/kern_gpu_ad102.c +++ b/src/nvidia/src/kernel/gpu/arch/ada/kern_gpu_ad102.c @@ -53,7 +53,6 @@ static const GPUCHILDPRESENT gpuChildrenPresent_AD102[] = GPU_CHILD_PRESENT(KernelRc, 1), GPU_CHILD_PRESENT(Intr, 1), GPU_CHILD_PRESENT(NvDebugDump, 1), - GPU_CHILD_PRESENT(OBJGPUMON, 1), GPU_CHILD_PRESENT(OBJSWENG, 1), GPU_CHILD_PRESENT(OBJUVM, 1), GPU_CHILD_PRESENT(KernelBif, 1), diff --git a/src/nvidia/src/kernel/gpu/arch/ampere/kern_gpu_ga100.c b/src/nvidia/src/kernel/gpu/arch/ampere/kern_gpu_ga100.c index 8b19a21b04..b3eddd121e 100644 --- a/src/nvidia/src/kernel/gpu/arch/ampere/kern_gpu_ga100.c +++ b/src/nvidia/src/kernel/gpu/arch/ampere/kern_gpu_ga100.c @@ -26,6 +26,7 @@ #include "kernel/gpu/intr/intr.h" #include "kernel/gpu/mig_mgr/kernel_mig_manager.h" #include "gpu/mem_mgr/mem_mgr.h" +#include "published/ampere/ga100/dev_bus_addendum.h" #include "published/ampere/ga100/dev_fb.h" #include "published/ampere/ga100/dev_vm.h" #include "published/ampere/ga100/dev_fuse.h" @@ -144,7 +145,7 @@ gpuGetFlaVasSize_GA100 ) { MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); - NvU64 totalFbSize = (pMemoryManager->Ram.fbTotalMemSizeMb << 20); + NvU64 totalFbSize = (pMemoryManager->Ram.fbTotalMemSizeMb << 20); if (bNvswitchVirtualization || totalFbSize <= NVBIT64(36)) { @@ -196,7 +197,6 @@ static const GPUCHILDPRESENT gpuChildrenPresent_GA100[] = GPU_CHILD_PRESENT(KernelRc, 1), GPU_CHILD_PRESENT(Intr, 1), GPU_CHILD_PRESENT(NvDebugDump, 1), - GPU_CHILD_PRESENT(OBJGPUMON, 1), GPU_CHILD_PRESENT(OBJSWENG, 1), GPU_CHILD_PRESENT(OBJUVM, 1), GPU_CHILD_PRESENT(KernelBif, 1), @@ -247,7 +247,6 @@ static const GPUCHILDPRESENT gpuChildrenPresent_GA102[] = GPU_CHILD_PRESENT(KernelRc, 1), GPU_CHILD_PRESENT(Intr, 1), GPU_CHILD_PRESENT(NvDebugDump, 1), - GPU_CHILD_PRESENT(OBJGPUMON, 1), GPU_CHILD_PRESENT(OBJSWENG, 1), GPU_CHILD_PRESENT(OBJUVM, 1), GPU_CHILD_PRESENT(KernelBif, 1), @@ -447,7 +446,7 @@ _gpuNotifySubDeviceEventNotifier_GA100 break; case NV_ERROR_CONT_ERR_ID_E25_FBFALCON_POISON: - info16 = ROBUST_CHANNEL_UNCONTAINED_ERROR; + info16 = ROBUST_CHANNEL_CONTAINED_ERROR; break; case NV_ERROR_CONT_ERR_ID_E26_NVDEC_POISON: @@ -497,10 +496,13 @@ _gpuNotifySubDeviceEventNotifier_GA100 */ static NV_STATUS -_gpuGenerateErrorLog_GA100(OBJGPU *pGpu, - NV_ERROR_CONT_ERR_ID errorCode, - NV_ERROR_CONT_LOCATION loc, - NV_ERROR_CONT_SMC_DIS_EN_SETTING *pErrorContSmcSetting) +_gpuGenerateErrorLog_GA100 +( + OBJGPU *pGpu, + NV_ERROR_CONT_ERR_ID errorCode, + NV_ERROR_CONT_LOCATION loc, + NV_ERROR_CONT_SMC_DIS_EN_SETTING *pErrorContSmcSetting +) { RM_ENGINE_TYPE localRmEngineType; NvU32 rcErrorCode = pErrorContSmcSetting->rcErrorCode; @@ -510,6 +512,7 @@ _gpuGenerateErrorLog_GA100(OBJGPU *pGpu, switch (loc.locType) { case NV_ERROR_CONT_LOCATION_TYPE_DRAM: + { nvErrorLog_va((void *)pGpu, rcErrorCode, "%s: %s (0x%x,0x%x). physAddr: 0x%08llx RST: %s, D-RST: %s", @@ -523,8 +526,9 @@ _gpuGenerateErrorLog_GA100(OBJGPU *pGpu, pErrorContSmcSetting->bGpuResetReqd ? "Yes" : "No", pErrorContSmcSetting->bGpuDrainAndResetReqd ? "Yes" : "No"); break; - + } case NV_ERROR_CONT_LOCATION_TYPE_LTC: + { nvErrorLog_va((void *)pGpu, rcErrorCode, "%s: %s (0x%x,0x%x). RST: %s, D-RST: %s", @@ -537,8 +541,9 @@ _gpuGenerateErrorLog_GA100(OBJGPU *pGpu, pErrorContSmcSetting->bGpuResetReqd ? "Yes" : "No", pErrorContSmcSetting->bGpuDrainAndResetReqd ? "Yes" : "No"); break; - + } case NV_ERROR_CONT_LOCATION_TYPE_ENGINE: + { // // If SMC is enabled, RM need to notify partition local engine ID. Convert // global ID to partition local if client has filled proper engine IDs @@ -572,8 +577,9 @@ _gpuGenerateErrorLog_GA100(OBJGPU *pGpu, pErrorContSmcSetting->bGpuResetReqd ? "Yes" : "No", pErrorContSmcSetting->bGpuDrainAndResetReqd ? "Yes" : "No"); break; - + } case NV_ERROR_CONT_LOCATION_TYPE_VF: + { nvErrorLog_va((void *)pGpu, rcErrorCode, "%s: %s (0x%x). RST: %s, D-RST: %s", @@ -585,8 +591,9 @@ _gpuGenerateErrorLog_GA100(OBJGPU *pGpu, pErrorContSmcSetting->bGpuResetReqd ? "Yes" : "No", pErrorContSmcSetting->bGpuDrainAndResetReqd ? "Yes" : "No"); break; - + } case NV_ERROR_CONT_LOCATION_TYPE_NONE: + { nvErrorLog_va((void *)pGpu, rcErrorCode, "%s: %s. RST: %s, D-RST: %s", @@ -597,6 +604,7 @@ _gpuGenerateErrorLog_GA100(OBJGPU *pGpu, pErrorContSmcSetting->bGpuResetReqd ? "Yes" : "No", pErrorContSmcSetting->bGpuDrainAndResetReqd ? "Yes" : "No"); break; + } } return NV_OK; @@ -607,10 +615,10 @@ _gpuGenerateErrorLog_GA100(OBJGPU *pGpu, * mark device for reset or mark device for drain and reset as indicated in * error containment state table (refer gpu/error_cont.h). * - * @param[in] pGpu OBJGPU pointer - * @param[in] errorCode Error Containment error code - * @param[in] loc Location, SubLocation information - * @param[out] pRcErrorCode RC Error code + * @param[in] pGpu OBJGPU pointer + * @param[in] errorCode Error Containment error code + * @param[in] loc Location, SubLocation information + * @param[out] pRcErrorCode RC Error code * * @returns NV_STATUS */ @@ -623,11 +631,11 @@ gpuUpdateErrorContainmentState_GA100 NvU32 *pRcErrorCode ) { - NvU32 tableIndex = 0; - NvBool bIsSmcEnabled = NV_FALSE; - NvU32 smcDisEnSettingIndex = 0; - NvU32 rcErrorCode = 0; - KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); + KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); + NvU32 tableIndex = 0; + NvBool bIsSmcEnabled = NV_FALSE; + NvU32 smcDisEnSettingIndex = 0; + NvU32 rcErrorCode = 0; NV_ERROR_CONT_SMC_DIS_EN_SETTING *pErrorContSmcSetting = NULL; if (!gpuIsGlobalPoisonFuseEnabled(pGpu)) @@ -644,13 +652,12 @@ gpuUpdateErrorContainmentState_GA100 } // MIG Memory partitioning config entry index. - if (pKernelMIGManager != NULL && kmigmgrIsMIGMemPartitioningEnabled(pGpu, pKernelMIGManager)) + if ((pKernelMIGManager != NULL) && kmigmgrIsMIGMemPartitioningEnabled(pGpu, pKernelMIGManager)) { smcDisEnSettingIndex = 1; } pErrorContSmcSetting = &(g_errContStateTable[tableIndex].smcDisEnSetting[smcDisEnSettingIndex]); - rcErrorCode = pErrorContSmcSetting->rcErrorCode; // Pass RC Error code if user requested it. @@ -663,40 +670,33 @@ gpuUpdateErrorContainmentState_GA100 if (pErrorContSmcSetting->bPrintSmcPartitionInfo && bIsSmcEnabled) { // Fall through on error. - gpuSetPartitionErrorAttribution_HAL(pGpu, - errorCode, - loc, - rcErrorCode); + gpuSetPartitionErrorAttribution_HAL(pGpu, errorCode, loc, rcErrorCode); } // Print Xid only if Ampere Error Containment XIDs printing is enabled and rcErrorCode is valid - if (gpuIsAmpereErrorContainmentXidEnabled(pGpu) && rcErrorCode != NO_XID) + if (gpuIsAmpereErrorContainmentXidEnabled(pGpu) && (rcErrorCode != NO_XID)) { - NV_ASSERT_OK_OR_RETURN(_gpuGenerateErrorLog_GA100(pGpu, - errorCode, - loc, - pErrorContSmcSetting)); + NV_ASSERT_OK_OR_RETURN(_gpuGenerateErrorLog_GA100(pGpu, errorCode, loc, pErrorContSmcSetting)); } // Send NV2080_NOTIFIER* if (pErrorContSmcSetting->nv2080Notifier != NO_NV2080_NOTIFIER) { - NV_ASSERT_OK(_gpuNotifySubDeviceEventNotifier_GA100(pGpu, - errorCode, - loc, - pErrorContSmcSetting->nv2080Notifier)); + NV_ASSERT_OK( + _gpuNotifySubDeviceEventNotifier_GA100(pGpu, + errorCode, + loc, + pErrorContSmcSetting->nv2080Notifier)); } // Set the scratch bit to indicate the GPU needs to be reset. - if ((pErrorContSmcSetting->bGpuResetReqd) && - (gpuMarkDeviceForReset(pGpu) != NV_OK)) + if (pErrorContSmcSetting->bGpuResetReqd && (gpuMarkDeviceForReset(pGpu) != NV_OK)) { NV_PRINTF(LEVEL_ERROR, "Failed to mark GPU for pending reset"); } // Set the scratch bit to indicate the GPU needs to be reset. - if (pErrorContSmcSetting->bGpuDrainAndResetReqd && - gpuMarkDeviceForDrainAndReset(pGpu) != NV_OK) + if (pErrorContSmcSetting->bGpuDrainAndResetReqd && (gpuMarkDeviceForDrainAndReset(pGpu) != NV_OK)) { NV_PRINTF(LEVEL_ERROR, "Failed to mark GPU for pending drain and reset"); } @@ -713,8 +713,6 @@ gpuCheckIfFbhubPoisonIntrPending_GA100 return intrIsVectorPending_HAL(pGpu, GPU_GET_INTR(pGpu), NV_PFB_FBHUB_POISON_INTR_VECTOR_HW_INIT, NULL); } - - NV_STATUS gpuGetDeviceInfoTableSectionInfos_GA100 ( @@ -741,3 +739,53 @@ gpuGetDeviceInfoTableSectionInfos_GA100 return NV_OK; }; +/*! + * @brief A bit in scratch 30 is reserved to indicate GPU Drain and Reset is pending. + * This is useful for CSPs monitoring whether a GPU needs to be drained and reset through out of band. + * This function sets the bit to the requested value, indicating that a drain and reset is pending or clearing the status. + * + * @param[in] pGpu OBJGPU pointer + * @param[in] bDrainRecommended Value to set + * + * @returns NV_OK + */ +NV_STATUS +gpuSetDrainAndResetScratchBit_GA100 +( + OBJGPU *pGpu, + NvBool bDrainRecommended +) +{ + NvU32 scratchRegVal = gpuReadPBusScratch_HAL(pGpu, NV_PBUS_SW_RESET_BITS_SCRATCH_REG); + + scratchRegVal = bDrainRecommended ? + FLD_SET_DRF(_PBUS, _SW_SCRATCH30, _GPU_DRAIN_AND_RESET_RECOMMENDED, _YES, scratchRegVal) : + FLD_SET_DRF(_PBUS, _SW_SCRATCH30, _GPU_DRAIN_AND_RESET_RECOMMENDED, _NO, scratchRegVal); + + gpuWritePBusScratch_HAL(pGpu, NV_PBUS_SW_RESET_BITS_SCRATCH_REG, scratchRegVal); + + return NV_OK; +} + +/*! + * @brief A bit in scratch 30 is reserved to indicate GPU Drain and Reset is pending. + * This is useful for CSPs monitoring whether a GPU needs to be drained and reset through out of band. + * This function reads the value of the bit. + * + * @param[in] pGpu OBJGPU pointer + * @param[out] pbDrainRecommended The value of the scratch bit + * + * @returns NV_OK + */ +NV_STATUS +gpuGetDrainAndResetScratchBit_GA100 +( + OBJGPU *pGpu, + NvBool *pbDrainRecommended +) +{ + NvU32 scratchRegVal = gpuReadPBusScratch_HAL(pGpu, NV_PBUS_SW_RESET_BITS_SCRATCH_REG); + + *pbDrainRecommended = FLD_TEST_DRF(_PBUS, _SW_SCRATCH30, _GPU_DRAIN_AND_RESET_RECOMMENDED, _YES, scratchRegVal); + return NV_OK; +} diff --git a/src/nvidia/src/kernel/gpu/arch/blackwell/kern_gpu_gb100.c b/src/nvidia/src/kernel/gpu/arch/blackwell/kern_gpu_gb100.c index ab1179b888..170297e14f 100644 --- a/src/nvidia/src/kernel/gpu/arch/blackwell/kern_gpu_gb100.c +++ b/src/nvidia/src/kernel/gpu/arch/blackwell/kern_gpu_gb100.c @@ -36,8 +36,21 @@ #include "published/blackwell/gb100/dev_boot.h" #include "published/blackwell/gb100/dev_boot_addendum.h" - +#include "published/blackwell/gb100/dev_riscv_pri.h" #include "published/blackwell/gb100/dev_pcfg_pf0.h" +#include "published/blackwell/gb100/dev_nv_pcie_config_reg_addendum.h" + +static NV_STATUS _gpuFindPcieRegAddr_GB100(OBJGPU *pGpu, NvU32 regId, NvU32 *pRegAddr); +static NvU32 _gpuGetPciePartitionId_GB100(OBJGPU *pGpu, NvU32 hwDefAddr); +static NvU32 _gpuGetPcieCfgCapId_GB100(OBJGPU *pGpu, NvU32 hwDefAddr); +static NvU32 _gpuGetPcieExtCfgCapId_GB100(OBJGPU *pGpu, NvU32 hwDefAddr); +static NvU32 _gpuGetPcieCfgMsgboxId_GB100(OBJGPU *pGpu, NvU32 hwDefAddr); +static NV_STATUS _gpuGetPcieCfgCapBaseAddr_GB100(OBJGPU *pGpu, NvU32 hwDefAddr, NvU32 *pCapBaseAddr); +static void _gpuGetPcieExtCfgDvsecInfo_GB100(OBJGPU *pGpu, NvU32 hwDefAddr, NvU32 *pVenId, NvU32 *pDvsecLen); +static NV_STATUS _gpuGetPcieExtCfgCapBaseAddr_GB100(OBJGPU *pGpu, NvU32 hwDefAddr, NvU32 *pCapBaseAddr); +static NvU32 _gpuGetPcieCfgRegOffset_GB100(OBJGPU *pGpu, NvU32 hwDefAddr); +static NvU32 _gpuGetPcieExtCfgRegOffset_GB100(OBJGPU *pGpu, NvU32 hwDefAddr); + // // List of GPU children that present for the chip. List entries contain$ @@ -60,7 +73,6 @@ static const GPUCHILDPRESENT gpuChildrenPresent_GB100[] = GPU_CHILD_PRESENT(KernelRc, 1), GPU_CHILD_PRESENT(Intr, 1), GPU_CHILD_PRESENT(NvDebugDump, 1), - GPU_CHILD_PRESENT(OBJGPUMON, 1), GPU_CHILD_PRESENT(OBJSWENG, 1), GPU_CHILD_PRESENT(OBJUVM, 1), GPU_CHILD_PRESENT(KernelBif, 1), @@ -115,7 +127,6 @@ static const GPUCHILDPRESENT gpuChildrenPresent_GB102[] = GPU_CHILD_PRESENT(KernelRc, 1), GPU_CHILD_PRESENT(Intr, 1), GPU_CHILD_PRESENT(NvDebugDump, 1), - GPU_CHILD_PRESENT(OBJGPUMON, 1), GPU_CHILD_PRESENT(OBJSWENG, 1), GPU_CHILD_PRESENT(OBJUVM, 1), GPU_CHILD_PRESENT(KernelBif, 1), @@ -148,6 +159,32 @@ gpuGetChildrenPresent_GB102(OBJGPU *pGpu, NvU32 *pNumEntries) return gpuChildrenPresent_GB102; } +/*! + * @brief If this is a GSP-RM platform, config accesses are not allowed + * + * @param[in] pGpu GPU object pointer + * + * @returns NV_OK Config space access supported + * NV_ERR_NOT_SUPPORTED Config space access not supported + */ +NV_STATUS +gpuConfigAccessSanityCheck_GB100 +( + OBJGPU *pGpu +) +{ + if (RMCFG_FEATURE_PLATFORM_GSP) + { + NV_PRINTF(LEVEL_ERROR, "Config register access restricted on GSP-RM. Please update call stack on Bug 4610008!\n"); + DBG_BREAKPOINT(); + return NV_ERR_NOT_SUPPORTED; + } + else + { + return NV_OK; + } +} + /*! * @brief Read the non-private registers on vGPU through mirror space * @@ -180,6 +217,673 @@ gpuReadPassThruConfigReg_GB100 return NV_OK; } +/*! + * @brief Write to pcie spec registers using config cycles + * + * @param[in] pGpu GPU object pointer + * @param[in] hwDefAddr HW defined register address + * @param[in] value Write this value to the register + * + * @returns NV_OK on success + */ +static NV_STATUS +_gpuFindPcieRegAddr_GB100 +( + OBJGPU *pGpu, + NvU32 hwDefAddr, + NvU32 *pRegAddr +) +{ + NV_STATUS status = NV_OK; + NvU32 partitionId = 0; + NvU32 offset = 0; + NvU32 capBaseAddr = 0; + + partitionId = _gpuGetPciePartitionId_GB100(pGpu, hwDefAddr); + + if (partitionId == NV_PCIE_PARTITION_ID_TYPE0_HEADER) + { + // + // In Type0 Header partition, there are no capability groups, so the + // partition's base address is the base address we need + // + capBaseAddr = NV_PCIE_PARTITION_ID_TYPE0_HEADER_BASE_ADDR; + offset = hwDefAddr; + } + else if (partitionId == NV_PCIE_PARTITION_ID_CFG_SPACE) + { + status = _gpuGetPcieCfgCapBaseAddr_GB100(pGpu, hwDefAddr, &capBaseAddr); + offset = _gpuGetPcieCfgRegOffset_GB100(pGpu, hwDefAddr); + } + else if (partitionId == NV_PCIE_PARTITION_ID_EXT_CFG_SPACE) + { + status = _gpuGetPcieExtCfgCapBaseAddr_GB100(pGpu, hwDefAddr, &capBaseAddr); + offset = _gpuGetPcieExtCfgRegOffset_GB100(pGpu, hwDefAddr); + } + else + { + status = NV_ERR_NOT_SUPPORTED; + DBG_BREAKPOINT(); + } + + if (status == NV_OK) + { + // Final address of register + *pRegAddr = capBaseAddr + offset; + } + else + { + *pRegAddr = 0; + } + + return status; +} + +/*! + * @brief Write to pcie spec registers using config cycles + * + * @param[in] pGpu GPU object pointer + * @param[in] hwDefAddr HW defined register address + * @param[in] value Write this value to the register + * + * @returns NV_OK on success + */ +NV_STATUS +gpuWriteBusConfigCycle_GB100 +( + OBJGPU *pGpu, + NvU32 hwDefAddr, + NvU32 value +) +{ + extern NV_STATUS gpuWriteBusConfigCycle_GM107(OBJGPU *pGpu, NvU32 hwDefAddr, NvU32 value); + NV_STATUS status = NV_OK; + NvU32 domain = gpuGetDomain(pGpu); + NvU8 bus = gpuGetBus(pGpu); + NvU8 device = gpuGetDevice(pGpu); + NvU8 function = 0; + NvU32 regAddr = 0; + + if (!IS_SILICON(pGpu)) + { + return gpuWriteBusConfigCycle_GM107(pGpu, hwDefAddr, value); + } + + status = gpuConfigAccessSanityCheck_HAL(pGpu); + if (status != NV_OK) + { + return status; + } + + // Find config register address via linked list traversal + status = _gpuFindPcieRegAddr_GB100(pGpu, hwDefAddr, ®Addr); + if (status == NV_OK) + { + // Write to the address + if (pGpu->hPci == NULL) + { + pGpu->hPci = osPciInitHandle(domain, bus, device, function, NULL, NULL); + } + + osPciWriteDword(pGpu->hPci, regAddr, value); + } + + return status; +} + +/*! + * @brief Read the pcie spec registers using config cycles + * + * @param[in] pGpu GPU object pointer + * @param[in] hwDefAddr HW defined register address + * @param[out] pData Value of the register + * + * @returns NV_OK on success + */ +NV_STATUS +gpuReadBusConfigCycle_GB100 +( + OBJGPU *pGpu, + NvU32 hwDefAddr, + NvU32 *pData +) +{ + extern NV_STATUS gpuReadBusConfigCycle_GM107(OBJGPU *pGpu, NvU32 hwDefAddr, NvU32 *pData); + NV_STATUS status = NV_OK; + NvU32 domain = gpuGetDomain(pGpu); + NvU8 bus = gpuGetBus(pGpu); + NvU8 device = gpuGetDevice(pGpu); + NvU8 function = 0; + NvU32 regAddr = 0; + + if (!IS_SILICON(pGpu)) + { + return gpuReadBusConfigCycle_GM107(pGpu, hwDefAddr, pData); + } + + status = gpuConfigAccessSanityCheck_HAL(pGpu); + if (status != NV_OK) + { + return status; + } + + // Find config register address via linked list traversal + status = _gpuFindPcieRegAddr_GB100(pGpu, hwDefAddr, ®Addr); + if (status == NV_OK) + { + // Read the address + if (pGpu->hPci == NULL) + { + pGpu->hPci = osPciInitHandle(domain, bus, device, function, NULL, NULL); + } + + *pData = osPciReadDword(pGpu->hPci, regAddr); + } + + return status; +} + +/*! + * @brief Get the partition ID from PCIE Config Space + * + * @param[in] pGpu GPU object pointer + * @param[in] hwDefAddr HW defined register address + * + * @return Partition ID for the hwDefAddr + */ +static NvU32 +_gpuGetPciePartitionId_GB100 +( + OBJGPU *pGpu, + NvU32 hwDefAddr +) +{ + if (hwDefAddr <= NV_PCIE_PARTITION_ID_TYPE0_HEADER_END) + { + return NV_PCIE_PARTITION_ID_TYPE0_HEADER; + } + else if ((hwDefAddr >= NV_PCIE_PARTITION_ID_CFG_SPACE_START) && + (hwDefAddr <= NV_PCIE_PARTITION_ID_CFG_SPACE_END)) + { + return NV_PCIE_PARTITION_ID_CFG_SPACE; + } + else if (hwDefAddr >= NV_PCIE_PARTITION_ID_EXT_CFG_SPACE_START) + { + return NV_PCIE_PARTITION_ID_EXT_CFG_SPACE; + } + else + { + return NV_PCIE_PARTITION_ID_INVALID; + } +} + +/*! + * @brief Get the base address of the capability group corresponding to the hwDefAddr + * in PCI Config Space partition + * + * @param[in] pGpu GPU object pointer + * @param[in] hwDefAddr Register address + * @param[out] pRegAddr Final register address to be read + * + * Overview: + * 1. Get the details that uniquely identify group of the hwDefAddr i.e, msgboxId & capId + * 2. Read base address of this partition to get to first node of linklist + * 3. Traverse the linked list to get the base address of the capability group + * a. Start from 0x34 base address, and go to next address until you find + * the cap_id you are looking for. + * b. First differentiating factor is cap_id, so extract that and if it is + * anything other than 0x9 then we have found the group address we are + * looking for, so exit. + * c. If cap_id is 0x9 - then we are in the VSC/VSEC register space. + * d. The differentiating factor for these registers is the MSGBOX_ID. + * Loop over until we find the right MSGBOX_ID, once found, we have + * the group address we are looking for, so exit. + * + * @return NV_OK Success + * NV_ERR_INVALID_ADDRESS Unrecognised hwDefAddr + */ +static NV_STATUS +_gpuGetPcieCfgCapBaseAddr_GB100 +( + OBJGPU *pGpu, + NvU32 hwDefAddr, + NvU32 *pCapBaseAddr +) +{ + NV_STATUS status = NV_OK; + NvU32 capBaseAddr = NV_PCIE_PARTITION_ID_CFG_SPACE_BASE_ADDR; + NvU32 regVal = 0; + NvU32 curCapId = 0; + NvU32 curMsgBoxId = 0; + NvU32 targetCapId = 0; + NvU32 targetMsgBoxId = 0; + NvU32 domain = gpuGetDomain(pGpu); + NvU8 bus = gpuGetBus(pGpu); + NvU8 device = gpuGetDevice(pGpu); + NvU8 function = 0; + NvU8 regCount = 0; + + if (pGpu->hPci == NULL) + { + pGpu->hPci = osPciInitHandle(domain, bus, device, function, NULL, NULL); + } + + // 1. Get the details that uniquely identify capability group of the hwDefAddr i.e, capId & msgboxId + targetCapId = _gpuGetPcieCfgCapId_GB100(pGpu, hwDefAddr); + if (targetCapId == 0) + { + status = NV_ERR_NOT_SUPPORTED; + DBG_BREAKPOINT(); + return status; + } + + targetMsgBoxId = _gpuGetPcieCfgMsgboxId_GB100(pGpu, hwDefAddr); + + // 2. Read base address of this partition to get to first node of linklist + regVal = osPciReadDword(pGpu->hPci, capBaseAddr); + if (regVal == 0xFFFFFFFF) + { + NV_PRINTF(LEVEL_ERROR, "Register read failed : 0x%x\n", capBaseAddr); + status = NV_ERR_INVALID_STATE; + NV_ASSERT(0); + return status; + } + + // 3. Traverse the linked list to get the base address of the capability group + capBaseAddr = (regVal & 0xFF); + while ((capBaseAddr != 0) && ((regCount++) <= NV_ARRAY_ELEMENTS(pcieCfgRegInfo))) + { + regVal = osPciReadDword(pGpu->hPci, capBaseAddr); + if (regVal == 0xFFFFFFFF) + { + NV_PRINTF(LEVEL_ERROR, "Register read failed : 0x%x\n", capBaseAddr); + status = NV_ERR_INVALID_STATE; + NV_ASSERT(0); + return status; + } + + curCapId = (regVal & NV_PCIE_PARTITION_ID_CFG_SPACE_CAP_ID_MASK); + if (curCapId == targetCapId) + { + if (curCapId == NV_PCIE_REG_CAP_ID_CFG_VENDOR_SPECIFIC_CAP) + { + curMsgBoxId = (regVal & NV_PCIE_PARTITION_ID_CFG_SPACE_MSGBOX_ID_MASK); + curMsgBoxId = (curMsgBoxId >> portUtilCountTrailingZeros32(NV_PCIE_PARTITION_ID_CFG_SPACE_MSGBOX_ID_MASK)); + if (curMsgBoxId == targetMsgBoxId) + { + break; + } + } + else + { + break; + } + } + + capBaseAddr = (regVal & NV_PCIE_PARTITION_ID_CFG_SPACE_NEXT_PTR_MASK); + capBaseAddr = (capBaseAddr >> portUtilCountTrailingZeros32(NV_PCIE_PARTITION_ID_CFG_SPACE_NEXT_PTR_MASK)); + } + + *pCapBaseAddr = capBaseAddr; + + if ((capBaseAddr == 0) || + (regCount > NV_ARRAY_ELEMENTS(pcieCfgRegInfo))) + { + // + // This particular register is NOT part of the linklist; this is a valid scenario, + // however for the caller to differentiate return invalid_addr status + // + status = NV_ERR_INVALID_ADDRESS; + NV_PRINTF(LEVEL_ERROR, "Invalid address passed : 0x%x", hwDefAddr); + } + else + { + status = NV_OK; + } + + return status; +} + +/*! + * @brief Helper function to get the group address of + * PCIE Extended Config Space + * + * @param[in] pGpu GPU object pointer + * @param[in] hwDefAddr HW defined register address + * @param[out] pCapBaseAddr Group address + * + * Overview of linklist traversal: + * 1. Get the details that uniquely identify group of the hwDefAddr i.e, capId, targetVendorId, targetDvsecLen + * 2. Traverse the linked list to get the base address of the capability group + * a. Start from 0x100 base address, and go to next address until you find + * the cap_id you are looking for. + * b. First differentiating factor is cap_id, so extract that and if it is + * anything other than 0x23 then we have found the group address we are + * looking for, so exit. + * c. If cap_id is 0x23 - then we are in the DVSEC register space. + * ALL DVSEC register groups have the same 0x23 as the cap_id. + * d. To differentiate amongst the DVSEC groups, the differentiator is vendor_id. + * e. If there are multiple registers belonging to the same vendor, then they + * are differentiated based on DVSEC_LENGTH field. + * f. Once the right vendor & dvsec length is identified, we have found the + * group address we are looking for, so exit. + * + * @return NV_OK Success + * NV_ERR_INVALID_ADDRESS Unrecognised hwDefAddr + */ +static NV_STATUS +_gpuGetPcieExtCfgCapBaseAddr_GB100 +( + OBJGPU *pGpu, + NvU32 hwDefAddr, + NvU32 *pCapBaseAddr +) +{ + NV_STATUS status = NV_OK; + NvU32 capBaseAddr = NV_PCIE_PARTITION_ID_EXT_CFG_SPACE_BASE_ADDR; + NvU32 regVal = 0; + NvU32 regVal2 = 0; + NvU32 curCapId = 0; + NvU32 venIdAddr = 0; + NvU32 curVendorId = 0; + NvU32 curDvsecLen = 0; + NvU32 targetVendorId = 0; + NvU32 targetDvsecLen = 0; + NvU32 targetCapId = 0; + NvU32 domain = gpuGetDomain(pGpu); + NvU8 bus = gpuGetBus(pGpu); + NvU8 device = gpuGetDevice(pGpu); + NvU8 function = 0; + NvU8 regCount = 0; + + *pCapBaseAddr = 0; + + if (pGpu->hPci == NULL) + { + pGpu->hPci = osPciInitHandle(domain, bus, device, function, NULL, NULL); + } + + // 1. Get the details that uniquely identify group of the hwDefAddr i.e, capId, targetVendorId, targetDvsecLen + targetCapId = _gpuGetPcieExtCfgCapId_GB100(pGpu, hwDefAddr); + if (targetCapId == 0) + { + status = NV_ERR_NOT_SUPPORTED; + DBG_BREAKPOINT(); + return status; + } + + if (targetCapId == NV_PCIE_REG_CAP_ID_EXT_CFG_DVSEC_CAP) + { + _gpuGetPcieExtCfgDvsecInfo_GB100(pGpu, hwDefAddr, &targetVendorId, &targetDvsecLen); + } + + // 2. Traverse the linked list to get the base address of the capability group + while ((capBaseAddr != 0) && ((regCount++) <= NV_ARRAY_ELEMENTS(pcieExtCfgRegInfo))) + { + regVal = osPciReadDword(pGpu->hPci, capBaseAddr); + if (regVal == 0xFFFFFFFF) + { + NV_PRINTF(LEVEL_ERROR, "Register read failed : 0x%x\n", capBaseAddr); + status = NV_ERR_INVALID_STATE; + NV_ASSERT(0); + return status; + } + + // If target cap_id is found, we found the correct group address + curCapId = (regVal & NV_PCIE_PARTITION_ID_EXT_CFG_SPACE_CAP_ID_MASK); + if (curCapId == targetCapId) + { + // Check if cap_id is for DVSEC registers. Every DVSEC register has same cap_id of 0x23 + if (curCapId == NV_PCIE_REG_CAP_ID_EXT_CFG_DVSEC_CAP) + { + venIdAddr = (capBaseAddr + 0x4); + regVal2 = osPciReadDword(pGpu->hPci, venIdAddr); + if (regVal == 0xFFFFFFFF) + { + NV_PRINTF(LEVEL_ERROR, "Register read failed : 0x%x\n", venIdAddr); + status = NV_ERR_INVALID_STATE; + NV_ASSERT(0); + return status; + } + + // To differentiate amongst different DVSEC group of registers, check the vendorId + curVendorId = (regVal2 & NV_PCIE_PARTITION_ID_EXT_CFG_SPACE_VENDOR_ID_MASK); + if (curVendorId == targetVendorId) + { + // If correct vendorId is found, find the right group by checking dvsecLength field + curDvsecLen = (regVal2 & NV_PCIE_PARTITION_ID_EXT_CFG_SPACE_DVSEC_LEN_MASK); + curDvsecLen = (curDvsecLen >> portUtilCountTrailingZeros32(NV_PCIE_PARTITION_ID_EXT_CFG_SPACE_DVSEC_LEN_MASK)); + if (curDvsecLen == targetDvsecLen) + { + break; + } + } + } + else + { + break; + } + } + + // Going for the next loop, hence update capBaseAddr + capBaseAddr = (regVal & NV_PCIE_PARTITION_ID_EXT_CFG_SPACE_NEXT_PTR_MASK); + capBaseAddr = (capBaseAddr >> portUtilCountTrailingZeros32(NV_PCIE_PARTITION_ID_EXT_CFG_SPACE_NEXT_PTR_MASK)); + } + + *pCapBaseAddr = capBaseAddr; + + if ((capBaseAddr == 0) || + (regCount > NV_ARRAY_ELEMENTS(pcieExtCfgRegInfo))) + { + // + // This particular register is NOT part of the linklist; this is a valid scenario, + // however for the caller to differentiate return invalid_addr status + // + status = NV_ERR_INVALID_ADDRESS; + NV_PRINTF(LEVEL_ERROR, "Invalid address passed : 0x%x", hwDefAddr); + } + else + { + status = NV_OK; + } + + return status; +} + +/*! + * @brief Get the CAPABILITY_ID corresponding to hwDefAddr + * in PCI Config Space partition + * + * @param[in] pGpu GPU object pointer + * @param[in] hwDefAddr HW defined register address + * + * @return CAPABILITY_ID corresponding to the hwDefAddr + */ +static NvU32 +_gpuGetPcieCfgCapId_GB100 +( + OBJGPU *pGpu, + NvU32 hwDefAddr +) +{ + NvU32 i = 0; + + for (i = 0; i < NV_ARRAY_ELEMENTS(pcieCfgRegInfo); i++) + { + if ((hwDefAddr >= pcieCfgRegInfo[i].hwDefRegInfo.hwDefCapGrpFirstAddr) && + (hwDefAddr <= pcieCfgRegInfo[i].hwDefRegInfo.hwDefCapGrpLastAddr)) + { + return pcieCfgRegInfo[i].hwDefRegInfo.capId; + } + } + + NV_ASSERT_FAILED("Incorrect capability_id\n"); + + return 0; +} + +/*! + * @brief Get the CAPABILITY_ID corresponding to hwDefAddr + * in PCI Config Space partition + * + * @param[in] pGpu GPU object pointer + * @param[in] hwDefAddr HW defined register address + * + * @return CAPABILITY_ID corresponding to the hwDefAddr + */ +static NvU32 +_gpuGetPcieExtCfgCapId_GB100 +( + OBJGPU *pGpu, + NvU32 hwDefAddr +) +{ + NvU32 i = 0; + + for (i = 0; i < NV_ARRAY_ELEMENTS(pcieExtCfgRegInfo); i++) + { + if ((hwDefAddr >= pcieExtCfgRegInfo[i].hwDefRegInfo.hwDefCapGrpFirstAddr) && + (hwDefAddr <= pcieExtCfgRegInfo[i].hwDefRegInfo.hwDefCapGrpLastAddr)) + { + return pcieExtCfgRegInfo[i].hwDefRegInfo.capId; + } + } + + NV_ASSERT_FAILED("Incorrect capability_id\n"); + + return 0; +} + +/*! + * @brief Get the msgbox ID corresponding to hwDefAddr + * in PCI Config Space partition + * + * @param[in] pGpu GPU object pointer + * @param[in] hwDefAddr HW defined register address + * + * @return Msgbox ID for the hwDefAddr + */ +static NvU32 +_gpuGetPcieCfgMsgboxId_GB100 +( + OBJGPU *pGpu, + NvU32 hwDefAddr +) +{ + NvU32 msgboxId = 0; + NvU32 i = 0; + + for (i = 0; i < NV_ARRAY_ELEMENTS(pcieCfgRegInfo); i++) + { + if ((hwDefAddr >= pcieCfgRegInfo[i].hwDefRegInfo.hwDefCapGrpFirstAddr) && + (hwDefAddr <= pcieCfgRegInfo[i].hwDefRegInfo.hwDefCapGrpLastAddr)) + { + msgboxId = pcieCfgRegInfo[i].msgboxId; + break; + } + } + + return msgboxId; +} + +/*! + * @brief Get the DVSEC Info corresponding to a DVSEC register + * in Extended Config Space partition + * + * @param[in] pGpu GPU object pointer + * @param[in] hwDefAddr HW defined register address + * @param[out] pVenId Vendor ID of the DVSEC register + * @param[out] pDvsecLen DVSEC Length of the DVSEC register + */ +static void +_gpuGetPcieExtCfgDvsecInfo_GB100 +( + OBJGPU *pGpu, + NvU32 hwDefAddr, + NvU32 *pVenId, + NvU32 *pDvsecLen +) +{ + NvU32 i = 0; + + for (i = 0; i < NV_ARRAY_ELEMENTS(pcieExtCfgRegInfo); i++) + { + if ((hwDefAddr >= pcieExtCfgRegInfo[i].hwDefRegInfo.hwDefCapGrpFirstAddr) && + (hwDefAddr <= pcieExtCfgRegInfo[i].hwDefRegInfo.hwDefCapGrpLastAddr)) + { + *pVenId = pcieExtCfgRegInfo[i].vendorId; + *pDvsecLen = pcieExtCfgRegInfo[i].dvsecLen; + break; + } + } + + NV_ASSERT_FAILED("VendorId and Dvseclength fields not found\n"); +} + +/*! + * @brief Get the offset corresponding to hwDefAddr + * in Extended Config Space partition + * + * @param[in] pGpu GPU object pointer + * @param[in] hwDefAddr HW defined register address + * + * @return Offset of the register away from CAP_GRP base address + */ +static NvU32 +_gpuGetPcieCfgRegOffset_GB100 +( + OBJGPU *pGpu, + NvU32 hwDefAddr +) +{ + NvU32 offset = 0; + NvU32 i = 0; + + for (i = 0; i < NV_ARRAY_ELEMENTS(pcieCfgRegInfo); i++) + { + if ((hwDefAddr >= pcieCfgRegInfo[i].hwDefRegInfo.hwDefCapGrpFirstAddr) && + (hwDefAddr <= pcieCfgRegInfo[i].hwDefRegInfo.hwDefCapGrpLastAddr)) + { + offset = (hwDefAddr - pcieCfgRegInfo[i].hwDefRegInfo.hwDefCapGrpFirstAddr); + break; + } + } + + return offset; +} + +/*! + * @brief Get the offset corresponding to hwDefAddr + * in Extended Config Space partition + * + * @param[in] pGpu GPU object pointer + * @param[in] hwDefAddr HW defined register address + * + * @return Offset of the register away from CAP_GRP base address + */ +static NvU32 +_gpuGetPcieExtCfgRegOffset_GB100 +( + OBJGPU *pGpu, + NvU32 hwDefAddr +) +{ + NvU32 offset = 0; + NvU32 i = 0; + + for (i = 0; i < NV_ARRAY_ELEMENTS(pcieExtCfgRegInfo); i++) + { + if ((hwDefAddr >= pcieExtCfgRegInfo[i].hwDefRegInfo.hwDefCapGrpFirstAddr) && + (hwDefAddr <= pcieExtCfgRegInfo[i].hwDefRegInfo.hwDefCapGrpLastAddr)) + { + offset = (hwDefAddr - pcieExtCfgRegInfo[i].hwDefRegInfo.hwDefCapGrpFirstAddr); + break; + } + } + + return offset; +} + /*! * @brief Get GPU ID based on PCIE config reads. * Also determine other properties of the PCIE capabilities. @@ -329,7 +1033,7 @@ gpuHandleSecFault_GB100 } /*! - * Check if CC bit has been set in the scratch register + * @brief Check if CC bit has been set in the scratch register * * @param[in] pGpu GPU object pointer */ @@ -344,7 +1048,7 @@ gpuIsCCEnabledInHw_GB100 } /*! - * Check if dev mode bit has been set in the scratch register + * @brief Check if dev mode bit has been set in the scratch register * * @param[in] pGpu GPU object pointer */ @@ -358,3 +1062,23 @@ gpuIsDevModeEnabledInHw_GB100 return FLD_TEST_DRF(_PMC, _SCRATCH_RESET_2_CC, _DEV_ENABLED, _TRUE, val); } +/*! + * @brief Check if a parity error is pending for RISCV engine + * + * @param[in] pGpu GPU object pointer + */ +NvBool +gpuIsFlcnRiscvParityError_GB100 +( + OBJGPU *pGpu, + NvU32 errStatus +) +{ + return FLD_TEST_DRF(_PRISCV, _RISCV_FAULT_CONTAINMENT_SRCSTAT, _ITCM, _FAULTED, errStatus) || + FLD_TEST_DRF(_PRISCV, _RISCV_FAULT_CONTAINMENT_SRCSTAT, _DTCM, _FAULTED, errStatus) || + FLD_TEST_DRF(_PRISCV, _RISCV_FAULT_CONTAINMENT_SRCSTAT, _ICACHE, _FAULTED, errStatus) || + FLD_TEST_DRF(_PRISCV, _RISCV_FAULT_CONTAINMENT_SRCSTAT, _DCACHE, _FAULTED, errStatus) || + FLD_TEST_DRF(_PRISCV, _RISCV_FAULT_CONTAINMENT_SRCSTAT, _RVCORE, _FAULTED, errStatus) || + FLD_TEST_DRF(_PRISCV, _RISCV_FAULT_CONTAINMENT_SRCSTAT, _REG, _FAULTED, errStatus) || + FLD_TEST_DRF(_PRISCV, _RISCV_FAULT_CONTAINMENT_SRCSTAT, _MPURAM, _FAULTED, errStatus); +} diff --git a/src/nvidia/src/kernel/gpu/arch/hopper/kern_gpu_gh100.c b/src/nvidia/src/kernel/gpu/arch/hopper/kern_gpu_gh100.c index 54cd5b0b9a..788fd3a16f 100644 --- a/src/nvidia/src/kernel/gpu/arch/hopper/kern_gpu_gh100.c +++ b/src/nvidia/src/kernel/gpu/arch/hopper/kern_gpu_gh100.c @@ -60,7 +60,7 @@ gpuWriteBusConfigReg_GH100 NvU32 value ) { - return gpuWriteBusConfigCycle(pGpu, index, value); + return gpuWriteBusConfigCycle_HAL(pGpu, index, value); } /*! @@ -80,7 +80,7 @@ gpuReadBusConfigReg_GH100 NvU32 *pData ) { - return gpuReadBusConfigCycle(pGpu, index, pData); + return gpuReadBusConfigCycle_HAL(pGpu, index, pData); } /*! @@ -371,7 +371,6 @@ static const GPUCHILDPRESENT gpuChildrenPresent_GH100[] = GPU_CHILD_PRESENT(KernelRc, 1), GPU_CHILD_PRESENT(Intr, 1), GPU_CHILD_PRESENT(NvDebugDump, 1), - GPU_CHILD_PRESENT(OBJGPUMON, 1), GPU_CHILD_PRESENT(OBJSWENG, 1), GPU_CHILD_PRESENT(OBJUVM, 1), GPU_CHILD_PRESENT(KernelBif, 1), @@ -439,6 +438,26 @@ gpuDetermineSelfHostedMode_KERNEL_GH100 } } +/*! + * @brief Determine SoC type if GPU is configured in Self Hosted mode. + * + * @param[in] pGpu OBJGPU pointer + * + * @return SoC type + */ +NvU32 +gpuDetermineSelfHostedSocType_GH100 +( + OBJGPU *pGpu +) +{ + if (!gpuIsSelfHosted(pGpu)) + { + return NV0000_CTRL_SYSTEM_SH_SOC_TYPE_NA; + } + return NV0000_CTRL_SYSTEM_SH_SOC_TYPE_NV_GRACE; +} + /*! * @brief Determine if MIG can be supported. * In self hosted hopper, MIG can be supported only from specific @@ -504,9 +523,8 @@ gpuIsProtectedPcieEnabledInHw_GH100 OBJGPU *pGpu ) { - NvU32 val = GPU_REG_RD32(pGpu, NV_PGC6_AON_SECURE_SCRATCH_GROUP_20_CC); - return FLD_TEST_DRF(_PGC6, _AON_SECURE_SCRATCH_GROUP_20_CC, _MULTI_GPU_MODE, - _PROTECTED_PCIE, val); + // Bug 4870925: Disabled PPCIE + return NV_FALSE; } /*! diff --git a/src/nvidia/src/kernel/gpu/arch/maxwell/kern_gpu_gm107.c b/src/nvidia/src/kernel/gpu/arch/maxwell/kern_gpu_gm107.c index 82ccab9edd..fca0917717 100644 --- a/src/nvidia/src/kernel/gpu/arch/maxwell/kern_gpu_gm107.c +++ b/src/nvidia/src/kernel/gpu/arch/maxwell/kern_gpu_gm107.c @@ -65,6 +65,95 @@ gpuFuseSupportsDisplay_GM107 return GPU_FLD_TEST_DRF_DEF(pGpu, _FUSE, _STATUS_OPT_DISPLAY, _DATA, _ENABLE); } +/*! + * @brief Read the pcie spec registers using config cycles + * + * @param[in] pGpu GPU object pointer + * @param[in] hwDefAddr HW defined register address + * @param[out] pData Value of the register + * + * @returns NV_OK on success + */ +NV_STATUS +gpuReadBusConfigCycle_GM107 +( + OBJGPU *pGpu, + NvU32 hwDefAddr, + NvU32 *pData +) +{ + NvU32 domain = gpuGetDomain(pGpu); + NvU8 bus = gpuGetBus(pGpu); + NvU8 device = gpuGetDevice(pGpu); + NvU8 function = 0; + NvBool bIsCCFeatureEnabled = NV_FALSE; + NV_STATUS status = NV_OK; + + status = gpuConfigAccessSanityCheck_HAL(pGpu); + if (status != NV_OK) + { + return status; + } + + // Todo: Reorganize this sanity check and handle for later chips + bIsCCFeatureEnabled = gpuIsCCFeatureEnabled(pGpu); + + if (IS_PASSTHRU(pGpu) && !bIsCCFeatureEnabled) + { + gpuReadPassThruConfigReg_HAL(pGpu, hwDefAddr, pData); + } + else + { + if (pGpu->hPci == NULL) + { + pGpu->hPci = osPciInitHandle(domain, bus, device, function, NULL, NULL); + } + + *pData = osPciReadDword(pGpu->hPci, hwDefAddr); + } + + return NV_OK; +} + +/*! + * @brief Write to pcie spec registers using config cycles + * + * @param[in] pGpu GPU object pointer + * @param[in] hwDefAddr HW defined register address + * @param[in] value Write this value to the register + * + * @returns NV_OK on success + */ +NV_STATUS +gpuWriteBusConfigCycle_GM107 +( + OBJGPU *pGpu, + NvU32 hwDefAddr, + NvU32 value +) +{ + NvU32 domain = gpuGetDomain(pGpu); + NvU8 bus = gpuGetBus(pGpu); + NvU8 device = gpuGetDevice(pGpu); + NvU8 function = 0; + NV_STATUS status = NV_OK; + + status = gpuConfigAccessSanityCheck_HAL(pGpu); + if (status != NV_OK) + { + return status; + } + + if (pGpu->hPci == NULL) + { + pGpu->hPci = osPciInitHandle(domain, bus, device, function, NULL, NULL); + } + + osPciWriteDword(pGpu->hPci, hwDefAddr, value); + + return NV_OK; +} + /*! * @brief gpuReadBusConfigRegEx_GM107 * @@ -487,7 +576,6 @@ static const GPUCHILDPRESENT gpuChildrenPresent_GM200[] = GPU_CHILD_PRESENT(KernelRc, 1), GPU_CHILD_PRESENT(Intr, 1), GPU_CHILD_PRESENT(NvDebugDump, 1), - GPU_CHILD_PRESENT(OBJGPUMON, 1), GPU_CHILD_PRESENT(OBJSWENG, 1), GPU_CHILD_PRESENT(KernelBif, 1), GPU_CHILD_PRESENT(KernelBus, 1), diff --git a/src/nvidia/src/kernel/gpu/arch/pascal/kern_gpu_gp100.c b/src/nvidia/src/kernel/gpu/arch/pascal/kern_gpu_gp100.c index 36ccd128c3..410a253d87 100644 --- a/src/nvidia/src/kernel/gpu/arch/pascal/kern_gpu_gp100.c +++ b/src/nvidia/src/kernel/gpu/arch/pascal/kern_gpu_gp100.c @@ -28,6 +28,7 @@ #include "gpu/gpu_child_class_defs.h" #include "gpu/nvlink/kernel_nvlink.h" #include "gpu_mgr/gpu_mgr_sli.h" +#include "pascal/gp100/dev_bus_addendum.h" /*! * @brief checks for NvLink connections between the GPUs specified in the gpuMaskArg, @@ -134,3 +135,54 @@ gpuDetectNvlinkLinkFromGpus_GP100 pGpuLoop = gpumgrGetNextGpu(gpuMask, &gpuIndex); } // while (pGpu) } + +/*! + * @brief A bit is reserved in scratch 30 to indicate GPU Reset is pending. + * This is useful for CSPs monitoring whether a GPU needs to be reset through out of band. + * This function sets the bit to the requested value, indicating that a reset is pending or clearing the status. + * + * @param[in] pGpu OBJGPU pointer + * @param[in] bResetRequired The value to set + * + * @returns NV_OK if successful + */ +NV_STATUS +gpuSetResetScratchBit_GP100 +( + OBJGPU *pGpu, + NvBool bResetRequired +) +{ + NvU32 scratchRegVal = gpuReadPBusScratch_HAL(pGpu, NV_PBUS_SW_RESET_BITS_SCRATCH_REG); + + scratchRegVal = bResetRequired ? + FLD_SET_DRF(_PBUS, _SW_SCRATCH30, _GPU_RESET_REQUIRED, _ON, scratchRegVal) : + FLD_SET_DRF(_PBUS, _SW_SCRATCH30, _GPU_RESET_REQUIRED, _OFF, scratchRegVal); + + gpuWritePBusScratch_HAL(pGpu, NV_PBUS_SW_RESET_BITS_SCRATCH_REG, scratchRegVal); + + return NV_OK; +} + +/*! + * @brief A bit is reserved in scratch 30 to indicate GPU Reset is pending. + * This is useful for CSPs monitoring whether a GPU needs to be reset through out of band. + * This function reads the value of the bit. + * + * @param[in] pGpu OBJGPU pointer + * @param[out] pbResetRequired The value of the scratch bit + * + * @returns NV_OK if successful + */ +NV_STATUS +gpuGetResetScratchBit_GP100 +( + OBJGPU *pGpu, + NvBool *pbResetRequired +) +{ + NvU32 scratchRegVal = gpuReadPBusScratch_HAL(pGpu, NV_PBUS_SW_RESET_BITS_SCRATCH_REG); + + *pbResetRequired = FLD_TEST_DRF(_PBUS, _SW_SCRATCH30, _GPU_RESET_REQUIRED, _ON, scratchRegVal); + return NV_OK; +} diff --git a/src/nvidia/src/kernel/gpu/arch/turing/kern_gpu_tu102.c b/src/nvidia/src/kernel/gpu/arch/turing/kern_gpu_tu102.c index 679c107e00..88be50e127 100644 --- a/src/nvidia/src/kernel/gpu/arch/turing/kern_gpu_tu102.c +++ b/src/nvidia/src/kernel/gpu/arch/turing/kern_gpu_tu102.c @@ -32,6 +32,7 @@ #include "gpu/gsp/kernel_gsp.h" #include "published/turing/tu102/dev_vm.h" +#include "published/turing/tu102/dev_bus.h" #include "published/turing/tu102/hwproject.h" #include "published/turing/tu102/dev_nv_xve.h" #include "published/turing/tu102/dev_nv_xve3g_vf.h" @@ -133,7 +134,6 @@ static const GPUCHILDPRESENT gpuChildrenPresent_TU102[] = GPU_CHILD_PRESENT(KernelRc, 1), GPU_CHILD_PRESENT(Intr, 1), GPU_CHILD_PRESENT(NvDebugDump, 1), - GPU_CHILD_PRESENT(OBJGPUMON, 1), GPU_CHILD_PRESENT(OBJSWENG, 1), GPU_CHILD_PRESENT(OBJUVM, 1), GPU_CHILD_PRESENT(KernelBif, 1), @@ -164,7 +164,6 @@ static const GPUCHILDPRESENT gpuChildrenPresent_TU104[] = GPU_CHILD_PRESENT(KernelRc, 1), GPU_CHILD_PRESENT(Intr, 1), GPU_CHILD_PRESENT(NvDebugDump, 1), - GPU_CHILD_PRESENT(OBJGPUMON, 1), GPU_CHILD_PRESENT(OBJSWENG, 1), GPU_CHILD_PRESENT(OBJUVM, 1), GPU_CHILD_PRESENT(KernelBif, 1), @@ -195,7 +194,6 @@ static const GPUCHILDPRESENT gpuChildrenPresent_TU106[] = GPU_CHILD_PRESENT(KernelRc, 1), GPU_CHILD_PRESENT(Intr, 1), GPU_CHILD_PRESENT(NvDebugDump, 1), - GPU_CHILD_PRESENT(OBJGPUMON, 1), GPU_CHILD_PRESENT(OBJSWENG, 1), GPU_CHILD_PRESENT(OBJUVM, 1), GPU_CHILD_PRESENT(KernelBif, 1), @@ -558,3 +556,32 @@ NvBool gpuIsMsixAllowed_TU102 return FLD_TEST_DRF(_XVE, _PRIV_MISC_1, _CYA_HIDE_MSIX_CAP, _FALSE, regVal); } + +/*! + * @brief Reads Pbus SW Scratch register + * + * @param[in] pGpu OBJGPU pointer + * @param[in] idx Index of Vbios Scratch Register + * + * @return NvU32 Value stored in Register + */ +NvU32 +gpuReadPBusScratch_TU102(OBJGPU *pGpu, NvU8 idx) +{ + return GPU_REG_RD32(pGpu, NV_PBUS_SW_SCRATCH(idx)); +} + +/*! + * @brief Writes Pbus SW Scratch register + * + * @param[in] pGpu OBJGPU pointer + * @param[in] idx Index of Vbios Scratch Register + * @param[in] data Value to write in Register + * + * @return Void + */ +void +gpuWritePBusScratch_TU102(OBJGPU *pGpu, NvU8 idx, NvU32 data) +{ + GPU_REG_WR32(pGpu, NV_PBUS_SW_SCRATCH(idx), data); +} diff --git a/src/nvidia/src/kernel/gpu/bif/arch/ampere/kernel_bif_ga100.c b/src/nvidia/src/kernel/gpu/bif/arch/ampere/kernel_bif_ga100.c index b1249adc46..cd3e6b1b7e 100644 --- a/src/nvidia/src/kernel/gpu/bif/arch/ampere/kernel_bif_ga100.c +++ b/src/nvidia/src/kernel/gpu/bif/arch/ampere/kernel_bif_ga100.c @@ -550,6 +550,26 @@ kbifGetValidDeviceEnginesToReset_GA100 return regVal; } +/*! + * @brief Get the migration bandwidth + * + * @param[out] pBandwidth Migration bandwidth + * + * @returns NV_STATUS + */ +NV_STATUS +kbifGetMigrationBandwidth_GA100 +( + OBJGPU *pGpu, + KernelBif *pKernelBif, + NvU32 *pBandwidth +) +{ + // Migration bandwidth in MegaBytes/second + *pBandwidth = 500; + + return NV_OK; +} /*! * @brief Reset the chip. diff --git a/src/nvidia/src/kernel/gpu/bif/arch/hopper/kernel_bif_gh100.c b/src/nvidia/src/kernel/gpu/bif/arch/hopper/kernel_bif_gh100.c index fb95e8ca52..76d1cb9864 100644 --- a/src/nvidia/src/kernel/gpu/bif/arch/hopper/kernel_bif_gh100.c +++ b/src/nvidia/src/kernel/gpu/bif/arch/hopper/kernel_bif_gh100.c @@ -68,6 +68,12 @@ kbifIsMSIEnabledInHW_GH100 { NvU32 data32; + if (IS_VIRTUAL(pGpu)) + { + // SR-IOV guests only support MSI-X + return !IS_VIRTUAL_WITH_SRIOV(pGpu); + } + if (GPU_BUS_CFG_CYCLE_RD32(pGpu, NV_EP_PCFG_GPU_MSI_64_HEADER, &data32) != NV_OK) { diff --git a/src/nvidia/src/kernel/gpu/bif/arch/maxwell/kernel_bif_gm107.c b/src/nvidia/src/kernel/gpu/bif/arch/maxwell/kernel_bif_gm107.c index 84c95c415c..1098e3ff24 100644 --- a/src/nvidia/src/kernel/gpu/bif/arch/maxwell/kernel_bif_gm107.c +++ b/src/nvidia/src/kernel/gpu/bif/arch/maxwell/kernel_bif_gm107.c @@ -28,6 +28,7 @@ #include "gpu/bus/kern_bus.h" #include "platform/chipset/chipset.h" #include "nvdevid.h" +#include #include "nvmisc.h" #include "kernel/gpu/mc/kernel_mc.h" #include "kernel/gpu/nvlink/kernel_nvlink.h" @@ -53,6 +54,9 @@ #define NV_XVR_VEND_XP1_IGNORE_L0S_EN 0x00000001 /* RW--V */ #endif +// Factor by which vGPU migration API bandwidth should be derated +#define VGPU_MIGRATION_API_DERATE_FACTOR 5 + // XVE register map for PCIe config space static const NvU32 xveRegMapValid[] = NV_PCFG_XVE_REGISTER_VALID_MAP; static const NvU32 xveRegMapWrite[] = NV_PCFG_XVE_REGISTER_WR_MAP; @@ -162,6 +166,12 @@ kbifIsMSIEnabledInHW_GM107 ) { NvU32 data32; + + if (IS_VIRTUAL_WITH_SRIOV(pGpu)) + { + return NV_FALSE; + } + if (NV_OK != GPU_BUS_CFG_RD32(pGpu, NV_XVE_MSI_CTRL, &data32)) { NV_PRINTF(LEVEL_ERROR, "unable to read NV_XVE_MSI_CTRL\n"); @@ -1365,6 +1375,70 @@ kbifInit_GM107 return NV_OK; } +/*! + * @brief Get the migration bandwidth + * + * @param[out] pBandwidth Migration bandwidth + * + * @returns NV_STATUS + */ +NV_STATUS +kbifGetMigrationBandwidth_GM107 +( + OBJGPU *pGpu, + KernelBif *pKernelBif, + NvU32 *pBandwidth +) +{ + NV_STATUS rmStatus = NV_OK; + NV2080_CTRL_BUS_INFO busInfo = {0}; + + NvU32 pcieLinkRate = 0; + NvU32 lanes = 0; + NvU32 pciLinkMaxSpeed = 0; + NvU32 pciLinkGenInfo = 0; + + busInfo.index = NV2080_CTRL_BUS_INFO_INDEX_PCIE_GEN_INFO; + busInfo.data = 0; + + if (IS_GSP_CLIENT(pGpu)) + { + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, kbusSendBusInfo(pGpu, GPU_GET_KERNEL_BUS(pGpu), &busInfo)); + } + else + { + if (kbifIsPciBusFamily(pKernelBif)) + { + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, kbifControlGetPCIEInfo(pGpu, pKernelBif, &busInfo)); + } + else + { + return NV_ERR_NOT_SUPPORTED; + } + } + + pciLinkGenInfo = DRF_VAL(2080, _CTRL_BUS, _INFO_PCIE_LINK_CAP_GEN, busInfo.data); + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, kbifGetPciLinkMaxSpeedByPciGenInfo(pGpu, pKernelBif, pciLinkGenInfo, &pciLinkMaxSpeed)); + + busInfo.index = NV2080_CTRL_BUS_INFO_INDEX_PCIE_GPU_LINK_CTRL_STATUS; + busInfo.data = 0; + + if (kbifIsPciBusFamily(pKernelBif)) + { + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, kbifControlGetPCIEInfo(pGpu, pKernelBif, &busInfo)); + } + else + { + return NV_ERR_NOT_SUPPORTED; + } + + lanes = DRF_VAL(2080, _CTRL_BUS, _INFO_PCIE_LINK_CTRL_STATUS_LINK_WIDTH, busInfo.data); + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, calculatePCIELinkRateMBps(lanes, pciLinkMaxSpeed, &pcieLinkRate)); + *pBandwidth = (pcieLinkRate / VGPU_MIGRATION_API_DERATE_FACTOR); + + return rmStatus; +} + /*! * @brief Destructor * diff --git a/src/nvidia/src/kernel/gpu/bif/arch/maxwell/kernel_bif_gm200.c b/src/nvidia/src/kernel/gpu/bif/arch/maxwell/kernel_bif_gm200.c index 4f1d54ee4b..75ea59d693 100644 --- a/src/nvidia/src/kernel/gpu/bif/arch/maxwell/kernel_bif_gm200.c +++ b/src/nvidia/src/kernel/gpu/bif/arch/maxwell/kernel_bif_gm200.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2013-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2013-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/src/kernel/gpu/bif/kernel_bif.c b/src/nvidia/src/kernel/gpu/bif/kernel_bif.c index 744d0fff0a..37f06a1abd 100644 --- a/src/nvidia/src/kernel/gpu/bif/kernel_bif.c +++ b/src/nvidia/src/kernel/gpu/bif/kernel_bif.c @@ -1357,6 +1357,62 @@ kbifPollDeviceOnBus_IMPL return NV_OK; } +/*! + * @brief To get PCI link max spead from PCI link Gen info + * + * @param[in] pGpu GPU object pointer + * @param[in] pKernelBif Kernel BIF object pointer + * @param[in] pciLinkGenInfo PCI link Gen info + * @param[in] pciLinkMaxSpeed pointer to PCI link max spead + + * @returns NV_OK + * @returns NV_ERR_INVALID_STATE + */ +NV_STATUS +kbifGetPciLinkMaxSpeedByPciGenInfo_IMPL +( + OBJGPU *pGpu, + KernelBif *pKernelBif, + NvU32 pciLinkGenInfo, + NvU32 *pciLinkMaxSpeed +) +{ + NV_STATUS rmStatus = NV_OK; + + switch (pciLinkGenInfo) + { + case NV2080_CTRL_BUS_INFO_PCIE_LINK_CAP_GEN_GEN1: + *pciLinkMaxSpeed = NV2080_CTRL_BUS_INFO_PCIE_LINK_CAP_MAX_SPEED_2500MBPS; + break; + + case NV2080_CTRL_BUS_INFO_PCIE_LINK_CAP_GEN_GEN2: + *pciLinkMaxSpeed = NV2080_CTRL_BUS_INFO_PCIE_LINK_CAP_MAX_SPEED_5000MBPS; + break; + + case NV2080_CTRL_BUS_INFO_PCIE_LINK_CAP_GEN_GEN3: + *pciLinkMaxSpeed = NV2080_CTRL_BUS_INFO_PCIE_LINK_CAP_MAX_SPEED_8000MBPS; + break; + + case NV2080_CTRL_BUS_INFO_PCIE_LINK_CAP_GEN_GEN4: + *pciLinkMaxSpeed = NV2080_CTRL_BUS_INFO_PCIE_LINK_CAP_MAX_SPEED_16000MBPS; + break; + + case NV2080_CTRL_BUS_INFO_PCIE_LINK_CAP_GEN_GEN5: + *pciLinkMaxSpeed = NV2080_CTRL_BUS_INFO_PCIE_LINK_CAP_MAX_SPEED_32000MBPS; + break; + + case NV2080_CTRL_BUS_INFO_PCIE_LINK_CAP_GEN_GEN6: + *pciLinkMaxSpeed = NV2080_CTRL_BUS_INFO_PCIE_LINK_CAP_MAX_SPEED_64000MBPS; + break; + + default: + rmStatus = NV_ERR_INVALID_STATE; + NV_PRINTF(LEVEL_ERROR, "Unknown PCIe Gen Info\n"); + } + + return rmStatus; +} + NV_STATUS kbifResetFromTimeoutFullChip_IMPL ( diff --git a/src/nvidia/src/kernel/gpu/bus/arch/blackwell/kern_bus_gb100.c b/src/nvidia/src/kernel/gpu/bus/arch/blackwell/kern_bus_gb100.c index 13f2c3779e..0bdf7cbdca 100644 --- a/src/nvidia/src/kernel/gpu/bus/arch/blackwell/kern_bus_gb100.c +++ b/src/nvidia/src/kernel/gpu/bus/arch/blackwell/kern_bus_gb100.c @@ -180,3 +180,34 @@ kbusRestoreBAR1ResizeSize_WAR_BUG_3249028_GB100 return NV_OK; } + +/* + * @brief Get GPU PF BAR1 SPA from physical RM + * + * BAR1 SPA is required inside passthrough VM to provide + * BAR1 mapping of FB for DirectNIC DMA. + * + * @param[in] pGpu OBJGPU pointer + * @param[in] pKernelBus KernelBus pointer + * @param[out] pSpaValue SPA of GPU PF BAR1 + * + * @returns NV_OK on success. + */ +NV_STATUS +kbusGetPFBar1Spa_GB100 +( + OBJGPU *pGpu, + KernelBus *pKernelBus, + NvU64 *pSpaValue +) +{ + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + NV2080_CTRL_INTERNAL_GPU_GET_PF_BAR1_SPA_PARAMS params = {0}; + + NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, pGpu->hInternalClient, pGpu->hInternalSubdevice, + NV2080_CTRL_CMD_INTERNAL_GPU_GET_PF_BAR1_SPA, ¶ms, sizeof(params))); + + *pSpaValue = params.spaValue; + + return NV_OK; +} diff --git a/src/nvidia/src/kernel/gpu/bus/arch/hopper/kern_bus_gh100.c b/src/nvidia/src/kernel/gpu/bus/arch/hopper/kern_bus_gh100.c index feab712474..18528e63c9 100644 --- a/src/nvidia/src/kernel/gpu/bus/arch/hopper/kern_bus_gh100.c +++ b/src/nvidia/src/kernel/gpu/bus/arch/hopper/kern_bus_gh100.c @@ -1328,48 +1328,6 @@ kbusUnmapCoherentCpuMapping_GH100 return; } -/** - * @brief Check BAR1 P2P capability - * - * @param pGpu - * @param pKernelBus - * @param gfid - * - * @return NV_TRUE if it is BAR1 P2P capable - */ -NvBool -kbusIsBar1P2PCapable_GH100 -( - OBJGPU *pGpu, - KernelBus *pKernelBus, - NvU32 gfid -) -{ - NvU64 bar1Size = kbusGetPciBarSize(pKernelBus, 1); - KernelBif *pKernelBif = GPU_GET_KERNEL_BIF(pGpu); - MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); - NvU64 fbSize = pMemoryManager->Ram.fbUsableMemSize; - OBJEHEAP *pVASpaceHeap = vaspaceGetHeap(pKernelBus->bar1[gfid].pVAS); - NvU64 bar1VASize = pVASpaceHeap->rangeHi + 1; - - if ((fbSize == 0) || (bar1Size == 0)) - return NV_FALSE; - - if (pKernelBif->forceP2PType != NV_REG_STR_RM_FORCE_P2P_TYPE_BAR1P2P) - return NV_FALSE; - - // - // GPU BAR1 supports the SYSMEM mapping for the bar1 doorbell, RM needs - // to make sure that BAR1 VA has 128KB space left for such cases after all - // FB statically mapped in BAR1. Bug 3869651 #14. - // - if ((bar1VASize < (32 * RM_PAGE_SIZE)) || - ((bar1VASize - (32 * RM_PAGE_SIZE)) < RM_ALIGN_UP(fbSize, RM_PAGE_SIZE_2M))) - return NV_FALSE; - - return NV_TRUE; -} - /*! * @brief check if it can support BAR1 P2P between the specified GPUs * At the point this function is called, the system do not support C2C and @@ -2006,326 +1964,6 @@ kbusRemoveP2PMappingForC2C_GH100 return status; } -/*! - * @brief Setup static Bar1 mapping. - * - * @param[in] pGpu GPU pointer - * @param[in] pKernelBus Kernel bus pointer - * @param[in] gfid The GFID - * - * @returns NV_OK on success, or rm_status from called functions on failure. - */ -NV_STATUS -kbusEnableStaticBar1Mapping_GH100 -( - OBJGPU *pGpu, - KernelBus *pKernelBus, - NvU32 gfid -) -{ - MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); - MEMORY_DESCRIPTOR *pMemDesc = NULL; - MEMORY_DESCRIPTOR *pDmaMemDesc = NULL; - NV_STATUS status = NV_OK; - NvU64 bar1Offset = 0; - NvU64 bar1MapSize; - NvU64 bar1BusAddr; - - // align to 2MB page size - bar1MapSize = RM_ALIGN_UP(pMemoryManager->Ram.fbUsableMemSize, - RM_PAGE_SIZE_2M); - - // - // The static mapping is not backed by an allocated physical FB. - // Here RM describes the memory for the static mapping. - // - NV_ASSERT_OK_OR_RETURN(memdescCreate(&pMemDesc, pGpu, bar1MapSize, 0, - NV_MEMORY_CONTIGUOUS, ADDR_FBMEM, - NV_MEMORY_UNCACHED, MEMDESC_FLAGS_NONE)); - - memdescDescribe(pMemDesc, ADDR_FBMEM, 0, bar1MapSize); - - // Set to use RM_PAGE_SIZE_HUGE, 2MB - memdescSetPageSize(pMemDesc, AT_GPU, RM_PAGE_SIZE_HUGE); - - // Setup GMK PTE type for this memory - memdescSetPteKind(pMemDesc, NV_MMU_PTE_KIND_GENERIC_MEMORY); - - // Deploy the static mapping. - NV_ASSERT_OK_OR_GOTO(status, - kbusMapFbApertureSingle(pGpu, pKernelBus, pMemDesc, 0, - &bar1Offset, &bar1MapSize, - BUS_MAP_FB_FLAGS_MAP_UNICAST | - BUS_MAP_FB_FLAGS_MAP_OFFSET_FIXED, - NV01_NULL_OBJECT), - cleanup_mem); - - if(bar1Offset != 0) - { - // For static bar1 mapping, it should always be 0. - status = NV_ERR_INVALID_STATE; - NV_ASSERT(0); - goto cleanup_bus_map; - } - - // Get the system physical address of the Bar1 - bar1BusAddr = gpumgrGetGpuPhysFbAddr(pGpu); - - // - // Create a memory descriptor to describe a SYSMEM target of the GPU - // BAR1 region. This memDesc will be used for P2P DMA related mapping. - // - NV_ASSERT_OK_OR_GOTO(status, - memdescCreate(&pDmaMemDesc, - pGpu, - bar1MapSize, - 0, - NV_MEMORY_CONTIGUOUS, - ADDR_SYSMEM, - NV_MEMORY_UNCACHED, - MEMDESC_FLAGS_NONE), - cleanup_bus_map); - - memdescDescribe(pDmaMemDesc, ADDR_SYSMEM, bar1BusAddr, bar1MapSize); - - pKernelBus->bar1[gfid].bStaticBar1Enabled = NV_TRUE; - pKernelBus->bar1[gfid].staticBar1.pVidMemDesc = pMemDesc; - pKernelBus->bar1[gfid].staticBar1.pDmaMemDesc = pDmaMemDesc; - pKernelBus->bar1[gfid].staticBar1.size = bar1MapSize; - - NV_PRINTF(LEVEL_INFO, "Static bar1 mapped offset 0x%llx size 0x%llx\n", - bar1Offset, bar1MapSize); - - return NV_OK; - -cleanup_bus_map: - NV_ASSERT_OK(kbusUnmapFbApertureSingle(pGpu, pKernelBus, - pMemDesc, bar1Offset, bar1MapSize, - BUS_MAP_FB_FLAGS_MAP_UNICAST | - BUS_MAP_FB_FLAGS_MAP_OFFSET_FIXED)); - -cleanup_mem: - NV_PRINTF(LEVEL_ERROR, "Failed to create the static bar1 mapping offset" - "0x%llx size 0x%llx\n", bar1Offset, bar1MapSize); - - pKernelBus->bar1[gfid].bStaticBar1Enabled = NV_FALSE; - pKernelBus->bar1[gfid].staticBar1.pVidMemDesc = NULL; - pKernelBus->bar1[gfid].staticBar1.pDmaMemDesc = NULL; - - memdescDestroy(pDmaMemDesc); - memdescDestroy(pMemDesc); - - return status; -} - -/*! - * @brief tear down static Bar1 mapping. - * - * @param[in] pGpu GPU pointer - * @param[in] pKernelBus Kernel bus pointer - * @param[in] gfid The GFID - * - * @returns NV_OK on success, or rm_status from called functions on failure. - */ -void -kbusDisableStaticBar1Mapping_GH100 -( - OBJGPU *pGpu, - KernelBus *pKernelBus, - NvU32 gfid -) -{ - if (!pKernelBus->bar1[gfid].bStaticBar1Enabled) - return; - - pKernelBus->bar1[gfid].bStaticBar1Enabled = NV_FALSE; - - NV_ASSERT_OK( - kbusUnmapFbApertureSingle(pGpu, pKernelBus, - pKernelBus->bar1[gfid].staticBar1.pVidMemDesc, - 0, - pKernelBus->bar1[gfid].staticBar1.size, - BUS_MAP_FB_FLAGS_MAP_UNICAST | - BUS_MAP_FB_FLAGS_MAP_OFFSET_FIXED)); - - memdescDestroy(pKernelBus->bar1[gfid].staticBar1.pVidMemDesc); - pKernelBus->bar1[gfid].staticBar1.pVidMemDesc = NULL; - - memdescDestroy(pKernelBus->bar1[gfid].staticBar1.pDmaMemDesc); - pKernelBus->bar1[gfid].staticBar1.pDmaMemDesc = NULL; -} - -/*! - * @brief To update the StaticBar1 PTE kind for the specified memory. - * - * The staticbar1 only support GMK and the compressed kind PTE. - * By default, the bar1 is statically mapped with GMK at boot when the - * static bar1 is enabled. - * - * When to map a uncompressed kind memory, RM just return the static - * bar1 address which is mapped to the specified memory. - * - * When to map a compressed kind memory, RM must call this function to - * change the static mapped bar1 range to the specified memory from GMK - * to the compressed kind. And RM needs to call this function to change - * it back to GMK from the compressed kind after this mapping is - * released. - * - * @param[in] pGpu GPU pointer - * @param[in] pKernelBus Kernel bus pointer - * @param[in] pMemDesc The memory to update - * @param[in] offset The offset of the memory to update - * @param[in] length The length of the memory to update - * @param[in] bRelease Call to release the mapping - * @param[in] gfid The GFID - * - * return NV_OK on success - */ -NV_STATUS -kbusUpdateStaticBar1VAMapping_GH100 -( - OBJGPU *pGpu, - KernelBus *pKernelBus, - MEMORY_DESCRIPTOR *pMemDesc, - NvU64 offset, - NvU64 length, - NvBool bRelease -) -{ - NV_STATUS status = NV_OK; - VirtMemAllocator *pDma = GPU_GET_DMA(pGpu); - MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); - OBJVASPACE *pVAS; - NvU32 kind; - NvU64 vaLo; - NvU64 vaHi; - NvU64 physAddr; - NvU64 mapLength; - NvU64 pageSize; - DMA_PAGE_ARRAY pageArray = {0}; - COMPR_INFO comprInfo = {0}; - NvU32 gfid; - - NV_ASSERT_OR_RETURN(vgpuGetCallingContextGfid(pGpu, &gfid) == NV_OK, - NV_ERR_INVALID_STATE); - - NV_ASSERT_OR_RETURN(pMemDesc != NULL, NV_ERR_INVALID_ARGUMENT); - - NV_ASSERT_OR_RETURN(memdescGetAddressSpace(pMemDesc) == ADDR_FBMEM, - NV_ERR_INVALID_ARGUMENT); - - // It only support contiguous memory - NV_ASSERT_OR_RETURN(memdescGetPteArraySize(pMemDesc, AT_GPU) == 1, - NV_ERR_INVALID_ARGUMENT); - - pVAS = pKernelBus->bar1[gfid].pVAS; - - pageSize = memdescGetPageSize(pMemDesc, VAS_ADDRESS_TRANSLATION(pVAS)); - - NV_ASSERT_OK_OR_RETURN(memmgrGetKindComprFromMemDesc(pMemoryManager, - pMemDesc, 0, &kind, &comprInfo)); - - // Static BAR1 mapping only support >=2MB page size for compressed memory - NV_CHECK_OR_RETURN(LEVEL_ERROR, - memmgrIsKind_HAL(pMemoryManager, FB_IS_KIND_COMPRESSIBLE, kind) && - (pageSize >= RM_PAGE_SIZE_HUGE), - NV_ERR_INVALID_STATE); - - if (bRelease) - { - // update the PTE kind to be the uncompressed kind - comprInfo.kind = memmgrGetUncompressedKind_HAL(pGpu, pMemoryManager, - kind, NV_FALSE); - } - - // Under static BAR1 mapping, BAR1 VA equal to fb physAddr - physAddr = memdescGetPhysAddr(pMemDesc, - VAS_ADDRESS_TRANSLATION(pVAS), - offset); - vaLo = RM_ALIGN_DOWN(physAddr, pageSize); - mapLength = RM_ALIGN_UP(vaLo + length, pageSize); - vaHi = vaLo + mapLength - 1; - - pageArray.count = 1; - pageArray.pData = &physAddr; - - status = dmaUpdateVASpace_HAL(pGpu, pDma, pVAS, - pMemDesc, NULL, - vaLo, vaHi, - DMA_UPDATE_VASPACE_FLAGS_UPDATE_KIND | - DMA_UPDATE_VASPACE_FLAGS_UPDATE_COMPR, - &pageArray, 0, - &comprInfo, 0, - NV_MMU_VER3_PTE_VALID_TRUE, - NV_MMU_VER3_PTE_APERTURE_VIDEO_MEMORY, - BUS_INVALID_PEER, - NVLINK_INVALID_FABRIC_ADDR, - DMA_TLB_INVALIDATE, - NV_FALSE, - pageSize); - - if (status != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, - "Failed to update static bar1 VA space, error 0x%x.\n", - status); - } - - return status; -} - -/*! - * @brief To get FB aperture for the specified memory under the static mapping. - * - * @param[in] pGpu GPU pointer - * @param[in] pKernelBus Kernel bus pointer - * @param[in] pMemDesc The memory to update - * @param[in] offset The offset of the memory to map - * @param[out] pAperOffset The Fb Aperture(BAR1) offset of the mapped vidmem - * @param[in] pLength The size of vidmem to map - * @param[in] gfid The GFID - * - * return NV_OK on success - */ -NV_STATUS -kbusGetStaticFbAperture_GH100 -( - OBJGPU *pGpu, - KernelBus *pKernelBus, - MEMORY_DESCRIPTOR *pMemDesc, - NvU64 offset, - NvU64 *pAperOffset, - NvU64 *pLength, - NvU32 gfid -) -{ - NvU64 physAddr; - - // It only support contiguous memory - NV_ASSERT_OR_RETURN(memdescGetPteArraySize(pMemDesc, AT_GPU) == 1, - NV_ERR_INVALID_ARGUMENT); - - physAddr = memdescGetPhysAddr(pMemDesc, AT_GPU, offset); - - if ((physAddr + *pLength) >= pKernelBus->bar1[gfid].staticBar1.size) - { - NV_PRINTF(LEVEL_ERROR, - "0x%llx + 0x%llx is out of the range of the static Bar1" - "map [0, 0x%llx]\n", - physAddr, *pLength, pKernelBus->bar1[gfid].staticBar1.size); - - return NV_ERR_INVALID_ARGUMENT; - } - - // - // When the static bar1 is enabled, the Fb aperture offset is the - // physical address. - // - *pAperOffset = physAddr; - - return NV_OK; -} - void kbusWriteP2PWmbTag_GH100 ( diff --git a/src/nvidia/src/kernel/gpu/bus/arch/maxwell/kern_bus_gm107.c b/src/nvidia/src/kernel/gpu/bus/arch/maxwell/kern_bus_gm107.c index b993f58857..5be0bf2179 100644 --- a/src/nvidia/src/kernel/gpu/bus/arch/maxwell/kern_bus_gm107.c +++ b/src/nvidia/src/kernel/gpu/bus/arch/maxwell/kern_bus_gm107.c @@ -356,7 +356,7 @@ kbusStateInitLockedKernel_GM107 // For "unsupported" mmu invalidate skipping mode, we align virtual BAR2 // to avoid false TLB fills and disallow address reuse. // - if (pDma->getProperty(pDma, PDB_PROP_DMA_MMU_INVALIDATE_DISABLE)) + if (pDma->bDmaMmuInvalidateDisable) { pKernelBus->virtualBar2[GPU_GFID_PF].vAlignment = 16 * RM_PAGE_SIZE; pKernelBus->virtualBar2[GPU_GFID_PF].pVASpaceHeap->eheapFree = nullEHeapFree; @@ -857,7 +857,7 @@ kbusInitBar1_GM107(OBJGPU *pGpu, KernelBus *pKernelBus, NvU32 gfid) NvU32 gpuMask = 0; NvBool bSmoothTransitionEnabled = ((pGpu->uefiScanoutSurfaceSizeInMB != 0) && RMCFG_FEATURE_PLATFORM_WINDOWS); - NvBool bBar1P2PCapable; + NvBool bStaticBar1Supported; vaRangeMax = pKernelBus->bar1[gfid].apertureLength - 1; @@ -1019,6 +1019,9 @@ kbusInitBar1_GM107(OBJGPU *pGpu, KernelBus *pKernelBus, NvU32 gfid) goto kbusInitBar1_failed; } + // Stash the mappable length after applying WARs + pKernelBus->bar1[gfid].mappableLength = vaRangeMax; + // // Make sure the aperture length we are using not larger than the maximum length available. // Usually, bar1.apertureLength should be equal to the return value of kbusGetPciBarSize, however, @@ -1027,13 +1030,13 @@ kbusInitBar1_GM107(OBJGPU *pGpu, KernelBus *pKernelBus, NvU32 gfid) // NV_ASSERT(pKernelBus->bar1[gfid].apertureLength <= kbusGetPciBarSize(pKernelBus, 1)); - bBar1P2PCapable = kbusIsBar1P2PCapable(pGpu, pKernelBus, gfid); + bStaticBar1Supported = kbusIsStaticBar1Supported_HAL(pGpu, pKernelBus, gfid); // // If we need to preserve a console mapping at the start of BAR1, we // need to allocate the VA space before anything else gets allocated. // - if (!bBar1P2PCapable && IS_GFID_PF(gfid) && + if (!bStaticBar1Supported && IS_GFID_PF(gfid) && (kbusIsPreserveBar1ConsoleEnabled(pKernelBus) || bSmoothTransitionEnabled)) { MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); @@ -1109,32 +1112,33 @@ kbusInitBar1_GM107(OBJGPU *pGpu, KernelBus *pKernelBus, NvU32 gfid) } } - if (bBar1P2PCapable) + if (bStaticBar1Supported) { // Enable the static BAR1 mapping for the BAR1 P2P NV_ASSERT_OK_OR_GOTO(rmStatus, kbusEnableStaticBar1Mapping_HAL(pGpu, pKernelBus, gfid), kbusInitBar1_failed); } - else + + // Reserve space for max number of peers for the mailbox p2p regardless of SLI config + if ((pKernelBif->forceP2PType != NV_REG_STR_RM_FORCE_P2P_TYPE_BAR1P2P) + && + (!pKernelBif->getProperty(pKernelBif, PDB_PROP_KBIF_P2P_READS_DISABLED) || + !pKernelBif->getProperty(pKernelBif, PDB_PROP_KBIF_P2P_WRITES_DISABLED)) + && + IS_GFID_PF(gfid) + && + !kbusIsP2pMailboxClientAllocated(pKernelBus)) { - // Reserve space for max number of peers for the mailbox p2p regardless of SLI config - if ((!pKernelBif->getProperty(pKernelBif, PDB_PROP_KBIF_P2P_READS_DISABLED) || - !pKernelBif->getProperty(pKernelBif, PDB_PROP_KBIF_P2P_WRITES_DISABLED)) - && - IS_GFID_PF(gfid) - && - !kbusIsP2pMailboxClientAllocated(pKernelBus)) - { - rmStatus = kbusAllocP2PMailboxBar1_HAL(pGpu, pKernelBus, gfid, vaRangeMax); + rmStatus = kbusAllocP2PMailboxBar1_HAL(pGpu, pKernelBus, gfid, vaRangeMax); - if (NV_OK != rmStatus) - { - goto kbusInitBar1_failed; - } + if (NV_OK != rmStatus) + { + goto kbusInitBar1_failed; } } + // // BAR1 vaspace is sparsified during vaspace creation // and hence pdb is allocated during vaspace and destroyed @@ -1195,6 +1199,40 @@ kbusInitBar1_GM107(OBJGPU *pGpu, KernelBus *pKernelBus, NvU32 gfid) return rmStatus; } +void +kbusUnmapPreservedConsole_GM107 +( + OBJGPU *pGpu, + KernelBus *pKernelBus, + NvU32 gfid +) +{ + if (pKernelBus->bBar1ConsolePreserved && IS_GFID_PF(gfid)) + { + MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); + PMEMORY_DESCRIPTOR pConsoleMemDesc = + memmgrGetReservedConsoleMemDesc(pGpu, pMemoryManager); + + if (pConsoleMemDesc != NULL) + { + NvU64 consoleSize = memdescGetSize(pConsoleMemDesc); + + kbusUnmapFbApertureSingle(pGpu, pKernelBus, pConsoleMemDesc, + 0, consoleSize, BUS_MAP_FB_FLAGS_MAP_UNICAST | BUS_MAP_FB_FLAGS_PRE_INIT); + } + else if (pGpu->uefiScanoutSurfaceSizeInMB) + { + vaspaceFree(pKernelBus->bar1[gfid].pVAS, 0); + } + else + { + NV_ASSERT(pConsoleMemDesc != NULL); + } + + pKernelBus->bBar1ConsolePreserved = NV_FALSE; + } +} + /*! * @brief Destroy BAR1 * @@ -1232,30 +1270,7 @@ kbusDestroyBar1_GM107 } // Remove the preserved BAR1 console mapping, if it exists - if (pKernelBus->bBar1ConsolePreserved && IS_GFID_PF(gfid)) - { - MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); - PMEMORY_DESCRIPTOR pConsoleMemDesc = - memmgrGetReservedConsoleMemDesc(pGpu, pMemoryManager); - - if (pConsoleMemDesc != NULL) - { - NvU64 consoleSize = memdescGetSize(pConsoleMemDesc); - - kbusUnmapFbApertureSingle(pGpu, pKernelBus, pConsoleMemDesc, - 0, consoleSize, BUS_MAP_FB_FLAGS_MAP_UNICAST | BUS_MAP_FB_FLAGS_PRE_INIT); - } - else if (pGpu->uefiScanoutSurfaceSizeInMB) - { - vaspaceFree(pKernelBus->bar1[gfid].pVAS, 0); - } - else - { - NV_ASSERT(pConsoleMemDesc != NULL); - } - - pKernelBus->bBar1ConsolePreserved = NV_FALSE; - } + kbusUnmapPreservedConsole(pGpu, pKernelBus, gfid); if (pKernelBus->bar1[gfid].bStaticBar1Enabled) { @@ -1768,7 +1783,6 @@ kbusSetupBar2GpuVaSpace_GM107 // Get the MMU format for BAR2. pKernelBus->bar2[gfid].pFmt = kgmmuFmtGet(pKernelGmmu, GMMU_FMT_VERSION_DEFAULT, 0); NV_ASSERT_OR_GOTO(NULL != pKernelBus->bar2[gfid].pFmt, cleanup); - walkFlags.bUseIterative = gpuIsIterativeMmuWalkerEnabled(pGpu); // // Initialize/allocate walker staging buffer only if PTEs in FBMEM @@ -2750,15 +2764,22 @@ OBJVASPACE *kbusGetBar1VASpace_GM107(OBJGPU *pGpu, KernelBus *pKernelBus) return pKernelBus->bar1[gfid].pVAS; } +MAKE_VECTOR(MemoryRangeVector, MemoryRange); + +// +// Note: When static BAR1 is enabled, this function may be called without +// RMAPI and GPU locks being acquired since we don't expect the +// GPU state or the memdesc state to change since we're just fetching +// immutable BAR1 addressses for the handle/memdesc. +// NV_STATUS kbusMapFbAperture_GM107 ( OBJGPU *pGpu, KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, - NvU64 offset, - NvU64 *pAperOffset, - NvU64 *pLength, + MemoryRange mapRange, + MemoryArea *pMemArea, NvU32 flags, Device *pDevice ) @@ -2766,23 +2787,112 @@ kbusMapFbAperture_GM107 NvBool bBcState = gpumgrGetBcEnabledStatus(pGpu); OBJVASPACE *pVAS = kbusGetBar1VASpace_HAL(pGpu, pKernelBus); NV_STATUS rmStatus = NV_OK; + MemoryRangeVector vect; + NvU64 totalMapped = 0; + NvU64 curMappingSize = mapRange.size; + // + // pageSize is used to ensure that all chunks are aligned to the OS's page size. + // Only used in this function's algorithm, not internally by DMA code + // + NvU64 pageSize = osGetPageSize(); + + // BUS_MAP_FB_FLAGS_MAP_OFFSET_FIXED effectively implies we have a preallocated memArea. + flags |= (flags & BUS_MAP_FB_FLAGS_MAP_OFFSET_FIXED) ? BUS_MAP_FB_FLAGS_UNMANAGED_MEM_AREA : 0; NV_ASSERT((flags & BUS_MAP_FB_FLAGS_FERMI_INVALID) == 0); NV_ASSERT_OR_RETURN(pVAS != NULL, NV_ERR_INVALID_STATE); + NV_ASSERT_OR_RETURN(!(flags & BUS_MAP_FB_FLAGS_MAP_OFFSET_FIXED) || pMemArea->numRanges == 1, + NV_ERR_INVALID_ARGUMENT); + + // + // Try to get a static BAR1 mapping. If static BAR1 is not enabled + // or the allocation goes in the dynamic range, we will get NV_ERR_NOT_SUPPORTED + // and fall through to te dynamic map (also used for initial static BAR1 setup itself) + // + rmStatus = kbusGetStaticFbAperture_HAL(pGpu, pKernelBus, pMemDesc, + mapRange, pMemArea, flags); + + // We succeeded in getting a static aperture mapping, exit (no cleanup required yet) + if (rmStatus == NV_OK) + { + return rmStatus; + } + else if (rmStatus != NV_ERR_NOT_SUPPORTED) + { + NV_PRINTF(LEVEL_ERROR, "static BAR1 reported error\n"); + return rmStatus; + } + + rmStatus = NV_OK; // Set BC to enabled in UC flag not passed gpumgrSetBcEnabledStatus(pGpu, IsSLIEnabled(pGpu) && ((flags & BUS_MAP_FB_FLAGS_MAP_UNICAST) == 0) && ((flags & BUS_MAP_FB_FLAGS_PRE_INIT) == 0)); - NV_ASSERT_OK_OR_GOTO(rmStatus, - _kbusMapAperture_GM107(pGpu, pKernelBus, pMemDesc, pVAS, offset, pAperOffset, pLength, flags, pDevice), - err); + vectInit(&vect, portMemAllocatorGetGlobalNonPaged(), 0); - // Only update stats on successful mapping - kbusUpdateRusdStatistics(pGpu); + if(flags & BUS_MAP_FB_FLAGS_UNMANAGED_MEM_AREA) + { + pMemArea->numRanges = 1; + pMemArea->pRanges[0].size = mapRange.size; + rmStatus = _kbusMapAperture_GM107(pGpu, pKernelBus, pMemDesc, pVAS, mapRange.start, + &pMemArea->pRanges[0].start, &pMemArea->pRanges[0].size, flags, pDevice); + goto cleanup; + } + + while (totalMapped < mapRange.size) + { + MemoryRange memRange; + NvU64 cap = vectCapacity(&vect); + + // Round out the ends with potentially non-aligned size + curMappingSize = NV_MIN(curMappingSize, mapRange.size - totalMapped); + memRange = mrangeMake(0, curMappingSize); + + if (cap == vectCount(&vect)) + { + // Preallocate capacity to get rid of complicated error paths + NvU64 nextCap = (cap == 0) ? 8 : (cap * 2); + NV_ASSERT_OK_OR_GOTO(rmStatus, vectReserve(&vect, nextCap), err); + } + + rmStatus = _kbusMapAperture_GM107(pGpu, pKernelBus, pMemDesc, pVAS, mapRange.start + totalMapped, + &memRange.start, &memRange.size, flags, pDevice); + + if (rmStatus != NV_OK) + { + NV_CHECK_OR_GOTO(LEVEL_INFO, curMappingSize > pageSize, err); + NV_CHECK_OR_GOTO(LEVEL_INFO, (flags & BUS_MAP_FB_FLAGS_ALLOW_DISCONTIG) && + pKernelBus->bBar1DiscontigEnabled, err); + curMappingSize = NV_ALIGN_UP64(curMappingSize >> 1, pageSize); + continue; + } + + totalMapped += curMappingSize; + vectAppend(&vect, &memRange); // Guaranteed to succeed + } + + pMemArea->numRanges = vectCount(&vect); + pMemArea->pRanges = portMemAllocNonPaged(sizeof(MemoryRange) * pMemArea->numRanges); + NV_ASSERT_TRUE_OR_GOTO(rmStatus, pMemArea->pRanges != NULL, NV_ERR_NO_MEMORY, err); + portMemCopy(pMemArea->pRanges, sizeof(MemoryRange) * pMemArea->numRanges, + vectAt(&vect, 0), sizeof(MemoryRange) * pMemArea->numRanges); + + goto cleanup; err: + while (!vectIsEmpty(&vect)) + { + NvU64 idx = vectCount(&vect) - 1llu; + _kbusUnmapAperture_GM107(pGpu, pKernelBus, pVAS, pMemDesc, + vectAt(&vect, idx)->start); + vectRemove(&vect, idx); + } + +cleanup: + vectDestroy(&vect); gpumgrSetBcEnabledStatus(pGpu, bBcState); + kbusUpdateRusdStatistics(pGpu); return rmStatus; } @@ -2792,19 +2902,17 @@ kbusUnmapFbAperture_GM107 OBJGPU *pGpu, KernelBus *pKernelBus, MEMORY_DESCRIPTOR *pMemDesc, - NvU64 aperOffset, - NvU64 length, + MemoryArea memArea, NvU32 flags ) { NV_STATUS rmStatus = NV_OK; NvBool bBcState = gpumgrGetBcEnabledStatus(pGpu); OBJVASPACE *pVAS = kbusGetBar1VASpace_HAL(pGpu, pKernelBus);; + NvU64 idx; NV_ASSERT_OR_RETURN(pVAS != NULL, NV_ERR_INVALID_STATE); - aperOffset &= ~RM_PAGE_MASK; - // Set BC to enabled if UC flag not passed gpumgrSetBcEnabledStatus(pGpu, IsSLIEnabled(pGpu) && ((flags & BUS_MAP_FB_FLAGS_MAP_UNICAST) == 0) && ((flags & BUS_MAP_FB_FLAGS_PRE_INIT) == 0)); @@ -2812,15 +2920,27 @@ kbusUnmapFbAperture_GM107 // TODO: investigate whether the tegra wbinvd flush is really necessary, seems only useful for SYSMEM_COH memdescFlushCpuCaches(pGpu, pMemDesc); - NV_ASSERT_OK_OR_GOTO(rmStatus, - _kbusUnmapAperture_GM107(pGpu, pKernelBus, pVAS, pMemDesc, aperOffset), - err); + for (idx = 0; idx < memArea.numRanges; idx++) + { + NV_STATUS curStatus = _kbusUnmapAperture_GM107(pGpu, pKernelBus, pVAS, pMemDesc, memArea.pRanges[idx].start & (~RM_PAGE_MASK)); + if (rmStatus == NV_OK) + { + rmStatus = curStatus; + } + } + + NV_ASSERT_OK_OR_GOTO(rmStatus, rmStatus, err); // Only update stats on successful mapping kbusUpdateRusdStatistics(pGpu); err: gpumgrSetBcEnabledStatus(pGpu, bBcState); + if (!(flags & BUS_MAP_FB_FLAGS_UNMANAGED_MEM_AREA)) + { + portMemFree(memArea.pRanges); + } + return rmStatus; } @@ -2860,9 +2980,28 @@ kbusFlushSingle_GM107 if ((flags & BUS_FLUSH_VIDEO_MEMORY) && !kbusIsFbFlushDisabled(pKernelBus)) { + // + // Note: sysmembar should be flushing PCIE as one of its steps, + // but this behavior may change on later chips. + // It's also overkill here because it also flushes GPU's egress traffic. + // return kbusSendSysmembarSingle_HAL(pGpu, pKernelBus); } + if (flags & BUS_FLUSH_VIDEO_MEMORY_VIA_PRAMIN_WINDOW) + { + // + // Read the PRAMIN pseudo-bar0-register window to flush writes in it to FB. + // Note that despite being "register" writes, these transactions are snooped + // at GPU before hitting BAR0 master, and get redirected to BAR1. + // + // This flush option REQUIRES a valid window to be mapped for PRAMIN prior + // to the call! Note that it doesn't have to be the same window that contains + // prior writes you might want to flush. + // + (void)GPU_REG_RD32(pGpu, DRF_BASE(NV_PRAMIN)); + } + return NV_OK; } @@ -2924,17 +3063,6 @@ _kbusMapAperture_GM107 NvU32 flags = DRF_DEF(OS46, _FLAGS, _DMA_UNICAST_REUSE_ALLOC, _FALSE); MEMORY_DESCRIPTOR *pTempMemDesc; NvU32 swizzId = KMIGMGR_SWIZZID_INVALID; - NvU32 gfid; - - if (kbusIsStaticBar1Enabled(pGpu, pKernelBus) && - (memdescGetAddressSpace(pMemDesc) == ADDR_FBMEM)) - { - NV_ASSERT_OK_OR_RETURN(vgpuGetCallingContextGfid(pGpu, &gfid)); - - return kbusGetStaticFbAperture_HAL(pGpu, pKernelBus, pMemDesc, - offset, pAperOffset, - pLength, gfid); - } if (mapFlags & BUS_MAP_FB_FLAGS_MAP_OFFSET_FIXED) { @@ -5223,7 +5351,6 @@ kbusSetupBar2PageTablesAtTopOfFb_GM107 // Grab a CPU pointer to the actual BAR2 page tables at the top of FB. status = kbusInitVirtualBar2_HAL(pGpu, pKernelBus); NV_ASSERT_OR_RETURN(NV_OK == status, status); - walkFlags.bUseIterative = gpuIsIterativeMmuWalkerEnabled(pGpu); // // Initialize/allocate walker staging buffer only if PTEs in FBMEM @@ -5654,10 +5781,13 @@ kbusMemoryCopy_GM107 NvU64 offset = 0; NvU64 bar0Window; NvU64 bar0Offset = 0; + NvU64 bar0WindowSize = DRF_SIZE(NV_PRAMIN); NvU32 data; NvU32 i; NvU64 source; NvU64 dest; + NvU64 srcPA; + NvU8 *pTmp; source = memdescGetPhysAddr(pSrcMemDesc, FORCE_VMMU_TRANSLATION(pSrcMemDesc, AT_GPU), srcOffset); dest = memdescGetPhysAddr(pDstMemDesc, FORCE_VMMU_TRANSLATION(pDstMemDesc, AT_GPU), dstOffset); @@ -5691,27 +5821,51 @@ kbusMemoryCopy_GM107 if ((memdescGetAddressSpace(pSrcMemDesc) == ADDR_FBMEM) && (memdescGetAddressSpace(pDstMemDesc) == ADDR_FBMEM)) { + NV_ASSERT_OR_RETURN(!portUtilCheckOverlap((const NvU8*)dest, size, + (const NvU8*)source, size), + NV_ERR_NOT_SUPPORTED); bar0Window = kbusGetBAR0WindowVidOffset_HAL(pGpu, pKernelBus); - for (i = 0; i < size; i += 4) + pTmp = (NvU8 *)portMemAllocNonPaged(bar0WindowSize); + NV_ASSERT_OR_RETURN(pTmp != NULL, NV_ERR_NO_MEMORY); + while (size != 0) { + srcPA = source + offset; + bar0Offset = ALIGN_64K_OFFSET(srcPA); kbusSetBAR0WindowVidOffset_HAL(pGpu, pKernelBus, - ((source + i) & ~0xffff)); - bar0Offset = ((source + i) & 0xffff); - - data = GPU_REG_RD32(pGpu, - (DRF_BASE(NV_PRAMIN) + (NvU32)bar0Offset)); - - kbusSetBAR0WindowVidOffset_HAL(pGpu, pKernelBus, - ((dest + i) & ~0xffff)); - bar0Offset = ((dest + i) & 0xffff); + ALIGN_64K(srcPA)); + bytes = NV_MIN(size, (bar0WindowSize - bar0Offset)); - GPU_REG_WR32(pGpu, - (DRF_BASE(NV_PRAMIN) + (NvU32)bar0Offset), data); + for (i = 0; i < bytes; i+= sizeof(NvU32)) + { + data = GPU_REG_RD32(pGpu, + (DRF_BASE(NV_PRAMIN) + (NvU32)bar0Offset + i)); + MEM_WR32((pTmp + i), data); + } + status = kbusMemoryCopyFromPtr_HAL(pGpu, pKernelBus, pDstMemDesc, + dstOffset + offset, pTmp, bytes); + if (status != NV_OK) + { + if (pTmp != NULL) + portMemFree(pTmp); + DBG_BREAKPOINT(); + return status; + } + offset += bytes; + size -= bytes; } + portMemFree(pTmp); + // + // Make sure the writes make it to FB by sending a read after the writes. + // We use PRAMIN window readback because some versions of the flush HAL + // will attempt a VBAR2 readback, and kbusMemoryCopy is designed to be usable + // even before we have VBAR2 set up. + // + kbusFlush_HAL(pGpu, pKernelBus, BUS_FLUSH_VIDEO_MEMORY_VIA_PRAMIN_WINDOW); + + // Reset the window to the previous state. kbusSetBAR0WindowVidOffset_HAL(pGpu, pKernelBus, bar0Window); - kbusFlush_HAL(pGpu, pKernelBus, 0); } else if ((memdescGetAddressSpace(pSrcMemDesc) == ADDR_SYSMEM) && (memdescGetAddressSpace(pDstMemDesc) == ADDR_SYSMEM)) @@ -5727,22 +5881,22 @@ kbusMemoryCopy_GM107 if (memdescGetAddressSpace(pSrcMemDesc) == ADDR_FBMEM) { NvU64 sourcePA = source + offset; - bar0Offset = (sourcePA & 0xffff); + bar0Offset = ALIGN_64K_OFFSET(sourcePA); kbusSetBAR0WindowVidOffset_HAL(pGpu, pKernelBus, - (sourcePA & ~0xffff)); + ALIGN_64K(sourcePA)); } if (memdescGetAddressSpace(pDstMemDesc) == ADDR_FBMEM) { NvU64 destPA = dest + offset; - bar0Offset = (destPA & 0xffff); + bar0Offset = ALIGN_64K_OFFSET(destPA); kbusSetBAR0WindowVidOffset_HAL(pGpu, pKernelBus, - (destPA & ~0xffff)); + ALIGN_64K(destPA)); } - bytes = NV_MIN(size, (0x10000 - bar0Offset)); + bytes = NV_MIN(size, (bar0WindowSize - bar0Offset)); - for (i = 0; i < bytes; i += 4) + for (i = 0; i < bytes; i += sizeof(NvU32)) { if (memdescGetAddressSpace(pSrcMemDesc) == ADDR_SYSMEM) { @@ -5770,8 +5924,19 @@ kbusMemoryCopy_GM107 size -= bytes; } + if (memdescGetAddressSpace(pDstMemDesc) == ADDR_FBMEM) + { + // + // Make sure the writes make it to FB by sending a read after the writes. + // We use PRAMIN window readback because some versions of the flush HAL + // will attempt a VBAR2 readback, and kbusMemoryCopy is designed to be usable + // even before we have VBAR2 set up. + // + kbusFlush_HAL(pGpu, pKernelBus, BUS_FLUSH_VIDEO_MEMORY_VIA_PRAMIN_WINDOW); + } + + // Reset the window to the previous state. kbusSetBAR0WindowVidOffset_HAL(pGpu, pKernelBus, bar0Window); - kbusFlush_HAL(pGpu, pKernelBus, 0); } if (pSrcMem != NULL) @@ -5815,6 +5980,7 @@ kbusMemoryCopyFromPtr_GM107 NvU64 offset = 0; NvU64 bar0Window; NvU64 bar0Offset = 0; + NvU64 bar0WindowSize = DRF_SIZE(NV_PRAMIN); NvU32 data; NvU32 i; NvU64 dest; @@ -5846,14 +6012,14 @@ kbusMemoryCopyFromPtr_GM107 if (memdescGetAddressSpace(pDstMemDesc) == ADDR_FBMEM) { NvU64 destPA = dest + offset; - bar0Offset = (destPA & 0xffff); + bar0Offset = ALIGN_64K_OFFSET(destPA); kbusSetBAR0WindowVidOffset_HAL(pGpu, pKernelBus, - (destPA & ~0xffff)); + ALIGN_64K(destPA)); } - bytes = NV_MIN(size, (0x10000 - bar0Offset)); + bytes = NV_MIN(size, (bar0WindowSize - bar0Offset)); - for (i = 0; i < bytes; i += 4) + for (i = 0; i < bytes; i += sizeof(NvU32)) { data = MEM_RD32(pSrcMem + offset + i); @@ -5873,8 +6039,19 @@ kbusMemoryCopyFromPtr_GM107 size -= bytes; } + if (memdescGetAddressSpace(pDstMemDesc) == ADDR_FBMEM) + { + // + // Make sure the writes make it to FB by sending a read after the writes. + // We use PRAMIN window readback because some versions of the flush HAL + // will attempt a VBAR2 readback, and kbusMemoryCopy is designed to be usable + // even before we have VBAR2 set up. + // + kbusFlush_HAL(pGpu, pKernelBus, BUS_FLUSH_VIDEO_MEMORY_VIA_PRAMIN_WINDOW); + } + + // Reset the window to the previous state. kbusSetBAR0WindowVidOffset_HAL(pGpu, pKernelBus, bar0Window); - kbusFlush_HAL(pGpu, pKernelBus, 0); } if (pDstMem != NULL) diff --git a/src/nvidia/src/kernel/gpu/bus/arch/pascal/kern_bus_gp100.c b/src/nvidia/src/kernel/gpu/bus/arch/pascal/kern_bus_gp100.c index e28ab08da5..ef0f26a44b 100644 --- a/src/nvidia/src/kernel/gpu/bus/arch/pascal/kern_bus_gp100.c +++ b/src/nvidia/src/kernel/gpu/bus/arch/pascal/kern_bus_gp100.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2014-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2014-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -374,7 +374,7 @@ kbusCreateP2PMappingForNvlink_GP100 { KernelNvlink *pKernelNvlink0 = GPU_GET_KERNEL_NVLINK(pGpu0); KernelNvlink *pKernelNvlink1 = GPU_GET_KERNEL_NVLINK(pGpu1); - NV2080_CTRL_NVLINK_ENABLE_NVLINK_PEER_PARAMS params; + NV2080_CTRL_INTERNAL_NVLINK_ENABLE_NVLINK_PEER_PARAMS params; if (pKernelNvlink0 == NULL || pKernelNvlink1 == NULL) { @@ -387,7 +387,7 @@ kbusCreateP2PMappingForNvlink_GP100 // Set the NVLink USE_NVLINK_PEER fields in the LTCS registers for GPU0 status = knvlinkExecGspRmRpc(pGpu0, pKernelNvlink0, - NV2080_CTRL_CMD_NVLINK_ENABLE_NVLINK_PEER, + NV2080_CTRL_CMD_INTERNAL_NVLINK_ENABLE_NVLINK_PEER, (void *)¶ms, sizeof(params)); if (status != NV_OK) { @@ -404,7 +404,7 @@ kbusCreateP2PMappingForNvlink_GP100 // Set the NVLink USE_NVLINK_PEER fields in the LTCS registers for GPU1 status = knvlinkExecGspRmRpc(pGpu1, pKernelNvlink1, - NV2080_CTRL_CMD_NVLINK_ENABLE_NVLINK_PEER, + NV2080_CTRL_CMD_INTERNAL_NVLINK_ENABLE_NVLINK_PEER, (void *)¶ms, sizeof(params)); if (status != NV_OK) { @@ -540,7 +540,7 @@ _kbusRemoveNvlinkPeerMapping else { KernelNvlink *pKernelNvlink0 = GPU_GET_KERNEL_NVLINK(pGpu0); - NV2080_CTRL_NVLINK_ENABLE_NVLINK_PEER_PARAMS params; + NV2080_CTRL_INTERNAL_NVLINK_ENABLE_NVLINK_PEER_PARAMS params; NV_ASSERT_OR_RETURN(pKernelNvlink0 != NULL, NV_ERR_NOT_SUPPORTED); @@ -550,7 +550,7 @@ _kbusRemoveNvlinkPeerMapping // Unset the NVLink USE_NVLINK_PEER fields in the LTCS registers for GPU0 status = knvlinkExecGspRmRpc(pGpu0, pKernelNvlink0, - NV2080_CTRL_CMD_NVLINK_ENABLE_NVLINK_PEER, + NV2080_CTRL_CMD_INTERNAL_NVLINK_ENABLE_NVLINK_PEER, (void *)¶ms, sizeof(params)); if (status != NV_OK) { diff --git a/src/nvidia/src/kernel/gpu/bus/arch/turing/kern_bus_tu102.c b/src/nvidia/src/kernel/gpu/bus/arch/turing/kern_bus_tu102.c index 7468848915..a1d4188763 100644 --- a/src/nvidia/src/kernel/gpu/bus/arch/turing/kern_bus_tu102.c +++ b/src/nvidia/src/kernel/gpu/bus/arch/turing/kern_bus_tu102.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2017-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2017-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -26,9 +26,13 @@ #include "gpu/bus/kern_bus.h" #include "kernel/gpu/nvlink/kernel_nvlink.h" #include "vgpu/vgpu_events.h" +#include "gpu/bif/kernel_bif.h" +#include "gpu/mem_mgr/virt_mem_allocator.h" +#include "nvrm_registry.h" #include "published/turing/tu102/dev_bus.h" #include "published/turing/tu102/dev_vm.h" +#include "published/turing/tu102/dev_mmu.h" /*! * @brief Returns the first available peer Id excluding the nvlink peerIds @@ -342,3 +346,500 @@ kbusGetBar1ResvdVA_TU102 // return NVBIT64(27); //128MB } + + +/** + * @brief Check if the GPU supports static BAR1 + * + * @param pGpu + * @param pKernelBus + * @param gfid + * + * @return NV_TRUE if it supports static BAR1 + */ +NvBool +kbusIsStaticBar1Supported_TU102 +( + OBJGPU *pGpu, + KernelBus *pKernelBus, + NvU32 gfid +) +{ + NvU64 bar1Size = kbusGetPciBarSize(pKernelBus, 1); + KernelBif *pKernelBif = GPU_GET_KERNEL_BIF(pGpu); + MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); + + // + // Use fbAddrSpaceSizeMb in this function to make sure there's + // enough space for the any possible allocations in the RM + // reserved region to be mapped through the dynamic section of + // BAR1 + // + + NvU64 fbSize = pMemoryManager->Ram.fbAddrSpaceSizeMb << 20; + NvU64 bar1VASize = pKernelBus->bar1[gfid].mappableLength; + + if ((fbSize == 0) || (bar1Size == 0)) + return NV_FALSE; + + // TODO: Bug 3869651: check for compute SKU to enable AUTO + if (pKernelBus->staticBar1ForceType == NV_REG_STR_RM_FORCE_STATIC_BAR1_DISABLE) + { + return NV_FALSE; + } + if (pKernelBus->staticBar1ForceType == NV_REG_STR_RM_FORCE_STATIC_BAR1_ENABLE) + { + return NV_TRUE; + } + else if (pKernelBus->staticBar1ForceType == NV_REG_STR_RM_FORCE_STATIC_BAR1_AUTO) + { + // 2x the amount of FB to allow for both static and dynamic BAR1 mappings + if (RM_ALIGN_DOWN(bar1VASize, RM_PAGE_SIZE_2M) >= (RM_ALIGN_UP(fbSize, RM_PAGE_SIZE_2M) * 2)) + { + return NV_TRUE; + } + else + { + return NV_FALSE; + } + } + // else NV_REG_STR_RM_FORCE_STATIC_BAR1_ONLY_GPU, continue on + + if (pKernelBif->forceP2PType != NV_REG_STR_RM_FORCE_P2P_TYPE_BAR1P2P) + return NV_FALSE; + + // + // GPU BAR1 supports the SYSMEM mapping for the bar1 doorbell, RM needs + // to make sure that BAR1 VA has 128KB space left for such cases after all + // FB statically mapped in BAR1. Bug 3869651 #14. + // + if ((bar1VASize < (32 * RM_PAGE_SIZE)) || + ((bar1VASize - (32 * RM_PAGE_SIZE)) < RM_ALIGN_UP(fbSize, RM_PAGE_SIZE_2M))) + return NV_FALSE; + + return NV_TRUE; +} + +/*! + * @brief Setup static Bar1 mapping. + * + * @param[in] pGpu GPU pointer + * @param[in] pKernelBus Kernel bus pointer + * @param[in] gfid The GFID + * + * @returns NV_OK on success, or rm_status from called functions on failure. + */ +NV_STATUS +kbusEnableStaticBar1Mapping_TU102 +( + OBJGPU *pGpu, + KernelBus *pKernelBus, + NvU32 gfid +) +{ + MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); + MEMORY_DESCRIPTOR *pMemDesc = NULL; + MEMORY_DESCRIPTOR *pDmaMemDesc = NULL; + NV_STATUS status = NV_OK; + NvU64 bar1Offset = 0; + NvU64 bar1MapSize; + NvU64 bar1BusAddr; + + // + // But use memmgrGetClientFbAddrSpaceSize + // in this function to only map the client-visible FB + // + + // align to 2MB page size + bar1MapSize = RM_ALIGN_UP(memmgrGetClientFbAddrSpaceSize(pGpu, pMemoryManager), + RM_PAGE_SIZE_2M); + + // + // The static mapping is not backed by an allocated physical FB. + // Here RM describes the memory for the static mapping. + // + NV_ASSERT_OK_OR_RETURN(memdescCreate(&pMemDesc, pGpu, bar1MapSize, 0, + NV_MEMORY_CONTIGUOUS, ADDR_FBMEM, + NV_MEMORY_UNCACHED, MEMDESC_FLAGS_NONE)); + + memdescDescribe(pMemDesc, ADDR_FBMEM, 0, bar1MapSize); + + // Set to use RM_PAGE_SIZE_HUGE, 2MB + memdescSetPageSize(pMemDesc, AT_GPU, RM_PAGE_SIZE_HUGE); + + // Setup GMK PTE type for this memory + memdescSetPteKind(pMemDesc, NV_MMU_PTE_KIND_GENERIC_MEMORY); + + // Deploy the static mapping. + NV_ASSERT_OK_OR_GOTO(status, + kbusMapFbApertureSingle(pGpu, pKernelBus, pMemDesc, 0, + &bar1Offset, &bar1MapSize, + BUS_MAP_FB_FLAGS_MAP_UNICAST | + BUS_MAP_FB_FLAGS_MAP_OFFSET_FIXED, + NV01_NULL_OBJECT), + cleanup_mem); + + if(bar1Offset != 0) + { + // For static bar1 mapping, it should always be 0. + status = NV_ERR_INVALID_STATE; + NV_ASSERT(0); + goto cleanup_bus_map; + } + + // Get the system physical address of the Bar1 + bar1BusAddr = gpumgrGetGpuPhysFbAddr(pGpu); + + // + // Create a memory descriptor to describe a SYSMEM target of the GPU + // BAR1 region. This memDesc will be used for P2P DMA related mapping. + // + NV_ASSERT_OK_OR_GOTO(status, + memdescCreate(&pDmaMemDesc, + pGpu, + bar1MapSize, + 0, + NV_MEMORY_CONTIGUOUS, + ADDR_SYSMEM, + NV_MEMORY_UNCACHED, + MEMDESC_FLAGS_NONE), + cleanup_bus_map); + + memdescDescribe(pDmaMemDesc, ADDR_SYSMEM, bar1BusAddr, bar1MapSize); + + pKernelBus->bar1[gfid].bStaticBar1Enabled = NV_TRUE; + pKernelBus->bar1[gfid].staticBar1.pVidMemDesc = pMemDesc; + pKernelBus->bar1[gfid].staticBar1.pDmaMemDesc = pDmaMemDesc; + pKernelBus->bar1[gfid].staticBar1.size = bar1MapSize; + + NV_PRINTF(LEVEL_INFO, "Static bar1 mapped offset 0x%llx size 0x%llx\n", + bar1Offset, bar1MapSize); + + return NV_OK; + +cleanup_bus_map: + NV_ASSERT_OK(kbusUnmapFbApertureSingle(pGpu, pKernelBus, + pMemDesc, bar1Offset, bar1MapSize, + BUS_MAP_FB_FLAGS_MAP_UNICAST | + BUS_MAP_FB_FLAGS_MAP_OFFSET_FIXED)); + +cleanup_mem: + NV_PRINTF(LEVEL_ERROR, "Failed to create the static bar1 mapping offset" + "0x%llx size 0x%llx\n", bar1Offset, bar1MapSize); + + pKernelBus->bar1[gfid].bStaticBar1Enabled = NV_FALSE; + pKernelBus->bar1[gfid].staticBar1.pVidMemDesc = NULL; + pKernelBus->bar1[gfid].staticBar1.pDmaMemDesc = NULL; + + memdescDestroy(pDmaMemDesc); + memdescDestroy(pMemDesc); + + return status; +} + +/*! + * @brief tear down static Bar1 mapping. + * + * @param[in] pGpu GPU pointer + * @param[in] pKernelBus Kernel bus pointer + * @param[in] gfid The GFID + * + * @returns NV_OK on success, or rm_status from called functions on failure. + */ +void +kbusDisableStaticBar1Mapping_TU102 +( + OBJGPU *pGpu, + KernelBus *pKernelBus, + NvU32 gfid +) +{ + if (!pKernelBus->bar1[gfid].bStaticBar1Enabled) + return; + + pKernelBus->bar1[gfid].bStaticBar1Enabled = NV_FALSE; + + NV_ASSERT_OK( + kbusUnmapFbApertureSingle(pGpu, pKernelBus, + pKernelBus->bar1[gfid].staticBar1.pVidMemDesc, + 0, + pKernelBus->bar1[gfid].staticBar1.size, + BUS_MAP_FB_FLAGS_MAP_UNICAST | + BUS_MAP_FB_FLAGS_MAP_OFFSET_FIXED)); + + memdescDestroy(pKernelBus->bar1[gfid].staticBar1.pVidMemDesc); + pKernelBus->bar1[gfid].staticBar1.pVidMemDesc = NULL; + + memdescDestroy(pKernelBus->bar1[gfid].staticBar1.pDmaMemDesc); + pKernelBus->bar1[gfid].staticBar1.pDmaMemDesc = NULL; +} + +/*! + * @brief To update the StaticBar1 PTE kind for the specified memory. + * + * The staticbar1 only support GMK and the compressed kind PTE. + * By default, the bar1 is statically mapped with GMK at boot when the + * static bar1 is enabled. + * + * When to map a uncompressed kind memory, RM just return the static + * bar1 address which is mapped to the specified memory. + * + * When to map a compressed kind memory, RM must call this function to + * change the static mapped bar1 range to the specified memory from GMK + * to the compressed kind. And RM needs to call this function to change + * it back to GMK from the compressed kind after this mapping is + * released. + * + * @param[in] pGpu GPU pointer + * @param[in] pKernelBus Kernel bus pointer + * @param[in] pMemDesc The memory to update + * @param[in] offset The offset of the memory to update + * @param[in] length The length of the memory to update + * @param[in] bRelease Call to release the mapping + * @param[in] gfid The GFID + * + * return NV_OK on success + */ +NV_STATUS +kbusUpdateStaticBar1VAMapping_TU102 +( + OBJGPU *pGpu, + KernelBus *pKernelBus, + MEMORY_DESCRIPTOR *pMemDesc, + NvBool bRelease +) +{ + NV_STATUS status = NV_OK; + VirtMemAllocator *pDma = GPU_GET_DMA(pGpu); + MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); + OBJVASPACE *pVAS; + NvU32 kind; + NvU64 physAddr; + NvU64 vaLo; + NvU64 vaHi; + NvU64 pageSize; + DMA_PAGE_ARRAY pageArray = {0}; + COMPR_INFO comprInfo = {0}; + NvU32 gfid; + NvU64 mapSize; + NvU64 mapGranularity; + NvU64 offset; + ADDRESS_TRANSLATION addressTranslation; + + NV_ASSERT_OR_RETURN(vgpuGetCallingContextGfid(pGpu, &gfid) == NV_OK, + NV_ERR_INVALID_STATE); + + NV_ASSERT_OR_RETURN(pMemDesc != NULL, NV_ERR_INVALID_ARGUMENT); + + NV_ASSERT_OR_RETURN(memdescGetAddressSpace(pMemDesc) == ADDR_FBMEM, + NV_ERR_INVALID_ARGUMENT); + + pVAS = pKernelBus->bar1[gfid].pVAS; + addressTranslation = VAS_ADDRESS_TRANSLATION(pVAS); + pageSize = memdescGetPageSize(pMemDesc, addressTranslation); + mapSize = memdescGetSize(pMemDesc); + + NV_ASSERT_OR_RETURN(NV_IS_ALIGNED64( + memdescGetPhysAddr(pMemDesc, addressTranslation, 0), pageSize), + NV_ERR_INVALID_ARGUMENT); + + NV_ASSERT_OR_RETURN(NV_IS_ALIGNED64(mapSize, pageSize), + NV_ERR_INVALID_ARGUMENT); + + // TODO: simplify for dynamic page granularity + mapGranularity = memdescGetContiguity(pMemDesc, addressTranslation) ? + mapSize : pageSize; + + NV_ASSERT_OK_OR_RETURN(memmgrGetKindComprFromMemDesc(pMemoryManager, + pMemDesc, 0, &kind, &comprInfo)); + + // Static BAR1 mapping only support >=2MB page size for compressed memory + NV_CHECK_OR_RETURN(LEVEL_ERROR, + memmgrIsKind_HAL(pMemoryManager, FB_IS_KIND_COMPRESSIBLE, kind) && + (pageSize >= RM_PAGE_SIZE_HUGE), + NV_ERR_INVALID_STATE); + + if (bRelease) + { + // update the PTE kind to be the uncompressed kind + comprInfo.kind = memmgrGetUncompressedKind_HAL(pGpu, pMemoryManager, + kind, NV_FALSE); + } + + for (offset = 0; offset < mapSize; offset += mapGranularity) + { + // Under static BAR1 mapping, BAR1 VA equal to fb physAddr + physAddr = memdescGetPhysAddr(pMemDesc, addressTranslation, offset); + vaLo = physAddr; + vaHi = vaLo + mapGranularity - 1; + + pageArray.count = 1; + pageArray.pData = &physAddr; + + status = dmaUpdateVASpace_HAL(pGpu, pDma, pVAS, + pMemDesc, NULL, + vaLo, vaHi, + DMA_UPDATE_VASPACE_FLAGS_UPDATE_KIND | + DMA_UPDATE_VASPACE_FLAGS_UPDATE_COMPR, + &pageArray, 0, + &comprInfo, 0, + NV_MMU_PTE_VALID_TRUE, + NV_MMU_PTE_APERTURE_VIDEO_MEMORY, + BUS_INVALID_PEER, + NVLINK_INVALID_FABRIC_ADDR, + DMA_TLB_INVALIDATE, + NV_FALSE, + pageSize); + + } + + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, + "Failed to update static bar1 VA space, error 0x%x.\n", + status); + } + + return status; +} + +/*! + * @brief To get FB aperture for the specified memory under the static mapping. + * Memdesc must already be verified that it should be mapped in static region + * by kbusShouldMapInStaticFbAperture_HAL + * + * @param[in] pGpu GPU pointer + * @param[in] pKernelBus Kernel bus pointer + * @param[in] pMemDesc The memory to update + * @param[in] mapRange The range of the memory allocation to map + * @param[out] pMemArea The Memory Area struct of theFb Aperture(BAR1) + * of the mapped vidmem + * @param[in] gfid The GFID + * @param[in] flags Flags from kbusMapFbAperture_GM107 on whether to alloc + * memory area + * + * return NV_ERR_NOT_SUPPORTED if static BAR1 is not enabled or this mapping should otherwise + * be mapped in the dynamic region instead + * other error if fatal error has occurred and we should bail on the allocation + * NV_OK if static BAR1 mapping is succesfully found and returned + */ +NV_STATUS +kbusGetStaticFbAperture_TU102 +( + OBJGPU *pGpu, + KernelBus *pKernelBus, + MEMORY_DESCRIPTOR *pMemDesc, + MemoryRange mapRange, + MemoryArea *pMemArea, + NvU32 flags +) +{ + NvU64 pageSize; + OBJVASPACE *pVAS; + NvU32 gfid; + NvU64 mapGranularity; + NvU64 offset; + NvU64 mapRangeEndPlus1; + NvU64 numRanges = 0; + NvU64 i; + NvBool bUnmanagedRange = !!(flags & BUS_MAP_FB_FLAGS_UNMANAGED_MEM_AREA); + NvBool bDiscontigAllowed = !!(flags & BUS_MAP_FB_FLAGS_ALLOW_DISCONTIG); + NvBool bContigDesc; + ADDRESS_TRANSLATION addressTranslation; + MemoryRange testMapRange; + NvBool bInStaticRegion = NV_FALSE; + NvBool bInDynamicRegion = NV_FALSE; + + NV_CHECK_OR_RETURN(LEVEL_SILENT, kbusIsStaticBar1Enabled(pGpu, pKernelBus), + NV_ERR_NOT_SUPPORTED); + + NV_CHECK_OR_RETURN(LEVEL_SILENT, memdescGetAddressSpace(pMemDesc) == ADDR_FBMEM, + NV_ERR_NOT_SUPPORTED); + + NV_ASSERT_OR_RETURN(vgpuGetCallingContextGfid(pGpu, &gfid) == NV_OK, + NV_ERR_INVALID_STATE); + + NV_ASSERT_OR_RETURN(pMemDesc != NULL, NV_ERR_INVALID_ARGUMENT); + + pVAS = pKernelBus->bar1[gfid].pVAS; + addressTranslation = VAS_ADDRESS_TRANSLATION(pVAS); + pageSize = memdescGetPageSize(pMemDesc, addressTranslation); + bContigDesc = memdescGetContiguity(pMemDesc, addressTranslation); + mapRangeEndPlus1 = mapRange.start + mapRange.size; + // TODO: simplify for dynamic page granularity + mapGranularity = bContigDesc ? mapRange.size : pageSize; + + NV_CHECK_OR_RETURN(LEVEL_INFO, + mapRangeEndPlus1 <= memdescGetSize(pMemDesc), + NV_ERR_OUT_OF_RANGE); + + // + // check ranges before modifying any of the values since pMemArea->pRanges[i] is used by the dynamic code + // if not used here and can't be written until it will be successfully allocated + // + for (offset = mapRange.start; offset < mapRangeEndPlus1; numRanges++) + { + testMapRange.start = memdescGetPhysAddr(pMemDesc, addressTranslation, offset); + testMapRange.size = bContigDesc ? mapGranularity : (NV_MIN(mapRangeEndPlus1, NV_ALIGN_UP(offset + 1, mapGranularity)) - offset); + + if (mrangeLimit(testMapRange) > pKernelBus->bar1[gfid].staticBar1.size) + { + bInDynamicRegion = NV_TRUE; + } + else + { + bInStaticRegion = NV_TRUE; + } + + offset = bContigDesc ? (offset + mapGranularity) : NV_ALIGN_DOWN(offset + mapGranularity, mapGranularity); + } + + NV_CHECK_OR_RETURN(LEVEL_INFO, (numRanges == 1) || (bDiscontigAllowed && !bUnmanagedRange), + NV_ERR_INVALID_ARGUMENT); + + if (bInDynamicRegion && bInStaticRegion) + { + NV_PRINTF(LEVEL_ERROR, "MemDesc spans both static and dynamic region," + "which is unsupported. Dumping memdesc:\n"); + NV_PRINTF(LEVEL_ERROR, "static Bar1 map [0, 0x%llx]\n", + pKernelBus->bar1[gfid].staticBar1.size); + + for (i = 0, offset = mapRange.start; offset < mapRangeEndPlus1; numRanges++) + { + testMapRange.start = memdescGetPhysAddr(pMemDesc, addressTranslation, offset); + testMapRange.size = bContigDesc ? mapGranularity : NV_MIN(mapRangeEndPlus1, NV_ALIGN_UP(offset + 1, mapGranularity)) - offset; + + offset = bContigDesc ? (offset + mapGranularity) : NV_ALIGN_DOWN(offset + mapGranularity, mapGranularity); + } + + return NV_ERR_INVALID_ARGUMENT; + } + + if (bInDynamicRegion) + { + // goes in dynamic region only + return NV_ERR_NOT_SUPPORTED; + } + + // + // When the static bar1 is enabled, the Fb aperture offset is the + // physical address. + // + if (!bUnmanagedRange) + { + pMemArea->pRanges = portMemAllocNonPaged(sizeof(MemoryRange) * numRanges); + NV_CHECK_OR_RETURN(LEVEL_INFO, pMemArea->pRanges != NULL, NV_ERR_NO_MEMORY); + } + + for (i = 0, offset = mapRange.start; offset < mapRangeEndPlus1; i++) + { + pMemArea->pRanges[i].start = memdescGetPhysAddr(pMemDesc, addressTranslation, offset); + pMemArea->pRanges[i].size = bContigDesc ? mapGranularity : NV_MIN(mapRangeEndPlus1, NV_ALIGN_UP(offset + 1, mapGranularity)) - offset; + + offset = bContigDesc ? (offset + mapGranularity) : NV_ALIGN_DOWN(offset + mapGranularity, mapGranularity); + } + + pMemArea->numRanges = numRanges; + + return NV_OK; +} diff --git a/src/nvidia/src/kernel/gpu/bus/arch/volta/kern_bus_gv100.c b/src/nvidia/src/kernel/gpu/bus/arch/volta/kern_bus_gv100.c index 71c4746c87..6a8162ba2b 100644 --- a/src/nvidia/src/kernel/gpu/bus/arch/volta/kern_bus_gv100.c +++ b/src/nvidia/src/kernel/gpu/bus/arch/volta/kern_bus_gv100.c @@ -31,6 +31,8 @@ #include "gpu/uvm/uvm.h" #include "os/os.h" +#include "published/volta/gv100/dev_ram.h" + // @ref busMigrateBarMapping_GV100 to see how FB region is organized #define COHERENT_CPU_MAPPING_WPR COHERENT_CPU_MAPPING_REGION_0 @@ -72,7 +74,7 @@ kbusSetupCpuPointerForBusFlush_GV100 NV_ASSERT_OR_GOTO(status == NV_OK, cleanup); // Allocate memory from reserved heap for flush - memdescTagAlloc(status, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_54, + memdescTagAlloc(status, NV_FB_ALLOC_RM_INTERNAL_OWNER_UNNAMED_TAG_54, pKernelBus->pFlushMemDesc); NV_ASSERT_OR_GOTO(status == NV_OK, cleanup); @@ -372,24 +374,24 @@ kbusFlushSingle_GV100 if (kbusIsBarAccessBlocked(pKernelBus)) { - // If BAR has been blocked, there's nothing to flush for vidmem + // If BAR1/2 has been blocked, there's nothing to flush for vidmem return NV_OK; } if ((flags & BUS_FLUSH_VIDEO_MEMORY) && kbusIsReadCpuPointerToFlushEnabled(pKernelBus)) { - volatile NvU32 data; - // // Read the FB address 0 in order to trigger a flush. // This will not work with reflected mappings so only enable on VOLTA+ // Note SRIOV guest does not have access to uflush register. // - NV_ASSERT(pKernelBus->pReadToFlush != NULL || pKernelBus->virtualBar2[GPU_GFID_PF].pCpuMapping != NULL); + NV_ASSERT_OR_RETURN( + (pKernelBus->pReadToFlush != NULL || pKernelBus->virtualBar2[GPU_GFID_PF].pCpuMapping != NULL), + NV_ERR_INVALID_STATE); if (pKernelBus->pReadToFlush != NULL) { - data = MEM_RD32(pKernelBus->pReadToFlush); + (void)MEM_RD32(pKernelBus->pReadToFlush); } else if (pKernelBus->virtualBar2[GPU_GFID_PF].pCpuMapping != NULL) { @@ -398,9 +400,22 @@ kbusFlushSingle_GV100 // instead which should already be mapped to FB addr 0 as // BAR2 is in physical mode right now. // - data = MEM_RD32(pKernelBus->virtualBar2[GPU_GFID_PF].pCpuMapping); + (void)MEM_RD32(pKernelBus->virtualBar2[GPU_GFID_PF].pCpuMapping); } - (void) data; + } + + if (flags & BUS_FLUSH_VIDEO_MEMORY_VIA_PRAMIN_WINDOW) + { + // + // Read the PRAMIN pseudo-bar0-register window to flush writes in it to FB. + // Note that despite being "register" writes, these transactions are snooped + // at GPU before hitting BAR0 master, and get redirected to BAR1. + // + // This flush option REQUIRES a valid window to be mapped for PRAMIN prior + // to the call! Note that it doesn't have to be the same window that contains + // prior writes you might want to flush. + // + (void)GPU_REG_RD32(pGpu, DRF_BASE(NV_PRAMIN)); } return NV_OK; diff --git a/src/nvidia/src/kernel/gpu/bus/kern_bus.c b/src/nvidia/src/kernel/gpu/bus/kern_bus.c index 98dc6b838f..76bbf08bae 100644 --- a/src/nvidia/src/kernel/gpu/bus/kern_bus.c +++ b/src/nvidia/src/kernel/gpu/bus/kern_bus.c @@ -183,6 +183,17 @@ kbusInitRegistryOverrides(OBJGPU *pGpu, KernelBus *pKernelBus) break; } + if ((osReadRegistryDword(pGpu, NV_REG_STR_RM_FORCE_STATIC_BAR1, &data32) == NV_OK) && + data32 < NV_REG_STR_RM_FORCE_STATIC_BAR1_MAX) + { + pKernelBus->staticBar1ForceType = data32; + NV_PRINTF(LEVEL_WARNING, "Forcing static BAR1 to type %d.\n", data32); + } + else + { + pKernelBus->staticBar1ForceType = NV_REG_STR_RM_FORCE_STATIC_BAR1_DEFAULT; + } + if (RMCFG_FEATURE_PLATFORM_WINDOWS && !pGpu->getProperty(pGpu, PDB_PROP_GPU_IN_TCC_MODE)) { // @@ -226,13 +237,17 @@ kbusGetBar1VARangeForDevice_IMPL(OBJGPU *pGpu, KernelBus *pKernelBus, Device *pD { KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); OBJVASPACE *pBar1VAS = kbusGetBar1VASpace_HAL(pGpu, pKernelBus); + RmClient *pRmClient; NV_ASSERT_OR_RETURN(pBar1VAS != NULL, NV_ERR_INVALID_STATE); *pBar1VARange = rangeMake(vaspaceGetVaStart(pBar1VAS), vaspaceGetVaLimit(pBar1VAS)); + pRmClient = dynamicCast(RES_GET_CLIENT(pDevice), RmClient); + NV_ASSERT_OR_RETURN(pRmClient != NULL, NV_ERR_INVALID_CLIENT); + if ((pKernelMIGManager != NULL) && kmigmgrIsMIGMemPartitioningEnabled(pGpu, pKernelMIGManager) && - !rmclientIsCapableByHandle(RES_GET_CLIENT_HANDLE(pDevice), NV_RM_CAP_SYS_SMC_MONITOR) && + !rmclientIsCapable(pRmClient, NV_RM_CAP_SYS_SMC_MONITOR) && !kmigmgrIsDeviceUsingDeviceProfiling(pGpu, pKernelMIGManager, pDevice)) { MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); @@ -940,106 +955,67 @@ kbusCheckEngineWithOrderList_KERNEL rmEngineCaps), return NV_FALSE); - switch (engDesc) + switch (ENGDESC_FIELD(engDesc, _CLASS)) { - case ENG_LSFM: - case ENG_PMU: - case ENG_CLK: - case ENG_ACR: - case ENG_DISP: + case ENG_CLASS_LSFM: + case ENG_CLASS_PMU: + case ENG_CLASS_CLK: + case ENG_CLASS_ACR: + case ENG_CLASS_DISP: return NV_FALSE; // // This function is used in two environments: // (a) vGPU where display is not yet supported. // (b) RM offload (Kernel RM) where display is supported. // - case ENG_KERNEL_DISPLAY: + case ENG_CLASS_KERNEL_DISPLAY: return IS_GSP_CLIENT(pGpu); - case ENG_BIF: - case ENG_KERNEL_BIF: - case ENG_MC: - case ENG_KERNEL_MC: - case ENG_PRIV_RING: - case ENG_SW_INTR: - case ENG_TMR: - case ENG_DMA: - case ENG_BUS: - case ENG_GR(0): - case ENG_CIPHER: - case ENG_INTR: - case ENG_GPULOG: - case ENG_GPUMON: - case ENG_FIFO: + case ENG_CLASS_BIF: + case ENG_CLASS_KERNEL_BIF: + case ENG_CLASS_MC: + case ENG_CLASS_KERNEL_MC: + case ENG_CLASS_PRIV_RING: + case ENG_CLASS_SW_INTR: + case ENG_CLASS_TMR: + case ENG_CLASS_DMA: + case ENG_CLASS_BUS: + case ENG_CLASS_CIPHER: + case ENG_CLASS_INTR: + case ENG_CLASS_GPULOG: + case ENG_CLASS_GPUMON: + case ENG_CLASS_FIFO: return NV_TRUE; - case ENG_CE(0): - case ENG_CE(1): - case ENG_CE(2): - case ENG_CE(3): - case ENG_CE(4): - case ENG_CE(5): - case ENG_CE(6): - case ENG_CE(7): - case ENG_CE(8): - case ENG_CE(9): - // Bug 3748354 - case ENG_CE(10): - case ENG_CE(11): - case ENG_CE(12): - case ENG_CE(13): - case ENG_CE(14): - case ENG_CE(15): - case ENG_CE(16): - case ENG_CE(17): - case ENG_CE(18): - case ENG_CE(19): + case ENG_CLASS_CE: return !!NVGPU_GET_ENGINE_CAPS_MASK(rmEngineCaps, RM_ENGINE_TYPE_COPY(GET_CE_IDX(engDesc))); - case ENG_MSENC(0): - case ENG_MSENC(1): - case ENG_MSENC(2): + case ENG_CLASS_MSENC: return !!NVGPU_GET_ENGINE_CAPS_MASK(rmEngineCaps, RM_ENGINE_TYPE_NVENC(GET_MSENC_IDX(engDesc))); - case ENG_SEC2: + case ENG_CLASS_SEC2: return !!NVGPU_GET_ENGINE_CAPS_MASK(rmEngineCaps, RM_ENGINE_TYPE_SEC2); - case ENG_NVDEC(0): - case ENG_NVDEC(1): - case ENG_NVDEC(2): - case ENG_NVDEC(3): - case ENG_NVDEC(4): - case ENG_NVDEC(5): - case ENG_NVDEC(6): - case ENG_NVDEC(7): + case ENG_CLASS_NVDEC: return !!NVGPU_GET_ENGINE_CAPS_MASK(rmEngineCaps, RM_ENGINE_TYPE_NVDEC(GET_NVDEC_IDX(engDesc))); - case ENG_OFA(0): - case ENG_OFA(1): + case ENG_CLASS_OFA: return !!NVGPU_GET_ENGINE_CAPS_MASK(rmEngineCaps, RM_ENGINE_TYPE_OFA(GET_OFA_IDX(engDesc))); - case ENG_NVJPEG(0): - case ENG_NVJPEG(1): - case ENG_NVJPEG(2): - case ENG_NVJPEG(3): - case ENG_NVJPEG(4): - case ENG_NVJPEG(5): - case ENG_NVJPEG(6): - case ENG_NVJPEG(7): + case ENG_CLASS_NVJPEG: return !!NVGPU_GET_ENGINE_CAPS_MASK(rmEngineCaps, RM_ENGINE_TYPE_NVJPEG(GET_NVJPEG_IDX(engDesc))); - case ENG_GR(1): - case ENG_GR(2): - case ENG_GR(3): - case ENG_GR(4): - case ENG_GR(5): - case ENG_GR(6): - case ENG_GR(7): + case ENG_CLASS_GR: { + if (engDesc == ENG_GR(0)) + { + return NV_TRUE; + } + KernelFifo *pKernelFifo = GPU_GET_KERNEL_FIFO(pGpu); NV_ASSERT_OR_RETURN(pKernelFifo != NULL, NV_FALSE); @@ -1050,7 +1026,7 @@ kbusCheckEngineWithOrderList_KERNEL bSupported); } - case ENG_INVALID: + case ENG_CLASS_INVALID: NV_PRINTF(LEVEL_ERROR, "Query for ENG_INVALID considered erroneous: %d\n", engDesc); @@ -1149,7 +1125,16 @@ kbusMapFbApertureSingle_IMPL Device *pDevice ) { - return kbusMapFbAperture_HAL(pGpu, pKernelBus, pMemDesc, offset, pAperOffset, pLength, flags, pDevice); + MemoryArea memArea; + MemoryRange memRange; + memArea.numRanges = 1; + memArea.pRanges = &memRange; + memRange.start = *pAperOffset; + NV_ASSERT_OK_OR_RETURN(kbusMapFbAperture_HAL(pGpu, pKernelBus, pMemDesc, mrangeMake(offset, *pLength), &memArea, + flags | BUS_MAP_FB_FLAGS_UNMANAGED_MEM_AREA, pDevice)); + *pLength = memRange.size; + *pAperOffset = memRange.start; + return NV_OK; } NV_STATUS @@ -1163,129 +1148,13 @@ kbusUnmapFbApertureSingle_IMPL NvU32 flags ) { - return kbusUnmapFbAperture_HAL(pGpu, pKernelBus, pMemDesc, aperOffset, length, flags); -} - -NV_STATUS -kbusMapFbApertureByHandle_IMPL -( - OBJGPU *pGpu, - KernelBus *pKernelBus, - NvHandle hClient, - NvHandle hMemory, - NvU64 offset, - NvU64 size, - NvU64 *pBar1Va, - Device *pDevice -) -{ - NV_STATUS status; - RsClient *pClient = NULL; - RsResourceRef *pSrcMemoryRef = NULL; - Memory *pSrcMemory = NULL; - MEMORY_DESCRIPTOR *pMemDesc = NULL; - NvU64 fbApertureOffset = 0; - NvU64 fbApertureLength = size; + MemoryArea memArea; + MemoryRange memRange = mrangeMake(aperOffset, length); - NV_ASSERT_OK_OR_RETURN(serverGetClientUnderLock(&g_resServ, hClient, &pClient)); + memArea.numRanges = 1; + memArea.pRanges = &memRange; - status = clientGetResourceRef(pClient, hMemory, &pSrcMemoryRef); - if (status != NV_OK) - { - return status; - } - - pSrcMemory = dynamicCast(pSrcMemoryRef->pResource, Memory); - if (pSrcMemory == NULL) - { - return NV_ERR_INVALID_OBJECT; - } - - pMemDesc = pSrcMemory->pMemDesc; - - if (memdescGetAddressSpace(pMemDesc) != ADDR_FBMEM) - { - return NV_ERR_INVALID_ARGUMENT; - } - - status = kbusMapFbApertureSingle(pGpu, pKernelBus, pMemDesc, offset, - &fbApertureOffset, &fbApertureLength, - BUS_MAP_FB_FLAGS_MAP_UNICAST, pDevice); - if (status != NV_OK) - { - return status; - } - - NV_ASSERT_OR_GOTO(fbApertureLength >= size, failed); - - if ((!NV_IS_ALIGNED64(fbApertureOffset, osGetPageSize())) || - (!NV_IS_ALIGNED64(fbApertureLength, osGetPageSize()))) - { - status = NV_ERR_NOT_SUPPORTED; - goto failed; - } - - *pBar1Va = gpumgrGetGpuPhysFbAddr(pGpu) + fbApertureOffset; - - if (!NV_IS_ALIGNED64(*pBar1Va, osGetPageSize())) - { - status = NV_ERR_INVALID_ADDRESS; - goto failed; - } - - return NV_OK; - -failed: - // Note: fbApertureLength is not used by kbusUnmapFbApertureSingle(), so it's passed as 0 - kbusUnmapFbApertureSingle(pGpu, pKernelBus, pMemDesc, - fbApertureOffset, 0, - BUS_MAP_FB_FLAGS_MAP_UNICAST); - - return status; -} - -NV_STATUS -kbusUnmapFbApertureByHandle_IMPL -( - OBJGPU *pGpu, - KernelBus *pKernelBus, - NvHandle hClient, - NvHandle hMemory, - NvU64 bar1Va -) -{ - NV_STATUS status; - RsClient *pClient = NULL; - RsResourceRef *pSrcMemoryRef = NULL; - Memory *pSrcMemory = NULL; - MEMORY_DESCRIPTOR *pMemDesc = NULL; - - NV_ASSERT_OK_OR_RETURN(serverGetClientUnderLock(&g_resServ, hClient, &pClient)); - - status = clientGetResourceRef(pClient, hMemory, &pSrcMemoryRef); - if (status != NV_OK) - { - return status; - } - - pSrcMemory = dynamicCast(pSrcMemoryRef->pResource, Memory); - if (pSrcMemory == NULL) - { - return NV_ERR_INVALID_OBJECT; - } - - pMemDesc = pSrcMemory->pMemDesc; - - // Note: fbApertureLength is not used by kbusUnmapFbApertureSingle(), so it's passed as 0 - status = kbusUnmapFbApertureSingle(pGpu, pKernelBus, pMemDesc, - bar1Va - gpumgrGetGpuPhysFbAddr(pGpu), - 0, BUS_MAP_FB_FLAGS_MAP_UNICAST); - if (status != NV_OK) - { - return status; - } - - return NV_OK; + return kbusUnmapFbAperture_HAL(pGpu, pKernelBus, pMemDesc, memArea, flags | BUS_MAP_FB_FLAGS_UNMANAGED_MEM_AREA); } /*! @@ -1450,6 +1319,12 @@ kbusUpdateRusdStatistics_IMPL NvU64 bar1AvailSize = 0; NV_RANGE bar1VARange = NV_RANGE_EMPTY; NvBool bZeroRusd = kbusIsBar1Disabled(pKernelBus); + + if (kbusIsStaticBar1Enabled(pGpu, pKernelBus)) + { + // PMA owns BAR1 info, so don't update. + return NV_OK; + } bZeroRusd = bZeroRusd || IS_MIG_ENABLED(pGpu); @@ -1473,8 +1348,8 @@ kbusUpdateRusdStatistics_IMPL // Minimize critical section, write data once we have it. pSharedData = gpushareddataWriteStart(pGpu, bar1MemoryInfo); - pSharedData->bar1Size = bar1Size; - pSharedData->bar1AvailSize = bar1AvailSize; + MEM_WR32(&pSharedData->bar1Size, bar1Size); + MEM_WR32(&pSharedData->bar1AvailSize, bar1AvailSize); gpushareddataWriteFinish(pGpu, bar1MemoryInfo); return NV_OK; diff --git a/src/nvidia/src/kernel/gpu/bus/kern_bus_ctrl.c b/src/nvidia/src/kernel/gpu/bus/kern_bus_ctrl.c index 40d9e16a02..348cb7219f 100644 --- a/src/nvidia/src/kernel/gpu/bus/kern_bus_ctrl.c +++ b/src/nvidia/src/kernel/gpu/bus/kern_bus_ctrl.c @@ -52,7 +52,7 @@ kbusControlGetCaps NvU32 caps = 0; // if the Chip is integrated. - if ( IsTEGRA(pGpu) ) + if ( IsTEGRA(pGpu) || pGpu->getProperty(pGpu, PDB_PROP_GPU_IS_SOC_SDM )) { caps |= NV2080_CTRL_BUS_INFO_CAPS_CHIP_INTEGRATED; } @@ -251,7 +251,7 @@ subdeviceCtrlCmdBusGetNvlinkPeerIdMask_IMPL KernelBus *pKernelBus = GPU_GET_KERNEL_BUS(pGpu); NvU32 gfid; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // This control call should always run in context of a VF. NV_ASSERT_OK_OR_RETURN(vgpuGetCallingContextGfid(pGpu, &gfid)); @@ -714,4 +714,4 @@ subdeviceCtrlCmdBusGetC2CInfo_VF pParams->remoteType = pVSI->c2cInfo.remoteType; return NV_OK; -} \ No newline at end of file +} diff --git a/src/nvidia/src/kernel/gpu/bus/p2p.c b/src/nvidia/src/kernel/gpu/bus/p2p.c index 6d2eaf59e2..a64088332a 100644 --- a/src/nvidia/src/kernel/gpu/bus/p2p.c +++ b/src/nvidia/src/kernel/gpu/bus/p2p.c @@ -87,7 +87,6 @@ NV_STATUS _constructMappingExtentInfo NvU64 address, NvU64 offset, NvU64 length, - NvU64 fbApertureOffset, MEMORY_DESCRIPTOR *pMemDesc, PCLI_THIRD_PARTY_P2P_MAPPING_EXTENT_INFO *ppExtentInfo ) @@ -119,7 +118,7 @@ NV_STATUS _constructMappingExtentInfo pExtentInfo->address = address; pExtentInfo->length = length; - pExtentInfo->fbApertureOffset = fbApertureOffset; + pExtentInfo->memArea.numRanges = 0; pExtentInfo->pMemDesc = pNewMemDesc; pExtentInfo->refCount = 1; @@ -152,9 +151,9 @@ NV_STATUS _createThirdPartyP2PMappingExtent NvU64 *pMappingLength ) { - NvU64 fbApertureOffset = 0; + MemoryArea memArea; NvU64 fbApertureMapLength = RM_ALIGN_UP(length, NVRM_P2P_PAGESIZE_BIG_64K); - NV_STATUS status; + NV_STATUS status = NV_OK; KernelBus *pKernelBus; PCLI_THIRD_PARTY_P2P_MAPPING_EXTENT_INFO pExtentInfoTmp; Device *pDevice = GPU_RES_GET_DEVICE(pSubDevice); @@ -185,56 +184,47 @@ NV_STATUS _createThirdPartyP2PMappingExtent pKernelBus = GPU_GET_KERNEL_BUS(pGpu); - // - // By the time the mapping extent is created, the range has been already - // verified to be correct has to fit in the memdesc. - // - NV_ASSERT(offset < memdescGetSize(pMemDesc)); - - status = _constructMappingExtentInfo(address, offset, - fbApertureMapLength, 0, pMemDesc, ppExtentInfo); - if (status != NV_OK) - { - goto out; - } + NV_ASSERT_OK_OR_RETURN(_constructMappingExtentInfo(address, offset, + fbApertureMapLength, pMemDesc, ppExtentInfo)); if (IS_VIRTUAL(pGpu) && gpuIsWarBug200577889SriovHeavyEnabled(pGpu)) { + memArea.numRanges = 1; + memArea.pRanges = &(*ppExtentInfo)->vgpuRange; + memArea.pRanges[0].size = fbApertureMapLength; NV_RM_RPC_MAP_MEMORY(pGpu, pClient->hClient, RES_GET_HANDLE(pDevice), pVidmemInfo->hMemory, offset, fbApertureMapLength, 0, - &fbApertureOffset, status); + &memArea.pRanges[0].start, status); + NV_ASSERT_OR_GOTO(status == NV_OK, cleanup); } else { if (!bGpuLockTaken) { - status = rmDeviceGpuLocksAcquire(pGpu, GPUS_LOCK_FLAGS_NONE, - RM_LOCK_MODULES_P2P); - NV_ASSERT_OR_GOTO(status == NV_OK, out); + NV_ASSERT_OK_OR_GOTO(status, rmDeviceGpuLocksAcquire(pGpu, GPUS_LOCK_FLAGS_NONE, + RM_LOCK_MODULES_P2P), cleanup); } - status = kbusMapFbApertureSingle(pGpu, pKernelBus, - (*ppExtentInfo)->pMemDesc, 0, - &fbApertureOffset, - &fbApertureMapLength, - BUS_MAP_FB_FLAGS_MAP_UNICAST, - pDevice); + status = kbusMapFbAperture_HAL(pGpu, pKernelBus, + (*ppExtentInfo)->pMemDesc, + mrangeMake(0, fbApertureMapLength), + &memArea, + BUS_MAP_FB_FLAGS_MAP_UNICAST | BUS_MAP_FB_FLAGS_ALLOW_DISCONTIG, + pDevice); if (!bGpuLockTaken) { rmDeviceGpuLocksRelease(pGpu, GPUS_LOCK_FLAGS_NONE, NULL); } - } - if (status != NV_OK) - { - goto out; + + NV_ASSERT_OR_GOTO(status == NV_OK, cleanup); } - (*ppExtentInfo)->fbApertureOffset = fbApertureOffset; + (*ppExtentInfo)->memArea = memArea; for (pExtentInfoTmp = listHead(pList); pExtentInfoTmp != NULL; @@ -253,52 +243,9 @@ NV_STATUS _createThirdPartyP2PMappingExtent *pMappingLength = length; *pMappingStart = 0; // starts at zero in the current allocation. -out: - if ((status != NV_OK) && (*ppExtentInfo != NULL)) - { - NV_STATUS tmpStatus = NV_OK; - - if (fbApertureMapLength != 0) - { - if (IS_VIRTUAL(pGpu) && gpuIsWarBug200577889SriovHeavyEnabled(pGpu)) - { - NV_RM_RPC_UNMAP_MEMORY(pGpu, pClient->hClient, - RES_GET_HANDLE(pDevice), - pVidmemInfo->hMemory, - 0, - fbApertureOffset, tmpStatus); - } - else - { - if (!bGpuLockTaken) - { - tmpStatus = rmDeviceGpuLocksAcquire(pGpu, GPUS_LOCK_FLAGS_NONE, - RM_LOCK_MODULES_P2P); - NV_ASSERT(tmpStatus == NV_OK); - - if (tmpStatus != NV_OK) - { - goto cleanup; - } - } - - tmpStatus = kbusUnmapFbApertureSingle(pGpu, pKernelBus, - (*ppExtentInfo)->pMemDesc, - fbApertureOffset, - fbApertureMapLength, - BUS_MAP_FB_FLAGS_MAP_UNICAST); - - if (!bGpuLockTaken) - { - rmDeviceGpuLocksRelease(pGpu, GPUS_LOCK_FLAGS_NONE, NULL); - } - } - NV_ASSERT(tmpStatus == NV_OK); - } - + return NV_OK; cleanup: - _freeMappingExtentInfo(*ppExtentInfo); - } + _freeMappingExtentInfo(*ppExtentInfo); return status; } @@ -430,15 +377,14 @@ NV_STATUS RmThirdPartyP2PMappingFree RES_GET_HANDLE(pDevice), pVidmemInfo->hMemory, 0, - pExtentInfo->fbApertureOffset, status); + pExtentInfo->memArea.pRanges[0].start, status); } else { - status = kbusUnmapFbApertureSingle(pGpu, pKernelBus, - pExtentInfo->pMemDesc, - pExtentInfo->fbApertureOffset, - pExtentInfo->length, - BUS_MAP_FB_FLAGS_MAP_UNICAST); + status = kbusUnmapFbAperture_HAL(pGpu, pKernelBus, + pExtentInfo->pMemDesc, + pExtentInfo->memArea, + BUS_MAP_FB_FLAGS_MAP_UNICAST); } NV_ASSERT(status == NV_OK); @@ -462,6 +408,74 @@ NV_STATUS RmThirdPartyP2PMappingFree return status; } +static void _thirdpartyp2pFillEntries(NvU64 **,NvU32 *, NvU64, MemoryArea, MemoryRange); + +static void +_thirdpartyp2pFillEntries +( + NvU64 **ppPhysicalAddresses, + NvU32 *pEntries, + NvU64 physicalFbAddress, + MemoryArea memArea, + MemoryRange memRange +) +{ + NvU64 idx; + NvU64 idy = *pEntries; + NvU64 rangeOffset = 0; + NvU64 lastAddr = mrangeLimit(memRange); + NvBool bDone = NV_FALSE; + + // + // TODO: replace this logic when MemoryArea iterators are introduced + // Initial loop to find which range the starting offset is in + // + for (idx = 0; idx < memArea.numRanges; idx++) + { + NvU64 size = memArea.pRanges[idx].size; + + // Check if this range contains the starting offset + if (mrangeContains(mrangeMake(rangeOffset, size), mrangeMake(memRange.start, 1))) + { + rangeOffset = memRange.start - rangeOffset; + break; + } + rangeOffset += size; + } + + // Now we start mapping - start with the idx corresponding to the correct range + for (; idx < memArea.numRanges && (!bDone); idx++) + { + // + // Add rangeOffset on the first iteration to get the correct offset into + // the first range. Set to 0 after the first iteration. Get the next mapping + // offset (into the memArea) and check whether we're already at the last range + // by checking if current range contains end address. + // + NvU64 beginRange = rangeOffset + memArea.pRanges[idx].start; + NvU64 nextMap = memRange.start + memArea.pRanges[idx].size - rangeOffset; + NvU64 endRange = mrangeLimit(memArea.pRanges[idx]); + + bDone = nextMap >= lastAddr; + endRange -= bDone ? (nextMap - lastAddr) : 0; + rangeOffset = 0; + + // Fill the ppPhysicalAddresses array with pages from the range. + while (beginRange < endRange) + { + (*ppPhysicalAddresses)[idy] = physicalFbAddress + beginRange; + idy++; + beginRange += NVRM_P2P_PAGESIZE_BIG_64K; + } + + // Set the next range starting offset (used for tracking when we need to exit) + memRange.start = nextMap; + } + + // Store current total entries. + *pEntries = idy; +} + /*! * @brief Gets BAR1 mapped pages. * @@ -496,11 +510,8 @@ NV_STATUS RmThirdPartyP2PBAR1GetPages NvU64 mappingLength = 0; NvU64 mappingOffset = 0; NvU64 lengthReq = 0; - NvU64 lastAddress; - NvU32 entries = 0; - NvU64 fbApertureOffset; - NvU64 physicalFbAddress; NvBool bFound; + NvU64 physicalFbAddress; NV_ASSERT_OR_RETURN((pGpu != NULL), NV_ERR_INVALID_ARGUMENT); NV_ASSERT_OR_RETURN((pMappingInfo != NULL), NV_ERR_INVALID_ARGUMENT); @@ -509,6 +520,8 @@ NV_STATUS RmThirdPartyP2PBAR1GetPages NV_ASSERT_OR_RETURN((ppPhysicalAddresses != NULL), NV_ERR_INVALID_ARGUMENT); NV_ASSERT_OR_RETURN((pEntries != NULL), NV_ERR_INVALID_ARGUMENT); + physicalFbAddress = gpumgrGetGpuPhysFbAddr(pGpu); + NV_PRINTF(LEVEL_INFO, "Requesting Bar1 mappings for address: 0x%llx, length: 0x%llx\n", address, length); @@ -587,39 +600,30 @@ NV_STATUS RmThirdPartyP2PBAR1GetPages if (pMappingInfo->pStart == NULL) pMappingInfo->pStart = pExtentInfo; - // fill page table entries - fbApertureOffset = pExtentInfo->fbApertureOffset + mappingOffset; - lastAddress = (address + mappingLength - 1); - while (address < lastAddress) - { - if (ppWreqMbH != NULL && ppRreqMbH != NULL) - { - (*ppWreqMbH)[entries] = 0; - (*ppRreqMbH)[entries] = 0; - } - - physicalFbAddress = gpumgrGetGpuPhysFbAddr(pGpu); - (*ppPhysicalAddresses)[entries] = (physicalFbAddress + - fbApertureOffset); - fbApertureOffset += NVRM_P2P_PAGESIZE_BIG_64K; - address += NVRM_P2P_PAGESIZE_BIG_64K; - offset += NVRM_P2P_PAGESIZE_BIG_64K; - entries++; - } + _thirdpartyp2pFillEntries(ppPhysicalAddresses, + pEntries, + physicalFbAddress, + pExtentInfo->memArea, + mrangeMake(mappingOffset, mappingLength)); length -= mappingLength; pMappingInfo->length += mappingLength; + address += mappingLength; + offset += mappingLength; } - *pEntries = entries; - -out: - if (status != NV_OK) + if (ppWreqMbH != NULL && ppRreqMbH != NULL) { - RmThirdPartyP2PMappingFree(pClient, pGpu, pVidmemInfo, pThirdPartyP2PInfo, - pSubDevice, pMappingInfo); + portMemSet(*ppWreqMbH, 0, sizeof((*ppWreqMbH)[0]) * (*pEntries)); + portMemSet(*ppRreqMbH, 0, sizeof((*ppRreqMbH)[0]) * (*pEntries)); } + + return NV_OK; + +out: + RmThirdPartyP2PMappingFree(pClient, pGpu, pVidmemInfo, pThirdPartyP2PInfo, + pSubDevice, pMappingInfo); return status; } @@ -968,10 +972,24 @@ static NvBool _isSpaceAvailableForBar1P2PMapping( GETBAR1INFO bar1Info; NV_STATUS status; MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); + NvBool bGpuLockTaken = (rmDeviceGpuLockIsOwner(gpuGetInstance(pGpu)) || + rmGpuLockIsOwner()); + + if (!bGpuLockTaken) + { + NV_ASSERT_OK_OR_RETURN(rmDeviceGpuLocksAcquire(pGpu, GPUS_LOCK_FLAGS_NONE, + RM_LOCK_MODULES_P2P)); + } status = memmgrGetBAR1InfoForDevice(pGpu, pMemoryManager, GPU_RES_GET_DEVICE(pSubDevice), &bar1Info); + + if (!bGpuLockTaken) + { + rmDeviceGpuLocksRelease(pGpu, GPUS_LOCK_FLAGS_NONE, NULL); + } + if (status != NV_OK) return NV_FALSE; diff --git a/src/nvidia/src/kernel/gpu/bus/third_party_p2p.c b/src/nvidia/src/kernel/gpu/bus/third_party_p2p.c index a165e94bb7..584d203205 100644 --- a/src/nvidia/src/kernel/gpu/bus/third_party_p2p.c +++ b/src/nvidia/src/kernel/gpu/bus/third_party_p2p.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2009-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2009-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -866,15 +866,14 @@ static NV_STATUS _thirdpartyp2pDelMappingInfoByKey RES_GET_PARENT_HANDLE(pSubdevice), pVidmemInfo->hMemory, 0, - pExtentInfo->fbApertureOffset, status); + pExtentInfo->memArea.pRanges[0].start, status); } else { - status = kbusUnmapFbApertureSingle(pGpu, pKernelBus, - pExtentInfo->pMemDesc, - pExtentInfo->fbApertureOffset, - pExtentInfo->length, - BUS_MAP_FB_FLAGS_MAP_UNICAST); + status = kbusUnmapFbAperture_HAL(pGpu, pKernelBus, + pExtentInfo->pMemDesc, + pExtentInfo->memArea, + BUS_MAP_FB_FLAGS_MAP_UNICAST); } NV_ASSERT(status == NV_OK); @@ -953,33 +952,20 @@ NV_STATUS thirdpartyp2pDelPersistentMappingInfoByKey_IMPL NV_STATUS CliAddThirdPartyP2PClientPid ( - NvHandle hClient, - NvHandle hThirdPartyP2P, - NvU32 pid, - NvU32 client + ThirdPartyP2P* pThirdPartyP2P, + NvU32 pid, + NvHandle hRegisterClient ) { - RsResourceRef *pThirdPartyP2PRef; - ThirdPartyP2P *pThirdPartyP2P; - NvU32 pidIndex; - RsClient *pClient; - - NV_ASSERT_OK_OR_RETURN( - serverGetClientUnderLock(&g_resServ, hClient, &pClient)); - - NV_ASSERT_OK_OR_RETURN( - clientGetResourceRef(pClient, - hThirdPartyP2P, - &pThirdPartyP2PRef)); + NvU32 pidIndex; - pThirdPartyP2P = dynamicCast(pThirdPartyP2PRef->pResource, ThirdPartyP2P); if (pThirdPartyP2P == NULL) { return NV_ERR_INVALID_OBJECT; } // Do not register another client if one already exists for this PID - if (thirdpartyp2pIsValidClientPid(pThirdPartyP2P, pid, client)) + if (thirdpartyp2pIsValidClientPid(pThirdPartyP2P, pid, hRegisterClient)) { return NV_OK; } @@ -991,7 +977,7 @@ CliAddThirdPartyP2PClientPid if (0 == pThirdPartyP2P->pidClientList[pidIndex].pid) { pThirdPartyP2P->pidClientList[pidIndex].pid = pid; - pThirdPartyP2P->pidClientList[pidIndex].hClient = client; + pThirdPartyP2P->pidClientList[pidIndex].hClient = hRegisterClient; return NV_OK; } } diff --git a/src/nvidia/src/kernel/gpu/bus/third_party_p2p_ctrl.c b/src/nvidia/src/kernel/gpu/bus/third_party_p2p_ctrl.c index 46d60e1645..1307907c84 100644 --- a/src/nvidia/src/kernel/gpu/bus/third_party_p2p_ctrl.c +++ b/src/nvidia/src/kernel/gpu/bus/third_party_p2p_ctrl.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2011-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2011-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -175,8 +175,6 @@ thirdpartyp2pCtrlCmdRegisterPid_IMPL NV503C_CTRL_REGISTER_PID_PARAMS *pRegisterPidParams ) { - NvHandle hClient = RES_GET_CLIENT_HANDLE(pThirdPartyP2P); - NvHandle hObject = RES_GET_HANDLE(pThirdPartyP2P); RmClient *pClient; NvU32 pid; NV_STATUS status; @@ -186,8 +184,7 @@ thirdpartyp2pCtrlCmdRegisterPid_IMPL pid = pClient->ProcID; - status = CliAddThirdPartyP2PClientPid(hClient, - hObject, + status = CliAddThirdPartyP2PClientPid(pThirdPartyP2P, pid, pRegisterPidParams->hClient); return status; diff --git a/src/nvidia/src/kernel/gpu/ce/arch/blackwell/kernel_ce_gb100.c b/src/nvidia/src/kernel/gpu/ce/arch/blackwell/kernel_ce_gb100.c index 77db790c70..605bc16dc4 100644 --- a/src/nvidia/src/kernel/gpu/ce/arch/blackwell/kernel_ce_gb100.c +++ b/src/nvidia/src/kernel/gpu/ce/arch/blackwell/kernel_ce_gb100.c @@ -37,6 +37,7 @@ #define NV_CE_SYSMEM_LCE_START_INDEX 0x2 #define NV_CE_SYSMEM_LCE_END_INDEX 0x4 #define NV_CE_LCE_4 0x4 +#define NV_MAX_C2C_LCES 0x2 /*! * @brief Returns the size of the PCE2LCE register array @@ -87,62 +88,6 @@ kceSetShimInstance_GB100 pKCe->shimInstance = pKCe->publicID / NV_KCE_GROUP_ID_STRIDE; } -/** - * @brief This function checks for whether input nv2080 engine type - * supports decompression workloads or nort - * - * @param[in] pGpu OBJGPU pointer - * @param[in] pKCe KernelCE pointer - * @param[in] nv2080EngineId NV2080_ENGINE_TYPE_* - */ -NvBool -kceCheckForDecompCapability_GB100 -( - OBJGPU *pGpu, - KernelCE *pKCe, - NvU32 nv2080EngineId -) -{ - NvBool decompCapPresent = NV_FALSE; - NV_STATUS status; - RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); - NV2080_CTRL_CE_GET_DECOMP_LCE_MASK_PARAMS params = {0}; - - NV2080_CTRL_CE_GET_LCE_SHIM_INFO_PARAMS shimParams = {0}; - shimParams.ceEngineType = nv2080EngineId; - status = pRmApi->Control(pRmApi, - pGpu->hInternalClient, - pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_CE_GET_LCE_SHIM_INFO, - &shimParams, - sizeof(shimParams)); - if (status != NV_OK) - goto done; - - params.shimInstance = shimParams.shimInstance; - - status = pRmApi->Control(pRmApi, - pGpu->hInternalClient, - pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_CE_GET_DECOMP_LCE_MASK, - ¶ms, - sizeof(params)); - if (status != NV_OK) - goto done; - - if (params.decompLceMask != 0) - { - // - // shimParams.shimLocalLceIdx will range from LCE 0-9 - // and so would params.decompLceMask since it returns mask for given shim instance - // - decompCapPresent = (NvBool)(NVBIT64(shimParams.shimLocalLceIdx) & params.decompLceMask); - } - -done: - return decompCapPresent; -} - /** * Return the pce-lce mappings and grce config * reg values when nvlink topology is NOT forced @@ -324,7 +269,11 @@ kceMapPceLceForDecomp_GB100 *pExposedLceMask |= NVBIT(lceIndex); pAvailablePceMaskForConnectingHub[hshubIndex] &= (~NVBIT(pceIndex)); numDecompPcesAssigned++; - + KernelCE *pKCeLce = GPU_GET_KCE(pGpu, lceIndex); + if(pKCeLce != NULL) + { + pKCeLce->ceCapsMask |= NVBIT32(CE_CAPS_DECOMPRESS); + } NV_PRINTF( LEVEL_INFO, "Decomp CE Mapping -- PCE Index: %d -> LCE Index: %d\n", @@ -393,7 +342,7 @@ _ceGetAlgorithmPceIndex } // If we've reached this point, then we have no more available PCEs to assign - NV_PRINTF(LEVEL_ERROR, "No more available PCEs to assign!\n"); + NV_PRINTF(LEVEL_INFO, "No more available PCEs to assign!\n"); return NV_FALSE; } @@ -564,6 +513,11 @@ kceMapPceLceForNvlinkPeers_GB100 // Convert absolute LCE index to shim local index // pKCe->pPceLceMap[pceIndex] = lceIndex % NV_KCE_GROUP_ID_STRIDE; + KernelCE *pKCeLce = GPU_GET_KCE(pGpu, lceIndex); + if(pKCeLce != NULL) + { + pKCeLce->ceCapsMask |= NVBIT32(CE_CAPS_NVLINK_P2P); + } NV_PRINTF(LEVEL_INFO, "Nvlink peer CE Mapping for GPU%d <-> GPU%d -- PCE Index: %d -> LCE Index: %d\n", pGpu->gpuInstance, pRemoteGpu->gpuInstance, @@ -652,7 +606,12 @@ kceMapPceLceForGRCE_GB100 { if (pKCeIter->pPceLceMap[pceIndex] != NV2080_CTRL_CE_UPDATE_PCE_LCE_MAPPINGS_INVALID_LCE) { - lceIndex = pKCeIter->pPceLceMap[pceIndex]; + lceIndex = pKCeIter->pPceLceMap[pceIndex]; + KernelCE *pKCeLce = GPU_GET_KCE(pGpu, lceIndex); + if(pKCeLce != NULL) + { + pKCeLce->ceCapsMask |= NVBIT32(CE_CAPS_GRCE); + } NV_PRINTF(LEVEL_INFO, "GRCE is shared and mapped to LCE Index: %d.\n", lceIndex); @@ -687,20 +646,22 @@ kceMapPceLceForPCIe_GB100 NvU32 *pExposedLceMask ) { - KernelCE *pKCeIter = NULL; - NvU32 maxLceCount; - NvU32 numPcesAssigned = 0; - NvU32 pceIndex; - NvU32 lceMask; - NvU32 lceIndex; - NvU32 hshubIndex; - NvU32 index; - NvU32 lastShimInstance = 0; - NvU32 numPcesPerLce; - NvU32 numLces; - NvU32 supportedPceMask; - NvU32 supportedLceMask; - NvU32 pcesPerHshub; + KernelCE *pKCeIter = NULL; + NvU32 maxLceCount; + NvU32 numPcesAssigned = 0; + NvU32 pceIndex; + NvU32 lceMask; + NvU32 lceIndex; + NvU32 hshubIndex; + NvU32 index; + NvU32 lastShimInstance = 0; + NvU32 numPcesPerLce; + NvU32 numLces; + NvU32 numLcesForPcieType; + NvU32 supportedPceMask; + NvU32 supportedLceMask; + NvU32 pcesPerHshub; + NV2080_CTRL_CE_LCE_TYPE pcieLceTypesToAssign[2]; kceGetPceConfigForLceType( pGpu, @@ -716,9 +677,41 @@ kceMapPceLceForPCIe_GB100 HIGHESTBITIDX_32(maxLceCount); // HIGHESTBITIDX_32 is destructive. maxLceCount++; + switch (numLces) + { + case 1: + pcieLceTypesToAssign[0] = NV2080_CTRL_CE_LCE_TYPE_PCIE; + break; + case 2: + pcieLceTypesToAssign[0] = NV2080_CTRL_CE_LCE_TYPE_PCIE_RD; + pcieLceTypesToAssign[1] = NV2080_CTRL_CE_LCE_TYPE_PCIE_WR; + break; + default: + NV_PRINTF(LEVEL_ERROR, "Invalid number of LCEs for PCIe.!\n"); + return; + } + + // + // Choose the last shim instance that has PCEs + // KCE_ITER_SHIM_BEGIN(pGpu, pKCeIter) { - lastShimInstance = NV_MAX(pKCeIter->shimInstance, lastShimInstance); + // + // Skip any shims that don't have any PCEs connected to the hubs + // + if (pKCeIter->shimConnectingHubMask == 0) + { + continue; + } + + hshubIndex = CE_GET_LOWEST_AVAILABLE_IDX(pKCeIter->shimConnectingHubMask); + pceIndex = CE_GET_LOWEST_AVAILABLE_IDX((pAvailablePceMaskForConnectingHub[hshubIndex] & + supportedPceMask)); + + if (pceIndex < kceGetPce2lceConfigSize1_HAL(pKCeIter)) + { + lastShimInstance = NV_MAX(pKCeIter->shimInstance, lastShimInstance); + } } KCE_ITER_END; @@ -732,12 +725,21 @@ kceMapPceLceForPCIe_GB100 continue; } - lceMask = kceGetLceMaskForShimInstance_HAL(pGpu, pKCeIter) & - supportedLceMask & - ~(*pExposedLceMask); - for (index = 0; index < numLces; ++index) { + kceGetPceConfigForLceType(pGpu, + pKCe, + pcieLceTypesToAssign[index], + &numPcesPerLce, + &numLcesForPcieType, + &supportedPceMask, + &supportedLceMask, + &pcesPerHshub); + + lceMask = kceGetLceMaskForShimInstance_HAL(pGpu, pKCeIter) & + supportedLceMask & + ~(*pExposedLceMask); + numPcesAssigned = 0; lceIndex = CE_GET_LOWEST_AVAILABLE_IDX(lceMask); @@ -746,39 +748,49 @@ kceMapPceLceForPCIe_GB100 break; } - FOR_EACH_INDEX_IN_MASK(32, hshubIndex, pKCeIter->shimConnectingHubMask) + while (numPcesAssigned < numPcesPerLce) { - if (numPcesAssigned >= numPcesPerLce) - { - break; - } + NvBool bPceAssignedInCurrentIteration = NV_FALSE; - if (pAvailablePceMaskForConnectingHub[hshubIndex] == 0) + FOR_EACH_INDEX_IN_MASK(32, hshubIndex, pKCeIter->shimConnectingHubMask) { - continue; - } + if (numPcesAssigned >= numPcesPerLce) + { + break; + } - pceIndex = CE_GET_LOWEST_AVAILABLE_IDX((pAvailablePceMaskForConnectingHub[hshubIndex] & supportedPceMask)); + if (pAvailablePceMaskForConnectingHub[hshubIndex] == 0) + { + continue; + } - if (pceIndex < kceGetPce2lceConfigSize1_HAL(pKCeIter)) - { - pAvailablePceMaskForConnectingHub[hshubIndex] &= ~(NVBIT32(pceIndex)); - // - // Convert absolute LCE index to shim local index - // - pKCeIter->pPceLceMap[pceIndex] = lceIndex % NV_KCE_GROUP_ID_STRIDE; - *pExposedLceMask |= NVBIT(lceIndex); - lceMask &= ~(NVBIT32(lceIndex)); + pceIndex = CE_GET_LOWEST_AVAILABLE_IDX((pAvailablePceMaskForConnectingHub[hshubIndex] & supportedPceMask)); - NV_PRINTF(LEVEL_INFO, - "PCIe CE Mapping -- PCE Index: %d -> LCE Index: %d\n", - pceIndex, - lceIndex); + if (pceIndex < kceGetPce2lceConfigSize1_HAL(pKCeIter)) + { + pAvailablePceMaskForConnectingHub[hshubIndex] &= ~(NVBIT32(pceIndex)); + // + // Convert absolute LCE index to shim local index + // + pKCeIter->pPceLceMap[pceIndex] = lceIndex % NV_KCE_GROUP_ID_STRIDE; + *pExposedLceMask |= NVBIT(lceIndex); + lceMask &= ~(NVBIT32(lceIndex)); + bPceAssignedInCurrentIteration = NV_TRUE; - ++numPcesAssigned; + NV_PRINTF(LEVEL_INFO, + "PCIe CE Mapping -- PCE Index: %d -> LCE Index: %d\n", + pceIndex, + lceIndex); + + ++numPcesAssigned; + } } + FOR_EACH_INDEX_IN_MASK_END; + + // If unable to assign anymore PCEs because of floorsweeping, break from the loop. + if (!bPceAssignedInCurrentIteration) + break; } - FOR_EACH_INDEX_IN_MASK_END; } } KCE_ITER_END; @@ -805,21 +817,25 @@ kceMapPceLceForC2C_GB100 NvU32 *pExposedLceMask ) { - KernelCE *pKCeIter = NULL; - NvU32 maxLceCount; - NvU32 pceIndex; - NvU32 lceIndex; - NvU32 lceMask; - NvU32 hshubIndex; - NvU32 index; - NvU32 lastShimInstance = 0; - NvU32 numPcesPerLce; - NvU32 numLces; - NvU32 supportedPceMask; - NvU32 supportedLceMask; - NvU32 pcesPerHshub; - NvU32 numC2CLcesToAssign; - NvBool bAssignedAtleastOneLce; + KernelCE *pKCeIter = NULL; + NvU32 c2cIndex = 0; + NvU32 maxLceCount; + NvU32 pceIndex; + NvU32 lceIndex; + NvU32 lceMask; + NvU32 hshubIndex; + NvU32 index; + NvU32 lastShimInstance = 0; + NvU32 numPcesPerLce; + NvU32 numLces; + NvU32 numLcesForC2CType; + NvU32 supportedPceMask; + NvU32 supportedLceMask; + NvU32 pcesPerHshub; + NvU32 numC2CLcesToAssign; + NvBool bAssignedAtleastOneLce; + NvU32 numPcesAssigned; + NV2080_CTRL_CE_LCE_TYPE c2cLceTypesToAssign[NV_MAX_C2C_LCES]; kceGetPceConfigForLceType(pGpu, pKCe, @@ -834,6 +850,20 @@ kceMapPceLceForC2C_GB100 HIGHESTBITIDX_32(maxLceCount); // HIGHESTBITIDX_32 is destructive. maxLceCount++; + switch (numLces) + { + case 1: + c2cLceTypesToAssign[0] = NV2080_CTRL_CE_LCE_TYPE_C2C; + break; + case 2: + c2cLceTypesToAssign[0] = NV2080_CTRL_CE_LCE_TYPE_C2C_H2D; + c2cLceTypesToAssign[1] = NV2080_CTRL_CE_LCE_TYPE_C2C_D2H; + break; + default: + NV_PRINTF(LEVEL_ERROR, "Invalid number of LCEs for C2C.!\n"); + return NV_ERR_INSUFFICIENT_RESOURCES; + } + // Choose the last shim instance that has PCEs KCE_ITER_SHIM_BEGIN(pGpu, pKCeIter) { @@ -862,19 +892,30 @@ kceMapPceLceForC2C_GB100 continue; } - lceMask = kceGetLceMaskForShimInstance_HAL(pGpu, pKCeIter) & - supportedLceMask & - ~(*pExposedLceMask); - - if ((lceMask & NV_CE_EVEN_ASYNC_LCE_MASK) != 0) - { - lceMask &= NV_CE_EVEN_ASYNC_LCE_MASK; - } - numC2CLcesToAssign = numLces; while (numC2CLcesToAssign > 0) { + kceGetPceConfigForLceType(pGpu, + pKCe, + c2cLceTypesToAssign[c2cIndex], + &numPcesPerLce, + &numLcesForC2CType, + &supportedPceMask, + &supportedLceMask, + &pcesPerHshub); + + lceMask = kceGetLceMaskForShimInstance_HAL(pGpu, pKCeIter) & + supportedLceMask & + ~(*pExposedLceMask); + + numPcesAssigned = 0; + + if ((lceMask & NV_CE_EVEN_ASYNC_LCE_MASK) != 0) + { + lceMask &= NV_CE_EVEN_ASYNC_LCE_MASK; + } + bAssignedAtleastOneLce = NV_FALSE; lceIndex = CE_GET_LOWEST_AVAILABLE_IDX(lceMask); if (lceIndex >= maxLceCount) @@ -890,6 +931,11 @@ kceMapPceLceForC2C_GB100 continue; } + if (numPcesAssigned == numPcesPerLce) + { + break; + } + for (index = 0; index < pcesPerHshub; ++index) { pceIndex = CE_GET_LOWEST_AVAILABLE_IDX((pAvailablePceMaskForConnectingHub[hshubIndex] & supportedPceMask)); @@ -907,7 +953,12 @@ kceMapPceLceForC2C_GB100 *pExposedLceMask |= NVBIT32(lceIndex); bAssignedAtleastOneLce = NV_TRUE; - + numPcesAssigned++; + KernelCE *pKCeLce = GPU_GET_KCE(pGpu, lceIndex); + if(pKCeLce != NULL) + { + pKCeLce->ceCapsMask |= NVBIT32(CE_CAPS_C2C_P2P); + } NV_PRINTF(LEVEL_INFO, "C2C CE Mapping -- PCE Index: %d -> LCE Index: %d\n", pceIndex, @@ -919,6 +970,7 @@ kceMapPceLceForC2C_GB100 if (bAssignedAtleastOneLce) { --numC2CLcesToAssign; + ++c2cIndex; } else { @@ -980,9 +1032,27 @@ kceMapPceLceForScrub_GB100 HIGHESTBITIDX_32(maxLceCount); // HIGHESTBITIDX_32 is destructive. maxLceCount++; + // + // Choose the last shim instance that has PCEs + // KCE_ITER_SHIM_BEGIN(pGpu, pKCeIter) { - lastShimInstance = NV_MAX(pKCeIter->shimInstance, lastShimInstance); + // + // Skip any shims that don't have any PCEs connected to the hubs + // + if (pKCeIter->shimConnectingHubMask == 0) + { + continue; + } + + hshubIndex = CE_GET_LOWEST_AVAILABLE_IDX(pKCeIter->shimConnectingHubMask); + pceIndex = CE_GET_LOWEST_AVAILABLE_IDX((pAvailablePceMaskForConnectingHub[hshubIndex] & + supportedPceMask)); + + if (pceIndex < kceGetPce2lceConfigSize1_HAL(pKCeIter)) + { + lastShimInstance = NV_MAX(pKCeIter->shimInstance, lastShimInstance); + } } KCE_ITER_END; @@ -1034,6 +1104,11 @@ kceMapPceLceForScrub_GB100 *pExposedLceMask |= NVBIT32(lceIndex); + KernelCE *pKCeLce = GPU_GET_KCE(pGpu, lceIndex); + if(pKCeLce != NULL) + { + pKCeLce->ceCapsMask |= NVBIT32(CE_CAPS_SCRUB); + } NV_PRINTF(LEVEL_INFO, "Scrub CE Mapping -- PCE Index: %d -> LCE Index: %d\n", pceIndex, @@ -1257,11 +1332,11 @@ kceGetMappings_GB100 pKCeShimOwner, availablePceMaskForConnectingHub, pExposedLceMask); - + // After assigninig the PCE, update CE CAPS mask // // B) Next, assign PCEs for PCIe or C2C case // - if (bIsC2CEnabled) + if (gpuIsSelfHosted(pGpu) && bIsC2CEnabled) { kceMapPceLceForC2C_HAL(pGpu, pKCeShimOwner, @@ -1276,7 +1351,6 @@ kceGetMappings_GB100 availablePceMaskForConnectingHub, pExposedLceMask); } - // // C) First, assign PCEs to Peers if nvlink is enabled or NVswitch enabled // @@ -1288,7 +1362,6 @@ kceGetMappings_GB100 pLocalPceLceMap, pExposedLceMask); } - // // D) Assign PCEs for Scrub // @@ -1353,6 +1426,22 @@ kceGetSysmemRWLCEs_GB100 NvU32 count; KernelCE *pKCeShimIter; KernelCE *pKCeIter; + NvU32 numPcesPerLce; + NvU32 numLces; + NvU32 supportedPceMask; + NvU32 supportedLceMask; + NvU32 pcesPerHshub; + NvU32 shimOffset; + + kceGetPceConfigForLceType( + pGpu, + pKCe, + NV2080_CTRL_CE_LCE_TYPE_PCIE, + &numPcesPerLce, + &numLces, + &supportedPceMask, + &supportedLceMask, + &pcesPerHshub); KCE_ITER_SHIM_BEGIN(pGpu, pKCeShimIter) { @@ -1361,9 +1450,11 @@ kceGetSysmemRWLCEs_GB100 assignedLces[0] = NV2080_CTRL_CE_UPDATE_PCE_LCE_MAPPINGS_INVALID_LCE; assignedLces[1] = NV2080_CTRL_CE_UPDATE_PCE_LCE_MAPPINGS_INVALID_LCE; - KCE_ITER_BEGIN(pGpu, pKCeShimIter, pKCeIter, NV_CE_SYSMEM_LCE_START_INDEX) + shimOffset = NV_KCE_GROUP_ID_STRIDE * pKCeShimIter->shimInstance; + + KCE_ITER_BEGIN(pGpu, pKCeShimIter, pKCeIter, shimOffset + NV_CE_SYSMEM_LCE_START_INDEX) { - if (pKCeIter->publicID >= NV_CE_SYSMEM_LCE_END_INDEX) + if ((pKCeIter->publicID - shimOffset) > NV_CE_SYSMEM_LCE_END_INDEX) { break; } @@ -1379,6 +1470,17 @@ kceGetSysmemRWLCEs_GB100 *pWriteLce = assignedLces[1]; return; } + + // + // If there is just one LCE assigned for sysmem, use the same for both + // read and write operations. + // + if (count == 1 && numLces == 1) + { + *pReadLce = assignedLces[0]; + *pWriteLce = assignedLces[0]; + return; + } } KCE_ITER_END; } @@ -1406,3 +1508,75 @@ kceGetLceMaskForShimInstance_GB100 return kceGetLceMask(pGpu) & shimMask; } + +/** + * @brief Returns true if the current LCE is assigned for Sysmem Rd. + * + * @param[in] pGpu OBJGPU pointer + * @param[in] pKCe KernelCE pointer + */ +NvBool +kceIsCeSysmemRead_GB100 +( + OBJGPU *pGpu, + KernelCE *pKCe +) +{ + NvU32 rdLce, wrLce; + kceGetSysmemRWLCEs_HAL(pGpu, pKCe, &rdLce, &wrLce); + return (rdLce == pKCe->publicID); +} + +/** + * @brief Returns true if the current LCE is assigned for Sysmem Wr. + * + * @param[in] pGpu OBJGPU pointer + * @param[in] pKCe KernelCE pointer + */ +NvBool +kceIsCeSysmemWrite_GB100 +( + OBJGPU *pGpu, + KernelCE *pKCe +) +{ + NvU32 rdLce, wrLce; + kceGetSysmemRWLCEs_HAL(pGpu, pKCe, &rdLce, &wrLce); + return (wrLce == pKCe->publicID); +} + +/** + * @brief Sets the CE capabilities based on PCE-LCE mapping algorithm + * + * @param[in] pGpu OBJGPU pointer + * @param[in] pKCe KernelCE pointer + * @param[in] pKCeCaps CE capabilities table + */ +void +kceAssignCeCaps_GB100 +( + OBJGPU *pGpu, + KernelCE *pKCe, + NvU8 *pKCeCaps +) +{ + KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); + + if (kceIsCeSysmemRead_HAL(pGpu, pKCe)) + { + NV_PRINTF(LEVEL_INFO, "LCE %d assigned for Sysmem Rd.\n", pKCe->publicID); + RMCTRL_SET_CAP(pKCeCaps, NV2080_CTRL_CE_CAPS, _CE_SYSMEM_READ); + } + + if (kceIsCeSysmemWrite_HAL(pGpu, pKCe)) + { + NV_PRINTF(LEVEL_INFO, "LCE %d assigned for Sysmem Wr.\n", pKCe->publicID); + RMCTRL_SET_CAP(pKCeCaps, NV2080_CTRL_CE_CAPS, _CE_SYSMEM_WRITE); + } + + if (pKernelNvlink != NULL && kceIsCeNvlinkP2P_HAL(pGpu, pKCe)) + { + NV_PRINTF(LEVEL_INFO, "LCE %d assigned for NVLINK.\n", pKCe->publicID); + RMCTRL_SET_CAP(pKCeCaps, NV2080_CTRL_CE_CAPS, _CE_NVLINK_P2P); + } +} diff --git a/src/nvidia/src/kernel/gpu/ce/arch/hopper/kernel_ce_gh100.c b/src/nvidia/src/kernel/gpu/ce/arch/hopper/kernel_ce_gh100.c index bdfa17d9d4..99ce0c9645 100644 --- a/src/nvidia/src/kernel/gpu/ce/arch/hopper/kernel_ce_gh100.c +++ b/src/nvidia/src/kernel/gpu/ce/arch/hopper/kernel_ce_gh100.c @@ -1159,7 +1159,7 @@ NV_STATUS kceGetP2PCes_GH100(KernelCE *pKCe, OBJGPU *pGpu, NvU32 gpuMask, NvU32 // KCE_ITER_BEGIN(pGpu, pKCe, pKCeLoop, minP2PLce) NvU32 localMaxPcePerHshub = 0; - KernelCE *localMaxLcePerHshub; + KernelCE *localMaxLcePerHshub = NULL; NvU32 localMaxHshub = NV_CE_MAX_HSHUBS; // if LCE is stubbed or LCE is already assigned to another peer @@ -1245,3 +1245,18 @@ NV_STATUS kceGetP2PCes_GH100(KernelCE *pKCe, OBJGPU *pGpu, NvU32 gpuMask, NvU32 return NV_OK; } + +/*! Determine if CE support confidential compute secure copy */ +NvBool kceIsSecureCe_GH100(OBJGPU *pGpu, KernelCE *pKCe) +{ + NV_STATUS status; + NvU8 ceCaps[NV2080_CTRL_CE_CAPS_TBL_SIZE]; + + NV_ASSERT_OK_OR_ELSE(status, + kceGetDeviceCaps(pGpu, pKCe, RM_ENGINE_TYPE_COPY(pKCe->publicID), ceCaps), + return NV_FALSE); + + return (NV2080_CTRL_CE_GET_CAP(ceCaps, NV2080_CTRL_CE_CAPS_CE_CC_SECURE) != 0) ? + NV_TRUE : NV_FALSE; +}; + diff --git a/src/nvidia/src/kernel/gpu/ce/arch/pascal/kernel_ce_gp100.c b/src/nvidia/src/kernel/gpu/ce/arch/pascal/kernel_ce_gp100.c index 54ad097f25..d086289624 100644 --- a/src/nvidia/src/kernel/gpu/ce/arch/pascal/kernel_ce_gp100.c +++ b/src/nvidia/src/kernel/gpu/ce/arch/pascal/kernel_ce_gp100.c @@ -81,36 +81,15 @@ NV_STATUS kceStateLoad_GP100(OBJGPU *pGpu, KernelCE *pKCe, NvU32 flags) if (gpuIsCCFeatureEnabled(pGpu)) { - ConfidentialCompute *pCC = GPU_GET_CONF_COMPUTE(pGpu); - - switch (pKCe->publicID) + if (kceIsSecureCe_HAL(pGpu, pKCe)) { - case 2: - NV_ASSERT_OK_OR_RETURN(confComputeDeriveSecrets(pCC, MC_ENGINE_IDX_CE2)); - break; - case 3: - NV_ASSERT_OK_OR_RETURN(confComputeDeriveSecrets(pCC, MC_ENGINE_IDX_CE3)); - break; - case 4: - NV_ASSERT_OK_OR_RETURN(confComputeDeriveSecrets(pCC, MC_ENGINE_IDX_CE4)); - break; - case 5: - NV_ASSERT_OK_OR_RETURN(confComputeDeriveSecrets(pCC, MC_ENGINE_IDX_CE5)); - break; - case 6: - NV_ASSERT_OK_OR_RETURN(confComputeDeriveSecrets(pCC, MC_ENGINE_IDX_CE6)); - break; - case 7: - NV_ASSERT_OK_OR_RETURN(confComputeDeriveSecrets(pCC, MC_ENGINE_IDX_CE7)); - break; - case 8: - NV_ASSERT_OK_OR_RETURN(confComputeDeriveSecrets(pCC, MC_ENGINE_IDX_CE8)); - break; - case 9: - NV_ASSERT_OK_OR_RETURN(confComputeDeriveSecrets(pCC, MC_ENGINE_IDX_CE9)); - break; - default: - break; + ConfidentialCompute *pCC = GPU_GET_CONF_COMPUTE(pGpu); + + NvU32 mcEngineIdx = MC_ENGINE_IDX_CE(pKCe->publicID); + + NV_ASSERT_OR_RETURN(mcEngineIdx <= MC_ENGINE_IDX_CE_MAX, NV_ERR_NOT_SUPPORTED); + + NV_ASSERT_OK_OR_RETURN(confComputeDeriveSecrets(pCC, mcEngineIdx)); } } return NV_OK; @@ -323,3 +302,24 @@ kceGetNvlinkMaxTopoForTable_GP100 portMemFree(pCachedTopo); return result; } + +/** + * @brief Sets the CE capabilities based on PCE-LCE mapping algorithm + * + * @param[in] pGpu OBJGPU pointer + * @param[in] pKCe KernelCE pointer + * @param[in] pKCeCaps CE capabilities table + */ +void +kceAssignCeCaps_GP100 +( + OBJGPU *pGpu, + KernelCE *pKCe, + NvU8 *pKCeCaps +) +{ + KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); + + if (pKernelNvlink != NULL) + kceGetNvlinkCaps(pGpu, pKCe, pKCeCaps); +} diff --git a/src/nvidia/src/kernel/gpu/ce/kernel_ce.c b/src/nvidia/src/kernel/gpu/ce/kernel_ce.c index 0b88825f44..1f42306c42 100644 --- a/src/nvidia/src/kernel/gpu/ce/kernel_ce.c +++ b/src/nvidia/src/kernel/gpu/ce/kernel_ce.c @@ -33,8 +33,13 @@ #include "vgpu/sdk-structures.h" #include "nvrm_registry.h" +#include "gpu/spdm/spdm.h" +#include "gpu/conf_compute/conf_compute.h" +#include "ctrl/ctrl2080/ctrl2080spdm.h" #include "gpu/conf_compute/ccsl.h" +#define IV_NUM_DWORDS 3 + NV_STATUS kceConstructEngine_IMPL(OBJGPU *pGpu, KernelCE *pKCe, ENGDESCRIPTOR engDesc) { NV_ASSERT_OR_RETURN(!RMCFG_FEATURE_PLATFORM_GSP, NV_ERR_NOT_SUPPORTED); @@ -51,7 +56,7 @@ NV_STATUS kceConstructEngine_IMPL(OBJGPU *pGpu, KernelCE *pKCe, ENGDESCRIPTOR en pKCe->bIsAutoConfigEnabled = NV_TRUE; pKCe->bUseGen4Mapping = NV_FALSE; - + pKCe->ceCapsMask = 0; NvU32 data32 = 0; if ((osReadRegistryDword(pGpu, NV_REG_STR_RM_CE_ENABLE_AUTO_CONFIG, &data32) == NV_OK) && (data32 == NV_REG_STR_RM_CE_ENABLE_AUTO_CONFIG_FALSE)) @@ -96,12 +101,76 @@ NvBool kceIsNewMissingEngineRemovalSequenceEnabled_IMPL(OBJGPU *pGpu, KernelCE * return NV_TRUE; } -#define CE_FIPS_SELF_TEST_DATA_SIZE 16 -#define CE_FIPS_SELF_TEST_AUTH_TAG_SIZE 16 -#define CE_FIPS_SELF_TEST_IV_SIZE 12 +static NV_STATUS +spdmSendTestCommand +( + OBJGPU *pGpu, + pCcslContext pCcslCtx, + NvU8 *text, + size_t textSize, + NvU8 *authTag, + size_t authTagSize, + NvU32 *iv, + size_t ivSize, + NvU8 *encData, + size_t encDataSize, + NvU8 isEnc +) +{ + NV_STATUS status = NV_OK; + RM_API *pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); + RMTIMEOUT timeout; + ConfidentialCompute *pCC = GPU_GET_CONF_COMPUTE(pGpu); + Spdm *pSpdm = pCC->pSpdm; + + NVC56F_CTRL_CMD_GET_KMB_PARAMS getKmbParams = {0}; + NV2080_CTRL_INTERNAL_SPDM_PARTITION_PARAMS params = {0}; + status = pRmApi->Control(pRmApi, pCcslCtx->hClient, pCcslCtx->hChannel, + NVC56F_CTRL_CMD_GET_KMB, &getKmbParams, + sizeof(getKmbParams)); -NV_STATUS -kceRunFipsSelfTest + NV_ASSERT_OK_OR_RETURN(status); + + if (pGpu == NULL || pSpdm == NULL || !pSpdm->bSessionEstablished) + { + return NV_ERR_INVALID_ARGUMENT; + } + + portMemCopy(¶ms.cmd.ccFipsTest.kmb, sizeof(params.cmd.ccFipsTest.kmb), &getKmbParams.kmb, sizeof(getKmbParams.kmb)); + + if (!isEnc) + { + portMemCopy(¶ms.cmd.ccFipsTest.kmb.decryptBundle.iv, ivSize, iv, ivSize); + portMemCopy(¶ms.cmd.ccFipsTest.text, textSize, text, textSize); + portMemCopy(¶ms.cmd.ccFipsTest.authTag, authTagSize, authTag, authTagSize); + } + else + { + portMemCopy(¶ms.cmd.ccFipsTest.text, textSize, text, textSize); + } + + params.cmd.cmdType = RM_GSP_SPDM_CMD_ID_FIPS_SELFTEST; + params.cmd.ccFipsTest.isEnc = isEnc; + gpuSetTimeout(pGpu, GPU_TIMEOUT_DEFAULT, &timeout, 0); + status = spdmCtrlSpdmPartition(pGpu, ¶ms); + + NV_ASSERT_OK_OR_RETURN(status); + + // Perform basic validation of header returned. + status = params.msg.status; + + NV_ASSERT_OK_OR_RETURN(status); + + if (isEnc) { + portMemCopy(encData, encDataSize, params.cmd.ccFipsTest.text, encDataSize); + portMemCopy(authTag, authTagSize, params.cmd.ccFipsTest.authTag, authTagSize); + } + + return NV_OK; +} + +static NV_STATUS +kceRunFipsSelfTestDecrypt ( OBJGPU *pGpu, void *pArg @@ -119,19 +188,20 @@ kceRunFipsSelfTest NV_STATUS status; NV0050_ALLOCATION_PARAMETERS ceUtilsParams = {0}; CEUTILS_MEMCOPY_PARAMS params = {0}; + NvU32 Ivl[IV_NUM_DWORDS] = {0}; NvU8 ceTestPlaintext[CE_FIPS_SELF_TEST_DATA_SIZE] = { 0x2d, 0x71, 0xbc, 0xfa, 0x91, 0x4e, 0x4a, 0xc0, 0x45, 0xb2, 0xaa, 0x60, 0x95, 0x5f, 0xad, 0x24 }; - NvU8 decryptedData[CE_FIPS_SELF_TEST_DATA_SIZE] = { 0 }; NvU8 encryptedData[CE_FIPS_SELF_TEST_DATA_SIZE] = { 0 }; NvU8 dataAuth[CE_FIPS_SELF_TEST_AUTH_TAG_SIZE] = { 0 }; NV_ASSERT_OR_RETURN(gpuIsCCFeatureEnabled(pGpu), NV_ERR_NOT_SUPPORTED); if (!gpuCheckEngineTable(pGpu, RM_ENGINE_TYPE_COPY(pKCe->publicID)) || - ceIsCeGrce(pGpu, RM_ENGINE_TYPE_COPY(pKCe->publicID))) + ceIsCeGrce(pGpu, RM_ENGINE_TYPE_COPY(pKCe->publicID)) || + kceIsDecompLce(pGpu, pKCe->publicID)) { // CE doesn't support encryption return NV_OK; @@ -178,6 +248,7 @@ kceRunFipsSelfTest TRANSFER_SURFACE srcSurface = { .pMemDesc = pSrcMemDesc, .offset = 0 }; TRANSFER_SURFACE dstSurface = { .pMemDesc = pDstMemDesc, .offset = 0 }; TRANSFER_SURFACE authSurface = { .pMemDesc = pAuthMemDesc, .offset = 0 }; + TRANSFER_SURFACE ivSurface = { .pMemDesc = pIvMemDesc, .offset = 0 }; // Write data to allocations, encrypt using CE, and read back the results NV_ASSERT_OK_OR_GOTO(status, memmgrMemDescMemSet(pMemoryManager, pDstMemDesc, 0, 0), failed); @@ -202,17 +273,130 @@ kceRunFipsSelfTest NV_ASSERT_OK_OR_GOTO(status, memmgrMemRead(pMemoryManager, &authSurface, dataAuth, sizeof dataAuth, TRANSFER_FLAGS_NONE), failed); - // Decrypt using CPU and validate NV_ASSERT_OK_OR_GOTO(status, - ccslDecrypt_HAL(pCcslCtx, sizeof decryptedData, encryptedData, NULL, NV_U32_MAX, NULL, 0, decryptedData, dataAuth), + memmgrMemRead(pMemoryManager, &ivSurface, Ivl, sizeof Ivl, TRANSFER_FLAGS_NONE), failed); + + NV_ASSERT_OK_OR_GOTO(status, spdmSendTestCommand(pGpu, pCcslCtx, encryptedData, sizeof encryptedData, + dataAuth, sizeof dataAuth, Ivl, sizeof Ivl, NULL, 0, NV_FALSE), failed); + +failed: + ccslContextClear(pCcslCtx); + objDelete(pCeUtils); + memdescFree(pSrcMemDesc); + memdescDestroy(pSrcMemDesc); + memdescFree(pDstMemDesc); + memdescDestroy(pDstMemDesc); + memdescFree(pAuthMemDesc); + memdescDestroy(pAuthMemDesc); + memdescFree(pIvMemDesc); + memdescDestroy(pIvMemDesc); + + NV_PRINTF(LEVEL_INFO, "Test finished with status 0x%x\n", status); + + return status; +} + +static NV_STATUS +kceRunFipsSelfTestEncrypt +( + OBJGPU *pGpu, + void *pArg +) +{ + KernelCE *pKCe = pArg; + MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); + KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); + MEMORY_DESCRIPTOR *pSrcMemDesc = NULL; + MEMORY_DESCRIPTOR *pDstMemDesc = NULL; + MEMORY_DESCRIPTOR *pAuthMemDesc = NULL; + MEMORY_DESCRIPTOR *pIvMemDesc = NULL; + CeUtils *pCeUtils = NULL; + pCcslContext pCcslCtx = NULL; + NV_STATUS status; + NV0050_ALLOCATION_PARAMETERS ceUtilsParams = {0}; + CEUTILS_MEMCOPY_PARAMS params = {0}; + NvU32 Ivl[IV_NUM_DWORDS] = {0}; + + NvU8 ceTestPlaintext[CE_FIPS_SELF_TEST_DATA_SIZE] = { + 0x2d, 0x71, 0xbc, 0xfa, 0x91, 0x4e, 0x4a, 0xc0, + 0x45, 0xb2, 0xaa, 0x60, 0x95, 0x5f, 0xad, 0x24 + }; + NvU8 decryptedData[CE_FIPS_SELF_TEST_DATA_SIZE] = { 0 }; + NvU8 encryptedData[CE_FIPS_SELF_TEST_DATA_SIZE] = { 0 }; + NvU8 dataAuth[CE_FIPS_SELF_TEST_AUTH_TAG_SIZE] = { 0 }; + + NV_ASSERT_OR_RETURN(gpuIsCCFeatureEnabled(pGpu), NV_ERR_NOT_SUPPORTED); + + if (!gpuCheckEngineTable(pGpu, RM_ENGINE_TYPE_COPY(pKCe->publicID)) || + ceIsCeGrce(pGpu, RM_ENGINE_TYPE_COPY(pKCe->publicID))) + { + // CE doesn't support encryption + return NV_OK; + } + + if (kmigmgrIsMIGSupported(pGpu, pKernelMIGManager) && + kmigmgrGetStaticInfo(pGpu, pKernelMIGManager) == NULL) + { + // Wait for KernelMigManager, as it might remap CEs + return NV_WARN_MORE_PROCESSING_REQUIRED; + } + + NV_PRINTF(LEVEL_INFO, "Running FIPS test for CE%u\n", pKCe->publicID); + + ceUtilsParams.flags |= DRF_DEF(0050_CEUTILS, _FLAGS, _FORCE_CE_ID, _TRUE); + ceUtilsParams.flags |= DRF_DEF(0050_CEUTILS, _FLAGS, _CC_SECURE, _TRUE); + ceUtilsParams.forceCeId = pKCe->publicID; + + NV_ASSERT_OK_OR_GOTO(status, + objCreate(&pCeUtils, pMemoryManager, CeUtils, ENG_GET_GPU(pMemoryManager), NULL, &ceUtilsParams), failed); + + NV_ASSERT_OK_OR_GOTO(status, + ccslContextInitViaChannel_HAL(&pCcslCtx, pCeUtils->pChannel->hClient, + pCeUtils->pChannel->subdeviceId, + pCeUtils->pChannel->channelId), failed); - NV_ASSERT_TRUE_OR_GOTO(status, portMemCmp(decryptedData, ceTestPlaintext, sizeof ceTestPlaintext) == 0, - NV_ERR_INVALID_STATE, failed); + NV_ASSERT_OK_OR_GOTO(status, memdescCreate(&pSrcMemDesc, pGpu, sizeof ceTestPlaintext, 0, NV_TRUE, ADDR_FBMEM, + NV_MEMORY_UNCACHED, MEMDESC_ALLOC_FLAGS_PROTECTED), failed); + NV_ASSERT_OK_OR_GOTO(status, memdescAlloc(pSrcMemDesc), failed); + + NV_ASSERT_OK_OR_GOTO(status, memdescCreate(&pDstMemDesc, pGpu, sizeof encryptedData, 0, NV_TRUE, ADDR_SYSMEM, + NV_MEMORY_UNCACHED, MEMDESC_FLAGS_ALLOC_IN_UNPROTECTED_MEMORY), failed); + NV_ASSERT_OK_OR_GOTO(status, memdescAlloc(pDstMemDesc), failed); + + NV_ASSERT_OK_OR_GOTO(status, memdescCreate(&pAuthMemDesc, pGpu, sizeof dataAuth, 0, NV_TRUE, ADDR_SYSMEM, + NV_MEMORY_UNCACHED, MEMDESC_FLAGS_ALLOC_IN_UNPROTECTED_MEMORY), failed); + NV_ASSERT_OK_OR_GOTO(status, memdescAlloc(pAuthMemDesc), failed); + + NV_ASSERT_OK_OR_GOTO(status, memdescCreate(&pIvMemDesc, pGpu, sizeof Ivl, 0, NV_TRUE, ADDR_SYSMEM, + NV_MEMORY_UNCACHED, MEMDESC_FLAGS_ALLOC_IN_UNPROTECTED_MEMORY), failed); + NV_ASSERT_OK_OR_GOTO(status, memdescAlloc(pIvMemDesc), failed); + + TRANSFER_SURFACE srcSurface = { .pMemDesc = pSrcMemDesc, .offset = 0 }; + TRANSFER_SURFACE dstSurface = { .pMemDesc = pDstMemDesc, .offset = 0 }; + TRANSFER_SURFACE authSurface = { .pMemDesc = pAuthMemDesc, .offset = 0 }; + TRANSFER_SURFACE ivSurface = { .pMemDesc = pIvMemDesc, .offset = 0 }; - // Encrypt using CPU + // Write data to allocations, encrypt using CE, and read back the results + NV_ASSERT_OK_OR_GOTO(status, memmgrMemDescMemSet(pMemoryManager, pDstMemDesc, 0, 0), failed); + NV_ASSERT_OK_OR_GOTO(status, memmgrMemDescMemSet(pMemoryManager, pAuthMemDesc, 0, 0), failed); NV_ASSERT_OK_OR_GOTO(status, - ccslEncrypt_HAL(pCcslCtx, sizeof ceTestPlaintext, ceTestPlaintext, NULL, 0, encryptedData, dataAuth), failed); + memmgrMemWrite(pMemoryManager, &srcSurface, ceTestPlaintext, sizeof ceTestPlaintext, TRANSFER_FLAGS_NONE), + failed); + + params.bSecureCopy = NV_TRUE; + params.authTagAddr = memdescGetPhysAddr(pAuthMemDesc, AT_GPU, 0); + params.encryptIvAddr = memdescGetPhysAddr(pIvMemDesc, AT_GPU, 0); + params.pDstMemDesc = pDstMemDesc; + params.dstOffset = 0; + params.pSrcMemDesc = pSrcMemDesc; + params.srcOffset = 0; + params.length = sizeof ceTestPlaintext; + params.bEncrypt = NV_TRUE; + NV_ASSERT_OK_OR_GOTO(status, ceutilsMemcopy(pCeUtils, ¶ms), failed); + + NV_ASSERT_OK_OR_GOTO(status, spdmSendTestCommand(pGpu, pCcslCtx, ceTestPlaintext, sizeof ceTestPlaintext, dataAuth, + sizeof dataAuth, Ivl, sizeof Ivl, encryptedData, sizeof encryptedData, NV_TRUE), failed); // Write data to allocations, decrypt using CE, read back, and validate NV_ASSERT_OK_OR_GOTO(status, @@ -220,6 +404,8 @@ kceRunFipsSelfTest NV_ASSERT_OK_OR_GOTO(status, memmgrMemWrite(pMemoryManager, &authSurface, dataAuth, sizeof dataAuth, TRANSFER_FLAGS_NONE), failed); NV_ASSERT_OK_OR_GOTO(status, memmgrMemDescMemSet(pMemoryManager, pSrcMemDesc, 0, 0), failed); + NV_ASSERT_OK_OR_GOTO(status, + memmgrMemRead(pMemoryManager, &ivSurface, Ivl, sizeof Ivl, TRANSFER_FLAGS_NONE), failed); params.pDstMemDesc = pSrcMemDesc; params.dstOffset = 0; @@ -252,6 +438,22 @@ kceRunFipsSelfTest return status; } +NV_STATUS +kceRunFipsSelfTest +( + OBJGPU *pGpu, + void *pArg +) +{ + NV_STATUS status = NV_OK; + status = kceRunFipsSelfTestDecrypt(pGpu, pArg); + if (status == NV_OK) + { + return kceRunFipsSelfTestEncrypt(pGpu, pArg); + } + return status; +} + NV_STATUS kceStateInitLocked_IMPL ( @@ -359,9 +561,7 @@ NV_STATUS kceGetDeviceCaps_IMPL(OBJGPU *pGpu, KernelCE *pKCe, RM_ENGINE_TYPE rmE physicalCaps.capsTbl, NV2080_CTRL_CE_CAPS_TBL_SIZE); - if (pKernelNvlink != NULL) - kceGetNvlinkCaps(pGpu, pKCe, pKCeCaps); - + kceAssignCeCaps_HAL(pGpu, pKCe, pKCeCaps); printCaps(pGpu, pKCe, rmEngineType, pKCeCaps); return NV_OK; @@ -805,3 +1005,43 @@ kceGetPceConfigForLceType_IMPL return NV_OK; } + +/*! + * Checks whether given LCE index is enabled for decompression workloads + * + * @note When MIG is active this always expect local LCEs to be passed in. The translation from local + * to global Ids is to be handled internally. + * + * @param[in] pGpu OBJGPU pointer + * @param[in] lceIndex LCE Index to be checked for Decomp Cap. + * + * Returns NV_TRUE if the LCE index can accept decomp workloads from clients + * NV_FALSE if decomp workloads are not supported on this LCE + */ +NvBool +kceIsDecompLce_IMPL +( + OBJGPU *pGpu, + NvU32 lceIndex +) +{ + NV2080_CTRL_CE_IS_DECOMP_LCE_ENABLED_PARAMS params = {0}; + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + NV_STATUS status = NV_OK; + CALL_CONTEXT *pCallContext = resservGetTlsCallContext(); + RS_RES_CONTROL_PARAMS_INTERNAL *pControlParams = pCallContext->pControlParams; + + params.lceIndex = lceIndex; + + status = pRmApi->Control(pRmApi, + pControlParams->hClient, + pControlParams->hObject, + NV2080_CTRL_CMD_CE_IS_DECOMP_LCE_ENABLED, + ¶ms, + sizeof(params)); + + if (status != NV_OK) + params.bDecompEnabled = NV_FALSE; + + return params.bDecompEnabled; +} \ No newline at end of file diff --git a/src/nvidia/src/kernel/gpu/ce/kernel_ce_ctrl.c b/src/nvidia/src/kernel/gpu/ce/kernel_ce_ctrl.c index 8ce533fef3..403d9e11bd 100644 --- a/src/nvidia/src/kernel/gpu/ce/kernel_ce_ctrl.c +++ b/src/nvidia/src/kernel/gpu/ce/kernel_ce_ctrl.c @@ -53,7 +53,7 @@ subdeviceCtrlCmdCeGetCaps_IMPL NvU32 ceNumber; RM_ENGINE_TYPE rmEngineType; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // sanity check array size if (pCeCapsParams->capsTblSize != NV2080_CTRL_CE_CAPS_TBL_SIZE) diff --git a/src/nvidia/src/kernel/gpu/ce/kernel_ce_shared.c b/src/nvidia/src/kernel/gpu/ce/kernel_ce_shared.c index b5e292b1cb..840dcbfe82 100644 --- a/src/nvidia/src/kernel/gpu/ce/kernel_ce_shared.c +++ b/src/nvidia/src/kernel/gpu/ce/kernel_ce_shared.c @@ -39,7 +39,7 @@ NvBool ceIsCeGrce(OBJGPU *pGpu, RM_ENGINE_TYPE rmCeEngineType) NV2080_CTRL_GPU_GET_ENGINE_PARTNERLIST_PARAMS partnerParams = {0}; KernelFifo *pKernelFifo = GPU_GET_KERNEL_FIFO(pGpu); - if (IsAMODEL(pGpu) || IsT234DorBetter(pGpu)) + if (IsT234DorBetter(pGpu)) return NV_FALSE; NV_ASSERT_OR_RETURN(RM_ENGINE_TYPE_IS_COPY(rmCeEngineType), NV_FALSE); @@ -216,7 +216,7 @@ subdeviceCtrlCmdCeGetCapsV2_IMPL NvU32 ceNumber; RM_ENGINE_TYPE rmEngineType = gpuGetRmEngineType(pCeCapsParams->ceEngineType); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_PRINTF(LEVEL_INFO, "NV2080_CTRL_CE_GET_CAPS_V2 ceEngineType = %d\n", pCeCapsParams->ceEngineType); @@ -285,7 +285,6 @@ subdeviceCtrlCmdCeGetAllCaps_IMPL { KernelCE *pKCe; - KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); KCE_ITER_DEVICE_BEGIN(pGpu, pKCe, pDevice) if (pKCe->bStubbed) @@ -293,38 +292,9 @@ subdeviceCtrlCmdCeGetAllCaps_IMPL pCeCapsParams->present |= BIT64(kceInst); - NvU8 *pKCeCaps = pCeCapsParams->capsTbl[kceInst]; - - if (pKernelNvlink != NULL) - kceGetNvlinkCaps(pGpu, pKCe, pKCeCaps); + kceAssignCeCaps_HAL(pGpu, pKCe, pCeCapsParams->capsTbl[kceInst]); KCE_ITER_END } return NV_OK; } - -// removal tracking bug: 3748354 -/*! - * Checks whether given NV2080_ENGINE_TYPE_COPYN supports decompression workloads - * - * @param[in] pGpu OBJGPU pointer - * @param[in] nv2080engineId NV2080_ENGINE_TYPE_COPYN - * - * Returns NV_TRUE if the ceEngineType is set in the decompLceMask - */ -NvBool ceIsDecompLce(OBJGPU *pGpu, NvU32 nv2080EngineId) -{ - NvBool decompCapPresent = NV_FALSE; - KernelCE *pKCe = NULL; - - // Find 1st available pKCe to call below func - KCE_ITER_ALL_BEGIN(pGpu, pKCe, 0) - if (pKCe != NULL) - break; - KCE_ITER_END - - if (pKCe != NULL) - decompCapPresent = kceCheckForDecompCapability_HAL(pGpu, pKCe, nv2080EngineId); - - return decompCapPresent; -} diff --git a/src/nvidia/src/kernel/gpu/conf_compute/arch/blackwell/conf_compute_gb100.c b/src/nvidia/src/kernel/gpu/conf_compute/arch/blackwell/conf_compute_gb100.c new file mode 100644 index 0000000000..297a0363f8 --- /dev/null +++ b/src/nvidia/src/kernel/gpu/conf_compute/arch/blackwell/conf_compute_gb100.c @@ -0,0 +1,255 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/***************************************************************************\ + * * + * Confidential Compute HALs * + * * + \**************************************************************************/ + +#define NVOC_CONF_COMPUTE_H_PRIVATE_ACCESS_ALLOWED + +#include "gpu/conf_compute/conf_compute.h" +#include "rmapi/rmapi.h" +#include "conf_compute/cc_keystore.h" + +/*! + * @brief Derives secrets for given CE key space. + * + * @param[in] ceRmEngineTypeIdx the RM engine type for LCE + * @param[in] ccKeyspaceLCEIndex the key space index + * + * @return NV_ERR_INVALID_ARGUMENT if engine is not correct. + * NV_OK otherwise. + */ +NV_STATUS +confComputeDeriveSecretsForCEKeySpace_GB100 +( + ConfidentialCompute *pConfCompute, + RM_ENGINE_TYPE ceRmEngineTypeIdx, + NvU32 ccKeyspaceLCEIndex +) +{ + OBJGPU *pGpu = ENG_GET_GPU(pConfCompute); + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS params = {0}; + + // + // ceRmEngineTypeIdx is not exactly used as a CE index. + // For example, ceRmEngineTypeIdx is 0 for the first secure CE which is + // actually the LCE 2. + // It is used as a key space index. + // + // TODO: refactor the code to use exact the engine type number, bug 4594450. + // + params.engineId = gpuGetNv2080EngineType(ceRmEngineTypeIdx); + NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, + pGpu->hInternalClient, + pGpu->hInternalSubdevice, + NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS, + ¶ms, + sizeof(params))); + + NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, + CC_GKEYID_GEN(ccKeyspaceLCEIndex, CC_LKEYID_LCE_H2D_KERN))); + + NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, + CC_GKEYID_GEN(ccKeyspaceLCEIndex, CC_LKEYID_LCE_D2H_KERN))); + + confComputeKeyStoreDepositIvMask_HAL(pConfCompute, + CC_GKEYID_GEN(ccKeyspaceLCEIndex, CC_LKEYID_LCE_H2D_KERN), + (void*)¶ms.ivMaskSet[CC_LKEYID_LCE_H2D_KERN].ivMask); + + confComputeKeyStoreDepositIvMask_HAL(pConfCompute, + CC_GKEYID_GEN(ccKeyspaceLCEIndex, CC_LKEYID_LCE_D2H_KERN), + (void*)¶ms.ivMaskSet[CC_LKEYID_LCE_D2H_KERN].ivMask); + + return NV_OK; +} +NV_STATUS +confComputeDeriveSecrets_GB100 +( + ConfidentialCompute *pConfCompute, + NvU32 engine +) +{ + OBJGPU *pGpu = ENG_GET_GPU(pConfCompute); + + if (!IS_GSP_CLIENT(pGpu)) + { + return NV_OK; + } + + switch (engine) + { + case MC_ENGINE_IDX_CE12: + confComputeDeriveSecretsForCEKeySpace_HAL(pConfCompute, + RM_ENGINE_TYPE_COPY10, CC_KEYSPACE_LCE10); + break; + + case MC_ENGINE_IDX_CE13: + confComputeDeriveSecretsForCEKeySpace_HAL(pConfCompute, + RM_ENGINE_TYPE_COPY11, CC_KEYSPACE_LCE11); + break; + + case MC_ENGINE_IDX_CE14: + confComputeDeriveSecretsForCEKeySpace_HAL(pConfCompute, + RM_ENGINE_TYPE_COPY12, CC_KEYSPACE_LCE12); + break; + + case MC_ENGINE_IDX_CE15: + confComputeDeriveSecretsForCEKeySpace_HAL(pConfCompute, + RM_ENGINE_TYPE_COPY13, CC_KEYSPACE_LCE13); + break; + + case MC_ENGINE_IDX_CE16: + confComputeDeriveSecretsForCEKeySpace_HAL(pConfCompute, + RM_ENGINE_TYPE_COPY14, CC_KEYSPACE_LCE14); + break; + + case MC_ENGINE_IDX_CE17: + confComputeDeriveSecretsForCEKeySpace_HAL(pConfCompute, + RM_ENGINE_TYPE_COPY15, CC_KEYSPACE_LCE15); + break; + + case MC_ENGINE_IDX_CE18: + confComputeDeriveSecretsForCEKeySpace_HAL(pConfCompute, + RM_ENGINE_TYPE_COPY16, CC_KEYSPACE_LCE16); + break; + + case MC_ENGINE_IDX_CE19: + confComputeDeriveSecretsForCEKeySpace_HAL(pConfCompute, + RM_ENGINE_TYPE_COPY17, CC_KEYSPACE_LCE17); + break; + + default: + return confComputeDeriveSecrets_GH100(pConfCompute, engine); + } + + return NV_OK; +} + +/*! + * Returns RM engine Id corresponding to a key space + * + * @param[in] pConfCompute : ConfidentialCompute pointer + * @param[in] keySpace : value of keyspace from cc_keystore.h + */ +RM_ENGINE_TYPE +confComputeGetEngineIdFromKeySpace_GB100 +( + ConfidentialCompute *pConfCompute, + NvU32 keySpace +) +{ + if (keySpace == CC_KEYSPACE_GSP) + { + return RM_ENGINE_TYPE_NULL; + } + + if (keySpace == CC_KEYSPACE_SEC2) + { + return RM_ENGINE_TYPE_SEC2; + } + + switch (keySpace) + { + case CC_KEYSPACE_LCE10: + return RM_ENGINE_TYPE_COPY12; + + case CC_KEYSPACE_LCE11: + return RM_ENGINE_TYPE_COPY13; + + case CC_KEYSPACE_LCE12: + return RM_ENGINE_TYPE_COPY14; + + case CC_KEYSPACE_LCE13: + return RM_ENGINE_TYPE_COPY15; + + case CC_KEYSPACE_LCE14: + return RM_ENGINE_TYPE_COPY16; + + case CC_KEYSPACE_LCE15: + return RM_ENGINE_TYPE_COPY17; + + case CC_KEYSPACE_LCE16: + return RM_ENGINE_TYPE_COPY18; + + case CC_KEYSPACE_LCE17: + return RM_ENGINE_TYPE_COPY19; + + default: + return confComputeGetEngineIdFromKeySpace_GH100(pConfCompute, keySpace); + } + + return RM_ENGINE_TYPE_NULL; +} + +/*! + * Returns a key space corresponding to a channel + * + * @param[in] pConfCompute : ConfidentialCompute pointer + * @param[in] pKernelChannel : KernelChannel pointer + * @param[out] keySpace : value of keyspace from cc_keystore.h + */ +NV_STATUS +confComputeGetKeySpaceFromKChannel_GB100 +( + ConfidentialCompute *pConfCompute, + KernelChannel *pKernelChannel, + NvU16 *keyspace +) +{ + switch (kchannelGetEngineType(pKernelChannel)) + { + case RM_ENGINE_TYPE_COPY12: + *keyspace = CC_KEYSPACE_LCE10; + break; + case RM_ENGINE_TYPE_COPY13: + *keyspace = CC_KEYSPACE_LCE11; + break; + case RM_ENGINE_TYPE_COPY14: + *keyspace = CC_KEYSPACE_LCE12; + break; + case RM_ENGINE_TYPE_COPY15: + *keyspace = CC_KEYSPACE_LCE13; + break; + case RM_ENGINE_TYPE_COPY16: + *keyspace = CC_KEYSPACE_LCE14; + break; + case RM_ENGINE_TYPE_COPY17: + *keyspace = CC_KEYSPACE_LCE15; + break; + case RM_ENGINE_TYPE_COPY18: + *keyspace = CC_KEYSPACE_LCE16; + break; + case RM_ENGINE_TYPE_COPY19: + *keyspace = CC_KEYSPACE_LCE17; + break; + default: + return confComputeGetKeySpaceFromKChannel_GH100(pConfCompute, + pKernelChannel, keyspace); + } + + return NV_OK; +} diff --git a/src/nvidia/src/kernel/gpu/conf_compute/arch/blackwell/conf_compute_keystore_gb100.c b/src/nvidia/src/kernel/gpu/conf_compute/arch/blackwell/conf_compute_keystore_gb100.c new file mode 100644 index 0000000000..ebefbb1cd3 --- /dev/null +++ b/src/nvidia/src/kernel/gpu/conf_compute/arch/blackwell/conf_compute_keystore_gb100.c @@ -0,0 +1,66 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#define NVOC_CONF_COMPUTE_H_PRIVATE_ACCESS_ALLOWED + +#include "kernel/gpu/conf_compute/conf_compute.h" +// #include "class/cl2080.h" +// #include "libraries/nvport/nvport.h" +// #if RMCFG_FEATURE_PLATFORM_UNIX && RMCFG_MODULE_SPDM +// #include "kernel/gpu/spdm/libspdm_includes.h" +// #include "hal/library/cryptlib.h" +// #endif + +/*! + * Return the key ID for a given LCE channel and rotation operation. + * If rotateOperation is ROTATE_IV_ALL_VALID then it will return the least + * key ID of the key pair; ie the one that corresponds to an even numbered slot. + * + * @param[in] pConfCompute : conf comp pointer + * @param[in] pKernelChannel : KernelChannel pointer + * @param[in] rotateOperation : The type of rotation operation + * @param[out] pKeyId : pointer to a key Id + */ +NV_STATUS +confComputeGetLceKeyIdFromKChannel_GB100 +( + ConfidentialCompute *pConfCompute, + KernelChannel *pKernelChannel, + ROTATE_IV_TYPE rotateOperation, + NvU16 *pKeyId +) +{ + NV_ASSERT_OR_RETURN(pKeyId != NULL, NV_ERR_INVALID_PARAMETER); + + if ((rotateOperation == ROTATE_IV_ENCRYPT) || + (rotateOperation == ROTATE_IV_ALL_VALID)) + { + *pKeyId = CC_LKEYID_LCE_H2D_KERN; + } + else + { + *pKeyId = CC_LKEYID_LCE_D2H_KERN; + } + + return NV_OK; +} diff --git a/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_gh100.c b/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_gh100.c index 369a167db8..361cea19a1 100644 --- a/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_gh100.c +++ b/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_gh100.c @@ -87,6 +87,71 @@ confComputeIsGpuCcCapable_GH100 return NV_FALSE; } +/*! + * @brief Derives secrets for given CE key space. + * + * @param[in] ceRmEngineTypeIdx the RM engine type for LCE + * @param[in] ccKeyspaceLCEIndex the key space index + * + * @return NV_ERR_INVALID_ARGUMENT if engine is not correct. + * NV_OK otherwise. + */ +NV_STATUS +confComputeDeriveSecretsForCEKeySpace_GH100 +( + ConfidentialCompute *pConfCompute, + RM_ENGINE_TYPE ceRmEngineTypeIdx, + NvU32 ccKeyspaceLCEIndex +) +{ + OBJGPU *pGpu = ENG_GET_GPU(pConfCompute); + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS params = {0}; + + // + // ceRmEngineTypeIdx is not exactly used as a CE index. + // For example, ceRmEngineTypeIdx is 0 for the first secure CE which is + // actually the LCE 2. + // It is used as a key space index. + // + // TODO: refactor the code to use exact the engine type number, bug 4594450. + // + params.engineId = gpuGetNv2080EngineType(ceRmEngineTypeIdx); + NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, + pGpu->hInternalClient, + pGpu->hInternalSubdevice, + NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS, + ¶ms, + sizeof(params))); + + NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, + CC_GKEYID_GEN(ccKeyspaceLCEIndex, CC_LKEYID_LCE_H2D_USER))); + NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, + CC_GKEYID_GEN(ccKeyspaceLCEIndex, CC_LKEYID_LCE_D2H_USER))); + NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, + CC_GKEYID_GEN(ccKeyspaceLCEIndex, CC_LKEYID_LCE_H2D_KERN))); + NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, + CC_GKEYID_GEN(ccKeyspaceLCEIndex, CC_LKEYID_LCE_D2H_KERN))); + + confComputeKeyStoreDepositIvMask_HAL(pConfCompute, + CC_GKEYID_GEN(ccKeyspaceLCEIndex, CC_LKEYID_LCE_H2D_USER), + (void*)¶ms.ivMaskSet[0].ivMask); + + confComputeKeyStoreDepositIvMask_HAL(pConfCompute, + CC_GKEYID_GEN(ccKeyspaceLCEIndex, CC_LKEYID_LCE_D2H_USER), + (void*)¶ms.ivMaskSet[1].ivMask); + + confComputeKeyStoreDepositIvMask_HAL(pConfCompute, + CC_GKEYID_GEN(ccKeyspaceLCEIndex, CC_LKEYID_LCE_H2D_KERN), + (void*)¶ms.ivMaskSet[2].ivMask); + + confComputeKeyStoreDepositIvMask_HAL(pConfCompute, + CC_GKEYID_GEN(ccKeyspaceLCEIndex, CC_LKEYID_LCE_D2H_KERN), + (void*)¶ms.ivMaskSet[3].ivMask); + + return NV_OK; +} + NV_STATUS confComputeDeriveSecrets_GH100(ConfidentialCompute *pConfCompute, NvU32 engine) @@ -154,310 +219,48 @@ confComputeDeriveSecrets_GH100(ConfidentialCompute *pConfCompute, CC_GKEYID_GEN(CC_KEYSPACE_SEC2, CC_LKEYID_CPU_SEC2_HMAC_SCRUBBER))); } break; - case MC_ENGINE_IDX_CE2: - { - NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS params = {0}; - - params.engineId = NV2080_ENGINE_TYPE_COPY0; - NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, - pGpu->hInternalClient, - pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS, - ¶ms, - sizeof(params))); - - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE0, CC_LKEYID_LCE_H2D_USER))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE0, CC_LKEYID_LCE_D2H_USER))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE0, CC_LKEYID_LCE_H2D_KERN))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE0, CC_LKEYID_LCE_D2H_KERN))); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE0, CC_LKEYID_LCE_H2D_USER), - (void*)¶ms.ivMaskSet[0].ivMask); - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE0, CC_LKEYID_LCE_D2H_USER), - (void*)¶ms.ivMaskSet[1].ivMask); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE0, CC_LKEYID_LCE_H2D_KERN), - (void*)¶ms.ivMaskSet[2].ivMask); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE0, CC_LKEYID_LCE_D2H_KERN), - (void*)¶ms.ivMaskSet[3].ivMask); + case MC_ENGINE_IDX_CE2: + confComputeDeriveSecretsForCEKeySpace_HAL(pConfCompute, + RM_ENGINE_TYPE_COPY0, CC_KEYSPACE_LCE0); break; - } - case MC_ENGINE_IDX_CE3: - { - NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS params = {0}; - - params.engineId = NV2080_ENGINE_TYPE_COPY1; - NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, - pGpu->hInternalClient, - pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS, - ¶ms, - sizeof(params))); - - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE1, CC_LKEYID_LCE_H2D_USER))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE1, CC_LKEYID_LCE_D2H_USER))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE1, CC_LKEYID_LCE_H2D_KERN))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE1, CC_LKEYID_LCE_D2H_KERN))); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE1, CC_LKEYID_LCE_H2D_USER), - (void*)¶ms.ivMaskSet[0].ivMask); - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE1, CC_LKEYID_LCE_D2H_USER), - (void*)¶ms.ivMaskSet[1].ivMask); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE1, CC_LKEYID_LCE_H2D_KERN), - (void*)¶ms.ivMaskSet[2].ivMask); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE1, CC_LKEYID_LCE_D2H_KERN), - (void*)¶ms.ivMaskSet[3].ivMask); + case MC_ENGINE_IDX_CE3: + confComputeDeriveSecretsForCEKeySpace_HAL(pConfCompute, + RM_ENGINE_TYPE_COPY1, CC_KEYSPACE_LCE1); break; - } - case MC_ENGINE_IDX_CE4: - { - NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS params = {0}; - - params.engineId = NV2080_ENGINE_TYPE_COPY2; - NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, - pGpu->hInternalClient, - pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS, - ¶ms, - sizeof(params))); - - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE2, CC_LKEYID_LCE_H2D_USER))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE2, CC_LKEYID_LCE_D2H_USER))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE2, CC_LKEYID_LCE_H2D_KERN))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE2, CC_LKEYID_LCE_D2H_KERN))); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE2, CC_LKEYID_LCE_H2D_USER), - (void*)¶ms.ivMaskSet[0].ivMask); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE2, CC_LKEYID_LCE_D2H_USER), - (void*)¶ms.ivMaskSet[1].ivMask); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE2, CC_LKEYID_LCE_H2D_KERN), - (void*)¶ms.ivMaskSet[2].ivMask); - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE2, CC_LKEYID_LCE_D2H_KERN), - (void*)¶ms.ivMaskSet[3].ivMask); + case MC_ENGINE_IDX_CE4: + confComputeDeriveSecretsForCEKeySpace_HAL(pConfCompute, + RM_ENGINE_TYPE_COPY2, CC_KEYSPACE_LCE2); break; - } - case MC_ENGINE_IDX_CE5: - { - NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS params = {0}; - - params.engineId = NV2080_ENGINE_TYPE_COPY3; - NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, - pGpu->hInternalClient, - pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS, - ¶ms, - sizeof(params))); - - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE3, CC_LKEYID_LCE_H2D_USER))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE3, CC_LKEYID_LCE_D2H_USER))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE3, CC_LKEYID_LCE_H2D_KERN))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE3, CC_LKEYID_LCE_D2H_KERN))); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE3, CC_LKEYID_LCE_H2D_USER), - (void*)¶ms.ivMaskSet[0].ivMask); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE3, CC_LKEYID_LCE_D2H_USER), - (void*)¶ms.ivMaskSet[1].ivMask); - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE3, CC_LKEYID_LCE_H2D_KERN), - (void*)¶ms.ivMaskSet[2].ivMask); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE3, CC_LKEYID_LCE_D2H_KERN), - (void*)¶ms.ivMaskSet[3].ivMask); + case MC_ENGINE_IDX_CE5: + confComputeDeriveSecretsForCEKeySpace_HAL(pConfCompute, + RM_ENGINE_TYPE_COPY3, CC_KEYSPACE_LCE3); break; - } - case MC_ENGINE_IDX_CE6: - { - NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS params = {0}; - - params.engineId = NV2080_ENGINE_TYPE_COPY4; - NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, - pGpu->hInternalClient, - pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS, - ¶ms, - sizeof(params))); - - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE4, CC_LKEYID_LCE_H2D_USER))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE4, CC_LKEYID_LCE_D2H_USER))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE4, CC_LKEYID_LCE_H2D_KERN))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE4, CC_LKEYID_LCE_D2H_KERN))); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE4, CC_LKEYID_LCE_H2D_USER), - (void*)¶ms.ivMaskSet[0].ivMask); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE4, CC_LKEYID_LCE_D2H_USER), - (void*)¶ms.ivMaskSet[1].ivMask); - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE4, CC_LKEYID_LCE_H2D_KERN), - (void*)¶ms.ivMaskSet[2].ivMask); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE4, CC_LKEYID_LCE_D2H_KERN), - (void*)¶ms.ivMaskSet[3].ivMask); + case MC_ENGINE_IDX_CE6: + confComputeDeriveSecretsForCEKeySpace_HAL(pConfCompute, + RM_ENGINE_TYPE_COPY4, CC_KEYSPACE_LCE4); break; - } - case MC_ENGINE_IDX_CE7: - { - NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS params = {0}; - - params.engineId = NV2080_ENGINE_TYPE_COPY5; - NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, - pGpu->hInternalClient, - pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS, - ¶ms, - sizeof(params))); - - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE5, CC_LKEYID_LCE_H2D_USER))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE5, CC_LKEYID_LCE_D2H_USER))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE5, CC_LKEYID_LCE_H2D_KERN))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE5, CC_LKEYID_LCE_D2H_KERN))); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE5, CC_LKEYID_LCE_H2D_USER), - (void*)¶ms.ivMaskSet[0].ivMask); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE5, CC_LKEYID_LCE_D2H_USER), - (void*)¶ms.ivMaskSet[1].ivMask); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE5, CC_LKEYID_LCE_H2D_KERN), - (void*)¶ms.ivMaskSet[2].ivMask); - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE5, CC_LKEYID_LCE_D2H_KERN), - (void*)¶ms.ivMaskSet[3].ivMask); + case MC_ENGINE_IDX_CE7: + confComputeDeriveSecretsForCEKeySpace_HAL(pConfCompute, + RM_ENGINE_TYPE_COPY5, CC_KEYSPACE_LCE5); break; - } - case MC_ENGINE_IDX_CE8: - { - NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS params = {0}; - params.engineId = NV2080_ENGINE_TYPE_COPY6; - NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, - pGpu->hInternalClient, - pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS, - ¶ms, - sizeof(params))); - - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE6, CC_LKEYID_LCE_H2D_USER))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE6, CC_LKEYID_LCE_D2H_USER))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE6, CC_LKEYID_LCE_H2D_KERN))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE6, CC_LKEYID_LCE_D2H_KERN))); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE6, CC_LKEYID_LCE_H2D_USER), - (void*)¶ms.ivMaskSet[0].ivMask); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE6, CC_LKEYID_LCE_D2H_USER), - (void*)¶ms.ivMaskSet[1].ivMask); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE6, CC_LKEYID_LCE_H2D_KERN), - (void*)¶ms.ivMaskSet[2].ivMask); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE6, CC_LKEYID_LCE_D2H_KERN), - (void*)¶ms.ivMaskSet[3].ivMask); + case MC_ENGINE_IDX_CE8: + confComputeDeriveSecretsForCEKeySpace_HAL(pConfCompute, + RM_ENGINE_TYPE_COPY6, CC_KEYSPACE_LCE6); break; - } - case MC_ENGINE_IDX_CE9: - { - NV2080_CTRL_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS_PARAMS params = {0}; - - params.engineId = NV2080_ENGINE_TYPE_COPY7; - NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, - pGpu->hInternalClient, - pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_DERIVE_LCE_KEYS, - ¶ms, - sizeof(params))); - - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE7, CC_LKEYID_LCE_H2D_USER))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE7, CC_LKEYID_LCE_D2H_USER))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE7, CC_LKEYID_LCE_H2D_KERN))); - NV_ASSERT_OK_OR_RETURN(confComputeKeyStoreDeriveKey_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE7, CC_LKEYID_LCE_D2H_KERN))); - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE7, CC_LKEYID_LCE_H2D_USER), - (void*)¶ms.ivMaskSet[0].ivMask); - - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE7, CC_LKEYID_LCE_D2H_USER), - (void*)¶ms.ivMaskSet[1].ivMask); + case MC_ENGINE_IDX_CE9: + confComputeDeriveSecretsForCEKeySpace_HAL(pConfCompute, + RM_ENGINE_TYPE_COPY7, CC_KEYSPACE_LCE7); + break; - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE7, CC_LKEYID_LCE_H2D_KERN), - (void*)¶ms.ivMaskSet[2].ivMask); - confComputeKeyStoreDepositIvMask_HAL(pConfCompute, - CC_GKEYID_GEN(CC_KEYSPACE_LCE7, CC_LKEYID_LCE_D2H_KERN), - (void*)¶ms.ivMaskSet[3].ivMask); - break; - } default: return NV_ERR_INVALID_ARGUMENT; } @@ -488,38 +291,34 @@ confComputeGetEngineIdFromKeySpace_GH100 return RM_ENGINE_TYPE_SEC2; } - NvU32 lceId = 2; // TODO: Use NV_SSE_SCE_CC_CAPABLE_LCE_ID_START; switch (keySpace) { case CC_KEYSPACE_LCE0: - lceId += 0; - break; + return RM_ENGINE_TYPE_COPY2; + case CC_KEYSPACE_LCE1: - lceId += 1; - break; + return RM_ENGINE_TYPE_COPY3; + case CC_KEYSPACE_LCE2: - lceId += 2; - break; + return RM_ENGINE_TYPE_COPY4; + case CC_KEYSPACE_LCE3: - lceId += 3; - break; + return RM_ENGINE_TYPE_COPY5; + case CC_KEYSPACE_LCE4: - lceId += 4; - break; + return RM_ENGINE_TYPE_COPY6; + case CC_KEYSPACE_LCE5: - lceId += 5; - break; + return RM_ENGINE_TYPE_COPY7; + case CC_KEYSPACE_LCE6: - lceId += 6; - break; + return RM_ENGINE_TYPE_COPY8; + case CC_KEYSPACE_LCE7: - lceId += 7; - break; - default: - return RM_ENGINE_TYPE_NULL; + return RM_ENGINE_TYPE_COPY9; } - return RM_ENGINE_TYPE_COPY(lceId); + return RM_ENGINE_TYPE_NULL; } /*! @@ -554,7 +353,7 @@ confComputeGlobalKeyIsKernelPriv_GH100 } else { - NV_ASSERT((keySpace >= CC_KEYSPACE_LCE0) && (keySpace < CC_KEYSPACE_SIZE)); + NV_ASSERT((keySpace >= CC_KEYSPACE_LCE0) && (keySpace <= CC_KEYSPACE_LCE7)); switch (localKeyId) { case CC_LKEYID_LCE_H2D_KERN: @@ -626,7 +425,7 @@ NV_STATUS confComputeUpdateSecrets_GH100(ConfidentialCompute *pConfCompute, // Only LCEs have a decrypt IV mask. if ((CC_GKEYID_GET_KEYSPACE(d2hKey) >= CC_KEYSPACE_LCE0) && - (CC_GKEYID_GET_KEYSPACE(d2hKey) <= CC_KEYSPACE_LCE7)) + (CC_GKEYID_GET_KEYSPACE(d2hKey) <= confComputeGetMaxCeKeySpaceIdx(pConfCompute))) { confComputeKeyStoreDepositIvMask_HAL(pConfCompute, d2hKey, ¶ms.updatedDecryptIVMask); } @@ -645,7 +444,7 @@ NV_STATUS confComputeUpdateSecrets_GH100(ConfidentialCompute *pConfCompute, pKernelChannel->clientKmb.encryptBundle.iv[0] = 0x00000000; if ((CC_GKEYID_GET_KEYSPACE(d2hKey) >= CC_KEYSPACE_LCE0) && - (CC_GKEYID_GET_KEYSPACE(d2hKey) <= CC_KEYSPACE_LCE7)) + (CC_GKEYID_GET_KEYSPACE(d2hKey) <= confComputeGetMaxCeKeySpaceIdx(pConfCompute))) { pKernelChannel->clientKmb.decryptBundle.iv[0] = 0x00000000; } diff --git a/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_key_rotation_gh100.c b/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_key_rotation_gh100.c index e0f832921d..e4d33e1c71 100644 --- a/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_key_rotation_gh100.c +++ b/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_key_rotation_gh100.c @@ -84,8 +84,7 @@ confComputeEnableInternalKeyRotationSupport_GH100 if (pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_ENABLED) && pConfCompute->getProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_CC_FEATURE_ENABLED)) { - // TODO CONFCOMP-1740: Default to enabling key rotation when supported - // pConfCompute->setProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_INTERNAL_KEY_ROTATION_ENABLED, NV_TRUE); + pConfCompute->setProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_INTERNAL_KEY_ROTATION_ENABLED, NV_TRUE); initInternalKeyRotationRegistryOverrides(pGpu, pConfCompute); } @@ -177,14 +176,16 @@ confComputeTriggerKeyRotation_GH100 NV_STATUS tempStatus, status = NV_OK; NvU32 globalD2HKey, globalH2DKey, keySpace; - for (keySpace = 0; keySpace < CC_KEYSPACE_SIZE; keySpace++) + for (keySpace = 0; keySpace < CC_KEYSPACE_SIZE_GH100; keySpace++) { if (keySpace == CC_KEYSPACE_GSP) continue; if (!(pConfCompute->keyRotationEnableMask & NVBIT(keySpace))) { - NV_PRINTF(LEVEL_INFO, "Skipping keyspace = %d since mask = 0x%x\n", keySpace, pConfCompute->keyRotationEnableMask); + NV_PRINTF(LEVEL_SILENT, "Skipping keyspace = %d since mask = 0x%x\n", + keySpace, pConfCompute->keyRotationEnableMask); + continue; } @@ -302,7 +303,7 @@ triggerKeyRotationByKeyPair NvU32 userH2DKey; KEY_ROTATION_STATUS userKRStatus; NvU32 keySpace; - for (keySpace = 0; keySpace < CC_KEYSPACE_SIZE; keySpace++) + for (keySpace = 0; keySpace < CC_KEYSPACE_SIZE_GH100; keySpace++) { if (keySpace == CC_KEYSPACE_GSP) continue; @@ -419,11 +420,13 @@ calculateEncryptionStatsByKeyPair totalD2Hbytes += pEncStats->bytesEncryptedD2H; totalEncryptOpsH2D += pEncStats->numEncryptionsH2D; totalEncryptOpsD2H += pEncStats->numEncryptionsD2H; - NV_PRINTF(LEVEL_INFO, "Encryption stats for chid 0x%x with h2dKey 0x%x\n", kchannelGetDebugTag(pKernelChannel), h2dKey); - NV_PRINTF(LEVEL_INFO, "Total h2d bytes encrypted = 0x%llx\n", pEncStats->bytesEncryptedH2D); - NV_PRINTF(LEVEL_INFO, "Total d2h bytes encrypted = 0x%llx\n", pEncStats->bytesEncryptedD2H); - NV_PRINTF(LEVEL_INFO, "Total h2d encrypt ops = 0x%llx\n", pEncStats->numEncryptionsH2D); - NV_PRINTF(LEVEL_INFO, "Total d2h encrypt ops = 0x%llx\n", pEncStats->numEncryptionsD2H); + + NV_PRINTF(LEVEL_SILENT, "Encryption stats for chid 0x%x with h2dKey 0x%x\n", + kchannelGetDebugTag(pKernelChannel), h2dKey); + NV_PRINTF(LEVEL_SILENT, "Total h2d bytes encrypted = 0x%llx\n", pEncStats->bytesEncryptedH2D); + NV_PRINTF(LEVEL_SILENT, "Total d2h bytes encrypted = 0x%llx\n", pEncStats->bytesEncryptedD2H); + NV_PRINTF(LEVEL_SILENT, "Total h2d encrypt ops = 0x%llx\n", pEncStats->numEncryptionsH2D); + NV_PRINTF(LEVEL_SILENT, "Total d2h encrypt ops = 0x%llx\n", pEncStats->numEncryptionsD2H); } // Add stats for freed channels @@ -440,11 +443,11 @@ calculateEncryptionStatsByKeyPair if ((pConfCompute->aggregateStats[h2dIndex].totalBytesEncrypted > 0) || (pConfCompute->aggregateStats[d2hIndex].totalBytesEncrypted > 0)) { - NV_PRINTF(LEVEL_INFO, "Aggregate stats for h2dKey 0x%x and d2hKey 0x%x\n", h2dKey, d2hKey); - NV_PRINTF(LEVEL_INFO, "Total h2d bytes encrypted = 0x%llx\n", pConfCompute->aggregateStats[h2dIndex].totalBytesEncrypted); - NV_PRINTF(LEVEL_INFO, "Total d2h bytes encrypted = 0x%llx\n", pConfCompute->aggregateStats[d2hIndex].totalBytesEncrypted); - NV_PRINTF(LEVEL_INFO, "Total h2d encrypt ops = 0x%llx\n", pConfCompute->aggregateStats[h2dIndex].totalEncryptOps); - NV_PRINTF(LEVEL_INFO, "Total d2h encrypt ops = 0x%llx\n", pConfCompute->aggregateStats[d2hIndex].totalEncryptOps); + NV_PRINTF(LEVEL_SILENT, "Aggregate stats for h2dKey 0x%x and d2hKey 0x%x\n", h2dKey, d2hKey); + NV_PRINTF(LEVEL_SILENT, "Total h2d bytes encrypted = 0x%llx\n", pConfCompute->aggregateStats[h2dIndex].totalBytesEncrypted); + NV_PRINTF(LEVEL_SILENT, "Total d2h bytes encrypted = 0x%llx\n", pConfCompute->aggregateStats[d2hIndex].totalBytesEncrypted); + NV_PRINTF(LEVEL_SILENT, "Total h2d encrypt ops = 0x%llx\n", pConfCompute->aggregateStats[h2dIndex].totalEncryptOps); + NV_PRINTF(LEVEL_SILENT, "Total d2h encrypt ops = 0x%llx\n", pConfCompute->aggregateStats[d2hIndex].totalEncryptOps); } return NV_OK; } @@ -602,9 +605,27 @@ initKeyRotationRegistryOverrides } else { - NV_PRINTF(LEVEL_INFO, "Confidential Compute key rotation is disabled.\n"); - pConfCompute->setProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_ENABLED, NV_FALSE); - pConfCompute->setProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_SUPPORTED, NV_FALSE); + NvU32 gpuCnt; + + if (gpumgrGetGpuAttachInfo(&gpuCnt, NULL) != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "Unable to acquire GPU attach information.\n"); + } + else + { + // + // From bug 4588046, key rotation currently does not work when there are multiple + // GPUs in the system, even if only one GPU is being used. Therefore key rotation + // will only be enabled by default if there is exactly one GPU + // + if (gpuCnt == 1) + { + NV_PRINTF(LEVEL_INFO, "Confidential Compute key rotation is enabled.\n"); + + pConfCompute->setProperty(pConfCompute, PDB_PROP_CONFCOMPUTE_KEY_ROTATION_ENABLED, NV_TRUE); + pConfCompute->keyRotationEnableMask = NV_REG_STR_RM_CONF_COMPUTE_KEY_ROTATION_ENABLED_ALL_YES; + } + } } } } @@ -646,8 +667,7 @@ initInternalKeyRotationRegistryOverrides NV_PRINTF(LEVEL_ERROR, "RmKeyRotationInternalThreshold must be higher than minimum of %u!\n", KEY_ROTATION_MINIMUM_INTERNAL_THRESHOLD); } - // TODO CONFCOMP-1740: For production, we must disable the ability to set threshold lower than minimum. - // else + else { NV_PRINTF(LEVEL_INFO, "Setting internal key rotation threshold to %u.\n", internalThreshold); diff --git a/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_keystore_gh100.c b/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_keystore_gh100.c index 8e37df1922..766cfcd9a3 100644 --- a/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_keystore_gh100.c +++ b/src/nvidia/src/kernel/gpu/conf_compute/arch/hopper/conf_compute_keystore_gh100.c @@ -67,11 +67,8 @@ typedef cryptoBundle_t keySlot_t[CC_KEYSPACE_TOTAL_SIZE]; static NV_STATUS checkSlot(ConfidentialCompute *pConfCompute, NvU32 slotNumber); static void incrementChannelCounter(ConfidentialCompute *pConfCompute, NvU32 slotNumber); static NvU64 getChannelCounter(ConfidentialCompute *pConfCompute, NvU32 slotNumber); -static NV_STATUS getKeyIdLce(KernelChannel *pKernelChannel, ROTATE_IV_TYPE rotateOperation, - NvU16 *keyId); static NV_STATUS getKeyIdSec2(KernelChannel *pKernelChannel, ROTATE_IV_TYPE rotateOperation, NvU16 *keyId); -static NV_STATUS getKeyspaceLce(KernelChannel *pKernelChannel, NvU16 *keyspace); NV_STATUS confComputeKeyStoreInit_GH100(ConfidentialCompute *pConfCompute) @@ -177,7 +174,7 @@ confComputeKeyStoreDeriveKey_GH100(ConfidentialCompute *pConfCompute, NvU32 glob // LCEs will return an error / interrupt if the key is all 0s. if ((CC_GKEYID_GET_KEYSPACE(globalKeyId) >= CC_KEYSPACE_LCE0) && - (CC_GKEYID_GET_KEYSPACE(globalKeyId) <= CC_KEYSPACE_LCE7)) + (CC_GKEYID_GET_KEYSPACE(globalKeyId) <= confComputeGetMaxCeKeySpaceIdx(pConfCompute))) { for (NvU32 index = 0; index < CC_AES_256_GCM_KEY_SIZE_DWORD; index++) { @@ -236,19 +233,21 @@ confComputeKeyStoreRetrieveViaChannel_GH100 if (RM_ENGINE_TYPE_IS_COPY(kchannelGetEngineType(pKernelChannel))) { - NvU16 keyspace; + NvU16 keySpace; - if (getKeyspaceLce(pKernelChannel, &keyspace) != NV_OK) + if (confComputeGetKeySpaceFromKChannel_HAL(pConfCompute, pKernelChannel, + &keySpace) != NV_OK) { return NV_ERR_INVALID_PARAMETER; } - if (getKeyIdLce(pKernelChannel, rotateOperation, &keyId) != NV_OK) + if (confComputeGetLceKeyIdFromKChannel_HAL(pConfCompute, pKernelChannel, + rotateOperation, &keyId) != NV_OK) { return NV_ERR_INVALID_PARAMETER; } - globalKeyId = CC_GKEYID_GEN(keyspace, keyId); + globalKeyId = CC_GKEYID_GEN(keySpace, keyId); } else if (kchannelGetEngineType(pKernelChannel) == RM_ENGINE_TYPE_SEC2) { @@ -434,7 +433,7 @@ confComputeKeyStoreUpdateKey_GH100(ConfidentialCompute *pConfCompute, NvU32 glob // LCEs will return an error / interrupt if the key is all 0s. if ((CC_GKEYID_GET_KEYSPACE(globalKeyId) >= CC_KEYSPACE_LCE0) && - (CC_GKEYID_GET_KEYSPACE(globalKeyId) <= CC_KEYSPACE_LCE7)) + (CC_GKEYID_GET_KEYSPACE(globalKeyId) <= confComputeGetMaxCeKeySpaceIdx(pConfCompute))) { for (NvU32 index = 0; index < CC_AES_256_GCM_KEY_SIZE_DWORD; index++) { @@ -481,9 +480,12 @@ confComputeGetKeyPairByChannel_GH100 } else { - NV_ASSERT_OK_OR_RETURN(getKeyspaceLce(pKernelChannel, &keySpace)); - NV_ASSERT_OK_OR_RETURN(getKeyIdLce(pKernelChannel, ROTATE_IV_ENCRYPT, &lh2dKeyId)); - NV_ASSERT_OK_OR_RETURN(getKeyIdLce(pKernelChannel, ROTATE_IV_DECRYPT, &ld2hKeyId)); + NV_ASSERT_OK_OR_RETURN(confComputeGetKeySpaceFromKChannel_HAL(pConfCompute, + pKernelChannel, &keySpace) != NV_OK); + NV_ASSERT_OK_OR_RETURN(confComputeGetLceKeyIdFromKChannel_HAL(pConfCompute, pKernelChannel, + ROTATE_IV_ENCRYPT, &lh2dKeyId)); + NV_ASSERT_OK_OR_RETURN(confComputeGetLceKeyIdFromKChannel_HAL(pConfCompute, pKernelChannel, + ROTATE_IV_DECRYPT, &ld2hKeyId)); } if (pH2DKey != NULL) @@ -509,41 +511,49 @@ confComputeKeyStoreIsValidGlobalKeyId_GH100 return (globalKeyIdString != NULL); } -// -// Return the key ID for a given LCE channel and rotation operation. -// If rotateOperation is ROTATE_IV_ALL_VALID then it will return the least -// key ID of the key pair; ie the one that corresponds to an even numbered slot. -// -static NV_STATUS -getKeyIdLce +/*! + * Return the key ID for a given LCE channel and rotation operation. + * If rotateOperation is ROTATE_IV_ALL_VALID then it will return the least + * key ID of the key pair; ie the one that corresponds to an even numbered slot. + * + * @param[in] pConfCompute : conf comp pointer + * @param[in] pKernelChannel : KernelChannel pointer + * @param[in] rotateOperation : The type of rotation operation + * @param[out] pKeyId : pointer to keyId + */ +NV_STATUS +confComputeGetLceKeyIdFromKChannel_GH100 ( - KernelChannel *pKernelChannel, - ROTATE_IV_TYPE rotateOperation, - NvU16 *keyId + ConfidentialCompute *pConfCompute, + KernelChannel *pKernelChannel, + ROTATE_IV_TYPE rotateOperation, + NvU16 *pKeyId ) { if (kchannelCheckIsUserMode(pKernelChannel)) { - if ((rotateOperation == ROTATE_IV_ENCRYPT) || (rotateOperation == ROTATE_IV_ALL_VALID)) + if ((rotateOperation == ROTATE_IV_ENCRYPT) || + (rotateOperation == ROTATE_IV_ALL_VALID)) { - *keyId = CC_LKEYID_LCE_H2D_USER; + *pKeyId = CC_LKEYID_LCE_H2D_USER; } else { - *keyId = CC_LKEYID_LCE_D2H_USER; + *pKeyId = CC_LKEYID_LCE_D2H_USER; } return NV_OK; } else if (kchannelCheckIsKernel(pKernelChannel)) { - if ((rotateOperation == ROTATE_IV_ENCRYPT) || (rotateOperation == ROTATE_IV_ALL_VALID)) + if ((rotateOperation == ROTATE_IV_ENCRYPT) || + (rotateOperation == ROTATE_IV_ALL_VALID)) { - *keyId = CC_LKEYID_LCE_H2D_KERN; + *pKeyId = CC_LKEYID_LCE_H2D_KERN; } else { - *keyId = CC_LKEYID_LCE_D2H_KERN; + *pKeyId = CC_LKEYID_LCE_D2H_KERN; } return NV_OK; @@ -600,11 +610,20 @@ getKeyIdSec2 return NV_ERR_GENERIC; } -static NV_STATUS -getKeyspaceLce +/*! + * Returns a key space corresponding to a channel + * + * @param[in] pConfCompute : ConfidentialCompute pointer + * @param[in] pKernelChannel : KernelChannel pointer + * @param[out] keySpace : value of keyspace from cc_keystore.h + * + */ +NV_STATUS +confComputeGetKeySpaceFromKChannel_GH100 ( - KernelChannel *pKernelChannel, - NvU16 *keyspace + ConfidentialCompute *pConfCompute, + KernelChannel *pKernelChannel, + NvU16 *keyspace ) { // The actual copy engine (2 through 9) is normalized to start at 0. diff --git a/src/nvidia/src/kernel/gpu/conf_compute/ccsl.c b/src/nvidia/src/kernel/gpu/conf_compute/ccsl.c index 41dfee149d..0ce41c8544 100644 --- a/src/nvidia/src/kernel/gpu/conf_compute/ccsl.c +++ b/src/nvidia/src/kernel/gpu/conf_compute/ccsl.c @@ -571,6 +571,10 @@ ccslContextInitViaKeyId_KERNEL return NV_ERR_NO_MEMORY; } *ppCtx = pCtx; + + // Ensure all pointers are default set to NULL, in case we get out of sync with channel context values + portMemSet(pCtx, 0, sizeof(*pCtx)); + if (!libspdm_aead_gcm_prealloc(&pCtx->openrmCtx)) { portMemFree(pCtx); @@ -593,6 +597,7 @@ ccslContextInitViaKeyId_KERNEL &kmb); if (status != NV_OK) { + portMemFree((void *)pCtx->pEncStatsBuffer); openrmCtxFree(pCtx->openrmCtx); portMemFree(pCtx); return status; @@ -600,7 +605,6 @@ ccslContextInitViaKeyId_KERNEL // For now assume any call to this function uses a 64-bit message counter. pCtx->msgCounterSize = CSL_MSG_CTR_64; - pCtx->pMemDesc = NULL; writeKmbToContext(pCtx, &kmb, ROTATE_IV_ALL_VALID); confComputeGetKeyPairByKey(pConfCompute, globalKeyId, &pCtx->globalKeyIdOut, &pCtx->globalKeyIdIn); diff --git a/src/nvidia/src/kernel/gpu/conf_compute/conf_compute.c b/src/nvidia/src/kernel/gpu/conf_compute/conf_compute.c index c6b9749ec9..5fd56a1392 100644 --- a/src/nvidia/src/kernel/gpu/conf_compute/conf_compute.c +++ b/src/nvidia/src/kernel/gpu/conf_compute/conf_compute.c @@ -51,8 +51,8 @@ static NV_STATUS _confComputeInitRegistryOverrides(OBJGPU *, ConfidentialCompute*); static NvU32 _confComputeGetKeyspaceSize(NvU16 keyspace); -#define KEY_ROTATION_THRESHOLD_DELTA 20000000ull -#define KEY_ROTATION_TIMEOUT 10 +#define KEY_ROTATION_THRESHOLD_DELTA 1000000000ull +#define KEY_ROTATION_TIMEOUT 5 NV_STATUS confComputeConstructEngine_IMPL(OBJGPU *pGpu, @@ -168,7 +168,6 @@ confComputeConstructEngine_IMPL(OBJGPU *pGpu, { pConfCompute->keyRotationState[i] = KEY_ROTATION_STATUS_IDLE; pConfCompute->keyRotationTimeoutInfo[i].pTimer = NULL; - pConfCompute->keyRotationCallbackCount[i] = 0; pConfCompute->keyRotationCount[i] = 0; } portMemSet(pConfCompute->aggregateStats, 0, sizeof(pConfCompute->aggregateStats)); @@ -857,6 +856,14 @@ _confComputeGetKeyspaceSize case CC_KEYSPACE_LCE5: case CC_KEYSPACE_LCE6: case CC_KEYSPACE_LCE7: + case CC_KEYSPACE_LCE10: + case CC_KEYSPACE_LCE11: + case CC_KEYSPACE_LCE12: + case CC_KEYSPACE_LCE13: + case CC_KEYSPACE_LCE14: + case CC_KEYSPACE_LCE15: + case CC_KEYSPACE_LCE16: + case CC_KEYSPACE_LCE17: return CC_KEYSPACE_LCE_SIZE; default: NV_ASSERT_OR_RETURN(NV_FALSE, 0); diff --git a/src/nvidia/src/kernel/gpu/conf_compute/conf_compute_api.c b/src/nvidia/src/kernel/gpu/conf_compute/conf_compute_api.c index f6fadcfc0f..d61a1085fc 100644 --- a/src/nvidia/src/kernel/gpu/conf_compute/conf_compute_api.c +++ b/src/nvidia/src/kernel/gpu/conf_compute/conf_compute_api.c @@ -74,13 +74,21 @@ confComputeApiCtrlCmdSystemGetCapabilities_IMPL OBJSYS *pSys = SYS_GET_INSTANCE(); CONF_COMPUTE_CAPS *pCcCaps = pConfComputeApi->pCcCaps; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); pParams->cpuCapability = NV_CONF_COMPUTE_SYSTEM_CPU_CAPABILITY_NONE; if ((sysGetStaticConfig(pSys))->bOsCCEnabled) { pParams->cpuCapability = NV_CONF_COMPUTE_SYSTEM_CPU_CAPABILITY_AMD_SEV; - if ((sysGetStaticConfig(pSys))->bOsCCTdxEnabled) + if ((sysGetStaticConfig(pSys))->bOsCCSevSnpEnabled) + { + pParams->cpuCapability = NV_CONF_COMPUTE_SYSTEM_CPU_CAPABILITY_AMD_SEV_SNP; + } + else if ((sysGetStaticConfig(pSys))->bOsCCSnpVtomEnabled) + { + pParams->cpuCapability = NV_CONF_COMPUTE_SYSTEM_CPU_CAPABILITY_AMD_SNP_VTOM; + } + else if ((sysGetStaticConfig(pSys))->bOsCCTdxEnabled) { pParams->cpuCapability = NV_CONF_COMPUTE_SYSTEM_CPU_CAPABILITY_INTEL_TDX; } @@ -139,7 +147,7 @@ confComputeApiCtrlCmdSystemGetGpusState_IMPL NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_GPUS_STATE_PARAMS *pParams ) { - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); pParams->bAcceptClientRequest = pConfComputeApi->pCcCaps->bAcceptClientRequest; @@ -160,7 +168,7 @@ confComputeApiCtrlCmdSystemSetGpusState_IMPL NV_STATUS status = NV_OK; NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_SET_GPU_STATE_PARAMS params = {0}; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // Make sure 'ready state' can't be set after being set to false once. if (pConfComputeApi->pCcCaps->bFatalFailure) @@ -211,7 +219,7 @@ confComputeApiCtrlCmdGpuGetVidmemSize_IMPL NvU64 totalProtectedBytes = 0; NvU64 totalUnprotectedBytes = 0; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_CHECK_OK_OR_RETURN(LEVEL_INFO, subdeviceGetByHandle(RES_GET_CLIENT(pConfComputeApi), @@ -255,7 +263,7 @@ confComputeApiCtrlCmdGpuSetVidmemSize_IMPL NV_CONF_COMPUTE_CTRL_CMD_GPU_SET_VIDMEM_SIZE_PARAMS *pParams ) { - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); return NV_OK; } @@ -272,7 +280,7 @@ confComputeApiCtrlCmdGetGpuCertificate_IMPL ConfidentialCompute *pConfCompute = NULL; NV_STATUS status = NV_OK; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_CHECK_OK_OR_RETURN(LEVEL_INFO, subdeviceGetByHandle(RES_GET_CLIENT(pConfComputeApi), @@ -317,7 +325,7 @@ confComputeApiCtrlCmdGetGpuAttestationReport_IMPL ConfidentialCompute *pConfCompute = NULL; NV_STATUS status = NV_OK; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_CHECK_OK_OR_RETURN(LEVEL_INFO, subdeviceGetByHandle(RES_GET_CLIENT(pConfComputeApi), @@ -363,7 +371,7 @@ confComputeApiCtrlCmdGpuGetNumSecureChannels_IMPL OBJGPU *pGpu; KernelFifo *pKernelFifo; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_CHECK_OK_OR_RETURN(LEVEL_INFO, subdeviceGetByHandle(RES_GET_CLIENT(pConfComputeApi), @@ -388,7 +396,7 @@ confComputeApiCtrlCmdSystemGetSecurityPolicy_IMPL OBJSYS *pSys = SYS_GET_INSTANCE(); OBJGPUMGR *pGpuMgr = SYS_GET_GPUMGR(pSys); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); pParams->attackerAdvantage = pGpuMgr->ccAttackerAdvantage; @@ -411,10 +419,11 @@ confComputeApiCtrlCmdSystemSetSecurityPolicy_IMPL NV_STATUS status = NV_OK; NV2080_CTRL_CMD_INTERNAL_CONF_COMPUTE_SET_SECURITY_POLICY_PARAMS params = {0}; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // CC security policy can only be set before GpuReadyState is set. - NV_ASSERT_OR_RETURN(pConfComputeApi->pCcCaps->bAcceptClientRequest == NV_FALSE, NV_ERR_INVALID_STATE); + NV_CHECK_OR_RETURN(LEVEL_INFO, pConfComputeApi->pCcCaps->bAcceptClientRequest == NV_FALSE, + NV_ERR_INVALID_STATE); if ((pParams->attackerAdvantage < SET_SECURITY_POLICY_ATTACKER_ADVANTAGE_MIN) || (pParams->attackerAdvantage > SET_SECURITY_POLICY_ATTACKER_ADVANTAGE_MAX)) @@ -461,7 +470,7 @@ confComputeApiCtrlCmdGpuGetKeyRotationState_IMPL NvBool bKernelKeyRotation = NV_FALSE; NvBool bUserKeyRotation = NV_FALSE; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_CHECK_OK_OR_RETURN(LEVEL_INFO, subdeviceGetByHandle(RES_GET_CLIENT(pConfComputeApi), diff --git a/src/nvidia/src/kernel/gpu/conf_compute/conf_compute_key_rotation.c b/src/nvidia/src/kernel/gpu/conf_compute/conf_compute_key_rotation.c index 8dbffdfa0e..fc8540901f 100644 --- a/src/nvidia/src/kernel/gpu/conf_compute/conf_compute_key_rotation.c +++ b/src/nvidia/src/kernel/gpu/conf_compute/conf_compute_key_rotation.c @@ -96,8 +96,8 @@ performKeyRotation_WORKITEM NV_ASSERT_OK(kchannelUpdateNotifierMem(pKernelChannel, NV_CHANNELGPFIFO_NOTIFICATION_TYPE_KEY_ROTATION_STATUS, pConfCompute->keyRotationCount[h2dIndex], 0, (NvU32)pWorkItemInfo->status)); - NV_PRINTF(LEVEL_INFO, "chid 0x%x was NOT disabled for key rotation, writing notifier with val 0x%x\n", - kchannelGetDebugTag(pKernelChannel), (NvU32)pWorkItemInfo->status); + NV_PRINTF(LEVEL_INFO, "chid 0x%x (hChannel 0x%x) was NOT disabled for key rotation, writing notifier with val 0x%x\n", + kchannelGetDebugTag(pKernelChannel), (NvU32)RES_GET_HANDLE(pKernelChannel), (NvU32)pWorkItemInfo->status); // send events to clients if registered kchannelNotifyEvent(pKernelChannel, NVC86F_NOTIFIERS_KEY_ROTATION, pConfCompute->keyRotationCount[h2dIndex], pWorkItemInfo->status, NULL, 0); @@ -167,14 +167,19 @@ performKeyRotationByKeyPair { if (kchannelIsDisabledForKeyRotation(pGpu, pKernelChannel)) { + NV_ASSERT_OK(kchannelUpdateNotifierMem(pKernelChannel, NV_CHANNELGPFIFO_NOTIFICATION_TYPE_KEY_ROTATION_STATUS, + pConfCompute->keyRotationCount[h2dIndex] - 1, 0, (NvU32)KEY_ROTATION_STATUS_IDLE)); + NV_ASSERT_OK(kchannelUpdateNotifierMem(pKernelChannel, NV_CHANNELGPFIFO_NOTIFICATION_TYPE_KEY_ROTATION_STATUS, pConfCompute->keyRotationCount[h2dIndex], 0, (NvU32)KEY_ROTATION_STATUS_IDLE)); // send events to clients if registered kchannelNotifyEvent(pKernelChannel, NVC86F_NOTIFIERS_KEY_ROTATION, pConfCompute->keyRotationCount[h2dIndex], (NvU16)KEY_ROTATION_STATUS_IDLE, NULL, 0); - NV_PRINTF(LEVEL_INFO, "chid 0x%x was disabled for key rotation, writing notifier with KEY_ROTATION_STATUS_IDLE\n", - kchannelGetDebugTag(pKernelChannel)); + + NV_PRINTF(LEVEL_SILENT, + "chid 0x%x (hChannel 0x%x) was disabled for key rotation, writing notifier with KEY_ROTATION_STATUS_IDLE\n", + kchannelGetDebugTag(pKernelChannel), (NvU32)RES_GET_HANDLE(pKernelChannel)); // also reset channel sw state kchannelDisableForKeyRotation(pGpu, pKernelChannel, NV_FALSE); @@ -186,10 +191,6 @@ performKeyRotationByKeyPair portMemSet(pKernelChannel->pEncStatsBuf, 0, sizeof(CC_CRYPTOBUNDLE_STATS)); } - // reset KR state - pConfCompute->keyRotationCallbackCount[h2dIndex] = 1; - pConfCompute->keyRotationCallbackCount[d2hIndex] = 1; - // clear aggregate and freed channel stats pConfCompute->aggregateStats[h2dIndex].totalBytesEncrypted = 0; pConfCompute->aggregateStats[h2dIndex].totalEncryptOps = 0; @@ -236,6 +237,10 @@ performKeyRotationByKeyPair } } } + + NV_PRINTF(LEVEL_INFO, "Key rotation successful for key IDs 0x%x and 0x%x.\n", h2dKey, d2hKey); + NV_PRINTF(LEVEL_INFO, "This keypair has been rotated %u times.\n", pConfCompute->keyRotationCount[h2dIndex]); + return NV_OK; } @@ -272,7 +277,9 @@ confComputeCheckAndPerformKeyRotation_IMPL // check if all channels are idle if (!kchannelIsDisabledForKeyRotation(pGpu, pKernelChannel)) { - NV_PRINTF(LEVEL_INFO, "chid 0x%x was NOT disabled for key rotation, can't start KR yet\n", kchannelGetDebugTag(pKernelChannel)); + NV_PRINTF(LEVEL_SILENT, + "chid 0x%x (hChannel 0x%x) was NOT disabled for key rotation, can't start KR yet\n", + kchannelGetDebugTag(pKernelChannel), (NvU32)RES_GET_HANDLE(pKernelChannel)); bIdle = NV_FALSE; break; } @@ -514,17 +521,7 @@ confComputeSetKeyRotationThreshold_IMPL(ConfidentialCompute *pConfCompute, 12148001999ull, 8589934591ull, 6074000999ull, - 4294967295ull, - 3037000499ull, - 2147483647ull, - 1518500249ull, - 1073741823ull, - 759250124ull, - 536870911ull, - 379625061ull, - 268435455ull, - 189812530ull, - 134217727ull}; + 4294967295ull}; NV_ASSERT_OR_RETURN((attackerAdvantage >= offset) && (attackerAdvantage <= (offset + NV_ARRAY_ELEMENTS(keyRotationUpperThreshold) - 1)), @@ -532,7 +529,7 @@ confComputeSetKeyRotationThreshold_IMPL(ConfidentialCompute *pConfCompute, pConfCompute->keyRotationUpperThreshold = keyRotationUpperThreshold[attackerAdvantage - offset]; pConfCompute->keyRotationLowerThreshold = pConfCompute->keyRotationUpperThreshold - - pConfCompute->keyRotationThresholdDelta; + pConfCompute->keyRotationThresholdDelta; NV_PRINTF(LEVEL_INFO, "Setting key rotation attacker advantage to %llu.\n", attackerAdvantage); NV_PRINTF(LEVEL_INFO, "Key rotation lower threshold is %llu and upper threshold is %llu.\n", diff --git a/src/nvidia/src/kernel/gpu/conf_compute/conf_compute_keystore.c b/src/nvidia/src/kernel/gpu/conf_compute/conf_compute_keystore.c deleted file mode 100644 index 8bad6d00e2..0000000000 --- a/src/nvidia/src/kernel/gpu/conf_compute/conf_compute_keystore.c +++ /dev/null @@ -1,350 +0,0 @@ -/* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. - * SPDX-License-Identifier: MIT - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include "kernel/gpu/conf_compute/conf_compute_keystore.h" -#include "class/cl2080.h" -#include "libraries/nvport/nvport.h" - -#define NUM_SLOTS (KEYSTORE_SLOT_LCE_MGPU(7) + 1) - -#define CONCAT64(hi, low) ((((NvU64)(hi) << 32)) | ((NvU64)(low))) - -// TODO: Remove once key slots are populated by SPDM module. -#define lceBundle \ -{\ - .encryptBundle =\ - {\ - .key = {0x38782F41, 0x3F442847, 0x2B4B6250, 0x65536756, 0x6B597033, 0x73367639, 0x79244226, 0x45294840},\ - .iv = {0x00000000, 0x00000000, 0x00000000},\ - .ivMask = {0x00000000, 0x00000000, 0x00000000}\ - },\ - .decryptBundle =\ - {\ - .key = {0x566B5970, 0x33733676, 0x39792442, 0x26452948, 0x404D6251, 0x65546857, 0x6D5A7134, 0x74377721},\ - .iv = {0x00000000, 0x00000000, 0x00000000},\ - .ivMask = {0x00000000, 0x00000000, 0x00000000}\ - },\ - .bIsWorkLaunch = NV_FALSE\ -} - -static enum {HCC, APM} ccMode; - -// TODO: Remove initialization once key slots are populated by SPDM module. -// Currently the APM Requester will populate the SEC2 slots. -// HCC still relies on hardcoded keys. -static CC_KMB keySlot[NUM_SLOTS] = -{ - lceBundle, lceBundle, - lceBundle, lceBundle, lceBundle, - lceBundle, lceBundle, lceBundle, - lceBundle, lceBundle, lceBundle, - lceBundle, lceBundle, lceBundle, - lceBundle, lceBundle, lceBundle, - lceBundle, lceBundle, lceBundle, - lceBundle, lceBundle, lceBundle, - lceBundle, lceBundle, lceBundle -}; - -static NV_STATUS checkSlot (NvU32 slotNumber, ROTATE_IV_TYPE rotateOperation); -static void incrementChannelCounter (NvU32 slotNumber, ROTATE_IV_TYPE rotateOperation); -static NvU64 getChannelCounter (NvU32 slotNumber, ROTATE_IV_TYPE rotateOperation); -static NV_STATUS checkAndIncrementSlot (NvU32 slotNumber, ROTATE_IV_TYPE rotateOperation); -static NV_STATUS getSlotNumberLce (KernelChannel *pKernelChannel, NvU32 *slotNumber); -static NvU64 getChannelMaxValue (void); - -NV_STATUS -ccKeyStoreInit (OBJGPU *pGpu) -{ - if (gpuIsApmFeatureEnabled(pGpu)) - { - ccMode = APM; - } - else if (gpuIsCCFeatureEnabled(pGpu)) - { - ccMode = HCC; - } - else - { - return NV_ERR_INVALID_STATE; - } - - return NV_OK; -} - -NV_STATUS -ccKeyStoreDeposit -( - NvU32 slotNumber, - CC_KMB keyMaterialBundle -) -{ - if (slotNumber >= NUM_SLOTS) - { - return NV_ERR_INVALID_INDEX; - } - - keySlot[slotNumber] = keyMaterialBundle; - - for (NvU32 index = 0; index < CC_AES_256_GCM_IV_SIZE_DWORD; index++) - { - keySlot[slotNumber].encryptBundle.iv[index] = 0; - keySlot[slotNumber].decryptBundle.iv[index] = 0; - } - - return NV_OK; -} - -NV_STATUS -ccKeyStoreRetrieveViaChannel -( - KernelChannel *pKernelChannel, - ROTATE_IV_TYPE rotateOperation, - PCC_KMB keyMaterialBundle -) -{ - NvU32 slotNumber; - - if (RM_ENGINE_TYPE_IS_COPY(kchannelGetEngineType(pKernelChannel))) - { - if (getSlotNumberLce (pKernelChannel, &slotNumber) != NV_OK) - { - return NV_ERR_INVALID_PARAMETER; - } - } - else if (kchannelGetEngineType(pKernelChannel) == RM_ENGINE_TYPE_SEC2) - { - slotNumber = KEYSTORE_SLOT_SEC2; - } - else - { - return NV_ERR_INVALID_PARAMETER; - } - - if ((rotateOperation == ROTATE_IV_ENCRYPT) || (rotateOperation == ROTATE_IV_ALL_VALID)) - { - if (checkAndIncrementSlot (slotNumber, ROTATE_IV_ENCRYPT) != NV_OK) - { - // Right now returns error to caller. Depending on how the re-keying flow is designed - // this may initiate re-keying. - - return NV_ERR_INSUFFICIENT_RESOURCES; - } - } - - if ((rotateOperation == ROTATE_IV_DECRYPT) || (rotateOperation == ROTATE_IV_ALL_VALID)) - { - if (checkAndIncrementSlot (slotNumber, ROTATE_IV_DECRYPT) != NV_OK) - { - // Right now returns error to caller. Depending on how the re-keying flow is designed - // this may initiate re-keying. - - return NV_ERR_INSUFFICIENT_RESOURCES; - } - } - - *keyMaterialBundle = keySlot[slotNumber]; - - return NV_OK; -} - -void -cckeyStoreClear (void) -{ - portMemSet (keySlot, 0, sizeof(keySlot)); -} - -static NV_STATUS -getSlotNumberLce -( - KernelChannel *pKernelChannel, - NvU32 *slotNumber -) -{ - NvU8 index; - - // TODO: Get actual privilege level of channel. For now assume - // all channels have user mode privilege. - switch (kchannelGetEngineType(pKernelChannel)) - { - case RM_ENGINE_TYPE_COPY0: - index = 0; - break; - case RM_ENGINE_TYPE_COPY1: - index = 1; - break; - case RM_ENGINE_TYPE_COPY2: - index = 2; - break; - case RM_ENGINE_TYPE_COPY3: - index = 3; - break; - case RM_ENGINE_TYPE_COPY4: - index = 4; - break; - case RM_ENGINE_TYPE_COPY5: - index = 5; - break; - case RM_ENGINE_TYPE_COPY6: - index = 6; - break; - case RM_ENGINE_TYPE_COPY7: - index = 7; - break; - default: - return NV_ERR_GENERIC; - } - - *slotNumber = KEYSTORE_SLOT_LCE_UMD(index); - - return NV_OK; -} - -static NV_STATUS -checkAndIncrementSlot -( - NvU32 slotNumber, - ROTATE_IV_TYPE rotateOperation // Will only be ROTATE_IV_ENCRYPT or ROTATE_IV_DECRYPT. -) -{ - if (checkSlot (slotNumber, rotateOperation) != NV_OK) - { - return NV_ERR_GENERIC; - } - - // TODO: Unconditionally increment channel counter once HCC supports it. - if (ccMode == APM) - { - incrementChannelCounter (slotNumber, rotateOperation); - } - - return NV_OK; -} - -static NV_STATUS -checkSlot -( - NvU32 slotNumber, - ROTATE_IV_TYPE rotateOperation // Will only be ROTATE_IV_ENCRYPT or ROTATE_IV_DECRYPT. -) -{ - if (getChannelCounter (slotNumber, rotateOperation) == getChannelMaxValue()) - { - return NV_ERR_GENERIC; - } - - return NV_OK; -} - -static void -incrementChannelCounter -( - NvU32 slotNumber, - ROTATE_IV_TYPE rotateOperation // Will only be ROTATE_IV_ENCRYPT or ROTATE_IV_DECRYPT. -) -{ - NvU64 channelCounter = getChannelCounter (slotNumber, rotateOperation); - - channelCounter++; - - switch (rotateOperation) - { - case ROTATE_IV_ENCRYPT: - if (ccMode == HCC) - { - keySlot[slotNumber].encryptBundle.iv[2] = (NvU32) (channelCounter >> 32); - keySlot[slotNumber].encryptBundle.iv[1] = (NvU32) (channelCounter); - } - else if (ccMode == APM) - { - keySlot[slotNumber].encryptBundle.iv[2] = (NvU32) (channelCounter); - } - break; - case ROTATE_IV_DECRYPT: - if (ccMode == HCC) - { - keySlot[slotNumber].decryptBundle.iv[2] = (NvU32) (channelCounter >> 32); - keySlot[slotNumber].decryptBundle.iv[1] = (NvU32) (channelCounter); - } - else if (ccMode == APM) - { - keySlot[slotNumber].decryptBundle.iv[2] = (NvU32) (channelCounter); - } - break; - default: - break; - } -} - -static NvU64 -getChannelCounter -( - NvU32 slotNumber, - ROTATE_IV_TYPE rotateOperation // Will only be ROTATE_IV_ENCRYPT or ROTATE_IV_DECRYPT. -) -{ - NvU64 channelCounter = 0; - - switch (rotateOperation) - { - case ROTATE_IV_ENCRYPT: - if (ccMode == HCC) - { - channelCounter = CONCAT64(keySlot[slotNumber].encryptBundle.iv[2], - keySlot[slotNumber].encryptBundle.iv[1]); - } - else if (ccMode == APM) - { - channelCounter = keySlot[slotNumber].encryptBundle.iv[2]; - } - break; - case ROTATE_IV_DECRYPT: - if (ccMode == HCC) - { - channelCounter = CONCAT64(keySlot[slotNumber].decryptBundle.iv[2], - keySlot[slotNumber].decryptBundle.iv[1]); - } - else if (ccMode == APM) - { - channelCounter = keySlot[slotNumber].decryptBundle.iv[2]; - } - break; - default: - break; - } - - return channelCounter; -} - -static NvU64 -getChannelMaxValue (void) -{ - switch (ccMode) - { - case HCC: - return NV_U64_MAX; - case APM: - return NV_U32_MAX; - default: - return 0; - } -} diff --git a/src/nvidia/src/kernel/gpu/deferred_api.c b/src/nvidia/src/kernel/gpu/deferred_api.c index f285669553..35263e7b7d 100644 --- a/src/nvidia/src/kernel/gpu/deferred_api.c +++ b/src/nvidia/src/kernel/gpu/deferred_api.c @@ -529,10 +529,6 @@ _class5080DeferredApiV2 break; } - case NV2080_CTRL_CMD_FB_SET_GPU_CACHE_ALLOC_POLICY_V2: - paramSize = sizeof(NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS); - break; - case NV2080_CTRL_CMD_GR_CTXSW_ZCULL_BIND: paramSize = sizeof(NV2080_CTRL_GR_CTXSW_ZCULL_BIND_PARAMS); break; @@ -545,10 +541,6 @@ _class5080DeferredApiV2 paramSize = sizeof(NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS); break; - case NV2080_CTRL_CMD_FB_SET_GPU_CACHE_PROMOTION_POLICY: - paramSize = sizeof(NV2080_CTRL_FB_GPU_CACHE_PROMOTION_POLICY_PARAMS); - break; - default: bIsCtrlCall = NV_FALSE; paramSize = 0; diff --git a/src/nvidia/src/kernel/gpu/device_ctrl.c b/src/nvidia/src/kernel/gpu/device_ctrl.c index 6012ba7811..fd61013919 100644 --- a/src/nvidia/src/kernel/gpu/device_ctrl.c +++ b/src/nvidia/src/kernel/gpu/device_ctrl.c @@ -61,7 +61,7 @@ deviceCtrlCmdGpuGetClasslist_IMPL { OBJGPU *pGpu = GPU_RES_GET_GPU(pDevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); return gpuGetClassList(pGpu, &pClassListParams->numClasses, NvP64_VALUE(pClassListParams->classList), ENG_INVALID); @@ -83,7 +83,7 @@ deviceCtrlCmdGpuGetClasslistV2_IMPL { OBJGPU *pGpu = GPU_RES_GET_GPU(pDevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); pClassListParams->numClasses = NV0080_CTRL_GPU_CLASSLIST_MAX_SIZE; @@ -298,7 +298,7 @@ deviceCtrlCmdGpuGetSriovCaps_IMPL { OBJGPU *pGpu = GPU_RES_GET_GPU(pDevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); return gpuGetSriovCaps_HAL(pGpu, pParams); } @@ -444,7 +444,7 @@ deviceCtrlCmdGpuGetSparseTextureComputeMode_IMPL NV_STATUS status; OBJGPU *pGpu = GPU_RES_GET_GPU(pDevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); status = gpuGetSparseTextureComputeMode(pGpu, &pModeParams->defaultSetting, @@ -480,7 +480,7 @@ deviceCtrlCmdGpuSetSparseTextureComputeMode_IMPL NV_STATUS status = NV_ERR_NOT_SUPPORTED; OBJGPU *pGpu = GPU_RES_GET_GPU(pDevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // // In SLI, both GPUs will have the same setting for sparse texture/compute diff --git a/src/nvidia/src/kernel/gpu/disp/disp_channel.c b/src/nvidia/src/kernel/gpu/disp/disp_channel.c index ebe7492d94..7f2574e934 100644 --- a/src/nvidia/src/kernel/gpu/disp/disp_channel.c +++ b/src/nvidia/src/kernel/gpu/disp/disp_channel.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -49,13 +49,15 @@ static void dispchnParseAllocParams ( - DispChannel *pDispChannel, - void *pAllocParams, - NvU32 *pChannelInstance, - NvHandle *pHObjectBuffer, - NvU32 *pInitialGetPutOffset, - NvBool *pAllowGrabWithinSameClient, - NvBool *pConnectPbAtGrab + DispChannel *pDispChannel, + void *pAllocParams, + NvU32 *pChannelInstance, + NvHandle *pHObjectBuffer, + NvU32 *pInitialGetPutOffset, + NvBool *pAllowGrabWithinSameClient, + NvBool *pConnectPbAtGrab, + ChannelPBSize *channelPBSize, + NvU32 *pSubDeviceId ) { NV50VAIO_CHANNELDMA_ALLOCATION_PARAMETERS *pDmaChannelAllocParams = NULL; @@ -66,10 +68,11 @@ dispchnParseAllocParams if (pDispChannel->bIsDma) { - pDmaChannelAllocParams = pAllocParams; - *pChannelInstance = pDmaChannelAllocParams->channelInstance; - *pHObjectBuffer = pDmaChannelAllocParams->hObjectBuffer; - *pInitialGetPutOffset = pDmaChannelAllocParams->offset; + pDmaChannelAllocParams = pAllocParams; + *pChannelInstance = pDmaChannelAllocParams->channelInstance; + *pHObjectBuffer = pDmaChannelAllocParams->hObjectBuffer; + *pInitialGetPutOffset = pDmaChannelAllocParams->offset; + *channelPBSize = pDmaChannelAllocParams->channelPBSize; if (FLD_TEST_DRF(50VAIO_CHANNELDMA_ALLOCATION, _FLAGS, _CONNECT_PB_AT_GRAB, _YES, @@ -82,13 +85,16 @@ dispchnParseAllocParams { NV_PRINTF(LEVEL_WARNING, "Error notifier parameter is not used in Display channel allocation.\n"); } + + *pSubDeviceId = pDmaChannelAllocParams->subDeviceId; } else { - pPioChannelAllocParams = pAllocParams; - *pChannelInstance = pPioChannelAllocParams->channelInstance; - *pHObjectBuffer = 0; // No one should look at this. So, 0 should be fine. - *pInitialGetPutOffset = 0; // No one should look at this. So, 0 should be fine. + pPioChannelAllocParams = pAllocParams; + *pChannelInstance = pPioChannelAllocParams->channelInstance; + *pHObjectBuffer = 0; // No one should look at this. So, 0 should be fine. + *pInitialGetPutOffset = 0; // No one should look at this. So, 0 should be fine. + *channelPBSize = 0; // No one should look at this. So, 0 should be fine. if (pPioChannelAllocParams->hObjectNotify != 0) { @@ -121,6 +127,8 @@ dispchnConstruct_IMPL DispObject *pDispObject = dynamicCast(pParentRef->pResource, DispObject); ContextDma *pBufferContextDma = NULL; NvU32 hClass = RES_GET_EXT_CLASS_ID(pDispChannel); + ChannelPBSize channelPBSize; + NvU32 subDeviceId = 0U; NV_ASSERT_OR_RETURN(pDispObject, NV_ERR_INVALID_OBJECT_HANDLE); @@ -159,7 +167,9 @@ dispchnConstruct_IMPL &hObjectBuffer, &initialGetPutOffset, &allowGrabWithinSameClient, - &connectPbAtGrab); + &connectPbAtGrab, + &channelPBSize, + &subDeviceId); rmStatus = kdispGetIntChnClsForHwCls(pKernelDisplay, RES_GET_EXT_CLASS_ID(pDispChannel), @@ -188,7 +198,9 @@ dispchnConstruct_IMPL pBufferContextDma, hClass, channelInstance, - internalDispChnClass); + internalDispChnClass, + channelPBSize, + subDeviceId); if (rmStatus != NV_OK) return rmStatus; } @@ -262,6 +274,8 @@ dispchnGrabChannel_IMPL NvBool connectPbAtGrab; ContextDma *pBufferContextDma = NULL; DISPCHNCLASS internalDispChnClass; + ChannelPBSize channelPBSize; + NvU32 subDeviceId = 0U; if (RES_GET_PARENT_HANDLE(pDispChannel) != hParent) { @@ -278,7 +292,9 @@ dispchnGrabChannel_IMPL &hObjectBuffer, &initialGetPutOffset, &allowGrabWithinSameClient, - &connectPbAtGrab); + &connectPbAtGrab, + &channelPBSize, + &subDeviceId); // // The handle already exists in our DB. @@ -307,7 +323,9 @@ dispchnGrabChannel_IMPL pBufferContextDma, hClass, channelInstance, - internalDispChnClass); + internalDispChnClass, + channelPBSize, + subDeviceId); if (rmStatus != NV_OK) return rmStatus; } @@ -735,7 +753,9 @@ kdispSetPushBufferParamsToPhysical_IMPL ContextDma *pBufferContextDma, NvU32 hClass, NvU32 channelInstance, - DISPCHNCLASS internalDispChnClass + DISPCHNCLASS internalDispChnClass, + ChannelPBSize channelPBSize, + NvU32 subDeviceId ) { RsClient *pClient = RES_GET_CLIENT(pDispChannel); @@ -752,6 +772,7 @@ kdispSetPushBufferParamsToPhysical_IMPL pushBufferParams.hclass = hClass; pushBufferParams.channelInstance = channelInstance; + pushBufferParams.subDeviceId = subDeviceId; if (pDispChannel->bIsDma) { @@ -778,6 +799,16 @@ kdispSetPushBufferParamsToPhysical_IMPL pKernelDisplay, pushBufferParams.addressSpace, pushBufferParams.cacheSnoop); + + NvU32 size = NVBIT32(channelPBSize + 12) - 1; + if (size <= pushBufferParams.limit) + { + pushBufferParams.channelPBSize = (NvU32)channelPBSize; + } + else + { + return NV_ERR_INVALID_ARGUMENT; + } pushBufferParams.valid = NV_TRUE; } else diff --git a/src/nvidia/src/kernel/gpu/disp/disp_common_kern_ctrl_minimal.c b/src/nvidia/src/kernel/gpu/disp/disp_common_kern_ctrl_minimal.c index 7644f456fb..95c171cd6b 100644 --- a/src/nvidia/src/kernel/gpu/disp/disp_common_kern_ctrl_minimal.c +++ b/src/nvidia/src/kernel/gpu/disp/disp_common_kern_ctrl_minimal.c @@ -101,7 +101,7 @@ dispcmnCtrlCmdSystemGetHotplugUnplugState_IMPL } /*! - * @brief Allocate display bandwidth. + * @brief Allocate display memory bandwidth. */ NV_STATUS dispcmnCtrlCmdSystemAllocateDisplayBandwidth_IMPL @@ -113,6 +113,9 @@ dispcmnCtrlCmdSystemAllocateDisplayBandwidth_IMPL OBJGPU *pGpu; KernelDisplay *pKernelDisplay; NV_STATUS status; + RM_API *pRmApi; + NvU32 hClient; + NvU32 hSubdevice; // client gave us a subdevice #: get right pGpu for it status = dispapiSetUnicastAndSynchronize_HAL( @@ -127,11 +130,38 @@ dispcmnCtrlCmdSystemAllocateDisplayBandwidth_IMPL } pKernelDisplay = GPU_GET_KERNEL_DISPLAY(pGpu); - return kdispArbAndAllocDisplayBandwidth_HAL(pGpu, - pKernelDisplay, - DISPLAY_ICC_BW_CLIENT_EXT, - pParams->averageBandwidthKBPS, - pParams->floorBandwidthKBPS); + if (pKernelDisplay->getProperty(pKernelDisplay, + PDB_PROP_KDISP_IMP_ALLOC_BW_IN_KERNEL_RM_DEF)) + { + // Process the request in Kernel RM. + status = + kdispArbAndAllocDisplayBandwidth_HAL(pGpu, + pKernelDisplay, + DISPLAY_ICC_BW_CLIENT_EXT, + pParams->averageBandwidthKBPS, + pParams->floorBandwidthKBPS); + } + else + { + // + // In this function, we are processing an + // NV0073_CTRL_CMD_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH RmCtrl call. But + // we are in Kernel RM, and if + // PDB_PROP_KDISP_IMP_ALLOC_BW_IN_KERNEL_RM_DEF is false, we want to + // process the call in Physical RM. So invoke the + // NV0073_CTRL_CMD_SYSTEM_INTERNAL_ALLOCATE_DISPLAY_BANDWIDTH RmCtrl + // call, which is configured to run in Physical RM, with the same + // parameters. + // + pRmApi = GPU_GET_PHYSICAL_RMAPI(DISPAPI_GET_GPU(pDispCommon)); + hClient = RES_GET_CLIENT_HANDLE(pDispCommon); + hSubdevice = RES_GET_HANDLE(pDispCommon); + status = + pRmApi->Control(pRmApi, hClient, hSubdevice, + NV0073_CTRL_CMD_SYSTEM_INTERNAL_ALLOCATE_DISPLAY_BANDWIDTH, + pParams, sizeof(*pParams)); + } + return status; } NV_STATUS diff --git a/src/nvidia/src/kernel/gpu/disp/disp_object_kern_ctrl_minimal.c b/src/nvidia/src/kernel/gpu/disp/disp_object_kern_ctrl_minimal.c index def5cf6c51..d0a674f9bf 100644 --- a/src/nvidia/src/kernel/gpu/disp/disp_object_kern_ctrl_minimal.c +++ b/src/nvidia/src/kernel/gpu/disp/disp_object_kern_ctrl_minimal.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -171,20 +171,16 @@ dispobjCtrlCmdGetRgConnectedLockpinStateless_IMPL OBJGPU *pGpu = DISPAPI_GET_GPU(pDispObject); KernelDisplay *pKernelDisplay = GPU_GET_KERNEL_DISPLAY(pGpu); NvHandle hClient = RES_GET_CLIENT_HANDLE(pDispObject); - DisplayApi *pDisplayApi; OBJGPU *pPeerGpu; NV_ASSERT_OR_RETURN(pParams->head < pKernelDisplay->numHeads, NV_ERR_INVALID_ARGUMENT); - if (!CliGetDispInfo(hClient, pParams->peer.hDisplay, &pDisplayApi) && - !CliGetDispCommonInfo(hClient, pParams->peer.hDisplay, &pDisplayApi)) - { - return NV_ERR_INVALID_OBJECT_HANDLE; - } - RsResourceRef *pPeerDisplayRef; NV_ASSERT_OK_OR_RETURN(serverutilGetResourceRef(hClient, pParams->peer.hDisplay, &pPeerDisplayRef)); NV_ASSERT_OR_RETURN(pPeerDisplayRef->pParentRef != NULL, NV_ERR_INVALID_STATE); + NV_ASSERT_OR_RETURN((dynamicCast(pPeerDisplayRef->pResource, DispCommon) != NULL || + dynamicCast(pPeerDisplayRef->pResource, DispObject) != NULL), + NV_ERR_INVALID_OBJECT); Subdevice *pPeerSubdevice; NV_ASSERT_OK_OR_RETURN(subdeviceGetByInstance(RES_GET_CLIENT(pDispObject), pPeerDisplayRef->pParentRef->hResource, diff --git a/src/nvidia/src/kernel/gpu/disp/disp_objs.c b/src/nvidia/src/kernel/gpu/disp/disp_objs.c index a56a7db9fa..9e05de099b 100644 --- a/src/nvidia/src/kernel/gpu/disp/disp_objs.c +++ b/src/nvidia/src/kernel/gpu/disp/disp_objs.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -64,7 +64,7 @@ dispapiConstruct_IMPL NvBool bBcResource; NvU32 i; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // Use gpuGetByRef instead of GpuResource because it will work even if resource // isn't a GpuResource. @@ -613,80 +613,6 @@ CliFindDispChannelInfo return NV_OK; } -/** - * @warning This function is deprecated! Please use dispcmnGetByHandle. - */ -NvBool -CliGetDispCommonInfo -( - NvHandle hClient, - NvHandle hDispCommon, - DisplayApi **ppDisplayApi -) -{ - RsClient *pClient; - NV_STATUS status; - DispCommon *pDispCommon; - - *ppDisplayApi = NULL; - - status = serverGetClientUnderLock(&g_resServ, hClient, &pClient); - if (status != NV_OK) - return NV_FALSE; - - status = dispcmnGetByHandle(pClient, hDispCommon, &pDispCommon); - if (status != NV_OK) - return NV_FALSE; - - *ppDisplayApi = staticCast(pDispCommon, DisplayApi); - - return NV_TRUE; -} - -/** - * @warning This function is deprecated! Please use dispobjGetByHandle. - */ -NvBool -CliGetDispInfo -( - NvHandle hClient, - NvHandle hObject, - DisplayApi **pDisplayApi -) -{ - if (!pDisplayApi) - return NV_FALSE; - - *pDisplayApi = CliGetDispFromDispHandle(hClient, hObject); - - return *pDisplayApi ? NV_TRUE : NV_FALSE; -} - -/** - * @warning This function is deprecated! Please use dispobjGetByHandle. - */ -DisplayApi * -CliGetDispFromDispHandle -( - NvHandle hClient, - NvHandle hDisp -) -{ - RsClient *pClient; - NV_STATUS status; - DispObject *pDispObject; - - status = serverGetClientUnderLock(&g_resServ, hClient, &pClient); - if (status != NV_OK) - return NULL; - - status = dispobjGetByHandle(pClient, hDisp, &pDispObject); - if (status != NV_OK) - return NULL; - - return staticCast(pDispObject, DisplayApi); -} - // // DISP Event RM Controls // diff --git a/src/nvidia/src/kernel/gpu/disp/inst_mem/arch/v03/disp_inst_mem_0300.c b/src/nvidia/src/kernel/gpu/disp/inst_mem/arch/v03/disp_inst_mem_0300.c index 50fb48bbc5..e6c8f0fadb 100644 --- a/src/nvidia/src/kernel/gpu/disp/inst_mem/arch/v03/disp_inst_mem_0300.c +++ b/src/nvidia/src/kernel/gpu/disp/inst_mem/arch/v03/disp_inst_mem_0300.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2017-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2017-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -152,7 +152,7 @@ instmemCommitContextDma_v03_00 MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); RmPhysAddr FrameAddr, Limit; RmPhysAddr FrameAddr256Align; - RmPhysAddr Limit256Align; + RmPhysAddr LimitAlign; NvU32 ctxDMAFlag; NvU32 instoffset; NvU8 *pInstMemCpuVA; @@ -250,11 +250,11 @@ instmemCommitContextDma_v03_00 MEM_WR32(pInstMemCpuVA + SF_OFFSET(NV_DMA_ADDRESS_BASE_HI), // word 2 NvU64_HI32(FrameAddr256Align)); - Limit256Align = Limit >> 8; + LimitAlign = Limit >> 8; MEM_WR32(pInstMemCpuVA + SF_OFFSET(NV_DMA_ADDRESS_LIMIT_LO), // word 3 - NvU64_LO32(Limit256Align)); + NvU64_LO32(LimitAlign)); MEM_WR32(pInstMemCpuVA + SF_OFFSET(NV_DMA_ADDRESS_LIMIT_HI), // word 4 - NvU64_HI32(Limit256Align)); + NvU64_HI32(LimitAlign)); memmgrMemEndTransfer(pMemoryManager, &dest, NV_DMA_SIZE, TRANSFER_FLAGS_SHADOW_ALLOC); @@ -314,11 +314,11 @@ instmemUpdateContextDma_v03_00 if (pNewLimit != NULL) { - NvU64 newLimit256Align = (*pNewLimit) >> 8; + NvU64 newLimitAlign = (*pNewLimit) >> 8; MEM_WR32(pInst + SF_OFFSET(NV_DMA_ADDRESS_LIMIT_LO), - NvU64_LO32(newLimit256Align)); + NvU64_LO32(newLimitAlign)); MEM_WR32(pInst + SF_OFFSET(NV_DMA_ADDRESS_LIMIT_HI), - NvU64_HI32(newLimit256Align)); + NvU64_HI32(newLimitAlign)); } if (comprInfo != NV0002_CTRL_CMD_UPDATE_CONTEXTDMA_FLAGS_USE_COMPR_INFO_NONE) diff --git a/src/nvidia/src/kernel/gpu/disp/kern_disp.c b/src/nvidia/src/kernel/gpu/disp/kern_disp.c index d5e20f862a..bac8b72da0 100644 --- a/src/nvidia/src/kernel/gpu/disp/kern_disp.c +++ b/src/nvidia/src/kernel/gpu/disp/kern_disp.c @@ -125,6 +125,10 @@ kdispConstructEngine_IMPL(OBJGPU *pGpu, // We defer checking whether DISP has been disabled some other way until // StateInit, when we can do a control call. + NV_ASSERT_OR_RETURN(pKernelDisplay->pVblankSpinLock == NULL, NV_ERR_INVALID_STATE); + pKernelDisplay->pVblankSpinLock = (PORT_SPINLOCK *) portSyncSpinlockCreate(portMemAllocatorGetGlobalNonPaged()); + NV_ASSERT_OR_RETURN((pKernelDisplay->pVblankSpinLock != NULL), NV_ERR_INSUFFICIENT_RESOURCES); + return status; } @@ -134,6 +138,12 @@ kdispDestruct_IMPL KernelDisplay *pKernelDisplay ) { + if (pKernelDisplay->pVblankSpinLock != NULL) + { + portSyncSpinlockDestroy(pKernelDisplay->pVblankSpinLock); + pKernelDisplay->pVblankSpinLock = NULL; + } + // Destroy children kdispDestructInstMem_HAL(pKernelDisplay); kdispDestructKhead(pKernelDisplay); @@ -295,8 +305,6 @@ kdispStatePreInitLocked_IMPL(OBJGPU *pGpu, kdispUpdatePdbAfterIpHalInit(pKernelDisplay); - kdispInitRegistryOverrides_HAL(pGpu, pKernelDisplay); - kdispAllocateCommonHandle(pGpu, pKernelDisplay); return status; @@ -379,37 +387,6 @@ kdispSetupAcpiEdid_IMPL return status; } -void -kdispInitRegistryOverrides_IMPL(OBJGPU *pGpu, - KernelDisplay *pKernelDisplay) -{ - NvU32 data32 = 0; - - if (pKernelDisplay == NULL) - { - return; - } - - if (NV_OK == osReadRegistryDword(pGpu, NV_REG_STR_RM_BUG_2089053_WAR, &data32)) - { - if (data32 == NV_REG_STR_RM_BUG_2089053_WAR_DISABLE) - { - pKernelDisplay->setProperty(pKernelDisplay, PDB_PROP_KDISP_BUG_2089053_SERIALIZE_AGGRESSIVE_VBLANK_ALWAYS, NV_FALSE); - pKernelDisplay->setProperty(pKernelDisplay, PDB_PROP_KDISP_BUG_2089053_SERIALIZE_AGGRESSIVE_VBLANKS_ONLY_ON_HMD_ACTIVE, NV_FALSE); - } - else if (data32 == NV_REG_STR_RM_BUG_2089053_WAR_ENABLE_ALWAYS) - { - pKernelDisplay->setProperty(pKernelDisplay, PDB_PROP_KDISP_BUG_2089053_SERIALIZE_AGGRESSIVE_VBLANK_ALWAYS, NV_TRUE); - pKernelDisplay->setProperty(pKernelDisplay, PDB_PROP_KDISP_BUG_2089053_SERIALIZE_AGGRESSIVE_VBLANKS_ONLY_ON_HMD_ACTIVE, NV_FALSE); - } - else if (data32 == NV_REG_STR_RM_BUG_2089053_WAR_ENABLE_ON_HMD_ACTIVE_ONLY) - { - pKernelDisplay->setProperty(pKernelDisplay, PDB_PROP_KDISP_BUG_2089053_SERIALIZE_AGGRESSIVE_VBLANKS_ONLY_ON_HMD_ACTIVE, NV_TRUE); - pKernelDisplay->setProperty(pKernelDisplay, PDB_PROP_KDISP_BUG_2089053_SERIALIZE_AGGRESSIVE_VBLANK_ALWAYS, NV_FALSE); - } - } -} - NV_STATUS kdispStateInitLocked_IMPL(OBJGPU *pGpu, KernelDisplay *pKernelDisplay) @@ -658,6 +635,7 @@ kdispImportImpData_IMPL(KernelDisplay *pKernelDisplay) NvU32 hSubdevice = pGpu->hInternalSubdevice; NV2080_CTRL_INTERNAL_DISPLAY_SET_IMP_INIT_INFO_PARAMS params; NvU32 simulationMode; + NV_STATUS nvStatus; // // FPGA has different latency characteristics, and the current code latency @@ -671,8 +649,27 @@ kdispImportImpData_IMPL(KernelDisplay *pKernelDisplay) return NV_OK; } - NV_ASSERT_OK_OR_RETURN(osTegraSocGetImpImportData(¶ms.tegraImpImportData)); + // + // osTegraSocGetImpImportData was originally called to collect memory and + // clock data for IMP from BPMP and kernel drivers. Now, since this + // functionality is supported only on Linux, and we also need support on + // Windows, most of the information is collected in physical RM itself, + // rather than using a Linux OS layer function. (The function is expected + // to fail on other OSes besides Linux.) + // + nvStatus = osTegraSocGetImpImportData(¶ms.tegraImpImportData); + (void) nvStatus; // shut up compiler warning re: unused variable + NV_PRINTF(LEVEL_INFO, + "osTegraSocGetImpImportData returned nvStatus = 0x%08X\n", + nvStatus); + // + // The following RmCtrl call was originally called to communicate + // information collected from the osTegraSocGetImpImportData call to + // physcial RM. Now, only a small amount of information is communicated, + // but the RmCtrl call still invokes RM boot-time code to collect and + // process information on its own. + // NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, hClient, hSubdevice, NV2080_CTRL_CMD_INTERNAL_DISPLAY_SET_IMP_INIT_INFO, ¶ms, sizeof(params))); @@ -1067,6 +1064,7 @@ kdispServiceVblank_KERNEL NvU32 i, skippedcallbacks; NvU32 maskCallbacksStillPending = 0; KernelHead *pKernelHead = NULL; + NvU32 head, headIntrMask; #if HOTPLUG_PROFILE OBJTMR *pTmr; @@ -1088,6 +1086,32 @@ kdispServiceVblank_KERNEL } #endif + // handle RG line interrupt, if it is forwared from GSP. + if (IS_GSP_CLIENT(pGpu)) + { + for (head = 0; head < kdispGetNumHeads(pKernelDisplay); ++head) + { + KernelHead *pKernelHead = KDISP_GET_HEAD(pKernelDisplay, head); + + headIntrMask = kheadReadPendingRgLineIntr_HAL(pGpu, pKernelHead, pThreadState); + if (headIntrMask != 0) + { + NvU32 clearIntrMask = 0; + + kheadProcessRgLineCallbacks_HAL(pGpu, + pKernelHead, + head, + &headIntrMask, + &clearIntrMask, + osIsISR()); + if (clearIntrMask != 0) + { + kheadResetRgLineIntrMask_HAL(pGpu, pKernelHead, clearIntrMask, pThreadState); + } + } + } + } + // If the caller failed to spec which queue, figure they wanted all of them if (!(state & VBLANK_STATE_PROCESS_ALL_CALLBACKS) ) diff --git a/src/nvidia/src/kernel/gpu/eng_state.c b/src/nvidia/src/kernel/gpu/eng_state.c index 74f847115d..217b06b40d 100644 --- a/src/nvidia/src/kernel/gpu/eng_state.c +++ b/src/nvidia/src/kernel/gpu/eng_state.c @@ -198,7 +198,7 @@ engstateInitMissing_IMPL NV_STATUS engstateStatePreInit_IMPL(OBJGPU *pGpu, OBJENGSTATE *pEngstate) { - LOCK_ASSERT_AND_RETURN(rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); /* Check if we overrode the unlocked variant */ if ((engstateStatePreInitUnlocked_FNPTR(pEngstate) != @@ -246,7 +246,7 @@ engstateStatePreInitUnlocked_IMPL(OBJGPU *pGpu, OBJENGSTATE *pEngstate) NV_STATUS engstateStateInit_IMPL(OBJGPU *pGpu, OBJENGSTATE *pEngstate) { - LOCK_ASSERT_AND_RETURN(rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); /* Check if we overrode the unlocked variant */ if (engstateStateInitUnlocked_FNPTR(pEngstate) != engstateStateInitUnlocked_IMPL) diff --git a/src/nvidia/src/kernel/gpu/external_device/arch/kepler/kern_gsync_p2060.c b/src/nvidia/src/kernel/gpu/external_device/arch/kepler/kern_gsync_p2060.c index 8f682c161a..a16040049a 100644 --- a/src/nvidia/src/kernel/gpu/external_device/arch/kepler/kern_gsync_p2060.c +++ b/src/nvidia/src/kernel/gpu/external_device/arch/kepler/kern_gsync_p2060.c @@ -55,7 +55,7 @@ static NV_STATUS gsyncProgramExtStereoPolarity_P2060 (OBJGPU *, PDACEXTERNALDEV static NV_STATUS gsyncProgramSlaves_P2060(OBJGPU *, PDACP2060EXTERNALDEVICE, NvU32); static NvU32 gsyncReadSlaves_P2060(OBJGPU *, PDACP2060EXTERNALDEVICE); -static NV_STATUS gsyncProgramMaster_P2060(OBJGPU *, PDACP2060EXTERNALDEVICE, NvU32, NvBool, NvBool); +static NV_STATUS gsyncProgramMaster_P2060(OBJGPU *, OBJGSYNC *, NvU32, NvBool, NvBool); static NvU32 gsyncReadMaster_P2060(OBJGPU *, PDACP2060EXTERNALDEVICE); static NV_STATUS gsyncUpdateGsyncStatusSnapshot_P2060(OBJGPU *, PDACEXTERNALDEVICE); @@ -767,16 +767,10 @@ gsyncAttachExternalDevice_P2060 return NV_TRUE; fail_tmr_event_create: - if (pThis->FrameCountData.pTimerEvents[gpuInstance] != NULL) - { - tmrEventDestroy(pTmr, pThis->FrameCountData.pTimerEvents[gpuInstance]); - pThis->FrameCountData.pTimerEvents[gpuInstance] = NULL; - } - if (pExtdev->WatchdogControl.pTimerEvents[gpuInstance]) - { - tmrEventDestroy(pTmr, pExtdev->WatchdogControl.pTimerEvents[gpuInstance]); - pExtdev->WatchdogControl.pTimerEvents[gpuInstance] = NULL; - } + tmrEventDestroy(pTmr, pThis->FrameCountData.pTimerEvents[gpuInstance]); + pThis->FrameCountData.pTimerEvents[gpuInstance] = NULL; + tmrEventDestroy(pTmr, pExtdev->WatchdogControl.pTimerEvents[gpuInstance]); + pExtdev->WatchdogControl.pTimerEvents[gpuInstance] = NULL; return NV_FALSE; } @@ -2339,23 +2333,26 @@ gsyncReadIsTiming_P2060 static NV_STATUS gsyncProgramMaster_P2060 ( - OBJGPU *pGpu, - PDACP2060EXTERNALDEVICE pThis, - NvU32 Master, - NvBool bRetainMaster, - NvBool skipSwapBarrierWar + OBJGPU *pGpu, + OBJGSYNC *pGsync, + NvU32 Master, + NvBool bRetainMaster, + NvBool skipSwapBarrierWar ) { - KernelDisplay *pKernelDisplay = GPU_GET_KERNEL_DISPLAY(pGpu); - NvU32 DisplayIds[OBJ_MAX_HEADS]; - NvU32 iface, head, index; - NvU8 ctrl = 0; - NvBool bTestModePresent; - NvBool bHouseSelect, bEnableMaster = (0 != Master); - NvBool bGPUAlreadyMaster; - NvBool bQSyncAlreadyMaster; - NV_STATUS rmStatus = NV_OK; - NvU32 numHeads = kdispGetNumHeads(pKernelDisplay); + KernelDisplay *pKernelDisplay = GPU_GET_KERNEL_DISPLAY(pGpu); + NvU32 DisplayIds[OBJ_MAX_HEADS]; + NvU32 iface, head, index; + NvU8 ctrl = 0; + NvBool bTestModePresent; + NvBool bHouseSelect, bEnableMaster = (0 != Master); + NvBool bGPUAlreadyMaster; + NvBool bQSyncAlreadyMaster; + NV_STATUS rmStatus = NV_OK; + NvU32 numHeads = kdispGetNumHeads(pKernelDisplay); + DACP2060EXTERNALDEVICE *pThis; + + pThis = (DACP2060EXTERNALDEVICE *)pGsync->pExtDev; if ( Master && bRetainMaster) { @@ -2443,6 +2440,14 @@ gsyncProgramMaster_P2060 NV_PRINTF(LEVEL_ERROR, "Failed to drive stereo output pin for bug3362661.\n"); } + + // + // Set the RasterSync Decode Mode + // This may return an error if the FW and GPU combination is invalid + // + NV_CHECK_OK_OR_RETURN(LEVEL_WARNING, + pGsync->gsyncHal.gsyncSetRasterSyncDecodeMode(pGpu, pGsync->pExtDev)); + // // GPU will now be TS - Mark sync source for GPU on derived index. // This needs to be done first as only TS can write I_AM_MASTER bit. @@ -3843,7 +3848,7 @@ NV_STATUS gsyncRefMaster_P2060 ( OBJGPU *pGpu, - PDACEXTERNALDEVICE pExtDev, + OBJGSYNC *pGsync, REFTYPE rType, NvU32 *pDisplayMask, NvU32 *pRefresh, @@ -3851,7 +3856,7 @@ gsyncRefMaster_P2060 NvBool skipSwapBarrierWar ) { - PDACP2060EXTERNALDEVICE pThis = (PDACP2060EXTERNALDEVICE)pExtDev; + PDACP2060EXTERNALDEVICE pThis = (PDACP2060EXTERNALDEVICE)pGsync->pExtDev; NvU32 Master = pThis->Master; NvU32 RefreshRate = pThis->RefreshRate; NV_STATUS status = NV_OK; @@ -3886,7 +3891,7 @@ gsyncRefMaster_P2060 return NV_ERR_GENERIC; } - status = gsyncProgramMaster_P2060(pGpu, pThis, Master, retainMaster, skipSwapBarrierWar); + status = gsyncProgramMaster_P2060(pGpu, pGsync, Master, retainMaster, skipSwapBarrierWar); break; case refFetchGet: diff --git a/src/nvidia/src/kernel/gpu/external_device/arch/pascal/kern_gsync_p2061.c b/src/nvidia/src/kernel/gpu/external_device/arch/pascal/kern_gsync_p2061.c index 7f6fa9f5d1..950ad1c25d 100644 --- a/src/nvidia/src/kernel/gpu/external_device/arch/pascal/kern_gsync_p2061.c +++ b/src/nvidia/src/kernel/gpu/external_device/arch/pascal/kern_gsync_p2061.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2016-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -255,3 +255,53 @@ gsyncGetSyncSkew_P2061_V204 return NV_OK; } + +// Determine and write the proper RasterSync Decode Mode to the CONTROL5 register +NV_STATUS +gsyncSetRasterSyncDecodeMode_P2061_V300 +( + OBJGPU *pGpu, + DACEXTERNALDEVICE *pExtDev +) +{ + NV2080_CTRL_INTERNAL_GSYNC_GET_RASTER_SYNC_DECODE_MODE_PARAMS + rasterSyncDecodeModeParams; + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + NvU8 old_data, data; + + // + // Get the raster sync mode flag from the GPU + // This is only used in P2061 v3.00+ for gsyncSetRasterDecodeMode() + // + NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, pGpu->hInternalClient, + pGpu->hInternalSubdevice, NV2080_CTRL_CMD_INTERNAL_GSYNC_GET_RASTER_SYNC_DECODE_MODE, + &rasterSyncDecodeModeParams, sizeof(rasterSyncDecodeModeParams))); + + NV_ASSERT_OK_OR_RETURN(readregu008_extdeviceTargeted(pGpu, pExtDev, (NvU8)NV_P2061_CONTROL5, &data)); + old_data = data; + + // Modify the register field with the corresponding mode + switch(rasterSyncDecodeModeParams.rasterSyncDecodeMode) + { + case NV_P2061_CONTROL5_RASTER_SYNC_DECODE_MODE_VSYNC_SHORT_PULSE: + data = FLD_SET_DRF(_P2061, _CONTROL5, _RASTER_SYNC_DECODE_MODE, + _VSYNC_SHORT_PULSE, data); + break; + + case NV_P2061_CONTROL5_RASTER_SYNC_DECODE_MODE_VSYNC_SINGLE_PULSE: + data = FLD_SET_DRF(_P2061, _CONTROL5, _RASTER_SYNC_DECODE_MODE, + _VSYNC_SINGLE_PULSE, data); + break; + default: + return NV_ERR_INVALID_PARAMETER; + }; + + // Write if changed + if (data != old_data) + { + NV_ASSERT_OK_OR_RETURN( + writeregu008_extdeviceTargeted(pGpu, pExtDev, NV_P2061_CONTROL5, data)); + } + + return NV_OK; +} diff --git a/src/nvidia/src/kernel/gpu/external_device/gsync.c b/src/nvidia/src/kernel/gpu/external_device/gsync.c index ec28c3f8fc..90d221e234 100644 --- a/src/nvidia/src/kernel/gpu/external_device/gsync.c +++ b/src/nvidia/src/kernel/gpu/external_device/gsync.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2008-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2008-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -40,6 +40,7 @@ #include "os/os.h" #include "rmapi/control.h" #include "gpu/external_device/gsync_api.h" +#include "gpu/external_device/dev_p2061.h" #include "gpu/external_device/dac_p2060.h" #include "gpu/external_device/dac_p2061.h" @@ -281,6 +282,12 @@ gsyncP2061StartupProvider(OBJGSYNC *pGsync) p2060->lastUserSkewSent = NV_P2061_V204_SYNC_SKEW_INVALID; } + // Control5 sync mode settings are available for FW V3.00+ + if (P2061_FW_REV(pGsync->pExtDev) >= 0x300) + { + pGsync->gsyncHal.gsyncSetRasterSyncDecodeMode = gsyncSetRasterSyncDecodeMode_P2061_V300; + } + return status; } @@ -1178,7 +1185,7 @@ gsyncIsAnyHeadFramelocked(OBJGSYNC *pGsync) } // Check if assigned master displays are there. if ((NV_OK == pGsync->gsyncHal.gsyncRefMaster(pGpu, - pGsync->pExtDev, refRead, &assigned, &refresh, NV_FALSE, NV_FALSE)) && + pGsync, refRead, &assigned, &refresh, NV_FALSE, NV_FALSE)) && (assigned != 0)) { return NV_TRUE; @@ -1457,7 +1464,7 @@ gsyncGetControlSync(OBJGSYNC *pGsync, // This is the case where we want to query what is current. if ( pParams->master ) { - status |= pGsync->gsyncHal.gsyncRefMaster(pGpu, pGsync->pExtDev, refFetchGet, + status |= pGsync->gsyncHal.gsyncRefMaster(pGpu, pGsync, refFetchGet, &pParams->displays, &pParams->refresh, NV_FALSE, NV_FALSE); } else @@ -1530,10 +1537,10 @@ gsyncSetControlSync(OBJGSYNC *pGsync, NvBool skipSwapBarrierWar = !!(pParams->configFlags & NV30F1_CTRL_GSYNC_GET_CONTROL_SYNC_CONFIG_FLAGS_KEEP_MASTER_SWAPBARRIER_DISABLED); - status |= pGsync->gsyncHal.gsyncRefMaster(pGpu, pGsync->pExtDev, + status |= pGsync->gsyncHal.gsyncRefMaster(pGpu, pGsync, refRead, &assigned, &refresh, NV_FALSE, NV_FALSE); pParams->displays |= assigned; - status |= pGsync->gsyncHal.gsyncRefMaster(pGpu, pGsync->pExtDev, + status |= pGsync->gsyncHal.gsyncRefMaster(pGpu, pGsync, refSetCommit, &pParams->displays, &pParams->refresh, NV_FALSE, skipSwapBarrierWar); } else @@ -1584,10 +1591,10 @@ gsyncSetControlUnsync(OBJGSYNC *pGsync, if (pParams->master) { - status |= pGsync->gsyncHal.gsyncRefMaster(pGpu, pGsync->pExtDev, + status |= pGsync->gsyncHal.gsyncRefMaster(pGpu, pGsync, refRead, &assigned, &refresh, NV_FALSE, NV_FALSE); pParams->displays = assigned & ~pParams->displays; - status |= pGsync->gsyncHal.gsyncRefMaster(pGpu, pGsync->pExtDev, + status |= pGsync->gsyncHal.gsyncRefMaster(pGpu, pGsync, refSetCommit, &pParams->displays, &refresh, !!pParams->retainMaster, NV_FALSE); } else @@ -2363,7 +2370,7 @@ static NV_STATUS gsyncNullRefMaster ( OBJGPU *pGpu, - PDACEXTERNALDEVICE pExtDev, + OBJGSYNC *pGsync, REFTYPE rType, NvU32 *pDisplayMask, NvU32 *pRefresh, @@ -2487,6 +2494,34 @@ gsyncNullSetMulDiv return NV_ERR_NOT_SUPPORTED; } +static NV_STATUS +gsyncNullSetRasterSyncDecodeMode +( + OBJGPU *pGpu, + DACEXTERNALDEVICE *pExtDev +) +{ + // + // Performs no action on the Gsync board except for P2061 FW 3.00+ + // But, this detects when the raster sync mode is not supported by earlier FWs + // + NV2080_CTRL_INTERNAL_GSYNC_GET_RASTER_SYNC_DECODE_MODE_PARAMS + rasterSyncDecodeModeParams; + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + + // Pre-3.00 FW can only use NV2080_CTRL_CMD_INTERNAL_GSYNC_GET_RASTER_SYNC_DECODE_MODE + NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, pGpu->hInternalClient, + pGpu->hInternalSubdevice, NV2080_CTRL_CMD_INTERNAL_GSYNC_GET_RASTER_SYNC_DECODE_MODE, + &rasterSyncDecodeModeParams, sizeof(rasterSyncDecodeModeParams))); + + NV_CHECK_OR_RETURN(LEVEL_WARNING, + rasterSyncDecodeModeParams.rasterSyncDecodeMode == + NV_P2061_CONTROL5_RASTER_SYNC_DECODE_MODE_VSYNC_SHORT_PULSE, + NV_ERR_INVALID_OPERATION); + + return NV_OK; +} + static NV_STATUS gsyncSetupNullProvider(OBJGSYNCMGR *pGsyncMgr, NvU32 gsyncInst) { @@ -2533,6 +2568,7 @@ gsyncSetupNullProvider(OBJGSYNCMGR *pGsyncMgr, NvU32 gsyncInst) pGsync->gsyncHal.gsyncSetHouseSyncMode = gsyncNullSetHouseSyncMode; pGsync->gsyncHal.gsyncGetMulDiv = gsyncNullGetMulDiv; pGsync->gsyncHal.gsyncSetMulDiv = gsyncNullSetMulDiv; + pGsync->gsyncHal.gsyncSetRasterSyncDecodeMode = gsyncNullSetRasterSyncDecodeMode; return status; } diff --git a/src/nvidia/src/kernel/gpu/external_device/kern_external_device.c b/src/nvidia/src/kernel/gpu/external_device/kern_external_device.c index 2c27cb52ec..292c2b25e3 100644 --- a/src/nvidia/src/kernel/gpu/external_device/kern_external_device.c +++ b/src/nvidia/src/kernel/gpu/external_device/kern_external_device.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -223,13 +223,9 @@ writeregu008_extdevice NvU8 Data ) { - - NV_STATUS status = NV_ERR_GENERIC; - NvU32 i2cPort = (pGpu->i2cPortForExtdev < NV402C_CTRL_NUM_I2C_PORTS) ? pGpu->i2cPortForExtdev : pThis->I2CPort; - status = i2c_extdeviceHelper(pGpu, pThis, i2cPort, SubAdr, &Data, NV_TRUE); - return status; + return i2c_extdeviceHelper(pGpu, pThis, i2cPort, SubAdr, &Data, NV_TRUE); } // @@ -278,13 +274,9 @@ readregu008_extdevice NvU8 *pData ) { - - NV_STATUS status = NV_ERR_GENERIC; - NvU32 i2cPort = (pGpu->i2cPortForExtdev < NV402C_CTRL_NUM_I2C_PORTS) ? pGpu->i2cPortForExtdev : pThis->I2CPort; - status = i2c_extdeviceHelper(pGpu, pThis, i2cPort, SubAdr, pData, NV_FALSE); - return status; + return i2c_extdeviceHelper(pGpu, pThis, i2cPort, SubAdr, pData, NV_FALSE); } // diff --git a/src/nvidia/src/kernel/gpu/falcon/arch/ampere/kernel_falcon_ga102.c b/src/nvidia/src/kernel/gpu/falcon/arch/ampere/kernel_falcon_ga102.c index 5f408b4bec..68c30c6f79 100644 --- a/src/nvidia/src/kernel/gpu/falcon/arch/ampere/kernel_falcon_ga102.c +++ b/src/nvidia/src/kernel/gpu/falcon/arch/ampere/kernel_falcon_ga102.c @@ -235,22 +235,58 @@ kflcnWaitForResetToFinish_GA102(OBJGPU *pGpu, KernelFalcon *pKernelFlcn) } /*! - * Read the IRQ status of the RISCV Falcon. + * Wait for RISC-V to halt. + * + * @param[in] pGpu OBJGPU pointer + * @param[in] pKernelFlcn KernelFalcon pointer + * @param[in] timeoutUs Timeout value + * + * @returns NV_ERR_TIMEOUT if RISC-V fails to halt. + */ +NV_STATUS +kflcnWaitForHaltRiscv_GA102 +( + OBJGPU *pGpu, + KernelFalcon *pKernelFlcn, + NvU32 timeoutUs, + NvU32 flags +) +{ + NV_STATUS status = NV_OK; + RMTIMEOUT timeout; + + gpuSetTimeout(pGpu, timeoutUs, &timeout, flags); + + while (!FLD_TEST_DRF_NUM(_PRISCV, _RISCV, _CPUCTL_HALTED, 0x1, + kflcnRiscvRegRead_HAL(pGpu, pKernelFlcn, NV_PRISCV_RISCV_CPUCTL))) + { + status = gpuCheckTimeout(pGpu, &timeout); + if (status == NV_ERR_TIMEOUT) + { + NV_PRINTF(LEVEL_ERROR, "Timeout waiting for RISC-V to halt\n"); + DBG_BREAKPOINT(); + break; + } + osSpinLoop(); + } + + return status; +} + +/*! + * Read the IRQ status of the Falcon in RISC-V mode. * * @return IRQ status mask */ NvU32 -kflcnReadIntrStatus_GA102 +kflcnRiscvReadIntrStatus_GA102 ( OBJGPU *pGpu, KernelFalcon *pKernelFlcn ) { - return ((kflcnRegRead_HAL(pGpu, pKernelFlcn, NV_PFALCON_FALCON_IRQSTAT) & - kflcnRegRead_HAL(pGpu, pKernelFlcn, NV_PFALCON_FALCON_IRQMASK) & - kflcnRegRead_HAL(pGpu, pKernelFlcn, NV_PFALCON_FALCON_IRQDEST)) | - (kflcnRegRead_HAL(pGpu, pKernelFlcn, NV_PFALCON_FALCON_IRQSTAT) & - kflcnRiscvRegRead_HAL(pGpu, pKernelFlcn, NV_PRISCV_RISCV_IRQMASK) & - kflcnRiscvRegRead_HAL(pGpu, pKernelFlcn, NV_PRISCV_RISCV_IRQDEST))); + return (kflcnRegRead_HAL(pGpu, pKernelFlcn, NV_PFALCON_FALCON_IRQSTAT) & + kflcnRiscvRegRead_HAL(pGpu, pKernelFlcn, NV_PRISCV_RISCV_IRQMASK) & + kflcnRiscvRegRead_HAL(pGpu, pKernelFlcn, NV_PRISCV_RISCV_IRQDEST)); } diff --git a/src/nvidia/src/kernel/gpu/mmu/vidmem_access_bit_buffer_v2.c b/src/nvidia/src/kernel/gpu/falcon/arch/blackwell/kernel_falcon_gb100.c similarity index 66% rename from src/nvidia/src/kernel/gpu/mmu/vidmem_access_bit_buffer_v2.c rename to src/nvidia/src/kernel/gpu/falcon/arch/blackwell/kernel_falcon_gb100.c index 28f1bfeb34..747e53c0d1 100644 --- a/src/nvidia/src/kernel/gpu/mmu/vidmem_access_bit_buffer_v2.c +++ b/src/nvidia/src/kernel/gpu/falcon/arch/blackwell/kernel_falcon_gb100.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -21,19 +21,26 @@ * DEALINGS IN THE SOFTWARE. */ -#include "core/core.h" -#include "os/os.h" -#include "gpu/mmu/vidmem_access_bit_buffer.h" -#include "gpu/gpu.h" +/*! + * Provides the implementation for all GB100+ specific KernelFalcon + * interfaces. + */ + +#include "gpu/falcon/kernel_falcon.h" + +#include "published/blackwell/gb100/dev_falcon_v4.h" -NV_STATUS -vidmemAccessBitBufConstructHelper_KERNEL +/*! + * Helper function to get IRQSTAT ECC bit + * + * @return FALCON_IRQSTAT_EXT_EXTIRQ7 bit set + */ +NvU32 +kflcnGetEccInterruptMask_GB100 ( - VidmemAccessBitBuffer *pVidmemAccessBitBuffer, - CALL_CONTEXT *pCallContext, - RS_RES_ALLOC_PARAMS_INTERNAL *pParams + OBJGPU *pGpu, + KernelFalcon *pKernelFlcn ) { - OBJGPU *pGpu = GPU_RES_GET_GPU(pVidmemAccessBitBuffer); - return IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu) && !IS_VIRTUAL(pGpu)? NV_OK : NV_ERR_NOT_SUPPORTED; + return REF_DEF(NV_PFALCON_FALCON_IRQSTAT_EXT_EXTIRQ7, _TRUE); } diff --git a/src/nvidia/src/kernel/gpu/falcon/arch/turing/kernel_falcon_tu102.c b/src/nvidia/src/kernel/gpu/falcon/arch/turing/kernel_falcon_tu102.c index 0eecd8bd11..08a86c1147 100644 --- a/src/nvidia/src/kernel/gpu/falcon/arch/turing/kernel_falcon_tu102.c +++ b/src/nvidia/src/kernel/gpu/falcon/arch/turing/kernel_falcon_tu102.c @@ -314,7 +314,7 @@ kflcnWaitForHalt_TU102 } /*! - * Read the IRQ status of the RISCV Falcon. + * Read the IRQ status of the Falcon. * * @return IRQ status mask */ @@ -325,12 +325,26 @@ kflcnReadIntrStatus_TU102 KernelFalcon *pKernelFlcn ) { - return ((kflcnRegRead_HAL(pGpu, pKernelFlcn, NV_PFALCON_FALCON_IRQSTAT) & - kflcnRegRead_HAL(pGpu, pKernelFlcn, NV_PFALCON_FALCON_IRQMASK) & - kflcnRegRead_HAL(pGpu, pKernelFlcn, NV_PFALCON_FALCON_IRQDEST)) | - (kflcnRegRead_HAL(pGpu, pKernelFlcn, NV_PFALCON_FALCON_IRQSTAT) & - kflcnRiscvRegRead_HAL(pGpu, pKernelFlcn, NV_PRISCV_RISCV_IRQMASK) & - kflcnRiscvRegRead_HAL(pGpu, pKernelFlcn, NV_PRISCV_RISCV_IRQDEST))); + return (kflcnRegRead_HAL(pGpu, pKernelFlcn, NV_PFALCON_FALCON_IRQSTAT) & + kflcnRegRead_HAL(pGpu, pKernelFlcn, NV_PFALCON_FALCON_IRQMASK) & + kflcnRegRead_HAL(pGpu, pKernelFlcn, NV_PFALCON_FALCON_IRQDEST)); +} + +/*! + * Read the IRQ status of the Falcon in RISC-V mode. + * + * @return IRQ status mask + */ +NvU32 +kflcnRiscvReadIntrStatus_TU102 +( + OBJGPU *pGpu, + KernelFalcon *pKernelFlcn +) +{ + return (kflcnRegRead_HAL(pGpu, pKernelFlcn, NV_PFALCON_FALCON_IRQSTAT) & + kflcnRiscvRegRead_HAL(pGpu, pKernelFlcn, NV_PRISCV_RISCV_IRQMASK) & + kflcnRiscvRegRead_HAL(pGpu, pKernelFlcn, NV_PRISCV_RISCV_IRQDEST)); } diff --git a/src/nvidia/src/kernel/gpu/falcon/kernel_falcon.c b/src/nvidia/src/kernel/gpu/falcon/kernel_falcon.c index 879e0fb348..6e88f375b1 100644 --- a/src/nvidia/src/kernel/gpu/falcon/kernel_falcon.c +++ b/src/nvidia/src/kernel/gpu/falcon/kernel_falcon.c @@ -80,6 +80,14 @@ KernelFalcon *kflcnGetKernelFalconForEngine_IMPL(OBJGPU *pGpu, ENGDESCRIPTOR phy return staticCast(gpuGetGenericKernelFalconForEngine(pGpu, physEngDesc), KernelFalcon); } +NvU32 kflcnGetPendingHostInterrupts(OBJGPU *pGpu, KernelFalcon *pKernelFalcon) +{ + if (kflcnIsRiscvActive_HAL(pGpu, pKernelFalcon)) + return kflcnRiscvReadIntrStatus(pGpu, pKernelFalcon); + else + return kflcnReadIntrStatus(pGpu, pKernelFalcon); +} + static NvBool _kflcnNeedToAllocContext(OBJGPU *pGpu, KernelChannel *pKernelChannel) { diff --git a/src/nvidia/src/kernel/gpu/fifo/arch/ada/kernel_fifo_ad102.c b/src/nvidia/src/kernel/gpu/fifo/arch/ada/kernel_fifo_ad102.c index c8f6cbce5b..8392d24a43 100644 --- a/src/nvidia/src/kernel/gpu/fifo/arch/ada/kernel_fifo_ad102.c +++ b/src/nvidia/src/kernel/gpu/fifo/arch/ada/kernel_fifo_ad102.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -45,13 +45,11 @@ kfifoPrintInternalEngine_AD102 { NV_STATUS status = NV_OK; KernelGmmu *pKernelGmmu = GPU_GET_KERNEL_GMMU(pGpu); - NvU32 pbdmaId; NvU32 engTag; if (kfifoIsMmuFaultEngineIdPbdma(pGpu, pKernelFifo, engineID)) { - NV_ASSERT_OR_RETURN(kfifoGetPbdmaIdFromMmuFaultId(pGpu, pKernelFifo, engineID, &pbdmaId) == NV_OK, "UNKNOWN"); - return kfifoPrintPbdmaId_HAL(pGpu, pKernelFifo, pbdmaId); + return kfifoPrintFaultingPbdmaEngineName(pGpu, pKernelFifo, engineID); } if (kgmmuIsFaultEngineBar1_HAL(pKernelGmmu, engineID)) diff --git a/src/nvidia/src/kernel/gpu/fifo/arch/ampere/kernel_fifo_ga100.c b/src/nvidia/src/kernel/gpu/fifo/arch/ampere/kernel_fifo_ga100.c index b42472d0e0..eb27496229 100644 --- a/src/nvidia/src/kernel/gpu/fifo/arch/ampere/kernel_fifo_ga100.c +++ b/src/nvidia/src/kernel/gpu/fifo/arch/ampere/kernel_fifo_ga100.c @@ -184,7 +184,7 @@ kfifoUpdateUsermodeDoorbell_GA100 * */ NV_STATUS -kfifoGenerateWorkSubmitToken_GA100 +kfifoGenerateWorkSubmitTokenHal_GA100 ( OBJGPU *pGpu, KernelFifo *pKernelFifo, @@ -393,35 +393,6 @@ kfifoGetNumPBDMAs_GA100 return pEngineInfo->maxNumPbdmas; } -/** -* @brief Convert PBDMA ID to string -* @param[in] pGpu -* @param[in] pKernelFifo -* @param[in] pbdmaId -* -* @return cont string -*/ -const char* -kfifoPrintPbdmaId_GA100 -( - OBJGPU *pGpu, - KernelFifo *pKernelFifo, - NvU32 pbdmaId -) -{ - NV_ASSERT_OR_RETURN(pbdmaId < kfifoGetNumPBDMAs_HAL(pGpu, pKernelFifo), "UNKNOWN"); - static const char* pbdmaIdString[64] = { "HOST0" , "HOST1" , "HOST2" , "HOST3" , "HOST4" , "HOST5" , "HOST6" , "HOST7" , - "HOST8" , "HOST9" , "HOST10", "HOST11", "HOST12", "HOST13", "HOST14", "HOST15", - "HOST16", "HOST17", "HOST18", "HOST19", "HOST20", "HOST21", "HOST22", "HOST23", - "HOST24", "HOST25", "HOST26", "HOST27", "HOST28", "HOST29", "HOST30", "HOST31", - "HOST32", "HOST33", "HOST34", "HOST35", "HOST36", "HOST37", "HOST38", "HOST39", - "HOST40", "HOST41", "HOST42", "HOST43", "HOST44", "HOST45", "HOST46", "HOST47", - "HOST48", "HOST49", "HOST50", "HOST51", "HOST52", "HOST53", "HOST54", "HOST55", - "HOST56", "HOST57", "HOST58", "HOST59", "HOST60", "HOST61", "HOST62", "HOST63"}; - - return pbdmaIdString[pbdmaId]; -} - /*! * @brief Converts a mmu engine id (NV_PFAULT_MMU_ENG_ID_*) into a string. * @@ -441,13 +412,11 @@ kfifoPrintInternalEngine_GA100 { NV_STATUS status = NV_OK; KernelGmmu *pKernelGmmu = GPU_GET_KERNEL_GMMU(pGpu); - NvU32 pbdmaId; NvU32 engTag; if (kfifoIsMmuFaultEngineIdPbdma(pGpu, pKernelFifo, engineID)) { - NV_ASSERT_OR_RETURN(kfifoGetPbdmaIdFromMmuFaultId(pGpu, pKernelFifo, engineID, &pbdmaId) == NV_OK, "UNKNOWN"); - return kfifoPrintPbdmaId_HAL(pGpu, pKernelFifo, pbdmaId); + return kfifoPrintFaultingPbdmaEngineName(pGpu, pKernelFifo, engineID); } if (kgmmuIsFaultEngineBar1_HAL(pKernelGmmu, engineID)) diff --git a/src/nvidia/src/kernel/gpu/fifo/arch/blackwell/kernel_fifo_gb100.c b/src/nvidia/src/kernel/gpu/fifo/arch/blackwell/kernel_fifo_gb100.c index 983b32ad06..a89bff0fca 100644 --- a/src/nvidia/src/kernel/gpu/fifo/arch/blackwell/kernel_fifo_gb100.c +++ b/src/nvidia/src/kernel/gpu/fifo/arch/blackwell/kernel_fifo_gb100.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -86,7 +86,7 @@ kfifoReservePbdmaFaultIds_GB100 * */ NV_STATUS -kfifoGenerateWorkSubmitToken_GB100 +kfifoGenerateWorkSubmitTokenHal_GB100 ( OBJGPU *pGpu, KernelFifo *pKernelFifo, @@ -147,48 +147,9 @@ kfifoPrintInternalEngine_GB100 NvU32 engineID ) { - static const char *casIdString[NV_LITTER_NUM_SUBCTX] = { - "GR_HOST0" , "GR_HOST1" , "GR_HOST2" , "GR_HOST3" , "GR_HOST4" , "GR_HOST5" , "GR_HOST6" , "GR_HOST7" , - "GR_HOST8" , "GR_HOST9" , "GR_HOST10", "GR_HOST11", "GR_HOST12", "GR_HOST13", "GR_HOST14", "GR_HOST15", - "GR_HOST16", "GR_HOST17", "GR_HOST18", "GR_HOST19", "GR_HOST20", "GR_HOST21", "GR_HOST22", "GR_HOST23", - "GR_HOST24", "GR_HOST25", "GR_HOST26", "GR_HOST27", "GR_HOST28", "GR_HOST29", "GR_HOST30", "GR_HOST31", - "GR_HOST32", "GR_HOST33", "GR_HOST34", "GR_HOST35", "GR_HOST36", "GR_HOST37", "GR_HOST38", "GR_HOST39", - "GR_HOST40", "GR_HOST41", "GR_HOST42", "GR_HOST43", "GR_HOST44", "GR_HOST45", "GR_HOST46", "GR_HOST47", - "GR_HOST48", "GR_HOST49", "GR_HOST50", "GR_HOST51", "GR_HOST52", "GR_HOST53", "GR_HOST54", "GR_HOST55", - "GR_HOST56", "GR_HOST57", "GR_HOST58", "GR_HOST59", "GR_HOST60", "GR_HOST61", "GR_HOST62", "GR_HOST63"}; - if (kfifoIsMmuFaultEngineIdPbdma(pGpu, pKernelFifo, engineID)) { - RM_ENGINE_TYPE rmEngineType; - - NV_ASSERT_OR_RETURN(kfifoGetEngineTypeFromPbdmaFaultId(pGpu, pKernelFifo, engineID, &rmEngineType) == NV_OK, "UNKNOWN"); - - if (RM_ENGINE_TYPE_IS_GR(rmEngineType)) - { - NvU32 casId; - NvU32 *pPbdmaFaultIds; - NvU32 numPbdma = 0; - - NV_ASSERT_OR_RETURN(kfifoGetEnginePbdmaFaultIds_HAL(pGpu, pKernelFifo, - ENGINE_INFO_TYPE_RM_ENGINE_TYPE, (NvU32)RM_ENGINE_TYPE_GR0, - &pPbdmaFaultIds, &numPbdma) == NV_OK, "UNKNOWN"); - - casId = engineID - pPbdmaFaultIds[0]; - NV_ASSERT_OR_RETURN(casId < NV_LITTER_NUM_SUBCTX, "UNKNOWN"); - - return casIdString[casId]; - } - else - { - const ENGINE_INFO *pEngineInfo = kfifoGetEngineInfo(pKernelFifo); - NvU32 hostId; - NvU32 pbdmaFaultIdStart; - - pbdmaFaultIdStart = bitVectorCountTrailingZeros(&pEngineInfo->validEngineIdsForPbdmas); - hostId = engineID - pbdmaFaultIdStart; - - return kfifoPrintPbdmaId_HAL(pGpu, pKernelFifo, hostId); - } + return kfifoPrintFaultingPbdmaEngineName(pGpu, pKernelFifo, engineID); } switch (engineID) diff --git a/src/nvidia/src/kernel/gpu/fifo/arch/hopper/kernel_fifo_gh100.c b/src/nvidia/src/kernel/gpu/fifo/arch/hopper/kernel_fifo_gh100.c index a005f7d876..97306f91fd 100644 --- a/src/nvidia/src/kernel/gpu/fifo/arch/hopper/kernel_fifo_gh100.c +++ b/src/nvidia/src/kernel/gpu/fifo/arch/hopper/kernel_fifo_gh100.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -147,13 +147,11 @@ kfifoPrintInternalEngine_GH100 { NV_STATUS status = NV_OK; KernelGmmu *pKernelGmmu = GPU_GET_KERNEL_GMMU(pGpu); - NvU32 pbdmaId; NvU32 engTag; if (kfifoIsMmuFaultEngineIdPbdma(pGpu, pKernelFifo, engineID)) { - NV_ASSERT_OR_RETURN(kfifoGetPbdmaIdFromMmuFaultId(pGpu, pKernelFifo, engineID, &pbdmaId) == NV_OK, "UNKNOWN"); - return kfifoPrintPbdmaId_HAL(pGpu, pKernelFifo, pbdmaId); + return kfifoPrintFaultingPbdmaEngineName(pGpu, pKernelFifo, engineID); } if (kgmmuIsFaultEngineBar1_HAL(pKernelGmmu, engineID)) diff --git a/src/nvidia/src/kernel/gpu/fifo/arch/maxwell/kernel_channel_gm107.c b/src/nvidia/src/kernel/gpu/fifo/arch/maxwell/kernel_channel_gm107.c index 458ab72e03..709839f06f 100644 --- a/src/nvidia/src/kernel/gpu/fifo/arch/maxwell/kernel_channel_gm107.c +++ b/src/nvidia/src/kernel/gpu/fifo/arch/maxwell/kernel_channel_gm107.c @@ -620,12 +620,7 @@ kchannelGetUserdBar1MapOffset_GM107 NV_ASSERT_OR_RETURN(pKernelChannel != NULL, NV_ERR_INVALID_ARGUMENT); - // - // only supported when bUsePerRunlistChannelRam is disabled. - // We don't pre-allocate userd for all channels across all runlists; we expect - // clients to have moved to client allocated userd. - // - NV_ASSERT_OR_RETURN(!kfifoIsPerRunlistChramEnabled(pKernelFifo), + NV_ASSERT_OR_RETURN(kfifoIsPreAllocatedUserDEnabled(pKernelFifo), NV_ERR_NOT_SUPPORTED); if (pUserdInfo->userdBar1MapSize == 0) diff --git a/src/nvidia/src/kernel/gpu/fifo/arch/maxwell/kernel_fifo_gm107.c b/src/nvidia/src/kernel/gpu/fifo/arch/maxwell/kernel_fifo_gm107.c index 5885f1ca37..bb8a6109e4 100644 --- a/src/nvidia/src/kernel/gpu/fifo/arch/maxwell/kernel_fifo_gm107.c +++ b/src/nvidia/src/kernel/gpu/fifo/arch/maxwell/kernel_fifo_gm107.c @@ -25,7 +25,6 @@ #include "kernel/gpu/fifo/kernel_channel.h" #include "kernel/gpu/fifo/kernel_channel_group.h" #include "kernel/gpu/fifo/kernel_channel_group_api.h" -#include "kernel/gpu/fifo/kernel_sched_mgr.h" #include "gpu/mem_mgr/mem_mgr.h" #include "gpu/mmu/kern_gmmu.h" @@ -50,7 +49,6 @@ kfifoConstructHal_GM107 KernelFifo *pKernelFifo ) { - NV_STATUS status; PREALLOCATED_USERD_INFO *pUserdInfo = &pKernelFifo->userdInfo; if (FLD_TEST_DRF(_REG_STR_RM, _INST_VPR, _INSTBLK, _TRUE, pGpu->instVprOverrides)) @@ -92,19 +90,6 @@ kfifoConstructHal_GM107 &pUserdInfo->userdAperture, &pUserdInfo->userdAttr); - // Create child object KernelSchedMgr - if (kfifoIsSchedSupported(pKernelFifo)) - { - pKernelFifo->pKernelSchedMgr = NULL; - status = objCreate(&pKernelFifo->pKernelSchedMgr, pKernelFifo, KernelSchedMgr); - if (status != NV_OK) - { - pKernelFifo->pKernelSchedMgr = NULL; - return status; - } - kschedmgrConstructPolicy(pKernelFifo->pKernelSchedMgr, pGpu); - } - return NV_OK; } @@ -1339,8 +1324,8 @@ kfifoPreAllocUserD_GM107 } else if ((bCoherentCpuMapping && memdescGetAddressSpace(pUserdInfo->userdPhysDesc[currentGpuInst]) == ADDR_SYSMEM && - !kbusIsReflectedMappingAccessAllowed(pKernelBus)) || - kbusIsBar1Disabled(pKernelBus)) + !kbusIsReflectedMappingAccessAllowed(pKernelBus)) && + !kbusIsBar1Disabled(pKernelBus)) { status = osMapPciMemoryKernelOld(pGpu, pUserdInfo->userdBar1MapStartOffset, @@ -1349,6 +1334,16 @@ kfifoPreAllocUserD_GM107 (void**)&pUserdInfo->userdBar1CpuPtr, NV_MEMORY_CACHED); } + else if (kbusIsBar1Disabled(pKernelBus)) + { + status = memdescMap(pUserdInfo->userdPhysDesc[currentGpuInst], + 0, + pUserdInfo->userdBar1MapSize, + NV_TRUE, + NV_PROTECT_READ_WRITE, + (void**)&pUserdInfo->userdBar1CpuPtr, + (void**)&pUserdInfo->userdBar1Priv); + } else { // Cpu map the BAR1 snoop range @@ -1431,6 +1426,14 @@ kfifoFreePreAllocUserD_GM107 pUserdInfo->userdBar1CpuPtr, pUserdInfo->userdBar1Priv); } + else if (kbusIsBar1Disabled(pKernelBus)) + { + memdescUnmap(pUserdInfo->userdPhysDesc[currentGpuInst], + NV_TRUE, + osGetCurrentProcess(), + (void*)pUserdInfo->userdBar1CpuPtr, + (void*)pUserdInfo->userdBar1Priv); + } else { osUnmapPciMemoryKernelOld(pGpu, pUserdInfo->userdBar1CpuPtr); diff --git a/src/nvidia/src/kernel/gpu/fifo/arch/pascal/kernel_fifo_gp102.c b/src/nvidia/src/kernel/gpu/fifo/arch/pascal/kernel_fifo_gp102.c index a6ad631ba3..a4ac1efec5 100644 --- a/src/nvidia/src/kernel/gpu/fifo/arch/pascal/kernel_fifo_gp102.c +++ b/src/nvidia/src/kernel/gpu/fifo/arch/pascal/kernel_fifo_gp102.c @@ -46,7 +46,7 @@ kfifoValidateSCGTypeAndRunqueue_GP102 NvU32 runqueue ) { - if (scgType == NV_PPBDMA_SET_CHANNEL_INFO_SCG_TYPE_COMPUTE1 && + if (scgType == NV_PBDMA_SET_CHANNEL_INFO_SCG_TYPE_COMPUTE1 && runqueue == 0) { NV_PRINTF(LEVEL_INFO, diff --git a/src/nvidia/src/kernel/gpu/fifo/arch/turing/kernel_fifo_tu102.c b/src/nvidia/src/kernel/gpu/fifo/arch/turing/kernel_fifo_tu102.c index 357cba6573..ed8631adab 100644 --- a/src/nvidia/src/kernel/gpu/fifo/arch/turing/kernel_fifo_tu102.c +++ b/src/nvidia/src/kernel/gpu/fifo/arch/turing/kernel_fifo_tu102.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -69,7 +69,7 @@ kfifoUpdateUsermodeDoorbell_TU102 * */ NV_STATUS -kfifoGenerateWorkSubmitToken_TU102 +kfifoGenerateWorkSubmitTokenHal_TU102 ( OBJGPU *pGpu, KernelFifo *pKernelFifo, diff --git a/src/nvidia/src/kernel/gpu/fifo/channel_descendant.c b/src/nvidia/src/kernel/gpu/fifo/channel_descendant.c index 16e5f6ebf6..8fcd1d3192 100644 --- a/src/nvidia/src/kernel/gpu/fifo/channel_descendant.c +++ b/src/nvidia/src/kernel/gpu/fifo/channel_descendant.c @@ -47,7 +47,7 @@ chandesConstruct_IMPL RsResource *pParent = NULL; KernelChannel *pKernelChannel; CLASSDESCRIPTOR internalClassDescriptor; - PCLASSDESCRIPTOR pClassDescriptor; + CLASSDESCRIPTOR *pClassDescriptor; KernelFifo *pKernelFifo = GPU_GET_KERNEL_FIFO(pGpu); NvBool bMIGInUse = IS_MIG_IN_USE(pGpu); diff --git a/src/nvidia/src/kernel/gpu/fifo/kernel_channel.c b/src/nvidia/src/kernel/gpu/fifo/kernel_channel.c index 5c63f6b415..4dd8f78180 100644 --- a/src/nvidia/src/kernel/gpu/fifo/kernel_channel.c +++ b/src/nvidia/src/kernel/gpu/fifo/kernel_channel.c @@ -176,6 +176,7 @@ kchannelConstruct_IMPL NvBool bAddedToGroup = NV_FALSE; NvU32 callingContextGfid; Device *pDevice; + NvBool bUvmOwnedFlag; if (rmapiLockIsOwner()) { @@ -210,6 +211,9 @@ kchannelConstruct_IMPL pDevice = dynamicCast(pDeviceRef->pResource, Device); + // Save the UVM owned flag. + bUvmOwnedFlag = FLD_TEST_DRF(_KERNELCHANNEL, _ALLOC_INTERNALFLAGS, _UVM_OWNED, _YES, pChannelGpfifoParams->internalFlags); + // Internal fields must be cleared when RMAPI call is from client if (!hypervisorIsVgxHyper() || IS_GSP_CLIENT(pGpu)) pChannelGpfifoParams->hPhysChannelGroup = NV01_NULL_OBJECT; @@ -290,6 +294,15 @@ kchannelConstruct_IMPL pKernelChannel->SubProcessID = pRmClient->SubProcessID; } + // + // Mark the channel as UVM owned only if the channel is kernel privileged + // and flagged as UVM owned. + // + if (pKernelChannel->privilegeLevel == NV_KERNELCHANNEL_ALLOC_INTERNALFLAGS_PRIVILEGE_KERNEL) + { + pKernelChannel->bUvmOwned = bUvmOwnedFlag; + } + // Context share and vaspace handles can't be active at the same time. if ((hKernelCtxShare != NV01_NULL_OBJECT) && (pChannelGpfifoParams->hVASpace != NV01_NULL_OBJECT)) { @@ -1812,6 +1825,9 @@ void kchannelNotifyEvent_IMPL // validate notifyIndex NV_CHECK_OR_RETURN_VOID(LEVEL_INFO, notifyIndex < classInfo.notifiersMaxCount); + // Check if we have allocated the channel notifier action table + NV_CHECK_OR_RETURN_VOID(LEVEL_ERROR, pKernelChannel->pNotifyActions != NULL); + // handle notification if client wants it if (pKernelChannel->pNotifyActions[notifyIndex] != classInfo.eventActionDisable) { @@ -2818,6 +2834,12 @@ _kchannelSendChannelAllocRpc pRpcParams->internalFlags = FLD_SET_DRF_NUM(_KERNELCHANNEL, _ALLOC_INTERNALFLAGS, _PRIVILEGE, pKernelChannel->privilegeLevel, pRpcParams->internalFlags); + if (pKernelChannel->bUvmOwned) + { + pRpcParams->internalFlags = + FLD_SET_DRF(_KERNELCHANNEL, _ALLOC_INTERNALFLAGS, _UVM_OWNED, + _YES, pRpcParams->internalFlags); + } pRpcParams->ProcessID = pKernelChannel->ProcessID; pRpcParams->SubProcessID= pKernelChannel->SubProcessID; } @@ -3389,6 +3411,9 @@ kchannelCtrlCmdGpfifoGetWorkSubmitToken_IMPL !(IS_VIRTUAL_WITH_SRIOV(pGpu) && !bIsMIGEnabled && kfifoIsPerRunlistChramEnabled(pKernelFifo)))) && (!pKernelFifo->bGuestGenenratesWorkSubmitToken); + + NvBool bGenerateWorkSubmitToken = !bIsModsVgpu || pKernelFifo->bGuestGenenratesWorkSubmitToken; + // // vGPU: // If required call into the host to get the worksubmit token. @@ -3418,13 +3443,16 @@ kchannelCtrlCmdGpfifoGetWorkSubmitToken_IMPL } } - if (!bIsModsVgpu || pKernelFifo->bGuestGenenratesWorkSubmitToken) + if (bGenerateWorkSubmitToken) { NV_ASSERT_OR_RETURN(pKernelChannel->pKernelChannelGroupApi != NULL, NV_ERR_INVALID_STATE); - NV_ASSERT_OR_RETURN(pKernelChannel->pKernelChannelGroupApi->pKernelChannelGroup != NULL, NV_ERR_INVALID_STATE); - rmStatus = kfifoGenerateWorkSubmitToken_HAL(pGpu, pKernelFifo, pKernelChannel, - &pTokenParams->workSubmitToken, - pKernelChannel->pKernelChannelGroupApi->pKernelChannelGroup->bIsCallingContextVgpuPlugin); + + KernelChannelGroup *pKernelChannelGroup = pKernelChannel->pKernelChannelGroupApi->pKernelChannelGroup; + NV_ASSERT_OR_RETURN(pKernelChannelGroup != NULL, NV_ERR_INVALID_STATE); + + rmStatus = kfifoGenerateWorkSubmitToken(pGpu, pKernelFifo, pKernelChannel, + &pTokenParams->workSubmitToken, + pKernelChannelGroup->bIsCallingContextVgpuPlugin); NV_CHECK_OR_RETURN(LEVEL_INFO, rmStatus == NV_OK, rmStatus); } diff --git a/src/nvidia/src/kernel/gpu/fifo/kernel_channel_group_api.c b/src/nvidia/src/kernel/gpu/fifo/kernel_channel_group_api.c index ffd06c0c42..8691afee96 100644 --- a/src/nvidia/src/kernel/gpu/fifo/kernel_channel_group_api.c +++ b/src/nvidia/src/kernel/gpu/fifo/kernel_channel_group_api.c @@ -103,7 +103,7 @@ kchangrpapiConstruct_IMPL if (rmDeviceGpuLockIsOwner(pGpu->gpuInstance)) { NV_PRINTF(LEVEL_ERROR, "TSG alloc should be called without acquiring GPU lock\n"); - LOCK_ASSERT_AND_RETURN(0); + NV_ASSERT_OR_RETURN(0, NV_ERR_INVALID_LOCK_STATE); } bufInfoList = portMemAllocNonPaged(NV_ENUM_SIZE(GR_CTX_BUFFER) * sizeof(*bufInfoList)); @@ -235,7 +235,9 @@ kchangrpapiConstruct_IMPL // vGpu plugin context flag should only be set on host if context is plugin if (gpuIsSriovEnabled(pGpu)) + { pKernelChannelGroup->bIsCallingContextVgpuPlugin = pAllocParams->bIsCallingContextVgpuPlugin; + } if (pKernelChannelGroup->bIsCallingContextVgpuPlugin) gfid = GPU_GFID_PF; @@ -1381,7 +1383,7 @@ kchangrpapiCtrlCmdSetInterleaveLevel_IMPL RsResourceRef *pResourceRef = RES_GET_REF(pKernelChannelGroupApi); KernelChannelGroup *pKernelChannelGroup = pKernelChannelGroupApi->pKernelChannelGroup; - PCLASSDESCRIPTOR pClass = NULL; + CLASSDESCRIPTOR *pClass = NULL; NV_STATUS status = NV_OK; if (gpuGetClassByClassId(pGpu, pResourceRef->externalClassId, &pClass) != NV_OK) diff --git a/src/nvidia/src/kernel/gpu/fifo/kernel_ctxshare.c b/src/nvidia/src/kernel/gpu/fifo/kernel_ctxshare.c index 1659ba0842..36beba515e 100644 --- a/src/nvidia/src/kernel/gpu/fifo/kernel_ctxshare.c +++ b/src/nvidia/src/kernel/gpu/fifo/kernel_ctxshare.c @@ -380,7 +380,7 @@ kctxshareInitCommon_IMPL NV_ASSERT(pVAS != NULL); // GPU lock must be held before calling this function - LOCK_ASSERT_AND_RETURN(rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmDeviceGpuLockIsOwner(pGpu->gpuInstance), NV_ERR_INVALID_LOCK_STATE); // // For external VAS, create subcontext only after SetPageDirectory() call is made. @@ -523,7 +523,7 @@ kctxshareDestroyCommon_IMPL NV_ASSERT_OR_RETURN(refcnt == 1, NV_ERR_INVALID_STATE); // GPU lock must be held before calling this function - LOCK_ASSERT_AND_RETURN(rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmDeviceGpuLockIsOwner(pGpu->gpuInstance), NV_ERR_INVALID_LOCK_STATE); pKernelChannelGroup = pKernelCtxShare->pKernelChannelGroup; NV_ASSERT(pKernelChannelGroup == pKernelChannelGroupApi->pKernelChannelGroup); diff --git a/src/nvidia/src/kernel/gpu/fifo/kernel_fifo.c b/src/nvidia/src/kernel/gpu/fifo/kernel_fifo.c index d3fa3790aa..6f699591ed 100644 --- a/src/nvidia/src/kernel/gpu/fifo/kernel_fifo.c +++ b/src/nvidia/src/kernel/gpu/fifo/kernel_fifo.c @@ -25,7 +25,6 @@ #include "kernel/gpu/fifo/kernel_channel.h" #include "kernel/gpu/fifo/kernel_channel_group.h" #include "kernel/gpu/fifo/kernel_channel_group_api.h" -#include "kernel/gpu/fifo/kernel_sched_mgr.h" #include "virtualization/kernel_vgpu_mgr.h" #include "rmapi/rs_utils.h" #include "rmapi/client.h" @@ -338,7 +337,7 @@ _kfifoChidMgrAllocChidHeaps // should not be in the same page // kfifoGetUserdSizeAlign_HAL(pKernelFifo, &userdBar1Size, NULL); - NvBool bIsolationEnabled = (pKernelFifo->bUsePerRunlistChram && pKernelFifo->bDisableChidIsolation) ? NV_FALSE : NV_TRUE; + NvBool bIsolationEnabled = kfifoIsPreAllocatedUserDEnabled(pKernelFifo); pChidMgr->pGlobalChIDHeap->eheapSetOwnerIsolation(pChidMgr->pGlobalChIDHeap, bIsolationEnabled, RM_PAGE_SIZE / userdBar1Size); @@ -1740,22 +1739,25 @@ kfifoGetChannelIterator_IMPL ) { portMemSet(pIt, 0, sizeof(*pIt)); - pIt->physicalChannelID = 0; - pIt->pFifoDataBlock = NULL; - pIt->runlistId = 0; - pIt->numRunlists = 1; - // Do we want to ierate all runlist channels if (runlistId == INVALID_RUNLIST_ID) { - if (kfifoIsPerRunlistChramEnabled(pKernelFifo)) - { - pIt->numRunlists = kfifoGetMaxNumRunlists_HAL(pGpu, pKernelFifo); - } + pIt->runlistId = 0; + + // Resulting iterator will iterate over constructed CHID_MGRs only + pIt->numRunlists = pKernelFifo->numChidMgrs; } else { pIt->runlistId = runlistId; + + // + // kfifoGetChidMgr() ignores the runlistId argument if per-runlist channel RAM is disabled. + // If there's no valid CHID_MGR for the given runlist ID, we can't iterate through the + // channels on the runlist, so we return an empty iterator instead. + // + CHID_MGR *pChidMgr = kfifoGetChidMgr(pGpu, pKernelFifo, pIt->runlistId); + pIt->numRunlists = (pChidMgr == NULL) ? 0 : 1; } } @@ -3512,7 +3514,6 @@ kfifoGetGuestEngineLookupTable_IMPL {NV2080_ENGINE_TYPE_NVJPEG7, MC_ENGINE_IDX_NVJPEG7}, {NV2080_ENGINE_TYPE_OFA0, MC_ENGINE_IDX_OFA0}, {NV2080_ENGINE_TYPE_OFA1, MC_ENGINE_IDX_OFA1}, - // removal tracking bug: 3748354 {NV2080_ENGINE_TYPE_COPY10, MC_ENGINE_IDX_CE10}, {NV2080_ENGINE_TYPE_COPY11, MC_ENGINE_IDX_CE11}, {NV2080_ENGINE_TYPE_COPY12, MC_ENGINE_IDX_CE12}, @@ -3523,7 +3524,6 @@ kfifoGetGuestEngineLookupTable_IMPL {NV2080_ENGINE_TYPE_COPY17, MC_ENGINE_IDX_CE17}, {NV2080_ENGINE_TYPE_COPY18, MC_ENGINE_IDX_CE18}, {NV2080_ENGINE_TYPE_COPY19, MC_ENGINE_IDX_CE19}, - // removal tracking bug: 3748354 {NV2080_ENGINE_TYPE_COMP_DECOMP_COPY0, MC_ENGINE_IDX_CE0}, {NV2080_ENGINE_TYPE_COMP_DECOMP_COPY1, MC_ENGINE_IDX_CE1}, {NV2080_ENGINE_TYPE_COMP_DECOMP_COPY2, MC_ENGINE_IDX_CE2}, @@ -3534,7 +3534,6 @@ kfifoGetGuestEngineLookupTable_IMPL {NV2080_ENGINE_TYPE_COMP_DECOMP_COPY7, MC_ENGINE_IDX_CE7}, {NV2080_ENGINE_TYPE_COMP_DECOMP_COPY8, MC_ENGINE_IDX_CE8}, {NV2080_ENGINE_TYPE_COMP_DECOMP_COPY9, MC_ENGINE_IDX_CE9}, - // removal tracking bug: 3748354 {NV2080_ENGINE_TYPE_COMP_DECOMP_COPY10, MC_ENGINE_IDX_CE10}, {NV2080_ENGINE_TYPE_COMP_DECOMP_COPY11, MC_ENGINE_IDX_CE11}, {NV2080_ENGINE_TYPE_COMP_DECOMP_COPY12, MC_ENGINE_IDX_CE12}, @@ -3721,3 +3720,90 @@ kfifoGetEngineTypeFromPbdmaFaultId_IMPL return NV_ERR_OBJECT_NOT_FOUND; } +NV_STATUS kfifoGenerateWorkSubmitToken_IMPL +( + OBJGPU *pGpu, + KernelFifo *pKernelFifo, + KernelChannel *pKernelChannel, + NvU32 *pGeneratedToken, + NvBool bUsedForHost +) +{ + { + NV_ASSERT_OK_OR_RETURN(kfifoGenerateWorkSubmitTokenHal_HAL(pGpu, pKernelFifo, + pKernelChannel, pGeneratedToken, bUsedForHost)); + } + return NV_OK; +} + +/*! + * * @brief Function to print engine with pbdmaId/VEID for the given pbdma falut id + * + * @param[in] pGpu + * @param[in] pKernelFifo + * @param[in] pbdmaFaultId + * + * @returns engine name with pbdmaId/VEID + * + */ +const char * +kfifoPrintFaultingPbdmaEngineName_IMPL +( + OBJGPU *pGpu, + KernelFifo *pKernelFifo, + NvU32 pbdmaFaultId +) +{ + NvU32 i, j; + const ENGINE_INFO *pEngineInfo = kfifoGetEngineInfo(pKernelFifo); + static char faultingEngineName[64] = {0}; + const char *pbdmaIdString[2] = {"_PBDMA0", "_PBDMA1"}; + + if (!pKernelFifo->bIsPbdmaMmuEngineIdContiguous) + { + RM_ENGINE_TYPE rmEngineType; + + NV_ASSERT_OR_RETURN(kfifoGetEngineTypeFromPbdmaFaultId(pGpu, pKernelFifo, + pbdmaFaultId, &rmEngineType) == NV_OK, "UNKNOWN"); + if (RM_ENGINE_TYPE_IS_GR(rmEngineType)) + { + NvU32 grIdx = RM_ENGINE_TYPE_GR_IDX(rmEngineType); + const char *grHostString[RM_ENGINE_TYPE_GR_SIZE] = { + "GR_HOST0", "GR_HOST1", "GR_HOST2", "GR_HOST3", + "GR_HOST4", "GR_HOST5", "GR_HOST6", "GR_HOST7"}; + + NV_ASSERT_OR_RETURN(grIdx < RM_ENGINE_TYPE_GR_SIZE, "UNKNOWN"); + + portStringCopy(faultingEngineName, + sizeof(grHostString), + grHostString[grIdx], + portStringLength(grHostString[grIdx]) + 1); + + return faultingEngineName; + } + } + + for (i = 0; i < pEngineInfo->engineInfoListSize; i++) + { + for (j = 0; j < pEngineInfo->engineInfoList[i].numPbdmas; j++) + { + if (pbdmaFaultId == pEngineInfo->engineInfoList[i].pbdmaFaultIds[j]) + { + portStringCopy(faultingEngineName, + sizeof(faultingEngineName), + pEngineInfo->engineInfoList[i].engineName, + portStringLength(pEngineInfo->engineInfoList[i].engineName) + 1); + + portStringCat(faultingEngineName, + sizeof(faultingEngineName), + pbdmaIdString[j], + portStringLength(pbdmaIdString[j]) + 1); + + return faultingEngineName; + } + } + } + + return "UNKNOWN"; +} + diff --git a/src/nvidia/src/kernel/gpu/fifo/kernel_fifo_ctrl.c b/src/nvidia/src/kernel/gpu/fifo/kernel_fifo_ctrl.c index 9229ef34d5..a70b0ab07a 100644 --- a/src/nvidia/src/kernel/gpu/fifo/kernel_fifo_ctrl.c +++ b/src/nvidia/src/kernel/gpu/fifo/kernel_fifo_ctrl.c @@ -222,7 +222,7 @@ subdeviceCtrlCmdFifoGetInfo_IMPL NvU32 i; NvU32 data; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // error checck if (pFifoInfoParams->fifoInfoTblSize > NV2080_CTRL_FIFO_GET_INFO_MAX_ENTRIES) @@ -377,7 +377,7 @@ subdeviceCtrlCmdFifoGetUserdLocation_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); KernelFifo *pKernelFifo = GPU_GET_KERNEL_FIFO(pGpu); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); rmStatus = kfifoGetUserdLocation_HAL(pKernelFifo, &userdAperture, @@ -449,7 +449,7 @@ subdeviceCtrlCmdFifoGetChannelMemInfo_IMPL MEMORY_DESCRIPTOR *pMemDesc = NULL; NV2080_CTRL_FIFO_CHANNEL_MEM_INFO chMemInfo; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); rmStatus = CliGetKernelChannelWithDevice(pClient, hDevice, @@ -560,7 +560,8 @@ subdeviceCtrlCmdFifoUpdateChannelInfo_IMPL RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); // Bug 724186 -- Skip this check for deferred API - LOCK_ASSERT_AND_RETURN(pRmCtrlParams->bDeferredApi || rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(pRmCtrlParams->bDeferredApi || rmGpuLockIsOwner(), + NV_ERR_INVALID_LOCK_STATE); NV_CHECK_OK_OR_RETURN(LEVEL_INFO, serverGetClientUnderLock(&g_resServ, @@ -691,7 +692,7 @@ deviceCtrlCmdFifoGetCaps_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pDevice); NvU8 *pKfifoCaps = NvP64_VALUE(pKfifoCapsParams->capsTbl); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // sanity check array size if (pKfifoCapsParams->capsTblSize != NV0080_CTRL_FIFO_CAPS_TBL_SIZE) @@ -722,7 +723,7 @@ deviceCtrlCmdFifoGetCapsV2_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pDevice); NvU8 *pKfifoCaps = pKfifoCapsParams->capsTbl; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // now accumulate caps for entire device return _kfifoGetCaps(pGpu, pKfifoCaps); @@ -1063,6 +1064,7 @@ deviceCtrlCmdFifoGetEngineContextProperties_VF case NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_ENGINE_ID_GRAPHICS_PAGEPOOL: case NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_ENGINE_ID_GRAPHICS_BETACB: case NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_ENGINE_ID_GRAPHICS_RTV: + case NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_ENGINE_ID_GRAPHICS_SETUP: pParams->size = NV_MAX(pVSI->ctxBuffInfo.engineContextBuffersInfo[0].engine[engine].size, size); pParams->alignment = NV_MAX(pVSI->ctxBuffInfo.engineContextBuffersInfo[0].engine[engine].alignment, alignment); status = NV_OK; diff --git a/src/nvidia/src/kernel/gpu/fifo/kernel_fifo_init.c b/src/nvidia/src/kernel/gpu/fifo/kernel_fifo_init.c index 15455d99b8..31c0261f5b 100644 --- a/src/nvidia/src/kernel/gpu/fifo/kernel_fifo_init.c +++ b/src/nvidia/src/kernel/gpu/fifo/kernel_fifo_init.c @@ -23,7 +23,6 @@ #include "kernel/gpu/fifo/kernel_fifo.h" #include "kernel/gpu/fifo/kernel_channel_group.h" -#include "kernel/gpu/fifo/kernel_sched_mgr.h" #include "kernel/gpu/rc/kernel_rc.h" #include "vgpu/rpc.h" @@ -77,37 +76,22 @@ kfifoStateLoad_IMPL NvU32 flags ) { - if (IS_VIRTUAL_WITH_FULL_SRIOV(pGpu) && (flags & GPU_STATE_FLAGS_PRESERVING)) + NV_STATUS status = NV_OK; + if ( + (IS_VIRTUAL_WITH_FULL_SRIOV(pGpu) && (flags & GPU_STATE_FLAGS_PRESERVING)) || + (IS_GSP_CLIENT(pGpu) && (flags & GPU_STATE_FLAGS_PM_TRANSITION))) { - NV_STATUS rmStatus = NV_OK; - - NV_RM_RPC_DISABLE_CHANNELS(pGpu, NV_FALSE, rmStatus); - if (rmStatus != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, - "RPC to enable all channels failed, status 0x%x\n", rmStatus); - DBG_BREAKPOINT(); - return rmStatus; - } - } - - // Send RPC to GSP-RM to resume scheduling - if (IS_GSP_CLIENT(pGpu) && (flags & GPU_STATE_FLAGS_PM_TRANSITION)) - { - RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING_PARAMS fifoToggleActiveChannelSchedulingParam; fifoToggleActiveChannelSchedulingParam.bDisableActiveChannels = NV_FALSE; - NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, - pRmApi->Control(pRmApi, - pGpu->hInternalClient, - pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING, - &fifoToggleActiveChannelSchedulingParam, - sizeof(fifoToggleActiveChannelSchedulingParam))); + NV_RM_RPC_CONTROL(pGpu, pGpu->hInternalClient, pGpu->hInternalSubdevice, + NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING, + &fifoToggleActiveChannelSchedulingParam, + sizeof(fifoToggleActiveChannelSchedulingParam), status); + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, status); } - return NV_OK; + return status; } NV_STATUS @@ -118,37 +102,22 @@ kfifoStateUnload_IMPL NvU32 flags ) { - if (IS_VIRTUAL_WITH_FULL_SRIOV(pGpu) && (flags & GPU_STATE_FLAGS_PRESERVING)) + NV_STATUS status = NV_OK; + if ( + (IS_VIRTUAL_WITH_FULL_SRIOV(pGpu) && (flags & GPU_STATE_FLAGS_PRESERVING)) || + (IS_GSP_CLIENT(pGpu) && (flags & GPU_STATE_FLAGS_PM_TRANSITION))) { - NV_STATUS rmStatus = NV_OK; - - NV_RM_RPC_DISABLE_CHANNELS(pGpu, NV_TRUE, rmStatus); - if (rmStatus != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, - "RPC to disable all channels failed, status 0x%x\n", rmStatus); - DBG_BREAKPOINT(); - return rmStatus; - } - } - - // Send RPC to GSP-RM to disable active channels - if (IS_GSP_CLIENT(pGpu) && (flags & GPU_STATE_FLAGS_PM_TRANSITION)) - { - RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING_PARAMS fifoToggleActiveChannelSchedulingParam; fifoToggleActiveChannelSchedulingParam.bDisableActiveChannels = NV_TRUE; - NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, - pRmApi->Control(pRmApi, - pGpu->hInternalClient, - pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING, - &fifoToggleActiveChannelSchedulingParam, - sizeof(fifoToggleActiveChannelSchedulingParam))); + NV_RM_RPC_CONTROL(pGpu, pGpu->hInternalClient, pGpu->hInternalSubdevice, + NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING, + &fifoToggleActiveChannelSchedulingParam, + sizeof(fifoToggleActiveChannelSchedulingParam), status); + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, status); } - return NV_OK; + return status; } static void @@ -169,6 +138,19 @@ _kfifoPreConstructRegistryOverrides pKernelFifo->bPerRunlistChramOverride = NV_FALSE; + if (kfifoIsPerRunlistChramSupportedInHw(pKernelFifo)) + { + if ((osReadRegistryDword(pGpu, + NV_REG_STR_RM_DEBUG_OVERRIDE_PER_RUNLIST_CHANNEL_RAM, + &data32) == NV_OK)) + { + NV_PRINTF(LEVEL_INFO, "%s per runlist channel RAM\n", + !!data32 ? "Enabling" : "Disabling"); + pKernelFifo->bUsePerRunlistChram = !!data32; + pKernelFifo->bPerRunlistChramOverride = NV_TRUE; + } + } + if ((osReadRegistryDword(pGpu, NV_REG_STR_RM_SUPPORT_USERD_MAP_DMA, &data32) == NV_OK) && data32) { @@ -192,9 +174,6 @@ kfifoDestruct_IMPL listDestroy(&pKernelFifo->postSchedulingEnableHandlerList); listDestroy(&pKernelFifo->preSchedulingDisableHandlerList); - objDelete(pKernelFifo->pKernelSchedMgr); - pKernelFifo->pKernelSchedMgr = NULL; - portMemFree(pEngineInfo->engineInfoList); pEngineInfo->engineInfoList = NULL; @@ -236,6 +215,13 @@ kfifoStateInitLocked_IMPL } } + // + // If bUsePerRunlistChram is set, RM cannot feasibly pre-allocate USERD for + // such a large number of channels. We expect clients to have already + // migrated to using client allocated USERD. + // + pKernelFifo->bDisablePreAllocatedUserD = pKernelFifo->bUsePerRunlistChram; + NV_ASSERT_OK_OR_RETURN(kfifoConstructUsermodeMemdescs_HAL(pGpu, pKernelFifo)); NV_ASSERT_OK_OR_RETURN(kfifoChidMgrConstruct(pGpu, pKernelFifo)); diff --git a/src/nvidia/src/kernel/gpu/fifo/kernel_sched_mgr.c b/src/nvidia/src/kernel/gpu/fifo/kernel_sched_mgr.c deleted file mode 100644 index 00c47817dd..0000000000 --- a/src/nvidia/src/kernel/gpu/fifo/kernel_sched_mgr.c +++ /dev/null @@ -1,189 +0,0 @@ -/* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. - * SPDX-License-Identifier: MIT - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -/*! - * @file - * @brief KernelSchedMgr object module - * - * This module is for managing and manipulating state related to KernelSchedMgr - */ - -/* -------------------------------- Includes -------------------------------- */ - -#include "os/os.h" -#include "nvrm_registry.h" - -#include "kernel/gpu/fifo/kernel_fifo.h" -#include "kernel/gpu/fifo/kernel_sched_mgr.h" -#include "kernel/gpu/mig_mgr/kernel_mig_manager.h" - -#include "virtualization/hypervisor/hypervisor.h" - -/* -------------------------------- Functions ------------------------------- */ - -/*! - * Obtains the valid scheduling policy for the current platform. - * Use: Determine whether software scheduling is required. - */ -static const char * -_kschedmgrGetSchedulerPolicy -( - KernelSchedMgr *pKernelSchedMgr, - OBJGPU *pGpu, - NvU32 *pSchedPolicy -) -{ - NvU32 schedPolicy = SCHED_POLICY_DEFAULT; - NvU32 regkey = 0; - - if (hypervisorIsVgxHyper() || (RMCFG_FEATURE_PLATFORM_GSP && IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu))) - { - // Disable OBJSCHED_SW_ENABLE when GPU is older than Pascal. - // This is true for WDDM and vGPU scheduling - if (!IsPASCALorBetter(pGpu)) - { - schedPolicy = SCHED_POLICY_DEFAULT; - } - else if (IS_MIG_ENABLED(pGpu)) - { - schedPolicy = SCHED_POLICY_DEFAULT; - portDbgPrintf("NVRM: Software Scheduler is not supported in MIG mode\n"); - } - // Check the PVMRL regkey - else if (osReadRegistryDword(pGpu, NV_REG_STR_RM_PVMRL, ®key) == NV_OK && - FLD_TEST_REF(NV_REG_STR_RM_PVMRL_ENABLE, _YES, regkey) ) - { - NvU32 configSchedPolicy = REF_VAL(NV_REG_STR_RM_PVMRL_SCHED_POLICY, regkey); - - switch (configSchedPolicy) - { - case NV_REG_STR_RM_PVMRL_SCHED_POLICY_VGPU_EQUAL_SHARE: - schedPolicy = SCHED_POLICY_VGPU_EQUAL_SHARE; - break; - case NV_REG_STR_RM_PVMRL_SCHED_POLICY_VGPU_FIXED_SHARE: - schedPolicy = SCHED_POLICY_VGPU_FIXED_SHARE; - break; - default: - NV_PRINTF(LEVEL_INFO, - "Invalid scheduling policy %d specified by regkey.\n", - configSchedPolicy); - break; - } - } - else - { - schedPolicy = SCHED_POLICY_BEST_EFFORT; - } - } - - *pSchedPolicy = schedPolicy; - - switch (schedPolicy) - { - case SCHED_POLICY_BEST_EFFORT: - return MAKE_NV_PRINTF_STR("BEST_EFFORT"); - case SCHED_POLICY_VGPU_EQUAL_SHARE: - return MAKE_NV_PRINTF_STR("EQUAL_SHARE"); - case SCHED_POLICY_VGPU_FIXED_SHARE: - return MAKE_NV_PRINTF_STR("FIXED_SHARE"); - case SCHED_POLICY_DEFAULT: - default: - // For baremetal and PT - return MAKE_NV_PRINTF_STR("NONE"); - } -} - -void kschedmgrSetConfigPolicyFromUser_IMPL -( - KernelSchedMgr *pKernelSchedMgr, - OBJGPU *pGpu, - NvU32 schedSwPolicy -) -{ - NvU32 schedSwPolicyLocal = SCHED_POLICY_DEFAULT; - switch (schedSwPolicy) - { - case NV2080_CTRL_CMD_VGPU_SCHEDULER_POLICY_BEST_EFFORT: - schedSwPolicyLocal = SCHED_POLICY_BEST_EFFORT; - break; - case NV2080_CTRL_CMD_VGPU_SCHEDULER_POLICY_EQUAL_SHARE: - schedSwPolicyLocal = SCHED_POLICY_VGPU_EQUAL_SHARE; - break; - case NV2080_CTRL_CMD_VGPU_SCHEDULER_POLICY_FIXED_SHARE: - schedSwPolicyLocal = SCHED_POLICY_VGPU_FIXED_SHARE; - break; - case NV2080_CTRL_CMD_VGPU_SCHEDULER_POLICY_OTHER: - schedSwPolicyLocal = SCHED_POLICY_DEFAULT; - break; - default: - NV_PRINTF(LEVEL_WARNING, "Unknown vGPU scheduler policy %u\n", schedSwPolicy); - schedSwPolicyLocal = SCHED_POLICY_DEFAULT; - break; - } - pKernelSchedMgr->configSchedPolicy = schedSwPolicyLocal; - pKernelSchedMgr->bIsSchedSwEnabled = (schedSwPolicyLocal != SCHED_POLICY_DEFAULT); -} - -/*! - * Configure PDBs related to scheduler policy per RM configuration. - */ -void -kschedmgrConstructPolicy_IMPL -( - KernelSchedMgr *pKernelSchedMgr, - OBJGPU *pGpu -) -{ - const char *schedPolicyName; - NvU32 domain = gpuGetDomain(pGpu); - NvU32 bus = gpuGetBus(pGpu); - NvU32 device = gpuGetDevice(pGpu); - - schedPolicyName = _kschedmgrGetSchedulerPolicy(pKernelSchedMgr, pGpu, &pKernelSchedMgr->configSchedPolicy); - - // PVMRL is disabled when GPU is older than Pascal - if (((RMCFG_FEATURE_PLATFORM_GSP && IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu)) || hypervisorIsVgxHyper()) && IsPASCALorBetter(pGpu)) - { - pKernelSchedMgr->bIsSchedSwEnabled = (pKernelSchedMgr->configSchedPolicy != SCHED_POLICY_DEFAULT); - - portDbgPrintf("NVRM: GPU at %04x:%02x:%02x.0 has software scheduler %s with policy %s.\n", - domain, bus, device, - pKernelSchedMgr->bIsSchedSwEnabled ? MAKE_NV_PRINTF_STR("ENABLED") : MAKE_NV_PRINTF_STR("DISABLED"), - schedPolicyName); - } - else - { - // RM is not yet ready to print this message in release builds on baremetal. - NV_PRINTF(LEVEL_INFO, - "GPU at %04x:%02x:%02x.0 has software scheduler %s with policy %s.\n", - domain, bus, device, - pKernelSchedMgr->bIsSchedSwEnabled ? MAKE_NV_PRINTF_STR("ENABLED") : MAKE_NV_PRINTF_STR("DISABLED"), - schedPolicyName); - } - - // Enabled SWRL Granular locking only if SWRL is enabled on hypervisor or VGPU_GSP_PLUGIN_OFFLOAD is enabled - if (((RMCFG_FEATURE_PLATFORM_GSP && IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu)) || hypervisorIsVgxHyper()) && pKernelSchedMgr->bIsSchedSwEnabled) - { - pGpu->setProperty(pGpu, PDB_PROP_GPU_SWRL_GRANULAR_LOCKING, NV_TRUE); - } -} diff --git a/src/nvidia/src/kernel/gpu/fsp/arch/blackwell/kern_fsp_gb100.c b/src/nvidia/src/kernel/gpu/fsp/arch/blackwell/kern_fsp_gb100.c index 1cc2eb3f5a..f6d557c3e3 100644 --- a/src/nvidia/src/kernel/gpu/fsp/arch/blackwell/kern_fsp_gb100.c +++ b/src/nvidia/src/kernel/gpu/fsp/arch/blackwell/kern_fsp_gb100.c @@ -43,6 +43,22 @@ #include "nvRmReg.h" #include "nverror.h" +static NvBool _kfspWaitBootCond_GB100(OBJGPU *pGpu, void *pArg); + +static NvBool +_kfspWaitBootCond_GB100 +( + OBJGPU *pGpu, + void *pArg +) +{ + // + // In GB100, Bootfsm triggers FSP execution out of chip reset. + // FSP writes 0xFF value in NV_THERM_I2CS_SCRATCH register after completion of boot + // + return GPU_FLD_TEST_DRF_DEF(pGpu, _THERM_I2CS_SCRATCH, _FSP_BOOT_COMPLETE, _STATUS, _SUCCESS); +} + NV_STATUS kfspWaitForSecureBoot_GB100 ( @@ -55,31 +71,26 @@ kfspWaitForSecureBoot_GB100 // // Polling for FSP boot complete - // In Hopper, Bootfsm triggers FSP execution out of chip reset. - // FSP writes 0xFF value in NV_THERM_I2CS_SCRATCH register after completion of boot // FBFalcon training during devinit alone takes 2 seconds, up to 3 on HBM3, // but the default threadstate timeout on windows is 1800 ms. Increase to 4 seconds // for this wait to match MODS GetGFWBootTimeoutMs. - // For flags, this must not timeout due to aforementioned threadstate timeout, - // and we must not use the GPU TMR since it is inaccessible. + // For flags, we must not use the GPU TMR since it is inaccessible. // gpuSetTimeout(pGpu, NV_MAX(gpuScaleTimeout(pGpu, 4000000), pGpu->timeoutData.defaultus), - &timeout, GPU_TIMEOUT_FLAGS_OSTIMER | GPU_TIMEOUT_FLAGS_BYPASS_THREAD_STATE); + &timeout, GPU_TIMEOUT_FLAGS_OSTIMER); - while(!GPU_FLD_TEST_DRF_DEF(pGpu, _THERM_I2CS_SCRATCH, _FSP_BOOT_COMPLETE, _STATUS, _SUCCESS)) + status = gpuTimeoutCondWait(pGpu, _kfspWaitBootCond_GB100, NULL, &timeout); + + if (status != NV_OK) { - status = gpuCheckTimeout(pGpu, &timeout); - if (status == NV_ERR_TIMEOUT) - { - NV_ERROR_LOG((void*) pGpu, GPU_INIT_ERROR, "Timeout while polling for FSP boot complete, " - "0x%x, 0x%x, 0x%x, 0x%x, 0x%x", - GPU_REG_RD32(pGpu, NV_THERM_I2CS_SCRATCH_FSP_BOOT_COMPLETE), - GPU_REG_RD32(pGpu, NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_2(0)), - GPU_REG_RD32(pGpu, NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_2(1)), - GPU_REG_RD32(pGpu, NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_2(2)), - GPU_REG_RD32(pGpu, NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_2(3))); - break; - } + NV_ERROR_LOG((void*) pGpu, GPU_INIT_ERROR, "Error status 0x%x while polling for FSP boot complete, " + "0x%x, 0x%x, 0x%x, 0x%x, 0x%x", + status, + GPU_REG_RD32(pGpu, NV_THERM_I2CS_SCRATCH_FSP_BOOT_COMPLETE), + GPU_REG_RD32(pGpu, NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_2(0)), + GPU_REG_RD32(pGpu, NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_2(1)), + GPU_REG_RD32(pGpu, NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_2(2)), + GPU_REG_RD32(pGpu, NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_2(3))); } if (GPU_FLD_TEST_DRF_DEF(pGpu, _PFSP, _FUSE_ERROR_CHECK, _STATUS, _SUCCESS)) @@ -92,7 +103,7 @@ kfspWaitForSecureBoot_GB100 NV_PRINTF(LEVEL_ERROR, "****************************************** FSP Fuse Check Failure ************************************************\n"); NV_ERROR_LOG((void*) pGpu, GPU_INIT_ERROR, "FSP fuse error check has failed. Status = 0x%x.", - GPU_REG_RD32(pGpu, NV_PFSP_FUSE_ERROR_CHECK)); + GPU_REG_RD32(pGpu, NV_PFSP_FUSE_ERROR_CHECK)); NV_PRINTF(LEVEL_ERROR, "** FSP fuse error check has failed. Status = 0x%x. **\n", GPU_REG_RD32(pGpu, NV_PFSP_FUSE_ERROR_CHECK)); diff --git a/src/nvidia/src/kernel/gpu/fsp/arch/hopper/kern_fsp_gh100.c b/src/nvidia/src/kernel/gpu/fsp/arch/hopper/kern_fsp_gh100.c index 43512b4b3a..0a28b51a0e 100644 --- a/src/nvidia/src/kernel/gpu/fsp/arch/hopper/kern_fsp_gh100.c +++ b/src/nvidia/src/kernel/gpu/fsp/arch/hopper/kern_fsp_gh100.c @@ -52,6 +52,29 @@ #include "gpu/conf_compute/conf_compute.h" +// Blocks are 64 DWORDS +#define DWORDS_PER_EMEM_BLOCK 64U + +static void _kfspUpdateQueueHeadTail_GH100(OBJGPU *pGpu, KernelFsp *pKernelFsp, + NvU32 queueHead, NvU32 queueTail); + +static void _kfspGetQueueHeadTail_GH100(OBJGPU *pGpu, KernelFsp *pKernelFsp, + NvU32 *pQueueHead, NvU32 *pQueueTail); + +static void _kfspUpdateMsgQueueHeadTail_GH100(OBJGPU *pGpu, KernelFsp *pKernelFsp, + NvU32 queueHead, NvU32 queueTail); + +static void _kfspGetMsgQueueHeadTail_GH100(OBJGPU *pGpu, KernelFsp *pKernelFsp, + NvU32 *pQueueHead, NvU32 *pQueueTail); + +static NV_STATUS _kfspConfigEmemc_GH100(OBJGPU *pGpu, KernelFsp *pKernelFsp, + NvU32 offset, NvBool bAincw, NvBool bAincr); + +static NV_STATUS _kfspWriteToEmem_GH100(OBJGPU *pGpu, KernelFsp *pKernelFsp, + NvU8 *pBuffer, NvU32 size); + +static NvBool _kfspWaitBootCond_GH100(OBJGPU *pGpu, void *pArg); + /*! * @brief Update command queue head and tail pointers * @@ -60,8 +83,8 @@ * @param[in] queueHead Offset to write to command queue head * @param[in] queueTail Offset to write to command queue tail */ -void -kfspUpdateQueueHeadTail_GH100 +static void +_kfspUpdateQueueHeadTail_GH100 ( OBJGPU *pGpu, KernelFsp *pKernelFsp, @@ -82,8 +105,8 @@ kfspUpdateQueueHeadTail_GH100 * @param[out] pQueueHead Pointer where we write command queue head * @param[out] pQueueTail Pointer where we write command queue tail */ -void -kfspGetQueueHeadTail_GH100 +static void +_kfspGetQueueHeadTail_GH100 ( OBJGPU *pGpu, KernelFsp *pKernelFsp, @@ -103,8 +126,8 @@ kfspGetQueueHeadTail_GH100 * @param[in] msgqHead Offset to write to message queue head * @param[in] msgqTail Offset to write to message queue tail */ -void -kfspUpdateMsgQueueHeadTail_GH100 +static void +_kfspUpdateMsgQueueHeadTail_GH100 ( OBJGPU *pGpu, KernelFsp *pKernelFsp, @@ -124,8 +147,8 @@ kfspUpdateMsgQueueHeadTail_GH100 * @param[out] pMsgqHead Pointer where we write message queue head * @param[out] pMsgqTail Pointer where we write message queue tail */ -void -kfspGetMsgQueueHeadTail_GH100 +static void +_kfspGetMsgQueueHeadTail_GH100 ( OBJGPU *pGpu, KernelFsp *pKernelFsp, @@ -138,15 +161,15 @@ kfspGetMsgQueueHeadTail_GH100 } /*! - * @brief Get size of RM's channel in FSP EMEM + * @brief Get maximum size of a packet we can send. * * @param[in] pGpu OBJGPU pointer * @param[in] pKernelFsp KernelFsp pointer * - * @return RM channel size in bytes + * @return Packet size in bytes */ NvU32 -kfspGetRmChannelSize_GH100 +kfspGetMaxSendPacketSize_GH100 ( OBJGPU *pGpu, KernelFsp *pKernelFsp @@ -159,6 +182,76 @@ kfspGetRmChannelSize_GH100 return FSP_EMEM_CHANNEL_RM_SIZE; } +/*! + * @brief Get maximum size of a packet we can receive. + * + * @param[in] pGpu OBJGPU pointer + * @param[in] pKernelFsp KernelFsp pointer + * + * @return Packet size in bytes + */ +NvU32 +kfspGetMaxRecvPacketSize_GH100 +( + OBJGPU *pGpu, + KernelFsp *pKernelFsp +) +{ + // + // Channel size is hardcoded to 1K for now. Later we will use EMEMR to + // properly fetch the lower and higher bounds of the EMEM channel + // + return FSP_EMEM_CHANNEL_RM_SIZE; +} + +/*! + * @brief Check if RM has a response from FSP available + * + * @param[in] pGpu OBJGPU pointer + * @param[in] pKernelFsp KernelFsp pointer + * + * @return NV_TRUE if a response is available, NV_FALSE otherwise + */ +NvBool +kfspIsResponseAvailable_GH100 +( + OBJGPU *pGpu, + KernelFsp *pKernelFsp +) +{ + NvU32 msgqHead; + NvU32 msgqTail; + + _kfspGetMsgQueueHeadTail_GH100(pGpu, pKernelFsp, &msgqHead, &msgqTail); + // FSP updates the head after writing data into the channel + return (msgqHead != msgqTail); +} + + +/*! + * @brief Check if RM can send a packet to FSP + * + * @param[in] pGpu OBJGPU pointer + * @param[in] pKernelFsp KernelFsp pointer + * + * @return NV_TRUE if send is possible, NV_FALSE otherwise + */ +NvBool +kfspCanSendPacket_GH100 +( + OBJGPU *pGpu, + KernelFsp *pKernelFsp +) +{ + NvU32 cmdqHead; + NvU32 cmdqTail; + + _kfspGetQueueHeadTail_GH100(pGpu, pKernelFsp, &cmdqHead, &cmdqTail); + + // FSP will set QUEUE_HEAD = TAIL after each packet is received + return (cmdqHead == cmdqTail); +} + /*! * @brief Retreive SEID based on NVDM type * @@ -457,8 +550,8 @@ kfspProcessCommandResponse_GH100 * * @return NV_OK */ -NV_STATUS -kfspConfigEmemc_GH100 +static NV_STATUS +_kfspConfigEmemc_GH100 ( OBJGPU *pGpu, KernelFsp *pKernelFsp, @@ -467,15 +560,16 @@ kfspConfigEmemc_GH100 NvBool bAincr ) { - NvU32 offsetBlks, offsetDwords; + NvU32 offsetBlks; + NvU32 offsetDwords; NvU32 reg32 = 0; // - // EMEMC offset is encoded in terms of blocks (64 DWORDS) and DWORD offset + // EMEMC offset is encoded in terms of blocks and DWORD offset // within a block, so calculate each. // - offsetBlks = offset / 64; - offsetDwords = offset % 64; + offsetBlks = offset / DWORDS_PER_EMEM_BLOCK; + offsetDwords = offset % DWORDS_PER_EMEM_BLOCK; reg32 = FLD_SET_DRF_NUM(_PFSP, _EMEMC, _OFFS, offsetDwords, reg32); reg32 = FLD_SET_DRF_NUM(_PFSP, _EMEMC, _BLK, offsetBlks, reg32); @@ -503,8 +597,8 @@ kfspConfigEmemc_GH100 * * @return NV_OK */ -NV_STATUS -kfspWriteToEmem_GH100 +static NV_STATUS +_kfspWriteToEmem_GH100 ( OBJGPU *pGpu, KernelFsp *pKernelFsp, @@ -512,95 +606,177 @@ kfspWriteToEmem_GH100 NvU32 size ) { - NvU32 i, reg32; + NvU32 i; + NvU32 reg32; + NvU32 leftoverBytes; + NvU32 wordsWritten; + NvU32 ememOffsetStart; NvU32 ememOffsetEnd; - // - // First configure EMEMC, RM always writes 0 to the offset, which is OK - // because RM's channel starts at 0 on GH100 and we always start from the - // beginning for each packet. It should be improved later to use EMEMR to - // properly fetch the lower and higher bounds of the EMEM channel - // - kfspConfigEmemc_HAL(pGpu, pKernelFsp, 0, NV_TRUE, NV_FALSE); + reg32 = GPU_REG_RD32(pGpu, NV_PFSP_EMEMC(FSP_EMEM_CHANNEL_RM)); + ememOffsetStart = DRF_VAL(_PFSP, _EMEMC, _OFFS, reg32); + ememOffsetStart += DRF_VAL(_PFSP, _EMEMC, _BLK, reg32) * DWORDS_PER_EMEM_BLOCK; + NV_PRINTF(LEVEL_INFO, "About to send data to FSP, ememcOff=0x%x, size=0x%x\n", ememOffsetStart, size); - NV_PRINTF(LEVEL_INFO, "About to send data to FSP, ememcOff=0, size=0x%x\n", size); - if (!NV_IS_ALIGNED(size, sizeof(NvU32))) + // Now write to EMEMD, we always have to write a DWORD at a time so write + // all the full DWORDs in the buffer and then pad any leftover bytes with 0 + for (i = 0; i < (size / sizeof(NvU32)); i++) { - NV_PRINTF(LEVEL_WARNING, "Size=0x%x is not DWORD-aligned, data will be truncated!\n", size); + GPU_REG_WR32(pGpu, NV_PFSP_EMEMD(FSP_EMEM_CHANNEL_RM), ((NvU32 *)(void *)pBuffer)[i]); } + wordsWritten = size / sizeof(NvU32); - // Now write to EMEMD - for (i = 0; i < (size / 4); i++) + leftoverBytes = size % sizeof(NvU32); + if (leftoverBytes != 0) { - GPU_REG_WR32(pGpu, NV_PFSP_EMEMD(FSP_EMEM_CHANNEL_RM), ((NvU32*)(void*)pBuffer)[i]); + reg32 = 0; + portMemCopy(®32, sizeof(NvU32), &(pBuffer[size - leftoverBytes]), leftoverBytes); + GPU_REG_WR32(pGpu, NV_PFSP_EMEMD(FSP_EMEM_CHANNEL_RM), reg32); + wordsWritten++; } // Sanity check offset. If this fails, the autoincrement did not work reg32 = GPU_REG_RD32(pGpu, NV_PFSP_EMEMC(FSP_EMEM_CHANNEL_RM)); ememOffsetEnd = DRF_VAL(_PFSP, _EMEMC, _OFFS, reg32); - - // Blocks are 64 DWORDS - ememOffsetEnd += DRF_VAL(_PFSP, _EMEMC, _BLK, reg32) * 64; + ememOffsetEnd += DRF_VAL(_PFSP, _EMEMC, _BLK, reg32) * DWORDS_PER_EMEM_BLOCK; NV_PRINTF(LEVEL_INFO, "After sending data, ememcOff = 0x%x\n", ememOffsetEnd); - NV_ASSERT((ememOffsetEnd) == (size / sizeof(NvU32))); + NV_ASSERT_OR_RETURN((ememOffsetEnd - ememOffsetStart) == wordsWritten, NV_ERR_INVALID_STATE); + return NV_OK; } +/*! + * @brief Send one packet to FSP via EMEM + * + * @param[in] pGpu OBJGPU pointer + * @param[in] pKernelFsp KernelFsp pointer + * @param[in] pPacket Packet buffer + * @param[in] packetSize Packet size in bytes + * + * @return NV_OK, or NV_ERR_INSUFFICIENT_RESOURCES + */ +NV_STATUS +kfspSendPacket_GH100 +( + OBJGPU *pGpu, + KernelFsp *pKernelFsp, + NvU8 *pPacket, + NvU32 packetSize +) +{ + NvU32 paddedSize; + NV_STATUS status = NV_OK; + + // Check that queue is ready to receive data + status = kfspPollForCanSend(pGpu, pKernelFsp); + if (status != NV_OK) + { + return NV_ERR_INSUFFICIENT_RESOURCES; + } + + // + // First configure EMEMC, RM always writes 0 to the offset, which is OK + // because RM's channel starts at 0 on GH100 and we always start from the + // beginning for each packet. It should be improved later to use EMEMR to + // properly fetch the lower and higher bounds of the EMEM channel + // + _kfspConfigEmemc_GH100(pGpu, pKernelFsp, 0, NV_TRUE, NV_FALSE); + _kfspWriteToEmem_GH100(pGpu, pKernelFsp, pPacket, packetSize); + + paddedSize = NV_ALIGN_UP(packetSize, sizeof(NvU32)); + // Update HEAD and TAIL with new EMEM offset; RM always starts at offset 0. + // TAIL points to the last DWORD written, so subtract 1 DWORD + _kfspUpdateQueueHeadTail_GH100(pGpu, pKernelFsp, 0, paddedSize - sizeof(NvU32)); + + return status; +} + /*! * @brief Read data to buffer from RM channel in FSP's EMEM * - * @param[in] pGpu OBJGPU pointer - * @param[in] pKernelFsp KernelFsp pointer - * @param[in/out] pBuffer Buffer where we copy data from EMEM - * @param[in] size Size to read in bytes, assumed DWORD aligned + * @param[in] pGpu OBJGPU pointer + * @param[in] pKernelFsp KernelFsp pointer + * @param[in/out] pPacket Buffer where we copy data from EMEM + * @param[in] maxPacketSize Size in bytes of pPacket buffer + * @param[out] bytesRead Size in bytes that was read into the packet buffer * * @return NV_OK */ NV_STATUS -kfspReadFromEmem_GH100 +kfspReadPacket_GH100 ( OBJGPU *pGpu, KernelFsp *pKernelFsp, - NvU8 *pBuffer, - NvU32 size + NvU8 *pPacket, + NvU32 maxPacketSize, + NvU32 *bytesRead ) { NvU32 i, reg32; NvU32 ememOffsetEnd; + NvU32 msgqHead; + NvU32 msgqTail; + NvU32 packetSize; + + // First check that the packet buffer has enough space for the + // packet and that the size is valid. + _kfspGetMsgQueueHeadTail_GH100(pGpu, pKernelFsp, &msgqHead, &msgqTail); + + // Tail points to last DWORD in packet, not DWORD immediately following it + packetSize = (msgqTail - msgqHead) + sizeof(NvU32); + + NV_ASSERT_OR_RETURN((packetSize >= sizeof(NvU32)) && (packetSize <= maxPacketSize), + NV_ERR_INVALID_DATA); // - // First configure EMEMC, RM always writes 0 to the offset, which is OK + // Next configure EMEMC, RM always writes 0 to the offset, which is OK // because RM's channel starts at 0 on GH100 and we always start from the // beginning for each packet. It should be improved later to use EMEMR to // properly fetch the lower and higher bounds of the EMEM channel // - kfspConfigEmemc_HAL(pGpu, pKernelFsp, 0, NV_FALSE, NV_TRUE); + _kfspConfigEmemc_GH100(pGpu, pKernelFsp, 0, NV_FALSE, NV_TRUE); - NV_PRINTF(LEVEL_INFO, "About to read data from FSP, ememcOff=0, size=0x%x\n", size); - if (!NV_IS_ALIGNED(size, sizeof(NvU32))) + NV_PRINTF(LEVEL_INFO, "About to read data from FSP, ememcOff=0, size=0x%x\n", packetSize); + if (!NV_IS_ALIGNED(packetSize, sizeof(NvU32))) { - NV_PRINTF(LEVEL_WARNING, "Size=0x%x is not DWORD-aligned, data will be truncated!\n", size); + NV_PRINTF(LEVEL_WARNING, "Size=0x%x is not DWORD-aligned, data will be truncated!\n", packetSize); } // Now read from EMEMD - for (i = 0; i < (size / 4); i++) + for (i = 0; i < (packetSize / sizeof(NvU32)); i++) { - ((NvU32*)(void*)pBuffer)[i] = GPU_REG_RD32(pGpu, NV_PFSP_EMEMD(FSP_EMEM_CHANNEL_RM)); + ((NvU32 *)(void *)pPacket)[i] = GPU_REG_RD32(pGpu, NV_PFSP_EMEMD(FSP_EMEM_CHANNEL_RM)); } + *bytesRead = packetSize; // Sanity check offset. If this fails, the autoincrement did not work reg32 = GPU_REG_RD32(pGpu, NV_PFSP_EMEMC(FSP_EMEM_CHANNEL_RM)); ememOffsetEnd = DRF_VAL(_PFSP, _EMEMC, _OFFS, reg32); - - // Blocks are 64 DWORDS - ememOffsetEnd += DRF_VAL(_PFSP, _EMEMC, _BLK, reg32) * 64; + ememOffsetEnd += DRF_VAL(_PFSP, _EMEMC, _BLK, reg32) * DWORDS_PER_EMEM_BLOCK; NV_PRINTF(LEVEL_INFO, "After reading data, ememcOff = 0x%x\n", ememOffsetEnd); - NV_ASSERT((ememOffsetEnd) == (size / sizeof(NvU32))); + // Set TAIL = HEAD to indicate CPU received packet + _kfspUpdateMsgQueueHeadTail_GH100(pGpu, pKernelFsp, msgqHead, msgqHead); + + NV_ASSERT_OR_RETURN((ememOffsetEnd) == (packetSize / sizeof(NvU32)), NV_ERR_INVALID_STATE); return NV_OK; } +static NvBool +_kfspWaitBootCond_GH100 +( + OBJGPU *pGpu, + void *pArg +) +{ + // + // In Hopper, Bootfsm triggers FSP execution out of chip reset. + // FSP writes 0xFF value in NV_THERM_I2CS_SCRATCH register after completion of boot + // + return GPU_FLD_TEST_DRF_DEF(pGpu, _THERM_I2CS_SCRATCH, _FSP_BOOT_COMPLETE, _STATUS, _SUCCESS); +} + NV_STATUS kfspWaitForSecureBoot_GH100 ( @@ -613,33 +789,27 @@ kfspWaitForSecureBoot_GH100 // // Polling for FSP boot complete - // In Hopper, Bootfsm triggers FSP execution out of chip reset. - // FSP writes 0xFF value in NV_THERM_I2CS_SCRATCH register after completion of boot // FBFalcon training during devinit alone takes 2 seconds, up to 3 on HBM3, // but the default threadstate timeout on windows is 1800 ms. Increase to 4 seconds // for this wait to match MODS GetGFWBootTimeoutMs. - // For flags, this must not timeout due to aforementioned threadstate timeout, - // and we must not use the GPU TMR since it is inaccessible. + // For flags, we must not use the GPU TMR since it is inaccessible. // gpuSetTimeout(pGpu, NV_MAX(gpuScaleTimeout(pGpu, 4000000), pGpu->timeoutData.defaultus), - &timeout, GPU_TIMEOUT_FLAGS_OSTIMER | GPU_TIMEOUT_FLAGS_BYPASS_THREAD_STATE); + &timeout, GPU_TIMEOUT_FLAGS_OSTIMER); - while(!GPU_FLD_TEST_DRF_DEF(pGpu, _THERM_I2CS_SCRATCH, _FSP_BOOT_COMPLETE, _STATUS, _SUCCESS)) + status = gpuTimeoutCondWait(pGpu, _kfspWaitBootCond_GH100, NULL, &timeout); + + if (status != NV_OK) { - status = gpuCheckTimeout(pGpu, &timeout); - if (status == NV_ERR_TIMEOUT) - { - NV_ERROR_LOG((void*) pGpu, GPU_INIT_ERROR, "Timeout while polling for FSP boot complete, " - "0x%x, 0x%x, 0x%x, 0x%x, 0x%x", - GPU_REG_RD32(pGpu, NV_THERM_I2CS_SCRATCH_FSP_BOOT_COMPLETE), - GPU_REG_RD32(pGpu, NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_2(0)), - GPU_REG_RD32(pGpu, NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_2(1)), - GPU_REG_RD32(pGpu, NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_2(2)), - GPU_REG_RD32(pGpu, NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_2(3))); - break; - } + NV_ERROR_LOG((void*) pGpu, GPU_INIT_ERROR, "Error status 0x%x while polling for FSP boot complete, " + "0x%x, 0x%x, 0x%x, 0x%x, 0x%x", + status, + GPU_REG_RD32(pGpu, NV_THERM_I2CS_SCRATCH_FSP_BOOT_COMPLETE), + GPU_REG_RD32(pGpu, NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_2(0)), + GPU_REG_RD32(pGpu, NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_2(1)), + GPU_REG_RD32(pGpu, NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_2(2)), + GPU_REG_RD32(pGpu, NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_2(3))); } - return status; } diff --git a/src/nvidia/src/kernel/gpu/fsp/kern_fsp.c b/src/nvidia/src/kernel/gpu/fsp/kern_fsp.c index 37d7e6efd3..09882a63f7 100644 --- a/src/nvidia/src/kernel/gpu/fsp/kern_fsp.c +++ b/src/nvidia/src/kernel/gpu/fsp/kern_fsp.c @@ -40,6 +40,17 @@ #endif #define ASYNC_FSP_POLL_PERIOD_MS 50 +// +// FSP communication uses two headers: MCTP per packet and NVDM per message. +// Packet size is based on the underlying transport mechanism which can be +// queried with kfspGetMax[Send,Recv]PacketSize. If a message is larger than +// can fit in a single packet, only the first packet contains the NVDM header +// while all packets contain the MCTP header. Each of these headers is one +// 32-bit DWORD and these indexes are used when placing the DWORD in the packet. +// +#define HEADER_DWORD_MCTP 0 +#define HEADER_DWORD_NVDM 1 +#define HEADER_DWORD_MAX 2 /*! * Local object related functions @@ -58,6 +69,7 @@ static NV_STATUS kfspScheduleAsyncResponseCheck(OBJGPU *pGpu, KernelFsp *pKernel AsyncRpcCallback callback, void *pCallbackArgs, NvU8 *pBuffer, NvU32 bufferSize); static void kfspClearAsyncResponseState(KernelFsp *pKernelFsp); +static void kfspReleaseProxyImage(OBJGPU *pGpu, KernelFsp *pKernelFsp); NV_STATUS kfspConstructEngine_IMPL(OBJGPU *pGpu, KernelFsp *pKernelFsp, ENGDESCRIPTOR engDesc) @@ -145,26 +157,13 @@ kfspInitRegistryOverrides } } - -/*! - * @brief Clean up objects used when sending GSP-FMC and FRTS info to FSP - * - * @param[in] pGpu GPU object pointer - * @param[in] pKernelFsp FSP object pointer - */ -void -kfspCleanupBootState_IMPL +static void +kfspReleaseProxyImage ( OBJGPU *pGpu, KernelFsp *pKernelFsp ) { - OBJTMR *pTmr = GPU_GET_TIMER(pGpu); - tmrEventDestroy(pTmr, pKernelFsp->pPollEvent); - - portMemFree(pKernelFsp->pCotPayload); - pKernelFsp->pCotPayload = NULL; - if (pKernelFsp->pSysmemFrtsMemdesc != NULL) { kfspFrtsSysmemLocationClear_HAL(pGpu, pKernelFsp); @@ -189,6 +188,28 @@ kfspCleanupBootState_IMPL memdescDestroy(pKernelFsp->pGspBootArgsMemdesc); pKernelFsp->pGspBootArgsMemdesc = NULL; } +} + +/*! + * @brief Clean up objects used when sending GSP-FMC and FRTS info to FSP + * + * @param[in] pGpu GPU object pointer + * @param[in] pKernelFsp FSP object pointer + */ +void +kfspCleanupBootState_IMPL +( + OBJGPU *pGpu, + KernelFsp *pKernelFsp +) +{ + OBJTMR *pTmr = GPU_GET_TIMER(pGpu); + tmrEventDestroy(pTmr, pKernelFsp->pPollEvent); + + portMemFree(pKernelFsp->pCotPayload); + pKernelFsp->pCotPayload = NULL; + + kfspReleaseProxyImage(pGpu, pKernelFsp); if (pKernelFsp->bClockBoostSupported) { @@ -202,6 +223,25 @@ kfspCleanupBootState_IMPL } } +/*! + * @brief Unload FSP state + * + * @param[in] pGpu GPU object pointer + * @param[in] pKernelFsp FSP object pointer + * @param[in] flags + */ +NV_STATUS +kfspStateUnload_IMPL +( + OBJGPU *pGpu, + KernelFsp *pKernelFsp, + NvU32 flags +) +{ + kfspReleaseProxyImage(pGpu, pKernelFsp); + return NV_OK; +} + /*! * @brief Destroy FSP state * @@ -226,30 +266,7 @@ kfspStateDestroy_IMPL } /*! - * @brief Check if FSP RM command queue is empty - * - * @param[in] pGpu OBJGPU pointer - * @param[in] pKernelFsp KernelFsp pointer - * - * @return NV_TRUE if queue is empty, NV_FALSE otherwise - */ -NvBool -kfspIsQueueEmpty_IMPL -( - OBJGPU *pGpu, - KernelFsp *pKernelFsp -) -{ - NvU32 cmdqHead, cmdqTail; - - kfspGetQueueHeadTail_HAL(pGpu, pKernelFsp, &cmdqHead, &cmdqTail); - - // FSP will set QUEUE_HEAD = TAIL after each packet is received - return (cmdqHead == cmdqTail); -} - -/*! - * @brief Wait for FSP RM command queue to be empty + * @brief Wait until RM can send to FSP * * @param[in] pGpu OBJGPU pointer * @param[in] pKernelFsp KernelFsp pointer @@ -257,7 +274,7 @@ kfspIsQueueEmpty_IMPL * @return NV_OK, or NV_ERR_TIMEOUT */ NV_STATUS -kfspPollForQueueEmpty_IMPL +kfspPollForCanSend_IMPL ( OBJGPU *pGpu, KernelFsp *pKernelFsp @@ -267,10 +284,9 @@ kfspPollForQueueEmpty_IMPL RMTIMEOUT timeout; gpuSetTimeout(pGpu, GPU_TIMEOUT_DEFAULT, &timeout, - GPU_TIMEOUT_FLAGS_OSTIMER | - GPU_TIMEOUT_FLAGS_BYPASS_THREAD_STATE); + GPU_TIMEOUT_FLAGS_OSTIMER); - while (!kfspIsQueueEmpty(pGpu, pKernelFsp)) + while (!kfspCanSendPacket_HAL(pGpu, pKernelFsp)) { // // For now we assume that any response from FSP before RM message @@ -278,11 +294,11 @@ kfspPollForQueueEmpty_IMPL // // Ongoing dicussion on usefullness of this check. Bug to be filed. // - if (!kfspIsMsgQueueEmpty(pGpu, pKernelFsp)) + if (kfspIsResponseAvailable_HAL(pGpu, pKernelFsp)) { kfspReadMessage(pGpu, pKernelFsp, NULL, 0); NV_PRINTF(LEVEL_ERROR, - "Received error message from FSP while waiting for CMDQ to be empty.\n"); + "Received error message from FSP while waiting to send.\n"); status = NV_ERR_GENERIC; break; } @@ -293,7 +309,7 @@ kfspPollForQueueEmpty_IMPL if (status != NV_OK) { if ((status == NV_ERR_TIMEOUT) && - kfspIsQueueEmpty(pGpu, pKernelFsp)) + kfspCanSendPacket_HAL(pGpu, pKernelFsp)) { status = NV_OK; } @@ -310,28 +326,7 @@ kfspPollForQueueEmpty_IMPL } /*! - * @brief Check if FSP RM message queue is empty - * - * @param[in] pGpu OBJGPU pointer - * @param[in] pKernelFsp KernelFsp pointer - * - * @return NV_TRUE if queue is empty, NV_FALSE otherwise - */ -NvBool -kfspIsMsgQueueEmpty_IMPL -( - OBJGPU *pGpu, - KernelFsp *pKernelFsp -) -{ - NvU32 msgqHead, msgqTail; - - kfspGetMsgQueueHeadTail_HAL(pGpu, pKernelFsp, &msgqHead, &msgqTail); - return (msgqHead == msgqTail); -} - -/*! - * @brief Poll for response from FSP via RM message queue + * @brief Poll for response from FSP * * @param[in] pGpu OBJGPU pointer * @param[in] pKernelFsp KernelFsp pointer @@ -367,7 +362,7 @@ kfspWaitForResponse NV_STATUS status = NV_OK; // Poll for message queue to wait for FSP's reply - while (kfspIsMsgQueueEmpty(pGpu, pKernelFsp)) + while (!kfspIsResponseAvailable_HAL(pGpu, pKernelFsp)) { osSpinLoop(); @@ -375,7 +370,7 @@ kfspWaitForResponse if (status != NV_OK) { if ((status == NV_ERR_TIMEOUT) && - !kfspIsMsgQueueEmpty(pGpu, pKernelFsp)) + kfspIsResponseAvailable_HAL(pGpu, pKernelFsp)) { status = NV_OK; } @@ -404,7 +399,7 @@ kfspSetResponseTimeout ) { gpuSetTimeout(pGpu, GPU_TIMEOUT_DEFAULT, &(pKernelFsp->rpcTimeout), - GPU_TIMEOUT_FLAGS_OSTIMER | GPU_TIMEOUT_FLAGS_BYPASS_THREAD_STATE); + GPU_TIMEOUT_FLAGS_OSTIMER); } /*! @@ -446,42 +441,42 @@ kfspSendMessage NvU32 nvdmType ) { - NvU32 dataSent, dataRemaining; + NvU32 dataSent; + NvU32 dataRemaining; NvU32 packetPayloadCapacity; NvU32 curPayloadSize; NvU32 headerSize; - NvU32 fspEmemRmChannelSize; + NvU32 *pHeader; + NvU32 maxPacketSize; NvBool bSinglePacket; NV_STATUS status; NvU8 *pBuffer = NULL; - NvU8 seq = 0; - NvU8 seid = 0; - - // Allocate buffer of same size as channel - fspEmemRmChannelSize = kfspGetRmChannelSize_HAL(pGpu, pKernelFsp); - pBuffer = portMemAllocNonPaged(fspEmemRmChannelSize); - NV_CHECK_OR_RETURN(LEVEL_ERROR, pBuffer != NULL, NV_ERR_NO_MEMORY); - portMemSet(pBuffer, 0, fspEmemRmChannelSize); + NvU8 seq = 0; + NvU8 seid = 0; // // Check if message will fit in single packet // We lose 2 DWORDS to MCTP and NVDM headers // - headerSize = 2 * sizeof(NvU32); - packetPayloadCapacity = fspEmemRmChannelSize - headerSize; + headerSize = sizeof(NvU32) * HEADER_DWORD_MAX; + maxPacketSize = kfspGetMaxSendPacketSize_HAL(pGpu, pKernelFsp); + packetPayloadCapacity = maxPacketSize - headerSize; bSinglePacket = (size <= packetPayloadCapacity); - + // Allocate buffer to hold a full packet + pBuffer = portMemAllocNonPaged(maxPacketSize); + NV_CHECK_OR_RETURN(LEVEL_ERROR, pBuffer != NULL, NV_ERR_NO_MEMORY); + portMemSet(pBuffer, 0, maxPacketSize); + pHeader = (NvU32*)pBuffer; // First packet seid = kfspNvdmToSeid_HAL(pGpu, pKernelFsp, nvdmType); // SOM=1,EOM=?,SEID,SEQ=0 - ((NvU32 *)pBuffer)[0] = kfspCreateMctpHeader_HAL(pGpu, pKernelFsp, 1, + pHeader[HEADER_DWORD_MCTP] = kfspCreateMctpHeader_HAL(pGpu, pKernelFsp, 1, (NvU8)bSinglePacket, seid, seq); - ((NvU32 *)pBuffer)[1] = kfspCreateNvdmHeader_HAL(pGpu, pKernelFsp, nvdmType); + pHeader[HEADER_DWORD_NVDM] = kfspCreateNvdmHeader_HAL(pGpu, pKernelFsp, nvdmType); curPayloadSize = NV_MIN(size, packetPayloadCapacity); portMemCopy(pBuffer + headerSize, packetPayloadCapacity, pPayload, curPayloadSize); - - status = kfspSendPacket(pGpu, pKernelFsp, pBuffer, curPayloadSize + headerSize); + status = kfspSendPacket_HAL(pGpu, pKernelFsp, pBuffer, curPayloadSize + headerSize); if (status != NV_OK) { goto failed; @@ -493,22 +488,20 @@ kfspSendMessage dataSent = curPayloadSize; dataRemaining = size - dataSent; headerSize = sizeof(NvU32); // No longer need NVDM header - packetPayloadCapacity = fspEmemRmChannelSize - headerSize; + packetPayloadCapacity = maxPacketSize - headerSize; while (dataRemaining > 0) { NvBool bLastPacket = (dataRemaining <= packetPayloadCapacity); curPayloadSize = (bLastPacket) ? dataRemaining : packetPayloadCapacity; - portMemSet(pBuffer, 0, fspEmemRmChannelSize); - ((NvU32 *)pBuffer)[0] = kfspCreateMctpHeader_HAL(pGpu, pKernelFsp, 0, + pHeader[HEADER_DWORD_MCTP] = kfspCreateMctpHeader_HAL(pGpu, pKernelFsp, 0, (NvU8)bLastPacket, seid, (++seq) % 4); - portMemCopy(pBuffer + headerSize, packetPayloadCapacity, pPayload + dataSent, curPayloadSize); - status = kfspSendPacket(pGpu, pKernelFsp, pBuffer, curPayloadSize + headerSize); + status = kfspSendPacket_HAL(pGpu, pKernelFsp, pBuffer, curPayloadSize + headerSize); if (status != NV_OK) { goto failed; @@ -517,7 +510,6 @@ kfspSendMessage dataSent += curPayloadSize; dataRemaining -= curPayloadSize; } - } failed: @@ -557,20 +549,21 @@ kfspReadMessage NvU8 *pPacketBuffer; NV_STATUS status; NvU32 totalPayloadSize = 0; + NvU32 recvBufferSize; MCTP_PACKET_STATE packetState = MCTP_PACKET_STATE_START; - if (kfspIsMsgQueueEmpty(pGpu, pKernelFsp)) + if (!kfspIsResponseAvailable_HAL(pGpu, pKernelFsp)) { - NV_PRINTF(LEVEL_WARNING, "Tried to read FSP response but MSG queue is empty\n"); + NV_PRINTF(LEVEL_WARNING, "Tried to read FSP response but none is available\n"); return NV_OK; } - pPacketBuffer = portMemAllocNonPaged(kfspGetRmChannelSize_HAL(pGpu, pKernelFsp)); + recvBufferSize = kfspGetMaxRecvPacketSize(pGpu, pKernelFsp); + pPacketBuffer = portMemAllocNonPaged(recvBufferSize); NV_CHECK_OR_RETURN(LEVEL_ERROR, pPacketBuffer != NULL, NV_ERR_NO_MEMORY); while ((packetState != MCTP_PACKET_STATE_END) && (packetState != MCTP_PACKET_STATE_SINGLE_PACKET)) { - NvU32 msgqHead, msgqTail; NvU32 packetSize; NvU32 curPayloadSize; NvU8 curHeaderSize; @@ -583,20 +576,9 @@ kfspReadMessage goto done; } - kfspGetMsgQueueHeadTail_HAL(pGpu, pKernelFsp, &msgqHead, &msgqTail); - - // Tail points to last DWORD in packet, not DWORD immediately following it - packetSize = (msgqTail - msgqHead) + sizeof(NvU32); - - if ((packetSize < sizeof(NvU32)) || - (packetSize > kfspGetRmChannelSize_HAL(pGpu, pKernelFsp))) - { - NV_PRINTF(LEVEL_ERROR, "FSP response packet is invalid size: size=0x%x bytes\n", packetSize); - status = NV_ERR_INVALID_DATA; - goto done; - } - - kfspReadFromEmem_HAL(pGpu, pKernelFsp, pPacketBuffer, packetSize); + NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, + kfspReadPacket_HAL(pGpu, pKernelFsp, pPacketBuffer, recvBufferSize, &packetSize), + done); status = kfspGetPacketInfo_HAL(pGpu, pKernelFsp, pPacketBuffer, packetSize, &packetState, &tag); if (status != NV_OK) @@ -632,13 +614,10 @@ kfspReadMessage status = NV_ERR_INSUFFICIENT_RESOURCES; goto done; } - portMemCopy(pPayloadBuffer + totalPayloadSize, payloadBufferSize - totalPayloadSize , + portMemCopy(pPayloadBuffer + totalPayloadSize, payloadBufferSize - totalPayloadSize, pPacketBuffer + curHeaderSize, curPayloadSize); } totalPayloadSize += curPayloadSize; - - // Set TAIL = HEAD to indicate CPU received message - kfspUpdateMsgQueueHeadTail_HAL(pGpu, pKernelFsp, msgqHead, msgqHead); } NvU8 *pMessagePayload = (pPayloadBuffer == NULL) ? (pPacketBuffer + sizeof(MCTP_HEADER)) : pPayloadBuffer; @@ -651,53 +630,7 @@ kfspReadMessage } /*! - * @brief Send one MCTP packet to FSP via EMEM - * - * @param[in] pGpu OBJGPU pointer - * @param[in] pKernelFsp KernelFsp pointer - * @param[in] pPacket MCTP packet - * @param[in] packetSize MCTP packet size in bytes - * - * @return NV_OK, or NV_ERR_INSUFFICIENT_RESOURCES - */ -NV_STATUS -kfspSendPacket_IMPL -( - OBJGPU *pGpu, - KernelFsp *pKernelFsp, - NvU8 *pPacket, - NvU32 packetSize -) -{ - NvU32 paddedSize; - NvU8 *pBuffer = NULL; - NV_STATUS status = NV_OK; - - // Check that queue is ready to receive data - status = kfspPollForQueueEmpty(pGpu, pKernelFsp); - if (status != NV_OK) - { - return NV_ERR_INSUFFICIENT_RESOURCES; - } - - // Pad to align size to 4-bytes boundary since EMEMC increments by DWORDS - paddedSize = NV_ALIGN_UP(packetSize, sizeof(NvU32)); - pBuffer = portMemAllocNonPaged(paddedSize); - NV_CHECK_OR_RETURN(LEVEL_ERROR, pBuffer != NULL, NV_ERR_NO_MEMORY); - portMemSet(pBuffer, 0, paddedSize); - portMemCopy(pBuffer, paddedSize, pPacket, paddedSize); - - kfspWriteToEmem_HAL(pGpu, pKernelFsp, pBuffer, paddedSize); - - // Update HEAD and TAIL with new EMEM offset; RM always starts at offset 0. - kfspUpdateQueueHeadTail_HAL(pGpu, pKernelFsp, 0, paddedSize - sizeof(NvU32)); - - portMemFree(pBuffer); - return status; -} - -/*! - * @brief Send a MCTP message to FSP via EMEM, and read response + * @brief Send a MCTP message to FSP and read response * * * Response payload buffer is optional if response fits in a single packet. @@ -840,7 +773,7 @@ kfspPollForAsyncResponse status = kfspCheckResponseTimeout(pGpu, pKernelFsp); - if (!kfspIsMsgQueueEmpty(pGpu, pKernelFsp)) + if (kfspIsResponseAvailable_HAL(pGpu, pKernelFsp)) { status = osQueueWorkItemWithFlags(pGpu, kfspProcessAsyncResponseCallback, NULL, OS_QUEUE_WORKITEM_FLAGS_LOCK_SEMA | diff --git a/src/nvidia/src/kernel/gpu/gpu.c b/src/nvidia/src/kernel/gpu/gpu.c index 2cda021678..b3b249276b 100644 --- a/src/nvidia/src/kernel/gpu/gpu.c +++ b/src/nvidia/src/kernel/gpu/gpu.c @@ -128,6 +128,7 @@ static void _gpuInitPciHandle(OBJGPU *pGpu); static void _gpuInitPhysicalRmApi(OBJGPU *pGpu); static NV_STATUS _gpuAllocateInternalObjects(OBJGPU *pGpu); static void _gpuFreeInternalObjects(OBJGPU *pGpu); +static NV_STATUS _gpuSetResetRequiredState(OBJGPU *pGpu, NvBool newState); typedef struct { @@ -138,7 +139,7 @@ typedef struct } ENGLIST_ITER, *PENGLIST_ITER; static ENGLIST_ITER gpuGetEngineOrderListIter(OBJGPU *pGpu, NvU32 flags); -static NvBool gpuGetNextInEngineOrderList(OBJGPU *pGpu, ENGLIST_ITER *pIt, PENGDESCRIPTOR pEngDesc); +static NvBool gpuGetNextInEngineOrderList(OBJGPU *pGpu, ENGLIST_ITER *pIt, ENGDESCRIPTOR *pEngDesc); static inline void _setPlatformNoHostbridgeDetect(NvBool bValue) { @@ -312,7 +313,7 @@ gpuPostConstruct_IMPL GPUATTACHARG *pAttachArg ) { - NV_STATUS rmStatus; + NV_STATUS rmStatus; NvU32 config = 0; gpumgrAddDeviceInstanceToGpus(NVBIT(pGpu->gpuInstance)); @@ -415,6 +416,8 @@ gpuPostConstruct_IMPL pGpu->setProperty(pGpu, PDB_PROP_GPU_IS_VIRTUALIZATION_MODE_HOST_VGPU, NV_TRUE); } + gpuApplySchedulerPolicy(pGpu); + // create core objects (i.e. bif) rmStatus = gpuCreateChildObjects(pGpu, /* bConstructEarly */ NV_TRUE); if (rmStatus != NV_OK) @@ -527,6 +530,10 @@ gpuPostConstruct_IMPL // Initialize reference count for external kernel clients pGpu->externalKernelClientCount = 0; + // Initialize the GPU recovery action, if the OS is already in a bad state. + pGpu->currentRecoveryAction = GPU_RECOVERY_ACTION_UNKNOWN; + gpuRefreshRecoveryAction_KERNEL(pGpu, NV_TRUE); + return NV_OK; } @@ -707,7 +714,8 @@ static NV_STATUS _gpuRmApiControl else { RM_API *pInternalRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); - NV_ASSERT_OR_RETURN(rmDeviceGpuLockIsOwner(pGpu->gpuInstance), NV_ERR_INVALID_LOCK_STATE); + NV_ASSERT_OR_RETURN(rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); status = pInternalRmApi->Control(pInternalRmApi, hClient, hObject, cmd, pParams, paramsSize); } @@ -968,7 +976,7 @@ _gpuCreateEngineOrderList PGPU_ENGINE_ORDER pEngineOrder = &pGpu->engineOrder; NvU32 numEngineDesc, curEngineDesc; NvU32 listTypes[] = {GCO_LIST_INIT, GCO_LIST_LOAD, GCO_LIST_UNLOAD, GCO_LIST_DESTROY}; - PENGDESCRIPTOR *ppEngDescriptors[4]; + ENGDESCRIPTOR **ppEngDescriptors[4]; ENGLIST_ITER it; ENGDESCRIPTOR engDesc; @@ -1254,7 +1262,7 @@ gpuGetNextChildOfTypeUnsafe_IMPL * @param[in] pGpu OBJGPU pointer * @param[in] engDesc ENGDESCRIPTOR */ -POBJHOSTENG +OBJHOSTENG * gpuGetHosteng_IMPL(OBJGPU *pGpu, ENGDESCRIPTOR engDesc) { OBJENGSTATE *pEngstate = gpuGetEngstate(pGpu, engDesc); @@ -1590,16 +1598,16 @@ gpuRemoveMissingEngines ) { NvU32 curEngDescIdx; - PENGDESCRIPTOR engDescriptorList = gpuGetInitEngineDescriptors(pGpu); - NvU32 numEngDescriptors = gpuGetNumEngDescriptors(pGpu); - NV_STATUS rmStatus = NV_OK; + ENGDESCRIPTOR *pEngDescriptorList = gpuGetInitEngineDescriptors(pGpu); + NvU32 numEngDescriptors = gpuGetNumEngDescriptors(pGpu); + NV_STATUS rmStatus = NV_OK; NvU32 curClassDescIdx; // Order is determined by gpuGetChildrenOrder_HAL pulling gpuChildOrderList array for (curEngDescIdx = 0; curEngDescIdx < numEngDescriptors; curEngDescIdx++) { OBJENGSTATE *pEngstate; - ENGDESCRIPTOR curEngDescriptor = engDescriptorList[curEngDescIdx]; + ENGDESCRIPTOR curEngDescriptor = pEngDescriptorList[curEngDescIdx]; NVOC_CLASS_ID curClassId = ENGDESC_FIELD(curEngDescriptor, _CLASS); if (curClassId == classId(OBJINVALID)) @@ -1759,7 +1767,7 @@ gpuIsEngDescSupported_IMPL ) { NvU32 numEngDescriptors = gpuGetNumEngDescriptors(pGpu); - PENGDESCRIPTOR pEngDescriptor = gpuGetInitEngineDescriptors(pGpu); + ENGDESCRIPTOR *pEngDescriptor = gpuGetInitEngineDescriptors(pGpu); NvU32 counter = 0; NvBool engDescriptorFound = NV_FALSE; @@ -1787,7 +1795,7 @@ gpuIsEngDescSupported_IMPL * @returns void */ static void -gpuMissingEngDescriptor(PENGDESCRIPTOR pEngDescriptor, NvU32 maxDescriptors, +gpuMissingEngDescriptor(ENGDESCRIPTOR *pEngDescriptor, NvU32 maxDescriptors, ENGDESCRIPTOR descriptor) { NvU32 counter; @@ -1820,7 +1828,7 @@ gpuMissingEngDescriptor(PENGDESCRIPTOR pEngDescriptor, NvU32 maxDescriptors, NV_STATUS gpuDeleteEngineFromClassDB_IMPL(OBJGPU *pGpu, NvU32 engDesc) { - PENGDESCRIPTOR pEngDesc = NULL; + ENGDESCRIPTOR *pEngDesc = NULL; NvU32 numEngDescriptors = gpuGetNumEngDescriptors(pGpu); NvU32 engDescriptor = engDesc; @@ -1880,7 +1888,7 @@ gpuDeleteEngineFromClassDB_IMPL(OBJGPU *pGpu, NvU32 engDesc) NV_STATUS gpuDeleteEngineOnPreInit_IMPL(OBJGPU *pGpu, NvU32 engDesc) { - PENGDESCRIPTOR pEngDesc = NULL; + ENGDESCRIPTOR *pEngDesc = NULL; NvU32 numEngDescriptors = gpuGetNumEngDescriptors(pGpu); ENGDESCRIPTOR engDescriptor = engDesc; NV_STATUS rmStatus = NV_OK; @@ -1950,9 +1958,6 @@ gpuStatePreInit_IMPL OBJGPU *pGpu ) { - PENGDESCRIPTOR engDescriptorList; - NvU32 numEngDescriptors; - NvU32 curEngDescIdx; NV_STATUS rmStatus = NV_OK; // @@ -1982,7 +1987,7 @@ gpuStatePreInit_IMPL // gpuDetermineSelfHostedMode_HAL(pGpu); - LOCK_ASSERT_AND_RETURN(rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_ASSERT_OK_OR_RETURN(_gpuAllocateInternalObjects(pGpu)); NV_ASSERT_OK_OR_RETURN(_gpuInitChipInfo(pGpu)); @@ -2002,15 +2007,16 @@ gpuStatePreInit_IMPL pGpu->bFullyConstructed = NV_TRUE; - engDescriptorList = gpuGetInitEngineDescriptors(pGpu); - numEngDescriptors = gpuGetNumEngDescriptors(pGpu); + ENGDESCRIPTOR *pEngDescriptorList = gpuGetInitEngineDescriptors(pGpu); + NvU32 numEngDescriptors = gpuGetNumEngDescriptors(pGpu); + NvU32 curEngDescIdx; // Order is determined by gpuGetChildrenOrder_HAL pulling gpuChildOrderList array for (curEngDescIdx = 0; curEngDescIdx < numEngDescriptors; curEngDescIdx++) { ENGSTATE_TRANSITION_DATA engTransitionData; - ENGDESCRIPTOR curEngDescriptor = engDescriptorList[curEngDescIdx]; - OBJENGSTATE *pEngstate = gpuGetEngstate(pGpu, curEngDescriptor); + ENGDESCRIPTOR curEngDescriptor = pEngDescriptorList[curEngDescIdx]; + OBJENGSTATE *pEngstate = gpuGetEngstate(pGpu, curEngDescriptor); if (pEngstate == NULL) { @@ -2088,10 +2094,7 @@ gpuStateInit_IMPL OBJGPU *pGpu ) { - PENGDESCRIPTOR engDescriptorList; - NvU32 numEngDescriptors; - NvU32 curEngDescIdx; - NV_STATUS rmStatus = NV_OK; + NV_STATUS rmStatus = NV_OK; // Initialize numaNodeId to invalid node ID as "0" can be considered valid node pGpu->numaNodeId = NV0000_CTRL_NO_NUMA_NODE; @@ -2101,10 +2104,7 @@ gpuStateInit_IMPL // DO NOT ADD MORE SPECIAL CASES HERE! //!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - engDescriptorList = gpuGetInitEngineDescriptors(pGpu); - numEngDescriptors = gpuGetNumEngDescriptors(pGpu); - - LOCK_ASSERT_AND_RETURN(rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_ASSERT_OK_OR_GOTO(rmStatus, gpuStateInitStartedSatisfy_HAL(pGpu, pGpu->pPrereqTracker), @@ -2115,12 +2115,16 @@ gpuStateInit_IMPL // DO NOT ADD MORE SPECIAL CASES HERE! //!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! + ENGDESCRIPTOR *pEngDescriptorList = gpuGetInitEngineDescriptors(pGpu); + NvU32 numEngDescriptors = gpuGetNumEngDescriptors(pGpu); + NvU32 curEngDescIdx; + // Order is determined by gpuGetChildrenOrder_HAL pulling gpuChildOrderList array for (curEngDescIdx = 0; curEngDescIdx < numEngDescriptors; curEngDescIdx++) { ENGSTATE_TRANSITION_DATA engTransitionData; - ENGDESCRIPTOR curEngDescriptor = engDescriptorList[curEngDescIdx]; - OBJENGSTATE *pEngstate = gpuGetEngstate(pGpu, curEngDescriptor); + ENGDESCRIPTOR curEngDescriptor = pEngDescriptorList[curEngDescIdx]; + OBJENGSTATE *pEngstate = gpuGetEngstate(pGpu, curEngDescriptor); if (pEngstate == NULL) { @@ -2197,19 +2201,16 @@ gpuStatePreLoad NvU32 flags ) { - PENGDESCRIPTOR engDescriptorList; - NvU32 numEngDescriptors; + NV_STATUS rmStatus = NV_OK; + ENGDESCRIPTOR *pEngDescriptorList = gpuGetLoadEngineDescriptors(pGpu); + NvU32 numEngDescriptors = gpuGetNumEngDescriptors(pGpu); NvU32 curEngDescIdx; - NV_STATUS rmStatus = NV_OK; - - engDescriptorList = gpuGetLoadEngineDescriptors(pGpu); - numEngDescriptors = gpuGetNumEngDescriptors(pGpu); // Order is determined by gpuGetChildrenOrder_HAL pulling gpuChildOrderList array for (curEngDescIdx = 0; curEngDescIdx < numEngDescriptors; curEngDescIdx++) { ENGSTATE_TRANSITION_DATA engTransitionData; - ENGDESCRIPTOR curEngDescriptor = engDescriptorList[curEngDescIdx]; + ENGDESCRIPTOR curEngDescriptor = pEngDescriptorList[curEngDescIdx]; OBJENGSTATE *pEngstate = gpuGetEngstate(pGpu, curEngDescriptor); if (pEngstate == NULL) @@ -2263,9 +2264,6 @@ gpuStateLoad_IMPL NvU32 flags ) { - PENGDESCRIPTOR engDescriptorList; - NvU32 numEngDescriptors; - NvU32 curEngDescIdx; NV_STATUS rmStatus = NV_OK; NvU32 status = NV_OK; @@ -2327,8 +2325,9 @@ gpuStateLoad_IMPL return rmStatus; } - engDescriptorList = gpuGetLoadEngineDescriptors(pGpu); - numEngDescriptors = gpuGetNumEngDescriptors(pGpu); + ENGDESCRIPTOR *pEngDescriptorList = gpuGetLoadEngineDescriptors(pGpu); + NvU32 numEngDescriptors = gpuGetNumEngDescriptors(pGpu); + NvU32 curEngDescIdx; // Set indicator that we are running state load pGpu->bStateLoading = NV_TRUE; @@ -2337,7 +2336,7 @@ gpuStateLoad_IMPL for (curEngDescIdx = 0; curEngDescIdx < numEngDescriptors; curEngDescIdx++) { ENGSTATE_TRANSITION_DATA engTransitionData; - ENGDESCRIPTOR curEngDescriptor = engDescriptorList[curEngDescIdx]; + ENGDESCRIPTOR curEngDescriptor = pEngDescriptorList[curEngDescIdx]; OBJENGSTATE *pEngstate = gpuGetEngstate(pGpu, curEngDescriptor); if (pEngstate == NULL) @@ -2755,9 +2754,6 @@ gpuStatePostLoad NvU32 flags ) { - PENGDESCRIPTOR engDescriptorList; - NvU32 numEngDescriptors; - NvU32 curEngDescIdx; NV_STATUS rmStatus = NV_OK; #if RMCFG_FEATURE_SLINEXT && defined(DEBUG) NvU32 numPoweredOn = 0; @@ -2770,15 +2766,16 @@ gpuStatePostLoad NV_ASSERT(gpumgrGetSubDeviceCountFromGpu(pGpu) == numPoweredOn); #endif - engDescriptorList = gpuGetLoadEngineDescriptors(pGpu); - numEngDescriptors = gpuGetNumEngDescriptors(pGpu); + ENGDESCRIPTOR *pEngDescriptorList = gpuGetLoadEngineDescriptors(pGpu); + NvU32 numEngDescriptors = gpuGetNumEngDescriptors(pGpu); + NvU32 curEngDescIdx; // Order is determined by gpuGetChildrenOrder_HAL pulling gpuChildOrderList array for (curEngDescIdx = 0; curEngDescIdx < numEngDescriptors; curEngDescIdx++) { ENGSTATE_TRANSITION_DATA engTransitionData; - ENGDESCRIPTOR curEngDescriptor = engDescriptorList[curEngDescIdx]; - OBJENGSTATE *pEngstate = gpuGetEngstate(pGpu, curEngDescriptor); + ENGDESCRIPTOR curEngDescriptor = pEngDescriptorList[curEngDescIdx]; + OBJENGSTATE *pEngstate = gpuGetEngstate(pGpu, curEngDescriptor); if (pEngstate == NULL) { @@ -2899,9 +2896,6 @@ gpuStatePreUnload NvU32 flags ) { - PENGDESCRIPTOR engDescriptorList; - NvU32 numEngDescriptors; - NvU32 curEngDescIdx; NV_STATUS rmStatus = NV_OK; rmapiControlCacheFreeAllCacheForGpu(pGpu->gpuInstance); @@ -2914,15 +2908,16 @@ gpuStatePreUnload portMemFree(pGpu->boardInfo); pGpu->boardInfo = NULL; - engDescriptorList = gpuGetUnloadEngineDescriptors(pGpu); - numEngDescriptors = gpuGetNumEngDescriptors(pGpu); + ENGDESCRIPTOR *pEngDescriptorList = gpuGetUnloadEngineDescriptors(pGpu); + NvU32 numEngDescriptors = gpuGetNumEngDescriptors(pGpu); + NvU32 curEngDescIdx; // Order is determined by gpuGetChildrenOrder_HAL pulling gpuChildOrderList array for (curEngDescIdx = 0; curEngDescIdx < numEngDescriptors; curEngDescIdx++) { ENGSTATE_TRANSITION_DATA engTransitionData; - ENGDESCRIPTOR curEngDescriptor = engDescriptorList[curEngDescIdx]; - OBJENGSTATE *pEngstate = gpuGetEngstate(pGpu, curEngDescriptor); + ENGDESCRIPTOR curEngDescriptor = pEngDescriptorList[curEngDescIdx]; + OBJENGSTATE *pEngstate = gpuGetEngstate(pGpu, curEngDescriptor); if (pEngstate == NULL) { @@ -2995,10 +2990,6 @@ gpuStateUnload_IMPL NvU32 flags ) { - PENGDESCRIPTOR engDescriptorList; - NvU32 numEngDescriptors; - NvU32 curEngDescIdx; - OBJENGSTATE *pEngstate; NV_STATUS rmStatus = NV_OK; NV_STATUS fatalErrorStatus = NV_OK; @@ -3017,16 +3008,16 @@ gpuStateUnload_IMPL gpuFreeVideoLogging(pGpu); - engDescriptorList = gpuGetUnloadEngineDescriptors(pGpu); - numEngDescriptors = gpuGetNumEngDescriptors(pGpu); + ENGDESCRIPTOR *pEngDescriptorList = gpuGetUnloadEngineDescriptors(pGpu); + NvU32 numEngDescriptors = gpuGetNumEngDescriptors(pGpu); + NvU32 curEngDescIdx; // Order is determined by gpuGetChildrenOrder_HAL pulling gpuChildOrderList array for (curEngDescIdx = 0; curEngDescIdx < numEngDescriptors; curEngDescIdx++) { ENGSTATE_TRANSITION_DATA engTransitionData; - ENGDESCRIPTOR curEngDescriptor = engDescriptorList[curEngDescIdx]; - - pEngstate = gpuGetEngstate(pGpu, curEngDescriptor); + ENGDESCRIPTOR curEngDescriptor = pEngDescriptorList[curEngDescIdx]; + OBJENGSTATE *pEngstate = gpuGetEngstate(pGpu, curEngDescriptor); if (pEngstate == NULL) { @@ -3140,22 +3131,18 @@ gpuStatePostUnload NvU32 flags ) { - PENGDESCRIPTOR engDescriptorList; - NvU32 numEngDescriptors; - NvU32 curEngDescIdx; - OBJENGSTATE *pEngstate; - NV_STATUS rmStatus = NV_OK; + NV_STATUS rmStatus = NV_OK; - engDescriptorList = gpuGetUnloadEngineDescriptors(pGpu); - numEngDescriptors = gpuGetNumEngDescriptors(pGpu); + ENGDESCRIPTOR *pEngDescriptorList = gpuGetUnloadEngineDescriptors(pGpu); + NvU32 numEngDescriptors = gpuGetNumEngDescriptors(pGpu); + NvU32 curEngDescIdx; // Order is determined by gpuGetChildrenOrder_HAL pulling gpuChildOrderList array for (curEngDescIdx = 0; curEngDescIdx < numEngDescriptors; curEngDescIdx++) { ENGSTATE_TRANSITION_DATA engTransitionData; - ENGDESCRIPTOR curEngDescriptor = engDescriptorList[curEngDescIdx]; - - pEngstate = gpuGetEngstate(pGpu, curEngDescriptor); + ENGDESCRIPTOR curEngDescriptor = pEngDescriptorList[curEngDescIdx]; + OBJENGSTATE *pEngstate = gpuGetEngstate(pGpu, curEngDescriptor); if (pEngstate == NULL) { @@ -3210,25 +3197,21 @@ gpuStateDestroy_IMPL OBJGPU *pGpu ) { - PENGDESCRIPTOR engDescriptorList; - NvU32 numEngDescriptors; - NvU32 curEngDescIdx; - OBJENGSTATE *pEngstate; NV_STATUS rmStatus = NV_OK; - engDescriptorList = gpuGetDestroyEngineDescriptors(pGpu); - numEngDescriptors = gpuGetNumEngDescriptors(pGpu); - // remove all video event bind points before destroying gsp engine state below videoRemoveAllBindpointsForGpu(pGpu); + ENGDESCRIPTOR *pEngDescriptorList = gpuGetDestroyEngineDescriptors(pGpu); + NvU32 numEngDescriptors = gpuGetNumEngDescriptors(pGpu); + NvU32 curEngDescIdx; + // Order is determined by gpuGetChildrenOrder_HAL pulling gpuChildOrderList array for (curEngDescIdx = 0; curEngDescIdx < numEngDescriptors; curEngDescIdx++) { ENGSTATE_TRANSITION_DATA engTransitionData; - ENGDESCRIPTOR curEngDescriptor = engDescriptorList[curEngDescIdx]; - - pEngstate = gpuGetEngstate(pGpu, curEngDescriptor); + ENGDESCRIPTOR curEngDescriptor = pEngDescriptorList[curEngDescIdx]; + OBJENGSTATE *pEngstate = gpuGetEngstate(pGpu, curEngDescriptor); if (pEngstate == NULL) { @@ -3256,7 +3239,8 @@ gpuStateDestroy_IMPL if (IS_GSP_CLIENT(pGpu)) { KernelGsp *pKernelGsp = GPU_GET_KERNEL_GSP(pGpu); - rmStatus = kgspUnloadRm(pGpu, pKernelGsp); + rmStatus = kgspUnloadRm(pGpu, pKernelGsp, + KGSP_UNLOAD_MODE_NORMAL, NV2080_CTRL_GPU_SET_POWER_STATE_GPU_LEVEL_0); } //!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! @@ -3995,7 +3979,6 @@ static const EXTERN_TO_INTERNAL_ENGINE_ID rmClientEngineTable[] = { RM_ENGINE_TYPE_COPY7, classId(OBJCE) , 7, NV_TRUE }, { RM_ENGINE_TYPE_COPY8, classId(OBJCE) , 8, NV_TRUE }, { RM_ENGINE_TYPE_COPY9, classId(OBJCE) , 9, NV_TRUE }, -// removal tracking bug: 3748354 { RM_ENGINE_TYPE_COPY10, classId(OBJCE) , 10, NV_TRUE }, { RM_ENGINE_TYPE_COPY11, classId(OBJCE) , 11, NV_TRUE }, { RM_ENGINE_TYPE_COPY12, classId(OBJCE) , 12, NV_TRUE }, @@ -4029,7 +4012,6 @@ static const EXTERN_TO_INTERNAL_ENGINE_ID rmClientEngineTable[] = { RM_ENGINE_TYPE_NVJPEG6, classId(OBJNVJPG) , 6, NV_TRUE }, { RM_ENGINE_TYPE_NVJPEG7, classId(OBJNVJPG) , 7, NV_TRUE }, { RM_ENGINE_TYPE_OFA0, classId(OBJOFA) , 0, NV_TRUE }, -// removal tracking bug: 3748354 { RM_ENGINE_TYPE_OFA1, classId(OBJOFA) , 1, NV_TRUE }, { RM_ENGINE_TYPE_DPU, classId(OBJDPU) , 0, NV_FALSE }, { RM_ENGINE_TYPE_PMU, classId(Pmu) , 0, NV_FALSE }, @@ -4284,6 +4266,18 @@ gpuGetGidInfo_IMPL return rmStatus; } +static void +_gpuSetDisconnectedPropertiesWorker +( + NvU32 gpuInstance, + void *pArg +) +{ + OBJGPU *pGpu = gpumgrGetGpu(gpuInstance); + + gpuRefreshRecoveryAction_HAL(pGpu, NV_FALSE); +} + void gpuSetDisconnectedProperties_IMPL ( @@ -4298,6 +4292,15 @@ gpuSetDisconnectedProperties_IMPL pGpu->setProperty(pGpu, PDB_PROP_GPU_IN_HIBERNATE, NV_FALSE); SET_GPU_GC6_STATE(pGpu, GPU_GC6_STATE_POWERED_ON); + // + // Queue a work item to refresh recovery action, as + // gpuSetDisconnectedProperties can be called at raised (device) IRQL. + // + NV_ASSERT_OK(osQueueWorkItemWithFlags(pGpu, + _gpuSetDisconnectedPropertiesWorker, + NULL, + OS_QUEUE_WORKITEM_FLAGS_FALLBACK_TO_DPC + | OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_DEVICE)); } /*! @@ -4834,7 +4837,7 @@ gpuSetGfidInvalidated_IMPL(OBJGPU *pGpu, NvU32 gfid) * @return NV_TRUE if *pEngDesc is valid, NV_FALSE if there are no more engines */ NvBool -gpuGetNextInEngineOrderList(OBJGPU *pGpu, ENGLIST_ITER *pIt, PENGDESCRIPTOR pEngDesc) +gpuGetNextInEngineOrderList(OBJGPU *pGpu, ENGLIST_ITER *pIt, ENGDESCRIPTOR *pEngDesc) { NvBool bReverse = !!(pIt->flags & (GCO_LIST_UNLOAD | GCO_LIST_DESTROY)); const GPUCHILDORDER *pChildOrderList; @@ -5075,12 +5078,12 @@ gpuInitChipInfo_IMPL // them to figure out which chip it is and how to wire up the HALs. // pGpu->chipInfo.pmcBoot0.impl = DRF_VAL(_PMC, _BOOT_0, _IMPLEMENTATION, pGpu->chipId0); - pGpu->chipInfo.pmcBoot0.arch = gpuGetArchitectureFromPmcBoot0(pGpu->chipId0) << GPU_ARCH_SHIFT; + pGpu->chipInfo.pmcBoot0.arch = decodePmcBoot0Architecture(pGpu->chipId0) << GPU_ARCH_SHIFT; pGpu->chipInfo.pmcBoot0.majorRev = DRF_VAL(_PMC, _BOOT_0, _MAJOR_REVISION, pGpu->chipId0); pGpu->chipInfo.pmcBoot0.minorRev = DRF_VAL(_PMC, _BOOT_0, _MINOR_REVISION, pGpu->chipId0); pGpu->chipInfo.pmcBoot0.minorExtRev = NV2080_CTRL_GPU_INFO_MINOR_REVISION_EXT_NONE; pGpu->chipInfo.pmcBoot42.impl = DRF_VAL(_PMC, _BOOT_42, _IMPLEMENTATION, pGpu->chipId1); - pGpu->chipInfo.pmcBoot42.arch = gpuGetArchitectureFromPmcBoot42(pGpu->chipId1) << GPU_ARCH_SHIFT; + pGpu->chipInfo.pmcBoot42.arch = decodePmcBoot42Architecture(pGpu->chipId1) << GPU_ARCH_SHIFT; pGpu->chipInfo.pmcBoot42.majorRev = DRF_VAL(_PMC, _BOOT_42, _MAJOR_REVISION, pGpu->chipId1); pGpu->chipInfo.pmcBoot42.minorRev = DRF_VAL(_PMC, _BOOT_42, _MINOR_REVISION, pGpu->chipId1); pGpu->chipInfo.pmcBoot42.minorExtRev = DRF_VAL(_PMC, _BOOT_42, _MINOR_EXTENDED_REVISION, pGpu->chipId1); @@ -5091,6 +5094,7 @@ gpuInitChipInfo_IMPL // pGpu->chipInfo.implementationId = pGpu->chipInfo.pmcBoot42.impl; pGpu->chipInfo.platformId = pGpu->chipInfo.pmcBoot42.arch; + pGpu->chipInfo.chipId = decodePmcBoot42ChipId(pGpu->chipId1); } /*! @@ -5172,80 +5176,6 @@ gpuCheckSysmemAccess_IMPL(OBJGPU* pGpu) return NV_TRUE; } -/*! - * @brief Read the pcie spec registers using config cycles - * - * @param[in] pGpu GPU object pointer - * @param[in] index Register offset in PCIe config space - * @param[out] pData Value of the register - * - * @returns NV_OK on success - */ -NV_STATUS -gpuReadBusConfigCycle_IMPL -( - OBJGPU *pGpu, - NvU32 index, - NvU32 *pData -) -{ - NvU32 domain = gpuGetDomain(pGpu); - NvU8 bus = gpuGetBus(pGpu); - NvU8 device = gpuGetDevice(pGpu); - NvU8 function = 0; - NvBool bIsCCFeatureEnabled = NV_FALSE; - - bIsCCFeatureEnabled = gpuIsCCFeatureEnabled(pGpu); - - if (IS_PASSTHRU(pGpu) && !bIsCCFeatureEnabled) - { - gpuReadPassThruConfigReg_HAL(pGpu, index, pData); - } - else - { - if (pGpu->hPci == NULL) - { - pGpu->hPci = osPciInitHandle(domain, bus, device, function, NULL, NULL); - } - - *pData = osPciReadDword(pGpu->hPci, index); - } - - return NV_OK; -} - -/*! - * @brief Write to pcie spec registers using config cycles - * - * @param[in] pGpu GPU object pointer - * @param[in] index Register offset in PCIe config space - * @param[in] value Write this value to the register - * - * @returns NV_OK on success - */ -NV_STATUS -gpuWriteBusConfigCycle_IMPL -( - OBJGPU *pGpu, - NvU32 index, - NvU32 value -) -{ - NvU32 domain = gpuGetDomain(pGpu); - NvU8 bus = gpuGetBus(pGpu); - NvU8 device = gpuGetDevice(pGpu); - NvU8 function = 0; - - if (pGpu->hPci == NULL) - { - pGpu->hPci = osPciInitHandle(domain, bus, device, function, NULL, NULL); - } - - osPciWriteDword(pGpu->hPci, index, value); - - return NV_OK; -} - NV_STATUS gpuGetCeFaultMethodBufferSize_KERNEL(OBJGPU *pGpu, NvU32 *size) { NvU32 sz = pGpu->ceFaultMethodBufferSize; @@ -5601,6 +5531,28 @@ gpuDetectVgxBranding_IMPL(OBJGPU *pGpu) return BRANDING_TYPE_NONE; } +/*! + * @brief Returns the value of bAmpereErrorContainmentXidEnabled + * + * @param[In] pGpu OBJGPU pointer + * + * @return the value of bAmpereErrorContainmentXidEnabled +.*/ +NvBool +gpuIsAmpereErrorContainmentXidEnabled_KERNEL +( + OBJGPU *pGpu +) +{ + // + // When the poison fuse is enabled, both bGlobalPoisonFuseEnabled + // and bAmpereErrorContainmentXidEnabled are set to NV_TRUE so just + // use the existing function + // + return gpuIsGlobalPoisonFuseEnabled_HAL(pGpu); +} + + /*! * @brief returns a boolean indicating if an SLI bridge is supported by the specified GPU. * @@ -5628,3 +5580,470 @@ gpuIsSliLinkSupported_IMPL return bIsSupported; } + +/*! + * Obtains the valid scheduling policy for the current platform. + * Use: Determine whether software scheduling is required. + */ +const char * +gpuGetSchedulerPolicy_IMPL +( + OBJGPU *pGpu, + NvU32 *pSchedPolicy +) +{ + NvU32 schedPolicy = SCHED_POLICY_DEFAULT; + NvU32 regkey = 0; + + if (hypervisorIsVgxHyper() || (RMCFG_FEATURE_PLATFORM_GSP && IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu))) + { + // Disable OBJSCHED_SW_ENABLE when GPU is older than Pascal. + // This is true for WDDM and vGPU scheduling + if (!IsPASCALorBetter(pGpu)) + { + schedPolicy = SCHED_POLICY_DEFAULT; + } + else if (IS_MIG_ENABLED(pGpu) && + (hypervisorIsVgxHyper() || (IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu) && !IS_VIRTUAL(pGpu)))) + { + schedPolicy = SCHED_POLICY_VGPU_FIXED_SHARE; + } + // Check the PVMRL regkey + else if (osReadRegistryDword(pGpu, NV_REG_STR_RM_PVMRL, ®key) == NV_OK && + FLD_TEST_REF(NV_REG_STR_RM_PVMRL_ENABLE, _YES, regkey) ) + { + NvU32 configSchedPolicy = REF_VAL(NV_REG_STR_RM_PVMRL_SCHED_POLICY, regkey); + + switch (configSchedPolicy) + { + case NV_REG_STR_RM_PVMRL_SCHED_POLICY_VGPU_EQUAL_SHARE: + schedPolicy = SCHED_POLICY_VGPU_EQUAL_SHARE; + break; + case NV_REG_STR_RM_PVMRL_SCHED_POLICY_VGPU_FIXED_SHARE: + schedPolicy = SCHED_POLICY_VGPU_FIXED_SHARE; + break; + default: + NV_PRINTF(LEVEL_INFO, + "Invalid scheduling policy %d specified by regkey.\n", + configSchedPolicy); + break; + } + } + else + { + schedPolicy = SCHED_POLICY_BEST_EFFORT; + } + } + + *pSchedPolicy = schedPolicy; + + switch (schedPolicy) + { + case SCHED_POLICY_BEST_EFFORT: + return MAKE_NV_PRINTF_STR("BEST_EFFORT"); + case SCHED_POLICY_VGPU_EQUAL_SHARE: + return MAKE_NV_PRINTF_STR("EQUAL_SHARE"); + case SCHED_POLICY_VGPU_FIXED_SHARE: + return MAKE_NV_PRINTF_STR("FIXED_SHARE"); + case SCHED_POLICY_DEFAULT: + default: + // For baremetal and PT + return MAKE_NV_PRINTF_STR("NONE"); + } +} + +void +gpuApplySchedulerPolicy_IMPL +( + OBJGPU *pGpu +) +{ + const char *schedPolicyName; + NvU32 configSchedPolicy; + NvU32 domain = gpuGetDomain(pGpu); + NvU32 bus = gpuGetBus(pGpu); + NvU32 device = gpuGetDevice(pGpu); + NvBool bIsSchedSwEnabled = NV_FALSE; + + schedPolicyName = gpuGetSchedulerPolicy(pGpu, &configSchedPolicy); + + // PVMRL is disabled when GPU is older than Pascal + if (((RMCFG_FEATURE_PLATFORM_GSP && IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu)) || hypervisorIsVgxHyper()) && IsPASCALorBetter(pGpu)) + { + bIsSchedSwEnabled = (configSchedPolicy != SCHED_POLICY_DEFAULT); + + portDbgPrintf("NVRM: GPU at %04x:%02x:%02x.0 has software scheduler %s with policy %s.\n", + domain, bus, device, + bIsSchedSwEnabled ? MAKE_NV_PRINTF_STR("ENABLED") : MAKE_NV_PRINTF_STR("DISABLED"), + schedPolicyName); + } + else + { + // RM is not yet ready to print this message in release builds on baremetal. + NV_PRINTF(LEVEL_INFO, + "GPU at %04x:%02x:%02x.0 has software scheduler %s with policy %s.\n", + domain, bus, device, + bIsSchedSwEnabled ? MAKE_NV_PRINTF_STR("ENABLED") : MAKE_NV_PRINTF_STR("DISABLED"), + schedPolicyName); + } + + // Enabled SWRL Granular locking only if SWRL is enabled on hypervisor or VGPU_GSP_PLUGIN_OFFLOAD is enabled + if (((RMCFG_FEATURE_PLATFORM_GSP && IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu)) || hypervisorIsVgxHyper()) && bIsSchedSwEnabled) + { + pGpu->setProperty(pGpu, PDB_PROP_GPU_SWRL_GRANULAR_LOCKING, NV_TRUE); + } +} + +static NV_STATUS +_gpuSetResetRequiredState +( + OBJGPU *pGpu, + NvBool newState +) +{ + NvBool prevState; + NV_STATUS status; + + status = gpuIsDeviceMarkedForReset(pGpu, &prevState); + if (status != NV_OK) + { + goto _gpuSetResetRequiredState_exit; + } + + status = gpuSetResetScratchBit_HAL(pGpu, newState); + if (status != NV_OK) + { + goto _gpuSetResetRequiredState_exit; + } + + if (prevState != newState) + { + status = gpuResetRequiredStateChanged_HAL(pGpu, newState); + } + +_gpuSetResetRequiredState_exit: + return status; +} + +/** + * @brief Interface which allows GPU to be marked for pending reset. + * + * @param[in] pGpu OBJGPU pointer + * + * @return NV_OK if successful + */ +NV_STATUS +gpuMarkDeviceForReset_IMPL +( + OBJGPU *pGpu +) +{ + return _gpuSetResetRequiredState(pGpu, NV_TRUE); +} + +/** + * @brief Interface which allows GPU to be unmarked for pending reset. + * + * This should be used only for debug or testing through + * NV2080_CTRL_CMD_GPU_UNMARK_DEVICE_FOR_RESET and never called directly. + * + * @param[in] pGpu OBJGPU pointer + * + * @return NV_OK if successful + */ +NV_STATUS +gpuUnmarkDeviceForReset_IMPL +( + OBJGPU *pGpu +) +{ + return _gpuSetResetRequiredState(pGpu, NV_FALSE); +} + +/** + * @brief Interface which returns if a GPU reset is needed. + * + * @param[in] pGpu OBJGPU pointer + * @param[out] pbResetRequired NvBool pointer indicating if the GPU needs a reset + * + * @return NV_OK if successful + */ +NV_STATUS +gpuIsDeviceMarkedForReset_IMPL +( + OBJGPU *pGpu, + NvBool *pbResetRequired +) +{ + return gpuGetResetScratchBit_HAL(pGpu, pbResetRequired); +} + +/*! + * @brief Interface which allows GPU to be marked for pending drain and reset. This means, + * applications should be drained from the GPU and the GPU reset to regain full operability. + * + * How is this state exposed: + * - PMU SMBPBI mailbox will provide a query to expose this flag. So presumably a BMC queries + * this flag and resets GPU after all workload running on the GPU has completed. + * - Ampere Error containment XID prints also exposes this state + * + * @param[in] pGpu OBJGPU pointer + * + * @return NV_OK if successful + */ +NV_STATUS +gpuMarkDeviceForDrainAndReset_IMPL +( + OBJGPU *pGpu +) +{ + return gpuSetDrainAndResetScratchBit_HAL(pGpu, NV_TRUE); +} + +/*! + * @brief Interface which allows GPU to be unmarked for pending drain and reset. + * + * This should be used only for debug or testing through + * NV2080_CTRL_CMD_GPU_UNMARK_DEVICE_FOR_DRAIN_AND_RESET and never called directly. + * + * How is this state exposed: + * - PMU SMBPBI mailbox will provide a query to expose this flag. So presumably a BMC queries + * this flag and resets GPU after all workload running on the GPU has completed. + * - Ampere Error containment XID prints also exposes this state + * + * @param[in] pGpu OBJGPU pointer + * + * @return NV_OK if successful + */ +NV_STATUS +gpuUnmarkDeviceForDrainAndReset_IMPL +( + OBJGPU *pGpu +) +{ + return gpuSetDrainAndResetScratchBit_HAL(pGpu, NV_FALSE); +} + +/*! + * @brief Interface which returns if a GPU drain and reset is recommended. + * + * @param[in] pGpu OBJGPU pointer + * @param[out] pbDrainRecommended NvBool pointer indicating if the GPU needs a + * drain and reset + * + * @return NV_OK if successful + */ +NV_STATUS +gpuIsDeviceMarkedForDrainAndReset_IMPL +( + OBJGPU *pGpu, + NvBool *pbDrainRecommended +) +{ + return gpuGetDrainAndResetScratchBit_HAL(pGpu, pbDrainRecommended); +} + +const char* +_gpuRecoveryActionName +( + NV2080_CTRL_GPU_RECOVERY_ACTION action +) +{ + switch(action) + { + case NV2080_CTRL_GPU_RECOVERY_ACTION_NONE: + return "None"; + case NV2080_CTRL_GPU_RECOVERY_ACTION_GPU_RESET: + return "GPU Reset Required"; + case NV2080_CTRL_GPU_RECOVERY_ACTION_NODE_REBOOT: + return "Node Reboot Required"; + case NV2080_CTRL_GPU_RECOVERY_ACTION_DRAIN_P2P: + return "Drain P2P"; + default: + NV_ASSERT_FAILED("Unknown recovery action!"); + return "Unknown"; + } +} + +/*! + * @brief This function queries the action required to recover from a GPU fault. + * + * @param[In] pGpu The GPU to query + * @param[Out] pParams The structure to store the recovery action + * + * @return None. + */ +void +gpuGetRecoveryAction_IMPL +( + OBJGPU *pGpu, + NV2080_CTRL_GPU_GET_RECOVERY_ACTION_PARAMS *pParams +) +{ + NV_PRINTF(LEVEL_INFO, + "GetRecoveryAction: 0x%x (%s)\n", + pGpu->currentRecoveryAction, + _gpuRecoveryActionName(pGpu->currentRecoveryAction)); + + pParams->action = pGpu->currentRecoveryAction; +} + +/*! + * @brief This function refreshes the GPU fault recovery action, accounting for + * recent changes. This function runs in a work item with GPUS_LOCK_ALL already + * acquired. + * + * @param[In] pGpu The GPU object + * + * @return None. + */ +static void +_gpuRefreshRecoveryActionInLock +( + NvU32 gpuInstance, + void *pParams +) +{ + OBJSYS *pSys = SYS_GET_INSTANCE(); + OBJGPU *pGpu = gpumgrGetGpu(gpuInstance); + NV_STATUS rmStatus; + NvBool bResetRequired; + NV2080_CTRL_GPU_RECOVERY_ACTION newAction; + NV2080_CTRL_GPU_RECOVERY_ACTION oldAction; + + // Decide the new recovery action + if (pSys->getProperty(pSys, PDB_PROP_SYS_RECOVERY_REBOOT_REQUIRED)) + { + newAction = NV2080_CTRL_GPU_RECOVERY_ACTION_NODE_REBOOT; + } + else + { + rmStatus = gpuIsDeviceMarkedForReset(pGpu, &bResetRequired); + if (!pGpu->getProperty(pGpu, PDB_PROP_GPU_IS_CONNECTED) || + ((rmStatus == NV_OK) && bResetRequired)) + { + newAction = NV2080_CTRL_GPU_RECOVERY_ACTION_GPU_RESET; + } + else if (pGpu->getProperty(pGpu, PDB_PROP_GPU_RECOVERY_DRAIN_P2P_REQUIRED)) + { + newAction = NV2080_CTRL_GPU_RECOVERY_ACTION_DRAIN_P2P; + } + else + { + newAction = NV2080_CTRL_GPU_RECOVERY_ACTION_NONE; + } + } + + if (newAction != pGpu->currentRecoveryAction) + { + oldAction = pGpu->currentRecoveryAction; + pGpu->currentRecoveryAction = newAction; + + if (oldAction != GPU_RECOVERY_ACTION_UNKNOWN) + { + // Trigger NVML event for the new recovery action. + gpuNotifySubDeviceEvent(pGpu, NV2080_NOTIFIERS_GPU_RECOVERY_ACTION, NULL, 0, 0, newAction); + + // Log XID 154 to indicate new recovery action. + nvErrorLog_va(pGpu, GPU_RECOVERY_ACTION_CHANGED, "GPU recovery action changed from 0x%x (%s) to 0x%x (%s)", + oldAction, _gpuRecoveryActionName(oldAction), newAction, _gpuRecoveryActionName(newAction)); + } + } +} + +/*! + * @brief This function refreshes the GPU fault recovery action, accounting for + * recent changes. + * + * @param[In] pGpu The GPU object + * @param[In] inLock Specifies whether the calling thread has already + * acquired all GPU locks. + * + * @return None. + */ +void +gpuRefreshRecoveryAction_KERNEL +( + OBJGPU *pGpu, + NvBool inLock +) +{ + if (!inLock) + { + // + // Schedule a workitem to acquire GPUS_LOCK_ALL and perform the refresh + // as the current thread could be in any IRQL / lock context. + // + NV_ASSERT_OK(osQueueWorkItemWithFlags(pGpu, + _gpuRefreshRecoveryActionInLock, + NULL, + OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS)); + } + else + { + // Lock requirement is already satisfied, perform the refresh directly. + _gpuRefreshRecoveryActionInLock(pGpu->gpuInstance, NULL); + } +} + +/*! + * @brief This function specifies whether the GPU needs all its P2P traffic + * drained before it can be used. + * + * @param[In] pGpu The GPU object + * @param[In] bDrainP2P Specifies whether the GPU needs P2P draining + * + * @return None. + */ +void +gpuSetRecoveryDrainP2P_KERNEL +( + OBJGPU *pGpu, + NvBool bDrainP2P +) +{ + if (!!pGpu->getProperty(pGpu, PDB_PROP_GPU_RECOVERY_DRAIN_P2P_REQUIRED) != !!bDrainP2P) + { + pGpu->setProperty(pGpu, PDB_PROP_GPU_RECOVERY_DRAIN_P2P_REQUIRED, bDrainP2P); + gpuRefreshRecoveryAction_KERNEL(pGpu, NV_FALSE); + } +} +/*! + * @brief Set partition error attribution + * + * @param[in] pGpu OBJGPU pointer + * @param[in] errorCode Error Containment error code + * @param[in] loc Location, SubLocation information + * @param[in] rcErrorCode RC error code + * + * @returns NV_OK + * NV_ERR_INVALID_ARGUMENT if errorCode is invalid or + if partition attribution isn't supported for the error + */ +NV_STATUS +gpuSetPartitionErrorAttribution_KERNEL +( + OBJGPU *pGpu, + NV_ERROR_CONT_ERR_ID errorCode, + NV_ERROR_CONT_LOCATION loc, + NvU32 rcErrorCode +) +{ + switch (errorCode) + { + case NV_ERROR_CONT_ERR_ID_E24_GSP_POISON: + { + NV_PRINTF(LEVEL_ERROR, "MIG_INSTANCE_REF determining is not supported for error ID 0x%x.\n", errorCode); + NV_ASSERT(0); + return NV_ERR_INVALID_ARGUMENT; + } + default: + { + NV_PRINTF(LEVEL_ERROR, "Invalid error ID: 0x%x\n", errorCode); + NV_ASSERT(0); + return NV_ERR_INVALID_ARGUMENT; + } + } + + return NV_OK; +} diff --git a/src/nvidia/src/kernel/gpu/gpu_access.c b/src/nvidia/src/kernel/gpu/gpu_access.c index 8c21882183..52a4fab0aa 100644 --- a/src/nvidia/src/kernel/gpu/gpu_access.c +++ b/src/nvidia/src/kernel/gpu/gpu_access.c @@ -1385,7 +1385,7 @@ gpuRegRd08_dumpinfo(const char *func, const char *addrStr, const char *vreg, OBJ static NvU8 prev_val = 0; if (addr != prev_addr || val != prev_val) { - // filter out bar0 windows registers (NV_PRAMIN – range 0x007FFFFF:0x00700000 ) + // filter out bar0 windows registers (NV_PRAMIN -- range 0x007FFFFF:0x00700000 ) if ((addr & 0xFFF00000) != 0x00700000) { NV_PRINTF(LEVEL_NOTICE, @@ -1407,7 +1407,7 @@ gpuRegRd16_dumpinfo(const char *func, const char *addrStr, const char *vreg, OBJ static NvU16 prev_val = 0; if (addr != prev_addr || val != prev_val) { - // filter out bar0 windows registers (NV_PRAMIN – range 0x007FFFFF:0x00700000 ) + // filter out bar0 windows registers (NV_PRAMIN -- range 0x007FFFFF:0x00700000 ) if ((addr & 0xFFF00000) != 0x00700000) { NV_PRINTF(LEVEL_NOTICE, @@ -1429,7 +1429,7 @@ gpuRegRd32_dumpinfo(const char *func, const char *addrStr, const char *vreg, OBJ static NvU32 prev_val = 0; if (addr != prev_addr || val != prev_val) { - // filter out bar0 windows registers (NV_PRAMIN – range 0x007FFFFF:0x00700000 ) + // filter out bar0 windows registers (NV_PRAMIN -- range 0x007FFFFF:0x00700000 ) if ((addr & 0xFFF00000) != 0x00700000) { NV_PRINTF(LEVEL_NOTICE, @@ -1445,7 +1445,7 @@ gpuRegRd32_dumpinfo(const char *func, const char *addrStr, const char *vreg, OBJ void gpuRegWr08_dumpinfo(const char *func, const char *addrStr, const char *vreg, OBJGPU *pGpu, NvU32 addr, NvV8 val) { - // filter out bar0 windows registers (NV_PRAMIN – range 0x007FFFFF:0x00700000 ) + // filter out bar0 windows registers (NV_PRAMIN -- range 0x007FFFFF:0x00700000 ) if ((addr & 0xFFF00000) != 0x00700000) { NV_PRINTF(LEVEL_NOTICE, @@ -1458,7 +1458,7 @@ gpuRegWr08_dumpinfo(const char *func, const char *addrStr, const char *vreg, OBJ void gpuRegWr16_dumpinfo(const char *func, const char *addrStr, const char *vreg, OBJGPU *pGpu, NvU32 addr, NvV16 val) { - // filter out bar0 windows registers (NV_PRAMIN – range 0x007FFFFF:0x00700000 ) + // filter out bar0 windows registers (NV_PRAMIN -- range 0x007FFFFF:0x00700000 ) if ((addr & 0xFFF00000) != 0x00700000) { NV_PRINTF(LEVEL_NOTICE, @@ -1471,7 +1471,7 @@ gpuRegWr16_dumpinfo(const char *func, const char *addrStr, const char *vreg, OBJ void gpuRegWr32_dumpinfo(const char *func, const char *addrStr, const char *vreg, OBJGPU *pGpu, NvU32 addr, NvV32 val) { - // filter out bar0 windows registers (NV_PRAMIN – range 0x007FFFFF:0x00700000 ) + // filter out bar0 windows registers (NV_PRAMIN -- range 0x007FFFFF:0x00700000 ) if ((addr & 0xFFF00000) != 0x00700000) { NV_PRINTF(LEVEL_NOTICE, @@ -1484,7 +1484,7 @@ gpuRegWr32_dumpinfo(const char *func, const char *addrStr, const char *vreg, OBJ void gpuRegWr32Uc_dumpinfo(const char *func, const char *addrStr, const char *vreg, OBJGPU *pGpu, NvU32 addr, NvV32 val) { - // filter out bar0 windows registers (NV_PRAMIN – range 0x007FFFFF:0x00700000 ) + // filter out bar0 windows registers (NV_PRAMIN -- range 0x007FFFFF:0x00700000 ) if ((addr & 0xFFF00000) != 0x00700000) { NV_PRINTF(LEVEL_NOTICE, diff --git a/src/nvidia/src/kernel/gpu/gpu_engine_type.c b/src/nvidia/src/kernel/gpu/gpu_engine_type.c index 82c380b8f9..d837577216 100644 --- a/src/nvidia/src/kernel/gpu/gpu_engine_type.c +++ b/src/nvidia/src/kernel/gpu/gpu_engine_type.c @@ -105,7 +105,6 @@ RM_ENGINE_TYPE gpuGetRmEngineType_IMPL(NvU32 index) case NV2080_ENGINE_TYPE_NVJPEG6: return RM_ENGINE_TYPE_NVJPEG6; case NV2080_ENGINE_TYPE_NVJPEG7: return RM_ENGINE_TYPE_NVJPEG7; case NV2080_ENGINE_TYPE_OFA0: return RM_ENGINE_TYPE_OFA0; -// removal tracking bug: 3748354 case NV2080_ENGINE_TYPE_OFA1: return RM_ENGINE_TYPE_OFA1; case NV2080_ENGINE_TYPE_COPY10: return RM_ENGINE_TYPE_COPY10; case NV2080_ENGINE_TYPE_COPY11: return RM_ENGINE_TYPE_COPY11; @@ -178,7 +177,6 @@ NvU32 gpuGetNv2080EngineType_IMPL(RM_ENGINE_TYPE index) case RM_ENGINE_TYPE_COPY7: return NV2080_ENGINE_TYPE_COPY7; case RM_ENGINE_TYPE_COPY8: return NV2080_ENGINE_TYPE_COPY8; case RM_ENGINE_TYPE_COPY9: return NV2080_ENGINE_TYPE_COPY9; -// removal tracking bug: 3748354 case RM_ENGINE_TYPE_COPY10: return NV2080_ENGINE_TYPE_COPY10; case RM_ENGINE_TYPE_COPY11: return NV2080_ENGINE_TYPE_COPY11; case RM_ENGINE_TYPE_COPY12: return NV2080_ENGINE_TYPE_COPY12; @@ -222,7 +220,6 @@ NvU32 gpuGetNv2080EngineType_IMPL(RM_ENGINE_TYPE index) case RM_ENGINE_TYPE_NVJPEG6: return NV2080_ENGINE_TYPE_NVJPEG6; case RM_ENGINE_TYPE_NVJPEG7: return NV2080_ENGINE_TYPE_NVJPEG7; case RM_ENGINE_TYPE_OFA0: return NV2080_ENGINE_TYPE_OFA0; -// removal tracking bug: 3748354 case RM_ENGINE_TYPE_OFA1: return NV2080_ENGINE_TYPE_OFA1; default: break; } @@ -322,3 +319,39 @@ NV_STATUS gpuGetRmEngineTypeCapMask_IMPL return NV_OK; } + +/*! + * @brief Convert RM engine type to the engine class as a string + * + * Use ENGDESC_FIELD(engDesc, _INST) to get the engine instance + * + * @param[in] engineType RM_ENGINE_TYPE number + * + * @returns engine name as a string + */ +const char* gpuRmEngineTypeToString_IMPL +( + RM_ENGINE_TYPE engineType +) +{ + if (RM_ENGINE_TYPE_IS_GR(engineType)) return MAKE_NV_PRINTF_STR("GR"); + else if (RM_ENGINE_TYPE_IS_COPY(engineType)) return MAKE_NV_PRINTF_STR("COPY"); + else if (RM_ENGINE_TYPE_IS_NVDEC(engineType)) return MAKE_NV_PRINTF_STR("NVDEC"); + else if (RM_ENGINE_TYPE_IS_NVENC(engineType)) return MAKE_NV_PRINTF_STR("NVENC"); + else if (RM_ENGINE_TYPE_IS_NVJPEG(engineType)) return MAKE_NV_PRINTF_STR("NVJPEG"); + else if (RM_ENGINE_TYPE_IS_OFA(engineType)) return MAKE_NV_PRINTF_STR("OFA"); + else if (engineType == RM_ENGINE_TYPE_VP) return MAKE_NV_PRINTF_STR("VP"); + else if (engineType == RM_ENGINE_TYPE_ME) return MAKE_NV_PRINTF_STR("ME"); + else if (engineType == RM_ENGINE_TYPE_PPP) return MAKE_NV_PRINTF_STR("PPP"); + else if (engineType == RM_ENGINE_TYPE_MPEG) return MAKE_NV_PRINTF_STR("MPEG"); + else if (engineType == RM_ENGINE_TYPE_SW) return MAKE_NV_PRINTF_STR("SW"); + else if (engineType == RM_ENGINE_TYPE_TSEC) return MAKE_NV_PRINTF_STR("TSEC"); + else if (engineType == RM_ENGINE_TYPE_VIC) return MAKE_NV_PRINTF_STR("VIC"); + else if (engineType == RM_ENGINE_TYPE_MP) return MAKE_NV_PRINTF_STR("MP"); + else if (engineType == RM_ENGINE_TYPE_SEC2) return MAKE_NV_PRINTF_STR("SEC2"); + else if (engineType == RM_ENGINE_TYPE_HOST) return MAKE_NV_PRINTF_STR("HOST"); + else if (engineType == RM_ENGINE_TYPE_DPU) return MAKE_NV_PRINTF_STR("DPU"); + else if (engineType == RM_ENGINE_TYPE_PMU) return MAKE_NV_PRINTF_STR("PMU"); + else if (engineType == RM_ENGINE_TYPE_FBFLCN) return MAKE_NV_PRINTF_STR("FBFLCN"); + else return MAKE_NV_PRINTF_STR(""); +} diff --git a/src/nvidia/src/kernel/gpu/gpu_fabric_probe.c b/src/nvidia/src/kernel/gpu/gpu_fabric_probe.c index 884ab45cba..bb25cc833b 100644 --- a/src/nvidia/src/kernel/gpu/gpu_fabric_probe.c +++ b/src/nvidia/src/kernel/gpu/gpu_fabric_probe.c @@ -36,6 +36,7 @@ #include "nvlink_inband_msg.h" #include "kernel/mem_mgr/fabric_vaspace.h" #include "ctrl/ctrl2080/ctrl2080internal.h" +#include "nvrm_registry.h" #include "compute/fabric.h" #include "class/cl00f1.h" @@ -286,8 +287,9 @@ gpuFabricProbeGetNumProbeReqs pGpu = pGpuFabricProbeInfoKernel->pGpu; pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); - LOCK_ASSERT_AND_RETURN(rmDeviceGpuLockIsOwner( - gpuGetInstance(pGpuFabricProbeInfoKernel->pGpu))); + NV_ASSERT_OR_RETURN(rmDeviceGpuLockIsOwner( + gpuGetInstance(pGpuFabricProbeInfoKernel->pGpu)), + NV_ERR_INVALID_LOCK_STATE); // // This function gets called from CUDA stack to check the probe state (NV2080_CTRL_CMD_GET_GPU_FABRIC_PROBE_INFO). @@ -413,6 +415,7 @@ _gpuFabricProbeSetupGpaRange NvU64 gpaAddress; NvU64 gpaAddressSize; NvU64 egmGpaAddress; + NvU64 fmCaps; NV_CHECK_OR_RETURN_VOID(LEVEL_ERROR, gpuFabricProbeGetGpaAddress(pGpuFabricProbeInfoKernel, @@ -431,8 +434,15 @@ _gpuFabricProbeSetupGpaRange &egmGpaAddress) == NV_OK); NV_CHECK_OR_RETURN_VOID(LEVEL_ERROR, + gpuFabricProbeGetfmCaps(pGpuFabricProbeInfoKernel, + &fmCaps) == NV_OK); + + if (fmCaps & NVLINK_INBAND_FM_CAPS_EGM_ENABLED) + { + NV_CHECK_OR_RETURN_VOID(LEVEL_ERROR, knvlinkSetUniqueFabricEgmBaseAddress_HAL(pGpu, pKernelNvlink, egmGpaAddress) == NV_OK); + } } } @@ -490,6 +500,52 @@ _gpuFabricProbeSendCliqueIdChangeEvent } } +static void +_gpuFrabricProbeUpdateSupportedBwModes +( + OBJGPU *pGpu, + GPU_FABRIC_PROBE_INFO_KERNEL *pGpuFabricProbeInfoKernel +) +{ + KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); + NvU8 maxRbmLinks = pGpuFabricProbeInfoKernel->probeResponseMsg.probeRsp.maxRbmLinks; + + // Check if maxRbmLinks is within max supported links + NV_ASSERT_OR_RETURN_VOID(maxRbmLinks <= NVLINK_MAX_LINKS_SW); + pKernelNvlink->maxRbmLinks = maxRbmLinks; +} + +static void +_gpuFrabricProbeRbmSleepLinks +( + OBJGPU *pGpu, + GPU_FABRIC_PROBE_INFO_KERNEL *pGpuFabricProbeInfoKernel +) +{ + KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); + NV_STATUS status = NV_OK; + NvU32 enabledLinkMask; + NvU32 linkMask; + + // Check if probe request has rbmRequested set + if (DRF_VAL(_GPU, _NVLINK, _BW_MODE, pGpuFabricProbeInfoKernel->bwMode) != + GPU_NVLINK_BW_MODE_LINK_COUNT) + { + return; + } + + // Set links requested in linkMaskToBeReduced to sleep + enabledLinkMask = knvlinkGetEnabledLinkMask(pGpu, pKernelNvlink); + linkMask = pGpuFabricProbeInfoKernel->probeResponseMsg.probeRsp.linkMaskToBeReduced & + enabledLinkMask; + status = knvlinkEnterExitSleep(pGpu, pKernelNvlink, linkMask, NV_TRUE); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "Error setting links to sleep on linkmask 0x%x\n", + linkMask); + } +} + NV_STATUS gpuFabricProbeReceiveKernelCallback ( @@ -502,6 +558,7 @@ gpuFabricProbeReceiveKernelCallback NvU32 gpuMaskUnused; nvlink_inband_gpu_probe_rsp_msg_t *pProbeRespMsg; GPU_FABRIC_PROBE_INFO_KERNEL *pGpuFabricProbeInfoKernel; + KernelNvlink *pKernelNvlink; NV_STATUS status; if ((pGpu = gpumgrGetGpu(gpuInstance)) == NULL) @@ -549,6 +606,17 @@ gpuFabricProbeReceiveKernelCallback _gpuFabricProbeSetupGpaRange(pGpu, pGpuFabricProbeInfoKernel); _gpuFabricProbeSetupFlaRange(pGpu, pGpuFabricProbeInfoKernel); + // Update supported bandwidth modes from probe response + _gpuFrabricProbeUpdateSupportedBwModes(pGpu, pGpuFabricProbeInfoKernel); + + pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); + if (pKernelNvlink->getProperty(pKernelNvlink, PDB_PROP_KNVLINK_RBM_LINK_COUNT_ENABLED)) + { + // Set links to sleep based on probe response + _gpuFrabricProbeRbmSleepLinks(pGpu, pGpuFabricProbeInfoKernel); + } + + return NV_OK; } @@ -665,6 +733,49 @@ gpuFabricProbeResume return NV_OK; } +static void +_gpuFabricProbeRbmWakeLinks +( + OBJGPU *pGpu, + GPU_FABRIC_PROBE_INFO_KERNEL *pGpuFabricProbeInfoKernel +) +{ + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); + NV2080_CTRL_NVLINK_GET_POWER_STATE_PARAMS powerStatusParams = {0}; + NvU32 enabledLinkMask = knvlinkGetEnabledLinkMask(pGpu, pKernelNvlink); + NvU32 linkMask = 0; + NV_STATUS status; + NvU32 i; + + FOR_EACH_INDEX_IN_MASK(32, i, enabledLinkMask) + { + powerStatusParams.linkId = i; + NV_CHECK_OK(status, LEVEL_ERROR, + pRmApi->Control(pRmApi, + pGpu->hInternalClient, + pGpu->hInternalSubdevice, + NV2080_CTRL_CMD_NVLINK_GET_POWER_STATE, + &powerStatusParams, sizeof(powerStatusParams))); + if (powerStatusParams.powerState == NV2080_CTRL_NVLINK_POWER_STATE_L2) + { + linkMask |= NVBIT32(i); + } + } + FOR_EACH_INDEX_IN_MASK_END; + + if (linkMask) + { + // Wake all sleeping links + status = knvlinkEnterExitSleep(pGpu, pKernelNvlink, linkMask, NV_FALSE); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "Error waking links on linkmask 0x%x\n", + linkMask); + } + } +} + NV_STATUS gpuFabricProbeStart ( @@ -672,13 +783,20 @@ gpuFabricProbeStart GPU_FABRIC_PROBE_INFO_KERNEL **ppGpuFabricProbeInfoKernel ) { + OBJSYS *pSys = SYS_GET_INSTANCE(); + OBJGPUMGR *pGpuMgr = SYS_GET_GPUMGR(pSys); NV_STATUS status = NV_OK; GPU_FABRIC_PROBE_INFO_KERNEL *pGpuFabricProbeInfoKernel; RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); NV2080_CTRL_CMD_INTERNAL_START_GPU_FABRIC_PROBE_INFO_PARAMS params = { 0 }; MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); + KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); + NvU32 strLength = 32; + NvU8 pStr[32]; + NvU32 linkCount; - LOCK_ASSERT_AND_RETURN(rmDeviceGpuLockIsOwner(gpuGetInstance(pGpu))); + NV_ASSERT_OR_RETURN(rmDeviceGpuLockIsOwner(gpuGetInstance(pGpu)), + NV_ERR_INVALID_LOCK_STATE); // Check if NVSwitch based system. If not return without doing anything if (!gpuFabricProbeIsSupported(pGpu)) @@ -695,10 +813,29 @@ gpuFabricProbeStart portMemSet(pGpuFabricProbeInfoKernel, 0, sizeof(*pGpuFabricProbeInfoKernel)); pGpuFabricProbeInfoKernel->pGpu = pGpu; - pGpuFabricProbeInfoKernel->bwMode = gpumgrGetGpuNvlinkBwMode(); - params.bwMode = pGpuFabricProbeInfoKernel->bwMode; params.bLocalEgmEnabled = pMemoryManager->bLocalEgmEnabled; + if (pGpuMgr->bwModeScope == GPU_NVLINK_BW_MODE_SCOPE_PER_GPU) + { + pGpuFabricProbeInfoKernel->bwMode = pKernelNvlink->nvlinkBwMode; + } + else + { + pGpuFabricProbeInfoKernel->bwMode = gpumgrGetGpuNvlinkBwMode(); + } + params.bwMode = pGpuFabricProbeInfoKernel->bwMode; + + // RBM requested via regkey. Wake the links in this path if LINKCOUNT or FULL is set. + if ((osReadRegistryDword(pGpu, NV_REG_STR_RM_NVLINK_BW_LINK_COUNT, &linkCount) == NV_OK) || + ((osReadRegistryString(pGpu, NV_REG_STR_RM_NVLINK_BW, pStr, &strLength) == NV_OK) && + (DRF_VAL(_GPU, _NVLINK, _BW_MODE, params.bwMode) == GPU_NVLINK_BW_MODE_FULL))) + { + if (pKernelNvlink->getProperty(pKernelNvlink, PDB_PROP_KNVLINK_RBM_LINK_COUNT_ENABLED)) + { + _gpuFabricProbeRbmWakeLinks(pGpu, pGpuFabricProbeInfoKernel); + } + } + if (IS_VIRTUAL(pGpu)) { NV_RM_RPC_CONTROL(pGpu, NV01_NULL_OBJECT, NV01_NULL_OBJECT, @@ -822,17 +959,19 @@ _gpuFabricProbeInvalidate return NV_ERR_NOT_SUPPORTED; \ } while (0) -static NV_STATUS -_gpuFabricProbeUpdateBwMode +NV_STATUS +gpuFabricProbeSetBwModePerGpu ( OBJGPU *pGpu, NvU8 mode ) { GPU_FABRIC_PROBE_INFO_KERNEL *pGpuFabricProbeInfoKernel = - pGpu->pGpuFabricProbeInfoKernel; + pGpu->pGpuFabricProbeInfoKernel; RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); + // Function assumes caller has checked requested mode is supported pGpuFabricProbeInfoKernel->bwMode = mode; gpuFabricProbeSuspend(pGpuFabricProbeInfoKernel); @@ -846,6 +985,17 @@ _gpuFabricProbeUpdateBwMode _gpuFabricProbeInvalidate(pGpu); + // Need to wake links if LINK_COUNT or FULL BW mode is requested before probe update + if ((DRF_VAL(_GPU, _NVLINK, _BW_MODE, mode) == GPU_NVLINK_BW_MODE_LINK_COUNT) || + (DRF_VAL(_GPU, _NVLINK, _BW_MODE, mode) == GPU_NVLINK_BW_MODE_FULL)) + { + if (pKernelNvlink->getProperty(pKernelNvlink, PDB_PROP_KNVLINK_RBM_LINK_COUNT_ENABLED)) + { + _gpuFabricProbeRbmWakeLinks(pGpu, pGpuFabricProbeInfoKernel); + pKernelNvlink->nvlinkBwMode = mode; + } + } + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, gpuFabricProbeResume(pGpuFabricProbeInfoKernel)); return NV_OK; @@ -862,6 +1012,7 @@ gpuFabricProbeSetBwMode NV_STATUS status; NvU32 gpuIndex; OBJGPU *pGpu; + KernelNvlink *pKernelNvlink; status = gpumgrGetGpuAttachInfo(&attachedGpuCount, &attachedGpuMask); if (status != NV_OK) @@ -897,22 +1048,34 @@ gpuFabricProbeSetBwMode return NV_ERR_NOT_READY; } - NvU64 fmCaps = pGpu->pGpuFabricProbeInfoKernel->probeResponseMsg.probeRsp.fmCaps; - switch(mode) + // Confirm requested BW mode is supported by GPU + pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); + if (!knvlinkIsBwModeSupported_HAL(pGpu, pKernelNvlink, mode)) + { + return NV_ERR_NOT_SUPPORTED; + } + + // These checks only apply to legacy bw mode settings + if (DRF_VAL(_GPU, _NVLINK, _BW_MODE, mode) != + GPU_NVLINK_BW_MODE_LINK_COUNT) { - case GPU_NVLINK_BW_MODE_MIN: - GPU_FABRIC_CHECK_BW_MODE(fmCaps, MIN); - break; - case GPU_NVLINK_BW_MODE_HALF: - GPU_FABRIC_CHECK_BW_MODE(fmCaps, HALF); - break; - case GPU_NVLINK_BW_MODE_3QUARTER: - GPU_FABRIC_CHECK_BW_MODE(fmCaps, 3QUARTER); - break; - case GPU_NVLINK_BW_MODE_OFF: - return NV_OK; // Don't need to ask FM - default: - break; + NvU64 fmCaps = pGpu->pGpuFabricProbeInfoKernel->probeResponseMsg.probeRsp.fmCaps; + switch(mode) + { + case GPU_NVLINK_BW_MODE_MIN: + GPU_FABRIC_CHECK_BW_MODE(fmCaps, MIN); + break; + case GPU_NVLINK_BW_MODE_HALF: + GPU_FABRIC_CHECK_BW_MODE(fmCaps, HALF); + break; + case GPU_NVLINK_BW_MODE_3QUARTER: + GPU_FABRIC_CHECK_BW_MODE(fmCaps, 3QUARTER); + break; + case GPU_NVLINK_BW_MODE_OFF: + return NV_OK; // Don't need to ask FM + default: + break; + } } } @@ -939,7 +1102,7 @@ gpuFabricProbeSetBwMode pGpu != NULL; pGpu = gpumgrGetNextGpu(attachedGpuMask, &gpuIndex)) { - status = _gpuFabricProbeUpdateBwMode(pGpu, mode); + status = gpuFabricProbeSetBwModePerGpu(pGpu, mode); if (status != NV_OK) { return status; diff --git a/src/nvidia/src/kernel/gpu/gpu_gspclient.c b/src/nvidia/src/kernel/gpu/gpu_gspclient.c index 877cd780e7..931744eae6 100644 --- a/src/nvidia/src/kernel/gpu/gpu_gspclient.c +++ b/src/nvidia/src/kernel/gpu/gpu_gspclient.c @@ -167,12 +167,16 @@ gpuGenGidData_FWCLIENT NvU64 gpuGetActiveFBIOs_FWCLIENT(OBJGPU *pGpu) { GspStaticConfigInfo *pGSCI = GPU_GET_GSP_STATIC_INFO(pGpu); + NV_ASSERT_OR_RETURN(pGSCI != NULL, 0); + return pGSCI->fbio_mask; } NvBool gpuIsGlobalPoisonFuseEnabled_FWCLIENT(OBJGPU *pGpu) { GspStaticConfigInfo *pGSCI = GPU_GET_GSP_STATIC_INFO(pGpu); + NV_ASSERT_OR_RETURN(pGSCI != NULL, NV_FALSE); + return pGSCI->poisonFuseEnabled; } @@ -180,6 +184,8 @@ void gpuGetRtd3GC6Data_FWCLIENT(OBJGPU *pGpu) { GspStaticConfigInfo *pGSCI = GPU_GET_GSP_STATIC_INFO(pGpu); + NV_ASSERT_OR_RETURN_VOID(pGSCI != NULL); + pGpu->gc6State.GC6PerstDelay = pGSCI->RTD3GC6PerstDelay; pGpu->gc6State.GC6TotalBoardPower = pGSCI->RTD3GC6TotalBoardPower; } @@ -327,3 +333,17 @@ gpuGetChipSubRev_FWCLIENT return pChipInfo->chipSubRev; } + +/*! GPU has a new reset required state */ +NV_STATUS +gpuResetRequiredStateChanged_FWCLIENT +( + OBJGPU *pGpu, + NvBool newState +) +{ + gpuRefreshRecoveryAction_HAL(pGpu, NV_FALSE); + + return NV_OK; +} + diff --git a/src/nvidia/src/kernel/gpu/gpu_registry.c b/src/nvidia/src/kernel/gpu/gpu_registry.c index dcdf4240ba..c270e0bfad 100644 --- a/src/nvidia/src/kernel/gpu/gpu_registry.c +++ b/src/nvidia/src/kernel/gpu/gpu_registry.c @@ -199,11 +199,6 @@ gpuInitRegistryOverrides_KERNEL pGpu->bBf3WarBug4040336Enabled = (data32 == NV_REG_STR_RM_DMA_ADJUST_PEER_MMIO_BF3_ENABLE); } - if (osReadRegistryDword(pGpu, NV_REG_STR_RM_ITERATIVE_MMU_WALKER, &data32) == NV_OK) - { - pGpu->bIterativeMmuWalker = (data32 == NV_REG_STR_RM_ITERATIVE_MMU_WALKER_ENABLED); - } - #if defined(GPU_LOAD_FAILURE_TEST_SUPPORTED) if (osReadRegistryDword(pGpu, NV_REG_STR_GPU_LOAD_FAILURE_TEST, &data32) == NV_OK) { @@ -211,6 +206,11 @@ gpuInitRegistryOverrides_KERNEL } #endif + if (osReadRegistryDword(pGpu, NV_REG_STR_RM_DEBUG_RUSD_POLLING, &data32) == NV_OK) + { + pGpu->userSharedData.pollingRegistryOverride = data32; + } + return NV_OK; } diff --git a/src/nvidia/src/kernel/gpu/gpu_resource_desc.c b/src/nvidia/src/kernel/gpu/gpu_resource_desc.c index a4b5b968d9..bb44fe9509 100644 --- a/src/nvidia/src/kernel/gpu/gpu_resource_desc.c +++ b/src/nvidia/src/kernel/gpu/gpu_resource_desc.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -38,7 +38,7 @@ NV_STATUS gpuBuildClassDB_IMPL(OBJGPU *pGpu) { PGPU_ENGINE_ORDER pEngineOrder = &pGpu->engineOrder; - PCLASSDESCRIPTOR pClassDynamic; + CLASSDESCRIPTOR *pClassDynamic; const CLASSDESCRIPTOR *pClassStatic; NvU32 numClasses; NvU32 i, j; @@ -118,7 +118,7 @@ gpuDestroyClassDB_IMPL(OBJGPU *pGpu) NvBool gpuIsClassSupported_IMPL(OBJGPU *pGpu, NvU32 externalClassId) { - PCLASSDESCRIPTOR pClassDesc; + CLASSDESCRIPTOR *pClassDesc; NV_STATUS status; status = gpuGetClassByClassId(pGpu, externalClassId, &pClassDesc); @@ -127,7 +127,7 @@ gpuIsClassSupported_IMPL(OBJGPU *pGpu, NvU32 externalClassId) } NV_STATUS -gpuGetClassByClassId_IMPL(OBJGPU *pGpu, NvU32 externalClassId, PCLASSDESCRIPTOR *ppClassDesc) +gpuGetClassByClassId_IMPL(OBJGPU *pGpu, NvU32 externalClassId, CLASSDESCRIPTOR **ppClassDesc) { PGPUCLASSDB pClassDB = &pGpu->classDB; NvU32 i; @@ -148,7 +148,7 @@ gpuGetClassByClassId_IMPL(OBJGPU *pGpu, NvU32 externalClassId, PCLASSDESCRIPTOR } NV_STATUS -gpuGetClassByEngineAndClassId_IMPL(OBJGPU *pGpu, NvU32 externalClassId, NvU32 engDesc, PCLASSDESCRIPTOR *ppClassDesc) +gpuGetClassByEngineAndClassId_IMPL(OBJGPU *pGpu, NvU32 externalClassId, NvU32 engDesc, CLASSDESCRIPTOR **ppClassDesc) { PGPUCLASSDB pClassDB = &pGpu->classDB; NvU32 i; @@ -266,7 +266,7 @@ gpuGetClassList_IMPL(OBJGPU *pGpu, NvU32 *pNumClasses, NvU32 *pClassList, NvU32 NV_STATUS status = NV_OK; NvU32 i, k; NvBool bCount; - PCLASSDESCRIPTOR classDB = pGpu->classDB.pClasses; + CLASSDESCRIPTOR *pClassDB = pGpu->classDB.pClasses; NvU32 lastClassId = 0; // Read the registry one time to get the list @@ -282,7 +282,7 @@ gpuGetClassList_IMPL(OBJGPU *pGpu, NvU32 *pNumClasses, NvU32 *pClassList, NvU32 for (i = 0; i < pGpu->classDB.numClasses; i++) { - if ((engDesc != ENG_INVALID) && (classDB[i].engDesc != engDesc)) + if ((engDesc != ENG_INVALID) && (pClassDB[i].engDesc != engDesc)) continue; bCount = NV_TRUE; @@ -291,7 +291,7 @@ gpuGetClassList_IMPL(OBJGPU *pGpu, NvU32 *pNumClasses, NvU32 *pClassList, NvU32 { for (k=1; k < pSuppressClasses[0]; k++) { - if (pSuppressClasses[k] == classDB[i].externalClassId) + if (pSuppressClasses[k] == pClassDB[i].externalClassId) { bCount = NV_FALSE; break; @@ -301,7 +301,7 @@ gpuGetClassList_IMPL(OBJGPU *pGpu, NvU32 *pNumClasses, NvU32 *pClassList, NvU32 if (bCount) { - const NvU32 classId = classDB[i].externalClassId; + const NvU32 classId = pClassDB[i].externalClassId; // // Skip duplicate classes. These exist in the classDB for diff --git a/src/nvidia/src/kernel/gpu/gpu_rmapi.c b/src/nvidia/src/kernel/gpu/gpu_rmapi.c index 159bd9e089..091d84f266 100644 --- a/src/nvidia/src/kernel/gpu/gpu_rmapi.c +++ b/src/nvidia/src/kernel/gpu/gpu_rmapi.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -939,6 +939,23 @@ _gpuCollectMemInfo } } +static NvBool +_gpuMatchClientPid +( + RmClient *pClient, + NvU32 pid, + NvU32 subPid +) +{ + NvU32 clientNsPid; // pClient PID on current's namespace + + if (_gpuConvertPid(pClient, &clientNsPid) != NV_OK) + return NV_FALSE; + + return (((subPid == 0) && (clientNsPid == pid)) || + ((subPid != 0) && (clientNsPid == pid) && (pClient->SubProcessID == subPid))); +} + // // This function takes in the PID for the process of interest, and queries all // clients for elementType. The 64-bit Data is updated by specific functions @@ -979,8 +996,7 @@ gpuFindClientInfoWithPidIterator_IMPL pClient = *ppClient; pRsClient = staticCast(pClient, RsClient); - if (((subPid == 0) && (pClient->ProcID == pid)) || - ((subPid != 0) && (pClient->ProcID == pid) && (pClient->SubProcessID == subPid))) + if (_gpuMatchClientPid(pClient, pid, subPid)) { RS_PRIV_LEVEL privLevel = rmclientGetCachedPrivilege(pClient); RS_ITERATOR it; diff --git a/src/nvidia/src/kernel/gpu/gpu_suspend.c b/src/nvidia/src/kernel/gpu/gpu_suspend.c index 9998c59881..7c564cbc03 100644 --- a/src/nvidia/src/kernel/gpu/gpu_suspend.c +++ b/src/nvidia/src/kernel/gpu/gpu_suspend.c @@ -31,7 +31,6 @@ #include "platform/platform.h" #include "platform/chipset/chipset.h" -#include "kernel/gpu/gr/kernel_graphics.h" #include "gpu/mem_mgr/mem_mgr.h" #include "gpu/mem_mgr/fbsr.h" #include "gpu/gsp/gsp_init_args.h" @@ -58,6 +57,32 @@ gpuPowerManagementEnter(OBJGPU *pGpu, NvU32 newLevel, NvU32 flags) NV_STATUS status = NV_OK; MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); + pGpu->powerManagementDepth = NV_PM_DEPTH_OS_LAYER; + + KernelGsp *pKernelGsp = GPU_GET_KERNEL_GSP(pGpu); + KernelGspUnloadMode unloadMode = KGSP_UNLOAD_MODE_SR_SUSPEND; + + if (IS_GSP_CLIENT(pGpu)) + { + if (IS_GPU_GC6_STATE_ENTERING(pGpu)) + { + unloadMode = KGSP_UNLOAD_MODE_GC6_ENTER; + } + else + { + unloadMode = KGSP_UNLOAD_MODE_SR_SUSPEND; + + // Prepare SR metadata structure for suspend + status = kgspPrepareSuspendResumeData_HAL(pGpu, pKernelGsp); + if (status != NV_OK) + { + return status; + } + } + + pGpu->powerManagementDepth = NV_PM_DEPTH_SR_META; + } + // This is a no-op in CPU-RM NV_ASSERT_OK_OR_GOTO(status, gpuPowerManagementEnterPreUnloadPhysical(pGpu), done); @@ -66,6 +91,7 @@ gpuPowerManagementEnter(OBJGPU *pGpu, NvU32 newLevel, NvU32 flags) GPU_STATE_FLAGS_PRESERVING | GPU_STATE_FLAGS_PM_TRANSITION | GPU_STATE_FLAGS_GC6_TRANSITION : GPU_STATE_FLAGS_PRESERVING | GPU_STATE_FLAGS_PM_TRANSITION), done); + pGpu->powerManagementDepth = NV_PM_DEPTH_STATE_LOAD; pGpu->setProperty(pGpu, PDB_PROP_GPU_VGA_ENABLED, NV_TRUE); // This is a no-op in CPU-RM @@ -73,51 +99,17 @@ gpuPowerManagementEnter(OBJGPU *pGpu, NvU32 newLevel, NvU32 flags) if (IS_GSP_CLIENT(pGpu)) { - KernelGsp *pKernelGsp = GPU_GET_KERNEL_GSP(pGpu); - KernelGspPreparedFwsecCmd preparedCmd; - - NV_RM_RPC_UNLOADING_GUEST_DRIVER(pGpu, status, NV_TRUE, IS_GPU_GC6_STATE_ENTERING(pGpu), newLevel); + status = kgspUnloadRm(pGpu, pKernelGsp, unloadMode, newLevel); if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "GSP unload failed at suspend (bootMode 0x%x, newLevel 0x%x): 0x%x\n", + unloadMode, newLevel, status); goto done; - - // Wait for GSP-RM to suspend - kgspWaitForProcessorSuspend_HAL(pGpu, pKernelGsp); - - // Dump GSP-RM logs before resetting and invoking FWSEC-SB - kgspDumpGspLogs(pKernelGsp, NV_FALSE); + } if (!IS_GPU_GC6_STATE_ENTERING(pGpu)) { - // Because of COT, RM cannot reset GSP-RISCV. - if (!(pGpu->getProperty(pGpu, PDB_PROP_GPU_IS_COT_ENABLED))) - { - kflcnReset_HAL(pGpu, staticCast(pKernelGsp, KernelFalcon)); - } - - // Invoke FWSEC-SB to load back PreOsApps. - status = kgspPrepareForFwsecSb_HAL(pGpu, pKernelGsp, pKernelGsp->pFwsecUcode, &preparedCmd); - if (status != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, "failed to prepare for FWSEC-SB for PreOsApps\n"); - goto done; - } - - status = kgspExecuteFwsec_HAL(pGpu, pKernelGsp, &preparedCmd); - if (status != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, "failed to execute FWSEC-SB for PreOsApps\n"); - goto done; - } - kpmuFreeLibosLoggingStructures(pGpu, GPU_GET_KERNEL_PMU(pGpu)); - - NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, - kgspSavePowerMgmtState_HAL(pGpu, pKernelGsp), done); - } - else - { - NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, - kgspExecuteBooterUnloadIfNeeded_HAL(pGpu, pKernelGsp, 0), done); } } @@ -145,6 +137,11 @@ gpuPowerManagementResume(OBJGPU *pGpu, NvU32 oldLevel, NvU32 flags) OBJCL *pCl = SYS_GET_CL(pSys); MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); + if (pGpu->powerManagementDepth == NV_PM_DEPTH_OS_LAYER) + { + return NV_OK; + } + #ifdef DEBUG // // This is useful for windbg debugging as it frequently doesn't reconnect to the @@ -174,6 +171,7 @@ gpuPowerManagementResume(OBJGPU *pGpu, NvU32 oldLevel, NvU32 flags) kmemsysProgramSysmemFlushBuffer_HAL(pGpu, GPU_GET_KERNEL_MEMORY_SYSTEM(pGpu)); KernelGsp *pKernelGsp = GPU_GET_KERNEL_GSP(pGpu); + KernelGspBootMode bootMode; GSP_SR_INIT_ARGUMENTS gspSrInitArgs; @@ -190,10 +188,13 @@ gpuPowerManagementResume(OBJGPU *pGpu, NvU32 oldLevel, NvU32 flags) goto done; } - if (!IS_GPU_GC6_STATE_EXITING(pGpu)) + if (IS_GPU_GC6_STATE_EXITING(pGpu)) { - NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, - kgspRestorePowerMgmtState_HAL(pGpu, pKernelGsp), done); + bootMode = KGSP_BOOT_MODE_GC6_EXIT; + } + else + { + bootMode = KGSP_BOOT_MODE_SR_RESUME; status = kpmuInitLibosLoggingStructures(pGpu, GPU_GET_KERNEL_PMU(pGpu)); if (status != NV_OK) @@ -202,20 +203,18 @@ gpuPowerManagementResume(OBJGPU *pGpu, NvU32 oldLevel, NvU32 flags) goto done; } } - else + + status = kgspPrepareForBootstrap_HAL(pGpu, pKernelGsp, bootMode); + if (status != NV_OK) { - status = kgspExecuteBooterLoad_HAL(pGpu, pKernelGsp, 0); - if (status != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, "cannot resume riscv/gsp from GC6: 0x%x\n", status); - goto done; - } + NV_PRINTF(LEVEL_ERROR, "GSP boot preparation failed at resume (bootMode 0x%x): 0x%x\n", bootMode, status); + goto done; } - status = kgspWaitForRmInitDone(pGpu, pKernelGsp); + status = kgspBootstrap_HAL(pGpu, pKernelGsp, bootMode); if (status != NV_OK) { - NV_PRINTF(LEVEL_ERROR, "State load at resume for riscv/gsp failed: 0x%x\n", status); + NV_PRINTF(LEVEL_ERROR, "GSP boot failed at resume (bootMode 0x%x): 0x%x\n", bootMode, status); goto done; } } @@ -255,6 +254,12 @@ gpuPowerManagementResume(OBJGPU *pGpu, NvU32 oldLevel, NvU32 flags) done: if (!IS_GPU_GC6_STATE_EXITING(pGpu)) { + if (IS_GSP_CLIENT(pGpu)) + { + KernelGsp *pKernelGsp = GPU_GET_KERNEL_GSP(pGpu); + kgspFreeSuspendResumeData_HAL(pGpu, pKernelGsp); + } + memmgrFreeFbsrMemory(pGpu, pMemoryManager); } @@ -285,6 +290,8 @@ gpuEnterStandby_IMPL(OBJGPU *pGpu) pGpu->setProperty(pGpu, PDB_PROP_GPU_IN_PM_CODEPATH, NV_TRUE); + gpuNotifySubDeviceEvent(pGpu, NV2080_NOTIFIERS_POWER_SUSPEND, NULL, 0, 0, 0); + suspendStatus = gpuPowerManagementEnter(pGpu, NV2080_CTRL_GPU_SET_POWER_STATE_GPU_LEVEL_3, GPU_STATE_FLAGS_PM_SUSPEND); pGpu->setProperty(pGpu, PDB_PROP_GPU_IN_STANDBY, NV_TRUE); @@ -338,6 +345,9 @@ gpuResumeFromStandby_IMPL(OBJGPU *pGpu) pGpu->setProperty(pGpu, PDB_PROP_GPU_IN_PM_CODEPATH, NV_FALSE); pGpu->setProperty(pGpu, PDB_PROP_GPU_IN_PM_RESUME_CODEPATH, NV_FALSE); + // reset PM depth on resume + pGpu->powerManagementDepth = NV_PM_DEPTH_NONE; + if ((pPfm != NULL) && pPfm->getProperty(pPfm, PDB_PROP_PFM_SUPPORTS_ACPI)) { NV_PRINTF(LEVEL_NOTICE, "Ending transition from %s to D0\n", @@ -348,10 +358,8 @@ gpuResumeFromStandby_IMPL(OBJGPU *pGpu) NV_PRINTF(LEVEL_NOTICE, "Ending resume from %s\n", IS_GPU_GC6_STATE_EXITING(pGpu) ? "GC6" : "APM Suspend"); } - if (kgraphicsIsBug4208224WARNeeded_HAL(pGpu, GPU_GET_KERNEL_GRAPHICS(pGpu, 0))) - { - return kgraphicsInitializeBug4208224WAR_HAL(pGpu, GPU_GET_KERNEL_GRAPHICS(pGpu, 0)); - } + + gpuNotifySubDeviceEvent(pGpu, NV2080_NOTIFIERS_POWER_RESUME, NULL, 0, 0, 0); return resumeStatus; } @@ -377,6 +385,8 @@ NV_STATUS gpuEnterHibernate_IMPL(OBJGPU *pGpu) pGpu->setProperty(pGpu, PDB_PROP_GPU_IN_PM_CODEPATH, NV_TRUE); + gpuNotifySubDeviceEvent(pGpu, NV2080_NOTIFIERS_POWER_SUSPEND, NULL, 0, 0, 0); + suspendStatus = gpuPowerManagementEnter(pGpu, NV2080_CTRL_GPU_SET_POWER_STATE_GPU_LEVEL_7, GPU_STATE_FLAGS_PM_HIBERNATE); NV_PRINTF(LEVEL_INFO, @@ -407,6 +417,9 @@ NV_STATUS gpuResumeFromHibernate_IMPL(OBJGPU *pGpu) pGpu->setProperty(pGpu, PDB_PROP_GPU_IN_PM_CODEPATH, NV_FALSE); pGpu->setProperty(pGpu, PDB_PROP_GPU_IN_PM_RESUME_CODEPATH, NV_FALSE); + // reset PM depth on resume + pGpu->powerManagementDepth = NV_PM_DEPTH_NONE; + if ((pPfm != NULL) && pPfm->getProperty(pPfm, PDB_PROP_PFM_SUPPORTS_ACPI)) { NV_PRINTF(LEVEL_NOTICE, "Ending transition from D4 to D0\n"); @@ -415,10 +428,8 @@ NV_STATUS gpuResumeFromHibernate_IMPL(OBJGPU *pGpu) { NV_PRINTF(LEVEL_NOTICE, "End resuming from APM Suspend\n"); } - if (kgraphicsIsBug4208224WARNeeded_HAL(pGpu, GPU_GET_KERNEL_GRAPHICS(pGpu, 0))) - { - return kgraphicsInitializeBug4208224WAR_HAL(pGpu, GPU_GET_KERNEL_GRAPHICS(pGpu, 0)); - } + + gpuNotifySubDeviceEvent(pGpu, NV2080_NOTIFIERS_POWER_RESUME, NULL, 0, 0, 0); return resumeStatus; } diff --git a/src/nvidia/src/kernel/gpu/gpu_user_shared_data.c b/src/nvidia/src/kernel/gpu/gpu_user_shared_data.c index 55478e5a07..c347da4c24 100644 --- a/src/nvidia/src/kernel/gpu/gpu_user_shared_data.c +++ b/src/nvidia/src/kernel/gpu/gpu_user_shared_data.c @@ -28,16 +28,36 @@ #include "rmapi/client.h" #include "rmapi/rmapi.h" #include "rmapi/rs_utils.h" +#include "nvrm_registry.h" #include "class/cl00de.h" #include "class/cl003e.h" // NV01_MEMORY_SYSTEM #include "gpu/mig_mgr/kernel_mig_manager.h" static NV_STATUS _gpushareddataInitGsp(OBJGPU *pGpu); +static NV_STATUS _gpushareddataSendDataPollRpc(OBJGPU *pGpu, NvU64 polledDataMask); static NV_STATUS _gpushareddataRequestDataPoll(GpuUserSharedData *pData, NvU64 polledDataMask); static inline void _gpushareddataUpdateSeqOpen(volatile NvU64 *pSeq); static inline void _gpushareddataUpdateSeqClose(volatile NvU64 *pSeq); +static inline +NvBool +_rusdPollingSupported +( + OBJGPU *pGpu +) +{ + // + // RUSD polling is disabled on non-GSP for pre-GA102 due to collisions + // with VSYNC interrupt on high refresh rate monitors. See Bug 4432698. + // For GA102+, the RPC to PMU are replaced by PMUMON RMCTRLs. + // + return ((pGpu->userSharedData.pollingRegistryOverride != NV_REG_STR_RM_DEBUG_RUSD_POLLING_FORCE_DISABLE) && + (IS_GSP_CLIENT(pGpu) || + (pGpu->userSharedData.pollingRegistryOverride == NV_REG_STR_RM_DEBUG_RUSD_POLLING_FORCE_ENABLE) || + pGpu->getProperty(pGpu, PDB_PROP_GPU_RUSD_POLLING_SUPPORT_MONOLITHIC))); +} + NV_STATUS gpushareddataConstruct_IMPL ( @@ -56,11 +76,7 @@ gpushareddataConstruct_IMPL if (IS_VIRTUAL(pGpu)) return NV_ERR_NOT_SUPPORTED; - // - // RUSD polling temporarily disabled on non-GSP due to collisions with VSYNC interrupt - // on high refresh rate monitors. See Bug 4432698. - // - if (!IS_GSP_CLIENT(pGpu) && (pAllocParams->polledDataMask != 0U)) + if (!_rusdPollingSupported(pGpu) && (pAllocParams->polledDataMask != 0U)) return NV_ERR_NOT_SUPPORTED; if (RS_IS_COPY_CTOR(pParams)) @@ -108,8 +124,10 @@ _gpushareddataUpdateSeqOpen volatile NvU64 *pSeq ) { + NvU64 seqVal; + // Initialize seq to RUSD_SEQ_START at first write. If never written before, seq is treated as an invalid timestamp - if (*pSeq == 0LLU) + if (MEM_RD64(pSeq) == 0LLU) { portAtomicExSetU64(pSeq, RUSD_SEQ_START + 1); } @@ -120,7 +138,9 @@ _gpushareddataUpdateSeqOpen portAtomicMemoryFenceStore(); - NV_ASSERT(!RUSD_SEQ_DATA_VALID(*pSeq)); + seqVal = MEM_RD64(pSeq); + + NV_ASSERT(!RUSD_SEQ_DATA_VALID(seqVal)); } // Called after finishing a non-polled data write, changes seq invalid->valid @@ -130,10 +150,14 @@ _gpushareddataUpdateSeqClose volatile NvU64 *pSeq ) { + NvU64 seqVal; + portAtomicExIncrementU64(pSeq); portAtomicMemoryFenceStore(); - NV_ASSERT(RUSD_SEQ_DATA_VALID(*pSeq)); + seqVal = MEM_RD64(pSeq); + + NV_ASSERT(RUSD_SEQ_DATA_VALID(seqVal)); } @@ -167,15 +191,6 @@ void gpushareddataWriteFinish_INTERNAL(OBJGPU *pGpu, NvU64 offset) } _gpushareddataUpdateSeqClose((volatile NvU64*)(((NvU8*)pSharedData) + offset)); - - // Clone data until UMDs can migrate to new data locations across branches - // TODO Remove this - if (offset == NV_OFFSETOF(NV00DE_SHARED_DATA, bar1MemoryInfo)) - { - pSharedData->bar1Size = pSharedData->bar1MemoryInfo.bar1Size; - pSharedData->bar1AvailSize = pSharedData->bar1MemoryInfo.bar1AvailSize; - pSharedData->seq = pSharedData->bar1MemoryInfo.lastModifiedTimestamp; - } } static NV_STATUS @@ -194,6 +209,13 @@ _gpushareddataInitGsp pGpu->hInternalSubdevice, NV2080_CTRL_CMD_INTERNAL_INIT_USER_SHARED_DATA, ¶ms, sizeof(params))); + + if (pGpu->userSharedData.pollingRegistryOverride == NV_REG_STR_RM_DEBUG_RUSD_POLLING_FORCE_ENABLE) + { + // If polling is forced always on, start polling during init and never stop + return _gpushareddataSendDataPollRpc(pGpu, ~0ULL); + } + return NV_OK; } @@ -261,6 +283,34 @@ gpuDestroyRusdMemory_IMPL pData->pMapBuffer = NULL; } +static NV_STATUS +_gpushareddataSendDataPollRpc +( + OBJGPU *pGpu, + NvU64 polledDataMask +) +{ + NV2080_CTRL_INTERNAL_USER_SHARED_DATA_SET_DATA_POLL_PARAMS params; + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + + if (polledDataMask == pGpu->userSharedData.lastPolledDataMask) + return NV_OK; // Nothing to do + + portMemSet(¶ms, 0, sizeof(params)); + + params.polledDataMask = polledDataMask; + + // Send updated data request to GSP + NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, pGpu->hInternalClient, + pGpu->hInternalSubdevice, + NV2080_CTRL_CMD_INTERNAL_USER_SHARED_DATA_SET_DATA_POLL, + ¶ms, sizeof(params))); + + pGpu->userSharedData.lastPolledDataMask = polledDataMask; + + return NV_OK; +} + static NV_STATUS _gpushareddataRequestDataPoll ( @@ -269,8 +319,6 @@ _gpushareddataRequestDataPoll ) { OBJGPU *pGpu = staticCast(pData, Memory)->pGpu; - RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); - NV2080_CTRL_INTERNAL_USER_SHARED_DATA_SET_DATA_POLL_PARAMS params; NvU64 polledDataUnion = 0U; RmClient **ppClient; @@ -298,20 +346,7 @@ _gpushareddataRequestDataPoll } } - if (polledDataUnion == pGpu->userSharedData.lastPolledDataMask) - return NV_OK; // Nothing to do - - params.polledDataMask = polledDataUnion; - - // Send updated data request to GSP - NV_ASSERT_OK_OR_RETURN(pRmApi->Control(pRmApi, pGpu->hInternalClient, - pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_INTERNAL_USER_SHARED_DATA_SET_DATA_POLL, - ¶ms, sizeof(params))); - - pGpu->userSharedData.lastPolledDataMask = polledDataUnion; - - return NV_OK; + return _gpushareddataSendDataPollRpc(pGpu, polledDataUnion); } NV_STATUS @@ -321,5 +356,14 @@ gpushareddataCtrlCmdRequestDataPoll_IMPL NV00DE_CTRL_REQUEST_DATA_POLL_PARAMS *pParams ) { + OBJGPU *pGpu = staticCast(pData, Memory)->pGpu; + + // Polling is always forced on, no point routing to GSP because we will never change state + if (pGpu->userSharedData.pollingRegistryOverride == NV_REG_STR_RM_DEBUG_RUSD_POLLING_FORCE_ENABLE) + return NV_OK; + + if (!_rusdPollingSupported(pGpu) && (pParams->polledDataMask != 0U)) + return NV_ERR_NOT_SUPPORTED; + return _gpushareddataRequestDataPoll(pData, pParams->polledDataMask); } diff --git a/src/nvidia/src/kernel/gpu/gpu_vgpu.c b/src/nvidia/src/kernel/gpu/gpu_vgpu.c index 515986805d..dd18ee8c98 100644 --- a/src/nvidia/src/kernel/gpu/gpu_vgpu.c +++ b/src/nvidia/src/kernel/gpu/gpu_vgpu.c @@ -253,6 +253,8 @@ gpuIsGlobalPoisonFuseEnabled_VF ) { VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); + NV_ASSERT_OR_RETURN(pVSI != NULL, NV_FALSE); + return pVSI->poisonFuseEnabled; } diff --git a/src/nvidia/src/kernel/gpu/gpuvideo/videoeventlist.c b/src/nvidia/src/kernel/gpu/gpuvideo/videoeventlist.c index 9b45b5e0d4..43dace10fc 100644 --- a/src/nvidia/src/kernel/gpu/gpuvideo/videoeventlist.c +++ b/src/nvidia/src/kernel/gpu/gpuvideo/videoeventlist.c @@ -39,6 +39,7 @@ #include "os/os.h" #include "gpuvideo/video_event.h" #include "gpuvideo/videoeventlist.h" +#include "gpuvideo/rmifvideng.h" #include "kernel/gpu/timer/objtmr.h" #include "kernel/gpu/video/kernel_video_engine.h" #include "kernel/gpu/fifo/kernel_channel_group.h" @@ -107,9 +108,31 @@ videoEventTraceCtxInit } // write kernel event buffer address - NvU64 dmaAddr = memdescGetPhysAddr(pKernelVideoEngine->videoTraceInfo.pTraceBufferEngineMemDesc, AT_GPU, 0); + MEMORY_DESCRIPTOR *pMemDesc = pKernelVideoEngine->videoTraceInfo.pTraceBufferEngineMemDesc; + NvU64 dmaAddr = memdescGetPhysAddr(pMemDesc, AT_GPU, 0); + RM_VIDENG_DMAIDX_TYPE memPhysType = RM_VIDENG_DMAIDX_END; + if (memdescGetAddressSpace(pMemDesc) == ADDR_FBMEM) + { + memPhysType = RM_VIDENG_DMAIDX_PHYS_VID; + } + else if ((memdescGetAddressSpace(pMemDesc) == ADDR_SYSMEM) && + (memdescGetCpuCacheAttrib(pMemDesc) == NV_MEMORY_CACHED)) + { + memPhysType = RM_VIDENG_DMAIDX_PHYS_SYS_COH; + } + else if ((memdescGetAddressSpace(pMemDesc) == ADDR_SYSMEM) && + (memdescGetCpuCacheAttrib(pMemDesc) == NV_MEMORY_UNCACHED || + memdescGetCpuCacheAttrib(pMemDesc) == NV_MEMORY_WRITECOMBINED)) + { + memPhysType = RM_VIDENG_DMAIDX_PHYS_SYS_NCOH; + } + + NV_ASSERT_OR_ELSE((memdescGetContiguity(pMemDesc, AT_GPU) && memPhysType != RM_VIDENG_DMAIDX_END), + dmaAddr = 0; memPhysType = 0;); + MEM_WR32(pInstMem + VIDEO_ENGINE_EVENT__TRACE_ADDR__OFFSET_LO, NvU64_LO32(dmaAddr)); MEM_WR32(pInstMem + VIDEO_ENGINE_EVENT__TRACE_ADDR__OFFSET_HI, NvU64_HI32(dmaAddr)); + MEM_WR32(pInstMem + VIDEO_ENGINE_EVENT__TRACE_ADDR__MEM_TARGET, (NvU32)memPhysType); kbusUnmapRmAperture_HAL(pGpu, pCtxMemDesc, &pInstMem, NV_TRUE); } @@ -525,7 +548,8 @@ videoAddBindpoint bSelectLOD = NV_TRUE; #endif - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); if (!kvidengIsVideoTraceLogSupported(pGpu)) return NV_ERR_NOT_SUPPORTED; diff --git a/src/nvidia/src/kernel/gpu/gr/arch/ampere/kgraphics_ga100.c b/src/nvidia/src/kernel/gpu/gr/arch/ampere/kgraphics_ga100.c index 848f508348..197db7cc92 100644 --- a/src/nvidia/src/kernel/gpu/gr/arch/ampere/kgraphics_ga100.c +++ b/src/nvidia/src/kernel/gpu/gr/arch/ampere/kgraphics_ga100.c @@ -56,7 +56,7 @@ kgraphicsSetFecsTraceHwEnable_GA100 GPU_VREG_WR32(pGpu, NV_VIRTUAL_FUNCTION_PRIV_MAILBOX_SCRATCH(NV_VF_SCRATCH_REGISTER_FECS_TRACE_RD_RD_OFFSET), data); - pKernelGraphics->bCtxswLoggingEnabled = bEnable; + kgraphicsSetCtxswLoggingEnabled(pGpu, pKernelGraphics, bEnable); } /*! @@ -93,7 +93,7 @@ kgraphicsSetFecsTraceRdOffset_GA100 NvU32 data = 0; data = FLD_SET_DRF_NUM(_CTXSW, _TIMESTAMP_BUFFER, _RD_WR_POINTER, rdOffset, data); - if (pKernelGraphics->bCtxswLoggingEnabled) + if (kgraphicsIsCtxswLoggingEnabled(pGpu, pKernelGraphics)) data = FLD_SET_DRF(_CTXSW, _TIMESTAMP_BUFFER, _MAILBOX1_TRACE_FEATURE, _ENABLED, data); GPU_VREG_WR32(pGpu, diff --git a/src/nvidia/src/kernel/gpu/gr/arch/blackwell/kgraphics_gb100.c b/src/nvidia/src/kernel/gpu/gr/arch/blackwell/kgraphics_gb100.c index 18e3ebb0f1..85795a0fe7 100644 --- a/src/nvidia/src/kernel/gpu/gr/arch/blackwell/kgraphics_gb100.c +++ b/src/nvidia/src/kernel/gpu/gr/arch/blackwell/kgraphics_gb100.c @@ -53,7 +53,7 @@ kgraphicsSetFecsTraceHwEnable_GB100 GPU_VREG_WR32(pGpu, NV_VIRTUAL_FUNCTION_PRIV_MAILBOX_SCRATCH(NV_VF_SCRATCH_REGISTER_FECS_TRACE_RD_RD_OFFSET), data); - pKernelGraphics->bCtxswLoggingEnabled = bEnable; + kgraphicsSetCtxswLoggingEnabled(pGpu, pKernelGraphics, bEnable); } /*! @@ -72,7 +72,7 @@ kgraphicsSetFecsTraceRdOffset_GB100 NvU32 data = 0; data = FLD_SET_DRF_NUM(_CTXSW, _TIMESTAMP_BUFFER, _RD_WR_POINTER, rdOffset, data); - if (pKernelGraphics->bCtxswLoggingEnabled) + if (kgraphicsIsCtxswLoggingEnabled(pGpu, pKernelGraphics)) data = FLD_SET_DRF(_CTXSW, _TIMESTAMP_BUFFER, _MAILBOX1_TRACE_FEATURE, _ENABLED, data); GPU_VREG_WR32(pGpu, diff --git a/src/nvidia/src/kernel/gpu/gr/arch/pascal/kgraphics_gp100.c b/src/nvidia/src/kernel/gpu/gr/arch/pascal/kgraphics_gp100.c index 582dbe893f..48c6d199da 100644 --- a/src/nvidia/src/kernel/gpu/gr/arch/pascal/kgraphics_gp100.c +++ b/src/nvidia/src/kernel/gpu/gr/arch/pascal/kgraphics_gp100.c @@ -64,7 +64,7 @@ kgraphicsSetFecsTraceRdOffset_GP100 data = FLD_SET_DRF_NUM(_CTXSW, _TIMESTAMP_BUFFER, _RD_WR_POINTER, rdOffset, data); - if (pKernelGraphics->bCtxswLoggingEnabled) + if (kgraphicsIsCtxswLoggingEnabled(pGpu, pKernelGraphics)) data = FLD_SET_DRF(_CTXSW, _TIMESTAMP_BUFFER, _MAILBOX1_TRACE_FEATURE, _ENABLED, data); GPU_REG_WR32(pGpu, NV_PGRAPH_PRI_FECS_FALCON_MAILBOX1, data); @@ -102,7 +102,7 @@ kgraphicsSetFecsTraceHwEnable_GP100 data = FLD_SET_DRF(_CTXSW, _TIMESTAMP_BUFFER, _MAILBOX1_TRACE_FEATURE, _ENABLED, data); GPU_REG_WR32(pGpu, NV_PGRAPH_PRI_FECS_FALCON_MAILBOX1, data); - pKernelGraphics->bCtxswLoggingEnabled = bEnable; + kgraphicsSetCtxswLoggingEnabled(pGpu, pKernelGraphics, bEnable); } void diff --git a/src/nvidia/src/kernel/gpu/gr/arch/turing/kgraphics_tu102.c b/src/nvidia/src/kernel/gpu/gr/arch/turing/kgraphics_tu102.c index e3d9e6b8f4..ae9e4156ed 100644 --- a/src/nvidia/src/kernel/gpu/gr/arch/turing/kgraphics_tu102.c +++ b/src/nvidia/src/kernel/gpu/gr/arch/turing/kgraphics_tu102.c @@ -396,6 +396,8 @@ kgraphicsCreateBug4208224Channel_TU102 case NV_REG_STR_RM_INST_LOC_USERD_DEFAULT: memAllocParams.attr = DRF_DEF(OS32, _ATTR, _LOCATION, _VIDMEM) | DRF_DEF(OS32, _ATTR, _ALLOCATE_FROM_RESERVED_HEAP, _YES); + memAllocParams.attr2 = DRF_DEF(OS32, _ATTR2, _INTERNAL, _YES); + memAllocParams.flags = NVOS32_ALLOC_FLAGS_FORCE_MEM_GROWS_DOWN; break; } diff --git a/src/nvidia/src/kernel/gpu/gr/fecs_event_list.c b/src/nvidia/src/kernel/gpu/gr/fecs_event_list.c index 43c8227b88..55c3eede14 100644 --- a/src/nvidia/src/kernel/gpu/gr/fecs_event_list.c +++ b/src/nvidia/src/kernel/gpu/gr/fecs_event_list.c @@ -1086,29 +1086,8 @@ nvEventBufferFecsCallback if (pFecsTraceInfo->fecsTraceCounter > 0) { - NvHandle hClient; - NvHandle hSubdevice; - NV2080_CTRL_INTERNAL_GR_SET_FECS_TRACE_RD_OFFSET_PARAMS params; + kgraphicsSetFecsTraceRdOffset_HAL(pGpu, pKernelGraphics, fecsReadOffset); - params.offset = fecsReadOffset; - NV_ASSERT_OK_OR_ELSE( - status, - _fecsLoadInternalRoutingInfo(pGpu, - pKernelGraphics, - &hClient, - &hSubdevice, - ¶ms.grRouteInfo), - return); - - NV_ASSERT_OK_OR_ELSE( - status, - pRmApi->Control(pRmApi, - hClient, - hSubdevice, - NV2080_CTRL_CMD_INTERNAL_GR_SET_FECS_TRACE_RD_OFFSET, - ¶ms, - sizeof(params)), - return); pFecsTraceInfo->fecsTraceCounter = 0; } pFecsTraceInfo->fecsTraceRdOffset = fecsReadOffset; @@ -1169,7 +1148,8 @@ fecsAddBindpoint bSelectLOD = NV_TRUE; #endif - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); // Early bail-out if profiling capability is not enabled on vGPU if (IS_VIRTUAL(pGpu)) @@ -1187,7 +1167,7 @@ fecsAddBindpoint // On a hypervisor or VM: bail-out early if admin is required if (IS_VIRTUAL(pGpu) || hypervisorIsVgxHyper()) { - if (pGpu->bRmProfilingPrivileged && !bAdmin) + if (pGpu->bRmProfilingPrivileged && !(bAdmin || osCheckAccess(RS_ACCESS_PERFMON))) { if (pReasonCode != NULL) *pReasonCode = NV2080_CTRL_GR_FECS_BIND_REASON_CODE_NEED_ADMIN; diff --git a/src/nvidia/src/kernel/gpu/gr/kernel_graphics.c b/src/nvidia/src/kernel/gpu/gr/kernel_graphics.c index 2681a2cba4..c657755a01 100644 --- a/src/nvidia/src/kernel/gpu/gr/kernel_graphics.c +++ b/src/nvidia/src/kernel/gpu/gr/kernel_graphics.c @@ -28,6 +28,7 @@ #include "kernel/gpu/gr/kernel_graphics_manager.h" #include "kernel/gpu/gr/kernel_graphics.h" +#include "kernel/gpu/gpu_user_shared_data.h" #include "kernel/gpu/mig_mgr/kernel_mig_manager.h" #include "kernel/gpu/device/device.h" #include "kernel/gpu/subdevice/subdevice.h" @@ -152,7 +153,7 @@ kgraphicsConstructEngine_IMPL { GR_CTX_BUFFER_PAGEPOOL, DRF_VAL(_REG_STR_RM, _INST_LOC_3, _GFXP_PAGEPOOL_BUFFER, pGpu->instLocOverrides3) }, { GR_CTX_BUFFER_SPILL, DRF_VAL(_REG_STR_RM, _INST_LOC_3, _GFXP_SPILL_BUFFER, pGpu->instLocOverrides3) }, { GR_CTX_BUFFER_RTV_CB, DRF_VAL(_REG_STR_RM, _INST_LOC_3, _GFXP_RTVCB_BUFFER, pGpu->instLocOverrides3) }, - { GR_CTX_BUFFER_SETUP, DRF_VAL(_REG_STR_RM, _INST_LOC_4, _GFXP_SETUP_BUFFER, pGpu->instLocOverrides4) } + { GR_CTX_BUFFER_SETUP, DRF_VAL(_REG_STR_RM, _INST_LOC_4, _GFXP_SETUP_BUFFER, pGpu->instLocOverrides3) } // update to instLocOverrides4 when changes are in }; for (idx = 0; idx < NV_ARRAY_ELEMENTS(instlocOverrides); ++idx) @@ -300,26 +301,10 @@ kgraphicsStateInitLocked_IMPL portMemSet(pKernelGraphics->globalCtxBuffersInfo.pGlobalCtxBuffers, 0, sizeof(*pKernelGraphics->globalCtxBuffersInfo.pGlobalCtxBuffers) * nGlobalCtx); - if (pKernelGraphics->instance == 0) - { - // - // GSP_CLIENT creates the golden context channel GR post load. However, - // if PMA scrubber is enabled, a scrubber channel must be constructed - // first as a part of Fifo post load. Hence, add the golden channel - // creation as a fifo post-scheduling-enablement callback. - // - NV_ASSERT_OK_OR_RETURN( - kfifoAddSchedulingHandler(pGpu, GPU_GET_KERNEL_FIFO(pGpu), - _kgraphicsPostSchedulingEnableHandler, - (void *)((NvUPtr)(pKernelGraphics->instance)), - NULL, NULL)); - } - if (pGpu->getProperty(pGpu, PDB_PROP_GPU_IS_ALL_INST_IN_SYSMEM)) { kgraphicsSetBug4208224WAREnabled(pGpu, pKernelGraphics, NV_FALSE); } - pKernelGraphics->bug4208224Info.hClient = NV01_NULL_OBJECT; pKernelGraphics->bug4208224Info.hDeviceId = NV01_NULL_OBJECT; pKernelGraphics->bug4208224Info.hSubdeviceId = NV01_NULL_OBJECT; @@ -363,6 +348,21 @@ kgraphicsStateLoad_IMPL fecsBufferReset(pGpu, pKernelGraphics); } + if (pKernelGraphics->instance == 0) + { + // + // GSP_CLIENT creates the golden context channel GR post load. However, + // if PMA scrubber is enabled, a scrubber channel must be constructed + // first as a part of Fifo post load. Hence, add the golden channel + // creation as a fifo post-scheduling-enablement callback. + // + NV_ASSERT_OK_OR_RETURN( + kfifoAddSchedulingHandler(pGpu, GPU_GET_KERNEL_FIFO(pGpu), + _kgraphicsPostSchedulingEnableHandler, + (void *)((NvUPtr)(pKernelGraphics->instance)), + NULL, NULL)); + } + return NV_OK; } @@ -505,7 +505,7 @@ _kgraphicsPostSchedulingEnableHandler } } NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, kgraphicsCreateGoldenImageChannel(pGpu, pKernelGraphics)); - if (kgraphicsIsBug4208224WARNeeded_HAL(pGpu, pKernelGraphics) && !pGpu->getProperty(pGpu, PDB_PROP_GPU_IN_PM_RESUME_CODEPATH)) + if (kgraphicsIsBug4208224WARNeeded_HAL(pGpu, pKernelGraphics)) { return kgraphicsInitializeBug4208224WAR_HAL(pGpu, pKernelGraphics); } @@ -2151,9 +2151,21 @@ kgraphicsCreateGoldenImageChannel_IMPL // So explicitly release GPU locks before RmVidHeapControl // See Bug 1735851-#24 // - rmGpuLocksRelease(GPUS_LOCK_FLAGS_NONE, NULL); - bAcquireLock = NV_TRUE; - pRmApi = rmapiGetInterface(RMAPI_API_LOCK_INTERNAL); + if (rmapiLockIsOwner()) + { + rmGpuLocksRelease(GPUS_LOCK_FLAGS_NONE, NULL); + bAcquireLock = NV_TRUE; + pRmApi = rmapiGetInterface(RMAPI_API_LOCK_INTERNAL); + } + else if (rmapiInRtd3PmPath()) + { + pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); + } + else + { + NV_PRINTF(LEVEL_ERROR, "Caller missing proper locks\n"); + return NV_ERR_INVALID_LOCK_STATE; + } // Create a new VAspace for channel portMemSet(&vaParams, 0, sizeof(NV_VASPACE_ALLOCATION_PARAMETERS)); @@ -2245,6 +2257,8 @@ kgraphicsCreateGoldenImageChannel_IMPL case NV_REG_STR_RM_INST_LOC_USERD_VID: case NV_REG_STR_RM_INST_LOC_USERD_DEFAULT: memAllocParams.attr = DRF_DEF(OS32, _ATTR, _LOCATION, _VIDMEM); + memAllocParams.attr2 = DRF_DEF(OS32, _ATTR2, _INTERNAL, _YES); + memAllocParams.flags = NVOS32_ALLOC_FLAGS_FORCE_MEM_GROWS_DOWN; break; } @@ -2551,7 +2565,7 @@ deviceCtrlCmdKGrGetCaps_IMPL NvU8 *pGrCaps = NvP64_VALUE(pParams->capsTbl); NvBool bCapsPopulated = NV_FALSE; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (IsDFPGA(pGpu)) { @@ -2603,7 +2617,7 @@ deviceCtrlCmdKGrGetCapsV2_IMPL { OBJGPU *pGpu = GPU_RES_GET_GPU(pDevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (IsDFPGA(pGpu)) { @@ -2715,7 +2729,7 @@ deviceCtrlCmdKGrGetInfo_IMPL NvU32 grInfoListSize = NV_MIN(pParams->grInfoListSize, NV0080_CTRL_GR_INFO_MAX_SIZE); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_CHECK_OR_RETURN(LEVEL_ERROR, pGrInfos != NULL, NV_ERR_INVALID_ARGUMENT); @@ -2747,7 +2761,7 @@ deviceCtrlCmdKGrGetInfoV2_IMPL { OBJGPU *pGpu = GPU_RES_GET_GPU(pDevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, _kgraphicsCtrlCmdGrGetInfoV2(pGpu, pDevice, pParams)); @@ -2831,7 +2845,7 @@ subdeviceCtrlCmdKGrGetCapsV2_IMPL NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, kgrmgrCtrlRouteKGRWithDevice(pGpu, pKernelGraphicsManager, pDevice, &grRouteInfo, &pKernelGraphics)); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); const KGRAPHICS_STATIC_INFO *pKernelGraphicsStaticInfo = kgraphicsGetStaticInfo(pGpu, pKernelGraphics); if (pKernelGraphicsStaticInfo == NULL) @@ -2879,7 +2893,8 @@ subdeviceCtrlCmdKGrGetInfo_IMPL KernelGraphicsManager *pKernelGraphicsManager = GPU_GET_KERNEL_GRAPHICS_MANAGER(pGpu); NV_CHECK_OR_RETURN(LEVEL_ERROR, pKernelGraphicsManager != NULL, NV_ERR_NOT_SUPPORTED); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); NV_CHECK_OR_RETURN(LEVEL_ERROR, pGrInfos != NULL, NV_ERR_INVALID_ARGUMENT); @@ -2913,7 +2928,8 @@ subdeviceCtrlCmdKGrGetInfoV2_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); Device *pDevice = GPU_RES_GET_DEVICE(pSubdevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, _kgraphicsCtrlCmdGrGetInfoV2(pGpu, pDevice, pParams)); @@ -2942,7 +2958,8 @@ subdeviceCtrlCmdKGrGetSmToGpcTpcMappings_IMPL const KGRAPHICS_STATIC_INFO *pStaticInfo; NvU32 i; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); if (kmigmgrIsDeviceUsingDeviceProfiling(pGpu, pKernelMIGManager, pDevice)) { @@ -2989,7 +3006,8 @@ subdeviceCtrlCmdKGrGetGlobalSmOrder_IMPL const KGRAPHICS_STATIC_INFO *pStaticInfo; NvU32 i; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); if (kmigmgrIsDeviceUsingDeviceProfiling(pGpu, pKernelMIGManager, pDevice)) { @@ -3045,7 +3063,7 @@ subdeviceCtrlCmdKGrGetSmIssueRateModifier_IMPL const KGRAPHICS_STATIC_INFO *pStaticInfo; KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (kmigmgrIsDeviceUsingDeviceProfiling(pGpu, pKernelMIGManager, pDevice)) { @@ -3104,7 +3122,8 @@ subdeviceCtrlCmdKGrGetGpcMask_IMPL const KGRAPHICS_STATIC_INFO *pKernelGraphicsStaticInfo; KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); if (!IS_MIG_IN_USE(pGpu) || kmigmgrIsDeviceUsingDeviceProfiling(pGpu, pKernelMIGManager, pDevice)) @@ -3151,7 +3170,8 @@ subdeviceCtrlCmdKGrGetTpcMask_IMPL KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); NvU32 gpcCount; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); if (!IS_MIG_IN_USE(pGpu) || kmigmgrIsDeviceUsingDeviceProfiling(pGpu, pKernelMIGManager, pDevice)) @@ -3233,7 +3253,8 @@ subdeviceCtrlCmdKGrGetPpcMask_IMPL const KGRAPHICS_STATIC_INFO *pKernelGraphicsStaticInfo; KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); if (kmigmgrIsDeviceUsingDeviceProfiling(pGpu, pKernelMIGManager, pDevice)) { @@ -3282,7 +3303,8 @@ subdeviceCtrlCmdKGrFecsBindEvtbufForUid_IMPL NvHandle hClient = RES_GET_CLIENT_HANDLE(pSubdevice); NvBool bMIGInUse = IS_MIG_IN_USE(pGpu); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); NV_ASSERT_OK_OR_RETURN( serverutilGetResourceRefWithType(hClient, pParams->hEventBuffer, classId(EventBuffer), &pEventBufferRef)); @@ -3326,7 +3348,8 @@ subdeviceCtrlCmdKGrFecsBindEvtbufForUidV2_IMPL NvHandle hClient = RES_GET_CLIENT_HANDLE(pSubdevice); pParams->reasonCode = NV2080_CTRL_GR_FECS_BIND_REASON_CODE_NONE; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); NV_ASSERT_OK_OR_RETURN( serverutilGetResourceRefWithType(hClient, pParams->hEventBuffer, classId(EventBuffer), &pEventBufferRef)); @@ -3366,7 +3389,8 @@ subdeviceCtrlCmdKGrGetPhysGpcMask_IMPL KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); NvU32 grIdx = 0; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); if (!IS_MIG_ENABLED(pGpu)) { @@ -3436,7 +3460,8 @@ subdeviceCtrlCmdKGrGetZcullMask_IMPL const KGRAPHICS_STATIC_INFO *pKernelGraphicsStaticInfo; KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); if (kmigmgrIsDeviceUsingDeviceProfiling(pGpu, pKernelMIGManager, pDevice)) { @@ -3491,7 +3516,7 @@ subdeviceCtrlCmdKGrGetZcullInfo_IMPL KernelGraphics *pKernelGraphics; const KGRAPHICS_STATIC_INFO *pKernelGraphicsStaticInfo; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (pKernelGraphicsManager == NULL) { @@ -3533,7 +3558,8 @@ subdeviceCtrlCmdKGrCtxswPmMode_IMPL KernelGraphicsContext *pKernelGraphicsContext; RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); if (pParams->pmMode != NV2080_CTRL_CTXSW_PM_MODE_NO_CTXSW) { @@ -3590,7 +3616,7 @@ subdeviceCtrlCmdKGrGetROPInfo_IMPL KernelGraphics *pKernelGraphics; const KGRAPHICS_STATIC_INFO *pKernelGraphicsStaticInfo; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); portMemSet(&grRouteInfo, 0, sizeof(grRouteInfo)); NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, @@ -3631,7 +3657,7 @@ subdeviceCtrlCmdKGrGetAttributeBufferSize_IMPL Device *pDevice = GPU_RES_GET_DEVICE(pSubdevice); NvU32 engineId; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); portMemSet(&grRouteInfo, 0, sizeof(grRouteInfo)); NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, @@ -3677,7 +3703,7 @@ subdeviceCtrlCmdKGrGetEngineContextProperties_IMPL NvU32 alignment = RM_PAGE_SIZE; NvU32 engineId; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); engineId = DRF_VAL(0080_CTRL_FIFO, _GET_ENGINE_CONTEXT_PROPERTIES, _ENGINE_ID, pParams->engineId); @@ -3751,7 +3777,8 @@ subdeviceCtrlCmdKGrGetCtxBufferSize_IMPL NvU64 prevAlignment; NvU32 i; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); // // vGPU: @@ -3858,7 +3885,7 @@ subdeviceCtrlCmdKGrGetCtxBufferInfo_IMPL KernelChannel *pKernelChannel; KernelGraphicsContext *pKernelGraphicsContext; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // // vGPU: @@ -3934,7 +3961,7 @@ subdeviceCtrlCmdKGrGetCtxBufferPtes_IMPL KernelChannel *pKernelChannel; KernelGraphicsContext *pKernelGraphicsContext; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // // Currently, ROUTE_TO_VGPU_HOST instructs resource server to call the RPC @@ -4016,7 +4043,7 @@ subdeviceCtrlCmdKGrGetGfxGpcAndTpcInfo_IMPL const KGRAPHICS_STATIC_INFO *pKernelGraphicsStaticInfo; Device *pDevice = GPU_RES_GET_DEVICE(pSubdevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, kgrmgrCtrlRouteKGRWithDevice(pGpu, pKernelGraphicsManager, pDevice, @@ -4050,7 +4077,8 @@ subdeviceCtrlCmdGrInternalSetFecsTraceHwEnable_IMPL NV_STATUS status = NV_OK; KernelGraphics *pKernelGraphics; - LOCK_ASSERT_AND_RETURN(rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); NV_CHECK_OK_OR_RETURN( LEVEL_ERROR, @@ -4077,7 +4105,8 @@ subdeviceCtrlCmdGrInternalGetFecsTraceHwEnable_IMPL NV_STATUS status = NV_OK; KernelGraphics *pKernelGraphics; - LOCK_ASSERT_AND_RETURN(rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); NV_CHECK_OK_OR_RETURN( LEVEL_ERROR, @@ -4103,7 +4132,8 @@ subdeviceCtrlCmdGrInternalSetFecsTraceRdOffset_IMPL NV_STATUS status = NV_OK; KernelGraphics *pKernelGraphics; - LOCK_ASSERT_AND_RETURN(rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); NV_CHECK_OK_OR_RETURN( LEVEL_ERROR, @@ -4129,7 +4159,8 @@ subdeviceCtrlCmdGrInternalGetFecsTraceRdOffset_IMPL NV_STATUS status = NV_OK; KernelGraphics *pKernelGraphics; - LOCK_ASSERT_AND_RETURN(rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); NV_CHECK_OK_OR_RETURN( LEVEL_ERROR, @@ -4155,7 +4186,8 @@ subdeviceCtrlCmdGrInternalSetFecsTraceWrOffset_IMPL NV_STATUS status = NV_OK; KernelGraphics *pKernelGraphics; - LOCK_ASSERT_AND_RETURN(rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); NV_CHECK_OK_OR_RETURN( LEVEL_ERROR, @@ -4167,3 +4199,14 @@ subdeviceCtrlCmdGrInternalSetFecsTraceWrOffset_IMPL return status; } + +NvBool kgraphicsIsCtxswLoggingEnabled_FWCLIENT(OBJGPU *pGpu, KernelGraphics *pKernelGraphics) +{ + RUSD_GR_INFO grInfo; + + RUSD_READ_DATA((NV00DE_SHARED_DATA*)(pGpu->userSharedData.pMapBuffer), grInfo, &grInfo); + pKernelGraphics->bCtxswLoggingEnabled = grInfo.bCtxswLoggingEnabled; + + return pKernelGraphics->bCtxswLoggingEnabled; +} + diff --git a/src/nvidia/src/kernel/gpu/gr/kernel_graphics_context.c b/src/nvidia/src/kernel/gpu/gr/kernel_graphics_context.c index c211436d08..5a47a1e3d6 100644 --- a/src/nvidia/src/kernel/gpu/gr/kernel_graphics_context.c +++ b/src/nvidia/src/kernel/gpu/gr/kernel_graphics_context.c @@ -1697,7 +1697,7 @@ kgrctxPrepareInitializeCtxBuffer_IMPL NvBool *pbAddEntry ) { - MEMORY_DESCRIPTOR *pMemDesc; + MEMORY_DESCRIPTOR *pMemDesc = NULL; KernelGraphicsContextUnicast *pKernelGraphicsContextUnicast; NvU32 physAttr; @@ -1869,7 +1869,7 @@ kgrctxPreparePromoteCtxBuffer_IMPL ) { KernelGraphicsContextUnicast *pKernelGraphicsContextUnicast; - VA_LIST *pVaList; + VA_LIST *pVaList = NULL; NvU64 vaddr; NvU64 refCount; OBJGVASPACE *pGVAS = dynamicCast(pKernelChannel->pVAS, OBJGVASPACE); @@ -2355,6 +2355,9 @@ kgrctxUnmapCtxPreemptionBuffers_IMPL kgraphicsUnmapCtxBuffer(pGpu, pKernelGraphics, pVAS, &pKernelGraphicsContextUnicast->pagepoolCtxswBuffer.vAddrList); kgraphicsUnmapCtxBuffer(pGpu, pKernelGraphics, pVAS, &pKernelGraphicsContextUnicast->rtvCbCtxswBuffer.vAddrList); + + if (kgraphicsGetPeFiroBufferEnabled(pGpu, pKernelGraphics)) + kgraphicsUnmapCtxBuffer(pGpu, pKernelGraphics, pVAS, &pKernelGraphicsContextUnicast->setupCtxswBuffer.vAddrList); } /** @@ -2882,6 +2885,13 @@ kgrctxFreeCtxPreemptionBuffers_IMPL memdescFree(pKernelGraphicsContextUnicast->rtvCbCtxswBuffer.pMemDesc); memdescDestroy(pKernelGraphicsContextUnicast->rtvCbCtxswBuffer.pMemDesc); pKernelGraphicsContextUnicast->rtvCbCtxswBuffer.pMemDesc = NULL; + + if (pKernelGraphicsContextUnicast->setupCtxswBuffer.pMemDesc != NULL) + { + memdescFree(pKernelGraphicsContextUnicast->setupCtxswBuffer.pMemDesc); + memdescDestroy(pKernelGraphicsContextUnicast->setupCtxswBuffer.pMemDesc); + pKernelGraphicsContextUnicast->setupCtxswBuffer.pMemDesc = NULL; + } } /*! @@ -3324,7 +3334,7 @@ kgrctxCtrlGetTpcPartitionMode_IMPL { OBJGPU *pGpu = GPU_RES_GET_GPU(pKernelGraphicsContext); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (IS_GSP_CLIENT(pGpu)) { @@ -3355,7 +3365,7 @@ kgrctxCtrlSetTpcPartitionMode_IMPL { OBJGPU *pGpu = GPU_RES_GET_GPU(pKernelGraphicsContext); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (IS_GSP_CLIENT(pGpu)) { @@ -3386,7 +3396,7 @@ kgrctxCtrlGetMMUDebugMode_IMPL { OBJGPU *pGpu = GPU_RES_GET_GPU(pKernelGraphicsContext); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (IS_GSP_CLIENT(pGpu)) { @@ -3417,7 +3427,7 @@ kgrctxCtrlProgramVidmemPromote_IMPL { OBJGPU *pGpu = GPU_RES_GET_GPU(pKernelGraphicsContext); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (IS_VIRTUAL(pGpu) || IS_GSP_CLIENT(pGpu)) { @@ -3538,6 +3548,8 @@ shrkgrctxConstructUnicast_IMPL NV_ASSERT_OK_OR_RETURN(vaListInit(&pKernelGraphicsContextUnicast->betaCBCtxswBuffer.vAddrList)); NV_ASSERT_OK_OR_RETURN(vaListInit(&pKernelGraphicsContextUnicast->pagepoolCtxswBuffer.vAddrList)); NV_ASSERT_OK_OR_RETURN(vaListInit(&pKernelGraphicsContextUnicast->rtvCbCtxswBuffer.vAddrList)); + if (kgraphicsGetPeFiroBufferEnabled(pGpu, pKernelGraphics)) + NV_ASSERT_OK_OR_RETURN(vaListInit(&pKernelGraphicsContextUnicast->setupCtxswBuffer.vAddrList)); pKernelGraphicsContextUnicast->bSupportsPerSubctxHeader = kgraphicsIsPerSubcontextContextHeaderSupported(pGpu, pKernelGraphics); @@ -3610,6 +3622,7 @@ shrkgrctxDestructUnicast_IMPL vaListDestroy(&pKernelGraphicsContextUnicast->betaCBCtxswBuffer.vAddrList); vaListDestroy(&pKernelGraphicsContextUnicast->pagepoolCtxswBuffer.vAddrList); vaListDestroy(&pKernelGraphicsContextUnicast->rtvCbCtxswBuffer.vAddrList); + vaListDestroy(&pKernelGraphicsContextUnicast->setupCtxswBuffer.vAddrList); } /*! diff --git a/src/nvidia/src/kernel/gpu/gr/kernel_graphics_object.c b/src/nvidia/src/kernel/gpu/gr/kernel_graphics_object.c index 344bb5a758..17298a3cdc 100644 --- a/src/nvidia/src/kernel/gpu/gr/kernel_graphics_object.c +++ b/src/nvidia/src/kernel/gpu/gr/kernel_graphics_object.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -410,6 +410,7 @@ kgrobjSetComputeMmio_IMPL MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); NvU32 classNum = pChanDes->resourceDesc.externalClassId; NvU32 objType; + NV_ADDRESS_SPACE addrSpace; kgrmgrGetGrObjectType(classNum, &objType); @@ -421,25 +422,51 @@ kgrobjSetComputeMmio_IMPL if (pKernelGraphicsObject->pMmioMemDesc != NULL) return NV_OK; + if (pGpu->getProperty(pGpu, PDB_PROP_GPU_ZERO_FB)) + { + addrSpace = ADDR_SYSMEM; + } + else + { + addrSpace = ADDR_FBMEM; + } + // Set up MMIO memDesc to allow GPU mappings of compute object NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, memdescCreate(&pKernelGraphicsObject->pMmioMemDesc, pGpu, RM_PAGE_SIZE, 0, - NV_TRUE, ADDR_FBMEM, NV_MEMORY_UNCACHED, - MEMDESC_FLAGS_NONE)); + NV_TRUE, addrSpace, NV_MEMORY_UNCACHED, + MEMDESC_FLAGS_NONE)); // // The address field is completely ignored for these mappings. We use the // chid as the address strictly for debug purposes. // - memdescDescribe(pKernelGraphicsObject->pMmioMemDesc, ADDR_FBMEM /* Ignored */, + memdescDescribe(pKernelGraphicsObject->pMmioMemDesc, addrSpace /* Ignored */, RM_PAGE_SIZE * pChanDes->pKernelChannel->ChID, RM_PAGE_SIZE); + memdescSetPteKind(pKernelGraphicsObject->pMmioMemDesc, memmgrGetMessageKind_HAL(pGpu, pMemoryManager)); memmgrSetMemDescPageSize_HAL(pGpu, pMemoryManager, pKernelGraphicsObject->pMmioMemDesc, AT_GPU, RM_ATTR_PAGE_SIZE_4KB); + if (pGpu->getProperty(pGpu, PDB_PROP_GPU_ZERO_FB)) + { + // + // DMA mapping path in RM checks to make sure the sysmem page is actually allocated before allowing + // the mapping + // + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, memdescAlloc(pKernelGraphicsObject->pMmioMemDesc)); + + // + // Flag needed to differentiate between SKED and internal MMIO + // - SKED reflected surface is encoded with aperture = sysncoh and KIND = SKED + // - MMIO surface is encoded with aperture = syscoh and KIND = SKED + // + memdescSetFlag(pKernelGraphicsObject->pMmioMemDesc, MEMDESC_FLAGS_ALLOC_SKED_REFLECTED, NV_TRUE); + } + return NV_OK; } diff --git a/src/nvidia/src/kernel/gpu/gr/kernel_sm_debugger_session_ctrl.c b/src/nvidia/src/kernel/gpu/gr/kernel_sm_debugger_session_ctrl.c index 8416c021b1..56baf6c9d1 100644 --- a/src/nvidia/src/kernel/gpu/gr/kernel_sm_debugger_session_ctrl.c +++ b/src/nvidia/src/kernel/gpu/gr/kernel_sm_debugger_session_ctrl.c @@ -157,7 +157,7 @@ _nv8deCtrlCmdReadWriteSurface NvU32 i; NV_STATUS status = NV_OK; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (count > MAX_ACCESS_OPS) return NV_ERR_INVALID_ARGUMENT; @@ -329,7 +329,7 @@ ksmdbgssnCtrlCmdGetMappings_IMPL MMU_TRACE_ARG traceArg = {0}; MMU_TRACE_PARAM mmuParams = {0}; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // Attempt to retrieve the VAS pointer NV_ASSERT_OK_OR_RETURN( @@ -863,7 +863,7 @@ ksmdbgssnCtrlCmdDebugReadAllSmErrorStates_IMPL NV_STATUS rmStatus = NV_OK; OBJGPU *pGpu = GPU_RES_GET_GPU(pKernelSMDebuggerSession); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (IS_VIRTUAL(pGpu)) { @@ -909,7 +909,7 @@ ksmdbgssnCtrlCmdDebugClearAllSmErrorStates_IMPL NV_STATUS rmStatus = NV_OK; OBJGPU *pGpu = GPU_RES_GET_GPU(pKernelSMDebuggerSession); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (IS_VIRTUAL(pGpu)) { @@ -951,7 +951,7 @@ ksmdbgssnCtrlCmdDebugReadMMUFaultInfo_IMPL { OBJGPU *pGpu = GPU_RES_GET_GPU(pKernelSMDebuggerSession); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (IS_GSP_CLIENT(pGpu)) { diff --git a/src/nvidia/src/kernel/gpu/gsp/arch/blackwell/kernel_gsp_ecc_gb100.c b/src/nvidia/src/kernel/gpu/gsp/arch/blackwell/kernel_gsp_ecc_gb100.c new file mode 100644 index 0000000000..95870bf310 --- /dev/null +++ b/src/nvidia/src/kernel/gpu/gsp/arch/blackwell/kernel_gsp_ecc_gb100.c @@ -0,0 +1,140 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/*! + * Provides GB100+ specific KernelGsp ECC HAL implementations. + */ + +#include "rmconfig.h" +#include "gpu/gsp/kernel_gsp.h" + +#include "ctrl/ctrl2080/ctrl2080gpu.h" + +#include "published/blackwell/gb100/dev_gsp.h" + +/*! + * GSP ECC error service routine + * + */ +void +kgspEccServiceEvent_GB100 +( + OBJGPU *pGpu, + KernelGsp *pKernelGsp +) +{ + NvU32 eccIntrStatus = GPU_REG_RD32(pGpu, NV_PGSP_ECC_INTR_STATUS); + + NV_ASSERT_OR_RETURN_VOID(eccIntrStatus != 0); + + if (FLD_TEST_DRF(_PGSP, _ECC_INTR_STATUS, _UNCORRECTED, _PENDING, eccIntrStatus)) + { + kgspEccServiceUncorrError_HAL(pGpu, pKernelGsp); + } + + // Only parity is supported right now + if (FLD_TEST_DRF(_PGSP, _ECC_INTR_STATUS, _CORRECTED, _PENDING, eccIntrStatus)) + { + NV_ASSERT_FAILED("Corrected errors are not supported"); + } + + GPU_REG_WR32(pGpu, NV_PGSP_FALCON_ECC_STATUS, DRF_DEF(_PGSP, _FALCON_ECC_STATUS, _RESET, _TASK)); +} + +/*! + * GSP ECC uncorrected error service routine + * + */ +void +kgspEccServiceUncorrError_GB100 +( + OBJGPU *pGpu, + KernelGsp *pKernelGsp +) +{ + NvU32 eccStatus = GPU_REG_RD32(pGpu, NV_PGSP_FALCON_ECC_STATUS); + NvU32 errorType = ROBUST_CHANNEL_GPU_ECC_DBE; + + NV_ASSERT_OR_RETURN_VOID(eccStatus != 0); + + if (FLD_TEST_DRF(_PGSP, _FALCON_ECC_STATUS, _UNCORRECTED_ERR_IMEM, _PENDING, eccStatus)) + { + NV_PRINTF(LEVEL_ERROR, "NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_IMEM PENDING\n"); + MODS_ARCH_ERROR_PRINTF("NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_IMEM\n"); + } + + if (FLD_TEST_DRF(_PGSP, _FALCON_ECC_STATUS, _UNCORRECTED_ERR_DMEM, _PENDING, eccStatus)) + { + NV_PRINTF(LEVEL_ERROR, "NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_DMEM PENDING\n"); + MODS_ARCH_ERROR_PRINTF("NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_DMEM\n"); + } + + if (FLD_TEST_DRF(_PGSP, _FALCON_ECC_STATUS, _UNCORRECTED_ERR_ICACHE, _PENDING, eccStatus)) + { + NV_PRINTF(LEVEL_ERROR, "NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_ICACHE PENDING\n"); + MODS_ARCH_ERROR_PRINTF("NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_ICACHE\n"); + } + + if (FLD_TEST_DRF(_PGSP, _FALCON_ECC_STATUS, _UNCORRECTED_ERR_DCACHE, _PENDING, eccStatus)) + { + NV_PRINTF(LEVEL_ERROR, "NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_DCACHE PENDING\n"); + MODS_ARCH_ERROR_PRINTF("NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_DCACHE\n"); + } + + if (FLD_TEST_DRF(_PGSP, _FALCON_ECC_STATUS, _UNCORRECTED_ERR_MPU_RAM, _PENDING, eccStatus)) + { + NV_PRINTF(LEVEL_ERROR, "NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_MPU_RAM PENDING\n"); + MODS_ARCH_ERROR_PRINTF("NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_MPU_RAM\n"); + } + + if (FLD_TEST_DRF(_PGSP, _FALCON_ECC_STATUS, _UNCORRECTED_ERR_DCLS, _PENDING, eccStatus)) + { + NV_PRINTF(LEVEL_ERROR, "NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_DCLS PENDING\n"); + MODS_ARCH_ERROR_PRINTF("NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_DCLS\n"); + } + + if (FLD_TEST_DRF(_PGSP, _FALCON_ECC_STATUS, _UNCORRECTED_ERR_REG, _PENDING, eccStatus)) + { + NV_PRINTF(LEVEL_ERROR, "NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_REG PENDING\n"); + MODS_ARCH_ERROR_PRINTF("NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_REG\n"); + } + + if (FLD_TEST_DRF(_PGSP, _FALCON_ECC_STATUS, _UNCORRECTED_ERR_EMEM, _PENDING, eccStatus)) + { + // + // The the other ECC errors have a counterpart in FAULT_CONTAINMENT_SRCSTAT where + // recovery happens but this one doesn't so it needs handling here + // + NV_PRINTF(LEVEL_ERROR, "NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_EMEM PENDING\n"); + MODS_ARCH_ERROR_PRINTF("NV_PGSP_FALCON_ECC_STATUS_UNCORRECTED_ERR_EMEM\n"); + + pKernelGsp->bFatalError = NV_TRUE; + kgspRcAndNotifyAllChannels(pGpu, pKernelGsp, errorType, NV_TRUE); + NV_ASSERT_OK(gpuMarkDeviceForReset(pGpu)); + } + + // Notify of and log the error + gpuNotifySubDeviceEvent(pGpu, NV2080_NOTIFIERS_ECC_DBE, NULL, 0, 0, + (NvU16)NV2080_CTRL_GPU_ECC_UNIT_GSP); + nvErrorLog_va((void *)pGpu, errorType, "GSP-RISCV uncorrectable ECC error"); +} diff --git a/src/nvidia/src/kernel/gpu/gsp/arch/blackwell/kernel_gsp_gb100.c b/src/nvidia/src/kernel/gpu/gsp/arch/blackwell/kernel_gsp_gb100.c index 95a381a6dc..ca8884f023 100644 --- a/src/nvidia/src/kernel/gpu/gsp/arch/blackwell/kernel_gsp_gb100.c +++ b/src/nvidia/src/kernel/gpu/gsp/arch/blackwell/kernel_gsp_gb100.c @@ -147,3 +147,59 @@ kgspGetGspRmBootUcodeStorage_GB100 kgspGetGspRmBootUcodeStorage_GA102(pGpu, pKernelGsp, ppBinStorageImage, ppBinStorageDesc); } + +/*! + * Handle GSP Fatal Errors + */ +void +kgspServiceFatalHwError_GB100 +( + OBJGPU *pGpu, + KernelGsp *pKernelGsp, + NvU32 intrStatus +) +{ + NvU32 errorCode = GPU_REG_RD32(pGpu, NV_PGSP_RISCV_FAULT_CONTAINMENT_SRCSTAT); + NvU32 errorType = ROBUST_CHANNEL_CONTAINED_ERROR; + + if (!FLD_TEST_DRF(_PGSP_FALCON, _IRQSTAT, _FATAL_ERROR, _TRUE, intrStatus)) + { + return; + } + + NV_PRINTF(LEVEL_ERROR, "NV_PGSP_FALCON_IRQSTAT_FATAL_ERROR PENDING error_code 0x%x\n", errorCode); + MODS_ARCH_ERROR_PRINTF("NV_PGSP_FALCON_IRQSTAT_FATAL_ERROR=0x%x\n", errorCode); + + // Poison error + if (FLD_TEST_DRF(_PGSP, _RISCV_FAULT_CONTAINMENT_SRCSTAT, _GLOBAL_MEM, _FAULTED, errorCode)) + { + NV_ERROR_CONT_LOCATION loc = { 0 }; + + loc.locType = NV_ERROR_CONT_LOCATION_TYPE_NONE; + + // + // Assert since this interrupt can't be cleared without a + // GPU reset and we shouldn't see this if poison is disabled + // + if (!gpuIsGlobalPoisonFuseEnabled(pGpu)) + { + NV_ASSERT_FAILED("GSP poison pending when poison is disabled"); + return; + } + + NV_ASSERT_OK(gpuUpdateErrorContainmentState_HAL(pGpu, NV_ERROR_CONT_ERR_ID_E24_GSP_POISON, loc, NULL)); + } + else if (gpuIsFlcnRiscvParityError(pGpu, errorCode)) + { + errorType = ROBUST_CHANNEL_GPU_ECC_DBE; + } + // Log non-parity errors since parity errors are logged in the ECC handler + else + { + nvErrorLog_va((void *)pGpu, errorType, "GSP-RISCV fatal error"); + } + + pKernelGsp->bFatalError = NV_TRUE; + kgspRcAndNotifyAllChannels(pGpu, pKernelGsp, errorType, NV_TRUE); + NV_ASSERT_OK(gpuMarkDeviceForReset(pGpu)); +} diff --git a/src/nvidia/src/kernel/gpu/gsp/arch/hopper/kernel_gsp_gh100.c b/src/nvidia/src/kernel/gpu/gsp/arch/hopper/kernel_gsp_gh100.c index 98e920daf9..f85bf09dca 100644 --- a/src/nvidia/src/kernel/gpu/gsp/arch/hopper/kernel_gsp_gh100.c +++ b/src/nvidia/src/kernel/gpu/gsp/arch/hopper/kernel_gsp_gh100.c @@ -395,9 +395,9 @@ static GSP_DMA_TARGET _kgspMemdescToDmaTarget NV_STATUS kgspSetupGspFmcArgs_GH100 ( - OBJGPU *pGpu, - KernelGsp *pKernelGsp, - GSP_FIRMWARE *pGspFw + OBJGPU *pGpu, + KernelGsp *pKernelGsp, + KernelGspBootMode bootMode ) { NV_ASSERT_OR_RETURN(IS_GSP_CLIENT(pGpu), NV_ERR_NOT_SUPPORTED); @@ -417,9 +417,19 @@ kgspSetupGspFmcArgs_GH100 pGspFmcBootParams->initParams.regkeys |= pKernelNvlink->gspProxyRegkeys; } - pGspFmcBootParams->bootGspRmParams.gspRmDescOffset = memdescGetPhysAddr(pKernelGsp->pWprMetaDescriptor, AT_GPU, 0); - pGspFmcBootParams->bootGspRmParams.gspRmDescSize = sizeof(*pKernelGsp->pWprMeta); - pGspFmcBootParams->bootGspRmParams.target = _kgspMemdescToDmaTarget(pKernelGsp->pWprMetaDescriptor); + if (bootMode == KGSP_BOOT_MODE_SR_RESUME) + { + pGspFmcBootParams->bootGspRmParams.gspRmDescOffset = memdescGetPhysAddr(pKernelGsp->pSRMetaDescriptor, AT_GPU, 0); + pGspFmcBootParams->bootGspRmParams.gspRmDescSize = sizeof(GspFwSRMeta); + pGspFmcBootParams->bootGspRmParams.target = _kgspMemdescToDmaTarget(pKernelGsp->pSRMetaDescriptor); + } + else + { + pGspFmcBootParams->bootGspRmParams.gspRmDescOffset = memdescGetPhysAddr(pKernelGsp->pWprMetaDescriptor, AT_GPU, 0); + pGspFmcBootParams->bootGspRmParams.gspRmDescSize = sizeof(*pKernelGsp->pWprMeta); + pGspFmcBootParams->bootGspRmParams.target = _kgspMemdescToDmaTarget(pKernelGsp->pWprMetaDescriptor); + } + pGspFmcBootParams->bootGspRmParams.bIsGspRmBoot = NV_TRUE; pGspFmcBootParams->gspRmParams.bootArgsOffset = memdescGetPhysAddr(pKernelGsp->pLibosInitArgumentsDescriptor, AT_GPU, 0); @@ -716,7 +726,7 @@ _kgspBootstrapGspFmc_GH100 * * @param[in] pGpu GPU object pointer * @param[in] pKernelGsp GSP object pointer - * @param[in] pGspFw GSP_FIRMWARE image pointer + * @param[in] bootMode GSP boot mode * * @return NV_OK if GSP-RM RISCV preparation to boot was successful. * Appropriate NV_ERR_xxx value otherwise. @@ -724,9 +734,9 @@ _kgspBootstrapGspFmc_GH100 NV_STATUS kgspPrepareForBootstrap_GH100 ( - OBJGPU *pGpu, - KernelGsp *pKernelGsp, - GSP_FIRMWARE *pGspFw + OBJGPU *pGpu, + KernelGsp *pKernelGsp, + KernelGspBootMode bootMode ) { KernelFsp *pKernelFsp = GPU_GET_KERNEL_FSP(pGpu); @@ -740,7 +750,7 @@ kgspPrepareForBootstrap_GH100 // Setup the descriptors that GSP-FMC needs to boot GSP-RM NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, - kgspSetupGspFmcArgs_HAL(pGpu, pKernelGsp, pGspFw)); + kgspSetupGspFmcArgs_HAL(pGpu, pKernelGsp, bootMode)); if (pKernelFsp != NULL && !pKernelFsp->getProperty(pKernelFsp, PDB_PROP_KFSP_DISABLE_GSPFMC)) { @@ -776,7 +786,7 @@ kgspBootstrap_GH100 ( OBJGPU *pGpu, KernelGsp *pKernelGsp, - GSP_FIRMWARE *pGspFw + KernelGspBootMode bootMode ) { KernelFalcon *pKernelFalcon = staticCast(pKernelGsp, KernelFalcon); @@ -873,8 +883,14 @@ kgspBootstrap_GH100 NV_PRINTF(LEVEL_INFO, "Waiting for GSP fw RM to be ready...\n"); - // Link the status queue. - NV_ASSERT_OK_OR_RETURN(GspStatusQueueInit(pGpu, &pKernelGsp->pRpc->pMessageQueueInfo)); + // + // For normal boot, link the status queue. + // Note: for resume or GC6 exit, GSP-RM will restore queue state. + // + if (bootMode == KGSP_BOOT_MODE_NORMAL) + { + NV_ASSERT_OK_OR_RETURN(GspStatusQueueInit(pGpu, &pKernelGsp->pRpc->pMessageQueueInfo)); + } NV_ASSERT_OK_OR_RETURN(kgspWaitForRmInitDone(pGpu, pKernelGsp)); @@ -883,6 +899,25 @@ kgspBootstrap_GH100 return status; } +/*! + * Teardown remaining GSP state after GSP-RM unloads. + * + * @param[in] pGpu GPU object pointer + * @param[in] pKernelGsp GSP object pointer + * @param[in] unloadMode GSP unload mode + */ +NV_STATUS +kgspTeardown_GH100 +( + OBJGPU *pGpu, + KernelGsp *pKernelGsp, + KernelGspUnloadMode unloadMode +) +{ + // Wait for GSP to halt to allow ACR and GSP FMC to finish shutdown + return kflcnWaitForHaltRiscv_HAL(pGpu, staticCast(pKernelGsp, KernelFalcon), GPU_TIMEOUT_DEFAULT, 0); +} + void kgspGetGspRmBootUcodeStorage_GH100 ( diff --git a/src/nvidia/src/kernel/gpu/gsp/arch/turing/kernel_gsp_tu102.c b/src/nvidia/src/kernel/gpu/gsp/arch/turing/kernel_gsp_tu102.c index c06b91d587..0d4136ad87 100644 --- a/src/nvidia/src/kernel/gpu/gsp/arch/turing/kernel_gsp_tu102.c +++ b/src/nvidia/src/kernel/gpu/gsp/arch/turing/kernel_gsp_tu102.c @@ -349,7 +349,7 @@ kgspProgramLibosBootArgsAddr_TU102 * * @param[in] pGpu GPU object pointer * @param[in] pKernelGsp GSP object pointer - * @param[in] pGspFw GSP_FIRMWARE image pointer + * @param[in] bootMode GSP boot mode * * @return NV_OK if GSP-RM RISCV boot was successful. * Appropriate NV_ERR_xxx value otherwise. @@ -357,9 +357,9 @@ kgspProgramLibosBootArgsAddr_TU102 NV_STATUS kgspPrepareForBootstrap_TU102 ( - OBJGPU *pGpu, - KernelGsp *pKernelGsp, - GSP_FIRMWARE *pGspFw + OBJGPU *pGpu, + KernelGsp *pKernelGsp, + KernelGspBootMode bootMode ) { NV_STATUS status; @@ -378,8 +378,12 @@ kgspPrepareForBootstrap_TU102 return NV_ERR_NOT_SUPPORTED; } + // // Prepare to execute FWSEC to setup FRTS if we have a FRTS region - if (kgspGetFrtsSize_HAL(pGpu, pKernelGsp) > 0) + // Note: for resume and GC6 exit, FRTS is restored by Booter not FWSEC + // + if ((bootMode == KGSP_BOOT_MODE_NORMAL) && + (kgspGetFrtsSize_HAL(pGpu, pKernelGsp) > 0)) { pKernelGsp->pPreparedFwsecCmd = portMemAllocNonPaged(sizeof(KernelGspPreparedFwsecCmd)); status = kgspPrepareForFwsecFrts_HAL(pGpu, pKernelGsp, @@ -397,6 +401,34 @@ kgspPrepareForBootstrap_TU102 return NV_OK; } +/*! + * Obtain sysmem addr or arguments to be consumed by Booter Load. + * Booter expects different arguments for normal boot, resume, and GC6 exit. + * + * @param[in] bootMode GSP boot mode + */ +static inline NvU64 +_kgspGetBooterLoadArgs +( + KernelGsp *pKernelGsp, + KernelGspBootMode bootMode +) +{ + switch (bootMode) + { + case KGSP_BOOT_MODE_NORMAL: + return memdescGetPhysAddr(pKernelGsp->pWprMetaDescriptor, AT_GPU, 0); + case KGSP_BOOT_MODE_SR_RESUME: + return memdescGetPhysAddr(pKernelGsp->pSRMetaDescriptor, AT_GPU, 0); + case KGSP_BOOT_MODE_GC6_EXIT: + return 0; + } + + // unreachable + NV_ASSERT_FAILED("unexpected GSP boot mode"); + return 0; +} + /*! * Boot GSP-RM. * @@ -414,7 +446,7 @@ kgspPrepareForBootstrap_TU102 * * @param[in] pGpu GPU object pointer * @param[in] pKernelGsp GSP object pointer - * @param[in] pGspFw GSP_FIRMWARE image pointer + * @param[in] bootMode GSP boot mode * * @return NV_OK if GSP-RM RISCV boot was successful. * Appropriate NV_ERR_xxx value otherwise. @@ -422,42 +454,49 @@ kgspPrepareForBootstrap_TU102 NV_STATUS kgspBootstrap_TU102 ( - OBJGPU *pGpu, - KernelGsp *pKernelGsp, - GSP_FIRMWARE *pGspFw + OBJGPU *pGpu, + KernelGsp *pKernelGsp, + KernelGspBootMode bootMode ) { - NV_STATUS status; + NV_STATUS status; KernelFalcon *pKernelFalcon = staticCast(pKernelGsp, KernelFalcon); - // Execute FWSEC to setup FRTS if we have a FRTS region - if (kgspGetFrtsSize_HAL(pGpu, pKernelGsp) > 0) + // + // For normal boot, additional setup is necessary. + // Note: for resume or GC6 exit, Booter and/or GSP-RM will restore these. + // + if (bootMode == KGSP_BOOT_MODE_NORMAL) { - NV_ASSERT_OR_RETURN(pKernelGsp->pPreparedFwsecCmd != NULL, NV_ERR_INVALID_STATE); + // Execute FWSEC to setup FRTS if we have a FRTS region. + if (kgspGetFrtsSize_HAL(pGpu, pKernelGsp) > 0) + { + NV_ASSERT_OR_RETURN(pKernelGsp->pPreparedFwsecCmd != NULL, NV_ERR_INVALID_STATE); - kflcnReset_HAL(pGpu, pKernelFalcon); + kflcnReset_HAL(pGpu, pKernelFalcon); - status = kgspExecuteFwsec_HAL(pGpu, pKernelGsp, pKernelGsp->pPreparedFwsecCmd); - portMemFree(pKernelGsp->pPreparedFwsecCmd); - pKernelGsp->pPreparedFwsecCmd = NULL; + status = kgspExecuteFwsec_HAL(pGpu, pKernelGsp, pKernelGsp->pPreparedFwsecCmd); + portMemFree(pKernelGsp->pPreparedFwsecCmd); + pKernelGsp->pPreparedFwsecCmd = NULL; - NV_ASSERT_OK_OR_RETURN(status); - } + NV_ASSERT_OK_OR_RETURN(status); + } - kflcnResetIntoRiscv_HAL(pGpu, pKernelFalcon); + kflcnResetIntoRiscv_HAL(pGpu, pKernelFalcon); - // Load init args into mailbox regs - kgspProgramLibosBootArgsAddr_HAL(pGpu, pKernelGsp); + // Load init args into mailbox regs + kgspProgramLibosBootArgsAddr_HAL(pGpu, pKernelGsp); - // Execute Scrubber if needed - if (pKernelGsp->pScrubberUcode != NULL) - { - NV_ASSERT_OK_OR_RETURN(kgspExecuteScrubberIfNeeded_HAL(pGpu, pKernelGsp)); + // Execute Scrubber if needed + if (pKernelGsp->pScrubberUcode != NULL) + { + NV_ASSERT_OK_OR_RETURN(kgspExecuteScrubberIfNeeded_HAL(pGpu, pKernelGsp)); + } } // Execute Booter Load status = kgspExecuteBooterLoad_HAL(pGpu, pKernelGsp, - memdescGetPhysAddr(pKernelGsp->pWprMetaDescriptor, AT_GPU, 0)); + _kgspGetBooterLoadArgs(pKernelGsp, bootMode)); if (status != NV_OK) { NV_PRINTF(LEVEL_ERROR, "failed to execute Booter Load (ucode for initial boot): 0x%x\n", status); @@ -482,8 +521,14 @@ kgspBootstrap_TU102 NV_PRINTF(LEVEL_INFO, "Waiting for GSP fw RM to be ready...\n"); - // Link the status queue. - NV_ASSERT_OK_OR_RETURN(GspStatusQueueInit(pGpu, &pKernelGsp->pRpc->pMessageQueueInfo)); + // + // For normal boot, link the status queue. + // Note: for resume or GC6 exit, GSP-RM will restore queue state. + // + if (bootMode == KGSP_BOOT_MODE_NORMAL) + { + NV_ASSERT_OK_OR_RETURN(GspStatusQueueInit(pGpu, &pKernelGsp->pRpc->pMessageQueueInfo)); + } NV_ASSERT_OK_OR_RETURN(kgspWaitForRmInitDone(pGpu, pKernelGsp)); @@ -492,6 +537,91 @@ kgspBootstrap_TU102 return NV_OK; } +/*! + * Obtain sysmem addr or arguments to be consumed by Booter Unload. + * Booter expects different arguments for normal unload, suspend, and GC6 enter. + * + * @param[in] unloadMode GSP unload mode + */ +static inline NvU64 +_kgspGetBooterUnloadArgs +( + KernelGsp *pKernelGsp, + KernelGspUnloadMode unloadMode +) +{ + switch (unloadMode) + { + case KGSP_UNLOAD_MODE_NORMAL: + return 0; + case KGSP_UNLOAD_MODE_SR_SUSPEND: + return memdescGetPhysAddr(pKernelGsp->pSRMetaDescriptor, AT_GPU, 0); + case KGSP_UNLOAD_MODE_GC6_ENTER: + return 0; + } + + // unreachable + NV_ASSERT_FAILED("unexpected GSP unload mode"); + return 0; +} + +/*! + * Teardown remaining GSP state after GSP-RM unloads. + * + * For pre-Hopper, this involves running FWSEC-SB to put back pre-OS apps and + * Booter Unload to teardown WPR2. + * + * @param[in] pGpu GPU object pointer + * @param[in] pKernelGsp GSP object pointer + * @param[in] unloadMode GSP unload mode + */ +NV_STATUS +kgspTeardown_TU102 +( + OBJGPU *pGpu, + KernelGsp *pKernelGsp, + KernelGspUnloadMode unloadMode +) +{ + NV_STATUS status; + + // + // Avoid cascading timeouts when attempting to invoke the below ucodes if + // we are unloading due to a GSP-RM timeout. + // + threadStateResetTimeout(pGpu); + + if (unloadMode != KGSP_UNLOAD_MODE_GC6_ENTER) + { + KernelGspPreparedFwsecCmd preparedCmd; + + // Reset GSP so we can load FWSEC-SB + kflcnReset_HAL(pGpu, staticCast(pKernelGsp, KernelFalcon)); + + // Invoke FWSEC-SB to put back PreOsApps during driver unload + status = kgspPrepareForFwsecSb_HAL(pGpu, pKernelGsp, pKernelGsp->pFwsecUcode, &preparedCmd); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "failed to prepare for FWSEC-SB for PreOsApps during driver unload: 0x%x\n", status); + NV_ASSERT_FAILED("FWSEC-SB prep failed"); + } + else + { + status = kgspExecuteFwsec_HAL(pGpu, pKernelGsp, &preparedCmd); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "failed to execute FWSEC-SB for PreOsApps during driver unload: 0x%x\n", status); + NV_ASSERT_FAILED("FWSEC-SB failed"); + } + } + } + + // Execute Booter Unload + status = kgspExecuteBooterUnloadIfNeeded_HAL(pGpu, pKernelGsp, + _kgspGetBooterUnloadArgs(pKernelGsp, unloadMode)); + return status; +} + void kgspGetGspRmBootUcodeStorage_TU102 ( @@ -817,6 +947,22 @@ kgspResetHw_TU102 return NV_OK; } +static NvBool kgspCrashCatReportImpactsGspRm(CrashCatReport *pReport) +{ + NV_CRASHCAT_CONTAINMENT containment; + + containment = crashcatReportSourceContainment_HAL(pReport); + switch (containment) + { + case NV_CRASHCAT_CONTAINMENT_RISCV_MODE_M: + case NV_CRASHCAT_CONTAINMENT_RISCV_HART: + case NV_CRASHCAT_CONTAINMENT_UNCONTAINED: + return NV_TRUE; + default: + return NV_FALSE; + } +} + NvBool kgspHealthCheck_TU102 ( @@ -835,8 +981,8 @@ kgspHealthCheck_TU102 while ((pReport = crashcatEngineGetNextCrashReport(pCrashCatEng)) != NULL) { - - bHealthy = NV_FALSE; + if (kgspCrashCatReportImpactsGspRm(pReport)) + bHealthy = NV_FALSE; NV_PRINTF(LEVEL_ERROR, "****************************** GSP-CrashCat Report *******************************\n"); @@ -844,11 +990,8 @@ kgspHealthCheck_TU102 objDelete(pReport); } - - goto exit_health_check; } -exit_health_check: if (!bHealthy) { NvBool bFirstFatal = !pKernelGsp->bFatalError; @@ -862,7 +1005,8 @@ kgspHealthCheck_TU102 if (bFirstFatal) { - kgspRcAndNotifyAllUserChannels(pGpu, pKernelGsp, GSP_ERROR); + kgspRcAndNotifyAllChannels(pGpu, pKernelGsp, GSP_ERROR, NV_TRUE); + gpuMarkDeviceForReset(pGpu); } gpuCheckEccCounts_HAL(pGpu); @@ -889,8 +1033,8 @@ kgspService_TU102 NvU32 intrStatus; KernelFalcon *pKernelFalcon = staticCast(pKernelGsp, KernelFalcon); - // Get the IRQ status and mask the sources not directed to host. - intrStatus = kflcnReadIntrStatus_HAL(pGpu, pKernelFalcon); + // Get the IRQ status for sources routed to host + intrStatus = kflcnGetPendingHostInterrupts(pGpu, pKernelFalcon); // Exit immediately if there is nothing to do if (intrStatus == 0) @@ -941,11 +1085,23 @@ kgspService_TU102 NV_CHECK_OR_RETURN(LEVEL_SILENT, !pKernelGsp->bInLockdown, 0); } - kflcnIntrRetrigger_HAL(pGpu, pKernelFalcon); + kgspServiceFatalHwError_HAL(pGpu, pKernelGsp, intrStatus); - intrStatus = kflcnReadIntrStatus_HAL(pGpu, pKernelFalcon); + if (intrStatus & kflcnGetEccInterruptMask_HAL(pGpu, pKernelFalcon)) + { + kgspEccServiceEvent_HAL(pGpu, pKernelGsp); + } - return intrStatus; + // + // Don't retrigger for fatal errors since they can't be cleared without an + // engine reset, which results in an interrupt storm until reset + // + if (!pKernelGsp->bFatalError) + { + kflcnIntrRetrigger_HAL(pGpu, pKernelFalcon); + } + + return kflcnGetPendingHostInterrupts(pGpu, pKernelFalcon); } static NvBool @@ -1031,7 +1187,7 @@ kgspFreeSuspendResumeData_TU102 } NV_STATUS -kgspSavePowerMgmtState_TU102 +kgspPrepareSuspendResumeData_TU102 ( OBJGPU *pGpu, KernelGsp *pKernelGsp @@ -1094,12 +1250,6 @@ kgspSavePowerMgmtState_TU102 NV_TRUE, osGetCurrentProcess(), pVa, pPriv); - NV_ASSERT_OK_OR_GOTO(nvStatus, - kgspExecuteBooterUnloadIfNeeded_HAL(pGpu, - pKernelGsp, - memdescGetPhysAddr(pKernelGsp->pSRMetaDescriptor,AT_GPU, 0)), - exit_fail_cleanup); - return nvStatus; exit_fail_cleanup: @@ -1107,28 +1257,6 @@ kgspSavePowerMgmtState_TU102 return nvStatus; } -NV_STATUS -kgspRestorePowerMgmtState_TU102 -( - OBJGPU *pGpu, - KernelGsp *pKernelGsp -) -{ - NV_STATUS nvStatus = NV_OK; - - NV_ASSERT_TRUE_OR_GOTO(nvStatus, pKernelGsp->pSRMetaDescriptor != NULL, NV_ERR_INVALID_STATE, exit_cleanup); - - NV_ASSERT_OK_OR_GOTO(nvStatus, - kgspExecuteBooterLoad_HAL(pGpu, - pKernelGsp, - memdescGetPhysAddr(pKernelGsp->pSRMetaDescriptor, AT_GPU,0)), - exit_cleanup); - -exit_cleanup: - kgspFreeSuspendResumeData_HAL(pGpu, pKernelGsp); - return nvStatus; -} - void kgspReadEmem_TU102 ( diff --git a/src/nvidia/src/kernel/gpu/gsp/kernel_gsp.c b/src/nvidia/src/kernel/gpu/gsp/kernel_gsp.c index 25750f2dc4..61277ae1b6 100644 --- a/src/nvidia/src/kernel/gpu/gsp/kernel_gsp.c +++ b/src/nvidia/src/kernel/gpu/gsp/kernel_gsp.c @@ -67,9 +67,9 @@ #include "core/locks.h" #include "kernel/gpu/intr/intr.h" #include "kernel/gpu/gr/fecs_event_list.h" -#include "gpu/fsp/kern_fsp.h" #include "lib/protobuf/prb_util.h" #include "g_nvdebug_pb.h" +#include "gpu/fsp/kern_fsp.h" #define RPC_STRUCTURES #define RPC_GENERIC_UNION @@ -159,6 +159,8 @@ static NV_STATUS _kgspGetSectionNameForPrefix(OBJGPU *pGpu, KernelGsp *pKernelGs static NV_STATUS _kgspRpcGspEventFecsError(OBJGPU *, OBJRPC *); static void _kgspRpcGspEventHandleFecsBufferError(NvU32, void *); +static NV_STATUS _kgspRpcGspEventRecoveryAction(OBJGPU *, OBJRPC *); + static void _kgspInitGpuProperties(OBJGPU *); static NV_STATUS _kgspDumpEngineFunc(OBJGPU*, PRB_ENCODER*, NVD_STATE*, void*); @@ -514,7 +516,7 @@ _kgspRpcRCTriggered RPC_PARAMS(rc_triggered, _v17_02); KernelRc *pKernelRc = GPU_GET_KERNEL_RC(pGpu); - KernelChannel *pKernelChannel; + KernelChannel *pKernelChannel = NULL; KernelFifo *pKernelFifo = GPU_GET_KERNEL_FIFO(pGpu); CHID_MGR *pChidMgr; NvU32 status = NV_OK; @@ -543,75 +545,20 @@ _kgspRpcRCTriggered if (status != NV_OK) return status; - pKernelChannel = kfifoChidMgrGetKernelChannel(pGpu, pKernelFifo, - pChidMgr, - rpc_params->chid); - NV_CHECK_OR_RETURN(LEVEL_ERROR, - pKernelChannel != NULL, - NV_ERR_INVALID_CHANNEL); - - // Add the RcDiag records we received from GSP-RM to our system wide journal + if (IS_GFID_PF(rpc_params->gfid)) { - OBJSYS *pSys = SYS_GET_INSTANCE(); - Journal *pRcDB = SYS_GET_RCDB(pSys); - RmClient *pClient; - - NvU32 recordSize = rcdbGetOcaRecordSizeWithHeader(pRcDB, RmRcDiagReport); - NvU32 rcDiagRecStart = pRcDB->RcErrRptNextIdx; - NvU32 rcDiagRecEnd; - NvU32 processId = 0; - NvU32 owner = RCDB_RCDIAG_DEFAULT_OWNER; - - pClient = dynamicCast(RES_GET_CLIENT(pKernelChannel), RmClient); - NV_ASSERT(pClient != NULL); - if (pClient != NULL) - processId = pClient->ProcID; - - for (NvU32 i = 0; i < rpc_params->rcJournalBufferSize / recordSize; i++) - { - RmRCCommonJournal_RECORD *pCommonRecord = - (RmRCCommonJournal_RECORD *)((NvU8*)&rpc_params->rcJournalBuffer + i * recordSize); - RmRcDiag_RECORD *pRcDiagRecord = - (RmRcDiag_RECORD *)&pCommonRecord[1]; - -#if defined(DEBUG) - NV_PRINTF(LEVEL_INFO, "%d: GPUTag=0x%x CPUTag=0x%llx timestamp=0x%llx stateMask=0x%llx\n", - i, pCommonRecord->GPUTag, pCommonRecord->CPUTag, pCommonRecord->timeStamp, - pCommonRecord->stateMask); - NV_PRINTF(LEVEL_INFO, " idx=%d timeStamp=0x%x type=0x%x flags=0x%x count=%d owner=0x%x processId=0x%x\n", - pRcDiagRecord->idx, pRcDiagRecord->timeStamp, pRcDiagRecord->type, pRcDiagRecord->flags, - pRcDiagRecord->count, pRcDiagRecord->owner, processId); - for (NvU32 j = 0; j < pRcDiagRecord->count; j++) - { - NV_PRINTF(LEVEL_INFO, " %d: offset=0x08%x tag=0x08%x value=0x08%x attribute=0x08%x\n", - j, pRcDiagRecord->data[j].offset, pRcDiagRecord->data[j].tag, - pRcDiagRecord->data[j].value, pRcDiagRecord->data[j].attribute); - } -#endif - if (rcdbAddRcDiagRecFromGsp(pGpu, pRcDB, pCommonRecord, pRcDiagRecord) == NULL) - { - NV_PRINTF(LEVEL_WARNING, "Lost RC diagnostic record coming from GPU%d GSP: type=0x%x stateMask=0x%llx\n", - gpuGetInstance(pGpu), pRcDiagRecord->type, pCommonRecord->stateMask); - } - } - - rcDiagRecEnd = pRcDB->RcErrRptNextIdx - 1; - - // Update records to have the correct PID associated with the channel - if (rcDiagRecStart != rcDiagRecEnd) - { - rcdbUpdateRcDiagRecContext(pRcDB, - rcDiagRecStart, - rcDiagRecEnd, - processId, - owner); - } + pKernelChannel = kfifoChidMgrGetKernelChannel(pGpu, pKernelFifo, + pChidMgr, + rpc_params->chid); + NV_CHECK_OR_RETURN(LEVEL_ERROR, + pKernelChannel != NULL, + NV_ERR_INVALID_CHANNEL); } bIsCcEnabled = gpuIsCCFeatureEnabled(pGpu); // With CC enabled, CPU-RM needs to write error notifiers - if (bIsCcEnabled) + if (bIsCcEnabled && pKernelChannel != NULL) { NV_ASSERT_OK_OR_RETURN(krcErrorSetNotifier(pGpu, pKernelRc, pKernelChannel, @@ -635,37 +582,42 @@ _kgspRpcRCTriggered * This function is called on critical FW crash to RC and notify an error code to * all user mode channels, allowing the user mode apps to fail deterministically. * - * @param[in] pGpu GPU object pointer - * @param[in] pKernelGsp KernelGsp object pointer - * @param[in] exceptType Error code to send to the RC notifiers + * @param[in] pGpu GPU object pointer + * @param[in] pKernelGsp KernelGsp object pointer + * @param[in] exceptType Error code to send to the RC notifiers + * @param[in] bSkipKernelChannels Don't RC and notify kernel channels * */ void -kgspRcAndNotifyAllUserChannels +kgspRcAndNotifyAllChannels_IMPL ( OBJGPU *pGpu, KernelGsp *pKernelGsp, - NvU32 exceptType + NvU32 exceptType, + NvBool bSkipKernelChannels ) { + // + // Note Bug 4503046: UVM currently attributes all errors as global and fails + // operations on all GPUs, in addition to the current failing GPU. Right now, the only + // case where we shouldn't skip kernel channels is when the GPU has fallen off the bus. + // + KernelRc *pKernelRc = GPU_GET_KERNEL_RC(pGpu); KernelChannel *pKernelChannel; KernelFifo *pKernelFifo = GPU_GET_KERNEL_FIFO(pGpu); CHANNEL_ITERATOR chanIt; RMTIMEOUT timeout; - NV_PRINTF(LEVEL_ERROR, "RC all user channels for critical error %d.\n", exceptType); + NV_PRINTF(LEVEL_ERROR, "RC all %schannels for critical error %d.\n", + bSkipKernelChannels ? MAKE_NV_PRINTF_STR("user ") : MAKE_NV_PRINTF_STR(""), + exceptType); - // Pass 1: halt all user channels. + // Pass 1: halt all channels. kfifoGetChannelIterator(pGpu, pKernelFifo, &chanIt, INVALID_RUNLIST_ID); while (kfifoGetNextKernelChannel(pGpu, pKernelFifo, &chanIt, &pKernelChannel) == NV_OK) { - // - // Kernel (uvm) channels are skipped to workaround nvbug 4503046, where - // uvm attributes all errors as global and fails operations on all GPUs, - // in addition to the current failing GPU. - // - if (kchannelCheckIsKernel(pKernelChannel)) + if (kchannelCheckIsKernel(pKernelChannel) && bSkipKernelChannels) { continue; } @@ -674,7 +626,7 @@ kgspRcAndNotifyAllUserChannels } // - // Pass 2: Wait for the halts to complete, and RC notify the user channels. + // Pass 2: Wait for the halts to complete, and RC notify the channels. // The channel halts require a preemption, which may not be able to complete // since the GSP is no longer servicing interrupts. Wait for up to the // default GPU timeout value for the preemptions to complete. @@ -683,28 +635,29 @@ kgspRcAndNotifyAllUserChannels kfifoGetChannelIterator(pGpu, pKernelFifo, &chanIt, INVALID_RUNLIST_ID); while (kfifoGetNextKernelChannel(pGpu, pKernelFifo, &chanIt, &pKernelChannel) == NV_OK) { - // Skip kernel (uvm) channels as only user channel halts are initiated above. - if (kchannelCheckIsKernel(pKernelChannel)) + if (kchannelCheckIsKernel(pKernelChannel) && bSkipKernelChannels) { continue; } kfifoCompleteChannelHalt(pGpu, pKernelFifo, pKernelChannel, &timeout); - NV_ASSERT_OK(krcErrorSetNotifier(pGpu, pKernelRc, - pKernelChannel, - exceptType, - kchannelGetEngineType(pKernelChannel), - RC_NOTIFIER_SCOPE_CHANNEL)); - - NV_ASSERT_OK(krcErrorSendEventNotifications_HAL(pGpu, pKernelRc, - pKernelChannel, - kchannelGetEngineType(pKernelChannel), - 0, - exceptType, - RC_NOTIFIER_SCOPE_CHANNEL, - 0, - NV_FALSE)); + NV_ASSERT_OK( + krcErrorSetNotifier(pGpu, pKernelRc, + pKernelChannel, + exceptType, + kchannelGetEngineType(pKernelChannel), + RC_NOTIFIER_SCOPE_CHANNEL)); + + NV_ASSERT_OK( + krcErrorSendEventNotifications_HAL(pGpu, pKernelRc, + pKernelChannel, + kchannelGetEngineType(pKernelChannel), + 0, + exceptType, + RC_NOTIFIER_SCOPE_CHANNEL, + 0, + NV_FALSE)); } } @@ -952,6 +905,14 @@ _kgspRpcEventIsGpuDegradedCallback OBJRPC *pRpc ) { + RPC_PARAMS(nvlink_is_gpu_degraded, _v17_00); + KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); + NV2080_CTRL_NVLINK_IS_GPU_DEGRADED_PARAMS_v17_00 *dest = &rpc_params->params; + + if(dest->bIsGpuDegraded) + { + knvlinkSetDegradedMode(pGpu, pKernelNvlink, dest->linkId); + } } static void @@ -961,8 +922,10 @@ _kgspRpcNvlinkFatalErrorRecoveryCallback OBJRPC *pRpc ) { + RPC_PARAMS(nvlink_fatal_error_recovery, _v17_00); KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); - NV_ASSERT_OK(knvlinkFatalErrorRecovery(pGpu, pKernelNvlink)); + NV2080_CTRL_NVLINK_FATAL_ERROR_RECOVERY_PARAMS_v17_00 *pDest = &rpc_params->params; + NV_ASSERT_OK(knvlinkFatalErrorRecovery(pGpu, pKernelNvlink, pDest->bRecoverable)); } /*! @@ -1530,6 +1493,10 @@ _kgspProcessRpcEvent nvStatus = _kgspRpcGspEventFecsError(pGpu, pRpc); break; + case NV_VGPU_MSG_EVENT_RECOVERY_ACTION: + nvStatus = _kgspRpcGspEventRecoveryAction(pGpu, pRpc); + break; + case NV_VGPU_MSG_EVENT_GSP_INIT_DONE: // Handled by _kgspRpcRecvPoll. default: // @@ -1606,6 +1573,41 @@ _kgspRpcGspEventFecsError return status; } +/*! + * Receive GPU recovery action notification from GSP + * + */ +static NV_STATUS +_kgspRpcGspEventRecoveryAction +( + OBJGPU *pGpu, + OBJRPC *pRpc +) +{ + NV_STATUS status = NV_OK; + OBJSYS *pSys = SYS_GET_INSTANCE(); + RPC_PARAMS(recovery_action, _v28_01); + + switch (rpc_params->type) + { + case GPU_RECOVERY_EVENT_TYPE_REFRESH: + gpuRefreshRecoveryAction(pGpu, NV_FALSE); + break; + case GPU_RECOVERY_EVENT_TYPE_GPU_DRAIN_P2P: + gpuSetRecoveryDrainP2P(pGpu, rpc_params->value); + break; + case GPU_RECOVERY_EVENT_TYPE_SYS_REBOOT: + sysSetRecoveryRebootRequired(pSys, rpc_params->value); + break; + + default: + status = NV_ERR_INVALID_PARAMETER; + break; + } + + return status; +} + /*! * Processes the callback for the FECS buffer error notifications * @@ -1910,6 +1912,8 @@ _kgspLogXid119 pHistoryEntry->data[0], pHistoryEntry->data[1]); + gpuNotifySubDeviceEvent(pGpu, NV2080_NOTIFIERS_GPU_UNAVAILABLE, NULL, 0, GSP_RPC_TIMEOUT, 0); + if (pRpc->timeoutCount == 1) { kgspLogRpcDebugInfo(pGpu, pRpc, GSP_RPC_TIMEOUT, NV_TRUE/*bPollingForRpcResponse*/); @@ -1997,6 +2001,16 @@ _kgspRpcRecvPoll NvBool bSlowGspRpc = IS_EMULATION(pGpu) || IS_SIMULATION(pGpu); NvU32 gpuMaskUnused; +#if defined(GSPRM_HWASAN_ENABLE) + // + // TODO HWASAN is SLOW. More investigation is required on where the + // bottlenecks are and how to uncork them. + // + bSlowGspRpc = bSlowGspRpc + || (expectedFunc == NV_VGPU_MSG_EVENT_GSP_INIT_DONE) + || (expectedFunc == NV_VGPU_MSG_FUNCTION_UNLOADING_GUEST_DRIVER); +#endif + KernelGspRpcEventHandlerContext rpcHandlerContext = KGSP_RPC_EVENT_HANDLER_CONTEXT_POLL; if (expectedFunc == NV_VGPU_MSG_EVENT_GSP_INIT_DONE) { @@ -2340,7 +2354,6 @@ static NV_STATUS setupLogBufferVgpu( RM_LIBOS_LOG_MEM *taskLogArr ) { - NV_STATUS nvStatus = NV_OK; RM_LIBOS_LOG_MEM *pTaskLog = NULL; char vm_string[8]; @@ -2413,7 +2426,8 @@ kgspInitVgpuPartitionLogging_IMPL NvU64 vgpuTaskLogBUffOffset, NvU64 vgpuTaskLogBuffSize, NvU64 kernelLogBuffOffset, - NvU64 kernelLogBuffSize + NvU64 kernelLogBuffSize, + NvBool *pPreserveLogBufferFull ) { struct @@ -2433,6 +2447,7 @@ kgspInitVgpuPartitionLogging_IMPL NV_STATUS nvStatus = NV_OK; char sourceName[SOURCE_NAME_MAX_LENGTH]; + NvBool bPreserveLogBufferFull = NV_FALSE; if (gfid > MAX_PARTITIONS_WITH_GFID) { @@ -2450,6 +2465,11 @@ kgspInitVgpuPartitionLogging_IMPL // Setup logging for each task in vgpu partition for (NvU32 i = 0; i < NV_ARRAY_ELEMENTS(logInitValues); ++i) { + if (!bPreserveLogBufferFull) + { + bPreserveLogBufferFull = isLibosPreserveLogBufferFull(&pKernelGsp->logDecodeVgpuPartition[gfid - 1], pGpu->gpuInstance); + } + nvStatus = setupLogBufferVgpu( pGpu, pKernelGsp, @@ -2468,6 +2488,11 @@ kgspInitVgpuPartitionLogging_IMPL // Determine which kernel is online, and add the according buffer { + if (!bPreserveLogBufferFull) + { + bPreserveLogBufferFull = isLibosPreserveLogBufferFull(&pKernelGsp->logDecodeVgpuPartition[gfid - 1], pGpu->gpuInstance); + } + nv_firmware_chip_family_t chipFamily = nv_firmware_get_chip_family(gpuGetChipArch(pGpu), gpuGetChipImpl(pGpu)); switch (chipFamily) { @@ -2513,6 +2538,7 @@ kgspInitVgpuPartitionLogging_IMPL pKernelGsp->libosKernelLogMem ); break; + default: NV_PRINTF(LEVEL_ERROR, "INVALID ARCH DETECTED %llx If Libos2 ignore this\n", (NvU64) chipFamily); } @@ -2532,9 +2558,36 @@ kgspInitVgpuPartitionLogging_IMPL pKernelGsp->bHasVgpuLogs = NV_TRUE; + *pPreserveLogBufferFull = bPreserveLogBufferFull; + return nvStatus; } +/*! + * Preserve vGPU Partition log buffers between VM reboots + */ +NV_STATUS +kgspPreserveVgpuPartitionLogging_IMPL +( + OBJGPU *pGpu, + KernelGsp *pKernelGsp, + NvU32 gfid +) +{ + if ((gfid == 0) || (gfid > MAX_PARTITIONS_WITH_GFID)) + { + return NV_ERR_INVALID_ARGUMENT; + } + + // Make sure this this NvLog buffer is pushed + kgspDumpGspLogsUnlocked(pKernelGsp, NV_FALSE); + + // Preserve any captured vGPU Partition logs + libosPreserveLogs(&pKernelGsp->logDecodeVgpuPartition[gfid - 1]); + + return NV_OK; +} + void kgspNvlogFlushCb(void *pKernelGsp) { if (pKernelGsp != NULL) @@ -2636,7 +2689,7 @@ static NV_STATUS setupLogBufferBaremetal size, RM_PAGE_SIZE, NV_TRUE, ADDR_SYSMEM, NV_MEMORY_CACHED, - MEMDESC_FLAGS_NONE), + flags), error_cleanup); memdescTagAlloc(nvStatus, @@ -2703,12 +2756,13 @@ _kgspInitLibosLoggingStructures #if defined(DEVELOP) || defined(DEBUG) // The interrupt task is in the rm elf, so they share the same logging elf too {"LOGINTR", "INTR", 0x40000, ".fwlogging_rm"}, // 256KB ISR debug log on develop/debug builds - {"LOGRM", "RM", 0x40000, ".fwlogging_rm"} // 256KB RM debug log on develop/debug builds + {"LOGRM", "RM", 0x40000, ".fwlogging_rm"}, // 256KB RM debug log on develop/debug builds #else // The interrupt task is in the rm elf, so they share the same logging elf too {"LOGINTR", "INTR", 0x10000, ".fwlogging_rm"}, // 64KB ISR debug log on develop/debug builds - {"LOGRM", "RM", 0x10000, ".fwlogging_rm"} // 64KB RM debug log on release builds + {"LOGRM", "RM", 0x10000, ".fwlogging_rm"}, // 64KB RM debug log on release builds #endif + {"LOGMNOC", "MNOC", 0x10000, ".fwlogging_mnoc"}, // 64KB MNOC debug log on release builds }; ct_assert(NV_ARRAY_ELEMENTS(logInitValues) <= LIBOS_LOG_MAX_LOGS); @@ -2793,6 +2847,7 @@ _kgspInitLibosLoggingStructures flags ); break; + default: NV_PRINTF(LEVEL_INFO, "INVALID ARCH DETECTED %llx. If Libos2 ignore this\n", (NvU64) chipFamily); } @@ -3228,7 +3283,7 @@ _kgspBootGspRm(OBJGPU *pGpu, KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw, GPU_MA NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, _kgspPrepareScrubberImageIfNeeded(pGpu, pKernelGsp)); // Setup arguments for bootstrapping GSP - NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, kgspPrepareForBootstrap_HAL(pGpu, pKernelGsp, pGspFw)); + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, kgspPrepareForBootstrap_HAL(pGpu, pKernelGsp, KGSP_BOOT_MODE_NORMAL)); // Release the API lock if relaxed locking for parallel init is enabled NvBool bRelaxedLocking = _kgspShouldRelaxGspInitLocking(pGpu); @@ -3236,7 +3291,7 @@ _kgspBootGspRm(OBJGPU *pGpu, KernelGsp *pKernelGsp, GSP_FIRMWARE *pGspFw, GPU_MA rmapiLockRelease(); // Proceed with GSP boot - if it fails, check for ECC errors - status = kgspBootstrap_HAL(pGpu, pKernelGsp, pGspFw); + status = kgspBootstrap_HAL(pGpu, pKernelGsp, KGSP_BOOT_MODE_NORMAL); if ((status != NV_OK) && gpuCheckEccCounts_HAL(pGpu)) status = NV_ERR_ECC_ERROR; @@ -3462,7 +3517,12 @@ kgspInitRm_IMPL // Subsequent attempts will shift the GSP region of FB in an attempt to avoid the // unstable memory. // - const NvU8 MAX_GSP_BOOT_ATTEMPTS = 4; + NvU32 maxGspBootAttempts; + if (osReadRegistryDword(pGpu, NV_REG_STR_RM_GSP_BOOT_RETRY_ATTEMPTS, &maxGspBootAttempts) != NV_OK) + { + maxGspBootAttempts = NV_REG_STR_RM_GSP_BOOT_RETRY_ATTEMPTS_DEFAULT; + } + do { // Reset the thread state timeout after failed attempts to prevent premature timeouts. @@ -3488,7 +3548,7 @@ kgspInitRm_IMPL // NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && (gpusLockedMask != 0), NV_ERR_INVALID_LOCK_STATE); - } while ((status == NV_ERR_ECC_ERROR) && (pKernelGsp->bootAttempts < MAX_GSP_BOOT_ATTEMPTS)); + } while ((status == NV_ERR_ECC_ERROR) && (pKernelGsp->bootAttempts < maxGspBootAttempts)); if (status != NV_OK) { @@ -3564,15 +3624,18 @@ NV_STATUS kgspUnloadRm_IMPL ( OBJGPU *pGpu, - KernelGsp *pKernelGsp + KernelGsp *pKernelGsp, + KernelGspUnloadMode unloadMode, + NvU32 newPmLevel ) { NV_STATUS rpcStatus = NV_OK; NV_STATUS status; - KernelGspPreparedFwsecCmd preparedCmd; + NvBool bInPmTransition = (unloadMode != KGSP_UNLOAD_MODE_NORMAL); + NvBool bGc6Entering = (unloadMode == KGSP_UNLOAD_MODE_GC6_ENTER); NV_PRINTF(LEVEL_INFO, "unloading GSP-RM\n"); - NV_RM_RPC_UNLOADING_GUEST_DRIVER(pGpu, rpcStatus, NV_FALSE, NV_FALSE, 0); + NV_RM_RPC_UNLOADING_GUEST_DRIVER(pGpu, rpcStatus, bInPmTransition, bGc6Entering, newPmLevel); if (gpuIsCCFeatureEnabled(pGpu)) { @@ -3583,56 +3646,11 @@ kgspUnloadRm_IMPL // Wait for GSP-RM processor to suspend kgspWaitForProcessorSuspend_HAL(pGpu, pKernelGsp); - // Dump GSP-RM logs and reset before invoking FWSEC-SB + // Dump GSP-RM logs and reset before proceeding with the rest of teardown kgspDumpGspLogs(pKernelGsp, NV_FALSE); - // - // Avoid cascading timeouts when attempting to invoke the below ucodes if - // we are unloading due to a GSP-RM timeout. - // - threadStateResetTimeout(pGpu); - - // Because of COT, RM cannot reset GSP-RISCV and FSP has exclusive access to reset and reboot GSP for next run. - if(!(pGpu->getProperty(pGpu, PDB_PROP_GPU_IS_COT_ENABLED))) - { - kflcnReset_HAL(pGpu, staticCast(pKernelGsp, KernelFalcon)); - } - - // Invoke FWSEC-SB to put back PreOsApps during driver unload - status = kgspPrepareForFwsecSb_HAL(pGpu, pKernelGsp, pKernelGsp->pFwsecUcode, &preparedCmd); - if (status == NV_ERR_NOT_SUPPORTED) - { - // skip FWSEC-SB during driver unload if unsupported (e.g. on Hopper+) - status = NV_OK; - } - else if (status != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, "failed to prepare for FWSEC-SB for PreOsApps during driver unload: 0x%x\n", status); - NV_ASSERT(0); - } - else - { - status = kgspExecuteFwsec_HAL(pGpu, pKernelGsp, &preparedCmd); - if (status != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, "failed to execute FWSEC-SB for PreOsApps during driver unload: 0x%x\n", status); - NV_ASSERT(0); - } - } - - if (pKernelGsp->bPartitionedFmc) - { - // - // GSP-RM invokes the partitioned FMC to unload directly as part of the - // NV_RM_RPC_UNLOADING_GUEST_DRIVER call above. - // - status = rpcStatus; - } - else - { - // After instructing GSP-RM to unload itself, run Booter Unload to teardown WPR2 - status = kgspExecuteBooterUnloadIfNeeded_HAL(pGpu, pKernelGsp, 0); - } + // Teardown remaining GSP state + status = kgspTeardown_HAL(pGpu, pKernelGsp, unloadMode); // // To fix boot issue after GPU reset on ESXi config: @@ -3702,7 +3720,9 @@ kgspDumpGspLogsUnlocked_IMPL NvBool bSyncNvLog ) { - if (pKernelGsp->bInInit || pKernelGsp->pLogElf || bSyncNvLog) + if (pKernelGsp->bInInit || pKernelGsp->pLogElf || bSyncNvLog + || pKernelGsp->bHasVgpuLogs + ) { libosExtractLogs(&pKernelGsp->logDecode, bSyncNvLog); @@ -3732,7 +3752,9 @@ kgspDumpGspLogs_IMPL NvBool bSyncNvLog ) { - if (pKernelGsp->bInInit || pKernelGsp->pLogElf || bSyncNvLog) + if (pKernelGsp->bInInit || pKernelGsp->pLogElf || bSyncNvLog + || pKernelGsp->bHasVgpuLogs + ) { if (pKernelGsp->pNvlogFlushMtx != NULL) portSyncMutexAcquire(pKernelGsp->pNvlogFlushMtx); diff --git a/src/nvidia/src/kernel/gpu/gsp/kernel_gsp_trace_rats.c b/src/nvidia/src/kernel/gpu/gsp/kernel_gsp_trace_rats.c index 7a1e778c60..fd34d16a72 100644 --- a/src/nvidia/src/kernel/gpu/gsp/kernel_gsp_trace_rats.c +++ b/src/nvidia/src/kernel/gpu/gsp/kernel_gsp_trace_rats.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -33,9 +33,12 @@ #include "rmapi/event_buffer.h" #include "core/locks.h" #include "class/cl90cdtypes.h" +#include "class/cl90cdtrace.h" #include "os/os.h" #include "gpu/gpu.h" #include "gpu_mgr/gpu_mgr.h" +#include "vgpu/rpc.h" +#include "gpu/mem_mgr/mem_mgr.h" static NV_STATUS @@ -75,6 +78,23 @@ _gspTraceEventBufferAdd return status; } +static void _gspTraceReadVgpuTracingBuffer(OBJGPU *pGpu, NV_RATS_VGPU_GSP_TRACING_BUFFER *pVgpuGspTracingBuffer) +{ + // Allocated memory for buffer entries located immediately after header + NV_RATS_GSP_TRACE_RECORD *pRecords = (NV_RATS_GSP_TRACE_RECORD*) (pVgpuGspTracingBuffer + 1); + + // Set static end point so we don't read forever + NvU32 read_end = pVgpuGspTracingBuffer->write; + + while(pVgpuGspTracingBuffer->read != read_end) + { + gspTraceEventBufferLogRecord(pGpu, &pRecords[pVgpuGspTracingBuffer->read]); + pVgpuGspTracingBuffer->read = (pVgpuGspTracingBuffer->read + 1) % pVgpuGspTracingBuffer->bufferSize; + } + + pVgpuGspTracingBuffer->lastReadTimestamp = osGetTimestamp(); +} + void gspTraceNotifyAllConsumers ( OBJGPU *pGpu, @@ -87,7 +107,19 @@ void gspTraceNotifyAllConsumers GspTraceEventBufferBindMultiMapIter iter = multimapSubmapIterItems(&pGpu->gspTraceEventBufferBindingsUid, pSubmap); while (multimapItemIterNext(&iter)) { - NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE* pBind = iter.pValue; + NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE *pBind = iter.pValue; + + if (IS_VIRTUAL(pGpu)) + { + NV_RATS_VGPU_GSP_TRACING_BUFFER *pVgpuGspTracingBuffer = (NV_RATS_VGPU_GSP_TRACING_BUFFER*)pBind->message_buffer; + if (osGetTimestamp() - pVgpuGspTracingBuffer->lastReadTimestamp > osGetTimestampFreq()) + { + // vGPU plugin has no 1 second callback to empty buffer, so if we haven't read traces in over a second, + // read from GSP plugin to keep buffer up to date. + _gspTraceReadVgpuTracingBuffer(pGpu, pVgpuGspTracingBuffer); + } + } + osEventNotification(pGpu, pBind->pEventBuffer->pListeners, NV_EVENT_BUFFER_RECORD_TYPE_RATS_GSP_TRACE, @@ -110,12 +142,38 @@ gspTraceEventBufferLogRecord GspTraceEventBufferBindMultiMapIter iter = multimapSubmapIterItems(&pGpu->gspTraceEventBufferBindingsUid, pSubmap); while (multimapItemIterNext(&iter)) { - NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE* pBind = iter.pValue; + NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE *pBind = iter.pValue; _gspTraceEventBufferAdd(pGpu, pBind, pRecord); } } } +void gspTraceServiceVgpuEventTracing(OBJGPU *pGpu) +{ + GspTraceEventBufferBindMultiMapSubmap *pSubmap = multimapFindSubmap(&pGpu->gspTraceEventBufferBindingsUid, 0); + NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE *pBind = NULL; + NV_RATS_VGPU_GSP_TRACING_BUFFER *pVgpuGspTracingBuffer; + + if (pSubmap != NULL) + { + GspTraceEventBufferBindMultiMapIter iter = multimapSubmapIterItems(&pGpu->gspTraceEventBufferBindingsUid, pSubmap); + while (multimapItemIterNext(&iter)) + { + pBind = iter.pValue; + break; // only support one client right now + } + } + + if ((pBind == NULL) || (pBind->message_buffer == NULL)) + { + return; + } + + pVgpuGspTracingBuffer = (NV_RATS_VGPU_GSP_TRACING_BUFFER*)pBind->message_buffer; + pVgpuGspTracingBuffer->bGuestNotifInProgress = NV_FALSE; + _gspTraceReadVgpuTracingBuffer(pGpu, pVgpuGspTracingBuffer); +} + NV_STATUS gspTraceAddBindpoint ( @@ -124,8 +182,8 @@ gspTraceAddBindpoint RsResourceRef *pEventBufferRef, NvHandle hNotifier, NvU64 tracepointMask, - NvU32 gspLoggingBufferSize, - NvU32 gspLoggingBufferWatermark + NvU32 gspTracingBufferSize, + NvU32 gspTracingBufferWatermark ) { @@ -142,7 +200,8 @@ gspTraceAddBindpoint NV_STATUS status; EventBuffer *pEventBuffer; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); if (bBindingActive) return NV_ERR_INSUFFICIENT_RESOURCES; @@ -159,7 +218,7 @@ gspTraceAddBindpoint } } - NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE* pBind = multimapInsertItemNew(&pGpu->gspTraceEventBufferBindingsUid, 0, (NvU64)(NvUPtr)pEventBuffer); + NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE *pBind = multimapInsertItemNew(&pGpu->gspTraceEventBufferBindingsUid, 0, (NvU64)(NvUPtr)pEventBuffer); if (pBind == NULL) return NV_ERR_INVALID_ARGUMENT; @@ -182,14 +241,34 @@ gspTraceAddBindpoint if (status != NV_OK) goto done; - NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE_INFO_PARAMS ctrlParams = {0}; + + NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE_PARAMS ctrlParams = {0}; ctrlParams.tracepointMask = tracepointMask; - ctrlParams.bufferSize = gspLoggingBufferSize; - ctrlParams.bufferWatermark = gspLoggingBufferWatermark; - ctrlParams.bStart = NV_TRUE; + ctrlParams.bufferSize = gspTracingBufferSize; + ctrlParams.bufferWatermark = gspTracingBufferWatermark; + ctrlParams.flag = NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE_FLAG_START_KEEP_OLDEST; + + if (IS_VIRTUAL(pGpu)) + { + NvU32 allocBufferSize = gspTracingBufferSize * sizeof(NV_RATS_GSP_TRACE_RECORD) + sizeof(NV_RATS_VGPU_GSP_TRACING_BUFFER); + NV_ASSERT_OK_OR_GOTO(status, + memdescCreate(&(pBind->pMemDesc), + pGpu, + allocBufferSize, + 0, //alignment + NV_TRUE, ADDR_FBMEM, NV_MEMORY_UNCACHED, + MEMDESC_FLAGS_NONE), + done); + memdescAlloc(pBind->pMemDesc); + + pBind->message_buffer = memdescMapInternal(pGpu, pBind->pMemDesc, TRANSFER_FLAGS_NONE); + ctrlParams.bufferAddr = (NvU64) pBind->pMemDesc->_pteArray[0]; + + portMemSet(pBind->message_buffer, 0, allocBufferSize); + } status = pRmApi->Control(pRmApi, hInternalClient, hInternalSubdevice, - NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE, + NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE, &ctrlParams, sizeof(ctrlParams)); if (status != NV_OK) @@ -224,7 +303,7 @@ gspTraceRemoveBindpoint ( OBJGPU *pGpu, NvU64 uid, - NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE* pBind + NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE *pBind ) { RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); @@ -254,11 +333,21 @@ gspTraceRemoveBindpoint if (pGpu->gspTraceLoggingBufferActive) { - NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE_INFO_PARAMS params = {0}; - params.bStart = NV_FALSE; + NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE_PARAMS params = {0}; + params.flag = NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE_FLAG_STOP; + pRmApi->Control(pRmApi, hInternalClient, hInternalSubdevice, - NV2080_CTRL_CMD_INTERNAL_GSP_START_TRACE, + NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE, ¶ms, sizeof(params)); + if (IS_VIRTUAL(pGpu)) + { + memdescUnmapInternal(pGpu, pBind->pMemDesc, TRANSFER_FLAGS_NONE); + memdescFree(pBind->pMemDesc); + memdescDestroy(pBind->pMemDesc); + pBind->pMemDesc = NULL; + pBind->message_buffer = NULL; + } + pGpu->gspTraceLoggingBufferActive = NV_FALSE; } } @@ -282,7 +371,7 @@ gspTraceRemoveAllBindpoints while (multimapSubmapIterNext(&iter)) { GspTraceEventBufferBindMultiMapSubmap *pSubmap = iter.pValue; - NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE* pBind = NULL; + NV_EVENT_BUFFER_BIND_POINT_GSP_TRACE *pBind = NULL; NvU64 uid = mapKey_IMPL(iter.iter.pMap, pSubmap); while ((pBind = multimapFindItem(&pGpu->gspTraceEventBufferBindingsUid, diff --git a/src/nvidia/src/kernel/gpu/hwpm/kern_hwpm_streamout.c b/src/nvidia/src/kernel/gpu/hwpm/kern_hwpm_streamout.c index 776f351b57..ba46f488dc 100644 --- a/src/nvidia/src/kernel/gpu/hwpm/kern_hwpm_streamout.c +++ b/src/nvidia/src/kernel/gpu/hwpm/kern_hwpm_streamout.c @@ -400,7 +400,7 @@ khwpmInstBlkConstruct(OBJGPU *pGpu, KernelHwpm *pKernelHwpm, NvU32 bpcIdx) NV_STATUS status; NvU32 allocFlags = MEMDESC_FLAGS_NONE; MEMORY_DESCRIPTOR *pInstBlkMemDesc = NULL; - NvU32 addrSpace = ADDR_FBMEM; + NvU32 addrSpace = pGpu->getProperty(pGpu, PDB_PROP_GPU_ZERO_FB) ? ADDR_SYSMEM : ADDR_FBMEM; NvU32 attr = NV_MEMORY_WRITECOMBINED; memdescOverrideInstLoc(DRF_VAL(_REG_STR_RM, _INST_LOC_4, _HWPM_PMA, pGpu->instLocOverrides4), diff --git a/src/nvidia/src/kernel/gpu/hwpm/profiler_v2/kern_profiler_v2.c b/src/nvidia/src/kernel/gpu/hwpm/profiler_v2/kern_profiler_v2.c index 07f21fcb03..9966648d06 100644 --- a/src/nvidia/src/kernel/gpu/hwpm/profiler_v2/kern_profiler_v2.c +++ b/src/nvidia/src/kernel/gpu/hwpm/profiler_v2/kern_profiler_v2.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -26,13 +26,15 @@ #include "vgpu/rpc.h" static NV_INLINE NvBool -_isDeviceProfilingPermitted(OBJGPU *pGpu, ProfilerBase *pProf, API_SECURITY_INFO *pSecInfo) +_isNonAdminProfilingPermitted(OBJGPU *pGpu) { - if (pSecInfo->privLevel >= RS_PRIV_LEVEL_USER_ROOT) + // Any non-priv clients with RS_ACCESS_PERFMON capability are allowed + if (osCheckAccess(RS_ACCESS_PERFMON)) { return NV_TRUE; } + // Otherwise, allowed only if profiling is deprivileged for all users if (!gpuIsRmProfilingPrivileged(pGpu)) { return NV_TRUE; @@ -41,6 +43,24 @@ _isDeviceProfilingPermitted(OBJGPU *pGpu, ProfilerBase *pProf, API_SECURITY_INFO return NV_FALSE; } +static NV_INLINE NvBool +_isProfilingPermitted(OBJGPU *pGpu, ProfilerBase *pProf, API_SECURITY_INFO *pSecInfo) +{ + // Admins are always allowed to access device profiling + if (pSecInfo->privLevel >= RS_PRIV_LEVEL_USER_ROOT) + { + return NV_TRUE; + } + + // Non-priv clients may device profile only in special cases + if (_isNonAdminProfilingPermitted(pGpu)) + { + return NV_TRUE; + } + + return NV_FALSE; +} + static NvBool _isMemoryProfilingPermitted(OBJGPU *pGpu, ProfilerBase *pProf) { @@ -305,9 +325,15 @@ profilerDevQueryCapabilities_IMPL API_SECURITY_INFO *pSecInfo = pParams->pSecInfo; NvBool bAnyProfilingPermitted = NV_FALSE; - pClientPermissions->bMemoryProfilingPermitted = - _isMemoryProfilingPermitted(pGpu, pProfBase); + // Assume that sys memory profiling is permitted if video memory profiling is permitted + // This assumption will be broken, see Bug 4508667 for more detail. + pClientPermissions->bVideoMemoryProfilingPermitted = _isMemoryProfilingPermitted(pGpu, pProfBase); + pClientPermissions->bSysMemoryProfilingPermitted = pClientPermissions->bVideoMemoryProfilingPermitted; + // + // bAdminProfilingPermitted controls access to privileged profiling registers. + // This is admin-only; no exceptions, not even CAP_PERFMON + // pClientPermissions->bAdminProfilingPermitted = NV_FALSE; if (pSecInfo->privLevel >= RS_PRIV_LEVEL_USER_ROOT) { @@ -315,8 +341,7 @@ profilerDevQueryCapabilities_IMPL pClientPermissions->bAdminProfilingPermitted = NV_TRUE; } - pClientPermissions->bDevProfilingPermitted = - _isDeviceProfilingPermitted(pGpu, pProfBase, pSecInfo); + pClientPermissions->bDevProfilingPermitted = _isProfilingPermitted(pGpu, pProfBase, pSecInfo); if (pClientPermissions->bDevProfilingPermitted) { @@ -454,11 +479,15 @@ profilerDevConstructStateInterlude_IMPL NvHandle hClient = RES_GET_CLIENT_HANDLE(pProfDev); NvHandle hObject = RES_GET_HANDLE(pProfDev); + // Assumption: The context and device permissions are the same. + // This assumption will be broken with HES permission release, the default context-level HES + // permission will be different from the device-level HES permission. NVB0CC_CTRL_INTERNAL_PERMISSIONS_INIT_PARAMS params = {0}; params.bDevProfilingPermitted = clientPermissions.bDevProfilingPermitted; params.bAdminProfilingPermitted = clientPermissions.bAdminProfilingPermitted; - params.bMemoryProfilingPermitted = clientPermissions.bMemoryProfilingPermitted; + params.bVideoMemoryProfilingPermitted = clientPermissions.bVideoMemoryProfilingPermitted; + params.bSysMemoryProfilingPermitted = clientPermissions.bSysMemoryProfilingPermitted; return pRmApi->Control(pRmApi, hClient, @@ -515,3 +544,96 @@ profilerDevDestructState_FWCLIENT NV_RM_RPC_FREE(pGpu, hClient, hParent, hObject, status); } + +NV_STATUS +profilerCtxConstruct_IMPL +( + ProfilerCtx *pProfCtx, + CALL_CONTEXT *pCallContext, + RS_RES_ALLOC_PARAMS_INTERNAL *pParams +) +{ + OBJGPU *pGpu = GPU_RES_GET_GPU(pProfCtx); + ProfilerBase *pProfBase = staticCast(pProfCtx, ProfilerBase); + API_SECURITY_INFO *pSecInfo = pParams->pSecInfo; + + if (!_isProfilingPermitted(pGpu, pProfBase, pSecInfo)) + { + return NV_ERR_INSUFFICIENT_PERMISSIONS; + } + + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, profilerCtxConstructStatePrologue_HAL(pProfCtx, + pCallContext, pParams)); + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, profilerCtxConstructStateInterlude_HAL(pProfCtx, + pCallContext, pParams)); + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, profilerCtxConstructStateEpilogue_HAL(pProfCtx, + pCallContext, pParams)); + return NV_OK; +} + +NV_STATUS +profilerCtxConstructStatePrologue_FWCLIENT +( + ProfilerCtx *pProfCtx, + CALL_CONTEXT *pCallContext, + RS_RES_ALLOC_PARAMS_INTERNAL *pParams +) +{ + OBJGPU *pGpu = GPU_RES_GET_GPU(pProfCtx); + NvHandle hClient = RES_GET_CLIENT_HANDLE(pProfCtx); + NvHandle hParent = RES_GET_PARENT_HANDLE(pProfCtx); + NvHandle hObject = RES_GET_HANDLE(pProfCtx); + NvU32 class = RES_GET_EXT_CLASS_ID(pProfCtx); + NV_STATUS status = NV_OK; + + NV_RM_RPC_ALLOC_OBJECT(pGpu, hClient, hParent, hObject, class, + pParams->pAllocParams, pParams->paramsSize, status); + + return status; +} + +NV_STATUS +profilerCtxConstructStateInterlude_IMPL +( + ProfilerCtx *pProfCtx, + CALL_CONTEXT *pCallContext, + RS_RES_ALLOC_PARAMS_INTERNAL *pParams +) +{ + OBJGPU *pGpu = GPU_RES_GET_GPU(pProfCtx); + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + NvHandle hClient = RES_GET_CLIENT_HANDLE(pProfCtx); + NvHandle hObject = RES_GET_HANDLE(pProfCtx); + API_SECURITY_INFO *pSecInfo = pParams->pSecInfo; + NVB0CC_CTRL_INTERNAL_PERMISSIONS_INIT_PARAMS params = {0}; + + params.bAdminProfilingPermitted = pSecInfo->privLevel >= RS_PRIV_LEVEL_USER_ROOT ? NV_TRUE : NV_FALSE; + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, pRmApi->Control(pRmApi, + hClient, + hObject, + NVB0CC_CTRL_CMD_INTERNAL_PERMISSIONS_INIT, + ¶ms, sizeof(params))); + return NV_OK; +} + +void +profilerCtxDestruct_FWCLIENT +( + ProfilerCtx *pProfCtx +) +{ + NvHandle hClient; + NvHandle hParent; + NvHandle hObject; + RS_RES_FREE_PARAMS_INTERNAL *pParams; + CALL_CONTEXT *pCallContext; + OBJGPU *pGpu = GPU_RES_GET_GPU(pProfCtx); + NV_STATUS status = NV_OK; + + resGetFreeParams(staticCast(pProfCtx, RsResource), &pCallContext, &pParams); + hClient = pCallContext->pClient->hClient; + hParent = pCallContext->pResourceRef->pParentRef->hResource; + hObject = pCallContext->pResourceRef->hResource; + + NV_RM_RPC_FREE(pGpu, hClient, hParent, hObject, status); +} \ No newline at end of file diff --git a/src/nvidia/src/kernel/gpu/intr/intr.c b/src/nvidia/src/kernel/gpu/intr/intr.c index 3895a492a7..ac1cbbd06c 100644 --- a/src/nvidia/src/kernel/gpu/intr/intr.c +++ b/src/nvidia/src/kernel/gpu/intr/intr.c @@ -242,7 +242,7 @@ subdeviceCtrlCmdMcServiceInterrupts_IMPL } intrServiceStallList_HAL(pGpu, pIntr, &engines, NV_TRUE); - + return NV_OK; } @@ -1132,7 +1132,7 @@ NvU32 intrServiceInterruptRecords_IMPL if (bShouldService) { - GSP_TRACE_RATS_ADD_RECORD(NV_RATS_GSP_TRACE_TYPE_INTR_START, pGpu, 0); + GSP_TRACE_RATS_ADD_RECORD(NV_RATS_GSP_TRACE_TYPE_INTR_START, pGpu, (NvU32) engineIdx); ret = intrservServiceInterrupt(pGpu, pIntrService, &serviceParams); GSP_TRACE_RATS_ADD_RECORD(NV_RATS_GSP_TRACE_TYPE_INTR_END, pGpu, (NvU32) engineIdx); } diff --git a/src/nvidia/src/kernel/gpu/kern_gpu_power.c b/src/nvidia/src/kernel/gpu/kern_gpu_power.c index 2e6c3b5108..973a99457a 100644 --- a/src/nvidia/src/kernel/gpu/kern_gpu_power.c +++ b/src/nvidia/src/kernel/gpu/kern_gpu_power.c @@ -390,15 +390,6 @@ gpuIsOnTheBus_IMPL(OBJGPU *pGpu) if (RMCFG_FEATURE_PLATFORM_GSP) { - // - // TODO: This is a temporary WAR. GSP-RM should not be doing any config access, - // especially for Blackwell where config mirror is no longer available. - // This functionality is just to verify if GPU is on the bus, - // so we can either assume that in case of physical RM calling this function, - // GPU will always be on the bus or we need to figure out a different way - // to verify the same. To reach to any conclusion we need further discussion and - // analysis, hence adding this WAR temporarily. Bug 4315004. - // return NV_TRUE; } diff --git a/src/nvidia/src/kernel/gpu/mc/kernel_mc.c b/src/nvidia/src/kernel/gpu/mc/kernel_mc.c index 193671afde..83d212e595 100644 --- a/src/nvidia/src/kernel/gpu/mc/kernel_mc.c +++ b/src/nvidia/src/kernel/gpu/mc/kernel_mc.c @@ -84,28 +84,6 @@ subdeviceCtrlCmdMcGetManufacturer_IMPL return NV_OK; } -NV_STATUS -subdeviceCtrlCmdMcQueryHostclkSlowdownStatus_IMPL -( - Subdevice *pSubdevice, - NV2080_CTRL_MC_QUERY_HOSTCLK_SLOWDOWN_STATUS_PARAMS *pGetStatusParams -) -{ - pGetStatusParams->bDisabled = NV_FALSE; - - return NV_OK; -} - -NV_STATUS -subdeviceCtrlCmdMcSetHostclkSlowdownStatus_IMPL -( - Subdevice *pSubdevice, - NV2080_CTRL_MC_SET_HOSTCLK_SLOWDOWN_STATUS_PARAMS *pParams -) -{ - return NV_OK; -} - NV_STATUS subdeviceCtrlCmdMcChangeReplayableFaultOwnership_IMPL ( diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/mem_mgr_gm107.c b/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/mem_mgr_gm107.c index d88b3956b1..60fcf300e2 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/mem_mgr_gm107.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/mem_mgr_gm107.c @@ -334,9 +334,6 @@ memmgrAllocHal_GM107 type = pFbAllocInfo->pageFormat->type; addrSpace = memmgrAllocGetAddrSpace(pMemoryManager, pFbAllocInfo->pageFormat->flags, retAttr); - if ( NVOS32_ATTR_LOCATION_AGP == DRF_VAL(OS32, _ATTR, _LOCATION, pFbAllocInfo->pageFormat->attr) ) - return NV_ERR_NOT_SUPPORTED; // only local vid & pci (sysmem) supported - bAlignPhase = !!(pFbAllocInfo->pageFormat->flags & NVOS32_ALLOC_FLAGS_SKIP_RESOURCE_ALLOC); // @@ -641,12 +638,56 @@ memmgrGetBAR1InfoForDevice_GM107 bar1Info->bankSwizzleAlignment = vaspaceGetBigPageSize(pBar1VAS); bar1Info->bar1AvailSize = 0; + bar1Info->bar1MaxContigAvailSize = 0; - if (pVASHeap != NULL) + if (!kbusIsStaticBar1Enabled(pGpu, pKernelBus)) { - pVASHeap->eheapInfoForRange(pVASHeap, bar1VARange, NULL, &largestFreeSize, NULL, &freeSize); - bar1Info->bar1AvailSize = (NvU32)(freeSize / 1024); - bar1Info->bar1MaxContigAvailSize = (NvU32)(largestFreeSize / 1024); + // normal non-static BAR1 case + if (pVASHeap != NULL) + { + pVASHeap->eheapInfoForRange(pVASHeap, bar1VARange, NULL, &largestFreeSize, NULL, &freeSize); + bar1Info->bar1AvailSize = (NvU32)(freeSize / 1024); + bar1Info->bar1MaxContigAvailSize = (NvU32)(largestFreeSize / 1024); + } + } + else + { + // + // Actual BAR1 usage isn't interesting in static BAR1 because all the + // client BAR1 is already mapped. Also BAR1 >= client FB size. + // So free BAR1 that can stil be used is reported as + // bar1Size - FB in-use size + // + NV2080_CTRL_FB_GET_INFO_V2_PARAMS fbInfoParams = {0}; + Subdevice *pSubdevice; + RM_API *pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); + + NvU32 fbInUse; + + NV_ASSERT_OK_OR_RETURN( + subdeviceGetByInstance(pClient, + RES_GET_HANDLE(pDevice), + gpumgrGetSubDeviceInstanceFromGpu(pGpu), + &pSubdevice)); + + fbInfoParams.fbInfoList[0].index = NV2080_CTRL_FB_INFO_INDEX_HEAP_SIZE; + fbInfoParams.fbInfoList[1].index = NV2080_CTRL_FB_INFO_INDEX_HEAP_FREE; + + fbInfoParams.fbInfoListSize = 2; + + NV_ASSERT_OK_OR_RETURN( + pRmApi->Control(pRmApi, pClient->hClient, RES_GET_HANDLE(pSubdevice), + NV2080_CTRL_CMD_FB_GET_INFO_V2, + &fbInfoParams, + sizeof(fbInfoParams))); + + fbInUse = fbInfoParams.fbInfoList[0].data - + fbInfoParams.fbInfoList[1].data; + + bar1Info->bar1AvailSize = bar1Info->bar1Size - fbInUse; + + // Bug 4087553: we're requeted to return 0 for now + bar1Info->bar1MaxContigAvailSize = 0; } } else diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/mem_utils_gm107.c b/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/mem_utils_gm107.c index 6fc8dfaeaf..69f04ef793 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/mem_utils_gm107.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/mem_utils_gm107.c @@ -272,7 +272,8 @@ _memUtilsChannelAllocatePB_GM107 hVirtMem = pChannel->pushBufferId; size = pChannel->channelSize; - LOCK_ASSERT_AND_RETURN(!rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(!rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); + // allocate the physical memory portMemSet(&memAllocParams, 0, sizeof(memAllocParams)); memAllocParams.owner = HEAP_OWNER_RM_CLIENT_GENERIC; @@ -1127,7 +1128,7 @@ _memUtilsAllocateUserD NvU32 userdMemClass = NV01_MEMORY_LOCAL_USER; // Ensure that call is not made with lock held - LOCK_ASSERT_AND_RETURN(!rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(!rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); portMemSet(&memAllocParams, 0, sizeof(memAllocParams)); diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/virt_mem_allocator_gm107.c b/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/virt_mem_allocator_gm107.c index 2a898633b9..07f934578e 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/virt_mem_allocator_gm107.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/arch/maxwell/virt_mem_allocator_gm107.c @@ -626,7 +626,7 @@ dmaAllocMapping_GM107 { pLocals->vaRangeHi = NV_MIN(0xffffffff, pLocals->vaRangeHi); } - else if (pDma->getProperty(pDma, PDB_PROP_DMA_ENFORCE_32BIT_POINTER) && + else if (pDma->bDmaEnforce32BitPointer && (pVASpaceHeap->free > NVBIT64(32))) // Pressured address spaces are exempt { pLocals->vaRangeLo = NV_MAX(NVBIT64(32), pLocals->vaRangeLo); @@ -1032,7 +1032,11 @@ dmaAllocMapping_GM107 SLI_LOOP_BREAK; } - if (pLocals->cacheSnoop || memdescGetFlag(pAdjustedMemDesc, MEMDESC_FLAGS_MAP_SYSCOH_OVER_BAR1)) + if (memdescGetFlag(pAdjustedMemDesc, MEMDESC_FLAGS_ALLOC_SKED_REFLECTED)) + { + pLocals->aperture = NV_MMU_PTE_APERTURE_SYSTEM_NON_COHERENT_MEMORY; + } + else if (pLocals->cacheSnoop || memdescGetFlag(pAdjustedMemDesc, MEMDESC_FLAGS_MAP_SYSCOH_OVER_BAR1)) { pLocals->aperture = NV_MMU_PTE_APERTURE_SYSTEM_COHERENT_MEMORY; } @@ -1659,33 +1663,45 @@ _gmmuWalkCBMapNextEntries_RmAperture { OBJGPU *pGpu = pUserCtx->pGpu; MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); + KernelGmmu *pKernelGmmu = GPU_GET_KERNEL_GMMU(pGpu); MMU_MAP_ITERATOR *pIter = pTarget->pIter; MEMORY_DESCRIPTOR *pMemDesc = (MEMORY_DESCRIPTOR*)pLevelMem; const MMU_FMT_LEVEL *pLevelFmt = pTarget->pLevelFmt; TRANSFER_SURFACE surf = {0}; NvU32 sizeOfEntries; + NvU32 transferFlags = TRANSFER_FLAGS_SHADOW_ALLOC | TRANSFER_FLAGS_SHADOW_INIT_MEM; + + // FABRIC_VASPACE object of pGpu. + FABRIC_VASPACE *pFabricVAS = (pGpu->pFabricVAS != NULL) ? (dynamicCast(pGpu->pFabricVAS, FABRIC_VASPACE)) : NULL; + + // GVASPACE object associated with this fabric vaspace. + OBJGVASPACE *pGVAS_FLA = (pFabricVAS != NULL) ? (dynamicCast(pFabricVAS->pGVAS, OBJGVASPACE)) : NULL; NV_PRINTF(LEVEL_INFO, "[GPU%u]: PA 0x%llX, Entries 0x%X-0x%X\n", pUserCtx->pGpu->gpuInstance, memdescGetPhysAddr(pMemDesc, AT_GPU, 0), entryIndexLo, entryIndexHi); + // Apply the WAR to flush CPU cache if the VA space is of BAR1/FLA. + if (((pUserCtx->pGVAS->flags & VASPACE_FLAGS_BAR_BAR1) || + (pUserCtx->pGVAS == pGVAS_FLA)) && + pKernelGmmu->bBug4686457WAR) + { + transferFlags |= TRANSFER_FLAGS_FLUSH_CPU_CACHE_WAR_BUG4686457; + } + surf.pMemDesc = pMemDesc; surf.offset = entryIndexLo * pLevelFmt->entrySize; sizeOfEntries = (entryIndexHi - entryIndexLo + 1 ) * pLevelFmt->entrySize; - pIter->pMap = memmgrMemBeginTransfer(pMemoryManager, &surf, sizeOfEntries, - TRANSFER_FLAGS_SHADOW_ALLOC | - TRANSFER_FLAGS_SHADOW_INIT_MEM); + pIter->pMap = memmgrMemBeginTransfer(pMemoryManager, &surf, sizeOfEntries, transferFlags); NV_ASSERT_OR_RETURN_VOID(NULL != pIter->pMap); _gmmuWalkCBMapNextEntries_Direct(pUserCtx, pTarget, pLevelMem, entryIndexLo, entryIndexHi, pProgress); - memmgrMemEndTransfer(pMemoryManager, &surf, sizeOfEntries, - TRANSFER_FLAGS_SHADOW_ALLOC | - TRANSFER_FLAGS_SHADOW_INIT_MEM); + memmgrMemEndTransfer(pMemoryManager, &surf, sizeOfEntries, transferFlags); } static NV_STATUS _dmaGetFabricAddress @@ -1909,7 +1925,7 @@ dmaUpdateVASpace_GF100 // the big page size. This is because the PA alignement chooses between even/odd pages // and SW programs the PA alignment. // - if (pDma->getProperty(pDma, PDB_PROP_DMA_ENABLE_FULL_COMP_TAG_LINE)) + if (pDma->bDmaEnableFullCompTagLine) { alignSize = vaSpaceBigPageSize; } @@ -2417,7 +2433,7 @@ dmaMapBuffer_GM107 } // If trying to conserve 32bit address space, map RM buffers at 4GB+ - if (pDma->getProperty(pDma, PDB_PROP_DMA_ENFORCE_32BIT_POINTER) && + if (pDma->bDmaEnforce32BitPointer && (pVASpaceHeap->free > NVBIT64(32))) { rangeLo = NV_MAX(NVBIT64(32), rangeLo); diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/arch/turing/mem_mgr_tu102_base.c b/src/nvidia/src/kernel/gpu/mem_mgr/arch/turing/mem_mgr_tu102_base.c index f6845bcdb8..521ba1ba40 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/arch/turing/mem_mgr_tu102_base.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/arch/turing/mem_mgr_tu102_base.c @@ -48,7 +48,7 @@ memmgrIsKind_TU102 switch (op) { case FB_IS_KIND_Z: - return KIND_Z(kind); + return PTEKIND_Z(kind); case FB_IS_KIND_ZBC: return PTEKIND_COMPRESSIBLE(kind); case FB_IS_KIND_COMPRESSIBLE: @@ -63,6 +63,8 @@ memmgrIsKind_TU102 return (PTEKIND_SUPPORTED(kind) && !(KIND_INVALID(kind))); case FB_IS_KIND_DISALLOW_PLC: return PTEKIND_DISALLOWS_PLC(kind); + case FB_IS_KIND_SWIZZLED: + return !PTEKIND_GENERIC_MEMORY(kind) && !PTEKIND_PITCH(kind); default: NV_PRINTF(LEVEL_ERROR, "Bad op (%08x) passed in\n", op); DBG_BREAKPOINT(); diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/ce_utils.c b/src/nvidia/src/kernel/gpu/mem_mgr/ce_utils.c index c6a9fd0523..4fac982f9c 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/ce_utils.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/ce_utils.c @@ -50,20 +50,16 @@ static NV_STATUS _memUtilsGetCe ( - OBJGPU *pGpu, - NvHandle hClient, - NvHandle hDevice, - NvU32 *pCeInstance + OBJGPU *pGpu, + RsClient *pClient, + NvHandle hDevice, + NvU32 *pCeInstance ) { if (IS_MIG_IN_USE(pGpu)) { - RsClient *pClient; Device *pDevice; - NV_ASSERT_OK_OR_RETURN( - serverGetClientUnderLock(&g_resServ, hClient, &pClient)); - NV_ASSERT_OK_OR_RETURN( deviceGetByHandle(pClient, hDevice, &pDevice)); @@ -117,7 +113,6 @@ ceutilsConstruct_IMPL // Allocate channel with RM internal client RM_API *pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); - RmClient *pClient; OBJCHANNEL *pChannel = (OBJCHANNEL *) portMemAllocNonPaged(sizeof(OBJCHANNEL)); if (pChannel == NULL) @@ -137,8 +132,6 @@ ceutilsConstruct_IMPL } pChannel->hClient = pCeUtils->hClient; - pClient = serverutilGetClientUnderLock(pChannel->hClient); - NV_ASSERT_OR_GOTO(pClient != NULL, free_client); status = serverGetClientUnderLock(&g_resServ, pChannel->hClient, &pChannel->pRsClient); NV_ASSERT_OR_GOTO(status == NV_OK, free_client); @@ -147,7 +140,7 @@ ceutilsConstruct_IMPL { NV_ASSERT_OK_OR_GOTO( status, - clientSetHandleGenerator(staticCast(pClient, RsClient), RS_UNIQUE_HANDLE_BASE, + clientSetHandleGenerator(pChannel->pRsClient, RS_UNIQUE_HANDLE_BASE, RS_UNIQUE_HANDLE_RANGE/2 - VGPU_RESERVED_HANDLE_RANGE), free_client); } @@ -155,7 +148,7 @@ ceutilsConstruct_IMPL { NV_ASSERT_OK_OR_GOTO( status, - clientSetHandleGenerator(staticCast(pClient, RsClient), 1U, ~0U - 1U), + clientSetHandleGenerator(pChannel->pRsClient, 1U, ~0U - 1U), free_client); } @@ -214,7 +207,7 @@ ceutilsConstruct_IMPL else { NV_ASSERT_OK_OR_GOTO(status, - _memUtilsGetCe(pGpu, pChannel->hClient, pChannel->deviceId, &pChannel->ceId), + _memUtilsGetCe(pGpu, pChannel->pRsClient, pChannel->deviceId, &pChannel->ceId), free_client); } diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/channel_utils.c b/src/nvidia/src/kernel/gpu/mem_mgr/channel_utils.c index 56c7f175c0..32be6e700e 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/channel_utils.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/channel_utils.c @@ -553,10 +553,10 @@ channelFillGpFifo } NV_ASSERT_OK_OR_RETURN( - kfifoGenerateWorkSubmitToken_HAL(pGpu, - pKernelFifo, - pKernelChannel, - &workSubmitToken, NV_TRUE)); + kfifoGenerateWorkSubmitToken(pGpu, + pKernelFifo, + pKernelChannel, + &workSubmitToken, NV_TRUE)); kfifoUpdateUsermodeDoorbell_HAL(pGpu, pKernelFifo, workSubmitToken, kchannelGetRunlistId(pKernelChannel)); } diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/dma.c b/src/nvidia/src/kernel/gpu/mem_mgr/dma.c index 8dc9073117..83ed3128a6 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/dma.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/dma.c @@ -270,7 +270,7 @@ deviceCtrlCmdDmaGetPteInfo_IMPL CALL_CONTEXT *pCallContext = resservGetTlsCallContext(); RmCtrlParams *pRmCtrlParams = pCallContext->pControlParams->pLegacyParams; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_CHECK_OK_OR_RETURN(LEVEL_WARNING, vaspaceGetByHandleOrDeviceDefault(RES_GET_CLIENT(pDevice), pRmCtrlParams->hObject, @@ -304,7 +304,7 @@ deviceCtrlCmdDmaUpdatePde2_IMPL NvBool bBcState = NV_TRUE; CALL_CONTEXT *pCallContext = resservGetTlsCallContext(); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (pCallContext->secInfo.privLevel < RS_PRIV_LEVEL_KERNEL) { @@ -372,7 +372,7 @@ deviceCtrlCmdDmaSetVASpaceSize_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pDevice); OBJVASPACE *pVAS = NULL; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_CHECK_OK_OR_RETURN(LEVEL_WARNING, vaspaceGetByHandleOrDeviceDefault(RES_GET_CLIENT(pDevice), RES_GET_HANDLE(pDevice), @@ -431,7 +431,7 @@ deviceCtrlCmdDmaSetPageDirectory_IMPL NV_STATUS status = NV_OK; NvBool bBcState = NV_FALSE; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (IS_VIRTUAL(pGpu) || IS_GSP_CLIENT(pGpu)) { @@ -529,7 +529,7 @@ deviceCtrlCmdDmaUnsetPageDirectory_IMPL NvBool bBcState = NV_FALSE; NV_STATUS status = NV_OK; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (IS_VIRTUAL_WITHOUT_SRIOV(pGpu)) { @@ -614,7 +614,7 @@ deviceCtrlCmdDmaSetPteInfo_IMPL OBJVASPACE *pVAS = NULL; NV_STATUS status = NV_OK; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_CHECK_OK_OR_RETURN(LEVEL_WARNING, vaspaceGetByHandleOrDeviceDefault(RES_GET_CLIENT(pDevice), RES_GET_HANDLE(pDevice), @@ -649,7 +649,7 @@ deviceCtrlCmdDmaFlush_IMPL FB_CACHE_OP cacheOp = FB_CACHE_OP_UNDEFINED; NV_STATUS status = NV_OK; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_PRINTF(LEVEL_INFO, "Flush op invoked with target Unit 0x%x\n", flushParams->targetUnit); @@ -721,11 +721,20 @@ deviceCtrlCmdDmaAdvSchedGetVaCaps_IMPL const MEMORY_SYSTEM_STATIC_CONFIG *pMemorySystemConfig = kmemsysGetStaticConfig(pGpu, GPU_GET_KERNEL_MEMORY_SYSTEM(pGpu)); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); - NV_CHECK_OK_OR_RETURN(LEVEL_WARNING, - vaspaceGetByHandleOrDeviceDefault(RES_GET_CLIENT(pDevice), RES_GET_HANDLE(pDevice), - pParams->hVASpace, &pVAS)); + if (IS_GSP_CLIENT(pGpu) && pParams->hVASpace == NV01_NULL_OBJECT && pDevice->pVASpace == NULL) + { + // Optimization: get global VA space instead of allocating Device default VA space + OBJGPUGRP *pGpuGrp = gpumgrGetGpuGrpFromGpu(pGpu); + NV_CHECK_OK_OR_RETURN(LEVEL_WARNING, gpugrpGetGlobalVASpace(pGpuGrp, &pVAS)); + } + else + { + NV_CHECK_OK_OR_RETURN(LEVEL_WARNING, + vaspaceGetByHandleOrDeviceDefault(RES_GET_CLIENT(pDevice), RES_GET_HANDLE(pDevice), + pParams->hVASpace, &pVAS)); + } NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, vaspaceGetVasInfo(pVAS, pParams)); @@ -755,7 +764,7 @@ deviceCtrlCmdDmaGetPdeInfo_IMPL CALL_CONTEXT *pCallContext = resservGetTlsCallContext(); RmCtrlParams *pRmCtrlParams = pCallContext->pControlParams->pLegacyParams; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // // vGPU: @@ -800,7 +809,7 @@ deviceCtrlCmdDmaSetDefaultVASpace_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pDevice); NV_STATUS status = NV_OK; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_ASSERT_OK_OR_RETURN( deviceSetDefaultVASpace( @@ -841,7 +850,7 @@ subdeviceCtrlCmdDmaInvalidateTLB_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); OBJVASPACE *pVAS = NULL; - LOCK_ASSERT_AND_RETURN(rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_CHECK_OK_OR_RETURN(LEVEL_WARNING, vaspaceGetByHandleOrDeviceDefault(RES_GET_CLIENT(pSubdevice), RES_GET_PARENT_HANDLE(pSubdevice), @@ -890,7 +899,7 @@ subdeviceCtrlCmdDmaGetInfo_IMPL NvU32 i; NvU32 data; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // error checck if (pDmaInfoParams->dmaInfoTblSize > NV2080_CTRL_DMA_GET_INFO_MAX_ENTRIES) @@ -940,7 +949,7 @@ deviceCtrlCmdDmaInvalidateTLB_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pDevice); OBJVASPACE *pVAS = NULL; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // // vGPU: @@ -1002,7 +1011,7 @@ deviceCtrlCmdDmaGetCaps_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pDevice); VirtMemAllocator *pDma = GPU_GET_DMA(pGpu); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // sanity check array size if (pDmaCapsParams->capsTblSize != NV0080_CTRL_DMA_CAPS_TBL_SIZE) @@ -1015,17 +1024,17 @@ deviceCtrlCmdDmaGetCaps_IMPL portMemSet(pDmaCapsParams->capsTbl, 0, NV0080_CTRL_DMA_CAPS_TBL_SIZE); // Fill in caps - if (pDma->getProperty(pDma, PDB_PROP_DMA_ENFORCE_32BIT_POINTER)) + if (pDma->bDmaEnforce32BitPointer) RMCTRL_SET_CAP(pDmaCapsParams->capsTbl, NV0080_CTRL_DMA_CAPS, _32BIT_POINTER_ENFORCED); - if (pDma->getProperty(pDma, PDB_PROP_DMA_SHADER_ACCESS_SUPPORTED)) + if (pDma->bDmaShaderAccessSupported) RMCTRL_SET_CAP(pDmaCapsParams->capsTbl, NV0080_CTRL_DMA_CAPS, _SHADER_ACCESS_SUPPORTED); - if (pDma->getProperty(pDma, PDB_PROP_DMA_IS_SUPPORTED_SPARSE_VIRTUAL)) + if (pDma->bDmaIsSupportedSparseVirtual) RMCTRL_SET_CAP(pDmaCapsParams->capsTbl, NV0080_CTRL_DMA_CAPS, _SPARSE_VIRTUAL_SUPPORTED); // Supported on all platforms except the Maxwell amodel simulator - if (pDma->getProperty(pDma, PDB_PROP_DMA_MULTIPLE_VASPACES_SUPPORTED)) + if (pDma->bDmaMultipleVaspaceSupported) RMCTRL_SET_CAP(pDmaCapsParams->capsTbl, NV0080_CTRL_DMA_CAPS, _MULTIPLE_VA_SPACES_SUPPORTED); return status; @@ -1048,7 +1057,7 @@ deviceCtrlCmdDmaEnablePrivilegedRange_IMPL NV0080_CTRL_DMA_ENABLE_PRIVILEGED_RANGE_PARAMS *pParams ) { - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (pParams->hVASpace != NV01_NULL_OBJECT) { @@ -1075,7 +1084,7 @@ diagapiCtrlCmdDmaIsSupportedSparseVirtual_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pDiagApi); VirtMemAllocator *pDma = GPU_GET_DMA(pGpu); - pParams->bIsSupported = pDma->getProperty(pDma, PDB_PROP_DMA_IS_SUPPORTED_SPARSE_VIRTUAL); + pParams->bIsSupported = pDma->bDmaIsSupportedSparseVirtual; return NV_OK; } diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/heap.c b/src/nvidia/src/kernel/gpu/mem_mgr/heap.c index fa6e75afdf..6ce86b7c94 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/heap.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/heap.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -2244,7 +2244,7 @@ _heapFindBlockByOffset NV_STATUS status; // IRQL TEST: must be running at equivalent of passive-level - IRQL_ASSERT_AND_RETURN(!osIsRaisedIRQL()); + NV_ASSERT_OR_RETURN(!osIsRaisedIRQL(), NV_ERR_INVALID_IRQ_LEVEL); *ppBlock = _heapFindAlignedBlockWithOwner(pGpu, pHeap, owner, offset); @@ -2607,6 +2607,47 @@ NV_STATUS heapInfo_IMPL return status; } +void +heapGetClientAddrSpaceSize_IMPL +( + OBJGPU *pGpu, + Heap *pHeap, + NvU64 *pSize +) +{ + MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); + FB_REGION_DESCRIPTOR *pFbRegion; + NvU64 highestAddr = 0; + + // + // Iterate the regions that are allocatable to the client - + // non-reserved and non RM-internal - same logic as + // heapInitInternal_IMPL used to remove memory + // + for (NvU32 i = 0; i < pMemoryManager->Ram.numFBRegions; i++) + { + pFbRegion = &pMemoryManager->Ram.fbRegion[i]; + + // If the region is reserved or internal, ignore it here + if (!(pFbRegion->bRsvdRegion || pFbRegion->bInternalHeap)) + { + // Skip regions which are outside the heap boundaries + if (pFbRegion->base < pHeap->base && pFbRegion->limit < pHeap->base) + { + continue; + } + + highestAddr = NV_MAX(highestAddr, pFbRegion->limit); + } + } + + // should end in 0xFFFF as a limit + NV_ASSERT((highestAddr & RM_PAGE_SIZE ) != 0); + HEAP_VALIDATE(pHeap); + + *pSize = highestAddr + 1; +} + NV_STATUS heapInfoTypeAllocBlocks_IMPL ( Heap *pHeap, diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/mem_desc.c b/src/nvidia/src/kernel/gpu/mem_mgr/mem_desc.c index d11fa1eb13..09085325d9 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/mem_desc.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/mem_desc.c @@ -558,7 +558,7 @@ memdescDestroy { NV_ASSERT_OK(kbusUpdateStaticBar1VAMapping_HAL(pMemDesc->pGpu, GPU_GET_KERNEL_BUS(pMemDesc->pGpu), pMemDesc, - 0, memdescGetSize(pMemDesc), NV_TRUE)); + NV_TRUE)); } if (pMemDesc->_flags & MEMDESC_FLAGS_DUMMY_TOPLEVEL) @@ -1869,15 +1869,11 @@ memdescMap else { KernelMemorySystem *pKernelMemorySystem = GPU_GET_KERNEL_MEMORY_SYSTEM(pGpu); - NvU64 fbOffset = pMemDesc->_pteArray[0] + - pMemDesc->PteAdjust + Offset; + NvU64 fbOffset = memdescGetPhysAddr(pMemDesc, AT_CPU, Offset); bar1PhysAddr = pKernelMemorySystem->coherentCpuFbBase + fbOffset; - mode = NV_MEMORY_CACHED; - status = osMapPciMemoryUser(pGpu->pOsGpuInfo, bar1PhysAddr, - Size, Protect, pAddress, - &pMapping->pPriv, - mode); + // Until we have proper discontig support for NUMA, this assumes that the unix path is a noop + *pAddress = (NvP64) bar1PhysAddr; } @@ -2267,6 +2263,19 @@ void memdescUnmapInternal case MEMDESC_MAP_INTERNAL_TYPE_COHERENT_FBMEM: { + // + // This flag is set when there is an update in BAR1/FLA PDE/PTE and when mmufill + // of BAR1 and FLA read on NINB_VC which doesn't probe the cpu cache. + // + // TODO: This flag needs to be set when updating PDE/PTE for invisible BAR2 also. + // + if (flags & TRANSFER_FLAGS_FLUSH_CPU_CACHE_WAR_BUG4686457) + { + osFlushGpuCoherentCpuCacheRange(pGpu->pOsGpuInfo, + (NvUPtr)pMemDesc->_pInternalMapping, + pMemDesc->ActualSize); + } + kbusUnmapCoherentCpuMapping_HAL(pGpu, GPU_GET_KERNEL_BUS(pGpu), pMemDesc, pMemDesc->_pInternalMapping, pMemDesc->_pInternalMappingPriv); break; @@ -4210,7 +4219,8 @@ PMEMORY_DESCRIPTOR memdescGetRootMemDesc void memdescSetCustomHeap ( - PMEMORY_DESCRIPTOR pMemDesc + PMEMORY_DESCRIPTOR pMemDesc, + MEMDESC_CUSTOM_HEAP heap ) { NV_ASSERT(0); @@ -4224,13 +4234,14 @@ memdescSetCustomHeap * * @returns NV_TRUE if flag MEMDESC_FLAGS_CUSTOM_HEAP_ACR is SET. */ -NvBool +MEMDESC_CUSTOM_HEAP memdescGetCustomHeap ( PMEMORY_DESCRIPTOR pMemDesc ) { - return NV_FALSE; + + return MEMDESC_CUSTOM_HEAP_NONE; } PIOVAMAPPING memdescGetIommuMap diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/mem_mapper.c b/src/nvidia/src/kernel/gpu/mem_mgr/mem_mapper.c index 009ceceb47..5f63eeb968 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/mem_mapper.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/mem_mapper.c @@ -40,6 +40,28 @@ #include "class/cl0080.h" #include "class/cl2080.h" +static NV_STATUS +memmapperCheckGpuFullPower(OBJGPU *pGpu) +{ + NV_CHECK_OR_RETURN(LEVEL_ERROR, pGpu != NULL, NV_ERR_INVALID_ARGUMENT); + + // API lock should protect us from getting called in the middle of suspend/resume + NV_ASSERT_OR_RETURN(!pGpu->getProperty(pGpu, PDB_PROP_GPU_IN_PM_CODEPATH), NV_ERR_INVALID_STATE); + + // MemoryMapper should stop executing all operations if one of affected GPUs is suspended + return gpuIsGpuFullPower(pGpu) ? NV_OK : NV_ERR_NOT_READY; +} + +static NV_STATUS +memmapperCheckGpuFullPowerForMemory(Memory *pMemory) +{ + if (pMemory == NULL || pMemory->pMemDesc->pGpu == NULL) + return NV_OK; + + // Use GPU from memdesc, as it can be duped under a different GPU + return memmapperCheckGpuFullPower(pMemory->pMemDesc->pGpu); +} + static NV_STATUS memmapperExecuteMap ( @@ -54,8 +76,18 @@ memmapperExecuteMap NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, clientGetResourceRef(pClient, pMap->hVirtualMemory, &pVirtualResourceRef)); VirtualMemory *pVirtualMemory = dynamicCast(pVirtualResourceRef->pResource, VirtualMemory); NV_CHECK_OR_RETURN(LEVEL_ERROR, pVirtualMemory != NULL, NV_ERR_INVALID_ARGUMENT); + NV_CHECK_OR_RETURN(LEVEL_ERROR, staticCast(pVirtualMemory, Memory)->pMemDesc->pGpu == GPU_RES_GET_GPU(pMemoryMapper), + NV_ERR_INVALID_ARGUMENT); NvU64 baseVirtAddr = memdescGetPhysAddr(staticCast(pVirtualMemory, Memory)->pMemDesc, AT_GPU_VA, 0); + RsResourceRef *pResourceRef; + NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, clientGetResourceRef(pClient, pMap->hPhysicalMemory, &pResourceRef)); + Memory *pMemory = dynamicCast(pResourceRef->pResource, Memory); + NV_CHECK_OR_RETURN(LEVEL_ERROR, pMemory != NULL, NV_ERR_INVALID_ARGUMENT); + + // physical memory can be owned by a remote GPU + NV_CHECK_OK_OR_RETURN(LEVEL_INFO, memmapperCheckGpuFullPowerForMemory(pMemory)); + NV_PRINTF(LEVEL_INFO, "map virt:(0x%x:0x%llx) phys:(0x%x:0x%llx) size:0x%llx dmaFlags:0x%x\n", pMap->hVirtualMemory, pMap->virtualOffset, pMap->hPhysicalMemory, pMap->physicalOffset, pMap->size, pMap->dmaFlags); @@ -92,6 +124,8 @@ memmapperExecuteUnmap NV_CHECK_OK_OR_RETURN(LEVEL_ERROR, clientGetResourceRef(pClient, pUnmap->hVirtualMemory, &pVirtualResourceRef)); VirtualMemory *pVirtualMemory = dynamicCast(pVirtualResourceRef->pResource, VirtualMemory); NV_CHECK_OR_RETURN(LEVEL_ERROR, pVirtualMemory != NULL, NV_ERR_INVALID_ARGUMENT); + NV_CHECK_OR_RETURN(LEVEL_ERROR, staticCast(pVirtualMemory, Memory)->pMemDesc->pGpu == GPU_RES_GET_GPU(pMemoryMapper), + NV_ERR_INVALID_ARGUMENT); NvU64 baseVirtAddr = memdescGetPhysAddr(staticCast(pVirtualMemory, Memory)->pMemDesc, AT_GPU_VA, 0); NV_PRINTF(LEVEL_INFO, "unmap virt:(0x%x:0x%llx) size:0x%llx dmaFlags:0x%x\n", @@ -182,13 +216,36 @@ memmapperProcessWork return; } - RM_API *pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); + NV_CHECK_OR_RETURN_VOID(LEVEL_INFO, + memmapperCheckGpuFullPower(GPU_RES_GET_GPU(pMemoryMapper)) == NV_OK); + NV_CHECK_OR_RETURN_VOID(LEVEL_INFO, + memmapperCheckGpuFullPowerForMemory(pMemoryMapper->pSemSurf->pShared->pSemaphoreMem) == NV_OK); + NV_CHECK_OR_RETURN_VOID(LEVEL_INFO, + memmapperCheckGpuFullPowerForMemory(pMemoryMapper->pSemSurf->pShared->pMaxSubmittedMem) == NV_OK); + NV_CHECK_OR_RETURN_VOID(LEVEL_INFO, + memmapperCheckGpuFullPowerForMemory(pMemoryMapper->pNotificationMemory) == NV_OK); + + RM_API *pRmApi = rmapiGetInterface(RMAPI_API_LOCK_INTERNAL); + NvBool bMapExecuted = NV_FALSE; while (pMemoryMapper->operationQueueGet != pMemoryMapper->operationQueuePut) { NV00FE_CTRL_OPERATION *pOperation = &pMemoryMapper->pOperationQueue[pMemoryMapper->operationQueueGet]; NV_STATUS status = NV_OK; + if (pOperation->type == NV00FE_CTRL_OPERATION_TYPE_MAP || + pOperation->type == NV00FE_CTRL_OPERATION_TYPE_UNMAP) + { + if (bMapExecuted) + { + // queue another work item to avoid holding the worker for too long + memmapperQueueWork(pMemoryMapper); + break; + } + + bMapExecuted = NV_TRUE; + } + switch (pOperation->type) { case NV00FE_CTRL_OPERATION_TYPE_NOP: @@ -247,8 +304,8 @@ memoryMapperWorker } } -static void -memoryMapperQueueWork +void +memmapperQueueWork_IMPL ( MemoryMapper *pMemoryMapper ) @@ -260,9 +317,9 @@ memoryMapperQueueWork memoryMapperWorker, pMemoryMapper->pWorkerParams, OS_QUEUE_WORKITEM_FLAGS_DONT_FREE_PARAMS + | OS_QUEUE_WORKITEM_FLAGS_DROP_ON_UNLOAD_QUEUE_FLUSH | OS_QUEUE_WORKITEM_FLAGS_FALLBACK_TO_DPC - | OS_QUEUE_WORKITEM_FLAGS_LOCK_API_RW - | OS_QUEUE_WORKITEM_FLAGS_LOCK_GPUS)); + | OS_QUEUE_WORKITEM_FLAGS_LOCK_API_RW)); } static void @@ -275,7 +332,7 @@ memmapperSemaphoreEventCallback NvU32 status ) { - memoryMapperQueueWork(pArg); + memmapperQueueWork(pArg); } NV_STATUS @@ -507,7 +564,7 @@ memmapperCtrlCmdSubmitOperations_IMPL if (bQueueWorker && pMemoryMapper->operationQueuePut != pMemoryMapper->operationQueueGet) { // only queue worker when the queue is not empty - memoryMapperQueueWork(pMemoryMapper); + memmapperQueueWork(pMemoryMapper); } return status; diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr.c b/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr.c index e87d0b931e..9f30181a62 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr.c @@ -48,9 +48,11 @@ #include "class/cl0040.h" // NV01_MEMORY_LOCAL_USER #include "class/cl503c.h" #include "class/cl906f.h" // GF100_CHANNEL_GPFIFO +#include "class/cl0005.h" // NV01_EVENT_KERNEL_CALLBACK_EX #include "os/os.h" #include "gpu/gsp/kernel_gsp.h" #include "gpu/conf_compute/conf_compute.h" +#include "gpu/mem_mgr/mem_mapper.h" #include "platform/sli/sli.h" #include "virtualization/hypervisor/hypervisor.h" @@ -204,18 +206,13 @@ _memmgrInitRegistryOverrides(OBJGPU *pGpu, MemoryManager *pMemoryManager) pMemoryManager->bAllowSysmemHugePages = NV_FALSE; } - // This key should not be used on physical (GSP) RM. - if (!RMCFG_FEATURE_PLATFORM_GSP) + // Allow user to increase size of RM reserved heap via a regkey + if (osReadRegistryDword(pGpu, NV_REG_STR_RM_INCREASE_RSVD_MEMORY_SIZE_MB, + &data32) == NV_OK) { - // Allow user to increase size of RM reserved heap via a regkey - if (osReadRegistryDword(pGpu, NV_REG_STR_RM_INCREASE_RSVD_MEMORY_SIZE_MB, - &data32) == NV_OK) - { - pMemoryManager->rsvdMemorySizeIncrement = (NvU64)data32 << 20; - NV_PRINTF(LEVEL_ERROR, - "User specified increase in reserved size = %d MBs\n", - data32); - } + pMemoryManager->rsvdMemorySizeIncrement = (NvU64)data32 << 20; + NV_PRINTF(LEVEL_ERROR, + "User specified increase in reserved size = %d MBs\n", data32); } if (osReadRegistryDword(pGpu, @@ -453,6 +450,75 @@ memmgrPreSchedulingDisableHandler return memmgrDestroyInternalChannels(pGpu, GPU_GET_MEMORY_MANAGER(pGpu)); } +static void +memmgrSuspendResumeCallback +( + void *pArg, + void *pData, + NvHandle hEvent, + NvU32 data, + NvU32 status +) +{ + RmClient **ppClient = serverutilGetFirstClientUnderLock(); + + NV_ASSERT_OR_RETURN_VOID(rmapiLockIsOwner()); + + while (ppClient != NULL) + { + RsClient *pClient = staticCast(*ppClient, RsClient); + RS_ITERATOR it = clientRefIter(pClient, NULL, classId(MemoryMapper), RS_ITERATE_DESCENDANTS, NV_TRUE); + + while (clientRefIterNext(pClient, &it)) + { + MemoryMapper *pMemoryMapper = dynamicCast(it.pResourceRef->pResource, MemoryMapper); + + // + // All MemoryMapper work is stopped if it affects a suspended GPU + // Requeue all workers on resume, regardless of owner GPU + // + memmapperQueueWork(pMemoryMapper); + } + + ppClient = serverutilGetNextClientUnderLock(ppClient); + } +} + +static NV_STATUS +memmgrRegisterSuspendCallbacks(MemoryManager *pMemoryManager) +{ + static NVOS10_EVENT_KERNEL_CALLBACK_EX resumeCallback = { .func = memmgrSuspendResumeCallback }; + RM_API *pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); + NV0005_ALLOC_PARAMETERS eventParams = { 0 }; + NV2080_CTRL_EVENT_SET_NOTIFICATION_PARAMS eventNotificationParams = { 0 }; + NvHandle hEvent; + + eventParams.hParentClient = pMemoryManager->hClient; + eventParams.hClass = NV01_EVENT_KERNEL_CALLBACK_EX; + eventParams.notifyIndex = NV2080_NOTIFIERS_POWER_RESUME; + eventParams.data = NV_PTR_TO_NvP64(&resumeCallback); + NV_ASSERT_OK_OR_RETURN( + pRmApi->Alloc(pRmApi, + pMemoryManager->hClient, + pMemoryManager->hSubdevice, + &hEvent, + NV01_EVENT_KERNEL_CALLBACK_EX, + &eventParams, + sizeof(eventParams))); + + eventNotificationParams.event = NV2080_NOTIFIERS_POWER_RESUME; + eventNotificationParams.action = NV2080_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT; + NV_ASSERT_OK_OR_RETURN( + pRmApi->Control(pRmApi, + pMemoryManager->hClient, + pMemoryManager->hSubdevice, + NV2080_CTRL_CMD_EVENT_SET_NOTIFICATION, + &eventNotificationParams, + sizeof(eventNotificationParams))); + + return NV_OK; +} + NV_STATUS memmgrStateInitLocked_IMPL ( @@ -568,7 +634,14 @@ memmgrStateInitLocked_IMPL _memmgrInitRUSDHeapSize(pGpu, pMemoryManager); } - status = _memmgrAllocInternalClientObjects(pGpu, pMemoryManager); + NV_ASSERT_OK_OR_GOTO(status, _memmgrAllocInternalClientObjects(pGpu, pMemoryManager), failed); + + if (!RMCFG_FEATURE_PLATFORM_GSP) + { + NV_ASSERT_OK_OR_GOTO(status, memmgrRegisterSuspendCallbacks(pMemoryManager), failed); + } + +failed: if (status != NV_OK) { // @@ -1992,7 +2065,7 @@ NV_STATUS memmgrFree_IMPL NvU32 pmaFreeFlag = 0; // IRQL TEST: must be running at equivalent of passive-level - IRQL_ASSERT_AND_RETURN(!osIsRaisedIRQL()); + NV_ASSERT_OR_RETURN(!osIsRaisedIRQL(), NV_ERR_INVALID_IRQ_LEVEL); if (pMemDesc == NULL) return NV_ERR_INVALID_ARGUMENT; @@ -2992,13 +3065,40 @@ _memmgrPmaStatsUpdateCb ) { OBJGPU *pGpu = (OBJGPU *) pCtx; + KernelBus *pKernelBus = GPU_GET_KERNEL_BUS(pGpu); RUSD_PMA_MEMORY_INFO *pSharedData; + RUSD_BAR1_MEMORY_INFO *pBar1Info; + NvU64 freeMem = freeFrames << PMA_PAGE_SHIFT; + NvU64 totalMem = 0; NV_ASSERT_OR_RETURN_VOID(pGpu != NULL); pSharedData = gpushareddataWriteStart(pGpu, pmaMemoryInfo); - pSharedData->freePmaMemory = freeFrames << PMA_PAGE_SHIFT; + MEM_WR64(&pSharedData->freePmaMemory, freeMem); gpushareddataWriteFinish(pGpu, pmaMemoryInfo); + + if (pKernelBus == NULL) + { + return; + } + + // + // VGPU GFID check just accesses calling context, and the TLS database mantains its own global lock. + // Thus, following call to kbusIsStaticBar1Enabled should be thread-safe even when RM lock not held. + // + if ((!kbusIsStaticBar1Enabled(pGpu, pKernelBus)) || kbusIsBar1Disabled(pKernelBus)) + { + return; + } + + totalMem = MEM_RD64(&pSharedData->totalPmaMemory); + + pBar1Info = gpushareddataWriteStart(pGpu, bar1MemoryInfo); + + MEM_WR32(&pBar1Info->bar1AvailSize, MEM_RD32(&pBar1Info->bar1Size) - + ((totalMem - freeMem) >> 10)); // Available size in KB + + gpushareddataWriteFinish(pGpu, bar1MemoryInfo); } static void @@ -3020,7 +3120,7 @@ _memmgrInitRUSDHeapSize bytesTotal -= ((NvU64)pKernelMemorySystem->fbOverrideStartKb << 10); pSharedData = gpushareddataWriteStart(pGpu, pmaMemoryInfo); - pSharedData->totalPmaMemory = bytesTotal; + MEM_WR64(&pSharedData->totalPmaMemory, bytesTotal); gpushareddataWriteFinish(pGpu, pmaMemoryInfo); } @@ -3368,6 +3468,38 @@ memmgrPmaRegisterRegions_IMPL return status; } + +/*! + * @brief Retrieve the size of the client FB address space + * + * @param pGpu + * @param pMemoryManager + * + * @returns size of client FB address space + */ +NvU64 +memmgrGetClientFbAddrSpaceSize_IMPL +( + OBJGPU *pGpu, + MemoryManager *pMemoryManager +) +{ + NvBool bIsPmaEnabled = memmgrIsPmaInitialized(pMemoryManager); + Heap *pHeap = GPU_GET_HEAP(pGpu); + NvU64 size; + + if (bIsPmaEnabled) + { + pmaGetClientAddrSpaceSize(&pHeap->pmaObject, &size); + } + else + { + heapGetClientAddrSpaceSize(pGpu, pHeap, &size); + } + + return size; +} + /*! * @brief Allocate internal handles for MIG partition memory allocation */ diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_ctrl.c b/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_ctrl.c index c267482d3b..95acbe8a49 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_ctrl.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_ctrl.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -219,7 +219,7 @@ deviceCtrlCmdFbGetCaps_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pDevice); NvU8 *pFbCaps = NvP64_VALUE(pFbCapsParams->capsTbl); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // sanity check array size if (pFbCapsParams->capsTblSize != NV0080_CTRL_FB_CAPS_TBL_SIZE) @@ -250,7 +250,7 @@ deviceCtrlCmdFbGetCapsV2_IMPL NvU8 *pFbCaps = pFbCapsParams->capsTbl; NV_STATUS rmStatus; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // now accumulate caps for entire device rmStatus = memmgrGetFbCaps(pGpu, pFbCaps); @@ -271,7 +271,7 @@ deviceCtrlCmdSetDefaultVidmemPhysicality_IMPL NV0080_CTRL_FB_SET_DEFAULT_VIDMEM_PHYSICALITY_PARAMS *pParams ) { - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NvU32 override; switch (pParams->value) @@ -314,14 +314,16 @@ subdeviceCtrlCmdFbGetBar1Offset_IMPL NvU64 offset; RsCpuMapping *pCpuMapping = NULL; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); pCpuMapping = CliFindMappingInClient(hClient, hDevice, pFbMemParams->cpuVirtAddress); if (pCpuMapping == NULL) return NV_ERR_INVALID_ARGUMENT; + NV_ASSERT_OR_RETURN(pCpuMapping->pPrivate->memArea.numRanges == 1, NV_ERR_INVALID_ARGUMENT); + offset = (NvU64)pFbMemParams->cpuVirtAddress - (NvU64)pCpuMapping->pLinearAddress; - pFbMemParams->gpuVirtAddress = pCpuMapping->pPrivate->gpuAddress + offset; + pFbMemParams->gpuVirtAddress = pCpuMapping->pPrivate->memArea.pRanges[0].start + offset; return NV_OK; } @@ -344,7 +346,7 @@ subdeviceCtrlCmdFbIsKind_IMPL NV_STATUS status = NV_OK; NvBool rmResult; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // perform appropriate RM operation based on the supported sdk operations switch (pIsKindParams->operation) @@ -677,7 +679,7 @@ subdeviceCtrlCmdFbGetFBRegionInfo_IMPL ct_assert(NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_MEM_TYPES >= NVOS32_NUM_MEM_TYPES); ct_assert(NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_MAX_ENTRIES >= MAX_FB_REGIONS); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); pGFBRIParams->numFBRegions = 0; diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/mem_scrub.c b/src/nvidia/src/kernel/gpu/mem_mgr/mem_scrub.c index e3b28f74c9..5e6f3993f8 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/mem_scrub.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/mem_scrub.c @@ -171,14 +171,14 @@ scrubberConstruct { NV_ASSERT_OK_OR_GOTO(status, objCreate(&pScrubber->pSec2Utils, pHeap, Sec2Utils, pGpu, pKernelMIGGPUInstance), destroyscrublist); - pScrubber->engineType = NV2080_ENGINE_TYPE_SEC2; + pScrubber->bIsEngineTypeSec2 = NV_TRUE; } else { NV_ASSERT_OK_OR_GOTO(status, objCreate(&pScrubber->pCeUtils, pHeap, CeUtils, pGpu, pKernelMIGGPUInstance, &ceUtilsAllocParams), destroyscrublist); - pScrubber->engineType = gpuGetFirstAsyncLce_HAL(pGpu); + pScrubber->bIsEngineTypeSec2 = NV_FALSE; } NV_ASSERT_OK_OR_GOTO(status, pmaRegMemScrub(pPma, pScrubber), destroyscrublist); } @@ -215,7 +215,7 @@ _isScrubWorkPending( else { NvU64 lastCompleted; - if (pScrubber->engineType == NV2080_ENGINE_TYPE_SEC2) + if (pScrubber->bIsEngineTypeSec2) { lastCompleted = sec2utilsUpdateProgress(pScrubber->pSec2Utils); } @@ -298,7 +298,7 @@ scrubberDestruct portMemFree(pScrubber->pScrubList); { - if (pScrubber->engineType == NV2080_ENGINE_TYPE_SEC2) + if (pScrubber->bIsEngineTypeSec2) { objDelete(pScrubber->pSec2Utils); } @@ -825,7 +825,7 @@ _scrubWaitAndSave while (currentCompletedId < (pScrubber->lastSeenIdByClient + itemsToSave)) { { - if (pScrubber->engineType == NV2080_ENGINE_TYPE_SEC2) + if (pScrubber->bIsEngineTypeSec2) sec2utilsServiceInterrupts(pScrubber->pSec2Utils); else ceutilsServiceInterrupts(pScrubber->pCeUtils); @@ -935,7 +935,7 @@ _scrubCheckProgress } else { - if (pScrubber->engineType == NV2080_ENGINE_TYPE_SEC2) + if (pScrubber->bIsEngineTypeSec2) lastSWSemaphoreDone = sec2utilsUpdateProgress(pScrubber->pSec2Utils); else lastSWSemaphoreDone = ceutilsUpdateProgress(pScrubber->pCeUtils); @@ -968,7 +968,7 @@ _scrubMemory memdescDescribe(pMemDesc, ADDR_FBMEM, base, size); - if (pScrubber->engineType == NV2080_ENGINE_TYPE_SEC2) + if (pScrubber->bIsEngineTypeSec2) { SEC2UTILS_MEMSET_PARAMS memsetParams = {0}; memsetParams.pMemDesc = pMemDesc; diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/mem_utils.c b/src/nvidia/src/kernel/gpu/mem_mgr/mem_utils.c index 2c99dac790..e03ad4ce25 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/mem_utils.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/mem_utils.c @@ -1486,7 +1486,7 @@ memmgrAllocResources_IMPL NvBool bAllocedHwRes = NV_FALSE; // IRQL TEST: must be running at equivalent of passive-level - IRQL_ASSERT_AND_RETURN(!osIsRaisedIRQL()); + NV_ASSERT_OR_RETURN(!osIsRaisedIRQL(), NV_ERR_INVALID_IRQ_LEVEL); // // Check for valid size. diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/phys_mem_allocator/numa.c b/src/nvidia/src/kernel/gpu/mem_mgr/phys_mem_allocator/numa.c index e91781c72d..717ee98c88 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/phys_mem_allocator/numa.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/phys_mem_allocator/numa.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2015-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/phys_mem_allocator/phys_mem_allocator.c b/src/nvidia/src/kernel/gpu/mem_mgr/phys_mem_allocator/phys_mem_allocator.c index 6166c6dcb8..439175b0fb 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/phys_mem_allocator/phys_mem_allocator.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/phys_mem_allocator/phys_mem_allocator.c @@ -1668,6 +1668,27 @@ pmaGetTotalMemory } } +void +pmaGetClientAddrSpaceSize +( + PMA *pPma, + NvU64 *pSize +) +{ + NvU64 highestAddr = 0; + + // Iterate the regions that were given to PMA + for (NvU32 i = 0; i < pPma->regSize; i++) + { + highestAddr = NV_MAX(highestAddr, pPma->pRegDescriptors[i]->limit); + } + + // should end in 0xFFFF as a limit + NV_ASSERT((highestAddr & RM_PAGE_SIZE ) != 0); + + *pSize = highestAddr + 1; +} + NV_STATUS pmaGetRegionInfo ( @@ -1839,6 +1860,8 @@ pmaGetClientBlacklistedPages NvBool bClientManagedBlacklist = NV_FALSE; PMA_BLACKLIST_CHUNK *pBlacklistChunks, *pBlacklistChunk; + NV_ASSERT_OR_RETURN_VOID((pPma != NULL) && (pChunks != NULL) && (pPageSize != NULL) && (pNumChunks != NULL)); + for (region = 0; region < pPma->regSize; region++) { pmaQueryBlacklistInfo(pPma, &blacklistCount, diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/sec2_utils.c b/src/nvidia/src/kernel/gpu/mem_mgr/sec2_utils.c index d7eff6c90b..60f6b8838a 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/sec2_utils.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/sec2_utils.c @@ -188,7 +188,6 @@ sec2utilsConstruct_IMPL // Allocate channel with RM internal client RM_API *pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); - RmClient *pClient = NULL; OBJCHANNEL *pChannel = (OBJCHANNEL *) portMemAllocNonPaged(sizeof(OBJCHANNEL)); NV_ASSERT_OR_RETURN(pChannel != NULL, NV_ERR_INSUFFICIENT_RESOURCES); @@ -200,12 +199,10 @@ sec2utilsConstruct_IMPL sizeof(pSec2Utils->hClient)), cleanup); pChannel->hClient = pSec2Utils->hClient; - pClient = serverutilGetClientUnderLock(pChannel->hClient); - NV_ASSERT_OR_GOTO(pClient != NULL, free_client); NV_ASSERT_OK_OR_GOTO(status, serverGetClientUnderLock(&g_resServ, pChannel->hClient, &pChannel->pRsClient), free_client); - NV_ASSERT_OK_OR_GOTO(status, clientSetHandleGenerator(staticCast(pClient, RsClient), 1U, ~0U - 1U), free_client); + NV_ASSERT_OK_OR_GOTO(status, clientSetHandleGenerator(pChannel->pRsClient, 1U, ~0U - 1U), free_client); pChannel->bClientAllocated = NV_TRUE; pChannel->pGpu = pGpu; diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/sem_surf.c b/src/nvidia/src/kernel/gpu/mem_mgr/sem_surf.c index dcb4f3cde0..01cb121f2d 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/sem_surf.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/sem_surf.c @@ -292,7 +292,7 @@ _semsurfSetMonitoredValue pShared->layout.size * index + pShared->layout.monitoredFenceThresholdOffset); - NV_PRINTF(LEVEL_NOTICE, + NV_PRINTF(LEVEL_INFO, "SemMem(0x%08x, 0x%08x): " "Setting monitored fence value at index %" NvU64_fmtu " to %" NvU64_fmtu "\n", @@ -675,6 +675,8 @@ semsurfCopyConstruct NV_ASSERT(pSemSurf->pShared->refCount > 0); pSemSurf->pShared->refCount++; + mapInitIntrusive(&pSemSurf->boundChannelMap); + NV_PRINTF(LEVEL_NOTICE, "SemSurf(0x%08x, 0x%08x): Copied with SemMem(0x%08x, 0x%08x)\n", RES_GET_CLIENT_HANDLE(pSemSurf), RES_GET_HANDLE(pSemSurf), @@ -710,6 +712,9 @@ _semsurfDestroyShared portMemFree(notIter.pValue); } + mapDestroy(&pShared->notifierMap); + mapDestroy(&pShared->listenerMap); + if (pShared->pMaxSubmittedMem) { if (pShared->maxSubmittedKernAddr) @@ -804,6 +809,7 @@ semsurfConstruct_IMPL pShared->memGpuIdx = gpuGetInstance(GPU_RES_GET_GPU(pSemSurf)); mapInitIntrusive(&pShared->listenerMap); mapInitIntrusive(&pShared->notifierMap); + mapInitIntrusive(&pSemSurf->boundChannelMap); pShared->pSpinlock = portSyncSpinlockCreate(portMemAllocatorGetGlobalNonPaged()); NV_ASSERT_TRUE_OR_GOTO(status, pShared->pSpinlock != NULL, NV_ERR_NO_MEMORY, ctorFailed); @@ -933,7 +939,7 @@ semsurfConstruct_IMPL /* Any failures should have already taken the ctorFailed path */ NV_ASSERT_OR_GOTO(status == NV_OK, ctorFailed); - NV_PRINTF(LEVEL_NOTICE, + NV_PRINTF(LEVEL_INFO, "SemSurf(0x%08x, 0x%08x): Constructed with SemMem(0x%08x, 0x%08x)\n", RES_GET_CLIENT_HANDLE(pSemSurf), RES_GET_HANDLE(pSemSurf), pShared->hClient, pShared->hSemaphoreMem); @@ -941,6 +947,7 @@ semsurfConstruct_IMPL return NV_OK; ctorFailed: + mapDestroy(&pSemSurf->boundChannelMap); _semsurfDestroyShared(pShared); return status; @@ -965,11 +972,13 @@ semsurfDestruct_IMPL NvHandle hSemSurf = RES_GET_HANDLE(pSemSurf); NvHandle hSharedClient = pShared->hClient; NvHandle hSharedMem = pShared->hSemaphoreMem; + PORT_UNREFERENCED_VARIABLE(hSharedClient); + PORT_UNREFERENCED_VARIABLE(hSharedMem); NV_ASSERT_OR_RETURN_VOID(pShared); NV_ASSERT_OR_GOTO(pShared->pSpinlock, skipRemoveListeners); - NV_PRINTF(LEVEL_NOTICE, + NV_PRINTF(LEVEL_INFO, "SemSurf(0x%08x, 0x%08x): Destructor with SemMem(0x%08x, 0x%08x)\n", hSemClient, hSemSurf, hSharedClient, hSharedMem); @@ -1052,6 +1061,7 @@ semsurfDestruct_IMPL { (void)_semsurfUnbindChannel(pSemSurf, pChannelNode); } + mapDestroy(&pSemSurf->boundChannelMap); skipRemoveListeners: NV_ASSERT(pShared->refCount > 0); --pShared->refCount; diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/vaspace_api.c b/src/nvidia/src/kernel/gpu/mem_mgr/vaspace_api.c index 56a423ec7e..a96ae6309d 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/vaspace_api.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/vaspace_api.c @@ -83,6 +83,15 @@ vaspaceapiConstruct_IMPL NvU64 originalVaSize; NvU32 gfid = 0; + if((!rmapiLockIsOwner()) && rmGpuLockIsOwner() && rmapiInRtd3PmPath()) + { + // + // RTD3 exit codepath may only take the GPU lock, hence it becomes + // necessary to release the GPU lock here. + // + rmGpuLocksRelease(GPUS_LOCK_FLAGS_NONE, NULL); + } + if (RS_IS_COPY_CTOR(pParams)) { NV_ASSERT_OK_OR_RETURN(rmGpuGroupLockAcquire(pGpu->gpuInstance, @@ -123,7 +132,7 @@ vaspaceapiConstruct_IMPL if (rmDeviceGpuLockIsOwner(pGpu->gpuInstance)) { NV_PRINTF(LEVEL_ERROR, "VASpace alloc should be called without acquiring GPU lock\n"); - LOCK_ASSERT_AND_RETURN(0); + NV_ASSERT_OR_RETURN(0, NV_ERR_INVALID_LOCK_STATE); } if (pNvVASpaceAllocParams->index == NV_VASPACE_ALLOCATION_INDEX_GPU_HOST) diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/virt_mem_allocator.c b/src/nvidia/src/kernel/gpu/mem_mgr/virt_mem_allocator.c index e08bc3d68d..5fb759f548 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/virt_mem_allocator.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/virt_mem_allocator.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/src/kernel/gpu/mem_sys/kern_mem_sys.c b/src/nvidia/src/kernel/gpu/mem_sys/kern_mem_sys.c index 3656b232fb..62287a2560 100644 --- a/src/nvidia/src/kernel/gpu/mem_sys/kern_mem_sys.c +++ b/src/nvidia/src/kernel/gpu/mem_sys/kern_mem_sys.c @@ -29,10 +29,10 @@ #include "gpu/rpc/objrpc.h" #include "gpu/bif/kernel_bif.h" #include "gpu/bus/kern_bus.h" -#include "os/os.h" #include "platform/sli/sli.h" #include "nvrm_registry.h" #include "gpu/gsp/gsp_static_config.h" +#include "ctrl/ctrl2080/ctrl2080pmgr.h" // NV2080_CTRL_PMGR_MODULE_INFO_NVSWITCH_SUPPORTED static void kmemsysInitRegistryOverrides @@ -270,8 +270,12 @@ kmemsysStatePostLoad_IMPL NV_ERR_INVALID_STATE); } + // + // VBIOS programs the peer ATS range register in Nvswitch case + // if (IS_SILICON(pGpu) && - pGpu->getProperty(pGpu, PDB_PROP_GPU_ATS_SUPPORTED)) + pGpu->getProperty(pGpu, PDB_PROP_GPU_ATS_SUPPORTED) && + !GPU_IS_NVSWITCH_DETECTED(pGpu)) { NV_STATUS status = kmemsysSetupAllAtsPeers_HAL(pGpu, pKernelMemorySystem); if (status != NV_OK) @@ -405,6 +409,7 @@ kmemsysAllocComprResources_KERNEL if (!memmgrIsScrubOnFreeEnabled(pMemoryManager)) { if (!(IS_SIMULATION(pGpu) || IsDFPGA(pGpu) || (IS_EMULATION(pGpu) && RMCFG_FEATURE_PLATFORM_MODS) + ||(pGpu->getProperty(pGpu, PDB_PROP_GPU_ZERO_FB)) ||(RMCFG_FEATURE_PLATFORM_WINDOWS && !pGpu->getProperty(pGpu, PDB_PROP_GPU_IN_TCC_MODE)) ||hypervisorIsVgxHyper() ||IS_GFID_VF(gfid) diff --git a/src/nvidia/src/kernel/gpu/mem_sys/kern_mem_sys_ctrl.c b/src/nvidia/src/kernel/gpu/mem_sys/kern_mem_sys_ctrl.c index e2bda6d752..342bb5a56a 100644 --- a/src/nvidia/src/kernel/gpu/mem_sys/kern_mem_sys_ctrl.c +++ b/src/nvidia/src/kernel/gpu/mem_sys/kern_mem_sys_ctrl.c @@ -163,7 +163,10 @@ _kmemsysGetFbInfos if (bIsMIGInUse) { - bIsClientMIGMonitor = !RMCFG_FEATURE_PLATFORM_GSP && rmclientIsCapableByHandle(pClient->hClient, NV_RM_CAP_SYS_SMC_MONITOR); + RmClient *pRmClient = dynamicCast(pClient, RmClient); + NV_ASSERT_OR_RETURN(pRmClient != NULL, NV_ERR_INVALID_CLIENT); + + bIsClientMIGMonitor = !RMCFG_FEATURE_PLATFORM_GSP && rmclientIsCapable(pRmClient, NV_RM_CAP_SYS_SMC_MONITOR); bIsClientMIGProfiler = kmigmgrIsDeviceUsingDeviceProfiling(pGpu, pKernelMIGManager, pDevice); } @@ -945,7 +948,8 @@ subdeviceCtrlCmdFbGetInfoV2_IMPL NvHandle hObject = RES_GET_HANDLE(pSubdevice); Device *pDevice = GPU_RES_GET_DEVICE(pSubdevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); if ((pFbInfoParams->fbInfoListSize > NV2080_CTRL_FB_INFO_MAX_LIST_SIZE) || (pFbInfoParams->fbInfoListSize == 0)) @@ -956,117 +960,6 @@ subdeviceCtrlCmdFbGetInfoV2_IMPL return _kmemsysGetFbInfos(pGpu, pClient, pDevice, hObject, pFbInfoParams); } -// -// subdeviceCtrlCmdFbGetCarveoutAddressInfo -// -// Lock Requirements: -// Assert that API and GPUs lock held on entry -// -NV_STATUS -subdeviceCtrlCmdFbGetCarveoutAddressInfo_IMPL -( - Subdevice *pSubdevice, - NV2080_CTRL_FB_GET_SYSTEM_CARVEOUT_ADDRESS_SPACE_INFO *pParams -) -{ - - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); - - pParams->StartAddr = 0x0; - pParams->SpaceSize = 0x0; - - return NV_ERR_GENERIC; -} - -// -// subdeviceCtrlCmdFbSetGpuCacheAllocPolicy -// -// Lock Requirements: -// Assert that GPUs lock held on entry -// Called from SW method w/o API lock -// -NV_STATUS -subdeviceCtrlCmdFbSetGpuCacheAllocPolicy_IMPL -( - Subdevice *pSubdevice, - NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS *pParams -) -{ - LOCK_ASSERT_AND_RETURN(rmGpuLockIsOwner()); - - // Map engine to FBBA client - return NV_ERR_NOT_SUPPORTED; -} - -// -// subdeviceCtrlCmdFbGetGpuCacheAllocPolicy -// -// Lock Requirements: -// Assert that API and GPUs lock held on entry -// -NV_STATUS -subdeviceCtrlCmdFbGetGpuCacheAllocPolicy_IMPL -( - Subdevice *pSubdevice, - NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_PARAMS *pGpuCacheAllocPolicyParams -) -{ - - NV_STATUS status = NV_ERR_NOT_SUPPORTED; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); - - pGpuCacheAllocPolicyParams->allocPolicy = 0; - - NV_PRINTF(LEVEL_ERROR, "Failed to read Client reads ALLOC policy\n"); - return status; -} - -// -// subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2 -// -// Lock Requirements: -// Assert that GPUs lock held on entry -// Called from SW method w/o API lock -// -NV_STATUS -subdeviceCtrlCmdFbSetGpuCacheAllocPolicyV2_IMPL -( - Subdevice *pSubdevice, - NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS *pParams -) -{ - CALL_CONTEXT *pCallContext = resservGetTlsCallContext(); - RmCtrlParams *pRmCtrlParams = pCallContext->pControlParams; - NV_STATUS status = NV_ERR_NOT_SUPPORTED; - - // Bug 724186 -- Skip this check for deferred API - LOCK_ASSERT_AND_RETURN(pRmCtrlParams->bDeferredApi || rmGpuLockIsOwner()); - - NV_PRINTF(LEVEL_ERROR, "Failed to set alloc policy\n"); - return status; -} - -// -// subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2 -// -// Lock Requirements: -// Assert that API and GPUs lock held on entry -// -NV_STATUS -subdeviceCtrlCmdFbGetGpuCacheAllocPolicyV2_IMPL -( - Subdevice *pSubdevice, - NV2080_CTRL_FB_GPU_CACHE_ALLOC_POLICY_V2_PARAMS *pParams -) -{ - NV_STATUS status = NV_ERR_NOT_SUPPORTED; - - NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); - - NV_PRINTF(LEVEL_ERROR, "Failed to get alloc policy.\n"); - return status; -} - // // subdeviceCtrlCmdFbGetCliManagedOfflinedPages // @@ -1093,7 +986,7 @@ subdeviceCtrlCmdFbGetCliManagedOfflinedPages_IMPL NvU64 pageSize; NvU32 numChunks = 0; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (!IsSLIEnabled(pGpu)) { if (memmgrIsPmaInitialized(pMemoryManager)) @@ -1160,7 +1053,7 @@ subdeviceCtrlCmdFbUpdateNumaStatus_IMPL if (!RMCFG_FEATURE_PMA) return NV_ERR_NOT_SUPPORTED; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (pParams->bOnline) { @@ -1206,7 +1099,8 @@ subdeviceCtrlCmdFbGetNumaInfo_IMPL NvU64 numaMemOffset = 0; NvU64 numaMemSize = 0; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), + NV_ERR_INVALID_LOCK_STATE); if (pParams->numaOfflineAddressesCount > NV_ARRAY_ELEMENTS(pParams->numaOfflineAddresses)) @@ -1305,6 +1199,49 @@ subdeviceCtrlCmdFbGetNumaInfo_IMPL return status; } +/*! + * @brief This call can be used to get static Bar1 related information. + * + * Lock Requirements: + * Assert that API and GPUs lock held on entry + * + * @param[in] pSubdevice Subdevice + * @param[in] pParams pointer to control parameters + * + * @return NV_OK When successful + * NV_ERR_INVALID_STATE Otherwise + */ +NV_STATUS +subdeviceCtrlCmdFbGetStaticBar1Info_IMPL +( + Subdevice *pSubdevice, + NV2080_CTRL_FB_GET_STATIC_BAR1_INFO_PARAMS *pParams +) +{ + OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); + KernelBus *pKernelBus = GPU_GET_KERNEL_BUS(pGpu); + NV_STATUS status = NV_OK; + NvU32 gfid; + + NV_ASSERT_OK_OR_RETURN(vgpuGetCallingContextGfid(pGpu, &gfid)); + + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); + + pParams->bStaticBar1Enabled = pKernelBus->bar1[gfid].bStaticBar1Enabled; + + if (pParams->bStaticBar1Enabled) + { + pParams->staticBar1Size = pKernelBus->bar1[gfid].staticBar1.size; + } + else + { + pParams->staticBar1Size = 0; + } + + return status; +} + NV_STATUS subdeviceCtrlCmdFbSetZbcReferenced_IMPL ( @@ -1377,7 +1314,8 @@ subdeviceCtrlCmdFbFlushGpuCache_IMPL NvBool bWriteback = NV_FALSE; NvBool bInvalidate = NV_FALSE; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); // Either WriteBack or Invalidate are required for Cache Ops if (FLD_TEST_DRF(2080, _CTRL_FB_FLUSH_GPU_CACHE_FLAGS, _WRITE_BACK, @@ -1495,7 +1433,7 @@ subdeviceCtrlCmdFbGetGpuCacheInfo_IMPL FB_CACHE_WRITE_MODE writeMode = pKernelMemorySystem->l2WriteMode; FB_CACHE_BYPASS_MODE bypassMode = FB_CACHE_BYPASS_MODE_DISABLED; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); switch (writeMode) { diff --git a/src/nvidia/src/kernel/gpu/mig_mgr/arch/ampere/kmigmgr_ga100.c b/src/nvidia/src/kernel/gpu/mig_mgr/arch/ampere/kmigmgr_ga100.c index 6a2ac68e60..b5259d1ad0 100644 --- a/src/nvidia/src/kernel/gpu/mig_mgr/arch/ampere/kmigmgr_ga100.c +++ b/src/nvidia/src/kernel/gpu/mig_mgr/arch/ampere/kmigmgr_ga100.c @@ -192,6 +192,9 @@ kmigmgrIsGPUInstanceFlagValid_GA100 case NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_MINI_QUARTER: case NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_EIGHTH: break; + case NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_RESERVED_INTERNAL_06: + case NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_RESERVED_INTERNAL_07: + return NV_FALSE; default: NV_PRINTF(LEVEL_ERROR, "Unrecognized GPU compute partitioning flag 0x%x\n", computeSizeFlag); diff --git a/src/nvidia/src/kernel/gpu/mig_mgr/arch/blackwell/kmigmgr_gb100.c b/src/nvidia/src/kernel/gpu/mig_mgr/arch/blackwell/kmigmgr_gb100.c index 66397589a3..ff8eec7a5f 100644 --- a/src/nvidia/src/kernel/gpu/mig_mgr/arch/blackwell/kmigmgr_gb100.c +++ b/src/nvidia/src/kernel/gpu/mig_mgr/arch/blackwell/kmigmgr_gb100.c @@ -67,6 +67,7 @@ kmigmgrIsGPUInstanceFlagValid_GB100 case NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_HALF: case NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_MINI_HALF: case NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_QUARTER: + case NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_MINI_QUARTER: case NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_EIGHTH: break; default: diff --git a/src/nvidia/src/kernel/gpu/mig_mgr/arch/hopper/kmigmgr_gh100.c b/src/nvidia/src/kernel/gpu/mig_mgr/arch/hopper/kmigmgr_gh100.c index fd764265a4..5dba615d19 100644 --- a/src/nvidia/src/kernel/gpu/mig_mgr/arch/hopper/kmigmgr_gh100.c +++ b/src/nvidia/src/kernel/gpu/mig_mgr/arch/hopper/kmigmgr_gh100.c @@ -71,6 +71,9 @@ kmigmgrIsGPUInstanceFlagValid_GH100 case NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_MINI_QUARTER: case NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_EIGHTH: break; + case NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_RESERVED_INTERNAL_06: + case NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_RESERVED_INTERNAL_07: + return NV_FALSE; default: NV_PRINTF(LEVEL_ERROR, "Unrecognized GPU compute partitioning flag 0x%x\n", computeSizeFlag); diff --git a/src/nvidia/src/kernel/gpu/mig_mgr/gpu_instance_subscription.c b/src/nvidia/src/kernel/gpu/mig_mgr/gpu_instance_subscription.c index 338df1c4b0..7cd8370ca3 100644 --- a/src/nvidia/src/kernel/gpu/mig_mgr/gpu_instance_subscription.c +++ b/src/nvidia/src/kernel/gpu/mig_mgr/gpu_instance_subscription.c @@ -388,7 +388,7 @@ gisubscriptionCtrlCmdExecPartitionsCreate_IMPL KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); KERNEL_MIG_GPU_INSTANCE *pKernelMIGGpuInstance = pGPUInstanceSubscription->pKernelMIGGpuInstance; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); { CALL_CONTEXT *pCallContext = resservGetTlsCallContext(); @@ -536,7 +536,7 @@ gisubscriptionCtrlCmdExecPartitionsDelete_IMPL KERNEL_MIG_GPU_INSTANCE *pKernelMIGGpuInstance = pGPUInstanceSubscription->pKernelMIGGpuInstance; NvU32 execPartIdx; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); { CALL_CONTEXT *pCallContext = resservGetTlsCallContext(); @@ -649,7 +649,7 @@ gisubscriptionCtrlCmdExecPartitionsGet_IMPL MIG_COMPUTE_INSTANCE *pTargetComputeInstanceInfo = NULL; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_ASSERT_OR_RETURN(pGpu->getProperty(pGpu, PDB_PROP_GPU_MIG_SUPPORTED), NV_ERR_NOT_SUPPORTED); @@ -727,7 +727,7 @@ gisubscriptionCtrlCmdExecPartitionsGetActiveIds_IMPL KERNEL_MIG_GPU_INSTANCE *pKernelMIGGpuInstance = pGPUInstanceSubscription->pKernelMIGGpuInstance; NvU32 ciIdx; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_ASSERT_OR_RETURN(pGpu->getProperty(pGpu, PDB_PROP_GPU_MIG_SUPPORTED), NV_ERR_NOT_SUPPORTED); diff --git a/src/nvidia/src/kernel/gpu/mig_mgr/kernel_mig_manager.c b/src/nvidia/src/kernel/gpu/mig_mgr/kernel_mig_manager.c index 466f463df8..20d69b3a3c 100644 --- a/src/nvidia/src/kernel/gpu/mig_mgr/kernel_mig_manager.c +++ b/src/nvidia/src/kernel/gpu/mig_mgr/kernel_mig_manager.c @@ -1334,6 +1334,7 @@ kmigmgrLoadStaticInfo_VF pPartitionDesc->nvJpgCount = pVSI->gpuPartitionInfo.nvJpgCount; pPartitionDesc->nvOfaCount = pVSI->gpuPartitionInfo.nvOfaCount; pPartitionDesc->validCTSIdMask = pVSI->gpuPartitionInfo.validCTSIdMask; + pPartitionDesc->validGfxCTSIdMask = pVSI->gpuPartitionInfo.validGfxCTSIdMask; pPrivate->staticInfo.pProfiles->count = 1; } @@ -3778,7 +3779,7 @@ kmigmgrGetMIGReferenceFromEngineType_IMPL ) { KERNEL_MIG_GPU_INSTANCE *pKernelMIGGPUInstance; - MIG_COMPUTE_INSTANCE *pMIGComputeInstance; + MIG_COMPUTE_INSTANCE *pMIGComputeInstance = NULL; NvU32 CIIdx; NV_ASSERT_OR_RETURN(pRef != NULL, NV_ERR_INVALID_ARGUMENT); @@ -4207,7 +4208,7 @@ kmigmgrGenerateComputeInstanceUuid_VF ) { VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); - NvU16 chipId = gpuGetChipIdFromPmcBoot42(pGpu->chipId1); + NvU16 chipId = decodePmcBoot42ChipId(pGpu->chipId1); NvU64 gid; NV_ASSERT_OR_RETURN(pVSI != NULL, NV_ERR_INVALID_STATE); @@ -6295,17 +6296,17 @@ kmigmgrSetMIGState_FWCLIENT //TODO: Remove below code once a more robust SRT is available to test for this condition FOR_EACH_INDEX_IN_MASK(32, linkId, knvlinkGetEnabledLinkMask(pGpu, pKernelNvlink)) { - NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS params; + NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS params; params.linkId = linkId; - params.callbackType.type = NV2080_CTRL_NVLINK_CALLBACK_TYPE_GET_DL_LINK_MODE; + params.callbackType.type = NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_GET_DL_LINK_MODE; NV_CHECK_OK(rmStatus, LEVEL_ERROR, knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_CORE_CALLBACK, + NV2080_CTRL_CMD_INTERNAL_NVLINK_CORE_CALLBACK, (void *)¶ms, sizeof(params))); - if ((params.callbackType.callbackParams.getDlLinkMode.mode != NV2080_NVLINK_CORE_LINK_STATE_SLEEP) || - (params.callbackType.callbackParams.getDlLinkMode.mode != NV2080_NVLINK_CORE_LINK_STATE_OFF)) + if ((params.callbackType.callbackParams.getDlLinkMode.mode != NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_SLEEP) || + (params.callbackType.callbackParams.getDlLinkMode.mode != NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_OFF)) { NV_PRINTF(LEVEL_ERROR, "Nvlink %d is not asleep upon enteing MIG mode!\n", linkId); } @@ -7103,7 +7104,8 @@ subdeviceCtrlCmdGpuGetActivePartitionIds_IMPL ct_assert(NV2080_CTRL_GPU_MAX_PARTITIONS == KMIGMGR_MAX_GPU_INSTANCES); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); if ((pKernelMIGManager == NULL) || !pGpu->getProperty(pGpu, PDB_PROP_GPU_MIG_SUPPORTED)) { @@ -7151,7 +7153,7 @@ subdeviceCtrlCmdGpuGetPartitionCapacity_IMPL KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); NvHandle hClient = RES_GET_CLIENT_HANDLE(pSubdevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_CHECK_OR_RETURN(LEVEL_INFO, kmigmgrIsMIGSupported(pGpu, pKernelMIGManager), NV_ERR_NOT_SUPPORTED); @@ -7234,7 +7236,7 @@ subdeviceCtrlCmdGpuDescribePartitions_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (!pGpu->getProperty(pGpu, PDB_PROP_GPU_MIG_SUPPORTED)) { @@ -7261,7 +7263,7 @@ subdeviceCtrlCmdGpuSetPartitioningMode_IMPL KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (IS_VIRTUAL(pGpu)) { @@ -7448,7 +7450,7 @@ subdeviceCtrlCmdGpuSetPartitions_IMPL KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); CALL_CONTEXT *pCallContext = resservGetTlsCallContext(); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_ASSERT_OR_RETURN(pCallContext != NULL, NV_ERR_INVALID_STATE); @@ -7538,7 +7540,8 @@ subdeviceCtrlCmdGpuGetPartitions_IMPL ct_assert(NV2080_CTRL_GPU_MAX_PARTITIONS == KMIGMGR_MAX_GPU_INSTANCES); ct_assert(NV2080_CTRL_GPU_MAX_GPC_PER_SMC == KGRMGR_MAX_GPC); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); pRpcParams = portMemAllocNonPaged(sizeof(*pRpcParams)); NV_CHECK_OR_RETURN(LEVEL_INFO, pRpcParams != NULL, NV_ERR_NO_MEMORY); @@ -7960,6 +7963,8 @@ subdeviceCtrlCmdGpuGetComputeProfiles_IMPL NvU32 kmigmgrGetNextComputeSize_IMPL ( + OBJGPU *pGpu, + KernelMIGManager *pKernelMIGManager, NvBool bGetNextSmallest, NvU32 computeSize ) @@ -8231,7 +8236,7 @@ kmigmgrGetComputeProfileFromCTSId_IMPL NV_CHECK_OR_RETURN(LEVEL_ERROR, pStaticInfo != NULL, NV_ERR_OBJECT_NOT_FOUND); NV_CHECK_OR_RETURN(LEVEL_WARNING, pStaticInfo->pCIProfiles != NULL, NV_ERR_OBJECT_NOT_FOUND); - computeSize = kmigmgrGetComputeSizeFromCTSId(ctsId); + computeSize = kmigmgrGetComputeSizeFromCTSId(pGpu, ctsId); return kmigmgrGetComputeProfileFromSize(pGpu, pKernelMIGManager, computeSize, pProfile); } @@ -8324,6 +8329,7 @@ kmigmgrComputeProfileSizeToCTSIdRange_IMPL return rangeMake(9,12); case NV2080_CTRL_GPU_PARTITION_FLAG_COMPUTE_SIZE_EIGHTH: + return rangeMake(13,20); default: @@ -8545,17 +8551,19 @@ kmigmgrIsCTSAlignmentRequired_VF NvU32 kmigmgrGetComputeSizeFromCTSId_IMPL ( + OBJGPU *pGpu, NvU32 ctsId ) { - NvU32 computeSize = kmigmgrGetNextComputeSize(NV_TRUE, KMIGMGR_COMPUTE_SIZE_INVALID); + KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); + NvU32 computeSize = kmigmgrGetNextComputeSize_HAL(pGpu, pKernelMIGManager, NV_TRUE, KMIGMGR_COMPUTE_SIZE_INVALID); while (computeSize != KMIGMGR_COMPUTE_SIZE_INVALID) { NV_RANGE range = kmigmgrComputeProfileSizeToCTSIdRange(computeSize); if ((range.lo <= ctsId) && (ctsId <= range.hi)) break; - computeSize = kmigmgrGetNextComputeSize(NV_TRUE, computeSize); + computeSize = kmigmgrGetNextComputeSize_HAL(pGpu, pKernelMIGManager, NV_TRUE, computeSize); } return computeSize; @@ -8571,14 +8579,14 @@ kmigmgrSmallestComputeProfileSize_IMPL KernelMIGManager *pKernelMIGManager ) { - NvU32 computeSize = kmigmgrGetNextComputeSize(NV_FALSE, KMIGMGR_COMPUTE_SIZE_INVALID); + NvU32 computeSize = kmigmgrGetNextComputeSize_HAL(pGpu, pKernelMIGManager, NV_FALSE, KMIGMGR_COMPUTE_SIZE_INVALID); while (computeSize != KMIGMGR_COMPUTE_SIZE_INVALID) { NV2080_CTRL_INTERNAL_MIGMGR_COMPUTE_PROFILE unused; if (kmigmgrGetComputeProfileFromSize(pGpu, pKernelMIGManager, computeSize, &unused) == NV_OK) break; - computeSize = kmigmgrGetNextComputeSize(NV_FALSE, computeSize); + computeSize = kmigmgrGetNextComputeSize_HAL(pGpu, pKernelMIGManager, NV_FALSE, computeSize); } return computeSize; @@ -8740,7 +8748,7 @@ kmigmgrGetSpanStartFromCTSId_IMPL NvU32 ctsId ) { - NvU32 computeSize = kmigmgrGetComputeSizeFromCTSId(ctsId); + NvU32 computeSize = kmigmgrGetComputeSizeFromCTSId(pGpu, ctsId); NV_RANGE computeSizeIdRange; NvU64 computeSizeIdMask; NvU64 slotBasisMask; @@ -9177,7 +9185,8 @@ kmigmgrGetComputeProfileForRequest_IMPL return NV_OK; } - if (kmigmgrGetComputeProfileFromSmCount(pGpu, pKernelMIGManager, smCountRequest, pProfile) == NV_OK) + if ((smCountRequest != 0) && + kmigmgrGetComputeProfileFromSmCount(pGpu, pKernelMIGManager, smCountRequest, pProfile) == NV_OK) { return NV_OK; } diff --git a/src/nvidia/src/kernel/gpu/mmu/arch/ampere/kern_gmmu_ga100.c b/src/nvidia/src/kernel/gpu/mmu/arch/ampere/kern_gmmu_ga100.c index 8cdb4cec39..c6ffa26b4a 100644 --- a/src/nvidia/src/kernel/gpu/mmu/arch/ampere/kern_gmmu_ga100.c +++ b/src/nvidia/src/kernel/gpu/mmu/arch/ampere/kern_gmmu_ga100.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -31,6 +31,7 @@ #include "nverror.h" #include "published/ampere/ga100/dev_fault.h" +#include "published/ampere/ga100/dev_top.h" #include "published/ampere/ga100/dev_vm.h" @@ -251,6 +252,50 @@ kgmmuSetupWarForBug2720120FmtFamily_GA100 return status; } + +NV_STATUS +kgmmuInitCeMmuFaultIdRange_GA100 +( + OBJGPU *pGpu, + KernelGmmu *pKernelGmmu +) +{ + NvU32 i; + NvU32 minMmuFaultId = (NvU32)-1; + NvU32 maxMmuFaultId = 0; + + // Init the value in case the function fails + pKernelGmmu->minCeMmuFaultId = 0; + pKernelGmmu->maxCeMmuFaultId = 0; + + NV_ASSERT_OK_OR_RETURN(gpuConstructDeviceInfoTable_HAL(pGpu)); + + for (i = 0; i < pGpu->numDeviceInfoEntries; i++) + { + if (pGpu->pDeviceInfoTable[i].typeEnum == NV_PTOP_DEVICE_INFO2_DEV_TYPE_ENUM_LCE) + { + minMmuFaultId = NV_MIN(minMmuFaultId, pGpu->pDeviceInfoTable[i].faultId); + maxMmuFaultId = NV_MAX(maxMmuFaultId, pGpu->pDeviceInfoTable[i].faultId); + } + } + + if ((minMmuFaultId == (NvU32)-1 || maxMmuFaultId == 0)) + { + NV_PRINTF(LEVEL_ERROR, "Failed to find any MMU Fault ID\n"); + NV_ASSERT(0); + return NV_ERR_OBJECT_NOT_FOUND; + } + + pKernelGmmu->minCeMmuFaultId = minMmuFaultId; + pKernelGmmu->maxCeMmuFaultId = maxMmuFaultId; + + NV_PRINTF(LEVEL_INFO, "CE MMU Fault ID range [0x%x - 0x%x]\n", + pKernelGmmu->minCeMmuFaultId, pKernelGmmu->maxCeMmuFaultId); + + return NV_OK; +} + + NV_STATUS kgmmuSetupWarForBug2720120_GA100 ( @@ -278,23 +323,6 @@ kgmmuSetupWarForBug2720120_GA100 return NV_OK; } -/*! - * @brief Get the engine ID associated with the max CE - * - * @param[in] pGpu GPU object - * @param[in] pKernelGmmu KernelGmmu object - * - * return engine ID of the max CE - */ -NvU32 -kgmmuGetMaxCeEngineId_GA100 -( - OBJGPU *pGpu, - KernelGmmu *pKernelGmmu -) -{ - return NV_PFAULT_MMU_ENG_ID_CE9; -} /** * @brief Determine if the fault is P2P unbound Instance Fault diff --git a/src/nvidia/src/kernel/gpu/mmu/arch/blackwell/kern_gmmu_gb100.c b/src/nvidia/src/kernel/gpu/mmu/arch/blackwell/kern_gmmu_gb100.c index f76c0eb615..a662ea84f4 100644 --- a/src/nvidia/src/kernel/gpu/mmu/arch/blackwell/kern_gmmu_gb100.c +++ b/src/nvidia/src/kernel/gpu/mmu/arch/blackwell/kern_gmmu_gb100.c @@ -24,7 +24,6 @@ #define NVOC_KERN_GMMU_H_PRIVATE_ACCESS_ALLOWED #include "gpu/mmu/kern_gmmu.h" -#include "published/blackwell/gb100/dev_top.h" #include "published/blackwell/gb100/dev_vm.h" #include "published/blackwell/gb100/dev_fault.h" @@ -45,19 +44,17 @@ kgmmuCommitTlbInvalidate_GB100 { NV_STATUS status = NV_OK; + NV_ASSERT_OR_RETURN(IS_GFID_PF(pParams->gfid), NV_ERR_INVALID_ARGUMENT); + if (!FLD_TEST_DRF(_VIRTUAL_FUNCTION_PRIV, _MMU_INVALIDATE, _ALL_PDB, _TRUE, pParams->regVal)) { kgmmuSetPdbToInvalidate_HAL(pGpu, pKernelGmmu, pParams); } - { - NV_ASSERT(IS_GFID_PF(pParams->gfid)); - - GPU_VREG_WR32(pGpu, NV_VIRTUAL_FUNCTION_PRIV_MMU_INVALIDATE, pParams->regVal); - } + GPU_VREG_WR32(pGpu, NV_VIRTUAL_FUNCTION_PRIV_MMU_INVALIDATE, pParams->regVal); // Wait for the invalidate command to complete. - status = kgmmuCheckPendingInvalidates_HAL(pGpu, pKernelGmmu, &pParams->timeout, pParams->gfid); + status = kgmmuCheckPendingInvalidates_HAL(pGpu, pKernelGmmu, &pParams->timeout); return status; } @@ -109,90 +106,6 @@ kgmmuGetFaultTypeString_GB100(KernelGmmu *pKernelGmmu, NvU32 faultType) } } -/*! - * @brief Find and save the CE MMU fault ID range - * - * @param[in] pGpu - * @param[in] pKernelGmmu - * - * @return NV_OK if there is no error - * Or NV_ERR - */ -NV_STATUS -kgmmuInitCeMmuFaultIdRange_GB100 -( - OBJGPU *pGpu, - KernelGmmu *pKernelGmmu -) -{ - NvU32 i; - NvU32 minMmuFaultId = (NvU32)-1; - NvU32 maxMmuFaultId = 0; - - // Init the value in case the function fails - pKernelGmmu->minCeMmuFaultId = 0; - pKernelGmmu->maxCeMmuFaultId = 0; - - NV_ASSERT_OK_OR_RETURN(gpuConstructDeviceInfoTable_HAL(pGpu)); - - for (i = 0; i < pGpu->numDeviceInfoEntries; i++) - { - if (pGpu->pDeviceInfoTable[i].typeEnum == NV_PTOP_DEVICE_INFO2_DEV_TYPE_ENUM_LCE) - { - minMmuFaultId = NV_MIN(minMmuFaultId, pGpu->pDeviceInfoTable[i].faultId); - maxMmuFaultId = NV_MAX(maxMmuFaultId, pGpu->pDeviceInfoTable[i].faultId); - } - } - - if ((minMmuFaultId == (NvU32)-1 || maxMmuFaultId == 0)) - { - NV_PRINTF(LEVEL_ERROR, "Failed to find any MMU Fault ID\n"); - NV_ASSERT(0); - return NV_ERR_OBJECT_NOT_FOUND; - } - - pKernelGmmu->minCeMmuFaultId = minMmuFaultId; - pKernelGmmu->maxCeMmuFaultId = maxMmuFaultId; - - NV_PRINTF(LEVEL_INFO, "CE MMU Fault ID range [0x%x - 0x%x]\n", - pKernelGmmu->minCeMmuFaultId, pKernelGmmu->maxCeMmuFaultId); - - return NV_OK; -} - -/*! - * @brief Get the min CE MMU fault ID - * - * @param[in] pKernelGmmu KernelGmmu object - * - * return min CE MMU fault ID - */ -NvU32 -kgmmuGetMinCeEngineId_GB100 -( - KernelGmmu *pKernelGmmu -) -{ - return pKernelGmmu->minCeMmuFaultId; -} - -/*! - * @brief Get the max CE MMU fault ID - * - * @param[in] pGpu OBJGPU object - * @param[in] pKernelGmmu KernelGmmu object - * - * return max CE MMU fault ID - */ -NvU32 -kgmmuGetMaxCeEngineId_GB100 -( - OBJGPU *pGpu, - KernelGmmu *pKernelGmmu -) -{ - return pKernelGmmu->maxCeMmuFaultId; -} /*! * @brief Parses Faultbuffer entry and returns Fault Type diff --git a/src/nvidia/src/kernel/gpu/mmu/arch/hopper/kern_gmmu_gh100.c b/src/nvidia/src/kernel/gpu/mmu/arch/hopper/kern_gmmu_gh100.c index 872d717807..857d0cc927 100644 --- a/src/nvidia/src/kernel/gpu/mmu/arch/hopper/kern_gmmu_gh100.c +++ b/src/nvidia/src/kernel/gpu/mmu/arch/hopper/kern_gmmu_gh100.c @@ -919,39 +919,6 @@ kgmmuIsReplayableShadowFaultBufferFull_GH100 ((shadowBufPutIndex + 1) % maxBufferEntries)) ? NV_TRUE : NV_FALSE; } -/*! - * @brief Get the engine ID associated with the min CE - * - * @param[in] pKenrelGmmu KernelGmmu object - * - * return engine ID of the min CE - */ -NvU32 -kgmmuGetMinCeEngineId_GH100 -( - KernelGmmu *pKernelGmmu -) -{ - return NV_PFAULT_MMU_ENG_ID_CE0; -} - -/*! - * @brief Get the engine ID associated with the max CE - * - * @param[in] pGpu OBJGPU object - * @param[in] pKenrelGmmu KernelGmmu object - * - * return engine ID of the max CE - */ -NvU32 -kgmmuGetMaxCeEngineId_GH100 -( - OBJGPU *pGpu, - KernelGmmu *pKernelGmmu -) -{ - return NV_PFAULT_MMU_ENG_ID_CE9; -} /** * @brief Sign extend a fault address to a supported width as per UVM requirements diff --git a/src/nvidia/src/kernel/gpu/mmu/arch/maxwell/kern_gmmu_gm107.c b/src/nvidia/src/kernel/gpu/mmu/arch/maxwell/kern_gmmu_gm107.c index 02c82d0229..a875bdcdd2 100644 --- a/src/nvidia/src/kernel/gpu/mmu/arch/maxwell/kern_gmmu_gm107.c +++ b/src/nvidia/src/kernel/gpu/mmu/arch/maxwell/kern_gmmu_gm107.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -66,8 +66,7 @@ kgmmuCommitInvalidateTlbTest_GM107 GPU_TIMEOUT_FLAGS_DEFAULT | GPU_TIMEOUT_FLAGS_BYPASS_CPU_YIELD); NV_ASSERT_OK_OR_RETURN(kgmmuCheckPendingInvalidates_HAL(pGpu, pKernelGmmu, - ¶ms.timeout, - params.gfid)); + ¶ms.timeout)); // Invalidate all VA and PDB regVal = DRF_DEF(_PFB_PRI, _MMU_INVALIDATE, _ALL_VA, _TRUE) | @@ -174,7 +173,7 @@ kgmmuInvalidateTlb_GM107 // Set the GFID. params.gfid = gfid; - status = kgmmuCheckPendingInvalidates_HAL(pGpu, pKernelGmmu, ¶ms.timeout, params.gfid); + status = kgmmuCheckPendingInvalidates_HAL(pGpu, pKernelGmmu, ¶ms.timeout); if (status != NV_OK) { return; diff --git a/src/nvidia/src/kernel/gpu/mmu/arch/pascal/kern_gmmu_gp100.c b/src/nvidia/src/kernel/gpu/mmu/arch/pascal/kern_gmmu_gp100.c index 8a9fe9e4ad..387d534701 100644 --- a/src/nvidia/src/kernel/gpu/mmu/arch/pascal/kern_gmmu_gp100.c +++ b/src/nvidia/src/kernel/gpu/mmu/arch/pascal/kern_gmmu_gp100.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -287,7 +287,7 @@ kgmmuFaultCancelIssueInvalidate_GP100 pParams->regVal = data32; - NV_ASSERT_OK_OR_RETURN(kgmmuCheckPendingInvalidates_HAL(pGpu, pKernelGmmu, &pParams->timeout, pParams->gfid)); + NV_ASSERT_OK_OR_RETURN(kgmmuCheckPendingInvalidates_HAL(pGpu, pKernelGmmu, &pParams->timeout)); NV_ASSERT_OK_OR_RETURN(kgmmuCommitTlbInvalidate_HAL(pGpu, pKernelGmmu, pParams)); diff --git a/src/nvidia/src/kernel/gpu/mmu/arch/turing/kern_gmmu_tu102.c b/src/nvidia/src/kernel/gpu/mmu/arch/turing/kern_gmmu_tu102.c index d77e8a7c8c..279ea3123a 100644 --- a/src/nvidia/src/kernel/gpu/mmu/arch/turing/kern_gmmu_tu102.c +++ b/src/nvidia/src/kernel/gpu/mmu/arch/turing/kern_gmmu_tu102.c @@ -45,28 +45,20 @@ * @param pGpu * @param pKernelGmmu * @param pTimeOut Timeout for the invalidate operation. - * @param gfid GFID */ NV_STATUS kgmmuCheckPendingInvalidates_TU102 ( OBJGPU *pGpu, KernelGmmu *pKernelGmmu, - RMTIMEOUT *pTimeOut, - NvU32 gfid + RMTIMEOUT *pTimeOut ) { NV_STATUS status = NV_OK; while (1) { - NvU32 regVal; - - { - NV_ASSERT(IS_GFID_PF(gfid)); - - regVal = GPU_VREG_RD32(pGpu, NV_VIRTUAL_FUNCTION_PRIV_MMU_INVALIDATE); - } + NvU32 regVal = GPU_VREG_RD32(pGpu, NV_VIRTUAL_FUNCTION_PRIV_MMU_INVALIDATE); if (FLD_TEST_DRF(_VIRTUAL_FUNCTION_PRIV, _MMU_INVALIDATE, _TRIGGER, _FALSE, regVal)) break; @@ -103,25 +95,23 @@ kgmmuCommitTlbInvalidate_TU102 { NV_STATUS status = NV_OK; - if (!FLD_TEST_DRF(_VIRTUAL_FUNCTION_PRIV, _MMU_INVALIDATE, _ALL_PDB, _TRUE, pParams->regVal)) + NV_ASSERT_OR_RETURN(IS_GFID_PF(pParams->gfid), NV_ERR_INVALID_ARGUMENT); + + if (IS_VIRTUAL(pGpu)) { - kgmmuSetPdbToInvalidate_HAL(pGpu, pKernelGmmu, pParams); + // Prevent PF from updating INVALIDATE_ALL_PDB from VF requests, bug 3356599 + pParams->regVal = FLD_SET_DRF(_VIRTUAL_FUNCTION_PRIV, _MMU_INVALIDATE, _ALL_PDB, _FALSE, pParams->regVal); } + if (!FLD_TEST_DRF(_VIRTUAL_FUNCTION_PRIV, _MMU_INVALIDATE, _ALL_PDB, _TRUE, pParams->regVal)) { - NV_ASSERT(IS_GFID_PF(pParams->gfid)); - - if (IS_VIRTUAL(pGpu)) - { - // Prevent VF from updating INVALIDATE_ALL_PDB, bug 3356599 - pParams->regVal = FLD_SET_DRF(_VIRTUAL_FUNCTION_PRIV, _MMU_INVALIDATE, _ALL_PDB, _FALSE, pParams->regVal); - } - - GPU_VREG_WR32(pGpu, NV_VIRTUAL_FUNCTION_PRIV_MMU_INVALIDATE, pParams->regVal); + kgmmuSetPdbToInvalidate_HAL(pGpu, pKernelGmmu, pParams); } + GPU_VREG_WR32(pGpu, NV_VIRTUAL_FUNCTION_PRIV_MMU_INVALIDATE, pParams->regVal); + // Wait for the invalidate command to complete. - status = kgmmuCheckPendingInvalidates_HAL(pGpu, pKernelGmmu, &pParams->timeout, pParams->gfid); + status = kgmmuCheckPendingInvalidates_HAL(pGpu, pKernelGmmu, &pParams->timeout); return status; } @@ -142,21 +132,19 @@ kgmmuSetPdbToInvalidate_TU102 TLB_INVALIDATE_PARAMS *pParams ) { - { - NV_ASSERT(IS_GFID_PF(pParams->gfid)); - - GPU_VREG_WR32(pGpu, NV_VIRTUAL_FUNCTION_PRIV_MMU_INVALIDATE_PDB, - DRF_NUM(_VIRTUAL_FUNCTION_PRIV, _MMU_INVALIDATE_PDB, _ADDR, - NvU64_LO32(pParams->pdbAddress >> - NV_VIRTUAL_FUNCTION_PRIV_MMU_INVALIDATE_PDB_ADDR_ALIGNMENT)) | - DRF_NUM(_VIRTUAL_FUNCTION_PRIV, _MMU_INVALIDATE_PDB, _APERTURE, pParams->pdbAperture)); - - GPU_VREG_WR32(pGpu, NV_VIRTUAL_FUNCTION_PRIV_MMU_INVALIDATE_UPPER_PDB, - DRF_NUM(_VIRTUAL_FUNCTION_PRIV, _MMU_INVALIDATE_UPPER_PDB, _ADDR, - NvU64_LO32((pParams->pdbAddress >> - NV_VIRTUAL_FUNCTION_PRIV_MMU_INVALIDATE_PDB_ADDR_ALIGNMENT) >> - DRF_SIZE(NV_VIRTUAL_FUNCTION_PRIV_MMU_INVALIDATE_PDB_ADDR)))); - } + NV_ASSERT_OR_RETURN_VOID(IS_GFID_PF(pParams->gfid)); + + GPU_VREG_WR32(pGpu, NV_VIRTUAL_FUNCTION_PRIV_MMU_INVALIDATE_PDB, + DRF_NUM(_VIRTUAL_FUNCTION_PRIV, _MMU_INVALIDATE_PDB, _ADDR, + NvU64_LO32(pParams->pdbAddress >> + NV_VIRTUAL_FUNCTION_PRIV_MMU_INVALIDATE_PDB_ADDR_ALIGNMENT)) | + DRF_NUM(_VIRTUAL_FUNCTION_PRIV, _MMU_INVALIDATE_PDB, _APERTURE, pParams->pdbAperture)); + + GPU_VREG_WR32(pGpu, NV_VIRTUAL_FUNCTION_PRIV_MMU_INVALIDATE_UPPER_PDB, + DRF_NUM(_VIRTUAL_FUNCTION_PRIV, _MMU_INVALIDATE_UPPER_PDB, _ADDR, + NvU64_LO32((pParams->pdbAddress >> + NV_VIRTUAL_FUNCTION_PRIV_MMU_INVALIDATE_PDB_ADDR_ALIGNMENT) >> + DRF_SIZE(NV_VIRTUAL_FUNCTION_PRIV_MMU_INVALIDATE_PDB_ADDR)))); } /*! diff --git a/src/nvidia/src/kernel/gpu/mmu/arch/volta/kern_gmmu_gv100.c b/src/nvidia/src/kernel/gpu/mmu/arch/volta/kern_gmmu_gv100.c index 75f9b9c063..bf894ae344 100644 --- a/src/nvidia/src/kernel/gpu/mmu/arch/volta/kern_gmmu_gv100.c +++ b/src/nvidia/src/kernel/gpu/mmu/arch/volta/kern_gmmu_gv100.c @@ -736,7 +736,9 @@ _kgmmuFaultEntryRmServiceable_GV100 engineId = (faultEntry >> DRF_SHIFT_MW(NVC369_BUF_ENTRY_ENGINE_ID)) & DRF_MASK_MW(NVC369_BUF_ENTRY_ENGINE_ID); - bEngineCE = ((engineId >= kgmmuGetMinCeEngineId_HAL(pKernelGmmu)) && (engineId <= kgmmuGetMaxCeEngineId_HAL(pGpu, pKernelGmmu))); + bEngineCE = ((engineId >= pKernelGmmu->minCeMmuFaultId) && + (engineId <= pKernelGmmu->maxCeMmuFaultId)); + bPbdmaFault = kfifoIsMmuFaultEngineIdPbdma(pGpu, pKernelFifo, engineId); *bRmServiceable = (!bClientBufEnabled || !bUvmHandledNonFatal || !(bEngineCE || bPbdmaFault)); @@ -1294,40 +1296,24 @@ kgmmuCopyFaultPacketToClientShadowBuffer_GV100 return NV_OK; } -/*! - * @brief Get the engine ID associated with the min CE - * - * @param[in] pKernelGmmu KernelGmmu object - * - * return engine ID of the min CE - */ -NvU32 -kgmmuGetMinCeEngineId_GV100 -( - KernelGmmu *pKernelGmmu -) -{ - return NV_PFAULT_MMU_ENG_ID_CE0; -} -/*! - * @brief Get the engine ID associated with the max CE - * - * @param[in] pGpu OBJGPU object - * @param[in] pKernelGmmu KernelGmmu object - * - * return engine ID of the max CE - */ -NvU32 -kgmmuGetMaxCeEngineId_GV100 +NV_STATUS +kgmmuInitCeMmuFaultIdRange_GV100 ( OBJGPU *pGpu, KernelGmmu *pKernelGmmu ) { - return NV_PFAULT_MMU_ENG_ID_CE8; + pKernelGmmu->minCeMmuFaultId = NV_PFAULT_MMU_ENG_ID_CE0; + pKernelGmmu->maxCeMmuFaultId = NV_PFAULT_MMU_ENG_ID_CE8; + + NV_PRINTF(LEVEL_INFO, "CE MMU Fault ID range [0x%x - 0x%x]\n", + pKernelGmmu->minCeMmuFaultId, pKernelGmmu->maxCeMmuFaultId); + + return NV_OK; } + /*! * @brief Creates shadow fault buffer for RM fatal fault handling * diff --git a/src/nvidia/src/kernel/gpu/mmu/bar2_walk.c b/src/nvidia/src/kernel/gpu/mmu/bar2_walk.c index 400c9ae819..629cd799f5 100644 --- a/src/nvidia/src/kernel/gpu/mmu/bar2_walk.c +++ b/src/nvidia/src/kernel/gpu/mmu/bar2_walk.c @@ -529,7 +529,14 @@ _bar2WalkCBLevelAlloc !pMemorySystemConfig->bL2PreFill; NV_STATUS status = NV_OK; - NV_ASSERT_OK_OR_RETURN(vgpuGetCallingContextGfid(pGpu, &gfid)); + if (vgpuGetCallingContextDevice(pGpu) != NULL) + { + NV_ASSERT_OK_OR_RETURN(vgpuGetCallingContextGfid(pGpu, &gfid)); + } + else + { + gfid = GPU_GFID_PF; + } // Abort early if level is not targeted or already allocated. if (!bTarget || (NULL != *ppMemDesc)) diff --git a/src/nvidia/src/kernel/gpu/mmu/gmmu_walk.c b/src/nvidia/src/kernel/gpu/mmu/gmmu_walk.c index 6f45f789d9..100290eb70 100644 --- a/src/nvidia/src/kernel/gpu/mmu/gmmu_walk.c +++ b/src/nvidia/src/kernel/gpu/mmu/gmmu_walk.c @@ -24,6 +24,7 @@ #include "gpu/gpu.h" #include "gpu/mem_mgr/mem_mgr.h" #include "mem_mgr/gpu_vaspace.h" +#include "mem_mgr/fabric_vaspace.h" #include "gpu/mmu/kern_gmmu.h" #include "kernel/gpu/nvlink/kernel_nvlink.h" #include "kernel/gpu/fifo/kernel_fifo.h" @@ -688,8 +689,23 @@ _gmmuWalkCBUpdatePde KernelGmmu *pKernelGmmu = GPU_GET_KERNEL_GMMU(pGpu); const GMMU_FMT *pFmt = pUserCtx->pGpuState->pFmt; MEMORY_DESCRIPTOR *pMemDesc[GMMU_MAX_PAGE_DIR_INDEX_COUNT] = {NULL}; - NvU32 recipExp = NV_U32_MAX; - const GMMU_FMT_PDE_MULTI *pPdeMulti = pFmt->pPdeMulti; + NvU32 recipExp = NV_U32_MAX; + const GMMU_FMT_PDE_MULTI *pPdeMulti = pFmt->pPdeMulti; + NvU32 transferFlags = TRANSFER_FLAGS_NONE; + + // FABRIC_VASPACE object of pGpu. + FABRIC_VASPACE *pFabricVAS = (pGpu->pFabricVAS != NULL) ? (dynamicCast(pGpu->pFabricVAS, FABRIC_VASPACE)) : NULL; + + // GVASPACE object associated with this fabric vaspace. + OBJGVASPACE *pGVAS_FLA = (pFabricVAS != NULL) ? (dynamicCast(pFabricVAS->pGVAS, OBJGVASPACE)) : NULL; + + // Apply the WAR to flush CPU cache if the VA space is of BAR1/FLA. + if (((pUserCtx->pGVAS->flags & VASPACE_FLAGS_BAR_BAR1) || + (pGVAS == pGVAS_FLA)) && + pKernelGmmu->bBug4686457WAR) + { + transferFlags |= TRANSFER_FLAGS_FLUSH_CPU_CACHE_WAR_BUG4686457; + } pMemDesc[GMMU_USER_PAGE_DIR_INDEX] = (MEMORY_DESCRIPTOR*)pLevelMem; if (bMirror) @@ -796,7 +812,7 @@ _gmmuWalkCBUpdatePde dest.offset = entryIndex * pLevelFmt->entrySize; NV_ASSERT_OK(memmgrMemWrite(GPU_GET_MEMORY_MANAGER(pGpu), &dest, entry.v8, pLevelFmt->entrySize, - TRANSFER_FLAGS_NONE)); + transferFlags)); } return NV_TRUE; @@ -984,11 +1000,27 @@ _gmmuWalkCBCopyEntries NvU32 *pProgress ) { - MEMORY_DESCRIPTOR *pSrcDesc = (MEMORY_DESCRIPTOR *)pSrcMem; - MEMORY_DESCRIPTOR *pDstDesc = (MEMORY_DESCRIPTOR *)pDstMem; - TRANSFER_SURFACE src = {0}; - TRANSFER_SURFACE dest = {0}; - + OBJGPU *pGpu = pUserCtx->pGpu; + KernelGmmu *pKernelGmmu = GPU_GET_KERNEL_GMMU(pGpu); + MEMORY_DESCRIPTOR *pSrcDesc = (MEMORY_DESCRIPTOR *)pSrcMem; + MEMORY_DESCRIPTOR *pDstDesc = (MEMORY_DESCRIPTOR *)pDstMem; + TRANSFER_SURFACE src = {0}; + TRANSFER_SURFACE dest = {0}; + NvU32 transferFlags = TRANSFER_FLAGS_NONE; + + // FABRIC_VASPACE object of pGpu. + FABRIC_VASPACE *pFabricVAS = (pGpu->pFabricVAS != NULL) ? (dynamicCast(pGpu->pFabricVAS, FABRIC_VASPACE)) : NULL; + + // GVASPACE object associated with this fabric vaspace. + OBJGVASPACE *pGVAS_FLA = (pFabricVAS != NULL) ? (dynamicCast(pFabricVAS->pGVAS, OBJGVASPACE)) : NULL; + + // Apply the WAR to flush CPU cache if the VA space is of BAR1/FLA + if (((pUserCtx->pGVAS->flags & VASPACE_FLAGS_BAR_BAR1) || + (pUserCtx->pGVAS == pGVAS_FLA)) && + pKernelGmmu->bBug4686457WAR) + { + transferFlags |= TRANSFER_FLAGS_FLUSH_CPU_CACHE_WAR_BUG4686457; + } src.pMemDesc = pSrcDesc; src.offset = entryIndexLo * pLevelFmt->entrySize; dest.pMemDesc = pDstDesc; @@ -1009,7 +1041,7 @@ _gmmuWalkCBCopyEntries entryIndexHi); NV_ASSERT_OK(memmgrMemCopy(GPU_GET_MEMORY_MANAGER(pGpu), &dest, &src, - sizeOfEntries, TRANSFER_FLAGS_NONE)); + sizeOfEntries, transferFlags)); } // Report full range complete. diff --git a/src/nvidia/src/kernel/gpu/mmu/kern_gmmu.c b/src/nvidia/src/kernel/gpu/mmu/kern_gmmu.c index ae8769bfcc..94a2ea9554 100644 --- a/src/nvidia/src/kernel/gpu/mmu/kern_gmmu.c +++ b/src/nvidia/src/kernel/gpu/mmu/kern_gmmu.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -202,6 +202,13 @@ NV_STATUS kgmmuStateInitLocked_IMPL NV_ASSERT_OK_OR_RETURN(kgmmuFaultBufferInit_HAL(pGpu, pKernelGmmu)); } + if (gpuIsSelfHosted(pGpu) && + pGpu->getProperty(pGpu, PDB_PROP_GPU_COHERENT_CPU_MAPPING) && + IsdBLACKWELL(pGpu)) + { + pKernelGmmu->bBug4686457WAR = NV_TRUE; + } + return status; } @@ -1688,7 +1695,7 @@ kgmmuClientShadowFaultBufferRegister_IMPL NV_STATUS status = NV_OK; struct GMMU_FAULT_BUFFER *pFaultBuffer; GMMU_CLIENT_SHADOW_FAULT_BUFFER *pClientShadowFaultBuffer; - GMMU_SHADOW_FAULT_BUF *pQueue; + GMMU_SHADOW_FAULT_BUF *pQueue = NULL; MEMORY_DESCRIPTOR *pBufferMemDesc; RmPhysAddr shadowFaultBufferQueuePhysAddr; NvU32 queueCapacity, numBufferPages; diff --git a/src/nvidia/src/kernel/gpu/mmu/mmu_trace.c b/src/nvidia/src/kernel/gpu/mmu/mmu_trace.c index 9eed0e2224..5cded6fd5d 100644 --- a/src/nvidia/src/kernel/gpu/mmu/mmu_trace.c +++ b/src/nvidia/src/kernel/gpu/mmu/mmu_trace.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2013-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2013-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -171,15 +171,6 @@ mmuTrace NvBool modeValid; MMU_TRACE_MODE traceMode; - if (RMCFG_FEATURE_PLATFORM_GSP) - { - // - // All client vaspace is managed by CPU-RM, so MMU_TRACER is not needed - // in GSP-RM - // - return NV_ERR_NOT_SUPPORTED; - } - NV_ASSERT_OR_RETURN(pGpu != NULL, NV_ERR_INVALID_ARGUMENT); NV_ASSERT_OR_RETURN(pVAS != NULL, NV_ERR_INVALID_ARGUMENT); @@ -475,6 +466,7 @@ _mmuTraceWalk NvBool isPt = NV_FALSE; NvU8 *pBase = NULL; MEMORY_DESCRIPTOR *pTempMemDesc = NULL; + MEMORY_DESCRIPTOR nextMemDesc = {0}; MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); if (pMemDesc == NULL) @@ -551,6 +543,7 @@ _mmuTraceWalk { NvU32 memSize = 0; + NvBool destroyMemDesc = NV_FALSE; const void *pFmtPde = pTraceCb->getFmtPde(pFmt, pFmtLevel, i); NvU64 nextBase = pTraceCb->getPdePa(pGpu, pFmtPde, &entry); @@ -578,12 +571,27 @@ _mmuTraceWalk // Continue to next sub-level, still assuming a PDE fault so far. continue; } - - NV_ASSERT_OK_OR_GOTO(status, - mmuWalkGetPageLevelInfo(pWalk, &pFmtLevel->subLevels[i], entryVa, - (const MMU_WALK_MEMDESC**)&pTempMemDesc, &memSize), - unmap_and_exit); - + // When on GSP, read from the physical address to get the next entry. + if (RMCFG_FEATURE_PLATFORM_GSP) + { + NvU32 nextSpace = pTraceCb->pdeAddrSpace(pFmtPde, &entry); + + memSize = mmuFmtLevelSize((const MMU_FMT_LEVEL*)&pFmtLevel->subLevels[i]); + memdescCreateExisting(&nextMemDesc, pGpu, memSize, nextSpace, + NV_MEMORY_UNCACHED, MEMDESC_FLAGS_NONE); + memdescDescribe(&nextMemDesc, nextSpace, nextBase, memSize); + pTempMemDesc = &nextMemDesc; + destroyMemDesc = NV_TRUE; + } + // Otherwise we use the SW maintained MMU table since we don't want to rely on + // HW for kernel SW behavior. + else + { + NV_ASSERT_OK_OR_GOTO(status, + mmuWalkGetPageLevelInfo(pWalk, &pFmtLevel->subLevels[i], entryVa, + (const MMU_WALK_MEMDESC**)&pTempMemDesc, &memSize), + unmap_and_exit); + } // Only print out the PDE the first time we know it's a valid PDE if (!valid) { @@ -611,6 +619,10 @@ _mmuTraceWalk } destroy_mem: + if (destroyMemDesc) + { + memdescDestroy(&nextMemDesc); + } if (*pDone) { goto unmap_and_exit; diff --git a/src/nvidia/src/kernel/gpu/nvenc/nvencsession.c b/src/nvidia/src/kernel/gpu/nvenc/nvencsession.c index 2a72a06b53..954cca87fc 100644 --- a/src/nvidia/src/kernel/gpu/nvenc/nvencsession.c +++ b/src/nvidia/src/kernel/gpu/nvenc/nvencsession.c @@ -241,6 +241,7 @@ _gpuNvEncSessionProcessBuffer(OBJGPU *pGpu, NvencSession *pNvencSession) NvU64 latestFrameEndTS; NvU64 processedFrameCount; NvU64 timeTakenToEncodeNs; + NvS64 timeDiffFrameTS; NVENC_SESSION_INFO_V1 *pSessionInfoBuffer; NVENC_SESSION_INFO_V1 *pLocalSessionInfoBuffer; NVENC_SESSION_INFO_ENTRY_V1 *pSubmissionTSEntry; @@ -321,9 +322,6 @@ _gpuNvEncSessionProcessBuffer(OBJGPU *pGpu, NvencSession *pNvencSession) break; } - // Update latest processed frame index. - latestFrameIndex = currIndex; - // Validation : Check if submission-start-end frame ids match. if ((pSubmissionTSEntry->frameId != pStartTSEntry->frameId) || (pStartTSEntry->frameId != pEndTSEntry->frameId)) { @@ -335,6 +333,9 @@ _gpuNvEncSessionProcessBuffer(OBJGPU *pGpu, NvencSession *pNvencSession) continue; } + // Update latest processed frame index. + latestFrameIndex = currIndex; + // Add the difference of end timestamp and submission timestamp to total time taken. timeTakenToEncodeNs += (pEndTSEntry->timestamp - pSubmissionTSEntry->timestamp); processedFrameCount++; @@ -355,11 +356,11 @@ _gpuNvEncSessionProcessBuffer(OBJGPU *pGpu, NvencSession *pNvencSession) // Find time difference between latest processed frame end TS and last processed frame end TS in last callback. // Same is done for findng processed frame count. // This would provide a better average FPS value. - timeTakenToEncodeNs = latestFrameEndTS - pNvencSession->lastProcessedFrameTS; - if (timeTakenToEncodeNs > 0) + timeDiffFrameTS = latestFrameEndTS - pNvencSession->lastProcessedFrameTS; + if (timeDiffFrameTS > 0) { processedFrameCount = latestFrameId - pNvencSession->lastProcessedFrameId; - pNvencSession->nvencSessionEntry.averageEncodeFps = ((processedFrameCount * 1000 * 1000 * 1000) / timeTakenToEncodeNs); + pNvencSession->nvencSessionEntry.averageEncodeFps = ((processedFrameCount * 1000 * 1000 * 1000) / timeDiffFrameTS); } else { diff --git a/src/nvidia/src/kernel/gpu/nvlink/arch/blackwell/kernel_nvlink_gb100.c b/src/nvidia/src/kernel/gpu/nvlink/arch/blackwell/kernel_nvlink_gb100.c index 412f1cd482..4dd04a60f9 100644 --- a/src/nvidia/src/kernel/gpu/nvlink/arch/blackwell/kernel_nvlink_gb100.c +++ b/src/nvidia/src/kernel/gpu/nvlink/arch/blackwell/kernel_nvlink_gb100.c @@ -25,6 +25,7 @@ #include "kernel/gpu/nvlink/kernel_nvlink.h" #include "kernel/diagnostics/nv_debug_dump.h" +#include "kernel/gpu_mgr/gpu_mgr.h" NV_STATUS knvlinkGetSupportedCounters_GB100 @@ -168,7 +169,7 @@ knvlinkLogAliDebugMessages_GB100 FOR_EACH_INDEX_IN_MASK(32, link, pKernelNvlink->postRxDetLinkMask) { - if (pParams->linkErrInfo[link].DLStatMN00 != 0x0) + if ((pParams->linkErrInfo[link].DLStatMN00 & 0xffff) != 0x0) { NV_PRINTF(LEVEL_ERROR, "ALI Error for GPU %d::linkId %d: 0x%x\n", pGpu->gpuInstance, @@ -233,3 +234,134 @@ knvlinkDumpCallbackRegister_GB100 REF_DEF(NVD_ENGINE_FLAGS_SOURCE, _GSP), (void *)pKernelNvlink); } + +static NvU8 +_nvlinkLinkCountToRbmMode +( + NvU8 linkCount +) +{ + NvU8 rbmMode = 0; + + rbmMode = FLD_SET_DRF_NUM(_GPU, _NVLINK, _BW_MODE, + GPU_NVLINK_BW_MODE_LINK_COUNT, + rbmMode); + rbmMode = FLD_SET_DRF_NUM(_GPU, _NVLINK, _BW_MODE_LINK_COUNT, + linkCount, rbmMode); + return rbmMode; +} + +/*! + * Check if requested RBM mode is supported by GPU + */ +NvBool +knvlinkIsBwModeSupported_GB100 +( + OBJGPU *pGpu, + KernelNvlink *pKernelNvlink, + NvU8 mode +) +{ + NvU32 i; + + // Legacy BW modes are not supported except _FULL + if ((DRF_VAL(_GPU, _NVLINK, _BW_MODE, mode) != GPU_NVLINK_BW_MODE_LINK_COUNT) && + (DRF_VAL(_GPU, _NVLINK, _BW_MODE, mode) != GPU_NVLINK_BW_MODE_FULL)) + { + NV_PRINTF(LEVEL_ERROR, "Legacy BW modes are not supported on this platform.\n"); + return NV_FALSE; + } + + if (DRF_VAL(_GPU, _NVLINK, _BW_MODE, mode) == GPU_NVLINK_BW_MODE_FULL) + { + // Requesting full bandwidth on GPU + return NV_TRUE; + } + + // Check if requested BW mode link count is supported by GFM + if (DRF_VAL(_GPU, _NVLINK, _BW_MODE_LINK_COUNT, mode) > pKernelNvlink->maxRbmLinks) + { + NV_PRINTF(LEVEL_ERROR, "RBM not supported by GFM. LinkCount: %d; MaxLinkCount: %d\n", + DRF_VAL(_GPU, _NVLINK, _BW_MODE_LINK_COUNT, mode), + pKernelNvlink->maxRbmLinks); + return NV_FALSE; + } + + // Check if requested BW mode link count is supported by HSHUB + for (i = 0; i < pKernelNvlink->totalRbmModes; i++) + { + if (mode == pKernelNvlink->hshubSupportedRbmModesList[i]) + { + return NV_TRUE; + } + } + + NV_PRINTF(LEVEL_ERROR, "RBM requested is not supported. LinkCount: %d\n", + DRF_VAL(_GPU, _NVLINK, _BW_MODE_LINK_COUNT, mode)); + return NV_FALSE; +} + +/*! + * Retrieve list of HSHUB supported RBM Modes + */ +NV_STATUS +knvlinkGetHshubSupportedRbmModes_GB100 +( + OBJGPU *pGpu, + KernelNvlink *pKernelNvlink +) +{ + NV_STATUS status = NV_OK; + NvU32 i; + + // + // TODO: Update hardcoded list with list retrieved from HSHUB query rpc. + // Current supported link counts: 0, 4, 8, 12 + // + const NvU8 gpuNvlinkHshubSupportedRbmList[] = + { + _nvlinkLinkCountToRbmMode(0), + _nvlinkLinkCountToRbmMode(4), + _nvlinkLinkCountToRbmMode(8), + _nvlinkLinkCountToRbmMode(12) + }; + + for (i = 0; i < NV_ARRAY_ELEMENTS(gpuNvlinkHshubSupportedRbmList); i++) + { + pKernelNvlink->hshubSupportedRbmModesList[i] = gpuNvlinkHshubSupportedRbmList[i]; + } + pKernelNvlink->totalRbmModes = NV_ARRAY_ELEMENTS(gpuNvlinkHshubSupportedRbmList); + + return status; +} + +/*! + * Retrieve list of supported BW modes + */ +NV_STATUS +knvlinkGetSupportedBwMode_GB100 +( + OBJGPU *pGpu, + KernelNvlink *pKernelNvlink, + NV2080_CTRL_NVLINK_GET_SUPPORTED_BW_MODE_PARAMS *pParams +) +{ + NvU32 i; + + for (i = 0; i < pKernelNvlink->totalRbmModes; i++) + { + // Need to filter HSHUB supported list with maxRbmLinks received from probe response + if (pKernelNvlink->hshubSupportedRbmModesList[i] <= _nvlinkLinkCountToRbmMode(pKernelNvlink->maxRbmLinks)) + { + pParams->rbmModesList[i] = pKernelNvlink->hshubSupportedRbmModesList[i]; + } + else + { + // GFM no longer supports mode in supported list. Do not copy to client. + break; + } + } + pParams->rbmTotalModes = i; + + return NV_OK; +} \ No newline at end of file diff --git a/src/nvidia/src/kernel/gpu/nvlink/arch/hopper/kernel_nvlink_gh100.c b/src/nvidia/src/kernel/gpu/nvlink/arch/hopper/kernel_nvlink_gh100.c index 7047bbfe99..970e1b7d2c 100644 --- a/src/nvidia/src/kernel/gpu/nvlink/arch/hopper/kernel_nvlink_gh100.c +++ b/src/nvidia/src/kernel/gpu/nvlink/arch/hopper/kernel_nvlink_gh100.c @@ -49,7 +49,7 @@ knvlinkIsAliSupported_GH100 { NvU32 status = NV_OK; - NV2080_CTRL_NVLINK_GET_ALI_ENABLED_PARAMS params; + NV2080_CTRL_INTERNAL_NVLINK_GET_ALI_ENABLED_PARAMS params; portMemSet(¶ms, 0, sizeof(params)); @@ -57,7 +57,7 @@ knvlinkIsAliSupported_GH100 params.bEnableAli = NV_FALSE; status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_GET_ALI_ENABLED, + NV2080_CTRL_CMD_INTERNAL_NVLINK_GET_ALI_ENABLED, (void *)¶ms, sizeof(params)); if (status != NV_OK) { @@ -158,14 +158,14 @@ knvlinkPostSetupNvlinkPeer_GH100 ) { NvU32 status = NV_OK; - NV2080_CTRL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS postSetupNvlinkPeerParams; + NV2080_CTRL_INTERNAL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS postSetupNvlinkPeerParams; portMemSet(&postSetupNvlinkPeerParams, 0, sizeof(postSetupNvlinkPeerParams)); postSetupNvlinkPeerParams.peerMask = (1 << NVLINK_MAX_PEERS_SW) - 1; status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_POST_SETUP_NVLINK_PEER, + NV2080_CTRL_CMD_INTERNAL_NVLINK_POST_SETUP_NVLINK_PEER, (void *)&postSetupNvlinkPeerParams, sizeof(postSetupNvlinkPeerParams)); if (status != NV_OK) @@ -611,6 +611,87 @@ knvlinkGetEffectivePeerLinkMask_GH100 *pPeerLinkMask = (effectivePeerLinkMask > 0) ? effectivePeerLinkMask : peerLinkMask; } +/*! + * Check if requested BW mode is supported by GPU + */ +NvBool +knvlinkIsBwModeSupported_GH100 +( + OBJGPU *pGpu, + KernelNvlink *pKernelNvlink, + NvU8 mode +) +{ + // _LINK_COUNT BW modes are not supported on HOPPER + if (mode > GPU_NVLINK_BW_MODE_3QUARTER) + { + return NV_FALSE; + } + + // Direct-Connect supports all modes + if (!gpuFabricProbeIsSupported(pGpu)) + { + return NV_TRUE; + } + + // Nvswitch supports _MIN and _FULL only + if (mode == GPU_NVLINK_BW_MODE_MIN || mode == GPU_NVLINK_BW_MODE_FULL) + { + return NV_TRUE; + } + + NV_PRINTF(LEVEL_ERROR, "BW mode requested is not supported. Mode: %d\n", + mode); + return NV_FALSE; +} + +/*! + * Retrieve Platform-dependent list of supported legacy BW modes + */ +NV_STATUS +knvlinkGetSupportedBwMode_GH100 +( + OBJGPU *pGpu, + KernelNvlink *pKernelNvlink, + NV2080_CTRL_NVLINK_GET_SUPPORTED_BW_MODE_PARAMS *pParams +) +{ + // Direct-Connect supports all legacy modes + const NvU8 directConnectBwModeList[] = + { + GPU_NVLINK_BW_MODE_FULL, + GPU_NVLINK_BW_MODE_OFF, + GPU_NVLINK_BW_MODE_MIN, + GPU_NVLINK_BW_MODE_HALF, + GPU_NVLINK_BW_MODE_3QUARTER + }; + // Nvswitch supports _MIN and _FULL only + const NvU8 switchBwModeList[] = + { + GPU_NVLINK_BW_MODE_FULL, + GPU_NVLINK_BW_MODE_MIN + }; + NvU32 i; + + if (pGpu->fabricProbeRetryDelay == 0) + { + for (i = 0; i < NV_ARRAY_ELEMENTS(directConnectBwModeList); i++) + { + pParams->rbmModesList[i] = directConnectBwModeList[i]; + } + } + else + { + for (i = 0; i < NV_ARRAY_ELEMENTS(switchBwModeList); i++) + { + pParams->rbmModesList[i] = switchBwModeList[i]; + } + } + pParams->rbmTotalModes = i; + + return NV_OK; +} + /*! * @brief Set unique fabric address for NVSwitch enabled systems. * diff --git a/src/nvidia/src/kernel/gpu/nvlink/arch/pascal/kernel_nvlink_gp100.c b/src/nvidia/src/kernel/gpu/nvlink/arch/pascal/kernel_nvlink_gp100.c index fb4d471021..15f2a17325 100644 --- a/src/nvidia/src/kernel/gpu/nvlink/arch/pascal/kernel_nvlink_gp100.c +++ b/src/nvidia/src/kernel/gpu/nvlink/arch/pascal/kernel_nvlink_gp100.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -261,8 +261,8 @@ knvlinkSetupPeerMapping_GP100 NV_STATUS status = NV_OK; NvU32 peerLinkMask; - NV2080_CTRL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS preSetupNvlinkPeerParams; - NV2080_CTRL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS postSetupNvlinkPeerParams; + NV2080_CTRL_INTERNAL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS preSetupNvlinkPeerParams; + NV2080_CTRL_INTERNAL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS postSetupNvlinkPeerParams; // HSHUB registers are updated during driver load if nvlink topology is forced if (!knvlinkIsForcedConfig(pGpu, pKernelNvlink)) @@ -288,7 +288,7 @@ knvlinkSetupPeerMapping_GP100 preSetupNvlinkPeerParams.bNvswitchConn = knvlinkIsGpuConnectedToNvswitch(pGpu, pKernelNvlink); status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_PRE_SETUP_NVLINK_PEER, + NV2080_CTRL_CMD_INTERNAL_NVLINK_PRE_SETUP_NVLINK_PEER, (void *)&preSetupNvlinkPeerParams, sizeof(preSetupNvlinkPeerParams)); NV_ASSERT(status == NV_OK); @@ -300,7 +300,7 @@ knvlinkSetupPeerMapping_GP100 postSetupNvlinkPeerParams.peerMask = NVBIT(peerId); status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_POST_SETUP_NVLINK_PEER, + NV2080_CTRL_CMD_INTERNAL_NVLINK_POST_SETUP_NVLINK_PEER, (void *)&postSetupNvlinkPeerParams, sizeof(postSetupNvlinkPeerParams)); NV_ASSERT(status == NV_OK); diff --git a/src/nvidia/src/kernel/gpu/nvlink/arch/volta/kernel_nvlink_gv100.c b/src/nvidia/src/kernel/gpu/nvlink/arch/volta/kernel_nvlink_gv100.c index fdf8131b88..a1e86b8f24 100644 --- a/src/nvidia/src/kernel/gpu/nvlink/arch/volta/kernel_nvlink_gv100.c +++ b/src/nvidia/src/kernel/gpu/nvlink/arch/volta/kernel_nvlink_gv100.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -342,6 +342,7 @@ _knvlinkAreLinksDisconnected portMemSet(pParams, 0, sizeof(*pParams)); pParams->linkMask = pKernelNvlink->enabledLinks; + pParams->bSublinkStateInst = NV_TRUE; status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, NV2080_CTRL_CMD_NVLINK_GET_LINK_AND_CLOCK_INFO, diff --git a/src/nvidia/src/kernel/gpu/nvlink/common_nvlinkapi.c b/src/nvidia/src/kernel/gpu/nvlink/common_nvlinkapi.c index 9ab5401d0e..7fba5a3536 100644 --- a/src/nvidia/src/kernel/gpu/nvlink/common_nvlinkapi.c +++ b/src/nvidia/src/kernel/gpu/nvlink/common_nvlinkapi.c @@ -122,6 +122,7 @@ static void _calculateNvlinkCaps { RMCTRL_SET_CAP(tempCaps, NV2080_CTRL_NVLINK_CAPS, _SYSMEM_ATOMICS); } + } switch (ipVerNvlink) @@ -755,7 +756,7 @@ subdeviceCtrlCmdBusGetNvlinkStatus_IMPL pParams->enabledLinkMask = (bIsNvlinkReady) ? pKernelNvlink->enabledLinks : 0x0; pTmpData->nvlinkLinkAndClockInfoParams.linkMask = pParams->enabledLinkMask; - pTmpData->nvlinkLinkAndClockInfoParams.bSublinkStateInst = pParams->bSublinkStateInst; + pTmpData->nvlinkLinkAndClockInfoParams.bSublinkStateInst = NV_TRUE; status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, NV2080_CTRL_CMD_NVLINK_GET_LINK_AND_CLOCK_INFO, diff --git a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlink.c b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlink.c index c2588e7e80..b9565598e2 100644 --- a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlink.c +++ b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlink.c @@ -557,6 +557,11 @@ knvlinkGetP2pConnectionStatus_IMPL (knvlinkGetNumLinksToPeer(pGpu1, pKernelNvlink1, pGpu0) == numPeerLinks), NV_ERR_INVALID_STATE); + // P2P is not supported between GPUs with different RBMs. + NV_CHECK_OR_RETURN(LEVEL_INFO, + (pKernelNvlink0->nvlinkBwMode == pKernelNvlink1->nvlinkBwMode), + NV_ERR_INVALID_STATE); + NV_CHECK_OR_RETURN(LEVEL_INFO, knvlinkCheckNvswitchP2pConfig(pGpu0, pKernelNvlink0, pGpu1), NV_ERR_INVALID_STATE); @@ -1053,6 +1058,7 @@ knvlinkGetPeersNvlinkMaskFromHshub_IMPL portMemSet(pParams, 0, sizeof(*pParams)); pParams->linkMask = pKernelNvlink->enabledLinks; + pParams->bSublinkStateInst = NV_TRUE; status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, NV2080_CTRL_CMD_NVLINK_GET_LINK_AND_CLOCK_INFO, @@ -2139,23 +2145,241 @@ knvlinkFatalErrorRecovery_WORKITEM { OBJGPU *pGpu = gpumgrGetGpu(gpuInstance); rcAndDisableOutstandingClientsWithImportedMemory(pGpu, NV_FABRIC_INVALID_NODE_ID); + + { + NVLINK_UNCONTAINED_ERROR_RECOVERY_INFO *pInfo = (NVLINK_UNCONTAINED_ERROR_RECOVERY_INFO *)pArgs; + if (pInfo != NULL) + portAtomicSetU32(&pInfo->rcCompleted, 1); + } +} + +void +knvlinkUncontainedErrorRecoveryUvmIdle_WORKITEM +( + NvU32 gpuInstance, + void *pArgs +) +{ + NVLINK_UNCONTAINED_ERROR_RECOVERY_INFO *pInfo = (NVLINK_UNCONTAINED_ERROR_RECOVERY_INFO *)pArgs; + NV_STATUS status; + + NV_ASSERT_OR_RETURN_VOID(pInfo != NULL); + + status = osQueueDrainP2PHandler(pInfo->uuid); + + if ((status == NV_OK) || (status == NV_ERR_NOT_SUPPORTED)) + portAtomicSetU32(&pInfo->uvmIdle, 1); + else + NV_ASSERT_FAILED("Failed to idle UVM peer traffic. This will lead to NVLINK Degradation!"); +} + +void +knvlinkUncontainedErrorRecoveryUvmResume_WORKITEM +( + NvU32 gpuInstance, + void *pArgs +) +{ + NVLINK_UNCONTAINED_ERROR_RECOVERY_INFO *pInfo = (NVLINK_UNCONTAINED_ERROR_RECOVERY_INFO *)pArgs; + + NV_ASSERT_OR_RETURN_VOID(pInfo != NULL); + + osQueueResumeP2PHandler(pInfo->uuid); + + // Clear the active recovery + portAtomicSetU32(&pInfo->active, 0); +} + +void +knvlinkUncontainedErrorRecoveryReadyCheck_WORKITEM +( + OBJGPU *pGpu, + void *pArgs +) +{ + NVLINK_UNCONTAINED_ERROR_RECOVERY_INFO *pInfo = (NVLINK_UNCONTAINED_ERROR_RECOVERY_INFO *)pArgs; + OBJTMR *pTmr = GPU_GET_TIMER(pGpu); + NvU64 currentTime; + NV_STATUS status = NV_OK; + + NV_ASSERT_OR_RETURN_VOID(pInfo != NULL); + + NV_ASSERT_OK_OR_GOTO(status, tmrGetCurrentTime(pTmr, ¤tTime), remove); + if ((currentTime - pInfo->startTime) <= NVLINK_UNCONTAINED_ERROR_IDLE_PERIOD_NS) + return; + + portAtomicSetU32(&pInfo->recoveryReady, 1); + +remove: + osRemove1HzCallback(pGpu, knvlinkUncontainedErrorRecoveryReadyCheck_WORKITEM, pArgs); +} + +void +knvlinkUncontainedErrorRecovery_WORKITEM +( + OBJGPU *pGpu, + void *pArgs +) +{ + NVLINK_UNCONTAINED_ERROR_RECOVERY_INFO *pInfo = (NVLINK_UNCONTAINED_ERROR_RECOVERY_INFO *)pArgs; + OBJTMR *pTmr = GPU_GET_TIMER(pGpu); + NvU64 currentTime; + NvBool bRemove = NV_FALSE; + NvBool bDegrade = NV_FALSE; + NV_STATUS status = NV_OK; + + NV_ASSERT_OR_RETURN_VOID(pInfo != NULL); + + NV_ASSERT_OK_OR_GOTO(status, tmrGetCurrentTime(pTmr, ¤tTime), exit); + + // If we do not successfully idle within a resonable time, degrade + if ((currentTime - pInfo->startTime) > NVLINK_UNCONTAINED_ERROR_ABORT_PERIOD_NS) + { + bRemove = NV_TRUE; + bDegrade = NV_TRUE; + // One more pass in case it just took a long time to get scheduled + } + + if (portAtomicOrU32(&pInfo->rcCompleted, 0) == 0) + goto exit; + + if (portAtomicOrU32(&pInfo->uvmIdle, 0) == 0) + goto exit; + + if (portAtomicOrU32(&pInfo->recoveryReady, 0) == 0) + goto exit; + + bRemove = NV_TRUE; + bDegrade = NV_FALSE; + + // Launch recovery action in the HW to allow new traffic + { + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + + NV_ASSERT_OK_OR_GOTO(status, + pRmApi->Control(pRmApi, + pGpu->hInternalClient, + pGpu->hInternalSubdevice, + NV2080_CTRL_CMD_INTERNAL_NVLINK_POST_FATAL_ERROR_RECOVERY, + NULL, + 0), + exit); + } + + // Launch lockless workitem to resume P2P in UVM + NV_ASSERT_OK_OR_GOTO(status, + osQueueWorkItemWithFlags(pGpu, knvlinkUncontainedErrorRecoveryUvmResume_WORKITEM, pInfo, + (OS_QUEUE_WORKITEM_FLAGS_DONT_FREE_PARAMS)), + exit); + +exit: + if (status != NV_OK) + { + bRemove = NV_TRUE; + bDegrade = NV_TRUE; + } + + if (bRemove) + osRemove1HzCallback(pGpu, knvlinkUncontainedErrorRecovery_WORKITEM, pArgs); + + if (bDegrade) + { + KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); + NV_PRINTF(LEVEL_ERROR, "Failed to recover from uncontained NVLINK error. Triggering Degraded Mode!\n"); + knvlinkSetDegradedMode(pGpu, pKernelNvlink, portUtilCountTrailingZeros32(pKernelNvlink->enabledLinks)); + } } NV_STATUS knvlinkFatalErrorRecovery_IMPL ( OBJGPU *pGpu, - KernelNvlink *pKernelNvlink + KernelNvlink *pKernelNvlink, + NvBool bRecoverable ) { - NV_STATUS status; + NV_STATUS status = NV_OK; + NVLINK_UNCONTAINED_ERROR_RECOVERY_INFO *pInfo = gpumgrGetNvlinkRecoveryInfo(gpuGetDBDF(pGpu)); - status = osQueueWorkItemWithFlags(pGpu, knvlinkFatalErrorRecovery_WORKITEM, NULL, - (OS_QUEUE_WORKITEM_FLAGS_LOCK_SEMA | - OS_QUEUE_WORKITEM_FLAGS_LOCK_API_RW | - OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_SUBDEVICE)); + if (bRecoverable && pKernelNvlink->getProperty(pKernelNvlink, PDB_PROP_KNVLINK_UNCONTAINED_ERROR_RECOVERY_SUPPORTED)) + { + OBJTMR *pTmr = GPU_GET_TIMER(pGpu); + + if ((pInfo == NULL) || !pInfo->bValid) + { + status = NV_ERR_INVALID_STATE; + goto fail; + } + + // This recovery process should not be able to occur twice synchronously + if (portAtomicOrU32(&pInfo->active, 0) != 0) + { + NV_ASSERT_FAILED("NVLINK Uncontained error recovery re-triggered unexpectedly!"); + status = NV_ERR_INVALID_STATE; + goto fail; + } + + // Kickoff the recovery process + portAtomicSetU32(&pInfo->active, 1); + portAtomicSetU32(&pInfo->rcCompleted, 0); + portAtomicSetU32(&pInfo->uvmIdle, 0); + portAtomicSetU32(&pInfo->recoveryReady, 0); + NV_ASSERT_OK_OR_GOTO(status, tmrGetCurrentTime(pTmr, &pInfo->startTime), fail); + + { + NvU32 flags = DRF_DEF(2080_GPU_CMD, _GPU_GET_GID_FLAGS, _TYPE, _SHA1) | + DRF_DEF(2080_GPU_CMD, _GPU_GET_GID_FLAGS, _FORMAT, _BINARY); + NvU32 uuidLength; + NvU8 *pUuid; + + // allocates memory for pUuid on success + NV_ASSERT_OK_OR_GOTO(status, gpuGetGidInfo(pGpu, &pUuid, &uuidLength, flags), fail); + NV_ASSERT_OR_GOTO(uuidLength == sizeof(pInfo->uuid), fail); - return status; + portMemCopy(pInfo->uuid, uuidLength, pUuid, uuidLength); + portMemFree(pUuid); + } + + // Launch workitem to RC outstanding IMEX clients + NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, + osQueueWorkItemWithFlags(pGpu, knvlinkFatalErrorRecovery_WORKITEM, pInfo, + (OS_QUEUE_WORKITEM_FLAGS_LOCK_SEMA | + OS_QUEUE_WORKITEM_FLAGS_LOCK_API_RW | + OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_SUBDEVICE | + OS_QUEUE_WORKITEM_FLAGS_DONT_FREE_PARAMS)), + fail); + + // Launch lockless workitem to idle UVM channels + NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, + osQueueWorkItemWithFlags(pGpu, knvlinkUncontainedErrorRecoveryUvmIdle_WORKITEM, pInfo, + (OS_QUEUE_WORKITEM_FLAGS_DONT_FREE_PARAMS)), + fail); + + // Launch repeated 1Hz workitem to wait 1 STO period + NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, + osSchedule1HzCallback(pGpu, knvlinkUncontainedErrorRecoveryReadyCheck_WORKITEM, pInfo, NV_OS_1HZ_REPEAT), + fail); + + // Launch repeated 1Hz workitem to await completion and kickoff recovery process + NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, + osSchedule1HzCallback(pGpu, knvlinkUncontainedErrorRecovery_WORKITEM, pInfo, NV_OS_1HZ_REPEAT), + fail); + } + else + { + status = osQueueWorkItemWithFlags(pGpu, knvlinkFatalErrorRecovery_WORKITEM, NULL, + (OS_QUEUE_WORKITEM_FLAGS_LOCK_SEMA | + OS_QUEUE_WORKITEM_FLAGS_LOCK_API_RW | + OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_SUBDEVICE)); + } + + return status; + +fail: + NV_PRINTF(LEVEL_ERROR, "Failed to recover from uncontained NVLINK error. Triggering Degraded Mode!\n"); + knvlinkSetDegradedMode(pGpu, pKernelNvlink, portUtilCountTrailingZeros32(pKernelNvlink->enabledLinks)); + + return status; } // Grab GPU locks before RPCing into GSP-RM for NVLink RPCs diff --git a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkapi.c b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkapi.c index 4948d07036..38ae7f04a2 100644 --- a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkapi.c +++ b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkapi.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2026-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2026-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -28,9 +28,11 @@ #include "core/locks.h" #include "gpu/gpu.h" #include "gpu/subdevice/subdevice.h" +#include "gpu/gpu_fabric_probe.h" #include "kernel/gpu/mig_mgr/kernel_mig_manager.h" #include "kernel/gpu/nvlink/kernel_nvlink.h" #include "kernel/gpu/mem_sys/kern_mem_sys.h" +#include "kernel/gpu_mgr/gpu_mgr.h" #include "vgpu/rpc.h" #include "nvRmReg.h" @@ -195,7 +197,7 @@ subdeviceCtrlCmdNvlinkSetNvlinkPeer_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); NV_STATUS status = NV_OK; - NV2080_CTRL_NVLINK_ENABLE_NVLINK_PEER_PARAMS enableNvlinkPeerParams; + NV2080_CTRL_INTERNAL_NVLINK_ENABLE_NVLINK_PEER_PARAMS enableNvlinkPeerParams; KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); NvBool bMIGNvLinkP2PSupported = ((pKernelMIGManager != NULL) && @@ -221,7 +223,7 @@ subdeviceCtrlCmdNvlinkSetNvlinkPeer_IMPL // Update the RM cache to reflect the updated status of USE_NVLINK_PEER status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_ENABLE_NVLINK_PEER, + NV2080_CTRL_CMD_INTERNAL_NVLINK_ENABLE_NVLINK_PEER, (void *)&enableNvlinkPeerParams, sizeof(enableNvlinkPeerParams)); if (status != NV_OK) @@ -259,3 +261,106 @@ subdeviceCtrlCmdNvlinkGetSupportedCounters_IMPL return knvlinkGetSupportedCounters_HAL(pGpu, pKernelNvlink, pParams); } +// +// subdeviceCtrlCmdNvlinkGetSupportedBWMode_IMPL +// Query the supported RBM modes from probe repsonse +// +NV_STATUS +subdeviceCtrlCmdNvlinkGetSupportedBWMode_IMPL +( + Subdevice *pSubdevice, + NV2080_CTRL_NVLINK_GET_SUPPORTED_BW_MODE_PARAMS *pParams +) +{ + OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); + KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); + KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); + NvBool bMIGNvLinkP2PSupported = ((pKernelMIGManager != NULL) && + kmigmgrIsMIGNvlinkP2PSupported(pGpu, pKernelMIGManager)); + + if ((pKernelNvlink == NULL) || !bMIGNvLinkP2PSupported) + { + NV_PRINTF(LEVEL_ERROR, "NVLink unavailable. Return\n"); + return NV_ERR_NOT_SUPPORTED; + } + + // Direct-connect system + if (pGpu->fabricProbeRetryDelay == 0) + { + //TODO: handle direct connect systems + NV_PRINTF(LEVEL_ERROR, "RBM not currently implemented on direct connect systems.\n"); + return NV_ERR_NOT_SUPPORTED; + } + + return knvlinkGetSupportedBwMode_HAL(pGpu, pKernelNvlink, pParams); +} + +// +// subdeviceCtrlCmdNvlinkSetBWMode_IMPL +// Set RBM mode on GPU +// +NV_STATUS +subdeviceCtrlCmdNvlinkSetBWMode_IMPL +( + Subdevice *pSubdevice, + NV2080_CTRL_NVLINK_SET_BW_MODE_PARAMS *pParams +) +{ + OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); + KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); + KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); + NvBool bMIGNvLinkP2PSupported = ((pKernelMIGManager != NULL) && + kmigmgrIsMIGNvlinkP2PSupported(pGpu, pKernelMIGManager)); + + if ((pKernelNvlink == NULL) || !bMIGNvLinkP2PSupported) + { + NV_PRINTF(LEVEL_INFO, "NVLink unavailable. Return\n"); + return NV_ERR_NOT_SUPPORTED; + } + + // Direct-connect system + if (pGpu->fabricProbeRetryDelay == 0) + { + //TODO: handle direct connect systems + NV_PRINTF(LEVEL_ERROR, "RBM not currently implemented on direct connect systems.\n"); + return NV_ERR_NOT_SUPPORTED; + } + + // Check if requested BW mode is supported + if (!knvlinkIsBwModeSupported_HAL(pGpu, pKernelNvlink, pParams->rbmMode)) + { + NV_PRINTF(LEVEL_ERROR, "Requested RBM mode is not supported by GPU.\n"); + return NV_ERR_NOT_SUPPORTED; + } + + // Set requested bw mode for GPU + return gpumgrSetGpuNvlinkBwModePerGpu(pGpu, pParams->rbmMode); +} + +// +// subdeviceCtrlCmdNvlinkGetBWMode_IMPL +// Get RBM mode link count of GPU +// +NV_STATUS +subdeviceCtrlCmdNvlinkGetBWMode_IMPL +( + Subdevice *pSubdevice, + NV2080_CTRL_NVLINK_GET_BW_MODE_PARAMS *pParams +) +{ + OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); + KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); + NvU8 bwModeScope; + + bwModeScope = gpumgrGetGpuNvlinkBwModeScope(); + if (bwModeScope == GPU_NVLINK_BW_MODE_SCOPE_PER_NODE) + { + pParams->rbmMode = gpumgrGetGpuNvlinkBwMode(); + } + else + { + pParams->rbmMode = pKernelNvlink->nvlinkBwMode; + } + + return NV_OK; +} diff --git a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelib.c b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelib.c index 3a54fb4324..eb641c696a 100644 --- a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelib.c +++ b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelib.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -325,9 +325,12 @@ knvlinkCoreUpdateDeviceUUID_IMPL status = nvlink_lib_update_uuid_and_device_name(&devInfo, pGidString, pKernelNvlink->deviceName); - // Freeing pGidString here as it is malloc'd as part of gpuGetGidInfo_IMPL - if (pGidString != NULL) - portMemFree(pGidString); + // + // pGidString is malloc'd as part of gpuGetGidInfo_IMPL + // Store pGidString within pKernelNvlink so we can free it during + // knvlinkStatePostUnload to maintain alloc/free symmetry + // + pKernelNvlink->pGidString = pGidString; } #endif diff --git a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelibcallback.c b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelibcallback.c index 155ed20c7e..f7b900dddf 100644 --- a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelibcallback.c +++ b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelibcallback.c @@ -38,73 +38,73 @@ static void _knvlinkCorePassiveLinkChangeCallback(NvU32, void *); /*! - * Compile time assert to ensure NV2080_CTRL_NVLINK_MAX_SEED_BUFFER_SIZE == + * Compile time assert to ensure NV2080_CTRL_INTERNAL_NVLINK_MAX_SEED_BUFFER_SIZE == * NVLINK_MAX_SEED_BUFFER_SIZE */ -ct_assert(NV2080_CTRL_NVLINK_MAX_SEED_BUFFER_SIZE == +ct_assert(NV2080_CTRL_INTERNAL_NVLINK_MAX_SEED_BUFFER_SIZE == NVLINK_MAX_SEED_BUFFER_SIZE); /*! - * Compile time asserts to ensure NV2080_NVLINK_CORE_LINK_STATE* == + * Compile time asserts to ensure NV2080_INTERNAL_NVLINK_CORE_LINK_STATE* == * NVLINK_LINKSTATE* */ -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_OFF == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_OFF == NVLINK_LINKSTATE_OFF); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_HS == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_HS == NVLINK_LINKSTATE_HS); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_SAFE == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_SAFE == NVLINK_LINKSTATE_SAFE); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_FAULT == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_FAULT == NVLINK_LINKSTATE_FAULT); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_RECOVERY == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_RECOVERY == NVLINK_LINKSTATE_RECOVERY); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_FAIL == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_FAIL == NVLINK_LINKSTATE_FAIL); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_DETECT == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_DETECT == NVLINK_LINKSTATE_DETECT); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_RESET == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_RESET == NVLINK_LINKSTATE_RESET); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_ENABLE_PM == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_ENABLE_PM == NVLINK_LINKSTATE_ENABLE_PM); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_DISABLE_PM == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_DISABLE_PM == NVLINK_LINKSTATE_DISABLE_PM); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_SLEEP == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_SLEEP == NVLINK_LINKSTATE_SLEEP); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_SAVE_STATE == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_SAVE_STATE == NVLINK_LINKSTATE_SAVE_STATE); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_RESTORE_STATE == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_RESTORE_STATE == NVLINK_LINKSTATE_RESTORE_STATE); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_PRE_HS == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_PRE_HS == NVLINK_LINKSTATE_PRE_HS); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_DISABLE_ERR_DETECT == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_DISABLE_ERR_DETECT == NVLINK_LINKSTATE_DISABLE_ERR_DETECT); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_LANE_DISABLE == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_LANE_DISABLE == NVLINK_LINKSTATE_LANE_DISABLE); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_LANE_SHUTDOWN == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_LANE_SHUTDOWN == NVLINK_LINKSTATE_LANE_SHUTDOWN); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_TRAFFIC_SETUP == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_TRAFFIC_SETUP == NVLINK_LINKSTATE_TRAFFIC_SETUP); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_INITPHASE1 == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_INITPHASE1 == NVLINK_LINKSTATE_INITPHASE1); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_INITNEGOTIATE == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_INITNEGOTIATE == NVLINK_LINKSTATE_INITNEGOTIATE); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_POST_INITNEGOTIATE == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_POST_INITNEGOTIATE == NVLINK_LINKSTATE_POST_INITNEGOTIATE); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_INITOPTIMIZE == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_INITOPTIMIZE == NVLINK_LINKSTATE_INITOPTIMIZE); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_POST_INITOPTIMIZE == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_POST_INITOPTIMIZE == NVLINK_LINKSTATE_POST_INITOPTIMIZE); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_DISABLE_HEARTBEAT == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_DISABLE_HEARTBEAT == NVLINK_LINKSTATE_DISABLE_HEARTBEAT); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_CONTAIN == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_CONTAIN == NVLINK_LINKSTATE_CONTAIN); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_INITTL == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_INITTL == NVLINK_LINKSTATE_INITTL); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_INITPHASE5 == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_INITPHASE5 == NVLINK_LINKSTATE_INITPHASE5); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_ALI == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_ALI == NVLINK_LINKSTATE_ALI); -ct_assert(NV2080_NVLINK_CORE_LINK_STATE_ACTIVE_PENDING == +ct_assert(NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_ACTIVE_PENDING == NVLINK_LINKSTATE_ACTIVE_PENDING); /*! @@ -494,8 +494,8 @@ knvlinkCoreSetDlLinkModeCallback KernelIoctrl *pKernelIoctrl = NULL; NV_STATUS status = NV_OK; NvU8 linkIndex; - NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS params; - NV2080_CTRL_NVLINK_CALLBACK_SET_DL_LINK_MODE_PARAMS + NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS params; + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_SET_DL_LINK_MODE_PARAMS *pSetDlLinkModeParams; portMemSet(¶ms, 0, sizeof(params)); @@ -523,7 +523,7 @@ knvlinkCoreSetDlLinkModeCallback } params.linkId = linkIndex; - params.callbackType.type = NV2080_CTRL_NVLINK_CALLBACK_TYPE_SET_DL_LINK_MODE; + params.callbackType.type = NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_SET_DL_LINK_MODE; pSetDlLinkModeParams = ¶ms.callbackType.callbackParams.setDlLinkMode; pSetDlLinkModeParams->mode = mode; @@ -535,14 +535,14 @@ knvlinkCoreSetDlLinkModeCallback case NVLINK_LINKSTATE_OFF: { pSetDlLinkModeParams->linkMode = - NV2080_NVLINK_CORE_LINK_STATE_OFF; + NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_OFF; break; } case NVLINK_LINKSTATE_PRE_HS: { pSetDlLinkModeParams->linkMode = - NV2080_NVLINK_CORE_LINK_STATE_PRE_HS; + NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_PRE_HS; pSetDlLinkModeParams->linkModeParams.linkModePreHsParams.remoteDeviceType = pKernelNvlink->nvlinkLinks[linkIndex].remoteEndInfo.deviceType; @@ -554,7 +554,7 @@ knvlinkCoreSetDlLinkModeCallback case NVLINK_LINKSTATE_INITPHASE1: { pSetDlLinkModeParams->linkMode = - NV2080_NVLINK_CORE_LINK_STATE_INITPHASE1; + NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_INITPHASE1; if ((pKernelIoctrl != NULL) && pKernelIoctrl->getProperty(pKernelIoctrl, PDB_PROP_KIOCTRL_MINION_CACHE_SEEDS)) { @@ -562,7 +562,7 @@ knvlinkCoreSetDlLinkModeCallback NvU32 *seedDataDest = pSetDlLinkModeParams->linkModeParams.linkModeInitPhase1Params.seedData; - portMemCopy(seedDataDest, sizeof(*seedDataDest) * NV2080_CTRL_NVLINK_MAX_SEED_BUFFER_SIZE, + portMemCopy(seedDataDest, sizeof(*seedDataDest) * NV2080_CTRL_INTERNAL_NVLINK_MAX_SEED_BUFFER_SIZE, seedDataSrc, sizeof(*seedDataSrc) * NVLINK_MAX_SEED_BUFFER_SIZE); } @@ -571,7 +571,7 @@ knvlinkCoreSetDlLinkModeCallback case NVLINK_LINKSTATE_POST_INITNEGOTIATE: { pSetDlLinkModeParams->linkMode = - NV2080_NVLINK_CORE_LINK_STATE_POST_INITNEGOTIATE; + NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_POST_INITNEGOTIATE; break; } @@ -619,13 +619,13 @@ knvlinkCoreSetDlLinkModeCallback (NvU64)initoptimizeTimeout / 1000); pSetDlLinkModeParams->linkMode = - NV2080_NVLINK_CORE_LINK_STATE_POST_INITOPTIMIZE; + NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_POST_INITOPTIMIZE; // Poll for 10 seconds to avoid GSP timeout while(1) { status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_CORE_CALLBACK, + NV2080_CTRL_CMD_INTERNAL_NVLINK_CORE_CALLBACK, (void *)¶ms, sizeof(params)); if (status != NV_OK) { @@ -664,7 +664,7 @@ knvlinkCoreSetDlLinkModeCallback } status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_CORE_CALLBACK, + NV2080_CTRL_CMD_INTERNAL_NVLINK_CORE_CALLBACK, (void *)¶ms, sizeof(params)); if (status != NV_OK) { @@ -694,7 +694,7 @@ knvlinkCoreSetDlLinkModeCallback NvU32 *seedDataSrc = pSetDlLinkModeParams->linkModeParams.linkModeOffParams.seedData; NvU32 *seedDataDest = pKernelNvlink->nvlinkLinks[linkIndex].core_link->seedData; - portMemCopy(seedDataDest, sizeof(*seedDataDest) * NV2080_CTRL_NVLINK_MAX_SEED_BUFFER_SIZE, + portMemCopy(seedDataDest, sizeof(*seedDataDest) * NV2080_CTRL_INTERNAL_NVLINK_MAX_SEED_BUFFER_SIZE, seedDataSrc, sizeof(*seedDataSrc) * NVLINK_MAX_SEED_BUFFER_SIZE); } @@ -702,7 +702,7 @@ knvlinkCoreSetDlLinkModeCallback } case NVLINK_LINKSTATE_POST_INITNEGOTIATE: { - NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_POST_INITNEGOTIATE_PARAMS + NV2080_CTRL_INTERNAL_NVLINK_SET_DL_LINK_MODE_POST_INITNEGOTIATE_PARAMS *pPostInitNegotiateParams; pPostInitNegotiateParams = @@ -751,7 +751,7 @@ knvlinkCoreGetDlLinkModeCallback OBJGPU *pGpu = NULL; KernelNvlink *pKernelNvlink = NULL; NV_STATUS status = NV_OK; - NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS params; + NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS params; portMemSet(¶ms, 0, sizeof(params)); @@ -767,10 +767,10 @@ knvlinkCoreGetDlLinkModeCallback pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); params.linkId = pNvlinkLink->linkId; - params.callbackType.type = NV2080_CTRL_NVLINK_CALLBACK_TYPE_GET_DL_LINK_MODE; + params.callbackType.type = NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_GET_DL_LINK_MODE; status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_CORE_CALLBACK, + NV2080_CTRL_CMD_INTERNAL_NVLINK_CORE_CALLBACK, (void *)¶ms, sizeof(params)); if (status != NV_OK) { @@ -803,8 +803,8 @@ knvlinkCoreSetTlLinkModeCallback OBJGPU *pGpu = NULL; KernelNvlink *pKernelNvlink = NULL; NV_STATUS status = NV_OK; - NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS params; - NV2080_CTRL_NVLINK_CALLBACK_SET_TL_LINK_MODE_PARAMS + NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS params; + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_SET_TL_LINK_MODE_PARAMS *pSetTlLinkModeParams; portMemSet(¶ms, 0, sizeof(params)); @@ -827,7 +827,7 @@ knvlinkCoreSetTlLinkModeCallback } params.linkId = pNvlinkLink->linkId; - params.callbackType.type = NV2080_CTRL_NVLINK_CALLBACK_TYPE_SET_TL_LINK_MODE; + params.callbackType.type = NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_SET_TL_LINK_MODE; pSetTlLinkModeParams = ¶ms.callbackType.callbackParams.setTlLinkMode; pSetTlLinkModeParams->mode = mode; @@ -835,7 +835,7 @@ knvlinkCoreSetTlLinkModeCallback NV_TRUE : NV_FALSE; status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_CORE_CALLBACK, + NV2080_CTRL_CMD_INTERNAL_NVLINK_CORE_CALLBACK, (void *)¶ms, sizeof(params)); if (status != NV_OK) { @@ -865,7 +865,7 @@ knvlinkCoreGetTlLinkModeCallback OBJGPU *pGpu = NULL; KernelNvlink *pKernelNvlink = NULL; NV_STATUS status = NV_OK; - NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS params; + NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS params; portMemSet(¶ms, 0, sizeof(params)); @@ -881,10 +881,10 @@ knvlinkCoreGetTlLinkModeCallback pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); params.linkId = pNvlinkLink->linkId; - params.callbackType.type = NV2080_CTRL_NVLINK_CALLBACK_TYPE_GET_TL_LINK_MODE; + params.callbackType.type = NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_GET_TL_LINK_MODE; status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_CORE_CALLBACK, + NV2080_CTRL_CMD_INTERNAL_NVLINK_CORE_CALLBACK, (void *)¶ms, sizeof(params)); if (status != NV_OK) { @@ -916,8 +916,8 @@ knvlinkCoreSetTxSublinkModeCallback OBJGPU *pGpu = NULL; KernelNvlink *pKernelNvlink = NULL; NV_STATUS status = NV_OK; - NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS params; - NV2080_CTRL_NVLINK_CALLBACK_SET_TX_SUBLINK_MODE_PARAMS + NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS params; + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_SET_TX_SUBLINK_MODE_PARAMS *pSetTxSublinkModeParams; portMemSet(¶ms, 0, sizeof(params)); @@ -941,7 +941,7 @@ knvlinkCoreSetTxSublinkModeCallback params.linkId = pNvlinkLink->linkId; params.callbackType.type = - NV2080_CTRL_NVLINK_CALLBACK_TYPE_SET_TX_SUBLINK_MODE; + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_SET_TX_SUBLINK_MODE; pSetTxSublinkModeParams = ¶ms.callbackType.callbackParams.setTxSublinkMode; pSetTxSublinkModeParams->mode = mode; @@ -949,7 +949,7 @@ knvlinkCoreSetTxSublinkModeCallback NV_TRUE : NV_FALSE; status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_CORE_CALLBACK, + NV2080_CTRL_CMD_INTERNAL_NVLINK_CORE_CALLBACK, (void *)¶ms, sizeof(params)); if (status != NV_OK) { @@ -992,8 +992,8 @@ knvlinkCoreSetRxSublinkModeCallback OBJGPU *pGpu = NULL; KernelNvlink *pKernelNvlink = NULL; NV_STATUS status = NV_OK; - NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS params; - NV2080_CTRL_NVLINK_CALLBACK_SET_RX_SUBLINK_MODE_PARAMS + NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS params; + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_SET_RX_SUBLINK_MODE_PARAMS *pSetRxSublinkModeParams; pNvlinkLink = (KNVLINK_RM_LINK *)link->link_info; @@ -1015,7 +1015,7 @@ knvlinkCoreSetRxSublinkModeCallback params.linkId = pNvlinkLink->linkId; params.callbackType.type = - NV2080_CTRL_NVLINK_CALLBACK_TYPE_SET_RX_SUBLINK_MODE; + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_SET_RX_SUBLINK_MODE; pSetRxSublinkModeParams = ¶ms.callbackType.callbackParams.setRxSublinkMode; @@ -1024,7 +1024,7 @@ knvlinkCoreSetRxSublinkModeCallback NV_TRUE : NV_FALSE; status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_CORE_CALLBACK, + NV2080_CTRL_CMD_INTERNAL_NVLINK_CORE_CALLBACK, (void *)¶ms, sizeof(params)); if (status != NV_OK) { @@ -1065,7 +1065,7 @@ knvlinkCoreGetTxSublinkModeCallback OBJGPU *pGpu = NULL; KernelNvlink *pKernelNvlink = NULL; NV_STATUS status = NV_OK; - NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS params; + NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS params; portMemSet(¶ms, 0, sizeof(params)); @@ -1088,10 +1088,10 @@ knvlinkCoreGetTxSublinkModeCallback params.linkId = pNvlinkLink->linkId; params.callbackType.type = - NV2080_CTRL_NVLINK_CALLBACK_TYPE_GET_TX_SUBLINK_MODE; + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_GET_TX_SUBLINK_MODE; status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_CORE_CALLBACK, + NV2080_CTRL_CMD_INTERNAL_NVLINK_CORE_CALLBACK, (void *)¶ms, sizeof(params)); if (status != NV_OK) { @@ -1124,7 +1124,7 @@ knvlinkCoreGetRxSublinkModeCallback OBJGPU *pGpu = NULL; KernelNvlink *pKernelNvlink = NULL; NV_STATUS status = NV_OK; - NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS params; + NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS params; portMemSet(¶ms, 0, sizeof(params)); @@ -1147,10 +1147,10 @@ knvlinkCoreGetRxSublinkModeCallback params.linkId = pNvlinkLink->linkId; params.callbackType.type = - NV2080_CTRL_NVLINK_CALLBACK_TYPE_GET_RX_SUBLINK_MODE; + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_GET_RX_SUBLINK_MODE; status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_CORE_CALLBACK, + NV2080_CTRL_CMD_INTERNAL_NVLINK_CORE_CALLBACK, (void *)¶ms, sizeof(params)); if (status != NV_OK) { @@ -1181,8 +1181,8 @@ knvlinkCoreSetRxSublinkDetectCallback OBJGPU *pGpu = NULL; KernelNvlink *pKernelNvlink = NULL; NV_STATUS status = NV_OK; - NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS params; - NV2080_CTRL_NVLINK_CALLBACK_SET_RX_DETECT_PARAMS + NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS params; + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_SET_RX_DETECT_PARAMS *pSetRxDetectParams; portMemSet(¶ms, 0, sizeof(params)); @@ -1200,7 +1200,7 @@ knvlinkCoreSetRxSublinkDetectCallback params.linkId = pNvlinkLink->linkId; params.callbackType.type = - NV2080_CTRL_NVLINK_CALLBACK_TYPE_SET_RX_SUBLINK_DETECT; + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_SET_RX_SUBLINK_DETECT; pSetRxDetectParams = ¶ms.callbackType.callbackParams.setRxSublinkDetect; @@ -1208,7 +1208,7 @@ knvlinkCoreSetRxSublinkDetectCallback NV_TRUE : NV_FALSE; status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_CORE_CALLBACK, + NV2080_CTRL_CMD_INTERNAL_NVLINK_CORE_CALLBACK, (void *)¶ms, sizeof(params)); if (status != NV_OK) { @@ -1238,8 +1238,8 @@ knvlinkCoreGetRxSublinkDetectCallback KernelNvlink *pKernelNvlink = NULL; NV_STATUS status = NV_OK; NvU32 linkId; - NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS params; - NV2080_CTRL_NVLINK_CALLBACK_GET_RX_DETECT_PARAMS + NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS params; + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_GET_RX_DETECT_PARAMS *pGetRxDetectParams; portMemSet(¶ms, 0, sizeof(params)); @@ -1258,12 +1258,12 @@ knvlinkCoreGetRxSublinkDetectCallback params.linkId = linkId; params.callbackType.type = - NV2080_CTRL_NVLINK_CALLBACK_TYPE_GET_RX_SUBLINK_DETECT; + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_GET_RX_SUBLINK_DETECT; pGetRxDetectParams = ¶ms.callbackType.callbackParams.getRxSublinkDetect; status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_CORE_CALLBACK, + NV2080_CTRL_CMD_INTERNAL_NVLINK_CORE_CALLBACK, (void *)¶ms, sizeof(params)); // Store RXDET status mask @@ -1316,12 +1316,12 @@ knvlinkCoreWriteDiscoveryTokenCallback // if (pNvlinkLink->ipVerDlPl >= NVLINK_VERSION_40) { - NV2080_CTRL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS params; + NV2080_CTRL_INTERNAL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS params; portMemSet(¶ms, 0, sizeof(params)); params.linkId = pNvlinkLink->linkId; status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_UPDATE_REMOTE_LOCAL_SID, + NV2080_CTRL_CMD_INTERNAL_NVLINK_UPDATE_REMOTE_LOCAL_SID, (void *)¶ms, sizeof(params)); if (status != NV_OK) { @@ -1341,14 +1341,14 @@ knvlinkCoreWriteDiscoveryTokenCallback else { - NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS params; - NV2080_CTRL_NVLINK_CALLBACK_RD_WR_DISCOVERY_TOKEN_PARAMS + NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS params; + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_RD_WR_DISCOVERY_TOKEN_PARAMS *pWriteDiscoveryTokenParams; portMemSet(¶ms, 0, sizeof(params)); params.linkId = pNvlinkLink->linkId; params.callbackType.type = - NV2080_CTRL_NVLINK_CALLBACK_TYPE_WRITE_DISCOVERY_TOKEN; + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_WRITE_DISCOVERY_TOKEN; pWriteDiscoveryTokenParams = ¶ms.callbackType.callbackParams.writeDiscoveryToken; @@ -1356,7 +1356,7 @@ knvlinkCoreWriteDiscoveryTokenCallback pWriteDiscoveryTokenParams->token = token; status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_CORE_CALLBACK, + NV2080_CTRL_CMD_INTERNAL_NVLINK_CORE_CALLBACK, (void *)¶ms, sizeof(params)); } @@ -1396,9 +1396,8 @@ knvlinkCoreReadDiscoveryTokenCallback OBJGPU *pGpu = pNvlinkLink->pGpu; KernelNvlink *pKernelNvlink = NULL; NV_STATUS status = NV_OK; - NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS params; - NV2080_CTRL_NVLINK_CALLBACK_RD_WR_DISCOVERY_TOKEN_PARAMS - *pReadDiscoveryTokenParams; + NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS params; + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_RD_WR_DISCOVERY_TOKEN_PARAMS *pReadDiscoveryTokenParams = NULL; portMemSet(¶ms, 0, sizeof(params)); @@ -1425,14 +1424,14 @@ knvlinkCoreReadDiscoveryTokenCallback { params.linkId = pNvlinkLink->linkId; params.callbackType.type = - NV2080_CTRL_NVLINK_CALLBACK_TYPE_READ_DISCOVERY_TOKEN; + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_READ_DISCOVERY_TOKEN; pReadDiscoveryTokenParams = ¶ms.callbackType.callbackParams.readDiscoveryToken; pReadDiscoveryTokenParams->ipVerDlPl = pNvlinkLink->ipVerDlPl; status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_CORE_CALLBACK, + NV2080_CTRL_CMD_INTERNAL_NVLINK_CORE_CALLBACK, (void *)¶ms, sizeof(params)); } @@ -1470,7 +1469,7 @@ knvlinkCoreTrainingCompleteCallback OBJGPU *pGpu = NULL; KernelNvlink *pKernelNvlink = NULL; NV_STATUS status; - NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS params; + NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS params; portMemSet(¶ms, 0, sizeof(params)); @@ -1480,10 +1479,10 @@ knvlinkCoreTrainingCompleteCallback pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); params.linkId = pNvlinkLink->linkId; - params.callbackType.type = NV2080_CTRL_NVLINK_CALLBACK_TYPE_TRAINING_COMPLETE; + params.callbackType.type = NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_TRAINING_COMPLETE; status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_CORE_CALLBACK, + NV2080_CTRL_CMD_INTERNAL_NVLINK_CORE_CALLBACK, (void *)¶ms, sizeof(params)); if (status != NV_OK) { @@ -1566,8 +1565,8 @@ knvlinkCoreGetUphyLoadCallback OBJGPU *pGpu = pNvlinkLink->pGpu; KernelNvlink *pKernelNvlink = NULL; NV_STATUS status; - NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS params; - NV2080_CTRL_NVLINK_CALLBACK_GET_UPHY_LOAD_PARAMS + NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS params; + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_GET_UPHY_LOAD_PARAMS *pGetUphyLoadParams; portMemSet(¶ms, 0, sizeof(params)); @@ -1582,13 +1581,13 @@ knvlinkCoreGetUphyLoadCallback params.linkId = pNvlinkLink->linkId; params.callbackType.type = - NV2080_CTRL_NVLINK_CALLBACK_TYPE_GET_UPHY_LOAD; + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_GET_UPHY_LOAD; pGetUphyLoadParams = ¶ms.callbackType.callbackParams.getUphyLoad; status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_CORE_CALLBACK, + NV2080_CTRL_CMD_INTERNAL_NVLINK_CORE_CALLBACK, (void *)¶ms, sizeof(params)); if (status != NV_OK) { diff --git a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelibtrain.c b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelibtrain.c index 4c380bdee3..b49c8cec2f 100644 --- a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelibtrain.c +++ b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkcorelibtrain.c @@ -355,6 +355,8 @@ knvlinkTrainSysmemLinksToActive_IMPL pKernelNvlink->nvlinkLinks[i].remoteEndInfo.bus, pKernelNvlink->nvlinkLinks[i].remoteEndInfo.device); + gpuNotifySubDeviceEvent(pGpu, NV2080_NOTIFIERS_NVLINK_ERROR_FATAL, NULL, 0, 0x0, 0x0); + return NV_ERR_NOT_SUPPORTED; } } @@ -485,13 +487,13 @@ knvlinkCheckTrainingIsComplete_IMPL // FOR_EACH_INDEX_IN_MASK(32, i, pKernelNvlink0->postRxDetLinkMask) { - NV2080_CTRL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS params; + NV2080_CTRL_INTERNAL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS params; portMemSet(¶ms, 0, sizeof(params)); params.linkId = i; status = knvlinkExecGspRmRpc(pGpu0, pKernelNvlink0, - NV2080_CTRL_CMD_NVLINK_UPDATE_REMOTE_LOCAL_SID, + NV2080_CTRL_CMD_INTERNAL_NVLINK_UPDATE_REMOTE_LOCAL_SID, (void *)¶ms, sizeof(params)); if (status != NV_OK) { @@ -540,13 +542,13 @@ knvlinkCheckTrainingIsComplete_IMPL // FOR_EACH_INDEX_IN_MASK(32, i, pKernelNvlink1->postRxDetLinkMask) { - NV2080_CTRL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS params; + NV2080_CTRL_INTERNAL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS params; portMemSet(¶ms, 0, sizeof(params)); params.linkId = i; status = knvlinkExecGspRmRpc(pGpu1, pKernelNvlink1, - NV2080_CTRL_CMD_NVLINK_UPDATE_REMOTE_LOCAL_SID, + NV2080_CTRL_CMD_INTERNAL_NVLINK_UPDATE_REMOTE_LOCAL_SID, (void *)¶ms, sizeof(params)); if (status != NV_OK) { @@ -804,6 +806,8 @@ knvlinkTrainP2pLinksToActive_IMPL pKernelNvlink0->nvlinkLinks[i].remoteEndInfo.bus, pKernelNvlink0->nvlinkLinks[i].remoteEndInfo.device); + gpuNotifySubDeviceEvent(pGpu0, NV2080_NOTIFIERS_NVLINK_ERROR_FATAL, NULL, 0, 0x0, 0x0); + status = NV_ERR_INVALID_STATE; } FOR_EACH_INDEX_IN_MASK_END; @@ -900,6 +904,8 @@ knvlinkTrainFabricLinksToActive_IMPL pKernelNvlink->nvlinkLinks[i].remoteEndInfo.bus, pKernelNvlink->nvlinkLinks[i].remoteEndInfo.device); + gpuNotifySubDeviceEvent(pGpu, NV2080_NOTIFIERS_NVLINK_ERROR_FATAL, NULL, 0, 0x0, 0x0); + return NV_ERR_INVALID_STATE; } } @@ -947,6 +953,12 @@ knvlinkEnterExitSleep_IMPL // Return error if NVLink fabric is managed by FM if (pSys->getProperty(pSys, PDB_PROP_SYS_FABRIC_IS_EXTERNALLY_MANAGED)) { + if (pKernelNvlink->ipVerNvlink >= NVLINK_VERSION_50) + { + // Unilateral sleep/wake is supported on NVL5 FM managed systems + goto done; + } + NV_PRINTF(LEVEL_ERROR, "Skipping L2 entry/exit since fabric is externally managed\n"); @@ -1011,6 +1023,8 @@ knvlinkEnterExitSleep_IMPL return NV_ERR_NOT_SUPPORTED; } +done: + if (bEntry) { // Remove the peer mapping in HSHUB and transition links to sleep (L2) @@ -1049,6 +1063,7 @@ knvlinkCoreShutdownDeviceLinks_IMPL OBJSYS *pSys = SYS_GET_INSTANCE(); NvU32 count = 0; NvU32 linkId; + NvlStatus status = NV_OK; // Skip link shutdown where fabric manager is present, for nvlink version bellow 4.0 if ((pKernelNvlink->ipVerNvlink < NVLINK_VERSION_40 && @@ -1111,13 +1126,23 @@ knvlinkCoreShutdownDeviceLinks_IMPL // Trigger laneshutdown through core lib if shutdown is supported if (pKernelNvlink->getProperty(pKernelNvlink, PDB_PROP_KNVLINK_LANE_SHUTDOWN_ENABLED) && (count > 0)) { - if (nvlink_lib_powerdown_links_from_active_to_off( - pLinks, count, NVLINK_STATE_CHANGE_SYNC)) + status = nvlink_lib_powerdown_links_from_active_to_off( + pLinks, count, NVLINK_STATE_CHANGE_SYNC); + if (status != NVL_SUCCESS) { - NV_PRINTF(LEVEL_ERROR, "Unable to turn off links for the GPU%d\n", + if (status == NVL_NOT_FOUND) + { + // Bug 4419022 + NV_PRINTF(LEVEL_ERROR, "Need to shutdown all links unilaterally for GPU%d\n", + pGpu->gpuInstance); + } + else + { + NV_PRINTF(LEVEL_ERROR, "Unable to turn off links for the GPU%d\n", pGpu->gpuInstance); - return NV_ERR_INVALID_STATE; + return NV_ERR_INVALID_STATE; + } } } @@ -1860,7 +1885,7 @@ _knvlinkActivateDiscoveredSysmemConn { NV_STATUS status = NV_OK; - NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_PARAMS updateHshubMuxParams; + NV2080_CTRL_INTERNAL_NVLINK_UPDATE_HSHUB_MUX_PARAMS updateHshubMuxParams; NV2080_CTRL_NVLINK_SETUP_NVLINK_SYSMEM_PARAMS nvlinkSysmemParams; pKernelNvlink->sysmemLinkMask |= NVBIT(linkId); @@ -1894,11 +1919,11 @@ _knvlinkActivateDiscoveredSysmemConn } portMemSet(&updateHshubMuxParams, 0, sizeof(updateHshubMuxParams)); - updateHshubMuxParams.updateType = NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_TYPE_PROGRAM; + updateHshubMuxParams.updateType = NV2080_CTRL_INTERNAL_NVLINK_UPDATE_HSHUB_MUX_TYPE_PROGRAM; updateHshubMuxParams.bSysMem = NV_TRUE; status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, - NV2080_CTRL_CMD_NVLINK_UPDATE_HSHUB_MUX, + NV2080_CTRL_CMD_INTERNAL_NVLINK_UPDATE_HSHUB_MUX, (void *)&updateHshubMuxParams, sizeof(updateHshubMuxParams)); return status; @@ -1926,6 +1951,7 @@ _knvlinkEnterSleep NV2080_CTRL_NVLINK_PROGRAM_BUFFERREADY_PARAMS programBufferRdyParams; NV2080_CTRL_NVLINK_SAVE_RESTORE_HSHUB_STATE_PARAMS saveRestoreHshubStateParams; + OBJSYS *pSys = SYS_GET_INSTANCE(); portMemSet(&programBufferRdyParams, 0, sizeof(programBufferRdyParams)); programBufferRdyParams.flags = NV2080_CTRL_NVLINK_PROGRAM_BUFFERREADY_FLAGS_SAVE; @@ -1955,6 +1981,37 @@ _knvlinkEnterSleep // In L2 Entry path pKernelNvlink->bL2Entry = NV_TRUE; + // FM Managaged NVL5 System. TODO: Move logic to core lib in follow-up + if (pKernelNvlink->ipVerNvlink >= NVLINK_VERSION_50 && + pSys->getProperty(pSys, PDB_PROP_SYS_FABRIC_IS_EXTERNALLY_MANAGED)) + { + // Call core callback function with set_tl_link_mode + NV2080_CTRL_INTERNAL_NVLINK_CORE_CALLBACK_PARAMS params = {0}; + NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_SET_TL_LINK_MODE_PARAMS *pSetTlLinkModeParams; + NvU32 linkId; + + + params.callbackType.type = NV2080_CTRL_INTERNAL_NVLINK_CALLBACK_TYPE_SET_TL_LINK_MODE; + + FOR_EACH_INDEX_IN_MASK(32, linkId, linkMask) + { + params.linkId = linkId; + pSetTlLinkModeParams = ¶ms.callbackType.callbackParams.setTlLinkMode; + pSetTlLinkModeParams->mode = NV2080_INTERNAL_NVLINK_CORE_LINK_STATE_SLEEP; + + status = knvlinkExecGspRmRpc(pGpu, pKernelNvlink, + NV2080_CTRL_CMD_INTERNAL_NVLINK_CORE_CALLBACK, + (void *)¶ms, sizeof(params)); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "Error setting link: %d to sleep!\n", linkId); + } + } + FOR_EACH_INDEX_IN_MASK_END; + + return retStatus; + } + // Put the mask of links of the device to sleep status = nvlink_lib_powerdown_links_from_active_to_L2(pKernelNvlink->pNvlinkDev, linkMask, diff --git a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkoverrides.c b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkoverrides.c index c3506dbde2..bf22ffb23d 100644 --- a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkoverrides.c +++ b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkoverrides.c @@ -310,6 +310,5 @@ knvlinkApplyRegkeyOverrides_IMPL } } } - return NV_OK; } diff --git a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkstate.c b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkstate.c index f217cc7c53..838a9d3608 100644 --- a/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkstate.c +++ b/src/nvidia/src/kernel/gpu/nvlink/kernel_nvlinkstate.c @@ -230,6 +230,15 @@ knvlinkConstructEngine_IMPL PDB_PROP_KNVLINK_MINION_GFW_BOOT, NV_FALSE); } + { + NVLINK_UNCONTAINED_ERROR_RECOVERY_INFO *pInfo = gpumgrGetNvlinkRecoveryInfo(gpuGetDBDF(pGpu)); + + NV_ASSERT_OR_RETURN(pInfo != NULL, NV_ERR_INVALID_STATE); + // Mark recovery info as valid for use by error recovery workqueues + pInfo->bValid = NV_TRUE; + pInfo->DomainBusDevice = gpuGetDBDF(pGpu); + } + return NV_OK; } @@ -679,6 +688,9 @@ knvlinkStateLoad_IMPL knvlinkDumpCallbackRegister_HAL(pGpu, pKernelNvlink); + // Update list of HSHUB supported RBM modes + knvlinkGetHshubSupportedRbmModes_HAL(pGpu, pKernelNvlink); + knvlinkStateLoad_end: if (status != NV_OK) @@ -986,7 +998,7 @@ _knvlinkPurgeState NvBool bMIGNvLinkP2PDisabled = ((pKernelMIGManager != NULL) && !kmigmgrIsMIGNvlinkP2PSupported(pGpu, pKernelMIGManager)); - FOR_EACH_INDEX_IN_MASK(32, linkId, pKernelNvlink->enabledLinks) + FOR_EACH_INDEX_IN_MASK(32, linkId, pKernelNvlink->discoveredLinks) { if ((pKernelNvlink->nvlinkLinks[linkId].pTmrEvent != NULL) && (pTmr != NULL)) { @@ -1031,6 +1043,18 @@ _knvlinkPurgeState } } + // + // pGidString is allocated within knvlinkStatePostLoad -> knvlinkCoreUpdateDeviceUUID + // so need to free it during destruct + // Freeing it within knvlinkCoreRemoveDevice could create problems if + // AddDevice/RemoveDevice are used outside StateLoad/StatePostUnload/StateDestroy in the future + // + if (pKernelNvlink->pGidString) + { + portMemFree(pKernelNvlink->pGidString); + pKernelNvlink->pGidString = NULL; + } + _knvlinkPurgeState_end: #endif @@ -1060,6 +1084,33 @@ _knvlinkPurgeState return NV_OK; } +/*! + * @brief Workitem to shutdown links async to any error + * paths that were taken + * + * @param[in] pGpu OBJGPU pointer + * @param[in] pKernelNvlink KernelNvlink pointer + * + */ +void +knvlinkShutdownLinks_WORKITEM +( + NvU32 gpuInstance, + void *pData +) +{ + OBJGPU *pGpu = gpumgrGetGpu(gpuInstance); + KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); + + // Sanity Checks + NV_CHECK_OR_RETURN_VOID(LEVEL_INFO, + (pGpu != NULL && + pKernelNvlink != NULL)); + + NV_ASSERT_OR_RETURN_VOID( + knvlinkCoreShutdownDeviceLinks(pGpu, pKernelNvlink, NV_TRUE) == NV_OK); +} + /*! * @brief Degraded Mode will be set if other end of the linkId * is not degraded. @@ -1078,7 +1129,6 @@ knvlinkSetDegradedMode_IMPL NvU32 linkId ) { - NvU32 status = NV_ERR_GENERIC; NvU32 gpuInstance; OBJGPU *pRemoteGpu = NULL; KernelNvlink *pRemoteKernelNvlink = NULL; @@ -1107,6 +1157,7 @@ knvlinkSetDegradedMode_IMPL } } + // Sanity checks if (pRemoteGpu == NULL) { NV_PRINTF(LEVEL_ERROR, @@ -1126,20 +1177,25 @@ knvlinkSetDegradedMode_IMPL return; } + // + // Only mark the current GPU if the peer GPU is not degraded. + // In the case where the peer GPU is already degraded then there is no additional + // loss of connectivity in the fabric due to the link error that caused this + // path to be triggered. + // if (pRemoteKernelNvlink->bIsGpuDegraded == NV_FALSE) { pKernelNvlink->bIsGpuDegraded = NV_TRUE; NV_PRINTF(LEVEL_ERROR, - "GPU%d marked Degraded for error on linkId %d \n", + "GPU%d marked Degraded. Error originated on linkId %d!\n", pGpu->gpuInstance, linkId); - // shutdown all the links on this GPU - status = knvlinkCoreShutdownDeviceLinks(pGpu, pKernelNvlink, NV_TRUE); - if (status != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, - "failed to shutdown links on degraded GPU%d\n", pGpu->gpuInstance); - } + // Queue a workitem to handle rest of the degraded mode handling + NV_CHECK_OR_RETURN_VOID(LEVEL_ERROR, NV_OK == + osQueueWorkItemWithFlags(pGpu, knvlinkShutdownLinks_WORKITEM, + NULL, + (OS_QUEUE_WORKITEM_FLAGS_LOCK_API_RO | + OS_QUEUE_WORKITEM_FLAGS_LOCK_GPU_GROUP_SUBDEVICE))); } return; diff --git a/src/nvidia/src/kernel/gpu/perf/kern_perf.c b/src/nvidia/src/kernel/gpu/perf/kern_perf.c index 2f873343cb..f9f1e583c2 100644 --- a/src/nvidia/src/kernel/gpu/perf/kern_perf.c +++ b/src/nvidia/src/kernel/gpu/perf/kern_perf.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -86,13 +86,12 @@ kperfStateLoad_IMPL(OBJGPU *pGpu, KernelPerf *pKernelPerf, NvU32 flags) { OBJSYS *pSys = SYS_GET_INSTANCE(); - OBJCL *pCl = SYS_GET_CL(pSys); PlatformRequestHandler *pPlatformRequestHandler = SYS_GET_PFM_REQ_HNDLR(pSys); // Load PFM_REQ_HNDLR module which is a child of OBJSYS // Skip pfmreqhndlrStateLoad on eGPU - if (!(pCl->getProperty(pCl, PDB_PROP_CL_IS_EXTERNAL_GPU)) && + if (!(pGpu->getProperty(pGpu, PDB_PROP_GPU_IS_EXTERNAL_GPU)) && (pPlatformRequestHandler != NULL)) { pfmreqhndlrStateLoad(pPlatformRequestHandler); diff --git a/src/nvidia/src/kernel/gpu/perf/kern_perf_pwr.c b/src/nvidia/src/kernel/gpu/perf/kern_perf_pwr.c index 09551421d7..60e1c0d3ec 100644 --- a/src/nvidia/src/kernel/gpu/perf/kern_perf_pwr.c +++ b/src/nvidia/src/kernel/gpu/perf/kern_perf_pwr.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -76,7 +76,7 @@ subdeviceCtrlCmdPerfRatedTdpSetControl_KERNEL return NV_ERR_INSUFFICIENT_PERMISSIONS; } - if ((!rmclientIsAdminByHandle(hClient, pCallContext->secInfo.privLevel)) && + if ((!(rmclientIsAdminByHandle(hClient, pCallContext->secInfo.privLevel) || osCheckAccess(RS_ACCESS_PERFMON))) && (gpuIsRmProfilingPrivileged(pGpu) && (pControlParams->vPstateType == NV2080_CTRL_PERF_VPSTATE_TURBO_BOOST))) { NV_PRINTF(LEVEL_ERROR, diff --git a/src/nvidia/src/kernel/gpu/rc/kernel_rc.c b/src/nvidia/src/kernel/gpu/rc/kernel_rc.c index 18c79492e9..6407cb0855 100644 --- a/src/nvidia/src/kernel/gpu/rc/kernel_rc.c +++ b/src/nvidia/src/kernel/gpu/rc/kernel_rc.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -32,7 +32,7 @@ #include "kernel/platform/chipset/chipset.h" #include "kernel/rmapi/client.h" - +#include "lib/base_utils.h" #include "libraries/utils/nvprintf.h" #include "nvrm_registry.h" #include "nverror.h" @@ -42,7 +42,6 @@ static void _krcInitRegistryOverrides(OBJGPU *pGpu, KernelRc *pKernelRc); static void _krcLogUuidOnce(OBJGPU *pGpu, KernelRc *pKernelRc); - NV_STATUS krcConstructEngine_IMPL ( @@ -539,3 +538,86 @@ krcGetChannelInError_FWCLIENT NV_ASSERT_OR_RETURN(IS_GSP_CLIENT(ENG_GET_GPU(pKernelRc)), NULL); return pKernelRc->pPreviousChannelInError; } + +#if !(defined(DEBUG) || defined(DEVELOP)) +// +// Skip dumping the NvLog for the next XIDs which gets triggered +// within 1 sec. +// This will prevent logs from getting flooded whenever there is any +// XID storm due to some bad state. +// +static void +_krcValidateAndDumpToKernelLog(NvU64 *lastXidTimestamp) +{ + NvU32 sec, usec; + + if (((osGetCurrentTime(&sec, &usec) == NV_OK) && + ((((sec * 1000000) + usec) - *lastXidTimestamp) > 1000000))) + { + nvlogDumpToKernelLog(NV_TRUE); + *lastXidTimestamp = ((NvU64)sec * 1000000) + usec; + } +} +#endif //!(DEBUG || DEVELOP) + +void krcDumpNvLog(OBJGPU *pGpu, + NvU32 exceptType) +{ +#if !(defined(DEBUG) || defined(DEVELOP)) + NvU32 data32 = 0; + static NvU64 lastXidTimestamp; + + if ((osReadRegistryDword(pGpu, NV_REG_STR_RM_DUMP_NVLOG, &data32) == NV_OK) && + (data32 == NV_REG_STR_RM_DUMP_NVLOG_ENABLE)) + { + NvU8 suppressXid[MAX_XID_SUPPRESS_KEY_LENGTH]; + NvU32 size = sizeof(suppressXid); + NvBool xidDumpSuppressed = NV_FALSE; + + if (osReadRegistryBinary(pGpu, NV_REG_SUPPRESS_XID_DUMP, + (NvU8 *)suppressXid, &size) == NV_OK) + { + NvU8 *pStr, *pEndStr; + NvU32 exceptionType = 0; + NvU32 numFound; + + suppressXid[MAX_XID_SUPPRESS_KEY_LENGTH - 1] = '\0'; + pStr = (NvU8 *)suppressXid; + + while (pStr != NULL) + { + exceptionType = nvStrToL(pStr, &pEndStr, BASE10, ',', &numFound); + if (exceptionType == exceptType) + { + xidDumpSuppressed = NV_TRUE; + break; + } + pStr = pEndStr; + } + + + if (!xidDumpSuppressed) + { + _krcValidateAndDumpToKernelLog(&lastXidTimestamp); + } + } + + // + // Dump logs after RC recovery for below Xids. Be careful while enabling + // this regkey since we are dumping buffers with GPU locks held (takes ~500 us). + // + else if (exceptType == ROBUST_CHANNEL_GR_EXCEPTION || // 13 + exceptType == ROBUST_CHANNEL_FIFO_ERROR_MMU_ERR_FLT || // 31 + exceptType == ROBUST_CHANNEL_PBDMA_ERROR || // 32 + exceptType == ROBUST_CHANNEL_RESETCHANNEL_VERIF_ERROR || // 43 + exceptType == PMU_BREAKPOINT || // 61 + exceptType == PMU_HALT_ERROR || // 62 + exceptType == ROBUST_CHANNEL_GPU_HAS_FALLEN_OFF_THE_BUS || // 79 + exceptType == GSP_RPC_TIMEOUT || // 119 + exceptType == GSP_ERROR) // 120 + { + _krcValidateAndDumpToKernelLog(&lastXidTimestamp); + } + } +#endif //!(DEBUG || DEVELOP) +} diff --git a/src/nvidia/src/kernel/gpu/rc/kernel_rc_callback.c b/src/nvidia/src/kernel/gpu/rc/kernel_rc_callback.c index dfb6600962..e8211ef2b1 100644 --- a/src/nvidia/src/kernel/gpu/rc/kernel_rc_callback.c +++ b/src/nvidia/src/kernel/gpu/rc/kernel_rc_callback.c @@ -78,13 +78,14 @@ _vgpuRcResetCallback sizeof params, status); + rmGpuLocksRelease(GPUS_LOCK_FLAGS_NONE, NULL); + threadStateFreeISRAndDeferredIntHandler( &threadState, pRcErrorContext->pGpu, THREAD_STATE_FLAGS_IS_DEFERRED_INT_HANDLER); portMemFree(pRcErrorContext); - rmGpuLocksRelease(GPUS_LOCK_FLAGS_NONE, NULL); } else { @@ -182,13 +183,14 @@ krcResetCallback sizeof params); } + rmGpuLocksRelease(GPUS_LOCK_FLAGS_NONE, NULL); + threadStateFreeISRAndDeferredIntHandler( &threadState, pRcErrorContext->pGpu, THREAD_STATE_FLAGS_IS_DEFERRED_INT_HANDLER); portMemFree(pRcErrorContext); - rmGpuLocksRelease(GPUS_LOCK_FLAGS_NONE, NULL); } else { diff --git a/src/nvidia/src/kernel/gpu/rc/kernel_rc_misc.c b/src/nvidia/src/kernel/gpu/rc/kernel_rc_misc.c index 8a0fefcb3c..48ed6d99e0 100644 --- a/src/nvidia/src/kernel/gpu/rc/kernel_rc_misc.c +++ b/src/nvidia/src/kernel/gpu/rc/kernel_rc_misc.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -64,51 +64,33 @@ NV_STATUS krcReadVirtMem_IMPL cursize = RM_PAGE_SIZE - pageStartOffset; virtAddr &= ~RM_PAGE_MASK; + pMem = portMemAllocNonPaged(RM_PAGE_SIZE); + if (pMem == NULL) + { + return NV_ERR_INSUFFICIENT_RESOURCES; + } + + surf.pMemDesc = &memDesc; + surf.offset = 0; + for (cur4kPage = start4kPage; cur4kPage <= end4kPage; ++cur4kPage) { - status = dmaXlateVAtoPAforChannel_HAL(pGpu, pDma, - pKernelChannel, virtAddr, &physaddr, &memtype); - if (status != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, - "NV2080_CTRL_CMD_RC_READ_VIRTUAL_MEM: va translation failed\n"); - return status; - } - if (memtype == ADDR_SYSMEM) - { - // XXX Fix me! NV_MEMORY_UNCACHED may not be the correct memory type. - pMem = (NvU8*) osMapKernelSpace(physaddr, RM_PAGE_SIZE, - NV_MEMORY_UNCACHED, - NV_PROTECT_READ_WRITE); - if (pMem == NULL) - { - return NV_ERR_INSUFFICIENT_RESOURCES; - } - } - else if (memtype == ADDR_FBMEM) - { - memdescCreateExisting(&memDesc, - pGpu, - RM_PAGE_SIZE, - ADDR_FBMEM, - NV_MEMORY_UNCACHED, - MEMDESC_FLAGS_NONE); - memdescDescribe(&memDesc, ADDR_FBMEM, physaddr, RM_PAGE_SIZE); - - surf.pMemDesc = &memDesc; - surf.offset = 0; - - pMem = portMemAllocNonPaged(RM_PAGE_SIZE); - if (pMem == NULL) - { - return NV_ERR_INSUFFICIENT_RESOURCES; - } - - NV_ASSERT_OK_OR_ELSE(status, - memmgrMemRead(pMemoryManager, &surf, pMem, RM_PAGE_SIZE, - TRANSFER_FLAGS_NONE), - portMemFree(pMem); return status; ); - } + NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, + dmaXlateVAtoPAforChannel_HAL(pGpu, pDma, pKernelChannel, virtAddr, &physaddr, &memtype), + cleanup); + + memdescCreateExisting(&memDesc, + pGpu, + RM_PAGE_SIZE, + memtype, + NV_MEMORY_UNCACHED, + MEMDESC_FLAGS_NONE); + memdescDescribe(&memDesc, memtype, physaddr, RM_PAGE_SIZE); + + NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, + memmgrMemRead(pMemoryManager, &surf, pMem, RM_PAGE_SIZE, TRANSFER_FLAGS_NONE), + cleanup); + if (cursize > bufSize) { cursize = bufSize; @@ -119,16 +101,8 @@ NV_STATUS krcReadVirtMem_IMPL pMem + pageStartOffset, cursize); - if (memtype == ADDR_SYSMEM) - { - osUnmapKernelSpace(pMem, RM_PAGE_SIZE); - } - else if (memtype == ADDR_FBMEM) - { - portMemFree(pMem); - memdescDestroy(&memDesc); - } - pMem = NULL; + memdescDestroy(&memDesc); + pageStartOffset = 0; bufPtr = NvP64_PLUS_OFFSET(bufPtr,cursize); bufSize -= cursize; @@ -136,5 +110,8 @@ NV_STATUS krcReadVirtMem_IMPL virtAddr += RM_PAGE_SIZE; } +cleanup: + portMemFree(pMem); + return NV_OK; } diff --git a/src/nvidia/src/kernel/gpu/rc/kernel_rc_notification.c b/src/nvidia/src/kernel/gpu/rc/kernel_rc_notification.c index 82a96aa1aa..d1435c8432 100644 --- a/src/nvidia/src/kernel/gpu/rc/kernel_rc_notification.c +++ b/src/nvidia/src/kernel/gpu/rc/kernel_rc_notification.c @@ -241,6 +241,7 @@ NV_STATUS krcErrorSetNotifier_IMPL ) { KernelFifo *pKernelFifo = GPU_GET_KERNEL_FIFO(pGpu); + OBJSYS *pSys = SYS_GET_INSTANCE(); NvU32 status = NV_OK; NvU32 flushFlags = 0; NvBool bNewListCreated = NV_FALSE; @@ -250,6 +251,15 @@ NV_STATUS krcErrorSetNotifier_IMPL NV_ASSERT_OR_RETURN(!gpumgrGetBcEnabledStatus(pGpu), NV_ERR_INVALID_STATE); NV_ASSERT_OR_RETURN(pKernelChannel != NULL, NV_ERR_INVALID_CHANNEL); + // + // WAR bug 4503046: mark reboot required when any UVM channels receive an + // error. + // + if (pKernelChannel->bUvmOwned) + { + sysSetRecoveryRebootRequired(pSys, NV_TRUE); + } + // // WAR bug 200326278, 200474671 // @@ -439,12 +449,14 @@ krcErrorSendEventNotifications_KERNEL ) { NV_ASSERT_OR_RETURN(!gpumgrGetBcEnabledStatus(pGpu), NV_ERR_INVALID_STATE); - NV_ASSERT_OR_RETURN(pKernelChannel != NULL, NV_ERR_INVALID_CHANNEL); - NV_ASSERT_OK_OR_RETURN( - krcErrorSendEventNotificationsCtxDma_HAL(pGpu, pKernelRc, - pKernelChannel, - scope)); + if (pKernelChannel != NULL) + { + NV_ASSERT_OK_OR_RETURN( + krcErrorSendEventNotificationsCtxDma_HAL(pGpu, pKernelRc, + pKernelChannel, + scope)); + } gpuNotifySubDeviceEvent(pGpu, NV2080_NOTIFIERS_RC_ERROR, diff --git a/src/nvidia/src/kernel/gpu/spdm/arch/hopper/spdm_gh100.c b/src/nvidia/src/kernel/gpu/spdm/arch/hopper/spdm_gh100.c index 592356cc81..fb30f34ded 100644 --- a/src/nvidia/src/kernel/gpu/spdm/arch/hopper/spdm_gh100.c +++ b/src/nvidia/src/kernel/gpu/spdm/arch/hopper/spdm_gh100.c @@ -315,8 +315,8 @@ _spdmEncodeMessageGsp return LIBSPDM_STATUS_INVALID_PARAMETER; } - // Only support sending requester SPDM/Secured messages. - if (!is_requester || is_app_message) + // Only support sending requester messages. Application messages must only be sent in session. + if (!is_requester || (is_app_message && session_id == NULL)) { return LIBSPDM_STATUS_INVALID_PARAMETER; } @@ -350,7 +350,8 @@ _spdmEncodeMessageGsp // Determine whether message is secured. if (session_id != NULL) { - pNvSpdmDescHdr->msgType = NV_SPDM_MESSAGE_TYPE_SECURED; + pNvSpdmDescHdr->msgType = is_app_message ? NV_SPDM_MESSAGE_TYPE_APPLICATION : + NV_SPDM_MESSAGE_TYPE_SECURED; pSecuredMessageContext = libspdm_get_secured_message_context_via_session_id(spdm_context, *session_id); @@ -501,8 +502,11 @@ _spdmDecodeMessageGsp // Decode message, based on type. switch (pNvSpdmDescHdr->msgType) { + case NV_SPDM_MESSAGE_TYPE_APPLICATION: case NV_SPDM_MESSAGE_TYPE_SECURED: { + *is_app_message = (pNvSpdmDescHdr->msgType == NV_SPDM_MESSAGE_TYPE_APPLICATION); + // // Double-check the payload fits a secured message header. // Our implementation of a secure message header only includes @@ -548,8 +552,9 @@ _spdmDecodeMessageGsp case NV_SPDM_MESSAGE_TYPE_NORMAL: { - // Indicate the message is unsecured. - *session_id = NULL; + // Indicate the message is an unsecured SPDM message. + *session_id = NULL; + *is_app_message = NV_FALSE; // // We both check that the buffer is large enough, and that the @@ -573,9 +578,6 @@ _spdmDecodeMessageGsp } } - // We don't expect app message for any scenario. - *is_app_message = NV_FALSE; - return LIBSPDM_STATUS_SUCCESS; } diff --git a/src/nvidia/src/kernel/gpu/spdm/arch/hopper/spdm_module.c b/src/nvidia/src/kernel/gpu/spdm/arch/hopper/spdm_module.c index fcff91b9cd..6c855dc41f 100644 --- a/src/nvidia/src/kernel/gpu/spdm/arch/hopper/spdm_module.c +++ b/src/nvidia/src/kernel/gpu/spdm/arch/hopper/spdm_module.c @@ -55,7 +55,7 @@ NV_STATUS spdmCtrlSpdmPartition { NV_STATUS status = NV_OK; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (IS_VIRTUAL(pGpu)) { diff --git a/src/nvidia/src/kernel/gpu/spdm/spdm.c b/src/nvidia/src/kernel/gpu/spdm/spdm.c index 16bca02e16..3233529a53 100644 --- a/src/nvidia/src/kernel/gpu/spdm/spdm.c +++ b/src/nvidia/src/kernel/gpu/spdm/spdm.c @@ -39,6 +39,10 @@ #include "rmapi/client_resource.h" #include "gpu/bus/kern_bus.h" #include "os/os.h" +#include "ctrl/ctrl2080/ctrl2080spdm.h" +#include "gpu/subdevice/subdevice.h" +#include "core/locks.h" +#include "rmapi/rs_utils.h" // // Libspdm only supported on certain builds, @@ -46,6 +50,8 @@ // #include "gpu/spdm/libspdm_includes.h" +// Once SPDM is moved out from CC object, remove this dependency. +#include "gpu/conf_compute/conf_compute.h" /* ------------------------ Static Function Prototypes --------------------- */ static void _spdmClearContext(Spdm *pSpdm); @@ -99,17 +105,20 @@ _spdmClearContext portMemFree(pSpdm->pAttestationCertChain); portMemFree(pSpdm->pDeviceIOContext); portMemFree(pSpdm->pMsgLog); + portMemFree(pSpdm->pTranscriptLog); pSpdm->pLibspdmContext = NULL; pSpdm->pLibspdmScratch = NULL; pSpdm->pAttestationCertChain = NULL; pSpdm->pDeviceIOContext = NULL; pSpdm->pMsgLog = NULL; + pSpdm->pTranscriptLog = NULL; pSpdm->libspdmContextSize = 0; pSpdm->libspdmScratchSize = 0; pSpdm->attestationCertChainSize = 0; pSpdm->msgLogMaxSize = 0; + pSpdm->transcriptLogSize = 0; pSpdm->sessionId = INVALID_SESSION_ID; pSpdm->bSessionEstablished = NV_FALSE; @@ -185,11 +194,13 @@ spdmConstruct_IMPL pSpdm->pAttestationCertChain = NULL; pSpdm->pDeviceIOContext = NULL; pSpdm->pMsgLog = NULL; + pSpdm->pTranscriptLog = NULL; pSpdm->libspdmContextSize = 0; pSpdm->libspdmScratchSize = 0; pSpdm->attestationCertChainSize = 0; pSpdm->msgLogMaxSize = 0; + pSpdm->transcriptLogSize = 0; pSpdm->sessionId = INVALID_SESSION_ID; pSpdm->bSessionEstablished = NV_FALSE; @@ -438,7 +449,7 @@ spdmContextInit_IMPL ¶meter, &maxRetries, sizeof(maxRetries))); libspdm_init_msg_log(pSpdm->pLibspdmContext, pSpdm->pMsgLog, pSpdm->msgLogMaxSize); - + libspdm_set_msg_log_mode(pSpdm->pLibspdmContext, LIBSPDM_MSG_LOG_MODE_ENABLE); // Store SPDM object pointer to libspdm context CHECK_SPDM_STATUS(libspdm_set_data(pSpdm->pLibspdmContext, LIBSPDM_DATA_APP_CONTEXT_DATA, @@ -638,6 +649,30 @@ spdmStart_IMPL pSpdm->bUsePolling = NV_FALSE; } + // Now that the session has been properly established, cache a log of the entire transcript. + pSpdm->transcriptLogSize = libspdm_get_msg_log_size(pSpdm->pLibspdmContext); + if (pSpdm->transcriptLogSize > pSpdm->msgLogMaxSize || + (size_t)pSpdm->transcriptLogSize < libspdm_get_msg_log_size(pSpdm->pLibspdmContext)) + { + // Something has gone quite wrong + pSpdm->transcriptLogSize = 0; + status = NV_ERR_INVALID_STATE; + goto ErrorExit; + } + + pSpdm->pTranscriptLog = (NvU8 *)portMemAllocNonPaged(pSpdm->transcriptLogSize); + if (pSpdm->pTranscriptLog == NULL) + { + pSpdm->transcriptLogSize = 0; + status = NV_ERR_NO_MEMORY; + goto ErrorExit; + } + + portMemCopy(pSpdm->pTranscriptLog, pSpdm->transcriptLogSize, pSpdm->pMsgLog, pSpdm->transcriptLogSize); + + // Clear the existing log, as it's no longer needed. + libspdm_reset_msg_log(pSpdm->pLibspdmContext); + ErrorExit: // @@ -702,3 +737,95 @@ spdmRetrieveExportSecret_IMPL return NV_OK; } + +/*! + * Forwards an application message to GPU via the encrypted SPDM messaging channel. + * Application message must be a RM_SPDM_NV_CMD_TYPE message in proper RM_SPDM_NV_CMD format, + * else Responder will reject the message. + * + * @param[in] pGpu GPU object pointer. + * @param[in] pSpdm SPDM object pointer. + * @param[in] pRequest Pointer to a buffer which stores application request message. + * @param[in] requestSize The request buffer size. + * @param[out] pResponse Pointer to a buffer which stores response message. + * @param[in, out] pResponseSize Pointer which holds size of response buffer on input, and + * stores size of received response on output. + * + * @return NV_OK if success, Error otherwise. + */ +NV_STATUS +spdmSendApplicationMessage_IMPL +( + OBJGPU *pGpu, + Spdm *pSpdm, + NvU8 *pRequest, + NvU32 requestSize, + NvU8 *pResponse, + NvU32 *pResponseSize +) +{ + NV_STATUS status = NV_OK; + size_t responseSizeT = 0; + + if (pRequest == NULL || pResponse == NULL || pResponseSize == NULL || + requestSize < sizeof(RM_SPDM_NV_CMD_HDR) || *pResponseSize < sizeof(RM_SPDM_NV_CMD_HDR)) + { + return NV_ERR_INVALID_PARAMETER; + } + + // Use a temporary size_t passed to libspdm to avoid size mismatch issues + responseSizeT = *pResponseSize; + CHECK_SPDM_STATUS(libspdm_send_receive_data(pSpdm->pLibspdmContext, &(pSpdm->sessionId), NV_TRUE, + pRequest, requestSize, pResponse, &responseSizeT)); + + // Check for truncation on conversion back to NvU32 + *pResponseSize = responseSizeT; + if (*pResponseSize < responseSizeT) + { + return NV_ERR_OUT_OF_RANGE; + } + +ErrorExit: + return status; +} + +/*! + * @brief Control call function to retrieve the SPDM session establishment transcript. + * + * @return NV_OK if success, Error otherwise. + */ +NV_STATUS +subdeviceSpdmRetrieveTranscript_IMPL +( + Subdevice *pSubdevice, + NV2080_CTRL_INTERNAL_SPDM_RETRIEVE_TRANSCRIPT_PARAMS *pSpdmRetrieveSessionTranscriptParams +) +{ + OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); + ConfidentialCompute *pConfCompute = GPU_GET_CONF_COMPUTE(pGpu); + + if (pConfCompute == NULL || pConfCompute->pSpdm == NULL) + { + return NV_ERR_INVALID_STATE; + } + + Spdm *pSpdm = pConfCompute->pSpdm; + + if (pSpdm->pTranscriptLog == NULL || pSpdm->transcriptLogSize == 0) + { + return NV_ERR_INVALID_STATE; + } + + if (sizeof(pSpdmRetrieveSessionTranscriptParams->transcript) < pSpdm->transcriptLogSize) + { + return NV_ERR_BUFFER_TOO_SMALL; + } + + portMemCopy(pSpdmRetrieveSessionTranscriptParams->transcript, + sizeof(pSpdmRetrieveSessionTranscriptParams->transcript), + pSpdm->pTranscriptLog, pSpdm->transcriptLogSize); + + pSpdmRetrieveSessionTranscriptParams->transcriptSize = pSpdm->transcriptLogSize; + + return NV_OK; +} diff --git a/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_event_kernel.c b/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_event_kernel.c index d71c2e1464..c7ddb98676 100644 --- a/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_event_kernel.c +++ b/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_event_kernel.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2004-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2004-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -241,7 +241,6 @@ subdeviceCtrlCmdEventSetSemaphoreMemory_IMPL pMemory->vgpuNsIntr.guestMSIAddr = 0; pMemory->vgpuNsIntr.guestMSIData = 0; pMemory->vgpuNsIntr.guestDomainId = 0; - pMemory->vgpuNsIntr.pVgpuVfioRef = NULL; pMemory->vgpuNsIntr.isSemaMemValidationEnabled = NV_TRUE; return NV_OK; @@ -292,7 +291,8 @@ subdeviceCtrlCmdEventVideoBindEvtbuf_IMPL NvHandle hClient = RES_GET_CLIENT_HANDLE(pSubdevice); NvHandle hNotifier = RES_GET_HANDLE(pSubdevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); NV_ASSERT_OK_OR_RETURN(serverutilGetResourceRefWithType(hClient, pParams->hEventBuffer, @@ -325,7 +325,7 @@ subdeviceCtrlCmdEventGspTraceRatsBindEvtbuf_IMPL NvHandle hClient = RES_GET_CLIENT_HANDLE(pSubdevice); NvHandle hNotifier = RES_GET_HANDLE(pSubdevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_ASSERT_OK_OR_RETURN(serverutilGetResourceRefWithType(hClient, pParams->hEventBuffer, diff --git a/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_fla.c b/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_fla.c index fef50a4cbc..f661885416 100644 --- a/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_fla.c +++ b/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_fla.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -182,7 +182,7 @@ subdeviceCtrlCmdFlaRange_IMPL NV_ASSERT_OR_RETURN(pCallContext != NULL, NV_ERR_INVALID_STATE); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (!rmclientIsCapableOrAdminByHandle(hClient, NV_RM_CAP_EXT_FABRIC_MGMT, @@ -254,7 +254,7 @@ subdeviceCtrlCmdFlaGetRange_IMPL KernelBus *pKernelBus = GPU_GET_KERNEL_BUS(pGpu); NvBool bIsConntectedToNvswitch; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); { KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); @@ -278,7 +278,7 @@ subdeviceCtrlCmdFlaGetFabricMemStats_IMPL FABRIC_VASPACE *pFabricVAS = NULL; NV_STATUS status = NV_OK; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (pGpu->pFabricVAS == NULL) { diff --git a/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_kernel.c b/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_kernel.c index 91c1e6a074..89a72fd92e 100644 --- a/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_kernel.c +++ b/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_kernel.c @@ -57,7 +57,7 @@ #include "gpu/mem_sys/kern_mem_sys.h" #include "gpu/nvenc/nvencsession.h" #include "kernel/gpu/fifo/kernel_fifo.h" -#include "gpu/ce/kernel_ce_shared.h" +#include "gpu/ce/kernel_ce.h" #include "rmapi/resource_fwd_decls.h" #include "rmapi/client.h" @@ -183,9 +183,7 @@ getGpuInfos(Subdevice *pSubdevice, NV2080_CTRL_GPU_GET_INFO_V2_PARAMS *pParams, } case NV2080_CTRL_GPU_INFO_INDEX_SURPRISE_REMOVAL_POSSIBLE: { - OBJSYS *pSys = SYS_GET_INSTANCE(); - OBJCL *pCl = SYS_GET_CL(pSys); - data = !!pCl->getProperty(pCl, PDB_PROP_CL_IS_EXTERNAL_GPU); + data = !!pGpu->getProperty(pGpu, PDB_PROP_GPU_IS_EXTERNAL_GPU); break; } case NV2080_CTRL_GPU_INFO_INDEX_IBMNPU_RELAXED_ORDERING: @@ -857,7 +855,7 @@ subdeviceCtrlCmdGpuGetEncoderCapacity_IMPL NvHandle hClient = RES_GET_CLIENT_HANDLE(pSubdevice); NvHandle hObject = RES_GET_HANDLE(pSubdevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (pEncoderCapacityParams->queryType == NV2080_CTRL_GPU_GET_ENCODER_CAPACITY_AV1) { @@ -909,7 +907,7 @@ subdeviceCtrlCmdGpuGetNvencSwSessionStats_IMPL NvencSession *pNvencSession = NULL; PNVENC_SESSION_LIST_ITEM pNvencSessionListItem = NULL; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // // For GSP vGPU host, get the data from GSP RM for CPU RM and it's client @@ -1035,7 +1033,7 @@ subdeviceCtrlCmdGpuGetNvencSwSessionInfo_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); NvU32 entryCount = 0; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if ((!IS_VIRTUAL(pGpu)) && (pGpu->encSessionStatsReportingState != NV2080_CTRL_GPU_INFO_NVENC_STATS_REPORTING_STATE_ENABLED)) { @@ -1070,7 +1068,7 @@ subdeviceCtrlCmdGpuGetNvencSwSessionInfoV2_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); NvU32 entryCount = 0; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if ((!IS_VIRTUAL(pGpu)) && (pGpu->encSessionStatsReportingState != NV2080_CTRL_GPU_INFO_NVENC_STATS_REPORTING_STATE_ENABLED)) { @@ -1112,7 +1110,7 @@ subdeviceCtrlCmdGpuGetNvfbcSwSessionStats_IMPL NvfbcSession *pNvfbcSession = NULL; PNVFBC_SESSION_LIST_ITEM pNvfbcSessionListItem = NULL; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (listCount(&(pGpu->nvfbcSessionList)) == 0) { @@ -1167,7 +1165,7 @@ subdeviceCtrlCmdGpuGetNvfbcSwSessionInfo_IMPL NvfbcSession *pNvfbcSession = NULL; PNVFBC_SESSION_LIST_ITEM pNvfbcSessionListItem = NULL; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); portMemSet(pParams, 0, sizeof(NV2080_CTRL_GPU_GET_NVFBC_SW_SESSION_INFO_PARAMS)); @@ -1241,57 +1239,13 @@ subdeviceCtrlCmdGpuGetSdm_IMPL { OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); pSdmParams->subdeviceMask = gpuGetSubdeviceMask(pGpu); return NV_OK; } -// -// subdeviceCtrlCmdGpuSetSdm -// -// Lock Requirements: -// Assert that API lock held on entry -// -NV_STATUS -subdeviceCtrlCmdGpuSetSdm_IMPL -( - Subdevice* pSubdevice, - NV2080_CTRL_GPU_SET_SDM_PARAMS* pSdmParams -) -{ - NV_STATUS status = NV_OK; - OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); - NvU32 subdeviceInstance; - - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); - - if (!ONEBITSET(pSdmParams->subdeviceMask)) - { - NV_PRINTF(LEVEL_ERROR, "Subdevice mask has none or more than one bit set"); - return NV_ERR_INVALID_DATA; - } - - if (gpuIsStateLoaded(pGpu)) - { - NV_PRINTF(LEVEL_ERROR, "NV2080_CTRL_CMD_GPU_SET_SDM cannot be called after the GPU is loaded"); - return NV_ERR_INVALID_STATE; - } - - subdeviceInstance = BIT_IDX_32(pSdmParams->subdeviceMask); - - if (subdeviceInstance >= NV_MAX_SUBDEVICES) - { - NV_PRINTF(LEVEL_ERROR, "Subdevice mask exceeds the max count of subdevices"); - return NV_ERR_INVALID_DATA; - } - - pGpu->subdeviceInstance = subdeviceInstance; - - return status; -} - // // subdeviceCtrlCmdGpuGetSimulationInfo // @@ -1307,7 +1261,7 @@ subdeviceCtrlCmdGpuGetSimulationInfo_IMPL { OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (IS_SILICON(pGpu)) { @@ -1338,7 +1292,7 @@ subdeviceCtrlCmdGpuGetEngines_IMPL NvU32 *pKernelEngineList = NvP64_VALUE(pParams->engineList); NV_STATUS status = NV_OK; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); portMemSet(&getEngineParamsV2, 0, sizeof(getEngineParamsV2)); @@ -1376,7 +1330,7 @@ subdeviceCtrlCmdGpuGetEnginesV2_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); NV_STATUS status = NV_OK; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // Update the engine Database NV_ASSERT_OK_OR_RETURN(gpuUpdateEngineTable(pGpu)); @@ -1423,38 +1377,35 @@ subdeviceCtrlCmdGpuGetEnginesV2_IMPL } } -// removal tracking bug: 3748354 NvBool bOwnsLock = NV_FALSE; + NvU32 i; if (!rmDeviceGpuLockIsOwner(pGpu->gpuInstance)) { status = rmDeviceGpuLocksAcquire(pGpu, GPU_LOCK_FLAGS_SAFE_LOCK_UPGRADE, RM_LOCK_MODULES_NONE); NV_ASSERT_OK_OR_RETURN(status); bOwnsLock = NV_TRUE; - NvU32 i; - - for (i = 0; i < pEngineParams->engineCount; i++) - { - NvU32 nv2080EngineId; - nv2080EngineId = pEngineParams->engineList[i]; + } - if (NV2080_ENGINE_TYPE_IS_COPY(nv2080EngineId)) + for (i = 0; i < pEngineParams->engineCount; i++) + { + NvU32 nv2080EngineId; + nv2080EngineId = pEngineParams->engineList[i]; + + if (NV2080_ENGINE_TYPE_IS_COPY(nv2080EngineId)) + { + // Check if this is a decomp LCE + NvU32 ceInstanceId = NV2080_ENGINE_TYPE_COPY_IDX(nv2080EngineId); + if (kceIsDecompLce(pGpu, ceInstanceId)) { - // Check if this is a decomp LCE - if (ceIsDecompLce(pGpu, nv2080EngineId)) - { - NvU32 ceInstanceId; - ceInstanceId = NV2080_ENGINE_TYPE_COPY_IDX(nv2080EngineId); - pEngineParams->engineList[i] = NV2080_ENGINE_TYPE_COMP_DECOMP_COPY(ceInstanceId); - } + pEngineParams->engineList[i] = NV2080_ENGINE_TYPE_COMP_DECOMP_COPY(ceInstanceId); } } - - - if (bOwnsLock == NV_TRUE) - rmDeviceGpuLocksRelease(pGpu, GPU_LOCK_FLAGS_SAFE_LOCK_UPGRADE, NULL); } + if (bOwnsLock == NV_TRUE) + rmDeviceGpuLocksRelease(pGpu, GPU_LOCK_FLAGS_SAFE_LOCK_UPGRADE, NULL); + return status; } @@ -1476,7 +1427,7 @@ subdeviceCtrlCmdGpuGetEngineClasslist_IMPL NV_STATUS status = NV_OK; RM_ENGINE_TYPE rmEngineType = gpuGetRmEngineType(pClassParams->engineType); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); { if (IS_MIG_IN_USE(pGpu)) @@ -1537,7 +1488,7 @@ subdeviceCtrlCmdGpuGetEnginePartnerList_IMPL NvU32 nv2080EngineType; RM_ENGINE_TYPE rmEngineType; NvU32 i; - PCLASSDESCRIPTOR pClass; + CLASSDESCRIPTOR *pClass; NV_STATUS status = NV_OK; pPartnerListParams->numPartners = 0; @@ -1668,7 +1619,7 @@ subdeviceCtrlCmdGpuGetEngineFaultInfo_IMPL NV_STATUS status = NV_OK; RM_ENGINE_TYPE rmEngineType = gpuGetRmEngineType(pParams->engineType); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // // When MIG is enabled, clients pass in their instance-specific engineId @@ -1729,7 +1680,8 @@ subdeviceCtrlCmdGpuGetFermiGpcInfo_IMPL NvHandle hClient = RES_GET_CLIENT_HANDLE(pSubdevice); NvHandle hSubdevice = RES_GET_HANDLE(pSubdevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(GPU_RES_GET_GPU(pSubdevice)->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(GPU_RES_GET_GPU(pSubdevice)->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); portMemSet(&gpcMaskParams, 0, sizeof(gpcMaskParams)); @@ -1764,7 +1716,8 @@ subdeviceCtrlCmdGpuGetFermiTpcInfo_IMPL NvHandle hClient = RES_GET_CLIENT_HANDLE(pSubdevice); NvHandle hSubdevice = RES_GET_HANDLE(pSubdevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(GPU_RES_GET_GPU(pSubdevice)->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(GPU_RES_GET_GPU(pSubdevice)->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); portMemSet(&tpcMaskParams, 0, sizeof(tpcMaskParams)); tpcMaskParams.gpcId = pParams->gpcId; @@ -1802,7 +1755,8 @@ subdeviceCtrlCmdGpuGetFermiZcullInfo_IMPL NvHandle hClient = RES_GET_CLIENT_HANDLE(pSubdevice); NvHandle hSubdevice = RES_GET_HANDLE(pSubdevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(GPU_RES_GET_GPU(pSubdevice)->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(GPU_RES_GET_GPU(pSubdevice)->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); portMemSet(&zcullMaskParams, 0, sizeof(zcullMaskParams)); zcullMaskParams.gpcId = pParams->gpcId; @@ -1847,7 +1801,7 @@ subdeviceCtrlCmdGpuGetPesInfo_IMPL // This ctrl call is due for deprecation and should not be used. // - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_ASSERT_OK_OR_RETURN( serverGetClientUnderLock(&g_resServ, hClient, &pRsClient)); @@ -1890,7 +1844,7 @@ subdeviceCtrlCmdGpuQueryMode_IMPL { OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); switch (gpuGetMode(pGpu)) { @@ -1944,7 +1898,7 @@ subdeviceCtrlCmdGpuSetComputeModeRules_IMPL { OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (IS_GSP_CLIENT(pGpu)) { @@ -2027,7 +1981,7 @@ subdeviceCtrlCmdGpuQueryComputeModeRules_IMPL { OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // // vGPU specific check to assign compute mode as 'Prohibited' @@ -2056,7 +2010,7 @@ subdeviceCtrlCmdGpuAcquireComputeModeReservation_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); NvHandle hClient = RES_GET_CLIENT_HANDLE(pSubdevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); //TODO Bug 2718406 will extend compute mode support for MIG if (IS_MIG_ENABLED(pGpu)) @@ -2119,7 +2073,7 @@ subdeviceCtrlCmdGpuReleaseComputeModeReservation_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); NvHandle hClient = RES_GET_CLIENT_HANDLE(pSubdevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); //TODO Bug 2718406 will extend compute mode support for MIG if (IS_MIG_ENABLED(pGpu)) @@ -2156,7 +2110,7 @@ subdeviceCtrlCmdGpuGetId_IMPL { OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); pIdParams->gpuId = pGpu->gpuId; @@ -2183,7 +2137,7 @@ subdeviceCtrlCmdGpuGetPids_IMPL NV_ASSERT_OR_RETURN(RMCFG_FEATURE_KERNEL_RM, NV_ERR_NOT_SUPPORTED); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); switch (pGetPidsParams->idType) { @@ -2219,11 +2173,13 @@ subdeviceCtrlCmdGpuGetPids_IMPL // info // KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); - NvHandle hClient = RES_GET_CLIENT_HANDLE(pSubdevice); + RmClient *pRmClient = dynamicCast(RES_GET_CLIENT(pSubdevice), RmClient); + NV_ASSERT_OR_RETURN(pRmClient != NULL, NV_ERR_INVALID_CLIENT); + MIG_INSTANCE_REF partitionRef = kmigmgrMakeNoMIGReference(); pRef = &partitionRef; if (IS_MIG_IN_USE(pGpu) && - !rmclientIsCapableByHandle(hClient, NV_RM_CAP_SYS_SMC_MONITOR)) + !rmclientIsCapable(pRmClient, NV_RM_CAP_SYS_SMC_MONITOR)) { Device *pDevice = GPU_RES_GET_DEVICE(pSubdevice); // @@ -2271,7 +2227,7 @@ subdeviceCtrlCmdGpuGetPidInfo_IMPL NV_ASSERT_OR_RETURN(RMCFG_FEATURE_KERNEL_RM, NV_ERR_NOT_SUPPORTED); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if ((pGetPidInfoParams->pidInfoListCount <= 0) || (pGetPidInfoParams->pidInfoListCount > @@ -2286,11 +2242,13 @@ subdeviceCtrlCmdGpuGetPidInfo_IMPL // info // KernelMIGManager *pKernelMIGManager = GPU_GET_KERNEL_MIG_MANAGER(pGpu); - NvHandle hClient = RES_GET_CLIENT_HANDLE(pSubdevice); + RmClient *pRmClient = dynamicCast(RES_GET_CLIENT(pSubdevice), RmClient); + NV_ASSERT_OR_RETURN(pRmClient != NULL, NV_ERR_INVALID_CLIENT); + MIG_INSTANCE_REF ref = kmigmgrMakeNoMIGReference(); pRef = &ref; if (IS_MIG_IN_USE(pGpu) && - !rmclientIsCapableByHandle(hClient, NV_RM_CAP_SYS_SMC_MONITOR)) + !rmclientIsCapable(pRmClient, NV_RM_CAP_SYS_SMC_MONITOR)) { Device *pDevice = GPU_RES_GET_DEVICE(pSubdevice); // @@ -2353,7 +2311,7 @@ subdeviceCtrlCmdGpuGetEngineRunlistPriBase_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); KernelFifo *pKernelFifo = GPU_GET_KERNEL_FIFO(pGpu); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (!kfifoIsHostEngineExpansionSupported(pKernelFifo)) { @@ -2424,7 +2382,7 @@ subdeviceCtrlCmdGpuGetHwEngineId_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); KernelFifo *pKernelFifo = GPU_GET_KERNEL_FIFO(pGpu); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (!kfifoIsHostEngineExpansionSupported(pKernelFifo)) { @@ -2492,7 +2450,8 @@ subdeviceCtrlCmdGpuGetMaxSupportedPageSize_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); NV_STATUS status = NV_OK; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); // Default to minimal page size (4k) pParams->maxSupportedPageSize = RM_PAGE_SIZE; @@ -2779,7 +2738,8 @@ NV_STATUS subdeviceCtrlCmdValidateMemMapRequest_IMPL NvU32 bar0MapSize; NvU64 bar0MapOffset; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(GPU_RES_GET_GPU(pSubdevice)->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(GPU_RES_GET_GPU(pSubdevice)->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); pParams->protection = NV_PROTECT_READ_WRITE; @@ -2874,7 +2834,7 @@ subdeviceCtrlCmdGpuGetGfid_IMPL OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); NvU32 pciFunction, gfid; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (!gpuIsSriovEnabled(pGpu)) return NV_ERR_NOT_SUPPORTED; @@ -2941,7 +2901,7 @@ gpuUpdateGfidP2pCapability NvBool bSetP2PAccess = NV_FALSE; NvU32 idx; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (!gpuIsSriovEnabled(pGpu)) return NV_ERR_NOT_SUPPORTED; @@ -3046,9 +3006,9 @@ subdeviceCtrlCmdGpuGetEngineLoadTimes_IMPL NV2080_CTRL_GPU_GET_ENGINE_LOAD_TIMES_PARAMS *pParams ) { - OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); - PENGDESCRIPTOR engDescriptorList = gpuGetInitEngineDescriptors(pGpu); - NvU32 numEngDescriptors = gpuGetNumEngDescriptors(pGpu); + OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); + ENGDESCRIPTOR *pEngDescriptorList = gpuGetInitEngineDescriptors(pGpu); + NvU32 numEngDescriptors = gpuGetNumEngDescriptors(pGpu); NvU32 curEngDescIdx; NV_ASSERT_OR_RETURN(numEngDescriptors < NV2080_CTRL_GPU_MAX_ENGINE_OBJECTS, NV_ERR_BUFFER_TOO_SMALL); @@ -3056,8 +3016,8 @@ subdeviceCtrlCmdGpuGetEngineLoadTimes_IMPL pParams->engineCount = numEngDescriptors; for (curEngDescIdx = 0; curEngDescIdx < numEngDescriptors; curEngDescIdx++) { - ENGDESCRIPTOR curEngDescriptor = engDescriptorList[curEngDescIdx]; - OBJENGSTATE *pEngstate = gpuGetEngstate(pGpu, curEngDescriptor); + ENGDESCRIPTOR curEngDescriptor = pEngDescriptorList[curEngDescIdx]; + OBJENGSTATE *pEngstate = gpuGetEngstate(pGpu, curEngDescriptor); if (pEngstate == NULL) { @@ -3093,7 +3053,7 @@ subdeviceCtrlCmdGpuSetFabricAddr_IMPL NV_ASSERT_OR_RETURN(RMCFG_FEATURE_KERNEL_RM, NV_ERR_NOT_SUPPORTED); NV_ASSERT_OR_RETURN(pCallContext != NULL, NV_ERR_INVALID_STATE); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (!rmclientIsCapableOrAdminByHandle(hClient, NV_RM_CAP_EXT_FABRIC_MGMT, @@ -3164,8 +3124,9 @@ subdeviceCtrlCmdGetGpuFabricProbeInfo_IMPL NvUuid *pClusterUuid = (NvUuid*) pParams->clusterUuid; NvU32 mask = 0, healthMask = 0; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && - rmDeviceGpuLockIsOwner(gpuGetInstance(pGpu))); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && + rmDeviceGpuLockIsOwner(gpuGetInstance(pGpu)), + NV_ERR_INVALID_LOCK_STATE); // Probe is not supported - Ex - Direct connected etc. if (!gpuFabricProbeIsSupported(pGpu)) @@ -3289,7 +3250,7 @@ subdeviceCtrlCmdGpuGetNameString_IMPL { OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); return gpuGetNameString(pGpu, pNameStringParams->gpuNameStringFlags, @@ -3311,7 +3272,7 @@ subdeviceCtrlCmdGpuGetShortNameString_IMPL { OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); return gpuGetShortNameString(pGpu, (void *)&pShortNameStringParams->gpuShortNameString); } @@ -3369,7 +3330,7 @@ subdeviceCtrlCmdGpuReportNonReplayableFault_IMPL ct_assert(sizeof(GMMU_FAULT_PACKET) == NV2080_CTRL_GPU_FAULT_PACKET_SIZE); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); status = kgmmuHandleNonReplayableFaultPacket_HAL(pGpu, pKernelGmmu, pFaultPacket); @@ -3461,3 +3422,33 @@ subdeviceCtrlCmdGpuSetIllum_IMPL return status; } +/*! + * @brief This Command is used to query the recovery action for a GPU to get + * back to an operational state. + * + * @param[in,out] pParams + * action: The GPU recovery action. + * + * @return Returns NV_STATUS + * NV_ERR_GPU_IS_LOST The GPU has fallen off the bus + * NV_OK Success + * + */ +NV_STATUS +subdeviceCtrlCmdGpuGetRecoveryAction_IMPL( + Subdevice *pSubdevice, + NV2080_CTRL_GPU_GET_RECOVERY_ACTION_PARAMS *pParams +) +{ + OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); + + if (!API_GPU_ATTACHED_SANITY_CHECK(pGpu)) + { + return NV_ERR_GPU_IS_LOST; + } + + gpuGetRecoveryAction(pGpu, pParams); + + return NV_OK; +} + diff --git a/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_regops.c b/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_regops.c index 6b3bd30ab0..02b473006c 100644 --- a/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_regops.c +++ b/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_regops.c @@ -120,7 +120,8 @@ subdeviceCtrlCmdGpuExecRegOps_cmn RmCtrlParams *pRmCtrlParams = pCallContext->pControlParams; NvBool bUseMigratableOps; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(GPU_RES_GET_GPU(pSubdevice)->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(GPU_RES_GET_GPU(pSubdevice)->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); NV_PRINTF(LEVEL_INFO, "client 0x%x channel 0x%x\n", hClientTarget, hChannelTarget); diff --git a/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_smc.c b/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_smc.c index 64670d23c3..20b852c8fc 100644 --- a/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_smc.c +++ b/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_smc.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_timer_kernel.c b/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_timer_kernel.c index e0c6e5ed99..62cd33704b 100644 --- a/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_timer_kernel.c +++ b/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_timer_kernel.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2004-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2004-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -54,7 +54,7 @@ subdeviceCtrlCmdTimerCancel_IMPL OBJGPU *pGpu; OBJTMR *pTmr; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (pSubdevice == NULL) { @@ -214,11 +214,12 @@ subdeviceCtrlCmdTimerSchedule_IMPL if (pRmCtrlParams->flags & NVOS54_FLAGS_IRQL_RAISED) { - LOCK_ASSERT_AND_RETURN(rmDeviceGpuLockIsOwner(GPU_RES_GET_GPU(pSubdevice)->gpuInstance)); + NV_ASSERT_OR_RETURN(rmDeviceGpuLockIsOwner(GPU_RES_GET_GPU(pSubdevice)->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); } else { - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); } return timerSchedule(pSubdevice, pParams); @@ -254,7 +255,8 @@ subdeviceCtrlCmdTimerGetTime_IMPL } else { - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance)); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmDeviceGpuLockIsOwner(pGpu->gpuInstance), + NV_ERR_INVALID_LOCK_STATE); } tmrGetCurrentTime(pTmr, &pParams->time_nsec); @@ -278,7 +280,7 @@ subdeviceCtrlCmdTimerGetRegisterOffset_IMPL { OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); return gpuGetRegBaseOffset_HAL(pGpu, NV_REG_BASE_TIMER, &pTimerRegOffsetParams->tmr_offset); } @@ -306,7 +308,7 @@ subdeviceCtrlCmdTimerGetGpuCpuTimeCorrelationInfo_IMPL NvU8 i; NvU32 sec, usec; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); NV_CHECK_OR_RETURN(LEVEL_SILENT, (pParams->sampleCount <= NV2080_CTRL_TIMER_GPU_CPU_TIME_MAX_SAMPLES), @@ -491,7 +493,7 @@ subdeviceCtrlCmdTimerSetGrTickFreq_IMPL OBJREFCNT *pRefcnt; NvHandle hSubDevice; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (pSubdevice == NULL || pTmr == NULL) { diff --git a/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_vgpu.c b/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_vgpu.c index 84d73c37a1..f0fc349da1 100644 --- a/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_vgpu.c +++ b/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_vgpu.c @@ -213,3 +213,27 @@ subdeviceCtrlCmdGpuQueryIllumSupport_VF return NV_OK; } + +NV_STATUS subdeviceCtrlCmdBiosGetInfoV2_VF +( + Subdevice *pSubdevice, + NV2080_CTRL_BIOS_GET_INFO_V2_PARAMS *pBiosInfoParams +) +{ + NV2080_CTRL_BIOS_INFO *pBiosInfos = pBiosInfoParams->biosInfoList; + NvU32 i; + + if ((pBiosInfoParams->biosInfoListSize == 0) || + (pBiosInfoParams->biosInfoListSize > NV2080_CTRL_BIOS_INFO_MAX_SIZE)) + { + return NV_ERR_INVALID_ARGUMENT; + } + + for (i = 0; i < pBiosInfoParams->biosInfoListSize; i++) + { + pBiosInfos[i].data = 0; + } + + return NV_OK; +} + diff --git a/src/nvidia/src/kernel/gpu/timer/timer.c b/src/nvidia/src/kernel/gpu/timer/timer.c index 54053e1313..d90981bdf0 100644 --- a/src/nvidia/src/kernel/gpu/timer/timer.c +++ b/src/nvidia/src/kernel/gpu/timer/timer.c @@ -436,21 +436,22 @@ tmrEventTimeUntilNextCallback_IMPL NvU64 currentTime; NvU64 nextAlarmTime; - NV_ASSERT_OK_OR_RETURN(tmrGetCurrentTime(pTmr, ¤tTime)); TMR_EVENT_PVT *pEvent = (TMR_EVENT_PVT*)pEventPublic; if (tmrIsOSTimer(pTmr, pEventPublic)) { - // timens corresponds to relative time for OS timer + osGetCurrentTick(¤tTime); + // timens corresponds to relative time for OS timer NV_CHECK_OR_RETURN(LEVEL_ERROR, portSafeAddU64(pEvent->timens, pEvent->startTimeNs, &nextAlarmTime), NV_ERR_INVALID_ARGUMENT); } else { + NV_ASSERT_OK_OR_RETURN(tmrGetCurrentTime(pTmr, ¤tTime)); // timens corresponds to abs time in case of ptimer nextAlarmTime = pEvent->timens; } - if (currentTime >= nextAlarmTime) + if (currentTime > nextAlarmTime) return NV_ERR_INVALID_STATE; *pTimeUntilCallbackNs = nextAlarmTime - currentTime; diff --git a/src/nvidia/src/kernel/gpu_mgr/gpu_mgr.c b/src/nvidia/src/kernel/gpu_mgr/gpu_mgr.c index 8548816265..2787c00eac 100644 --- a/src/nvidia/src/kernel/gpu_mgr/gpu_mgr.c +++ b/src/nvidia/src/kernel/gpu_mgr/gpu_mgr.c @@ -1022,15 +1022,18 @@ void gpumgrGetRmFirmwarePolicy static NvBool _gpumgrIsRmFirmwareCapableChip(NvU32 pmcBoot42) { - return (gpuGetArchitectureFromPmcBoot42(pmcBoot42) >= NV_PMC_BOOT_42_ARCHITECTURE_TU100); + return (decodePmcBoot42Architecture(pmcBoot42) >= NV_PMC_BOOT_42_ARCHITECTURE_TU100); } NvBool gpumgrIsVgxRmFirmwareCapableChip(NvU32 pmcBoot42) { - if (gpuGetArchitectureFromPmcBoot42(pmcBoot42) == NV_PMC_BOOT_42_ARCHITECTURE_GH100) + if (decodePmcBoot42Architecture(pmcBoot42) == NV_PMC_BOOT_42_ARCHITECTURE_GB100) return NV_TRUE; - if (gpuGetArchitectureFromPmcBoot42(pmcBoot42) == NV_PMC_BOOT_42_ARCHITECTURE_AD100) + if (decodePmcBoot42Architecture(pmcBoot42) == NV_PMC_BOOT_42_ARCHITECTURE_GH100) + return NV_TRUE; + + if (decodePmcBoot42Architecture(pmcBoot42) == NV_PMC_BOOT_42_ARCHITECTURE_AD100) return NV_TRUE; return NV_FALSE; @@ -1258,7 +1261,7 @@ _gpumgrCreateGpu(NvU32 gpuInstance, GPUATTACHARG *pAttachArg) // create OBJGPU with halspec factor initialization value status = objCreate(&pGpu, pSys, OBJGPU, - /* ChipHal_arch = */ gpuGetArchitectureFromPmcBoot42(chipId1), + /* ChipHal_arch = */ decodePmcBoot42Architecture(chipId1), /* ChipHal_impl = */ DRF_VAL(_PMC, _BOOT_42, _IMPLEMENTATION, chipId1), /* ChipHal_hidrev = */ hidrev, /* RmVariantHal_rmVariant = */ rmVariant, @@ -1367,7 +1370,7 @@ gpumgrAttachGpu(NvU32 gpuInstance, GPUATTACHARG *pAttachArg) OBJGPU *pGpu = NULL; NV_STATUS status; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // create the new OBJGPU if ((status = _gpumgrCreateGpu(gpuInstance, pAttachArg)) != NV_OK) @@ -1486,7 +1489,7 @@ gpumgrDetachGpu(NvU32 gpuInstance) OBJGPU *pGpu = gpumgrGetGpu(gpuInstance); NvBool bDelClientResourcesFromGpuMask = !pGpu->getProperty(pGpu, PDB_PROP_GPU_IN_TIMEOUT_RECOVERY); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // Mark for deletion the stale clients related to the GPU mask if (bDelClientResourcesFromGpuMask) @@ -2326,11 +2329,6 @@ gpumgrGetGpuIdInfoV2(NV0000_CTRL_GPU_GET_ID_INFO_V2_PARAMS *pGpuInfo) return NV_ERR_INVALID_ARGUMENT; } - if (pGpu->subdeviceInstanceOverrideMask != 0) - { - subDeviceInstance = BIT_IDX_32(pGpu->subdeviceInstanceOverrideMask); - } - else { subDeviceInstance = gpumgrGetSubDeviceInstanceFromGpu(pGpu); } @@ -2411,7 +2409,7 @@ gpumgrGetGpuIdInfoV2(NV0000_CTRL_GPU_GET_ID_INFO_V2_PARAMS *pGpuInfo) } // is this GPU part of an SOC - if (pGpu->bIsSOC) + if (pGpu->bIsSOC || pGpu->getProperty(pGpu, PDB_PROP_GPU_IS_SOC_SDM)) { pGpuInfo->gpuFlags |= DRF_DEF(0000, _CTRL_GPU_ID_INFO, _SOC, _TRUE); } @@ -3381,6 +3379,33 @@ gpumgrUpdateSystemNvlinkTopo_IMPL } } +NVLINK_UNCONTAINED_ERROR_RECOVERY_INFO * +gpumgrGetNvlinkRecoveryInfo_IMPL +( + NvU64 DomainBusDevice +) +{ + OBJSYS *pSys = SYS_GET_INSTANCE(); + OBJGPUMGR *pGpuMgr = SYS_GET_GPUMGR(pSys); + NvU32 i; + + for (i = 0; i < NV_MAX_DEVICES; i++) + { + // + // Choose the correct GPU by comparing PCI BusDomainDevice + // If no matching entry is found, pick the first invalid one. + // + if (!pGpuMgr->nvlinkUncontainedErrorRecoveryInfo[i].bValid || + (pGpuMgr->nvlinkUncontainedErrorRecoveryInfo[i].DomainBusDevice == DomainBusDevice)) + { + return &pGpuMgr->nvlinkUncontainedErrorRecoveryInfo[i]; + } + } + + // If no entries available, bail. + return NULL; +} + /*! * @brief Check if GPUs are indirect peers * @@ -3522,6 +3547,20 @@ gpumgrGetGpuNvlinkBwMode_IMPL(void) return pGpuMgr->nvlinkBwMode; } +/*! + * @brief Get nvlink bandwidth mode scope + * + * @return bwModeScope reduced bandwidth mode scope. + */ +NvU8 +gpumgrGetGpuNvlinkBwModeScope_IMPL(void) +{ + OBJSYS *pSys = SYS_GET_INSTANCE(); + OBJGPUMGR *pGpuMgr = SYS_GET_GPUMGR(pSys); + + return pGpuMgr->bwModeScope; +} + /*! * @brief Set nvlink bandwidth mode from Registry * @@ -3539,14 +3578,21 @@ gpumgrSetGpuNvlinkBwModeFromRegistry_IMPL const char *pStrChar; NvU32 strLength = 32; NvU8 pStr[32]; + NvU32 linkCount; // // An RM client can set NVLink BW mode using // NV0000_CTRL_CMD_GPU_SET_NVLINK_BW_MODE control call. // If the value is not default i.e. `GPU_NVLINK_BW_MODE_FULL`, then skip. + // The scope would also be set to GPU_NVLINK_BW_MODE_SCOPE_UNSET if no + // PER_GPU setting has been made via NV2080_CTRL_CMD_GPU_SET_NVLINK_BW_MODE. + // Skip if it is not. // - if (pGpuMgr->nvlinkBwMode != GPU_NVLINK_BW_MODE_FULL) + if (pGpuMgr->nvlinkBwMode != GPU_NVLINK_BW_MODE_FULL || + pGpuMgr->bwModeScope != GPU_NVLINK_BW_MODE_SCOPE_UNSET) { + + NV_PRINTF(LEVEL_ERROR, "BW mode already set. Cannot override with regkey.\n"); return; } @@ -3555,26 +3601,46 @@ gpumgrSetGpuNvlinkBwModeFromRegistry_IMPL if (osReadRegistryString(pGpu, NV_REG_STR_RM_NVLINK_BW, pStr, &strLength) != NV_OK) { - goto out; + goto out; } pStrChar = (const char *)pStr; strLength = portStringLength(pStrChar); if (portStringCompare(pStrChar, "OFF", strLength) == 0) { - pGpuMgr->nvlinkBwMode = GPU_NVLINK_BW_MODE_OFF; + pGpuMgr->nvlinkBwMode = FLD_SET_DRF_NUM(_GPU, _NVLINK, _BW_MODE, + GPU_NVLINK_BW_MODE_OFF, + pGpuMgr->nvlinkBwMode); } else if (portStringCompare(pStrChar, "MIN", strLength) == 0) { - pGpuMgr->nvlinkBwMode = GPU_NVLINK_BW_MODE_MIN; + pGpuMgr->nvlinkBwMode = FLD_SET_DRF_NUM(_GPU, _NVLINK, _BW_MODE, + GPU_NVLINK_BW_MODE_MIN, + pGpuMgr->nvlinkBwMode); } else if (portStringCompare(pStrChar, "HALF", strLength) == 0) { - pGpuMgr->nvlinkBwMode = GPU_NVLINK_BW_MODE_HALF; + pGpuMgr->nvlinkBwMode = FLD_SET_DRF_NUM(_GPU, _NVLINK, _BW_MODE, + GPU_NVLINK_BW_MODE_HALF, + pGpuMgr->nvlinkBwMode); } else if (portStringCompare(pStrChar, "3QUARTER", strLength) == 0) { - pGpuMgr->nvlinkBwMode = GPU_NVLINK_BW_MODE_3QUARTER; + pGpuMgr->nvlinkBwMode = FLD_SET_DRF_NUM(_GPU, _NVLINK, _BW_MODE, + GPU_NVLINK_BW_MODE_3QUARTER, + pGpuMgr->nvlinkBwMode); + } + else if (portStringCompare(pStrChar, "LINKCOUNT", strLength) == 0) + { + if (osReadRegistryDword(pGpu, NV_REG_STR_RM_NVLINK_BW_LINK_COUNT, &linkCount) == NV_OK) + { + pGpuMgr->nvlinkBwMode = FLD_SET_DRF_NUM(_GPU, _NVLINK, _BW_MODE, + GPU_NVLINK_BW_MODE_LINK_COUNT, + pGpuMgr->nvlinkBwMode); + pGpuMgr->nvlinkBwMode = FLD_SET_DRF_NUM(_GPU, _NVLINK, _BW_MODE_LINK_COUNT, + linkCount, pGpuMgr->nvlinkBwMode); + pGpuMgr->bwModeScope = GPU_NVLINK_BW_MODE_SCOPE_PER_NODE; + } } out: @@ -3612,6 +3678,56 @@ _gpumgrIsP2PObjectPresent(void) return NV_FALSE; } +/*! + * @brief Set nvlink bandwidth mode for PER_GPU scope + * TODO: Move RBM code into it's own source file + * + * @param[in] mode nvlink bandwidth mode + * + * @return NV_OK on success, appropriate error on failure. + */ +NV_STATUS +gpumgrSetGpuNvlinkBwModePerGpu_IMPL +( + OBJGPU *pGpu, + NvU8 mode +) +{ + OBJSYS *pSys = SYS_GET_INSTANCE(); + OBJGPUMGR *pGpuMgr = SYS_GET_GPUMGR(pSys); + KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pGpu); + + if (pGpuMgr->bwModeScope == GPU_NVLINK_BW_MODE_SCOPE_PER_NODE) + { + // Scope is set to PER_NODE. + NV_PRINTF(LEVEL_ERROR, "Unable to override bw mode setting in current scope.\n"); + return NV_ERR_IN_USE; + } + + if (mode == pKernelNvlink->nvlinkBwMode) + { + // Current link count matches requested link count + NV_PRINTF(LEVEL_ERROR, "Requested RBM link count is already set.\n"); + return NV_OK; + } + + if (_gpumgrIsP2PObjectPresent()) + { + return NV_ERR_IN_USE; + } + + // Set requested rbm link count for gpu + NV_ASSERT_OK_OR_RETURN(gpuFabricProbeSetBwModePerGpu(pGpu, mode)); + + // + // TODO: Need to check if all GPU BW modes are _FULL when requested mode + // is _FULL and if so change bwModeScope to _UNSET + // + pGpuMgr->bwModeScope = GPU_NVLINK_BW_MODE_SCOPE_PER_GPU; + + return NV_OK; +} + /*! * @brief Set nvlink bandwidth mode * @@ -3629,8 +3745,16 @@ gpumgrSetGpuNvlinkBwMode_IMPL OBJGPUMGR *pGpuMgr = SYS_GET_GPUMGR(pSys); NV_STATUS status; + if (pGpuMgr->bwModeScope == GPU_NVLINK_BW_MODE_SCOPE_PER_GPU) + { + // Scope is set to PER_GPU. + NV_PRINTF(LEVEL_ERROR, "Unable to override bw mode setting in current scope\n"); + return NV_ERR_IN_USE; + } + if (mode == pGpuMgr->nvlinkBwMode) { + NV_PRINTF(LEVEL_INFO, "Requested BW mode is already set.\n"); return NV_OK; } @@ -3639,7 +3763,7 @@ gpumgrSetGpuNvlinkBwMode_IMPL return NV_ERR_IN_USE; } - if (mode > GPU_NVLINK_BW_MODE_3QUARTER) + if (DRF_VAL(_GPU, _NVLINK, _BW_MODE, mode) > GPU_NVLINK_BW_MODE_3QUARTER) { return NV_ERR_INVALID_ARGUMENT; } @@ -3650,6 +3774,14 @@ gpumgrSetGpuNvlinkBwMode_IMPL return status; } + if (DRF_VAL(_GPU, _NVLINK, _BW_MODE, mode) == GPU_NVLINK_BW_MODE_FULL) + { + pGpuMgr->bwModeScope = GPU_NVLINK_BW_MODE_SCOPE_UNSET; + goto done; + } + pGpuMgr->bwModeScope = GPU_NVLINK_BW_MODE_SCOPE_PER_NODE; + +done: pGpuMgr->nvlinkBwMode = mode; return NV_OK; } @@ -4498,7 +4630,7 @@ NvBool gpumgrIsDeviceMsixAllowed return NV_TRUE; } - chipArch = gpuGetArchitectureFromPmcBoot42(pmcBoot42); + chipArch = decodePmcBoot42Architecture(pmcBoot42); if ((chipArch != NV_PMC_BOOT_42_ARCHITECTURE_AD100) && (chipArch != NV_PMC_BOOT_42_ARCHITECTURE_GA100)) { diff --git a/src/nvidia/src/kernel/mem_mgr/console_mem.c b/src/nvidia/src/kernel/mem_mgr/console_mem.c index 7eb4926023..b5c2e23bf4 100644 --- a/src/nvidia/src/kernel/mem_mgr/console_mem.c +++ b/src/nvidia/src/kernel/mem_mgr/console_mem.c @@ -28,6 +28,7 @@ #include "gpu/mem_mgr/mem_mgr.h" #include "rmapi/client.h" #include "virtualization/hypervisor/hypervisor.h" +#include "gpu/bus/kern_bus.h" #include "class/cl0040.h" // NV01_MEMORY_LOCAL_USER @@ -83,3 +84,16 @@ conmemCanCopy_IMPL { return NV_TRUE; } + +NV_STATUS conmemCtrlCmdNotifyConsoleDisabled_IMPL(ConsoleMemory *pConsoleMemory) +{ + Memory *pMemory = staticCast(pConsoleMemory, Memory); + OBJGPU *pGpu = pMemory->pGpu; + MEMORY_DESCRIPTOR *pMemDesc = pMemory->pMemDesc; + KernelBus *pKernelBus = GPU_GET_KERNEL_BUS(pGpu); + NvU32 gfid = pMemDesc->gfid; + + // Remove the BAR1 mapping of the framebuffer console. + kbusUnmapPreservedConsole(pGpu, pKernelBus, gfid); + return NV_OK; +} diff --git a/src/nvidia/src/kernel/mem_mgr/gpu_vaspace.c b/src/nvidia/src/kernel/mem_mgr/gpu_vaspace.c index d465fff28e..6fef49198f 100644 --- a/src/nvidia/src/kernel/mem_mgr/gpu_vaspace.c +++ b/src/nvidia/src/kernel/mem_mgr/gpu_vaspace.c @@ -749,7 +749,7 @@ gvaspaceConstruct__IMPL VirtMemAllocator *pDma = GPU_GET_DMA(pGpu); // Handle 32-bit restricted pointer ranges. if (((pdeAlignedVasLimit + 1) > NVBIT64(32)) && - (pDma->getProperty(pDma, PDB_PROP_DMA_ENFORCE_32BIT_POINTER))) + (pDma->bDmaEnforce32BitPointer)) { // Top of 32-bit range. _gvaspaceAddPartialPtRange(pGVAS, @@ -1224,7 +1224,6 @@ _gvaspaceGpuStateConstruct // e.g. NV4K state for 64K PTEs // walkFlags.bAtsEnabled = gvaspaceIsAtsEnabled(pGVAS); - walkFlags.bUseIterative = gpuIsIterativeMmuWalkerEnabled(pGpu); NV_ASSERT_OK_OR_RETURN( mmuWalkCreate(pFmt->pRoot, NULL, &g_gmmuWalkCallbacks, @@ -4244,7 +4243,8 @@ vaspaceapiCtrlCmdVaspaceGetPageLevelInfo_IMPL RES_GET_PARENT_HANDLE(pVaspaceApi), (NvP64)pPageLevelInfoParams->virtAddress); offset = pPageLevelInfoParams->virtAddress - (NvU64)pCpuMapping->pLinearAddress; - pPageLevelInfoParams->virtAddress = pCpuMapping->pPrivate->gpuAddress + offset; + NV_ASSERT_OR_RETURN(pCpuMapping->pPrivate->memArea.numRanges == 1, NV_ERR_INVALID_ARGUMENT); + pPageLevelInfoParams->virtAddress = pCpuMapping->pPrivate->memArea.pRanges[0].start + offset; } return gvaspaceGetPageLevelInfo(pGVAS, pGpu, pPageLevelInfoParams); @@ -4380,6 +4380,14 @@ vaspaceapiCtrlCmdVaspaceCopyServerReservedPdes_IMPL _gvaspaceControl_Prolog(pVaspaceApi, pCopyServerReservedPdesParams->hSubDevice, pCopyServerReservedPdesParams->subDeviceId, &pGVAS, &pGpu)); + if (((IsHOPPERorBetter(pGpu) && !RMCFG_FEATURE_PLATFORM_GSP && !IS_GSP_CLIENT(pGpu) && !RMCFG_FEATURE_PLATFORM_MODS && + !(IS_VIRTUAL(pGpu) && IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu)))) || + pGVAS->vaLimitServerRMOwned == 0) + { + // BUG 4580145 WAR: make sure only GSP's context is updated + return NV_OK; + } + return gvaspaceCopyServerReservedPdes(pGVAS, pGpu, pCopyServerReservedPdesParams); } @@ -4412,7 +4420,7 @@ gvaspaceCopyServerReservedPdes_IMPL NV_ASSERT_OR_RETURN(ONEBITSET(pCopyServerReservedPdesParams->pageSize), NV_ERR_INVALID_ARGUMENT); - if (IS_VIRTUAL(pGpu)) + if (IS_GSP_CLIENT(pGpu) || IS_VIRTUAL(pGpu)) { CALL_CONTEXT *pCallContext = resservGetTlsCallContext(); RmCtrlParams *pRmCtrlParams = pCallContext->pControlParams->pLegacyParams; @@ -4430,11 +4438,14 @@ gvaspaceCopyServerReservedPdes_IMPL pGpuState = gvaspaceGetGpuState(pGVAS, pGpu); NV_ASSERT_OR_RETURN(NULL != pGpuState, NV_ERR_INVALID_STATE); - // Alloc and bind page level instances. - status = gvaspaceReservePageTableEntries(pGVAS, pGpu, pCopyServerReservedPdesParams->virtAddrLo, - pCopyServerReservedPdesParams->virtAddrHi, - pCopyServerReservedPdesParams->pageSize); - NV_ASSERT_OR_RETURN(NV_OK == status, status); + if (pCopyServerReservedPdesParams->virtAddrHi >= pCopyServerReservedPdesParams->virtAddrLo) + { + // Alloc and bind page level instances. + status = gvaspaceReservePageTableEntries(pGVAS, pGpu, pCopyServerReservedPdesParams->virtAddrLo, + pCopyServerReservedPdesParams->virtAddrHi, + pCopyServerReservedPdesParams->pageSize); + NV_ASSERT_OR_RETURN(NV_OK == status, status); + } // Kick out any stale TLB entries. gvaspaceInvalidateTlb(pGVAS, pGpu, PTE_DOWNGRADE); diff --git a/src/nvidia/src/kernel/mem_mgr/mem_fabric.c b/src/nvidia/src/kernel/mem_mgr/mem_fabric.c index 09409f6fad..2b64fc5d5e 100644 --- a/src/nvidia/src/kernel/mem_mgr/mem_fabric.c +++ b/src/nvidia/src/kernel/mem_mgr/mem_fabric.c @@ -933,13 +933,15 @@ memoryfabricCtrlCmdDescribe_IMPL NvU64 pageSize; NvU32 i; CALL_CONTEXT *pCallContext = resservGetTlsCallContext(); - NvHandle hClient = pCallContext->pClient->hClient; FABRIC_MEMDESC_DATA *pMemdescData; OBJGPU *pGpu; + RmClient *pRmClient = dynamicCast(pCallContext->pClient, RmClient); + NV_ASSERT_OR_RETURN(pRmClient != NULL, NV_ERR_INVALID_CLIENT); + if ( - !rmclientIsCapableByHandle(hClient, NV_RM_CAP_SYS_FABRIC_IMEX_MGMT) && - !rmclientIsAdminByHandle(hClient, pCallContext->secInfo.privLevel)) + !rmclientIsCapableOrAdmin(pRmClient, NV_RM_CAP_SYS_FABRIC_IMEX_MGMT, pCallContext->secInfo.privLevel) + ) { return NV_ERR_INSUFFICIENT_PERMISSIONS; } diff --git a/src/nvidia/src/kernel/mem_mgr/mem_fabric_import_ref.c b/src/nvidia/src/kernel/mem_mgr/mem_fabric_import_ref.c index 7427eff5e0..b5e0083970 100644 --- a/src/nvidia/src/kernel/mem_mgr/mem_fabric_import_ref.c +++ b/src/nvidia/src/kernel/mem_mgr/mem_fabric_import_ref.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -50,12 +50,14 @@ memoryfabricimportedrefConstruct_IMPL ) { NV00FB_ALLOCATION_PARAMETERS *pAllocParams = pParams->pAllocParams; - NvHandle hClient = pParams->hClient; NV_ASSERT_OR_RETURN(RMCFG_FEATURE_KERNEL_RM, NV_ERR_NOT_SUPPORTED); - if (!rmclientIsCapableByHandle(hClient, NV_RM_CAP_SYS_FABRIC_IMEX_MGMT) && - !rmclientIsCapableByHandle(hClient, NV_RM_CAP_EXT_FABRIC_MGMT)) + RmClient *pRmClient = dynamicCast(pParams->pClient, RmClient); + NV_ASSERT_OR_RETURN(pRmClient != NULL, NV_ERR_INVALID_CLIENT); + + if (!rmclientIsCapable(pRmClient, NV_RM_CAP_SYS_FABRIC_IMEX_MGMT) && + !rmclientIsCapable(pRmClient, NV_RM_CAP_EXT_FABRIC_MGMT)) return NV_ERR_INSUFFICIENT_PERMISSIONS; if (pAllocParams->flags != 0) diff --git a/src/nvidia/src/kernel/mem_mgr/mem_multicast_fabric.c b/src/nvidia/src/kernel/mem_mgr/mem_multicast_fabric.c index 358162369c..26a9fe5857 100644 --- a/src/nvidia/src/kernel/mem_mgr/mem_multicast_fabric.c +++ b/src/nvidia/src/kernel/mem_mgr/mem_multicast_fabric.c @@ -2013,12 +2013,13 @@ _memorymulticastfabricCtrlSetFailure ) { CALL_CONTEXT *pCallContext = resservGetTlsCallContext(); - NvHandle hClient = pCallContext->pClient->hClient; + RmClient *pRmClient = dynamicCast(pCallContext->pClient, RmClient); + NV_ASSERT_OR_RETURN(pRmClient != NULL, NV_ERR_INVALID_CLIENT); + MEM_MULTICAST_FABRIC_DESCRIPTOR *pMulticastFabricDesc = pMemoryMulticastFabric->pMulticastFabricDesc; - if (!rmclientIsCapableByHandle(hClient, NV_RM_CAP_SYS_FABRIC_IMEX_MGMT) && - !rmclientIsAdminByHandle(hClient, pCallContext->secInfo.privLevel)) + if (!rmclientIsCapableOrAdmin(pRmClient, NV_RM_CAP_SYS_FABRIC_IMEX_MGMT, pCallContext->secInfo.privLevel)) return NV_ERR_INSUFFICIENT_PERMISSIONS; if (!_memMulticastFabricIsPrime(pMulticastFabricDesc->allocFlags)) @@ -2082,12 +2083,13 @@ _memorymulticastfabricCtrlAttachRemoteGpu MEM_MULTICAST_FABRIC_GPU_INFO *pIter; MemMulticastFabricRemoteGpuInfoMapSubmap *pSubmap = NULL; CALL_CONTEXT *pCallContext = resservGetTlsCallContext(); - NvHandle hClient = pCallContext->pClient->hClient; + RmClient *pRmClient = dynamicCast(pCallContext->pClient, RmClient); + NV_ASSERT_OR_RETURN(pRmClient != NULL, NV_ERR_INVALID_CLIENT); + NV00FD_CTRL_SET_FAILURE_PARAMS params; NV_STATUS status; - if (!rmclientIsCapableByHandle(hClient, NV_RM_CAP_SYS_FABRIC_IMEX_MGMT) && - !rmclientIsAdminByHandle(hClient, pCallContext->secInfo.privLevel)) + if (!rmclientIsCapableOrAdmin(pRmClient, NV_RM_CAP_SYS_FABRIC_IMEX_MGMT, pCallContext->secInfo.privLevel)) { // Don't set failure as non-priv client can hit this failure too. return NV_ERR_INSUFFICIENT_PERMISSIONS; diff --git a/src/nvidia/src/kernel/mem_mgr/os_desc_mem.c b/src/nvidia/src/kernel/mem_mgr/os_desc_mem.c index 88ab795a48..c100fcb88a 100644 --- a/src/nvidia/src/kernel/mem_mgr/os_desc_mem.c +++ b/src/nvidia/src/kernel/mem_mgr/os_desc_mem.c @@ -123,10 +123,16 @@ osdescConstruct_IMPL return status; } + if (!memdescGetContiguity(pMemDesc, AT_PA)) + { + os02Flags = FLD_SET_DRF(OS02, _FLAGS, _PHYSICALITY, _NONCONTIGUOUS, os02Flags); + pUserParams->attr = FLD_SET_DRF(OS32, _ATTR, _PHYSICALITY, _NONCONTIGUOUS, pUserParams->attr); + } + if (pMemoryManager->bAllowSysmemHugePages && pMemDesc->bForceHugePages) { - pUserParams->attr = DRF_DEF(OS32, _ATTR, _PAGE_SIZE, _HUGE); - pUserParams->attr2 = DRF_DEF(OS32, _ATTR2, _PAGE_SIZE_HUGE, _DEFAULT); + pUserParams->attr = FLD_SET_DRF(OS32, _ATTR, _PAGE_SIZE, _HUGE, pUserParams->attr); + pUserParams->attr2 = FLD_SET_DRF(OS32, _ATTR2, _PAGE_SIZE_HUGE, _DEFAULT, pUserParams->attr2); } status = memConstructCommon(pMemory, NV01_MEMORY_SYSTEM_OS_DESCRIPTOR, pUserParams->flags, diff --git a/src/nvidia/src/kernel/mem_mgr/phys_mem.c b/src/nvidia/src/kernel/mem_mgr/phys_mem.c index 64abe3899e..31d1083662 100644 --- a/src/nvidia/src/kernel/mem_mgr/phys_mem.c +++ b/src/nvidia/src/kernel/mem_mgr/phys_mem.c @@ -217,7 +217,7 @@ physmemConstruct_IMPL { NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR, kbusUpdateStaticBar1VAMapping_HAL(pGpu, pKernelBus, - pMemDesc, 0, memdescGetSize(pMemDesc), NV_FALSE), + pMemDesc, NV_FALSE), cleanup_rpc); memdescSetFlag(pMemDesc, diff --git a/src/nvidia/src/kernel/mem_mgr/vaspace.c b/src/nvidia/src/kernel/mem_mgr/vaspace.c index cf7c2a7f23..616dbdba27 100644 --- a/src/nvidia/src/kernel/mem_mgr/vaspace.c +++ b/src/nvidia/src/kernel/mem_mgr/vaspace.c @@ -68,7 +68,7 @@ vaspaceFillAllocParams_IMPL OBJGPU *pGpu = gpumgrGetGpu(gpumgrGetDefaultPrimaryGpu(pVAS->gpuMask)); VirtMemAllocator *pDma = GPU_GET_DMA(pGpu); bRestrictedVaRange = pDma->bDmaRestrictVaRange; - bEnforce32bitPtr = !!(pDma->getProperty(pDma, PDB_PROP_DMA_ENFORCE_32BIT_POINTER)); + bEnforce32bitPtr = pDma->bDmaEnforce32BitPointer; // Apply default alignment policies to offset alignment and size. NV_ASSERT_OK_OR_RETURN( @@ -191,7 +191,7 @@ vaspaceGetByHandleOrDeviceDefault_IMPL NV_STATUS status = NV_OK; NvHandle _hDeviceOrSubDevice; Device *pDevice = NULL; - RsResourceRef *pResourceRef; + RsResourceRef *pResourceRef = NULL; if (hVASpace == NV01_NULL_OBJECT) { diff --git a/src/nvidia/src/kernel/mem_mgr/video_mem.c b/src/nvidia/src/kernel/mem_mgr/video_mem.c index 08dcfe1405..3fc7c8af35 100644 --- a/src/nvidia/src/kernel/mem_mgr/video_mem.c +++ b/src/nvidia/src/kernel/mem_mgr/video_mem.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -451,20 +451,27 @@ vidmemCopyConstruct RS_RES_ALLOC_PARAMS_INTERNAL *pParams ) { - Memory *pMemorySrc = dynamicCast(pParams->pSrcRef->pResource, Memory); - OBJGPU *pGpu = pMemorySrc->pGpu; - NV_STATUS status; + Memory *pMemorySrc = dynamicCast(pParams->pSrcRef->pResource, Memory); + OBJGPU *pGpu = pMemorySrc->pGpu; + MEMORY_DESCRIPTOR *pMemDesc = pMemorySrc->pMemDesc; + NV_STATUS status = NV_ERR_INVALID_ARGUMENT; - NV_ASSERT_OR_RETURN(!memdescGetCustomHeap(pMemorySrc->pMemDesc), NV_ERR_INVALID_ARGUMENT); - - SLI_LOOP_START(SLI_LOOP_FLAGS_BC_ONLY) - MEMORY_DESCRIPTOR *pSrcMemDesc = memdescGetMemDescFromGpu(pMemorySrc->pMemDesc, pGpu); - status = heapReference(pGpu, pSrcMemDesc->pHeap, pMemorySrc->HeapOwner, - pSrcMemDesc); - NV_ASSERT(status == NV_OK); - SLI_LOOP_END + switch (memdescGetCustomHeap(pMemDesc)) + { + case MEMDESC_CUSTOM_HEAP_NONE: + SLI_LOOP_START(SLI_LOOP_FLAGS_BC_ONLY) + MEMORY_DESCRIPTOR *pSrcMemDesc = memdescGetMemDescFromGpu(pMemorySrc->pMemDesc, pGpu); + status = heapReference(pGpu, pSrcMemDesc->pHeap, pMemorySrc->HeapOwner, + pSrcMemDesc); + NV_ASSERT_OK_OR_RETURN(status); + SLI_LOOP_END + break; + default: + NV_ASSERT_OR_RETURN(0, NV_ERR_INVALID_ARGUMENT); + break; + } - return NV_OK; + return status; } /*! @@ -506,7 +513,7 @@ vidmemConstruct_IMPL MEMORY_ALLOCATION_REQUEST *pAllocRequest = &allocRequest; OBJGPU *pGpu = pMemory->pGpu; MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); - Heap *pHeap; + Heap *pHeap = NULL; NvBool bSubheap = NV_FALSE; NvBool bRsvdHeap = NV_FALSE; MEMORY_DESCRIPTOR *pTopLevelMemDesc = NULL; @@ -1008,8 +1015,7 @@ vidmemConstruct_IMPL if (bUpdatePteKind) { rmStatus = kbusUpdateStaticBar1VAMapping_HAL(pGpu, pKernelBus, - pMemory->pMemDesc, 0, - memdescGetSize(pMemory->pMemDesc), NV_FALSE); + pMemory->pMemDesc, NV_FALSE); if (rmStatus != NV_OK) { @@ -1071,6 +1077,7 @@ vidmemDestruct_IMPL Memory *pMemory = staticCast(pVideoMemory, Memory); OBJGPU *pGpu = pMemory->pGpu; MEMORY_DESCRIPTOR *pMemDesc = pMemory->pMemDesc; + MEMDESC_CUSTOM_HEAP customHeap; // Free any association of the memory with existing third-party p2p object CliUnregisterMemoryFromThirdPartyP2P(pMemory); @@ -1079,7 +1086,8 @@ vidmemDestruct_IMPL // free the video memory based on how it was alloced ... a non-zero // heapOwner indicates it was heapAlloc-ed. - if (!memdescGetCustomHeap(pMemDesc)) + customHeap = memdescGetCustomHeap(pMemDesc); + if (customHeap == MEMDESC_CUSTOM_HEAP_NONE) { MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); NvHandle hClient = RES_GET_CLIENT_HANDLE(pVideoMemory); diff --git a/src/nvidia/src/kernel/mem_mgr/virt_mem_mgr.c b/src/nvidia/src/kernel/mem_mgr/virt_mem_mgr.c index 4722b268ef..65d750c483 100644 --- a/src/nvidia/src/kernel/mem_mgr/virt_mem_mgr.c +++ b/src/nvidia/src/kernel/mem_mgr/virt_mem_mgr.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2013-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2013-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/src/kernel/os/os_init.c b/src/nvidia/src/kernel/os/os_init.c index 28beb4a40b..89cab56c1f 100644 --- a/src/nvidia/src/kernel/os/os_init.c +++ b/src/nvidia/src/kernel/os/os_init.c @@ -376,109 +376,6 @@ osGetCpuVaAddrShift(void) return (64 - portUtilCountLeadingZeros64(maxUserVa - 1)) + 1; } -/** - * @brief Adds a filter to trap a certain CPU virtual address range - * - * Sets up a filter so all accesses to an address range are sent through the - * specified callback. - * - * Only one filter is allowed for any given address. - * - * @param[in] rangeStart start of CPU address range (inclusive) - * @param[in] rangeEnd end of CPU address range (inclusive) - * @param[in] pCb Callback function - * @param[in] pPriv opaque point to data pass to callback - * - * @return NV_OK is success, appropriate error otherwise. - */ -NV_STATUS -osMemAddFilter -( - NvU64 rangeStart, - NvU64 rangeEnd, - OSMemFilterCb *pCb, - void *pPriv -) -{ - OBJSYS *pSys = SYS_GET_INSTANCE(); - POSMEMFILTERDATA pFilterData = NULL; - - pFilterData = portMemAllocNonPaged(sizeof(OSMEMFILTERDATA)); - if (pFilterData == NULL) - { - NV_PRINTF(LEVEL_ERROR, - "Failed to alloc mem for os mem filter data!\n"); - return NV_ERR_INSUFFICIENT_RESOURCES; - } - - pFilterData->node.keyStart = rangeStart; - pFilterData->node.keyEnd = rangeEnd; - pFilterData->pPriv = pPriv; - pFilterData->pFilterCb = pCb; - pFilterData->node.Data = (void *)pFilterData; - - return btreeInsert(&pFilterData->node, &pSys->pMemFilterList); -} - -/** - * @brief Remove a filter added with @ref osMemAddFilter - * - * @param[in] rangeStart memory address to remove filter from. - */ -NV_STATUS -osMemRemoveFilter -( - NvU64 rangeStart -) -{ - OBJSYS *pSys = SYS_GET_INSTANCE(); - PNODE pNode = NULL; - - if (btreeSearch(rangeStart, &pNode, pSys->pMemFilterList) != NV_OK) - { - NV_PRINTF(LEVEL_INFO, - "Failed to find filter data for the given range start address!\n"); - return NV_ERR_INVALID_ARGUMENT; - } - - NV_ASSERT(pNode); - NV_ASSERT(pNode->keyStart == rangeStart); - - if (btreeUnlink(pNode, &pSys->pMemFilterList) != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, "Failed to unlink filter data!\n"); - return NV_ERR_INVALID_STATE; - } - - portMemFree(pNode->Data); - pNode = NULL; - - return NV_OK; -} - -/** - * @brief Retrieves a filter added with @ref osMemAddFilter. - * - * @param[in] address Address to search for - * - * @return Appropriate filter data if a filter exists, NULL otherwise. - */ -POSMEMFILTERDATA -osMemGetFilter(NvUPtr address) -{ - OBJSYS *pSys; - PNODE pNode = NULL; - - pSys = SYS_GET_INSTANCE(); - if (!pSys) - return NULL; - - if (btreeSearch(address, &pNode, pSys->pMemFilterList) != NV_OK) - return NULL; - - return pNode->Data; -} - /*! * Some data such as Bindata array are placed on paged memory. Access to paged segment * on high IRQL is not allowed on some platform (e.g. Windows). The issue could be diff --git a/src/nvidia/src/kernel/os/os_timer.c b/src/nvidia/src/kernel/os/os_timer.c index 2bf069d966..18d04bf1d1 100644 --- a/src/nvidia/src/kernel/os/os_timer.c +++ b/src/nvidia/src/kernel/os/os_timer.c @@ -347,11 +347,11 @@ osRun1HzCallbacksNow if (bAcquired) { // Out of conflicting thread - threadStateFreeISRAndDeferredIntHandler(&threadState, - pGpu, THREAD_STATE_FLAGS_IS_DEFERRED_INT_HANDLER); osReleaseRmSema(pSys->pSema, NULL); // UNLOCK: release GPU lock rmGpuGroupLockRelease(lockedGpus, GPUS_LOCK_FLAGS_NONE); + threadStateFreeISRAndDeferredIntHandler(&threadState, + pGpu, THREAD_STATE_FLAGS_IS_DEFERRED_INT_HANDLER); } else { diff --git a/src/nvidia/src/kernel/platform/chipset/chipset.c b/src/nvidia/src/kernel/platform/chipset/chipset.c index 915ddb0999..8ff597d479 100644 --- a/src/nvidia/src/kernel/platform/chipset/chipset.c +++ b/src/nvidia/src/kernel/platform/chipset/chipset.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -278,10 +278,15 @@ clFindFHBAndGetChipsetInfoIndex_IMPL // // PC motherboards have a host bridge to connect PCIE root complex to rest of the system. // However, Tegra devices only have a PCI-to-PCI bridge. - // So allow Tegra chipset initialization, even if a host bridge is not found. - // See bug 1547160 comment#17 for more details. + // So allow Tegra chipset initialization, even if a host bridge is not found (SUBBASECLASS_P2P). + // See bug 1547160 comment#17 for more details (dGPU connected with Tegra device through PCIe). + // There is no host bridge or PCI-to-PCI bridge present in between + // Tegra iGPUs and PCIe-RC. Tegra iGPUs are directly connected to endpoint. + // PCI config for Sub Base Class code will always be programmed as + // PCI_COMMON_CLASS_SUBBASECLASS_3DCTRL for Tegra iGPUs. // - NvU16 pciSubBaseClass[2] = {PCI_COMMON_CLASS_SUBBASECLASS_HOST, PCI_COMMON_CLASS_SUBBASECLASS_P2P}; + NvU16 pciSubBaseClass[] = {PCI_COMMON_CLASS_SUBBASECLASS_HOST, + PCI_COMMON_CLASS_SUBBASECLASS_P2P, PCI_COMMON_CLASS_SUBBASECLASS_3DCTRL}; // return it, if we've got it already if (pCl->chipsetIDBusAddr.valid) @@ -398,65 +403,72 @@ clFindFHBAndGetChipsetInfoIndex_IMPL // match with Host Bridge ID. In that case we need to find FHB either in // cached bus topology or need to loop through PCI bus to find the FHB. // - for (i = 0; i < 2; i++) + for (i = 0; i < NV_ARRAY_ELEMENTS(pciSubBaseClass); i++) { - pBusTopologyInfo = pCl->pBusTopologyInfo; - while (pBusTopologyInfo) - { - if (pBusTopologyInfo->pciSubBaseClass == pciSubBaseClass[i]) + pBusTopologyInfo = pCl->pBusTopologyInfo; + while (pBusTopologyInfo) { - pCl->FHBAddr.domain = pBusTopologyInfo->domain; - pCl->FHBAddr.bus = pBusTopologyInfo->bus; - pCl->FHBAddr.device = pBusTopologyInfo->device; - pCl->FHBAddr.func = pBusTopologyInfo->func; - pCl->FHBAddr.valid = 0x1; - pCl->FHBAddr.handle = pBusTopologyInfo->handle; - - // Store a copy of deviceID, vendorID, subdeviceID and subvendorID; - pCl->FHBBusInfo.deviceID = pBusTopologyInfo->busInfo.deviceID; - pCl->FHBBusInfo.vendorID = pBusTopologyInfo->busInfo.vendorID; - pCl->FHBBusInfo.subdeviceID = pBusTopologyInfo->busInfo.subdeviceID; - pCl->FHBBusInfo.subvendorID = pBusTopologyInfo->busInfo.subvendorID; - pCl->FHBBusInfo.revisionID = pBusTopologyInfo->busInfo.revisionID; - - if (!matchFound) + if (pBusTopologyInfo->pciSubBaseClass == pciSubBaseClass[i]) { - pCl->chipsetIDBusAddr.domain = pBusTopologyInfo->domain; - pCl->chipsetIDBusAddr.bus = pBusTopologyInfo->bus; - pCl->chipsetIDBusAddr.device = pBusTopologyInfo->device; - pCl->chipsetIDBusAddr.func = pBusTopologyInfo->func; - pCl->chipsetIDBusAddr.valid = 0x1; - pCl->chipsetIDBusAddr.handle = pBusTopologyInfo->handle; + pCl->FHBAddr.domain = pBusTopologyInfo->domain; + pCl->FHBAddr.bus = pBusTopologyInfo->bus; + pCl->FHBAddr.device = pBusTopologyInfo->device; + pCl->FHBAddr.func = pBusTopologyInfo->func; + pCl->FHBAddr.valid = 0x1; + pCl->FHBAddr.handle = pBusTopologyInfo->handle; // Store a copy of deviceID, vendorID, subdeviceID and subvendorID; - pCl->chipsetIDInfo.deviceID = pBusTopologyInfo->busInfo.deviceID; - pCl->chipsetIDInfo.vendorID = pBusTopologyInfo->busInfo.vendorID; - pCl->chipsetIDInfo.subdeviceID = pBusTopologyInfo->busInfo.subdeviceID; - pCl->chipsetIDInfo.subvendorID = pBusTopologyInfo->busInfo.subvendorID; + pCl->FHBBusInfo.deviceID = pBusTopologyInfo->busInfo.deviceID; + pCl->FHBBusInfo.vendorID = pBusTopologyInfo->busInfo.vendorID; + pCl->FHBBusInfo.subdeviceID = pBusTopologyInfo->busInfo.subdeviceID; + pCl->FHBBusInfo.subvendorID = pBusTopologyInfo->busInfo.subvendorID; + pCl->FHBBusInfo.revisionID = pBusTopologyInfo->busInfo.revisionID; - if (pCl->chipsetIDInfo.subvendorID == 0) + if (!matchFound) { - getSubsystemFromPCIECapabilities(pCl->chipsetIDBusAddr.domain, - pCl->chipsetIDBusAddr.bus, - pCl->chipsetIDBusAddr.device, - pCl->chipsetIDBusAddr.func, - &pCl->chipsetIDInfo.subvendorID, - &pCl->chipsetIDInfo.subdeviceID); + pCl->chipsetIDBusAddr.domain = pBusTopologyInfo->domain; + pCl->chipsetIDBusAddr.bus = pBusTopologyInfo->bus; + pCl->chipsetIDBusAddr.device = pBusTopologyInfo->device; + pCl->chipsetIDBusAddr.func = pBusTopologyInfo->func; + pCl->chipsetIDBusAddr.valid = 0x1; + pCl->chipsetIDBusAddr.handle = pBusTopologyInfo->handle; + + // Store a copy of deviceID, vendorID, subdeviceID and subvendorID; + pCl->chipsetIDInfo.deviceID = pBusTopologyInfo->busInfo.deviceID; + pCl->chipsetIDInfo.vendorID = pBusTopologyInfo->busInfo.vendorID; + pCl->chipsetIDInfo.subdeviceID = pBusTopologyInfo->busInfo.subdeviceID; + pCl->chipsetIDInfo.subvendorID = pBusTopologyInfo->busInfo.subvendorID; + + if (pCl->chipsetIDInfo.subvendorID == 0) + { + getSubsystemFromPCIECapabilities(pCl->chipsetIDBusAddr.domain, + pCl->chipsetIDBusAddr.bus, + pCl->chipsetIDBusAddr.device, + pCl->chipsetIDBusAddr.func, + &pCl->chipsetIDInfo.subvendorID, + &pCl->chipsetIDInfo.subdeviceID); + } } + + NV_PRINTF(LEVEL_INFO, + "DeviceId[%x] VendorID[%x] BDF[%x:%x:%x] SubClassId[%x] device found.\n", + pBusTopologyInfo->busInfo.deviceID, + pBusTopologyInfo->busInfo.vendorID, + pBusTopologyInfo->bus, + pBusTopologyInfo->device, + pBusTopologyInfo->func, + pciSubBaseClass[i]); + + return NV_OK; } - return NV_OK; + pBusTopologyInfo = pBusTopologyInfo->next; } - pBusTopologyInfo = pBusTopologyInfo->next; - } - - NV_PRINTF(LEVEL_INFO, - "NVRM : Host bridge device not found. Looking for a PCI-to-PCI bridge device!!!\n"); } NV_PRINTF(LEVEL_ERROR, - "NVRM : This is Bad. FHB not found in cached bus topology!!!\n"); + "NVRM : This is Bad. FHB/P2P/3DCTRL not found in cached bus topology!!!\n"); - // HB is not present in cached bus topology. + // HB/P2P/3DCTRL is not present in cached bus topology. NV_ASSERT(0); // @@ -813,7 +825,6 @@ void clSyncWithGsp_IMPL(OBJCL *pCl, GspSystemInfo *pGSI) CL_SYNC_PDB(PDB_PROP_CL_IS_CHIPSET_IO_COHERENT); CL_SYNC_PDB(PDB_PROP_CL_DISABLE_IOMAP_WC); CL_SYNC_PDB(PDB_PROP_CL_HAS_RESIZABLE_BAR_ISSUE); - CL_SYNC_PDB(PDB_PROP_CL_IS_EXTERNAL_GPU); CL_SYNC_PDB(PDB_PROP_CL_BUG_3751839_GEN_SPEED_WAR); CL_SYNC_PDB(PDB_PROP_CL_BUG_3562968_WAR_ALLOW_PCIE_ATOMICS); diff --git a/src/nvidia/src/kernel/platform/chipset/chipset_pcie.c b/src/nvidia/src/kernel/platform/chipset/chipset_pcie.c index cefe461958..834fa257a0 100644 --- a/src/nvidia/src/kernel/platform/chipset/chipset_pcie.c +++ b/src/nvidia/src/kernel/platform/chipset/chipset_pcie.c @@ -2601,7 +2601,8 @@ clStoreBusTopologyCache_IMPL pBusTopologyInfo->busInfo.revisionID = osPciReadByte(handle, PCI_HEADER_TYPE0_REVISION_ID); if ((pciSubBaseClass == PCI_COMMON_CLASS_SUBBASECLASS_P2P) || - (pciSubBaseClass == PCI_COMMON_CLASS_SUBBASECLASS_HOST)) + (pciSubBaseClass == PCI_COMMON_CLASS_SUBBASECLASS_HOST) || + (pciSubBaseClass == PCI_COMMON_CLASS_SUBBASECLASS_3DCTRL)) { pBusTopologyInfo->secBus = (NvU8)osPciReadByte(handle, PCI_TYPE_1_SECONDARY_BUS_NUMBER); pBusTopologyInfo->bVgaAdapter = NV_FALSE; @@ -4514,18 +4515,7 @@ clPcieGetDownstreamPortLinkCap2_IMPL PCIECapPtr = pGpu->gpuClData.upstreamPort.PCIECapPtr; - // - // CL_PCIE_END is a misnomer, we actually want to use CL_PCIE_LINK_CAP_2. - // But it is not present in chipset.h and the offset of what-would-be - // CL_PCIE_LINK_CAP_2 (0x2c) is overlapping with CL_PCIE_END. - // Before replacing CL_PCIE_END with CL_PCIE_LINK_CAP_2, we would need to - // first understand why CL_PCIE_END was restricted to 0x2c and then - // changing it to CL_PCIE_LINK_CAP_2 would require discussion and time. - // Todo by anaikwade: Correct this issue. Bug 200659585. - // Also investigate more correct way if there is any to - // check pcie 4.0 spec support - // - *pLinkCaps2 = osPciReadDword(pHandle, CL_PCIE_END - CL_PCIE_BEGIN + PCIECapPtr); + *pLinkCaps2 = osPciReadDword(pHandle, CL_PCIE_LINK_CAP_2 - CL_PCIE_BEGIN + PCIECapPtr); return NV_OK; } diff --git a/src/nvidia/src/kernel/platform/p2p/p2p_caps.c b/src/nvidia/src/kernel/platform/p2p/p2p_caps.c index 2d10ed6e0a..6da64f6dac 100644 --- a/src/nvidia/src/kernel/platform/p2p/p2p_caps.c +++ b/src/nvidia/src/kernel/platform/p2p/p2p_caps.c @@ -72,21 +72,25 @@ p2pGetCaps NvU32 gpuMask, NvBool *pP2PWriteCapable, NvBool *pP2PReadCapable, + NvBool *pP2PAtomicsCapable, P2P_CONNECTIVITY *pConnectivity ) { NvU8 p2PWriteCapsStatus; NvU8 p2PReadCapsStatus; + NvU8 p2PAtomicsCapsStatus; NV_STATUS status; P2P_CONNECTIVITY connectivity; - if ((pP2PWriteCapable == NULL) || (pP2PReadCapable == NULL)) + if ((pP2PWriteCapable == NULL) || (pP2PReadCapable == NULL) || + (pP2PAtomicsCapable == NULL)) { return NV_ERR_INVALID_ARGUMENT; } status = p2pGetCapsStatus(gpuMask, &p2PWriteCapsStatus, - &p2PReadCapsStatus, &connectivity + &p2PReadCapsStatus, &p2PAtomicsCapsStatus, + &connectivity ); if (status != NV_OK) { @@ -107,6 +111,7 @@ p2pGetCaps *pP2PWriteCapable = (p2PWriteCapsStatus == NV0000_P2P_CAPS_STATUS_OK); *pP2PReadCapable = (p2PReadCapsStatus == NV0000_P2P_CAPS_STATUS_OK); + *pP2PAtomicsCapable = (p2PAtomicsCapsStatus == NV0000_P2P_CAPS_STATUS_OK); if (pConnectivity != NULL) { @@ -267,7 +272,8 @@ _kp2pCapsCheckStatusOverridesForPcie ( NvU32 gpuMask, NvU8 *pP2PWriteCapStatus, - NvU8 *pP2PReadCapStatus + NvU8 *pP2PReadCapStatus, + NvU8 *pP2PAtomicsCapStatus ) { KernelBif *pKernelBif = NULL; @@ -304,6 +310,18 @@ _kp2pCapsCheckStatusOverridesForPcie break; } + switch(DRF_VAL(_REG_STR, _CL_FORCE_P2P, _ATOMICS, pKernelBif->p2pOverride)) + { + case NV_REG_STR_CL_FORCE_P2P_ATOMICS_DISABLE: + *pP2PAtomicsCapStatus = NV0000_P2P_CAPS_STATUS_DISABLED_BY_REGKEY; + break; + case NV_REG_STR_CL_FORCE_P2P_ATOMICS_ENABLE: + *pP2PAtomicsCapStatus = NV0000_P2P_CAPS_STATUS_OK; + break; + default: + break; + } + return NV_TRUE; } @@ -348,10 +366,11 @@ _kp2pCapsGetStatusOverPcie NvU32 lockedGpuMask = 0; NV_STATUS status = NV_OK; OBJHYPERVISOR *pHypervisor = SYS_GET_HYPERVISOR(pSys); + NvU8 unused; // atomics are never supported for mailbox PCIe. // Check if any overrides are enabled. if (_kp2pCapsCheckStatusOverridesForPcie(gpuMask, pP2PWriteCapStatus, - pP2PReadCapStatus)) + pP2PReadCapStatus, &unused)) { return NV_OK; } @@ -600,6 +619,27 @@ _p2pCapsGetHostSystemStatusOverPcieBar1 return NV_OK; } +/** + * @brief Cross check the PCIe routing for each GPU described by the mask + * to verify whether the PCIe topology supports BAR1 atomics. + * + * @param[in] pGpu OBJGPU pointer + * @param[out] pP2PAtomicsCapStatus Pointer to get the P2P atomics capability + * + * @returns NV_OK, if GPUs support atomics + * NV_ERR_NOT_SUPPORTED, if atomics are not supported + */ +static NV_STATUS +_p2pCapsGetPcieToplogySupportForBar1Atomics +( + NvU32 gpuMask, + NvU8 *pP2PAtomicsCapStatus +) +{ + // TODO: Bug 4648955 RM needs to perform discovery of PCIe topology support for atomics. + return NV_ERR_NOT_SUPPORTED; +} + /** * @brief Check GPU Pcie BAR1 P2P capability * @@ -617,6 +657,7 @@ _kp2pCapsGetStatusOverPcieBar1 NvU32 gpuMask, NvU8 *pP2PWriteCapStatus, NvU8 *pP2PReadCapStatus, + NvU8 *pP2PAtomicsCapStatus, NvBool bCommonPciSwitchFound ) { @@ -626,6 +667,7 @@ _kp2pCapsGetStatusOverPcieBar1 KernelBif *pKernelBif = GPU_GET_KERNEL_BIF(pFirstGpu); NvU8 writeCapStatus = *pP2PWriteCapStatus; NvU8 readCapStatus = *pP2PReadCapStatus; + NvU8 atomicsCapStatus = *pP2PAtomicsCapStatus; if ((pKernelBif->forceP2PType != NV_REG_STR_RM_FORCE_P2P_TYPE_BAR1P2P)) { @@ -634,7 +676,8 @@ _kp2pCapsGetStatusOverPcieBar1 // Check if any overrides are enabled. if (_kp2pCapsCheckStatusOverridesForPcie(gpuMask, pP2PWriteCapStatus, - pP2PReadCapStatus)) + pP2PReadCapStatus, + pP2PAtomicsCapStatus)) { return NV_OK; } @@ -670,6 +713,14 @@ _kp2pCapsGetStatusOverPcieBar1 return NV_ERR_NOT_SUPPORTED; } + // If p2p traffic is supported, check the PCIe topology for atomics capability + _p2pCapsGetPcieToplogySupportForBar1Atomics(gpuMask, &atomicsCapStatus); + + if (atomicsCapStatus == NV0000_P2P_CAPS_STATUS_OK) + { + *pP2PAtomicsCapStatus = atomicsCapStatus; + } + return NV_OK; } @@ -679,6 +730,7 @@ p2pGetCapsStatus NvU32 gpuMask, NvU8 *pP2PWriteCapStatus, NvU8 *pP2PReadCapStatus, + NvU8 *pP2PAtomicsCapStatus, P2P_CONNECTIVITY *pConnectivity ) { @@ -699,6 +751,7 @@ p2pGetCapsStatus // Default values *pP2PWriteCapStatus = NV0000_P2P_CAPS_STATUS_NOT_SUPPORTED; *pP2PReadCapStatus = NV0000_P2P_CAPS_STATUS_NOT_SUPPORTED; + *pP2PAtomicsCapStatus = NV0000_P2P_CAPS_STATUS_NOT_SUPPORTED; *pConnectivity = P2P_CONNECTIVITY_UNKNOWN; // MIG-Nvlink-P2P can be incompatible, so check compatibility for all GPUs @@ -728,6 +781,7 @@ p2pGetCapsStatus *pP2PReadCapStatus == NV0000_P2P_CAPS_STATUS_OK) { *pConnectivity = P2P_CONNECTIVITY_NVLINK; + *pP2PAtomicsCapStatus = NV0000_P2P_CAPS_STATUS_OK; return NV_OK; } } @@ -749,6 +803,7 @@ p2pGetCapsStatus { *pP2PReadCapStatus = NV0000_P2P_CAPS_STATUS_NOT_SUPPORTED; *pP2PWriteCapStatus = NV0000_P2P_CAPS_STATUS_NOT_SUPPORTED; + *pP2PAtomicsCapStatus = NV0000_P2P_CAPS_STATUS_NOT_SUPPORTED; return NV_OK; } } @@ -761,6 +816,7 @@ p2pGetCapsStatus (*pP2PReadCapStatus == NV0000_P2P_CAPS_STATUS_OK)) { *pConnectivity = P2P_CONNECTIVITY_NVLINK_INDIRECT; + *pP2PAtomicsCapStatus = NV0000_P2P_CAPS_STATUS_OK; return NV_OK; } } @@ -780,14 +836,16 @@ p2pGetCapsStatus { NvU8 bar1P2PWriteCapStatus = *pP2PWriteCapStatus; NvU8 bar1P2PReadCapStatus = *pP2PReadCapStatus; + NvU8 bar1P2PAtomicsCapStatus = NV0000_P2P_CAPS_STATUS_NOT_SUPPORTED; *pConnectivity = P2P_CONNECTIVITY_PCIE_PROPRIETARY; if (_kp2pCapsGetStatusOverPcieBar1(gpuMask, &bar1P2PWriteCapStatus, - &bar1P2PReadCapStatus, bCommonSwitchFound) == NV_OK) + &bar1P2PReadCapStatus, &bar1P2PAtomicsCapStatus, bCommonSwitchFound) == NV_OK) { *pP2PWriteCapStatus = bar1P2PWriteCapStatus; *pP2PReadCapStatus = bar1P2PReadCapStatus; + *pP2PAtomicsCapStatus = bar1P2PAtomicsCapStatus; *pConnectivity = P2P_CONNECTIVITY_PCIE_BAR1; } diff --git a/src/nvidia/src/kernel/platform/sli/sli.c b/src/nvidia/src/kernel/platform/sli/sli.c index e2214adf23..00be72eb2e 100644 --- a/src/nvidia/src/kernel/platform/sli/sli.c +++ b/src/nvidia/src/kernel/platform/sli/sli.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1999-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1999-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -192,10 +192,9 @@ static NvU32 RmRunSLISupportCheck NvU32 numXWayValidConfigs; NvU32 nWay = 0; - // RMCONFIG: is SLI enabled in this build? - OBJSYS *pSys = SYS_GET_INSTANCE(); + if (IS_VIRTUAL(pGpu) || IS_GSP_CLIENT(pGpu)) { gpuSliStatus |= NV0000_CTRL_SLI_STATUS_GPU_NOT_SUPPORTED; diff --git a/src/nvidia/src/kernel/rmapi/alloc_free.c b/src/nvidia/src/kernel/rmapi/alloc_free.c index 7c9da7bb24..42f1c9e4d9 100644 --- a/src/nvidia/src/kernel/rmapi/alloc_free.c +++ b/src/nvidia/src/kernel/rmapi/alloc_free.c @@ -35,6 +35,7 @@ #include "virtualization/hypervisor/hypervisor.h" #include "gpu_mgr/gpu_mgr.h" #include "platform/sli/sli.h" +#include "kernel/gpu/gsp/gsp_trace_rats_macro.h" #include "kernel/gpu/mig_mgr/kernel_mig_manager.h" @@ -557,12 +558,6 @@ _serverAlloc_ValidateVgpu const NvU32 flags ) { - // - // Get any GPU to check environmental properties - // Assume: In multi-vGPU systems, no mix and matching SRIOV and non-SRIOV GPUs. - // Assume: This OBJGPU will only used to read system properties. - // - OBJGPU *pGpu = gpumgrGetSomeGpu(); // Check whether context is already sufficiently privileged if (flags & RS_FLAGS_ALLOC_PRIVILEGED) @@ -573,15 +568,6 @@ _serverAlloc_ValidateVgpu } } - // Check whether object is allowed in current environment - if - ( - (IS_SRIOV_WITH_VGPU_GSP_ENABLED(pGpu) && (flags & RS_FLAGS_ALLOC_CPU_PLUGIN_FOR_VGPU_GSP)) - ) - { - return NV_TRUE; - } - return NV_FALSE; } @@ -1254,7 +1240,6 @@ rmapiAllocWithSecInfo pRightsRequested, *pSecInfo); - // // If hClient is allocated behind GPU locks, client is marked as internal // @@ -1618,18 +1603,13 @@ serverAllocResourceLookupLockFlags LOCK_ACCESS_TYPE *pAccess ) { + OBJSYS *pSys = SYS_GET_INSTANCE(); NV_ASSERT_OR_RETURN(pAccess != NULL, NV_ERR_INVALID_ARGUMENT); if (lock == RS_LOCK_TOP) { RS_RESOURCE_DESC *pResDesc; - if (!serverSupportsReadOnlyLock(&g_resServ, RS_LOCK_TOP, RS_API_ALLOC_RESOURCE)) - { - *pAccess = LOCK_ACCESS_WRITE; - return NV_OK; - } - pResDesc = RsResInfoByExternalClassId(pParams->externalClassId); if (pResDesc == NULL) @@ -1642,6 +1622,23 @@ serverAllocResourceLookupLockFlags else *pAccess = LOCK_ACCESS_WRITE; + if ((pResDesc->flags & RS_FLAGS_FORCE_ACQUIRE_RO_API_LOCK_ON_ALLOC_FREE) != 0 && + pSys->getProperty(pSys, PDB_PROP_SYS_ENABLE_FORCE_SHARED_LOCK)) + { + // + // If the force acquire RO flag is set then ignore module parameter + // setting and always use RO. + // + *pAccess = LOCK_ACCESS_READ; + return NV_OK; + } + + if (!serverSupportsReadOnlyLock(&g_resServ, RS_LOCK_TOP, RS_API_ALLOC_RESOURCE)) + { + *pAccess = LOCK_ACCESS_WRITE; + return NV_OK; + } + return NV_OK; } @@ -1660,13 +1657,35 @@ serverFreeResourceLookupLockFlags RsServer *pServer, RS_LOCK_ENUM lock, RS_RES_FREE_PARAMS_INTERNAL *pParams, - LOCK_ACCESS_TYPE *pAccess + LOCK_ACCESS_TYPE *pAccess, + NvBool *pbSupportForceROLock ) { + OBJSYS *pSys = SYS_GET_INSTANCE(); + NvU32 flags; NV_ASSERT_OR_RETURN(pAccess != NULL, NV_ERR_INVALID_ARGUMENT); *pAccess = (serverSupportsReadOnlyLock(pServer, lock, RS_API_FREE_RESOURCE)) ? LOCK_ACCESS_READ : LOCK_ACCESS_WRITE; + + *pbSupportForceROLock = pSys->getProperty(pSys, PDB_PROP_SYS_ENABLE_FORCE_SHARED_LOCK); + + if (pParams->pResourceRef != NULL) + { + // + // If pResourceRef is set, check for the explicit RO opt-in flag that + // some resources set as a transition before enabling RO across the + // board. + // + // bug 4283710 - [RM][Locking] Allow RMAPI to take API lock in reader's mode by default. + // + flags = pParams->pResourceRef->pResourceDesc->flags; + if ((flags & RS_FLAGS_FORCE_ACQUIRE_RO_API_LOCK_ON_ALLOC_FREE) != 0 && + (*pbSupportForceROLock)) + { + *pAccess = LOCK_ACCESS_READ; + } + } return NV_OK; } diff --git a/src/nvidia/src/kernel/rmapi/client.c b/src/nvidia/src/kernel/rmapi/client.c index 52c974fba1..679a6f5926 100644 --- a/src/nvidia/src/kernel/rmapi/client.c +++ b/src/nvidia/src/kernel/rmapi/client.c @@ -70,8 +70,9 @@ rmclientConstruct_IMPL // Bug 4193761 - allow internal clients to be created with the GPU lock, // GR-2409 will remove the possible race condition with the client list. // - LOCK_ASSERT_AND_RETURN(rmapiLockIsWriteOwner() || - (serverIsClientInternal(&g_resServ, pRsClient->hClient) && rmGpuLockIsOwner())); + NV_ASSERT_OR_RETURN(rmapiLockIsWriteOwner() || + (serverIsClientInternal(&g_resServ, pRsClient->hClient) && rmGpuLockIsOwner()), + NV_ERR_INVALID_LOCK_STATE); if (RMCFG_FEATURE_PLATFORM_GSP) { @@ -945,25 +946,6 @@ NvBool rmclientIsCapable_IMPL return _rmclientIsCapable(hClient, capability); } -// -// RS-TODO: Delete this function once the RM Capabilities framework is in place. -// JIRA GR-139 -// -NvBool rmclientIsCapableByHandle -( - NvHandle hClient, - NvU32 capability -) -{ - RmClient *pClient = serverutilGetClientUnderLock(hClient); - if (pClient == NULL) - { - return NV_FALSE; - } - - return rmclientIsCapable(pClient, capability); -} - /** * * Register a client with a user info list diff --git a/src/nvidia/src/kernel/rmapi/client_resource.c b/src/nvidia/src/kernel/rmapi/client_resource.c index 73deb5ccf1..bb7a65e693 100644 --- a/src/nvidia/src/kernel/rmapi/client_resource.c +++ b/src/nvidia/src/kernel/rmapi/client_resource.c @@ -143,15 +143,16 @@ cliresAccessCallback_IMPL // Client resource's access callback will grant any rights here to any resource it owns switch (accessRight) { + case RS_ACCESS_PERFMON: case RS_ACCESS_NICE: { - // Grant if the caller satisfies osAllowPriorityOverride - return osAllowPriorityOverride(); + return osCheckAccess(accessRight); + } + default: + { + return NV_FALSE; } } - - // Delegate to superclass - return resAccessCallback_IMPL(staticCast(pRmCliRes, RsResource), pInvokingClient, pAllocParams, accessRight); } NvBool @@ -377,11 +378,11 @@ CliGetSystemP2pCaps NvU32 gpuMask = 0; NvU32 localGpuIndex, peerGpuIndex; NvU32 i; - NvU8 p2pWriteCapStatus, p2pReadCapStatus; + NvU8 p2pWriteCapStatus, p2pReadCapStatus, p2pAtomicCapStatus; NV_STATUS rmStatus = NV_OK; P2P_CONNECTIVITY connectivity; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if ((gpuCount == 0) || (gpuCount > NV0000_CTRL_SYSTEM_MAX_ATTACHED_GPUS)) { @@ -455,7 +456,7 @@ CliGetSystemP2pCaps } rmStatus = p2pGetCapsStatus(gpuMask, &p2pWriteCapStatus, - &p2pReadCapStatus, &connectivity + &p2pReadCapStatus, &p2pAtomicCapStatus, &connectivity ); if (rmStatus != NV_OK) { @@ -470,7 +471,8 @@ CliGetSystemP2pCaps if (p2pCaps != NULL) { *p2pCaps |= REF_DEF(NV0000_CTRL_SYSTEM_GET_P2P_CAPS_NVLINK_SUPPORTED, _TRUE); - *p2pCaps |= REF_DEF(NV0000_CTRL_SYSTEM_GET_P2P_CAPS_ATOMICS_SUPPORTED, _TRUE); + *p2pCaps |= (p2pAtomicCapStatus == NV0000_P2P_CAPS_STATUS_OK) ? + REF_DEF(NV0000_CTRL_SYSTEM_GET_P2P_CAPS_ATOMICS_SUPPORTED, _TRUE) : 0; *p2pCaps |= REF_DEF(NV0000_CTRL_SYSTEM_GET_P2P_CAPS_READS_SUPPORTED, _TRUE); *p2pCaps |= REF_DEF(NV0000_CTRL_SYSTEM_GET_P2P_CAPS_WRITES_SUPPORTED, _TRUE); } @@ -478,7 +480,10 @@ CliGetSystemP2pCaps if (p2pCapsStatus != NULL) { p2pCapsStatus[NV0000_CTRL_P2P_CAPS_INDEX_NVLINK] = NV0000_P2P_CAPS_STATUS_OK; - p2pCapsStatus[NV0000_CTRL_P2P_CAPS_INDEX_ATOMICS] = NV0000_P2P_CAPS_STATUS_OK; + if (p2pAtomicCapStatus == NV0000_P2P_CAPS_STATUS_OK) + { + p2pCapsStatus[NV0000_CTRL_P2P_CAPS_INDEX_ATOMICS] = NV0000_P2P_CAPS_STATUS_OK; + } } // Get the optimal CEs for P2P read/write for 1 or 2 gpu masks only @@ -512,6 +517,8 @@ CliGetSystemP2pCaps *p2pCaps |= (p2pWriteCapStatus == NV0000_P2P_CAPS_STATUS_OK) ? REF_DEF(NV0000_CTRL_SYSTEM_GET_P2P_CAPS_WRITES_SUPPORTED, _TRUE) : 0; *p2pCaps |= REF_DEF(NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PCI_SUPPORTED, _TRUE); + *p2pCaps |= (p2pAtomicCapStatus == NV0000_P2P_CAPS_STATUS_OK) ? + REF_DEF(NV0000_CTRL_SYSTEM_GET_P2P_CAPS_ATOMICS_SUPPORTED, _TRUE) : 0; if (connectivity == P2P_CONNECTIVITY_PCIE_BAR1) { @@ -526,6 +533,10 @@ CliGetSystemP2pCaps if (p2pCapsStatus != NULL) { p2pCapsStatus[NV0000_CTRL_P2P_CAPS_INDEX_PCI] = NV0000_P2P_CAPS_STATUS_OK; + if (p2pAtomicCapStatus == NV0000_P2P_CAPS_STATUS_OK) + { + p2pCapsStatus[NV0000_CTRL_P2P_CAPS_INDEX_ATOMICS] = NV0000_P2P_CAPS_STATUS_OK; + } if (connectivity == P2P_CONNECTIVITY_PCIE_BAR1) { @@ -559,13 +570,17 @@ CliGetSystemP2pCaps { *p2pCaps |= REF_DEF(NV0000_CTRL_SYSTEM_GET_P2P_CAPS_INDIRECT_READS_SUPPORTED, _TRUE); *p2pCaps |= REF_DEF(NV0000_CTRL_SYSTEM_GET_P2P_CAPS_INDIRECT_WRITES_SUPPORTED, _TRUE); - *p2pCaps |= REF_DEF(NV0000_CTRL_SYSTEM_GET_P2P_CAPS_INDIRECT_ATOMICS_SUPPORTED, _TRUE); + *p2pCaps |= (p2pAtomicCapStatus == NV0000_P2P_CAPS_STATUS_OK) ? + REF_DEF(NV0000_CTRL_SYSTEM_GET_P2P_CAPS_INDIRECT_ATOMICS_SUPPORTED, _TRUE) : 0; *p2pCaps |= REF_DEF(NV0000_CTRL_SYSTEM_GET_P2P_CAPS_INDIRECT_NVLINK_SUPPORTED, _TRUE); } if (p2pCapsStatus != NULL) { - p2pCapsStatus[NV0000_CTRL_P2P_CAPS_INDEX_ATOMICS] = NV0000_P2P_CAPS_STATUS_OK; + if (p2pAtomicCapStatus == NV0000_P2P_CAPS_STATUS_OK) + { + p2pCapsStatus[NV0000_CTRL_P2P_CAPS_INDEX_ATOMICS] = NV0000_P2P_CAPS_STATUS_OK; + } p2pCapsStatus[NV0000_CTRL_P2P_CAPS_INDEX_NVLINK] = NV0000_P2P_CAPS_STATUS_OK; } @@ -578,7 +593,8 @@ CliGetSystemP2pCaps if (p2pCaps != NULL) { - *p2pCaps |= REF_DEF(NV0000_CTRL_SYSTEM_GET_P2P_CAPS_ATOMICS_SUPPORTED, _TRUE); + *p2pCaps |= (p2pAtomicCapStatus == NV0000_P2P_CAPS_STATUS_OK) ? + REF_DEF(NV0000_CTRL_SYSTEM_GET_P2P_CAPS_ATOMICS_SUPPORTED, _TRUE) : 0; *p2pCaps |= (p2pReadCapStatus == NV0000_P2P_CAPS_STATUS_OK) ? REF_DEF(NV0000_CTRL_SYSTEM_GET_P2P_CAPS_READS_SUPPORTED, _TRUE) : 0; *p2pCaps |= (p2pWriteCapStatus == NV0000_P2P_CAPS_STATUS_OK) ? @@ -588,7 +604,10 @@ CliGetSystemP2pCaps if (p2pCapsStatus != NULL) { - p2pCapsStatus[NV0000_CTRL_P2P_CAPS_INDEX_ATOMICS] = NV0000_P2P_CAPS_STATUS_OK; + if (p2pAtomicCapStatus == NV0000_P2P_CAPS_STATUS_OK) + { + p2pCapsStatus[NV0000_CTRL_P2P_CAPS_INDEX_ATOMICS] = NV0000_P2P_CAPS_STATUS_OK; + } p2pCapsStatus[NV0000_CTRL_P2P_CAPS_INDEX_C2C] = NV0000_P2P_CAPS_STATUS_OK; } if (gpuCount == 1) @@ -680,7 +699,7 @@ _configCalculateSizes } -static NV_STATUS +static void _configUnpackStructure ( const char *pFormat, @@ -739,7 +758,8 @@ _configUnpackStructure break; default: - return NV_ERR_GENERIC; + NV_ASSERT(!"Bad pFormat argument"); + return; } *pUnpackedData++ = data; fields++; @@ -751,11 +771,9 @@ _configUnpackStructure if (pFieldsCount != NULL) *pFieldsCount = fields; - - return NV_OK; } -static NV_STATUS +static void configReadStructure ( NvU8 *pData, @@ -772,7 +790,7 @@ configReadStructure _configCalculateSizes(pFormat, &packed_size, &unpacked_bytes); pPacked_data = &pData[offset]; - return _configUnpackStructure(pFormat, pPacked_data, pStructure, + _configUnpackStructure(pFormat, pPacked_data, pStructure, &unpacked_bytes, NULL); } @@ -803,7 +821,7 @@ cliresCtrlCmdSystemGetFeatures_IMPL NV_ASSERT_OR_RETURN(pSys != NULL, NV_ERR_INVALID_STATE); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); gpumgrGetGpuAttachInfo(NULL, &gpuMask); while ((pGpu = gpumgrGetNextGpu(gpuMask, &gpuIndex)) != NULL) @@ -853,7 +871,7 @@ cliresCtrlCmdSystemGetBuildVersionV2_IMPL NV0000_CTRL_SYSTEM_GET_BUILD_VERSION_V2_PARAMS *pParams ) { - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); ct_assert(sizeof(NV_VERSION_STRING) <= sizeof(pParams->driverVersionBuffer)); ct_assert(sizeof(NV_BUILD_BRANCH_VERSION) <= sizeof(pParams->versionBuffer)); @@ -1048,9 +1066,12 @@ cliresCtrlCmdSystemGetCpuInfo_IMPL NV0000_CTRL_SYSTEM_GET_CPU_INFO_PARAMS *pCpuInfoParams ) { - OBJSYS *pSys = SYS_GET_INSTANCE(); + OBJSYS *pSys = SYS_GET_INSTANCE(); + OBJGPU *pGpuIter = NULL; + NvU32 gpuMask = 0U; + NvU32 gpuIndex = 0U; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); pCpuInfoParams->type = pSys->cpuInfo.type; pCpuInfoParams->capabilities = pSys->cpuInfo.caps; @@ -1069,6 +1090,17 @@ cliresCtrlCmdSystemGetCpuInfo_IMPL sizeof (pCpuInfoParams->name), pSys->cpuInfo.name, sizeof (pCpuInfoParams->name)); + pCpuInfoParams->selfHostedSocType = NV0000_CTRL_SYSTEM_SH_SOC_TYPE_NA; + gpumgrGetGpuAttachInfo(NULL, &gpuMask); + while ((pGpuIter = gpumgrGetNextGpu(gpuMask, &gpuIndex)) != NULL) + { + pCpuInfoParams->selfHostedSocType = gpuDetermineSelfHostedSocType_HAL(pGpuIter); + if (pCpuInfoParams->selfHostedSocType != NV0000_CTRL_SYSTEM_SH_SOC_TYPE_NA) + { + break; + } + } + return NV_OK; } @@ -1089,7 +1121,7 @@ cliresCtrlCmdSystemGetChipsetInfo_IMPL OBJSYS *pSys = SYS_GET_INSTANCE(); OBJCL *pCl = SYS_GET_CL(pSys); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); pChipsetInfo->flags = 0; @@ -1223,7 +1255,7 @@ cliresCtrlCmdSystemGetClassList_IMPL { NV_STATUS status; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); status = classGetSystemClasses(pParams); @@ -1290,7 +1322,7 @@ cliresCtrlCmdSystemGetPlatformType_IMPL OBJSYS *pSys = SYS_GET_INSTANCE(); OBJPFM *pPfm = SYS_GET_PFM(pSys); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (pPfm->getProperty(pPfm, PDB_PROP_PFM_IS_TOSHIBA_MOBILE)) { @@ -1386,7 +1418,7 @@ cliresCtrlCmdGpuGetAttachedIds_IMPL NV0000_CTRL_GPU_GET_ATTACHED_IDS_PARAMS *pGpuAttachedIds ) { - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); return gpumgrGetAttachedGpuIds(pGpuAttachedIds); } @@ -1404,7 +1436,7 @@ cliresCtrlCmdGpuGetIdInfo_IMPL NV0000_CTRL_GPU_GET_ID_INFO_PARAMS *pGpuIdInfoParams ) { - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); return gpumgrGetGpuIdInfo(pGpuIdInfoParams); } @@ -1416,7 +1448,7 @@ cliresCtrlCmdGpuGetIdInfoV2_IMPL NV0000_CTRL_GPU_GET_ID_INFO_V2_PARAMS *pGpuIdInfoParams ) { - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); return gpumgrGetGpuIdInfoV2(pGpuIdInfoParams); } @@ -1435,7 +1467,7 @@ cliresCtrlCmdGpuGetInitStatus_IMPL NV0000_CTRL_GPU_GET_INIT_STATUS_PARAMS *pGpuInitStatusParams ) { - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); return gpumgrGetGpuInitStatus(pGpuInitStatusParams); } @@ -1454,7 +1486,7 @@ cliresCtrlCmdGpuGetDeviceIds_IMPL NV0000_CTRL_GPU_GET_DEVICE_IDS_PARAMS *pDeviceIdsParams ) { - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); pDeviceIdsParams->deviceIds = gpumgrGetDeviceInstanceMask(); @@ -1475,7 +1507,7 @@ cliresCtrlCmdGpuGetActiveDeviceIds_IMPL NV0000_CTRL_GPU_GET_ACTIVE_DEVICE_IDS_PARAMS *pActiveDeviceIdsParams ) { - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); return gpumgrCacheGetActiveDeviceIds(pActiveDeviceIdsParams); } @@ -1524,7 +1556,7 @@ cliresCtrlCmdGpuGetProbedIds_IMPL NV0000_CTRL_GPU_GET_PROBED_IDS_PARAMS *pGpuProbedIds ) { - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); return gpumgrGetProbedGpuIds(pGpuProbedIds); } @@ -1573,7 +1605,7 @@ cliresCtrlCmdGpuAttachIds_IMPL NvU32 i; NV_STATUS status = NV_OK; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (pGpuAttachIds->gpuIds[0] == NV0000_CTRL_GPU_ATTACH_ALL_PROBED_IDS) { @@ -1632,7 +1664,7 @@ cliresCtrlCmdGpuAsyncAttachId_IMPL NV_STATUS status = NV_OK; NV0000_CTRL_GPU_GET_PROBED_IDS_PARAMS *pGpuProbedIds = NULL; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); pGpuProbedIds = portMemAllocNonPaged(sizeof(*pGpuProbedIds)); if (pGpuProbedIds == NULL) @@ -1705,7 +1737,7 @@ cliresCtrlCmdGpuDetachIds_IMPL NvU32 i, j; NV_STATUS status = NV_OK; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (pGpuDetachIds->gpuIds[0] == NV0000_CTRL_GPU_DETACH_ALL_ATTACHED_IDS) { @@ -1839,7 +1871,7 @@ cliresCtrlCmdGpuAcctGetProcAccountingInfo_IMPL RmCtrlParams *pRmCtrlParams; RM_API *pRmApi; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); pGpu = gpumgrGetGpuFromId(pAcctInfoParams->gpuId); if (pGpu == NULL) @@ -1892,7 +1924,7 @@ cliresCtrlCmdGpuAcctSetAccountingState_IMPL RmCtrlParams *pRmCtrlParams; RM_API *pRmApi; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); pGpu = gpumgrGetGpuFromId(pParams->gpuId); if (pGpu == NULL) @@ -1967,7 +1999,7 @@ cliresCtrlCmdGpuAcctClearAccountingData_IMPL NV_STATUS status = NV_OK; RM_API *pRmApi; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); pGpu = gpumgrGetGpuFromId(pParams->gpuId); if (pGpu == NULL) @@ -2021,7 +2053,7 @@ cliresCtrlCmdGpuAcctGetAccountingState_IMPL NV_STATUS status = NV_OK; RM_API *pRmApi; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); pGpu = gpumgrGetGpuFromId(pParams->gpuId); if (pGpu == NULL) @@ -2075,7 +2107,7 @@ cliresCtrlCmdGpuAcctGetAccountingPids_IMPL NV_STATUS status = NV_OK; RM_API *pRmApi; - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); pGpu = gpumgrGetGpuFromId(pAcctPidsParams->gpuId); if (pGpu == NULL) @@ -3049,6 +3081,291 @@ cliresCtrlCmdSystemNVPCFGetPowerModeInfo_IMPL break; } + case NVPCF0100_CTRL_CONFIG_DSM_2X_FUNC_GET_DC_SYSTEM_POWER_LIMITS_CASE: + { + NvU8 *pData = NULL; + NvU32 i; + NvU8 prevThreshold = 99; + NvU8 version; + NvU16 size = NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_1X_HEADER_SIZE_04 + + (NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_VERSION_10_MAX_ENTRIES * + NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_1X_ENTRY_SIZE_11); + + const char *szFmtHeader = NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_1X_HEADER_FMT_SIZE_02; + const char *szFmtEntry; + DC_SYSTEM_POWER_LIMITS_HEADER_1X header1x; + DC_SYSTEM_POWER_LIMITS_HEADER_2X header2x; + + // Allocate buffer of maximum possible size (update size above as spec changes) + pData = portMemAllocNonPaged(size); + if (pData == NULL) + { + status = NV_ERR_NO_MEMORY; + NV_PRINTF(LEVEL_ERROR, "ERROR: NVPCF0100_CTRL_CONFIG_DSM_2X_FUNC_GET_DC_SYSTEM_POWER_LIMITS_CASE: mem alloc failed\n"); + goto nvpcf2xGetSystemPowerTable_exit; + } + + if ((rc = osCallACPI_DSM(pGpu, + ACPI_DSM_FUNCTION_NVPCF_2X, + NVPCF0100_CTRL_CONFIG_DSM_2X_FUNC_GET_DC_SYSTEM_POWER_LIMITS_TABLE, + (NvU32 *)pData, + &size)) != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, + "Unable to retrieve NVPCF System power limits table data. Possibly not supported by SBIOS" + "rc = %x\n", rc); + status = NV_ERR_NOT_SUPPORTED; + goto nvpcf2xGetSystemPowerTable_exit; + } + + // Read header version + configReadStructure(pData, &version, 0, "1b"); + + if (version >= NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_VERSION_20) + { + pParams->bIsTspSupported = NV_TRUE; + } + else + { + pParams->bIsTspSupported = NV_FALSE; + } + + // Set the System Power Limits (Battery State of Charge) table version implemented by the SBIOS + pParams->sysPwrLimitsTableVersion = version; + pParams->type = NVPCF_CTRL_SYSPWRLIMIT_TYPE_BASE; + + switch (version) + { + case NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_VERSION_10: + { + configReadStructure(pData, &header1x, 0, NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_1X_HEADER_FMT_SIZE_02); + + // Adjust header1x format string based on header1x size + if (header1x.headerSize == NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_1X_HEADER_SIZE_04) + { + szFmtHeader = NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_1X_HEADER_FMT_SIZE_04; + } + else + { + NV_PRINTF(LEVEL_ERROR, "Invalid Header Size.\n"); + NV_PRINTF(LEVEL_ERROR, "headerSize = %d\n", header1x.headerSize); + status = NV_ERR_INVALID_STATE; + goto nvpcf2xGetSystemPowerTable_exit; + } + + // Re-read header1x using correct format string + configReadStructure(pData, &header1x, 0, szFmtHeader); + + // Copy out any header1x data... + // Set entry format string to match entry size + if (header1x.entrySize == NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_1X_ENTRY_SIZE_11) + { + szFmtEntry = NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_1X_ENTRY_FMT_SIZE_11; + } + else + { + NV_PRINTF(LEVEL_ERROR, "Invalid Entry Size.\n"); + NV_PRINTF(LEVEL_ERROR, "entrySize = %d\n", header1x.entrySize); + status = NV_ERR_INVALID_STATE; + goto nvpcf2xGetSystemPowerTable_exit; + } + + // Bail if invalid number of entries specified + if ((header1x.entryCount > NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_VERSION_10_MAX_ENTRIES) || + (header1x.entryCount == 0)) + { + NV_PRINTF(LEVEL_ERROR, "Invalid Entry Count.\n"); + NV_PRINTF(LEVEL_ERROR, "entryCount = %d\n", header1x.entryCount); + status = NV_ERR_INVALID_STATE; + goto nvpcf2xGetSystemPowerTable_exit; + } + + // Sanity check + if (header1x.entryCount > NV_ARRAY_ELEMENTS(pParams->sysPwrGetInfo)) + { + status = NV_ERR_INVALID_STATE; + goto nvpcf2xGetSystemPowerTable_exit; + } + + // Read out all entries + for (i = 0; i < header1x.entryCount; i++) + { + DC_SYSTEM_POWER_LIMITS_ENTRY_1X sbiosEntry = { 0 }; + + configReadStructure(pData, &sbiosEntry, + header1x.headerSize + (i * header1x.entrySize), + szFmtEntry); + + // Copy out data + pParams->sysPwrGetInfo[i].batteryStateOfChargePercent = (NvU8)sbiosEntry.batteryStateOfChargePercent; + pParams->sysPwrGetInfo[i].batteryCurrentLimitmA = sbiosEntry.batteryCurrentLimitmA; + pParams->sysPwrGetInfo[i].restOfSytemReservedPowermW = sbiosEntry.restOfSytemReservedPowermW; + pParams->sysPwrGetInfo[i].minCpuTdpmW = sbiosEntry.minCpuTdpmW; + pParams->sysPwrGetInfo[i].maxCpuTdpmW = sbiosEntry.maxCpuTdpmW; + pParams->sysPwrGetInfo[i].shortTimescaleBatteryCurrentLimitmA = 0; + } + pParams->sysPwrIndex = header1x.entryCount; + + // Sanity check + for (i = 0; i < header1x.entryCount; i++) + { + // First entry must have a threshold of 100%, assuming i 0 is first entry as we don't support skip entries in table spec + if (i == 0) + { + if (pParams->sysPwrGetInfo[0].batteryStateOfChargePercent != 100) + { + NV_PRINTF(LEVEL_ERROR, "Invalid threshold for entry 0. Must be 100 percent \n"); + NV_PRINTF(LEVEL_ERROR, "threshold = %d \n", pParams->sysPwrGetInfo[i].batteryStateOfChargePercent); + status = NV_ERR_INVALID_STATE; + goto nvpcf2xGetSystemPowerTable_exit; + } + } + // Capacity thresholds should be strictly decreasing entry to entry + else if (pParams->sysPwrGetInfo[i].batteryStateOfChargePercent >= prevThreshold) + { + NV_PRINTF(LEVEL_ERROR, "limit[%d] has threshold not strictly smaller than limit[%d] \n", i, i-1); + NV_PRINTF(LEVEL_ERROR, "%d >= %d \n", pParams->sysPwrGetInfo[i].batteryStateOfChargePercent, prevThreshold); + status = NV_ERR_INVALID_STATE; + goto nvpcf2xGetSystemPowerTable_exit; + } + prevThreshold = pParams->sysPwrGetInfo[i].batteryStateOfChargePercent; + } + break; + } + case NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_VERSION_20: + { + configReadStructure(pData, &header2x, 0, NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_2X_HEADER_FMT_SIZE_02); + + // Adjust header2x format string based on header2x size + if (header2x.headerSize == NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_2X_HEADER_SIZE_04) + { + szFmtHeader = NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_2X_HEADER_FMT_SIZE_04; + } + else + { + NV_PRINTF(LEVEL_ERROR, "Invalid Header Size.\n"); + NV_PRINTF(LEVEL_ERROR, "headerSize = %d\n", header2x.headerSize); + status = NV_ERR_INVALID_STATE; + goto nvpcf2xGetSystemPowerTable_exit; + } + + // Re-read header2x using correct format string + configReadStructure(pData, &header2x, 0, szFmtHeader); + + // Copy out any header2x data... + // Set entry format string to match entry size + if (header2x.entrySize == NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_2X_ENTRY_SIZE_09) + { + szFmtEntry = NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_2X_ENTRY_FMT_SIZE_09; + } + else + { + NV_PRINTF(LEVEL_ERROR, "Invalid Entry Size.\n"); + NV_PRINTF(LEVEL_ERROR, "entrySize = %d \n", header2x.entrySize); + status = NV_ERR_INVALID_STATE; + goto nvpcf2xGetSystemPowerTable_exit; + } + + // Bail if invalid number of entries specified + if ((header2x.entryCount > NVPCF_DC_SYSTEM_POWER_LIMITS_TABLE_VERSION_20_MAX_ENTRIES) || + (header2x.entryCount == 0)) + { + NV_PRINTF(LEVEL_ERROR, "Invalid Entry Count.\n"); + NV_PRINTF(LEVEL_ERROR, "entryCount = %d\n", header2x.entryCount); + status = NV_ERR_INVALID_STATE; + goto nvpcf2xGetSystemPowerTable_exit; + } + + // Sanity check + if (header2x.entryCount > NV_ARRAY_ELEMENTS(pParams->sysPwrGetInfo)) + { + status = NV_ERR_INVALID_STATE; + goto nvpcf2xGetSystemPowerTable_exit; + } + + // Read out all entries + for (i = 0; i < header2x.entryCount; i++) + { + DC_SYSTEM_POWER_LIMITS_ENTRY_2X sbiosEntry = { 0 }; + + configReadStructure(pData, &sbiosEntry, + header2x.headerSize + (i * header2x.entrySize), + szFmtEntry); + + // Copy out data + pParams->sysPwrGetInfo[i].batteryStateOfChargePercent = (NvU8)sbiosEntry.batteryStateOfChargePercent; + pParams->sysPwrGetInfo[i].batteryCurrentLimitmA = sbiosEntry.longTimescaleBatteryCurrentLimitmA; + pParams->sysPwrGetInfo[i].restOfSytemReservedPowermW = 0; + pParams->sysPwrGetInfo[i].minCpuTdpmW = 0; + pParams->sysPwrGetInfo[i].maxCpuTdpmW = NV_U32_MAX; + pParams->sysPwrGetInfo[i].shortTimescaleBatteryCurrentLimitmA = sbiosEntry.shortTimescaleBatteryCurrentLimitmA; + } + pParams->sysPwrIndex = header2x.entryCount; + + // Sanity check + for (i = 0; i < header2x.entryCount; i++) + { + // First entry must have a threshold of 100%, assuming i 0 is first entry as we don't support skip entries in table spec + if (i == 0) + { + if (pParams->sysPwrGetInfo[0].batteryStateOfChargePercent != 100) + { + NV_PRINTF(LEVEL_ERROR, "Invalid threshold for entry 0. Must be 100 percent \n"); + NV_PRINTF(LEVEL_ERROR, "threshold = %d \n", pParams->sysPwrGetInfo[i].batteryStateOfChargePercent); + status = NV_ERR_INVALID_STATE; + goto nvpcf2xGetSystemPowerTable_exit; + } + } + // Capacity thresholds should be strictly decreasing entry to entry + else if (pParams->sysPwrGetInfo[i].batteryStateOfChargePercent >= prevThreshold) + { + NV_PRINTF(LEVEL_ERROR, "limit[%d] has threshold not strictly smaller than limit[%d] \n", i, i-1); + NV_PRINTF(LEVEL_ERROR, "%d >= %d \n", pParams->sysPwrGetInfo[i].batteryStateOfChargePercent, prevThreshold); + status = NV_ERR_INVALID_STATE; + goto nvpcf2xGetSystemPowerTable_exit; + } + prevThreshold = pParams->sysPwrGetInfo[i].batteryStateOfChargePercent; + } + break; + } + } +nvpcf2xGetSystemPowerTable_exit: + portMemFree(pData); + break; + } + case NVPCF0100_CTRL_CONFIG_DSM_2X_FUNC_CPU_TDP_LIMIT_CONTROL_CASE: + { + CPU_TDP_LIMIT_CONTROL_HEADER_1X_PACKED header = { 0 }; + CPU_TDP_LIMIT_CONTROL_BODY_1X_PACKED body = { 0 }; + NvU16 dataSize; + NvU8 data[7]; + + ct_assert(sizeof(data) == (sizeof(header) + sizeof(body))); + + header.version = NVPCF_CPU_TDP_LIMIT_CONTROL_TABLE_1X_VERSION; + header.headerSize = NVPCF_CPU_TDP_LIMIT_CONTROL_TABLE_1X_HEADER_SIZE_03; + header.bodySize = NVPCF_CPU_TDP_LIMIT_CONTROL_TABLE_1X_BODY_SIZE_04; + body.param0 = pParams->cpuTdpmw; + + dataSize = sizeof(header) + sizeof(body); + + portMemSet(data, 0, dataSize); + portMemCopy(data, sizeof(header), &header, sizeof(header)); + portMemCopy(data + sizeof(header), sizeof(body), &body, sizeof(body)); + + if ((rc = osCallACPI_DSM(pGpu, + ACPI_DSM_FUNCTION_NVPCF_2X, + NVPCF0100_CTRL_CONFIG_DSM_2X_FUNC_CPU_TDP_LIMIT_CONTROL, + (NvU32 *)&data, + &dataSize)) != NV_OK) + { + NV_PRINTF(LEVEL_WARNING, + "Unable to set CPU TDP Limit. Possibly not supported by SBIOS" + "rc = %x\n", rc); + status = NV_ERR_NOT_SUPPORTED; + } + break; + } default: { NV_PRINTF(LEVEL_INFO, "Inavlid NVPCF subFunc : 0x%x\n", pParams->subFunc); @@ -4466,7 +4783,7 @@ cliresCtrlCmdSyncGpuBoostInfo_IMPL OBJGPUBOOSTMGR *pBoostMgr = SYS_GET_GPUBOOSTMGR(pSys); NV_ASSERT_OR_RETURN(NULL != pParams, NV_ERR_INVALID_ARGUMENT); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (NULL == pBoostMgr) { @@ -4497,7 +4814,7 @@ cliresCtrlCmdSyncGpuBoostGroupCreate_IMPL OBJGPUBOOSTMGR *pBoostMgr = SYS_GET_GPUBOOSTMGR(pSys); NV_ASSERT_OR_RETURN(NULL != pParams, NV_ERR_INVALID_ARGUMENT); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // Start off with invalid boost group ID pParams->boostConfig.boostGroupId = NV0000_SYNC_GPU_BOOST_INVALID_GROUP_ID; @@ -4525,7 +4842,7 @@ cliresCtrlCmdSyncGpuBoostGroupDestroy_IMPL OBJGPUBOOSTMGR *pBoostMgr = SYS_GET_GPUBOOSTMGR(pSys); NV_ASSERT_OR_RETURN(NULL != pParams, NV_ERR_INVALID_ARGUMENT); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // Destroy the boost group status = gpuboostmgrDestroyGroup(pBoostMgr, pParams->boostGroupId); @@ -4549,7 +4866,7 @@ cliresCtrlCmdSyncGpuBoostGroupInfo_IMPL OBJGPUBOOSTMGR *pBoostMgr = SYS_GET_GPUBOOSTMGR(pSys); NV_ASSERT_OR_RETURN(NULL != pParams, NV_ERR_INVALID_ARGUMENT); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); status = gpuboostmgrQueryGroups(pBoostMgr, pParams); NV_ASSERT(NV_OK == status); @@ -4896,7 +5213,10 @@ cliresCtrlCmdClientSubscribeToImexChannel_IMPL // Same subscription if (pRmClient->imexChannel == channel) + { + pParams->channel = channel; return NV_OK; + } // For now, only one channel subscription is allowed per client. if (pRmClient->imexChannel != -1) @@ -4976,6 +5296,7 @@ cliresCtrlCmdGpuGetNvlinkBwMode_IMPL ) { pParams->mode = gpumgrGetGpuNvlinkBwMode(); + pParams->bwModeScope = gpumgrGetGpuNvlinkBwModeScope(); return NV_OK; } diff --git a/src/nvidia/src/kernel/rmapi/client_resource_sli.c b/src/nvidia/src/kernel/rmapi/client_resource_sli.c index b831be2a80..06968a4059 100644 --- a/src/nvidia/src/kernel/rmapi/client_resource_sli.c +++ b/src/nvidia/src/kernel/rmapi/client_resource_sli.c @@ -47,7 +47,7 @@ cliresCtrlCmdGpuGetVideoLinks_IMPL NV0000_CTRL_GPU_GET_VIDEO_LINKS_PARAMS *pParams ) { - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); return gpumgrGetSliLinks(pParams); } diff --git a/src/nvidia/src/kernel/rmapi/control.c b/src/nvidia/src/kernel/rmapi/control.c index ece89ba46d..7fa8da9e79 100644 --- a/src/nvidia/src/kernel/rmapi/control.c +++ b/src/nvidia/src/kernel/rmapi/control.c @@ -37,6 +37,7 @@ #include "gpu/gpu.h" #include "rmapi/rmapi_specific.h" #include "rmapi/rmapi_utils.h" +#include "kernel/gpu/gsp/gsp_trace_rats_macro.h" #include "ctrl/ctrl0000/ctrl0000gpuacct.h" // NV0000_CTRL_CMD_GPUACCT_* #include "ctrl/ctrl2080/ctrl2080tmr.h" // NV2080_CTRL_CMD_TIMER_SCHEDULE @@ -659,24 +660,6 @@ serverControl_ValidateVgpu } } - // - // If context is not privileged enough, check whether this - // control call is allowed in current hypervisor environment - // - if (!bPermissionGranted) - { - { - // For non-NV0000, identify current hypervisor environment and check for allow flag - if - ( - (IS_SRIOV_WITH_VGPU_GSP_ENABLED(pGpu) && (cookieFlags & RMCTRL_FLAGS_CPU_PLUGIN_FOR_VGPU_GSP)) - ) - { - bPermissionGranted = NV_TRUE; - } - } - } - return bPermissionGranted; } diff --git a/src/nvidia/src/kernel/rmapi/embedded_param_copy.c b/src/nvidia/src/kernel/rmapi/embedded_param_copy.c index 3b3b90894c..6f679d254a 100644 --- a/src/nvidia/src/kernel/rmapi/embedded_param_copy.c +++ b/src/nvidia/src/kernel/rmapi/embedded_param_copy.c @@ -408,17 +408,6 @@ NV_STATUS embeddedParamCopyIn(RMAPI_PARAM_COPY *paramCopies, RmCtrlParams *pRmCt sizeof(NV0080_CTRL_GR_INFO)); break; } - case NV0080_CTRL_CMD_FIFO_START_SELECTED_CHANNELS: - { - CHECK_PARAMS_OR_RETURN(pRmCtrlParams, NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS); - - RMAPI_PARAM_COPY_INIT(paramCopies[0], - ((NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS*)pParams)->fifoStartChannelList, - ((NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS*)pParams)->fifoStartChannelList, - ((NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS*)pParams)->fifoStartChannelListCount, - sizeof(NV0080_CTRL_FIFO_CHANNEL)); - break; - } case NV0080_CTRL_CMD_FIFO_GET_CAPS: { CHECK_PARAMS_OR_RETURN(pRmCtrlParams, NV0080_CTRL_FIFO_GET_CAPS_PARAMS); @@ -941,14 +930,6 @@ NV_STATUS embeddedParamCopyOut(RMAPI_PARAM_COPY *paramCopies, RmCtrlParams *pRmC ((NV0080_CTRL_GR_GET_INFO_PARAMS*)pParams)->grInfoList = paramCopies[0].pUserParams; break; } - case NV0080_CTRL_CMD_FIFO_START_SELECTED_CHANNELS: - { - CHECK_PARAMS_OR_RETURN(pRmCtrlParams, NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS); - - status = rmapiParamsRelease(¶mCopies[0]); - ((NV0080_CTRL_FIFO_START_SELECTED_CHANNELS_PARAMS*)pParams)->fifoStartChannelList = paramCopies[0].pUserParams; - break; - } case NV0080_CTRL_CMD_FIFO_GET_CAPS: { CHECK_PARAMS_OR_RETURN(pRmCtrlParams, NV0080_CTRL_FIFO_GET_CAPS_PARAMS); diff --git a/src/nvidia/src/kernel/rmapi/event.c b/src/nvidia/src/kernel/rmapi/event.c index 18e6012424..4275fcb9e0 100644 --- a/src/nvidia/src/kernel/rmapi/event.c +++ b/src/nvidia/src/kernel/rmapi/event.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -135,7 +135,7 @@ eventConstruct_IMPL // if (pGpu != NULL) { - RsResourceRef *pSourceRef; + RsResourceRef *pSourceRef = NULL; if (IS_GSP_CLIENT(pGpu)) { diff --git a/src/nvidia/src/kernel/rmapi/lock_stress.c b/src/nvidia/src/kernel/rmapi/lock_stress.c index 5c592c7221..a3fc22ebe1 100644 --- a/src/nvidia/src/kernel/rmapi/lock_stress.c +++ b/src/nvidia/src/kernel/rmapi/lock_stress.c @@ -194,7 +194,7 @@ updateLockStressCounters if (DRF_VAL(0100_CTRL, _GLOBAL_RMAPI, _LOCK_STRESS_COUNTER_ACTION, action) != 0) { // Assert that we hold the RW API lock here - LOCK_ASSERT_AND_RETURN(rmapiLockIsWriteOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsWriteOwner(), NV_ERR_INVALID_LOCK_STATE); if (DRF_VAL(0100_CTRL, _GLOBAL_RMAPI, _LOCK_STRESS_COUNTER_INCREMENT, action) != 0) g_LockStressCounter++; @@ -206,7 +206,7 @@ updateLockStressCounters { OBJGPU *pGpu; - LOCK_ASSERT_AND_RETURN(rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); pGpu = GPU_RES_GET_GPU(pResource); @@ -227,7 +227,7 @@ updateLockStressCounters // ordering issues so only assert if we aren't on the internal RM API path. // if (!serverIsClientInternal(&g_resServ, pClient->hClient)) - LOCK_ASSERT_AND_RETURN(serverIsClientLocked(&g_resServ, pClient->hClient)); + NV_ASSERT_OR_RETURN(serverIsClientLocked(&g_resServ, pClient->hClient), NV_ERR_INVALID_LOCK_STATE); pRmClient = dynamicCast(pClient, RmClient); @@ -245,7 +245,7 @@ updateLockStressCounters OBJGPU *pGpu; RmClient *pRmInternalClient; - LOCK_ASSERT_AND_RETURN(rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); pGpu = GPU_RES_GET_GPU(pResource); pRmInternalClient = serverutilGetClientUnderLock(pGpu->hInternalLockStressClient); @@ -387,7 +387,7 @@ updateLockStressCountersInternal // ordering issues so only assert if we aren't on the internal RM API path. // if (!serverIsClientInternal(&g_resServ, pClient->hClient)) - LOCK_ASSERT_AND_RETURN(serverIsClientLocked(&g_resServ, pClient->hClient)); + NV_ASSERT_OR_RETURN(serverIsClientLocked(&g_resServ, pClient->hClient), NV_ERR_INVALID_LOCK_STATE); if (pRmClient == NULL) return NV_ERR_INVALID_STATE; diff --git a/src/nvidia/src/kernel/rmapi/mapping_cpu.c b/src/nvidia/src/kernel/rmapi/mapping_cpu.c index 7ffbfd403f..78af35618b 100644 --- a/src/nvidia/src/kernel/rmapi/mapping_cpu.c +++ b/src/nvidia/src/kernel/rmapi/mapping_cpu.c @@ -354,22 +354,11 @@ memMap_IMPL // this function will transition to storing the mapping parameters onto // the FD. Also note: All mapping parameters are ignored (!). // - // For now, we're going to return the first page of the nvlink aperture - // mapping of this allocation. See nvidia_mmap_helper for establishment - // of direct mapping. - // + // TODO: refactor this to either use the new osMapMemoryArea interface or unify with kernel in osMapSystemMemory - rmStatus = osMapPciMemoryUser(pGpu->pOsGpuInfo, - ((NvUPtr)pKernelMemorySystem->coherentCpuFbBase + - (NvUPtr)memdescGetPhysAddr(pMemDesc, - AT_CPU, pMapParams->offset)), - pMapParams->length, - pMapParams->protect, - pMapParams->ppCpuVirtAddr, - &priv, - NV_MEMORY_UNCACHED); - if (rmStatus != NV_OK) - return rmStatus; + rmStatus = NV_OK; + *((NvU64*) pMapParams->ppCpuVirtAddr) = ((NvU64) pKernelMemorySystem->coherentCpuFbBase) + + ((NvU64) memdescGetPhysAddr(pMemDesc, AT_CPU, pMapParams->offset)); } NV_PRINTF(LEVEL_INFO, @@ -384,8 +373,8 @@ memMap_IMPL priv, *(pMapParams->ppCpuVirtAddr), pMapParams->length, - -1, - -1, + 0, + 0, pMapParams->flags); pCpuMapping->pPrivate->pGpu = pGpu; @@ -410,6 +399,8 @@ memMap_IMPL NvBool bcState = NV_FALSE; NvU64 gpuVirtAddr = 0; NvU64 gpuMapLength = 0; + MemoryArea memArea; + NvBool bUseMemArea = NV_FALSE; // // MEMDESC_FLAGS_MAP_SYSCOH_OVER_BAR1 indicates a special mapping type of HW registers, @@ -454,6 +445,9 @@ memMap_IMPL // Below, we only map one GPU's address for CPU access, so we can use UNICAST here NvU32 busMapFbFlags = BUS_MAP_FB_FLAGS_MAP_UNICAST; +#if defined(NV_UNIX) + busMapFbFlags |= pMapParams->bKernel ? 0 : BUS_MAP_FB_FLAGS_ALLOW_DISCONTIG; +#endif if(DRF_VAL(OS33, _FLAGS, _MAPPING, pMapParams->flags) == NVOS33_FLAGS_MAPPING_DIRECT) { busMapFbFlags |= BUS_MAP_FB_FLAGS_DISABLE_ENCRYPTION; @@ -480,11 +474,17 @@ memMap_IMPL (void) deviceGetByHandle(staticCast(pClient, RsClient), pMapParams->hDevice, &pDevice); + bUseMemArea = NV_TRUE; + rmStatus = kbusMapFbAperture_HAL(pGpu, pKernelBus, + pMemDesc, mrangeMake(pMapParams->offset, gpuMapLength), + &memArea, busMapFbFlags, pDevice); + + if (rmStatus == NV_OK) + { + gpuVirtAddr = memArea.pRanges[0].start; + } + - rmStatus = kbusMapFbApertureSingle(pGpu, pKernelBus, - pMemDesc, pMapParams->offset, - &gpuVirtAddr, &gpuMapLength, - busMapFbFlags, pDevice); } if (rmStatus != NV_OK) @@ -509,7 +509,7 @@ memMap_IMPL pMapParams->ppCpuVirtAddr, cachingType); } - else + else if(!bUseMemArea) { rmStatus = osMapPciMemoryUser(pGpu->pOsGpuInfo, (kbusIsBar1PhysicalModeEnabled(pKernelBus)? @@ -520,6 +520,29 @@ memMap_IMPL &priv, cachingType); } + else + { + NvU64 idx; + NvU64 barAddr = gpumgrGetGpuPhysFbAddr(pGpu); + + for (idx = 0; idx < memArea.numRanges; idx++) + { + memArea.pRanges[idx].start += barAddr; + } + + rmStatus = osMapPciMemoryAreaUser(pGpu->pOsGpuInfo, + memArea, + pMapParams->protect, + cachingType, + pMapParams->ppCpuVirtAddr, + &priv); + + for (idx = 0; idx < memArea.numRanges; idx++) + { + memArea.pRanges[idx].start -= barAddr; + } + + } // // It's possible that NVOS33_FLAGS_MAPPING is set to NVOS33_FLAGS_MAPPING_DIRECT @@ -538,12 +561,17 @@ memMap_IMPL *(pMapParams->ppCpuVirtAddr), pMapParams->length, kbusIsBar1PhysicalModeEnabled(pKernelBus) - ? (NvU64)-1 + ? (NvU64)0 : gpuVirtAddr, kbusIsBar1PhysicalModeEnabled(pKernelBus) - ? (NvU64)-1 + ? (NvU64)0 : gpuMapLength, pMapParams->flags); + + if (bUseMemArea) + { + pCpuMapping->pPrivate->memArea = memArea; + } pCpuMapping->pPrivate->pGpu = pGpu; if (rmStatus != NV_OK) @@ -556,11 +584,10 @@ memMap_IMPL _rmMapMemory_pciFail: if (!kbusIsBar1PhysicalModeEnabled(pKernelBus)) { - kbusUnmapFbApertureSingle(pGpu, + kbusUnmapFbAperture_HAL(pGpu, pKernelBus, pMemDesc, - gpuVirtAddr, - gpuMapLength, + memArea, BUS_MAP_FB_FLAGS_MAP_UNICAST); _rmMapMemory_busFail: gpumgrSetBcEnabledStatus(pGpu, bcState); @@ -631,8 +658,8 @@ memMap_IMPL priv, *(pMapParams->ppCpuVirtAddr), pMapParams->length, - -1, // gpu virtual addr - -1, // gpu map length + 0, // gpu virtual addr + 0, // gpu map length pMapParams->flags); pCpuMapping->pPrivate->pGpu = pGpu; @@ -739,10 +766,9 @@ memUnmap_IMPL if (!kbusIsBar1PhysicalModeEnabled(pKernelBus)) { { - kbusUnmapFbApertureSingle(pGpu, pKernelBus, + kbusUnmapFbAperture_HAL(pGpu, pKernelBus, pMemory->pMemDesc, - pCpuMapping->pPrivate->gpuAddress, - pCpuMapping->pPrivate->gpuMapLength, + pCpuMapping->pPrivate->memArea, BUS_MAP_FB_FLAGS_MAP_UNICAST); } } diff --git a/src/nvidia/src/kernel/rmapi/mapping_list.c b/src/nvidia/src/kernel/rmapi/mapping_list.c index 94c055f1b4..75ec1e0ea4 100644 --- a/src/nvidia/src/kernel/rmapi/mapping_list.c +++ b/src/nvidia/src/kernel/rmapi/mapping_list.c @@ -82,7 +82,7 @@ CliFindMappingInClient RsCpuMapping *pMapping = mapIt.pValue; if ((pMapping->pPrivate->bKernel == bKernel) && (bKernel || (pMapping->processId == processId)) && - (pMapping->pPrivate->gpuAddress != ((NvU64) ~0x0)) && + (pMapping->pPrivate->memArea.numRanges != 0) && (pMapping->pLinearAddress <= cpuAddress) && ((NvU64)cpuAddress < ((NvU64)pMapping->pLinearAddress + pMapping->length))) { diff --git a/src/nvidia/src/kernel/rmapi/nv_gpu_ops.c b/src/nvidia/src/kernel/rmapi/nv_gpu_ops.c index e61cd68457..ce005073aa 100644 --- a/src/nvidia/src/kernel/rmapi/nv_gpu_ops.c +++ b/src/nvidia/src/kernel/rmapi/nv_gpu_ops.c @@ -83,6 +83,7 @@ #include #include #include +#include #include #include #include @@ -122,6 +123,7 @@ #include #include #include +#include #include #include #include @@ -202,6 +204,16 @@ typedef struct NvBool eccErrorNotifier; NVOS10_EVENT_KERNEL_CALLBACK_EX eccDbeCallback; + NvU32 nvlinkOffset; + NvU32 nvlinkMask; + void *nvlinkReadLocation; + NvHandle nvlinkMasterHandle; + NvHandle nvlinkCallbackHandle; + NvBool bNvlinkInitialized; + NvBool bNvlinkRecoveryEnabled; + NvBool nvlinkErrorNotifier; + NVOS10_EVENT_KERNEL_CALLBACK_EX nvlinkErrorCallback; + // The below is used for controlling channel(s) in the GPU. // Example: Volta maps the doorbell work submission register in this // region. @@ -483,6 +495,7 @@ typedef struct nvGpuOpsLockSet NvBool isRmSemaAcquired; GPU_MASK gpuMask; CLIENT_ENTRY *pClientEntryLocked; + NvU32 clientLockFlags; } nvGpuOpsLockSet; static void _nvGpuOpsLocksRelease(nvGpuOpsLockSet *acquiredLocks) @@ -498,7 +511,7 @@ static void _nvGpuOpsLocksRelease(nvGpuOpsLockSet *acquiredLocks) if (acquiredLocks->pClientEntryLocked != NULL) { - serverReleaseClient(&g_resServ, LOCK_ACCESS_WRITE, + serverReleaseClient(&g_resServ, acquiredLocks->clientLockFlags, acquiredLocks->pClientEntryLocked); acquiredLocks->pClientEntryLocked = NULL; } @@ -516,13 +529,14 @@ static void _nvGpuOpsLocksRelease(nvGpuOpsLockSet *acquiredLocks) } } -static NV_STATUS _nvGpuOpsLocksAcquire(NvU32 rmApiLockFlags, - NvHandle hClient, - RsClient **ppClient, - NvU32 numLocksNeeded, - NvU32 deviceInstance1, - NvU32 deviceInstance2, - nvGpuOpsLockSet *acquiredLocks) +static NV_STATUS _nvGpuOpsLocksAcquireWithClientLockFlags(NvU32 rmApiLockFlags, + NvU32 clientLockFlags, + NvHandle hClient, + RsClient **ppClient, + NvU32 numLocksNeeded, + NvU32 deviceInstance1, + NvU32 deviceInstance2, + nvGpuOpsLockSet *acquiredLocks) { NV_STATUS status; OBJSYS *pSys; @@ -557,13 +571,14 @@ static NV_STATUS _nvGpuOpsLocksAcquire(NvU32 rmApiLockFlags, if (hClient != NV01_NULL_OBJECT) { - status = serverAcquireClient(&g_resServ, hClient, LOCK_ACCESS_WRITE, &acquiredLocks->pClientEntryLocked); + status = serverAcquireClient(&g_resServ, hClient, clientLockFlags, &acquiredLocks->pClientEntryLocked); if (status != NV_OK) { _nvGpuOpsLocksRelease(acquiredLocks); return status; } + acquiredLocks->clientLockFlags = clientLockFlags; if (ppClient != NULL) *ppClient = acquiredLocks->pClientEntryLocked->pClient; @@ -636,6 +651,17 @@ static NV_STATUS _nvGpuOpsLocksAcquire(NvU32 rmApiLockFlags, return status; } +static NV_STATUS _nvGpuOpsLocksAcquire(NvU32 rmApiLockFlags, + NvHandle hClient, + RsClient **ppClient, + NvU32 numLocksNeeded, + NvU32 deviceInstance1, + NvU32 deviceInstance2, + nvGpuOpsLockSet *acquiredLocks) +{ + return _nvGpuOpsLocksAcquireWithClientLockFlags(rmApiLockFlags, LOCK_ACCESS_WRITE, hClient, ppClient, numLocksNeeded, deviceInstance1, deviceInstance2, acquiredLocks); +} + static NV_STATUS _nvGpuOpsLocksAcquireAll(NvU32 rmApiLockFlags, NvHandle hClient, RsClient **ppClient, nvGpuOpsLockSet *acquiredLocks) @@ -643,6 +669,14 @@ static NV_STATUS _nvGpuOpsLocksAcquireAll(NvU32 rmApiLockFlags, return _nvGpuOpsLocksAcquire(rmApiLockFlags, hClient, ppClient, 3, 0, 0, acquiredLocks); } +static NV_STATUS _nvGpuOpsLocksAcquireAllWithClientLockFlags(NvU32 rmApiLockFlags, + NvU32 clientLockFlags, + NvHandle hClient, RsClient **ppClient, + nvGpuOpsLockSet *acquiredLocks) +{ + return _nvGpuOpsLocksAcquireWithClientLockFlags(rmApiLockFlags, clientLockFlags, hClient, ppClient, 3, 0, 0, acquiredLocks); +} + static NV_STATUS nvGpuOpsCreateClient(RM_API *pRmApi, NvHandle *hClient) { NV_STATUS status; @@ -767,6 +801,16 @@ static void eccErrorCallback(void *pArg, void *pData, NvHandle hEvent, rmSubDevice->eccErrorNotifier = NV_TRUE; } +static void nvlinkErrorCallback(void *pArg, void *pData, NvHandle hEvent, + NvU32 data, NvU32 status) +{ + subDeviceDesc *rmSubDevice = (subDeviceDesc *)pArg; + + NV_ASSERT(rmSubDevice); + + rmSubDevice->nvlinkErrorNotifier = NV_TRUE; +} + static NvBool deviceNeedsDummyAlloc(struct gpuDevice *device) { // The dummy mapping is needed so the client can issue a read to flush out @@ -1308,6 +1352,239 @@ static NV_STATUS gpuDeviceRmSubDeviceInitEcc(struct gpuDevice *device) return status; } +static void gpuDeviceRmSubDeviceDeinitNvlink(struct gpuDevice *device) +{ + NV2080_CTRL_EVENT_SET_NOTIFICATION_PARAMS setNotificationParams = {0}; + subDeviceDesc *rmSubDevice = device->rmSubDevice; + RM_API *pRmApi = rmapiGetInterface(RMAPI_EXTERNAL_KERNEL); + + if (!rmSubDevice->bNvlinkInitialized || !rmSubDevice->bNvlinkRecoveryEnabled) + return; + + // Disable all notifications specific to nvlink on this device + setNotificationParams.event = NV2080_NOTIFIERS_NVLINK_UNCONTAINED_ERROR; + setNotificationParams.action = NV2080_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE; + + pRmApi->Control(pRmApi, + device->session->handle, + device->subhandle, + NV2080_CTRL_CMD_EVENT_SET_NOTIFICATION, + (void *)&setNotificationParams, + sizeof(setNotificationParams)); + + if (!isDeviceTuringPlus(device)) + { + // + // XXX NOTE TO REVIEWERS: + // This recovery mode is not supported on Pascal. This should be able to + // be removed. + // + gpuDeviceUnmapCpuFreeHandle(device, + (rmSubDevice->nvlinkMasterHandle != NV01_NULL_OBJECT) ? + rmSubDevice->nvlinkMasterHandle : + rmSubDevice->eccMasterHandle, + rmSubDevice->nvlinkReadLocation, + DRF_DEF(OS33, _FLAGS, _ACCESS, _READ_ONLY)); + } + + rmSubDevice->nvlinkReadLocation = NULL; + + if (rmSubDevice->nvlinkCallbackHandle) + pRmApi->Free(pRmApi, device->session->handle, rmSubDevice->nvlinkCallbackHandle); + + rmSubDevice->bNvlinkRecoveryEnabled = NV_FALSE; + rmSubDevice->bNvlinkInitialized = NV_FALSE; +} + +// +// Initialize the NVLINK state for an RM subdevice +// +static NV_STATUS gpuDeviceRmSubDeviceInitNvlink(struct gpuDevice *device) +{ + NV_STATUS status = NV_OK; + int tempPtr = 0; + + struct + { + NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS nvlinkCaps; + NV90E6_CTRL_MASTER_GET_ECC_INTR_OFFSET_MASK_PARAMS eccMask; + NV90E6_CTRL_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK_PARAMS errContIntrMask; + NV2080_CTRL_EVENT_SET_NOTIFICATION_PARAMS setNotification; + NV0005_ALLOC_PARAMETERS eventAlloc; + } *pParams = NULL; + OBJGPU *pGpu = NULL; + subDeviceDesc *rmSubDevice = device->rmSubDevice; + RM_API *pRmApi = rmapiGetInterface(RMAPI_EXTERNAL_KERNEL); + NvHandle localMasterHandle = NV01_NULL_OBJECT; + + NV_ASSERT(device); + + // TODO: Acquired because CliGetGpuContext expects RMAPI lock. Necessary? + status = rmapiLockAcquire(RMAPI_LOCK_FLAGS_READ, RM_LOCK_MODULES_GPU_OPS); + if (status != NV_OK) + return status; + status = CliSetGpuContext(device->session->handle, device->handle, &pGpu, NULL); + rmapiLockRelease(); + if (status != NV_OK) + return status; + + rmSubDevice->nvlinkOffset = 0; + rmSubDevice->nvlinkMask = 0; + rmSubDevice->nvlinkReadLocation = NULL; + rmSubDevice->nvlinkMasterHandle = 0; + rmSubDevice->bNvlinkInitialized = NV_FALSE; + rmSubDevice->bNvlinkRecoveryEnabled = NV_FALSE; + + pParams = portMemAllocNonPaged(sizeof(*pParams)); + if (pParams == NULL) + { + return NV_ERR_NO_MEMORY; + } + + portMemSet(pParams, 0, sizeof(*pParams)); + + // Check NVLINK support before doing anything here + status = pRmApi->Control(pRmApi, + device->session->handle, + device->subhandle, + NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS, + &pParams->nvlinkCaps, + sizeof(pParams->nvlinkCaps)); + + if (status != NV_OK) + { + // Nothing to do if NVLINK not supported + rmSubDevice->bNvlinkRecoveryEnabled = NV_FALSE; + status = NV_OK; + goto done; + } + + if (!NV2080_CTRL_NVLINK_GET_CAP(((NvU8 *)&pParams->nvlinkCaps.capsTbl), NV2080_CTRL_NVLINK_CAPS_SUPPORTED) || + !NV2080_CTRL_NVLINK_GET_CAP(((NvU8 *)&pParams->nvlinkCaps.capsTbl), NV2080_CTRL_NVLINK_CAPS_UNCONTAINED_ERROR_RECOVERY)) + { + // Nothing to do if NVLINK / recovery not supported + rmSubDevice->bNvlinkRecoveryEnabled = NV_FALSE; + status = NV_OK; + goto done; + } + + if (!rmSubDevice->bEccEnabled) + { + // Allocate memory for interrupt tree + rmSubDevice->nvlinkMasterHandle = NV01_NULL_OBJECT; + status = pRmApi->Alloc(pRmApi, device->session->handle, + device->subhandle, + &localMasterHandle, + GF100_SUBDEVICE_MASTER, + &tempPtr, + sizeof(tempPtr)); + if (status != NV_OK) + goto done; + + rmSubDevice->nvlinkMasterHandle = localMasterHandle; + } + else + { + // + // Only one GF100_SUBDEVICE_MASTER can be allocated at once, so if ECC + // is already initialized, reuse its handle. + // + localMasterHandle = rmSubDevice->eccMasterHandle; + } + + if (isDeviceTuringPlus(device)) + { + rmSubDevice->nvlinkReadLocation = gpuBar0BaseAddress(pGpu); + status = pRmApi->Control(pRmApi, + device->session->handle, + localMasterHandle, + NV90E6_CTRL_CMD_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK, + &pParams->errContIntrMask, + sizeof(pParams->errContIntrMask)); + if (status != NV_OK) + goto done; + + rmSubDevice->nvlinkOffset = GPU_GET_VREG_OFFSET(pGpu, NV_VIRTUAL_FUNCTION_ERR_CONT); + rmSubDevice->nvlinkMask = pParams->errContIntrMask.nvlinkMask; + } + else + { + // + // XXX NOTE TO REVIEWERS: + // This recovery mode is not supported on Pascal. This should be able to + // be removed. + // + + // Map memory + status = pRmApi->MapToCpu(pRmApi, + device->session->handle, + device->subhandle, + localMasterHandle, 0, + sizeof(GF100MASTERMap), + (void **)(&rmSubDevice->nvlinkReadLocation), + DRF_DEF(OS33, _FLAGS, _ACCESS, _READ_ONLY)); + if (status != NV_OK) + goto done; + + NV_ASSERT(rmSubDevice->nvlinkReadLocation); + + status = pRmApi->Control(pRmApi, + device->session->handle, + localMasterHandle, + NV90E6_CTRL_CMD_MASTER_GET_ECC_INTR_OFFSET_MASK, + &pParams->eccMask, + sizeof(pParams->eccMask)); + if (status != NV_OK) + goto done; + + // Fill the mask and offset which has been read from control call + rmSubDevice->nvlinkOffset = pParams->eccMask.offset; + rmSubDevice->nvlinkMask = pParams->eccMask.nvlinkMask; + } + + // Setup callback for NVLINK uncontained error notification + rmSubDevice->nvlinkErrorCallback.func = nvlinkErrorCallback; + rmSubDevice->nvlinkErrorCallback.arg = rmSubDevice; + + pParams->eventAlloc.hParentClient = device->session->handle; + pParams->eventAlloc.hClass = NV01_EVENT_KERNEL_CALLBACK_EX; + pParams->eventAlloc.notifyIndex = NV2080_NOTIFIERS_NVLINK_UNCONTAINED_ERROR; + pParams->eventAlloc.data = NV_PTR_TO_NvP64(&rmSubDevice->nvlinkErrorCallback); + + rmSubDevice->nvlinkCallbackHandle = NV01_NULL_OBJECT; + status = pRmApi->Alloc(pRmApi, device->session->handle, + device->subhandle, + &rmSubDevice->nvlinkCallbackHandle, + NV01_EVENT_KERNEL_CALLBACK_EX, + &pParams->eventAlloc, + sizeof(pParams->eventAlloc)); + + if (status != NV_OK) + goto done; + + pParams->setNotification.event = NV2080_NOTIFIERS_NVLINK_UNCONTAINED_ERROR; + pParams->setNotification.action = NV2080_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT; + + status = pRmApi->Control(pRmApi, + device->session->handle, + device->subhandle, + NV2080_CTRL_CMD_EVENT_SET_NOTIFICATION, + &pParams->setNotification, + sizeof(pParams->setNotification)); + if (status != NV_OK) + goto done; + +done: + portMemFree(pParams); + + if (status == NV_OK) + rmSubDevice->bNvlinkInitialized = NV_TRUE; + else + gpuDeviceRmSubDeviceDeinitNvlink(device); + + return status; +} + static NV_STATUS getSwizzIdFromSmcPartHandle(RM_API *pRmApi, NvHandle hClient, NvHandle hGPUInstanceSubscription, @@ -1621,6 +1898,7 @@ static NV_STATUS queryFbInfo(struct gpuDevice *device) NV2080_CTRL_FB_GET_INFO_V2_PARAMS fbInfoParams; NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_PARAMS *fbRegionInfoParams; NV2080_CTRL_GPU_GET_MAX_SUPPORTED_PAGE_SIZE_PARAMS gpuMaxSupportedPageSizeParams; + NV2080_CTRL_FB_GET_STATIC_BAR1_INFO_PARAMS fbStaticBar1Params; RM_API *pRmApi = rmapiGetInterface(RMAPI_EXTERNAL_KERNEL); NvU32 i; @@ -1631,6 +1909,7 @@ static NV_STATUS queryFbInfo(struct gpuDevice *device) portMemSet(fbRegionInfoParams, 0, sizeof(*fbRegionInfoParams)); portMemSet(&fbInfoParams, 0, sizeof(fbInfoParams)); portMemSet(&gpuMaxSupportedPageSizeParams, 0, sizeof(gpuMaxSupportedPageSizeParams)); + portMemSet(&fbStaticBar1Params, 0, sizeof(fbStaticBar1Params)); // Set up the list of parameters we are looking to extract fbInfoParams.fbInfoList[0].index = NV2080_CTRL_FB_INFO_INDEX_HEAP_SIZE; @@ -1679,14 +1958,24 @@ static NV_STATUS queryFbInfo(struct gpuDevice *device) fbRegionInfoParams->fbRegion[i].limit); } + nvStatus = pRmApi->Control(pRmApi, + device->session->handle, + device->subhandle, + NV2080_CTRL_CMD_FB_GET_STATIC_BAR1_INFO, + &fbStaticBar1Params, + sizeof(fbStaticBar1Params)); + if (nvStatus != NV_OK) + goto out; + + device->fbInfo.bStaticBar1Enabled = fbStaticBar1Params.bStaticBar1Enabled; + device->fbInfo.staticBar1Size = fbStaticBar1Params.staticBar1Size; + out: portMemFree(fbRegionInfoParams); return nvStatus; } -// Return the PCIE link cap max speed associated with the given subdevice in -// megabytes per second. -static NV_STATUS getPCIELinkRateMBps(NvHandle hClient, NvHandle hSubDevice, NvU32 *pcieLinkRate) +NV_STATUS calculatePCIELinkRateMBps(NvU32 lanes, NvU32 pciLinkMaxSpeed, NvU32 *pcieLinkRate) { // PCI Express Base Specification: https://www.pcisig.com/specifications/pciexpress const NvU32 PCIE_1_ENCODING_RATIO_TOTAL = 10; @@ -1702,31 +1991,11 @@ static NV_STATUS getPCIELinkRateMBps(NvHandle hClient, NvHandle hSubDevice, NvU3 const NvU32 PCIE_6_ENCODING_RATIO_TOTAL = 256; const NvU32 PCIE_6_ENCODING_RATIO_EFFECTIVE = 242; - RM_API *pRmApi = rmapiGetInterface(RMAPI_EXTERNAL_KERNEL); - NV2080_CTRL_BUS_GET_INFO_V2_PARAMS busInfoV2Params = {0}; + NV_STATUS status = NV_OK; NvU32 linkRate = 0; - NvU32 lanes; - - busInfoV2Params.busInfoList[0].index = NV2080_CTRL_BUS_INFO_INDEX_PCIE_GPU_LINK_CAPS; - busInfoV2Params.busInfoListSize = 1; - - NV_STATUS status = pRmApi->Control(pRmApi, - hClient, - hSubDevice, - NV2080_CTRL_CMD_BUS_GET_INFO_V2, - &busInfoV2Params, - sizeof(busInfoV2Params)); - if (status != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, "%s:%d: %s\n", __FUNCTION__, - __LINE__, nvstatusToString(status)); - return status; - } - - lanes = DRF_VAL(2080, _CTRL_BUS_INFO, _PCIE_LINK_CAP_MAX_WIDTH, busInfoV2Params.busInfoList[0].data); // Bug 2606540: RM reports PCIe transfer rate in GT/s but labels it as Gbps - switch (DRF_VAL(2080, _CTRL_BUS_INFO, _PCIE_LINK_CAP_MAX_SPEED, busInfoV2Params.busInfoList[0].data)) + switch (pciLinkMaxSpeed) { case NV2080_CTRL_BUS_INFO_PCIE_LINK_CAP_MAX_SPEED_2500MBPS: linkRate = ((2500 * lanes * PCIE_1_ENCODING_RATIO_EFFECTIVE) @@ -1759,6 +2028,45 @@ static NV_STATUS getPCIELinkRateMBps(NvHandle hClient, NvHandle hSubDevice, NvU3 *pcieLinkRate = linkRate; + return status; + +} + +// Return the PCIE link cap max speed associated with the given subdevice in +// megabytes per second. +static NV_STATUS getPCIELinkRateMBps(NvHandle hClient, NvHandle hSubDevice, NvU32 *pcieLinkRate) +{ + RM_API *pRmApi = rmapiGetInterface(RMAPI_EXTERNAL_KERNEL); + NV2080_CTRL_BUS_GET_INFO_V2_PARAMS busInfoV2Params = {0}; + NvU32 lanes = 0; + NvU32 pciLinkMaxSpeed = 0; + + busInfoV2Params.busInfoList[0].index = NV2080_CTRL_BUS_INFO_INDEX_PCIE_GPU_LINK_CAPS; + busInfoV2Params.busInfoListSize = 1; + + NV_STATUS status = pRmApi->Control(pRmApi, + hClient, + hSubDevice, + NV2080_CTRL_CMD_BUS_GET_INFO_V2, + &busInfoV2Params, + sizeof(busInfoV2Params)); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "%s:%d: %s\n", __FUNCTION__, + __LINE__, nvstatusToString(status)); + return status; + } + + lanes = DRF_VAL(2080, _CTRL_BUS_INFO, _PCIE_LINK_CAP_MAX_WIDTH, busInfoV2Params.busInfoList[0].data); + pciLinkMaxSpeed = DRF_VAL(2080, _CTRL_BUS_INFO, _PCIE_LINK_CAP_MAX_SPEED, busInfoV2Params.busInfoList[0].data); + + status = calculatePCIELinkRateMBps(lanes, pciLinkMaxSpeed, pcieLinkRate); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "%s:%d: %s\n", __FUNCTION__, + __LINE__, nvstatusToString(status)); + } + return status; } @@ -1830,11 +2138,15 @@ NV_STATUS nvGpuOpsDeviceCreate(struct gpuSession *session, status = gpuDeviceRmSubDeviceInitEcc(device); if (status != NV_OK) goto cleanup_subdevice_usermode; + + status = gpuDeviceRmSubDeviceInitNvlink(device); + if (status != NV_OK) + goto cleanup_ecc; } status = queryFbInfo(device); if (status != NV_OK) - goto cleanup_ecc; + goto cleanup_nvlink; device->isTccMode = NV_FALSE; @@ -1851,17 +2163,17 @@ NV_STATUS nvGpuOpsDeviceCreate(struct gpuSession *session, &device->accessCounterBufferClass, &device->sec2Class); if (status != NV_OK) - goto cleanup_ecc; + goto cleanup_nvlink; mapInit(&device->kern2PhysDescrMap, portMemAllocatorGetGlobalNonPaged()); status = rmapiLockAcquire(RMAPI_LOCK_FLAGS_READ, RM_LOCK_MODULES_GPU_OPS); if (status != NV_OK) - goto cleanup_ecc; + goto cleanup_nvlink; status = CliSetGpuContext(session->handle, device->handle, &pGpu, NULL); rmapiLockRelease(); if (status != NV_OK) - goto cleanup_ecc; + goto cleanup_nvlink; if (IS_VIRTUAL_WITH_HEAVY_SRIOV(pGpu)) { @@ -1869,13 +2181,15 @@ NV_STATUS nvGpuOpsDeviceCreate(struct gpuSession *session, if (device->pPagingChannelRpcMutex == NULL) { status = NV_ERR_NO_MEMORY; - goto cleanup_ecc; + goto cleanup_nvlink; } } *outDevice = device; return NV_OK; +cleanup_nvlink: + gpuDeviceRmSubDeviceDeinitNvlink(device); cleanup_ecc: gpuDeviceRmSubDeviceDeinitEcc(device); cleanup_subdevice_usermode: @@ -1982,6 +2296,7 @@ NV_STATUS nvGpuOpsDeviceDestroy(struct gpuDevice *device) { gpuDeviceDestroyUsermodeRegion(device); + gpuDeviceRmSubDeviceDeinitNvlink(device); gpuDeviceRmSubDeviceDeinitEcc(device); nvGpuOpsRmSmcPartitionDestroy(device); @@ -3718,11 +4033,174 @@ nvGpuOpsBuildExternalAllocPtes return status; } -NV_STATUS nvGpuOpsGetExternalAllocPtes(struct gpuAddressSpace *vaSpace, - NvHandle hMemory, - NvU64 offset, - NvU64 size, - gpuExternalMappingInfo *pGpuExternalMappingInfo) + +// minimal version of nvGpuOpsBuildExternalAllocPtes just for physAddrs +static +NV_STATUS +nvGpuOpsBuildExternalAllocPhysAddrs +( + OBJVASPACE *pVAS, + OBJGPU *pMappingGpu, + MEMORY_DESCRIPTOR *pMemDesc, + Memory *pMemory, + NvU64 offset, + NvU64 size, + NvBool isIndirectPeerSupported, + NvBool isPeerSupported, + NvU32 peerId, + UvmGpuExternalPhysAddrInfo *pGpuExternalPhysAddrInfo +) +{ + NV_STATUS status = NV_OK; + GMMU_APERTURE aperture; + + NvU64 fabricBaseAddress = NVLINK_INVALID_FABRIC_ADDR; + NvU64 pageSize; + NvBool atomic, readOnly; + NvU64 iter, mappingSize, physAddrCount; + KernelGmmu *pKernelGmmu = GPU_GET_KERNEL_GMMU(pMappingGpu); + NvU64 allocSize; + NvU64 *physicalAddresses = NULL; + NvU64 mappingPageSize = pGpuExternalPhysAddrInfo->mappingPageSize; + + NV_ASSERT(!memdescHasSubDeviceMemDescs(pMemDesc)); + + status = nvGpuOpsMemGetPageSize(pMappingGpu, + pMemDesc, + &pageSize); + if (status != NV_OK) + return status; + + // + // Default mappingPageSize to allocation's page size if passed as 0. + // If mappingPageSize is non-zero, it must be a multiple of pageSize. + // Also, mapping page size cannot be larger than alloc page size. + // + if (mappingPageSize == 0) + { + mappingPageSize = pageSize; + } + else if ((mappingPageSize > pageSize) || + (pageSize % mappingPageSize != 0)) + { + return NV_ERR_INVALID_ARGUMENT; + } + + // memdescGetSize returns the requested size of the allocation. But, the + // actual allocation size could be larger than the requested size due + // to alignment requirement. So, make sure the correct size is used. + // Note, alignment can be greater than the pageSize. + allocSize = RM_ALIGN_UP(pMemDesc->ActualSize, pageSize); + + if (offset >= allocSize) + return NV_ERR_INVALID_BASE; + + if ((offset + size) > allocSize) + return NV_ERR_INVALID_LIMIT; + + if ((size & (mappingPageSize - 1)) != 0) + return NV_ERR_INVALID_ARGUMENT; + + if ((offset & (mappingPageSize - 1)) != 0) + return NV_ERR_INVALID_ARGUMENT; + + aperture = nvGpuOpsGetExternalAllocAperture(pMemDesc, isIndirectPeerSupported, isPeerSupported); + + status = nvGpuOpsGetExternalAllocMappingAttribute(pGpuExternalPhysAddrInfo->mappingType, + pMemDesc, + &readOnly, + &atomic); + if (status != NV_OK) + return status; + + mappingSize = size ? size : allocSize; + + physAddrCount = NV_MIN((pGpuExternalPhysAddrInfo->physAddrBufferSize), + (mappingSize / mappingPageSize)); + if (!physAddrCount) + return NV_ERR_BUFFER_TOO_SMALL; + + + if (aperture == GMMU_APERTURE_PEER) + { + FlaMemory* pFlaMemory = dynamicCast(pMemory, FlaMemory); + + // + // Any fabric memory descriptors are pre-encoded with the fabric base address + // use NVLINK_INVALID_FABRIC_ADDR to avoid encoding twice + // + // Skip fabric base address for Local EGM as it uses peer aperture but + // doesn't require fabric address + // + if ( + (memdescGetAddressSpace(pMemDesc) == ADDR_FABRIC_MC) || + (memdescGetAddressSpace(pMemDesc) == ADDR_FABRIC_V2) || + (pFlaMemory != NULL) || + (memdescIsEgm(pMemDesc) && (pMappingGpu == pMemDesc->pGpu))) + { + fabricBaseAddress = NVLINK_INVALID_FABRIC_ADDR; + } + else + { + KernelNvlink *pKernelNvlink = GPU_GET_KERNEL_NVLINK(pMemDesc->pGpu); + if (pKernelNvlink == NULL) + { + fabricBaseAddress = NVLINK_INVALID_FABRIC_ADDR; + } + else + { + if (memdescIsEgm(pMemDesc)) + { + fabricBaseAddress = knvlinkGetUniqueFabricEgmBaseAddress(pMemDesc->pGpu, pKernelNvlink); + } + else + { + fabricBaseAddress = knvlinkGetUniqueFabricBaseAddress(pMemDesc->pGpu, pKernelNvlink); + } + } + } + } + + // + // Both memdescGetPhysAddr() and kgmmuEncodePhysAddr() have pretty high overhead. + // To avoid it, allocate an array for the physical addresses and use the + // flavors of the APIs that work on multiple addresses at a time. + // + physicalAddresses = portMemAllocNonPaged((NvU32)physAddrCount * sizeof(*physicalAddresses)); + if (physicalAddresses == NULL) + return NV_ERR_NO_MEMORY; + + // + // Ask for physical addresses for the GPU being mapped as it may not be the + // same as the GPU owning the memdesc. This matters for sysmem as accessing + // it requires IOMMU mappings to be set up and these are different for each + // GPU. The IOMMU mappings are currently added by nvGpuOpsDupMemory(). + // + memdescGetPhysAddrsForGpu(pMemDesc, pMappingGpu, AT_GPU, offset, mappingPageSize, + physAddrCount, physicalAddresses); + + kgmmuEncodePhysAddrs(pKernelGmmu, aperture, physicalAddresses, fabricBaseAddress, physAddrCount); + + + for (iter = 0; iter < physAddrCount; iter++) + { + pGpuExternalPhysAddrInfo->physAddrBuffer[iter] = physicalAddresses[iter]; + } + + pGpuExternalPhysAddrInfo->numWrittenPhysAddrs = physAddrCount; + pGpuExternalPhysAddrInfo->numRemainingPhysAddrs = (mappingSize / mappingPageSize) - physAddrCount; + + portMemFree(physicalAddresses); + + return status; +} + +NV_STATUS nvGpuOpsGetExternalAllocPtesOrPhysAddrs(struct gpuAddressSpace *vaSpace, + NvHandle hMemory, + NvU64 offset, + NvU64 size, + gpuExternalMappingInfo *pGpuExternalMappingInfo, + gpuExternalPhysAddrInfo *pGpuExternalPhysAddrInfo) { NV_STATUS status = NV_OK; nvGpuOpsLockSet acquiredLocks; @@ -3741,15 +4219,21 @@ NV_STATUS nvGpuOpsGetExternalAllocPtes(struct gpuAddressSpace *vaSpace, RsClient *pClient; MEMORY_DESCRIPTOR *pAdjustedMemDesc = NULL; FABRIC_VASPACE *pFabricVAS = NULL; + OBJSYS *pSys = SYS_GET_INSTANCE(); + LOCK_ACCESS_TYPE clientLockAccess; - if (!pGpuExternalMappingInfo || !hMemory || !vaSpace) - return NV_ERR_INVALID_ARGUMENT; + // No point to take client lock in shared mode if force shared lock is not enabled + clientLockAccess = pSys->getProperty(pSys, PDB_PROP_SYS_ENABLE_FORCE_SHARED_LOCK) ? + LOCK_ACCESS_READ : LOCK_ACCESS_WRITE; + + // The upper function has already checked that the inputs are ok threadStateInit(&threadState, THREAD_STATE_FLAGS_NONE); - status = _nvGpuOpsLocksAcquireAll(RMAPI_LOCK_FLAGS_READ, - vaSpace->device->session->handle, - &pClient, - &acquiredLocks); + status = _nvGpuOpsLocksAcquireAllWithClientLockFlags(RMAPI_LOCK_FLAGS_READ | RMAPI_LOCK_FLAGS_READ_FORCE, + clientLockAccess, + vaSpace->device->session->handle, + &pClient, + &acquiredLocks); if (status != NV_OK) { threadStateFree(&threadState, THREAD_STATE_FLAGS_NONE); @@ -3950,9 +4434,19 @@ NV_STATUS nvGpuOpsGetExternalAllocPtes(struct gpuAddressSpace *vaSpace, } } - status = nvGpuOpsBuildExternalAllocPtes(pVAS, pMappingGpu, pAdjustedMemDesc, pMemory, offset, size, - isIndirectPeerSupported, isPeerSupported, peerId, - pGpuExternalMappingInfo); + if (pGpuExternalMappingInfo != NULL) + { + status = nvGpuOpsBuildExternalAllocPtes(pVAS, pMappingGpu, pAdjustedMemDesc, pMemory, offset, size, + isIndirectPeerSupported, isPeerSupported, peerId, + pGpuExternalMappingInfo); + } + + if (pGpuExternalPhysAddrInfo != NULL) + { + status = nvGpuOpsBuildExternalAllocPhysAddrs(pVAS, pMappingGpu, pAdjustedMemDesc, pMemory, offset, size, + isIndirectPeerSupported, isPeerSupported, peerId, + pGpuExternalPhysAddrInfo); + } freeGpaMemdesc: if (pAdjustedMemDesc != pMemDesc) @@ -3964,6 +4458,31 @@ NV_STATUS nvGpuOpsGetExternalAllocPtes(struct gpuAddressSpace *vaSpace, return status; } + +NV_STATUS nvGpuOpsGetExternalAllocPtes(struct gpuAddressSpace *vaSpace, + NvHandle hMemory, + NvU64 offset, + NvU64 size, + gpuExternalMappingInfo *pGpuExternalMappingInfo) +{ + if (!pGpuExternalMappingInfo || !hMemory || !vaSpace) + return NV_ERR_INVALID_ARGUMENT; + + return nvGpuOpsGetExternalAllocPtesOrPhysAddrs(vaSpace, hMemory, offset, size, pGpuExternalMappingInfo, NULL); +} + +NV_STATUS nvGpuOpsGetExternalAllocPhysAddrs(struct gpuAddressSpace *vaSpace, + NvHandle hMemory, + NvU64 offset, + NvU64 size, + gpuExternalPhysAddrInfo *pGpuExternalPhysAddrInfo) +{ + if (!pGpuExternalPhysAddrInfo || !hMemory || !vaSpace) + return NV_ERR_INVALID_ARGUMENT; + + return nvGpuOpsGetExternalAllocPtesOrPhysAddrs(vaSpace, hMemory, offset, size, NULL, pGpuExternalPhysAddrInfo); +} + void nvGpuOpsAddressSpaceDestroy(struct gpuAddressSpace *vaSpace) { RM_API *pRmApi = rmapiGetInterface(RMAPI_EXTERNAL_KERNEL); @@ -5169,6 +5688,11 @@ static NV_STATUS channelAllocate(const gpuTsgHandle tsg, hTsg = channel->tsg->tsgHandle; } + // Mark the channel as UVM owned. + pAllocInfo->gpFifoAllocParams.internalFlags = + FLD_SET_DRF(_KERNELCHANNEL, _ALLOC_INTERNALFLAGS, _UVM_OWNED, _YES, + pAllocInfo->gpFifoAllocParams.internalFlags); + status = pRmApi->Alloc(pRmApi, session->handle, hTsg, @@ -6419,6 +6943,7 @@ NV_STATUS nvGpuOpsGetGpuInfo(const NvProcessorUuid *pUuid, NV0080_CTRL_GPU_GET_NUM_SUBDEVICES_PARAMS subDevParams = { 0 }; NV2080_CTRL_GPU_GET_SIMULATION_INFO_PARAMS simulationInfoParams = {0}; OBJGPU *pGpu = NULL; + OBJUVM *pUvm = NULL; RM_API *pRmApi = rmapiGetInterface(RMAPI_EXTERNAL_KERNEL); NvU32 dummy; @@ -6541,6 +7066,13 @@ NV_STATUS nvGpuOpsGetGpuInfo(const NvProcessorUuid *pUuid, getGpcTpcInfo(pGpu, pGpuInfo); + // TODO: Bug 4698194: [GB100] Implement RM control call to query the number + // of access counter buffers. + // Temporary WAR, the following logic can be removed when the RM control + // call is available. + pUvm = GPU_GET_UVM(pGpu); + pGpuInfo->accessCntrBufferCount = pUvm != NULL ? pUvm->accessCounterBufferCount : 0; + if (IS_MIG_IN_USE(pGpu)) { NvU32 swizzId; @@ -6897,7 +7429,7 @@ static NV_STATUS _enablePeerAccess(struct gpuDevice *device, subDeviceDesc *rmSubDevice = device->rmSubDevice; - LOCK_ASSERT_AND_RETURN(rmapiLockIsWriteOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsWriteOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (!(isDeviceHopperPlus(device) && device->info.connectedToSwitch)) @@ -7893,6 +8425,27 @@ NV_STATUS nvGpuOpsGetEccInfo(struct gpuDevice *device, gpuEccInfo *eccInfo) return NV_OK; } +NV_STATUS nvGpuOpsGetNvlinkInfo(struct gpuDevice *device, gpuNvlinkInfo *nvlinkInfo) +{ + subDeviceDesc *rmSubDevice; + + if (!device || !nvlinkInfo) + return NV_ERR_INVALID_ARGUMENT; + + rmSubDevice = device->rmSubDevice; + + if (!rmSubDevice->bNvlinkInitialized) + return NV_ERR_NOT_SUPPORTED; + + nvlinkInfo->nvlinkMask = rmSubDevice->nvlinkMask; + nvlinkInfo->nvlinkOffset = rmSubDevice->nvlinkOffset; + nvlinkInfo->nvlinkReadLocation = rmSubDevice->nvlinkReadLocation; + nvlinkInfo->bNvlinkRecoveryEnabled = rmSubDevice->bNvlinkRecoveryEnabled; + nvlinkInfo->nvlinkErrorNotifier = &rmSubDevice->nvlinkErrorNotifier; + + return NV_OK; +} + // // Do not acquire the GPU locks as all nvGpuOpsFreeDupedHandle() does is // call pRmApi->Free(pRmApi, ) that drops the GPU locks if acquired (and @@ -10353,6 +10906,19 @@ static NV_STATUS nvGpuOpsGetMemoryByHandle(NvHandle hClient, NvHandle hMemory, M ppMemory); } +void nvGpuOpsReportFatalError(NV_STATUS error) +{ + OBJSYS *pSys = SYS_GET_INSTANCE(); + + NV_ASSERT(error != NV_OK); + + NV_PRINTF(LEVEL_ERROR, + "uvm encountered global fatal error 0x%x, requiring os reboot to recover.\n", + error); + + sysSetRecoveryRebootRequired(pSys, NV_TRUE); +} + // Enure that's UVM's enum values match RM's. ct_assert((NvU32)KEY_ROTATION_STATUS_IDLE == (NvU32)UVM_KEY_ROTATION_STATUS_IDLE); ct_assert((NvU32)KEY_ROTATION_STATUS_PENDING == (NvU32)UVM_KEY_ROTATION_STATUS_PENDING); diff --git a/src/nvidia/src/kernel/rmapi/resource_desc_flags.h b/src/nvidia/src/kernel/rmapi/resource_desc_flags.h index ae05fd9c7c..cc9f9ae939 100644 --- a/src/nvidia/src/kernel/rmapi/resource_desc_flags.h +++ b/src/nvidia/src/kernel/rmapi/resource_desc_flags.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2016-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -63,23 +63,30 @@ * GSP_PLUGIN_FOR_* is even stricter; any admin and kernel privileged object allocated in a VF context * is required to have the flag or it will be rejected. */ -#define RS_FLAGS_ALLOC_CPU_PLUGIN_FOR_VGPU_GSP NVBIT(11) ///< CPU-RM, SRIOV, vGPU-GSP enabled, hypervisor environment +#define RS_FLAGS_ALLOC_CPU_PLUGIN_FOR_SRIOV NVBIT(11) ///< CPU-RM, SRIOV, vGPU-GSP disabled, hypervisor environment -#define RS_FLAGS_ALLOC_CPU_PLUGIN_FOR_SRIOV NVBIT(12) ///< CPU-RM, SRIOV, vGPU-GSP disabled, hypervisor environment +#define RS_FLAGS_ALLOC_CPU_PLUGIN_FOR_LEGACY NVBIT(12) ///< CPU-RM, non-SRIOV or SRIOV-Heavy, hypervisor environment. -#define RS_FLAGS_ALLOC_CPU_PLUGIN_FOR_LEGACY NVBIT(13) ///< CPU-RM, non-SRIOV or SRIOV-Heavy, hypervisor environment. +#define RS_FLAGS_ALLOC_GSP_PLUGIN_FOR_VGPU_GSP NVBIT(13) ///< GSP-RM, SRIOV, vGPU-GSP enabled, VF context. -#define RS_FLAGS_ALLOC_GSP_PLUGIN_FOR_VGPU_GSP NVBIT(14) ///< GSP-RM, SRIOV, vGPU-GSP enabled, VF context. +#define RS_FLAGS_ALLOC_ALL_VGPU_PLUGINS (RS_FLAGS_ALLOC_CPU_PLUGIN_FOR_SRIOV | RS_FLAGS_ALLOC_CPU_PLUGIN_FOR_LEGACY | RS_FLAGS_ALLOC_GSP_PLUGIN_FOR_VGPU_GSP) -#define RS_FLAGS_ALLOC_ALL_VGPU_PLUGINS (RS_FLAGS_ALLOC_CPU_PLUGIN_FOR_VGPU_GSP | RS_FLAGS_ALLOC_CPU_PLUGIN_FOR_SRIOV | RS_FLAGS_ALLOC_CPU_PLUGIN_FOR_LEGACY | RS_FLAGS_ALLOC_GSP_PLUGIN_FOR_VGPU_GSP) +#define RS_FLAGS_DUAL_CLIENT_LOCK NVBIT(14) ///< Class needs to lock two clients when being allocated, must update serverAllocLookupSecondClient in order to use -#define RS_FLAGS_DUAL_CLIENT_LOCK NVBIT(15) ///< Class needs to lock two clients when being allocated, must update serverAllocLookupSecondClient in order to use +#define RS_FLAGS_ACQUIRE_GPUS_LOCK_ON_DUP NVBIT(15) ///< GPUs Lock is acquired on dup -#define RS_FLAGS_ACQUIRE_GPUS_LOCK_ON_DUP NVBIT(16) ///< GPUs Lock is acquired on dup - -#define RS_FLAGS_ACQUIRE_GPU_GROUP_LOCK_ON_DUP NVBIT(17) ///< GPU Group Lock is acquired for dup +#define RS_FLAGS_ACQUIRE_GPU_GROUP_LOCK_ON_DUP NVBIT(16) ///< GPU Group Lock is acquired for dup #define RS_FLAGS_ACQUIRE_GPUS_LOCK (RS_FLAGS_ACQUIRE_GPUS_LOCK_ON_ALLOC | RS_FLAGS_ACQUIRE_GPUS_LOCK_ON_FREE | RS_FLAGS_ACQUIRE_GPUS_LOCK_ON_DUP) #define RS_FLAGS_ACQUIRE_GPU_GROUP_LOCK (RS_FLAGS_ACQUIRE_GPU_GROUP_LOCK_ON_ALLOC | RS_FLAGS_ACQUIRE_GPU_GROUP_LOCK_ON_FREE | RS_FLAGS_ACQUIRE_GPU_GROUP_LOCK_ON_DUP) +/** + * Use RO API lock even if NV_REG_STR_RM_READONLY_API_LOCK_ALLOC_RESOURCE is not set. + * + * This flag is intended to be temporary to allow explicit opt-in for RO API + * lock while NV_REG_STR_RM_READONLY_API_LOCK_ALLOC/FREE_RESOURCE is not the + * default. Default enablement is tracked in bug 4283710. + */ +#define RS_FLAGS_FORCE_ACQUIRE_RO_API_LOCK_ON_ALLOC_FREE NVBIT(17) + #endif // _RESOURCE_DESC_FLAGS_H_ diff --git a/src/nvidia/src/kernel/rmapi/resource_list.h b/src/nvidia/src/kernel/rmapi/resource_list.h index b06114f974..d016172515 100644 --- a/src/nvidia/src/kernel/rmapi/resource_list.h +++ b/src/nvidia/src/kernel/rmapi/resource_list.h @@ -210,6 +210,16 @@ RS_ENTRY( /* Flags */ RS_FLAGS_ALLOC_NON_PRIVILEGED | RS_FLAGS_ACQUIRE_GPUS_LOCK | RS_FLAGS_ALLOC_RPC_TO_PHYS_RM, /* Required Access Rights */ RS_ACCESS_NONE ) +RS_ENTRY( + /* External Class */ MAXWELL_PROFILER_CONTEXT, + /* Internal Class */ ProfilerCtx, + /* Multi-Instance */ NV_TRUE, + /* Parents */ RS_LIST(classId(KernelChannel), classId(KernelChannelGroupApi)), + /* Alloc Param Info */ RS_REQUIRED(NVB1CC_ALLOC_PARAMETERS), + /* Resource Free Priority */ RS_FREE_PRIORITY_DEFAULT, + /* Flags */ RS_FLAGS_ALLOC_NON_PRIVILEGED | RS_FLAGS_ACQUIRE_GPUS_LOCK, + /* Required Access Rights */ RS_ACCESS_NONE +) RS_ENTRY( /* External Class */ MAXWELL_PROFILER_DEVICE, /* Internal Class */ ProfilerDev, @@ -502,7 +512,7 @@ RS_ENTRY( /* Multi-Instance */ NV_TRUE, /* Parents */ RS_LIST(classId(Subdevice)), /* Alloc Param Info */ RS_REQUIRED(NV_MEMORY_MAPPER_ALLOCATION_PARAMS), - /* Resource Free Priority */ RS_FREE_PRIORITY_DEFAULT, + /* Resource Free Priority */ RS_FREE_PRIORITY_HIGH, /* Flags */ RS_FLAGS_ALLOC_NON_PRIVILEGED | RS_FLAGS_ACQUIRE_GPUS_LOCK, /* Required Access Rights */ RS_ACCESS_NONE ) @@ -513,7 +523,7 @@ RS_ENTRY( /* Parents */ RS_LIST(classId(Device)), /* Alloc Param Info */ RS_REQUIRED(NV_OS_DESC_MEMORY_ALLOCATION_PARAMS), /* Resource Free Priority */ RS_FREE_PRIORITY_DEFAULT, - /* Flags */ RS_FLAGS_ALLOC_NON_PRIVILEGED | RS_FLAGS_ACQUIRE_GPU_GROUP_LOCK_ON_ALLOC | RS_FLAGS_ACQUIRE_GPUS_LOCK_ON_DUP | RS_FLAGS_ACQUIRE_GPU_GROUP_LOCK_ON_FREE | RS_FLAGS_ACQUIRE_RO_API_LOCK_ON_ALLOC, + /* Flags */ RS_FLAGS_ALLOC_NON_PRIVILEGED | RS_FLAGS_ACQUIRE_GPU_GROUP_LOCK_ON_ALLOC | RS_FLAGS_ACQUIRE_GPUS_LOCK_ON_DUP | RS_FLAGS_ACQUIRE_GPU_GROUP_LOCK_ON_FREE | RS_FLAGS_ACQUIRE_RO_API_LOCK_ON_ALLOC | RS_FLAGS_FORCE_ACQUIRE_RO_API_LOCK_ON_ALLOC_FREE, /* Required Access Rights */ RS_ACCESS_NONE ) RS_ENTRY( @@ -874,7 +884,7 @@ RS_ENTRY( /* Parents */ RS_LIST(classId(Subdevice)), /* Alloc Param Info */ RS_REQUIRED(NV_VIDMEM_ACCESS_BIT_ALLOCATION_PARAMS), /* Resource Free Priority */ RS_FREE_PRIORITY_DEFAULT, - /* Flags */ RS_FLAGS_ALLOC_PRIVILEGED | RS_FLAGS_ALLOC_CPU_PLUGIN_FOR_SRIOV | RS_FLAGS_ALLOC_CPU_PLUGIN_FOR_VGPU_GSP | RS_FLAGS_ALLOC_GSP_PLUGIN_FOR_VGPU_GSP | RS_FLAGS_ACQUIRE_GPUS_LOCK | RS_FLAGS_ALLOC_RPC_TO_PHYS_RM, + /* Flags */ RS_FLAGS_ALLOC_NON_PRIVILEGED | RS_FLAGS_ACQUIRE_GPUS_LOCK | RS_FLAGS_ALLOC_RPC_TO_PHYS_RM, /* Required Access Rights */ RS_ACCESS_NONE ) RS_ENTRY( diff --git a/src/nvidia/src/kernel/rmapi/resource_list_required_includes.h b/src/nvidia/src/kernel/rmapi/resource_list_required_includes.h index 4c7cc9e4f0..fcd9affef1 100644 --- a/src/nvidia/src/kernel/rmapi/resource_list_required_includes.h +++ b/src/nvidia/src/kernel/rmapi/resource_list_required_includes.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -47,11 +47,6 @@ #include "alloc/alloc_channel.h" -#include "alloc/alloc_channel.h" - -#include "class/clb0b5sw.h" - -// Bug 3748354 #include "class/clb0b5sw.h" #include "alloc/alloc_access_counter_buffer.h" diff --git a/src/nvidia/src/kernel/rmapi/rmapi.c b/src/nvidia/src/kernel/rmapi/rmapi.c index fb3d9cd728..e192d6e39c 100644 --- a/src/nvidia/src/kernel/rmapi/rmapi.c +++ b/src/nvidia/src/kernel/rmapi/rmapi.c @@ -560,19 +560,20 @@ rmapiLockAcquire(NvU32 flags, NvU32 module) // Make sure lock has been created NV_CHECK_OR_RETURN(LEVEL_ERROR, g_RmApiLock.pLock != NULL, NV_ERR_NOT_READY); - LOCK_ASSERT_AND_RETURN(!rmapiLockIsOwner()); - + NV_ASSERT_OR_RETURN(!rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); // Ensure that GPU locks are NEVER acquired before the API lock - LOCK_ASSERT_AND_RETURN(rmGpuLocksGetOwnedMask() == 0); + NV_ASSERT_OR_RETURN(rmGpuLocksGetOwnedMask() == 0, NV_ERR_INVALID_LOCK_STATE); // // If a read-only lock was requested, check to see if the module is allowed - // to take read-only locks + // to take read-only locks or the _FORCE flag was enabled and set. // if ((flags & RMAPI_LOCK_FLAGS_READ) && (module != RM_LOCK_MODULES_NONE)) { - if ((pSys->apiLockModuleMask & RM_LOCK_MODULE_GRP(module)) == 0) + if ((((flags & RMAPI_LOCK_FLAGS_READ_FORCE) == 0) || + !pSys->getProperty(pSys, PDB_PROP_SYS_ENABLE_FORCE_SHARED_LOCK)) && + ((pSys->apiLockModuleMask & RM_LOCK_MODULE_GRP(module)) == 0)) { flags &= ~RMAPI_LOCK_FLAGS_READ; } diff --git a/src/nvidia/src/kernel/rmapi/rmapi_cache.c b/src/nvidia/src/kernel/rmapi/rmapi_cache.c index 8451891f3e..f057c4df66 100644 --- a/src/nvidia/src/kernel/rmapi/rmapi_cache.c +++ b/src/nvidia/src/kernel/rmapi/rmapi_cache.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -594,6 +594,18 @@ static NvBool _isBusGetInfoIndexCacheable(NvU32 index) } } +static NvBool _isVbiosGetInfoIndexCacheable(NvU32 index) +{ + switch (index) + { + case NV2080_CTRL_BIOS_INFO_INDEX_REVISION: + case NV2080_CTRL_BIOS_INFO_INDEX_OEM_REVISION: + return NV_TRUE; + default: + return NV_FALSE; + } +} + static NvBool _isGetInfoIndexCacheable(NvU32 cmd, NvU32 index, NvU32 cacheGpuFlags) { switch (cmd) @@ -604,6 +616,8 @@ static NvBool _isGetInfoIndexCacheable(NvU32 cmd, NvU32 index, NvU32 cacheGpuFla return _isFifoGetInfoIndexCacheable(index); case NV2080_CTRL_CMD_BUS_GET_INFO_V2: return _isBusGetInfoIndexCacheable(index); + case NV2080_CTRL_CMD_BIOS_GET_INFO_V2: + return _isVbiosGetInfoIndexCacheable(index); } return NV_FALSE; @@ -937,6 +951,13 @@ NV_STATUS _rmapiControlCacheGetByInput NV2080_CTRL_BUS_INFO_MAX_LIST_SIZE, NV_FALSE); + case NV2080_CTRL_CMD_BIOS_GET_INFO_V2: + return _getInfoCacheHandler(hClient, hObject, cmd, + ((NV2080_CTRL_BIOS_GET_INFO_V2_PARAMS*)params)->biosInfoList, + ((NV2080_CTRL_BIOS_GET_INFO_V2_PARAMS*)params)->biosInfoListSize, + NV2080_CTRL_BIOS_INFO_MAX_SIZE, + NV_FALSE); + case NV2080_CTRL_CMD_GPU_GET_NAME_STRING: return _gpuNameStringGet(hClient, hObject, params); default: @@ -977,6 +998,13 @@ NV_STATUS _rmapiControlCacheSetByInput NV2080_CTRL_BUS_INFO_MAX_LIST_SIZE, NV_TRUE); + case NV2080_CTRL_CMD_BIOS_GET_INFO_V2: + return _getInfoCacheHandler(hClient, hObject, cmd, + ((NV2080_CTRL_BIOS_GET_INFO_V2_PARAMS*)params)->biosInfoList, + ((NV2080_CTRL_BIOS_GET_INFO_V2_PARAMS*)params)->biosInfoListSize, + NV2080_CTRL_BIOS_INFO_MAX_SIZE, + NV_TRUE); + case NV2080_CTRL_CMD_GPU_GET_NAME_STRING: return _gpuNameStringSet(hClient, hObject, params); default: diff --git a/src/nvidia/src/kernel/rmapi/rpc_common.c b/src/nvidia/src/kernel/rmapi/rpc_common.c index 8077673910..f90e25c801 100644 --- a/src/nvidia/src/kernel/rmapi/rpc_common.c +++ b/src/nvidia/src/kernel/rmapi/rpc_common.c @@ -147,7 +147,11 @@ NV_STATUS rpcWriteCommonHeader(OBJGPU *pGpu, OBJRPC *pRpc, NvU32 func, NvU32 par if (pDevice != NULL) { if (pDevice->pKernelHostVgpuDevice != NULL) + { + NV_ASSERT_OR_RETURN(pDevice->pKernelHostVgpuDevice->bGspPluginTaskInitialized, + NV_ERR_INVALID_STATE); vgpu_rpc_message_header_v->u.cpuRmGfid = pDevice->pKernelHostVgpuDevice->gfid; + } } } else diff --git a/src/nvidia/src/kernel/rmapi/rs_utils.c b/src/nvidia/src/kernel/rmapi/rs_utils.c index afb9c92484..501072287d 100644 --- a/src/nvidia/src/kernel/rmapi/rs_utils.c +++ b/src/nvidia/src/kernel/rmapi/rs_utils.c @@ -250,7 +250,7 @@ serverutilGenResourceHandle // LOCK TEST: we should have the API lock here unless we're executing out of // the power management path. // - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() || rmapiInRtd3PmPath()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() || rmapiInRtd3PmPath(), NV_ERR_INVALID_LOCK_STATE); pClient = serverutilGetClientUnderLock(hClient); @@ -354,7 +354,7 @@ serverutilAcquireClient RmClient *pClient; // LOCK TEST: we should have the API lock here - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (NV_OK != serverAcquireClient(&g_resServ, hClient, access, &pClientEntry)) return NV_ERR_INVALID_CLIENT; diff --git a/src/nvidia/src/kernel/vgpu/rpc.c b/src/nvidia/src/kernel/vgpu/rpc.c index 3dfdd47e1d..d2a1b77676 100644 --- a/src/nvidia/src/kernel/vgpu/rpc.c +++ b/src/nvidia/src/kernel/vgpu/rpc.c @@ -544,6 +544,83 @@ static void _teardownGspSharedMemory(OBJGPU *pGpu, OBJVGPU *pVGpu) _freeSharedMemory(pGpu, pVGpu); } +static NvU64 vgpuGspMakeBufferAddress(VGPU_MEM_INFO *pMemInfo, NvU64 gpfn); + +static NV_STATUS _setupGspDebugBuff(OBJGPU *pGpu, OBJVGPU *pVGpu) +{ + NV_STATUS status; + + if (!RMCFG_FEATURE_PLATFORM_WINDOWS) + return NV_OK; + + status = _allocRpcMemDesc(pGpu, + RM_PAGE_SIZE, + NV_MEMORY_CONTIGUOUS, + ADDR_SYSMEM, + 0, + &pVGpu->debugBuff.pMemDesc, + (void**)&pVGpu->debugBuff.pMemory, + (void**)&pVGpu->debugBuff.pPriv); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "RPC: Debug memory setup failed: 0x%x\n", status); + return status; + } + + pVGpu->debugBuff.pfn = memdescGetPte(pVGpu->debugBuff.pMemDesc, AT_GPU, 0) >> RM_PAGE_SHIFT; + + pVGpu->gspCtrlBuf->v1.debugBuf.addr = vgpuGspMakeBufferAddress(&pVGpu->debugBuff, pVGpu->debugBuff.pfn); + pVGpu->gspCtrlBuf->v1.requestedGspCaps = FLD_SET_DRF(_VGPU, _GSP_CAPS, _DEBUG_BUFF_SUPPORTED, _TRUE, + pVGpu->gspCtrlBuf->v1.requestedGspCaps); + + return NV_OK; +} + +static void _teardownGspDebugBuff(OBJGPU *pGpu, OBJVGPU *pVGpu) +{ + VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); + + if (!RMCFG_FEATURE_PLATFORM_WINDOWS) + return; + + if (!pVGpu->debugBuff.pfn) + return; + + NV_ASSERT_OR_RETURN_VOID(pVSI); + + pVSI->vgpuConfig.debugBufferSize = 0; + pVSI->vgpuConfig.debugBuffer = NULL; + + pVGpu->debugBuff.pfn = 0; + + _freeRpcMemDesc(pGpu, + &pVGpu->debugBuff.pMemDesc, + (void**)&pVGpu->debugBuff.pMemory, + (void**)&pVGpu->debugBuff.pPriv); +} + +static NV_STATUS _tryEnableGspDebugBuff(OBJGPU *pGpu, OBJVGPU *pVGpu) +{ + VGPU_STATIC_INFO *pVSI = GPU_GET_STATIC_INFO(pGpu); + + if (!RMCFG_FEATURE_PLATFORM_WINDOWS) + return NV_OK; + + if (!FLD_TEST_DRF(_VGPU, _GSP_CAPS, _DEBUG_BUFF_SUPPORTED, _TRUE, + pVGpu->gspResponseBuf->v1.enabledGspCaps)) { + _teardownGspDebugBuff(pGpu, pVGpu); + return NV_OK; + } + + NV_ASSERT_OR_RETURN(pVSI, NV_ERR_GENERIC); + NV_ASSERT_OR_RETURN(pVGpu->debugBuff.pMemory, NV_ERR_GENERIC); + + pVSI->vgpuConfig.debugBufferSize = NV_VGPU_DEBUG_BUFF_DRIVER_SIZE; + pVSI->vgpuConfig.debugBuffer = NV_PTR_TO_NvP64(pVGpu->debugBuff.pMemory); + + return NV_OK; +} + static NV_STATUS _initSysmemPfnRing(OBJGPU *pGpu) { NV_STATUS status = NV_OK; @@ -747,6 +824,17 @@ static NV_STATUS updateSharedBufferInfoInSysmemPfnBitMap(OBJGPU *pGpu, OBJVGPU * } } + if ((pVGpu->debugBuff.pMemDesc != NULL) && + (memdescGetAddressSpace(pVGpu->debugBuff.pMemDesc) == ADDR_SYSMEM)) + { + status = vgpuUpdateSysmemPfnBitMap(pGpu, pVGpu->debugBuff.pMemDesc, add); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_INFO, "Failed to update debug memory sysmem info in PFN bitmap, error 0x%x\n", status); + return status; + } + } + if ((vgpuSysmemPfnInfo.pMemDesc_sysmemPfnRing != NULL) && (memdescGetAddressSpace(vgpuSysmemPfnInfo.pMemDesc_sysmemPfnRing) == ADDR_SYSMEM)) { @@ -1250,6 +1338,9 @@ static NV_STATUS _vgpuGspSetupCommunicationWithPlugin(OBJGPU *pGpu, OBJVGPU *pVG rpcVgpuGspWriteScratchRegister_HAL(pRpc, pGpu, addrCtrlBuf); } + NV_PRINTF(LEVEL_INFO, "RPC: Version 0x%x\n", pVGpu->gspCtrlBuf->v1.version); + NV_PRINTF(LEVEL_INFO, "RPC: Requested GSP caps 0x%x\n", pVGpu->gspCtrlBuf->v1.requestedGspCaps); + NV_PRINTF(LEVEL_INFO, "RPC: Enabled GSP caps 0x%x\n", pVGpu->gspResponseBuf->v1.enabledGspCaps); NV_PRINTF(LEVEL_INFO, "RPC: Control buf addr 0x%llx\n", addrCtrlBuf); NV_PRINTF(LEVEL_INFO, "RPC: Response buf addr 0x%llx\n", pVGpu->gspCtrlBuf->v1.responseBuf.addr); NV_PRINTF(LEVEL_INFO, "RPC: Message buf addr 0x%llx\n", pVGpu->gspCtrlBuf->v1.msgBuf.addr); @@ -1258,6 +1349,7 @@ static NV_STATUS _vgpuGspSetupCommunicationWithPlugin(OBJGPU *pGpu, OBJVGPU *pVG NV_PRINTF(LEVEL_INFO, "RPC: Shared buf BAR2 offset 0x%llx\n", pVGpu->gspCtrlBuf->v1.sharedMem.bar2Offset); NV_PRINTF(LEVEL_INFO, "RPC: Event buf addr 0x%llx\n", pVGpu->gspCtrlBuf->v1.eventBuf.addr); NV_PRINTF(LEVEL_INFO, "RPC: Event buf BAR2 offset 0x%llx\n", pVGpu->gspCtrlBuf->v1.eventBuf.bar2Offset); + NV_PRINTF(LEVEL_INFO, "RPC: Debug buf addr 0x%llx\n", pVGpu->gspCtrlBuf->v1.debugBuf.addr); return status; } @@ -1286,6 +1378,8 @@ void vgpuGspTeardownBuffers(OBJGPU *pGpu) } } + _teardownGspDebugBuff(pGpu, pVGpu); + _teardownGspSharedMemory(pGpu, pVGpu); _teardownGspEventInfrastructure(pGpu, pVGpu); @@ -1354,6 +1448,13 @@ NV_STATUS vgpuGspSetupBuffers(OBJGPU *pGpu) goto fail; } + status = _setupGspDebugBuff(pGpu, pVGpu); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "RPC: Debug memory setup failed: 0x%x\n", status); + goto fail; + } + // Update Guest OS Type, before establishing communication with GSP. vgpuUpdateGuestOsType(pGpu, pVGpu); @@ -1377,6 +1478,13 @@ NV_STATUS vgpuGspSetupBuffers(OBJGPU *pGpu) // Update Guest ECC status based on Host ECC status, after establishing RPC with GSP. setGuestEccStatus(pGpu); + status = _tryEnableGspDebugBuff(pGpu, pVGpu); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "RPC: Enable debug buffer failed: 0x%x\n", status); + goto fail; + } + pVGpu->bGspBuffersInitialized = NV_TRUE; return NV_OK; @@ -1932,19 +2040,16 @@ static NV_STATUS _issuePteDescRpc OBJGPU *pGpu, OBJRPC *pRpc, NvU32 offsetToPTE, - NvU32 pageCount, - RmPhysAddr *guestPages, - NvBool physicallyContiguous + NvU32 pteCount, + RmPhysAddr *guestPages ) { rpc_message_header_v *pHdr = vgpu_rpc_message_header_v; void *pAllocatedRecord = NULL; struct pte_desc *pPteDesc; - NvU64 contigBase; NV_STATUS nvStatus = NV_OK; NvU32 recordSize; NvU32 i; - DMA_PAGE_ARRAY pageArray; NV_ASSERT_OR_RETURN(pGpu != NULL, NV_ERR_INVALID_ARGUMENT); NV_ASSERT_OR_RETURN(pRpc != NULL, NV_ERR_INVALID_ARGUMENT); @@ -1952,7 +2057,7 @@ static NV_STATUS _issuePteDescRpc NV_ASSERT_OR_RETURN(pHdr != NULL, NV_ERR_INVALID_ARGUMENT); recordSize = offsetToPTE + NV_OFFSETOF(struct pte_desc, pte_pde[0].pte) + - (pageCount * NV_VGPU_PTE_64_SIZE); + (pteCount * NV_VGPU_PTE_64_SIZE); if (recordSize > pRpc->maxRpcSize) { @@ -1971,20 +2076,13 @@ static NV_STATUS _issuePteDescRpc pHdr = (rpc_message_header_v *)pAllocatedRecord; } - dmaPageArrayInit(&pageArray, guestPages, pageCount); - pPteDesc = (struct pte_desc *)NvP64_PLUS_OFFSET(pHdr, offsetToPTE); pPteDesc->idr = NV_VGPU_PTEDESC_IDR_NONE; - pPteDesc->length = pageCount; - contigBase = (dmaPageArrayGetPhysAddr(&pageArray, 0) >> RM_PAGE_SHIFT); + pPteDesc->length = pteCount; - for (i = 0; i < pageCount; i++) + for (i = 0; i < pteCount; i++) { - if (physicallyContiguous) - pPteDesc->pte_pde[i].pte = contigBase + i; - else - pPteDesc->pte_pde[i].pte = - (dmaPageArrayGetPhysAddr(&pageArray, i) >> RM_PAGE_SHIFT); + pPteDesc->pte_pde[i].pte = guestPages[i] >> RM_PAGE_SHIFT; } nvStatus = _issueRpcAndWaitLarge(pGpu, pRpc, recordSize, pHdr, NV_FALSE); @@ -2278,6 +2376,13 @@ NV_STATUS _serializeClassParams_v(OBJGPU *pGpu, OBJRPC *pRpc, NvU32 hClass, void break; } + case MAXWELL_PROFILER_CONTEXT: + { + NVB1CC_ALLOC_PARAMETERS *pParams = pCreateParms; + params->param_NVB1CC_ALLOC_PARAMETERS.hSubDevice = pParams->hSubDevice; + param_length = sizeof(params->param_NVB1CC_ALLOC_PARAMETERS); + break; + } case MAXWELL_PROFILER_DEVICE: { NVB2CC_ALLOC_PARAMETERS *pParams = pCreateParms; @@ -3107,15 +3212,22 @@ NV_STATUS rpcAllocMemory_v13_01(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient, Nv rpc_message->alloc_memory_v13_01.pteAdjust = pMemDesc->PteAdjust; rpc_message->alloc_memory_v13_01.format = memdescGetPteKind(pMemDesc); rpc_message->alloc_memory_v13_01.length = pMemDesc->Size; + // Allocations made by a virtulaized guest may not actually be contiguous + // so the legacy path requires a PTE per page of the memdesc. In the case + // of a memdesc that claims to be contiguous, _writePteDescEntires expands + // the array of PTEs based on the single PTE from memdescGetPteArray and + // the number of pages specified by pageCount. rpc_message->alloc_memory_v13_01.pageCount = (NvU32)pMemDesc->PageCount; - if (IS_GSP_CLIENT(pGpu)) { + // For GSP, only send the actual PTEs set up with the memdesc. + // When the memdesc is contiguous this only sends 1 PTE. + rpc_message->alloc_memory_v13_01.pageCount = memdescGetPteArraySize(pMemDesc, AT_GPU); status = _issuePteDescRpc(pGpu, pRpc, - NV_OFFSETOF(rpc_message_header_v, rpc_message_data[0].alloc_memory_v13_01.pteDesc), - pMemDesc->PageCount, - memdescGetPteArray(pMemDesc, AT_GPU), - memdescGetContiguity(pMemDesc, AT_GPU)); + NV_OFFSETOF(rpc_message_header_v, + rpc_message_data[0].alloc_memory_v13_01.pteDesc), + memdescGetPteArraySize(pMemDesc, AT_GPU), + memdescGetPteArray(pMemDesc, AT_GPU)); } return status; @@ -4295,6 +4407,12 @@ NV_STATUS rpcDmaControl_wrapper(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient, Nv case NV2080_CTRL_CMD_NVLINK_INBAND_SEND_DATA: return rpcCtrlCmdNvlinkInbandSendData_HAL(pGpu, pRpc, pParamStructPtr); + case NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING: + return rpcDisableChannels_HAL(pGpu, pRpc, pParamStructPtr); + + case NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE: + return rpcCtrlCmdInternalControlGspTrace_HAL(pGpu, pRpc, pParamStructPtr); + default: { NV_PRINTF(LEVEL_ERROR, "DMA Control Command cmd 0x%x NOT supported\n", cmd); @@ -5319,6 +5437,34 @@ NV_STATUS rpcCtrlGrCtxswPreemptionBind_v1A_0E(OBJGPU *pGpu, OBJRPC *pRpc, NvHand return status; } +NV_STATUS rpcCtrlGrCtxswPreemptionBind_v28_07(OBJGPU* pGpu, OBJRPC* pRpc, NvHandle hClient, NvHandle hObject, void* pParamStructPtr) +{ + NV_STATUS status; + NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS* pParams = (NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS*)pParamStructPtr; + rpc_ctrl_gr_ctxsw_preemption_bind_v28_07* rpc_params = &rpc_message->ctrl_gr_ctxsw_preemption_bind_v28_07; + + status = rpcWriteCommonHeader(pGpu, + pRpc, + NV_VGPU_MSG_FUNCTION_CTRL_GR_CTXSW_PREEMPTION_BIND, + sizeof(rpc_ctrl_gr_ctxsw_preemption_bind_v28_07)); + if (status != NV_OK) + return status; + + rpc_params->hClient = hClient; + rpc_params->hObject = hObject; + + status = serialize_NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS_v28_07(pParams, (NvU8*)&rpc_params->ctrlParams, 0, NULL); + if (status != NV_OK) + return status; + + status = _issueRpcAndWait(pGpu, pRpc); + if (status != NV_OK) + return status; + + status = deserialize_NV2080_CTRL_GR_CTXSW_PREEMPTION_BIND_PARAMS_v28_07(pParams, (NvU8*)&rpc_params->ctrlParams, 0, NULL); + return status; +} + NV_STATUS rpcCtrlGrSetCtxswPreemptionMode_v1A_0E(OBJGPU *pGpu, OBJRPC *pRpc, NvHandle hClient, NvHandle hObject, void *pParamStructPtr) { NV_STATUS status; @@ -8767,9 +8913,11 @@ NV_STATUS rpcVgpuPfRegRead32_v15_00(OBJGPU *pGpu, return NV_ERR_NOT_SUPPORTED; } -NV_STATUS rpcDisableChannels_v1E_0B(OBJGPU *pGpu, OBJRPC *pRpc, NvU32 bDisable) +NV_STATUS rpcDisableChannels_v1E_0B(OBJGPU *pGpu, OBJRPC *pRpc, void *pParamStructPtr) { NV_STATUS status = NV_OK; + NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING_PARAMS *pParams = + (NV2080_CTRL_CMD_INTERNAL_FIFO_TOGGLE_ACTIVE_CHANNEL_SCHEDULING_PARAMS *)pParamStructPtr; if (IS_VIRTUAL_WITHOUT_SRIOV(pGpu) || (IS_VIRTUAL_WITH_SRIOV(pGpu) && gpuIsWarBug200577889SriovHeavyEnabled(pGpu))) @@ -8780,7 +8928,7 @@ NV_STATUS rpcDisableChannels_v1E_0B(OBJGPU *pGpu, OBJRPC *pRpc, NvU32 bDisable) if (status != NV_OK) return status; - rpc_message->disable_channels_v1E_0B.bDisable = bDisable; + rpc_message->disable_channels_v1E_0B.bDisable = pParams->bDisableActiveChannels; status = _issueRpcAndWait(pGpu, pRpc); @@ -8902,6 +9050,7 @@ NV_STATUS rpcGspSetSystemInfo_v17_00 GPU_GET_KERNEL_BIF(pGpu)->pcieAtomicsCplDeviceCapMask : 0U; rpcInfo->consoleMemSize = GPU_GET_MEMORY_MANAGER(pGpu)->Ram.ReservedConsoleDispMemSize; rpcInfo->maxUserVa = osGetMaxUserVa(); + rpcInfo->bEnableDynamicGranularityPageArrays = GPU_GET_MEMORY_MANAGER(pGpu)->bEnableDynamicGranularityPageArrays; OBJCL *pCl = SYS_GET_CL(SYS_GET_INSTANCE()); if (pCl != NULL) @@ -8911,6 +9060,7 @@ NV_STATUS rpcGspSetSystemInfo_v17_00 // Fill in the cached ACPI method data rpcInfo->acpiMethodData = pGpu->acpiMethodData; + rpcInfo->bSystemHasMux = pGpu->bSystemHasMux; // Fill in ASPM related GPU flags rpcInfo->bGpuBehindBridge = pGpu->getProperty(pGpu, PDB_PROP_GPU_BEHIND_BRIDGE); @@ -9730,3 +9880,24 @@ NV_STATUS rpcCtrlCmdNvlinkInbandSendData_v26_05 return status; } +NV_STATUS rpcCtrlCmdInternalControlGspTrace_v28_00 +( + OBJGPU *pGpu, + OBJRPC *pRpc, + NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE_PARAMS *pParams +) +{ + NV_STATUS status = NV_ERR_NOT_SUPPORTED; + status = rpcWriteCommonHeader(pGpu, pRpc, NV_VGPU_MSG_FUNCTION_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE, + sizeof(rpc_ctrl_cmd_internal_control_gsp_trace_v28_00)); + if (status != NV_OK) + return status; + + rpc_message->ctrl_cmd_internal_control_gsp_trace_v28_00.tracepointMask = pParams->tracepointMask; + rpc_message->ctrl_cmd_internal_control_gsp_trace_v28_00.bufferAddr = pParams->bufferAddr; + rpc_message->ctrl_cmd_internal_control_gsp_trace_v28_00.bufferSize = pParams->bufferSize; + rpc_message->ctrl_cmd_internal_control_gsp_trace_v28_00.bufferWatermark = pParams->bufferWatermark; + rpc_message->ctrl_cmd_internal_control_gsp_trace_v28_00.flag = pParams->flag; + status = _issueRpcAndWait(pGpu, pRpc); + return status; +} diff --git a/src/nvidia/src/kernel/vgpu/rpcstructurecopy.c b/src/nvidia/src/kernel/vgpu/rpcstructurecopy.c index 6a534da976..87d87b721c 100644 --- a/src/nvidia/src/kernel/vgpu/rpcstructurecopy.c +++ b/src/nvidia/src/kernel/vgpu/rpcstructurecopy.c @@ -1407,6 +1407,61 @@ NV_STATUS deserialize_GPU_PARTITION_INFO_v24_05(GPU_PARTITION_INFO *gpuPartition return NVOS_STATUS_SUCCESS; } +NV_STATUS deserialize_GPU_PARTITION_INFO_v28_02(GPU_PARTITION_INFO *gpuPartitionInfo, NvU8 *buffer, NvU32 bufferSize, NvU32 *offset) +{ + if (!offset) + { + return NVOS_STATUS_ERROR_INVALID_ARGUMENT; + } + + // If gpuPartitionInfo and buffer are valid, then copy data and return the offset + if (gpuPartitionInfo && buffer) + { + NvU32 i; + GPU_PARTITION_INFO_v28_02 *gpu_partition_info_v28_02 = NULL; + + if ((bufferSize < *offset) || + (bufferSize < (*offset + sizeof(GPU_PARTITION_INFO_v28_02)))) + { + return NV_ERR_BUFFER_TOO_SMALL; + } + + gpu_partition_info_v28_02 = (void*)(buffer + *offset); + + // GPU PARTITION INFO + gpuPartitionInfo->swizzId = gpu_partition_info_v28_02->swizzId; + gpuPartitionInfo->grEngCount = gpu_partition_info_v28_02->grEngCount; + gpuPartitionInfo->veidCount = gpu_partition_info_v28_02->veidCount; + gpuPartitionInfo->ceCount = gpu_partition_info_v28_02->ceCount; + gpuPartitionInfo->gpcCount = gpu_partition_info_v28_02->gpcCount; + gpuPartitionInfo->virtualGpcCount = gpu_partition_info_v28_02->virtualGpcCount; + gpuPartitionInfo->gfxGpcCount = gpu_partition_info_v28_02->gfxGpcCount; + gpuPartitionInfo->nvDecCount = gpu_partition_info_v28_02->nvDecCount; + gpuPartitionInfo->nvEncCount = gpu_partition_info_v28_02->nvEncCount; + gpuPartitionInfo->nvJpgCount = gpu_partition_info_v28_02->nvJpgCount; + gpuPartitionInfo->partitionFlag = gpu_partition_info_v28_02->partitionFlag; + gpuPartitionInfo->smCount = gpu_partition_info_v28_02->smCount; + gpuPartitionInfo->nvOfaCount = gpu_partition_info_v28_02->nvOfaCount; + gpuPartitionInfo->memSize = gpu_partition_info_v28_02->memSize; + gpuPartitionInfo->bValid = gpu_partition_info_v28_02->bValid; + gpuPartitionInfo->span.lo = gpu_partition_info_v28_02->span.lo; + gpuPartitionInfo->span.hi = gpu_partition_info_v28_02->span.hi; + gpuPartitionInfo->validCTSIdMask = gpu_partition_info_v28_02->validCTSIdMask; + gpuPartitionInfo->validGfxCTSIdMask = gpu_partition_info_v28_02->validGfxCTSIdMask; + + for (i = 0; i < gpuPartitionInfo->grEngCount; i++) + { + gpuPartitionInfo->gpcsPerGr[i] = gpu_partition_info_v28_02->gpcsPerGr[i]; + gpuPartitionInfo->veidsPerGr[i] = gpu_partition_info_v28_02->veidsPerGr[i]; + gpuPartitionInfo->virtualGpcsPerGr[i] = gpu_partition_info_v28_02->virtualGpcsPerGr[i]; + gpuPartitionInfo->gfxGpcPerGr[i] = gpu_partition_info_v28_02->gfxGpcPerGr[i]; + } + } + *offset += sizeof(GPU_PARTITION_INFO_v28_02); + + return NVOS_STATUS_SUCCESS; +} + // NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS deserialization is used starting with v24_06 NV_STATUS deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v15_01(NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS *eccStatusParams, NvU8 *buffer, NvU32 bufferSize, NvU32 *offset) { @@ -1542,6 +1597,82 @@ NV_STATUS deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v27_04(NV2080_CTRL return NVOS_STATUS_SUCCESS; } +NV_STATUS deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v28_01(NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS *eccStatusParams, NvU8 *buffer, NvU32 bufferSize, NvU32 *offset) +{ + if (offset == NULL) + { + return NVOS_STATUS_ERROR_INVALID_ARGUMENT; + } + + // If eccStatusParams and buffer are valid, then copy data and return the offset + if (eccStatusParams && buffer) + { + NvU32 i; + NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v28_01 *eccStatusParams_v28_01 = NULL; + + if ((bufferSize < *offset) || + (bufferSize < (*offset + sizeof(NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v28_01)))) + { + return NV_ERR_BUFFER_TOO_SMALL; + } + + eccStatusParams_v28_01 = (void*)(buffer + *offset); + + eccStatusParams->bFatalPoisonError = eccStatusParams_v28_01->bFatalPoisonError; + + for (i = 0; i < NV2080_CTRL_GPU_ECC_UNIT_COUNT_v28_01; i++) { + eccStatusParams->units[i].enabled = eccStatusParams_v28_01->units[i].enabled; + eccStatusParams->units[i].scrubComplete = eccStatusParams_v28_01->units[i].scrubComplete; + eccStatusParams->units[i].supported = eccStatusParams_v28_01->units[i].supported; + eccStatusParams->units[i].dbe.count = eccStatusParams_v28_01->units[i].dbe.count; + eccStatusParams->units[i].dbeNonResettable.count = eccStatusParams_v28_01->units[i].dbeNonResettable.count; + eccStatusParams->units[i].sbe.count = eccStatusParams_v28_01->units[i].sbe.count; + eccStatusParams->units[i].sbeNonResettable.count = eccStatusParams_v28_01->units[i].sbeNonResettable.count; + } + } + *offset += sizeof(NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v28_01); + + return NVOS_STATUS_SUCCESS; +} + +NV_STATUS deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v28_08(NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS *eccStatusParams, NvU8 *buffer, NvU32 bufferSize, NvU32 *offset) +{ + if (offset == NULL) + { + return NVOS_STATUS_ERROR_INVALID_ARGUMENT; + } + + // If eccStatusParams and buffer are valid, then copy data and return the offset + if (eccStatusParams && buffer) + { + NvU32 i; + NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v28_08 *eccStatusParams_v28_08 = NULL; + + if ((bufferSize < *offset) || + (bufferSize < (*offset + sizeof(NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v28_08)))) + { + return NV_ERR_BUFFER_TOO_SMALL; + } + + eccStatusParams_v28_08 = (void*)(buffer + *offset); + + eccStatusParams->bFatalPoisonError = eccStatusParams_v28_08->bFatalPoisonError; + + for (i = 0; i < NV2080_CTRL_GPU_ECC_UNIT_COUNT_v28_08; i++) { + eccStatusParams->units[i].enabled = eccStatusParams_v28_08->units[i].enabled; + eccStatusParams->units[i].scrubComplete = eccStatusParams_v28_08->units[i].scrubComplete; + eccStatusParams->units[i].supported = eccStatusParams_v28_08->units[i].supported; + eccStatusParams->units[i].dbe.count = eccStatusParams_v28_08->units[i].dbe.count; + eccStatusParams->units[i].dbeNonResettable.count = eccStatusParams_v28_08->units[i].dbeNonResettable.count; + eccStatusParams->units[i].sbe.count = eccStatusParams_v28_08->units[i].sbe.count; + eccStatusParams->units[i].sbeNonResettable.count = eccStatusParams_v28_08->units[i].sbeNonResettable.count; + } + } + *offset += sizeof(NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v28_08); + + return NVOS_STATUS_SUCCESS; +} + NV_STATUS deserialize_GPU_EXEC_SYSPIPE_INFO_v26_01(GPU_EXEC_SYSPIPE_INFO *execSyspipeInfo, NvU8 *buffer, NvU32 bufferSize, NvU32 *offset) { if (!offset) @@ -2217,6 +2348,46 @@ NV_STATUS deserialize_NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS_v27_05( return NVOS_STATUS_SUCCESS; } +NV_STATUS deserialize_NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS_v28_04( + NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS *pParams, NvU8 *buffer, NvU32 bufferSize, + NvU32 *offset) +{ + NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS_v28_04 *pParams_v28_04 = NULL; + if (offset == NULL) + { + return NVOS_STATUS_ERROR_INVALID_ARGUMENT; + } + if (pParams != NULL && buffer != NULL) + { + NvU32 i; + if ((bufferSize < *offset) || + (bufferSize < (*offset + sizeof(*pParams_v28_04)))) + { + return NV_ERR_BUFFER_TOO_SMALL; + } + pParams_v28_04 = (void*)(buffer + *offset); + pParams->numEntries = pParams_v28_04->numEntries; + for (i = 0; i < NV2080_CTRL_CMD_INTERNAL_DEVICE_INFO_MAX_ENTRIES_V28_04; i++) { + NV2080_CTRL_INTERNAL_DEVICE_INFO *dst = &(pParams->deviceInfoTable[i]); + NV2080_CTRL_INTERNAL_DEVICE_INFO_v28_04 *src = &(pParams_v28_04->deviceInfoTable[i]); + dst->faultId = src->faultId; + dst->instanceId = src->instanceId; + dst->typeEnum = src->typeEnum; + dst->resetId = src->resetId; + dst->devicePriBase = src->devicePriBase; + dst->isEngine = src->isEngine; + dst->rlEngId = src->rlEngId; + dst->runlistPriBase = src->runlistPriBase; + dst->groupId = src->groupId; + dst->ginTargetId = src->ginTargetId; + dst->deviceBroadcastPriBase = src->deviceBroadcastPriBase; + dst->groupLocalInstanceId = src->groupLocalInstanceId; + } + } + *offset += sizeof(*pParams_v28_04); + return NVOS_STATUS_SUCCESS; +} + NV_STATUS deserialize_NV2080_CTRL_INTERNAL_MEMSYS_GET_STATIC_CONFIG_PARAMS_v25_06( NV2080_CTRL_INTERNAL_MEMSYS_GET_STATIC_CONFIG_PARAMS *pParams, NvU8 *buffer, NvU32 bufferSize, NvU32 *offset) diff --git a/src/nvidia/src/kernel/vgpu/vgpu_events.c b/src/nvidia/src/kernel/vgpu/vgpu_events.c index 93d5896e79..cc21472f97 100644 --- a/src/nvidia/src/kernel/vgpu/vgpu_events.c +++ b/src/nvidia/src/kernel/vgpu/vgpu_events.c @@ -45,6 +45,7 @@ #include "gpu/device/device.h" #include "gpu/mem_sys/kern_mem_sys.h" #include "gpu/timer/objtmr.h" +#include "kernel/gpu/gsp/gsp_trace_rats_macro.h" #include "Nvcm.h" #include "gpu/mem_mgr/mem_desc.h" @@ -225,7 +226,7 @@ void vgpuServiceEventRC(OBJGPU *pGpu, OBJVGPU *pVGpu, VGPU_EVENT_BUF_ENTRY *pEve NvU32 exceptType = pEventEntry->info32; NvU32 nv2080EngineID = pEventEntry->info16 & DRF_SHIFTMASK(NV_VGPU_EV_NOTIFIER_INFO16_VALUE); NvU32 chID = pEventEntry->rcChid; - RM_ENGINE_TYPE rmEngineType = gpuGetRmEngineType(nv2080EngineID); + RM_ENGINE_TYPE rmEngineType = gpuGetRmEngineType(nv2080EngineID); NV_PRINTF(LEVEL_ERROR, "ROBUST_CHANNEL error occurred (hClient = 0x%x hFifo = 0x%x chID = %d exceptType = %d engineID = 0x%x (0x%x)) ...\n", @@ -398,6 +399,13 @@ void vgpuServiceEventInbandResponse(OBJGPU *pGpu, OBJVGPU *pVGpu) portMemFree(pData); } +void vgpuServiceEventTracing(OBJGPU *pGpu, OBJVGPU *pVGpu) +{ +#if KERNEL_GSP_TRACING_RATS_ENABLED + gspTraceServiceVgpuEventTracing(pGpu); +#endif +} + void vgpuServiceEvents(OBJGPU *pGpu, OBJVGPU *pVGpu) { VGPU_EVENT_BUF_ENTRY *pEventEntry; @@ -446,6 +454,10 @@ void vgpuServiceEvents(OBJGPU *pGpu, OBJVGPU *pVGpu) vgpuServiceEventInbandResponse(pGpu, pVGpu); break; + case NV_VGPU_EV_FLAGS_TYPE_TRACING: + vgpuServiceEventTracing(pGpu,pVGpu); + break; + default: NV_PRINTF(LEVEL_ERROR, "Unsupported vgpu event type %d\n", DRF_VAL(_VGPU, _EV_FLAGS, _TYPE, flags)); diff --git a/src/nvidia/src/kernel/virtualization/common_vgpu_mgr.c b/src/nvidia/src/kernel/virtualization/common_vgpu_mgr.c index 0618040733..44ad21297d 100644 --- a/src/nvidia/src/kernel/virtualization/common_vgpu_mgr.c +++ b/src/nvidia/src/kernel/virtualization/common_vgpu_mgr.c @@ -27,6 +27,10 @@ #include "ctrl/ctrl2080/ctrl2080gpu.h" +#if PORT_MEM_TRACK_USE_LIMIT +ct_assert(PORT_MEM_LIMIT_MAX_GFID == VGPU_MAX_GFID); +#endif + // Get vGPU license product name from license info static char * getGridLicenseProductName(const char* licenseInfo) { diff --git a/src/nvidia/src/kernel/virtualization/kernel_hostvgpudeviceapi.c b/src/nvidia/src/kernel/virtualization/kernel_hostvgpudeviceapi.c index a9c05c0460..bc3126a546 100644 --- a/src/nvidia/src/kernel/virtualization/kernel_hostvgpudeviceapi.c +++ b/src/nvidia/src/kernel/virtualization/kernel_hostvgpudeviceapi.c @@ -27,7 +27,6 @@ #include "core/core.h" #include "core/locks.h" #include "os/os.h" -#include "virtualization/kernel_hostvgpudeviceapi.h" #include "dev_ctrl_defines.h" #include "mem_mgr/mem.h" #include "kernel/gpu/bif/kernel_bif.h" @@ -76,13 +75,7 @@ kernelhostvgpudeviceapiConstruct_IMPL { NV_STATUS status = NV_OK; OBJGPU *pGpu = GPU_RES_GET_GPU(pKernelHostVgpuDeviceApi); - KernelGsp *pKernelGsp = GPU_GET_KERNEL_GSP(pGpu); - RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); NVA084_ALLOC_PARAMETERS *pAllocParams = pParams->pAllocParams; - NV2080_CTRL_VGPU_MGR_INTERNAL_BOOTLOAD_GSP_VGPU_PLUGIN_TASK_PARAMS *pBootloadParams = NULL; - Memory *pMemory; - NvU32 i; - NvU64 vmmuSegmentSize; KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice = NULL; RsShared *pShared; Device *pDevice; @@ -126,172 +119,13 @@ kernelhostvgpudeviceapiConstruct_IMPL status = serverAllocShare(&g_resServ, classInfo(KernelHostVgpuDeviceShr), &pShared); if (status != NV_OK) goto allocShareError; - pKernelHostVgpuDeviceApi->pShared = dynamicCast(pShared, KernelHostVgpuDeviceShr); - pKernelHostVgpuDeviceApi->pShared->pDevice = pKernelHostVgpuDevice; - pKernelHostVgpuDevice->pGspPluginHeapMemDesc = NULL; - - if (IS_GSP_CLIENT(pGpu)) - { - KernelMemorySystem *pKernelMemorySystem = GPU_GET_KERNEL_MEMORY_SYSTEM(pGpu); - - if (!IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu) || !gpuIsSriovEnabled(pGpu)) - { - status = NV_ERR_NOT_SUPPORTED; - goto done; - } - - if (pAllocParams->numGuestFbHandles == 0 || pAllocParams->numGuestFbHandles > NVA084_MAX_VMMU_SEGMENTS) - { - status = NV_ERR_INVALID_ARGUMENT; - goto done; - } - - vmmuSegmentSize = gpuGetVmmuSegmentSize(pGpu); - if (vmmuSegmentSize == 0) - { - status = NV_ERR_INVALID_STATE; - goto done; - } - - // This structure can't be allocated on stack because it will result function stack usage > 4KB - pBootloadParams = portMemAllocNonPaged(sizeof(*pBootloadParams)); - if (pBootloadParams == NULL) - { - status = NV_ERR_NO_MEMORY; - goto done; - } - portMemSet(pBootloadParams, 0, sizeof(*pBootloadParams)); - - if (gpuIsSelfHosted(pGpu)) - { - pKernelHostVgpuDevice->hbmRegionList = portMemAllocNonPaged(sizeof(HBM_REGION_INFO)* pAllocParams->numGuestFbHandles); - if (pKernelHostVgpuDevice->hbmRegionList == NULL) - { - status = NV_ERR_NO_MEMORY; - goto done; - } - - pKernelHostVgpuDevice->numValidHbmRegions = 0; - } - - for (i = 0; i < pAllocParams->numGuestFbHandles; i++) - { - status = memGetByHandle(pClient, pAllocParams->guestFbHandleList[i], &pMemory); - if (status != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, "Invalid Memory handle\n"); - goto done; - } - pBootloadParams->guestFbPhysAddrList[i] = memdescGetPhysAddr(pMemory->pMemDesc, AT_GPU, 0); - pBootloadParams->guestFbLengthList[i] = pMemory->pMemDesc->Size; - - if (!NV_IS_ALIGNED64(pBootloadParams->guestFbPhysAddrList[i], vmmuSegmentSize) || - !NV_IS_ALIGNED64(pBootloadParams->guestFbLengthList[i], vmmuSegmentSize)) - { - NV_PRINTF(LEVEL_ERROR, "guest fb segment PA or length is not VMMU segment size aligned\n"); - status = NV_ERR_INVALID_ARGUMENT; - goto done; - } - if (gpuIsSelfHosted(pGpu)) - { - pKernelHostVgpuDevice->hbmRegionList[i].hbmBaseAddr = memdescGetPhysAddr(pMemory->pMemDesc, AT_GPU, 0); - pKernelHostVgpuDevice->hbmRegionList[i].hbmBaseAddr += pKernelMemorySystem->coherentCpuFbBase; - pKernelHostVgpuDevice->hbmRegionList[i].size = pMemory->pMemDesc->Size; - pKernelHostVgpuDevice->numValidHbmRegions++; - } - } - - status = memGetByHandle(pClient, pAllocParams->hPluginHeapMemory, &pMemory); - if (status != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, "Invalid plugin heap Memory handle\n"); - goto done; - } - - pKernelHostVgpuDevice->pGspPluginHeapMemDesc = pMemory->pMemDesc; - - // As GSP-RM will map this memory in vGPU-GSP-Plugin's address space, it - // should be referenced to make sure it doesn't get freed before - // vGPU-Gsp-Plugin's usage has been removed - memdescAddRef(pKernelHostVgpuDevice->pGspPluginHeapMemDesc); - - pBootloadParams->pluginHeapMemoryPhysAddr = memdescGetPhysAddr(pMemory->pMemDesc, AT_GPU, 0); - pBootloadParams->pluginHeapMemoryLength = pMemory->pMemDesc->Size; - - // Initialize logging buffers for vgpu partition - { - if ((pAllocParams->initTaskLogBuffOffset + pAllocParams->initTaskLogBuffSize) >= - pBootloadParams->pluginHeapMemoryLength) - { - NV_PRINTF(LEVEL_ERROR, "Invalid init task log buffer\n"); - status = NV_ERR_INVALID_ARGUMENT; - goto done; - } - if ((pAllocParams->vgpuTaskLogBuffOffset + pAllocParams->vgpuTaskLogBuffSize) >= - pBootloadParams->pluginHeapMemoryLength) - { - NV_PRINTF(LEVEL_ERROR, "Invalid vgpu task log buffer\n"); - status = NV_ERR_INVALID_ARGUMENT; - goto done; - } + pKernelHostVgpuDeviceApi->pShared = dynamicCast(pShared, KernelHostVgpuDeviceShr); + pKernelHostVgpuDeviceApi->pShared->pDevice = pKernelHostVgpuDevice; + pKernelHostVgpuDevice->pGspPluginHeapMemDesc = NULL; + pKernelHostVgpuDevice->bGspPluginTaskInitialized = NV_FALSE; - if ((pAllocParams->kernelLogBuffOffset + pAllocParams->kernelLogBuffSize) >= - pBootloadParams->pluginHeapMemoryLength) - { - NV_PRINTF(LEVEL_ERROR, "Invalid vgpu kernel log buffer\n"); - status = NV_ERR_INVALID_ARGUMENT; - goto done; - } - - - pBootloadParams->initTaskLogBuffOffset = pAllocParams->initTaskLogBuffOffset + pBootloadParams->pluginHeapMemoryPhysAddr; - pBootloadParams->initTaskLogBuffSize = pAllocParams->initTaskLogBuffSize; - pBootloadParams->vgpuTaskLogBuffOffset = pAllocParams->vgpuTaskLogBuffOffset + pBootloadParams->pluginHeapMemoryPhysAddr; - pBootloadParams->vgpuTaskLogBuffSize = pAllocParams->vgpuTaskLogBuffSize; - pBootloadParams->kernelLogBuffOffset = pAllocParams->kernelLogBuffOffset + pBootloadParams->pluginHeapMemoryPhysAddr; - pBootloadParams->kernelLogBuffSize = pAllocParams->kernelLogBuffSize; - - NV_CHECK_OK_OR_GOTO(status, - LEVEL_ERROR, - kgspInitVgpuPartitionLogging_HAL(pGpu, pKernelGsp, pAllocParams->gfid, - pBootloadParams->initTaskLogBuffOffset, - pBootloadParams->initTaskLogBuffSize, - pBootloadParams->vgpuTaskLogBuffOffset, - pBootloadParams->vgpuTaskLogBuffSize, - pBootloadParams->kernelLogBuffOffset, - pBootloadParams->kernelLogBuffSize), - done); - } - - - pBootloadParams->gfid = pAllocParams->gfid; - pBootloadParams->swizzId = pAllocParams->swizzId; - pBootloadParams->numGuestFbSegments = pAllocParams->numGuestFbHandles; - pBootloadParams->ctrlBuffOffset = pAllocParams->ctrlBuffOffset; - pBootloadParams->bDeviceProfilingEnabled = pAllocParams->bDeviceProfilingEnabled; - - // Populate chidOffset for all engines to reserve same chid in GSP-RM - for (i = 0; i < NV2080_ENGINE_TYPE_LAST; i++) - { - NvU32 rmEngineType = gpuGetRmEngineType(i); - - // - // pHostVgpuDevice->chidOffset is in RM_ENGINE_TYPE order - // pBootloadParams->chidOffset is in NV2080_ENGINE_TYPE order - // - pBootloadParams->chidOffset[i] = pKernelHostVgpuDevice->chidOffset[rmEngineType]; - } - - status = pRmApi->Control(pRmApi, pGpu->hInternalClient, pGpu->hInternalSubdevice, - NV2080_CTRL_CMD_VGPU_MGR_INTERNAL_BOOTLOAD_GSP_VGPU_PLUGIN_TASK, - pBootloadParams, sizeof(*pBootloadParams)); - if (status != NV_OK) - { - NV_PRINTF(LEVEL_ERROR, "Failed to call NV2080_CTRL_CMD_VGPU_MGR_INTERNAL_BOOTLOAD_GSP_VGPU_PLUGIN_TASK\n"); - goto freeLogging; - } - } + pKernelHostVgpuDevice->bGpupLiveMigrationEnabled = pAllocParams->bGpupLiveMigrationEnabled; if (status == NV_OK) { @@ -300,7 +134,7 @@ kernelhostvgpudeviceapiConstruct_IMPL if (pDevice->pKernelHostVgpuDevice != NULL) { status = NV_ERR_INVALID_STATE; - goto freeLogging; + goto done; } pDevice->pKernelHostVgpuDevice = pKernelHostVgpuDevice; } @@ -308,16 +142,7 @@ kernelhostvgpudeviceapiConstruct_IMPL CliNotifyVgpuConfigEvent(pGpu, NVA081_NOTIFIERS_EVENT_VGPU_GUEST_CREATED); } -freeLogging: - if (status != NV_OK && IS_GSP_CLIENT(pGpu) && pBootloadParams != NULL) - { - // Free vgpu partition LIBOS task logging structures. - NV_ASSERT_OK(kgspFreeVgpuPartitionLogging_HAL(pGpu, pKernelGsp, pKernelHostVgpuDevice->gfid)); - } - done: - portMemFree(pBootloadParams); - if (status != NV_OK) { if (pKernelHostVgpuDevice->hbmRegionList != NULL) @@ -405,7 +230,7 @@ destroyKernelHostVgpuDeviceShare(OBJGPU *pGpu, KernelHostVgpuDeviceShr* pShare) pDevice->pKernelHostVgpuDevice = NULL; } - if (IS_GSP_CLIENT(pGpu)) + if (IS_GSP_CLIENT(pGpu) && pKernelHostVgpuDevice->bGspPluginTaskInitialized) { RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); NV2080_CTRL_VGPU_MGR_INTERNAL_SHUTDOWN_GSP_VGPU_PLUGIN_TASK_PARAMS shutdownParams = { 0 }; @@ -465,6 +290,9 @@ kernelhostvgpudeviceapiCtrlCmdSetVgpuDeviceInfo_IMPL NV_PRINTF(LEVEL_INFO, "%s\n", __FUNCTION__); + NV_ASSERT_OR_RETURN(!IS_GSP_CLIENT(pGpu) || pKernelHostVgpuDeviceApi->pShared->pDevice->bGspPluginTaskInitialized, + NV_ERR_INVALID_STATE); + pKernelHostVgpuDevice = pKernelHostVgpuDeviceApi->pShared->pDevice; portMemCopy(pKernelHostVgpuDevice->vgpuUuid, RM_SHA1_GID_SIZE, pParams->vgpuUuid, RM_SHA1_GID_SIZE); @@ -486,6 +314,9 @@ kernelhostvgpudeviceapiCtrlCmdSetVgpuGuestLifeCycleState_IMPL NV_PRINTF(LEVEL_INFO, "%s\n", __FUNCTION__); + NV_ASSERT_OR_RETURN(!IS_GSP_CLIENT(pGpu) || pKernelHostVgpuDeviceApi->pShared->pDevice->bGspPluginTaskInitialized, + NV_ERR_INVALID_STATE); + if (pParams->vmLifeCycleState == NVA081_NOTIFIERS_EVENT_VGPU_GUEST_DESTROYED) status = kvgpumgrClearGuestVmInfo(pGpu, pKernelHostVgpuDeviceApi->pShared->pDevice); @@ -600,6 +431,9 @@ kernelhostvgpudeviceapiCtrlCmdSetOfflinedPagePatchInfo_IMPL NvU64 Spa = 0; KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice; + NV_ASSERT_OR_RETURN(!IS_GSP_CLIENT(pGpu) || pKernelHostVgpuDeviceApi->pShared->pDevice->bGspPluginTaskInitialized, + NV_ERR_INVALID_STATE); + if (IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu)) return NV_ERR_NOT_SUPPORTED; @@ -721,10 +555,13 @@ kernelhostvgpudeviceapiCtrlCmdTriggerPrivDoorbell_IMPL NvU32 handle; NV_STATUS status = NV_OK; + NV_ASSERT_OR_RETURN(!IS_GSP_CLIENT(pGpu) || pKernelHostVgpuDeviceApi->pShared->pDevice->bGspPluginTaskInitialized, + NV_ERR_INVALID_STATE); + NV_ASSERT_OR_RETURN(pParams->handle == NV_DOORBELL_NOTIFY_LEAF_VF_CPU_PLUGIN_HANDLE, NV_ERR_INVALID_ARGUMENT); - LOCK_ASSERT_AND_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner()); + NV_ASSERT_OR_RETURN(rmapiLockIsOwner() && rmGpuLockIsOwner(), NV_ERR_INVALID_LOCK_STATE); if (!IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu) || !gpuIsSriovEnabled(pGpu) || IS_VIRTUAL(pGpu)) @@ -746,8 +583,12 @@ kernelhostvgpudeviceapiCtrlCmdEventSetNotification_IMPL NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_EVENT_SET_NOTIFICATION_PARAMS *pSetEventParams ) { + OBJGPU *pGpu = GPU_RES_GET_GPU(pKernelHostVgpuDeviceApi); NV_STATUS status = NV_OK; + NV_ASSERT_OR_RETURN(!IS_GSP_CLIENT(pGpu) || pKernelHostVgpuDeviceApi->pShared->pDevice->bGspPluginTaskInitialized, + NV_ERR_INVALID_STATE); + // NV01_EVENT must have been plugged into this subdevice if (inotifyGetNotificationList(staticCast(pKernelHostVgpuDeviceApi, INotifier)) == NULL) { @@ -812,6 +653,9 @@ kernelhostvgpudeviceapiCtrlCmdGetBarMappingRanges_IMPL KernelBif *pKernelBif = GPU_GET_KERNEL_BIF(pGpu); NvU32 numAreas = 0, i = 0, j = 0; + NV_ASSERT_OR_RETURN(!IS_GSP_CLIENT(pGpu) || pKernelHostVgpuDeviceApi->pShared->pDevice->bGspPluginTaskInitialized, + NV_ERR_INVALID_STATE); + NV_ASSERT_OR_RETURN(pKernelBif != NULL, NV_ERR_INVALID_STATE); pKernelHostVgpuDevice = pKernelHostVgpuDeviceApi->pShared->pDevice; @@ -892,6 +736,9 @@ kernelhostvgpudeviceapiCtrlCmdRestoreDefaultExecPartition_IMPL KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice; OBJGPU *pGpu = GPU_RES_GET_GPU(pKernelHostVgpuDeviceApi); + NV_ASSERT_OR_RETURN(!IS_GSP_CLIENT(pGpu) || pKernelHostVgpuDeviceApi->pShared->pDevice->bGspPluginTaskInitialized, + NV_ERR_INVALID_STATE); + pKernelHostVgpuDevice = pKernelHostVgpuDeviceApi->pShared->pDevice; NV_ASSERT_OR_RETURN(pKernelHostVgpuDevice != NULL, NV_ERR_INVALID_STATE); @@ -937,6 +784,9 @@ kernelhostvgpudeviceapiCtrlCmdFreeStates_IMPL RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice = pKernelHostVgpuDeviceApi->pShared->pDevice; + NV_ASSERT_OR_RETURN(!IS_GSP_CLIENT(pGpu) || pKernelHostVgpuDeviceApi->pShared->pDevice->bGspPluginTaskInitialized, + NV_ERR_INVALID_STATE); + NV2080_CTRL_VGPU_MGR_INTERNAL_FREE_STATES_PARAMS params; params.gfid = pKernelHostVgpuDevice->gfid; params.flags = pParams->flags; @@ -947,3 +797,235 @@ kernelhostvgpudeviceapiCtrlCmdFreeStates_IMPL return NV_OK; } + +NV_STATUS +kernelhostvgpudeviceapiCtrlCmdBootloadVgpuTask_IMPL +( + KernelHostVgpuDeviceApi *pKernelHostVgpuDeviceApi, + NVA084_CTRL_KERNEL_HOST_VGPU_DEVICE_BOOTLOAD_VGPU_TASK_PARAMS* pParams +) +{ + NV_STATUS status = NV_OK; + OBJGPU *pGpu = GPU_RES_GET_GPU(pKernelHostVgpuDeviceApi); + KernelGsp *pKernelGsp = GPU_GET_KERNEL_GSP(pGpu); + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + NV2080_CTRL_VGPU_MGR_INTERNAL_BOOTLOAD_GSP_VGPU_PLUGIN_TASK_PARAMS *pBootloadParams = NULL; + Memory *pMemory; + NvU32 i; + NvU64 vmmuSegmentSize; + RsClient *pClient = NULL; + NvBool bPreserveLogBufferFull = NV_FALSE; + + if (!IS_GSP_CLIENT(pGpu)) + return NV_ERR_NOT_SUPPORTED; + + KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice = pKernelHostVgpuDeviceApi->pShared->pDevice; + NV_ASSERT_OR_RETURN(pKernelHostVgpuDevice != NULL, NV_ERR_INVALID_STATE); + NV_ASSERT_OR_RETURN(!pKernelHostVgpuDevice->bGspPluginTaskInitialized, NV_ERR_INVALID_STATE); + + status = serverGetClientUnderLock(&g_resServ, pKernelHostVgpuDevice->hPluginFBAllocationClient, &pClient); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "Failed to get pClient\n"); + return NV_ERR_INVALID_CLIENT; + } + + KernelMemorySystem *pKernelMemorySystem = GPU_GET_KERNEL_MEMORY_SYSTEM(pGpu); + + if (!IS_VGPU_GSP_PLUGIN_OFFLOAD_ENABLED(pGpu) || !gpuIsSriovEnabled(pGpu)) + { + status = NV_ERR_NOT_SUPPORTED; + goto done; + } + + if (pParams->numGuestFbHandles == 0 || pParams->numGuestFbHandles > NVA084_MAX_VMMU_SEGMENTS) + { + status = NV_ERR_INVALID_ARGUMENT; + goto done; + } + + vmmuSegmentSize = gpuGetVmmuSegmentSize(pGpu); + if (vmmuSegmentSize == 0) + { + status = NV_ERR_INVALID_STATE; + goto done; + } + + // This structure can't be allocated on stack because it will result function stack usage > 4KB + pBootloadParams = portMemAllocNonPaged(sizeof(*pBootloadParams)); + if (pBootloadParams == NULL) + { + status = NV_ERR_NO_MEMORY; + goto done; + } + portMemSet(pBootloadParams, 0, sizeof(*pBootloadParams)); + + if (gpuIsSelfHosted(pGpu)) + { + pKernelHostVgpuDevice->hbmRegionList = portMemAllocNonPaged( + sizeof(HBM_REGION_INFO)* pParams->numGuestFbHandles); + if (pKernelHostVgpuDevice->hbmRegionList == NULL) + { + status = NV_ERR_NO_MEMORY; + goto done; + } + + pKernelHostVgpuDevice->numValidHbmRegions = 0; + } + + for (i = 0; i < pParams->numGuestFbHandles; i++) + { + status = memGetByHandle(pClient, pParams->guestFbHandleList[i], &pMemory); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "Invalid Memory handle\n"); + goto done; + } + + pBootloadParams->guestFbPhysAddrList[i] = memdescGetPhysAddr(pMemory->pMemDesc, AT_GPU, 0); + pBootloadParams->guestFbLengthList[i] = pMemory->pMemDesc->Size; + + if (!NV_IS_ALIGNED64(pBootloadParams->guestFbPhysAddrList[i], vmmuSegmentSize) || + !NV_IS_ALIGNED64(pBootloadParams->guestFbLengthList[i], vmmuSegmentSize)) + { + NV_PRINTF(LEVEL_ERROR, "guest fb segment PA or length is not VMMU segment size aligned\n"); + status = NV_ERR_INVALID_ARGUMENT; + goto done; + } + if (gpuIsSelfHosted(pGpu)) + { + pKernelHostVgpuDevice->hbmRegionList[i].hbmBaseAddr = memdescGetPhysAddr(pMemory->pMemDesc, AT_GPU, 0); + pKernelHostVgpuDevice->hbmRegionList[i].hbmBaseAddr += pKernelMemorySystem->coherentCpuFbBase; + pKernelHostVgpuDevice->hbmRegionList[i].size = pMemory->pMemDesc->Size; + pKernelHostVgpuDevice->numValidHbmRegions++; + } + } + + status = memGetByHandle(pClient, pParams->hPluginHeapMemory, &pMemory); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "Invalid plugin heap Memory handle\n"); + goto done; + } + + pKernelHostVgpuDevice->pGspPluginHeapMemDesc = pMemory->pMemDesc; + + // As GSP-RM will map this memory in vGPU-GSP-Plugin's address space, it + // should be referenced to make sure it doesn't get freed before + // vGPU-Gsp-Plugin's usage has been removed + memdescAddRef(pKernelHostVgpuDevice->pGspPluginHeapMemDesc); + + pBootloadParams->pluginHeapMemoryPhysAddr = memdescGetPhysAddr(pMemory->pMemDesc, AT_GPU, 0); + pBootloadParams->pluginHeapMemoryLength = pMemory->pMemDesc->Size; + + // Initialize logging buffers for vgpu partition + { + if ((pParams->initTaskLogBuffOffset + pParams->initTaskLogBuffSize) >= + pBootloadParams->pluginHeapMemoryLength) + { + NV_PRINTF(LEVEL_ERROR, "Invalid init task log buffer\n"); + status = NV_ERR_INVALID_ARGUMENT; + goto done; + } + + if ((pParams->vgpuTaskLogBuffOffset + pParams->vgpuTaskLogBuffSize) >= + pBootloadParams->pluginHeapMemoryLength) + { + NV_PRINTF(LEVEL_ERROR, "Invalid vgpu task log buffer\n"); + status = NV_ERR_INVALID_ARGUMENT; + goto done; + } + + if ((pParams->kernelLogBuffOffset + pParams->kernelLogBuffSize) >= + pBootloadParams->pluginHeapMemoryLength) + { + NV_PRINTF(LEVEL_ERROR, "Invalid vgpu kernel log buffer\n"); + status = NV_ERR_INVALID_ARGUMENT; + goto done; + } + + + pBootloadParams->initTaskLogBuffOffset = pParams->initTaskLogBuffOffset + + pBootloadParams->pluginHeapMemoryPhysAddr; + pBootloadParams->initTaskLogBuffSize = pParams->initTaskLogBuffSize; + pBootloadParams->vgpuTaskLogBuffOffset = pParams->vgpuTaskLogBuffOffset + + pBootloadParams->pluginHeapMemoryPhysAddr; + pBootloadParams->vgpuTaskLogBuffSize = pParams->vgpuTaskLogBuffSize; + pBootloadParams->kernelLogBuffOffset = pParams->kernelLogBuffOffset + + pBootloadParams->pluginHeapMemoryPhysAddr; + pBootloadParams->kernelLogBuffSize = pParams->kernelLogBuffSize; + + NV_CHECK_OK_OR_GOTO(status, + LEVEL_ERROR, + kgspInitVgpuPartitionLogging_HAL(pGpu, pKernelGsp, pKernelHostVgpuDevice->gfid, + pBootloadParams->initTaskLogBuffOffset, + pBootloadParams->initTaskLogBuffSize, + pBootloadParams->vgpuTaskLogBuffOffset, + pBootloadParams->vgpuTaskLogBuffSize, + pBootloadParams->kernelLogBuffOffset, + pBootloadParams->kernelLogBuffSize, + &bPreserveLogBufferFull), + done); + } + + pBootloadParams->gfid = pKernelHostVgpuDevice->gfid; + pBootloadParams->swizzId = pKernelHostVgpuDevice->swizzId; + pBootloadParams->numGuestFbSegments = pParams->numGuestFbHandles; + pBootloadParams->ctrlBuffOffset = pParams->ctrlBuffOffset; + pBootloadParams->bDeviceProfilingEnabled = pParams->bDeviceProfilingEnabled; + + // Populate chidOffset for all engines to reserve same chid in GSP-RM + for (i = 0; i < NV2080_ENGINE_TYPE_LAST; i++) + { + NvU32 rmEngineType = gpuGetRmEngineType(i); + + // + // pHostVgpuDevice->chidOffset is in RM_ENGINE_TYPE order + // pBootloadParams->chidOffset is in NV2080_ENGINE_TYPE order + // + pBootloadParams->chidOffset[i] = pKernelHostVgpuDevice->chidOffset[rmEngineType]; + } + + status = pRmApi->Control(pRmApi, pGpu->hInternalClient, pGpu->hInternalSubdevice, + NV2080_CTRL_CMD_VGPU_MGR_INTERNAL_BOOTLOAD_GSP_VGPU_PLUGIN_TASK, + pBootloadParams, sizeof(*pBootloadParams)); + + if (!bPreserveLogBufferFull) + { + // Preserve any captured vGPU Partition logs + NV_ASSERT_OK(kgspPreserveVgpuPartitionLogging(pGpu, pKernelGsp, pKernelHostVgpuDevice->gfid)); + } + + if (status != NV_OK && pBootloadParams != NULL) + { + NV_PRINTF(LEVEL_ERROR, "Failed to call NV2080_CTRL_CMD_VGPU_MGR_INTERNAL_BOOTLOAD_GSP_VGPU_PLUGIN_TASK\n"); + NV_ASSERT_OK(kgspFreeVgpuPartitionLogging_HAL(pGpu, pKernelGsp, pKernelHostVgpuDevice->gfid)); + } + +done: + portMemFree(pBootloadParams); + + if (status != NV_OK) + { + if (pKernelHostVgpuDevice->hbmRegionList != NULL) + { + portMemFree(pKernelHostVgpuDevice->hbmRegionList); + pKernelHostVgpuDevice->hbmRegionList = NULL; + pKernelHostVgpuDevice->numValidHbmRegions = 0; + } + + if (pKernelHostVgpuDevice->pGspPluginHeapMemDesc != NULL) + { + memdescRemoveRef(pKernelHostVgpuDevice->pGspPluginHeapMemDesc); + pKernelHostVgpuDevice->pGspPluginHeapMemDesc = NULL; + } + + kvgpumgrGuestUnregister(pGpu, pKernelHostVgpuDevice); + } + else + { + pKernelHostVgpuDevice->bGspPluginTaskInitialized = NV_TRUE; + } + + return status; +} diff --git a/src/nvidia/src/kernel/virtualization/kernel_vgpu_mgr.c b/src/nvidia/src/kernel/virtualization/kernel_vgpu_mgr.c index f7b1cfbed3..21d2eb7783 100644 --- a/src/nvidia/src/kernel/virtualization/kernel_vgpu_mgr.c +++ b/src/nvidia/src/kernel/virtualization/kernel_vgpu_mgr.c @@ -32,6 +32,7 @@ #include "virtualization/kernel_vgpu_mgr.h" #include "gpu/device/device.h" #include "vgpu/vgpu_version.h" +#include "vgpu/vgpu_events.h" #include "rmapi/rmapi_utils.h" #include "rmapi/rs_utils.h" #include "gpu/gpu.h" @@ -159,8 +160,9 @@ kvgpumgrGetPgpuIndex(KernelVgpuMgr *pKernelVgpuMgr, NvU32 gpuPciId, NvU32* index NvBool kvgpumgrIsHeterogeneousVgpuSupported(void) { - /*This support is currently limited to VMware and KVM*/ - return (osIsVgpuVfioPresent() == NV_OK); + + return ((osIsVgpuVfioPresent() == NV_OK) + ); } NvBool @@ -712,8 +714,6 @@ kvgpumgrRegisterGuestId(SET_GUEST_ID_PARAMS *pParams, break; } } - else - return NV_ERR_INVALID_ARGUMENT; } } @@ -947,7 +947,7 @@ kvgpumgrGuestRegister(OBJGPU *pGpu, pRequestVgpu != NULL; pRequestVgpu = listNext(&pKernelVgpuMgr->listRequestVgpuHead, pRequestVgpu)) { - if (portMemCmp(pRequestVgpu->mdevUuid, pVgpuDevName, VM_UUID_SIZE) == 0) + if (portMemCmp(pRequestVgpu->vgpuDevName, pVgpuDevName, VM_UUID_SIZE) == 0) break; } @@ -993,6 +993,10 @@ kvgpumgrGuestRegister(OBJGPU *pGpu, pKernelHostVgpuDevice->vgpuType = vgpuType; + NV_ASSERT_OR_RETURN(((vmIdType == VM_ID_DOMAIN_ID) || + (vmIdType == VM_ID_UUID)), + NV_ERR_INVALID_ARGUMENT); + setGuestIDParams.action = SET_GUEST_ID_ACTION_SET; setGuestIDParams.vmPid = vmPid; setGuestIDParams.vmIdType = vmIdType; @@ -2111,7 +2115,7 @@ kvgpumgrSetVgpuEncoderCapacity(OBJGPU *pGpu, NvU8 *vgpuUuid, NvU32 encoderCapaci // only creates REQUEST_VGPU_INFO_NODE entry, actual vGPU will be created later // NV_STATUS -kvgpumgrCreateRequestVgpu(NvU32 gpuPciId, const NvU8 *pMdevUuid, +kvgpumgrCreateRequestVgpu(NvU32 gpuPciId, const NvU8 *pVgpuDevName, NvU32 vgpuTypeId, NvU16 *vgpuId, NvU32 gpuPciBdf) { OBJSYS *pSys = SYS_GET_INSTANCE(); @@ -2130,8 +2134,8 @@ kvgpumgrCreateRequestVgpu(NvU32 gpuPciId, const NvU8 *pMdevUuid, if (pGpu == NULL) { - NV_PRINTF(LEVEL_ERROR, "GPU handle is not valid \n"); - return NV_ERR_INVALID_STATE; + NV_PRINTF(LEVEL_ERROR, "GPU %u is not initialized yet \n", gpuPciBdf); + return NV_ERR_TIMEOUT_RETRY; } if ((status = kvgpumgrGetPgpuIndex(pKernelVgpuMgr, gpuPciId, &pgpuIndex)) != NV_OK) @@ -2232,7 +2236,7 @@ kvgpumgrCreateRequestVgpu(NvU32 gpuPciId, const NvU8 *pMdevUuid, portMemSet(pRequestVgpu, 0, sizeof(REQUEST_VGPU_INFO_NODE)); - portMemCopy(pRequestVgpu->mdevUuid, VGPU_UUID_SIZE, pMdevUuid, VGPU_UUID_SIZE); + portMemCopy(pRequestVgpu->vgpuDevName, VGPU_UUID_SIZE, pVgpuDevName, VGPU_UUID_SIZE); pRequestVgpu->gpuPciId = gpuPciId; /* For SRIOV, this is PF's gpuPciId */ pRequestVgpu->gpuPciBdf = gpuPciBdf; /* For SRIOV, this is VF's gpuPciBdf */ pRequestVgpu->vgpuId = *vgpuId; @@ -2262,7 +2266,7 @@ kvgpumgrCreateRequestVgpu(NvU32 gpuPciId, const NvU8 *pMdevUuid, // REQUEST_VGPU_INFO_NODE is currently used only for vGPU on KVM. // NV_STATUS -kvgpumgrDeleteRequestVgpu(const NvU8 *pMdevUuid, NvU16 vgpuId) +kvgpumgrDeleteRequestVgpu(const NvU8 *pVgpuDevName, NvU16 vgpuId) { OBJSYS *pSys = SYS_GET_INSTANCE(); OBJGPU *pGpu = NULL; @@ -2278,7 +2282,7 @@ kvgpumgrDeleteRequestVgpu(const NvU8 *pMdevUuid, NvU16 vgpuId) pRequestVgpu = pRequestVgpuNext) { pRequestVgpuNext = listNext(&(pKernelVgpuMgr->listRequestVgpuHead), pRequestVgpu); - if (portMemCmp(pMdevUuid, pRequestVgpu->mdevUuid, VGPU_UUID_SIZE) == 0) + if (portMemCmp(pVgpuDevName, pRequestVgpu->vgpuDevName, VGPU_UUID_SIZE) == 0) { if ((status = kvgpumgrGetPgpuIndex(pKernelVgpuMgr, pRequestVgpu->gpuPciId, &pgpuIndex)) != NV_OK) @@ -2422,7 +2426,7 @@ NV_STATUS kvgpumgrGetAvailableInstances( } NV_STATUS -kvgpumgrGetHostVgpuDeviceFromMdevUuid(NvU32 gpuPciId, const NvU8 *pMdevUuid, +kvgpumgrGetHostVgpuDeviceFromVgpuDevName(NvU32 gpuPciId, const NvU8 *pVgpuDevName, KERNEL_HOST_VGPU_DEVICE **ppKernelHostVgpuDevice) { OBJSYS *pSys = SYS_GET_INSTANCE(); @@ -2431,6 +2435,9 @@ kvgpumgrGetHostVgpuDeviceFromMdevUuid(NvU32 gpuPciId, const NvU8 *pMdevUuid, KERNEL_PHYS_GPU_INFO *pPgpuInfo; KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice; + if (osIsVgpuVfioPresent() != NV_OK) + return NV_ERR_NOT_SUPPORTED; + if ((rmStatus = kvgpumgrGetPgpuIndex(pKernelVgpuMgr, gpuPciId, &pgpuIndex)) != NV_OK) return rmStatus; @@ -2443,8 +2450,8 @@ kvgpumgrGetHostVgpuDeviceFromMdevUuid(NvU32 gpuPciId, const NvU8 *pMdevUuid, if (pKernelHostVgpuDevice == NULL || pKernelHostVgpuDevice->pRequestVgpuInfoNode == NULL) return NV_ERR_INVALID_POINTER; - if (portMemCmp(pKernelHostVgpuDevice->pRequestVgpuInfoNode->mdevUuid, - pMdevUuid, VM_UUID_SIZE) == 0) + if (portMemCmp(pKernelHostVgpuDevice->pRequestVgpuInfoNode->vgpuDevName, + pVgpuDevName, VM_UUID_SIZE) == 0) { *ppKernelHostVgpuDevice = pKernelHostVgpuDevice; return NV_OK; @@ -2797,12 +2804,14 @@ kvgpumgrSetSupportedPlacementIds(OBJGPU *pGpu) pPgpuInfo->heterogeneousTimesliceSizesSupported = NV_FALSE; - /* Heterogeneous vgpus enabled for SRIOV vGPUs on VMware/KVM */ if (gpuIsSriovEnabled(pGpu) ) { - if (osIsVgpuVfioPresent() == NV_OK) + if ((osIsVgpuVfioPresent() == NV_OK) + ) + { pPgpuInfo->heterogeneousTimesliceSizesSupported = NV_TRUE; + } } if (!pPgpuInfo->heterogeneousTimesliceSizesSupported) @@ -3083,7 +3092,7 @@ _kvgpumgrUpdateCreatablePlacementIds(OBJGPU *pGpu, NvU16 placementId, NvU32 vgpu NV_STATUS kvgpumgrUpdateHeterogeneousInfo(OBJGPU *pGpu, NvU32 vgpuTypeId, NvU16 *placementId, NvU64 *guestFbLength, NvU64 *guestFbOffset, - NvU64 *gspHeapOffset) + NvU64 *gspHeapOffset, NvU64 *guestBar1PFOffset) { OBJSYS *pSys = SYS_GET_INSTANCE(); KernelVgpuMgr *pKernelVgpuMgr = SYS_GET_KERNEL_VGPUMGR(pSys); @@ -3125,6 +3134,7 @@ kvgpumgrUpdateHeterogeneousInfo(OBJGPU *pGpu, NvU32 vgpuTypeId, NvU16 *placement *guestFbLength = pPgpuInfo->guestVmmuCount[i] * gpuGetVmmuSegmentSize(pGpu); *gspHeapOffset = pPgpuInfo->gspHeapOffsets[i][j]; + *guestBar1PFOffset = 0; } bIdFound = NV_TRUE; break; @@ -3141,6 +3151,7 @@ kvgpumgrUpdateHeterogeneousInfo(OBJGPU *pGpu, NvU32 vgpuTypeId, NvU16 *placement *guestFbLength = pPgpuInfo->guestVmmuCount[i] * gpuGetVmmuSegmentSize(pGpu); *gspHeapOffset = pPgpuInfo->gspHeapOffsets[i][j]; + *guestBar1PFOffset = 0; } bIdFound = NV_TRUE; break; @@ -3268,3 +3279,4 @@ kvgpuMgrRestoreSmcExecPart portMemFree(pExecPartImportParams); return rmStatus; } + diff --git a/src/nvidia/src/kernel/virtualization/vgpuconfigapi.c b/src/nvidia/src/kernel/virtualization/vgpuconfigapi.c index b87089a497..00839a58e4 100644 --- a/src/nvidia/src/kernel/virtualization/vgpuconfigapi.c +++ b/src/nvidia/src/kernel/virtualization/vgpuconfigapi.c @@ -28,7 +28,7 @@ #include "gpu/mem_mgr/mem_mgr.h" #include "gpu/mem_sys/kern_mem_sys.h" #include "gpu/mem_mgr/heap.h" -#include "kernel/gpu/fifo/kernel_sched_mgr.h" +#include "gpu/bif/kernel_bif.h" #include "virtualization/kernel_vgpu_mgr.h" #include "virtualization/hypervisor/hypervisor.h" #include "rmapi/control.h" @@ -294,15 +294,19 @@ vgpuconfigapiCtrlCmdVgpuConfigEnumerateVgpuPerPgpu_IMPL pVgpuGuest = &pParams->vgpuGuest[i]; portMemSet(pVgpuGuest->guestVmInfo.vmName, 0, NVA081_VM_NAME_SIZE); - portMemSet(pVgpuGuest->vgpuDevice.mdevUuid, 0, VGPU_UUID_SIZE); + portMemSet(pVgpuGuest->vgpuDevice.vgpuDevName, 0, VGPU_UUID_SIZE); - if (osIsVgpuVfioPresent() == NV_OK) + if ((osIsVgpuVfioPresent() == NV_OK) + ) { portMemCopy(pVgpuGuest->guestVmInfo.vmName, NVA081_VM_NAME_SIZE, pVgpuGuestTmp->guestVmInfo.vmName, NVA081_VM_NAME_SIZE); + } + if (osIsVgpuVfioPresent() == NV_OK) + { if (pKernelHostVgpuDevice->pRequestVgpuInfoNode == NULL) { rmStatus = NV_ERR_INVALID_POINTER; @@ -316,7 +320,7 @@ vgpuconfigapiCtrlCmdVgpuConfigEnumerateVgpuPerPgpu_IMPL if (!osIsVfioPciCorePresent() || !gpuIsSriovEnabled(pGpu)) { for (j = 0; j < VGPU_UUID_SIZE; j++) - pVgpuGuest->vgpuDevice.mdevUuid[j] = pKernelHostVgpuDevice->pRequestVgpuInfoNode->mdevUuid[index[j]]; + pVgpuGuest->vgpuDevice.vgpuDevName[j] = pKernelHostVgpuDevice->pRequestVgpuInfoNode->vgpuDevName[index[j]]; } } @@ -424,6 +428,8 @@ vgpuconfigapiCtrlCmdVgpuConfigGetVgpuTypeInfo_IMPL NvU32 i; NvU32 pgpuIndex; KERNEL_PHYS_GPU_INFO *pPgpuInfo; + RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); + NV2080_CTRL_VGPU_MGR_GET_FRAME_RATE_LIMITER_STATUS_PARAMS frlStatus; NV_PRINTF(LEVEL_INFO, "%s\n", __FUNCTION__); @@ -472,15 +478,14 @@ vgpuconfigapiCtrlCmdVgpuConfigGetVgpuTypeInfo_IMPL */ pParams->vgpuTypeInfo.exclusiveSize = !pPgpuInfo->heterogeneousTimesliceSizesSupported; - // Disable FRL if we are using sched_sw (PVMRL) in timesliced mode - if (IsPASCALorBetter(pGpu)) + NV_ASSERT_OK_OR_RETURN( + pRmApi->Control(pRmApi, pGpu->hInternalClient, pGpu->hInternalSubdevice, + NV2080_CTRL_CMD_VGPU_MGR_INTERNAL_GET_FRAME_RATE_LIMITER_STATUS, + &frlStatus, sizeof(frlStatus))); + + if (frlStatus.bFlrDisabled) { - KernelSchedMgr *pKernelSchedMgr = GPU_GET_KERNEL_SCHEDMGR(pGpu); - if (pKernelSchedMgr && - kschedmgrIsPvmrlEnabled(pKernelSchedMgr)) - { - pParams->vgpuTypeInfo.frlEnable = 0; - } + pParams->vgpuTypeInfo.frlEnable = 0; } portStringCopy((char *) pParams->vgpuTypeInfo.vgpuName, sizeof(pParams->vgpuTypeInfo.vgpuName), (char *) vgpuTypeInfo->vgpuName, VGPU_STRING_BUFFER_SIZE); @@ -823,15 +828,44 @@ vgpuconfigapiCtrlCmdVgpuConfigGetCapability_IMPL * and hence we are turning true always without checking for input device. * If we decided not to support any GPU, this needs to be modified. */ - pGetCapabilityParams->state = NV_TRUE; - if (IS_MIG_ENABLED(pGpu)) - { - pGetCapabilityParams->state = NV_FALSE; - } + pGetCapabilityParams->state = IS_MIG_ENABLED(pGpu) ? NV_FALSE : NV_TRUE; + break; + } + case NVA081_CTRL_VGPU_CAPABILITY_DEVICE_STREAMING: + { + pGetCapabilityParams->state = gpuIsSriovEnabled(pGpu); + break; + } + case NVA081_CTRL_VGPU_CAPABILITY_READ_DEVICE_BUFFER_BW: + case NVA081_CTRL_VGPU_CAPABILITY_WRITE_DEVICE_BUFFER_BW: + { + KernelBif *pKernelBif = GPU_GET_KERNEL_BIF(pGpu); + + NV_ASSERT_OK_OR_RETURN( + kbifGetMigrationBandwidth_HAL(pGpu, pKernelBif, &pGetCapabilityParams->state)); + break; + } + case NVA081_CTRL_VGPU_CAPABILITY_HETEROGENEOUS_TIMESLICE_SIZES: + { + pGetCapabilityParams->state = pPhysGpuInfo->heterogeneousTimesliceSizesSupported; + break; + } + case NVA081_CTRL_VGPU_CAPABILITY_HETEROGENEOUS_TIMESLICE_PROFILES: + { + /* We are not currently limiting the feature based on the pgpu. + * Return the system level value here. + */ + pGetCapabilityParams->state = kvgpumgrIsHeterogeneousVgpuSupported(); + break; + } + case NVA081_CTRL_VGPU_CAPABILITY_FRACTIONAL_MULTI_VGPU: + { + pGetCapabilityParams->state = pPhysGpuInfo->fractionalMultiVgpu; break; } default: { + NV_PRINTF(LEVEL_ERROR, "Failed to find vGPU device capability\n"); rmStatus = NV_ERR_INVALID_ARGUMENT; break; } @@ -1249,7 +1283,8 @@ vgpuconfigapiCtrlCmdVgpuConfigUpdateHeterogeneousInfo_IMPL &pParams->placementId, &pParams->guestFbLength, &pParams->guestFbOffset, - &pParams->gspHeapOffset); + &pParams->gspHeapOffset, + &pParams->guestBar1PFOffset); if (rmStatus != NV_OK) return rmStatus; @@ -1267,9 +1302,22 @@ vgpuconfigapiCtrlCmdVgpuSetVmName_IMPL KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice = NULL; NV_STATUS status; - status = kvgpumgrGetHostVgpuDeviceFromMdevUuid(pGpu->gpuId, - pParams->vgpuName, - &pKernelHostVgpuDevice); + if (pParams->vmIdType == VM_ID_DOMAIN_ID) + { + return NV_ERR_NOT_SUPPORTED; + } + else if (pParams->vmIdType == VM_ID_UUID) + { + /* KVM uses VM type ID == VM_ID_UUID */ + status = kvgpumgrGetHostVgpuDeviceFromVgpuDevName(pGpu->gpuId, + pParams->guestVmId.vmUuid, + &pKernelHostVgpuDevice); + } + else + { + return NV_ERR_INVALID_ARGUMENT; + } + if (status != NV_OK) return status; @@ -1279,3 +1327,27 @@ vgpuconfigapiCtrlCmdVgpuSetVmName_IMPL return NV_OK; } +NV_STATUS +vgpuconfigapiCtrlCmdVgpuConfigGetMigrationBandwidth_IMPL +( + VgpuConfigApi *pVgpuConfigApi, + NVA081_CTRL_VGPU_CONFIG_GET_MIGRATION_BANDWIDTH_PARAMS *pParams +) +{ + OBJGPU *pGpu = GPU_RES_GET_GPU(pVgpuConfigApi); + KernelBif *pKernelBif = GPU_GET_KERNEL_BIF(pGpu); + NV_STATUS rmStatus = NV_OK; + + if (IS_VIRTUAL(pGpu)) + { + return NV_ERR_NOT_SUPPORTED; + } + + rmStatus = kbifGetMigrationBandwidth_HAL(pGpu, pKernelBif, &pParams->migrationBandwidth); + if (rmStatus != NV_OK) + { + NV_PRINTF(LEVEL_ERROR, "Failed to get Migration Bandwidth rmStatus 0x%x\n",rmStatus); + } + + return rmStatus; +} diff --git a/src/nvidia/src/libraries/containers/queue.c b/src/nvidia/src/libraries/containers/queue.c index 2745f767af..3e498676b5 100644 --- a/src/nvidia/src/libraries/containers/queue.c +++ b/src/nvidia/src/libraries/containers/queue.c @@ -22,9 +22,6 @@ */ #include "containers/queue.h" -#define MEM_RD64(a) ((NvLength) (*(volatile NvU64 *)(a))) -#define MEM_WR64(a, d) do { *(volatile NvU64 *)(a) = (NvU64)(d); } while (0) - #define MEM_WR(a, d) portMemCopy((a), sizeof(*(a)), &(d), sizeof(d)) #define MEM_RD(v, a) portMemCopy(&(v), sizeof(v), (a), sizeof(*(a))) @@ -42,10 +39,10 @@ NV_STATUS circularQueueInitCommon MEM_WR(&pQueue->pData, pData); MEM_WR(&pQueue->pAllocator, pAllocator); - MEM_WR64(&pQueue->msgSize, msgSize); - MEM_WR64(&pQueue->capacity, capacity); - MEM_WR64(&pQueue->getIdx, 0); - MEM_WR64(&pQueue->putIdx, 0); + PORT_MEM_WR64(&pQueue->msgSize, msgSize); + PORT_MEM_WR64(&pQueue->capacity, capacity); + PORT_MEM_WR64(&pQueue->getIdx, 0); + PORT_MEM_WR64(&pQueue->putIdx, 0); return NV_OK; } @@ -53,8 +50,8 @@ NV_STATUS circularQueueInitCommon static NvLength queueGetCount(Queue *pQueue) { - NvLength get = MEM_RD64(&pQueue->getIdx); - NvLength put = MEM_RD64(&pQueue->putIdx); + NvLength get = PORT_MEM_RD64(&pQueue->getIdx); + NvLength put = PORT_MEM_RD64(&pQueue->putIdx); if (put >= get) { @@ -62,7 +59,7 @@ NvLength queueGetCount(Queue *pQueue) } else { - return put + MEM_RD64(&pQueue->capacity) - get; + return put + PORT_MEM_RD64(&pQueue->capacity) - get; } } @@ -123,9 +120,9 @@ void circularQueueDestroy_IMPL(Queue *pQueue) NV_ASSERT_OR_RETURN_VOID(NULL != pQueue); - MEM_WR64(&pQueue->capacity, 1); - MEM_WR64(&pQueue->getIdx, 0); - MEM_WR64(&pQueue->putIdx, 0); + PORT_MEM_WR64(&pQueue->capacity, 1); + PORT_MEM_WR64(&pQueue->getIdx, 0); + PORT_MEM_WR64(&pQueue->putIdx, 0); MEM_RD(pAllocator, &pQueue->pAllocator); if (pAllocator) @@ -136,7 +133,7 @@ NvLength circularQueueCapacity_IMPL(Queue *pQueue) { NV_ASSERT_OR_RETURN(NULL != pQueue, 0); - return MEM_RD64(&pQueue->capacity) - 1; + return PORT_MEM_RD64(&pQueue->capacity) - 1; } NvLength circularQueueCount_IMPL(Queue *pQueue) @@ -170,9 +167,9 @@ NvLength circularQueuePushNonManaged_IMPL NV_ASSERT_OR_RETURN(NULL != pQueue, 0); - putIdx = MEM_RD64(&pQueue->putIdx); - msgSize = MEM_RD64(&pQueue->msgSize); - capacity = MEM_RD64(&pQueue->capacity); + putIdx = PORT_MEM_RD64(&pQueue->putIdx); + msgSize = PORT_MEM_RD64(&pQueue->msgSize); + capacity = PORT_MEM_RD64(&pQueue->capacity); // Calculate the elements to copy cntLimit = capacity - queueGetCount(pQueue) - 1; @@ -208,7 +205,7 @@ NvLength circularQueuePushNonManaged_IMPL // The data must land before index update. portAtomicMemoryFenceStore(); - MEM_WR64(&pQueue->putIdx, (putIdx + remainingElemToCpy) % capacity); + PORT_MEM_WR64(&pQueue->putIdx, (putIdx + remainingElemToCpy) % capacity); } return numElements; @@ -251,12 +248,12 @@ void circularQueuePop_IMPL(Queue *pQueue) NV_ASSERT_OR_RETURN_VOID(NULL != pQueue); - getIdx = MEM_RD64(&pQueue->getIdx); - capacity = MEM_RD64(&pQueue->capacity); + getIdx = PORT_MEM_RD64(&pQueue->getIdx); + capacity = PORT_MEM_RD64(&pQueue->capacity); if (queueGetCount(pQueue) > 0) { - MEM_WR64(&pQueue->getIdx, (getIdx + 1) % capacity); + PORT_MEM_WR64(&pQueue->getIdx, (getIdx + 1) % capacity); } } @@ -267,18 +264,18 @@ NvBool circularQueuePopAndCopyNonManaged_IMPL(Queue *pQueue, QueueContext *pCtx, NV_ASSERT_OR_RETURN(pQueue != NULL, NV_FALSE); - capacity = MEM_RD64(&pQueue->capacity); - msgSize = MEM_RD64(&pQueue->msgSize); + capacity = PORT_MEM_RD64(&pQueue->capacity); + msgSize = PORT_MEM_RD64(&pQueue->msgSize); if (queueGetCount(pQueue) > 0) { - NvLength getIdx = MEM_RD64(&pQueue->getIdx); + NvLength getIdx = PORT_MEM_RD64(&pQueue->getIdx); pCtx->pCopyData(msgSize, getIdx, pCtx, pCopyTo, 1, NV_FALSE /*bCopyIn*/); // Update of index can't happen before we read all the data. portAtomicMemoryFenceLoad(); - MEM_WR64(&pQueue->getIdx, (getIdx + 1) % capacity); + PORT_MEM_WR64(&pQueue->getIdx, (getIdx + 1) % capacity); return NV_TRUE; } diff --git a/src/nvidia/src/libraries/crashcat/v1/impl/crashcat_report_v1_libos3.c b/src/nvidia/src/libraries/crashcat/v1/impl/crashcat_report_v1_libos3.c index 975fb5cfd1..b635642da0 100644 --- a/src/nvidia/src/libraries/crashcat/v1/impl/crashcat_report_v1_libos3.c +++ b/src/nvidia/src/libraries/crashcat/v1/impl/crashcat_report_v1_libos3.c @@ -70,8 +70,8 @@ void crashcatReportLogSource_V1_LIBOS3(CrashCatReport *pReport) NvCrashCatReport_V1 *pReportV1 = &pReport->v1.report; NvU8 taskId = crashcatReportV1SourceLibos3TaskId(pReportV1); - NvCrashCatNvriscvPartition sourcePartition = crashcatReportV1ReporterPartition(pReportV1); - NvCrashCatNvriscvUcodeId sourceUcodeId = crashcatReportV1ReporterUcodeId(pReportV1); + NvCrashCatNvriscvPartition sourcePartition = crashcatReportV1SourcePartition(pReportV1); + NvCrashCatNvriscvUcodeId sourceUcodeId = crashcatReportV1SourceUcodeId(pReportV1); #define CRASHCAT_LOG_LIBOS3_SOURCE(fmt, ...) \ if (taskId == NV_CRASHCAT_REPORT_V1_SOURCE_ID_LIBOS3_TASK_ID_UNSPECIFIED) \ diff --git a/src/nvidia/src/libraries/mmu/mmu_walk.c b/src/nvidia/src/libraries/mmu/mmu_walk.c index 95de107519..6dc3c2ff14 100644 --- a/src/nvidia/src/libraries/mmu/mmu_walk.c +++ b/src/nvidia/src/libraries/mmu/mmu_walk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2014-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2014-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -274,402 +274,43 @@ NV_STATUS mmuWalkProcessPdes NvU64 vaHi ) { - if (pWalk->flags.bUseIterative) + // Iterative MMU Walk + NV_STATUS status = NV_OK; + const MMU_WALK_LEVEL *pLevelOrig = pLevel; + NV_ASSERT_OR_RETURN(pOpParams != NULL, NV_ERR_INVALID_ARGUMENT); + + // Call opFunc inititially to see if we need to walk + status = pOpParams->opFunc(pWalk, + pOpParams, + pLevel, + pLevelInst, + vaLo, + vaHi); + + // + // If NV_ERR_MORE_PROCESSING_REQUIRED is returned above, + // the recursive MMU Walker would have started recursing down, + // so here we kick off the iteration. + // If NV_OK is returned above, the recursive MMU Walker would + // not recurse at all, so return immediately. + // + if (NV_ERR_MORE_PROCESSING_REQUIRED == status) { - NV_STATUS status = NV_OK; - const MMU_WALK_LEVEL *pLevelOrig = pLevel; - NV_ASSERT_OR_RETURN(pOpParams != NULL, NV_ERR_INVALID_ARGUMENT); + status = NV_OK; - // Call opFunc inititially to see if we need to walk - status = pOpParams->opFunc(pWalk, - pOpParams, - pLevel, - pLevelInst, - vaLo, - vaHi); + NvU64 vaLevelBase = mmuFmtLevelVirtAddrLo(pLevel->pFmt, vaLo); + NvU32 entryIndexLo = mmuFmtVirtAddrToEntryIndex(pLevel->pFmt, vaLo); + NvU32 entryIndexHi = mmuFmtVirtAddrToEntryIndex(pLevel->pFmt, vaHi); + NvU32 entryIndex = entryIndexLo; + NvU32 entryIndexFillStart = 0; + NvU32 entryIndexFillEnd = 0; + NvU32 pendingFillCount = 0; // - // If NV_ERR_MORE_PROCESSING_REQUIRED is returned above, - // the recursive MMU Walker would have started recursing down, - // so here we kick off the iteration. - // If NV_OK is returned above, the recursive MMU Walker would - // not recurse at all, so return immediately. + // entryIndex, entryIndexHi are modified in the loop itself + // as we iterate through levels. // - if (NV_ERR_MORE_PROCESSING_REQUIRED == status) - { - status = NV_OK; - - NvU64 vaLevelBase = mmuFmtLevelVirtAddrLo(pLevel->pFmt, vaLo); - NvU32 entryIndexLo = mmuFmtVirtAddrToEntryIndex(pLevel->pFmt, vaLo); - NvU32 entryIndexHi = mmuFmtVirtAddrToEntryIndex(pLevel->pFmt, vaHi); - NvU32 entryIndex = entryIndexLo; - NvU32 entryIndexFillStart = 0; - NvU32 entryIndexFillEnd = 0; - NvU32 pendingFillCount = 0; - - // - // entryIndex, entryIndexHi are modified in the loop itself - // as we iterate through levels. - // - while (entryIndex <= entryIndexHi) - { - const NvU64 entryVaLo = mmuFmtEntryIndexVirtAddrLo(pLevel->pFmt, - vaLevelBase, entryIndex); - const NvU64 entryVaHi = mmuFmtEntryIndexVirtAddrHi(pLevel->pFmt, - vaLevelBase, entryIndex); - const NvU64 clippedVaLo = NV_MAX(vaLo, entryVaLo); - const NvU64 clippedVaHi = NV_MIN(vaHi, entryVaHi); - const MMU_ENTRY_STATE currEntryState = mmuWalkGetEntryState(pLevelInst, entryIndex); - NvU32 subLevel = 0; - MMU_WALK_LEVEL_INST *pSubLevelInsts[MMU_FMT_MAX_SUB_LEVELS] = {0}; - - // Optimizations for release operations. - if (pOpParams->bRelease) - { - // Skip this entry if it is neither a PDE nor marked as a hybrid entry. - if ((MMU_ENTRY_STATE_IS_PDE != currEntryState) && - !pLevelInst->pStateTracker[entryIndex].bHybrid) - { - goto check_last_entry; - } - } - - // Optimizations for fill operations. - if (pOpParams->bFill) - { - const MMU_FILL_TARGET *pTarget = (const MMU_FILL_TARGET *) pOpParams->pOpCtx; - - if (pendingFillCount == 0) - entryIndexFillStart = entryIndexFillEnd = entryIndex; - - // - // Check if the entire entry's coverage is being filled to - // a constant state. - // - // If this entry is not currently a PDE we can - // apply the fill operation directly - // at this level and avoid "splitting" the PDE. - // - // If this entry is currently a PDE we must - // clear the entries of the lower levels to free - // unused level instances. - // - if ((pTarget->entryState != currEntryState) && - (MMU_ENTRY_STATE_IS_PDE != currEntryState) && - (entryVaLo == clippedVaLo) && - (entryVaHi == clippedVaHi)) - { - entryIndexFillEnd = entryIndex; - pendingFillCount++; - - // Not the last iteration, keep batching.. - if (entryIndex < entryIndexHi) - { - // - // This won't be the last entry, but we'll - // do the iteration there - // - goto check_last_entry; - } - } - - if (pendingFillCount != 0) - { - NvU32 progress = 0; - NvU32 index; - - // Flush pending fills - pWalk->pCb->FillEntries(pWalk->pUserCtx, - pLevel->pFmt, - pLevelInst->pMemDesc, - entryIndexFillStart, - entryIndexFillEnd, - pTarget->fillState, - &progress); - - if (progress != (entryIndexFillEnd - entryIndexFillStart + 1)) - { - status = NV_ERR_INVALID_STATE; - NV_ASSERT_OR_GOTO(0, cleanupIter); - } - - for (index = entryIndexFillStart; index <= entryIndexFillEnd; index++) - mmuWalkSetEntryState(pLevelInst, index, pTarget->entryState); - - pendingFillCount = 0; - } - - // Recheck the state after fill. If nothing to do, continue.. - if (pTarget->entryState == mmuWalkGetEntryState(pLevelInst, entryIndex)) - { - goto check_last_entry; - } - - } // End of fill optimizations. - - // Determine the sublevel we need to operate on. - status = pOpParams->selectSubLevel(pOpParams->pOpCtx, - pLevel, - &subLevel, - clippedVaLo, - clippedVaHi); - NV_ASSERT_OR_GOTO(NV_OK == status, cleanupIter); - - // - // Allocate the sublevel instances for the current PDE and update the current - // Page Dir (i.e. write the PDE into the Page Dir) if needed. - // - status = _mmuWalkPdeAcquire(pWalk, - pOpParams, - pLevel, - pLevelInst, - entryIndex, - subLevel, - clippedVaLo, - clippedVaHi, - pSubLevelInsts); - NV_ASSERT_OR_GOTO(NV_OK == status, cleanupIter); - - // Release op is done if the target sub-level is absent. - if (pOpParams->bRelease && (NULL == pSubLevelInsts[subLevel])) - { - goto check_last_entry; - } - - // - // Split sparse PDE's range. - // When only a subrange of the original PDE's VA range is being operated - // on we sparsify the remaining range lying outside the operational - // subrange (clippedVaLo to clippedVaHi) - // - if (MMU_ENTRY_STATE_SPARSE == currEntryState) - { - // - // Sparsify the lower part of the VA range that outside the operational - // subrange. - // - if (clippedVaLo > entryVaLo) - { - status = mmuWalkProcessPdes(pWalk, - &g_opParamsSparsify, - pLevel->subLevels + subLevel, - pSubLevelInsts[subLevel], - entryVaLo, - clippedVaLo - 1); - NV_ASSERT_OR_GOTO(NV_OK == status, cleanupIter); - } - - // - // Sparsify the upper part of the VA range that is outside the operational - // subrange. - // - if (clippedVaHi < entryVaHi) - { - status = mmuWalkProcessPdes(pWalk, - &g_opParamsSparsify, - pLevel->subLevels + subLevel, - pSubLevelInsts[subLevel], - clippedVaHi + 1, - entryVaHi); - NV_ASSERT_OR_GOTO(NV_OK == status, cleanupIter); - } - } // Sparse PDE split - - // Resolve potential conflicts in multiple sized page tables - if (pLevel->pFmt->numSubLevels != 1 && - !pOpParams->bIgnoreSubLevelConflicts) - { - status = _mmuWalkResolveSubLevelConflicts(pWalk, - pOpParams, - pLevel, - pSubLevelInsts, - subLevel, - clippedVaLo, - clippedVaHi); - NV_ASSERT_OR_GOTO(NV_OK == status, cleanupIter); - } - - status = pOpParams->opFunc(pWalk, - pOpParams, - pLevel->subLevels + subLevel, - pSubLevelInsts[subLevel], - clippedVaLo, - clippedVaHi); - - if (NV_ERR_MORE_PROCESSING_REQUIRED == status) - { - // - // If NV_ERR_MORE_PROCESSING_REQUIRED is returned above, - // the recursive MMU Walker would have recursed down one - // more level. In this code block, we keep the iteration - // going by doing everything the recursion previously did. - // - status = NV_OK; - - // Save off the current state of iteration for this level - pLevel->iterInfo.pLevelInst = pLevelInst; - pLevel->iterInfo.vaLo = vaLo; - pLevel->iterInfo.vaHi = vaHi; - pLevel->iterInfo.vaLevelBase = vaLevelBase; - pLevel->iterInfo.entryIndexHi = entryIndexHi; - pLevel->iterInfo.entryIndex = entryIndex; - pLevel->iterInfo.entryIndexFillStart = entryIndexFillStart; - pLevel->iterInfo.entryIndexFillEnd = entryIndexFillEnd; - pLevel->iterInfo.pendingFillCount = pendingFillCount; - pLevel->iterInfo.entryVaLo = entryVaLo; - - // - // Here use variables that would be used in the next recursion downwards. - // Calculate new vaLevelBase, entryIndexLo, entryIndexHi, entryIndex - // - pLevel = pLevel->subLevels + subLevel; - - vaLevelBase = mmuFmtLevelVirtAddrLo(pLevel->pFmt, clippedVaLo); - entryIndexLo = mmuFmtVirtAddrToEntryIndex(pLevel->pFmt, clippedVaLo); - entryIndexHi = mmuFmtVirtAddrToEntryIndex(pLevel->pFmt, clippedVaHi); - - // Now replace the current stack frame with the frame that is one level down - // pLevel, vaLevelBase, entryIndexHi replaced above - pLevelInst = pSubLevelInsts[subLevel]; - vaLo = clippedVaLo; - vaHi = clippedVaHi; - entryIndex = entryIndexLo; - entryIndexFillStart = 0; - entryIndexFillEnd = 0; - pendingFillCount = 0; - } - else - { - NV_ASSERT_OR_GOTO(NV_OK == status, cleanupIter); - // - // If NV_OK is returned above, the recursive MMU Walker would have reached - // the target format level and so reached the base case of its recursion. - // It would then return from recursive function calls and call pdeRelease - // for all levels whose sublevels are done being processed. - // - -cleanupIter: - // PdeRelease itself immediately since this level does not recurse. -#if defined(__GNUC__) && !defined(__clang__) - // gcc is falsely reporting entryVaLo; entryVaLo is definitely initialized -#pragma GCC diagnostic ignored "-Wmaybe-uninitialized" -#endif - _mmuWalkPdeRelease(pWalk, - pOpParams, - pLevel, - pLevelInst, - entryIndex, - entryVaLo); - -check_last_entry: - // - // If the recursive MMU Walker did a continue on the current level, - // then it didn't do a pdeRelease of the current level. - // Even with the continue, for the current iteration, - // if entryIndex == entryIndexHi, then we're done with this level - // and need to do a pdeRelease on the next level up since we would - // return from the recursion. - // - - // - // If we're at the original level and entryIndex = entryIndexHi, - // then we're done and need to exit the entire loop. - // If this is true, we've already done the _mmuWalkPdeRelease: - // Either we already called _mmuWalkPdeRelease right before this - // or we skipped it from a goto check_last_entry continue. - // The MMU Walker is re-entrant and will otherwise pick up on - // parent levels when mmuWalkProcessPdes is called on sublevels - // - if ((pLevel == pLevelOrig) && (entryIndex == entryIndexHi)) - { - goto done; - } - - // - // Now restore and finish previous frame(s) - // - // If this is the last processed sublevel of a level or an error has - // previously occurred, pdeRelease the level. - // Continue doing so for all parent levels. - // Once we're reached a non-finished level, iterate to the next entry. - // - while (entryIndex == entryIndexHi || status != NV_OK) - { - // - // Now replace the current stack frame with the frame that was one - // level above. This should never be NULL, since we'll already have - // exited after processing the root level. If it is NULL, we can't - // clean up any more anyway, so return immediately. - // - NV_ASSERT_OR_RETURN(pLevel->pParent != NULL, NV_ERR_INVALID_STATE); - - pLevel = pLevel->pParent; - pLevelInst = pLevel->iterInfo.pLevelInst; - vaLo = pLevel->iterInfo.vaLo; - vaHi = pLevel->iterInfo.vaHi; - vaLevelBase = pLevel->iterInfo.vaLevelBase; - entryIndexHi = pLevel->iterInfo.entryIndexHi; - entryIndex = pLevel->iterInfo.entryIndex; - entryIndexFillStart = pLevel->iterInfo.entryIndexFillStart; - entryIndexFillEnd = pLevel->iterInfo.entryIndexFillEnd; - pendingFillCount = pLevel->iterInfo.pendingFillCount; - - _mmuWalkPdeRelease(pWalk, - pOpParams, - pLevel, - pLevelInst, - entryIndex, - pLevel->iterInfo.entryVaLo); - - // - // If we're at the original level and entryIndex = entryIndexHi, - // then we're done and need to exit the entire loop - // - if ((pLevel == pLevelOrig) && (entryIndex == entryIndexHi)) - { - goto done; - } - } - - // - // Once the above loop is done and we reach here, then we're - // ready to process the next entry in the list. Only iterate here, - // not in the overall loop since we may have iterated down in the - // above else block and don't want to increment before processing - // the first entry on a new lower level. - // - entryIndex++; - } - } // per entry loop - - // - // If this assertion fails, it is a result of a programming - // error in the iterative MMU Walker implementation. We should - // have iterated back updwards through the MMU state to the original - // level even on failure. - // - NV_ASSERT_OR_RETURN(pLevel != pLevelOrig, NV_ERR_INVALID_STATE); - } -done: - return status; - } - else - { - // Recursive MMU Walker Implementation - NV_STATUS status = NV_OK; - NvU64 vaLevelBase = mmuFmtLevelVirtAddrLo(pLevel->pFmt, vaLo); - NvU32 entryIndexLo = mmuFmtVirtAddrToEntryIndex(pLevel->pFmt, vaLo); - NvU32 entryIndexHi = mmuFmtVirtAddrToEntryIndex(pLevel->pFmt, vaHi); - NvU32 entryIndex; - NvU32 index; - NvU32 entryIndexFillStart = 0; - NvU32 entryIndexFillEnd; - NvU32 pendingFillCount = 0; - - NV_ASSERT_OR_RETURN(NULL != pOpParams, NV_ERR_INVALID_ARGUMENT); - - // Walk over each relevant entry (PDE) within this Page Level - for (entryIndex = entryIndexLo; entryIndex <= entryIndexHi; entryIndex++) + while (entryIndex <= entryIndexHi) { const NvU64 entryVaLo = mmuFmtEntryIndexVirtAddrLo(pLevel->pFmt, vaLevelBase, entryIndex); @@ -687,7 +328,9 @@ NV_STATUS mmuWalkProcessPdes // Skip this entry if it is neither a PDE nor marked as a hybrid entry. if ((MMU_ENTRY_STATE_IS_PDE != currEntryState) && !pLevelInst->pStateTracker[entryIndex].bHybrid) - continue; + { + goto check_last_entry; + } } // Optimizations for fill operations. @@ -720,12 +363,19 @@ NV_STATUS mmuWalkProcessPdes // Not the last iteration, keep batching.. if (entryIndex < entryIndexHi) - continue; + { + // + // This won't be the last entry, but we'll + // do the iteration there + // + goto check_last_entry; + } } if (pendingFillCount != 0) { NvU32 progress = 0; + NvU32 index; // Flush pending fills pWalk->pCb->FillEntries(pWalk->pUserCtx, @@ -736,9 +386,11 @@ NV_STATUS mmuWalkProcessPdes pTarget->fillState, &progress); - NV_ASSERT_OR_RETURN( - progress == (entryIndexFillEnd - entryIndexFillStart + 1), - NV_ERR_INVALID_STATE); + if (progress != (entryIndexFillEnd - entryIndexFillStart + 1)) + { + status = NV_ERR_INVALID_STATE; + NV_ASSERT_OR_GOTO(0, cleanupIter); + } for (index = entryIndexFillStart; index <= entryIndexFillEnd; index++) mmuWalkSetEntryState(pLevelInst, index, pTarget->entryState); @@ -748,7 +400,9 @@ NV_STATUS mmuWalkProcessPdes // Recheck the state after fill. If nothing to do, continue.. if (pTarget->entryState == mmuWalkGetEntryState(pLevelInst, entryIndex)) - continue; + { + goto check_last_entry; + } } // End of fill optimizations. @@ -758,7 +412,7 @@ NV_STATUS mmuWalkProcessPdes &subLevel, clippedVaLo, clippedVaHi); - NV_ASSERT_OR_GOTO(NV_OK == status, cleanup); + NV_ASSERT_OR_GOTO(NV_OK == status, cleanupIter); // // Allocate the sublevel instances for the current PDE and update the current @@ -768,17 +422,17 @@ NV_STATUS mmuWalkProcessPdes pOpParams, pLevel, pLevelInst, - entryIndex, //PDE index being processed - subLevel, //Sub level processed within the PDE - clippedVaLo, //Low VA for the PDE - clippedVaHi, //High VA for the PDE + entryIndex, + subLevel, + clippedVaLo, + clippedVaHi, pSubLevelInsts); - NV_ASSERT_OR_GOTO(NV_OK == status, cleanup); + NV_ASSERT_OR_GOTO(NV_OK == status, cleanupIter); // Release op is done if the target sub-level is absent. if (pOpParams->bRelease && (NULL == pSubLevelInsts[subLevel])) { - continue; + goto check_last_entry; } // @@ -795,13 +449,13 @@ NV_STATUS mmuWalkProcessPdes // if (clippedVaLo > entryVaLo) { - status = g_opParamsSparsify.opFunc(pWalk, - &g_opParamsSparsify, - pLevel->subLevels + subLevel, - pSubLevelInsts[subLevel], - entryVaLo, - clippedVaLo - 1); - NV_ASSERT_OR_GOTO(NV_OK == status, cleanup); + status = mmuWalkProcessPdes(pWalk, + &g_opParamsSparsify, + pLevel->subLevels + subLevel, + pSubLevelInsts[subLevel], + entryVaLo, + clippedVaLo - 1); + NV_ASSERT_OR_GOTO(NV_OK == status, cleanupIter); } // @@ -810,13 +464,13 @@ NV_STATUS mmuWalkProcessPdes // if (clippedVaHi < entryVaHi) { - status = g_opParamsSparsify.opFunc(pWalk, - &g_opParamsSparsify, - pLevel->subLevels + subLevel, - pSubLevelInsts[subLevel], - clippedVaHi + 1, - entryVaHi); - NV_ASSERT_OR_GOTO(NV_OK == status, cleanup); + status = mmuWalkProcessPdes(pWalk, + &g_opParamsSparsify, + pLevel->subLevels + subLevel, + pSubLevelInsts[subLevel], + clippedVaHi + 1, + entryVaHi); + NV_ASSERT_OR_GOTO(NV_OK == status, cleanupIter); } } // Sparse PDE split @@ -831,35 +485,172 @@ NV_STATUS mmuWalkProcessPdes subLevel, clippedVaLo, clippedVaHi); - NV_ASSERT_OR_GOTO(NV_OK == status, cleanup); + NV_ASSERT_OR_GOTO(NV_OK == status, cleanupIter); } - // Recurse to update the next level for this PDE status = pOpParams->opFunc(pWalk, pOpParams, pLevel->subLevels + subLevel, pSubLevelInsts[subLevel], clippedVaLo, clippedVaHi); - NV_ASSERT_OR_GOTO(NV_OK == status, cleanup); -cleanup: - // Free unused sublevel instances. Clear the PDE if all sublevels are deallocated. - _mmuWalkPdeRelease(pWalk, - pOpParams, - pLevel, - pLevelInst, - entryIndex, - entryVaLo); + if (NV_ERR_MORE_PROCESSING_REQUIRED == status) + { + // + // If NV_ERR_MORE_PROCESSING_REQUIRED is returned above, + // the recursive MMU Walker would have recursed down one + // more level. In this code block, we keep the iteration + // going by doing everything the recursion previously did. + // + status = NV_OK; + + // Save off the current state of iteration for this level + pLevel->iterInfo.pLevelInst = pLevelInst; + pLevel->iterInfo.vaLo = vaLo; + pLevel->iterInfo.vaHi = vaHi; + pLevel->iterInfo.vaLevelBase = vaLevelBase; + pLevel->iterInfo.entryIndexHi = entryIndexHi; + pLevel->iterInfo.entryIndex = entryIndex; + pLevel->iterInfo.entryIndexFillStart = entryIndexFillStart; + pLevel->iterInfo.entryIndexFillEnd = entryIndexFillEnd; + pLevel->iterInfo.pendingFillCount = pendingFillCount; + pLevel->iterInfo.entryVaLo = entryVaLo; - // Stop processing PDEs if we are in error state. - if (NV_OK != status) - break; - } // per entry loop - return status; - } + // + // Here use variables that would be used in the next recursion downwards. + // Calculate new vaLevelBase, entryIndexLo, entryIndexHi, entryIndex + // + pLevel = pLevel->subLevels + subLevel; + + vaLevelBase = mmuFmtLevelVirtAddrLo(pLevel->pFmt, clippedVaLo); + entryIndexLo = mmuFmtVirtAddrToEntryIndex(pLevel->pFmt, clippedVaLo); + entryIndexHi = mmuFmtVirtAddrToEntryIndex(pLevel->pFmt, clippedVaHi); + + // Now replace the current stack frame with the frame that is one level down + // pLevel, vaLevelBase, entryIndexHi replaced above + pLevelInst = pSubLevelInsts[subLevel]; + vaLo = clippedVaLo; + vaHi = clippedVaHi; + entryIndex = entryIndexLo; + entryIndexFillStart = 0; + entryIndexFillEnd = 0; + pendingFillCount = 0; + } + else + { + NV_ASSERT_OR_GOTO(NV_OK == status, cleanupIter); + // + // If NV_OK is returned above, the recursive MMU Walker would have reached + // the target format level and so reached the base case of its recursion. + // It would then return from recursive function calls and call pdeRelease + // for all levels whose sublevels are done being processed. + // + +cleanupIter: + // PdeRelease itself immediately since this level does not recurse. +#if defined(__GNUC__) && !defined(__clang__) + // gcc is falsely reporting entryVaLo; entryVaLo is definitely initialized +#pragma GCC diagnostic ignored "-Wmaybe-uninitialized" +#endif + _mmuWalkPdeRelease(pWalk, + pOpParams, + pLevel, + pLevelInst, + entryIndex, + entryVaLo); + +check_last_entry: + // + // If the recursive MMU Walker did a continue on the current level, + // then it didn't do a pdeRelease of the current level. + // Even with the continue, for the current iteration, + // if entryIndex == entryIndexHi, then we're done with this level + // and need to do a pdeRelease on the next level up since we would + // return from the recursion. + // + + // + // If we're at the original level and entryIndex = entryIndexHi, + // then we're done and need to exit the entire loop. + // If this is true, we've already done the _mmuWalkPdeRelease: + // Either we already called _mmuWalkPdeRelease right before this + // or we skipped it from a goto check_last_entry continue. + // The MMU Walker is re-entrant and will otherwise pick up on + // parent levels when mmuWalkProcessPdes is called on sublevels + // + if ((pLevel == pLevelOrig) && (entryIndex == entryIndexHi)) + { + goto done; + } + + // + // Now restore and finish previous frame(s) + // + // If this is the last processed sublevel of a level or an error has + // previously occurred, pdeRelease the level. + // Continue doing so for all parent levels. + // Once we're reached a non-finished level, iterate to the next entry. + // + while (entryIndex == entryIndexHi || status != NV_OK) + { + // + // Now replace the current stack frame with the frame that was one + // level above. This should never be NULL, since we'll already have + // exited after processing the root level. If it is NULL, we can't + // clean up any more anyway, so return immediately. + // + NV_ASSERT_OR_RETURN(pLevel->pParent != NULL, NV_ERR_INVALID_STATE); + + pLevel = pLevel->pParent; + pLevelInst = pLevel->iterInfo.pLevelInst; + vaLo = pLevel->iterInfo.vaLo; + vaHi = pLevel->iterInfo.vaHi; + vaLevelBase = pLevel->iterInfo.vaLevelBase; + entryIndexHi = pLevel->iterInfo.entryIndexHi; + entryIndex = pLevel->iterInfo.entryIndex; + entryIndexFillStart = pLevel->iterInfo.entryIndexFillStart; + entryIndexFillEnd = pLevel->iterInfo.entryIndexFillEnd; + pendingFillCount = pLevel->iterInfo.pendingFillCount; + _mmuWalkPdeRelease(pWalk, + pOpParams, + pLevel, + pLevelInst, + entryIndex, + pLevel->iterInfo.entryVaLo); + // + // If we're at the original level and entryIndex = entryIndexHi, + // then we're done and need to exit the entire loop + // + if ((pLevel == pLevelOrig) && (entryIndex == entryIndexHi)) + { + goto done; + } + } + + // + // Once the above loop is done and we reach here, then we're + // ready to process the next entry in the list. Only iterate here, + // not in the overall loop since we may have iterated down in the + // above else block and don't want to increment before processing + // the first entry on a new lower level. + // + entryIndex++; + } + } // per entry loop + + // + // If this assertion fails, it is a result of a programming + // error in the iterative MMU Walker implementation. We should + // have iterated back updwards through the MMU state to the original + // level even on failure. + // + NV_ASSERT_OR_RETURN(pLevel != pLevelOrig, NV_ERR_INVALID_STATE); + } +done: + return status; } /*! diff --git a/src/nvidia/src/libraries/mmu/mmu_walk_commit.c b/src/nvidia/src/libraries/mmu/mmu_walk_commit.c index acaacea460..72371a074c 100644 --- a/src/nvidia/src/libraries/mmu/mmu_walk_commit.c +++ b/src/nvidia/src/libraries/mmu/mmu_walk_commit.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2014-2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2014-2015,2020,2022,2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -64,16 +64,8 @@ mmuWalkCommitPDEs opParams.bCommit = NV_TRUE; // Start reserving from root (only one instance). - if (pWalk->flags.bUseIterative) - { - status = mmuWalkProcessPdes(pWalk, &opParams, &pWalk->root, pWalk->root.pInstances, - vaLo, vaHi); - } - else - { - status = _mmuWalkCommitPDEs(pWalk, &opParams, &pWalk->root, pWalk->root.pInstances, - vaLo, vaHi); - } + status = mmuWalkProcessPdes(pWalk, &opParams, &pWalk->root, pWalk->root.pInstances, + vaLo, vaHi); return status; } @@ -98,20 +90,7 @@ _mmuWalkCommitPDEs { NV_ASSERT_OR_RETURN(0 != pLevel->pFmt->numSubLevels, NV_ERR_INVALID_ARGUMENT); - if (pWalk->flags.bUseIterative) - { - return NV_ERR_MORE_PROCESSING_REQUIRED; - } - else - { - // Process all the page level entries falling within [vaLo, vaHi] - NV_ASSERT_OK_OR_RETURN(mmuWalkProcessPdes(pWalk, - pOpParams, - pLevel, - pLevelInst, - vaLo, - vaHi)); - } + return NV_ERR_MORE_PROCESSING_REQUIRED; } // // We don't care about the PTEs here. diff --git a/src/nvidia/src/libraries/mmu/mmu_walk_fill.c b/src/nvidia/src/libraries/mmu/mmu_walk_fill.c index 8d62903206..e74acd826a 100644 --- a/src/nvidia/src/libraries/mmu/mmu_walk_fill.c +++ b/src/nvidia/src/libraries/mmu/mmu_walk_fill.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2014-2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2014-2015,2020,2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -74,21 +74,7 @@ NV_STATUS mmuWalkFill // If this level is a Page Directory, we keep walking down the tree. if (0 != pLevel->pFmt->numSubLevels) { - if (pWalk->flags.bUseIterative) - { - return NV_ERR_MORE_PROCESSING_REQUIRED; - } - else - { - // Process all the page level entries.falling within [vaLo, vaHi] - NV_ASSERT_OK_OR_RETURN( - mmuWalkProcessPdes(pWalk, - pOpParams, - pLevel, - pLevelInst, - vaLo, - vaHi)); - } + return NV_ERR_MORE_PROCESSING_REQUIRED; } // We have reached a page table else diff --git a/src/nvidia/src/libraries/mmu/mmu_walk_map.c b/src/nvidia/src/libraries/mmu/mmu_walk_map.c index e7852fb752..bbae36edd4 100644 --- a/src/nvidia/src/libraries/mmu/mmu_walk_map.c +++ b/src/nvidia/src/libraries/mmu/mmu_walk_map.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2014-2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2014-2015,2020,2022,2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -66,14 +66,8 @@ mmuWalkMap opParams.selectSubLevel = _mmuWalkMapSelectSubLevel; // Start mapping from root (only one instance). - if (pWalk->flags.bUseIterative) - { - status = mmuWalkProcessPdes(pWalk, &opParams, &pWalk->root, pWalk->root.pInstances, vaLo, vaHi); - } - else - { - _mmuWalkMap(pWalk, &opParams, &pWalk->root, pWalk->root.pInstances, vaLo, vaHi); - } + status = mmuWalkProcessPdes(pWalk, &opParams, &pWalk->root, pWalk->root.pInstances, vaLo, vaHi); + if (NV_OK != status) { NV_STATUS unmapStatus; @@ -124,21 +118,7 @@ _mmuWalkMap { NV_ASSERT_OR_RETURN(0 != pLevel->pFmt->numSubLevels, NV_ERR_INVALID_ARGUMENT); - if (pWalk->flags.bUseIterative) - { - return NV_ERR_MORE_PROCESSING_REQUIRED; - } - else - { - // Process all the page level entries falling within [vaLo, vaHi] - NV_ASSERT_OK_OR_RETURN( - mmuWalkProcessPdes(pWalk, - pOpParams, - pLevel, - pLevelInst, - vaLo, - vaHi)); - } + return NV_ERR_MORE_PROCESSING_REQUIRED; } // We have reached the target page level. else @@ -162,26 +142,14 @@ _mmuWalkMap const NvU64 entryVaHi = mmuFmtEntryIndexVirtAddrHi(pLevel->pFmt, vaLevelBase, entryIndex); - if (pWalk->flags.bUseIterative) - { - NV_ASSERT_OK_OR_RETURN( - mmuWalkProcessPdes(pWalk, - &g_opParamsUnmap, - pLevel, - pLevelInst, - entryVaLo, - entryVaHi)); - } - else - { - NV_ASSERT_OK_OR_RETURN( - g_opParamsUnmap.opFunc(pWalk, - &g_opParamsUnmap, - pLevel, - pLevelInst, - entryVaLo, - entryVaHi)); - } + NV_ASSERT_OK_OR_RETURN( + mmuWalkProcessPdes(pWalk, + &g_opParamsUnmap, + pLevel, + pLevelInst, + entryVaLo, + entryVaHi)); + // // If this entry is still a PDE it means there are reserved sub-levels underneath. diff --git a/src/nvidia/src/libraries/mmu/mmu_walk_reserve.c b/src/nvidia/src/libraries/mmu/mmu_walk_reserve.c index 3d34d8aa8b..c76ad0d3d0 100644 --- a/src/nvidia/src/libraries/mmu/mmu_walk_reserve.c +++ b/src/nvidia/src/libraries/mmu/mmu_walk_reserve.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2014-2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2014-2015,2020-2022,2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -72,16 +72,8 @@ mmuWalkReserveEntries opParams.bIgnoreSubLevelConflicts = NV_TRUE; // Start reserving from root (only one instance). - if (pWalk->flags.bUseIterative) - { - status = mmuWalkProcessPdes(pWalk, &opParams, &pWalk->root, pWalk->root.pInstances, - vaLo, vaHi); - } - else - { - status = _mmuWalkReserveEntries(pWalk, &opParams, &pWalk->root, pWalk->root.pInstances, - vaLo, vaHi); - } + status = mmuWalkProcessPdes(pWalk, &opParams, &pWalk->root, pWalk->root.pInstances, + vaLo, vaHi); if (NV_OK != status) { @@ -129,16 +121,8 @@ mmuWalkReleaseEntries opParams.bIgnoreSubLevelConflicts = NV_TRUE; opParams.bRelease = NV_TRUE; - if (pWalk->flags.bUseIterative) - { - status = mmuWalkProcessPdes(pWalk, &opParams, &pWalk->root, pWalk->root.pInstances, - vaLo, vaHi); - } - else - { - status = _mmuWalkReleaseEntries(pWalk, &opParams, &pWalk->root, pWalk->root.pInstances, - vaLo, vaHi); - } + status = mmuWalkProcessPdes(pWalk, &opParams, &pWalk->root, pWalk->root.pInstances, + vaLo, vaHi); NV_ASSERT_OR_RETURN(NV_OK == status, status); @@ -169,21 +153,7 @@ _mmuWalkReserveEntries { NV_ASSERT_OR_RETURN(0 != pLevel->pFmt->numSubLevels, NV_ERR_INVALID_ARGUMENT); - if (pWalk->flags.bUseIterative) - { - return NV_ERR_MORE_PROCESSING_REQUIRED; - } - else - { - // Process all the page level entries falling within [vaLo, vaHi] - NV_ASSERT_OK_OR_RETURN( - mmuWalkProcessPdes(pWalk, - pOpParams, - pLevel, - pLevelInst, - vaLo, - vaHi)); - } + return NV_ERR_MORE_PROCESSING_REQUIRED; } // We have reached the target page level. else @@ -220,21 +190,7 @@ _mmuWalkReleaseEntries { NV_ASSERT_OR_RETURN(0 != pLevel->pFmt->numSubLevels, NV_ERR_INVALID_ARGUMENT); - if (pWalk->flags.bUseIterative) - { - return NV_ERR_MORE_PROCESSING_REQUIRED; - } - else - { - // Process all the page level entries falling within [vaLo, vaHi] - NV_ASSERT_OK_OR_RETURN( - mmuWalkProcessPdes(pWalk, - pOpParams, - pLevel, - pLevelInst, - vaLo, - vaHi)); - } + return NV_ERR_MORE_PROCESSING_REQUIRED; } // We have reached the target page level. else diff --git a/src/nvidia/src/libraries/mmu/mmu_walk_sparse.c b/src/nvidia/src/libraries/mmu/mmu_walk_sparse.c index 5c83ac584b..8eacfd8d70 100644 --- a/src/nvidia/src/libraries/mmu/mmu_walk_sparse.c +++ b/src/nvidia/src/libraries/mmu/mmu_walk_sparse.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2014-2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2014-2015,2020,2022,2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -59,20 +59,10 @@ mmuWalkSparsify pWalk->bUseStagingBuffer = bUseStagingBuffer; // Sparsify - if (pWalk->flags.bUseIterative) - { - status = mmuWalkProcessPdes(pWalk, - &g_opParamsSparsify, - &pWalk->root, pWalk->root.pInstances, - vaLo, vaHi); - } - else - { - status = g_opParamsSparsify.opFunc(pWalk, - &g_opParamsSparsify, - &pWalk->root, pWalk->root.pInstances, - vaLo, vaHi); - } + status = mmuWalkProcessPdes(pWalk, + &g_opParamsSparsify, + &pWalk->root, pWalk->root.pInstances, + vaLo, vaHi); if (NV_OK != status) { diff --git a/src/nvidia/src/libraries/mmu/mmu_walk_unmap.c b/src/nvidia/src/libraries/mmu/mmu_walk_unmap.c index dac323915c..554b9a914a 100644 --- a/src/nvidia/src/libraries/mmu/mmu_walk_unmap.c +++ b/src/nvidia/src/libraries/mmu/mmu_walk_unmap.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2014-2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2014-2015,2020,2022,2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -53,16 +53,9 @@ mmuWalkUnmap // Unmap starting from root if it exists. if (NULL != pWalk->root.pInstances) { - if (pWalk->flags.bUseIterative) - { - status = mmuWalkProcessPdes(pWalk, &g_opParamsUnmap, - &pWalk->root, pWalk->root.pInstances, vaLo, vaHi); - } - else - { - status = g_opParamsUnmap.opFunc(pWalk, &g_opParamsUnmap, - &pWalk->root, pWalk->root.pInstances, vaLo, vaHi); - } + + status = mmuWalkProcessPdes(pWalk, &g_opParamsUnmap, + &pWalk->root, pWalk->root.pInstances, vaLo, vaHi); if (NV_OK != status) { diff --git a/src/nvidia/src/libraries/nvoc/src/runtime.c b/src/nvidia/src/libraries/nvoc/src/runtime.c index f05c00608f..5be24b8478 100644 --- a/src/nvidia/src/libraries/nvoc/src/runtime.c +++ b/src/nvidia/src/libraries/nvoc/src/runtime.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2015-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -180,7 +180,7 @@ void __nvoc_objDelete(Dynamic *pDynamic) return; } - pDynamic->__nvoc_rtti->dtor(pDynamic); + __nvoc_destructFromBase(pDynamic); pObj = dynamicCast(pDynamic, Object); if (pObj->pParent != NULL) diff --git a/src/nvidia/src/libraries/nvport/memory/memory_generic.h b/src/nvidia/src/libraries/nvport/memory/memory_generic.h index 037eee605e..56271909e5 100644 --- a/src/nvidia/src/libraries/nvport/memory/memory_generic.h +++ b/src/nvidia/src/libraries/nvport/memory/memory_generic.h @@ -29,33 +29,6 @@ #include "nvport/nvport.h" -// Define accessor macros if not already defined -#ifndef PORT_MEM_RD08 -#define PORT_MEM_RD08(p) (*(p)) -#endif -#ifndef PORT_MEM_RD16 -#define PORT_MEM_RD16(p) (*(p)) -#endif -#ifndef PORT_MEM_RD32 -#define PORT_MEM_RD32(p) (*(p)) -#endif -#ifndef PORT_MEM_RD64 -#define PORT_MEM_RD64(p) (*(p)) -#endif -#ifndef PORT_MEM_WR08 -#define PORT_MEM_WR08(p, v) (*(p) = (v)) -#endif -#ifndef PORT_MEM_WR16 -#define PORT_MEM_WR16(p, v) (*(p) = (v)) -#endif -#ifndef PORT_MEM_WR32 -#define PORT_MEM_WR32(p, v) (*(p) = (v)) -#endif -#ifndef PORT_MEM_WR64 -#define PORT_MEM_WR64(p, v) (*(p) = (v)) -#endif - - #if defined(PORT_MEM_USE_GENERIC_portMemSetPattern) void * portMemSetPattern diff --git a/src/nvidia/src/libraries/nvport/memory/memory_tracking.c b/src/nvidia/src/libraries/nvport/memory/memory_tracking.c index e75eee264f..8ab73b7371 100644 --- a/src/nvidia/src/libraries/nvport/memory/memory_tracking.c +++ b/src/nvidia/src/libraries/nvport/memory/memory_tracking.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2015-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -36,7 +36,6 @@ #if PORT_MEM_TRACK_USE_LIMIT #include "os/os.h" -#define PORT_MEM_LIMIT_MAX_PIDS 32 #endif #if NVOS_IS_LIBOS @@ -174,8 +173,7 @@ static struct PORT_MEM_GLOBALS NvU32 totalAllocators; #if PORT_MEM_TRACK_USE_LIMIT NvBool bLimitEnabled; - NvLength limitPid[PORT_MEM_LIMIT_MAX_PIDS]; - NvLength counterPid[PORT_MEM_LIMIT_MAX_PIDS]; + PORT_MEM_ALLOCATOR_TRACKING *pGfidTracking[PORT_MEM_LIMIT_MAX_GFID]; #endif } portMemGlobals; @@ -190,16 +188,7 @@ _portMemExTrackingGetAllocUsableSizeWrapper void *pMem ) { -#if PORT_IS_FUNC_SUPPORTED(portMemExTrackingGetAllocUsableSize) - // - // blockSize in PORT_MEM_HEADER does not include the size of the header/ - // footer, but the underlying malloc implementation doesn't know about - // those. Account for them here. - // - NvLength allocSize = portMemExTrackingGetAllocUsableSize(PORT_MEM_SUB_HEADER_PTR(pMem)); - PORT_ASSERT_CHECKED(allocSize > PORT_MEM_STAGING_SIZE); - return allocSize - PORT_MEM_STAGING_SIZE; -#elif PORT_MEM_HEADER_HAS_BLOCK_SIZE +#if PORT_MEM_HEADER_HAS_BLOCK_SIZE return PORT_MEM_SUB_HEADER_PTR(pMem)->blockSize; #endif } @@ -559,7 +548,13 @@ static void *_portMemAllocatorAllocExistingWrapper(PORT_MEM_ALLOCATOR *pAlloc static void _portMemAllocatorFreeExistingWrapper(PORT_MEM_ALLOCATOR *pAlloc, void *pMem); static void _portMemTrackingRelease(PORT_MEM_ALLOCATOR_TRACKING *pTracking, NvBool bReportLeaks); -static void _portMemTrackAlloc(PORT_MEM_ALLOCATOR_TRACKING *pTracking, void *pMem, NvLength size, NvU32 pid PORT_MEM_CALLERINFO_COMMA_TYPE_PARAM); +static void _portMemTrackAlloc( + PORT_MEM_ALLOCATOR_TRACKING *pTracking, + void *pMem, + NvLength size, + NvU32 gfid + PORT_MEM_CALLERINFO_COMMA_TYPE_PARAM +); static void _portMemTrackFree(PORT_MEM_ALLOCATOR_TRACKING *pTracking, void *pMem); @@ -588,17 +583,36 @@ static void _portMemTrackFree(PORT_MEM_ALLOCATOR_TRACKING *pTracking, void *pMem // Per-process heap limiting implementation // #if PORT_MEM_TRACK_USE_LIMIT +static inline NvBool isGfidValid(NvU32 gfid) +{ + return (gfid > 0) && (gfid <= PORT_MEM_LIMIT_MAX_GFID); +} + +static void _portMemTrackingGfidRelease(void) +{ + int gfidIdx; + + for (gfidIdx = 0; gfidIdx < PORT_MEM_LIMIT_MAX_GFID; ++gfidIdx) + { + if (portMemGlobals.pGfidTracking[gfidIdx] != NULL) + { + _portMemTrackingRelease(portMemGlobals.pGfidTracking[gfidIdx], NV_FALSE); + portMemGlobals.pGfidTracking[gfidIdx] = NULL; + } + } +} + static NV_INLINE void -_portMemLimitInc(NvU32 pid, void *pMem, NvLength size) +_portMemLimitInc(NvU32 gfid, void *pMem, NvLength size) { PORT_MEM_HEADER *pMemHeader = PORT_MEM_SUB_HEADER_PTR(pMem); - pMemHeader->pid = pid; + pMemHeader->gfid = gfid; if (portMemGlobals.bLimitEnabled) { - if ((pid > 0) && (pid <= PORT_MEM_LIMIT_MAX_PIDS)) + if (isGfidValid(gfid)) { - NvU32 pidIdx = pid - 1; - PORT_MEM_ATOMIC_ADD_SIZE(&portMemGlobals.counterPid[pidIdx], size); + NvU32 gfidIdx = gfid - 1; + PORT_MEM_ATOMIC_ADD_SIZE(&portMemGlobals.pGfidTracking[gfidIdx]->counterGfid, size); } } } @@ -609,38 +623,44 @@ _portMemLimitDec(void *pMem, NvLength size) if (portMemGlobals.bLimitEnabled) { PORT_MEM_HEADER *pMemHeader = PORT_MEM_SUB_HEADER_PTR(pMem); - NvU32 pid = pMemHeader->pid; + NvU32 gfid = pMemHeader->gfid; - if ((pid > 0) && (pid <= PORT_MEM_LIMIT_MAX_PIDS)) + if (isGfidValid(gfid)) { - NvU32 pidIdx = pid - 1; - if (portMemGlobals.counterPid[pidIdx] < size) + NvU32 gfidIdx = gfid - 1; + if (portMemGlobals.pGfidTracking[gfidIdx]->counterGfid < size) { PORT_MEM_PRINT_ERROR("memory free error: counter underflow\n"); PORT_BREAKPOINT_CHECKED(); } else { - PORT_MEM_ATOMIC_SUB_SIZE(&portMemGlobals.counterPid[pidIdx], size); + PORT_MEM_ATOMIC_SUB_SIZE( + &portMemGlobals.pGfidTracking[gfidIdx]->counterGfid, + size); } } } } static NV_INLINE NvBool -_portMemLimitExceeded(NvU32 pid, NvLength size) +_portMemLimitExceeded(NvU32 gfid, NvLength size) { NvBool bExceeded = NV_FALSE; if (portMemGlobals.bLimitEnabled) { - if ((pid > 0) && (pid <= PORT_MEM_LIMIT_MAX_PIDS)) + if (isGfidValid(gfid)) { - NvU32 pidIdx = pid - 1; - if ((size + portMemGlobals.counterPid[pidIdx]) > portMemGlobals.limitPid[pidIdx]) + NvU32 gfidIdx = gfid - 1; + if ((size + portMemGlobals.pGfidTracking[gfidIdx]->counterGfid) > + portMemGlobals.pGfidTracking[gfidIdx]->limitGfid) { - PORT_MEM_PRINT_ERROR("memory allocation denied; PID %d exceeded per-process heap limit of %"NvUPtr_fmtu"\n", - pid, portMemGlobals.limitPid[pidIdx]); + PORT_MEM_PRINT_ERROR( + "memory allocation denied; GFID %d exceeded per-process heap limit of " + "%"NvUPtr_fmtu"\n", + gfid, portMemGlobals.pGfidTracking[gfidIdx]->limitGfid + ); bExceeded = NV_TRUE; } } @@ -648,13 +668,13 @@ _portMemLimitExceeded(NvU32 pid, NvLength size) return bExceeded; } -#define PORT_MEM_LIMIT_INC(pid, pMem, size) _portMemLimitInc(pid, pMem, size) +#define PORT_MEM_LIMIT_INC(gfid, pMem, size) _portMemLimitInc(gfid, pMem, size) #define PORT_MEM_LIMIT_DEC(pMem, size) _portMemLimitDec(pMem, size) -#define PORT_MEM_LIMIT_EXCEEDED(pid, size) _portMemLimitExceeded(pid, size) +#define PORT_MEM_LIMIT_EXCEEDED(gfid, size) _portMemLimitExceeded(gfid, size) #else -#define PORT_MEM_LIMIT_INC(pid, pMem, size) \ +#define PORT_MEM_LIMIT_INC(gfid, pMem, size) \ do { \ - PORT_UNREFERENCED_VARIABLE(pid); \ + PORT_UNREFERENCED_VARIABLE(gfid); \ PORT_UNREFERENCED_VARIABLE(pMem); \ PORT_UNREFERENCED_VARIABLE(size); \ } while (0) @@ -663,7 +683,7 @@ _portMemLimitExceeded(NvU32 pid, NvLength size) PORT_UNREFERENCED_VARIABLE(pMem); \ PORT_UNREFERENCED_VARIABLE(size); \ } while (0) -#define PORT_MEM_LIMIT_EXCEEDED(pid, size) (NV_FALSE) +#define PORT_MEM_LIMIT_EXCEEDED(gfid, size) (NV_FALSE) #endif // PORT_MEM_TRACK_USE_LIMIT static NV_INLINE PORT_MEM_ALLOCATOR_TRACKING * @@ -698,8 +718,6 @@ portMemInitialize(void) #if PORT_MEM_TRACK_USE_LIMIT // Initialize process heap limit to max int (i.e. no limit) portMemGlobals.bLimitEnabled = NV_FALSE; - portMemSet(&portMemGlobals.limitPid, NV_U8_MAX, sizeof(portMemGlobals.limitPid)); - portMemSet(&portMemGlobals.counterPid, 0, sizeof(portMemGlobals.counterPid)); #endif portMemGlobals.alloc.paged._portAlloc = _portMemAllocatorAllocPagedWrapper; @@ -731,7 +749,7 @@ portMemInitialize(void) // Use the same impl for both paged and nonpaged. portMemGlobals.alloc.paged.pImpl = &portMemGlobals.alloc.pagedImpl; portMemGlobals.alloc.nonPaged.pImpl = &portMemGlobals.alloc.pagedImpl; - portMemInitializeAllocatorTracking(NULL, + portMemInitializeAllocatorTracking(&portMemGlobals.alloc.paged, &portMemGlobals.alloc.pagedImpl.tracking PORT_MEM_CALLERINFO_COMMA_PARAM); portMemGlobals.alloc.paged.pTracking = &portMemGlobals.alloc.pagedImpl.tracking; @@ -763,7 +781,9 @@ portMemShutdown(NvBool bForceSilent) { _portMemTrackingRelease(&portMemGlobals.alloc.pagedImpl.tracking, NV_FALSE); } - +#if PORT_MEM_TRACK_USE_LIMIT + _portMemTrackingGfidRelease(); +#endif PORT_MEM_LOCK_DESTROY(portMemGlobals.trackingLock); PORT_MEM_LIST_DESTROY(&portMemGlobals.mainTracking); portMemSet(&portMemGlobals, 0, sizeof(portMemGlobals)); @@ -948,12 +968,76 @@ portMemInitializeAllocatorTracking #if PORT_MEM_TRACK_USE_LIMIT void -portMemInitializeAllocatorTrackingLimit(NvU32 pid, NvLength limit, NvBool bLimitEnabled) +portMemInitializeAllocatorTrackingLimit(NvU32 gfid, NvLength limit, NvBool bLimitEnabled) { - NvU32 pidIdx = pid - 1; - portMemGlobals.limitPid[pidIdx] = limit; + if (!isGfidValid(gfid)) + return; + + NvU32 gfidIdx = gfid - 1; + + portMemGlobals.pGfidTracking[gfidIdx]->limitGfid = limit; portMemGlobals.bLimitEnabled = bLimitEnabled; } + +void portMemGfidTrackingInit(NvU32 gfid) +{ + if (!isGfidValid(gfid)) + { + PORT_BREAKPOINT_CHECKED(); + return; + } + + NvU32 gfidIdx = gfid - 1; + + if (portMemGlobals.pGfidTracking[gfidIdx] != NULL) + return; + + PORT_MEM_ALLOCATOR_TRACKING *pTracking = + _portMemAllocNonPagedUntracked(sizeof(PORT_MEM_ALLOCATOR_TRACKING)); + + if (pTracking == NULL) + { + portDbgPrintf("!!! Failed memory allocation for pTracking !!!\n"); + PORT_BREAKPOINT_CHECKED(); + return; + } + + portMemSet(pTracking, 0, sizeof(*pTracking)); + pTracking->limitGfid = NV_U64_MAX; + pTracking->counterGfid = 0; + pTracking->gfid = gfid; + PORT_LOCKED_LIST_LINK(&portMemGlobals.mainTracking, pTracking, portMemGlobals.trackingLock); + PORT_MEM_COUNTER_INIT(&pTracking->counter); + portMemGlobals.pGfidTracking[gfidIdx] = pTracking; +} + +void portMemGfidTrackingFree(NvU32 gfid) +{ + if (!isGfidValid(gfid)) + { + PORT_BREAKPOINT_CHECKED(); + return; + } + + NvU32 gfidIdx = gfid - 1; + PORT_MEM_ALLOCATOR_TRACKING *pTracking = portMemGlobals.pGfidTracking[gfidIdx]; + + if (pTracking == NULL) + { + PORT_BREAKPOINT_CHECKED(); + return; + } + + if (pTracking->counter.activeAllocs != 0) + { + portDbgPrintf(" !!! MEMORY LEAK DETECTED (%u blocks) !!!\n", + pTracking->counter.activeAllocs); + + } + + portMemPrintTrackingInfo(pTracking); +} + #endif void * @@ -964,7 +1048,7 @@ _portMemAllocatorAlloc PORT_MEM_CALLERINFO_COMMA_TYPE_PARAM ) { - NvU32 pid = 0; + NvU32 gfid = 0; void *pMem = NULL; if (pAlloc == NULL) { @@ -975,7 +1059,7 @@ _portMemAllocatorAlloc #if PORT_MEM_TRACK_USE_LIMIT if (portMemGlobals.bLimitEnabled) { - if (osGetCurrentProcessGfid(&pid) != NV_OK) + if (osGetCurrentProcessGfid(&gfid) != NV_OK) { PORT_BREAKPOINT_CHECKED(); return NULL; @@ -984,7 +1068,7 @@ _portMemAllocatorAlloc #endif // Check if per-process memory limit will be exhausted by this allocation - if (PORT_MEM_LIMIT_EXCEEDED(pid, length)) + if (PORT_MEM_LIMIT_EXCEEDED(gfid, length)) return NULL; if (length > 0) @@ -1009,7 +1093,7 @@ _portMemAllocatorAlloc if (pMem != NULL) { pMem = PORT_MEM_ADD_HEADER_PTR(pMem); - _portMemTrackAlloc(_portMemGetTracking(pAlloc), pMem, length, pid + _portMemTrackAlloc(_portMemGetTracking(pAlloc), pMem, length, gfid PORT_MEM_CALLERINFO_COMMA_PARAM); } return pMem; @@ -1052,6 +1136,10 @@ portMemPrintTrackingInfo portDbgPrintf("[NvPort] ======== Global Non-Paged Memory Allocator Tracking ========\n"); else if (pTracking == portMemGlobals.alloc.paged.pTracking) portDbgPrintf("[NvPort] ======== Global Paged Memory Allocator Tracking ========\n"); +#if PORT_MEM_TRACK_USE_LIMIT + else if (isGfidValid(pTracking->gfid)) + portDbgPrintf("[NvPort] ======== GFID %u Tracking ========\n", pTracking->gfid); +#endif else portDbgPrintf("[NvPort] ======== Memory Allocator %p Tracking ======== \n", pTracking->pAllocator); @@ -1080,8 +1168,16 @@ portMemPrintTrackingInfo PORT_MEM_TRACK_ALLOCATOR_STATS stats; portMemSet(&stats, 0, sizeof(stats)); - - portMemExTrackingGetActiveStats(pTracking->pAllocator, &stats); +#if PORT_MEM_TRACK_USE_LIMIT + if (isGfidValid(pTracking->gfid)) + { + portMemExTrackingGetGfidActiveStats(pTracking->gfid, &stats); + } + else +#endif + { + portMemExTrackingGetActiveStats(pTracking->pAllocator, &stats); + } // // rmtest_gsp test script (dvs_gsp_sanity.sh) depends on this print, so do not change @@ -1100,8 +1196,16 @@ portMemPrintTrackingInfo PORT_MEM_TRACK_ALLOCATOR_STATS stats; portMemSet(&stats, 0, sizeof(stats)); - - portMemExTrackingGetTotalStats(pTracking->pAllocator, &stats); +#if PORT_MEM_TRACK_USE_LIMIT + if (isGfidValid(pTracking->gfid)) + { + portMemExTrackingGetGfidTotalStats(pTracking->gfid, &stats); + } + else +#endif + { + portMemExTrackingGetTotalStats(pTracking->pAllocator, &stats); + } portDbgPrintf(" TOTAL: %u allocations, %"NvUPtr_fmtu" bytes allocated (%"NvUPtr_fmtu" useful, %"NvUPtr_fmtu" meta)\n", stats.numAllocations, stats.allocatedSize, @@ -1115,8 +1219,16 @@ portMemPrintTrackingInfo PORT_MEM_TRACK_ALLOCATOR_STATS stats; portMemSet(&stats, 0, sizeof(stats)); - - portMemExTrackingGetPeakStats(pTracking->pAllocator, &stats); +#if PORT_MEM_TRACK_USE_LIMIT + if (isGfidValid(pTracking->gfid)) + { + portMemExTrackingGetGfidPeakStats(pTracking->gfid, &stats); + } + else +#endif + { + portMemExTrackingGetPeakStats(pTracking->pAllocator, &stats); + } portDbgPrintf(" PEAK: %u allocations, %"NvUPtr_fmtu" bytes allocated (%"NvUPtr_fmtu" useful, %"NvUPtr_fmtu" meta)\n", stats.numAllocations, stats.allocatedSize, @@ -1185,6 +1297,33 @@ portMemExTrackingGetActiveStats pStats->allocatedSize = pStats->usefulSize + pStats->metaSize; return NV_OK; } +#if PORT_MEM_TRACK_USE_LIMIT +NV_STATUS +portMemExTrackingGetGfidActiveStats +( + NvU32 gfid, + PORT_MEM_TRACK_ALLOCATOR_STATS *pStats +) +{ + if (!isGfidValid(gfid)) + { + return NV_ERR_INVALID_ARGUMENT; + } + + NvU32 gfidIdx = gfid - 1; + PORT_MEM_ALLOCATOR_TRACKING *pTracking = portMemGlobals.pGfidTracking[gfidIdx]; + + if (pTracking == NULL) + { + return NV_ERR_INVALID_ARGUMENT; + } + pStats->numAllocations = pTracking->counter.activeAllocs; + pStats->usefulSize = pTracking->counter.activeSize; + pStats->metaSize = pStats->numAllocations * PORT_MEM_STAGING_SIZE; + pStats->allocatedSize = pStats->usefulSize + pStats->metaSize; + return NV_OK; +} +#endif #endif #if portMemExTrackingGetTotalStats_SUPPORTED @@ -1206,6 +1345,33 @@ portMemExTrackingGetTotalStats pStats->allocatedSize = pStats->usefulSize + pStats->metaSize; return NV_OK; } +#if PORT_MEM_TRACK_USE_LIMIT +NV_STATUS +portMemExTrackingGetGfidTotalStats +( + NvU32 gfid, + PORT_MEM_TRACK_ALLOCATOR_STATS *pStats +) +{ + if (!isGfidValid(gfid)) + { + return NV_ERR_INVALID_ARGUMENT; + } + + NvU32 gfidIdx = gfid - 1; + PORT_MEM_ALLOCATOR_TRACKING *pTracking = portMemGlobals.pGfidTracking[gfidIdx]; + + if (pTracking == NULL) + { + return NV_ERR_INVALID_ARGUMENT; + } + pStats->numAllocations = pTracking->counter.totalAllocs; + pStats->usefulSize = pTracking->counter.totalSize; + pStats->metaSize = pStats->numAllocations * PORT_MEM_STAGING_SIZE; + pStats->allocatedSize = pStats->usefulSize + pStats->metaSize; + return NV_OK; +} +#endif #endif #if portMemExTrackingGetPeakStats_SUPPORTED @@ -1227,6 +1393,33 @@ portMemExTrackingGetPeakStats pStats->allocatedSize = pStats->usefulSize + pStats->metaSize; return NV_OK; } +#if PORT_MEM_TRACK_USE_LIMIT +NV_STATUS +portMemExTrackingGetGfidPeakStats +( + NvU32 gfid, + PORT_MEM_TRACK_ALLOCATOR_STATS *pStats +) +{ + if (!isGfidValid(gfid)) + { + return NV_ERR_INVALID_ARGUMENT; + } + + NvU32 gfidIdx = gfid - 1; + PORT_MEM_ALLOCATOR_TRACKING *pTracking = portMemGlobals.pGfidTracking[gfidIdx]; + + if (pTracking == NULL) + { + return NV_ERR_INVALID_ARGUMENT; + } + pStats->numAllocations = pTracking->counter.peakAllocs; + pStats->usefulSize = pTracking->counter.peakSize; + pStats->metaSize = pStats->numAllocations * PORT_MEM_STAGING_SIZE; + pStats->allocatedSize = pStats->usefulSize + pStats->metaSize; + return NV_OK; +} +#endif #endif #if portMemExTrackingGetNext_SUPPORTED @@ -1295,7 +1488,16 @@ _portMemTrackingRelease PORT_LOCKED_LIST_UNLINK(&portMemGlobals.mainTracking, pTracking, portMemGlobals.trackingLock); PORT_MEM_LIST_DESTROY(pTracking); - PORT_MEM_ATOMIC_DEC_U32(&portMemGlobals.totalAllocators); +#if PORT_MEM_TRACK_USE_LIMIT + if (isGfidValid(pTracking->gfid)) + { + _portMemFreeUntracked(pTracking); + } + else +#endif + { + PORT_MEM_ATOMIC_DEC_U32(&portMemGlobals.totalAllocators); + } } static void @@ -1304,7 +1506,7 @@ _portMemTrackAlloc PORT_MEM_ALLOCATOR_TRACKING *pTracking, void *pMem, NvLength size, - NvU32 pid + NvU32 gfid PORT_MEM_CALLERINFO_COMMA_TYPE_PARAM ) { @@ -1325,12 +1527,20 @@ _portMemTrackAlloc PORT_MEM_COUNTER_INC(&pTracking->counter, size); PORT_MEM_COUNTER_INC(&portMemGlobals.mainTracking.counter, size); - PORT_MEM_LIMIT_INC(pid, pMem, size); + PORT_MEM_LIMIT_INC(gfid, pMem, size); PORT_MEM_FENCE_INIT(pTracking->pAllocator, pMem, size); PORT_MEM_LIST_ADD(pTracking, pMem); PORT_MEM_CALLERINFO_INIT_MEM(pMem); PORT_MEM_LOG_ALLOC(pTracking->pAllocator, pMem, size); +#if PORT_MEM_TRACK_USE_LIMIT + if (isGfidValid(gfid)) + { + NvU32 gfidIdx = gfid - 1; + + PORT_MEM_COUNTER_INC(&portMemGlobals.pGfidTracking[gfidIdx]->counter, size); + } +#endif } static void @@ -1358,6 +1568,16 @@ _portMemTrackFree PORT_MEM_FENCE_CHECK(pTracking->pAllocator, pMem, size); PORT_MEM_LIST_REMOVE(pTracking, pMem); PORT_MEM_LOG_FREE(pTracking->pAllocator, pMem); +#if PORT_MEM_TRACK_USE_LIMIT + PORT_MEM_HEADER *pMemHeader = PORT_MEM_SUB_HEADER_PTR(pMem); + + if (isGfidValid(pMemHeader->gfid)) + { + NvU32 gfidIdx = pMemHeader->gfid - 1; + + PORT_MEM_COUNTER_DEC(&portMemGlobals.pGfidTracking[gfidIdx]->counter, size); + } +#endif } diff --git a/src/nvidia/src/libraries/resserv/src/rs_access_rights.c b/src/nvidia/src/libraries/resserv/src/rs_access_rights.c index b8e2f8328d..eca1b4d9a8 100644 --- a/src/nvidia/src/libraries/resserv/src/rs_access_rights.c +++ b/src/nvidia/src/libraries/resserv/src/rs_access_rights.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2019-2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a @@ -52,6 +52,11 @@ const RS_ACCESS_INFO g_rsAccessMetadata[RS_ACCESS_COUNT] = { RS_ACCESS_FLAG_ALLOW_OWNER }, + + // RS_ACCESS_PERFMON + { + RS_ACCESS_FLAG_UNCACHED_CHECK + }, }; #endif /* RS_STANDALONE_TEST */ diff --git a/src/nvidia/src/libraries/resserv/src/rs_server.c b/src/nvidia/src/libraries/resserv/src/rs_server.c index 86688bb545..4f12e16408 100644 --- a/src/nvidia/src/libraries/resserv/src/rs_server.c +++ b/src/nvidia/src/libraries/resserv/src/rs_server.c @@ -29,6 +29,7 @@ #include "resserv/rs_resource.h" #include "tls/tls.h" #include "nv_speculation_barrier.h" + #if !RS_STANDALONE #include "os/os.h" #endif @@ -781,6 +782,9 @@ serverAllocResource if (status != NV_OK) goto done; + NV_ASSERT_OR_ELSE(!serverIsClientLockedForRead(pClientEntry), + status = NV_ERR_INVALID_LOCK_STATE; goto done); + if (!pClientEntry->pClient->bActive) { status = NV_ERR_INVALID_STATE; @@ -799,6 +803,11 @@ serverAllocResource if (status != NV_OK) goto done; + NV_ASSERT_OR_ELSE( + (!serverIsClientLockedForRead((pClientEntry)) && + !serverIsClientLockedForRead((pSecondClientEntry))), + status = NV_ERR_INVALID_LOCK_STATE; goto done); + if (!pClientEntry->pClient->bActive || !pSecondClientEntry->pClient->bActive) { @@ -1105,6 +1114,59 @@ NV_STATUS serverFreeDisabledClients return status; } +// +// Helper that validates the client and looks up the resource +// +// It acquires the top lock (RM API lock) in the desired mode (topLockAccess) +// and client lock always as exclusive. +// +static NV_STATUS +serverFreeResourceTreeLockAndFindResource +( + RsServer *pServer, + RS_RES_FREE_PARAMS *pParams, + LOCK_ACCESS_TYPE topLockAccess, + NvU32 *pReleaseFlags, + CLIENT_ENTRY **ppClientEntry, + RsResourceRef **ppResourceRef +) +{ + NV_STATUS status; + RS_LOCK_INFO *pLockInfo = pParams->pLockInfo; + CLIENT_ENTRY *pClientEntry; + + status = serverTopLock_Prologue(pServer, topLockAccess, pLockInfo, pReleaseFlags); + if (status != NV_OK) + return status; + + status = _serverLockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pParams->hClient, + NV_TRUE, pLockInfo, pReleaseFlags, &pClientEntry); + if (status != NV_OK) + return status; + + NV_ASSERT_OR_RETURN(!serverIsClientLockedForRead(pClientEntry), + NV_ERR_INVALID_LOCK_STATE); + + *ppClientEntry = pClientEntry; + + status = clientValidate(pClientEntry->pClient, pParams->pSecInfo); + if (status != NV_OK) + return status; + + status = clientGetResourceRef(pClientEntry->pClient, pParams->hResource, ppResourceRef); + if (status != NV_OK) + { + NV_PRINTF(LEVEL_INFO, "hObject 0x%x not found for client 0x%x\n", + pParams->hResource, + pParams->hClient); +#if (RS_COMPATABILITY_MODE) + status = NV_OK; +#endif + return status; + } + + return NV_OK; +} NV_STATUS serverFreeResourceTree @@ -1127,6 +1189,8 @@ serverFreeResourceTree NvU32 initialLockState; NvU32 releaseFlags = 0; LOCK_ACCESS_TYPE topLockAccess; + LOCK_ACCESS_TYPE firstTopLockAccess; + NvBool bSupportForceROLock; if (!pServer->bConstructed) return NV_ERR_NOT_READY; @@ -1138,41 +1202,64 @@ serverFreeResourceTree portMemSet(&freeStack, 0, sizeof(freeStack)); - status = serverFreeResourceLookupLockFlags(pServer, RS_LOCK_TOP, pParams, &topLockAccess); - if (status != NV_OK) - goto done; + // Reset pResourceRef since it's used as bookkeeping in this function. + pParams->pResourceRef = NULL; - status = serverTopLock_Prologue(pServer, topLockAccess, pLockInfo, &releaseFlags); + status = serverFreeResourceLookupLockFlags(pServer, RS_LOCK_TOP, pParams, + &topLockAccess, &bSupportForceROLock); if (status != NV_OK) goto done; - status = _serverLockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pParams->hClient, - NV_TRUE, pLockInfo, &releaseFlags, &pClientEntry); - if (status != NV_OK) + // + // If force RO lock is enabled, always lock as RO first to look up the + // resource and check its flags (see handling below) + // + firstTopLockAccess = bSupportForceROLock ? LOCK_ACCESS_READ : topLockAccess; + status = serverFreeResourceTreeLockAndFindResource(pServer, pParams, firstTopLockAccess, + &releaseFlags, &pClientEntry, &pResourceRef); + if ((status != NV_OK) || (pResourceRef == NULL)) + { + // + // Check for pResourceRef == NULL to cover the compatibility case where + // we return NV_OK for resources that don't exist. + // goto done; + } - pClient = pClientEntry->pClient; + if (topLockAccess != firstTopLockAccess) + { + // + // RO locking has not been enabled across the board, but some resources + // explicitly opt-in after having been verified to be safe. Query the + // lock flags again now that we know the resource. + // + pParams->pResourceRef = pResourceRef; + status = serverFreeResourceLookupLockFlags(pServer, RS_LOCK_TOP, pParams, + &topLockAccess, &bSupportForceROLock); + if (status != NV_OK) + goto done; - status = clientValidate(pClient, pParams->pSecInfo); - if (status != NV_OK) - goto done; + if (topLockAccess != firstTopLockAccess) + { + // Resource requires RW locking so need to re-lock and look up the resource again + pParams->pResourceRef = NULL; + _serverUnlockClientWithLockInfo(pServer, LOCK_ACCESS_WRITE, pClientEntry, pLockInfo, &releaseFlags); + pClientEntry = NULL; + serverTopLock_Epilogue(pServer, firstTopLockAccess, pLockInfo, &releaseFlags); + + status = serverFreeResourceTreeLockAndFindResource(pServer, pParams, topLockAccess, + &releaseFlags, &pClientEntry, &pResourceRef); + if ((status != NV_OK) || (pResourceRef == NULL)) + goto done; + } + } + pClient = pClientEntry->pClient; if (pClient->pFreeStack != NULL) freeStack.pPrev = pClient->pFreeStack; pClient->pFreeStack = &freeStack; bPopFreeStack = NV_TRUE; - status = clientGetResourceRef(pClient, pParams->hResource, &pResourceRef); - if (status != NV_OK) - { - NV_PRINTF(LEVEL_INFO, "hObject 0x%x not found for client 0x%x\n", - pParams->hResource, - pParams->hClient); -#if (RS_COMPATABILITY_MODE) - status = NV_OK; -#endif - goto done; - } pParams->pResourceRef = pResourceRef; freeStack.pResourceRef = pResourceRef; @@ -1590,6 +1677,11 @@ serverCopyResource if (status != NV_OK) goto done; + NV_ASSERT_OR_ELSE( + (!serverIsClientLockedForRead((pClientEntrySrc)) && + !serverIsClientLockedForRead((pClientEntryDst))), + status = NV_ERR_INVALID_LOCK_STATE; goto done); + pClientSrc = pClientEntrySrc->pClient; pClientDst = pClientEntryDst->pClient; @@ -1702,6 +1794,11 @@ _serverShareResourceAccessClient if (status != NV_OK) goto done; + NV_ASSERT_OR_ELSE( + (!serverIsClientLockedForRead((pClientEntryOwner)) && + !serverIsClientLockedForRead((pClientEntryTarget))), + status = NV_ERR_INVALID_LOCK_STATE; goto done); + pClientOwner = pClientEntryOwner->pClient; pClientTarget = pClientEntryTarget->pClient; @@ -1816,6 +1913,9 @@ serverShareResourceAccess if (status != NV_OK) goto done; + NV_ASSERT_OR_ELSE(!serverIsClientLockedForRead(pClientEntry), + status = NV_ERR_INVALID_LOCK_STATE; goto done); + pClient = pClientEntry->pClient; status = clientValidate(pClient, pParams->pSecInfo); @@ -1875,7 +1975,7 @@ serverMap CALL_CONTEXT *pOldContext = NULL; CLIENT_ENTRY *pClientEntry = NULL; RsClient *pClient; - RsResourceRef *pResourceRef; + RsResourceRef *pResourceRef = NULL; RsResourceRef *pContextRef = NULL; RsResource *pResource; RsCpuMapping *pCpuMapping = NULL; @@ -2077,7 +2177,7 @@ serverInterMap { CLIENT_ENTRY *pClientEntry = NULL; RsClient *pClient; - RsResourceRef *pMapperRef; + RsResourceRef *pMapperRef = NULL; RsResourceRef *pMappableRef; RsResourceRef *pContextRef; RsInterMapping *pMapping = NULL; @@ -3239,6 +3339,7 @@ _serverLockClient if (access == LOCK_ACCESS_READ) { RS_RWLOCK_ACQUIRE_READ(pClientEntry->pLock, &pClientEntry->lockVal); + portAtomicIncrementU32(&pClientEntry->lockReadOwnerCnt); } else { @@ -3518,6 +3619,7 @@ _serverUnlockClient { if (access == LOCK_ACCESS_READ) { + portAtomicDecrementU32(&pClientEntry->lockReadOwnerCnt); RS_RWLOCK_RELEASE_READ(pClientEntry->pLock, &pClientEntry->lockVal); } else @@ -3527,6 +3629,16 @@ _serverUnlockClient } } +NvBool +serverIsClientLockedForRead +( + CLIENT_ENTRY* pClientEntry +) +{ + NV_ASSERT_OR_RETURN(pClientEntry != NULL, NV_FALSE); + return pClientEntry->lockReadOwnerCnt != 0; +} + static void _serverUnlockClientWithLockInfo @@ -4535,12 +4647,15 @@ serverFreeResourceLookupLockFlags RsServer *pServer, RS_LOCK_ENUM lock, RS_RES_FREE_PARAMS_INTERNAL *pParams, - LOCK_ACCESS_TYPE *pAccess + LOCK_ACCESS_TYPE *pAccess, + NvBool *pbSupportForceROLock ) { *pAccess = (serverSupportsReadOnlyLock(pServer, lock, RS_API_FREE_RESOURCE)) ? LOCK_ACCESS_READ : LOCK_ACCESS_WRITE; + *pbSupportForceROLock = NV_TRUE; + return NV_OK; } diff --git a/src/nvidia/srcs.mk b/src/nvidia/srcs.mk index 9ffdf11b9d..246608e150 100644 --- a/src/nvidia/srcs.mk +++ b/src/nvidia/srcs.mk @@ -112,7 +112,6 @@ SRCS += generated/g_kernel_nvjpg_ctx_nvoc.c SRCS += generated/g_kernel_nvlink_nvoc.c SRCS += generated/g_kernel_ofa_ctx_nvoc.c SRCS += generated/g_kernel_rc_nvoc.c -SRCS += generated/g_kernel_sched_mgr_nvoc.c SRCS += generated/g_kernel_sec2_nvoc.c SRCS += generated/g_kernel_sm_debugger_session_nvoc.c SRCS += generated/g_kernel_vgpu_mgr_nvoc.c @@ -137,7 +136,6 @@ SRCS += generated/g_nvdebug_pb.c SRCS += generated/g_nvencsession_nvoc.c SRCS += generated/g_nvfbc_session_nvoc.c SRCS += generated/g_object_nvoc.c -SRCS += generated/g_objgpumon_nvoc.c SRCS += generated/g_objsweng_nvoc.c SRCS += generated/g_objtmr_nvoc.c SRCS += generated/g_os_desc_mem_nvoc.c @@ -394,6 +392,8 @@ SRCS += src/kernel/gpu/ce/kernel_ce.c SRCS += src/kernel/gpu/ce/kernel_ce_context.c SRCS += src/kernel/gpu/ce/kernel_ce_ctrl.c SRCS += src/kernel/gpu/ce/kernel_ce_shared.c +SRCS += src/kernel/gpu/conf_compute/arch/blackwell/conf_compute_gb100.c +SRCS += src/kernel/gpu/conf_compute/arch/blackwell/conf_compute_keystore_gb100.c SRCS += src/kernel/gpu/conf_compute/arch/hopper/conf_compute_gh100.c SRCS += src/kernel/gpu/conf_compute/arch/hopper/conf_compute_key_rotation_gh100.c SRCS += src/kernel/gpu/conf_compute/arch/hopper/conf_compute_keystore_gh100.c @@ -401,7 +401,6 @@ SRCS += src/kernel/gpu/conf_compute/ccsl.c SRCS += src/kernel/gpu/conf_compute/conf_compute.c SRCS += src/kernel/gpu/conf_compute/conf_compute_api.c SRCS += src/kernel/gpu/conf_compute/conf_compute_key_rotation.c -SRCS += src/kernel/gpu/conf_compute/conf_compute_keystore.c SRCS += src/kernel/gpu/dbgbuffer.c SRCS += src/kernel/gpu/deferred_api.c SRCS += src/kernel/gpu/device.c @@ -434,6 +433,7 @@ SRCS += src/kernel/gpu/external_device/gsync_api.c SRCS += src/kernel/gpu/external_device/kern_external_device.c SRCS += src/kernel/gpu/falcon/arch/ampere/kernel_falcon_ga100.c SRCS += src/kernel/gpu/falcon/arch/ampere/kernel_falcon_ga102.c +SRCS += src/kernel/gpu/falcon/arch/blackwell/kernel_falcon_gb100.c SRCS += src/kernel/gpu/falcon/arch/turing/kernel_crashcat_engine_tu102.c SRCS += src/kernel/gpu/falcon/arch/turing/kernel_falcon_tu102.c SRCS += src/kernel/gpu/falcon/kernel_crashcat_engine.c @@ -464,7 +464,6 @@ SRCS += src/kernel/gpu/fifo/kernel_fifo.c SRCS += src/kernel/gpu/fifo/kernel_fifo_ctrl.c SRCS += src/kernel/gpu/fifo/kernel_fifo_init.c SRCS += src/kernel/gpu/fifo/kernel_idle_channels.c -SRCS += src/kernel/gpu/fifo/kernel_sched_mgr.c SRCS += src/kernel/gpu/fifo/usermode_api.c SRCS += src/kernel/gpu/fifo/uvm_channel_retainer.c SRCS += src/kernel/gpu/fsp/arch/blackwell/kern_fsp_gb100.c @@ -506,6 +505,7 @@ SRCS += src/kernel/gpu/gsp/arch/ada/kernel_gsp_ad102.c SRCS += src/kernel/gpu/gsp/arch/ampere/kernel_gsp_falcon_ga102.c SRCS += src/kernel/gpu/gsp/arch/ampere/kernel_gsp_ga100.c SRCS += src/kernel/gpu/gsp/arch/ampere/kernel_gsp_ga102.c +SRCS += src/kernel/gpu/gsp/arch/blackwell/kernel_gsp_ecc_gb100.c SRCS += src/kernel/gpu/gsp/arch/blackwell/kernel_gsp_gb100.c SRCS += src/kernel/gpu/gsp/arch/hopper/kernel_gsp_gh100.c SRCS += src/kernel/gpu/gsp/arch/turing/kernel_gsp_booter_tu102.c @@ -612,7 +612,6 @@ SRCS += src/kernel/gpu/mig_mgr/gpu_instance_subscription.c SRCS += src/kernel/gpu/mig_mgr/kernel_mig_manager.c SRCS += src/kernel/gpu/mig_mgr/mig_config_session.c SRCS += src/kernel/gpu/mig_mgr/mig_monitor_session.c -SRCS += src/kernel/gpu/mmu/arch/ada/kern_gmmu_ad102.c SRCS += src/kernel/gpu/mmu/arch/ampere/kern_gmmu_fmt_ga10x.c SRCS += src/kernel/gpu/mmu/arch/ampere/kern_gmmu_ga100.c SRCS += src/kernel/gpu/mmu/arch/blackwell/kern_gmmu_fmt_gb10x.c @@ -637,7 +636,6 @@ SRCS += src/kernel/gpu/mmu/mmu_fault_buffer.c SRCS += src/kernel/gpu/mmu/mmu_fault_buffer_ctrl.c SRCS += src/kernel/gpu/mmu/mmu_trace.c SRCS += src/kernel/gpu/mmu/uvm_sw.c -SRCS += src/kernel/gpu/mmu/vidmem_access_bit_buffer_v2.c SRCS += src/kernel/gpu/nvdec/kernel_nvdec_ctx.c SRCS += src/kernel/gpu/nvdec/kernel_nvdec_engdesc.c SRCS += src/kernel/gpu/nvenc/kernel_nvenc_ctx.c diff --git a/utils.mk b/utils.mk index 00a396f905..cabb0b84c8 100644 --- a/utils.mk +++ b/utils.mk @@ -45,6 +45,7 @@ CXX_ONLY_CFLAGS ?= LDFLAGS ?= BIN_LDFLAGS ?= EXTRA_CFLAGS ?= +EXTRA_LDFLAGS ?= STACK_USAGE_WARNING ?= CFLAGS += $(if $(STACK_USAGE_WARNING),-Wstack-usage=$(STACK_USAGE_WARNING)) @@ -89,6 +90,7 @@ ifeq ($(DEVELOP),1) endif CFLAGS += $(EXTRA_CFLAGS) +LDFLAGS += $(EXTRA_LDFLAGS) STRIP_CMD ?= strip DO_STRIP ?= 1 diff --git a/version.mk b/version.mk index 1bbbeedbbd..54bc4a0b87 100644 --- a/version.mk +++ b/version.mk @@ -1,4 +1,4 @@ -NVIDIA_VERSION = 560.35.03 +NVIDIA_VERSION = 565.57.01 # This file. VERSION_MK_FILE := $(lastword $(MAKEFILE_LIST))